./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/ldv-linux-3.16-rc1/43_2a_consumption_linux-3.16-rc1.tar.xz-43_2a-sound--drivers--snd-serial-u16550.ko-entry_point.cil.out.i --full-output -ea --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 03d7b7b3 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -ea -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/ldv-linux-3.16-rc1/43_2a_consumption_linux-3.16-rc1.tar.xz-43_2a-sound--drivers--snd-serial-u16550.ko-entry_point.cil.out.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash c850114a14157388fff72c3ea545dc39574a5dacf1bf063210a2e523cf9f3a54 --- Real Ultimate output --- This is Ultimate 0.2.2-dev-03d7b7b [2022-02-20 22:03:28,386 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-02-20 22:03:28,388 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-02-20 22:03:28,424 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-02-20 22:03:28,424 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-02-20 22:03:28,427 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-02-20 22:03:28,429 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-02-20 22:03:28,431 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-02-20 22:03:28,433 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-02-20 22:03:28,437 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-02-20 22:03:28,437 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-02-20 22:03:28,438 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-02-20 22:03:28,439 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-02-20 22:03:28,441 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-02-20 22:03:28,442 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-02-20 22:03:28,443 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-02-20 22:03:28,444 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-02-20 22:03:28,447 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-02-20 22:03:28,448 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-02-20 22:03:28,452 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-02-20 22:03:28,453 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-02-20 22:03:28,454 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-02-20 22:03:28,455 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-02-20 22:03:28,456 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-02-20 22:03:28,457 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-02-20 22:03:28,458 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-02-20 22:03:28,458 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-02-20 22:03:28,459 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-02-20 22:03:28,459 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-02-20 22:03:28,460 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-02-20 22:03:28,460 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-02-20 22:03:28,461 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-02-20 22:03:28,462 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-02-20 22:03:28,463 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-02-20 22:03:28,464 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-02-20 22:03:28,464 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-02-20 22:03:28,464 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-02-20 22:03:28,464 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-02-20 22:03:28,464 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-02-20 22:03:28,465 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-02-20 22:03:28,465 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-02-20 22:03:28,467 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2022-02-20 22:03:28,490 INFO L113 SettingsManager]: Loading preferences was successful [2022-02-20 22:03:28,490 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-02-20 22:03:28,490 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-02-20 22:03:28,491 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-02-20 22:03:28,491 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-02-20 22:03:28,491 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-02-20 22:03:28,492 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-02-20 22:03:28,492 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-02-20 22:03:28,492 INFO L138 SettingsManager]: * Use SBE=true [2022-02-20 22:03:28,492 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-02-20 22:03:28,493 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-02-20 22:03:28,493 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-02-20 22:03:28,493 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-02-20 22:03:28,493 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-02-20 22:03:28,494 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-02-20 22:03:28,494 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-02-20 22:03:28,494 INFO L138 SettingsManager]: * Use constant arrays=true [2022-02-20 22:03:28,494 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-02-20 22:03:28,494 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-02-20 22:03:28,494 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-02-20 22:03:28,494 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-02-20 22:03:28,495 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-02-20 22:03:28,495 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-02-20 22:03:28,495 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-02-20 22:03:28,495 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-02-20 22:03:28,495 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-02-20 22:03:28,495 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-02-20 22:03:28,496 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2022-02-20 22:03:28,497 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2022-02-20 22:03:28,497 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-02-20 22:03:28,497 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> c850114a14157388fff72c3ea545dc39574a5dacf1bf063210a2e523cf9f3a54 [2022-02-20 22:03:28,694 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-02-20 22:03:28,712 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-02-20 22:03:28,714 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-02-20 22:03:28,715 INFO L271 PluginConnector]: Initializing CDTParser... [2022-02-20 22:03:28,716 INFO L275 PluginConnector]: CDTParser initialized [2022-02-20 22:03:28,717 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/ldv-linux-3.16-rc1/43_2a_consumption_linux-3.16-rc1.tar.xz-43_2a-sound--drivers--snd-serial-u16550.ko-entry_point.cil.out.i [2022-02-20 22:03:28,761 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/9e46f8c00/93f855b488294916adb8d1927b6c4124/FLAG72ee5b61b [2022-02-20 22:03:29,320 INFO L306 CDTParser]: Found 1 translation units. [2022-02-20 22:03:29,321 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.16-rc1/43_2a_consumption_linux-3.16-rc1.tar.xz-43_2a-sound--drivers--snd-serial-u16550.ko-entry_point.cil.out.i [2022-02-20 22:03:29,351 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/9e46f8c00/93f855b488294916adb8d1927b6c4124/FLAG72ee5b61b [2022-02-20 22:03:29,743 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/9e46f8c00/93f855b488294916adb8d1927b6c4124 [2022-02-20 22:03:29,751 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-02-20 22:03:29,753 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-02-20 22:03:29,754 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-02-20 22:03:29,754 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-02-20 22:03:29,756 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-02-20 22:03:29,757 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.02 10:03:29" (1/1) ... [2022-02-20 22:03:29,757 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2e3f474e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:03:29, skipping insertion in model container [2022-02-20 22:03:29,758 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.02 10:03:29" (1/1) ... [2022-02-20 22:03:29,762 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-02-20 22:03:29,820 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-02-20 22:03:30,080 WARN L1246 CHandler]: Detected problem Invalid redeclaration of the name show at C: (*show)(struct kobject___0 * , struct attribute___0 * , char * ) [2482] [2022-02-20 22:03:30,081 WARN L1246 CHandler]: Detected problem Invalid redeclaration of the name store at C: (*store)(struct kobject___0 * , struct attribute___0 * , char const * , size_t ) [2483-2484] [2022-02-20 22:03:30,160 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.16-rc1/43_2a_consumption_linux-3.16-rc1.tar.xz-43_2a-sound--drivers--snd-serial-u16550.ko-entry_point.cil.out.i[72349,72362] [2022-02-20 22:03:30,454 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-20 22:03:30,501 INFO L203 MainTranslator]: Completed pre-run [2022-02-20 22:03:30,564 WARN L1246 CHandler]: Detected problem Invalid redeclaration of the name show at C: (*show)(struct kobject___0 * , struct attribute___0 * , char * ) [2482] [2022-02-20 22:03:30,564 WARN L1246 CHandler]: Detected problem Invalid redeclaration of the name store at C: (*store)(struct kobject___0 * , struct attribute___0 * , char const * , size_t ) [2483-2484] [2022-02-20 22:03:30,575 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.16-rc1/43_2a_consumption_linux-3.16-rc1.tar.xz-43_2a-sound--drivers--snd-serial-u16550.ko-entry_point.cil.out.i[72349,72362] [2022-02-20 22:03:30,675 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-20 22:03:30,716 INFO L208 MainTranslator]: Completed translation [2022-02-20 22:03:30,716 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:03:30 WrapperNode [2022-02-20 22:03:30,717 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-02-20 22:03:30,718 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-02-20 22:03:30,718 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-02-20 22:03:30,718 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-02-20 22:03:30,723 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:03:30" (1/1) ... [2022-02-20 22:03:30,775 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:03:30" (1/1) ... [2022-02-20 22:03:30,949 INFO L137 Inliner]: procedures = 142, calls = 996, calls flagged for inlining = 73, calls inlined = 71, statements flattened = 2004 [2022-02-20 22:03:30,949 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-02-20 22:03:30,950 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-02-20 22:03:30,950 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-02-20 22:03:30,950 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-02-20 22:03:30,959 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:03:30" (1/1) ... [2022-02-20 22:03:30,959 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:03:30" (1/1) ... [2022-02-20 22:03:30,978 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:03:30" (1/1) ... [2022-02-20 22:03:30,978 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:03:30" (1/1) ... [2022-02-20 22:03:31,040 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:03:30" (1/1) ... [2022-02-20 22:03:31,056 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:03:30" (1/1) ... [2022-02-20 22:03:31,067 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:03:30" (1/1) ... [2022-02-20 22:03:31,082 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-02-20 22:03:31,084 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-02-20 22:03:31,084 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-02-20 22:03:31,084 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-02-20 22:03:31,085 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:03:30" (1/1) ... [2022-02-20 22:03:31,090 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-02-20 22:03:31,097 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-20 22:03:31,107 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-02-20 22:03:31,136 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-02-20 22:03:31,149 INFO L130 BoogieDeclarations]: Found specification of procedure snd_uart16550_free [2022-02-20 22:03:31,149 INFO L138 BoogieDeclarations]: Found implementation of procedure snd_uart16550_free [2022-02-20 22:03:31,149 INFO L130 BoogieDeclarations]: Found specification of procedure snd_uart16550_do_close [2022-02-20 22:03:31,149 INFO L138 BoogieDeclarations]: Found implementation of procedure snd_uart16550_do_close [2022-02-20 22:03:31,150 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2022-02-20 22:03:31,150 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_strcpy [2022-02-20 22:03:31,150 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_strcpy [2022-02-20 22:03:31,150 INFO L130 BoogieDeclarations]: Found specification of procedure snd_uart16550_add_timer [2022-02-20 22:03:31,150 INFO L138 BoogieDeclarations]: Found implementation of procedure snd_uart16550_add_timer [2022-02-20 22:03:31,150 INFO L130 BoogieDeclarations]: Found specification of procedure snd_uart16550_io_loop [2022-02-20 22:03:31,150 INFO L138 BoogieDeclarations]: Found implementation of procedure snd_uart16550_io_loop [2022-02-20 22:03:31,150 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_stop [2022-02-20 22:03:31,150 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_stop [2022-02-20 22:03:31,151 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-02-20 22:03:31,151 INFO L130 BoogieDeclarations]: Found specification of procedure snd_uart16550_del_timer [2022-02-20 22:03:31,151 INFO L138 BoogieDeclarations]: Found implementation of procedure snd_uart16550_del_timer [2022-02-20 22:03:31,151 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_spin_lock [2022-02-20 22:03:31,151 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_spin_lock [2022-02-20 22:03:31,151 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2022-02-20 22:03:31,151 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2022-02-20 22:03:31,151 INFO L130 BoogieDeclarations]: Found specification of procedure snd_uart16550_buffer_output [2022-02-20 22:03:31,152 INFO L138 BoogieDeclarations]: Found implementation of procedure snd_uart16550_buffer_output [2022-02-20 22:03:31,152 INFO L130 BoogieDeclarations]: Found specification of procedure snd_uart16550_substreams [2022-02-20 22:03:31,152 INFO L138 BoogieDeclarations]: Found implementation of procedure snd_uart16550_substreams [2022-02-20 22:03:31,152 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-02-20 22:03:31,152 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_error [2022-02-20 22:03:31,152 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_error [2022-02-20 22:03:31,152 INFO L130 BoogieDeclarations]: Found specification of procedure snd_uart16550_output_trigger [2022-02-20 22:03:31,152 INFO L138 BoogieDeclarations]: Found implementation of procedure snd_uart16550_output_trigger [2022-02-20 22:03:31,153 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2022-02-20 22:03:31,153 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2022-02-20 22:03:31,153 INFO L130 BoogieDeclarations]: Found specification of procedure snd_uart16550_do_open [2022-02-20 22:03:31,153 INFO L138 BoogieDeclarations]: Found implementation of procedure snd_uart16550_do_open [2022-02-20 22:03:31,153 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-02-20 22:03:31,153 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-02-20 22:03:31,153 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-02-20 22:03:31,153 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-02-20 22:03:31,153 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_irq_1 [2022-02-20 22:03:31,154 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_irq_1 [2022-02-20 22:03:31,154 INFO L130 BoogieDeclarations]: Found specification of procedure reg_timer_2 [2022-02-20 22:03:31,154 INFO L138 BoogieDeclarations]: Found implementation of procedure reg_timer_2 [2022-02-20 22:03:31,154 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-02-20 22:03:31,154 INFO L130 BoogieDeclarations]: Found specification of procedure snd_serial_unregister_all [2022-02-20 22:03:31,154 INFO L138 BoogieDeclarations]: Found implementation of procedure snd_serial_unregister_all [2022-02-20 22:03:31,154 INFO L130 BoogieDeclarations]: Found specification of procedure snd_uart16550_output_byte [2022-02-20 22:03:31,154 INFO L138 BoogieDeclarations]: Found implementation of procedure snd_uart16550_output_byte [2022-02-20 22:03:31,155 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_spin_unlock [2022-02-20 22:03:31,155 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_spin_unlock [2022-02-20 22:03:31,155 INFO L130 BoogieDeclarations]: Found specification of procedure platform_device_unregister [2022-02-20 22:03:31,155 INFO L138 BoogieDeclarations]: Found implementation of procedure platform_device_unregister [2022-02-20 22:03:31,155 INFO L130 BoogieDeclarations]: Found specification of procedure spin_unlock_irqrestore [2022-02-20 22:03:31,155 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_unlock_irqrestore [2022-02-20 22:03:31,155 INFO L130 BoogieDeclarations]: Found specification of procedure snd_rawmidi_receive [2022-02-20 22:03:31,155 INFO L138 BoogieDeclarations]: Found implementation of procedure snd_rawmidi_receive [2022-02-20 22:03:31,156 INFO L130 BoogieDeclarations]: Found specification of procedure snd_uart16550_input_trigger [2022-02-20 22:03:31,156 INFO L138 BoogieDeclarations]: Found implementation of procedure snd_uart16550_input_trigger [2022-02-20 22:03:31,156 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-02-20 22:03:31,156 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2022-02-20 22:03:31,156 INFO L130 BoogieDeclarations]: Found specification of procedure snd_card_free [2022-02-20 22:03:31,156 INFO L138 BoogieDeclarations]: Found implementation of procedure snd_card_free [2022-02-20 22:03:31,156 INFO L130 BoogieDeclarations]: Found specification of procedure platform_get_drvdata [2022-02-20 22:03:31,156 INFO L138 BoogieDeclarations]: Found implementation of procedure platform_get_drvdata [2022-02-20 22:03:31,157 INFO L130 BoogieDeclarations]: Found specification of procedure inb [2022-02-20 22:03:31,157 INFO L138 BoogieDeclarations]: Found implementation of procedure inb [2022-02-20 22:03:31,157 INFO L130 BoogieDeclarations]: Found specification of procedure outb [2022-02-20 22:03:31,157 INFO L138 BoogieDeclarations]: Found implementation of procedure outb [2022-02-20 22:03:31,157 INFO L130 BoogieDeclarations]: Found specification of procedure spin_unlock [2022-02-20 22:03:31,157 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_unlock [2022-02-20 22:03:31,157 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-02-20 22:03:31,157 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2022-02-20 22:03:31,157 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2022-02-20 22:03:31,158 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-02-20 22:03:31,158 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-02-20 22:03:31,158 INFO L130 BoogieDeclarations]: Found specification of procedure snd_rawmidi_set_ops [2022-02-20 22:03:31,158 INFO L138 BoogieDeclarations]: Found implementation of procedure snd_rawmidi_set_ops [2022-02-20 22:03:31,158 INFO L130 BoogieDeclarations]: Found specification of procedure snd_uart16550_write_buffer [2022-02-20 22:03:31,158 INFO L138 BoogieDeclarations]: Found implementation of procedure snd_uart16550_write_buffer [2022-02-20 22:03:31,158 INFO L130 BoogieDeclarations]: Found specification of procedure IS_ERR [2022-02-20 22:03:31,158 INFO L138 BoogieDeclarations]: Found implementation of procedure IS_ERR [2022-02-20 22:03:31,526 INFO L234 CfgBuilder]: Building ICFG [2022-02-20 22:03:31,528 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-02-20 22:03:31,911 INFO L766 $ProcedureCfgBuilder]: dead code at ProgramPoint ldv_stopFINAL: assume true; [2022-02-20 22:03:33,259 INFO L275 CfgBuilder]: Performing block encoding [2022-02-20 22:03:33,269 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-02-20 22:03:33,269 INFO L299 CfgBuilder]: Removed 1 assume(true) statements. [2022-02-20 22:03:33,271 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 10:03:33 BoogieIcfgContainer [2022-02-20 22:03:33,272 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-02-20 22:03:33,273 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-02-20 22:03:33,273 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-02-20 22:03:33,275 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-02-20 22:03:33,275 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 20.02 10:03:29" (1/3) ... [2022-02-20 22:03:33,276 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7caf7663 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.02 10:03:33, skipping insertion in model container [2022-02-20 22:03:33,276 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:03:30" (2/3) ... [2022-02-20 22:03:33,276 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7caf7663 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.02 10:03:33, skipping insertion in model container [2022-02-20 22:03:33,276 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 10:03:33" (3/3) ... [2022-02-20 22:03:33,277 INFO L111 eAbstractionObserver]: Analyzing ICFG 43_2a_consumption_linux-3.16-rc1.tar.xz-43_2a-sound--drivers--snd-serial-u16550.ko-entry_point.cil.out.i [2022-02-20 22:03:33,281 INFO L205 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-02-20 22:03:33,281 INFO L164 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-02-20 22:03:33,313 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-02-20 22:03:33,318 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2022-02-20 22:03:33,318 INFO L340 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-02-20 22:03:33,343 INFO L276 IsEmpty]: Start isEmpty. Operand has 661 states, 494 states have (on average 1.4008097165991902) internal successors, (692), 513 states have internal predecessors, (692), 133 states have call successors, (133), 33 states have call predecessors, (133), 32 states have return successors, (126), 126 states have call predecessors, (126), 126 states have call successors, (126) [2022-02-20 22:03:33,353 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2022-02-20 22:03:33,354 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:03:33,354 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:03:33,355 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:03:33,358 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:03:33,359 INFO L85 PathProgramCache]: Analyzing trace with hash 589656160, now seen corresponding path program 1 times [2022-02-20 22:03:33,365 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:03:33,365 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1186165114] [2022-02-20 22:03:33,365 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:03:33,366 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:03:33,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:03:33,742 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 19 [2022-02-20 22:03:33,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:03:33,756 INFO L290 TraceCheckUtils]: 0: Hoare triple {675#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~offset444 := 0; {664#true} is VALID [2022-02-20 22:03:33,757 INFO L290 TraceCheckUtils]: 1: Hoare triple {664#true} assume !true; {665#false} is VALID [2022-02-20 22:03:33,757 INFO L290 TraceCheckUtils]: 2: Hoare triple {665#false} assume #res.base == dest.base && #res.offset == dest.offset; {665#false} is VALID [2022-02-20 22:03:33,758 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {665#false} {665#false} #1809#return; {665#false} is VALID [2022-02-20 22:03:33,758 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 25 [2022-02-20 22:03:33,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:03:33,766 INFO L290 TraceCheckUtils]: 0: Hoare triple {675#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~offset444 := 0; {664#true} is VALID [2022-02-20 22:03:33,767 INFO L290 TraceCheckUtils]: 1: Hoare triple {664#true} assume !true; {665#false} is VALID [2022-02-20 22:03:33,767 INFO L290 TraceCheckUtils]: 2: Hoare triple {665#false} assume #res.base == dest.base && #res.offset == dest.offset; {665#false} is VALID [2022-02-20 22:03:33,767 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {665#false} {665#false} #1811#return; {665#false} is VALID [2022-02-20 22:03:33,770 INFO L290 TraceCheckUtils]: 0: Hoare triple {664#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(105, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(8, 4);call #Ultimate.allocInit(12, 5);call #Ultimate.allocInit(12, 6);call #Ultimate.allocInit(8, 7);call #Ultimate.allocInit(217, 8);call #Ultimate.allocInit(33, 9);call #Ultimate.allocInit(12, 10);call #Ultimate.allocInit(217, 11);call #Ultimate.allocInit(32, 12);call #Ultimate.allocInit(217, 13);call #Ultimate.allocInit(40, 14);call #Ultimate.allocInit(27, 15);call #Ultimate.allocInit(28, 16);call #Ultimate.allocInit(12, 17);call #Ultimate.allocInit(217, 18);call #Ultimate.allocInit(30, 19);call #Ultimate.allocInit(15, 20);call #Ultimate.allocInit(17, 21);call #Ultimate.allocInit(12, 22);call #Ultimate.allocInit(217, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(217, 25);call #Ultimate.allocInit(45, 26);call #Ultimate.allocInit(217, 27);call #Ultimate.allocInit(44, 28);call #Ultimate.allocInit(7, 29);call write~init~int(83, 29, 0, 1);call write~init~int(101, 29, 1, 1);call write~init~int(114, 29, 2, 1);call write~init~int(105, 29, 3, 1);call write~init~int(97, 29, 4, 1);call write~init~int(108, 29, 5, 1);call write~init~int(0, 29, 6, 1);call #Ultimate.allocInit(25, 30);call #Ultimate.allocInit(24, 31);call #Ultimate.allocInit(18, 32);call #Ultimate.allocInit(18, 33);call #Ultimate.allocInit(49, 34);~ldv_irq_1_3~0 := 0;~ldv_irq_data_1_1~0.base, ~ldv_irq_data_1_1~0.offset := 0, 0;~ldv_irq_1_0~0 := 0;~ldv_irq_data_1_0~0.base, ~ldv_irq_data_1_0~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_irq_data_1_3~0.base, ~ldv_irq_data_1_3~0.offset := 0, 0;~snd_uart16550_input_group0~0.base, ~snd_uart16550_input_group0~0.offset := 0, 0;~ldv_irq_data_1_2~0.base, ~ldv_irq_data_1_2~0.offset := 0, 0;~ldv_irq_1_2~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_irq_1_1~0 := 0;~ldv_timer_state_2~0 := 0;~ldv_irq_line_1_3~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_irq_line_1_0~0 := 0;~ldv_timer_list_2~0.base, ~ldv_timer_list_2~0.offset := 0, 0;~snd_serial_driver_group0~0.base, ~snd_serial_driver_group0~0.offset := 0, 0;~ref_cnt~0 := 0;~ldv_irq_line_1_1~0 := 0;~snd_uart16550_output_group0~0.base, ~snd_uart16550_output_group0~0.offset := 0, 0;~ldv_state_variable_1~0 := 0;~ldv_irq_line_1_2~0 := 0;~ldv_state_variable_4~0 := 0;~#adaptor_names~0.base, ~#adaptor_names~0.offset := 35, 0;call #Ultimate.allocInit(40, 35);call write~init~$Pointer$(3, 0, ~#adaptor_names~0.base, ~#adaptor_names~0.offset, 8);call write~init~$Pointer$(4, 0, ~#adaptor_names~0.base, 8 + ~#adaptor_names~0.offset, 8);call write~init~$Pointer$(5, 0, ~#adaptor_names~0.base, 16 + ~#adaptor_names~0.offset, 8);call write~init~$Pointer$(6, 0, ~#adaptor_names~0.base, 24 + ~#adaptor_names~0.offset, 8);call write~init~$Pointer$(7, 0, ~#adaptor_names~0.base, 32 + ~#adaptor_names~0.offset, 8);~#index~0.base, ~#index~0.offset := 36, 0;call #Ultimate.allocInit(128, 36);call write~init~int(-1, ~#index~0.base, ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 4 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 8 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 12 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 16 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 20 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 24 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 28 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 32 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 36 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 40 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 44 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 48 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 52 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 56 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 60 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 64 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 68 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 72 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 76 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 80 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 84 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 88 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 92 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 96 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 100 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 104 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 108 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 112 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 116 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 120 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 124 + ~#index~0.offset, 4);~#id~0.base, ~#id~0.offset := 37, 0;call #Ultimate.allocInit(256, 37);call write~init~$Pointer$(0, 0, ~#id~0.base, ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 8 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 16 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 24 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 32 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 40 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 48 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 56 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 64 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 72 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 80 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 88 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 96 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 104 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 112 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 120 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 128 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 136 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 144 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 152 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 160 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 168 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 176 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 184 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 192 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 200 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 208 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 216 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 224 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 232 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 240 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 248 + ~#id~0.offset, 8);~#enable~0.base, ~#enable~0.offset := 38, 0;call #Ultimate.allocInit(32, 38);call write~init~int(1, ~#enable~0.base, ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 1 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 2 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 3 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 4 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 5 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 6 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 7 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 8 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 9 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 10 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 11 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 12 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 13 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 14 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 15 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 16 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 17 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 18 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 19 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 20 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 21 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 22 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 23 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 24 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 25 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 26 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 27 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 28 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 29 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 30 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 31 + ~#enable~0.offset, 1);~#port~0.base, ~#port~0.offset := 39, 0;call #Ultimate.allocInit(256, 39);call write~init~int(1, ~#port~0.base, ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 8 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 16 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 24 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 32 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 40 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 48 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 56 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 64 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 72 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 80 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 88 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 96 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 104 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 112 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 120 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 128 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 136 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 144 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 152 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 160 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 168 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 176 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 184 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 192 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 200 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 208 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 216 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 224 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 232 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 240 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 248 + ~#port~0.offset, 8);~#irq~0.base, ~#irq~0.offset := 40, 0;call #Ultimate.allocInit(128, 40);call write~init~int(65535, ~#irq~0.base, ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 4 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 8 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 12 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 16 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 20 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 24 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 28 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 32 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 36 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 40 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 44 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 48 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 52 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 56 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 60 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 64 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 68 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 72 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 76 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 80 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 84 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 88 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 92 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 96 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 100 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 104 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 108 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 112 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 116 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 120 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 124 + ~#irq~0.offset, 4);~#speed~0.base, ~#speed~0.offset := 41, 0;call #Ultimate.allocInit(128, 41);call write~init~int(38400, ~#speed~0.base, ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 4 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 8 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 12 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 16 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 20 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 24 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 28 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 32 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 36 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 40 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 44 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 48 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 52 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 56 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 60 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 64 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 68 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 72 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 76 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 80 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 84 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 88 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 92 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 96 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 100 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 104 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 108 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 112 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 116 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 120 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 124 + ~#speed~0.offset, 4);~#base~0.base, ~#base~0.offset := 42, 0;call #Ultimate.allocInit(128, 42);call write~init~int(115200, ~#base~0.base, ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 4 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 8 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 12 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 16 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 20 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 24 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 28 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 32 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 36 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 40 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 44 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 48 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 52 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 56 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 60 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 64 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 68 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 72 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 76 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 80 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 84 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 88 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 92 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 96 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 100 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 104 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 108 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 112 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 116 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 120 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 124 + ~#base~0.offset, 4);~#outs~0.base, ~#outs~0.offset := 43, 0;call #Ultimate.allocInit(128, 43);call write~init~int(1, ~#outs~0.base, ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 4 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 8 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 12 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 16 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 20 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 24 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 28 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 32 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 36 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 40 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 44 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 48 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 52 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 56 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 60 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 64 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 68 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 72 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 76 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 80 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 84 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 88 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 92 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 96 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 100 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 104 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 108 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 112 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 116 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 120 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 124 + ~#outs~0.offset, 4);~#ins~0.base, ~#ins~0.offset := 44, 0;call #Ultimate.allocInit(128, 44);call write~init~int(1, ~#ins~0.base, ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 4 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 8 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 12 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 16 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 20 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 24 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 28 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 32 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 36 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 40 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 44 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 48 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 52 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 56 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 60 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 64 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 68 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 72 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 76 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 80 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 84 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 88 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 92 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 96 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 100 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 104 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 108 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 112 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 116 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 120 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 124 + ~#ins~0.offset, 4);~#adaptor~0.base, ~#adaptor~0.offset := 45, 0;call #Ultimate.allocInit(128, 45);call write~init~int(0, ~#adaptor~0.base, ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 4 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 8 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 12 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 16 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 20 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 24 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 28 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 32 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 36 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 40 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 44 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 48 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 52 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 56 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 60 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 64 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 68 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 72 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 76 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 80 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 84 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 88 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 92 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 96 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 100 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 104 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 108 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 112 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 116 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 120 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 124 + ~#adaptor~0.offset, 4);~#droponfull~0.base, ~#droponfull~0.offset := 46, 0;call #Ultimate.allocInit(32, 46);call write~init~int(0, ~#droponfull~0.base, ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 1 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 2 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 3 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 4 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 5 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 6 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 7 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 8 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 9 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 10 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 11 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 12 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 13 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 14 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 15 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 16 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 17 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 18 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 19 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 20 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 21 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 22 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 23 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 24 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 25 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 26 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 27 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 28 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 29 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 30 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 31 + ~#droponfull~0.offset, 1);~#devices~0.base, ~#devices~0.offset := 47, 0;call #Ultimate.allocInit(256, 47);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#devices~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#devices~0.base);~#snd_uart16550_output~0.base, ~#snd_uart16550_output~0.offset := 48, 0;call #Ultimate.allocInit(32, 48);call write~init~$Pointer$(#funAddr~snd_uart16550_output_open.base, #funAddr~snd_uart16550_output_open.offset, ~#snd_uart16550_output~0.base, ~#snd_uart16550_output~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_uart16550_output_close.base, #funAddr~snd_uart16550_output_close.offset, ~#snd_uart16550_output~0.base, 8 + ~#snd_uart16550_output~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_uart16550_output_trigger.base, #funAddr~snd_uart16550_output_trigger.offset, ~#snd_uart16550_output~0.base, 16 + ~#snd_uart16550_output~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_uart16550_output~0.base, 24 + ~#snd_uart16550_output~0.offset, 8);~#snd_uart16550_input~0.base, ~#snd_uart16550_input~0.offset := 49, 0;call #Ultimate.allocInit(32, 49);call write~init~$Pointer$(#funAddr~snd_uart16550_input_open.base, #funAddr~snd_uart16550_input_open.offset, ~#snd_uart16550_input~0.base, ~#snd_uart16550_input~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_uart16550_input_close.base, #funAddr~snd_uart16550_input_close.offset, ~#snd_uart16550_input~0.base, 8 + ~#snd_uart16550_input~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_uart16550_input_trigger.base, #funAddr~snd_uart16550_input_trigger.offset, ~#snd_uart16550_input~0.base, 16 + ~#snd_uart16550_input~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_uart16550_input~0.base, 24 + ~#snd_uart16550_input~0.offset, 8);~#snd_serial_driver~0.base, ~#snd_serial_driver~0.offset := 50, 0;call #Ultimate.allocInit(162, 50);call write~init~$Pointer$(#funAddr~snd_serial_probe.base, #funAddr~snd_serial_probe.offset, ~#snd_serial_driver~0.base, ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_serial_remove.base, #funAddr~snd_serial_remove.offset, ~#snd_serial_driver~0.base, 8 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 16 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 24 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 32 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(32, 0, ~#snd_serial_driver~0.base, 40 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 48 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#snd_serial_driver~0.base, 56 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 64 + ~#snd_serial_driver~0.offset, 8);call write~init~int(0, ~#snd_serial_driver~0.base, 72 + ~#snd_serial_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 73 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 81 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 89 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 97 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 105 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 113 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 121 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 129 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 137 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 145 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 153 + ~#snd_serial_driver~0.offset, 8);call write~init~int(0, ~#snd_serial_driver~0.base, 161 + ~#snd_serial_driver~0.offset, 1);~ldv_retval_2~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_5~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_spin~0 := 0; {664#true} is VALID [2022-02-20 22:03:33,770 INFO L290 TraceCheckUtils]: 1: Hoare triple {664#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet399#1, main_#t~nondet400#1, main_#t~nondet401#1, main_#t~switch402#1, main_#t~nondet403#1, main_#t~switch404#1, main_#t~ret405#1, main_#t~ret406#1, main_#t~nondet407#1, main_#t~switch408#1, main_#t~ret409#1, main_#t~nondet410#1, main_#t~switch411#1, main_#t~ret412#1, main_#t~ret413#1, main_#t~nondet414#1, main_#t~switch415#1, main_#t~ret416#1, main_#t~ret417#1, main_~ldvarg0~0#1, main_~tmp~21#1, main_~ldvarg1~0#1, main_~tmp___0~6#1, main_~tmp___1~2#1, main_~tmp___2~1#1, main_~tmp___3~0#1, main_~tmp___4~0#1, main_~tmp___5~0#1;havoc main_~ldvarg0~0#1;havoc main_~tmp~21#1;havoc main_~ldvarg1~0#1;havoc main_~tmp___0~6#1;havoc main_~tmp___1~2#1;havoc main_~tmp___2~1#1;havoc main_~tmp___3~0#1;havoc main_~tmp___4~0#1;havoc main_~tmp___5~0#1;assume -2147483648 <= main_#t~nondet399#1 && main_#t~nondet399#1 <= 2147483647;main_~tmp~21#1 := main_#t~nondet399#1;havoc main_#t~nondet399#1;main_~ldvarg0~0#1 := main_~tmp~21#1;assume -2147483648 <= main_#t~nondet400#1 && main_#t~nondet400#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet400#1;havoc main_#t~nondet400#1;main_~ldvarg1~0#1 := main_~tmp___0~6#1;assume { :begin_inline_ldv_initialize } true; {664#true} is VALID [2022-02-20 22:03:33,771 INFO L290 TraceCheckUtils]: 2: Hoare triple {664#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_4~0 := 0;~ldv_state_variable_1~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 1;~ldv_state_variable_5~0 := 0; {666#(= ~ldv_state_variable_3~0 0)} is VALID [2022-02-20 22:03:33,771 INFO L290 TraceCheckUtils]: 3: Hoare triple {666#(= ~ldv_state_variable_3~0 0)} assume -2147483648 <= main_#t~nondet401#1 && main_#t~nondet401#1 <= 2147483647;main_~tmp___1~2#1 := main_#t~nondet401#1;havoc main_#t~nondet401#1;main_#t~switch402#1 := 0 == main_~tmp___1~2#1; {666#(= ~ldv_state_variable_3~0 0)} is VALID [2022-02-20 22:03:33,772 INFO L290 TraceCheckUtils]: 4: Hoare triple {666#(= ~ldv_state_variable_3~0 0)} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 1 == main_~tmp___1~2#1; {666#(= ~ldv_state_variable_3~0 0)} is VALID [2022-02-20 22:03:33,772 INFO L290 TraceCheckUtils]: 5: Hoare triple {666#(= ~ldv_state_variable_3~0 0)} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 2 == main_~tmp___1~2#1; {666#(= ~ldv_state_variable_3~0 0)} is VALID [2022-02-20 22:03:33,773 INFO L290 TraceCheckUtils]: 6: Hoare triple {666#(= ~ldv_state_variable_3~0 0)} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 3 == main_~tmp___1~2#1; {666#(= ~ldv_state_variable_3~0 0)} is VALID [2022-02-20 22:03:33,773 INFO L290 TraceCheckUtils]: 7: Hoare triple {666#(= ~ldv_state_variable_3~0 0)} assume main_#t~switch402#1; {666#(= ~ldv_state_variable_3~0 0)} is VALID [2022-02-20 22:03:33,773 INFO L290 TraceCheckUtils]: 8: Hoare triple {666#(= ~ldv_state_variable_3~0 0)} assume 0 != ~ldv_state_variable_3~0;assume -2147483648 <= main_#t~nondet410#1 && main_#t~nondet410#1 <= 2147483647;main_~tmp___4~0#1 := main_#t~nondet410#1;havoc main_#t~nondet410#1;main_#t~switch411#1 := 0 == main_~tmp___4~0#1; {665#false} is VALID [2022-02-20 22:03:33,774 INFO L290 TraceCheckUtils]: 9: Hoare triple {665#false} assume main_#t~switch411#1; {665#false} is VALID [2022-02-20 22:03:33,774 INFO L290 TraceCheckUtils]: 10: Hoare triple {665#false} assume 1 == ~ldv_state_variable_3~0;assume { :begin_inline_snd_serial_probe } true;snd_serial_probe_#in~devptr#1.base, snd_serial_probe_#in~devptr#1.offset := ~snd_serial_driver_group0~0.base, ~snd_serial_driver_group0~0.offset;havoc snd_serial_probe_#res#1;havoc snd_serial_probe_#t~mem326#1, snd_serial_probe_#t~mem327#1, snd_serial_probe_#t~switch328#1, snd_serial_probe_#t~mem329#1, snd_serial_probe_#t~mem330#1, snd_serial_probe_#t~mem331#1, snd_serial_probe_#t~short332#1, snd_serial_probe_#t~mem333#1, snd_serial_probe_#t~mem334#1, snd_serial_probe_#t~mem335#1, snd_serial_probe_#t~short336#1, snd_serial_probe_#t~mem337#1, snd_serial_probe_#t~mem338#1, snd_serial_probe_#t~mem339#1.base, snd_serial_probe_#t~mem339#1.offset, snd_serial_probe_#t~ret340#1, snd_serial_probe_#t~mem341#1.base, snd_serial_probe_#t~mem341#1.offset, snd_serial_probe_#t~strcpy~res342#1.base, snd_serial_probe_#t~strcpy~res342#1.offset, snd_serial_probe_#t~mem343#1.base, snd_serial_probe_#t~mem343#1.offset, snd_serial_probe_#t~strcpy~res344#1.base, snd_serial_probe_#t~strcpy~res344#1.offset, snd_serial_probe_#t~mem345#1.base, snd_serial_probe_#t~mem345#1.offset, snd_serial_probe_#t~mem346#1, snd_serial_probe_#t~mem347#1, snd_serial_probe_#t~mem348#1, snd_serial_probe_#t~mem349#1, snd_serial_probe_#t~mem350#1, snd_serial_probe_#t~mem351#1, snd_serial_probe_#t~ret352#1, snd_serial_probe_#t~mem353#1.base, snd_serial_probe_#t~mem353#1.offset, snd_serial_probe_#t~mem354#1, snd_serial_probe_#t~mem355#1, snd_serial_probe_#t~mem356#1.base, snd_serial_probe_#t~mem356#1.offset, snd_serial_probe_#t~ret357#1, snd_serial_probe_#t~nondet358#1, snd_serial_probe_#t~mem359#1.base, snd_serial_probe_#t~mem359#1.offset, snd_serial_probe_#t~mem360#1.base, snd_serial_probe_#t~mem360#1.offset, snd_serial_probe_#t~mem361#1.base, snd_serial_probe_#t~mem361#1.offset, snd_serial_probe_#t~mem362#1, snd_serial_probe_#t~mem363#1.base, snd_serial_probe_#t~mem363#1.offset, snd_serial_probe_#t~mem364#1.base, snd_serial_probe_#t~mem364#1.offset, snd_serial_probe_#t~mem365#1, snd_serial_probe_#t~mem366#1.base, snd_serial_probe_#t~mem366#1.offset, snd_serial_probe_#t~mem367#1, snd_serial_probe_#t~mem368#1.base, snd_serial_probe_#t~mem368#1.offset, snd_serial_probe_#t~ret369#1, snd_serial_probe_#t~mem370#1.base, snd_serial_probe_#t~mem370#1.offset, snd_serial_probe_#t~mem371#1.base, snd_serial_probe_#t~mem371#1.offset, snd_serial_probe_#t~ret372#1, snd_serial_probe_~devptr#1.base, snd_serial_probe_~devptr#1.offset, snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset, snd_serial_probe_~#uart~11#1.base, snd_serial_probe_~#uart~11#1.offset, snd_serial_probe_~err~2#1, snd_serial_probe_~dev~0#1;snd_serial_probe_~devptr#1.base, snd_serial_probe_~devptr#1.offset := snd_serial_probe_#in~devptr#1.base, snd_serial_probe_#in~devptr#1.offset;call snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset := #Ultimate.allocOnStack(8);call snd_serial_probe_~#uart~11#1.base, snd_serial_probe_~#uart~11#1.offset := #Ultimate.allocOnStack(8);havoc snd_serial_probe_~err~2#1;havoc snd_serial_probe_~dev~0#1;call snd_serial_probe_#t~mem326#1 := read~int(snd_serial_probe_~devptr#1.base, 8 + snd_serial_probe_~devptr#1.offset, 4);snd_serial_probe_~dev~0#1 := snd_serial_probe_#t~mem326#1;havoc snd_serial_probe_#t~mem326#1;call snd_serial_probe_#t~mem327#1 := read~int(~#adaptor~0.base, ~#adaptor~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);snd_serial_probe_#t~switch328#1 := 0 == snd_serial_probe_#t~mem327#1; {665#false} is VALID [2022-02-20 22:03:33,774 INFO L290 TraceCheckUtils]: 11: Hoare triple {665#false} assume snd_serial_probe_#t~switch328#1;call write~int(1, ~#ins~0.base, ~#ins~0.offset + 4 * snd_serial_probe_~dev~0#1, 4); {665#false} is VALID [2022-02-20 22:03:33,774 INFO L290 TraceCheckUtils]: 12: Hoare triple {665#false} call snd_serial_probe_#t~mem330#1 := read~int(~#outs~0.base, ~#outs~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);snd_serial_probe_#t~short332#1 := snd_serial_probe_#t~mem330#1 <= 0; {665#false} is VALID [2022-02-20 22:03:33,775 INFO L290 TraceCheckUtils]: 13: Hoare triple {665#false} assume snd_serial_probe_#t~short332#1; {665#false} is VALID [2022-02-20 22:03:33,775 INFO L290 TraceCheckUtils]: 14: Hoare triple {665#false} assume !snd_serial_probe_#t~short332#1;havoc snd_serial_probe_#t~mem330#1;havoc snd_serial_probe_#t~mem331#1;havoc snd_serial_probe_#t~short332#1;call snd_serial_probe_#t~mem334#1 := read~int(~#ins~0.base, ~#ins~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);snd_serial_probe_#t~short336#1 := snd_serial_probe_#t~mem334#1 <= 0; {665#false} is VALID [2022-02-20 22:03:33,775 INFO L290 TraceCheckUtils]: 15: Hoare triple {665#false} assume snd_serial_probe_#t~short336#1; {665#false} is VALID [2022-02-20 22:03:33,775 INFO L290 TraceCheckUtils]: 16: Hoare triple {665#false} assume !snd_serial_probe_#t~short336#1;havoc snd_serial_probe_#t~mem334#1;havoc snd_serial_probe_#t~mem335#1;havoc snd_serial_probe_#t~short336#1;call snd_serial_probe_#t~mem338#1 := read~int(~#index~0.base, ~#index~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem339#1.base, snd_serial_probe_#t~mem339#1.offset := read~$Pointer$(~#id~0.base, ~#id~0.offset + 8 * snd_serial_probe_~dev~0#1, 8);assume { :begin_inline_snd_card_new } true;snd_card_new_#in~arg0#1.base, snd_card_new_#in~arg0#1.offset, snd_card_new_#in~arg1#1, snd_card_new_#in~arg2#1.base, snd_card_new_#in~arg2#1.offset, snd_card_new_#in~arg3#1.base, snd_card_new_#in~arg3#1.offset, snd_card_new_#in~arg4#1, snd_card_new_#in~arg5#1.base, snd_card_new_#in~arg5#1.offset := snd_serial_probe_~devptr#1.base, 13 + snd_serial_probe_~devptr#1.offset, snd_serial_probe_#t~mem338#1, snd_serial_probe_#t~mem339#1.base, snd_serial_probe_#t~mem339#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 0, snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset;havoc snd_card_new_#res#1;havoc snd_card_new_#t~nondet433#1, snd_card_new_~arg0#1.base, snd_card_new_~arg0#1.offset, snd_card_new_~arg1#1, snd_card_new_~arg2#1.base, snd_card_new_~arg2#1.offset, snd_card_new_~arg3#1.base, snd_card_new_~arg3#1.offset, snd_card_new_~arg4#1, snd_card_new_~arg5#1.base, snd_card_new_~arg5#1.offset;snd_card_new_~arg0#1.base, snd_card_new_~arg0#1.offset := snd_card_new_#in~arg0#1.base, snd_card_new_#in~arg0#1.offset;snd_card_new_~arg1#1 := snd_card_new_#in~arg1#1;snd_card_new_~arg2#1.base, snd_card_new_~arg2#1.offset := snd_card_new_#in~arg2#1.base, snd_card_new_#in~arg2#1.offset;snd_card_new_~arg3#1.base, snd_card_new_~arg3#1.offset := snd_card_new_#in~arg3#1.base, snd_card_new_#in~arg3#1.offset;snd_card_new_~arg4#1 := snd_card_new_#in~arg4#1;snd_card_new_~arg5#1.base, snd_card_new_~arg5#1.offset := snd_card_new_#in~arg5#1.base, snd_card_new_#in~arg5#1.offset;assume -2147483648 <= snd_card_new_#t~nondet433#1 && snd_card_new_#t~nondet433#1 <= 2147483647;snd_card_new_#res#1 := snd_card_new_#t~nondet433#1;havoc snd_card_new_#t~nondet433#1; {665#false} is VALID [2022-02-20 22:03:33,776 INFO L290 TraceCheckUtils]: 17: Hoare triple {665#false} snd_serial_probe_#t~ret340#1 := snd_card_new_#res#1;assume { :end_inline_snd_card_new } true;assume -2147483648 <= snd_serial_probe_#t~ret340#1 && snd_serial_probe_#t~ret340#1 <= 2147483647;snd_serial_probe_~err~2#1 := snd_serial_probe_#t~ret340#1;havoc snd_serial_probe_#t~mem338#1;havoc snd_serial_probe_#t~mem339#1.base, snd_serial_probe_#t~mem339#1.offset;havoc snd_serial_probe_#t~ret340#1; {665#false} is VALID [2022-02-20 22:03:33,776 INFO L290 TraceCheckUtils]: 18: Hoare triple {665#false} assume !(snd_serial_probe_~err~2#1 < 0);call snd_serial_probe_#t~mem341#1.base, snd_serial_probe_#t~mem341#1.offset := read~$Pointer$(snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset, 8); {665#false} is VALID [2022-02-20 22:03:33,776 INFO L272 TraceCheckUtils]: 19: Hoare triple {665#false} call snd_serial_probe_#t~strcpy~res342#1.base, snd_serial_probe_#t~strcpy~res342#1.offset := #Ultimate.C_strcpy(snd_serial_probe_#t~mem341#1.base, 20 + snd_serial_probe_#t~mem341#1.offset, 29, 0); {675#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:03:33,776 INFO L290 TraceCheckUtils]: 20: Hoare triple {675#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~offset444 := 0; {664#true} is VALID [2022-02-20 22:03:33,777 INFO L290 TraceCheckUtils]: 21: Hoare triple {664#true} assume !true; {665#false} is VALID [2022-02-20 22:03:33,777 INFO L290 TraceCheckUtils]: 22: Hoare triple {665#false} assume #res.base == dest.base && #res.offset == dest.offset; {665#false} is VALID [2022-02-20 22:03:33,777 INFO L284 TraceCheckUtils]: 23: Hoare quadruple {665#false} {665#false} #1809#return; {665#false} is VALID [2022-02-20 22:03:33,777 INFO L290 TraceCheckUtils]: 24: Hoare triple {665#false} havoc snd_serial_probe_#t~mem341#1.base, snd_serial_probe_#t~mem341#1.offset;havoc snd_serial_probe_#t~strcpy~res342#1.base, snd_serial_probe_#t~strcpy~res342#1.offset;call snd_serial_probe_#t~mem343#1.base, snd_serial_probe_#t~mem343#1.offset := read~$Pointer$(snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset, 8); {665#false} is VALID [2022-02-20 22:03:33,777 INFO L272 TraceCheckUtils]: 25: Hoare triple {665#false} call snd_serial_probe_#t~strcpy~res344#1.base, snd_serial_probe_#t~strcpy~res344#1.offset := #Ultimate.C_strcpy(snd_serial_probe_#t~mem343#1.base, 36 + snd_serial_probe_#t~mem343#1.offset, 30, 0); {675#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:03:33,778 INFO L290 TraceCheckUtils]: 26: Hoare triple {675#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~offset444 := 0; {664#true} is VALID [2022-02-20 22:03:33,778 INFO L290 TraceCheckUtils]: 27: Hoare triple {664#true} assume !true; {665#false} is VALID [2022-02-20 22:03:33,778 INFO L290 TraceCheckUtils]: 28: Hoare triple {665#false} assume #res.base == dest.base && #res.offset == dest.offset; {665#false} is VALID [2022-02-20 22:03:33,778 INFO L284 TraceCheckUtils]: 29: Hoare quadruple {665#false} {665#false} #1811#return; {665#false} is VALID [2022-02-20 22:03:33,779 INFO L290 TraceCheckUtils]: 30: Hoare triple {665#false} havoc snd_serial_probe_#t~mem343#1.base, snd_serial_probe_#t~mem343#1.offset;havoc snd_serial_probe_#t~strcpy~res344#1.base, snd_serial_probe_#t~strcpy~res344#1.offset;call snd_serial_probe_#t~mem345#1.base, snd_serial_probe_#t~mem345#1.offset := read~$Pointer$(snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset, 8);call snd_serial_probe_#t~mem346#1 := read~int(~#port~0.base, ~#port~0.offset + 8 * snd_serial_probe_~dev~0#1, 8);call snd_serial_probe_#t~mem347#1 := read~int(~#irq~0.base, ~#irq~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem348#1 := read~int(~#speed~0.base, ~#speed~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem349#1 := read~int(~#base~0.base, ~#base~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem350#1 := read~int(~#adaptor~0.base, ~#adaptor~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem351#1 := read~int(~#droponfull~0.base, ~#droponfull~0.offset + snd_serial_probe_~dev~0#1, 1);assume { :begin_inline_snd_uart16550_create } true;snd_uart16550_create_#in~card#1.base, snd_uart16550_create_#in~card#1.offset, snd_uart16550_create_#in~iobase#1, snd_uart16550_create_#in~irq___0#1, snd_uart16550_create_#in~speed___0#1, snd_uart16550_create_#in~base___0#1, snd_uart16550_create_#in~adaptor___0#1, snd_uart16550_create_#in~droponfull___0#1, snd_uart16550_create_#in~ruart#1.base, snd_uart16550_create_#in~ruart#1.offset := snd_serial_probe_#t~mem345#1.base, snd_serial_probe_#t~mem345#1.offset, snd_serial_probe_#t~mem346#1, snd_serial_probe_#t~mem347#1, snd_serial_probe_#t~mem348#1, snd_serial_probe_#t~mem349#1, snd_serial_probe_#t~mem350#1, snd_serial_probe_#t~mem351#1 % 256, snd_serial_probe_~#uart~11#1.base, snd_serial_probe_~#uart~11#1.offset;havoc snd_uart16550_create_#res#1;havoc snd_uart16550_create_#t~ret296#1.base, snd_uart16550_create_#t~ret296#1.offset, snd_uart16550_create_#t~ret297#1.base, snd_uart16550_create_#t~ret297#1.offset, snd_uart16550_create_#t~ret298#1, snd_uart16550_create_#t~nondet299#1, snd_uart16550_create_#t~ret300#1, snd_uart16550_create_#t~ret301#1, snd_uart16550_create_#t~mem302#1, snd_uart16550_create_#t~memset~res303#1.base, snd_uart16550_create_#t~memset~res303#1.offset, snd_uart16550_create_#t~ret304#1, snd_uart16550_create_#t~ret305#1, snd_uart16550_create_#t~ret306#1, snd_uart16550_create_#t~mem307#1, snd_uart16550_create_#t~switch308#1, snd_uart16550_create_#t~mem309#1, snd_uart16550_create_#t~mem310#1, snd_uart16550_create_~card#1.base, snd_uart16550_create_~card#1.offset, snd_uart16550_create_~iobase#1, snd_uart16550_create_~irq___0#1, snd_uart16550_create_~speed___0#1, snd_uart16550_create_~base___0#1, snd_uart16550_create_~adaptor___0#1, snd_uart16550_create_~droponfull___0#1, snd_uart16550_create_~ruart#1.base, snd_uart16550_create_~ruart#1.offset, snd_uart16550_create_~#ops~0#1.base, snd_uart16550_create_~#ops~0#1.offset, snd_uart16550_create_~uart~10#1.base, snd_uart16550_create_~uart~10#1.offset, snd_uart16550_create_~err~0#1, snd_uart16550_create_~tmp~13#1.base, snd_uart16550_create_~tmp~13#1.offset, snd_uart16550_create_~#__key~0#1.base, snd_uart16550_create_~#__key~0#1.offset, snd_uart16550_create_~tmp___0~4#1;snd_uart16550_create_~card#1.base, snd_uart16550_create_~card#1.offset := snd_uart16550_create_#in~card#1.base, snd_uart16550_create_#in~card#1.offset;snd_uart16550_create_~iobase#1 := snd_uart16550_create_#in~iobase#1;snd_uart16550_create_~irq___0#1 := snd_uart16550_create_#in~irq___0#1;snd_uart16550_create_~speed___0#1 := snd_uart16550_create_#in~speed___0#1;snd_uart16550_create_~base___0#1 := snd_uart16550_create_#in~base___0#1;snd_uart16550_create_~adaptor___0#1 := snd_uart16550_create_#in~adaptor___0#1;snd_uart16550_create_~droponfull___0#1 := snd_uart16550_create_#in~droponfull___0#1;snd_uart16550_create_~ruart#1.base, snd_uart16550_create_~ruart#1.offset := snd_uart16550_create_#in~ruart#1.base, snd_uart16550_create_#in~ruart#1.offset;call snd_uart16550_create_~#ops~0#1.base, snd_uart16550_create_~#ops~0#1.offset := #Ultimate.allocOnStack(24);havoc snd_uart16550_create_~uart~10#1.base, snd_uart16550_create_~uart~10#1.offset;havoc snd_uart16550_create_~err~0#1;havoc snd_uart16550_create_~tmp~13#1.base, snd_uart16550_create_~tmp~13#1.offset;call snd_uart16550_create_~#__key~0#1.base, snd_uart16550_create_~#__key~0#1.offset := #Ultimate.allocOnStack(8);havoc snd_uart16550_create_~tmp___0~4#1;call write~$Pointer$(#funAddr~snd_uart16550_dev_free.base, #funAddr~snd_uart16550_dev_free.offset, snd_uart16550_create_~#ops~0#1.base, snd_uart16550_create_~#ops~0#1.offset, 8);call write~$Pointer$(0, 0, snd_uart16550_create_~#ops~0#1.base, 8 + snd_uart16550_create_~#ops~0#1.offset, 8);call write~$Pointer$(0, 0, snd_uart16550_create_~#ops~0#1.base, 16 + snd_uart16550_create_~#ops~0#1.offset, 8);assume { :begin_inline_kzalloc } true;kzalloc_#in~size#1, kzalloc_#in~flags#1 := 33344, 208;havoc kzalloc_#res#1.base, kzalloc_#res#1.offset;havoc kzalloc_~size#1, kzalloc_~flags#1;kzalloc_~size#1 := kzalloc_#in~size#1;kzalloc_~flags#1 := kzalloc_#in~flags#1;assume { :begin_inline_ldv_check_alloc_flags } true;ldv_check_alloc_flags_#in~flags#1 := kzalloc_~flags#1;havoc ldv_check_alloc_flags_~flags#1;ldv_check_alloc_flags_~flags#1 := ldv_check_alloc_flags_#in~flags#1; {665#false} is VALID [2022-02-20 22:03:33,779 INFO L290 TraceCheckUtils]: 31: Hoare triple {665#false} assume !(0 == ~ldv_spin~0 || 0 == (if 0 == ldv_check_alloc_flags_~flags#1 then 0 else (if 1 == ldv_check_alloc_flags_~flags#1 then 0 else ~bitwiseAnd(ldv_check_alloc_flags_~flags#1, 16))) % 4294967296); {665#false} is VALID [2022-02-20 22:03:33,779 INFO L272 TraceCheckUtils]: 32: Hoare triple {665#false} call ldv_error(); {665#false} is VALID [2022-02-20 22:03:33,779 INFO L290 TraceCheckUtils]: 33: Hoare triple {665#false} assume !false; {665#false} is VALID [2022-02-20 22:03:33,780 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-02-20 22:03:33,780 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:03:33,781 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1186165114] [2022-02-20 22:03:33,781 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1186165114] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:03:33,781 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 22:03:33,781 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-02-20 22:03:33,783 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2104789501] [2022-02-20 22:03:33,783 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:03:33,791 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 34 [2022-02-20 22:03:33,792 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:03:33,794 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-02-20 22:03:33,845 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:03:33,845 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-02-20 22:03:33,845 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:03:33,864 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-02-20 22:03:33,864 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-02-20 22:03:33,871 INFO L87 Difference]: Start difference. First operand has 661 states, 494 states have (on average 1.4008097165991902) internal successors, (692), 513 states have internal predecessors, (692), 133 states have call successors, (133), 33 states have call predecessors, (133), 32 states have return successors, (126), 126 states have call predecessors, (126), 126 states have call successors, (126) Second operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-02-20 22:03:38,467 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:03:38,468 INFO L93 Difference]: Finished difference Result 1887 states and 2796 transitions. [2022-02-20 22:03:38,468 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-02-20 22:03:38,469 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 34 [2022-02-20 22:03:38,469 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 22:03:38,470 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-02-20 22:03:38,537 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 2796 transitions. [2022-02-20 22:03:38,537 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-02-20 22:03:38,593 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 2796 transitions. [2022-02-20 22:03:38,594 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 2796 transitions. [2022-02-20 22:03:40,723 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2796 edges. 2796 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:03:40,863 INFO L225 Difference]: With dead ends: 1887 [2022-02-20 22:03:40,863 INFO L226 Difference]: Without dead ends: 1192 [2022-02-20 22:03:40,869 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-02-20 22:03:40,872 INFO L933 BasicCegarLoop]: 1036 mSDtfsCounter, 896 mSDsluCounter, 1160 mSDsCounter, 0 mSdLazyCounter, 705 mSolverCounterSat, 333 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 986 SdHoareTripleChecker+Valid, 2196 SdHoareTripleChecker+Invalid, 1038 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 333 IncrementalHoareTripleChecker+Valid, 705 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2022-02-20 22:03:40,873 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [986 Valid, 2196 Invalid, 1038 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [333 Valid, 705 Invalid, 0 Unknown, 0 Unchecked, 1.2s Time] [2022-02-20 22:03:40,888 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1192 states. [2022-02-20 22:03:40,987 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1192 to 1080. [2022-02-20 22:03:40,988 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 22:03:40,995 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1192 states. Second operand has 1080 states, 810 states have (on average 1.3703703703703705) internal successors, (1110), 829 states have internal predecessors, (1110), 217 states have call successors, (217), 53 states have call predecessors, (217), 52 states have return successors, (216), 216 states have call predecessors, (216), 216 states have call successors, (216) [2022-02-20 22:03:41,006 INFO L74 IsIncluded]: Start isIncluded. First operand 1192 states. Second operand has 1080 states, 810 states have (on average 1.3703703703703705) internal successors, (1110), 829 states have internal predecessors, (1110), 217 states have call successors, (217), 53 states have call predecessors, (217), 52 states have return successors, (216), 216 states have call predecessors, (216), 216 states have call successors, (216) [2022-02-20 22:03:41,009 INFO L87 Difference]: Start difference. First operand 1192 states. Second operand has 1080 states, 810 states have (on average 1.3703703703703705) internal successors, (1110), 829 states have internal predecessors, (1110), 217 states have call successors, (217), 53 states have call predecessors, (217), 52 states have return successors, (216), 216 states have call predecessors, (216), 216 states have call successors, (216) [2022-02-20 22:03:41,081 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:03:41,081 INFO L93 Difference]: Finished difference Result 1192 states and 1720 transitions. [2022-02-20 22:03:41,082 INFO L276 IsEmpty]: Start isEmpty. Operand 1192 states and 1720 transitions. [2022-02-20 22:03:41,088 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:03:41,089 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:03:41,092 INFO L74 IsIncluded]: Start isIncluded. First operand has 1080 states, 810 states have (on average 1.3703703703703705) internal successors, (1110), 829 states have internal predecessors, (1110), 217 states have call successors, (217), 53 states have call predecessors, (217), 52 states have return successors, (216), 216 states have call predecessors, (216), 216 states have call successors, (216) Second operand 1192 states. [2022-02-20 22:03:41,095 INFO L87 Difference]: Start difference. First operand has 1080 states, 810 states have (on average 1.3703703703703705) internal successors, (1110), 829 states have internal predecessors, (1110), 217 states have call successors, (217), 53 states have call predecessors, (217), 52 states have return successors, (216), 216 states have call predecessors, (216), 216 states have call successors, (216) Second operand 1192 states. [2022-02-20 22:03:41,159 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:03:41,159 INFO L93 Difference]: Finished difference Result 1192 states and 1720 transitions. [2022-02-20 22:03:41,159 INFO L276 IsEmpty]: Start isEmpty. Operand 1192 states and 1720 transitions. [2022-02-20 22:03:41,163 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:03:41,164 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:03:41,164 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 22:03:41,164 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 22:03:41,167 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1080 states, 810 states have (on average 1.3703703703703705) internal successors, (1110), 829 states have internal predecessors, (1110), 217 states have call successors, (217), 53 states have call predecessors, (217), 52 states have return successors, (216), 216 states have call predecessors, (216), 216 states have call successors, (216) [2022-02-20 22:03:41,235 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1080 states to 1080 states and 1543 transitions. [2022-02-20 22:03:41,237 INFO L78 Accepts]: Start accepts. Automaton has 1080 states and 1543 transitions. Word has length 34 [2022-02-20 22:03:41,237 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 22:03:41,237 INFO L470 AbstractCegarLoop]: Abstraction has 1080 states and 1543 transitions. [2022-02-20 22:03:41,238 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-02-20 22:03:41,238 INFO L276 IsEmpty]: Start isEmpty. Operand 1080 states and 1543 transitions. [2022-02-20 22:03:41,242 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2022-02-20 22:03:41,242 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:03:41,242 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:03:41,243 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-02-20 22:03:41,243 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:03:41,243 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:03:41,244 INFO L85 PathProgramCache]: Analyzing trace with hash -339599336, now seen corresponding path program 1 times [2022-02-20 22:03:41,244 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:03:41,244 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [72454963] [2022-02-20 22:03:41,244 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:03:41,244 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:03:41,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:03:41,350 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 12 [2022-02-20 22:03:41,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:03:41,357 INFO L290 TraceCheckUtils]: 0: Hoare triple {7170#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {7153#true} is VALID [2022-02-20 22:03:41,357 INFO L290 TraceCheckUtils]: 1: Hoare triple {7153#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {7153#true} is VALID [2022-02-20 22:03:41,357 INFO L290 TraceCheckUtils]: 2: Hoare triple {7153#true} assume true; {7153#true} is VALID [2022-02-20 22:03:41,358 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7153#true} {7153#true} #1791#return; {7153#true} is VALID [2022-02-20 22:03:41,363 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 40 [2022-02-20 22:03:41,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:03:41,371 INFO L290 TraceCheckUtils]: 0: Hoare triple {7171#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~offset444 := 0; {7153#true} is VALID [2022-02-20 22:03:41,372 INFO L290 TraceCheckUtils]: 1: Hoare triple {7153#true} call #t~mem445 := read~int(src.base, src.offset + #t~offset444, 1);call write~unchecked~int(#t~mem445, dest.base, dest.offset + #t~offset444, 1); {7153#true} is VALID [2022-02-20 22:03:41,372 INFO L290 TraceCheckUtils]: 2: Hoare triple {7153#true} assume 0 == #t~mem445; {7153#true} is VALID [2022-02-20 22:03:41,372 INFO L290 TraceCheckUtils]: 3: Hoare triple {7153#true} assume #res.base == dest.base && #res.offset == dest.offset; {7153#true} is VALID [2022-02-20 22:03:41,372 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {7153#true} {7154#false} #1809#return; {7154#false} is VALID [2022-02-20 22:03:41,373 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 47 [2022-02-20 22:03:41,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:03:41,382 INFO L290 TraceCheckUtils]: 0: Hoare triple {7171#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~offset444 := 0; {7153#true} is VALID [2022-02-20 22:03:41,382 INFO L290 TraceCheckUtils]: 1: Hoare triple {7153#true} call #t~mem445 := read~int(src.base, src.offset + #t~offset444, 1);call write~unchecked~int(#t~mem445, dest.base, dest.offset + #t~offset444, 1); {7153#true} is VALID [2022-02-20 22:03:41,382 INFO L290 TraceCheckUtils]: 2: Hoare triple {7153#true} assume 0 == #t~mem445; {7153#true} is VALID [2022-02-20 22:03:41,383 INFO L290 TraceCheckUtils]: 3: Hoare triple {7153#true} assume #res.base == dest.base && #res.offset == dest.offset; {7153#true} is VALID [2022-02-20 22:03:41,383 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {7153#true} {7154#false} #1811#return; {7154#false} is VALID [2022-02-20 22:03:41,383 INFO L290 TraceCheckUtils]: 0: Hoare triple {7153#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(105, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(8, 4);call #Ultimate.allocInit(12, 5);call #Ultimate.allocInit(12, 6);call #Ultimate.allocInit(8, 7);call #Ultimate.allocInit(217, 8);call #Ultimate.allocInit(33, 9);call #Ultimate.allocInit(12, 10);call #Ultimate.allocInit(217, 11);call #Ultimate.allocInit(32, 12);call #Ultimate.allocInit(217, 13);call #Ultimate.allocInit(40, 14);call #Ultimate.allocInit(27, 15);call #Ultimate.allocInit(28, 16);call #Ultimate.allocInit(12, 17);call #Ultimate.allocInit(217, 18);call #Ultimate.allocInit(30, 19);call #Ultimate.allocInit(15, 20);call #Ultimate.allocInit(17, 21);call #Ultimate.allocInit(12, 22);call #Ultimate.allocInit(217, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(217, 25);call #Ultimate.allocInit(45, 26);call #Ultimate.allocInit(217, 27);call #Ultimate.allocInit(44, 28);call #Ultimate.allocInit(7, 29);call write~init~int(83, 29, 0, 1);call write~init~int(101, 29, 1, 1);call write~init~int(114, 29, 2, 1);call write~init~int(105, 29, 3, 1);call write~init~int(97, 29, 4, 1);call write~init~int(108, 29, 5, 1);call write~init~int(0, 29, 6, 1);call #Ultimate.allocInit(25, 30);call #Ultimate.allocInit(24, 31);call #Ultimate.allocInit(18, 32);call #Ultimate.allocInit(18, 33);call #Ultimate.allocInit(49, 34);~ldv_irq_1_3~0 := 0;~ldv_irq_data_1_1~0.base, ~ldv_irq_data_1_1~0.offset := 0, 0;~ldv_irq_1_0~0 := 0;~ldv_irq_data_1_0~0.base, ~ldv_irq_data_1_0~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_irq_data_1_3~0.base, ~ldv_irq_data_1_3~0.offset := 0, 0;~snd_uart16550_input_group0~0.base, ~snd_uart16550_input_group0~0.offset := 0, 0;~ldv_irq_data_1_2~0.base, ~ldv_irq_data_1_2~0.offset := 0, 0;~ldv_irq_1_2~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_irq_1_1~0 := 0;~ldv_timer_state_2~0 := 0;~ldv_irq_line_1_3~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_irq_line_1_0~0 := 0;~ldv_timer_list_2~0.base, ~ldv_timer_list_2~0.offset := 0, 0;~snd_serial_driver_group0~0.base, ~snd_serial_driver_group0~0.offset := 0, 0;~ref_cnt~0 := 0;~ldv_irq_line_1_1~0 := 0;~snd_uart16550_output_group0~0.base, ~snd_uart16550_output_group0~0.offset := 0, 0;~ldv_state_variable_1~0 := 0;~ldv_irq_line_1_2~0 := 0;~ldv_state_variable_4~0 := 0;~#adaptor_names~0.base, ~#adaptor_names~0.offset := 35, 0;call #Ultimate.allocInit(40, 35);call write~init~$Pointer$(3, 0, ~#adaptor_names~0.base, ~#adaptor_names~0.offset, 8);call write~init~$Pointer$(4, 0, ~#adaptor_names~0.base, 8 + ~#adaptor_names~0.offset, 8);call write~init~$Pointer$(5, 0, ~#adaptor_names~0.base, 16 + ~#adaptor_names~0.offset, 8);call write~init~$Pointer$(6, 0, ~#adaptor_names~0.base, 24 + ~#adaptor_names~0.offset, 8);call write~init~$Pointer$(7, 0, ~#adaptor_names~0.base, 32 + ~#adaptor_names~0.offset, 8);~#index~0.base, ~#index~0.offset := 36, 0;call #Ultimate.allocInit(128, 36);call write~init~int(-1, ~#index~0.base, ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 4 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 8 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 12 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 16 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 20 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 24 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 28 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 32 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 36 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 40 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 44 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 48 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 52 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 56 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 60 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 64 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 68 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 72 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 76 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 80 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 84 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 88 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 92 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 96 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 100 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 104 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 108 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 112 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 116 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 120 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 124 + ~#index~0.offset, 4);~#id~0.base, ~#id~0.offset := 37, 0;call #Ultimate.allocInit(256, 37);call write~init~$Pointer$(0, 0, ~#id~0.base, ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 8 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 16 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 24 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 32 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 40 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 48 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 56 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 64 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 72 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 80 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 88 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 96 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 104 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 112 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 120 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 128 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 136 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 144 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 152 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 160 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 168 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 176 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 184 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 192 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 200 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 208 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 216 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 224 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 232 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 240 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 248 + ~#id~0.offset, 8);~#enable~0.base, ~#enable~0.offset := 38, 0;call #Ultimate.allocInit(32, 38);call write~init~int(1, ~#enable~0.base, ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 1 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 2 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 3 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 4 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 5 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 6 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 7 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 8 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 9 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 10 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 11 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 12 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 13 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 14 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 15 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 16 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 17 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 18 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 19 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 20 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 21 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 22 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 23 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 24 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 25 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 26 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 27 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 28 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 29 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 30 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 31 + ~#enable~0.offset, 1);~#port~0.base, ~#port~0.offset := 39, 0;call #Ultimate.allocInit(256, 39);call write~init~int(1, ~#port~0.base, ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 8 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 16 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 24 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 32 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 40 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 48 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 56 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 64 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 72 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 80 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 88 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 96 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 104 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 112 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 120 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 128 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 136 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 144 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 152 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 160 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 168 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 176 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 184 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 192 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 200 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 208 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 216 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 224 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 232 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 240 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 248 + ~#port~0.offset, 8);~#irq~0.base, ~#irq~0.offset := 40, 0;call #Ultimate.allocInit(128, 40);call write~init~int(65535, ~#irq~0.base, ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 4 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 8 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 12 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 16 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 20 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 24 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 28 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 32 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 36 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 40 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 44 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 48 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 52 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 56 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 60 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 64 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 68 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 72 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 76 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 80 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 84 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 88 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 92 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 96 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 100 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 104 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 108 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 112 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 116 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 120 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 124 + ~#irq~0.offset, 4);~#speed~0.base, ~#speed~0.offset := 41, 0;call #Ultimate.allocInit(128, 41);call write~init~int(38400, ~#speed~0.base, ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 4 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 8 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 12 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 16 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 20 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 24 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 28 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 32 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 36 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 40 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 44 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 48 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 52 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 56 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 60 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 64 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 68 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 72 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 76 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 80 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 84 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 88 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 92 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 96 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 100 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 104 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 108 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 112 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 116 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 120 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 124 + ~#speed~0.offset, 4);~#base~0.base, ~#base~0.offset := 42, 0;call #Ultimate.allocInit(128, 42);call write~init~int(115200, ~#base~0.base, ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 4 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 8 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 12 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 16 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 20 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 24 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 28 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 32 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 36 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 40 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 44 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 48 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 52 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 56 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 60 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 64 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 68 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 72 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 76 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 80 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 84 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 88 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 92 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 96 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 100 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 104 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 108 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 112 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 116 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 120 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 124 + ~#base~0.offset, 4);~#outs~0.base, ~#outs~0.offset := 43, 0;call #Ultimate.allocInit(128, 43);call write~init~int(1, ~#outs~0.base, ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 4 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 8 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 12 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 16 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 20 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 24 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 28 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 32 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 36 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 40 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 44 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 48 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 52 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 56 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 60 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 64 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 68 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 72 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 76 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 80 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 84 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 88 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 92 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 96 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 100 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 104 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 108 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 112 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 116 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 120 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 124 + ~#outs~0.offset, 4);~#ins~0.base, ~#ins~0.offset := 44, 0;call #Ultimate.allocInit(128, 44);call write~init~int(1, ~#ins~0.base, ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 4 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 8 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 12 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 16 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 20 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 24 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 28 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 32 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 36 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 40 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 44 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 48 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 52 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 56 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 60 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 64 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 68 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 72 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 76 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 80 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 84 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 88 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 92 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 96 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 100 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 104 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 108 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 112 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 116 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 120 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 124 + ~#ins~0.offset, 4);~#adaptor~0.base, ~#adaptor~0.offset := 45, 0;call #Ultimate.allocInit(128, 45);call write~init~int(0, ~#adaptor~0.base, ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 4 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 8 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 12 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 16 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 20 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 24 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 28 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 32 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 36 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 40 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 44 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 48 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 52 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 56 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 60 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 64 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 68 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 72 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 76 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 80 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 84 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 88 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 92 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 96 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 100 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 104 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 108 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 112 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 116 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 120 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 124 + ~#adaptor~0.offset, 4);~#droponfull~0.base, ~#droponfull~0.offset := 46, 0;call #Ultimate.allocInit(32, 46);call write~init~int(0, ~#droponfull~0.base, ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 1 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 2 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 3 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 4 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 5 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 6 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 7 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 8 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 9 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 10 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 11 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 12 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 13 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 14 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 15 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 16 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 17 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 18 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 19 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 20 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 21 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 22 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 23 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 24 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 25 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 26 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 27 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 28 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 29 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 30 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 31 + ~#droponfull~0.offset, 1);~#devices~0.base, ~#devices~0.offset := 47, 0;call #Ultimate.allocInit(256, 47);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#devices~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#devices~0.base);~#snd_uart16550_output~0.base, ~#snd_uart16550_output~0.offset := 48, 0;call #Ultimate.allocInit(32, 48);call write~init~$Pointer$(#funAddr~snd_uart16550_output_open.base, #funAddr~snd_uart16550_output_open.offset, ~#snd_uart16550_output~0.base, ~#snd_uart16550_output~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_uart16550_output_close.base, #funAddr~snd_uart16550_output_close.offset, ~#snd_uart16550_output~0.base, 8 + ~#snd_uart16550_output~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_uart16550_output_trigger.base, #funAddr~snd_uart16550_output_trigger.offset, ~#snd_uart16550_output~0.base, 16 + ~#snd_uart16550_output~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_uart16550_output~0.base, 24 + ~#snd_uart16550_output~0.offset, 8);~#snd_uart16550_input~0.base, ~#snd_uart16550_input~0.offset := 49, 0;call #Ultimate.allocInit(32, 49);call write~init~$Pointer$(#funAddr~snd_uart16550_input_open.base, #funAddr~snd_uart16550_input_open.offset, ~#snd_uart16550_input~0.base, ~#snd_uart16550_input~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_uart16550_input_close.base, #funAddr~snd_uart16550_input_close.offset, ~#snd_uart16550_input~0.base, 8 + ~#snd_uart16550_input~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_uart16550_input_trigger.base, #funAddr~snd_uart16550_input_trigger.offset, ~#snd_uart16550_input~0.base, 16 + ~#snd_uart16550_input~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_uart16550_input~0.base, 24 + ~#snd_uart16550_input~0.offset, 8);~#snd_serial_driver~0.base, ~#snd_serial_driver~0.offset := 50, 0;call #Ultimate.allocInit(162, 50);call write~init~$Pointer$(#funAddr~snd_serial_probe.base, #funAddr~snd_serial_probe.offset, ~#snd_serial_driver~0.base, ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_serial_remove.base, #funAddr~snd_serial_remove.offset, ~#snd_serial_driver~0.base, 8 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 16 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 24 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 32 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(32, 0, ~#snd_serial_driver~0.base, 40 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 48 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#snd_serial_driver~0.base, 56 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 64 + ~#snd_serial_driver~0.offset, 8);call write~init~int(0, ~#snd_serial_driver~0.base, 72 + ~#snd_serial_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 73 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 81 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 89 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 97 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 105 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 113 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 121 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 129 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 137 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 145 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 153 + ~#snd_serial_driver~0.offset, 8);call write~init~int(0, ~#snd_serial_driver~0.base, 161 + ~#snd_serial_driver~0.offset, 1);~ldv_retval_2~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_5~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_spin~0 := 0; {7153#true} is VALID [2022-02-20 22:03:41,384 INFO L290 TraceCheckUtils]: 1: Hoare triple {7153#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet399#1, main_#t~nondet400#1, main_#t~nondet401#1, main_#t~switch402#1, main_#t~nondet403#1, main_#t~switch404#1, main_#t~ret405#1, main_#t~ret406#1, main_#t~nondet407#1, main_#t~switch408#1, main_#t~ret409#1, main_#t~nondet410#1, main_#t~switch411#1, main_#t~ret412#1, main_#t~ret413#1, main_#t~nondet414#1, main_#t~switch415#1, main_#t~ret416#1, main_#t~ret417#1, main_~ldvarg0~0#1, main_~tmp~21#1, main_~ldvarg1~0#1, main_~tmp___0~6#1, main_~tmp___1~2#1, main_~tmp___2~1#1, main_~tmp___3~0#1, main_~tmp___4~0#1, main_~tmp___5~0#1;havoc main_~ldvarg0~0#1;havoc main_~tmp~21#1;havoc main_~ldvarg1~0#1;havoc main_~tmp___0~6#1;havoc main_~tmp___1~2#1;havoc main_~tmp___2~1#1;havoc main_~tmp___3~0#1;havoc main_~tmp___4~0#1;havoc main_~tmp___5~0#1;assume -2147483648 <= main_#t~nondet399#1 && main_#t~nondet399#1 <= 2147483647;main_~tmp~21#1 := main_#t~nondet399#1;havoc main_#t~nondet399#1;main_~ldvarg0~0#1 := main_~tmp~21#1;assume -2147483648 <= main_#t~nondet400#1 && main_#t~nondet400#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet400#1;havoc main_#t~nondet400#1;main_~ldvarg1~0#1 := main_~tmp___0~6#1;assume { :begin_inline_ldv_initialize } true; {7153#true} is VALID [2022-02-20 22:03:41,384 INFO L290 TraceCheckUtils]: 2: Hoare triple {7153#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_4~0 := 0;~ldv_state_variable_1~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 1;~ldv_state_variable_5~0 := 0; {7153#true} is VALID [2022-02-20 22:03:41,385 INFO L290 TraceCheckUtils]: 3: Hoare triple {7153#true} assume -2147483648 <= main_#t~nondet401#1 && main_#t~nondet401#1 <= 2147483647;main_~tmp___1~2#1 := main_#t~nondet401#1;havoc main_#t~nondet401#1;main_#t~switch402#1 := 0 == main_~tmp___1~2#1; {7153#true} is VALID [2022-02-20 22:03:41,385 INFO L290 TraceCheckUtils]: 4: Hoare triple {7153#true} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 1 == main_~tmp___1~2#1; {7153#true} is VALID [2022-02-20 22:03:41,385 INFO L290 TraceCheckUtils]: 5: Hoare triple {7153#true} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 2 == main_~tmp___1~2#1; {7153#true} is VALID [2022-02-20 22:03:41,385 INFO L290 TraceCheckUtils]: 6: Hoare triple {7153#true} assume main_#t~switch402#1; {7153#true} is VALID [2022-02-20 22:03:41,385 INFO L290 TraceCheckUtils]: 7: Hoare triple {7153#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet407#1 && main_#t~nondet407#1 <= 2147483647;main_~tmp___3~0#1 := main_#t~nondet407#1;havoc main_#t~nondet407#1;main_#t~switch408#1 := 0 == main_~tmp___3~0#1; {7153#true} is VALID [2022-02-20 22:03:41,386 INFO L290 TraceCheckUtils]: 8: Hoare triple {7153#true} assume !main_#t~switch408#1;main_#t~switch408#1 := main_#t~switch408#1 || 1 == main_~tmp___3~0#1; {7153#true} is VALID [2022-02-20 22:03:41,386 INFO L290 TraceCheckUtils]: 9: Hoare triple {7153#true} assume main_#t~switch408#1; {7153#true} is VALID [2022-02-20 22:03:41,386 INFO L290 TraceCheckUtils]: 10: Hoare triple {7153#true} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_alsa_card_serial_init } true;havoc alsa_card_serial_init_#res#1;havoc alsa_card_serial_init_#t~ret376#1, alsa_card_serial_init_#t~mem377#1, alsa_card_serial_init_#t~ret378#1.base, alsa_card_serial_init_#t~ret378#1.offset, alsa_card_serial_init_#t~ret379#1, alsa_card_serial_init_#t~ret380#1.base, alsa_card_serial_init_#t~ret380#1.offset, alsa_card_serial_init_#t~nondet381#1, alsa_card_serial_init_~i~1#1, alsa_card_serial_init_~cards~0#1, alsa_card_serial_init_~err~3#1, alsa_card_serial_init_~device~0#1.base, alsa_card_serial_init_~device~0#1.offset, alsa_card_serial_init_~tmp~15#1, alsa_card_serial_init_~tmp___0~5#1.base, alsa_card_serial_init_~tmp___0~5#1.offset;havoc alsa_card_serial_init_~i~1#1;havoc alsa_card_serial_init_~cards~0#1;havoc alsa_card_serial_init_~err~3#1;havoc alsa_card_serial_init_~device~0#1.base, alsa_card_serial_init_~device~0#1.offset;havoc alsa_card_serial_init_~tmp~15#1;havoc alsa_card_serial_init_~tmp___0~5#1.base, alsa_card_serial_init_~tmp___0~5#1.offset;assume { :begin_inline_ldv___platform_driver_register_23 } true;ldv___platform_driver_register_23_#in~ldv_func_arg1#1.base, ldv___platform_driver_register_23_#in~ldv_func_arg1#1.offset, ldv___platform_driver_register_23_#in~ldv_func_arg2#1.base, ldv___platform_driver_register_23_#in~ldv_func_arg2#1.offset := ~#snd_serial_driver~0.base, ~#snd_serial_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset;havoc ldv___platform_driver_register_23_#res#1;havoc ldv___platform_driver_register_23_#t~ret421#1, ldv___platform_driver_register_23_~ldv_func_arg1#1.base, ldv___platform_driver_register_23_~ldv_func_arg1#1.offset, ldv___platform_driver_register_23_~ldv_func_arg2#1.base, ldv___platform_driver_register_23_~ldv_func_arg2#1.offset, ldv___platform_driver_register_23_~ldv_func_res~2#1, ldv___platform_driver_register_23_~tmp~24#1;ldv___platform_driver_register_23_~ldv_func_arg1#1.base, ldv___platform_driver_register_23_~ldv_func_arg1#1.offset := ldv___platform_driver_register_23_#in~ldv_func_arg1#1.base, ldv___platform_driver_register_23_#in~ldv_func_arg1#1.offset;ldv___platform_driver_register_23_~ldv_func_arg2#1.base, ldv___platform_driver_register_23_~ldv_func_arg2#1.offset := ldv___platform_driver_register_23_#in~ldv_func_arg2#1.base, ldv___platform_driver_register_23_#in~ldv_func_arg2#1.offset;havoc ldv___platform_driver_register_23_~ldv_func_res~2#1;havoc ldv___platform_driver_register_23_~tmp~24#1;assume { :begin_inline___platform_driver_register } true;__platform_driver_register_#in~arg0#1.base, __platform_driver_register_#in~arg0#1.offset, __platform_driver_register_#in~arg1#1.base, __platform_driver_register_#in~arg1#1.offset := ldv___platform_driver_register_23_~ldv_func_arg1#1.base, ldv___platform_driver_register_23_~ldv_func_arg1#1.offset, ldv___platform_driver_register_23_~ldv_func_arg2#1.base, ldv___platform_driver_register_23_~ldv_func_arg2#1.offset;havoc __platform_driver_register_#res#1;havoc __platform_driver_register_#t~nondet424#1, __platform_driver_register_~arg0#1.base, __platform_driver_register_~arg0#1.offset, __platform_driver_register_~arg1#1.base, __platform_driver_register_~arg1#1.offset;__platform_driver_register_~arg0#1.base, __platform_driver_register_~arg0#1.offset := __platform_driver_register_#in~arg0#1.base, __platform_driver_register_#in~arg0#1.offset;__platform_driver_register_~arg1#1.base, __platform_driver_register_~arg1#1.offset := __platform_driver_register_#in~arg1#1.base, __platform_driver_register_#in~arg1#1.offset;assume -2147483648 <= __platform_driver_register_#t~nondet424#1 && __platform_driver_register_#t~nondet424#1 <= 2147483647;__platform_driver_register_#res#1 := __platform_driver_register_#t~nondet424#1;havoc __platform_driver_register_#t~nondet424#1; {7153#true} is VALID [2022-02-20 22:03:41,387 INFO L290 TraceCheckUtils]: 11: Hoare triple {7153#true} ldv___platform_driver_register_23_#t~ret421#1 := __platform_driver_register_#res#1;assume { :end_inline___platform_driver_register } true;assume -2147483648 <= ldv___platform_driver_register_23_#t~ret421#1 && ldv___platform_driver_register_23_#t~ret421#1 <= 2147483647;ldv___platform_driver_register_23_~tmp~24#1 := ldv___platform_driver_register_23_#t~ret421#1;havoc ldv___platform_driver_register_23_#t~ret421#1;ldv___platform_driver_register_23_~ldv_func_res~2#1 := ldv___platform_driver_register_23_~tmp~24#1;~ldv_state_variable_3~0 := 1;assume { :begin_inline_ldv_initialize_platform_driver_3 } true;havoc ldv_initialize_platform_driver_3_#t~ret392#1.base, ldv_initialize_platform_driver_3_#t~ret392#1.offset, ldv_initialize_platform_driver_3_~tmp~19#1.base, ldv_initialize_platform_driver_3_~tmp~19#1.offset;havoc ldv_initialize_platform_driver_3_~tmp~19#1.base, ldv_initialize_platform_driver_3_~tmp~19#1.offset; {7153#true} is VALID [2022-02-20 22:03:41,388 INFO L272 TraceCheckUtils]: 12: Hoare triple {7153#true} call ldv_initialize_platform_driver_3_#t~ret392#1.base, ldv_initialize_platform_driver_3_#t~ret392#1.offset := ldv_zalloc(1464); {7170#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:03:41,388 INFO L290 TraceCheckUtils]: 13: Hoare triple {7170#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {7153#true} is VALID [2022-02-20 22:03:41,388 INFO L290 TraceCheckUtils]: 14: Hoare triple {7153#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {7153#true} is VALID [2022-02-20 22:03:41,388 INFO L290 TraceCheckUtils]: 15: Hoare triple {7153#true} assume true; {7153#true} is VALID [2022-02-20 22:03:41,388 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {7153#true} {7153#true} #1791#return; {7153#true} is VALID [2022-02-20 22:03:41,389 INFO L290 TraceCheckUtils]: 17: Hoare triple {7153#true} ldv_initialize_platform_driver_3_~tmp~19#1.base, ldv_initialize_platform_driver_3_~tmp~19#1.offset := ldv_initialize_platform_driver_3_#t~ret392#1.base, ldv_initialize_platform_driver_3_#t~ret392#1.offset;havoc ldv_initialize_platform_driver_3_#t~ret392#1.base, ldv_initialize_platform_driver_3_#t~ret392#1.offset;~snd_serial_driver_group0~0.base, ~snd_serial_driver_group0~0.offset := ldv_initialize_platform_driver_3_~tmp~19#1.base, ldv_initialize_platform_driver_3_~tmp~19#1.offset; {7153#true} is VALID [2022-02-20 22:03:41,389 INFO L290 TraceCheckUtils]: 18: Hoare triple {7153#true} assume { :end_inline_ldv_initialize_platform_driver_3 } true;ldv___platform_driver_register_23_#res#1 := ldv___platform_driver_register_23_~ldv_func_res~2#1; {7153#true} is VALID [2022-02-20 22:03:41,389 INFO L290 TraceCheckUtils]: 19: Hoare triple {7153#true} alsa_card_serial_init_#t~ret376#1 := ldv___platform_driver_register_23_#res#1;assume { :end_inline_ldv___platform_driver_register_23 } true;assume -2147483648 <= alsa_card_serial_init_#t~ret376#1 && alsa_card_serial_init_#t~ret376#1 <= 2147483647;alsa_card_serial_init_~err~3#1 := alsa_card_serial_init_#t~ret376#1;havoc alsa_card_serial_init_#t~ret376#1; {7153#true} is VALID [2022-02-20 22:03:41,389 INFO L290 TraceCheckUtils]: 20: Hoare triple {7153#true} assume alsa_card_serial_init_~err~3#1 < 0;alsa_card_serial_init_#res#1 := alsa_card_serial_init_~err~3#1; {7153#true} is VALID [2022-02-20 22:03:41,389 INFO L290 TraceCheckUtils]: 21: Hoare triple {7153#true} main_#t~ret409#1 := alsa_card_serial_init_#res#1;assume { :end_inline_alsa_card_serial_init } true;assume -2147483648 <= main_#t~ret409#1 && main_#t~ret409#1 <= 2147483647;~ldv_retval_2~0 := main_#t~ret409#1;havoc main_#t~ret409#1; {7153#true} is VALID [2022-02-20 22:03:41,390 INFO L290 TraceCheckUtils]: 22: Hoare triple {7153#true} assume !(0 != ~ldv_retval_2~0); {7159#(= ~ldv_retval_2~0 0)} is VALID [2022-02-20 22:03:41,390 INFO L290 TraceCheckUtils]: 23: Hoare triple {7159#(= ~ldv_retval_2~0 0)} assume !(0 == ~ldv_retval_2~0); {7154#false} is VALID [2022-02-20 22:03:41,390 INFO L290 TraceCheckUtils]: 24: Hoare triple {7154#false} assume -2147483648 <= main_#t~nondet401#1 && main_#t~nondet401#1 <= 2147483647;main_~tmp___1~2#1 := main_#t~nondet401#1;havoc main_#t~nondet401#1;main_#t~switch402#1 := 0 == main_~tmp___1~2#1; {7154#false} is VALID [2022-02-20 22:03:41,391 INFO L290 TraceCheckUtils]: 25: Hoare triple {7154#false} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 1 == main_~tmp___1~2#1; {7154#false} is VALID [2022-02-20 22:03:41,391 INFO L290 TraceCheckUtils]: 26: Hoare triple {7154#false} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 2 == main_~tmp___1~2#1; {7154#false} is VALID [2022-02-20 22:03:41,391 INFO L290 TraceCheckUtils]: 27: Hoare triple {7154#false} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 3 == main_~tmp___1~2#1; {7154#false} is VALID [2022-02-20 22:03:41,391 INFO L290 TraceCheckUtils]: 28: Hoare triple {7154#false} assume main_#t~switch402#1; {7154#false} is VALID [2022-02-20 22:03:41,391 INFO L290 TraceCheckUtils]: 29: Hoare triple {7154#false} assume 0 != ~ldv_state_variable_3~0;assume -2147483648 <= main_#t~nondet410#1 && main_#t~nondet410#1 <= 2147483647;main_~tmp___4~0#1 := main_#t~nondet410#1;havoc main_#t~nondet410#1;main_#t~switch411#1 := 0 == main_~tmp___4~0#1; {7154#false} is VALID [2022-02-20 22:03:41,392 INFO L290 TraceCheckUtils]: 30: Hoare triple {7154#false} assume main_#t~switch411#1; {7154#false} is VALID [2022-02-20 22:03:41,392 INFO L290 TraceCheckUtils]: 31: Hoare triple {7154#false} assume 1 == ~ldv_state_variable_3~0;assume { :begin_inline_snd_serial_probe } true;snd_serial_probe_#in~devptr#1.base, snd_serial_probe_#in~devptr#1.offset := ~snd_serial_driver_group0~0.base, ~snd_serial_driver_group0~0.offset;havoc snd_serial_probe_#res#1;havoc snd_serial_probe_#t~mem326#1, snd_serial_probe_#t~mem327#1, snd_serial_probe_#t~switch328#1, snd_serial_probe_#t~mem329#1, snd_serial_probe_#t~mem330#1, snd_serial_probe_#t~mem331#1, snd_serial_probe_#t~short332#1, snd_serial_probe_#t~mem333#1, snd_serial_probe_#t~mem334#1, snd_serial_probe_#t~mem335#1, snd_serial_probe_#t~short336#1, snd_serial_probe_#t~mem337#1, snd_serial_probe_#t~mem338#1, snd_serial_probe_#t~mem339#1.base, snd_serial_probe_#t~mem339#1.offset, snd_serial_probe_#t~ret340#1, snd_serial_probe_#t~mem341#1.base, snd_serial_probe_#t~mem341#1.offset, snd_serial_probe_#t~strcpy~res342#1.base, snd_serial_probe_#t~strcpy~res342#1.offset, snd_serial_probe_#t~mem343#1.base, snd_serial_probe_#t~mem343#1.offset, snd_serial_probe_#t~strcpy~res344#1.base, snd_serial_probe_#t~strcpy~res344#1.offset, snd_serial_probe_#t~mem345#1.base, snd_serial_probe_#t~mem345#1.offset, snd_serial_probe_#t~mem346#1, snd_serial_probe_#t~mem347#1, snd_serial_probe_#t~mem348#1, snd_serial_probe_#t~mem349#1, snd_serial_probe_#t~mem350#1, snd_serial_probe_#t~mem351#1, snd_serial_probe_#t~ret352#1, snd_serial_probe_#t~mem353#1.base, snd_serial_probe_#t~mem353#1.offset, snd_serial_probe_#t~mem354#1, snd_serial_probe_#t~mem355#1, snd_serial_probe_#t~mem356#1.base, snd_serial_probe_#t~mem356#1.offset, snd_serial_probe_#t~ret357#1, snd_serial_probe_#t~nondet358#1, snd_serial_probe_#t~mem359#1.base, snd_serial_probe_#t~mem359#1.offset, snd_serial_probe_#t~mem360#1.base, snd_serial_probe_#t~mem360#1.offset, snd_serial_probe_#t~mem361#1.base, snd_serial_probe_#t~mem361#1.offset, snd_serial_probe_#t~mem362#1, snd_serial_probe_#t~mem363#1.base, snd_serial_probe_#t~mem363#1.offset, snd_serial_probe_#t~mem364#1.base, snd_serial_probe_#t~mem364#1.offset, snd_serial_probe_#t~mem365#1, snd_serial_probe_#t~mem366#1.base, snd_serial_probe_#t~mem366#1.offset, snd_serial_probe_#t~mem367#1, snd_serial_probe_#t~mem368#1.base, snd_serial_probe_#t~mem368#1.offset, snd_serial_probe_#t~ret369#1, snd_serial_probe_#t~mem370#1.base, snd_serial_probe_#t~mem370#1.offset, snd_serial_probe_#t~mem371#1.base, snd_serial_probe_#t~mem371#1.offset, snd_serial_probe_#t~ret372#1, snd_serial_probe_~devptr#1.base, snd_serial_probe_~devptr#1.offset, snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset, snd_serial_probe_~#uart~11#1.base, snd_serial_probe_~#uart~11#1.offset, snd_serial_probe_~err~2#1, snd_serial_probe_~dev~0#1;snd_serial_probe_~devptr#1.base, snd_serial_probe_~devptr#1.offset := snd_serial_probe_#in~devptr#1.base, snd_serial_probe_#in~devptr#1.offset;call snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset := #Ultimate.allocOnStack(8);call snd_serial_probe_~#uart~11#1.base, snd_serial_probe_~#uart~11#1.offset := #Ultimate.allocOnStack(8);havoc snd_serial_probe_~err~2#1;havoc snd_serial_probe_~dev~0#1;call snd_serial_probe_#t~mem326#1 := read~int(snd_serial_probe_~devptr#1.base, 8 + snd_serial_probe_~devptr#1.offset, 4);snd_serial_probe_~dev~0#1 := snd_serial_probe_#t~mem326#1;havoc snd_serial_probe_#t~mem326#1;call snd_serial_probe_#t~mem327#1 := read~int(~#adaptor~0.base, ~#adaptor~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);snd_serial_probe_#t~switch328#1 := 0 == snd_serial_probe_#t~mem327#1; {7154#false} is VALID [2022-02-20 22:03:41,392 INFO L290 TraceCheckUtils]: 32: Hoare triple {7154#false} assume snd_serial_probe_#t~switch328#1;call write~int(1, ~#ins~0.base, ~#ins~0.offset + 4 * snd_serial_probe_~dev~0#1, 4); {7154#false} is VALID [2022-02-20 22:03:41,392 INFO L290 TraceCheckUtils]: 33: Hoare triple {7154#false} call snd_serial_probe_#t~mem330#1 := read~int(~#outs~0.base, ~#outs~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);snd_serial_probe_#t~short332#1 := snd_serial_probe_#t~mem330#1 <= 0; {7154#false} is VALID [2022-02-20 22:03:41,392 INFO L290 TraceCheckUtils]: 34: Hoare triple {7154#false} assume snd_serial_probe_#t~short332#1; {7154#false} is VALID [2022-02-20 22:03:41,392 INFO L290 TraceCheckUtils]: 35: Hoare triple {7154#false} assume !snd_serial_probe_#t~short332#1;havoc snd_serial_probe_#t~mem330#1;havoc snd_serial_probe_#t~mem331#1;havoc snd_serial_probe_#t~short332#1;call snd_serial_probe_#t~mem334#1 := read~int(~#ins~0.base, ~#ins~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);snd_serial_probe_#t~short336#1 := snd_serial_probe_#t~mem334#1 <= 0; {7154#false} is VALID [2022-02-20 22:03:41,393 INFO L290 TraceCheckUtils]: 36: Hoare triple {7154#false} assume snd_serial_probe_#t~short336#1; {7154#false} is VALID [2022-02-20 22:03:41,393 INFO L290 TraceCheckUtils]: 37: Hoare triple {7154#false} assume !snd_serial_probe_#t~short336#1;havoc snd_serial_probe_#t~mem334#1;havoc snd_serial_probe_#t~mem335#1;havoc snd_serial_probe_#t~short336#1;call snd_serial_probe_#t~mem338#1 := read~int(~#index~0.base, ~#index~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem339#1.base, snd_serial_probe_#t~mem339#1.offset := read~$Pointer$(~#id~0.base, ~#id~0.offset + 8 * snd_serial_probe_~dev~0#1, 8);assume { :begin_inline_snd_card_new } true;snd_card_new_#in~arg0#1.base, snd_card_new_#in~arg0#1.offset, snd_card_new_#in~arg1#1, snd_card_new_#in~arg2#1.base, snd_card_new_#in~arg2#1.offset, snd_card_new_#in~arg3#1.base, snd_card_new_#in~arg3#1.offset, snd_card_new_#in~arg4#1, snd_card_new_#in~arg5#1.base, snd_card_new_#in~arg5#1.offset := snd_serial_probe_~devptr#1.base, 13 + snd_serial_probe_~devptr#1.offset, snd_serial_probe_#t~mem338#1, snd_serial_probe_#t~mem339#1.base, snd_serial_probe_#t~mem339#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 0, snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset;havoc snd_card_new_#res#1;havoc snd_card_new_#t~nondet433#1, snd_card_new_~arg0#1.base, snd_card_new_~arg0#1.offset, snd_card_new_~arg1#1, snd_card_new_~arg2#1.base, snd_card_new_~arg2#1.offset, snd_card_new_~arg3#1.base, snd_card_new_~arg3#1.offset, snd_card_new_~arg4#1, snd_card_new_~arg5#1.base, snd_card_new_~arg5#1.offset;snd_card_new_~arg0#1.base, snd_card_new_~arg0#1.offset := snd_card_new_#in~arg0#1.base, snd_card_new_#in~arg0#1.offset;snd_card_new_~arg1#1 := snd_card_new_#in~arg1#1;snd_card_new_~arg2#1.base, snd_card_new_~arg2#1.offset := snd_card_new_#in~arg2#1.base, snd_card_new_#in~arg2#1.offset;snd_card_new_~arg3#1.base, snd_card_new_~arg3#1.offset := snd_card_new_#in~arg3#1.base, snd_card_new_#in~arg3#1.offset;snd_card_new_~arg4#1 := snd_card_new_#in~arg4#1;snd_card_new_~arg5#1.base, snd_card_new_~arg5#1.offset := snd_card_new_#in~arg5#1.base, snd_card_new_#in~arg5#1.offset;assume -2147483648 <= snd_card_new_#t~nondet433#1 && snd_card_new_#t~nondet433#1 <= 2147483647;snd_card_new_#res#1 := snd_card_new_#t~nondet433#1;havoc snd_card_new_#t~nondet433#1; {7154#false} is VALID [2022-02-20 22:03:41,393 INFO L290 TraceCheckUtils]: 38: Hoare triple {7154#false} snd_serial_probe_#t~ret340#1 := snd_card_new_#res#1;assume { :end_inline_snd_card_new } true;assume -2147483648 <= snd_serial_probe_#t~ret340#1 && snd_serial_probe_#t~ret340#1 <= 2147483647;snd_serial_probe_~err~2#1 := snd_serial_probe_#t~ret340#1;havoc snd_serial_probe_#t~mem338#1;havoc snd_serial_probe_#t~mem339#1.base, snd_serial_probe_#t~mem339#1.offset;havoc snd_serial_probe_#t~ret340#1; {7154#false} is VALID [2022-02-20 22:03:41,393 INFO L290 TraceCheckUtils]: 39: Hoare triple {7154#false} assume !(snd_serial_probe_~err~2#1 < 0);call snd_serial_probe_#t~mem341#1.base, snd_serial_probe_#t~mem341#1.offset := read~$Pointer$(snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset, 8); {7154#false} is VALID [2022-02-20 22:03:41,393 INFO L272 TraceCheckUtils]: 40: Hoare triple {7154#false} call snd_serial_probe_#t~strcpy~res342#1.base, snd_serial_probe_#t~strcpy~res342#1.offset := #Ultimate.C_strcpy(snd_serial_probe_#t~mem341#1.base, 20 + snd_serial_probe_#t~mem341#1.offset, 29, 0); {7171#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:03:41,394 INFO L290 TraceCheckUtils]: 41: Hoare triple {7171#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~offset444 := 0; {7153#true} is VALID [2022-02-20 22:03:41,394 INFO L290 TraceCheckUtils]: 42: Hoare triple {7153#true} call #t~mem445 := read~int(src.base, src.offset + #t~offset444, 1);call write~unchecked~int(#t~mem445, dest.base, dest.offset + #t~offset444, 1); {7153#true} is VALID [2022-02-20 22:03:41,394 INFO L290 TraceCheckUtils]: 43: Hoare triple {7153#true} assume 0 == #t~mem445; {7153#true} is VALID [2022-02-20 22:03:41,394 INFO L290 TraceCheckUtils]: 44: Hoare triple {7153#true} assume #res.base == dest.base && #res.offset == dest.offset; {7153#true} is VALID [2022-02-20 22:03:41,394 INFO L284 TraceCheckUtils]: 45: Hoare quadruple {7153#true} {7154#false} #1809#return; {7154#false} is VALID [2022-02-20 22:03:41,394 INFO L290 TraceCheckUtils]: 46: Hoare triple {7154#false} havoc snd_serial_probe_#t~mem341#1.base, snd_serial_probe_#t~mem341#1.offset;havoc snd_serial_probe_#t~strcpy~res342#1.base, snd_serial_probe_#t~strcpy~res342#1.offset;call snd_serial_probe_#t~mem343#1.base, snd_serial_probe_#t~mem343#1.offset := read~$Pointer$(snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset, 8); {7154#false} is VALID [2022-02-20 22:03:41,395 INFO L272 TraceCheckUtils]: 47: Hoare triple {7154#false} call snd_serial_probe_#t~strcpy~res344#1.base, snd_serial_probe_#t~strcpy~res344#1.offset := #Ultimate.C_strcpy(snd_serial_probe_#t~mem343#1.base, 36 + snd_serial_probe_#t~mem343#1.offset, 30, 0); {7171#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:03:41,395 INFO L290 TraceCheckUtils]: 48: Hoare triple {7171#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~offset444 := 0; {7153#true} is VALID [2022-02-20 22:03:41,395 INFO L290 TraceCheckUtils]: 49: Hoare triple {7153#true} call #t~mem445 := read~int(src.base, src.offset + #t~offset444, 1);call write~unchecked~int(#t~mem445, dest.base, dest.offset + #t~offset444, 1); {7153#true} is VALID [2022-02-20 22:03:41,395 INFO L290 TraceCheckUtils]: 50: Hoare triple {7153#true} assume 0 == #t~mem445; {7153#true} is VALID [2022-02-20 22:03:41,395 INFO L290 TraceCheckUtils]: 51: Hoare triple {7153#true} assume #res.base == dest.base && #res.offset == dest.offset; {7153#true} is VALID [2022-02-20 22:03:41,396 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {7153#true} {7154#false} #1811#return; {7154#false} is VALID [2022-02-20 22:03:41,396 INFO L290 TraceCheckUtils]: 53: Hoare triple {7154#false} havoc snd_serial_probe_#t~mem343#1.base, snd_serial_probe_#t~mem343#1.offset;havoc snd_serial_probe_#t~strcpy~res344#1.base, snd_serial_probe_#t~strcpy~res344#1.offset;call snd_serial_probe_#t~mem345#1.base, snd_serial_probe_#t~mem345#1.offset := read~$Pointer$(snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset, 8);call snd_serial_probe_#t~mem346#1 := read~int(~#port~0.base, ~#port~0.offset + 8 * snd_serial_probe_~dev~0#1, 8);call snd_serial_probe_#t~mem347#1 := read~int(~#irq~0.base, ~#irq~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem348#1 := read~int(~#speed~0.base, ~#speed~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem349#1 := read~int(~#base~0.base, ~#base~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem350#1 := read~int(~#adaptor~0.base, ~#adaptor~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem351#1 := read~int(~#droponfull~0.base, ~#droponfull~0.offset + snd_serial_probe_~dev~0#1, 1);assume { :begin_inline_snd_uart16550_create } true;snd_uart16550_create_#in~card#1.base, snd_uart16550_create_#in~card#1.offset, snd_uart16550_create_#in~iobase#1, snd_uart16550_create_#in~irq___0#1, snd_uart16550_create_#in~speed___0#1, snd_uart16550_create_#in~base___0#1, snd_uart16550_create_#in~adaptor___0#1, snd_uart16550_create_#in~droponfull___0#1, snd_uart16550_create_#in~ruart#1.base, snd_uart16550_create_#in~ruart#1.offset := snd_serial_probe_#t~mem345#1.base, snd_serial_probe_#t~mem345#1.offset, snd_serial_probe_#t~mem346#1, snd_serial_probe_#t~mem347#1, snd_serial_probe_#t~mem348#1, snd_serial_probe_#t~mem349#1, snd_serial_probe_#t~mem350#1, snd_serial_probe_#t~mem351#1 % 256, snd_serial_probe_~#uart~11#1.base, snd_serial_probe_~#uart~11#1.offset;havoc snd_uart16550_create_#res#1;havoc snd_uart16550_create_#t~ret296#1.base, snd_uart16550_create_#t~ret296#1.offset, snd_uart16550_create_#t~ret297#1.base, snd_uart16550_create_#t~ret297#1.offset, snd_uart16550_create_#t~ret298#1, snd_uart16550_create_#t~nondet299#1, snd_uart16550_create_#t~ret300#1, snd_uart16550_create_#t~ret301#1, snd_uart16550_create_#t~mem302#1, snd_uart16550_create_#t~memset~res303#1.base, snd_uart16550_create_#t~memset~res303#1.offset, snd_uart16550_create_#t~ret304#1, snd_uart16550_create_#t~ret305#1, snd_uart16550_create_#t~ret306#1, snd_uart16550_create_#t~mem307#1, snd_uart16550_create_#t~switch308#1, snd_uart16550_create_#t~mem309#1, snd_uart16550_create_#t~mem310#1, snd_uart16550_create_~card#1.base, snd_uart16550_create_~card#1.offset, snd_uart16550_create_~iobase#1, snd_uart16550_create_~irq___0#1, snd_uart16550_create_~speed___0#1, snd_uart16550_create_~base___0#1, snd_uart16550_create_~adaptor___0#1, snd_uart16550_create_~droponfull___0#1, snd_uart16550_create_~ruart#1.base, snd_uart16550_create_~ruart#1.offset, snd_uart16550_create_~#ops~0#1.base, snd_uart16550_create_~#ops~0#1.offset, snd_uart16550_create_~uart~10#1.base, snd_uart16550_create_~uart~10#1.offset, snd_uart16550_create_~err~0#1, snd_uart16550_create_~tmp~13#1.base, snd_uart16550_create_~tmp~13#1.offset, snd_uart16550_create_~#__key~0#1.base, snd_uart16550_create_~#__key~0#1.offset, snd_uart16550_create_~tmp___0~4#1;snd_uart16550_create_~card#1.base, snd_uart16550_create_~card#1.offset := snd_uart16550_create_#in~card#1.base, snd_uart16550_create_#in~card#1.offset;snd_uart16550_create_~iobase#1 := snd_uart16550_create_#in~iobase#1;snd_uart16550_create_~irq___0#1 := snd_uart16550_create_#in~irq___0#1;snd_uart16550_create_~speed___0#1 := snd_uart16550_create_#in~speed___0#1;snd_uart16550_create_~base___0#1 := snd_uart16550_create_#in~base___0#1;snd_uart16550_create_~adaptor___0#1 := snd_uart16550_create_#in~adaptor___0#1;snd_uart16550_create_~droponfull___0#1 := snd_uart16550_create_#in~droponfull___0#1;snd_uart16550_create_~ruart#1.base, snd_uart16550_create_~ruart#1.offset := snd_uart16550_create_#in~ruart#1.base, snd_uart16550_create_#in~ruart#1.offset;call snd_uart16550_create_~#ops~0#1.base, snd_uart16550_create_~#ops~0#1.offset := #Ultimate.allocOnStack(24);havoc snd_uart16550_create_~uart~10#1.base, snd_uart16550_create_~uart~10#1.offset;havoc snd_uart16550_create_~err~0#1;havoc snd_uart16550_create_~tmp~13#1.base, snd_uart16550_create_~tmp~13#1.offset;call snd_uart16550_create_~#__key~0#1.base, snd_uart16550_create_~#__key~0#1.offset := #Ultimate.allocOnStack(8);havoc snd_uart16550_create_~tmp___0~4#1;call write~$Pointer$(#funAddr~snd_uart16550_dev_free.base, #funAddr~snd_uart16550_dev_free.offset, snd_uart16550_create_~#ops~0#1.base, snd_uart16550_create_~#ops~0#1.offset, 8);call write~$Pointer$(0, 0, snd_uart16550_create_~#ops~0#1.base, 8 + snd_uart16550_create_~#ops~0#1.offset, 8);call write~$Pointer$(0, 0, snd_uart16550_create_~#ops~0#1.base, 16 + snd_uart16550_create_~#ops~0#1.offset, 8);assume { :begin_inline_kzalloc } true;kzalloc_#in~size#1, kzalloc_#in~flags#1 := 33344, 208;havoc kzalloc_#res#1.base, kzalloc_#res#1.offset;havoc kzalloc_~size#1, kzalloc_~flags#1;kzalloc_~size#1 := kzalloc_#in~size#1;kzalloc_~flags#1 := kzalloc_#in~flags#1;assume { :begin_inline_ldv_check_alloc_flags } true;ldv_check_alloc_flags_#in~flags#1 := kzalloc_~flags#1;havoc ldv_check_alloc_flags_~flags#1;ldv_check_alloc_flags_~flags#1 := ldv_check_alloc_flags_#in~flags#1; {7154#false} is VALID [2022-02-20 22:03:41,396 INFO L290 TraceCheckUtils]: 54: Hoare triple {7154#false} assume !(0 == ~ldv_spin~0 || 0 == (if 0 == ldv_check_alloc_flags_~flags#1 then 0 else (if 1 == ldv_check_alloc_flags_~flags#1 then 0 else ~bitwiseAnd(ldv_check_alloc_flags_~flags#1, 16))) % 4294967296); {7154#false} is VALID [2022-02-20 22:03:41,396 INFO L272 TraceCheckUtils]: 55: Hoare triple {7154#false} call ldv_error(); {7154#false} is VALID [2022-02-20 22:03:41,396 INFO L290 TraceCheckUtils]: 56: Hoare triple {7154#false} assume !false; {7154#false} is VALID [2022-02-20 22:03:41,397 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2022-02-20 22:03:41,397 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:03:41,397 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [72454963] [2022-02-20 22:03:41,397 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [72454963] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:03:41,398 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 22:03:41,398 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-02-20 22:03:41,398 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [514174091] [2022-02-20 22:03:41,398 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:03:41,399 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.2) internal successors, (46), 3 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 57 [2022-02-20 22:03:41,400 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:03:41,400 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 9.2) internal successors, (46), 3 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-02-20 22:03:41,457 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 53 edges. 53 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:03:41,458 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-02-20 22:03:41,458 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:03:41,458 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-02-20 22:03:41,459 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-02-20 22:03:41,459 INFO L87 Difference]: Start difference. First operand 1080 states and 1543 transitions. Second operand has 5 states, 5 states have (on average 9.2) internal successors, (46), 3 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-02-20 22:03:45,912 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:03:45,912 INFO L93 Difference]: Finished difference Result 2270 states and 3262 transitions. [2022-02-20 22:03:45,913 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-02-20 22:03:45,913 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.2) internal successors, (46), 3 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 57 [2022-02-20 22:03:45,913 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 22:03:45,913 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 9.2) internal successors, (46), 3 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-02-20 22:03:45,936 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 1921 transitions. [2022-02-20 22:03:45,936 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 9.2) internal successors, (46), 3 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-02-20 22:03:45,960 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 1921 transitions. [2022-02-20 22:03:45,960 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 1921 transitions. [2022-02-20 22:03:47,469 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 1921 edges. 1921 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:03:47,539 INFO L225 Difference]: With dead ends: 2270 [2022-02-20 22:03:47,540 INFO L226 Difference]: Without dead ends: 1193 [2022-02-20 22:03:47,543 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-02-20 22:03:47,548 INFO L933 BasicCegarLoop]: 845 mSDtfsCounter, 1164 mSDsluCounter, 744 mSDsCounter, 0 mSdLazyCounter, 652 mSolverCounterSat, 401 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1257 SdHoareTripleChecker+Valid, 1589 SdHoareTripleChecker+Invalid, 1053 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 401 IncrementalHoareTripleChecker+Valid, 652 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.4s IncrementalHoareTripleChecker+Time [2022-02-20 22:03:47,549 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1257 Valid, 1589 Invalid, 1053 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [401 Valid, 652 Invalid, 0 Unknown, 0 Unchecked, 1.4s Time] [2022-02-20 22:03:47,551 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1193 states. [2022-02-20 22:03:47,590 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1193 to 1080. [2022-02-20 22:03:47,591 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 22:03:47,593 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1193 states. Second operand has 1080 states, 810 states have (on average 1.3679012345679011) internal successors, (1108), 829 states have internal predecessors, (1108), 217 states have call successors, (217), 53 states have call predecessors, (217), 52 states have return successors, (216), 216 states have call predecessors, (216), 216 states have call successors, (216) [2022-02-20 22:03:47,595 INFO L74 IsIncluded]: Start isIncluded. First operand 1193 states. Second operand has 1080 states, 810 states have (on average 1.3679012345679011) internal successors, (1108), 829 states have internal predecessors, (1108), 217 states have call successors, (217), 53 states have call predecessors, (217), 52 states have return successors, (216), 216 states have call predecessors, (216), 216 states have call successors, (216) [2022-02-20 22:03:47,597 INFO L87 Difference]: Start difference. First operand 1193 states. Second operand has 1080 states, 810 states have (on average 1.3679012345679011) internal successors, (1108), 829 states have internal predecessors, (1108), 217 states have call successors, (217), 53 states have call predecessors, (217), 52 states have return successors, (216), 216 states have call predecessors, (216), 216 states have call successors, (216) [2022-02-20 22:03:47,649 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:03:47,649 INFO L93 Difference]: Finished difference Result 1193 states and 1720 transitions. [2022-02-20 22:03:47,650 INFO L276 IsEmpty]: Start isEmpty. Operand 1193 states and 1720 transitions. [2022-02-20 22:03:47,655 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:03:47,655 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:03:47,658 INFO L74 IsIncluded]: Start isIncluded. First operand has 1080 states, 810 states have (on average 1.3679012345679011) internal successors, (1108), 829 states have internal predecessors, (1108), 217 states have call successors, (217), 53 states have call predecessors, (217), 52 states have return successors, (216), 216 states have call predecessors, (216), 216 states have call successors, (216) Second operand 1193 states. [2022-02-20 22:03:47,660 INFO L87 Difference]: Start difference. First operand has 1080 states, 810 states have (on average 1.3679012345679011) internal successors, (1108), 829 states have internal predecessors, (1108), 217 states have call successors, (217), 53 states have call predecessors, (217), 52 states have return successors, (216), 216 states have call predecessors, (216), 216 states have call successors, (216) Second operand 1193 states. [2022-02-20 22:03:47,712 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:03:47,713 INFO L93 Difference]: Finished difference Result 1193 states and 1720 transitions. [2022-02-20 22:03:47,713 INFO L276 IsEmpty]: Start isEmpty. Operand 1193 states and 1720 transitions. [2022-02-20 22:03:47,716 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:03:47,716 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:03:47,717 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 22:03:47,717 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 22:03:47,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1080 states, 810 states have (on average 1.3679012345679011) internal successors, (1108), 829 states have internal predecessors, (1108), 217 states have call successors, (217), 53 states have call predecessors, (217), 52 states have return successors, (216), 216 states have call predecessors, (216), 216 states have call successors, (216) [2022-02-20 22:03:47,773 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1080 states to 1080 states and 1541 transitions. [2022-02-20 22:03:47,774 INFO L78 Accepts]: Start accepts. Automaton has 1080 states and 1541 transitions. Word has length 57 [2022-02-20 22:03:47,774 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 22:03:47,774 INFO L470 AbstractCegarLoop]: Abstraction has 1080 states and 1541 transitions. [2022-02-20 22:03:47,775 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 9.2) internal successors, (46), 3 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-02-20 22:03:47,775 INFO L276 IsEmpty]: Start isEmpty. Operand 1080 states and 1541 transitions. [2022-02-20 22:03:47,779 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2022-02-20 22:03:47,779 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:03:47,780 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:03:47,780 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-02-20 22:03:47,781 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:03:47,782 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:03:47,782 INFO L85 PathProgramCache]: Analyzing trace with hash -1596022914, now seen corresponding path program 1 times [2022-02-20 22:03:47,782 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:03:47,782 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1217360124] [2022-02-20 22:03:47,782 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:03:47,782 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:03:47,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:03:47,940 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 12 [2022-02-20 22:03:47,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:03:47,951 INFO L290 TraceCheckUtils]: 0: Hoare triple {14174#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {14148#true} is VALID [2022-02-20 22:03:47,952 INFO L290 TraceCheckUtils]: 1: Hoare triple {14148#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {14148#true} is VALID [2022-02-20 22:03:47,952 INFO L290 TraceCheckUtils]: 2: Hoare triple {14148#true} assume true; {14148#true} is VALID [2022-02-20 22:03:47,959 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14148#true} {14148#true} #1791#return; {14148#true} is VALID [2022-02-20 22:03:47,960 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 24 [2022-02-20 22:03:47,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:03:47,973 INFO L290 TraceCheckUtils]: 0: Hoare triple {14174#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {14148#true} is VALID [2022-02-20 22:03:47,975 INFO L290 TraceCheckUtils]: 1: Hoare triple {14148#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {14148#true} is VALID [2022-02-20 22:03:47,975 INFO L290 TraceCheckUtils]: 2: Hoare triple {14148#true} assume true; {14148#true} is VALID [2022-02-20 22:03:47,975 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14148#true} {14149#false} #1803#return; {14149#false} is VALID [2022-02-20 22:03:47,976 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 31 [2022-02-20 22:03:47,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:03:47,982 INFO L290 TraceCheckUtils]: 0: Hoare triple {14174#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {14148#true} is VALID [2022-02-20 22:03:47,982 INFO L290 TraceCheckUtils]: 1: Hoare triple {14148#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {14148#true} is VALID [2022-02-20 22:03:47,983 INFO L290 TraceCheckUtils]: 2: Hoare triple {14148#true} assume true; {14148#true} is VALID [2022-02-20 22:03:47,983 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14148#true} {14149#false} #1805#return; {14149#false} is VALID [2022-02-20 22:03:47,990 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 54 [2022-02-20 22:03:47,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:03:48,001 INFO L290 TraceCheckUtils]: 0: Hoare triple {14175#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~offset444 := 0; {14148#true} is VALID [2022-02-20 22:03:48,001 INFO L290 TraceCheckUtils]: 1: Hoare triple {14148#true} call #t~mem445 := read~int(src.base, src.offset + #t~offset444, 1);call write~unchecked~int(#t~mem445, dest.base, dest.offset + #t~offset444, 1); {14148#true} is VALID [2022-02-20 22:03:48,001 INFO L290 TraceCheckUtils]: 2: Hoare triple {14148#true} assume 0 == #t~mem445; {14148#true} is VALID [2022-02-20 22:03:48,002 INFO L290 TraceCheckUtils]: 3: Hoare triple {14148#true} assume #res.base == dest.base && #res.offset == dest.offset; {14148#true} is VALID [2022-02-20 22:03:48,002 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {14148#true} {14149#false} #1809#return; {14149#false} is VALID [2022-02-20 22:03:48,002 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 61 [2022-02-20 22:03:48,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:03:48,010 INFO L290 TraceCheckUtils]: 0: Hoare triple {14175#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~offset444 := 0; {14148#true} is VALID [2022-02-20 22:03:48,011 INFO L290 TraceCheckUtils]: 1: Hoare triple {14148#true} call #t~mem445 := read~int(src.base, src.offset + #t~offset444, 1);call write~unchecked~int(#t~mem445, dest.base, dest.offset + #t~offset444, 1); {14148#true} is VALID [2022-02-20 22:03:48,011 INFO L290 TraceCheckUtils]: 2: Hoare triple {14148#true} assume 0 == #t~mem445; {14148#true} is VALID [2022-02-20 22:03:48,011 INFO L290 TraceCheckUtils]: 3: Hoare triple {14148#true} assume #res.base == dest.base && #res.offset == dest.offset; {14148#true} is VALID [2022-02-20 22:03:48,011 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {14148#true} {14149#false} #1811#return; {14149#false} is VALID [2022-02-20 22:03:48,011 INFO L290 TraceCheckUtils]: 0: Hoare triple {14148#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(105, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(8, 4);call #Ultimate.allocInit(12, 5);call #Ultimate.allocInit(12, 6);call #Ultimate.allocInit(8, 7);call #Ultimate.allocInit(217, 8);call #Ultimate.allocInit(33, 9);call #Ultimate.allocInit(12, 10);call #Ultimate.allocInit(217, 11);call #Ultimate.allocInit(32, 12);call #Ultimate.allocInit(217, 13);call #Ultimate.allocInit(40, 14);call #Ultimate.allocInit(27, 15);call #Ultimate.allocInit(28, 16);call #Ultimate.allocInit(12, 17);call #Ultimate.allocInit(217, 18);call #Ultimate.allocInit(30, 19);call #Ultimate.allocInit(15, 20);call #Ultimate.allocInit(17, 21);call #Ultimate.allocInit(12, 22);call #Ultimate.allocInit(217, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(217, 25);call #Ultimate.allocInit(45, 26);call #Ultimate.allocInit(217, 27);call #Ultimate.allocInit(44, 28);call #Ultimate.allocInit(7, 29);call write~init~int(83, 29, 0, 1);call write~init~int(101, 29, 1, 1);call write~init~int(114, 29, 2, 1);call write~init~int(105, 29, 3, 1);call write~init~int(97, 29, 4, 1);call write~init~int(108, 29, 5, 1);call write~init~int(0, 29, 6, 1);call #Ultimate.allocInit(25, 30);call #Ultimate.allocInit(24, 31);call #Ultimate.allocInit(18, 32);call #Ultimate.allocInit(18, 33);call #Ultimate.allocInit(49, 34);~ldv_irq_1_3~0 := 0;~ldv_irq_data_1_1~0.base, ~ldv_irq_data_1_1~0.offset := 0, 0;~ldv_irq_1_0~0 := 0;~ldv_irq_data_1_0~0.base, ~ldv_irq_data_1_0~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_irq_data_1_3~0.base, ~ldv_irq_data_1_3~0.offset := 0, 0;~snd_uart16550_input_group0~0.base, ~snd_uart16550_input_group0~0.offset := 0, 0;~ldv_irq_data_1_2~0.base, ~ldv_irq_data_1_2~0.offset := 0, 0;~ldv_irq_1_2~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_irq_1_1~0 := 0;~ldv_timer_state_2~0 := 0;~ldv_irq_line_1_3~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_irq_line_1_0~0 := 0;~ldv_timer_list_2~0.base, ~ldv_timer_list_2~0.offset := 0, 0;~snd_serial_driver_group0~0.base, ~snd_serial_driver_group0~0.offset := 0, 0;~ref_cnt~0 := 0;~ldv_irq_line_1_1~0 := 0;~snd_uart16550_output_group0~0.base, ~snd_uart16550_output_group0~0.offset := 0, 0;~ldv_state_variable_1~0 := 0;~ldv_irq_line_1_2~0 := 0;~ldv_state_variable_4~0 := 0;~#adaptor_names~0.base, ~#adaptor_names~0.offset := 35, 0;call #Ultimate.allocInit(40, 35);call write~init~$Pointer$(3, 0, ~#adaptor_names~0.base, ~#adaptor_names~0.offset, 8);call write~init~$Pointer$(4, 0, ~#adaptor_names~0.base, 8 + ~#adaptor_names~0.offset, 8);call write~init~$Pointer$(5, 0, ~#adaptor_names~0.base, 16 + ~#adaptor_names~0.offset, 8);call write~init~$Pointer$(6, 0, ~#adaptor_names~0.base, 24 + ~#adaptor_names~0.offset, 8);call write~init~$Pointer$(7, 0, ~#adaptor_names~0.base, 32 + ~#adaptor_names~0.offset, 8);~#index~0.base, ~#index~0.offset := 36, 0;call #Ultimate.allocInit(128, 36);call write~init~int(-1, ~#index~0.base, ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 4 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 8 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 12 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 16 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 20 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 24 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 28 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 32 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 36 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 40 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 44 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 48 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 52 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 56 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 60 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 64 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 68 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 72 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 76 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 80 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 84 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 88 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 92 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 96 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 100 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 104 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 108 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 112 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 116 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 120 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 124 + ~#index~0.offset, 4);~#id~0.base, ~#id~0.offset := 37, 0;call #Ultimate.allocInit(256, 37);call write~init~$Pointer$(0, 0, ~#id~0.base, ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 8 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 16 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 24 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 32 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 40 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 48 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 56 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 64 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 72 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 80 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 88 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 96 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 104 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 112 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 120 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 128 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 136 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 144 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 152 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 160 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 168 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 176 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 184 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 192 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 200 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 208 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 216 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 224 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 232 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 240 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 248 + ~#id~0.offset, 8);~#enable~0.base, ~#enable~0.offset := 38, 0;call #Ultimate.allocInit(32, 38);call write~init~int(1, ~#enable~0.base, ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 1 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 2 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 3 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 4 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 5 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 6 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 7 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 8 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 9 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 10 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 11 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 12 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 13 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 14 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 15 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 16 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 17 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 18 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 19 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 20 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 21 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 22 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 23 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 24 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 25 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 26 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 27 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 28 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 29 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 30 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 31 + ~#enable~0.offset, 1);~#port~0.base, ~#port~0.offset := 39, 0;call #Ultimate.allocInit(256, 39);call write~init~int(1, ~#port~0.base, ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 8 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 16 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 24 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 32 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 40 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 48 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 56 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 64 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 72 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 80 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 88 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 96 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 104 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 112 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 120 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 128 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 136 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 144 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 152 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 160 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 168 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 176 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 184 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 192 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 200 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 208 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 216 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 224 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 232 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 240 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 248 + ~#port~0.offset, 8);~#irq~0.base, ~#irq~0.offset := 40, 0;call #Ultimate.allocInit(128, 40);call write~init~int(65535, ~#irq~0.base, ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 4 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 8 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 12 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 16 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 20 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 24 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 28 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 32 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 36 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 40 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 44 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 48 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 52 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 56 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 60 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 64 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 68 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 72 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 76 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 80 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 84 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 88 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 92 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 96 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 100 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 104 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 108 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 112 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 116 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 120 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 124 + ~#irq~0.offset, 4);~#speed~0.base, ~#speed~0.offset := 41, 0;call #Ultimate.allocInit(128, 41);call write~init~int(38400, ~#speed~0.base, ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 4 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 8 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 12 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 16 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 20 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 24 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 28 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 32 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 36 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 40 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 44 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 48 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 52 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 56 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 60 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 64 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 68 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 72 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 76 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 80 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 84 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 88 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 92 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 96 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 100 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 104 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 108 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 112 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 116 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 120 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 124 + ~#speed~0.offset, 4);~#base~0.base, ~#base~0.offset := 42, 0;call #Ultimate.allocInit(128, 42);call write~init~int(115200, ~#base~0.base, ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 4 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 8 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 12 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 16 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 20 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 24 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 28 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 32 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 36 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 40 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 44 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 48 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 52 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 56 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 60 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 64 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 68 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 72 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 76 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 80 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 84 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 88 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 92 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 96 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 100 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 104 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 108 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 112 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 116 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 120 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 124 + ~#base~0.offset, 4);~#outs~0.base, ~#outs~0.offset := 43, 0;call #Ultimate.allocInit(128, 43);call write~init~int(1, ~#outs~0.base, ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 4 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 8 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 12 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 16 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 20 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 24 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 28 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 32 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 36 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 40 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 44 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 48 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 52 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 56 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 60 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 64 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 68 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 72 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 76 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 80 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 84 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 88 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 92 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 96 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 100 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 104 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 108 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 112 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 116 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 120 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 124 + ~#outs~0.offset, 4);~#ins~0.base, ~#ins~0.offset := 44, 0;call #Ultimate.allocInit(128, 44);call write~init~int(1, ~#ins~0.base, ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 4 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 8 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 12 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 16 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 20 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 24 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 28 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 32 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 36 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 40 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 44 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 48 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 52 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 56 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 60 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 64 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 68 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 72 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 76 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 80 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 84 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 88 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 92 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 96 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 100 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 104 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 108 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 112 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 116 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 120 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 124 + ~#ins~0.offset, 4);~#adaptor~0.base, ~#adaptor~0.offset := 45, 0;call #Ultimate.allocInit(128, 45);call write~init~int(0, ~#adaptor~0.base, ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 4 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 8 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 12 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 16 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 20 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 24 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 28 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 32 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 36 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 40 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 44 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 48 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 52 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 56 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 60 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 64 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 68 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 72 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 76 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 80 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 84 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 88 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 92 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 96 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 100 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 104 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 108 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 112 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 116 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 120 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 124 + ~#adaptor~0.offset, 4);~#droponfull~0.base, ~#droponfull~0.offset := 46, 0;call #Ultimate.allocInit(32, 46);call write~init~int(0, ~#droponfull~0.base, ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 1 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 2 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 3 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 4 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 5 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 6 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 7 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 8 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 9 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 10 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 11 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 12 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 13 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 14 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 15 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 16 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 17 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 18 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 19 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 20 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 21 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 22 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 23 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 24 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 25 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 26 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 27 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 28 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 29 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 30 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 31 + ~#droponfull~0.offset, 1);~#devices~0.base, ~#devices~0.offset := 47, 0;call #Ultimate.allocInit(256, 47);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#devices~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#devices~0.base);~#snd_uart16550_output~0.base, ~#snd_uart16550_output~0.offset := 48, 0;call #Ultimate.allocInit(32, 48);call write~init~$Pointer$(#funAddr~snd_uart16550_output_open.base, #funAddr~snd_uart16550_output_open.offset, ~#snd_uart16550_output~0.base, ~#snd_uart16550_output~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_uart16550_output_close.base, #funAddr~snd_uart16550_output_close.offset, ~#snd_uart16550_output~0.base, 8 + ~#snd_uart16550_output~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_uart16550_output_trigger.base, #funAddr~snd_uart16550_output_trigger.offset, ~#snd_uart16550_output~0.base, 16 + ~#snd_uart16550_output~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_uart16550_output~0.base, 24 + ~#snd_uart16550_output~0.offset, 8);~#snd_uart16550_input~0.base, ~#snd_uart16550_input~0.offset := 49, 0;call #Ultimate.allocInit(32, 49);call write~init~$Pointer$(#funAddr~snd_uart16550_input_open.base, #funAddr~snd_uart16550_input_open.offset, ~#snd_uart16550_input~0.base, ~#snd_uart16550_input~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_uart16550_input_close.base, #funAddr~snd_uart16550_input_close.offset, ~#snd_uart16550_input~0.base, 8 + ~#snd_uart16550_input~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_uart16550_input_trigger.base, #funAddr~snd_uart16550_input_trigger.offset, ~#snd_uart16550_input~0.base, 16 + ~#snd_uart16550_input~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_uart16550_input~0.base, 24 + ~#snd_uart16550_input~0.offset, 8);~#snd_serial_driver~0.base, ~#snd_serial_driver~0.offset := 50, 0;call #Ultimate.allocInit(162, 50);call write~init~$Pointer$(#funAddr~snd_serial_probe.base, #funAddr~snd_serial_probe.offset, ~#snd_serial_driver~0.base, ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_serial_remove.base, #funAddr~snd_serial_remove.offset, ~#snd_serial_driver~0.base, 8 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 16 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 24 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 32 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(32, 0, ~#snd_serial_driver~0.base, 40 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 48 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#snd_serial_driver~0.base, 56 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 64 + ~#snd_serial_driver~0.offset, 8);call write~init~int(0, ~#snd_serial_driver~0.base, 72 + ~#snd_serial_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 73 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 81 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 89 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 97 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 105 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 113 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 121 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 129 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 137 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 145 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 153 + ~#snd_serial_driver~0.offset, 8);call write~init~int(0, ~#snd_serial_driver~0.base, 161 + ~#snd_serial_driver~0.offset, 1);~ldv_retval_2~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_5~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_spin~0 := 0; {14148#true} is VALID [2022-02-20 22:03:48,012 INFO L290 TraceCheckUtils]: 1: Hoare triple {14148#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet399#1, main_#t~nondet400#1, main_#t~nondet401#1, main_#t~switch402#1, main_#t~nondet403#1, main_#t~switch404#1, main_#t~ret405#1, main_#t~ret406#1, main_#t~nondet407#1, main_#t~switch408#1, main_#t~ret409#1, main_#t~nondet410#1, main_#t~switch411#1, main_#t~ret412#1, main_#t~ret413#1, main_#t~nondet414#1, main_#t~switch415#1, main_#t~ret416#1, main_#t~ret417#1, main_~ldvarg0~0#1, main_~tmp~21#1, main_~ldvarg1~0#1, main_~tmp___0~6#1, main_~tmp___1~2#1, main_~tmp___2~1#1, main_~tmp___3~0#1, main_~tmp___4~0#1, main_~tmp___5~0#1;havoc main_~ldvarg0~0#1;havoc main_~tmp~21#1;havoc main_~ldvarg1~0#1;havoc main_~tmp___0~6#1;havoc main_~tmp___1~2#1;havoc main_~tmp___2~1#1;havoc main_~tmp___3~0#1;havoc main_~tmp___4~0#1;havoc main_~tmp___5~0#1;assume -2147483648 <= main_#t~nondet399#1 && main_#t~nondet399#1 <= 2147483647;main_~tmp~21#1 := main_#t~nondet399#1;havoc main_#t~nondet399#1;main_~ldvarg0~0#1 := main_~tmp~21#1;assume -2147483648 <= main_#t~nondet400#1 && main_#t~nondet400#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet400#1;havoc main_#t~nondet400#1;main_~ldvarg1~0#1 := main_~tmp___0~6#1;assume { :begin_inline_ldv_initialize } true; {14148#true} is VALID [2022-02-20 22:03:48,012 INFO L290 TraceCheckUtils]: 2: Hoare triple {14148#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_4~0 := 0;~ldv_state_variable_1~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 1;~ldv_state_variable_5~0 := 0; {14148#true} is VALID [2022-02-20 22:03:48,012 INFO L290 TraceCheckUtils]: 3: Hoare triple {14148#true} assume -2147483648 <= main_#t~nondet401#1 && main_#t~nondet401#1 <= 2147483647;main_~tmp___1~2#1 := main_#t~nondet401#1;havoc main_#t~nondet401#1;main_#t~switch402#1 := 0 == main_~tmp___1~2#1; {14148#true} is VALID [2022-02-20 22:03:48,012 INFO L290 TraceCheckUtils]: 4: Hoare triple {14148#true} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 1 == main_~tmp___1~2#1; {14148#true} is VALID [2022-02-20 22:03:48,012 INFO L290 TraceCheckUtils]: 5: Hoare triple {14148#true} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 2 == main_~tmp___1~2#1; {14148#true} is VALID [2022-02-20 22:03:48,013 INFO L290 TraceCheckUtils]: 6: Hoare triple {14148#true} assume main_#t~switch402#1; {14148#true} is VALID [2022-02-20 22:03:48,013 INFO L290 TraceCheckUtils]: 7: Hoare triple {14148#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet407#1 && main_#t~nondet407#1 <= 2147483647;main_~tmp___3~0#1 := main_#t~nondet407#1;havoc main_#t~nondet407#1;main_#t~switch408#1 := 0 == main_~tmp___3~0#1; {14148#true} is VALID [2022-02-20 22:03:48,013 INFO L290 TraceCheckUtils]: 8: Hoare triple {14148#true} assume !main_#t~switch408#1;main_#t~switch408#1 := main_#t~switch408#1 || 1 == main_~tmp___3~0#1; {14148#true} is VALID [2022-02-20 22:03:48,013 INFO L290 TraceCheckUtils]: 9: Hoare triple {14148#true} assume main_#t~switch408#1; {14148#true} is VALID [2022-02-20 22:03:48,013 INFO L290 TraceCheckUtils]: 10: Hoare triple {14148#true} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_alsa_card_serial_init } true;havoc alsa_card_serial_init_#res#1;havoc alsa_card_serial_init_#t~ret376#1, alsa_card_serial_init_#t~mem377#1, alsa_card_serial_init_#t~ret378#1.base, alsa_card_serial_init_#t~ret378#1.offset, alsa_card_serial_init_#t~ret379#1, alsa_card_serial_init_#t~ret380#1.base, alsa_card_serial_init_#t~ret380#1.offset, alsa_card_serial_init_#t~nondet381#1, alsa_card_serial_init_~i~1#1, alsa_card_serial_init_~cards~0#1, alsa_card_serial_init_~err~3#1, alsa_card_serial_init_~device~0#1.base, alsa_card_serial_init_~device~0#1.offset, alsa_card_serial_init_~tmp~15#1, alsa_card_serial_init_~tmp___0~5#1.base, alsa_card_serial_init_~tmp___0~5#1.offset;havoc alsa_card_serial_init_~i~1#1;havoc alsa_card_serial_init_~cards~0#1;havoc alsa_card_serial_init_~err~3#1;havoc alsa_card_serial_init_~device~0#1.base, alsa_card_serial_init_~device~0#1.offset;havoc alsa_card_serial_init_~tmp~15#1;havoc alsa_card_serial_init_~tmp___0~5#1.base, alsa_card_serial_init_~tmp___0~5#1.offset;assume { :begin_inline_ldv___platform_driver_register_23 } true;ldv___platform_driver_register_23_#in~ldv_func_arg1#1.base, ldv___platform_driver_register_23_#in~ldv_func_arg1#1.offset, ldv___platform_driver_register_23_#in~ldv_func_arg2#1.base, ldv___platform_driver_register_23_#in~ldv_func_arg2#1.offset := ~#snd_serial_driver~0.base, ~#snd_serial_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset;havoc ldv___platform_driver_register_23_#res#1;havoc ldv___platform_driver_register_23_#t~ret421#1, ldv___platform_driver_register_23_~ldv_func_arg1#1.base, ldv___platform_driver_register_23_~ldv_func_arg1#1.offset, ldv___platform_driver_register_23_~ldv_func_arg2#1.base, ldv___platform_driver_register_23_~ldv_func_arg2#1.offset, ldv___platform_driver_register_23_~ldv_func_res~2#1, ldv___platform_driver_register_23_~tmp~24#1;ldv___platform_driver_register_23_~ldv_func_arg1#1.base, ldv___platform_driver_register_23_~ldv_func_arg1#1.offset := ldv___platform_driver_register_23_#in~ldv_func_arg1#1.base, ldv___platform_driver_register_23_#in~ldv_func_arg1#1.offset;ldv___platform_driver_register_23_~ldv_func_arg2#1.base, ldv___platform_driver_register_23_~ldv_func_arg2#1.offset := ldv___platform_driver_register_23_#in~ldv_func_arg2#1.base, ldv___platform_driver_register_23_#in~ldv_func_arg2#1.offset;havoc ldv___platform_driver_register_23_~ldv_func_res~2#1;havoc ldv___platform_driver_register_23_~tmp~24#1;assume { :begin_inline___platform_driver_register } true;__platform_driver_register_#in~arg0#1.base, __platform_driver_register_#in~arg0#1.offset, __platform_driver_register_#in~arg1#1.base, __platform_driver_register_#in~arg1#1.offset := ldv___platform_driver_register_23_~ldv_func_arg1#1.base, ldv___platform_driver_register_23_~ldv_func_arg1#1.offset, ldv___platform_driver_register_23_~ldv_func_arg2#1.base, ldv___platform_driver_register_23_~ldv_func_arg2#1.offset;havoc __platform_driver_register_#res#1;havoc __platform_driver_register_#t~nondet424#1, __platform_driver_register_~arg0#1.base, __platform_driver_register_~arg0#1.offset, __platform_driver_register_~arg1#1.base, __platform_driver_register_~arg1#1.offset;__platform_driver_register_~arg0#1.base, __platform_driver_register_~arg0#1.offset := __platform_driver_register_#in~arg0#1.base, __platform_driver_register_#in~arg0#1.offset;__platform_driver_register_~arg1#1.base, __platform_driver_register_~arg1#1.offset := __platform_driver_register_#in~arg1#1.base, __platform_driver_register_#in~arg1#1.offset;assume -2147483648 <= __platform_driver_register_#t~nondet424#1 && __platform_driver_register_#t~nondet424#1 <= 2147483647;__platform_driver_register_#res#1 := __platform_driver_register_#t~nondet424#1;havoc __platform_driver_register_#t~nondet424#1; {14148#true} is VALID [2022-02-20 22:03:48,013 INFO L290 TraceCheckUtils]: 11: Hoare triple {14148#true} ldv___platform_driver_register_23_#t~ret421#1 := __platform_driver_register_#res#1;assume { :end_inline___platform_driver_register } true;assume -2147483648 <= ldv___platform_driver_register_23_#t~ret421#1 && ldv___platform_driver_register_23_#t~ret421#1 <= 2147483647;ldv___platform_driver_register_23_~tmp~24#1 := ldv___platform_driver_register_23_#t~ret421#1;havoc ldv___platform_driver_register_23_#t~ret421#1;ldv___platform_driver_register_23_~ldv_func_res~2#1 := ldv___platform_driver_register_23_~tmp~24#1;~ldv_state_variable_3~0 := 1;assume { :begin_inline_ldv_initialize_platform_driver_3 } true;havoc ldv_initialize_platform_driver_3_#t~ret392#1.base, ldv_initialize_platform_driver_3_#t~ret392#1.offset, ldv_initialize_platform_driver_3_~tmp~19#1.base, ldv_initialize_platform_driver_3_~tmp~19#1.offset;havoc ldv_initialize_platform_driver_3_~tmp~19#1.base, ldv_initialize_platform_driver_3_~tmp~19#1.offset; {14148#true} is VALID [2022-02-20 22:03:48,014 INFO L272 TraceCheckUtils]: 12: Hoare triple {14148#true} call ldv_initialize_platform_driver_3_#t~ret392#1.base, ldv_initialize_platform_driver_3_#t~ret392#1.offset := ldv_zalloc(1464); {14174#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:03:48,014 INFO L290 TraceCheckUtils]: 13: Hoare triple {14174#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {14148#true} is VALID [2022-02-20 22:03:48,014 INFO L290 TraceCheckUtils]: 14: Hoare triple {14148#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {14148#true} is VALID [2022-02-20 22:03:48,014 INFO L290 TraceCheckUtils]: 15: Hoare triple {14148#true} assume true; {14148#true} is VALID [2022-02-20 22:03:48,015 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {14148#true} {14148#true} #1791#return; {14148#true} is VALID [2022-02-20 22:03:48,015 INFO L290 TraceCheckUtils]: 17: Hoare triple {14148#true} ldv_initialize_platform_driver_3_~tmp~19#1.base, ldv_initialize_platform_driver_3_~tmp~19#1.offset := ldv_initialize_platform_driver_3_#t~ret392#1.base, ldv_initialize_platform_driver_3_#t~ret392#1.offset;havoc ldv_initialize_platform_driver_3_#t~ret392#1.base, ldv_initialize_platform_driver_3_#t~ret392#1.offset;~snd_serial_driver_group0~0.base, ~snd_serial_driver_group0~0.offset := ldv_initialize_platform_driver_3_~tmp~19#1.base, ldv_initialize_platform_driver_3_~tmp~19#1.offset; {14148#true} is VALID [2022-02-20 22:03:48,015 INFO L290 TraceCheckUtils]: 18: Hoare triple {14148#true} assume { :end_inline_ldv_initialize_platform_driver_3 } true;ldv___platform_driver_register_23_#res#1 := ldv___platform_driver_register_23_~ldv_func_res~2#1; {14148#true} is VALID [2022-02-20 22:03:48,015 INFO L290 TraceCheckUtils]: 19: Hoare triple {14148#true} alsa_card_serial_init_#t~ret376#1 := ldv___platform_driver_register_23_#res#1;assume { :end_inline_ldv___platform_driver_register_23 } true;assume -2147483648 <= alsa_card_serial_init_#t~ret376#1 && alsa_card_serial_init_#t~ret376#1 <= 2147483647;alsa_card_serial_init_~err~3#1 := alsa_card_serial_init_#t~ret376#1;havoc alsa_card_serial_init_#t~ret376#1; {14148#true} is VALID [2022-02-20 22:03:48,016 INFO L290 TraceCheckUtils]: 20: Hoare triple {14148#true} assume alsa_card_serial_init_~err~3#1 < 0;alsa_card_serial_init_#res#1 := alsa_card_serial_init_~err~3#1; {14154#(not (= |ULTIMATE.start_alsa_card_serial_init_#res#1| 0))} is VALID [2022-02-20 22:03:48,016 INFO L290 TraceCheckUtils]: 21: Hoare triple {14154#(not (= |ULTIMATE.start_alsa_card_serial_init_#res#1| 0))} main_#t~ret409#1 := alsa_card_serial_init_#res#1;assume { :end_inline_alsa_card_serial_init } true;assume -2147483648 <= main_#t~ret409#1 && main_#t~ret409#1 <= 2147483647;~ldv_retval_2~0 := main_#t~ret409#1;havoc main_#t~ret409#1; {14155#(not (= ~ldv_retval_2~0 0))} is VALID [2022-02-20 22:03:48,016 INFO L290 TraceCheckUtils]: 22: Hoare triple {14155#(not (= ~ldv_retval_2~0 0))} assume !(0 != ~ldv_retval_2~0); {14149#false} is VALID [2022-02-20 22:03:48,017 INFO L290 TraceCheckUtils]: 23: Hoare triple {14149#false} assume 0 == ~ldv_retval_2~0;~ldv_state_variable_0~0 := 2;~ldv_state_variable_5~0 := 1;assume { :begin_inline_ldv_initialize_snd_rawmidi_ops_5 } true;havoc ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.base, ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.offset, ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.base, ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.offset;havoc ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.base, ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.offset; {14149#false} is VALID [2022-02-20 22:03:48,017 INFO L272 TraceCheckUtils]: 24: Hoare triple {14149#false} call ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.base, ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.offset := ldv_zalloc(112); {14174#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:03:48,017 INFO L290 TraceCheckUtils]: 25: Hoare triple {14174#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {14148#true} is VALID [2022-02-20 22:03:48,017 INFO L290 TraceCheckUtils]: 26: Hoare triple {14148#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {14148#true} is VALID [2022-02-20 22:03:48,017 INFO L290 TraceCheckUtils]: 27: Hoare triple {14148#true} assume true; {14148#true} is VALID [2022-02-20 22:03:48,017 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {14148#true} {14149#false} #1803#return; {14149#false} is VALID [2022-02-20 22:03:48,017 INFO L290 TraceCheckUtils]: 29: Hoare triple {14149#false} ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.base, ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.offset := ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.base, ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.offset;havoc ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.base, ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.offset;~snd_uart16550_output_group0~0.base, ~snd_uart16550_output_group0~0.offset := ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.base, ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.offset; {14149#false} is VALID [2022-02-20 22:03:48,018 INFO L290 TraceCheckUtils]: 30: Hoare triple {14149#false} assume { :end_inline_ldv_initialize_snd_rawmidi_ops_5 } true;~ldv_state_variable_4~0 := 1;assume { :begin_inline_ldv_initialize_snd_rawmidi_ops_4 } true;havoc ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.base, ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.offset, ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.base, ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.offset;havoc ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.base, ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.offset; {14149#false} is VALID [2022-02-20 22:03:48,018 INFO L272 TraceCheckUtils]: 31: Hoare triple {14149#false} call ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.base, ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.offset := ldv_zalloc(112); {14174#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:03:48,018 INFO L290 TraceCheckUtils]: 32: Hoare triple {14174#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {14148#true} is VALID [2022-02-20 22:03:48,018 INFO L290 TraceCheckUtils]: 33: Hoare triple {14148#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {14148#true} is VALID [2022-02-20 22:03:48,018 INFO L290 TraceCheckUtils]: 34: Hoare triple {14148#true} assume true; {14148#true} is VALID [2022-02-20 22:03:48,018 INFO L284 TraceCheckUtils]: 35: Hoare quadruple {14148#true} {14149#false} #1805#return; {14149#false} is VALID [2022-02-20 22:03:48,019 INFO L290 TraceCheckUtils]: 36: Hoare triple {14149#false} ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.base, ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.offset := ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.base, ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.offset;havoc ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.base, ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.offset;~snd_uart16550_input_group0~0.base, ~snd_uart16550_input_group0~0.offset := ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.base, ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.offset; {14149#false} is VALID [2022-02-20 22:03:48,019 INFO L290 TraceCheckUtils]: 37: Hoare triple {14149#false} assume { :end_inline_ldv_initialize_snd_rawmidi_ops_4 } true; {14149#false} is VALID [2022-02-20 22:03:48,020 INFO L290 TraceCheckUtils]: 38: Hoare triple {14149#false} assume -2147483648 <= main_#t~nondet401#1 && main_#t~nondet401#1 <= 2147483647;main_~tmp___1~2#1 := main_#t~nondet401#1;havoc main_#t~nondet401#1;main_#t~switch402#1 := 0 == main_~tmp___1~2#1; {14149#false} is VALID [2022-02-20 22:03:48,020 INFO L290 TraceCheckUtils]: 39: Hoare triple {14149#false} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 1 == main_~tmp___1~2#1; {14149#false} is VALID [2022-02-20 22:03:48,020 INFO L290 TraceCheckUtils]: 40: Hoare triple {14149#false} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 2 == main_~tmp___1~2#1; {14149#false} is VALID [2022-02-20 22:03:48,021 INFO L290 TraceCheckUtils]: 41: Hoare triple {14149#false} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 3 == main_~tmp___1~2#1; {14149#false} is VALID [2022-02-20 22:03:48,021 INFO L290 TraceCheckUtils]: 42: Hoare triple {14149#false} assume main_#t~switch402#1; {14149#false} is VALID [2022-02-20 22:03:48,021 INFO L290 TraceCheckUtils]: 43: Hoare triple {14149#false} assume 0 != ~ldv_state_variable_3~0;assume -2147483648 <= main_#t~nondet410#1 && main_#t~nondet410#1 <= 2147483647;main_~tmp___4~0#1 := main_#t~nondet410#1;havoc main_#t~nondet410#1;main_#t~switch411#1 := 0 == main_~tmp___4~0#1; {14149#false} is VALID [2022-02-20 22:03:48,021 INFO L290 TraceCheckUtils]: 44: Hoare triple {14149#false} assume main_#t~switch411#1; {14149#false} is VALID [2022-02-20 22:03:48,021 INFO L290 TraceCheckUtils]: 45: Hoare triple {14149#false} assume 1 == ~ldv_state_variable_3~0;assume { :begin_inline_snd_serial_probe } true;snd_serial_probe_#in~devptr#1.base, snd_serial_probe_#in~devptr#1.offset := ~snd_serial_driver_group0~0.base, ~snd_serial_driver_group0~0.offset;havoc snd_serial_probe_#res#1;havoc snd_serial_probe_#t~mem326#1, snd_serial_probe_#t~mem327#1, snd_serial_probe_#t~switch328#1, snd_serial_probe_#t~mem329#1, snd_serial_probe_#t~mem330#1, snd_serial_probe_#t~mem331#1, snd_serial_probe_#t~short332#1, snd_serial_probe_#t~mem333#1, snd_serial_probe_#t~mem334#1, snd_serial_probe_#t~mem335#1, snd_serial_probe_#t~short336#1, snd_serial_probe_#t~mem337#1, snd_serial_probe_#t~mem338#1, snd_serial_probe_#t~mem339#1.base, snd_serial_probe_#t~mem339#1.offset, snd_serial_probe_#t~ret340#1, snd_serial_probe_#t~mem341#1.base, snd_serial_probe_#t~mem341#1.offset, snd_serial_probe_#t~strcpy~res342#1.base, snd_serial_probe_#t~strcpy~res342#1.offset, snd_serial_probe_#t~mem343#1.base, snd_serial_probe_#t~mem343#1.offset, snd_serial_probe_#t~strcpy~res344#1.base, snd_serial_probe_#t~strcpy~res344#1.offset, snd_serial_probe_#t~mem345#1.base, snd_serial_probe_#t~mem345#1.offset, snd_serial_probe_#t~mem346#1, snd_serial_probe_#t~mem347#1, snd_serial_probe_#t~mem348#1, snd_serial_probe_#t~mem349#1, snd_serial_probe_#t~mem350#1, snd_serial_probe_#t~mem351#1, snd_serial_probe_#t~ret352#1, snd_serial_probe_#t~mem353#1.base, snd_serial_probe_#t~mem353#1.offset, snd_serial_probe_#t~mem354#1, snd_serial_probe_#t~mem355#1, snd_serial_probe_#t~mem356#1.base, snd_serial_probe_#t~mem356#1.offset, snd_serial_probe_#t~ret357#1, snd_serial_probe_#t~nondet358#1, snd_serial_probe_#t~mem359#1.base, snd_serial_probe_#t~mem359#1.offset, snd_serial_probe_#t~mem360#1.base, snd_serial_probe_#t~mem360#1.offset, snd_serial_probe_#t~mem361#1.base, snd_serial_probe_#t~mem361#1.offset, snd_serial_probe_#t~mem362#1, snd_serial_probe_#t~mem363#1.base, snd_serial_probe_#t~mem363#1.offset, snd_serial_probe_#t~mem364#1.base, snd_serial_probe_#t~mem364#1.offset, snd_serial_probe_#t~mem365#1, snd_serial_probe_#t~mem366#1.base, snd_serial_probe_#t~mem366#1.offset, snd_serial_probe_#t~mem367#1, snd_serial_probe_#t~mem368#1.base, snd_serial_probe_#t~mem368#1.offset, snd_serial_probe_#t~ret369#1, snd_serial_probe_#t~mem370#1.base, snd_serial_probe_#t~mem370#1.offset, snd_serial_probe_#t~mem371#1.base, snd_serial_probe_#t~mem371#1.offset, snd_serial_probe_#t~ret372#1, snd_serial_probe_~devptr#1.base, snd_serial_probe_~devptr#1.offset, snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset, snd_serial_probe_~#uart~11#1.base, snd_serial_probe_~#uart~11#1.offset, snd_serial_probe_~err~2#1, snd_serial_probe_~dev~0#1;snd_serial_probe_~devptr#1.base, snd_serial_probe_~devptr#1.offset := snd_serial_probe_#in~devptr#1.base, snd_serial_probe_#in~devptr#1.offset;call snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset := #Ultimate.allocOnStack(8);call snd_serial_probe_~#uart~11#1.base, snd_serial_probe_~#uart~11#1.offset := #Ultimate.allocOnStack(8);havoc snd_serial_probe_~err~2#1;havoc snd_serial_probe_~dev~0#1;call snd_serial_probe_#t~mem326#1 := read~int(snd_serial_probe_~devptr#1.base, 8 + snd_serial_probe_~devptr#1.offset, 4);snd_serial_probe_~dev~0#1 := snd_serial_probe_#t~mem326#1;havoc snd_serial_probe_#t~mem326#1;call snd_serial_probe_#t~mem327#1 := read~int(~#adaptor~0.base, ~#adaptor~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);snd_serial_probe_#t~switch328#1 := 0 == snd_serial_probe_#t~mem327#1; {14149#false} is VALID [2022-02-20 22:03:48,021 INFO L290 TraceCheckUtils]: 46: Hoare triple {14149#false} assume snd_serial_probe_#t~switch328#1;call write~int(1, ~#ins~0.base, ~#ins~0.offset + 4 * snd_serial_probe_~dev~0#1, 4); {14149#false} is VALID [2022-02-20 22:03:48,021 INFO L290 TraceCheckUtils]: 47: Hoare triple {14149#false} call snd_serial_probe_#t~mem330#1 := read~int(~#outs~0.base, ~#outs~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);snd_serial_probe_#t~short332#1 := snd_serial_probe_#t~mem330#1 <= 0; {14149#false} is VALID [2022-02-20 22:03:48,022 INFO L290 TraceCheckUtils]: 48: Hoare triple {14149#false} assume snd_serial_probe_#t~short332#1; {14149#false} is VALID [2022-02-20 22:03:48,022 INFO L290 TraceCheckUtils]: 49: Hoare triple {14149#false} assume !snd_serial_probe_#t~short332#1;havoc snd_serial_probe_#t~mem330#1;havoc snd_serial_probe_#t~mem331#1;havoc snd_serial_probe_#t~short332#1;call snd_serial_probe_#t~mem334#1 := read~int(~#ins~0.base, ~#ins~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);snd_serial_probe_#t~short336#1 := snd_serial_probe_#t~mem334#1 <= 0; {14149#false} is VALID [2022-02-20 22:03:48,022 INFO L290 TraceCheckUtils]: 50: Hoare triple {14149#false} assume snd_serial_probe_#t~short336#1; {14149#false} is VALID [2022-02-20 22:03:48,022 INFO L290 TraceCheckUtils]: 51: Hoare triple {14149#false} assume !snd_serial_probe_#t~short336#1;havoc snd_serial_probe_#t~mem334#1;havoc snd_serial_probe_#t~mem335#1;havoc snd_serial_probe_#t~short336#1;call snd_serial_probe_#t~mem338#1 := read~int(~#index~0.base, ~#index~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem339#1.base, snd_serial_probe_#t~mem339#1.offset := read~$Pointer$(~#id~0.base, ~#id~0.offset + 8 * snd_serial_probe_~dev~0#1, 8);assume { :begin_inline_snd_card_new } true;snd_card_new_#in~arg0#1.base, snd_card_new_#in~arg0#1.offset, snd_card_new_#in~arg1#1, snd_card_new_#in~arg2#1.base, snd_card_new_#in~arg2#1.offset, snd_card_new_#in~arg3#1.base, snd_card_new_#in~arg3#1.offset, snd_card_new_#in~arg4#1, snd_card_new_#in~arg5#1.base, snd_card_new_#in~arg5#1.offset := snd_serial_probe_~devptr#1.base, 13 + snd_serial_probe_~devptr#1.offset, snd_serial_probe_#t~mem338#1, snd_serial_probe_#t~mem339#1.base, snd_serial_probe_#t~mem339#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 0, snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset;havoc snd_card_new_#res#1;havoc snd_card_new_#t~nondet433#1, snd_card_new_~arg0#1.base, snd_card_new_~arg0#1.offset, snd_card_new_~arg1#1, snd_card_new_~arg2#1.base, snd_card_new_~arg2#1.offset, snd_card_new_~arg3#1.base, snd_card_new_~arg3#1.offset, snd_card_new_~arg4#1, snd_card_new_~arg5#1.base, snd_card_new_~arg5#1.offset;snd_card_new_~arg0#1.base, snd_card_new_~arg0#1.offset := snd_card_new_#in~arg0#1.base, snd_card_new_#in~arg0#1.offset;snd_card_new_~arg1#1 := snd_card_new_#in~arg1#1;snd_card_new_~arg2#1.base, snd_card_new_~arg2#1.offset := snd_card_new_#in~arg2#1.base, snd_card_new_#in~arg2#1.offset;snd_card_new_~arg3#1.base, snd_card_new_~arg3#1.offset := snd_card_new_#in~arg3#1.base, snd_card_new_#in~arg3#1.offset;snd_card_new_~arg4#1 := snd_card_new_#in~arg4#1;snd_card_new_~arg5#1.base, snd_card_new_~arg5#1.offset := snd_card_new_#in~arg5#1.base, snd_card_new_#in~arg5#1.offset;assume -2147483648 <= snd_card_new_#t~nondet433#1 && snd_card_new_#t~nondet433#1 <= 2147483647;snd_card_new_#res#1 := snd_card_new_#t~nondet433#1;havoc snd_card_new_#t~nondet433#1; {14149#false} is VALID [2022-02-20 22:03:48,022 INFO L290 TraceCheckUtils]: 52: Hoare triple {14149#false} snd_serial_probe_#t~ret340#1 := snd_card_new_#res#1;assume { :end_inline_snd_card_new } true;assume -2147483648 <= snd_serial_probe_#t~ret340#1 && snd_serial_probe_#t~ret340#1 <= 2147483647;snd_serial_probe_~err~2#1 := snd_serial_probe_#t~ret340#1;havoc snd_serial_probe_#t~mem338#1;havoc snd_serial_probe_#t~mem339#1.base, snd_serial_probe_#t~mem339#1.offset;havoc snd_serial_probe_#t~ret340#1; {14149#false} is VALID [2022-02-20 22:03:48,022 INFO L290 TraceCheckUtils]: 53: Hoare triple {14149#false} assume !(snd_serial_probe_~err~2#1 < 0);call snd_serial_probe_#t~mem341#1.base, snd_serial_probe_#t~mem341#1.offset := read~$Pointer$(snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset, 8); {14149#false} is VALID [2022-02-20 22:03:48,023 INFO L272 TraceCheckUtils]: 54: Hoare triple {14149#false} call snd_serial_probe_#t~strcpy~res342#1.base, snd_serial_probe_#t~strcpy~res342#1.offset := #Ultimate.C_strcpy(snd_serial_probe_#t~mem341#1.base, 20 + snd_serial_probe_#t~mem341#1.offset, 29, 0); {14175#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:03:48,023 INFO L290 TraceCheckUtils]: 55: Hoare triple {14175#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~offset444 := 0; {14148#true} is VALID [2022-02-20 22:03:48,024 INFO L290 TraceCheckUtils]: 56: Hoare triple {14148#true} call #t~mem445 := read~int(src.base, src.offset + #t~offset444, 1);call write~unchecked~int(#t~mem445, dest.base, dest.offset + #t~offset444, 1); {14148#true} is VALID [2022-02-20 22:03:48,024 INFO L290 TraceCheckUtils]: 57: Hoare triple {14148#true} assume 0 == #t~mem445; {14148#true} is VALID [2022-02-20 22:03:48,024 INFO L290 TraceCheckUtils]: 58: Hoare triple {14148#true} assume #res.base == dest.base && #res.offset == dest.offset; {14148#true} is VALID [2022-02-20 22:03:48,024 INFO L284 TraceCheckUtils]: 59: Hoare quadruple {14148#true} {14149#false} #1809#return; {14149#false} is VALID [2022-02-20 22:03:48,024 INFO L290 TraceCheckUtils]: 60: Hoare triple {14149#false} havoc snd_serial_probe_#t~mem341#1.base, snd_serial_probe_#t~mem341#1.offset;havoc snd_serial_probe_#t~strcpy~res342#1.base, snd_serial_probe_#t~strcpy~res342#1.offset;call snd_serial_probe_#t~mem343#1.base, snd_serial_probe_#t~mem343#1.offset := read~$Pointer$(snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset, 8); {14149#false} is VALID [2022-02-20 22:03:48,024 INFO L272 TraceCheckUtils]: 61: Hoare triple {14149#false} call snd_serial_probe_#t~strcpy~res344#1.base, snd_serial_probe_#t~strcpy~res344#1.offset := #Ultimate.C_strcpy(snd_serial_probe_#t~mem343#1.base, 36 + snd_serial_probe_#t~mem343#1.offset, 30, 0); {14175#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:03:48,024 INFO L290 TraceCheckUtils]: 62: Hoare triple {14175#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~offset444 := 0; {14148#true} is VALID [2022-02-20 22:03:48,027 INFO L290 TraceCheckUtils]: 63: Hoare triple {14148#true} call #t~mem445 := read~int(src.base, src.offset + #t~offset444, 1);call write~unchecked~int(#t~mem445, dest.base, dest.offset + #t~offset444, 1); {14148#true} is VALID [2022-02-20 22:03:48,027 INFO L290 TraceCheckUtils]: 64: Hoare triple {14148#true} assume 0 == #t~mem445; {14148#true} is VALID [2022-02-20 22:03:48,028 INFO L290 TraceCheckUtils]: 65: Hoare triple {14148#true} assume #res.base == dest.base && #res.offset == dest.offset; {14148#true} is VALID [2022-02-20 22:03:48,028 INFO L284 TraceCheckUtils]: 66: Hoare quadruple {14148#true} {14149#false} #1811#return; {14149#false} is VALID [2022-02-20 22:03:48,028 INFO L290 TraceCheckUtils]: 67: Hoare triple {14149#false} havoc snd_serial_probe_#t~mem343#1.base, snd_serial_probe_#t~mem343#1.offset;havoc snd_serial_probe_#t~strcpy~res344#1.base, snd_serial_probe_#t~strcpy~res344#1.offset;call snd_serial_probe_#t~mem345#1.base, snd_serial_probe_#t~mem345#1.offset := read~$Pointer$(snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset, 8);call snd_serial_probe_#t~mem346#1 := read~int(~#port~0.base, ~#port~0.offset + 8 * snd_serial_probe_~dev~0#1, 8);call snd_serial_probe_#t~mem347#1 := read~int(~#irq~0.base, ~#irq~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem348#1 := read~int(~#speed~0.base, ~#speed~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem349#1 := read~int(~#base~0.base, ~#base~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem350#1 := read~int(~#adaptor~0.base, ~#adaptor~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem351#1 := read~int(~#droponfull~0.base, ~#droponfull~0.offset + snd_serial_probe_~dev~0#1, 1);assume { :begin_inline_snd_uart16550_create } true;snd_uart16550_create_#in~card#1.base, snd_uart16550_create_#in~card#1.offset, snd_uart16550_create_#in~iobase#1, snd_uart16550_create_#in~irq___0#1, snd_uart16550_create_#in~speed___0#1, snd_uart16550_create_#in~base___0#1, snd_uart16550_create_#in~adaptor___0#1, snd_uart16550_create_#in~droponfull___0#1, snd_uart16550_create_#in~ruart#1.base, snd_uart16550_create_#in~ruart#1.offset := snd_serial_probe_#t~mem345#1.base, snd_serial_probe_#t~mem345#1.offset, snd_serial_probe_#t~mem346#1, snd_serial_probe_#t~mem347#1, snd_serial_probe_#t~mem348#1, snd_serial_probe_#t~mem349#1, snd_serial_probe_#t~mem350#1, snd_serial_probe_#t~mem351#1 % 256, snd_serial_probe_~#uart~11#1.base, snd_serial_probe_~#uart~11#1.offset;havoc snd_uart16550_create_#res#1;havoc snd_uart16550_create_#t~ret296#1.base, snd_uart16550_create_#t~ret296#1.offset, snd_uart16550_create_#t~ret297#1.base, snd_uart16550_create_#t~ret297#1.offset, snd_uart16550_create_#t~ret298#1, snd_uart16550_create_#t~nondet299#1, snd_uart16550_create_#t~ret300#1, snd_uart16550_create_#t~ret301#1, snd_uart16550_create_#t~mem302#1, snd_uart16550_create_#t~memset~res303#1.base, snd_uart16550_create_#t~memset~res303#1.offset, snd_uart16550_create_#t~ret304#1, snd_uart16550_create_#t~ret305#1, snd_uart16550_create_#t~ret306#1, snd_uart16550_create_#t~mem307#1, snd_uart16550_create_#t~switch308#1, snd_uart16550_create_#t~mem309#1, snd_uart16550_create_#t~mem310#1, snd_uart16550_create_~card#1.base, snd_uart16550_create_~card#1.offset, snd_uart16550_create_~iobase#1, snd_uart16550_create_~irq___0#1, snd_uart16550_create_~speed___0#1, snd_uart16550_create_~base___0#1, snd_uart16550_create_~adaptor___0#1, snd_uart16550_create_~droponfull___0#1, snd_uart16550_create_~ruart#1.base, snd_uart16550_create_~ruart#1.offset, snd_uart16550_create_~#ops~0#1.base, snd_uart16550_create_~#ops~0#1.offset, snd_uart16550_create_~uart~10#1.base, snd_uart16550_create_~uart~10#1.offset, snd_uart16550_create_~err~0#1, snd_uart16550_create_~tmp~13#1.base, snd_uart16550_create_~tmp~13#1.offset, snd_uart16550_create_~#__key~0#1.base, snd_uart16550_create_~#__key~0#1.offset, snd_uart16550_create_~tmp___0~4#1;snd_uart16550_create_~card#1.base, snd_uart16550_create_~card#1.offset := snd_uart16550_create_#in~card#1.base, snd_uart16550_create_#in~card#1.offset;snd_uart16550_create_~iobase#1 := snd_uart16550_create_#in~iobase#1;snd_uart16550_create_~irq___0#1 := snd_uart16550_create_#in~irq___0#1;snd_uart16550_create_~speed___0#1 := snd_uart16550_create_#in~speed___0#1;snd_uart16550_create_~base___0#1 := snd_uart16550_create_#in~base___0#1;snd_uart16550_create_~adaptor___0#1 := snd_uart16550_create_#in~adaptor___0#1;snd_uart16550_create_~droponfull___0#1 := snd_uart16550_create_#in~droponfull___0#1;snd_uart16550_create_~ruart#1.base, snd_uart16550_create_~ruart#1.offset := snd_uart16550_create_#in~ruart#1.base, snd_uart16550_create_#in~ruart#1.offset;call snd_uart16550_create_~#ops~0#1.base, snd_uart16550_create_~#ops~0#1.offset := #Ultimate.allocOnStack(24);havoc snd_uart16550_create_~uart~10#1.base, snd_uart16550_create_~uart~10#1.offset;havoc snd_uart16550_create_~err~0#1;havoc snd_uart16550_create_~tmp~13#1.base, snd_uart16550_create_~tmp~13#1.offset;call snd_uart16550_create_~#__key~0#1.base, snd_uart16550_create_~#__key~0#1.offset := #Ultimate.allocOnStack(8);havoc snd_uart16550_create_~tmp___0~4#1;call write~$Pointer$(#funAddr~snd_uart16550_dev_free.base, #funAddr~snd_uart16550_dev_free.offset, snd_uart16550_create_~#ops~0#1.base, snd_uart16550_create_~#ops~0#1.offset, 8);call write~$Pointer$(0, 0, snd_uart16550_create_~#ops~0#1.base, 8 + snd_uart16550_create_~#ops~0#1.offset, 8);call write~$Pointer$(0, 0, snd_uart16550_create_~#ops~0#1.base, 16 + snd_uart16550_create_~#ops~0#1.offset, 8);assume { :begin_inline_kzalloc } true;kzalloc_#in~size#1, kzalloc_#in~flags#1 := 33344, 208;havoc kzalloc_#res#1.base, kzalloc_#res#1.offset;havoc kzalloc_~size#1, kzalloc_~flags#1;kzalloc_~size#1 := kzalloc_#in~size#1;kzalloc_~flags#1 := kzalloc_#in~flags#1;assume { :begin_inline_ldv_check_alloc_flags } true;ldv_check_alloc_flags_#in~flags#1 := kzalloc_~flags#1;havoc ldv_check_alloc_flags_~flags#1;ldv_check_alloc_flags_~flags#1 := ldv_check_alloc_flags_#in~flags#1; {14149#false} is VALID [2022-02-20 22:03:48,029 INFO L290 TraceCheckUtils]: 68: Hoare triple {14149#false} assume !(0 == ~ldv_spin~0 || 0 == (if 0 == ldv_check_alloc_flags_~flags#1 then 0 else (if 1 == ldv_check_alloc_flags_~flags#1 then 0 else ~bitwiseAnd(ldv_check_alloc_flags_~flags#1, 16))) % 4294967296); {14149#false} is VALID [2022-02-20 22:03:48,029 INFO L272 TraceCheckUtils]: 69: Hoare triple {14149#false} call ldv_error(); {14149#false} is VALID [2022-02-20 22:03:48,029 INFO L290 TraceCheckUtils]: 70: Hoare triple {14149#false} assume !false; {14149#false} is VALID [2022-02-20 22:03:48,030 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2022-02-20 22:03:48,030 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:03:48,030 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1217360124] [2022-02-20 22:03:48,030 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1217360124] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:03:48,031 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 22:03:48,031 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-02-20 22:03:48,031 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1519907174] [2022-02-20 22:03:48,031 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:03:48,032 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 8.333333333333334) internal successors, (50), 4 states have internal predecessors, (50), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 71 [2022-02-20 22:03:48,033 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:03:48,033 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 8.333333333333334) internal successors, (50), 4 states have internal predecessors, (50), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2022-02-20 22:03:48,099 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 61 edges. 61 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:03:48,099 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-02-20 22:03:48,100 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:03:48,100 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-02-20 22:03:48,100 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-02-20 22:03:48,103 INFO L87 Difference]: Start difference. First operand 1080 states and 1541 transitions. Second operand has 6 states, 6 states have (on average 8.333333333333334) internal successors, (50), 4 states have internal predecessors, (50), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2022-02-20 22:03:54,105 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:03:54,106 INFO L93 Difference]: Finished difference Result 2246 states and 3230 transitions. [2022-02-20 22:03:54,106 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-02-20 22:03:54,106 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 8.333333333333334) internal successors, (50), 4 states have internal predecessors, (50), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 71 [2022-02-20 22:03:54,106 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 22:03:54,106 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 8.333333333333334) internal successors, (50), 4 states have internal predecessors, (50), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2022-02-20 22:03:54,126 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 1921 transitions. [2022-02-20 22:03:54,127 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 8.333333333333334) internal successors, (50), 4 states have internal predecessors, (50), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2022-02-20 22:03:54,147 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 1921 transitions. [2022-02-20 22:03:54,148 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states and 1921 transitions. [2022-02-20 22:03:55,628 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 1921 edges. 1921 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:03:55,687 INFO L225 Difference]: With dead ends: 2246 [2022-02-20 22:03:55,687 INFO L226 Difference]: Without dead ends: 1154 [2022-02-20 22:03:55,690 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-02-20 22:03:55,691 INFO L933 BasicCegarLoop]: 847 mSDtfsCounter, 333 mSDsluCounter, 1983 mSDsCounter, 0 mSdLazyCounter, 1273 mSolverCounterSat, 321 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 338 SdHoareTripleChecker+Valid, 2830 SdHoareTripleChecker+Invalid, 1594 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 321 IncrementalHoareTripleChecker+Valid, 1273 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.9s IncrementalHoareTripleChecker+Time [2022-02-20 22:03:55,691 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [338 Valid, 2830 Invalid, 1594 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [321 Valid, 1273 Invalid, 0 Unknown, 0 Unchecked, 1.9s Time] [2022-02-20 22:03:55,692 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1154 states. [2022-02-20 22:03:55,713 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1154 to 1043. [2022-02-20 22:03:55,713 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 22:03:55,715 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1154 states. Second operand has 1043 states, 784 states have (on average 1.375) internal successors, (1078), 803 states have internal predecessors, (1078), 210 states have call successors, (210), 49 states have call predecessors, (210), 48 states have return successors, (209), 209 states have call predecessors, (209), 209 states have call successors, (209) [2022-02-20 22:03:55,717 INFO L74 IsIncluded]: Start isIncluded. First operand 1154 states. Second operand has 1043 states, 784 states have (on average 1.375) internal successors, (1078), 803 states have internal predecessors, (1078), 210 states have call successors, (210), 49 states have call predecessors, (210), 48 states have return successors, (209), 209 states have call predecessors, (209), 209 states have call successors, (209) [2022-02-20 22:03:55,719 INFO L87 Difference]: Start difference. First operand 1154 states. Second operand has 1043 states, 784 states have (on average 1.375) internal successors, (1078), 803 states have internal predecessors, (1078), 210 states have call successors, (210), 49 states have call predecessors, (210), 48 states have return successors, (209), 209 states have call predecessors, (209), 209 states have call successors, (209) [2022-02-20 22:03:55,764 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:03:55,764 INFO L93 Difference]: Finished difference Result 1154 states and 1673 transitions. [2022-02-20 22:03:55,764 INFO L276 IsEmpty]: Start isEmpty. Operand 1154 states and 1673 transitions. [2022-02-20 22:03:55,767 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:03:55,768 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:03:55,782 INFO L74 IsIncluded]: Start isIncluded. First operand has 1043 states, 784 states have (on average 1.375) internal successors, (1078), 803 states have internal predecessors, (1078), 210 states have call successors, (210), 49 states have call predecessors, (210), 48 states have return successors, (209), 209 states have call predecessors, (209), 209 states have call successors, (209) Second operand 1154 states. [2022-02-20 22:03:55,784 INFO L87 Difference]: Start difference. First operand has 1043 states, 784 states have (on average 1.375) internal successors, (1078), 803 states have internal predecessors, (1078), 210 states have call successors, (210), 49 states have call predecessors, (210), 48 states have return successors, (209), 209 states have call predecessors, (209), 209 states have call successors, (209) Second operand 1154 states. [2022-02-20 22:03:55,835 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:03:55,835 INFO L93 Difference]: Finished difference Result 1154 states and 1673 transitions. [2022-02-20 22:03:55,835 INFO L276 IsEmpty]: Start isEmpty. Operand 1154 states and 1673 transitions. [2022-02-20 22:03:55,838 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:03:55,838 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:03:55,838 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 22:03:55,839 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 22:03:55,840 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1043 states, 784 states have (on average 1.375) internal successors, (1078), 803 states have internal predecessors, (1078), 210 states have call successors, (210), 49 states have call predecessors, (210), 48 states have return successors, (209), 209 states have call predecessors, (209), 209 states have call successors, (209) [2022-02-20 22:03:55,892 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1043 states to 1043 states and 1497 transitions. [2022-02-20 22:03:55,892 INFO L78 Accepts]: Start accepts. Automaton has 1043 states and 1497 transitions. Word has length 71 [2022-02-20 22:03:55,893 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 22:03:55,893 INFO L470 AbstractCegarLoop]: Abstraction has 1043 states and 1497 transitions. [2022-02-20 22:03:55,893 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 8.333333333333334) internal successors, (50), 4 states have internal predecessors, (50), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2022-02-20 22:03:55,894 INFO L276 IsEmpty]: Start isEmpty. Operand 1043 states and 1497 transitions. [2022-02-20 22:03:55,896 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2022-02-20 22:03:55,896 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:03:55,896 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:03:55,896 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-02-20 22:03:55,896 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:03:55,897 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:03:55,897 INFO L85 PathProgramCache]: Analyzing trace with hash 1463183111, now seen corresponding path program 1 times [2022-02-20 22:03:55,897 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:03:55,897 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1254956858] [2022-02-20 22:03:55,897 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:03:55,897 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:03:55,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:03:56,029 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 12 [2022-02-20 22:03:56,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:03:56,045 INFO L290 TraceCheckUtils]: 0: Hoare triple {21009#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {20984#true} is VALID [2022-02-20 22:03:56,045 INFO L290 TraceCheckUtils]: 1: Hoare triple {20984#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {20984#true} is VALID [2022-02-20 22:03:56,046 INFO L290 TraceCheckUtils]: 2: Hoare triple {20984#true} assume true; {20984#true} is VALID [2022-02-20 22:03:56,046 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20984#true} {20984#true} #1791#return; {20984#true} is VALID [2022-02-20 22:03:56,046 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-02-20 22:03:56,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:03:56,076 INFO L290 TraceCheckUtils]: 0: Hoare triple {21009#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {20984#true} is VALID [2022-02-20 22:03:56,076 INFO L290 TraceCheckUtils]: 1: Hoare triple {20984#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {20984#true} is VALID [2022-02-20 22:03:56,076 INFO L290 TraceCheckUtils]: 2: Hoare triple {20984#true} assume true; {20984#true} is VALID [2022-02-20 22:03:56,076 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20984#true} {20985#false} #1803#return; {20985#false} is VALID [2022-02-20 22:03:56,077 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 33 [2022-02-20 22:03:56,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:03:56,082 INFO L290 TraceCheckUtils]: 0: Hoare triple {21009#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {20984#true} is VALID [2022-02-20 22:03:56,082 INFO L290 TraceCheckUtils]: 1: Hoare triple {20984#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {20984#true} is VALID [2022-02-20 22:03:56,083 INFO L290 TraceCheckUtils]: 2: Hoare triple {20984#true} assume true; {20984#true} is VALID [2022-02-20 22:03:56,083 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20984#true} {20985#false} #1805#return; {20985#false} is VALID [2022-02-20 22:03:56,088 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 56 [2022-02-20 22:03:56,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:03:56,108 INFO L290 TraceCheckUtils]: 0: Hoare triple {21010#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~offset444 := 0; {20984#true} is VALID [2022-02-20 22:03:56,108 INFO L290 TraceCheckUtils]: 1: Hoare triple {20984#true} call #t~mem445 := read~int(src.base, src.offset + #t~offset444, 1);call write~unchecked~int(#t~mem445, dest.base, dest.offset + #t~offset444, 1); {20984#true} is VALID [2022-02-20 22:03:56,108 INFO L290 TraceCheckUtils]: 2: Hoare triple {20984#true} assume 0 == #t~mem445; {20984#true} is VALID [2022-02-20 22:03:56,108 INFO L290 TraceCheckUtils]: 3: Hoare triple {20984#true} assume #res.base == dest.base && #res.offset == dest.offset; {20984#true} is VALID [2022-02-20 22:03:56,108 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {20984#true} {20985#false} #1809#return; {20985#false} is VALID [2022-02-20 22:03:56,109 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 63 [2022-02-20 22:03:56,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:03:56,115 INFO L290 TraceCheckUtils]: 0: Hoare triple {21010#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~offset444 := 0; {20984#true} is VALID [2022-02-20 22:03:56,115 INFO L290 TraceCheckUtils]: 1: Hoare triple {20984#true} call #t~mem445 := read~int(src.base, src.offset + #t~offset444, 1);call write~unchecked~int(#t~mem445, dest.base, dest.offset + #t~offset444, 1); {20984#true} is VALID [2022-02-20 22:03:56,116 INFO L290 TraceCheckUtils]: 2: Hoare triple {20984#true} assume 0 == #t~mem445; {20984#true} is VALID [2022-02-20 22:03:56,116 INFO L290 TraceCheckUtils]: 3: Hoare triple {20984#true} assume #res.base == dest.base && #res.offset == dest.offset; {20984#true} is VALID [2022-02-20 22:03:56,116 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {20984#true} {20985#false} #1811#return; {20985#false} is VALID [2022-02-20 22:03:56,116 INFO L290 TraceCheckUtils]: 0: Hoare triple {20984#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(105, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(8, 4);call #Ultimate.allocInit(12, 5);call #Ultimate.allocInit(12, 6);call #Ultimate.allocInit(8, 7);call #Ultimate.allocInit(217, 8);call #Ultimate.allocInit(33, 9);call #Ultimate.allocInit(12, 10);call #Ultimate.allocInit(217, 11);call #Ultimate.allocInit(32, 12);call #Ultimate.allocInit(217, 13);call #Ultimate.allocInit(40, 14);call #Ultimate.allocInit(27, 15);call #Ultimate.allocInit(28, 16);call #Ultimate.allocInit(12, 17);call #Ultimate.allocInit(217, 18);call #Ultimate.allocInit(30, 19);call #Ultimate.allocInit(15, 20);call #Ultimate.allocInit(17, 21);call #Ultimate.allocInit(12, 22);call #Ultimate.allocInit(217, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(217, 25);call #Ultimate.allocInit(45, 26);call #Ultimate.allocInit(217, 27);call #Ultimate.allocInit(44, 28);call #Ultimate.allocInit(7, 29);call write~init~int(83, 29, 0, 1);call write~init~int(101, 29, 1, 1);call write~init~int(114, 29, 2, 1);call write~init~int(105, 29, 3, 1);call write~init~int(97, 29, 4, 1);call write~init~int(108, 29, 5, 1);call write~init~int(0, 29, 6, 1);call #Ultimate.allocInit(25, 30);call #Ultimate.allocInit(24, 31);call #Ultimate.allocInit(18, 32);call #Ultimate.allocInit(18, 33);call #Ultimate.allocInit(49, 34);~ldv_irq_1_3~0 := 0;~ldv_irq_data_1_1~0.base, ~ldv_irq_data_1_1~0.offset := 0, 0;~ldv_irq_1_0~0 := 0;~ldv_irq_data_1_0~0.base, ~ldv_irq_data_1_0~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_irq_data_1_3~0.base, ~ldv_irq_data_1_3~0.offset := 0, 0;~snd_uart16550_input_group0~0.base, ~snd_uart16550_input_group0~0.offset := 0, 0;~ldv_irq_data_1_2~0.base, ~ldv_irq_data_1_2~0.offset := 0, 0;~ldv_irq_1_2~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_irq_1_1~0 := 0;~ldv_timer_state_2~0 := 0;~ldv_irq_line_1_3~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_irq_line_1_0~0 := 0;~ldv_timer_list_2~0.base, ~ldv_timer_list_2~0.offset := 0, 0;~snd_serial_driver_group0~0.base, ~snd_serial_driver_group0~0.offset := 0, 0;~ref_cnt~0 := 0;~ldv_irq_line_1_1~0 := 0;~snd_uart16550_output_group0~0.base, ~snd_uart16550_output_group0~0.offset := 0, 0;~ldv_state_variable_1~0 := 0;~ldv_irq_line_1_2~0 := 0;~ldv_state_variable_4~0 := 0;~#adaptor_names~0.base, ~#adaptor_names~0.offset := 35, 0;call #Ultimate.allocInit(40, 35);call write~init~$Pointer$(3, 0, ~#adaptor_names~0.base, ~#adaptor_names~0.offset, 8);call write~init~$Pointer$(4, 0, ~#adaptor_names~0.base, 8 + ~#adaptor_names~0.offset, 8);call write~init~$Pointer$(5, 0, ~#adaptor_names~0.base, 16 + ~#adaptor_names~0.offset, 8);call write~init~$Pointer$(6, 0, ~#adaptor_names~0.base, 24 + ~#adaptor_names~0.offset, 8);call write~init~$Pointer$(7, 0, ~#adaptor_names~0.base, 32 + ~#adaptor_names~0.offset, 8);~#index~0.base, ~#index~0.offset := 36, 0;call #Ultimate.allocInit(128, 36);call write~init~int(-1, ~#index~0.base, ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 4 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 8 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 12 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 16 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 20 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 24 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 28 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 32 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 36 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 40 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 44 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 48 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 52 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 56 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 60 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 64 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 68 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 72 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 76 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 80 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 84 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 88 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 92 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 96 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 100 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 104 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 108 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 112 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 116 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 120 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 124 + ~#index~0.offset, 4);~#id~0.base, ~#id~0.offset := 37, 0;call #Ultimate.allocInit(256, 37);call write~init~$Pointer$(0, 0, ~#id~0.base, ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 8 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 16 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 24 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 32 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 40 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 48 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 56 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 64 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 72 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 80 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 88 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 96 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 104 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 112 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 120 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 128 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 136 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 144 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 152 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 160 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 168 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 176 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 184 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 192 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 200 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 208 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 216 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 224 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 232 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 240 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 248 + ~#id~0.offset, 8);~#enable~0.base, ~#enable~0.offset := 38, 0;call #Ultimate.allocInit(32, 38);call write~init~int(1, ~#enable~0.base, ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 1 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 2 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 3 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 4 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 5 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 6 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 7 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 8 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 9 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 10 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 11 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 12 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 13 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 14 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 15 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 16 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 17 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 18 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 19 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 20 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 21 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 22 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 23 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 24 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 25 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 26 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 27 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 28 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 29 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 30 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 31 + ~#enable~0.offset, 1);~#port~0.base, ~#port~0.offset := 39, 0;call #Ultimate.allocInit(256, 39);call write~init~int(1, ~#port~0.base, ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 8 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 16 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 24 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 32 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 40 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 48 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 56 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 64 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 72 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 80 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 88 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 96 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 104 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 112 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 120 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 128 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 136 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 144 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 152 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 160 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 168 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 176 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 184 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 192 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 200 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 208 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 216 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 224 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 232 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 240 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 248 + ~#port~0.offset, 8);~#irq~0.base, ~#irq~0.offset := 40, 0;call #Ultimate.allocInit(128, 40);call write~init~int(65535, ~#irq~0.base, ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 4 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 8 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 12 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 16 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 20 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 24 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 28 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 32 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 36 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 40 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 44 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 48 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 52 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 56 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 60 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 64 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 68 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 72 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 76 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 80 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 84 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 88 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 92 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 96 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 100 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 104 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 108 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 112 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 116 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 120 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 124 + ~#irq~0.offset, 4);~#speed~0.base, ~#speed~0.offset := 41, 0;call #Ultimate.allocInit(128, 41);call write~init~int(38400, ~#speed~0.base, ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 4 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 8 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 12 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 16 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 20 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 24 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 28 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 32 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 36 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 40 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 44 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 48 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 52 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 56 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 60 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 64 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 68 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 72 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 76 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 80 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 84 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 88 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 92 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 96 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 100 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 104 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 108 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 112 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 116 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 120 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 124 + ~#speed~0.offset, 4);~#base~0.base, ~#base~0.offset := 42, 0;call #Ultimate.allocInit(128, 42);call write~init~int(115200, ~#base~0.base, ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 4 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 8 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 12 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 16 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 20 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 24 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 28 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 32 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 36 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 40 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 44 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 48 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 52 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 56 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 60 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 64 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 68 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 72 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 76 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 80 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 84 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 88 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 92 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 96 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 100 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 104 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 108 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 112 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 116 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 120 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 124 + ~#base~0.offset, 4);~#outs~0.base, ~#outs~0.offset := 43, 0;call #Ultimate.allocInit(128, 43);call write~init~int(1, ~#outs~0.base, ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 4 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 8 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 12 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 16 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 20 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 24 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 28 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 32 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 36 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 40 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 44 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 48 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 52 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 56 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 60 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 64 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 68 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 72 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 76 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 80 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 84 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 88 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 92 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 96 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 100 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 104 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 108 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 112 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 116 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 120 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 124 + ~#outs~0.offset, 4);~#ins~0.base, ~#ins~0.offset := 44, 0;call #Ultimate.allocInit(128, 44);call write~init~int(1, ~#ins~0.base, ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 4 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 8 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 12 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 16 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 20 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 24 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 28 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 32 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 36 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 40 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 44 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 48 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 52 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 56 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 60 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 64 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 68 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 72 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 76 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 80 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 84 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 88 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 92 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 96 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 100 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 104 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 108 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 112 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 116 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 120 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 124 + ~#ins~0.offset, 4);~#adaptor~0.base, ~#adaptor~0.offset := 45, 0;call #Ultimate.allocInit(128, 45);call write~init~int(0, ~#adaptor~0.base, ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 4 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 8 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 12 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 16 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 20 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 24 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 28 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 32 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 36 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 40 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 44 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 48 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 52 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 56 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 60 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 64 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 68 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 72 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 76 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 80 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 84 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 88 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 92 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 96 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 100 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 104 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 108 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 112 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 116 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 120 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 124 + ~#adaptor~0.offset, 4);~#droponfull~0.base, ~#droponfull~0.offset := 46, 0;call #Ultimate.allocInit(32, 46);call write~init~int(0, ~#droponfull~0.base, ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 1 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 2 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 3 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 4 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 5 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 6 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 7 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 8 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 9 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 10 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 11 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 12 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 13 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 14 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 15 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 16 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 17 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 18 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 19 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 20 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 21 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 22 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 23 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 24 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 25 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 26 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 27 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 28 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 29 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 30 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 31 + ~#droponfull~0.offset, 1);~#devices~0.base, ~#devices~0.offset := 47, 0;call #Ultimate.allocInit(256, 47);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#devices~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#devices~0.base);~#snd_uart16550_output~0.base, ~#snd_uart16550_output~0.offset := 48, 0;call #Ultimate.allocInit(32, 48);call write~init~$Pointer$(#funAddr~snd_uart16550_output_open.base, #funAddr~snd_uart16550_output_open.offset, ~#snd_uart16550_output~0.base, ~#snd_uart16550_output~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_uart16550_output_close.base, #funAddr~snd_uart16550_output_close.offset, ~#snd_uart16550_output~0.base, 8 + ~#snd_uart16550_output~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_uart16550_output_trigger.base, #funAddr~snd_uart16550_output_trigger.offset, ~#snd_uart16550_output~0.base, 16 + ~#snd_uart16550_output~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_uart16550_output~0.base, 24 + ~#snd_uart16550_output~0.offset, 8);~#snd_uart16550_input~0.base, ~#snd_uart16550_input~0.offset := 49, 0;call #Ultimate.allocInit(32, 49);call write~init~$Pointer$(#funAddr~snd_uart16550_input_open.base, #funAddr~snd_uart16550_input_open.offset, ~#snd_uart16550_input~0.base, ~#snd_uart16550_input~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_uart16550_input_close.base, #funAddr~snd_uart16550_input_close.offset, ~#snd_uart16550_input~0.base, 8 + ~#snd_uart16550_input~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_uart16550_input_trigger.base, #funAddr~snd_uart16550_input_trigger.offset, ~#snd_uart16550_input~0.base, 16 + ~#snd_uart16550_input~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_uart16550_input~0.base, 24 + ~#snd_uart16550_input~0.offset, 8);~#snd_serial_driver~0.base, ~#snd_serial_driver~0.offset := 50, 0;call #Ultimate.allocInit(162, 50);call write~init~$Pointer$(#funAddr~snd_serial_probe.base, #funAddr~snd_serial_probe.offset, ~#snd_serial_driver~0.base, ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_serial_remove.base, #funAddr~snd_serial_remove.offset, ~#snd_serial_driver~0.base, 8 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 16 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 24 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 32 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(32, 0, ~#snd_serial_driver~0.base, 40 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 48 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#snd_serial_driver~0.base, 56 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 64 + ~#snd_serial_driver~0.offset, 8);call write~init~int(0, ~#snd_serial_driver~0.base, 72 + ~#snd_serial_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 73 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 81 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 89 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 97 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 105 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 113 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 121 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 129 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 137 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 145 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 153 + ~#snd_serial_driver~0.offset, 8);call write~init~int(0, ~#snd_serial_driver~0.base, 161 + ~#snd_serial_driver~0.offset, 1);~ldv_retval_2~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_5~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_spin~0 := 0; {20984#true} is VALID [2022-02-20 22:03:56,116 INFO L290 TraceCheckUtils]: 1: Hoare triple {20984#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet399#1, main_#t~nondet400#1, main_#t~nondet401#1, main_#t~switch402#1, main_#t~nondet403#1, main_#t~switch404#1, main_#t~ret405#1, main_#t~ret406#1, main_#t~nondet407#1, main_#t~switch408#1, main_#t~ret409#1, main_#t~nondet410#1, main_#t~switch411#1, main_#t~ret412#1, main_#t~ret413#1, main_#t~nondet414#1, main_#t~switch415#1, main_#t~ret416#1, main_#t~ret417#1, main_~ldvarg0~0#1, main_~tmp~21#1, main_~ldvarg1~0#1, main_~tmp___0~6#1, main_~tmp___1~2#1, main_~tmp___2~1#1, main_~tmp___3~0#1, main_~tmp___4~0#1, main_~tmp___5~0#1;havoc main_~ldvarg0~0#1;havoc main_~tmp~21#1;havoc main_~ldvarg1~0#1;havoc main_~tmp___0~6#1;havoc main_~tmp___1~2#1;havoc main_~tmp___2~1#1;havoc main_~tmp___3~0#1;havoc main_~tmp___4~0#1;havoc main_~tmp___5~0#1;assume -2147483648 <= main_#t~nondet399#1 && main_#t~nondet399#1 <= 2147483647;main_~tmp~21#1 := main_#t~nondet399#1;havoc main_#t~nondet399#1;main_~ldvarg0~0#1 := main_~tmp~21#1;assume -2147483648 <= main_#t~nondet400#1 && main_#t~nondet400#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet400#1;havoc main_#t~nondet400#1;main_~ldvarg1~0#1 := main_~tmp___0~6#1;assume { :begin_inline_ldv_initialize } true; {20984#true} is VALID [2022-02-20 22:03:56,117 INFO L290 TraceCheckUtils]: 2: Hoare triple {20984#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_4~0 := 0;~ldv_state_variable_1~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 1;~ldv_state_variable_5~0 := 0; {20984#true} is VALID [2022-02-20 22:03:56,117 INFO L290 TraceCheckUtils]: 3: Hoare triple {20984#true} assume -2147483648 <= main_#t~nondet401#1 && main_#t~nondet401#1 <= 2147483647;main_~tmp___1~2#1 := main_#t~nondet401#1;havoc main_#t~nondet401#1;main_#t~switch402#1 := 0 == main_~tmp___1~2#1; {20984#true} is VALID [2022-02-20 22:03:56,117 INFO L290 TraceCheckUtils]: 4: Hoare triple {20984#true} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 1 == main_~tmp___1~2#1; {20984#true} is VALID [2022-02-20 22:03:56,117 INFO L290 TraceCheckUtils]: 5: Hoare triple {20984#true} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 2 == main_~tmp___1~2#1; {20984#true} is VALID [2022-02-20 22:03:56,117 INFO L290 TraceCheckUtils]: 6: Hoare triple {20984#true} assume main_#t~switch402#1; {20984#true} is VALID [2022-02-20 22:03:56,117 INFO L290 TraceCheckUtils]: 7: Hoare triple {20984#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet407#1 && main_#t~nondet407#1 <= 2147483647;main_~tmp___3~0#1 := main_#t~nondet407#1;havoc main_#t~nondet407#1;main_#t~switch408#1 := 0 == main_~tmp___3~0#1; {20984#true} is VALID [2022-02-20 22:03:56,117 INFO L290 TraceCheckUtils]: 8: Hoare triple {20984#true} assume !main_#t~switch408#1;main_#t~switch408#1 := main_#t~switch408#1 || 1 == main_~tmp___3~0#1; {20984#true} is VALID [2022-02-20 22:03:56,118 INFO L290 TraceCheckUtils]: 9: Hoare triple {20984#true} assume main_#t~switch408#1; {20984#true} is VALID [2022-02-20 22:03:56,118 INFO L290 TraceCheckUtils]: 10: Hoare triple {20984#true} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_alsa_card_serial_init } true;havoc alsa_card_serial_init_#res#1;havoc alsa_card_serial_init_#t~ret376#1, alsa_card_serial_init_#t~mem377#1, alsa_card_serial_init_#t~ret378#1.base, alsa_card_serial_init_#t~ret378#1.offset, alsa_card_serial_init_#t~ret379#1, alsa_card_serial_init_#t~ret380#1.base, alsa_card_serial_init_#t~ret380#1.offset, alsa_card_serial_init_#t~nondet381#1, alsa_card_serial_init_~i~1#1, alsa_card_serial_init_~cards~0#1, alsa_card_serial_init_~err~3#1, alsa_card_serial_init_~device~0#1.base, alsa_card_serial_init_~device~0#1.offset, alsa_card_serial_init_~tmp~15#1, alsa_card_serial_init_~tmp___0~5#1.base, alsa_card_serial_init_~tmp___0~5#1.offset;havoc alsa_card_serial_init_~i~1#1;havoc alsa_card_serial_init_~cards~0#1;havoc alsa_card_serial_init_~err~3#1;havoc alsa_card_serial_init_~device~0#1.base, alsa_card_serial_init_~device~0#1.offset;havoc alsa_card_serial_init_~tmp~15#1;havoc alsa_card_serial_init_~tmp___0~5#1.base, alsa_card_serial_init_~tmp___0~5#1.offset;assume { :begin_inline_ldv___platform_driver_register_23 } true;ldv___platform_driver_register_23_#in~ldv_func_arg1#1.base, ldv___platform_driver_register_23_#in~ldv_func_arg1#1.offset, ldv___platform_driver_register_23_#in~ldv_func_arg2#1.base, ldv___platform_driver_register_23_#in~ldv_func_arg2#1.offset := ~#snd_serial_driver~0.base, ~#snd_serial_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset;havoc ldv___platform_driver_register_23_#res#1;havoc ldv___platform_driver_register_23_#t~ret421#1, ldv___platform_driver_register_23_~ldv_func_arg1#1.base, ldv___platform_driver_register_23_~ldv_func_arg1#1.offset, ldv___platform_driver_register_23_~ldv_func_arg2#1.base, ldv___platform_driver_register_23_~ldv_func_arg2#1.offset, ldv___platform_driver_register_23_~ldv_func_res~2#1, ldv___platform_driver_register_23_~tmp~24#1;ldv___platform_driver_register_23_~ldv_func_arg1#1.base, ldv___platform_driver_register_23_~ldv_func_arg1#1.offset := ldv___platform_driver_register_23_#in~ldv_func_arg1#1.base, ldv___platform_driver_register_23_#in~ldv_func_arg1#1.offset;ldv___platform_driver_register_23_~ldv_func_arg2#1.base, ldv___platform_driver_register_23_~ldv_func_arg2#1.offset := ldv___platform_driver_register_23_#in~ldv_func_arg2#1.base, ldv___platform_driver_register_23_#in~ldv_func_arg2#1.offset;havoc ldv___platform_driver_register_23_~ldv_func_res~2#1;havoc ldv___platform_driver_register_23_~tmp~24#1;assume { :begin_inline___platform_driver_register } true;__platform_driver_register_#in~arg0#1.base, __platform_driver_register_#in~arg0#1.offset, __platform_driver_register_#in~arg1#1.base, __platform_driver_register_#in~arg1#1.offset := ldv___platform_driver_register_23_~ldv_func_arg1#1.base, ldv___platform_driver_register_23_~ldv_func_arg1#1.offset, ldv___platform_driver_register_23_~ldv_func_arg2#1.base, ldv___platform_driver_register_23_~ldv_func_arg2#1.offset;havoc __platform_driver_register_#res#1;havoc __platform_driver_register_#t~nondet424#1, __platform_driver_register_~arg0#1.base, __platform_driver_register_~arg0#1.offset, __platform_driver_register_~arg1#1.base, __platform_driver_register_~arg1#1.offset;__platform_driver_register_~arg0#1.base, __platform_driver_register_~arg0#1.offset := __platform_driver_register_#in~arg0#1.base, __platform_driver_register_#in~arg0#1.offset;__platform_driver_register_~arg1#1.base, __platform_driver_register_~arg1#1.offset := __platform_driver_register_#in~arg1#1.base, __platform_driver_register_#in~arg1#1.offset;assume -2147483648 <= __platform_driver_register_#t~nondet424#1 && __platform_driver_register_#t~nondet424#1 <= 2147483647;__platform_driver_register_#res#1 := __platform_driver_register_#t~nondet424#1;havoc __platform_driver_register_#t~nondet424#1; {20984#true} is VALID [2022-02-20 22:03:56,118 INFO L290 TraceCheckUtils]: 11: Hoare triple {20984#true} ldv___platform_driver_register_23_#t~ret421#1 := __platform_driver_register_#res#1;assume { :end_inline___platform_driver_register } true;assume -2147483648 <= ldv___platform_driver_register_23_#t~ret421#1 && ldv___platform_driver_register_23_#t~ret421#1 <= 2147483647;ldv___platform_driver_register_23_~tmp~24#1 := ldv___platform_driver_register_23_#t~ret421#1;havoc ldv___platform_driver_register_23_#t~ret421#1;ldv___platform_driver_register_23_~ldv_func_res~2#1 := ldv___platform_driver_register_23_~tmp~24#1;~ldv_state_variable_3~0 := 1;assume { :begin_inline_ldv_initialize_platform_driver_3 } true;havoc ldv_initialize_platform_driver_3_#t~ret392#1.base, ldv_initialize_platform_driver_3_#t~ret392#1.offset, ldv_initialize_platform_driver_3_~tmp~19#1.base, ldv_initialize_platform_driver_3_~tmp~19#1.offset;havoc ldv_initialize_platform_driver_3_~tmp~19#1.base, ldv_initialize_platform_driver_3_~tmp~19#1.offset; {20984#true} is VALID [2022-02-20 22:03:56,118 INFO L272 TraceCheckUtils]: 12: Hoare triple {20984#true} call ldv_initialize_platform_driver_3_#t~ret392#1.base, ldv_initialize_platform_driver_3_#t~ret392#1.offset := ldv_zalloc(1464); {21009#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:03:56,119 INFO L290 TraceCheckUtils]: 13: Hoare triple {21009#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {20984#true} is VALID [2022-02-20 22:03:56,119 INFO L290 TraceCheckUtils]: 14: Hoare triple {20984#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {20984#true} is VALID [2022-02-20 22:03:56,119 INFO L290 TraceCheckUtils]: 15: Hoare triple {20984#true} assume true; {20984#true} is VALID [2022-02-20 22:03:56,119 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {20984#true} {20984#true} #1791#return; {20984#true} is VALID [2022-02-20 22:03:56,119 INFO L290 TraceCheckUtils]: 17: Hoare triple {20984#true} ldv_initialize_platform_driver_3_~tmp~19#1.base, ldv_initialize_platform_driver_3_~tmp~19#1.offset := ldv_initialize_platform_driver_3_#t~ret392#1.base, ldv_initialize_platform_driver_3_#t~ret392#1.offset;havoc ldv_initialize_platform_driver_3_#t~ret392#1.base, ldv_initialize_platform_driver_3_#t~ret392#1.offset;~snd_serial_driver_group0~0.base, ~snd_serial_driver_group0~0.offset := ldv_initialize_platform_driver_3_~tmp~19#1.base, ldv_initialize_platform_driver_3_~tmp~19#1.offset; {20984#true} is VALID [2022-02-20 22:03:56,119 INFO L290 TraceCheckUtils]: 18: Hoare triple {20984#true} assume { :end_inline_ldv_initialize_platform_driver_3 } true;ldv___platform_driver_register_23_#res#1 := ldv___platform_driver_register_23_~ldv_func_res~2#1; {20984#true} is VALID [2022-02-20 22:03:56,119 INFO L290 TraceCheckUtils]: 19: Hoare triple {20984#true} alsa_card_serial_init_#t~ret376#1 := ldv___platform_driver_register_23_#res#1;assume { :end_inline_ldv___platform_driver_register_23 } true;assume -2147483648 <= alsa_card_serial_init_#t~ret376#1 && alsa_card_serial_init_#t~ret376#1 <= 2147483647;alsa_card_serial_init_~err~3#1 := alsa_card_serial_init_#t~ret376#1;havoc alsa_card_serial_init_#t~ret376#1; {20984#true} is VALID [2022-02-20 22:03:56,120 INFO L290 TraceCheckUtils]: 20: Hoare triple {20984#true} assume !(alsa_card_serial_init_~err~3#1 < 0);alsa_card_serial_init_~cards~0#1 := 0;alsa_card_serial_init_~i~1#1 := 0; {20990#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:03:56,120 INFO L290 TraceCheckUtils]: 21: Hoare triple {20990#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} assume !(alsa_card_serial_init_~i~1#1 <= 31); {20985#false} is VALID [2022-02-20 22:03:56,120 INFO L290 TraceCheckUtils]: 22: Hoare triple {20985#false} assume !(0 == alsa_card_serial_init_~cards~0#1);alsa_card_serial_init_#res#1 := 0; {20985#false} is VALID [2022-02-20 22:03:56,120 INFO L290 TraceCheckUtils]: 23: Hoare triple {20985#false} main_#t~ret409#1 := alsa_card_serial_init_#res#1;assume { :end_inline_alsa_card_serial_init } true;assume -2147483648 <= main_#t~ret409#1 && main_#t~ret409#1 <= 2147483647;~ldv_retval_2~0 := main_#t~ret409#1;havoc main_#t~ret409#1; {20985#false} is VALID [2022-02-20 22:03:56,121 INFO L290 TraceCheckUtils]: 24: Hoare triple {20985#false} assume !(0 != ~ldv_retval_2~0); {20985#false} is VALID [2022-02-20 22:03:56,121 INFO L290 TraceCheckUtils]: 25: Hoare triple {20985#false} assume 0 == ~ldv_retval_2~0;~ldv_state_variable_0~0 := 2;~ldv_state_variable_5~0 := 1;assume { :begin_inline_ldv_initialize_snd_rawmidi_ops_5 } true;havoc ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.base, ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.offset, ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.base, ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.offset;havoc ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.base, ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.offset; {20985#false} is VALID [2022-02-20 22:03:56,121 INFO L272 TraceCheckUtils]: 26: Hoare triple {20985#false} call ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.base, ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.offset := ldv_zalloc(112); {21009#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:03:56,121 INFO L290 TraceCheckUtils]: 27: Hoare triple {21009#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {20984#true} is VALID [2022-02-20 22:03:56,121 INFO L290 TraceCheckUtils]: 28: Hoare triple {20984#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {20984#true} is VALID [2022-02-20 22:03:56,121 INFO L290 TraceCheckUtils]: 29: Hoare triple {20984#true} assume true; {20984#true} is VALID [2022-02-20 22:03:56,121 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {20984#true} {20985#false} #1803#return; {20985#false} is VALID [2022-02-20 22:03:56,121 INFO L290 TraceCheckUtils]: 31: Hoare triple {20985#false} ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.base, ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.offset := ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.base, ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.offset;havoc ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.base, ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.offset;~snd_uart16550_output_group0~0.base, ~snd_uart16550_output_group0~0.offset := ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.base, ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.offset; {20985#false} is VALID [2022-02-20 22:03:56,122 INFO L290 TraceCheckUtils]: 32: Hoare triple {20985#false} assume { :end_inline_ldv_initialize_snd_rawmidi_ops_5 } true;~ldv_state_variable_4~0 := 1;assume { :begin_inline_ldv_initialize_snd_rawmidi_ops_4 } true;havoc ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.base, ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.offset, ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.base, ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.offset;havoc ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.base, ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.offset; {20985#false} is VALID [2022-02-20 22:03:56,122 INFO L272 TraceCheckUtils]: 33: Hoare triple {20985#false} call ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.base, ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.offset := ldv_zalloc(112); {21009#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:03:56,122 INFO L290 TraceCheckUtils]: 34: Hoare triple {21009#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {20984#true} is VALID [2022-02-20 22:03:56,122 INFO L290 TraceCheckUtils]: 35: Hoare triple {20984#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {20984#true} is VALID [2022-02-20 22:03:56,122 INFO L290 TraceCheckUtils]: 36: Hoare triple {20984#true} assume true; {20984#true} is VALID [2022-02-20 22:03:56,122 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {20984#true} {20985#false} #1805#return; {20985#false} is VALID [2022-02-20 22:03:56,122 INFO L290 TraceCheckUtils]: 38: Hoare triple {20985#false} ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.base, ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.offset := ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.base, ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.offset;havoc ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.base, ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.offset;~snd_uart16550_input_group0~0.base, ~snd_uart16550_input_group0~0.offset := ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.base, ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.offset; {20985#false} is VALID [2022-02-20 22:03:56,123 INFO L290 TraceCheckUtils]: 39: Hoare triple {20985#false} assume { :end_inline_ldv_initialize_snd_rawmidi_ops_4 } true; {20985#false} is VALID [2022-02-20 22:03:56,123 INFO L290 TraceCheckUtils]: 40: Hoare triple {20985#false} assume -2147483648 <= main_#t~nondet401#1 && main_#t~nondet401#1 <= 2147483647;main_~tmp___1~2#1 := main_#t~nondet401#1;havoc main_#t~nondet401#1;main_#t~switch402#1 := 0 == main_~tmp___1~2#1; {20985#false} is VALID [2022-02-20 22:03:56,123 INFO L290 TraceCheckUtils]: 41: Hoare triple {20985#false} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 1 == main_~tmp___1~2#1; {20985#false} is VALID [2022-02-20 22:03:56,123 INFO L290 TraceCheckUtils]: 42: Hoare triple {20985#false} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 2 == main_~tmp___1~2#1; {20985#false} is VALID [2022-02-20 22:03:56,127 INFO L290 TraceCheckUtils]: 43: Hoare triple {20985#false} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 3 == main_~tmp___1~2#1; {20985#false} is VALID [2022-02-20 22:03:56,127 INFO L290 TraceCheckUtils]: 44: Hoare triple {20985#false} assume main_#t~switch402#1; {20985#false} is VALID [2022-02-20 22:03:56,127 INFO L290 TraceCheckUtils]: 45: Hoare triple {20985#false} assume 0 != ~ldv_state_variable_3~0;assume -2147483648 <= main_#t~nondet410#1 && main_#t~nondet410#1 <= 2147483647;main_~tmp___4~0#1 := main_#t~nondet410#1;havoc main_#t~nondet410#1;main_#t~switch411#1 := 0 == main_~tmp___4~0#1; {20985#false} is VALID [2022-02-20 22:03:56,127 INFO L290 TraceCheckUtils]: 46: Hoare triple {20985#false} assume main_#t~switch411#1; {20985#false} is VALID [2022-02-20 22:03:56,127 INFO L290 TraceCheckUtils]: 47: Hoare triple {20985#false} assume 1 == ~ldv_state_variable_3~0;assume { :begin_inline_snd_serial_probe } true;snd_serial_probe_#in~devptr#1.base, snd_serial_probe_#in~devptr#1.offset := ~snd_serial_driver_group0~0.base, ~snd_serial_driver_group0~0.offset;havoc snd_serial_probe_#res#1;havoc snd_serial_probe_#t~mem326#1, snd_serial_probe_#t~mem327#1, snd_serial_probe_#t~switch328#1, snd_serial_probe_#t~mem329#1, snd_serial_probe_#t~mem330#1, snd_serial_probe_#t~mem331#1, snd_serial_probe_#t~short332#1, snd_serial_probe_#t~mem333#1, snd_serial_probe_#t~mem334#1, snd_serial_probe_#t~mem335#1, snd_serial_probe_#t~short336#1, snd_serial_probe_#t~mem337#1, snd_serial_probe_#t~mem338#1, snd_serial_probe_#t~mem339#1.base, snd_serial_probe_#t~mem339#1.offset, snd_serial_probe_#t~ret340#1, snd_serial_probe_#t~mem341#1.base, snd_serial_probe_#t~mem341#1.offset, snd_serial_probe_#t~strcpy~res342#1.base, snd_serial_probe_#t~strcpy~res342#1.offset, snd_serial_probe_#t~mem343#1.base, snd_serial_probe_#t~mem343#1.offset, snd_serial_probe_#t~strcpy~res344#1.base, snd_serial_probe_#t~strcpy~res344#1.offset, snd_serial_probe_#t~mem345#1.base, snd_serial_probe_#t~mem345#1.offset, snd_serial_probe_#t~mem346#1, snd_serial_probe_#t~mem347#1, snd_serial_probe_#t~mem348#1, snd_serial_probe_#t~mem349#1, snd_serial_probe_#t~mem350#1, snd_serial_probe_#t~mem351#1, snd_serial_probe_#t~ret352#1, snd_serial_probe_#t~mem353#1.base, snd_serial_probe_#t~mem353#1.offset, snd_serial_probe_#t~mem354#1, snd_serial_probe_#t~mem355#1, snd_serial_probe_#t~mem356#1.base, snd_serial_probe_#t~mem356#1.offset, snd_serial_probe_#t~ret357#1, snd_serial_probe_#t~nondet358#1, snd_serial_probe_#t~mem359#1.base, snd_serial_probe_#t~mem359#1.offset, snd_serial_probe_#t~mem360#1.base, snd_serial_probe_#t~mem360#1.offset, snd_serial_probe_#t~mem361#1.base, snd_serial_probe_#t~mem361#1.offset, snd_serial_probe_#t~mem362#1, snd_serial_probe_#t~mem363#1.base, snd_serial_probe_#t~mem363#1.offset, snd_serial_probe_#t~mem364#1.base, snd_serial_probe_#t~mem364#1.offset, snd_serial_probe_#t~mem365#1, snd_serial_probe_#t~mem366#1.base, snd_serial_probe_#t~mem366#1.offset, snd_serial_probe_#t~mem367#1, snd_serial_probe_#t~mem368#1.base, snd_serial_probe_#t~mem368#1.offset, snd_serial_probe_#t~ret369#1, snd_serial_probe_#t~mem370#1.base, snd_serial_probe_#t~mem370#1.offset, snd_serial_probe_#t~mem371#1.base, snd_serial_probe_#t~mem371#1.offset, snd_serial_probe_#t~ret372#1, snd_serial_probe_~devptr#1.base, snd_serial_probe_~devptr#1.offset, snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset, snd_serial_probe_~#uart~11#1.base, snd_serial_probe_~#uart~11#1.offset, snd_serial_probe_~err~2#1, snd_serial_probe_~dev~0#1;snd_serial_probe_~devptr#1.base, snd_serial_probe_~devptr#1.offset := snd_serial_probe_#in~devptr#1.base, snd_serial_probe_#in~devptr#1.offset;call snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset := #Ultimate.allocOnStack(8);call snd_serial_probe_~#uart~11#1.base, snd_serial_probe_~#uart~11#1.offset := #Ultimate.allocOnStack(8);havoc snd_serial_probe_~err~2#1;havoc snd_serial_probe_~dev~0#1;call snd_serial_probe_#t~mem326#1 := read~int(snd_serial_probe_~devptr#1.base, 8 + snd_serial_probe_~devptr#1.offset, 4);snd_serial_probe_~dev~0#1 := snd_serial_probe_#t~mem326#1;havoc snd_serial_probe_#t~mem326#1;call snd_serial_probe_#t~mem327#1 := read~int(~#adaptor~0.base, ~#adaptor~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);snd_serial_probe_#t~switch328#1 := 0 == snd_serial_probe_#t~mem327#1; {20985#false} is VALID [2022-02-20 22:03:56,127 INFO L290 TraceCheckUtils]: 48: Hoare triple {20985#false} assume snd_serial_probe_#t~switch328#1;call write~int(1, ~#ins~0.base, ~#ins~0.offset + 4 * snd_serial_probe_~dev~0#1, 4); {20985#false} is VALID [2022-02-20 22:03:56,127 INFO L290 TraceCheckUtils]: 49: Hoare triple {20985#false} call snd_serial_probe_#t~mem330#1 := read~int(~#outs~0.base, ~#outs~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);snd_serial_probe_#t~short332#1 := snd_serial_probe_#t~mem330#1 <= 0; {20985#false} is VALID [2022-02-20 22:03:56,128 INFO L290 TraceCheckUtils]: 50: Hoare triple {20985#false} assume snd_serial_probe_#t~short332#1; {20985#false} is VALID [2022-02-20 22:03:56,128 INFO L290 TraceCheckUtils]: 51: Hoare triple {20985#false} assume !snd_serial_probe_#t~short332#1;havoc snd_serial_probe_#t~mem330#1;havoc snd_serial_probe_#t~mem331#1;havoc snd_serial_probe_#t~short332#1;call snd_serial_probe_#t~mem334#1 := read~int(~#ins~0.base, ~#ins~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);snd_serial_probe_#t~short336#1 := snd_serial_probe_#t~mem334#1 <= 0; {20985#false} is VALID [2022-02-20 22:03:56,128 INFO L290 TraceCheckUtils]: 52: Hoare triple {20985#false} assume snd_serial_probe_#t~short336#1; {20985#false} is VALID [2022-02-20 22:03:56,128 INFO L290 TraceCheckUtils]: 53: Hoare triple {20985#false} assume !snd_serial_probe_#t~short336#1;havoc snd_serial_probe_#t~mem334#1;havoc snd_serial_probe_#t~mem335#1;havoc snd_serial_probe_#t~short336#1;call snd_serial_probe_#t~mem338#1 := read~int(~#index~0.base, ~#index~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem339#1.base, snd_serial_probe_#t~mem339#1.offset := read~$Pointer$(~#id~0.base, ~#id~0.offset + 8 * snd_serial_probe_~dev~0#1, 8);assume { :begin_inline_snd_card_new } true;snd_card_new_#in~arg0#1.base, snd_card_new_#in~arg0#1.offset, snd_card_new_#in~arg1#1, snd_card_new_#in~arg2#1.base, snd_card_new_#in~arg2#1.offset, snd_card_new_#in~arg3#1.base, snd_card_new_#in~arg3#1.offset, snd_card_new_#in~arg4#1, snd_card_new_#in~arg5#1.base, snd_card_new_#in~arg5#1.offset := snd_serial_probe_~devptr#1.base, 13 + snd_serial_probe_~devptr#1.offset, snd_serial_probe_#t~mem338#1, snd_serial_probe_#t~mem339#1.base, snd_serial_probe_#t~mem339#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 0, snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset;havoc snd_card_new_#res#1;havoc snd_card_new_#t~nondet433#1, snd_card_new_~arg0#1.base, snd_card_new_~arg0#1.offset, snd_card_new_~arg1#1, snd_card_new_~arg2#1.base, snd_card_new_~arg2#1.offset, snd_card_new_~arg3#1.base, snd_card_new_~arg3#1.offset, snd_card_new_~arg4#1, snd_card_new_~arg5#1.base, snd_card_new_~arg5#1.offset;snd_card_new_~arg0#1.base, snd_card_new_~arg0#1.offset := snd_card_new_#in~arg0#1.base, snd_card_new_#in~arg0#1.offset;snd_card_new_~arg1#1 := snd_card_new_#in~arg1#1;snd_card_new_~arg2#1.base, snd_card_new_~arg2#1.offset := snd_card_new_#in~arg2#1.base, snd_card_new_#in~arg2#1.offset;snd_card_new_~arg3#1.base, snd_card_new_~arg3#1.offset := snd_card_new_#in~arg3#1.base, snd_card_new_#in~arg3#1.offset;snd_card_new_~arg4#1 := snd_card_new_#in~arg4#1;snd_card_new_~arg5#1.base, snd_card_new_~arg5#1.offset := snd_card_new_#in~arg5#1.base, snd_card_new_#in~arg5#1.offset;assume -2147483648 <= snd_card_new_#t~nondet433#1 && snd_card_new_#t~nondet433#1 <= 2147483647;snd_card_new_#res#1 := snd_card_new_#t~nondet433#1;havoc snd_card_new_#t~nondet433#1; {20985#false} is VALID [2022-02-20 22:03:56,128 INFO L290 TraceCheckUtils]: 54: Hoare triple {20985#false} snd_serial_probe_#t~ret340#1 := snd_card_new_#res#1;assume { :end_inline_snd_card_new } true;assume -2147483648 <= snd_serial_probe_#t~ret340#1 && snd_serial_probe_#t~ret340#1 <= 2147483647;snd_serial_probe_~err~2#1 := snd_serial_probe_#t~ret340#1;havoc snd_serial_probe_#t~mem338#1;havoc snd_serial_probe_#t~mem339#1.base, snd_serial_probe_#t~mem339#1.offset;havoc snd_serial_probe_#t~ret340#1; {20985#false} is VALID [2022-02-20 22:03:56,128 INFO L290 TraceCheckUtils]: 55: Hoare triple {20985#false} assume !(snd_serial_probe_~err~2#1 < 0);call snd_serial_probe_#t~mem341#1.base, snd_serial_probe_#t~mem341#1.offset := read~$Pointer$(snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset, 8); {20985#false} is VALID [2022-02-20 22:03:56,128 INFO L272 TraceCheckUtils]: 56: Hoare triple {20985#false} call snd_serial_probe_#t~strcpy~res342#1.base, snd_serial_probe_#t~strcpy~res342#1.offset := #Ultimate.C_strcpy(snd_serial_probe_#t~mem341#1.base, 20 + snd_serial_probe_#t~mem341#1.offset, 29, 0); {21010#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:03:56,129 INFO L290 TraceCheckUtils]: 57: Hoare triple {21010#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~offset444 := 0; {20984#true} is VALID [2022-02-20 22:03:56,129 INFO L290 TraceCheckUtils]: 58: Hoare triple {20984#true} call #t~mem445 := read~int(src.base, src.offset + #t~offset444, 1);call write~unchecked~int(#t~mem445, dest.base, dest.offset + #t~offset444, 1); {20984#true} is VALID [2022-02-20 22:03:56,129 INFO L290 TraceCheckUtils]: 59: Hoare triple {20984#true} assume 0 == #t~mem445; {20984#true} is VALID [2022-02-20 22:03:56,129 INFO L290 TraceCheckUtils]: 60: Hoare triple {20984#true} assume #res.base == dest.base && #res.offset == dest.offset; {20984#true} is VALID [2022-02-20 22:03:56,129 INFO L284 TraceCheckUtils]: 61: Hoare quadruple {20984#true} {20985#false} #1809#return; {20985#false} is VALID [2022-02-20 22:03:56,129 INFO L290 TraceCheckUtils]: 62: Hoare triple {20985#false} havoc snd_serial_probe_#t~mem341#1.base, snd_serial_probe_#t~mem341#1.offset;havoc snd_serial_probe_#t~strcpy~res342#1.base, snd_serial_probe_#t~strcpy~res342#1.offset;call snd_serial_probe_#t~mem343#1.base, snd_serial_probe_#t~mem343#1.offset := read~$Pointer$(snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset, 8); {20985#false} is VALID [2022-02-20 22:03:56,129 INFO L272 TraceCheckUtils]: 63: Hoare triple {20985#false} call snd_serial_probe_#t~strcpy~res344#1.base, snd_serial_probe_#t~strcpy~res344#1.offset := #Ultimate.C_strcpy(snd_serial_probe_#t~mem343#1.base, 36 + snd_serial_probe_#t~mem343#1.offset, 30, 0); {21010#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:03:56,130 INFO L290 TraceCheckUtils]: 64: Hoare triple {21010#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~offset444 := 0; {20984#true} is VALID [2022-02-20 22:03:56,130 INFO L290 TraceCheckUtils]: 65: Hoare triple {20984#true} call #t~mem445 := read~int(src.base, src.offset + #t~offset444, 1);call write~unchecked~int(#t~mem445, dest.base, dest.offset + #t~offset444, 1); {20984#true} is VALID [2022-02-20 22:03:56,130 INFO L290 TraceCheckUtils]: 66: Hoare triple {20984#true} assume 0 == #t~mem445; {20984#true} is VALID [2022-02-20 22:03:56,130 INFO L290 TraceCheckUtils]: 67: Hoare triple {20984#true} assume #res.base == dest.base && #res.offset == dest.offset; {20984#true} is VALID [2022-02-20 22:03:56,130 INFO L284 TraceCheckUtils]: 68: Hoare quadruple {20984#true} {20985#false} #1811#return; {20985#false} is VALID [2022-02-20 22:03:56,130 INFO L290 TraceCheckUtils]: 69: Hoare triple {20985#false} havoc snd_serial_probe_#t~mem343#1.base, snd_serial_probe_#t~mem343#1.offset;havoc snd_serial_probe_#t~strcpy~res344#1.base, snd_serial_probe_#t~strcpy~res344#1.offset;call snd_serial_probe_#t~mem345#1.base, snd_serial_probe_#t~mem345#1.offset := read~$Pointer$(snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset, 8);call snd_serial_probe_#t~mem346#1 := read~int(~#port~0.base, ~#port~0.offset + 8 * snd_serial_probe_~dev~0#1, 8);call snd_serial_probe_#t~mem347#1 := read~int(~#irq~0.base, ~#irq~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem348#1 := read~int(~#speed~0.base, ~#speed~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem349#1 := read~int(~#base~0.base, ~#base~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem350#1 := read~int(~#adaptor~0.base, ~#adaptor~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem351#1 := read~int(~#droponfull~0.base, ~#droponfull~0.offset + snd_serial_probe_~dev~0#1, 1);assume { :begin_inline_snd_uart16550_create } true;snd_uart16550_create_#in~card#1.base, snd_uart16550_create_#in~card#1.offset, snd_uart16550_create_#in~iobase#1, snd_uart16550_create_#in~irq___0#1, snd_uart16550_create_#in~speed___0#1, snd_uart16550_create_#in~base___0#1, snd_uart16550_create_#in~adaptor___0#1, snd_uart16550_create_#in~droponfull___0#1, snd_uart16550_create_#in~ruart#1.base, snd_uart16550_create_#in~ruart#1.offset := snd_serial_probe_#t~mem345#1.base, snd_serial_probe_#t~mem345#1.offset, snd_serial_probe_#t~mem346#1, snd_serial_probe_#t~mem347#1, snd_serial_probe_#t~mem348#1, snd_serial_probe_#t~mem349#1, snd_serial_probe_#t~mem350#1, snd_serial_probe_#t~mem351#1 % 256, snd_serial_probe_~#uart~11#1.base, snd_serial_probe_~#uart~11#1.offset;havoc snd_uart16550_create_#res#1;havoc snd_uart16550_create_#t~ret296#1.base, snd_uart16550_create_#t~ret296#1.offset, snd_uart16550_create_#t~ret297#1.base, snd_uart16550_create_#t~ret297#1.offset, snd_uart16550_create_#t~ret298#1, snd_uart16550_create_#t~nondet299#1, snd_uart16550_create_#t~ret300#1, snd_uart16550_create_#t~ret301#1, snd_uart16550_create_#t~mem302#1, snd_uart16550_create_#t~memset~res303#1.base, snd_uart16550_create_#t~memset~res303#1.offset, snd_uart16550_create_#t~ret304#1, snd_uart16550_create_#t~ret305#1, snd_uart16550_create_#t~ret306#1, snd_uart16550_create_#t~mem307#1, snd_uart16550_create_#t~switch308#1, snd_uart16550_create_#t~mem309#1, snd_uart16550_create_#t~mem310#1, snd_uart16550_create_~card#1.base, snd_uart16550_create_~card#1.offset, snd_uart16550_create_~iobase#1, snd_uart16550_create_~irq___0#1, snd_uart16550_create_~speed___0#1, snd_uart16550_create_~base___0#1, snd_uart16550_create_~adaptor___0#1, snd_uart16550_create_~droponfull___0#1, snd_uart16550_create_~ruart#1.base, snd_uart16550_create_~ruart#1.offset, snd_uart16550_create_~#ops~0#1.base, snd_uart16550_create_~#ops~0#1.offset, snd_uart16550_create_~uart~10#1.base, snd_uart16550_create_~uart~10#1.offset, snd_uart16550_create_~err~0#1, snd_uart16550_create_~tmp~13#1.base, snd_uart16550_create_~tmp~13#1.offset, snd_uart16550_create_~#__key~0#1.base, snd_uart16550_create_~#__key~0#1.offset, snd_uart16550_create_~tmp___0~4#1;snd_uart16550_create_~card#1.base, snd_uart16550_create_~card#1.offset := snd_uart16550_create_#in~card#1.base, snd_uart16550_create_#in~card#1.offset;snd_uart16550_create_~iobase#1 := snd_uart16550_create_#in~iobase#1;snd_uart16550_create_~irq___0#1 := snd_uart16550_create_#in~irq___0#1;snd_uart16550_create_~speed___0#1 := snd_uart16550_create_#in~speed___0#1;snd_uart16550_create_~base___0#1 := snd_uart16550_create_#in~base___0#1;snd_uart16550_create_~adaptor___0#1 := snd_uart16550_create_#in~adaptor___0#1;snd_uart16550_create_~droponfull___0#1 := snd_uart16550_create_#in~droponfull___0#1;snd_uart16550_create_~ruart#1.base, snd_uart16550_create_~ruart#1.offset := snd_uart16550_create_#in~ruart#1.base, snd_uart16550_create_#in~ruart#1.offset;call snd_uart16550_create_~#ops~0#1.base, snd_uart16550_create_~#ops~0#1.offset := #Ultimate.allocOnStack(24);havoc snd_uart16550_create_~uart~10#1.base, snd_uart16550_create_~uart~10#1.offset;havoc snd_uart16550_create_~err~0#1;havoc snd_uart16550_create_~tmp~13#1.base, snd_uart16550_create_~tmp~13#1.offset;call snd_uart16550_create_~#__key~0#1.base, snd_uart16550_create_~#__key~0#1.offset := #Ultimate.allocOnStack(8);havoc snd_uart16550_create_~tmp___0~4#1;call write~$Pointer$(#funAddr~snd_uart16550_dev_free.base, #funAddr~snd_uart16550_dev_free.offset, snd_uart16550_create_~#ops~0#1.base, snd_uart16550_create_~#ops~0#1.offset, 8);call write~$Pointer$(0, 0, snd_uart16550_create_~#ops~0#1.base, 8 + snd_uart16550_create_~#ops~0#1.offset, 8);call write~$Pointer$(0, 0, snd_uart16550_create_~#ops~0#1.base, 16 + snd_uart16550_create_~#ops~0#1.offset, 8);assume { :begin_inline_kzalloc } true;kzalloc_#in~size#1, kzalloc_#in~flags#1 := 33344, 208;havoc kzalloc_#res#1.base, kzalloc_#res#1.offset;havoc kzalloc_~size#1, kzalloc_~flags#1;kzalloc_~size#1 := kzalloc_#in~size#1;kzalloc_~flags#1 := kzalloc_#in~flags#1;assume { :begin_inline_ldv_check_alloc_flags } true;ldv_check_alloc_flags_#in~flags#1 := kzalloc_~flags#1;havoc ldv_check_alloc_flags_~flags#1;ldv_check_alloc_flags_~flags#1 := ldv_check_alloc_flags_#in~flags#1; {20985#false} is VALID [2022-02-20 22:03:56,130 INFO L290 TraceCheckUtils]: 70: Hoare triple {20985#false} assume !(0 == ~ldv_spin~0 || 0 == (if 0 == ldv_check_alloc_flags_~flags#1 then 0 else (if 1 == ldv_check_alloc_flags_~flags#1 then 0 else ~bitwiseAnd(ldv_check_alloc_flags_~flags#1, 16))) % 4294967296); {20985#false} is VALID [2022-02-20 22:03:56,131 INFO L272 TraceCheckUtils]: 71: Hoare triple {20985#false} call ldv_error(); {20985#false} is VALID [2022-02-20 22:03:56,131 INFO L290 TraceCheckUtils]: 72: Hoare triple {20985#false} assume !false; {20985#false} is VALID [2022-02-20 22:03:56,131 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2022-02-20 22:03:56,132 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:03:56,132 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1254956858] [2022-02-20 22:03:56,133 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1254956858] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:03:56,133 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 22:03:56,133 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-02-20 22:03:56,133 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [535871281] [2022-02-20 22:03:56,133 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:03:56,134 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 10.4) internal successors, (52), 3 states have internal predecessors, (52), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 73 [2022-02-20 22:03:56,134 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:03:56,135 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 10.4) internal successors, (52), 3 states have internal predecessors, (52), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2022-02-20 22:03:56,197 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 63 edges. 63 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:03:56,197 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-02-20 22:03:56,198 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:03:56,199 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-02-20 22:03:56,199 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-02-20 22:03:56,200 INFO L87 Difference]: Start difference. First operand 1043 states and 1497 transitions. Second operand has 5 states, 5 states have (on average 10.4) internal successors, (52), 3 states have internal predecessors, (52), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2022-02-20 22:04:00,753 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:04:00,754 INFO L93 Difference]: Finished difference Result 2210 states and 3192 transitions. [2022-02-20 22:04:00,754 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-02-20 22:04:00,754 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 10.4) internal successors, (52), 3 states have internal predecessors, (52), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 73 [2022-02-20 22:04:00,754 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 22:04:00,755 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 10.4) internal successors, (52), 3 states have internal predecessors, (52), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2022-02-20 22:04:00,775 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 1914 transitions. [2022-02-20 22:04:00,775 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 10.4) internal successors, (52), 3 states have internal predecessors, (52), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2022-02-20 22:04:00,794 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 1914 transitions. [2022-02-20 22:04:00,795 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 1914 transitions. [2022-02-20 22:04:02,236 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 1914 edges. 1914 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:04:02,321 INFO L225 Difference]: With dead ends: 2210 [2022-02-20 22:04:02,321 INFO L226 Difference]: Without dead ends: 1170 [2022-02-20 22:04:02,324 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2022-02-20 22:04:02,326 INFO L933 BasicCegarLoop]: 829 mSDtfsCounter, 330 mSDsluCounter, 1334 mSDsCounter, 0 mSdLazyCounter, 964 mSolverCounterSat, 322 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 340 SdHoareTripleChecker+Valid, 2163 SdHoareTripleChecker+Invalid, 1286 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 322 IncrementalHoareTripleChecker+Valid, 964 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.5s IncrementalHoareTripleChecker+Time [2022-02-20 22:04:02,327 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [340 Valid, 2163 Invalid, 1286 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [322 Valid, 964 Invalid, 0 Unknown, 0 Unchecked, 1.5s Time] [2022-02-20 22:04:02,329 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1170 states. [2022-02-20 22:04:02,354 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1170 to 1044. [2022-02-20 22:04:02,355 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 22:04:02,356 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1170 states. Second operand has 1044 states, 785 states have (on average 1.3745222929936305) internal successors, (1079), 804 states have internal predecessors, (1079), 210 states have call successors, (210), 49 states have call predecessors, (210), 48 states have return successors, (209), 209 states have call predecessors, (209), 209 states have call successors, (209) [2022-02-20 22:04:02,358 INFO L74 IsIncluded]: Start isIncluded. First operand 1170 states. Second operand has 1044 states, 785 states have (on average 1.3745222929936305) internal successors, (1079), 804 states have internal predecessors, (1079), 210 states have call successors, (210), 49 states have call predecessors, (210), 48 states have return successors, (209), 209 states have call predecessors, (209), 209 states have call successors, (209) [2022-02-20 22:04:02,359 INFO L87 Difference]: Start difference. First operand 1170 states. Second operand has 1044 states, 785 states have (on average 1.3745222929936305) internal successors, (1079), 804 states have internal predecessors, (1079), 210 states have call successors, (210), 49 states have call predecessors, (210), 48 states have return successors, (209), 209 states have call predecessors, (209), 209 states have call successors, (209) [2022-02-20 22:04:02,412 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:04:02,412 INFO L93 Difference]: Finished difference Result 1170 states and 1697 transitions. [2022-02-20 22:04:02,412 INFO L276 IsEmpty]: Start isEmpty. Operand 1170 states and 1697 transitions. [2022-02-20 22:04:02,415 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:04:02,415 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:04:02,417 INFO L74 IsIncluded]: Start isIncluded. First operand has 1044 states, 785 states have (on average 1.3745222929936305) internal successors, (1079), 804 states have internal predecessors, (1079), 210 states have call successors, (210), 49 states have call predecessors, (210), 48 states have return successors, (209), 209 states have call predecessors, (209), 209 states have call successors, (209) Second operand 1170 states. [2022-02-20 22:04:02,419 INFO L87 Difference]: Start difference. First operand has 1044 states, 785 states have (on average 1.3745222929936305) internal successors, (1079), 804 states have internal predecessors, (1079), 210 states have call successors, (210), 49 states have call predecessors, (210), 48 states have return successors, (209), 209 states have call predecessors, (209), 209 states have call successors, (209) Second operand 1170 states. [2022-02-20 22:04:02,469 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:04:02,469 INFO L93 Difference]: Finished difference Result 1170 states and 1697 transitions. [2022-02-20 22:04:02,469 INFO L276 IsEmpty]: Start isEmpty. Operand 1170 states and 1697 transitions. [2022-02-20 22:04:02,472 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:04:02,472 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:04:02,473 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 22:04:02,473 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 22:04:02,475 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1044 states, 785 states have (on average 1.3745222929936305) internal successors, (1079), 804 states have internal predecessors, (1079), 210 states have call successors, (210), 49 states have call predecessors, (210), 48 states have return successors, (209), 209 states have call predecessors, (209), 209 states have call successors, (209) [2022-02-20 22:04:02,530 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1044 states to 1044 states and 1498 transitions. [2022-02-20 22:04:02,531 INFO L78 Accepts]: Start accepts. Automaton has 1044 states and 1498 transitions. Word has length 73 [2022-02-20 22:04:02,532 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 22:04:02,532 INFO L470 AbstractCegarLoop]: Abstraction has 1044 states and 1498 transitions. [2022-02-20 22:04:02,532 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 10.4) internal successors, (52), 3 states have internal predecessors, (52), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2022-02-20 22:04:02,532 INFO L276 IsEmpty]: Start isEmpty. Operand 1044 states and 1498 transitions. [2022-02-20 22:04:02,535 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2022-02-20 22:04:02,535 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:04:02,536 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:04:02,536 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-02-20 22:04:02,536 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:04:02,536 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:04:02,536 INFO L85 PathProgramCache]: Analyzing trace with hash -1692012512, now seen corresponding path program 1 times [2022-02-20 22:04:02,537 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:04:02,537 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1976076067] [2022-02-20 22:04:02,537 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:04:02,537 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:04:02,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:04:02,648 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 12 [2022-02-20 22:04:02,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:04:02,654 INFO L290 TraceCheckUtils]: 0: Hoare triple {27822#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {27797#true} is VALID [2022-02-20 22:04:02,654 INFO L290 TraceCheckUtils]: 1: Hoare triple {27797#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {27797#true} is VALID [2022-02-20 22:04:02,655 INFO L290 TraceCheckUtils]: 2: Hoare triple {27797#true} assume true; {27797#true} is VALID [2022-02-20 22:04:02,655 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {27797#true} {27797#true} #1791#return; {27797#true} is VALID [2022-02-20 22:04:02,655 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 30 [2022-02-20 22:04:02,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:04:02,661 INFO L290 TraceCheckUtils]: 0: Hoare triple {27822#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {27797#true} is VALID [2022-02-20 22:04:02,662 INFO L290 TraceCheckUtils]: 1: Hoare triple {27797#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {27797#true} is VALID [2022-02-20 22:04:02,662 INFO L290 TraceCheckUtils]: 2: Hoare triple {27797#true} assume true; {27797#true} is VALID [2022-02-20 22:04:02,662 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {27797#true} {27798#false} #1803#return; {27798#false} is VALID [2022-02-20 22:04:02,662 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 37 [2022-02-20 22:04:02,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:04:02,671 INFO L290 TraceCheckUtils]: 0: Hoare triple {27822#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {27797#true} is VALID [2022-02-20 22:04:02,671 INFO L290 TraceCheckUtils]: 1: Hoare triple {27797#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {27797#true} is VALID [2022-02-20 22:04:02,672 INFO L290 TraceCheckUtils]: 2: Hoare triple {27797#true} assume true; {27797#true} is VALID [2022-02-20 22:04:02,672 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {27797#true} {27798#false} #1805#return; {27798#false} is VALID [2022-02-20 22:04:02,677 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2022-02-20 22:04:02,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:04:02,686 INFO L290 TraceCheckUtils]: 0: Hoare triple {27823#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~offset444 := 0; {27797#true} is VALID [2022-02-20 22:04:02,686 INFO L290 TraceCheckUtils]: 1: Hoare triple {27797#true} call #t~mem445 := read~int(src.base, src.offset + #t~offset444, 1);call write~unchecked~int(#t~mem445, dest.base, dest.offset + #t~offset444, 1); {27797#true} is VALID [2022-02-20 22:04:02,686 INFO L290 TraceCheckUtils]: 2: Hoare triple {27797#true} assume 0 == #t~mem445; {27797#true} is VALID [2022-02-20 22:04:02,686 INFO L290 TraceCheckUtils]: 3: Hoare triple {27797#true} assume #res.base == dest.base && #res.offset == dest.offset; {27797#true} is VALID [2022-02-20 22:04:02,686 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {27797#true} {27798#false} #1809#return; {27798#false} is VALID [2022-02-20 22:04:02,687 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 67 [2022-02-20 22:04:02,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:04:02,703 INFO L290 TraceCheckUtils]: 0: Hoare triple {27823#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~offset444 := 0; {27797#true} is VALID [2022-02-20 22:04:02,704 INFO L290 TraceCheckUtils]: 1: Hoare triple {27797#true} call #t~mem445 := read~int(src.base, src.offset + #t~offset444, 1);call write~unchecked~int(#t~mem445, dest.base, dest.offset + #t~offset444, 1); {27797#true} is VALID [2022-02-20 22:04:02,704 INFO L290 TraceCheckUtils]: 2: Hoare triple {27797#true} assume 0 == #t~mem445; {27797#true} is VALID [2022-02-20 22:04:02,704 INFO L290 TraceCheckUtils]: 3: Hoare triple {27797#true} assume #res.base == dest.base && #res.offset == dest.offset; {27797#true} is VALID [2022-02-20 22:04:02,704 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {27797#true} {27798#false} #1811#return; {27798#false} is VALID [2022-02-20 22:04:02,704 INFO L290 TraceCheckUtils]: 0: Hoare triple {27797#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(105, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(8, 4);call #Ultimate.allocInit(12, 5);call #Ultimate.allocInit(12, 6);call #Ultimate.allocInit(8, 7);call #Ultimate.allocInit(217, 8);call #Ultimate.allocInit(33, 9);call #Ultimate.allocInit(12, 10);call #Ultimate.allocInit(217, 11);call #Ultimate.allocInit(32, 12);call #Ultimate.allocInit(217, 13);call #Ultimate.allocInit(40, 14);call #Ultimate.allocInit(27, 15);call #Ultimate.allocInit(28, 16);call #Ultimate.allocInit(12, 17);call #Ultimate.allocInit(217, 18);call #Ultimate.allocInit(30, 19);call #Ultimate.allocInit(15, 20);call #Ultimate.allocInit(17, 21);call #Ultimate.allocInit(12, 22);call #Ultimate.allocInit(217, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(217, 25);call #Ultimate.allocInit(45, 26);call #Ultimate.allocInit(217, 27);call #Ultimate.allocInit(44, 28);call #Ultimate.allocInit(7, 29);call write~init~int(83, 29, 0, 1);call write~init~int(101, 29, 1, 1);call write~init~int(114, 29, 2, 1);call write~init~int(105, 29, 3, 1);call write~init~int(97, 29, 4, 1);call write~init~int(108, 29, 5, 1);call write~init~int(0, 29, 6, 1);call #Ultimate.allocInit(25, 30);call #Ultimate.allocInit(24, 31);call #Ultimate.allocInit(18, 32);call #Ultimate.allocInit(18, 33);call #Ultimate.allocInit(49, 34);~ldv_irq_1_3~0 := 0;~ldv_irq_data_1_1~0.base, ~ldv_irq_data_1_1~0.offset := 0, 0;~ldv_irq_1_0~0 := 0;~ldv_irq_data_1_0~0.base, ~ldv_irq_data_1_0~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_irq_data_1_3~0.base, ~ldv_irq_data_1_3~0.offset := 0, 0;~snd_uart16550_input_group0~0.base, ~snd_uart16550_input_group0~0.offset := 0, 0;~ldv_irq_data_1_2~0.base, ~ldv_irq_data_1_2~0.offset := 0, 0;~ldv_irq_1_2~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_irq_1_1~0 := 0;~ldv_timer_state_2~0 := 0;~ldv_irq_line_1_3~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_irq_line_1_0~0 := 0;~ldv_timer_list_2~0.base, ~ldv_timer_list_2~0.offset := 0, 0;~snd_serial_driver_group0~0.base, ~snd_serial_driver_group0~0.offset := 0, 0;~ref_cnt~0 := 0;~ldv_irq_line_1_1~0 := 0;~snd_uart16550_output_group0~0.base, ~snd_uart16550_output_group0~0.offset := 0, 0;~ldv_state_variable_1~0 := 0;~ldv_irq_line_1_2~0 := 0;~ldv_state_variable_4~0 := 0;~#adaptor_names~0.base, ~#adaptor_names~0.offset := 35, 0;call #Ultimate.allocInit(40, 35);call write~init~$Pointer$(3, 0, ~#adaptor_names~0.base, ~#adaptor_names~0.offset, 8);call write~init~$Pointer$(4, 0, ~#adaptor_names~0.base, 8 + ~#adaptor_names~0.offset, 8);call write~init~$Pointer$(5, 0, ~#adaptor_names~0.base, 16 + ~#adaptor_names~0.offset, 8);call write~init~$Pointer$(6, 0, ~#adaptor_names~0.base, 24 + ~#adaptor_names~0.offset, 8);call write~init~$Pointer$(7, 0, ~#adaptor_names~0.base, 32 + ~#adaptor_names~0.offset, 8);~#index~0.base, ~#index~0.offset := 36, 0;call #Ultimate.allocInit(128, 36);call write~init~int(-1, ~#index~0.base, ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 4 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 8 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 12 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 16 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 20 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 24 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 28 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 32 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 36 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 40 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 44 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 48 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 52 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 56 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 60 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 64 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 68 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 72 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 76 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 80 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 84 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 88 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 92 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 96 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 100 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 104 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 108 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 112 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 116 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 120 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 124 + ~#index~0.offset, 4);~#id~0.base, ~#id~0.offset := 37, 0;call #Ultimate.allocInit(256, 37);call write~init~$Pointer$(0, 0, ~#id~0.base, ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 8 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 16 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 24 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 32 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 40 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 48 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 56 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 64 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 72 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 80 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 88 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 96 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 104 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 112 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 120 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 128 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 136 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 144 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 152 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 160 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 168 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 176 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 184 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 192 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 200 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 208 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 216 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 224 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 232 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 240 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 248 + ~#id~0.offset, 8);~#enable~0.base, ~#enable~0.offset := 38, 0;call #Ultimate.allocInit(32, 38);call write~init~int(1, ~#enable~0.base, ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 1 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 2 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 3 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 4 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 5 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 6 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 7 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 8 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 9 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 10 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 11 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 12 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 13 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 14 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 15 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 16 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 17 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 18 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 19 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 20 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 21 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 22 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 23 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 24 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 25 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 26 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 27 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 28 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 29 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 30 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 31 + ~#enable~0.offset, 1);~#port~0.base, ~#port~0.offset := 39, 0;call #Ultimate.allocInit(256, 39);call write~init~int(1, ~#port~0.base, ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 8 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 16 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 24 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 32 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 40 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 48 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 56 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 64 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 72 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 80 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 88 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 96 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 104 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 112 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 120 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 128 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 136 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 144 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 152 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 160 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 168 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 176 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 184 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 192 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 200 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 208 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 216 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 224 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 232 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 240 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 248 + ~#port~0.offset, 8);~#irq~0.base, ~#irq~0.offset := 40, 0;call #Ultimate.allocInit(128, 40);call write~init~int(65535, ~#irq~0.base, ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 4 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 8 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 12 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 16 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 20 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 24 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 28 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 32 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 36 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 40 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 44 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 48 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 52 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 56 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 60 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 64 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 68 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 72 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 76 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 80 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 84 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 88 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 92 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 96 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 100 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 104 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 108 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 112 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 116 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 120 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 124 + ~#irq~0.offset, 4);~#speed~0.base, ~#speed~0.offset := 41, 0;call #Ultimate.allocInit(128, 41);call write~init~int(38400, ~#speed~0.base, ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 4 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 8 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 12 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 16 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 20 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 24 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 28 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 32 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 36 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 40 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 44 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 48 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 52 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 56 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 60 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 64 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 68 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 72 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 76 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 80 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 84 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 88 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 92 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 96 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 100 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 104 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 108 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 112 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 116 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 120 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 124 + ~#speed~0.offset, 4);~#base~0.base, ~#base~0.offset := 42, 0;call #Ultimate.allocInit(128, 42);call write~init~int(115200, ~#base~0.base, ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 4 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 8 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 12 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 16 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 20 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 24 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 28 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 32 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 36 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 40 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 44 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 48 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 52 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 56 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 60 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 64 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 68 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 72 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 76 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 80 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 84 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 88 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 92 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 96 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 100 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 104 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 108 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 112 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 116 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 120 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 124 + ~#base~0.offset, 4);~#outs~0.base, ~#outs~0.offset := 43, 0;call #Ultimate.allocInit(128, 43);call write~init~int(1, ~#outs~0.base, ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 4 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 8 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 12 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 16 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 20 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 24 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 28 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 32 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 36 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 40 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 44 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 48 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 52 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 56 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 60 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 64 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 68 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 72 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 76 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 80 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 84 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 88 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 92 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 96 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 100 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 104 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 108 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 112 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 116 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 120 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 124 + ~#outs~0.offset, 4);~#ins~0.base, ~#ins~0.offset := 44, 0;call #Ultimate.allocInit(128, 44);call write~init~int(1, ~#ins~0.base, ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 4 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 8 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 12 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 16 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 20 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 24 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 28 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 32 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 36 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 40 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 44 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 48 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 52 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 56 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 60 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 64 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 68 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 72 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 76 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 80 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 84 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 88 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 92 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 96 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 100 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 104 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 108 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 112 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 116 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 120 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 124 + ~#ins~0.offset, 4);~#adaptor~0.base, ~#adaptor~0.offset := 45, 0;call #Ultimate.allocInit(128, 45);call write~init~int(0, ~#adaptor~0.base, ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 4 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 8 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 12 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 16 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 20 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 24 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 28 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 32 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 36 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 40 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 44 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 48 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 52 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 56 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 60 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 64 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 68 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 72 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 76 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 80 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 84 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 88 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 92 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 96 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 100 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 104 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 108 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 112 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 116 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 120 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 124 + ~#adaptor~0.offset, 4);~#droponfull~0.base, ~#droponfull~0.offset := 46, 0;call #Ultimate.allocInit(32, 46);call write~init~int(0, ~#droponfull~0.base, ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 1 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 2 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 3 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 4 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 5 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 6 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 7 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 8 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 9 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 10 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 11 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 12 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 13 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 14 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 15 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 16 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 17 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 18 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 19 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 20 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 21 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 22 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 23 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 24 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 25 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 26 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 27 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 28 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 29 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 30 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 31 + ~#droponfull~0.offset, 1);~#devices~0.base, ~#devices~0.offset := 47, 0;call #Ultimate.allocInit(256, 47);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#devices~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#devices~0.base);~#snd_uart16550_output~0.base, ~#snd_uart16550_output~0.offset := 48, 0;call #Ultimate.allocInit(32, 48);call write~init~$Pointer$(#funAddr~snd_uart16550_output_open.base, #funAddr~snd_uart16550_output_open.offset, ~#snd_uart16550_output~0.base, ~#snd_uart16550_output~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_uart16550_output_close.base, #funAddr~snd_uart16550_output_close.offset, ~#snd_uart16550_output~0.base, 8 + ~#snd_uart16550_output~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_uart16550_output_trigger.base, #funAddr~snd_uart16550_output_trigger.offset, ~#snd_uart16550_output~0.base, 16 + ~#snd_uart16550_output~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_uart16550_output~0.base, 24 + ~#snd_uart16550_output~0.offset, 8);~#snd_uart16550_input~0.base, ~#snd_uart16550_input~0.offset := 49, 0;call #Ultimate.allocInit(32, 49);call write~init~$Pointer$(#funAddr~snd_uart16550_input_open.base, #funAddr~snd_uart16550_input_open.offset, ~#snd_uart16550_input~0.base, ~#snd_uart16550_input~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_uart16550_input_close.base, #funAddr~snd_uart16550_input_close.offset, ~#snd_uart16550_input~0.base, 8 + ~#snd_uart16550_input~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_uart16550_input_trigger.base, #funAddr~snd_uart16550_input_trigger.offset, ~#snd_uart16550_input~0.base, 16 + ~#snd_uart16550_input~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_uart16550_input~0.base, 24 + ~#snd_uart16550_input~0.offset, 8);~#snd_serial_driver~0.base, ~#snd_serial_driver~0.offset := 50, 0;call #Ultimate.allocInit(162, 50);call write~init~$Pointer$(#funAddr~snd_serial_probe.base, #funAddr~snd_serial_probe.offset, ~#snd_serial_driver~0.base, ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_serial_remove.base, #funAddr~snd_serial_remove.offset, ~#snd_serial_driver~0.base, 8 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 16 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 24 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 32 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(32, 0, ~#snd_serial_driver~0.base, 40 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 48 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#snd_serial_driver~0.base, 56 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 64 + ~#snd_serial_driver~0.offset, 8);call write~init~int(0, ~#snd_serial_driver~0.base, 72 + ~#snd_serial_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 73 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 81 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 89 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 97 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 105 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 113 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 121 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 129 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 137 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 145 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 153 + ~#snd_serial_driver~0.offset, 8);call write~init~int(0, ~#snd_serial_driver~0.base, 161 + ~#snd_serial_driver~0.offset, 1);~ldv_retval_2~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_5~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_spin~0 := 0; {27797#true} is VALID [2022-02-20 22:04:02,705 INFO L290 TraceCheckUtils]: 1: Hoare triple {27797#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet399#1, main_#t~nondet400#1, main_#t~nondet401#1, main_#t~switch402#1, main_#t~nondet403#1, main_#t~switch404#1, main_#t~ret405#1, main_#t~ret406#1, main_#t~nondet407#1, main_#t~switch408#1, main_#t~ret409#1, main_#t~nondet410#1, main_#t~switch411#1, main_#t~ret412#1, main_#t~ret413#1, main_#t~nondet414#1, main_#t~switch415#1, main_#t~ret416#1, main_#t~ret417#1, main_~ldvarg0~0#1, main_~tmp~21#1, main_~ldvarg1~0#1, main_~tmp___0~6#1, main_~tmp___1~2#1, main_~tmp___2~1#1, main_~tmp___3~0#1, main_~tmp___4~0#1, main_~tmp___5~0#1;havoc main_~ldvarg0~0#1;havoc main_~tmp~21#1;havoc main_~ldvarg1~0#1;havoc main_~tmp___0~6#1;havoc main_~tmp___1~2#1;havoc main_~tmp___2~1#1;havoc main_~tmp___3~0#1;havoc main_~tmp___4~0#1;havoc main_~tmp___5~0#1;assume -2147483648 <= main_#t~nondet399#1 && main_#t~nondet399#1 <= 2147483647;main_~tmp~21#1 := main_#t~nondet399#1;havoc main_#t~nondet399#1;main_~ldvarg0~0#1 := main_~tmp~21#1;assume -2147483648 <= main_#t~nondet400#1 && main_#t~nondet400#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet400#1;havoc main_#t~nondet400#1;main_~ldvarg1~0#1 := main_~tmp___0~6#1;assume { :begin_inline_ldv_initialize } true; {27797#true} is VALID [2022-02-20 22:04:02,705 INFO L290 TraceCheckUtils]: 2: Hoare triple {27797#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_4~0 := 0;~ldv_state_variable_1~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 1;~ldv_state_variable_5~0 := 0; {27797#true} is VALID [2022-02-20 22:04:02,705 INFO L290 TraceCheckUtils]: 3: Hoare triple {27797#true} assume -2147483648 <= main_#t~nondet401#1 && main_#t~nondet401#1 <= 2147483647;main_~tmp___1~2#1 := main_#t~nondet401#1;havoc main_#t~nondet401#1;main_#t~switch402#1 := 0 == main_~tmp___1~2#1; {27797#true} is VALID [2022-02-20 22:04:02,705 INFO L290 TraceCheckUtils]: 4: Hoare triple {27797#true} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 1 == main_~tmp___1~2#1; {27797#true} is VALID [2022-02-20 22:04:02,705 INFO L290 TraceCheckUtils]: 5: Hoare triple {27797#true} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 2 == main_~tmp___1~2#1; {27797#true} is VALID [2022-02-20 22:04:02,706 INFO L290 TraceCheckUtils]: 6: Hoare triple {27797#true} assume main_#t~switch402#1; {27797#true} is VALID [2022-02-20 22:04:02,706 INFO L290 TraceCheckUtils]: 7: Hoare triple {27797#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet407#1 && main_#t~nondet407#1 <= 2147483647;main_~tmp___3~0#1 := main_#t~nondet407#1;havoc main_#t~nondet407#1;main_#t~switch408#1 := 0 == main_~tmp___3~0#1; {27797#true} is VALID [2022-02-20 22:04:02,706 INFO L290 TraceCheckUtils]: 8: Hoare triple {27797#true} assume !main_#t~switch408#1;main_#t~switch408#1 := main_#t~switch408#1 || 1 == main_~tmp___3~0#1; {27797#true} is VALID [2022-02-20 22:04:02,706 INFO L290 TraceCheckUtils]: 9: Hoare triple {27797#true} assume main_#t~switch408#1; {27797#true} is VALID [2022-02-20 22:04:02,706 INFO L290 TraceCheckUtils]: 10: Hoare triple {27797#true} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_alsa_card_serial_init } true;havoc alsa_card_serial_init_#res#1;havoc alsa_card_serial_init_#t~ret376#1, alsa_card_serial_init_#t~mem377#1, alsa_card_serial_init_#t~ret378#1.base, alsa_card_serial_init_#t~ret378#1.offset, alsa_card_serial_init_#t~ret379#1, alsa_card_serial_init_#t~ret380#1.base, alsa_card_serial_init_#t~ret380#1.offset, alsa_card_serial_init_#t~nondet381#1, alsa_card_serial_init_~i~1#1, alsa_card_serial_init_~cards~0#1, alsa_card_serial_init_~err~3#1, alsa_card_serial_init_~device~0#1.base, alsa_card_serial_init_~device~0#1.offset, alsa_card_serial_init_~tmp~15#1, alsa_card_serial_init_~tmp___0~5#1.base, alsa_card_serial_init_~tmp___0~5#1.offset;havoc alsa_card_serial_init_~i~1#1;havoc alsa_card_serial_init_~cards~0#1;havoc alsa_card_serial_init_~err~3#1;havoc alsa_card_serial_init_~device~0#1.base, alsa_card_serial_init_~device~0#1.offset;havoc alsa_card_serial_init_~tmp~15#1;havoc alsa_card_serial_init_~tmp___0~5#1.base, alsa_card_serial_init_~tmp___0~5#1.offset;assume { :begin_inline_ldv___platform_driver_register_23 } true;ldv___platform_driver_register_23_#in~ldv_func_arg1#1.base, ldv___platform_driver_register_23_#in~ldv_func_arg1#1.offset, ldv___platform_driver_register_23_#in~ldv_func_arg2#1.base, ldv___platform_driver_register_23_#in~ldv_func_arg2#1.offset := ~#snd_serial_driver~0.base, ~#snd_serial_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset;havoc ldv___platform_driver_register_23_#res#1;havoc ldv___platform_driver_register_23_#t~ret421#1, ldv___platform_driver_register_23_~ldv_func_arg1#1.base, ldv___platform_driver_register_23_~ldv_func_arg1#1.offset, ldv___platform_driver_register_23_~ldv_func_arg2#1.base, ldv___platform_driver_register_23_~ldv_func_arg2#1.offset, ldv___platform_driver_register_23_~ldv_func_res~2#1, ldv___platform_driver_register_23_~tmp~24#1;ldv___platform_driver_register_23_~ldv_func_arg1#1.base, ldv___platform_driver_register_23_~ldv_func_arg1#1.offset := ldv___platform_driver_register_23_#in~ldv_func_arg1#1.base, ldv___platform_driver_register_23_#in~ldv_func_arg1#1.offset;ldv___platform_driver_register_23_~ldv_func_arg2#1.base, ldv___platform_driver_register_23_~ldv_func_arg2#1.offset := ldv___platform_driver_register_23_#in~ldv_func_arg2#1.base, ldv___platform_driver_register_23_#in~ldv_func_arg2#1.offset;havoc ldv___platform_driver_register_23_~ldv_func_res~2#1;havoc ldv___platform_driver_register_23_~tmp~24#1;assume { :begin_inline___platform_driver_register } true;__platform_driver_register_#in~arg0#1.base, __platform_driver_register_#in~arg0#1.offset, __platform_driver_register_#in~arg1#1.base, __platform_driver_register_#in~arg1#1.offset := ldv___platform_driver_register_23_~ldv_func_arg1#1.base, ldv___platform_driver_register_23_~ldv_func_arg1#1.offset, ldv___platform_driver_register_23_~ldv_func_arg2#1.base, ldv___platform_driver_register_23_~ldv_func_arg2#1.offset;havoc __platform_driver_register_#res#1;havoc __platform_driver_register_#t~nondet424#1, __platform_driver_register_~arg0#1.base, __platform_driver_register_~arg0#1.offset, __platform_driver_register_~arg1#1.base, __platform_driver_register_~arg1#1.offset;__platform_driver_register_~arg0#1.base, __platform_driver_register_~arg0#1.offset := __platform_driver_register_#in~arg0#1.base, __platform_driver_register_#in~arg0#1.offset;__platform_driver_register_~arg1#1.base, __platform_driver_register_~arg1#1.offset := __platform_driver_register_#in~arg1#1.base, __platform_driver_register_#in~arg1#1.offset;assume -2147483648 <= __platform_driver_register_#t~nondet424#1 && __platform_driver_register_#t~nondet424#1 <= 2147483647;__platform_driver_register_#res#1 := __platform_driver_register_#t~nondet424#1;havoc __platform_driver_register_#t~nondet424#1; {27797#true} is VALID [2022-02-20 22:04:02,711 INFO L290 TraceCheckUtils]: 11: Hoare triple {27797#true} ldv___platform_driver_register_23_#t~ret421#1 := __platform_driver_register_#res#1;assume { :end_inline___platform_driver_register } true;assume -2147483648 <= ldv___platform_driver_register_23_#t~ret421#1 && ldv___platform_driver_register_23_#t~ret421#1 <= 2147483647;ldv___platform_driver_register_23_~tmp~24#1 := ldv___platform_driver_register_23_#t~ret421#1;havoc ldv___platform_driver_register_23_#t~ret421#1;ldv___platform_driver_register_23_~ldv_func_res~2#1 := ldv___platform_driver_register_23_~tmp~24#1;~ldv_state_variable_3~0 := 1;assume { :begin_inline_ldv_initialize_platform_driver_3 } true;havoc ldv_initialize_platform_driver_3_#t~ret392#1.base, ldv_initialize_platform_driver_3_#t~ret392#1.offset, ldv_initialize_platform_driver_3_~tmp~19#1.base, ldv_initialize_platform_driver_3_~tmp~19#1.offset;havoc ldv_initialize_platform_driver_3_~tmp~19#1.base, ldv_initialize_platform_driver_3_~tmp~19#1.offset; {27797#true} is VALID [2022-02-20 22:04:02,712 INFO L272 TraceCheckUtils]: 12: Hoare triple {27797#true} call ldv_initialize_platform_driver_3_#t~ret392#1.base, ldv_initialize_platform_driver_3_#t~ret392#1.offset := ldv_zalloc(1464); {27822#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:04:02,712 INFO L290 TraceCheckUtils]: 13: Hoare triple {27822#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {27797#true} is VALID [2022-02-20 22:04:02,712 INFO L290 TraceCheckUtils]: 14: Hoare triple {27797#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {27797#true} is VALID [2022-02-20 22:04:02,712 INFO L290 TraceCheckUtils]: 15: Hoare triple {27797#true} assume true; {27797#true} is VALID [2022-02-20 22:04:02,712 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {27797#true} {27797#true} #1791#return; {27797#true} is VALID [2022-02-20 22:04:02,712 INFO L290 TraceCheckUtils]: 17: Hoare triple {27797#true} ldv_initialize_platform_driver_3_~tmp~19#1.base, ldv_initialize_platform_driver_3_~tmp~19#1.offset := ldv_initialize_platform_driver_3_#t~ret392#1.base, ldv_initialize_platform_driver_3_#t~ret392#1.offset;havoc ldv_initialize_platform_driver_3_#t~ret392#1.base, ldv_initialize_platform_driver_3_#t~ret392#1.offset;~snd_serial_driver_group0~0.base, ~snd_serial_driver_group0~0.offset := ldv_initialize_platform_driver_3_~tmp~19#1.base, ldv_initialize_platform_driver_3_~tmp~19#1.offset; {27797#true} is VALID [2022-02-20 22:04:02,712 INFO L290 TraceCheckUtils]: 18: Hoare triple {27797#true} assume { :end_inline_ldv_initialize_platform_driver_3 } true;ldv___platform_driver_register_23_#res#1 := ldv___platform_driver_register_23_~ldv_func_res~2#1; {27797#true} is VALID [2022-02-20 22:04:02,713 INFO L290 TraceCheckUtils]: 19: Hoare triple {27797#true} alsa_card_serial_init_#t~ret376#1 := ldv___platform_driver_register_23_#res#1;assume { :end_inline_ldv___platform_driver_register_23 } true;assume -2147483648 <= alsa_card_serial_init_#t~ret376#1 && alsa_card_serial_init_#t~ret376#1 <= 2147483647;alsa_card_serial_init_~err~3#1 := alsa_card_serial_init_#t~ret376#1;havoc alsa_card_serial_init_#t~ret376#1; {27797#true} is VALID [2022-02-20 22:04:02,713 INFO L290 TraceCheckUtils]: 20: Hoare triple {27797#true} assume !(alsa_card_serial_init_~err~3#1 < 0);alsa_card_serial_init_~cards~0#1 := 0;alsa_card_serial_init_~i~1#1 := 0; {27803#(= |ULTIMATE.start_alsa_card_serial_init_~cards~0#1| 0)} is VALID [2022-02-20 22:04:02,713 INFO L290 TraceCheckUtils]: 21: Hoare triple {27803#(= |ULTIMATE.start_alsa_card_serial_init_~cards~0#1| 0)} assume alsa_card_serial_init_~i~1#1 <= 31; {27803#(= |ULTIMATE.start_alsa_card_serial_init_~cards~0#1| 0)} is VALID [2022-02-20 22:04:02,713 INFO L290 TraceCheckUtils]: 22: Hoare triple {27803#(= |ULTIMATE.start_alsa_card_serial_init_~cards~0#1| 0)} call alsa_card_serial_init_#t~mem377#1 := read~int(~#enable~0.base, ~#enable~0.offset + alsa_card_serial_init_~i~1#1, 1); {27803#(= |ULTIMATE.start_alsa_card_serial_init_~cards~0#1| 0)} is VALID [2022-02-20 22:04:02,714 INFO L290 TraceCheckUtils]: 23: Hoare triple {27803#(= |ULTIMATE.start_alsa_card_serial_init_~cards~0#1| 0)} assume 0 == alsa_card_serial_init_#t~mem377#1 % 256;havoc alsa_card_serial_init_#t~mem377#1; {27803#(= |ULTIMATE.start_alsa_card_serial_init_~cards~0#1| 0)} is VALID [2022-02-20 22:04:02,714 INFO L290 TraceCheckUtils]: 24: Hoare triple {27803#(= |ULTIMATE.start_alsa_card_serial_init_~cards~0#1| 0)} alsa_card_serial_init_~i~1#1 := 1 + alsa_card_serial_init_~i~1#1; {27803#(= |ULTIMATE.start_alsa_card_serial_init_~cards~0#1| 0)} is VALID [2022-02-20 22:04:02,714 INFO L290 TraceCheckUtils]: 25: Hoare triple {27803#(= |ULTIMATE.start_alsa_card_serial_init_~cards~0#1| 0)} assume !(alsa_card_serial_init_~i~1#1 <= 31); {27803#(= |ULTIMATE.start_alsa_card_serial_init_~cards~0#1| 0)} is VALID [2022-02-20 22:04:02,715 INFO L290 TraceCheckUtils]: 26: Hoare triple {27803#(= |ULTIMATE.start_alsa_card_serial_init_~cards~0#1| 0)} assume !(0 == alsa_card_serial_init_~cards~0#1);alsa_card_serial_init_#res#1 := 0; {27798#false} is VALID [2022-02-20 22:04:02,715 INFO L290 TraceCheckUtils]: 27: Hoare triple {27798#false} main_#t~ret409#1 := alsa_card_serial_init_#res#1;assume { :end_inline_alsa_card_serial_init } true;assume -2147483648 <= main_#t~ret409#1 && main_#t~ret409#1 <= 2147483647;~ldv_retval_2~0 := main_#t~ret409#1;havoc main_#t~ret409#1; {27798#false} is VALID [2022-02-20 22:04:02,715 INFO L290 TraceCheckUtils]: 28: Hoare triple {27798#false} assume !(0 != ~ldv_retval_2~0); {27798#false} is VALID [2022-02-20 22:04:02,715 INFO L290 TraceCheckUtils]: 29: Hoare triple {27798#false} assume 0 == ~ldv_retval_2~0;~ldv_state_variable_0~0 := 2;~ldv_state_variable_5~0 := 1;assume { :begin_inline_ldv_initialize_snd_rawmidi_ops_5 } true;havoc ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.base, ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.offset, ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.base, ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.offset;havoc ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.base, ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.offset; {27798#false} is VALID [2022-02-20 22:04:02,715 INFO L272 TraceCheckUtils]: 30: Hoare triple {27798#false} call ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.base, ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.offset := ldv_zalloc(112); {27822#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:04:02,715 INFO L290 TraceCheckUtils]: 31: Hoare triple {27822#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {27797#true} is VALID [2022-02-20 22:04:02,715 INFO L290 TraceCheckUtils]: 32: Hoare triple {27797#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {27797#true} is VALID [2022-02-20 22:04:02,716 INFO L290 TraceCheckUtils]: 33: Hoare triple {27797#true} assume true; {27797#true} is VALID [2022-02-20 22:04:02,716 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {27797#true} {27798#false} #1803#return; {27798#false} is VALID [2022-02-20 22:04:02,716 INFO L290 TraceCheckUtils]: 35: Hoare triple {27798#false} ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.base, ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.offset := ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.base, ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.offset;havoc ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.base, ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.offset;~snd_uart16550_output_group0~0.base, ~snd_uart16550_output_group0~0.offset := ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.base, ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.offset; {27798#false} is VALID [2022-02-20 22:04:02,716 INFO L290 TraceCheckUtils]: 36: Hoare triple {27798#false} assume { :end_inline_ldv_initialize_snd_rawmidi_ops_5 } true;~ldv_state_variable_4~0 := 1;assume { :begin_inline_ldv_initialize_snd_rawmidi_ops_4 } true;havoc ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.base, ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.offset, ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.base, ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.offset;havoc ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.base, ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.offset; {27798#false} is VALID [2022-02-20 22:04:02,716 INFO L272 TraceCheckUtils]: 37: Hoare triple {27798#false} call ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.base, ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.offset := ldv_zalloc(112); {27822#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:04:02,716 INFO L290 TraceCheckUtils]: 38: Hoare triple {27822#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {27797#true} is VALID [2022-02-20 22:04:02,716 INFO L290 TraceCheckUtils]: 39: Hoare triple {27797#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {27797#true} is VALID [2022-02-20 22:04:02,716 INFO L290 TraceCheckUtils]: 40: Hoare triple {27797#true} assume true; {27797#true} is VALID [2022-02-20 22:04:02,717 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {27797#true} {27798#false} #1805#return; {27798#false} is VALID [2022-02-20 22:04:02,717 INFO L290 TraceCheckUtils]: 42: Hoare triple {27798#false} ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.base, ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.offset := ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.base, ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.offset;havoc ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.base, ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.offset;~snd_uart16550_input_group0~0.base, ~snd_uart16550_input_group0~0.offset := ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.base, ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.offset; {27798#false} is VALID [2022-02-20 22:04:02,717 INFO L290 TraceCheckUtils]: 43: Hoare triple {27798#false} assume { :end_inline_ldv_initialize_snd_rawmidi_ops_4 } true; {27798#false} is VALID [2022-02-20 22:04:02,717 INFO L290 TraceCheckUtils]: 44: Hoare triple {27798#false} assume -2147483648 <= main_#t~nondet401#1 && main_#t~nondet401#1 <= 2147483647;main_~tmp___1~2#1 := main_#t~nondet401#1;havoc main_#t~nondet401#1;main_#t~switch402#1 := 0 == main_~tmp___1~2#1; {27798#false} is VALID [2022-02-20 22:04:02,721 INFO L290 TraceCheckUtils]: 45: Hoare triple {27798#false} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 1 == main_~tmp___1~2#1; {27798#false} is VALID [2022-02-20 22:04:02,721 INFO L290 TraceCheckUtils]: 46: Hoare triple {27798#false} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 2 == main_~tmp___1~2#1; {27798#false} is VALID [2022-02-20 22:04:02,722 INFO L290 TraceCheckUtils]: 47: Hoare triple {27798#false} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 3 == main_~tmp___1~2#1; {27798#false} is VALID [2022-02-20 22:04:02,723 INFO L290 TraceCheckUtils]: 48: Hoare triple {27798#false} assume main_#t~switch402#1; {27798#false} is VALID [2022-02-20 22:04:02,726 INFO L290 TraceCheckUtils]: 49: Hoare triple {27798#false} assume 0 != ~ldv_state_variable_3~0;assume -2147483648 <= main_#t~nondet410#1 && main_#t~nondet410#1 <= 2147483647;main_~tmp___4~0#1 := main_#t~nondet410#1;havoc main_#t~nondet410#1;main_#t~switch411#1 := 0 == main_~tmp___4~0#1; {27798#false} is VALID [2022-02-20 22:04:02,726 INFO L290 TraceCheckUtils]: 50: Hoare triple {27798#false} assume main_#t~switch411#1; {27798#false} is VALID [2022-02-20 22:04:02,728 INFO L290 TraceCheckUtils]: 51: Hoare triple {27798#false} assume 1 == ~ldv_state_variable_3~0;assume { :begin_inline_snd_serial_probe } true;snd_serial_probe_#in~devptr#1.base, snd_serial_probe_#in~devptr#1.offset := ~snd_serial_driver_group0~0.base, ~snd_serial_driver_group0~0.offset;havoc snd_serial_probe_#res#1;havoc snd_serial_probe_#t~mem326#1, snd_serial_probe_#t~mem327#1, snd_serial_probe_#t~switch328#1, snd_serial_probe_#t~mem329#1, snd_serial_probe_#t~mem330#1, snd_serial_probe_#t~mem331#1, snd_serial_probe_#t~short332#1, snd_serial_probe_#t~mem333#1, snd_serial_probe_#t~mem334#1, snd_serial_probe_#t~mem335#1, snd_serial_probe_#t~short336#1, snd_serial_probe_#t~mem337#1, snd_serial_probe_#t~mem338#1, snd_serial_probe_#t~mem339#1.base, snd_serial_probe_#t~mem339#1.offset, snd_serial_probe_#t~ret340#1, snd_serial_probe_#t~mem341#1.base, snd_serial_probe_#t~mem341#1.offset, snd_serial_probe_#t~strcpy~res342#1.base, snd_serial_probe_#t~strcpy~res342#1.offset, snd_serial_probe_#t~mem343#1.base, snd_serial_probe_#t~mem343#1.offset, snd_serial_probe_#t~strcpy~res344#1.base, snd_serial_probe_#t~strcpy~res344#1.offset, snd_serial_probe_#t~mem345#1.base, snd_serial_probe_#t~mem345#1.offset, snd_serial_probe_#t~mem346#1, snd_serial_probe_#t~mem347#1, snd_serial_probe_#t~mem348#1, snd_serial_probe_#t~mem349#1, snd_serial_probe_#t~mem350#1, snd_serial_probe_#t~mem351#1, snd_serial_probe_#t~ret352#1, snd_serial_probe_#t~mem353#1.base, snd_serial_probe_#t~mem353#1.offset, snd_serial_probe_#t~mem354#1, snd_serial_probe_#t~mem355#1, snd_serial_probe_#t~mem356#1.base, snd_serial_probe_#t~mem356#1.offset, snd_serial_probe_#t~ret357#1, snd_serial_probe_#t~nondet358#1, snd_serial_probe_#t~mem359#1.base, snd_serial_probe_#t~mem359#1.offset, snd_serial_probe_#t~mem360#1.base, snd_serial_probe_#t~mem360#1.offset, snd_serial_probe_#t~mem361#1.base, snd_serial_probe_#t~mem361#1.offset, snd_serial_probe_#t~mem362#1, snd_serial_probe_#t~mem363#1.base, snd_serial_probe_#t~mem363#1.offset, snd_serial_probe_#t~mem364#1.base, snd_serial_probe_#t~mem364#1.offset, snd_serial_probe_#t~mem365#1, snd_serial_probe_#t~mem366#1.base, snd_serial_probe_#t~mem366#1.offset, snd_serial_probe_#t~mem367#1, snd_serial_probe_#t~mem368#1.base, snd_serial_probe_#t~mem368#1.offset, snd_serial_probe_#t~ret369#1, snd_serial_probe_#t~mem370#1.base, snd_serial_probe_#t~mem370#1.offset, snd_serial_probe_#t~mem371#1.base, snd_serial_probe_#t~mem371#1.offset, snd_serial_probe_#t~ret372#1, snd_serial_probe_~devptr#1.base, snd_serial_probe_~devptr#1.offset, snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset, snd_serial_probe_~#uart~11#1.base, snd_serial_probe_~#uart~11#1.offset, snd_serial_probe_~err~2#1, snd_serial_probe_~dev~0#1;snd_serial_probe_~devptr#1.base, snd_serial_probe_~devptr#1.offset := snd_serial_probe_#in~devptr#1.base, snd_serial_probe_#in~devptr#1.offset;call snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset := #Ultimate.allocOnStack(8);call snd_serial_probe_~#uart~11#1.base, snd_serial_probe_~#uart~11#1.offset := #Ultimate.allocOnStack(8);havoc snd_serial_probe_~err~2#1;havoc snd_serial_probe_~dev~0#1;call snd_serial_probe_#t~mem326#1 := read~int(snd_serial_probe_~devptr#1.base, 8 + snd_serial_probe_~devptr#1.offset, 4);snd_serial_probe_~dev~0#1 := snd_serial_probe_#t~mem326#1;havoc snd_serial_probe_#t~mem326#1;call snd_serial_probe_#t~mem327#1 := read~int(~#adaptor~0.base, ~#adaptor~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);snd_serial_probe_#t~switch328#1 := 0 == snd_serial_probe_#t~mem327#1; {27798#false} is VALID [2022-02-20 22:04:02,728 INFO L290 TraceCheckUtils]: 52: Hoare triple {27798#false} assume snd_serial_probe_#t~switch328#1;call write~int(1, ~#ins~0.base, ~#ins~0.offset + 4 * snd_serial_probe_~dev~0#1, 4); {27798#false} is VALID [2022-02-20 22:04:02,728 INFO L290 TraceCheckUtils]: 53: Hoare triple {27798#false} call snd_serial_probe_#t~mem330#1 := read~int(~#outs~0.base, ~#outs~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);snd_serial_probe_#t~short332#1 := snd_serial_probe_#t~mem330#1 <= 0; {27798#false} is VALID [2022-02-20 22:04:02,728 INFO L290 TraceCheckUtils]: 54: Hoare triple {27798#false} assume snd_serial_probe_#t~short332#1; {27798#false} is VALID [2022-02-20 22:04:02,728 INFO L290 TraceCheckUtils]: 55: Hoare triple {27798#false} assume !snd_serial_probe_#t~short332#1;havoc snd_serial_probe_#t~mem330#1;havoc snd_serial_probe_#t~mem331#1;havoc snd_serial_probe_#t~short332#1;call snd_serial_probe_#t~mem334#1 := read~int(~#ins~0.base, ~#ins~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);snd_serial_probe_#t~short336#1 := snd_serial_probe_#t~mem334#1 <= 0; {27798#false} is VALID [2022-02-20 22:04:02,728 INFO L290 TraceCheckUtils]: 56: Hoare triple {27798#false} assume snd_serial_probe_#t~short336#1; {27798#false} is VALID [2022-02-20 22:04:02,728 INFO L290 TraceCheckUtils]: 57: Hoare triple {27798#false} assume !snd_serial_probe_#t~short336#1;havoc snd_serial_probe_#t~mem334#1;havoc snd_serial_probe_#t~mem335#1;havoc snd_serial_probe_#t~short336#1;call snd_serial_probe_#t~mem338#1 := read~int(~#index~0.base, ~#index~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem339#1.base, snd_serial_probe_#t~mem339#1.offset := read~$Pointer$(~#id~0.base, ~#id~0.offset + 8 * snd_serial_probe_~dev~0#1, 8);assume { :begin_inline_snd_card_new } true;snd_card_new_#in~arg0#1.base, snd_card_new_#in~arg0#1.offset, snd_card_new_#in~arg1#1, snd_card_new_#in~arg2#1.base, snd_card_new_#in~arg2#1.offset, snd_card_new_#in~arg3#1.base, snd_card_new_#in~arg3#1.offset, snd_card_new_#in~arg4#1, snd_card_new_#in~arg5#1.base, snd_card_new_#in~arg5#1.offset := snd_serial_probe_~devptr#1.base, 13 + snd_serial_probe_~devptr#1.offset, snd_serial_probe_#t~mem338#1, snd_serial_probe_#t~mem339#1.base, snd_serial_probe_#t~mem339#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 0, snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset;havoc snd_card_new_#res#1;havoc snd_card_new_#t~nondet433#1, snd_card_new_~arg0#1.base, snd_card_new_~arg0#1.offset, snd_card_new_~arg1#1, snd_card_new_~arg2#1.base, snd_card_new_~arg2#1.offset, snd_card_new_~arg3#1.base, snd_card_new_~arg3#1.offset, snd_card_new_~arg4#1, snd_card_new_~arg5#1.base, snd_card_new_~arg5#1.offset;snd_card_new_~arg0#1.base, snd_card_new_~arg0#1.offset := snd_card_new_#in~arg0#1.base, snd_card_new_#in~arg0#1.offset;snd_card_new_~arg1#1 := snd_card_new_#in~arg1#1;snd_card_new_~arg2#1.base, snd_card_new_~arg2#1.offset := snd_card_new_#in~arg2#1.base, snd_card_new_#in~arg2#1.offset;snd_card_new_~arg3#1.base, snd_card_new_~arg3#1.offset := snd_card_new_#in~arg3#1.base, snd_card_new_#in~arg3#1.offset;snd_card_new_~arg4#1 := snd_card_new_#in~arg4#1;snd_card_new_~arg5#1.base, snd_card_new_~arg5#1.offset := snd_card_new_#in~arg5#1.base, snd_card_new_#in~arg5#1.offset;assume -2147483648 <= snd_card_new_#t~nondet433#1 && snd_card_new_#t~nondet433#1 <= 2147483647;snd_card_new_#res#1 := snd_card_new_#t~nondet433#1;havoc snd_card_new_#t~nondet433#1; {27798#false} is VALID [2022-02-20 22:04:02,729 INFO L290 TraceCheckUtils]: 58: Hoare triple {27798#false} snd_serial_probe_#t~ret340#1 := snd_card_new_#res#1;assume { :end_inline_snd_card_new } true;assume -2147483648 <= snd_serial_probe_#t~ret340#1 && snd_serial_probe_#t~ret340#1 <= 2147483647;snd_serial_probe_~err~2#1 := snd_serial_probe_#t~ret340#1;havoc snd_serial_probe_#t~mem338#1;havoc snd_serial_probe_#t~mem339#1.base, snd_serial_probe_#t~mem339#1.offset;havoc snd_serial_probe_#t~ret340#1; {27798#false} is VALID [2022-02-20 22:04:02,729 INFO L290 TraceCheckUtils]: 59: Hoare triple {27798#false} assume !(snd_serial_probe_~err~2#1 < 0);call snd_serial_probe_#t~mem341#1.base, snd_serial_probe_#t~mem341#1.offset := read~$Pointer$(snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset, 8); {27798#false} is VALID [2022-02-20 22:04:02,730 INFO L272 TraceCheckUtils]: 60: Hoare triple {27798#false} call snd_serial_probe_#t~strcpy~res342#1.base, snd_serial_probe_#t~strcpy~res342#1.offset := #Ultimate.C_strcpy(snd_serial_probe_#t~mem341#1.base, 20 + snd_serial_probe_#t~mem341#1.offset, 29, 0); {27823#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:04:02,730 INFO L290 TraceCheckUtils]: 61: Hoare triple {27823#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~offset444 := 0; {27797#true} is VALID [2022-02-20 22:04:02,730 INFO L290 TraceCheckUtils]: 62: Hoare triple {27797#true} call #t~mem445 := read~int(src.base, src.offset + #t~offset444, 1);call write~unchecked~int(#t~mem445, dest.base, dest.offset + #t~offset444, 1); {27797#true} is VALID [2022-02-20 22:04:02,730 INFO L290 TraceCheckUtils]: 63: Hoare triple {27797#true} assume 0 == #t~mem445; {27797#true} is VALID [2022-02-20 22:04:02,730 INFO L290 TraceCheckUtils]: 64: Hoare triple {27797#true} assume #res.base == dest.base && #res.offset == dest.offset; {27797#true} is VALID [2022-02-20 22:04:02,730 INFO L284 TraceCheckUtils]: 65: Hoare quadruple {27797#true} {27798#false} #1809#return; {27798#false} is VALID [2022-02-20 22:04:02,731 INFO L290 TraceCheckUtils]: 66: Hoare triple {27798#false} havoc snd_serial_probe_#t~mem341#1.base, snd_serial_probe_#t~mem341#1.offset;havoc snd_serial_probe_#t~strcpy~res342#1.base, snd_serial_probe_#t~strcpy~res342#1.offset;call snd_serial_probe_#t~mem343#1.base, snd_serial_probe_#t~mem343#1.offset := read~$Pointer$(snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset, 8); {27798#false} is VALID [2022-02-20 22:04:02,731 INFO L272 TraceCheckUtils]: 67: Hoare triple {27798#false} call snd_serial_probe_#t~strcpy~res344#1.base, snd_serial_probe_#t~strcpy~res344#1.offset := #Ultimate.C_strcpy(snd_serial_probe_#t~mem343#1.base, 36 + snd_serial_probe_#t~mem343#1.offset, 30, 0); {27823#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:04:02,731 INFO L290 TraceCheckUtils]: 68: Hoare triple {27823#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~offset444 := 0; {27797#true} is VALID [2022-02-20 22:04:02,733 INFO L290 TraceCheckUtils]: 69: Hoare triple {27797#true} call #t~mem445 := read~int(src.base, src.offset + #t~offset444, 1);call write~unchecked~int(#t~mem445, dest.base, dest.offset + #t~offset444, 1); {27797#true} is VALID [2022-02-20 22:04:02,734 INFO L290 TraceCheckUtils]: 70: Hoare triple {27797#true} assume 0 == #t~mem445; {27797#true} is VALID [2022-02-20 22:04:02,734 INFO L290 TraceCheckUtils]: 71: Hoare triple {27797#true} assume #res.base == dest.base && #res.offset == dest.offset; {27797#true} is VALID [2022-02-20 22:04:02,734 INFO L284 TraceCheckUtils]: 72: Hoare quadruple {27797#true} {27798#false} #1811#return; {27798#false} is VALID [2022-02-20 22:04:02,734 INFO L290 TraceCheckUtils]: 73: Hoare triple {27798#false} havoc snd_serial_probe_#t~mem343#1.base, snd_serial_probe_#t~mem343#1.offset;havoc snd_serial_probe_#t~strcpy~res344#1.base, snd_serial_probe_#t~strcpy~res344#1.offset;call snd_serial_probe_#t~mem345#1.base, snd_serial_probe_#t~mem345#1.offset := read~$Pointer$(snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset, 8);call snd_serial_probe_#t~mem346#1 := read~int(~#port~0.base, ~#port~0.offset + 8 * snd_serial_probe_~dev~0#1, 8);call snd_serial_probe_#t~mem347#1 := read~int(~#irq~0.base, ~#irq~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem348#1 := read~int(~#speed~0.base, ~#speed~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem349#1 := read~int(~#base~0.base, ~#base~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem350#1 := read~int(~#adaptor~0.base, ~#adaptor~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem351#1 := read~int(~#droponfull~0.base, ~#droponfull~0.offset + snd_serial_probe_~dev~0#1, 1);assume { :begin_inline_snd_uart16550_create } true;snd_uart16550_create_#in~card#1.base, snd_uart16550_create_#in~card#1.offset, snd_uart16550_create_#in~iobase#1, snd_uart16550_create_#in~irq___0#1, snd_uart16550_create_#in~speed___0#1, snd_uart16550_create_#in~base___0#1, snd_uart16550_create_#in~adaptor___0#1, snd_uart16550_create_#in~droponfull___0#1, snd_uart16550_create_#in~ruart#1.base, snd_uart16550_create_#in~ruart#1.offset := snd_serial_probe_#t~mem345#1.base, snd_serial_probe_#t~mem345#1.offset, snd_serial_probe_#t~mem346#1, snd_serial_probe_#t~mem347#1, snd_serial_probe_#t~mem348#1, snd_serial_probe_#t~mem349#1, snd_serial_probe_#t~mem350#1, snd_serial_probe_#t~mem351#1 % 256, snd_serial_probe_~#uart~11#1.base, snd_serial_probe_~#uart~11#1.offset;havoc snd_uart16550_create_#res#1;havoc snd_uart16550_create_#t~ret296#1.base, snd_uart16550_create_#t~ret296#1.offset, snd_uart16550_create_#t~ret297#1.base, snd_uart16550_create_#t~ret297#1.offset, snd_uart16550_create_#t~ret298#1, snd_uart16550_create_#t~nondet299#1, snd_uart16550_create_#t~ret300#1, snd_uart16550_create_#t~ret301#1, snd_uart16550_create_#t~mem302#1, snd_uart16550_create_#t~memset~res303#1.base, snd_uart16550_create_#t~memset~res303#1.offset, snd_uart16550_create_#t~ret304#1, snd_uart16550_create_#t~ret305#1, snd_uart16550_create_#t~ret306#1, snd_uart16550_create_#t~mem307#1, snd_uart16550_create_#t~switch308#1, snd_uart16550_create_#t~mem309#1, snd_uart16550_create_#t~mem310#1, snd_uart16550_create_~card#1.base, snd_uart16550_create_~card#1.offset, snd_uart16550_create_~iobase#1, snd_uart16550_create_~irq___0#1, snd_uart16550_create_~speed___0#1, snd_uart16550_create_~base___0#1, snd_uart16550_create_~adaptor___0#1, snd_uart16550_create_~droponfull___0#1, snd_uart16550_create_~ruart#1.base, snd_uart16550_create_~ruart#1.offset, snd_uart16550_create_~#ops~0#1.base, snd_uart16550_create_~#ops~0#1.offset, snd_uart16550_create_~uart~10#1.base, snd_uart16550_create_~uart~10#1.offset, snd_uart16550_create_~err~0#1, snd_uart16550_create_~tmp~13#1.base, snd_uart16550_create_~tmp~13#1.offset, snd_uart16550_create_~#__key~0#1.base, snd_uart16550_create_~#__key~0#1.offset, snd_uart16550_create_~tmp___0~4#1;snd_uart16550_create_~card#1.base, snd_uart16550_create_~card#1.offset := snd_uart16550_create_#in~card#1.base, snd_uart16550_create_#in~card#1.offset;snd_uart16550_create_~iobase#1 := snd_uart16550_create_#in~iobase#1;snd_uart16550_create_~irq___0#1 := snd_uart16550_create_#in~irq___0#1;snd_uart16550_create_~speed___0#1 := snd_uart16550_create_#in~speed___0#1;snd_uart16550_create_~base___0#1 := snd_uart16550_create_#in~base___0#1;snd_uart16550_create_~adaptor___0#1 := snd_uart16550_create_#in~adaptor___0#1;snd_uart16550_create_~droponfull___0#1 := snd_uart16550_create_#in~droponfull___0#1;snd_uart16550_create_~ruart#1.base, snd_uart16550_create_~ruart#1.offset := snd_uart16550_create_#in~ruart#1.base, snd_uart16550_create_#in~ruart#1.offset;call snd_uart16550_create_~#ops~0#1.base, snd_uart16550_create_~#ops~0#1.offset := #Ultimate.allocOnStack(24);havoc snd_uart16550_create_~uart~10#1.base, snd_uart16550_create_~uart~10#1.offset;havoc snd_uart16550_create_~err~0#1;havoc snd_uart16550_create_~tmp~13#1.base, snd_uart16550_create_~tmp~13#1.offset;call snd_uart16550_create_~#__key~0#1.base, snd_uart16550_create_~#__key~0#1.offset := #Ultimate.allocOnStack(8);havoc snd_uart16550_create_~tmp___0~4#1;call write~$Pointer$(#funAddr~snd_uart16550_dev_free.base, #funAddr~snd_uart16550_dev_free.offset, snd_uart16550_create_~#ops~0#1.base, snd_uart16550_create_~#ops~0#1.offset, 8);call write~$Pointer$(0, 0, snd_uart16550_create_~#ops~0#1.base, 8 + snd_uart16550_create_~#ops~0#1.offset, 8);call write~$Pointer$(0, 0, snd_uart16550_create_~#ops~0#1.base, 16 + snd_uart16550_create_~#ops~0#1.offset, 8);assume { :begin_inline_kzalloc } true;kzalloc_#in~size#1, kzalloc_#in~flags#1 := 33344, 208;havoc kzalloc_#res#1.base, kzalloc_#res#1.offset;havoc kzalloc_~size#1, kzalloc_~flags#1;kzalloc_~size#1 := kzalloc_#in~size#1;kzalloc_~flags#1 := kzalloc_#in~flags#1;assume { :begin_inline_ldv_check_alloc_flags } true;ldv_check_alloc_flags_#in~flags#1 := kzalloc_~flags#1;havoc ldv_check_alloc_flags_~flags#1;ldv_check_alloc_flags_~flags#1 := ldv_check_alloc_flags_#in~flags#1; {27798#false} is VALID [2022-02-20 22:04:02,734 INFO L290 TraceCheckUtils]: 74: Hoare triple {27798#false} assume !(0 == ~ldv_spin~0 || 0 == (if 0 == ldv_check_alloc_flags_~flags#1 then 0 else (if 1 == ldv_check_alloc_flags_~flags#1 then 0 else ~bitwiseAnd(ldv_check_alloc_flags_~flags#1, 16))) % 4294967296); {27798#false} is VALID [2022-02-20 22:04:02,734 INFO L272 TraceCheckUtils]: 75: Hoare triple {27798#false} call ldv_error(); {27798#false} is VALID [2022-02-20 22:04:02,734 INFO L290 TraceCheckUtils]: 76: Hoare triple {27798#false} assume !false; {27798#false} is VALID [2022-02-20 22:04:02,735 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2022-02-20 22:04:02,735 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:04:02,735 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1976076067] [2022-02-20 22:04:02,735 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1976076067] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:04:02,735 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 22:04:02,735 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-02-20 22:04:02,735 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1793221703] [2022-02-20 22:04:02,736 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:04:02,736 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 11.2) internal successors, (56), 3 states have internal predecessors, (56), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 77 [2022-02-20 22:04:02,736 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:04:02,737 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 11.2) internal successors, (56), 3 states have internal predecessors, (56), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2022-02-20 22:04:02,797 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 67 edges. 67 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:04:02,797 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-02-20 22:04:02,797 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:04:02,798 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-02-20 22:04:02,798 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-02-20 22:04:02,798 INFO L87 Difference]: Start difference. First operand 1044 states and 1498 transitions. Second operand has 5 states, 5 states have (on average 11.2) internal successors, (56), 3 states have internal predecessors, (56), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2022-02-20 22:04:06,705 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:04:06,705 INFO L93 Difference]: Finished difference Result 2213 states and 3195 transitions. [2022-02-20 22:04:06,705 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-02-20 22:04:06,705 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 11.2) internal successors, (56), 3 states have internal predecessors, (56), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 77 [2022-02-20 22:04:06,705 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 22:04:06,706 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 11.2) internal successors, (56), 3 states have internal predecessors, (56), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2022-02-20 22:04:06,724 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 1915 transitions. [2022-02-20 22:04:06,725 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 11.2) internal successors, (56), 3 states have internal predecessors, (56), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2022-02-20 22:04:06,744 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 1915 transitions. [2022-02-20 22:04:06,744 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 1915 transitions. [2022-02-20 22:04:08,207 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 1915 edges. 1915 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:04:08,318 INFO L225 Difference]: With dead ends: 2213 [2022-02-20 22:04:08,318 INFO L226 Difference]: Without dead ends: 1171 [2022-02-20 22:04:08,320 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2022-02-20 22:04:08,321 INFO L933 BasicCegarLoop]: 834 mSDtfsCounter, 326 mSDsluCounter, 1345 mSDsCounter, 0 mSdLazyCounter, 952 mSolverCounterSat, 322 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 336 SdHoareTripleChecker+Valid, 2179 SdHoareTripleChecker+Invalid, 1274 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 322 IncrementalHoareTripleChecker+Valid, 952 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.3s IncrementalHoareTripleChecker+Time [2022-02-20 22:04:08,321 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [336 Valid, 2179 Invalid, 1274 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [322 Valid, 952 Invalid, 0 Unknown, 0 Unchecked, 1.3s Time] [2022-02-20 22:04:08,322 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1171 states. [2022-02-20 22:04:08,344 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1171 to 1059. [2022-02-20 22:04:08,345 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 22:04:08,346 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1171 states. Second operand has 1059 states, 796 states have (on average 1.3731155778894473) internal successors, (1093), 816 states have internal predecessors, (1093), 214 states have call successors, (214), 49 states have call predecessors, (214), 48 states have return successors, (213), 213 states have call predecessors, (213), 213 states have call successors, (213) [2022-02-20 22:04:08,348 INFO L74 IsIncluded]: Start isIncluded. First operand 1171 states. Second operand has 1059 states, 796 states have (on average 1.3731155778894473) internal successors, (1093), 816 states have internal predecessors, (1093), 214 states have call successors, (214), 49 states have call predecessors, (214), 48 states have return successors, (213), 213 states have call predecessors, (213), 213 states have call successors, (213) [2022-02-20 22:04:08,349 INFO L87 Difference]: Start difference. First operand 1171 states. Second operand has 1059 states, 796 states have (on average 1.3731155778894473) internal successors, (1093), 816 states have internal predecessors, (1093), 214 states have call successors, (214), 49 states have call predecessors, (214), 48 states have return successors, (213), 213 states have call predecessors, (213), 213 states have call successors, (213) [2022-02-20 22:04:08,396 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:04:08,396 INFO L93 Difference]: Finished difference Result 1171 states and 1698 transitions. [2022-02-20 22:04:08,397 INFO L276 IsEmpty]: Start isEmpty. Operand 1171 states and 1698 transitions. [2022-02-20 22:04:08,400 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:04:08,400 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:04:08,402 INFO L74 IsIncluded]: Start isIncluded. First operand has 1059 states, 796 states have (on average 1.3731155778894473) internal successors, (1093), 816 states have internal predecessors, (1093), 214 states have call successors, (214), 49 states have call predecessors, (214), 48 states have return successors, (213), 213 states have call predecessors, (213), 213 states have call successors, (213) Second operand 1171 states. [2022-02-20 22:04:08,403 INFO L87 Difference]: Start difference. First operand has 1059 states, 796 states have (on average 1.3731155778894473) internal successors, (1093), 816 states have internal predecessors, (1093), 214 states have call successors, (214), 49 states have call predecessors, (214), 48 states have return successors, (213), 213 states have call predecessors, (213), 213 states have call successors, (213) Second operand 1171 states. [2022-02-20 22:04:08,450 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:04:08,450 INFO L93 Difference]: Finished difference Result 1171 states and 1698 transitions. [2022-02-20 22:04:08,450 INFO L276 IsEmpty]: Start isEmpty. Operand 1171 states and 1698 transitions. [2022-02-20 22:04:08,453 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:04:08,453 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:04:08,454 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 22:04:08,454 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 22:04:08,456 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1059 states, 796 states have (on average 1.3731155778894473) internal successors, (1093), 816 states have internal predecessors, (1093), 214 states have call successors, (214), 49 states have call predecessors, (214), 48 states have return successors, (213), 213 states have call predecessors, (213), 213 states have call successors, (213) [2022-02-20 22:04:08,506 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1059 states to 1059 states and 1520 transitions. [2022-02-20 22:04:08,507 INFO L78 Accepts]: Start accepts. Automaton has 1059 states and 1520 transitions. Word has length 77 [2022-02-20 22:04:08,507 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 22:04:08,507 INFO L470 AbstractCegarLoop]: Abstraction has 1059 states and 1520 transitions. [2022-02-20 22:04:08,508 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 11.2) internal successors, (56), 3 states have internal predecessors, (56), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2022-02-20 22:04:08,508 INFO L276 IsEmpty]: Start isEmpty. Operand 1059 states and 1520 transitions. [2022-02-20 22:04:08,510 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2022-02-20 22:04:08,510 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:04:08,510 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:04:08,511 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2022-02-20 22:04:08,511 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:04:08,511 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:04:08,512 INFO L85 PathProgramCache]: Analyzing trace with hash 1732579142, now seen corresponding path program 1 times [2022-02-20 22:04:08,512 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:04:08,515 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1121997379] [2022-02-20 22:04:08,515 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:04:08,515 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:04:08,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:04:08,650 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 12 [2022-02-20 22:04:08,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:04:08,654 INFO L290 TraceCheckUtils]: 0: Hoare triple {34679#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {34641#true} is VALID [2022-02-20 22:04:08,654 INFO L290 TraceCheckUtils]: 1: Hoare triple {34641#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {34641#true} is VALID [2022-02-20 22:04:08,655 INFO L290 TraceCheckUtils]: 2: Hoare triple {34641#true} assume true; {34641#true} is VALID [2022-02-20 22:04:08,655 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {34641#true} {34641#true} #1791#return; {34641#true} is VALID [2022-02-20 22:04:08,659 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 24 [2022-02-20 22:04:08,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:04:08,665 INFO L290 TraceCheckUtils]: 0: Hoare triple {34680#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~1.base, ~tmp~1.offset;havoc ~tmp___0~0;assume -2147483648 <= #t~nondet27 && #t~nondet27 <= 2147483647;~tmp___0~0 := #t~nondet27;havoc #t~nondet27; {34641#true} is VALID [2022-02-20 22:04:08,665 INFO L290 TraceCheckUtils]: 1: Hoare triple {34641#true} assume 0 != ~tmp___0~0;#res.base, #res.offset := 0, 0; {34641#true} is VALID [2022-02-20 22:04:08,665 INFO L290 TraceCheckUtils]: 2: Hoare triple {34641#true} assume true; {34641#true} is VALID [2022-02-20 22:04:08,666 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {34641#true} {34647#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} #1793#return; {34647#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:08,666 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 33 [2022-02-20 22:04:08,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:04:08,675 INFO L290 TraceCheckUtils]: 0: Hoare triple {34641#true} ~ptr#1.base, ~ptr#1.offset := #in~ptr#1.base, #in~ptr#1.offset;havoc ~tmp~0#1;assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := (if (~ptr#1.base + ~ptr#1.offset) % 18446744073709551616 > 18446744073709547520 then 1 else 0), 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; {34641#true} is VALID [2022-02-20 22:04:08,676 INFO L290 TraceCheckUtils]: 1: Hoare triple {34641#true} #t~ret9#1 := ldv__builtin_expect_#res#1;assume { :end_inline_ldv__builtin_expect } true;assume -9223372036854775808 <= #t~ret9#1 && #t~ret9#1 <= 9223372036854775807;~tmp~0#1 := #t~ret9#1;havoc #t~ret9#1;#res#1 := (if 0 == (if 0 != ~tmp~0#1 then 1 else 0) then 0 else 1); {34641#true} is VALID [2022-02-20 22:04:08,676 INFO L290 TraceCheckUtils]: 2: Hoare triple {34641#true} assume true; {34641#true} is VALID [2022-02-20 22:04:08,676 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {34641#true} {34647#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} #1795#return; {34647#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:08,676 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 40 [2022-02-20 22:04:08,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:04:08,681 INFO L290 TraceCheckUtils]: 0: Hoare triple {34641#true} ~pdev#1.base, ~pdev#1.offset := #in~pdev#1.base, #in~pdev#1.offset;havoc ~tmp~8#1.base, ~tmp~8#1.offset;assume { :begin_inline_dev_get_drvdata } true;dev_get_drvdata_#in~dev#1.base, dev_get_drvdata_#in~dev#1.offset := ~pdev#1.base, 13 + ~pdev#1.offset;havoc dev_get_drvdata_#res#1.base, dev_get_drvdata_#res#1.offset;havoc dev_get_drvdata_#t~mem44#1.base, dev_get_drvdata_#t~mem44#1.offset, dev_get_drvdata_~dev#1.base, dev_get_drvdata_~dev#1.offset;dev_get_drvdata_~dev#1.base, dev_get_drvdata_~dev#1.offset := dev_get_drvdata_#in~dev#1.base, dev_get_drvdata_#in~dev#1.offset;call dev_get_drvdata_#t~mem44#1.base, dev_get_drvdata_#t~mem44#1.offset := read~$Pointer$(dev_get_drvdata_~dev#1.base, 489 + dev_get_drvdata_~dev#1.offset, 8);dev_get_drvdata_#res#1.base, dev_get_drvdata_#res#1.offset := dev_get_drvdata_#t~mem44#1.base, dev_get_drvdata_#t~mem44#1.offset;havoc dev_get_drvdata_#t~mem44#1.base, dev_get_drvdata_#t~mem44#1.offset; {34641#true} is VALID [2022-02-20 22:04:08,682 INFO L290 TraceCheckUtils]: 1: Hoare triple {34641#true} #t~ret52#1.base, #t~ret52#1.offset := dev_get_drvdata_#res#1.base, dev_get_drvdata_#res#1.offset;assume { :end_inline_dev_get_drvdata } true;~tmp~8#1.base, ~tmp~8#1.offset := #t~ret52#1.base, #t~ret52#1.offset;havoc #t~ret52#1.base, #t~ret52#1.offset;#res#1.base, #res#1.offset := ~tmp~8#1.base, ~tmp~8#1.offset; {34641#true} is VALID [2022-02-20 22:04:08,683 INFO L290 TraceCheckUtils]: 2: Hoare triple {34641#true} assume true; {34641#true} is VALID [2022-02-20 22:04:08,683 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {34641#true} {34647#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} #1797#return; {34647#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:08,683 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 53 [2022-02-20 22:04:08,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:04:08,689 INFO L290 TraceCheckUtils]: 0: Hoare triple {34679#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {34641#true} is VALID [2022-02-20 22:04:08,689 INFO L290 TraceCheckUtils]: 1: Hoare triple {34641#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {34641#true} is VALID [2022-02-20 22:04:08,689 INFO L290 TraceCheckUtils]: 2: Hoare triple {34641#true} assume true; {34641#true} is VALID [2022-02-20 22:04:08,689 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {34641#true} {34642#false} #1803#return; {34642#false} is VALID [2022-02-20 22:04:08,690 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2022-02-20 22:04:08,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:04:08,695 INFO L290 TraceCheckUtils]: 0: Hoare triple {34679#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {34641#true} is VALID [2022-02-20 22:04:08,695 INFO L290 TraceCheckUtils]: 1: Hoare triple {34641#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {34641#true} is VALID [2022-02-20 22:04:08,695 INFO L290 TraceCheckUtils]: 2: Hoare triple {34641#true} assume true; {34641#true} is VALID [2022-02-20 22:04:08,695 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {34641#true} {34642#false} #1805#return; {34642#false} is VALID [2022-02-20 22:04:08,701 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 83 [2022-02-20 22:04:08,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:04:08,706 INFO L290 TraceCheckUtils]: 0: Hoare triple {34681#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~offset444 := 0; {34641#true} is VALID [2022-02-20 22:04:08,706 INFO L290 TraceCheckUtils]: 1: Hoare triple {34641#true} call #t~mem445 := read~int(src.base, src.offset + #t~offset444, 1);call write~unchecked~int(#t~mem445, dest.base, dest.offset + #t~offset444, 1); {34641#true} is VALID [2022-02-20 22:04:08,706 INFO L290 TraceCheckUtils]: 2: Hoare triple {34641#true} assume 0 == #t~mem445; {34641#true} is VALID [2022-02-20 22:04:08,706 INFO L290 TraceCheckUtils]: 3: Hoare triple {34641#true} assume #res.base == dest.base && #res.offset == dest.offset; {34641#true} is VALID [2022-02-20 22:04:08,707 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {34641#true} {34642#false} #1809#return; {34642#false} is VALID [2022-02-20 22:04:08,707 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 90 [2022-02-20 22:04:08,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:04:08,712 INFO L290 TraceCheckUtils]: 0: Hoare triple {34681#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~offset444 := 0; {34641#true} is VALID [2022-02-20 22:04:08,712 INFO L290 TraceCheckUtils]: 1: Hoare triple {34641#true} call #t~mem445 := read~int(src.base, src.offset + #t~offset444, 1);call write~unchecked~int(#t~mem445, dest.base, dest.offset + #t~offset444, 1); {34641#true} is VALID [2022-02-20 22:04:08,712 INFO L290 TraceCheckUtils]: 2: Hoare triple {34641#true} assume 0 == #t~mem445; {34641#true} is VALID [2022-02-20 22:04:08,712 INFO L290 TraceCheckUtils]: 3: Hoare triple {34641#true} assume #res.base == dest.base && #res.offset == dest.offset; {34641#true} is VALID [2022-02-20 22:04:08,712 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {34641#true} {34642#false} #1811#return; {34642#false} is VALID [2022-02-20 22:04:08,713 INFO L290 TraceCheckUtils]: 0: Hoare triple {34641#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(105, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(8, 4);call #Ultimate.allocInit(12, 5);call #Ultimate.allocInit(12, 6);call #Ultimate.allocInit(8, 7);call #Ultimate.allocInit(217, 8);call #Ultimate.allocInit(33, 9);call #Ultimate.allocInit(12, 10);call #Ultimate.allocInit(217, 11);call #Ultimate.allocInit(32, 12);call #Ultimate.allocInit(217, 13);call #Ultimate.allocInit(40, 14);call #Ultimate.allocInit(27, 15);call #Ultimate.allocInit(28, 16);call #Ultimate.allocInit(12, 17);call #Ultimate.allocInit(217, 18);call #Ultimate.allocInit(30, 19);call #Ultimate.allocInit(15, 20);call #Ultimate.allocInit(17, 21);call #Ultimate.allocInit(12, 22);call #Ultimate.allocInit(217, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(217, 25);call #Ultimate.allocInit(45, 26);call #Ultimate.allocInit(217, 27);call #Ultimate.allocInit(44, 28);call #Ultimate.allocInit(7, 29);call write~init~int(83, 29, 0, 1);call write~init~int(101, 29, 1, 1);call write~init~int(114, 29, 2, 1);call write~init~int(105, 29, 3, 1);call write~init~int(97, 29, 4, 1);call write~init~int(108, 29, 5, 1);call write~init~int(0, 29, 6, 1);call #Ultimate.allocInit(25, 30);call #Ultimate.allocInit(24, 31);call #Ultimate.allocInit(18, 32);call #Ultimate.allocInit(18, 33);call #Ultimate.allocInit(49, 34);~ldv_irq_1_3~0 := 0;~ldv_irq_data_1_1~0.base, ~ldv_irq_data_1_1~0.offset := 0, 0;~ldv_irq_1_0~0 := 0;~ldv_irq_data_1_0~0.base, ~ldv_irq_data_1_0~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_irq_data_1_3~0.base, ~ldv_irq_data_1_3~0.offset := 0, 0;~snd_uart16550_input_group0~0.base, ~snd_uart16550_input_group0~0.offset := 0, 0;~ldv_irq_data_1_2~0.base, ~ldv_irq_data_1_2~0.offset := 0, 0;~ldv_irq_1_2~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_irq_1_1~0 := 0;~ldv_timer_state_2~0 := 0;~ldv_irq_line_1_3~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_irq_line_1_0~0 := 0;~ldv_timer_list_2~0.base, ~ldv_timer_list_2~0.offset := 0, 0;~snd_serial_driver_group0~0.base, ~snd_serial_driver_group0~0.offset := 0, 0;~ref_cnt~0 := 0;~ldv_irq_line_1_1~0 := 0;~snd_uart16550_output_group0~0.base, ~snd_uart16550_output_group0~0.offset := 0, 0;~ldv_state_variable_1~0 := 0;~ldv_irq_line_1_2~0 := 0;~ldv_state_variable_4~0 := 0;~#adaptor_names~0.base, ~#adaptor_names~0.offset := 35, 0;call #Ultimate.allocInit(40, 35);call write~init~$Pointer$(3, 0, ~#adaptor_names~0.base, ~#adaptor_names~0.offset, 8);call write~init~$Pointer$(4, 0, ~#adaptor_names~0.base, 8 + ~#adaptor_names~0.offset, 8);call write~init~$Pointer$(5, 0, ~#adaptor_names~0.base, 16 + ~#adaptor_names~0.offset, 8);call write~init~$Pointer$(6, 0, ~#adaptor_names~0.base, 24 + ~#adaptor_names~0.offset, 8);call write~init~$Pointer$(7, 0, ~#adaptor_names~0.base, 32 + ~#adaptor_names~0.offset, 8);~#index~0.base, ~#index~0.offset := 36, 0;call #Ultimate.allocInit(128, 36);call write~init~int(-1, ~#index~0.base, ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 4 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 8 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 12 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 16 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 20 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 24 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 28 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 32 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 36 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 40 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 44 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 48 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 52 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 56 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 60 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 64 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 68 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 72 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 76 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 80 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 84 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 88 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 92 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 96 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 100 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 104 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 108 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 112 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 116 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 120 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 124 + ~#index~0.offset, 4);~#id~0.base, ~#id~0.offset := 37, 0;call #Ultimate.allocInit(256, 37);call write~init~$Pointer$(0, 0, ~#id~0.base, ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 8 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 16 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 24 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 32 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 40 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 48 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 56 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 64 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 72 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 80 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 88 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 96 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 104 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 112 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 120 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 128 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 136 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 144 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 152 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 160 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 168 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 176 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 184 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 192 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 200 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 208 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 216 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 224 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 232 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 240 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 248 + ~#id~0.offset, 8);~#enable~0.base, ~#enable~0.offset := 38, 0;call #Ultimate.allocInit(32, 38);call write~init~int(1, ~#enable~0.base, ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 1 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 2 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 3 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 4 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 5 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 6 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 7 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 8 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 9 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 10 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 11 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 12 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 13 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 14 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 15 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 16 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 17 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 18 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 19 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 20 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 21 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 22 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 23 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 24 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 25 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 26 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 27 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 28 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 29 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 30 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 31 + ~#enable~0.offset, 1);~#port~0.base, ~#port~0.offset := 39, 0;call #Ultimate.allocInit(256, 39);call write~init~int(1, ~#port~0.base, ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 8 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 16 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 24 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 32 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 40 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 48 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 56 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 64 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 72 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 80 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 88 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 96 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 104 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 112 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 120 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 128 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 136 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 144 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 152 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 160 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 168 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 176 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 184 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 192 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 200 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 208 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 216 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 224 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 232 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 240 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 248 + ~#port~0.offset, 8);~#irq~0.base, ~#irq~0.offset := 40, 0;call #Ultimate.allocInit(128, 40);call write~init~int(65535, ~#irq~0.base, ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 4 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 8 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 12 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 16 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 20 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 24 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 28 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 32 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 36 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 40 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 44 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 48 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 52 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 56 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 60 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 64 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 68 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 72 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 76 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 80 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 84 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 88 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 92 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 96 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 100 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 104 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 108 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 112 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 116 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 120 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 124 + ~#irq~0.offset, 4);~#speed~0.base, ~#speed~0.offset := 41, 0;call #Ultimate.allocInit(128, 41);call write~init~int(38400, ~#speed~0.base, ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 4 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 8 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 12 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 16 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 20 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 24 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 28 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 32 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 36 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 40 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 44 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 48 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 52 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 56 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 60 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 64 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 68 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 72 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 76 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 80 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 84 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 88 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 92 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 96 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 100 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 104 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 108 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 112 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 116 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 120 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 124 + ~#speed~0.offset, 4);~#base~0.base, ~#base~0.offset := 42, 0;call #Ultimate.allocInit(128, 42);call write~init~int(115200, ~#base~0.base, ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 4 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 8 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 12 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 16 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 20 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 24 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 28 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 32 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 36 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 40 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 44 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 48 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 52 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 56 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 60 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 64 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 68 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 72 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 76 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 80 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 84 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 88 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 92 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 96 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 100 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 104 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 108 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 112 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 116 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 120 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 124 + ~#base~0.offset, 4);~#outs~0.base, ~#outs~0.offset := 43, 0;call #Ultimate.allocInit(128, 43);call write~init~int(1, ~#outs~0.base, ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 4 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 8 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 12 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 16 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 20 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 24 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 28 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 32 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 36 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 40 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 44 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 48 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 52 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 56 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 60 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 64 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 68 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 72 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 76 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 80 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 84 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 88 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 92 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 96 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 100 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 104 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 108 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 112 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 116 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 120 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 124 + ~#outs~0.offset, 4);~#ins~0.base, ~#ins~0.offset := 44, 0;call #Ultimate.allocInit(128, 44);call write~init~int(1, ~#ins~0.base, ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 4 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 8 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 12 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 16 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 20 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 24 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 28 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 32 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 36 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 40 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 44 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 48 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 52 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 56 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 60 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 64 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 68 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 72 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 76 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 80 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 84 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 88 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 92 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 96 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 100 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 104 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 108 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 112 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 116 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 120 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 124 + ~#ins~0.offset, 4);~#adaptor~0.base, ~#adaptor~0.offset := 45, 0;call #Ultimate.allocInit(128, 45);call write~init~int(0, ~#adaptor~0.base, ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 4 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 8 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 12 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 16 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 20 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 24 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 28 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 32 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 36 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 40 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 44 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 48 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 52 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 56 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 60 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 64 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 68 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 72 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 76 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 80 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 84 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 88 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 92 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 96 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 100 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 104 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 108 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 112 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 116 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 120 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 124 + ~#adaptor~0.offset, 4);~#droponfull~0.base, ~#droponfull~0.offset := 46, 0;call #Ultimate.allocInit(32, 46);call write~init~int(0, ~#droponfull~0.base, ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 1 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 2 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 3 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 4 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 5 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 6 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 7 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 8 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 9 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 10 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 11 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 12 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 13 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 14 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 15 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 16 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 17 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 18 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 19 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 20 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 21 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 22 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 23 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 24 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 25 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 26 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 27 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 28 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 29 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 30 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 31 + ~#droponfull~0.offset, 1);~#devices~0.base, ~#devices~0.offset := 47, 0;call #Ultimate.allocInit(256, 47);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#devices~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#devices~0.base);~#snd_uart16550_output~0.base, ~#snd_uart16550_output~0.offset := 48, 0;call #Ultimate.allocInit(32, 48);call write~init~$Pointer$(#funAddr~snd_uart16550_output_open.base, #funAddr~snd_uart16550_output_open.offset, ~#snd_uart16550_output~0.base, ~#snd_uart16550_output~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_uart16550_output_close.base, #funAddr~snd_uart16550_output_close.offset, ~#snd_uart16550_output~0.base, 8 + ~#snd_uart16550_output~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_uart16550_output_trigger.base, #funAddr~snd_uart16550_output_trigger.offset, ~#snd_uart16550_output~0.base, 16 + ~#snd_uart16550_output~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_uart16550_output~0.base, 24 + ~#snd_uart16550_output~0.offset, 8);~#snd_uart16550_input~0.base, ~#snd_uart16550_input~0.offset := 49, 0;call #Ultimate.allocInit(32, 49);call write~init~$Pointer$(#funAddr~snd_uart16550_input_open.base, #funAddr~snd_uart16550_input_open.offset, ~#snd_uart16550_input~0.base, ~#snd_uart16550_input~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_uart16550_input_close.base, #funAddr~snd_uart16550_input_close.offset, ~#snd_uart16550_input~0.base, 8 + ~#snd_uart16550_input~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_uart16550_input_trigger.base, #funAddr~snd_uart16550_input_trigger.offset, ~#snd_uart16550_input~0.base, 16 + ~#snd_uart16550_input~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_uart16550_input~0.base, 24 + ~#snd_uart16550_input~0.offset, 8);~#snd_serial_driver~0.base, ~#snd_serial_driver~0.offset := 50, 0;call #Ultimate.allocInit(162, 50);call write~init~$Pointer$(#funAddr~snd_serial_probe.base, #funAddr~snd_serial_probe.offset, ~#snd_serial_driver~0.base, ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_serial_remove.base, #funAddr~snd_serial_remove.offset, ~#snd_serial_driver~0.base, 8 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 16 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 24 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 32 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(32, 0, ~#snd_serial_driver~0.base, 40 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 48 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#snd_serial_driver~0.base, 56 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 64 + ~#snd_serial_driver~0.offset, 8);call write~init~int(0, ~#snd_serial_driver~0.base, 72 + ~#snd_serial_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 73 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 81 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 89 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 97 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 105 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 113 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 121 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 129 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 137 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 145 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 153 + ~#snd_serial_driver~0.offset, 8);call write~init~int(0, ~#snd_serial_driver~0.base, 161 + ~#snd_serial_driver~0.offset, 1);~ldv_retval_2~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_5~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_spin~0 := 0; {34641#true} is VALID [2022-02-20 22:04:08,713 INFO L290 TraceCheckUtils]: 1: Hoare triple {34641#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet399#1, main_#t~nondet400#1, main_#t~nondet401#1, main_#t~switch402#1, main_#t~nondet403#1, main_#t~switch404#1, main_#t~ret405#1, main_#t~ret406#1, main_#t~nondet407#1, main_#t~switch408#1, main_#t~ret409#1, main_#t~nondet410#1, main_#t~switch411#1, main_#t~ret412#1, main_#t~ret413#1, main_#t~nondet414#1, main_#t~switch415#1, main_#t~ret416#1, main_#t~ret417#1, main_~ldvarg0~0#1, main_~tmp~21#1, main_~ldvarg1~0#1, main_~tmp___0~6#1, main_~tmp___1~2#1, main_~tmp___2~1#1, main_~tmp___3~0#1, main_~tmp___4~0#1, main_~tmp___5~0#1;havoc main_~ldvarg0~0#1;havoc main_~tmp~21#1;havoc main_~ldvarg1~0#1;havoc main_~tmp___0~6#1;havoc main_~tmp___1~2#1;havoc main_~tmp___2~1#1;havoc main_~tmp___3~0#1;havoc main_~tmp___4~0#1;havoc main_~tmp___5~0#1;assume -2147483648 <= main_#t~nondet399#1 && main_#t~nondet399#1 <= 2147483647;main_~tmp~21#1 := main_#t~nondet399#1;havoc main_#t~nondet399#1;main_~ldvarg0~0#1 := main_~tmp~21#1;assume -2147483648 <= main_#t~nondet400#1 && main_#t~nondet400#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet400#1;havoc main_#t~nondet400#1;main_~ldvarg1~0#1 := main_~tmp___0~6#1;assume { :begin_inline_ldv_initialize } true; {34641#true} is VALID [2022-02-20 22:04:08,713 INFO L290 TraceCheckUtils]: 2: Hoare triple {34641#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_4~0 := 0;~ldv_state_variable_1~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 1;~ldv_state_variable_5~0 := 0; {34641#true} is VALID [2022-02-20 22:04:08,713 INFO L290 TraceCheckUtils]: 3: Hoare triple {34641#true} assume -2147483648 <= main_#t~nondet401#1 && main_#t~nondet401#1 <= 2147483647;main_~tmp___1~2#1 := main_#t~nondet401#1;havoc main_#t~nondet401#1;main_#t~switch402#1 := 0 == main_~tmp___1~2#1; {34641#true} is VALID [2022-02-20 22:04:08,713 INFO L290 TraceCheckUtils]: 4: Hoare triple {34641#true} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 1 == main_~tmp___1~2#1; {34641#true} is VALID [2022-02-20 22:04:08,713 INFO L290 TraceCheckUtils]: 5: Hoare triple {34641#true} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 2 == main_~tmp___1~2#1; {34641#true} is VALID [2022-02-20 22:04:08,714 INFO L290 TraceCheckUtils]: 6: Hoare triple {34641#true} assume main_#t~switch402#1; {34641#true} is VALID [2022-02-20 22:04:08,714 INFO L290 TraceCheckUtils]: 7: Hoare triple {34641#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet407#1 && main_#t~nondet407#1 <= 2147483647;main_~tmp___3~0#1 := main_#t~nondet407#1;havoc main_#t~nondet407#1;main_#t~switch408#1 := 0 == main_~tmp___3~0#1; {34641#true} is VALID [2022-02-20 22:04:08,714 INFO L290 TraceCheckUtils]: 8: Hoare triple {34641#true} assume !main_#t~switch408#1;main_#t~switch408#1 := main_#t~switch408#1 || 1 == main_~tmp___3~0#1; {34641#true} is VALID [2022-02-20 22:04:08,714 INFO L290 TraceCheckUtils]: 9: Hoare triple {34641#true} assume main_#t~switch408#1; {34641#true} is VALID [2022-02-20 22:04:08,714 INFO L290 TraceCheckUtils]: 10: Hoare triple {34641#true} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_alsa_card_serial_init } true;havoc alsa_card_serial_init_#res#1;havoc alsa_card_serial_init_#t~ret376#1, alsa_card_serial_init_#t~mem377#1, alsa_card_serial_init_#t~ret378#1.base, alsa_card_serial_init_#t~ret378#1.offset, alsa_card_serial_init_#t~ret379#1, alsa_card_serial_init_#t~ret380#1.base, alsa_card_serial_init_#t~ret380#1.offset, alsa_card_serial_init_#t~nondet381#1, alsa_card_serial_init_~i~1#1, alsa_card_serial_init_~cards~0#1, alsa_card_serial_init_~err~3#1, alsa_card_serial_init_~device~0#1.base, alsa_card_serial_init_~device~0#1.offset, alsa_card_serial_init_~tmp~15#1, alsa_card_serial_init_~tmp___0~5#1.base, alsa_card_serial_init_~tmp___0~5#1.offset;havoc alsa_card_serial_init_~i~1#1;havoc alsa_card_serial_init_~cards~0#1;havoc alsa_card_serial_init_~err~3#1;havoc alsa_card_serial_init_~device~0#1.base, alsa_card_serial_init_~device~0#1.offset;havoc alsa_card_serial_init_~tmp~15#1;havoc alsa_card_serial_init_~tmp___0~5#1.base, alsa_card_serial_init_~tmp___0~5#1.offset;assume { :begin_inline_ldv___platform_driver_register_23 } true;ldv___platform_driver_register_23_#in~ldv_func_arg1#1.base, ldv___platform_driver_register_23_#in~ldv_func_arg1#1.offset, ldv___platform_driver_register_23_#in~ldv_func_arg2#1.base, ldv___platform_driver_register_23_#in~ldv_func_arg2#1.offset := ~#snd_serial_driver~0.base, ~#snd_serial_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset;havoc ldv___platform_driver_register_23_#res#1;havoc ldv___platform_driver_register_23_#t~ret421#1, ldv___platform_driver_register_23_~ldv_func_arg1#1.base, ldv___platform_driver_register_23_~ldv_func_arg1#1.offset, ldv___platform_driver_register_23_~ldv_func_arg2#1.base, ldv___platform_driver_register_23_~ldv_func_arg2#1.offset, ldv___platform_driver_register_23_~ldv_func_res~2#1, ldv___platform_driver_register_23_~tmp~24#1;ldv___platform_driver_register_23_~ldv_func_arg1#1.base, ldv___platform_driver_register_23_~ldv_func_arg1#1.offset := ldv___platform_driver_register_23_#in~ldv_func_arg1#1.base, ldv___platform_driver_register_23_#in~ldv_func_arg1#1.offset;ldv___platform_driver_register_23_~ldv_func_arg2#1.base, ldv___platform_driver_register_23_~ldv_func_arg2#1.offset := ldv___platform_driver_register_23_#in~ldv_func_arg2#1.base, ldv___platform_driver_register_23_#in~ldv_func_arg2#1.offset;havoc ldv___platform_driver_register_23_~ldv_func_res~2#1;havoc ldv___platform_driver_register_23_~tmp~24#1;assume { :begin_inline___platform_driver_register } true;__platform_driver_register_#in~arg0#1.base, __platform_driver_register_#in~arg0#1.offset, __platform_driver_register_#in~arg1#1.base, __platform_driver_register_#in~arg1#1.offset := ldv___platform_driver_register_23_~ldv_func_arg1#1.base, ldv___platform_driver_register_23_~ldv_func_arg1#1.offset, ldv___platform_driver_register_23_~ldv_func_arg2#1.base, ldv___platform_driver_register_23_~ldv_func_arg2#1.offset;havoc __platform_driver_register_#res#1;havoc __platform_driver_register_#t~nondet424#1, __platform_driver_register_~arg0#1.base, __platform_driver_register_~arg0#1.offset, __platform_driver_register_~arg1#1.base, __platform_driver_register_~arg1#1.offset;__platform_driver_register_~arg0#1.base, __platform_driver_register_~arg0#1.offset := __platform_driver_register_#in~arg0#1.base, __platform_driver_register_#in~arg0#1.offset;__platform_driver_register_~arg1#1.base, __platform_driver_register_~arg1#1.offset := __platform_driver_register_#in~arg1#1.base, __platform_driver_register_#in~arg1#1.offset;assume -2147483648 <= __platform_driver_register_#t~nondet424#1 && __platform_driver_register_#t~nondet424#1 <= 2147483647;__platform_driver_register_#res#1 := __platform_driver_register_#t~nondet424#1;havoc __platform_driver_register_#t~nondet424#1; {34641#true} is VALID [2022-02-20 22:04:08,714 INFO L290 TraceCheckUtils]: 11: Hoare triple {34641#true} ldv___platform_driver_register_23_#t~ret421#1 := __platform_driver_register_#res#1;assume { :end_inline___platform_driver_register } true;assume -2147483648 <= ldv___platform_driver_register_23_#t~ret421#1 && ldv___platform_driver_register_23_#t~ret421#1 <= 2147483647;ldv___platform_driver_register_23_~tmp~24#1 := ldv___platform_driver_register_23_#t~ret421#1;havoc ldv___platform_driver_register_23_#t~ret421#1;ldv___platform_driver_register_23_~ldv_func_res~2#1 := ldv___platform_driver_register_23_~tmp~24#1;~ldv_state_variable_3~0 := 1;assume { :begin_inline_ldv_initialize_platform_driver_3 } true;havoc ldv_initialize_platform_driver_3_#t~ret392#1.base, ldv_initialize_platform_driver_3_#t~ret392#1.offset, ldv_initialize_platform_driver_3_~tmp~19#1.base, ldv_initialize_platform_driver_3_~tmp~19#1.offset;havoc ldv_initialize_platform_driver_3_~tmp~19#1.base, ldv_initialize_platform_driver_3_~tmp~19#1.offset; {34641#true} is VALID [2022-02-20 22:04:08,715 INFO L272 TraceCheckUtils]: 12: Hoare triple {34641#true} call ldv_initialize_platform_driver_3_#t~ret392#1.base, ldv_initialize_platform_driver_3_#t~ret392#1.offset := ldv_zalloc(1464); {34679#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:04:08,715 INFO L290 TraceCheckUtils]: 13: Hoare triple {34679#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {34641#true} is VALID [2022-02-20 22:04:08,715 INFO L290 TraceCheckUtils]: 14: Hoare triple {34641#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {34641#true} is VALID [2022-02-20 22:04:08,715 INFO L290 TraceCheckUtils]: 15: Hoare triple {34641#true} assume true; {34641#true} is VALID [2022-02-20 22:04:08,715 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {34641#true} {34641#true} #1791#return; {34641#true} is VALID [2022-02-20 22:04:08,715 INFO L290 TraceCheckUtils]: 17: Hoare triple {34641#true} ldv_initialize_platform_driver_3_~tmp~19#1.base, ldv_initialize_platform_driver_3_~tmp~19#1.offset := ldv_initialize_platform_driver_3_#t~ret392#1.base, ldv_initialize_platform_driver_3_#t~ret392#1.offset;havoc ldv_initialize_platform_driver_3_#t~ret392#1.base, ldv_initialize_platform_driver_3_#t~ret392#1.offset;~snd_serial_driver_group0~0.base, ~snd_serial_driver_group0~0.offset := ldv_initialize_platform_driver_3_~tmp~19#1.base, ldv_initialize_platform_driver_3_~tmp~19#1.offset; {34641#true} is VALID [2022-02-20 22:04:08,716 INFO L290 TraceCheckUtils]: 18: Hoare triple {34641#true} assume { :end_inline_ldv_initialize_platform_driver_3 } true;ldv___platform_driver_register_23_#res#1 := ldv___platform_driver_register_23_~ldv_func_res~2#1; {34641#true} is VALID [2022-02-20 22:04:08,716 INFO L290 TraceCheckUtils]: 19: Hoare triple {34641#true} alsa_card_serial_init_#t~ret376#1 := ldv___platform_driver_register_23_#res#1;assume { :end_inline_ldv___platform_driver_register_23 } true;assume -2147483648 <= alsa_card_serial_init_#t~ret376#1 && alsa_card_serial_init_#t~ret376#1 <= 2147483647;alsa_card_serial_init_~err~3#1 := alsa_card_serial_init_#t~ret376#1;havoc alsa_card_serial_init_#t~ret376#1; {34641#true} is VALID [2022-02-20 22:04:08,716 INFO L290 TraceCheckUtils]: 20: Hoare triple {34641#true} assume !(alsa_card_serial_init_~err~3#1 < 0);alsa_card_serial_init_~cards~0#1 := 0;alsa_card_serial_init_~i~1#1 := 0; {34647#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:08,716 INFO L290 TraceCheckUtils]: 21: Hoare triple {34647#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} assume alsa_card_serial_init_~i~1#1 <= 31; {34647#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:08,717 INFO L290 TraceCheckUtils]: 22: Hoare triple {34647#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} call alsa_card_serial_init_#t~mem377#1 := read~int(~#enable~0.base, ~#enable~0.offset + alsa_card_serial_init_~i~1#1, 1); {34647#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:08,718 INFO L290 TraceCheckUtils]: 23: Hoare triple {34647#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} assume !(0 == alsa_card_serial_init_#t~mem377#1 % 256);havoc alsa_card_serial_init_#t~mem377#1;assume { :begin_inline_platform_device_register_simple } true;platform_device_register_simple_#in~name#1.base, platform_device_register_simple_#in~name#1.offset, platform_device_register_simple_#in~id___0#1, platform_device_register_simple_#in~res#1.base, platform_device_register_simple_#in~res#1.offset, platform_device_register_simple_#in~num#1 := 33, 0, alsa_card_serial_init_~i~1#1, 0, 0, 0;havoc platform_device_register_simple_#res#1.base, platform_device_register_simple_#res#1.offset;havoc platform_device_register_simple_#t~ret48#1.base, platform_device_register_simple_#t~ret48#1.offset, platform_device_register_simple_~name#1.base, platform_device_register_simple_~name#1.offset, platform_device_register_simple_~id___0#1, platform_device_register_simple_~res#1.base, platform_device_register_simple_~res#1.offset, platform_device_register_simple_~num#1, platform_device_register_simple_~tmp~7#1.base, platform_device_register_simple_~tmp~7#1.offset;platform_device_register_simple_~name#1.base, platform_device_register_simple_~name#1.offset := platform_device_register_simple_#in~name#1.base, platform_device_register_simple_#in~name#1.offset;platform_device_register_simple_~id___0#1 := platform_device_register_simple_#in~id___0#1;platform_device_register_simple_~res#1.base, platform_device_register_simple_~res#1.offset := platform_device_register_simple_#in~res#1.base, platform_device_register_simple_#in~res#1.offset;platform_device_register_simple_~num#1 := platform_device_register_simple_#in~num#1;havoc platform_device_register_simple_~tmp~7#1.base, platform_device_register_simple_~tmp~7#1.offset;assume { :begin_inline_platform_device_register_resndata } true;platform_device_register_resndata_#in~parent#1.base, platform_device_register_resndata_#in~parent#1.offset, platform_device_register_resndata_#in~name#1.base, platform_device_register_resndata_#in~name#1.offset, platform_device_register_resndata_#in~id___0#1, platform_device_register_resndata_#in~res#1.base, platform_device_register_resndata_#in~res#1.offset, platform_device_register_resndata_#in~num#1, platform_device_register_resndata_#in~data#1.base, platform_device_register_resndata_#in~data#1.offset, platform_device_register_resndata_#in~size#1 := 0, 0, platform_device_register_simple_~name#1.base, platform_device_register_simple_~name#1.offset, platform_device_register_simple_~id___0#1, platform_device_register_simple_~res#1.base, platform_device_register_simple_~res#1.offset, platform_device_register_simple_~num#1, 0, 0, 0;havoc platform_device_register_resndata_#res#1.base, platform_device_register_resndata_#res#1.offset;havoc platform_device_register_resndata_#t~ret47#1.base, platform_device_register_resndata_#t~ret47#1.offset, platform_device_register_resndata_~parent#1.base, platform_device_register_resndata_~parent#1.offset, platform_device_register_resndata_~name#1.base, platform_device_register_resndata_~name#1.offset, platform_device_register_resndata_~id___0#1, platform_device_register_resndata_~res#1.base, platform_device_register_resndata_~res#1.offset, platform_device_register_resndata_~num#1, platform_device_register_resndata_~data#1.base, platform_device_register_resndata_~data#1.offset, platform_device_register_resndata_~size#1, platform_device_register_resndata_~#pdevinfo~0#1.base, platform_device_register_resndata_~#pdevinfo~0#1.offset, platform_device_register_resndata_~tmp~6#1.base, platform_device_register_resndata_~tmp~6#1.offset;platform_device_register_resndata_~parent#1.base, platform_device_register_resndata_~parent#1.offset := platform_device_register_resndata_#in~parent#1.base, platform_device_register_resndata_#in~parent#1.offset;platform_device_register_resndata_~name#1.base, platform_device_register_resndata_~name#1.offset := platform_device_register_resndata_#in~name#1.base, platform_device_register_resndata_#in~name#1.offset;platform_device_register_resndata_~id___0#1 := platform_device_register_resndata_#in~id___0#1;platform_device_register_resndata_~res#1.base, platform_device_register_resndata_~res#1.offset := platform_device_register_resndata_#in~res#1.base, platform_device_register_resndata_#in~res#1.offset;platform_device_register_resndata_~num#1 := platform_device_register_resndata_#in~num#1;platform_device_register_resndata_~data#1.base, platform_device_register_resndata_~data#1.offset := platform_device_register_resndata_#in~data#1.base, platform_device_register_resndata_#in~data#1.offset;platform_device_register_resndata_~size#1 := platform_device_register_resndata_#in~size#1;call platform_device_register_resndata_~#pdevinfo~0#1.base, platform_device_register_resndata_~#pdevinfo~0#1.offset := #Ultimate.allocOnStack(64);havoc platform_device_register_resndata_~tmp~6#1.base, platform_device_register_resndata_~tmp~6#1.offset;call write~$Pointer$(platform_device_register_resndata_~parent#1.base, platform_device_register_resndata_~parent#1.offset, platform_device_register_resndata_~#pdevinfo~0#1.base, platform_device_register_resndata_~#pdevinfo~0#1.offset, 8);call write~$Pointer$(0, 0, platform_device_register_resndata_~#pdevinfo~0#1.base, 8 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 8);call write~$Pointer$(platform_device_register_resndata_~name#1.base, platform_device_register_resndata_~name#1.offset, platform_device_register_resndata_~#pdevinfo~0#1.base, 16 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 8);call write~int(platform_device_register_resndata_~id___0#1, platform_device_register_resndata_~#pdevinfo~0#1.base, 24 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 4);call write~$Pointer$(platform_device_register_resndata_~res#1.base, platform_device_register_resndata_~res#1.offset, platform_device_register_resndata_~#pdevinfo~0#1.base, 28 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 8);call write~int(platform_device_register_resndata_~num#1, platform_device_register_resndata_~#pdevinfo~0#1.base, 36 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 4);call write~$Pointer$(platform_device_register_resndata_~data#1.base, platform_device_register_resndata_~data#1.offset, platform_device_register_resndata_~#pdevinfo~0#1.base, 40 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 8);call write~int(platform_device_register_resndata_~size#1, platform_device_register_resndata_~#pdevinfo~0#1.base, 48 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 8);call write~int(0, platform_device_register_resndata_~#pdevinfo~0#1.base, 56 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 8);assume { :begin_inline_platform_device_register_full } true;platform_device_register_full_#in~arg0#1.base, platform_device_register_full_#in~arg0#1.offset := platform_device_register_resndata_~#pdevinfo~0#1.base, platform_device_register_resndata_~#pdevinfo~0#1.offset;havoc platform_device_register_full_#res#1.base, platform_device_register_full_#res#1.offset;havoc platform_device_register_full_#t~ret429#1.base, platform_device_register_full_#t~ret429#1.offset, platform_device_register_full_~arg0#1.base, platform_device_register_full_~arg0#1.offset;platform_device_register_full_~arg0#1.base, platform_device_register_full_~arg0#1.offset := platform_device_register_full_#in~arg0#1.base, platform_device_register_full_#in~arg0#1.offset; {34647#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:08,718 INFO L272 TraceCheckUtils]: 24: Hoare triple {34647#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} call platform_device_register_full_#t~ret429#1.base, platform_device_register_full_#t~ret429#1.offset := ldv_malloc(1386); {34680#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:04:08,718 INFO L290 TraceCheckUtils]: 25: Hoare triple {34680#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~1.base, ~tmp~1.offset;havoc ~tmp___0~0;assume -2147483648 <= #t~nondet27 && #t~nondet27 <= 2147483647;~tmp___0~0 := #t~nondet27;havoc #t~nondet27; {34641#true} is VALID [2022-02-20 22:04:08,719 INFO L290 TraceCheckUtils]: 26: Hoare triple {34641#true} assume 0 != ~tmp___0~0;#res.base, #res.offset := 0, 0; {34641#true} is VALID [2022-02-20 22:04:08,719 INFO L290 TraceCheckUtils]: 27: Hoare triple {34641#true} assume true; {34641#true} is VALID [2022-02-20 22:04:08,719 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {34641#true} {34647#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} #1793#return; {34647#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:08,720 INFO L290 TraceCheckUtils]: 29: Hoare triple {34647#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} platform_device_register_full_#res#1.base, platform_device_register_full_#res#1.offset := platform_device_register_full_#t~ret429#1.base, platform_device_register_full_#t~ret429#1.offset;havoc platform_device_register_full_#t~ret429#1.base, platform_device_register_full_#t~ret429#1.offset; {34647#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:08,720 INFO L290 TraceCheckUtils]: 30: Hoare triple {34647#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} platform_device_register_resndata_#t~ret47#1.base, platform_device_register_resndata_#t~ret47#1.offset := platform_device_register_full_#res#1.base, platform_device_register_full_#res#1.offset;assume { :end_inline_platform_device_register_full } true;platform_device_register_resndata_~tmp~6#1.base, platform_device_register_resndata_~tmp~6#1.offset := platform_device_register_resndata_#t~ret47#1.base, platform_device_register_resndata_#t~ret47#1.offset;havoc platform_device_register_resndata_#t~ret47#1.base, platform_device_register_resndata_#t~ret47#1.offset;platform_device_register_resndata_#res#1.base, platform_device_register_resndata_#res#1.offset := platform_device_register_resndata_~tmp~6#1.base, platform_device_register_resndata_~tmp~6#1.offset;call ULTIMATE.dealloc(platform_device_register_resndata_~#pdevinfo~0#1.base, platform_device_register_resndata_~#pdevinfo~0#1.offset);havoc platform_device_register_resndata_~#pdevinfo~0#1.base, platform_device_register_resndata_~#pdevinfo~0#1.offset; {34647#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:08,720 INFO L290 TraceCheckUtils]: 31: Hoare triple {34647#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} platform_device_register_simple_#t~ret48#1.base, platform_device_register_simple_#t~ret48#1.offset := platform_device_register_resndata_#res#1.base, platform_device_register_resndata_#res#1.offset;assume { :end_inline_platform_device_register_resndata } true;platform_device_register_simple_~tmp~7#1.base, platform_device_register_simple_~tmp~7#1.offset := platform_device_register_simple_#t~ret48#1.base, platform_device_register_simple_#t~ret48#1.offset;havoc platform_device_register_simple_#t~ret48#1.base, platform_device_register_simple_#t~ret48#1.offset;platform_device_register_simple_#res#1.base, platform_device_register_simple_#res#1.offset := platform_device_register_simple_~tmp~7#1.base, platform_device_register_simple_~tmp~7#1.offset; {34647#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:08,720 INFO L290 TraceCheckUtils]: 32: Hoare triple {34647#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} alsa_card_serial_init_#t~ret378#1.base, alsa_card_serial_init_#t~ret378#1.offset := platform_device_register_simple_#res#1.base, platform_device_register_simple_#res#1.offset;assume { :end_inline_platform_device_register_simple } true;alsa_card_serial_init_~device~0#1.base, alsa_card_serial_init_~device~0#1.offset := alsa_card_serial_init_#t~ret378#1.base, alsa_card_serial_init_#t~ret378#1.offset;havoc alsa_card_serial_init_#t~ret378#1.base, alsa_card_serial_init_#t~ret378#1.offset; {34647#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:08,721 INFO L272 TraceCheckUtils]: 33: Hoare triple {34647#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} call alsa_card_serial_init_#t~ret379#1 := IS_ERR(alsa_card_serial_init_~device~0#1.base, alsa_card_serial_init_~device~0#1.offset); {34641#true} is VALID [2022-02-20 22:04:08,721 INFO L290 TraceCheckUtils]: 34: Hoare triple {34641#true} ~ptr#1.base, ~ptr#1.offset := #in~ptr#1.base, #in~ptr#1.offset;havoc ~tmp~0#1;assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := (if (~ptr#1.base + ~ptr#1.offset) % 18446744073709551616 > 18446744073709547520 then 1 else 0), 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; {34641#true} is VALID [2022-02-20 22:04:08,721 INFO L290 TraceCheckUtils]: 35: Hoare triple {34641#true} #t~ret9#1 := ldv__builtin_expect_#res#1;assume { :end_inline_ldv__builtin_expect } true;assume -9223372036854775808 <= #t~ret9#1 && #t~ret9#1 <= 9223372036854775807;~tmp~0#1 := #t~ret9#1;havoc #t~ret9#1;#res#1 := (if 0 == (if 0 != ~tmp~0#1 then 1 else 0) then 0 else 1); {34641#true} is VALID [2022-02-20 22:04:08,721 INFO L290 TraceCheckUtils]: 36: Hoare triple {34641#true} assume true; {34641#true} is VALID [2022-02-20 22:04:08,721 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {34641#true} {34647#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} #1795#return; {34647#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:08,722 INFO L290 TraceCheckUtils]: 38: Hoare triple {34647#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} alsa_card_serial_init_~tmp~15#1 := alsa_card_serial_init_#t~ret379#1;havoc alsa_card_serial_init_#t~ret379#1; {34647#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:08,722 INFO L290 TraceCheckUtils]: 39: Hoare triple {34647#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} assume !(0 != alsa_card_serial_init_~tmp~15#1 % 256); {34647#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:08,722 INFO L272 TraceCheckUtils]: 40: Hoare triple {34647#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} call alsa_card_serial_init_#t~ret380#1.base, alsa_card_serial_init_#t~ret380#1.offset := platform_get_drvdata(alsa_card_serial_init_~device~0#1.base, alsa_card_serial_init_~device~0#1.offset); {34641#true} is VALID [2022-02-20 22:04:08,722 INFO L290 TraceCheckUtils]: 41: Hoare triple {34641#true} ~pdev#1.base, ~pdev#1.offset := #in~pdev#1.base, #in~pdev#1.offset;havoc ~tmp~8#1.base, ~tmp~8#1.offset;assume { :begin_inline_dev_get_drvdata } true;dev_get_drvdata_#in~dev#1.base, dev_get_drvdata_#in~dev#1.offset := ~pdev#1.base, 13 + ~pdev#1.offset;havoc dev_get_drvdata_#res#1.base, dev_get_drvdata_#res#1.offset;havoc dev_get_drvdata_#t~mem44#1.base, dev_get_drvdata_#t~mem44#1.offset, dev_get_drvdata_~dev#1.base, dev_get_drvdata_~dev#1.offset;dev_get_drvdata_~dev#1.base, dev_get_drvdata_~dev#1.offset := dev_get_drvdata_#in~dev#1.base, dev_get_drvdata_#in~dev#1.offset;call dev_get_drvdata_#t~mem44#1.base, dev_get_drvdata_#t~mem44#1.offset := read~$Pointer$(dev_get_drvdata_~dev#1.base, 489 + dev_get_drvdata_~dev#1.offset, 8);dev_get_drvdata_#res#1.base, dev_get_drvdata_#res#1.offset := dev_get_drvdata_#t~mem44#1.base, dev_get_drvdata_#t~mem44#1.offset;havoc dev_get_drvdata_#t~mem44#1.base, dev_get_drvdata_#t~mem44#1.offset; {34641#true} is VALID [2022-02-20 22:04:08,722 INFO L290 TraceCheckUtils]: 42: Hoare triple {34641#true} #t~ret52#1.base, #t~ret52#1.offset := dev_get_drvdata_#res#1.base, dev_get_drvdata_#res#1.offset;assume { :end_inline_dev_get_drvdata } true;~tmp~8#1.base, ~tmp~8#1.offset := #t~ret52#1.base, #t~ret52#1.offset;havoc #t~ret52#1.base, #t~ret52#1.offset;#res#1.base, #res#1.offset := ~tmp~8#1.base, ~tmp~8#1.offset; {34641#true} is VALID [2022-02-20 22:04:08,723 INFO L290 TraceCheckUtils]: 43: Hoare triple {34641#true} assume true; {34641#true} is VALID [2022-02-20 22:04:08,723 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {34641#true} {34647#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} #1797#return; {34647#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:08,723 INFO L290 TraceCheckUtils]: 45: Hoare triple {34647#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} alsa_card_serial_init_~tmp___0~5#1.base, alsa_card_serial_init_~tmp___0~5#1.offset := alsa_card_serial_init_#t~ret380#1.base, alsa_card_serial_init_#t~ret380#1.offset;havoc alsa_card_serial_init_#t~ret380#1.base, alsa_card_serial_init_#t~ret380#1.offset; {34647#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:08,725 INFO L290 TraceCheckUtils]: 46: Hoare triple {34647#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} assume !(0 == (alsa_card_serial_init_~tmp___0~5#1.base + alsa_card_serial_init_~tmp___0~5#1.offset) % 18446744073709551616);call write~$Pointer$(alsa_card_serial_init_~device~0#1.base, alsa_card_serial_init_~device~0#1.offset, ~#devices~0.base, ~#devices~0.offset + 8 * alsa_card_serial_init_~i~1#1, 8);alsa_card_serial_init_~cards~0#1 := 1 + alsa_card_serial_init_~cards~0#1; {34647#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:08,725 INFO L290 TraceCheckUtils]: 47: Hoare triple {34647#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} alsa_card_serial_init_~i~1#1 := 1 + alsa_card_serial_init_~i~1#1; {34660#(<= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 1)} is VALID [2022-02-20 22:04:08,725 INFO L290 TraceCheckUtils]: 48: Hoare triple {34660#(<= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 1)} assume !(alsa_card_serial_init_~i~1#1 <= 31); {34642#false} is VALID [2022-02-20 22:04:08,726 INFO L290 TraceCheckUtils]: 49: Hoare triple {34642#false} assume !(0 == alsa_card_serial_init_~cards~0#1);alsa_card_serial_init_#res#1 := 0; {34642#false} is VALID [2022-02-20 22:04:08,726 INFO L290 TraceCheckUtils]: 50: Hoare triple {34642#false} main_#t~ret409#1 := alsa_card_serial_init_#res#1;assume { :end_inline_alsa_card_serial_init } true;assume -2147483648 <= main_#t~ret409#1 && main_#t~ret409#1 <= 2147483647;~ldv_retval_2~0 := main_#t~ret409#1;havoc main_#t~ret409#1; {34642#false} is VALID [2022-02-20 22:04:08,726 INFO L290 TraceCheckUtils]: 51: Hoare triple {34642#false} assume !(0 != ~ldv_retval_2~0); {34642#false} is VALID [2022-02-20 22:04:08,726 INFO L290 TraceCheckUtils]: 52: Hoare triple {34642#false} assume 0 == ~ldv_retval_2~0;~ldv_state_variable_0~0 := 2;~ldv_state_variable_5~0 := 1;assume { :begin_inline_ldv_initialize_snd_rawmidi_ops_5 } true;havoc ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.base, ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.offset, ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.base, ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.offset;havoc ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.base, ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.offset; {34642#false} is VALID [2022-02-20 22:04:08,726 INFO L272 TraceCheckUtils]: 53: Hoare triple {34642#false} call ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.base, ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.offset := ldv_zalloc(112); {34679#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:04:08,726 INFO L290 TraceCheckUtils]: 54: Hoare triple {34679#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {34641#true} is VALID [2022-02-20 22:04:08,726 INFO L290 TraceCheckUtils]: 55: Hoare triple {34641#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {34641#true} is VALID [2022-02-20 22:04:08,726 INFO L290 TraceCheckUtils]: 56: Hoare triple {34641#true} assume true; {34641#true} is VALID [2022-02-20 22:04:08,727 INFO L284 TraceCheckUtils]: 57: Hoare quadruple {34641#true} {34642#false} #1803#return; {34642#false} is VALID [2022-02-20 22:04:08,727 INFO L290 TraceCheckUtils]: 58: Hoare triple {34642#false} ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.base, ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.offset := ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.base, ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.offset;havoc ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.base, ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.offset;~snd_uart16550_output_group0~0.base, ~snd_uart16550_output_group0~0.offset := ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.base, ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.offset; {34642#false} is VALID [2022-02-20 22:04:08,727 INFO L290 TraceCheckUtils]: 59: Hoare triple {34642#false} assume { :end_inline_ldv_initialize_snd_rawmidi_ops_5 } true;~ldv_state_variable_4~0 := 1;assume { :begin_inline_ldv_initialize_snd_rawmidi_ops_4 } true;havoc ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.base, ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.offset, ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.base, ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.offset;havoc ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.base, ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.offset; {34642#false} is VALID [2022-02-20 22:04:08,727 INFO L272 TraceCheckUtils]: 60: Hoare triple {34642#false} call ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.base, ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.offset := ldv_zalloc(112); {34679#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:04:08,728 INFO L290 TraceCheckUtils]: 61: Hoare triple {34679#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {34641#true} is VALID [2022-02-20 22:04:08,728 INFO L290 TraceCheckUtils]: 62: Hoare triple {34641#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {34641#true} is VALID [2022-02-20 22:04:08,728 INFO L290 TraceCheckUtils]: 63: Hoare triple {34641#true} assume true; {34641#true} is VALID [2022-02-20 22:04:08,728 INFO L284 TraceCheckUtils]: 64: Hoare quadruple {34641#true} {34642#false} #1805#return; {34642#false} is VALID [2022-02-20 22:04:08,730 INFO L290 TraceCheckUtils]: 65: Hoare triple {34642#false} ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.base, ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.offset := ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.base, ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.offset;havoc ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.base, ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.offset;~snd_uart16550_input_group0~0.base, ~snd_uart16550_input_group0~0.offset := ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.base, ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.offset; {34642#false} is VALID [2022-02-20 22:04:08,730 INFO L290 TraceCheckUtils]: 66: Hoare triple {34642#false} assume { :end_inline_ldv_initialize_snd_rawmidi_ops_4 } true; {34642#false} is VALID [2022-02-20 22:04:08,730 INFO L290 TraceCheckUtils]: 67: Hoare triple {34642#false} assume -2147483648 <= main_#t~nondet401#1 && main_#t~nondet401#1 <= 2147483647;main_~tmp___1~2#1 := main_#t~nondet401#1;havoc main_#t~nondet401#1;main_#t~switch402#1 := 0 == main_~tmp___1~2#1; {34642#false} is VALID [2022-02-20 22:04:08,730 INFO L290 TraceCheckUtils]: 68: Hoare triple {34642#false} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 1 == main_~tmp___1~2#1; {34642#false} is VALID [2022-02-20 22:04:08,730 INFO L290 TraceCheckUtils]: 69: Hoare triple {34642#false} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 2 == main_~tmp___1~2#1; {34642#false} is VALID [2022-02-20 22:04:08,730 INFO L290 TraceCheckUtils]: 70: Hoare triple {34642#false} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 3 == main_~tmp___1~2#1; {34642#false} is VALID [2022-02-20 22:04:08,730 INFO L290 TraceCheckUtils]: 71: Hoare triple {34642#false} assume main_#t~switch402#1; {34642#false} is VALID [2022-02-20 22:04:08,730 INFO L290 TraceCheckUtils]: 72: Hoare triple {34642#false} assume 0 != ~ldv_state_variable_3~0;assume -2147483648 <= main_#t~nondet410#1 && main_#t~nondet410#1 <= 2147483647;main_~tmp___4~0#1 := main_#t~nondet410#1;havoc main_#t~nondet410#1;main_#t~switch411#1 := 0 == main_~tmp___4~0#1; {34642#false} is VALID [2022-02-20 22:04:08,731 INFO L290 TraceCheckUtils]: 73: Hoare triple {34642#false} assume main_#t~switch411#1; {34642#false} is VALID [2022-02-20 22:04:08,731 INFO L290 TraceCheckUtils]: 74: Hoare triple {34642#false} assume 1 == ~ldv_state_variable_3~0;assume { :begin_inline_snd_serial_probe } true;snd_serial_probe_#in~devptr#1.base, snd_serial_probe_#in~devptr#1.offset := ~snd_serial_driver_group0~0.base, ~snd_serial_driver_group0~0.offset;havoc snd_serial_probe_#res#1;havoc snd_serial_probe_#t~mem326#1, snd_serial_probe_#t~mem327#1, snd_serial_probe_#t~switch328#1, snd_serial_probe_#t~mem329#1, snd_serial_probe_#t~mem330#1, snd_serial_probe_#t~mem331#1, snd_serial_probe_#t~short332#1, snd_serial_probe_#t~mem333#1, snd_serial_probe_#t~mem334#1, snd_serial_probe_#t~mem335#1, snd_serial_probe_#t~short336#1, snd_serial_probe_#t~mem337#1, snd_serial_probe_#t~mem338#1, snd_serial_probe_#t~mem339#1.base, snd_serial_probe_#t~mem339#1.offset, snd_serial_probe_#t~ret340#1, snd_serial_probe_#t~mem341#1.base, snd_serial_probe_#t~mem341#1.offset, snd_serial_probe_#t~strcpy~res342#1.base, snd_serial_probe_#t~strcpy~res342#1.offset, snd_serial_probe_#t~mem343#1.base, snd_serial_probe_#t~mem343#1.offset, snd_serial_probe_#t~strcpy~res344#1.base, snd_serial_probe_#t~strcpy~res344#1.offset, snd_serial_probe_#t~mem345#1.base, snd_serial_probe_#t~mem345#1.offset, snd_serial_probe_#t~mem346#1, snd_serial_probe_#t~mem347#1, snd_serial_probe_#t~mem348#1, snd_serial_probe_#t~mem349#1, snd_serial_probe_#t~mem350#1, snd_serial_probe_#t~mem351#1, snd_serial_probe_#t~ret352#1, snd_serial_probe_#t~mem353#1.base, snd_serial_probe_#t~mem353#1.offset, snd_serial_probe_#t~mem354#1, snd_serial_probe_#t~mem355#1, snd_serial_probe_#t~mem356#1.base, snd_serial_probe_#t~mem356#1.offset, snd_serial_probe_#t~ret357#1, snd_serial_probe_#t~nondet358#1, snd_serial_probe_#t~mem359#1.base, snd_serial_probe_#t~mem359#1.offset, snd_serial_probe_#t~mem360#1.base, snd_serial_probe_#t~mem360#1.offset, snd_serial_probe_#t~mem361#1.base, snd_serial_probe_#t~mem361#1.offset, snd_serial_probe_#t~mem362#1, snd_serial_probe_#t~mem363#1.base, snd_serial_probe_#t~mem363#1.offset, snd_serial_probe_#t~mem364#1.base, snd_serial_probe_#t~mem364#1.offset, snd_serial_probe_#t~mem365#1, snd_serial_probe_#t~mem366#1.base, snd_serial_probe_#t~mem366#1.offset, snd_serial_probe_#t~mem367#1, snd_serial_probe_#t~mem368#1.base, snd_serial_probe_#t~mem368#1.offset, snd_serial_probe_#t~ret369#1, snd_serial_probe_#t~mem370#1.base, snd_serial_probe_#t~mem370#1.offset, snd_serial_probe_#t~mem371#1.base, snd_serial_probe_#t~mem371#1.offset, snd_serial_probe_#t~ret372#1, snd_serial_probe_~devptr#1.base, snd_serial_probe_~devptr#1.offset, snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset, snd_serial_probe_~#uart~11#1.base, snd_serial_probe_~#uart~11#1.offset, snd_serial_probe_~err~2#1, snd_serial_probe_~dev~0#1;snd_serial_probe_~devptr#1.base, snd_serial_probe_~devptr#1.offset := snd_serial_probe_#in~devptr#1.base, snd_serial_probe_#in~devptr#1.offset;call snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset := #Ultimate.allocOnStack(8);call snd_serial_probe_~#uart~11#1.base, snd_serial_probe_~#uart~11#1.offset := #Ultimate.allocOnStack(8);havoc snd_serial_probe_~err~2#1;havoc snd_serial_probe_~dev~0#1;call snd_serial_probe_#t~mem326#1 := read~int(snd_serial_probe_~devptr#1.base, 8 + snd_serial_probe_~devptr#1.offset, 4);snd_serial_probe_~dev~0#1 := snd_serial_probe_#t~mem326#1;havoc snd_serial_probe_#t~mem326#1;call snd_serial_probe_#t~mem327#1 := read~int(~#adaptor~0.base, ~#adaptor~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);snd_serial_probe_#t~switch328#1 := 0 == snd_serial_probe_#t~mem327#1; {34642#false} is VALID [2022-02-20 22:04:08,731 INFO L290 TraceCheckUtils]: 75: Hoare triple {34642#false} assume snd_serial_probe_#t~switch328#1;call write~int(1, ~#ins~0.base, ~#ins~0.offset + 4 * snd_serial_probe_~dev~0#1, 4); {34642#false} is VALID [2022-02-20 22:04:08,731 INFO L290 TraceCheckUtils]: 76: Hoare triple {34642#false} call snd_serial_probe_#t~mem330#1 := read~int(~#outs~0.base, ~#outs~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);snd_serial_probe_#t~short332#1 := snd_serial_probe_#t~mem330#1 <= 0; {34642#false} is VALID [2022-02-20 22:04:08,731 INFO L290 TraceCheckUtils]: 77: Hoare triple {34642#false} assume snd_serial_probe_#t~short332#1; {34642#false} is VALID [2022-02-20 22:04:08,731 INFO L290 TraceCheckUtils]: 78: Hoare triple {34642#false} assume !snd_serial_probe_#t~short332#1;havoc snd_serial_probe_#t~mem330#1;havoc snd_serial_probe_#t~mem331#1;havoc snd_serial_probe_#t~short332#1;call snd_serial_probe_#t~mem334#1 := read~int(~#ins~0.base, ~#ins~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);snd_serial_probe_#t~short336#1 := snd_serial_probe_#t~mem334#1 <= 0; {34642#false} is VALID [2022-02-20 22:04:08,732 INFO L290 TraceCheckUtils]: 79: Hoare triple {34642#false} assume snd_serial_probe_#t~short336#1; {34642#false} is VALID [2022-02-20 22:04:08,732 INFO L290 TraceCheckUtils]: 80: Hoare triple {34642#false} assume !snd_serial_probe_#t~short336#1;havoc snd_serial_probe_#t~mem334#1;havoc snd_serial_probe_#t~mem335#1;havoc snd_serial_probe_#t~short336#1;call snd_serial_probe_#t~mem338#1 := read~int(~#index~0.base, ~#index~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem339#1.base, snd_serial_probe_#t~mem339#1.offset := read~$Pointer$(~#id~0.base, ~#id~0.offset + 8 * snd_serial_probe_~dev~0#1, 8);assume { :begin_inline_snd_card_new } true;snd_card_new_#in~arg0#1.base, snd_card_new_#in~arg0#1.offset, snd_card_new_#in~arg1#1, snd_card_new_#in~arg2#1.base, snd_card_new_#in~arg2#1.offset, snd_card_new_#in~arg3#1.base, snd_card_new_#in~arg3#1.offset, snd_card_new_#in~arg4#1, snd_card_new_#in~arg5#1.base, snd_card_new_#in~arg5#1.offset := snd_serial_probe_~devptr#1.base, 13 + snd_serial_probe_~devptr#1.offset, snd_serial_probe_#t~mem338#1, snd_serial_probe_#t~mem339#1.base, snd_serial_probe_#t~mem339#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 0, snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset;havoc snd_card_new_#res#1;havoc snd_card_new_#t~nondet433#1, snd_card_new_~arg0#1.base, snd_card_new_~arg0#1.offset, snd_card_new_~arg1#1, snd_card_new_~arg2#1.base, snd_card_new_~arg2#1.offset, snd_card_new_~arg3#1.base, snd_card_new_~arg3#1.offset, snd_card_new_~arg4#1, snd_card_new_~arg5#1.base, snd_card_new_~arg5#1.offset;snd_card_new_~arg0#1.base, snd_card_new_~arg0#1.offset := snd_card_new_#in~arg0#1.base, snd_card_new_#in~arg0#1.offset;snd_card_new_~arg1#1 := snd_card_new_#in~arg1#1;snd_card_new_~arg2#1.base, snd_card_new_~arg2#1.offset := snd_card_new_#in~arg2#1.base, snd_card_new_#in~arg2#1.offset;snd_card_new_~arg3#1.base, snd_card_new_~arg3#1.offset := snd_card_new_#in~arg3#1.base, snd_card_new_#in~arg3#1.offset;snd_card_new_~arg4#1 := snd_card_new_#in~arg4#1;snd_card_new_~arg5#1.base, snd_card_new_~arg5#1.offset := snd_card_new_#in~arg5#1.base, snd_card_new_#in~arg5#1.offset;assume -2147483648 <= snd_card_new_#t~nondet433#1 && snd_card_new_#t~nondet433#1 <= 2147483647;snd_card_new_#res#1 := snd_card_new_#t~nondet433#1;havoc snd_card_new_#t~nondet433#1; {34642#false} is VALID [2022-02-20 22:04:08,732 INFO L290 TraceCheckUtils]: 81: Hoare triple {34642#false} snd_serial_probe_#t~ret340#1 := snd_card_new_#res#1;assume { :end_inline_snd_card_new } true;assume -2147483648 <= snd_serial_probe_#t~ret340#1 && snd_serial_probe_#t~ret340#1 <= 2147483647;snd_serial_probe_~err~2#1 := snd_serial_probe_#t~ret340#1;havoc snd_serial_probe_#t~mem338#1;havoc snd_serial_probe_#t~mem339#1.base, snd_serial_probe_#t~mem339#1.offset;havoc snd_serial_probe_#t~ret340#1; {34642#false} is VALID [2022-02-20 22:04:08,732 INFO L290 TraceCheckUtils]: 82: Hoare triple {34642#false} assume !(snd_serial_probe_~err~2#1 < 0);call snd_serial_probe_#t~mem341#1.base, snd_serial_probe_#t~mem341#1.offset := read~$Pointer$(snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset, 8); {34642#false} is VALID [2022-02-20 22:04:08,733 INFO L272 TraceCheckUtils]: 83: Hoare triple {34642#false} call snd_serial_probe_#t~strcpy~res342#1.base, snd_serial_probe_#t~strcpy~res342#1.offset := #Ultimate.C_strcpy(snd_serial_probe_#t~mem341#1.base, 20 + snd_serial_probe_#t~mem341#1.offset, 29, 0); {34681#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:04:08,733 INFO L290 TraceCheckUtils]: 84: Hoare triple {34681#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~offset444 := 0; {34641#true} is VALID [2022-02-20 22:04:08,733 INFO L290 TraceCheckUtils]: 85: Hoare triple {34641#true} call #t~mem445 := read~int(src.base, src.offset + #t~offset444, 1);call write~unchecked~int(#t~mem445, dest.base, dest.offset + #t~offset444, 1); {34641#true} is VALID [2022-02-20 22:04:08,733 INFO L290 TraceCheckUtils]: 86: Hoare triple {34641#true} assume 0 == #t~mem445; {34641#true} is VALID [2022-02-20 22:04:08,733 INFO L290 TraceCheckUtils]: 87: Hoare triple {34641#true} assume #res.base == dest.base && #res.offset == dest.offset; {34641#true} is VALID [2022-02-20 22:04:08,733 INFO L284 TraceCheckUtils]: 88: Hoare quadruple {34641#true} {34642#false} #1809#return; {34642#false} is VALID [2022-02-20 22:04:08,733 INFO L290 TraceCheckUtils]: 89: Hoare triple {34642#false} havoc snd_serial_probe_#t~mem341#1.base, snd_serial_probe_#t~mem341#1.offset;havoc snd_serial_probe_#t~strcpy~res342#1.base, snd_serial_probe_#t~strcpy~res342#1.offset;call snd_serial_probe_#t~mem343#1.base, snd_serial_probe_#t~mem343#1.offset := read~$Pointer$(snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset, 8); {34642#false} is VALID [2022-02-20 22:04:08,733 INFO L272 TraceCheckUtils]: 90: Hoare triple {34642#false} call snd_serial_probe_#t~strcpy~res344#1.base, snd_serial_probe_#t~strcpy~res344#1.offset := #Ultimate.C_strcpy(snd_serial_probe_#t~mem343#1.base, 36 + snd_serial_probe_#t~mem343#1.offset, 30, 0); {34681#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:04:08,733 INFO L290 TraceCheckUtils]: 91: Hoare triple {34681#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~offset444 := 0; {34641#true} is VALID [2022-02-20 22:04:08,734 INFO L290 TraceCheckUtils]: 92: Hoare triple {34641#true} call #t~mem445 := read~int(src.base, src.offset + #t~offset444, 1);call write~unchecked~int(#t~mem445, dest.base, dest.offset + #t~offset444, 1); {34641#true} is VALID [2022-02-20 22:04:08,734 INFO L290 TraceCheckUtils]: 93: Hoare triple {34641#true} assume 0 == #t~mem445; {34641#true} is VALID [2022-02-20 22:04:08,734 INFO L290 TraceCheckUtils]: 94: Hoare triple {34641#true} assume #res.base == dest.base && #res.offset == dest.offset; {34641#true} is VALID [2022-02-20 22:04:08,734 INFO L284 TraceCheckUtils]: 95: Hoare quadruple {34641#true} {34642#false} #1811#return; {34642#false} is VALID [2022-02-20 22:04:08,734 INFO L290 TraceCheckUtils]: 96: Hoare triple {34642#false} havoc snd_serial_probe_#t~mem343#1.base, snd_serial_probe_#t~mem343#1.offset;havoc snd_serial_probe_#t~strcpy~res344#1.base, snd_serial_probe_#t~strcpy~res344#1.offset;call snd_serial_probe_#t~mem345#1.base, snd_serial_probe_#t~mem345#1.offset := read~$Pointer$(snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset, 8);call snd_serial_probe_#t~mem346#1 := read~int(~#port~0.base, ~#port~0.offset + 8 * snd_serial_probe_~dev~0#1, 8);call snd_serial_probe_#t~mem347#1 := read~int(~#irq~0.base, ~#irq~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem348#1 := read~int(~#speed~0.base, ~#speed~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem349#1 := read~int(~#base~0.base, ~#base~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem350#1 := read~int(~#adaptor~0.base, ~#adaptor~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem351#1 := read~int(~#droponfull~0.base, ~#droponfull~0.offset + snd_serial_probe_~dev~0#1, 1);assume { :begin_inline_snd_uart16550_create } true;snd_uart16550_create_#in~card#1.base, snd_uart16550_create_#in~card#1.offset, snd_uart16550_create_#in~iobase#1, snd_uart16550_create_#in~irq___0#1, snd_uart16550_create_#in~speed___0#1, snd_uart16550_create_#in~base___0#1, snd_uart16550_create_#in~adaptor___0#1, snd_uart16550_create_#in~droponfull___0#1, snd_uart16550_create_#in~ruart#1.base, snd_uart16550_create_#in~ruart#1.offset := snd_serial_probe_#t~mem345#1.base, snd_serial_probe_#t~mem345#1.offset, snd_serial_probe_#t~mem346#1, snd_serial_probe_#t~mem347#1, snd_serial_probe_#t~mem348#1, snd_serial_probe_#t~mem349#1, snd_serial_probe_#t~mem350#1, snd_serial_probe_#t~mem351#1 % 256, snd_serial_probe_~#uart~11#1.base, snd_serial_probe_~#uart~11#1.offset;havoc snd_uart16550_create_#res#1;havoc snd_uart16550_create_#t~ret296#1.base, snd_uart16550_create_#t~ret296#1.offset, snd_uart16550_create_#t~ret297#1.base, snd_uart16550_create_#t~ret297#1.offset, snd_uart16550_create_#t~ret298#1, snd_uart16550_create_#t~nondet299#1, snd_uart16550_create_#t~ret300#1, snd_uart16550_create_#t~ret301#1, snd_uart16550_create_#t~mem302#1, snd_uart16550_create_#t~memset~res303#1.base, snd_uart16550_create_#t~memset~res303#1.offset, snd_uart16550_create_#t~ret304#1, snd_uart16550_create_#t~ret305#1, snd_uart16550_create_#t~ret306#1, snd_uart16550_create_#t~mem307#1, snd_uart16550_create_#t~switch308#1, snd_uart16550_create_#t~mem309#1, snd_uart16550_create_#t~mem310#1, snd_uart16550_create_~card#1.base, snd_uart16550_create_~card#1.offset, snd_uart16550_create_~iobase#1, snd_uart16550_create_~irq___0#1, snd_uart16550_create_~speed___0#1, snd_uart16550_create_~base___0#1, snd_uart16550_create_~adaptor___0#1, snd_uart16550_create_~droponfull___0#1, snd_uart16550_create_~ruart#1.base, snd_uart16550_create_~ruart#1.offset, snd_uart16550_create_~#ops~0#1.base, snd_uart16550_create_~#ops~0#1.offset, snd_uart16550_create_~uart~10#1.base, snd_uart16550_create_~uart~10#1.offset, snd_uart16550_create_~err~0#1, snd_uart16550_create_~tmp~13#1.base, snd_uart16550_create_~tmp~13#1.offset, snd_uart16550_create_~#__key~0#1.base, snd_uart16550_create_~#__key~0#1.offset, snd_uart16550_create_~tmp___0~4#1;snd_uart16550_create_~card#1.base, snd_uart16550_create_~card#1.offset := snd_uart16550_create_#in~card#1.base, snd_uart16550_create_#in~card#1.offset;snd_uart16550_create_~iobase#1 := snd_uart16550_create_#in~iobase#1;snd_uart16550_create_~irq___0#1 := snd_uart16550_create_#in~irq___0#1;snd_uart16550_create_~speed___0#1 := snd_uart16550_create_#in~speed___0#1;snd_uart16550_create_~base___0#1 := snd_uart16550_create_#in~base___0#1;snd_uart16550_create_~adaptor___0#1 := snd_uart16550_create_#in~adaptor___0#1;snd_uart16550_create_~droponfull___0#1 := snd_uart16550_create_#in~droponfull___0#1;snd_uart16550_create_~ruart#1.base, snd_uart16550_create_~ruart#1.offset := snd_uart16550_create_#in~ruart#1.base, snd_uart16550_create_#in~ruart#1.offset;call snd_uart16550_create_~#ops~0#1.base, snd_uart16550_create_~#ops~0#1.offset := #Ultimate.allocOnStack(24);havoc snd_uart16550_create_~uart~10#1.base, snd_uart16550_create_~uart~10#1.offset;havoc snd_uart16550_create_~err~0#1;havoc snd_uart16550_create_~tmp~13#1.base, snd_uart16550_create_~tmp~13#1.offset;call snd_uart16550_create_~#__key~0#1.base, snd_uart16550_create_~#__key~0#1.offset := #Ultimate.allocOnStack(8);havoc snd_uart16550_create_~tmp___0~4#1;call write~$Pointer$(#funAddr~snd_uart16550_dev_free.base, #funAddr~snd_uart16550_dev_free.offset, snd_uart16550_create_~#ops~0#1.base, snd_uart16550_create_~#ops~0#1.offset, 8);call write~$Pointer$(0, 0, snd_uart16550_create_~#ops~0#1.base, 8 + snd_uart16550_create_~#ops~0#1.offset, 8);call write~$Pointer$(0, 0, snd_uart16550_create_~#ops~0#1.base, 16 + snd_uart16550_create_~#ops~0#1.offset, 8);assume { :begin_inline_kzalloc } true;kzalloc_#in~size#1, kzalloc_#in~flags#1 := 33344, 208;havoc kzalloc_#res#1.base, kzalloc_#res#1.offset;havoc kzalloc_~size#1, kzalloc_~flags#1;kzalloc_~size#1 := kzalloc_#in~size#1;kzalloc_~flags#1 := kzalloc_#in~flags#1;assume { :begin_inline_ldv_check_alloc_flags } true;ldv_check_alloc_flags_#in~flags#1 := kzalloc_~flags#1;havoc ldv_check_alloc_flags_~flags#1;ldv_check_alloc_flags_~flags#1 := ldv_check_alloc_flags_#in~flags#1; {34642#false} is VALID [2022-02-20 22:04:08,734 INFO L290 TraceCheckUtils]: 97: Hoare triple {34642#false} assume !(0 == ~ldv_spin~0 || 0 == (if 0 == ldv_check_alloc_flags_~flags#1 then 0 else (if 1 == ldv_check_alloc_flags_~flags#1 then 0 else ~bitwiseAnd(ldv_check_alloc_flags_~flags#1, 16))) % 4294967296); {34642#false} is VALID [2022-02-20 22:04:08,734 INFO L272 TraceCheckUtils]: 98: Hoare triple {34642#false} call ldv_error(); {34642#false} is VALID [2022-02-20 22:04:08,734 INFO L290 TraceCheckUtils]: 99: Hoare triple {34642#false} assume !false; {34642#false} is VALID [2022-02-20 22:04:08,735 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2022-02-20 22:04:08,735 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:04:08,735 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1121997379] [2022-02-20 22:04:08,735 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1121997379] provided 0 perfect and 1 imperfect interpolant sequences [2022-02-20 22:04:08,736 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [945023678] [2022-02-20 22:04:08,736 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:04:08,736 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-20 22:04:08,736 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-20 22:04:08,737 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-02-20 22:04:08,740 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-02-20 22:04:09,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:04:09,174 INFO L263 TraceCheckSpWp]: Trace formula consists of 2150 conjuncts, 2 conjunts are in the unsatisfiable core [2022-02-20 22:04:09,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:04:09,242 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-02-20 22:04:09,473 INFO L290 TraceCheckUtils]: 0: Hoare triple {34641#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(105, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(8, 4);call #Ultimate.allocInit(12, 5);call #Ultimate.allocInit(12, 6);call #Ultimate.allocInit(8, 7);call #Ultimate.allocInit(217, 8);call #Ultimate.allocInit(33, 9);call #Ultimate.allocInit(12, 10);call #Ultimate.allocInit(217, 11);call #Ultimate.allocInit(32, 12);call #Ultimate.allocInit(217, 13);call #Ultimate.allocInit(40, 14);call #Ultimate.allocInit(27, 15);call #Ultimate.allocInit(28, 16);call #Ultimate.allocInit(12, 17);call #Ultimate.allocInit(217, 18);call #Ultimate.allocInit(30, 19);call #Ultimate.allocInit(15, 20);call #Ultimate.allocInit(17, 21);call #Ultimate.allocInit(12, 22);call #Ultimate.allocInit(217, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(217, 25);call #Ultimate.allocInit(45, 26);call #Ultimate.allocInit(217, 27);call #Ultimate.allocInit(44, 28);call #Ultimate.allocInit(7, 29);call write~init~int(83, 29, 0, 1);call write~init~int(101, 29, 1, 1);call write~init~int(114, 29, 2, 1);call write~init~int(105, 29, 3, 1);call write~init~int(97, 29, 4, 1);call write~init~int(108, 29, 5, 1);call write~init~int(0, 29, 6, 1);call #Ultimate.allocInit(25, 30);call #Ultimate.allocInit(24, 31);call #Ultimate.allocInit(18, 32);call #Ultimate.allocInit(18, 33);call #Ultimate.allocInit(49, 34);~ldv_irq_1_3~0 := 0;~ldv_irq_data_1_1~0.base, ~ldv_irq_data_1_1~0.offset := 0, 0;~ldv_irq_1_0~0 := 0;~ldv_irq_data_1_0~0.base, ~ldv_irq_data_1_0~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_irq_data_1_3~0.base, ~ldv_irq_data_1_3~0.offset := 0, 0;~snd_uart16550_input_group0~0.base, ~snd_uart16550_input_group0~0.offset := 0, 0;~ldv_irq_data_1_2~0.base, ~ldv_irq_data_1_2~0.offset := 0, 0;~ldv_irq_1_2~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_irq_1_1~0 := 0;~ldv_timer_state_2~0 := 0;~ldv_irq_line_1_3~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_irq_line_1_0~0 := 0;~ldv_timer_list_2~0.base, ~ldv_timer_list_2~0.offset := 0, 0;~snd_serial_driver_group0~0.base, ~snd_serial_driver_group0~0.offset := 0, 0;~ref_cnt~0 := 0;~ldv_irq_line_1_1~0 := 0;~snd_uart16550_output_group0~0.base, ~snd_uart16550_output_group0~0.offset := 0, 0;~ldv_state_variable_1~0 := 0;~ldv_irq_line_1_2~0 := 0;~ldv_state_variable_4~0 := 0;~#adaptor_names~0.base, ~#adaptor_names~0.offset := 35, 0;call #Ultimate.allocInit(40, 35);call write~init~$Pointer$(3, 0, ~#adaptor_names~0.base, ~#adaptor_names~0.offset, 8);call write~init~$Pointer$(4, 0, ~#adaptor_names~0.base, 8 + ~#adaptor_names~0.offset, 8);call write~init~$Pointer$(5, 0, ~#adaptor_names~0.base, 16 + ~#adaptor_names~0.offset, 8);call write~init~$Pointer$(6, 0, ~#adaptor_names~0.base, 24 + ~#adaptor_names~0.offset, 8);call write~init~$Pointer$(7, 0, ~#adaptor_names~0.base, 32 + ~#adaptor_names~0.offset, 8);~#index~0.base, ~#index~0.offset := 36, 0;call #Ultimate.allocInit(128, 36);call write~init~int(-1, ~#index~0.base, ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 4 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 8 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 12 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 16 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 20 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 24 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 28 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 32 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 36 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 40 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 44 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 48 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 52 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 56 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 60 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 64 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 68 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 72 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 76 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 80 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 84 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 88 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 92 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 96 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 100 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 104 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 108 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 112 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 116 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 120 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 124 + ~#index~0.offset, 4);~#id~0.base, ~#id~0.offset := 37, 0;call #Ultimate.allocInit(256, 37);call write~init~$Pointer$(0, 0, ~#id~0.base, ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 8 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 16 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 24 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 32 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 40 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 48 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 56 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 64 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 72 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 80 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 88 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 96 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 104 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 112 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 120 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 128 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 136 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 144 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 152 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 160 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 168 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 176 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 184 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 192 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 200 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 208 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 216 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 224 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 232 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 240 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 248 + ~#id~0.offset, 8);~#enable~0.base, ~#enable~0.offset := 38, 0;call #Ultimate.allocInit(32, 38);call write~init~int(1, ~#enable~0.base, ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 1 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 2 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 3 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 4 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 5 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 6 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 7 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 8 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 9 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 10 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 11 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 12 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 13 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 14 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 15 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 16 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 17 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 18 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 19 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 20 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 21 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 22 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 23 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 24 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 25 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 26 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 27 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 28 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 29 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 30 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 31 + ~#enable~0.offset, 1);~#port~0.base, ~#port~0.offset := 39, 0;call #Ultimate.allocInit(256, 39);call write~init~int(1, ~#port~0.base, ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 8 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 16 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 24 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 32 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 40 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 48 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 56 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 64 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 72 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 80 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 88 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 96 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 104 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 112 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 120 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 128 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 136 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 144 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 152 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 160 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 168 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 176 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 184 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 192 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 200 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 208 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 216 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 224 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 232 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 240 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 248 + ~#port~0.offset, 8);~#irq~0.base, ~#irq~0.offset := 40, 0;call #Ultimate.allocInit(128, 40);call write~init~int(65535, ~#irq~0.base, ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 4 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 8 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 12 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 16 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 20 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 24 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 28 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 32 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 36 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 40 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 44 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 48 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 52 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 56 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 60 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 64 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 68 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 72 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 76 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 80 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 84 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 88 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 92 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 96 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 100 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 104 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 108 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 112 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 116 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 120 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 124 + ~#irq~0.offset, 4);~#speed~0.base, ~#speed~0.offset := 41, 0;call #Ultimate.allocInit(128, 41);call write~init~int(38400, ~#speed~0.base, ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 4 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 8 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 12 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 16 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 20 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 24 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 28 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 32 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 36 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 40 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 44 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 48 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 52 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 56 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 60 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 64 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 68 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 72 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 76 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 80 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 84 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 88 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 92 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 96 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 100 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 104 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 108 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 112 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 116 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 120 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 124 + ~#speed~0.offset, 4);~#base~0.base, ~#base~0.offset := 42, 0;call #Ultimate.allocInit(128, 42);call write~init~int(115200, ~#base~0.base, ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 4 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 8 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 12 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 16 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 20 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 24 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 28 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 32 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 36 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 40 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 44 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 48 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 52 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 56 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 60 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 64 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 68 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 72 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 76 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 80 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 84 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 88 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 92 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 96 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 100 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 104 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 108 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 112 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 116 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 120 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 124 + ~#base~0.offset, 4);~#outs~0.base, ~#outs~0.offset := 43, 0;call #Ultimate.allocInit(128, 43);call write~init~int(1, ~#outs~0.base, ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 4 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 8 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 12 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 16 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 20 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 24 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 28 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 32 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 36 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 40 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 44 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 48 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 52 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 56 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 60 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 64 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 68 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 72 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 76 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 80 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 84 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 88 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 92 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 96 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 100 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 104 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 108 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 112 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 116 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 120 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 124 + ~#outs~0.offset, 4);~#ins~0.base, ~#ins~0.offset := 44, 0;call #Ultimate.allocInit(128, 44);call write~init~int(1, ~#ins~0.base, ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 4 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 8 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 12 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 16 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 20 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 24 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 28 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 32 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 36 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 40 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 44 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 48 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 52 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 56 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 60 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 64 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 68 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 72 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 76 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 80 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 84 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 88 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 92 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 96 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 100 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 104 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 108 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 112 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 116 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 120 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 124 + ~#ins~0.offset, 4);~#adaptor~0.base, ~#adaptor~0.offset := 45, 0;call #Ultimate.allocInit(128, 45);call write~init~int(0, ~#adaptor~0.base, ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 4 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 8 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 12 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 16 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 20 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 24 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 28 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 32 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 36 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 40 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 44 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 48 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 52 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 56 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 60 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 64 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 68 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 72 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 76 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 80 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 84 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 88 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 92 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 96 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 100 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 104 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 108 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 112 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 116 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 120 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 124 + ~#adaptor~0.offset, 4);~#droponfull~0.base, ~#droponfull~0.offset := 46, 0;call #Ultimate.allocInit(32, 46);call write~init~int(0, ~#droponfull~0.base, ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 1 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 2 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 3 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 4 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 5 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 6 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 7 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 8 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 9 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 10 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 11 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 12 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 13 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 14 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 15 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 16 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 17 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 18 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 19 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 20 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 21 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 22 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 23 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 24 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 25 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 26 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 27 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 28 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 29 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 30 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 31 + ~#droponfull~0.offset, 1);~#devices~0.base, ~#devices~0.offset := 47, 0;call #Ultimate.allocInit(256, 47);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#devices~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#devices~0.base);~#snd_uart16550_output~0.base, ~#snd_uart16550_output~0.offset := 48, 0;call #Ultimate.allocInit(32, 48);call write~init~$Pointer$(#funAddr~snd_uart16550_output_open.base, #funAddr~snd_uart16550_output_open.offset, ~#snd_uart16550_output~0.base, ~#snd_uart16550_output~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_uart16550_output_close.base, #funAddr~snd_uart16550_output_close.offset, ~#snd_uart16550_output~0.base, 8 + ~#snd_uart16550_output~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_uart16550_output_trigger.base, #funAddr~snd_uart16550_output_trigger.offset, ~#snd_uart16550_output~0.base, 16 + ~#snd_uart16550_output~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_uart16550_output~0.base, 24 + ~#snd_uart16550_output~0.offset, 8);~#snd_uart16550_input~0.base, ~#snd_uart16550_input~0.offset := 49, 0;call #Ultimate.allocInit(32, 49);call write~init~$Pointer$(#funAddr~snd_uart16550_input_open.base, #funAddr~snd_uart16550_input_open.offset, ~#snd_uart16550_input~0.base, ~#snd_uart16550_input~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_uart16550_input_close.base, #funAddr~snd_uart16550_input_close.offset, ~#snd_uart16550_input~0.base, 8 + ~#snd_uart16550_input~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_uart16550_input_trigger.base, #funAddr~snd_uart16550_input_trigger.offset, ~#snd_uart16550_input~0.base, 16 + ~#snd_uart16550_input~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_uart16550_input~0.base, 24 + ~#snd_uart16550_input~0.offset, 8);~#snd_serial_driver~0.base, ~#snd_serial_driver~0.offset := 50, 0;call #Ultimate.allocInit(162, 50);call write~init~$Pointer$(#funAddr~snd_serial_probe.base, #funAddr~snd_serial_probe.offset, ~#snd_serial_driver~0.base, ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_serial_remove.base, #funAddr~snd_serial_remove.offset, ~#snd_serial_driver~0.base, 8 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 16 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 24 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 32 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(32, 0, ~#snd_serial_driver~0.base, 40 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 48 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#snd_serial_driver~0.base, 56 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 64 + ~#snd_serial_driver~0.offset, 8);call write~init~int(0, ~#snd_serial_driver~0.base, 72 + ~#snd_serial_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 73 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 81 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 89 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 97 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 105 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 113 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 121 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 129 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 137 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 145 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 153 + ~#snd_serial_driver~0.offset, 8);call write~init~int(0, ~#snd_serial_driver~0.base, 161 + ~#snd_serial_driver~0.offset, 1);~ldv_retval_2~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_5~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_spin~0 := 0; {34641#true} is VALID [2022-02-20 22:04:09,474 INFO L290 TraceCheckUtils]: 1: Hoare triple {34641#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet399#1, main_#t~nondet400#1, main_#t~nondet401#1, main_#t~switch402#1, main_#t~nondet403#1, main_#t~switch404#1, main_#t~ret405#1, main_#t~ret406#1, main_#t~nondet407#1, main_#t~switch408#1, main_#t~ret409#1, main_#t~nondet410#1, main_#t~switch411#1, main_#t~ret412#1, main_#t~ret413#1, main_#t~nondet414#1, main_#t~switch415#1, main_#t~ret416#1, main_#t~ret417#1, main_~ldvarg0~0#1, main_~tmp~21#1, main_~ldvarg1~0#1, main_~tmp___0~6#1, main_~tmp___1~2#1, main_~tmp___2~1#1, main_~tmp___3~0#1, main_~tmp___4~0#1, main_~tmp___5~0#1;havoc main_~ldvarg0~0#1;havoc main_~tmp~21#1;havoc main_~ldvarg1~0#1;havoc main_~tmp___0~6#1;havoc main_~tmp___1~2#1;havoc main_~tmp___2~1#1;havoc main_~tmp___3~0#1;havoc main_~tmp___4~0#1;havoc main_~tmp___5~0#1;assume -2147483648 <= main_#t~nondet399#1 && main_#t~nondet399#1 <= 2147483647;main_~tmp~21#1 := main_#t~nondet399#1;havoc main_#t~nondet399#1;main_~ldvarg0~0#1 := main_~tmp~21#1;assume -2147483648 <= main_#t~nondet400#1 && main_#t~nondet400#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet400#1;havoc main_#t~nondet400#1;main_~ldvarg1~0#1 := main_~tmp___0~6#1;assume { :begin_inline_ldv_initialize } true; {34641#true} is VALID [2022-02-20 22:04:09,474 INFO L290 TraceCheckUtils]: 2: Hoare triple {34641#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_4~0 := 0;~ldv_state_variable_1~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 1;~ldv_state_variable_5~0 := 0; {34641#true} is VALID [2022-02-20 22:04:09,474 INFO L290 TraceCheckUtils]: 3: Hoare triple {34641#true} assume -2147483648 <= main_#t~nondet401#1 && main_#t~nondet401#1 <= 2147483647;main_~tmp___1~2#1 := main_#t~nondet401#1;havoc main_#t~nondet401#1;main_#t~switch402#1 := 0 == main_~tmp___1~2#1; {34641#true} is VALID [2022-02-20 22:04:09,474 INFO L290 TraceCheckUtils]: 4: Hoare triple {34641#true} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 1 == main_~tmp___1~2#1; {34641#true} is VALID [2022-02-20 22:04:09,475 INFO L290 TraceCheckUtils]: 5: Hoare triple {34641#true} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 2 == main_~tmp___1~2#1; {34641#true} is VALID [2022-02-20 22:04:09,475 INFO L290 TraceCheckUtils]: 6: Hoare triple {34641#true} assume main_#t~switch402#1; {34641#true} is VALID [2022-02-20 22:04:09,475 INFO L290 TraceCheckUtils]: 7: Hoare triple {34641#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet407#1 && main_#t~nondet407#1 <= 2147483647;main_~tmp___3~0#1 := main_#t~nondet407#1;havoc main_#t~nondet407#1;main_#t~switch408#1 := 0 == main_~tmp___3~0#1; {34641#true} is VALID [2022-02-20 22:04:09,475 INFO L290 TraceCheckUtils]: 8: Hoare triple {34641#true} assume !main_#t~switch408#1;main_#t~switch408#1 := main_#t~switch408#1 || 1 == main_~tmp___3~0#1; {34641#true} is VALID [2022-02-20 22:04:09,475 INFO L290 TraceCheckUtils]: 9: Hoare triple {34641#true} assume main_#t~switch408#1; {34641#true} is VALID [2022-02-20 22:04:09,475 INFO L290 TraceCheckUtils]: 10: Hoare triple {34641#true} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_alsa_card_serial_init } true;havoc alsa_card_serial_init_#res#1;havoc alsa_card_serial_init_#t~ret376#1, alsa_card_serial_init_#t~mem377#1, alsa_card_serial_init_#t~ret378#1.base, alsa_card_serial_init_#t~ret378#1.offset, alsa_card_serial_init_#t~ret379#1, alsa_card_serial_init_#t~ret380#1.base, alsa_card_serial_init_#t~ret380#1.offset, alsa_card_serial_init_#t~nondet381#1, alsa_card_serial_init_~i~1#1, alsa_card_serial_init_~cards~0#1, alsa_card_serial_init_~err~3#1, alsa_card_serial_init_~device~0#1.base, alsa_card_serial_init_~device~0#1.offset, alsa_card_serial_init_~tmp~15#1, alsa_card_serial_init_~tmp___0~5#1.base, alsa_card_serial_init_~tmp___0~5#1.offset;havoc alsa_card_serial_init_~i~1#1;havoc alsa_card_serial_init_~cards~0#1;havoc alsa_card_serial_init_~err~3#1;havoc alsa_card_serial_init_~device~0#1.base, alsa_card_serial_init_~device~0#1.offset;havoc alsa_card_serial_init_~tmp~15#1;havoc alsa_card_serial_init_~tmp___0~5#1.base, alsa_card_serial_init_~tmp___0~5#1.offset;assume { :begin_inline_ldv___platform_driver_register_23 } true;ldv___platform_driver_register_23_#in~ldv_func_arg1#1.base, ldv___platform_driver_register_23_#in~ldv_func_arg1#1.offset, ldv___platform_driver_register_23_#in~ldv_func_arg2#1.base, ldv___platform_driver_register_23_#in~ldv_func_arg2#1.offset := ~#snd_serial_driver~0.base, ~#snd_serial_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset;havoc ldv___platform_driver_register_23_#res#1;havoc ldv___platform_driver_register_23_#t~ret421#1, ldv___platform_driver_register_23_~ldv_func_arg1#1.base, ldv___platform_driver_register_23_~ldv_func_arg1#1.offset, ldv___platform_driver_register_23_~ldv_func_arg2#1.base, ldv___platform_driver_register_23_~ldv_func_arg2#1.offset, ldv___platform_driver_register_23_~ldv_func_res~2#1, ldv___platform_driver_register_23_~tmp~24#1;ldv___platform_driver_register_23_~ldv_func_arg1#1.base, ldv___platform_driver_register_23_~ldv_func_arg1#1.offset := ldv___platform_driver_register_23_#in~ldv_func_arg1#1.base, ldv___platform_driver_register_23_#in~ldv_func_arg1#1.offset;ldv___platform_driver_register_23_~ldv_func_arg2#1.base, ldv___platform_driver_register_23_~ldv_func_arg2#1.offset := ldv___platform_driver_register_23_#in~ldv_func_arg2#1.base, ldv___platform_driver_register_23_#in~ldv_func_arg2#1.offset;havoc ldv___platform_driver_register_23_~ldv_func_res~2#1;havoc ldv___platform_driver_register_23_~tmp~24#1;assume { :begin_inline___platform_driver_register } true;__platform_driver_register_#in~arg0#1.base, __platform_driver_register_#in~arg0#1.offset, __platform_driver_register_#in~arg1#1.base, __platform_driver_register_#in~arg1#1.offset := ldv___platform_driver_register_23_~ldv_func_arg1#1.base, ldv___platform_driver_register_23_~ldv_func_arg1#1.offset, ldv___platform_driver_register_23_~ldv_func_arg2#1.base, ldv___platform_driver_register_23_~ldv_func_arg2#1.offset;havoc __platform_driver_register_#res#1;havoc __platform_driver_register_#t~nondet424#1, __platform_driver_register_~arg0#1.base, __platform_driver_register_~arg0#1.offset, __platform_driver_register_~arg1#1.base, __platform_driver_register_~arg1#1.offset;__platform_driver_register_~arg0#1.base, __platform_driver_register_~arg0#1.offset := __platform_driver_register_#in~arg0#1.base, __platform_driver_register_#in~arg0#1.offset;__platform_driver_register_~arg1#1.base, __platform_driver_register_~arg1#1.offset := __platform_driver_register_#in~arg1#1.base, __platform_driver_register_#in~arg1#1.offset;assume -2147483648 <= __platform_driver_register_#t~nondet424#1 && __platform_driver_register_#t~nondet424#1 <= 2147483647;__platform_driver_register_#res#1 := __platform_driver_register_#t~nondet424#1;havoc __platform_driver_register_#t~nondet424#1; {34641#true} is VALID [2022-02-20 22:04:09,475 INFO L290 TraceCheckUtils]: 11: Hoare triple {34641#true} ldv___platform_driver_register_23_#t~ret421#1 := __platform_driver_register_#res#1;assume { :end_inline___platform_driver_register } true;assume -2147483648 <= ldv___platform_driver_register_23_#t~ret421#1 && ldv___platform_driver_register_23_#t~ret421#1 <= 2147483647;ldv___platform_driver_register_23_~tmp~24#1 := ldv___platform_driver_register_23_#t~ret421#1;havoc ldv___platform_driver_register_23_#t~ret421#1;ldv___platform_driver_register_23_~ldv_func_res~2#1 := ldv___platform_driver_register_23_~tmp~24#1;~ldv_state_variable_3~0 := 1;assume { :begin_inline_ldv_initialize_platform_driver_3 } true;havoc ldv_initialize_platform_driver_3_#t~ret392#1.base, ldv_initialize_platform_driver_3_#t~ret392#1.offset, ldv_initialize_platform_driver_3_~tmp~19#1.base, ldv_initialize_platform_driver_3_~tmp~19#1.offset;havoc ldv_initialize_platform_driver_3_~tmp~19#1.base, ldv_initialize_platform_driver_3_~tmp~19#1.offset; {34641#true} is VALID [2022-02-20 22:04:09,475 INFO L272 TraceCheckUtils]: 12: Hoare triple {34641#true} call ldv_initialize_platform_driver_3_#t~ret392#1.base, ldv_initialize_platform_driver_3_#t~ret392#1.offset := ldv_zalloc(1464); {34641#true} is VALID [2022-02-20 22:04:09,476 INFO L290 TraceCheckUtils]: 13: Hoare triple {34641#true} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {34641#true} is VALID [2022-02-20 22:04:09,476 INFO L290 TraceCheckUtils]: 14: Hoare triple {34641#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {34641#true} is VALID [2022-02-20 22:04:09,476 INFO L290 TraceCheckUtils]: 15: Hoare triple {34641#true} assume true; {34641#true} is VALID [2022-02-20 22:04:09,476 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {34641#true} {34641#true} #1791#return; {34641#true} is VALID [2022-02-20 22:04:09,476 INFO L290 TraceCheckUtils]: 17: Hoare triple {34641#true} ldv_initialize_platform_driver_3_~tmp~19#1.base, ldv_initialize_platform_driver_3_~tmp~19#1.offset := ldv_initialize_platform_driver_3_#t~ret392#1.base, ldv_initialize_platform_driver_3_#t~ret392#1.offset;havoc ldv_initialize_platform_driver_3_#t~ret392#1.base, ldv_initialize_platform_driver_3_#t~ret392#1.offset;~snd_serial_driver_group0~0.base, ~snd_serial_driver_group0~0.offset := ldv_initialize_platform_driver_3_~tmp~19#1.base, ldv_initialize_platform_driver_3_~tmp~19#1.offset; {34641#true} is VALID [2022-02-20 22:04:09,476 INFO L290 TraceCheckUtils]: 18: Hoare triple {34641#true} assume { :end_inline_ldv_initialize_platform_driver_3 } true;ldv___platform_driver_register_23_#res#1 := ldv___platform_driver_register_23_~ldv_func_res~2#1; {34641#true} is VALID [2022-02-20 22:04:09,476 INFO L290 TraceCheckUtils]: 19: Hoare triple {34641#true} alsa_card_serial_init_#t~ret376#1 := ldv___platform_driver_register_23_#res#1;assume { :end_inline_ldv___platform_driver_register_23 } true;assume -2147483648 <= alsa_card_serial_init_#t~ret376#1 && alsa_card_serial_init_#t~ret376#1 <= 2147483647;alsa_card_serial_init_~err~3#1 := alsa_card_serial_init_#t~ret376#1;havoc alsa_card_serial_init_#t~ret376#1; {34641#true} is VALID [2022-02-20 22:04:09,476 INFO L290 TraceCheckUtils]: 20: Hoare triple {34641#true} assume !(alsa_card_serial_init_~err~3#1 < 0);alsa_card_serial_init_~cards~0#1 := 0;alsa_card_serial_init_~i~1#1 := 0; {34641#true} is VALID [2022-02-20 22:04:09,477 INFO L290 TraceCheckUtils]: 21: Hoare triple {34641#true} assume alsa_card_serial_init_~i~1#1 <= 31; {34641#true} is VALID [2022-02-20 22:04:09,477 INFO L290 TraceCheckUtils]: 22: Hoare triple {34641#true} call alsa_card_serial_init_#t~mem377#1 := read~int(~#enable~0.base, ~#enable~0.offset + alsa_card_serial_init_~i~1#1, 1); {34641#true} is VALID [2022-02-20 22:04:09,477 INFO L290 TraceCheckUtils]: 23: Hoare triple {34641#true} assume !(0 == alsa_card_serial_init_#t~mem377#1 % 256);havoc alsa_card_serial_init_#t~mem377#1;assume { :begin_inline_platform_device_register_simple } true;platform_device_register_simple_#in~name#1.base, platform_device_register_simple_#in~name#1.offset, platform_device_register_simple_#in~id___0#1, platform_device_register_simple_#in~res#1.base, platform_device_register_simple_#in~res#1.offset, platform_device_register_simple_#in~num#1 := 33, 0, alsa_card_serial_init_~i~1#1, 0, 0, 0;havoc platform_device_register_simple_#res#1.base, platform_device_register_simple_#res#1.offset;havoc platform_device_register_simple_#t~ret48#1.base, platform_device_register_simple_#t~ret48#1.offset, platform_device_register_simple_~name#1.base, platform_device_register_simple_~name#1.offset, platform_device_register_simple_~id___0#1, platform_device_register_simple_~res#1.base, platform_device_register_simple_~res#1.offset, platform_device_register_simple_~num#1, platform_device_register_simple_~tmp~7#1.base, platform_device_register_simple_~tmp~7#1.offset;platform_device_register_simple_~name#1.base, platform_device_register_simple_~name#1.offset := platform_device_register_simple_#in~name#1.base, platform_device_register_simple_#in~name#1.offset;platform_device_register_simple_~id___0#1 := platform_device_register_simple_#in~id___0#1;platform_device_register_simple_~res#1.base, platform_device_register_simple_~res#1.offset := platform_device_register_simple_#in~res#1.base, platform_device_register_simple_#in~res#1.offset;platform_device_register_simple_~num#1 := platform_device_register_simple_#in~num#1;havoc platform_device_register_simple_~tmp~7#1.base, platform_device_register_simple_~tmp~7#1.offset;assume { :begin_inline_platform_device_register_resndata } true;platform_device_register_resndata_#in~parent#1.base, platform_device_register_resndata_#in~parent#1.offset, platform_device_register_resndata_#in~name#1.base, platform_device_register_resndata_#in~name#1.offset, platform_device_register_resndata_#in~id___0#1, platform_device_register_resndata_#in~res#1.base, platform_device_register_resndata_#in~res#1.offset, platform_device_register_resndata_#in~num#1, platform_device_register_resndata_#in~data#1.base, platform_device_register_resndata_#in~data#1.offset, platform_device_register_resndata_#in~size#1 := 0, 0, platform_device_register_simple_~name#1.base, platform_device_register_simple_~name#1.offset, platform_device_register_simple_~id___0#1, platform_device_register_simple_~res#1.base, platform_device_register_simple_~res#1.offset, platform_device_register_simple_~num#1, 0, 0, 0;havoc platform_device_register_resndata_#res#1.base, platform_device_register_resndata_#res#1.offset;havoc platform_device_register_resndata_#t~ret47#1.base, platform_device_register_resndata_#t~ret47#1.offset, platform_device_register_resndata_~parent#1.base, platform_device_register_resndata_~parent#1.offset, platform_device_register_resndata_~name#1.base, platform_device_register_resndata_~name#1.offset, platform_device_register_resndata_~id___0#1, platform_device_register_resndata_~res#1.base, platform_device_register_resndata_~res#1.offset, platform_device_register_resndata_~num#1, platform_device_register_resndata_~data#1.base, platform_device_register_resndata_~data#1.offset, platform_device_register_resndata_~size#1, platform_device_register_resndata_~#pdevinfo~0#1.base, platform_device_register_resndata_~#pdevinfo~0#1.offset, platform_device_register_resndata_~tmp~6#1.base, platform_device_register_resndata_~tmp~6#1.offset;platform_device_register_resndata_~parent#1.base, platform_device_register_resndata_~parent#1.offset := platform_device_register_resndata_#in~parent#1.base, platform_device_register_resndata_#in~parent#1.offset;platform_device_register_resndata_~name#1.base, platform_device_register_resndata_~name#1.offset := platform_device_register_resndata_#in~name#1.base, platform_device_register_resndata_#in~name#1.offset;platform_device_register_resndata_~id___0#1 := platform_device_register_resndata_#in~id___0#1;platform_device_register_resndata_~res#1.base, platform_device_register_resndata_~res#1.offset := platform_device_register_resndata_#in~res#1.base, platform_device_register_resndata_#in~res#1.offset;platform_device_register_resndata_~num#1 := platform_device_register_resndata_#in~num#1;platform_device_register_resndata_~data#1.base, platform_device_register_resndata_~data#1.offset := platform_device_register_resndata_#in~data#1.base, platform_device_register_resndata_#in~data#1.offset;platform_device_register_resndata_~size#1 := platform_device_register_resndata_#in~size#1;call platform_device_register_resndata_~#pdevinfo~0#1.base, platform_device_register_resndata_~#pdevinfo~0#1.offset := #Ultimate.allocOnStack(64);havoc platform_device_register_resndata_~tmp~6#1.base, platform_device_register_resndata_~tmp~6#1.offset;call write~$Pointer$(platform_device_register_resndata_~parent#1.base, platform_device_register_resndata_~parent#1.offset, platform_device_register_resndata_~#pdevinfo~0#1.base, platform_device_register_resndata_~#pdevinfo~0#1.offset, 8);call write~$Pointer$(0, 0, platform_device_register_resndata_~#pdevinfo~0#1.base, 8 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 8);call write~$Pointer$(platform_device_register_resndata_~name#1.base, platform_device_register_resndata_~name#1.offset, platform_device_register_resndata_~#pdevinfo~0#1.base, 16 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 8);call write~int(platform_device_register_resndata_~id___0#1, platform_device_register_resndata_~#pdevinfo~0#1.base, 24 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 4);call write~$Pointer$(platform_device_register_resndata_~res#1.base, platform_device_register_resndata_~res#1.offset, platform_device_register_resndata_~#pdevinfo~0#1.base, 28 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 8);call write~int(platform_device_register_resndata_~num#1, platform_device_register_resndata_~#pdevinfo~0#1.base, 36 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 4);call write~$Pointer$(platform_device_register_resndata_~data#1.base, platform_device_register_resndata_~data#1.offset, platform_device_register_resndata_~#pdevinfo~0#1.base, 40 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 8);call write~int(platform_device_register_resndata_~size#1, platform_device_register_resndata_~#pdevinfo~0#1.base, 48 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 8);call write~int(0, platform_device_register_resndata_~#pdevinfo~0#1.base, 56 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 8);assume { :begin_inline_platform_device_register_full } true;platform_device_register_full_#in~arg0#1.base, platform_device_register_full_#in~arg0#1.offset := platform_device_register_resndata_~#pdevinfo~0#1.base, platform_device_register_resndata_~#pdevinfo~0#1.offset;havoc platform_device_register_full_#res#1.base, platform_device_register_full_#res#1.offset;havoc platform_device_register_full_#t~ret429#1.base, platform_device_register_full_#t~ret429#1.offset, platform_device_register_full_~arg0#1.base, platform_device_register_full_~arg0#1.offset;platform_device_register_full_~arg0#1.base, platform_device_register_full_~arg0#1.offset := platform_device_register_full_#in~arg0#1.base, platform_device_register_full_#in~arg0#1.offset; {34641#true} is VALID [2022-02-20 22:04:09,477 INFO L272 TraceCheckUtils]: 24: Hoare triple {34641#true} call platform_device_register_full_#t~ret429#1.base, platform_device_register_full_#t~ret429#1.offset := ldv_malloc(1386); {34641#true} is VALID [2022-02-20 22:04:09,477 INFO L290 TraceCheckUtils]: 25: Hoare triple {34641#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~1.base, ~tmp~1.offset;havoc ~tmp___0~0;assume -2147483648 <= #t~nondet27 && #t~nondet27 <= 2147483647;~tmp___0~0 := #t~nondet27;havoc #t~nondet27; {34641#true} is VALID [2022-02-20 22:04:09,477 INFO L290 TraceCheckUtils]: 26: Hoare triple {34641#true} assume 0 != ~tmp___0~0;#res.base, #res.offset := 0, 0; {34641#true} is VALID [2022-02-20 22:04:09,477 INFO L290 TraceCheckUtils]: 27: Hoare triple {34641#true} assume true; {34641#true} is VALID [2022-02-20 22:04:09,477 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {34641#true} {34641#true} #1793#return; {34641#true} is VALID [2022-02-20 22:04:09,478 INFO L290 TraceCheckUtils]: 29: Hoare triple {34641#true} platform_device_register_full_#res#1.base, platform_device_register_full_#res#1.offset := platform_device_register_full_#t~ret429#1.base, platform_device_register_full_#t~ret429#1.offset;havoc platform_device_register_full_#t~ret429#1.base, platform_device_register_full_#t~ret429#1.offset; {34641#true} is VALID [2022-02-20 22:04:09,478 INFO L290 TraceCheckUtils]: 30: Hoare triple {34641#true} platform_device_register_resndata_#t~ret47#1.base, platform_device_register_resndata_#t~ret47#1.offset := platform_device_register_full_#res#1.base, platform_device_register_full_#res#1.offset;assume { :end_inline_platform_device_register_full } true;platform_device_register_resndata_~tmp~6#1.base, platform_device_register_resndata_~tmp~6#1.offset := platform_device_register_resndata_#t~ret47#1.base, platform_device_register_resndata_#t~ret47#1.offset;havoc platform_device_register_resndata_#t~ret47#1.base, platform_device_register_resndata_#t~ret47#1.offset;platform_device_register_resndata_#res#1.base, platform_device_register_resndata_#res#1.offset := platform_device_register_resndata_~tmp~6#1.base, platform_device_register_resndata_~tmp~6#1.offset;call ULTIMATE.dealloc(platform_device_register_resndata_~#pdevinfo~0#1.base, platform_device_register_resndata_~#pdevinfo~0#1.offset);havoc platform_device_register_resndata_~#pdevinfo~0#1.base, platform_device_register_resndata_~#pdevinfo~0#1.offset; {34641#true} is VALID [2022-02-20 22:04:09,478 INFO L290 TraceCheckUtils]: 31: Hoare triple {34641#true} platform_device_register_simple_#t~ret48#1.base, platform_device_register_simple_#t~ret48#1.offset := platform_device_register_resndata_#res#1.base, platform_device_register_resndata_#res#1.offset;assume { :end_inline_platform_device_register_resndata } true;platform_device_register_simple_~tmp~7#1.base, platform_device_register_simple_~tmp~7#1.offset := platform_device_register_simple_#t~ret48#1.base, platform_device_register_simple_#t~ret48#1.offset;havoc platform_device_register_simple_#t~ret48#1.base, platform_device_register_simple_#t~ret48#1.offset;platform_device_register_simple_#res#1.base, platform_device_register_simple_#res#1.offset := platform_device_register_simple_~tmp~7#1.base, platform_device_register_simple_~tmp~7#1.offset; {34641#true} is VALID [2022-02-20 22:04:09,478 INFO L290 TraceCheckUtils]: 32: Hoare triple {34641#true} alsa_card_serial_init_#t~ret378#1.base, alsa_card_serial_init_#t~ret378#1.offset := platform_device_register_simple_#res#1.base, platform_device_register_simple_#res#1.offset;assume { :end_inline_platform_device_register_simple } true;alsa_card_serial_init_~device~0#1.base, alsa_card_serial_init_~device~0#1.offset := alsa_card_serial_init_#t~ret378#1.base, alsa_card_serial_init_#t~ret378#1.offset;havoc alsa_card_serial_init_#t~ret378#1.base, alsa_card_serial_init_#t~ret378#1.offset; {34641#true} is VALID [2022-02-20 22:04:09,478 INFO L272 TraceCheckUtils]: 33: Hoare triple {34641#true} call alsa_card_serial_init_#t~ret379#1 := IS_ERR(alsa_card_serial_init_~device~0#1.base, alsa_card_serial_init_~device~0#1.offset); {34641#true} is VALID [2022-02-20 22:04:09,478 INFO L290 TraceCheckUtils]: 34: Hoare triple {34641#true} ~ptr#1.base, ~ptr#1.offset := #in~ptr#1.base, #in~ptr#1.offset;havoc ~tmp~0#1;assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := (if (~ptr#1.base + ~ptr#1.offset) % 18446744073709551616 > 18446744073709547520 then 1 else 0), 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; {34641#true} is VALID [2022-02-20 22:04:09,478 INFO L290 TraceCheckUtils]: 35: Hoare triple {34641#true} #t~ret9#1 := ldv__builtin_expect_#res#1;assume { :end_inline_ldv__builtin_expect } true;assume -9223372036854775808 <= #t~ret9#1 && #t~ret9#1 <= 9223372036854775807;~tmp~0#1 := #t~ret9#1;havoc #t~ret9#1;#res#1 := (if 0 == (if 0 != ~tmp~0#1 then 1 else 0) then 0 else 1); {34641#true} is VALID [2022-02-20 22:04:09,479 INFO L290 TraceCheckUtils]: 36: Hoare triple {34641#true} assume true; {34641#true} is VALID [2022-02-20 22:04:09,479 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {34641#true} {34641#true} #1795#return; {34641#true} is VALID [2022-02-20 22:04:09,479 INFO L290 TraceCheckUtils]: 38: Hoare triple {34641#true} alsa_card_serial_init_~tmp~15#1 := alsa_card_serial_init_#t~ret379#1;havoc alsa_card_serial_init_#t~ret379#1; {34641#true} is VALID [2022-02-20 22:04:09,479 INFO L290 TraceCheckUtils]: 39: Hoare triple {34641#true} assume !(0 != alsa_card_serial_init_~tmp~15#1 % 256); {34641#true} is VALID [2022-02-20 22:04:09,479 INFO L272 TraceCheckUtils]: 40: Hoare triple {34641#true} call alsa_card_serial_init_#t~ret380#1.base, alsa_card_serial_init_#t~ret380#1.offset := platform_get_drvdata(alsa_card_serial_init_~device~0#1.base, alsa_card_serial_init_~device~0#1.offset); {34641#true} is VALID [2022-02-20 22:04:09,479 INFO L290 TraceCheckUtils]: 41: Hoare triple {34641#true} ~pdev#1.base, ~pdev#1.offset := #in~pdev#1.base, #in~pdev#1.offset;havoc ~tmp~8#1.base, ~tmp~8#1.offset;assume { :begin_inline_dev_get_drvdata } true;dev_get_drvdata_#in~dev#1.base, dev_get_drvdata_#in~dev#1.offset := ~pdev#1.base, 13 + ~pdev#1.offset;havoc dev_get_drvdata_#res#1.base, dev_get_drvdata_#res#1.offset;havoc dev_get_drvdata_#t~mem44#1.base, dev_get_drvdata_#t~mem44#1.offset, dev_get_drvdata_~dev#1.base, dev_get_drvdata_~dev#1.offset;dev_get_drvdata_~dev#1.base, dev_get_drvdata_~dev#1.offset := dev_get_drvdata_#in~dev#1.base, dev_get_drvdata_#in~dev#1.offset;call dev_get_drvdata_#t~mem44#1.base, dev_get_drvdata_#t~mem44#1.offset := read~$Pointer$(dev_get_drvdata_~dev#1.base, 489 + dev_get_drvdata_~dev#1.offset, 8);dev_get_drvdata_#res#1.base, dev_get_drvdata_#res#1.offset := dev_get_drvdata_#t~mem44#1.base, dev_get_drvdata_#t~mem44#1.offset;havoc dev_get_drvdata_#t~mem44#1.base, dev_get_drvdata_#t~mem44#1.offset; {34641#true} is VALID [2022-02-20 22:04:09,479 INFO L290 TraceCheckUtils]: 42: Hoare triple {34641#true} #t~ret52#1.base, #t~ret52#1.offset := dev_get_drvdata_#res#1.base, dev_get_drvdata_#res#1.offset;assume { :end_inline_dev_get_drvdata } true;~tmp~8#1.base, ~tmp~8#1.offset := #t~ret52#1.base, #t~ret52#1.offset;havoc #t~ret52#1.base, #t~ret52#1.offset;#res#1.base, #res#1.offset := ~tmp~8#1.base, ~tmp~8#1.offset; {34641#true} is VALID [2022-02-20 22:04:09,479 INFO L290 TraceCheckUtils]: 43: Hoare triple {34641#true} assume true; {34641#true} is VALID [2022-02-20 22:04:09,479 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {34641#true} {34641#true} #1797#return; {34641#true} is VALID [2022-02-20 22:04:09,480 INFO L290 TraceCheckUtils]: 45: Hoare triple {34641#true} alsa_card_serial_init_~tmp___0~5#1.base, alsa_card_serial_init_~tmp___0~5#1.offset := alsa_card_serial_init_#t~ret380#1.base, alsa_card_serial_init_#t~ret380#1.offset;havoc alsa_card_serial_init_#t~ret380#1.base, alsa_card_serial_init_#t~ret380#1.offset; {34641#true} is VALID [2022-02-20 22:04:09,480 INFO L290 TraceCheckUtils]: 46: Hoare triple {34641#true} assume !(0 == (alsa_card_serial_init_~tmp___0~5#1.base + alsa_card_serial_init_~tmp___0~5#1.offset) % 18446744073709551616);call write~$Pointer$(alsa_card_serial_init_~device~0#1.base, alsa_card_serial_init_~device~0#1.offset, ~#devices~0.base, ~#devices~0.offset + 8 * alsa_card_serial_init_~i~1#1, 8);alsa_card_serial_init_~cards~0#1 := 1 + alsa_card_serial_init_~cards~0#1; {34641#true} is VALID [2022-02-20 22:04:09,480 INFO L290 TraceCheckUtils]: 47: Hoare triple {34641#true} alsa_card_serial_init_~i~1#1 := 1 + alsa_card_serial_init_~i~1#1; {34641#true} is VALID [2022-02-20 22:04:09,480 INFO L290 TraceCheckUtils]: 48: Hoare triple {34641#true} assume !(alsa_card_serial_init_~i~1#1 <= 31); {34641#true} is VALID [2022-02-20 22:04:09,480 INFO L290 TraceCheckUtils]: 49: Hoare triple {34641#true} assume !(0 == alsa_card_serial_init_~cards~0#1);alsa_card_serial_init_#res#1 := 0; {34641#true} is VALID [2022-02-20 22:04:09,480 INFO L290 TraceCheckUtils]: 50: Hoare triple {34641#true} main_#t~ret409#1 := alsa_card_serial_init_#res#1;assume { :end_inline_alsa_card_serial_init } true;assume -2147483648 <= main_#t~ret409#1 && main_#t~ret409#1 <= 2147483647;~ldv_retval_2~0 := main_#t~ret409#1;havoc main_#t~ret409#1; {34641#true} is VALID [2022-02-20 22:04:09,480 INFO L290 TraceCheckUtils]: 51: Hoare triple {34641#true} assume !(0 != ~ldv_retval_2~0); {34641#true} is VALID [2022-02-20 22:04:09,480 INFO L290 TraceCheckUtils]: 52: Hoare triple {34641#true} assume 0 == ~ldv_retval_2~0;~ldv_state_variable_0~0 := 2;~ldv_state_variable_5~0 := 1;assume { :begin_inline_ldv_initialize_snd_rawmidi_ops_5 } true;havoc ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.base, ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.offset, ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.base, ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.offset;havoc ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.base, ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.offset; {34641#true} is VALID [2022-02-20 22:04:09,481 INFO L272 TraceCheckUtils]: 53: Hoare triple {34641#true} call ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.base, ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.offset := ldv_zalloc(112); {34641#true} is VALID [2022-02-20 22:04:09,481 INFO L290 TraceCheckUtils]: 54: Hoare triple {34641#true} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {34641#true} is VALID [2022-02-20 22:04:09,481 INFO L290 TraceCheckUtils]: 55: Hoare triple {34641#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {34641#true} is VALID [2022-02-20 22:04:09,481 INFO L290 TraceCheckUtils]: 56: Hoare triple {34641#true} assume true; {34641#true} is VALID [2022-02-20 22:04:09,481 INFO L284 TraceCheckUtils]: 57: Hoare quadruple {34641#true} {34641#true} #1803#return; {34641#true} is VALID [2022-02-20 22:04:09,481 INFO L290 TraceCheckUtils]: 58: Hoare triple {34641#true} ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.base, ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.offset := ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.base, ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.offset;havoc ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.base, ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.offset;~snd_uart16550_output_group0~0.base, ~snd_uart16550_output_group0~0.offset := ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.base, ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.offset; {34641#true} is VALID [2022-02-20 22:04:09,481 INFO L290 TraceCheckUtils]: 59: Hoare triple {34641#true} assume { :end_inline_ldv_initialize_snd_rawmidi_ops_5 } true;~ldv_state_variable_4~0 := 1;assume { :begin_inline_ldv_initialize_snd_rawmidi_ops_4 } true;havoc ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.base, ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.offset, ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.base, ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.offset;havoc ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.base, ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.offset; {34641#true} is VALID [2022-02-20 22:04:09,481 INFO L272 TraceCheckUtils]: 60: Hoare triple {34641#true} call ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.base, ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.offset := ldv_zalloc(112); {34641#true} is VALID [2022-02-20 22:04:09,482 INFO L290 TraceCheckUtils]: 61: Hoare triple {34641#true} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {34641#true} is VALID [2022-02-20 22:04:09,482 INFO L290 TraceCheckUtils]: 62: Hoare triple {34641#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {34641#true} is VALID [2022-02-20 22:04:09,482 INFO L290 TraceCheckUtils]: 63: Hoare triple {34641#true} assume true; {34641#true} is VALID [2022-02-20 22:04:09,482 INFO L284 TraceCheckUtils]: 64: Hoare quadruple {34641#true} {34641#true} #1805#return; {34641#true} is VALID [2022-02-20 22:04:09,482 INFO L290 TraceCheckUtils]: 65: Hoare triple {34641#true} ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.base, ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.offset := ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.base, ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.offset;havoc ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.base, ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.offset;~snd_uart16550_input_group0~0.base, ~snd_uart16550_input_group0~0.offset := ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.base, ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.offset; {34641#true} is VALID [2022-02-20 22:04:09,482 INFO L290 TraceCheckUtils]: 66: Hoare triple {34641#true} assume { :end_inline_ldv_initialize_snd_rawmidi_ops_4 } true; {34641#true} is VALID [2022-02-20 22:04:09,482 INFO L290 TraceCheckUtils]: 67: Hoare triple {34641#true} assume -2147483648 <= main_#t~nondet401#1 && main_#t~nondet401#1 <= 2147483647;main_~tmp___1~2#1 := main_#t~nondet401#1;havoc main_#t~nondet401#1;main_#t~switch402#1 := 0 == main_~tmp___1~2#1; {34641#true} is VALID [2022-02-20 22:04:09,482 INFO L290 TraceCheckUtils]: 68: Hoare triple {34641#true} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 1 == main_~tmp___1~2#1; {34641#true} is VALID [2022-02-20 22:04:09,483 INFO L290 TraceCheckUtils]: 69: Hoare triple {34641#true} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 2 == main_~tmp___1~2#1; {34641#true} is VALID [2022-02-20 22:04:09,483 INFO L290 TraceCheckUtils]: 70: Hoare triple {34641#true} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 3 == main_~tmp___1~2#1; {34641#true} is VALID [2022-02-20 22:04:09,483 INFO L290 TraceCheckUtils]: 71: Hoare triple {34641#true} assume main_#t~switch402#1; {34641#true} is VALID [2022-02-20 22:04:09,483 INFO L290 TraceCheckUtils]: 72: Hoare triple {34641#true} assume 0 != ~ldv_state_variable_3~0;assume -2147483648 <= main_#t~nondet410#1 && main_#t~nondet410#1 <= 2147483647;main_~tmp___4~0#1 := main_#t~nondet410#1;havoc main_#t~nondet410#1;main_#t~switch411#1 := 0 == main_~tmp___4~0#1; {34641#true} is VALID [2022-02-20 22:04:09,483 INFO L290 TraceCheckUtils]: 73: Hoare triple {34641#true} assume main_#t~switch411#1; {34641#true} is VALID [2022-02-20 22:04:09,483 INFO L290 TraceCheckUtils]: 74: Hoare triple {34641#true} assume 1 == ~ldv_state_variable_3~0;assume { :begin_inline_snd_serial_probe } true;snd_serial_probe_#in~devptr#1.base, snd_serial_probe_#in~devptr#1.offset := ~snd_serial_driver_group0~0.base, ~snd_serial_driver_group0~0.offset;havoc snd_serial_probe_#res#1;havoc snd_serial_probe_#t~mem326#1, snd_serial_probe_#t~mem327#1, snd_serial_probe_#t~switch328#1, snd_serial_probe_#t~mem329#1, snd_serial_probe_#t~mem330#1, snd_serial_probe_#t~mem331#1, snd_serial_probe_#t~short332#1, snd_serial_probe_#t~mem333#1, snd_serial_probe_#t~mem334#1, snd_serial_probe_#t~mem335#1, snd_serial_probe_#t~short336#1, snd_serial_probe_#t~mem337#1, snd_serial_probe_#t~mem338#1, snd_serial_probe_#t~mem339#1.base, snd_serial_probe_#t~mem339#1.offset, snd_serial_probe_#t~ret340#1, snd_serial_probe_#t~mem341#1.base, snd_serial_probe_#t~mem341#1.offset, snd_serial_probe_#t~strcpy~res342#1.base, snd_serial_probe_#t~strcpy~res342#1.offset, snd_serial_probe_#t~mem343#1.base, snd_serial_probe_#t~mem343#1.offset, snd_serial_probe_#t~strcpy~res344#1.base, snd_serial_probe_#t~strcpy~res344#1.offset, snd_serial_probe_#t~mem345#1.base, snd_serial_probe_#t~mem345#1.offset, snd_serial_probe_#t~mem346#1, snd_serial_probe_#t~mem347#1, snd_serial_probe_#t~mem348#1, snd_serial_probe_#t~mem349#1, snd_serial_probe_#t~mem350#1, snd_serial_probe_#t~mem351#1, snd_serial_probe_#t~ret352#1, snd_serial_probe_#t~mem353#1.base, snd_serial_probe_#t~mem353#1.offset, snd_serial_probe_#t~mem354#1, snd_serial_probe_#t~mem355#1, snd_serial_probe_#t~mem356#1.base, snd_serial_probe_#t~mem356#1.offset, snd_serial_probe_#t~ret357#1, snd_serial_probe_#t~nondet358#1, snd_serial_probe_#t~mem359#1.base, snd_serial_probe_#t~mem359#1.offset, snd_serial_probe_#t~mem360#1.base, snd_serial_probe_#t~mem360#1.offset, snd_serial_probe_#t~mem361#1.base, snd_serial_probe_#t~mem361#1.offset, snd_serial_probe_#t~mem362#1, snd_serial_probe_#t~mem363#1.base, snd_serial_probe_#t~mem363#1.offset, snd_serial_probe_#t~mem364#1.base, snd_serial_probe_#t~mem364#1.offset, snd_serial_probe_#t~mem365#1, snd_serial_probe_#t~mem366#1.base, snd_serial_probe_#t~mem366#1.offset, snd_serial_probe_#t~mem367#1, snd_serial_probe_#t~mem368#1.base, snd_serial_probe_#t~mem368#1.offset, snd_serial_probe_#t~ret369#1, snd_serial_probe_#t~mem370#1.base, snd_serial_probe_#t~mem370#1.offset, snd_serial_probe_#t~mem371#1.base, snd_serial_probe_#t~mem371#1.offset, snd_serial_probe_#t~ret372#1, snd_serial_probe_~devptr#1.base, snd_serial_probe_~devptr#1.offset, snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset, snd_serial_probe_~#uart~11#1.base, snd_serial_probe_~#uart~11#1.offset, snd_serial_probe_~err~2#1, snd_serial_probe_~dev~0#1;snd_serial_probe_~devptr#1.base, snd_serial_probe_~devptr#1.offset := snd_serial_probe_#in~devptr#1.base, snd_serial_probe_#in~devptr#1.offset;call snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset := #Ultimate.allocOnStack(8);call snd_serial_probe_~#uart~11#1.base, snd_serial_probe_~#uart~11#1.offset := #Ultimate.allocOnStack(8);havoc snd_serial_probe_~err~2#1;havoc snd_serial_probe_~dev~0#1;call snd_serial_probe_#t~mem326#1 := read~int(snd_serial_probe_~devptr#1.base, 8 + snd_serial_probe_~devptr#1.offset, 4);snd_serial_probe_~dev~0#1 := snd_serial_probe_#t~mem326#1;havoc snd_serial_probe_#t~mem326#1;call snd_serial_probe_#t~mem327#1 := read~int(~#adaptor~0.base, ~#adaptor~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);snd_serial_probe_#t~switch328#1 := 0 == snd_serial_probe_#t~mem327#1; {34641#true} is VALID [2022-02-20 22:04:09,483 INFO L290 TraceCheckUtils]: 75: Hoare triple {34641#true} assume snd_serial_probe_#t~switch328#1;call write~int(1, ~#ins~0.base, ~#ins~0.offset + 4 * snd_serial_probe_~dev~0#1, 4); {34641#true} is VALID [2022-02-20 22:04:09,483 INFO L290 TraceCheckUtils]: 76: Hoare triple {34641#true} call snd_serial_probe_#t~mem330#1 := read~int(~#outs~0.base, ~#outs~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);snd_serial_probe_#t~short332#1 := snd_serial_probe_#t~mem330#1 <= 0; {34641#true} is VALID [2022-02-20 22:04:09,484 INFO L290 TraceCheckUtils]: 77: Hoare triple {34641#true} assume snd_serial_probe_#t~short332#1; {34916#|ULTIMATE.start_snd_serial_probe_#t~short332#1|} is VALID [2022-02-20 22:04:09,484 INFO L290 TraceCheckUtils]: 78: Hoare triple {34916#|ULTIMATE.start_snd_serial_probe_#t~short332#1|} assume !snd_serial_probe_#t~short332#1;havoc snd_serial_probe_#t~mem330#1;havoc snd_serial_probe_#t~mem331#1;havoc snd_serial_probe_#t~short332#1;call snd_serial_probe_#t~mem334#1 := read~int(~#ins~0.base, ~#ins~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);snd_serial_probe_#t~short336#1 := snd_serial_probe_#t~mem334#1 <= 0; {34642#false} is VALID [2022-02-20 22:04:09,484 INFO L290 TraceCheckUtils]: 79: Hoare triple {34642#false} assume snd_serial_probe_#t~short336#1; {34642#false} is VALID [2022-02-20 22:04:09,484 INFO L290 TraceCheckUtils]: 80: Hoare triple {34642#false} assume !snd_serial_probe_#t~short336#1;havoc snd_serial_probe_#t~mem334#1;havoc snd_serial_probe_#t~mem335#1;havoc snd_serial_probe_#t~short336#1;call snd_serial_probe_#t~mem338#1 := read~int(~#index~0.base, ~#index~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem339#1.base, snd_serial_probe_#t~mem339#1.offset := read~$Pointer$(~#id~0.base, ~#id~0.offset + 8 * snd_serial_probe_~dev~0#1, 8);assume { :begin_inline_snd_card_new } true;snd_card_new_#in~arg0#1.base, snd_card_new_#in~arg0#1.offset, snd_card_new_#in~arg1#1, snd_card_new_#in~arg2#1.base, snd_card_new_#in~arg2#1.offset, snd_card_new_#in~arg3#1.base, snd_card_new_#in~arg3#1.offset, snd_card_new_#in~arg4#1, snd_card_new_#in~arg5#1.base, snd_card_new_#in~arg5#1.offset := snd_serial_probe_~devptr#1.base, 13 + snd_serial_probe_~devptr#1.offset, snd_serial_probe_#t~mem338#1, snd_serial_probe_#t~mem339#1.base, snd_serial_probe_#t~mem339#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 0, snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset;havoc snd_card_new_#res#1;havoc snd_card_new_#t~nondet433#1, snd_card_new_~arg0#1.base, snd_card_new_~arg0#1.offset, snd_card_new_~arg1#1, snd_card_new_~arg2#1.base, snd_card_new_~arg2#1.offset, snd_card_new_~arg3#1.base, snd_card_new_~arg3#1.offset, snd_card_new_~arg4#1, snd_card_new_~arg5#1.base, snd_card_new_~arg5#1.offset;snd_card_new_~arg0#1.base, snd_card_new_~arg0#1.offset := snd_card_new_#in~arg0#1.base, snd_card_new_#in~arg0#1.offset;snd_card_new_~arg1#1 := snd_card_new_#in~arg1#1;snd_card_new_~arg2#1.base, snd_card_new_~arg2#1.offset := snd_card_new_#in~arg2#1.base, snd_card_new_#in~arg2#1.offset;snd_card_new_~arg3#1.base, snd_card_new_~arg3#1.offset := snd_card_new_#in~arg3#1.base, snd_card_new_#in~arg3#1.offset;snd_card_new_~arg4#1 := snd_card_new_#in~arg4#1;snd_card_new_~arg5#1.base, snd_card_new_~arg5#1.offset := snd_card_new_#in~arg5#1.base, snd_card_new_#in~arg5#1.offset;assume -2147483648 <= snd_card_new_#t~nondet433#1 && snd_card_new_#t~nondet433#1 <= 2147483647;snd_card_new_#res#1 := snd_card_new_#t~nondet433#1;havoc snd_card_new_#t~nondet433#1; {34642#false} is VALID [2022-02-20 22:04:09,484 INFO L290 TraceCheckUtils]: 81: Hoare triple {34642#false} snd_serial_probe_#t~ret340#1 := snd_card_new_#res#1;assume { :end_inline_snd_card_new } true;assume -2147483648 <= snd_serial_probe_#t~ret340#1 && snd_serial_probe_#t~ret340#1 <= 2147483647;snd_serial_probe_~err~2#1 := snd_serial_probe_#t~ret340#1;havoc snd_serial_probe_#t~mem338#1;havoc snd_serial_probe_#t~mem339#1.base, snd_serial_probe_#t~mem339#1.offset;havoc snd_serial_probe_#t~ret340#1; {34642#false} is VALID [2022-02-20 22:04:09,485 INFO L290 TraceCheckUtils]: 82: Hoare triple {34642#false} assume !(snd_serial_probe_~err~2#1 < 0);call snd_serial_probe_#t~mem341#1.base, snd_serial_probe_#t~mem341#1.offset := read~$Pointer$(snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset, 8); {34642#false} is VALID [2022-02-20 22:04:09,485 INFO L272 TraceCheckUtils]: 83: Hoare triple {34642#false} call snd_serial_probe_#t~strcpy~res342#1.base, snd_serial_probe_#t~strcpy~res342#1.offset := #Ultimate.C_strcpy(snd_serial_probe_#t~mem341#1.base, 20 + snd_serial_probe_#t~mem341#1.offset, 29, 0); {34642#false} is VALID [2022-02-20 22:04:09,485 INFO L290 TraceCheckUtils]: 84: Hoare triple {34642#false} #t~offset444 := 0; {34642#false} is VALID [2022-02-20 22:04:09,485 INFO L290 TraceCheckUtils]: 85: Hoare triple {34642#false} call #t~mem445 := read~int(src.base, src.offset + #t~offset444, 1);call write~unchecked~int(#t~mem445, dest.base, dest.offset + #t~offset444, 1); {34642#false} is VALID [2022-02-20 22:04:09,485 INFO L290 TraceCheckUtils]: 86: Hoare triple {34642#false} assume 0 == #t~mem445; {34642#false} is VALID [2022-02-20 22:04:09,485 INFO L290 TraceCheckUtils]: 87: Hoare triple {34642#false} assume #res.base == dest.base && #res.offset == dest.offset; {34642#false} is VALID [2022-02-20 22:04:09,485 INFO L284 TraceCheckUtils]: 88: Hoare quadruple {34642#false} {34642#false} #1809#return; {34642#false} is VALID [2022-02-20 22:04:09,485 INFO L290 TraceCheckUtils]: 89: Hoare triple {34642#false} havoc snd_serial_probe_#t~mem341#1.base, snd_serial_probe_#t~mem341#1.offset;havoc snd_serial_probe_#t~strcpy~res342#1.base, snd_serial_probe_#t~strcpy~res342#1.offset;call snd_serial_probe_#t~mem343#1.base, snd_serial_probe_#t~mem343#1.offset := read~$Pointer$(snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset, 8); {34642#false} is VALID [2022-02-20 22:04:09,486 INFO L272 TraceCheckUtils]: 90: Hoare triple {34642#false} call snd_serial_probe_#t~strcpy~res344#1.base, snd_serial_probe_#t~strcpy~res344#1.offset := #Ultimate.C_strcpy(snd_serial_probe_#t~mem343#1.base, 36 + snd_serial_probe_#t~mem343#1.offset, 30, 0); {34642#false} is VALID [2022-02-20 22:04:09,486 INFO L290 TraceCheckUtils]: 91: Hoare triple {34642#false} #t~offset444 := 0; {34642#false} is VALID [2022-02-20 22:04:09,486 INFO L290 TraceCheckUtils]: 92: Hoare triple {34642#false} call #t~mem445 := read~int(src.base, src.offset + #t~offset444, 1);call write~unchecked~int(#t~mem445, dest.base, dest.offset + #t~offset444, 1); {34642#false} is VALID [2022-02-20 22:04:09,486 INFO L290 TraceCheckUtils]: 93: Hoare triple {34642#false} assume 0 == #t~mem445; {34642#false} is VALID [2022-02-20 22:04:09,486 INFO L290 TraceCheckUtils]: 94: Hoare triple {34642#false} assume #res.base == dest.base && #res.offset == dest.offset; {34642#false} is VALID [2022-02-20 22:04:09,486 INFO L284 TraceCheckUtils]: 95: Hoare quadruple {34642#false} {34642#false} #1811#return; {34642#false} is VALID [2022-02-20 22:04:09,486 INFO L290 TraceCheckUtils]: 96: Hoare triple {34642#false} havoc snd_serial_probe_#t~mem343#1.base, snd_serial_probe_#t~mem343#1.offset;havoc snd_serial_probe_#t~strcpy~res344#1.base, snd_serial_probe_#t~strcpy~res344#1.offset;call snd_serial_probe_#t~mem345#1.base, snd_serial_probe_#t~mem345#1.offset := read~$Pointer$(snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset, 8);call snd_serial_probe_#t~mem346#1 := read~int(~#port~0.base, ~#port~0.offset + 8 * snd_serial_probe_~dev~0#1, 8);call snd_serial_probe_#t~mem347#1 := read~int(~#irq~0.base, ~#irq~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem348#1 := read~int(~#speed~0.base, ~#speed~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem349#1 := read~int(~#base~0.base, ~#base~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem350#1 := read~int(~#adaptor~0.base, ~#adaptor~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem351#1 := read~int(~#droponfull~0.base, ~#droponfull~0.offset + snd_serial_probe_~dev~0#1, 1);assume { :begin_inline_snd_uart16550_create } true;snd_uart16550_create_#in~card#1.base, snd_uart16550_create_#in~card#1.offset, snd_uart16550_create_#in~iobase#1, snd_uart16550_create_#in~irq___0#1, snd_uart16550_create_#in~speed___0#1, snd_uart16550_create_#in~base___0#1, snd_uart16550_create_#in~adaptor___0#1, snd_uart16550_create_#in~droponfull___0#1, snd_uart16550_create_#in~ruart#1.base, snd_uart16550_create_#in~ruart#1.offset := snd_serial_probe_#t~mem345#1.base, snd_serial_probe_#t~mem345#1.offset, snd_serial_probe_#t~mem346#1, snd_serial_probe_#t~mem347#1, snd_serial_probe_#t~mem348#1, snd_serial_probe_#t~mem349#1, snd_serial_probe_#t~mem350#1, snd_serial_probe_#t~mem351#1 % 256, snd_serial_probe_~#uart~11#1.base, snd_serial_probe_~#uart~11#1.offset;havoc snd_uart16550_create_#res#1;havoc snd_uart16550_create_#t~ret296#1.base, snd_uart16550_create_#t~ret296#1.offset, snd_uart16550_create_#t~ret297#1.base, snd_uart16550_create_#t~ret297#1.offset, snd_uart16550_create_#t~ret298#1, snd_uart16550_create_#t~nondet299#1, snd_uart16550_create_#t~ret300#1, snd_uart16550_create_#t~ret301#1, snd_uart16550_create_#t~mem302#1, snd_uart16550_create_#t~memset~res303#1.base, snd_uart16550_create_#t~memset~res303#1.offset, snd_uart16550_create_#t~ret304#1, snd_uart16550_create_#t~ret305#1, snd_uart16550_create_#t~ret306#1, snd_uart16550_create_#t~mem307#1, snd_uart16550_create_#t~switch308#1, snd_uart16550_create_#t~mem309#1, snd_uart16550_create_#t~mem310#1, snd_uart16550_create_~card#1.base, snd_uart16550_create_~card#1.offset, snd_uart16550_create_~iobase#1, snd_uart16550_create_~irq___0#1, snd_uart16550_create_~speed___0#1, snd_uart16550_create_~base___0#1, snd_uart16550_create_~adaptor___0#1, snd_uart16550_create_~droponfull___0#1, snd_uart16550_create_~ruart#1.base, snd_uart16550_create_~ruart#1.offset, snd_uart16550_create_~#ops~0#1.base, snd_uart16550_create_~#ops~0#1.offset, snd_uart16550_create_~uart~10#1.base, snd_uart16550_create_~uart~10#1.offset, snd_uart16550_create_~err~0#1, snd_uart16550_create_~tmp~13#1.base, snd_uart16550_create_~tmp~13#1.offset, snd_uart16550_create_~#__key~0#1.base, snd_uart16550_create_~#__key~0#1.offset, snd_uart16550_create_~tmp___0~4#1;snd_uart16550_create_~card#1.base, snd_uart16550_create_~card#1.offset := snd_uart16550_create_#in~card#1.base, snd_uart16550_create_#in~card#1.offset;snd_uart16550_create_~iobase#1 := snd_uart16550_create_#in~iobase#1;snd_uart16550_create_~irq___0#1 := snd_uart16550_create_#in~irq___0#1;snd_uart16550_create_~speed___0#1 := snd_uart16550_create_#in~speed___0#1;snd_uart16550_create_~base___0#1 := snd_uart16550_create_#in~base___0#1;snd_uart16550_create_~adaptor___0#1 := snd_uart16550_create_#in~adaptor___0#1;snd_uart16550_create_~droponfull___0#1 := snd_uart16550_create_#in~droponfull___0#1;snd_uart16550_create_~ruart#1.base, snd_uart16550_create_~ruart#1.offset := snd_uart16550_create_#in~ruart#1.base, snd_uart16550_create_#in~ruart#1.offset;call snd_uart16550_create_~#ops~0#1.base, snd_uart16550_create_~#ops~0#1.offset := #Ultimate.allocOnStack(24);havoc snd_uart16550_create_~uart~10#1.base, snd_uart16550_create_~uart~10#1.offset;havoc snd_uart16550_create_~err~0#1;havoc snd_uart16550_create_~tmp~13#1.base, snd_uart16550_create_~tmp~13#1.offset;call snd_uart16550_create_~#__key~0#1.base, snd_uart16550_create_~#__key~0#1.offset := #Ultimate.allocOnStack(8);havoc snd_uart16550_create_~tmp___0~4#1;call write~$Pointer$(#funAddr~snd_uart16550_dev_free.base, #funAddr~snd_uart16550_dev_free.offset, snd_uart16550_create_~#ops~0#1.base, snd_uart16550_create_~#ops~0#1.offset, 8);call write~$Pointer$(0, 0, snd_uart16550_create_~#ops~0#1.base, 8 + snd_uart16550_create_~#ops~0#1.offset, 8);call write~$Pointer$(0, 0, snd_uart16550_create_~#ops~0#1.base, 16 + snd_uart16550_create_~#ops~0#1.offset, 8);assume { :begin_inline_kzalloc } true;kzalloc_#in~size#1, kzalloc_#in~flags#1 := 33344, 208;havoc kzalloc_#res#1.base, kzalloc_#res#1.offset;havoc kzalloc_~size#1, kzalloc_~flags#1;kzalloc_~size#1 := kzalloc_#in~size#1;kzalloc_~flags#1 := kzalloc_#in~flags#1;assume { :begin_inline_ldv_check_alloc_flags } true;ldv_check_alloc_flags_#in~flags#1 := kzalloc_~flags#1;havoc ldv_check_alloc_flags_~flags#1;ldv_check_alloc_flags_~flags#1 := ldv_check_alloc_flags_#in~flags#1; {34642#false} is VALID [2022-02-20 22:04:09,486 INFO L290 TraceCheckUtils]: 97: Hoare triple {34642#false} assume !(0 == ~ldv_spin~0 || 0 == (if 0 == ldv_check_alloc_flags_~flags#1 then 0 else (if 1 == ldv_check_alloc_flags_~flags#1 then 0 else ~bitwiseAnd(ldv_check_alloc_flags_~flags#1, 16))) % 4294967296); {34642#false} is VALID [2022-02-20 22:04:09,487 INFO L272 TraceCheckUtils]: 98: Hoare triple {34642#false} call ldv_error(); {34642#false} is VALID [2022-02-20 22:04:09,487 INFO L290 TraceCheckUtils]: 99: Hoare triple {34642#false} assume !false; {34642#false} is VALID [2022-02-20 22:04:09,487 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2022-02-20 22:04:09,487 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-02-20 22:04:09,487 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [945023678] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:04:09,487 INFO L191 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-02-20 22:04:09,488 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [7] total 8 [2022-02-20 22:04:09,488 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1599256307] [2022-02-20 22:04:09,488 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:04:09,488 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 23.333333333333332) internal successors, (70), 3 states have internal predecessors, (70), 2 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 100 [2022-02-20 22:04:09,489 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:04:09,489 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 23.333333333333332) internal successors, (70), 3 states have internal predecessors, (70), 2 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2022-02-20 22:04:09,581 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 87 edges. 87 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:04:09,581 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-02-20 22:04:09,581 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:04:09,581 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-02-20 22:04:09,582 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-02-20 22:04:09,582 INFO L87 Difference]: Start difference. First operand 1059 states and 1520 transitions. Second operand has 3 states, 3 states have (on average 23.333333333333332) internal successors, (70), 3 states have internal predecessors, (70), 2 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2022-02-20 22:04:10,869 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:04:10,870 INFO L93 Difference]: Finished difference Result 2116 states and 3039 transitions. [2022-02-20 22:04:10,870 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-02-20 22:04:10,870 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 23.333333333333332) internal successors, (70), 3 states have internal predecessors, (70), 2 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 100 [2022-02-20 22:04:10,870 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 22:04:10,870 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 23.333333333333332) internal successors, (70), 3 states have internal predecessors, (70), 2 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2022-02-20 22:04:10,887 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 1799 transitions. [2022-02-20 22:04:10,887 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 23.333333333333332) internal successors, (70), 3 states have internal predecessors, (70), 2 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2022-02-20 22:04:10,905 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 1799 transitions. [2022-02-20 22:04:10,905 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 1799 transitions. [2022-02-20 22:04:12,207 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 1799 edges. 1799 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:04:12,260 INFO L225 Difference]: With dead ends: 2116 [2022-02-20 22:04:12,261 INFO L226 Difference]: Without dead ends: 1060 [2022-02-20 22:04:12,263 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 119 GetRequests, 113 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-02-20 22:04:12,264 INFO L933 BasicCegarLoop]: 899 mSDtfsCounter, 0 mSDsluCounter, 894 mSDsCounter, 0 mSdLazyCounter, 6 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1793 SdHoareTripleChecker+Invalid, 6 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 6 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-02-20 22:04:12,264 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [0 Valid, 1793 Invalid, 6 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 6 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-02-20 22:04:12,265 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1060 states. [2022-02-20 22:04:12,285 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1060 to 1060. [2022-02-20 22:04:12,285 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 22:04:12,287 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1060 states. Second operand has 1060 states, 797 states have (on average 1.3726474278544543) internal successors, (1094), 817 states have internal predecessors, (1094), 214 states have call successors, (214), 49 states have call predecessors, (214), 48 states have return successors, (213), 213 states have call predecessors, (213), 213 states have call successors, (213) [2022-02-20 22:04:12,288 INFO L74 IsIncluded]: Start isIncluded. First operand 1060 states. Second operand has 1060 states, 797 states have (on average 1.3726474278544543) internal successors, (1094), 817 states have internal predecessors, (1094), 214 states have call successors, (214), 49 states have call predecessors, (214), 48 states have return successors, (213), 213 states have call predecessors, (213), 213 states have call successors, (213) [2022-02-20 22:04:12,289 INFO L87 Difference]: Start difference. First operand 1060 states. Second operand has 1060 states, 797 states have (on average 1.3726474278544543) internal successors, (1094), 817 states have internal predecessors, (1094), 214 states have call successors, (214), 49 states have call predecessors, (214), 48 states have return successors, (213), 213 states have call predecessors, (213), 213 states have call successors, (213) [2022-02-20 22:04:12,326 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:04:12,326 INFO L93 Difference]: Finished difference Result 1060 states and 1521 transitions. [2022-02-20 22:04:12,326 INFO L276 IsEmpty]: Start isEmpty. Operand 1060 states and 1521 transitions. [2022-02-20 22:04:12,329 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:04:12,329 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:04:12,330 INFO L74 IsIncluded]: Start isIncluded. First operand has 1060 states, 797 states have (on average 1.3726474278544543) internal successors, (1094), 817 states have internal predecessors, (1094), 214 states have call successors, (214), 49 states have call predecessors, (214), 48 states have return successors, (213), 213 states have call predecessors, (213), 213 states have call successors, (213) Second operand 1060 states. [2022-02-20 22:04:12,332 INFO L87 Difference]: Start difference. First operand has 1060 states, 797 states have (on average 1.3726474278544543) internal successors, (1094), 817 states have internal predecessors, (1094), 214 states have call successors, (214), 49 states have call predecessors, (214), 48 states have return successors, (213), 213 states have call predecessors, (213), 213 states have call successors, (213) Second operand 1060 states. [2022-02-20 22:04:12,368 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:04:12,369 INFO L93 Difference]: Finished difference Result 1060 states and 1521 transitions. [2022-02-20 22:04:12,369 INFO L276 IsEmpty]: Start isEmpty. Operand 1060 states and 1521 transitions. [2022-02-20 22:04:12,371 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:04:12,371 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:04:12,371 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 22:04:12,371 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 22:04:12,373 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1060 states, 797 states have (on average 1.3726474278544543) internal successors, (1094), 817 states have internal predecessors, (1094), 214 states have call successors, (214), 49 states have call predecessors, (214), 48 states have return successors, (213), 213 states have call predecessors, (213), 213 states have call successors, (213) [2022-02-20 22:04:12,422 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1060 states to 1060 states and 1521 transitions. [2022-02-20 22:04:12,422 INFO L78 Accepts]: Start accepts. Automaton has 1060 states and 1521 transitions. Word has length 100 [2022-02-20 22:04:12,422 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 22:04:12,422 INFO L470 AbstractCegarLoop]: Abstraction has 1060 states and 1521 transitions. [2022-02-20 22:04:12,423 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 23.333333333333332) internal successors, (70), 3 states have internal predecessors, (70), 2 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2022-02-20 22:04:12,423 INFO L276 IsEmpty]: Start isEmpty. Operand 1060 states and 1521 transitions. [2022-02-20 22:04:12,429 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2022-02-20 22:04:12,429 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:04:12,429 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:04:12,449 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2022-02-20 22:04:12,647 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable5 [2022-02-20 22:04:12,648 INFO L402 AbstractCegarLoop]: === Iteration 7 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:04:12,648 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:04:12,648 INFO L85 PathProgramCache]: Analyzing trace with hash -72859192, now seen corresponding path program 1 times [2022-02-20 22:04:12,648 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:04:12,649 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2044104808] [2022-02-20 22:04:12,649 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:04:12,649 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:04:12,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:04:12,829 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 12 [2022-02-20 22:04:12,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:04:12,833 INFO L290 TraceCheckUtils]: 0: Hoare triple {41491#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {41453#true} is VALID [2022-02-20 22:04:12,833 INFO L290 TraceCheckUtils]: 1: Hoare triple {41453#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {41453#true} is VALID [2022-02-20 22:04:12,833 INFO L290 TraceCheckUtils]: 2: Hoare triple {41453#true} assume true; {41453#true} is VALID [2022-02-20 22:04:12,833 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {41453#true} {41453#true} #1791#return; {41453#true} is VALID [2022-02-20 22:04:12,838 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 24 [2022-02-20 22:04:12,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:04:12,842 INFO L290 TraceCheckUtils]: 0: Hoare triple {41492#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~1.base, ~tmp~1.offset;havoc ~tmp___0~0;assume -2147483648 <= #t~nondet27 && #t~nondet27 <= 2147483647;~tmp___0~0 := #t~nondet27;havoc #t~nondet27; {41453#true} is VALID [2022-02-20 22:04:12,842 INFO L290 TraceCheckUtils]: 1: Hoare triple {41453#true} assume 0 != ~tmp___0~0;#res.base, #res.offset := 0, 0; {41453#true} is VALID [2022-02-20 22:04:12,842 INFO L290 TraceCheckUtils]: 2: Hoare triple {41453#true} assume true; {41453#true} is VALID [2022-02-20 22:04:12,843 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {41453#true} {41459#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} #1793#return; {41459#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:12,843 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 33 [2022-02-20 22:04:12,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:04:12,848 INFO L290 TraceCheckUtils]: 0: Hoare triple {41453#true} ~ptr#1.base, ~ptr#1.offset := #in~ptr#1.base, #in~ptr#1.offset;havoc ~tmp~0#1;assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := (if (~ptr#1.base + ~ptr#1.offset) % 18446744073709551616 > 18446744073709547520 then 1 else 0), 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; {41453#true} is VALID [2022-02-20 22:04:12,849 INFO L290 TraceCheckUtils]: 1: Hoare triple {41453#true} #t~ret9#1 := ldv__builtin_expect_#res#1;assume { :end_inline_ldv__builtin_expect } true;assume -9223372036854775808 <= #t~ret9#1 && #t~ret9#1 <= 9223372036854775807;~tmp~0#1 := #t~ret9#1;havoc #t~ret9#1;#res#1 := (if 0 == (if 0 != ~tmp~0#1 then 1 else 0) then 0 else 1); {41453#true} is VALID [2022-02-20 22:04:12,849 INFO L290 TraceCheckUtils]: 2: Hoare triple {41453#true} assume true; {41453#true} is VALID [2022-02-20 22:04:12,849 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {41453#true} {41459#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} #1795#return; {41459#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:12,849 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 40 [2022-02-20 22:04:12,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:04:12,853 INFO L290 TraceCheckUtils]: 0: Hoare triple {41453#true} ~pdev#1.base, ~pdev#1.offset := #in~pdev#1.base, #in~pdev#1.offset;havoc ~tmp~8#1.base, ~tmp~8#1.offset;assume { :begin_inline_dev_get_drvdata } true;dev_get_drvdata_#in~dev#1.base, dev_get_drvdata_#in~dev#1.offset := ~pdev#1.base, 13 + ~pdev#1.offset;havoc dev_get_drvdata_#res#1.base, dev_get_drvdata_#res#1.offset;havoc dev_get_drvdata_#t~mem44#1.base, dev_get_drvdata_#t~mem44#1.offset, dev_get_drvdata_~dev#1.base, dev_get_drvdata_~dev#1.offset;dev_get_drvdata_~dev#1.base, dev_get_drvdata_~dev#1.offset := dev_get_drvdata_#in~dev#1.base, dev_get_drvdata_#in~dev#1.offset;call dev_get_drvdata_#t~mem44#1.base, dev_get_drvdata_#t~mem44#1.offset := read~$Pointer$(dev_get_drvdata_~dev#1.base, 489 + dev_get_drvdata_~dev#1.offset, 8);dev_get_drvdata_#res#1.base, dev_get_drvdata_#res#1.offset := dev_get_drvdata_#t~mem44#1.base, dev_get_drvdata_#t~mem44#1.offset;havoc dev_get_drvdata_#t~mem44#1.base, dev_get_drvdata_#t~mem44#1.offset; {41453#true} is VALID [2022-02-20 22:04:12,854 INFO L290 TraceCheckUtils]: 1: Hoare triple {41453#true} #t~ret52#1.base, #t~ret52#1.offset := dev_get_drvdata_#res#1.base, dev_get_drvdata_#res#1.offset;assume { :end_inline_dev_get_drvdata } true;~tmp~8#1.base, ~tmp~8#1.offset := #t~ret52#1.base, #t~ret52#1.offset;havoc #t~ret52#1.base, #t~ret52#1.offset;#res#1.base, #res#1.offset := ~tmp~8#1.base, ~tmp~8#1.offset; {41453#true} is VALID [2022-02-20 22:04:12,854 INFO L290 TraceCheckUtils]: 2: Hoare triple {41453#true} assume true; {41453#true} is VALID [2022-02-20 22:04:12,854 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {41453#true} {41459#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} #1797#return; {41459#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:12,854 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 53 [2022-02-20 22:04:12,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:04:12,858 INFO L290 TraceCheckUtils]: 0: Hoare triple {41491#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {41453#true} is VALID [2022-02-20 22:04:12,858 INFO L290 TraceCheckUtils]: 1: Hoare triple {41453#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {41453#true} is VALID [2022-02-20 22:04:12,858 INFO L290 TraceCheckUtils]: 2: Hoare triple {41453#true} assume true; {41453#true} is VALID [2022-02-20 22:04:12,859 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {41453#true} {41454#false} #1803#return; {41454#false} is VALID [2022-02-20 22:04:12,859 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2022-02-20 22:04:12,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:04:12,862 INFO L290 TraceCheckUtils]: 0: Hoare triple {41491#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {41453#true} is VALID [2022-02-20 22:04:12,863 INFO L290 TraceCheckUtils]: 1: Hoare triple {41453#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {41453#true} is VALID [2022-02-20 22:04:12,863 INFO L290 TraceCheckUtils]: 2: Hoare triple {41453#true} assume true; {41453#true} is VALID [2022-02-20 22:04:12,863 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {41453#true} {41454#false} #1805#return; {41454#false} is VALID [2022-02-20 22:04:12,869 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 83 [2022-02-20 22:04:12,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:04:12,873 INFO L290 TraceCheckUtils]: 0: Hoare triple {41493#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~offset444 := 0; {41453#true} is VALID [2022-02-20 22:04:12,873 INFO L290 TraceCheckUtils]: 1: Hoare triple {41453#true} call #t~mem445 := read~int(src.base, src.offset + #t~offset444, 1);call write~unchecked~int(#t~mem445, dest.base, dest.offset + #t~offset444, 1); {41453#true} is VALID [2022-02-20 22:04:12,873 INFO L290 TraceCheckUtils]: 2: Hoare triple {41453#true} assume 0 == #t~mem445; {41453#true} is VALID [2022-02-20 22:04:12,873 INFO L290 TraceCheckUtils]: 3: Hoare triple {41453#true} assume #res.base == dest.base && #res.offset == dest.offset; {41453#true} is VALID [2022-02-20 22:04:12,874 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {41453#true} {41454#false} #1809#return; {41454#false} is VALID [2022-02-20 22:04:12,874 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 90 [2022-02-20 22:04:12,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:04:12,879 INFO L290 TraceCheckUtils]: 0: Hoare triple {41493#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~offset444 := 0; {41453#true} is VALID [2022-02-20 22:04:12,879 INFO L290 TraceCheckUtils]: 1: Hoare triple {41453#true} call #t~mem445 := read~int(src.base, src.offset + #t~offset444, 1);call write~unchecked~int(#t~mem445, dest.base, dest.offset + #t~offset444, 1); {41453#true} is VALID [2022-02-20 22:04:12,879 INFO L290 TraceCheckUtils]: 2: Hoare triple {41453#true} assume 0 == #t~mem445; {41453#true} is VALID [2022-02-20 22:04:12,879 INFO L290 TraceCheckUtils]: 3: Hoare triple {41453#true} assume #res.base == dest.base && #res.offset == dest.offset; {41453#true} is VALID [2022-02-20 22:04:12,880 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {41453#true} {41454#false} #1811#return; {41454#false} is VALID [2022-02-20 22:04:12,880 INFO L290 TraceCheckUtils]: 0: Hoare triple {41453#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(105, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(8, 4);call #Ultimate.allocInit(12, 5);call #Ultimate.allocInit(12, 6);call #Ultimate.allocInit(8, 7);call #Ultimate.allocInit(217, 8);call #Ultimate.allocInit(33, 9);call #Ultimate.allocInit(12, 10);call #Ultimate.allocInit(217, 11);call #Ultimate.allocInit(32, 12);call #Ultimate.allocInit(217, 13);call #Ultimate.allocInit(40, 14);call #Ultimate.allocInit(27, 15);call #Ultimate.allocInit(28, 16);call #Ultimate.allocInit(12, 17);call #Ultimate.allocInit(217, 18);call #Ultimate.allocInit(30, 19);call #Ultimate.allocInit(15, 20);call #Ultimate.allocInit(17, 21);call #Ultimate.allocInit(12, 22);call #Ultimate.allocInit(217, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(217, 25);call #Ultimate.allocInit(45, 26);call #Ultimate.allocInit(217, 27);call #Ultimate.allocInit(44, 28);call #Ultimate.allocInit(7, 29);call write~init~int(83, 29, 0, 1);call write~init~int(101, 29, 1, 1);call write~init~int(114, 29, 2, 1);call write~init~int(105, 29, 3, 1);call write~init~int(97, 29, 4, 1);call write~init~int(108, 29, 5, 1);call write~init~int(0, 29, 6, 1);call #Ultimate.allocInit(25, 30);call #Ultimate.allocInit(24, 31);call #Ultimate.allocInit(18, 32);call #Ultimate.allocInit(18, 33);call #Ultimate.allocInit(49, 34);~ldv_irq_1_3~0 := 0;~ldv_irq_data_1_1~0.base, ~ldv_irq_data_1_1~0.offset := 0, 0;~ldv_irq_1_0~0 := 0;~ldv_irq_data_1_0~0.base, ~ldv_irq_data_1_0~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_irq_data_1_3~0.base, ~ldv_irq_data_1_3~0.offset := 0, 0;~snd_uart16550_input_group0~0.base, ~snd_uart16550_input_group0~0.offset := 0, 0;~ldv_irq_data_1_2~0.base, ~ldv_irq_data_1_2~0.offset := 0, 0;~ldv_irq_1_2~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_irq_1_1~0 := 0;~ldv_timer_state_2~0 := 0;~ldv_irq_line_1_3~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_irq_line_1_0~0 := 0;~ldv_timer_list_2~0.base, ~ldv_timer_list_2~0.offset := 0, 0;~snd_serial_driver_group0~0.base, ~snd_serial_driver_group0~0.offset := 0, 0;~ref_cnt~0 := 0;~ldv_irq_line_1_1~0 := 0;~snd_uart16550_output_group0~0.base, ~snd_uart16550_output_group0~0.offset := 0, 0;~ldv_state_variable_1~0 := 0;~ldv_irq_line_1_2~0 := 0;~ldv_state_variable_4~0 := 0;~#adaptor_names~0.base, ~#adaptor_names~0.offset := 35, 0;call #Ultimate.allocInit(40, 35);call write~init~$Pointer$(3, 0, ~#adaptor_names~0.base, ~#adaptor_names~0.offset, 8);call write~init~$Pointer$(4, 0, ~#adaptor_names~0.base, 8 + ~#adaptor_names~0.offset, 8);call write~init~$Pointer$(5, 0, ~#adaptor_names~0.base, 16 + ~#adaptor_names~0.offset, 8);call write~init~$Pointer$(6, 0, ~#adaptor_names~0.base, 24 + ~#adaptor_names~0.offset, 8);call write~init~$Pointer$(7, 0, ~#adaptor_names~0.base, 32 + ~#adaptor_names~0.offset, 8);~#index~0.base, ~#index~0.offset := 36, 0;call #Ultimate.allocInit(128, 36);call write~init~int(-1, ~#index~0.base, ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 4 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 8 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 12 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 16 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 20 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 24 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 28 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 32 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 36 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 40 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 44 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 48 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 52 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 56 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 60 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 64 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 68 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 72 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 76 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 80 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 84 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 88 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 92 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 96 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 100 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 104 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 108 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 112 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 116 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 120 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 124 + ~#index~0.offset, 4);~#id~0.base, ~#id~0.offset := 37, 0;call #Ultimate.allocInit(256, 37);call write~init~$Pointer$(0, 0, ~#id~0.base, ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 8 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 16 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 24 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 32 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 40 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 48 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 56 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 64 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 72 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 80 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 88 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 96 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 104 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 112 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 120 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 128 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 136 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 144 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 152 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 160 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 168 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 176 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 184 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 192 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 200 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 208 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 216 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 224 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 232 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 240 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 248 + ~#id~0.offset, 8);~#enable~0.base, ~#enable~0.offset := 38, 0;call #Ultimate.allocInit(32, 38);call write~init~int(1, ~#enable~0.base, ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 1 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 2 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 3 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 4 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 5 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 6 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 7 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 8 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 9 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 10 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 11 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 12 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 13 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 14 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 15 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 16 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 17 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 18 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 19 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 20 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 21 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 22 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 23 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 24 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 25 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 26 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 27 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 28 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 29 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 30 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 31 + ~#enable~0.offset, 1);~#port~0.base, ~#port~0.offset := 39, 0;call #Ultimate.allocInit(256, 39);call write~init~int(1, ~#port~0.base, ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 8 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 16 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 24 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 32 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 40 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 48 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 56 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 64 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 72 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 80 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 88 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 96 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 104 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 112 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 120 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 128 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 136 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 144 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 152 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 160 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 168 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 176 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 184 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 192 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 200 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 208 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 216 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 224 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 232 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 240 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 248 + ~#port~0.offset, 8);~#irq~0.base, ~#irq~0.offset := 40, 0;call #Ultimate.allocInit(128, 40);call write~init~int(65535, ~#irq~0.base, ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 4 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 8 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 12 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 16 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 20 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 24 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 28 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 32 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 36 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 40 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 44 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 48 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 52 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 56 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 60 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 64 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 68 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 72 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 76 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 80 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 84 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 88 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 92 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 96 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 100 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 104 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 108 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 112 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 116 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 120 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 124 + ~#irq~0.offset, 4);~#speed~0.base, ~#speed~0.offset := 41, 0;call #Ultimate.allocInit(128, 41);call write~init~int(38400, ~#speed~0.base, ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 4 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 8 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 12 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 16 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 20 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 24 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 28 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 32 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 36 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 40 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 44 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 48 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 52 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 56 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 60 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 64 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 68 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 72 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 76 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 80 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 84 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 88 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 92 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 96 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 100 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 104 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 108 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 112 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 116 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 120 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 124 + ~#speed~0.offset, 4);~#base~0.base, ~#base~0.offset := 42, 0;call #Ultimate.allocInit(128, 42);call write~init~int(115200, ~#base~0.base, ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 4 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 8 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 12 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 16 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 20 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 24 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 28 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 32 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 36 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 40 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 44 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 48 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 52 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 56 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 60 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 64 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 68 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 72 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 76 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 80 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 84 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 88 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 92 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 96 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 100 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 104 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 108 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 112 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 116 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 120 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 124 + ~#base~0.offset, 4);~#outs~0.base, ~#outs~0.offset := 43, 0;call #Ultimate.allocInit(128, 43);call write~init~int(1, ~#outs~0.base, ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 4 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 8 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 12 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 16 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 20 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 24 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 28 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 32 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 36 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 40 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 44 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 48 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 52 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 56 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 60 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 64 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 68 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 72 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 76 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 80 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 84 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 88 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 92 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 96 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 100 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 104 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 108 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 112 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 116 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 120 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 124 + ~#outs~0.offset, 4);~#ins~0.base, ~#ins~0.offset := 44, 0;call #Ultimate.allocInit(128, 44);call write~init~int(1, ~#ins~0.base, ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 4 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 8 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 12 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 16 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 20 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 24 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 28 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 32 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 36 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 40 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 44 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 48 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 52 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 56 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 60 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 64 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 68 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 72 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 76 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 80 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 84 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 88 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 92 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 96 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 100 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 104 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 108 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 112 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 116 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 120 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 124 + ~#ins~0.offset, 4);~#adaptor~0.base, ~#adaptor~0.offset := 45, 0;call #Ultimate.allocInit(128, 45);call write~init~int(0, ~#adaptor~0.base, ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 4 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 8 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 12 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 16 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 20 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 24 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 28 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 32 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 36 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 40 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 44 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 48 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 52 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 56 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 60 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 64 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 68 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 72 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 76 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 80 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 84 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 88 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 92 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 96 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 100 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 104 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 108 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 112 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 116 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 120 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 124 + ~#adaptor~0.offset, 4);~#droponfull~0.base, ~#droponfull~0.offset := 46, 0;call #Ultimate.allocInit(32, 46);call write~init~int(0, ~#droponfull~0.base, ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 1 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 2 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 3 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 4 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 5 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 6 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 7 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 8 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 9 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 10 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 11 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 12 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 13 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 14 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 15 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 16 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 17 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 18 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 19 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 20 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 21 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 22 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 23 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 24 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 25 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 26 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 27 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 28 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 29 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 30 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 31 + ~#droponfull~0.offset, 1);~#devices~0.base, ~#devices~0.offset := 47, 0;call #Ultimate.allocInit(256, 47);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#devices~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#devices~0.base);~#snd_uart16550_output~0.base, ~#snd_uart16550_output~0.offset := 48, 0;call #Ultimate.allocInit(32, 48);call write~init~$Pointer$(#funAddr~snd_uart16550_output_open.base, #funAddr~snd_uart16550_output_open.offset, ~#snd_uart16550_output~0.base, ~#snd_uart16550_output~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_uart16550_output_close.base, #funAddr~snd_uart16550_output_close.offset, ~#snd_uart16550_output~0.base, 8 + ~#snd_uart16550_output~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_uart16550_output_trigger.base, #funAddr~snd_uart16550_output_trigger.offset, ~#snd_uart16550_output~0.base, 16 + ~#snd_uart16550_output~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_uart16550_output~0.base, 24 + ~#snd_uart16550_output~0.offset, 8);~#snd_uart16550_input~0.base, ~#snd_uart16550_input~0.offset := 49, 0;call #Ultimate.allocInit(32, 49);call write~init~$Pointer$(#funAddr~snd_uart16550_input_open.base, #funAddr~snd_uart16550_input_open.offset, ~#snd_uart16550_input~0.base, ~#snd_uart16550_input~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_uart16550_input_close.base, #funAddr~snd_uart16550_input_close.offset, ~#snd_uart16550_input~0.base, 8 + ~#snd_uart16550_input~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_uart16550_input_trigger.base, #funAddr~snd_uart16550_input_trigger.offset, ~#snd_uart16550_input~0.base, 16 + ~#snd_uart16550_input~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_uart16550_input~0.base, 24 + ~#snd_uart16550_input~0.offset, 8);~#snd_serial_driver~0.base, ~#snd_serial_driver~0.offset := 50, 0;call #Ultimate.allocInit(162, 50);call write~init~$Pointer$(#funAddr~snd_serial_probe.base, #funAddr~snd_serial_probe.offset, ~#snd_serial_driver~0.base, ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_serial_remove.base, #funAddr~snd_serial_remove.offset, ~#snd_serial_driver~0.base, 8 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 16 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 24 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 32 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(32, 0, ~#snd_serial_driver~0.base, 40 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 48 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#snd_serial_driver~0.base, 56 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 64 + ~#snd_serial_driver~0.offset, 8);call write~init~int(0, ~#snd_serial_driver~0.base, 72 + ~#snd_serial_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 73 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 81 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 89 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 97 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 105 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 113 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 121 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 129 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 137 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 145 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 153 + ~#snd_serial_driver~0.offset, 8);call write~init~int(0, ~#snd_serial_driver~0.base, 161 + ~#snd_serial_driver~0.offset, 1);~ldv_retval_2~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_5~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_spin~0 := 0; {41453#true} is VALID [2022-02-20 22:04:12,880 INFO L290 TraceCheckUtils]: 1: Hoare triple {41453#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet399#1, main_#t~nondet400#1, main_#t~nondet401#1, main_#t~switch402#1, main_#t~nondet403#1, main_#t~switch404#1, main_#t~ret405#1, main_#t~ret406#1, main_#t~nondet407#1, main_#t~switch408#1, main_#t~ret409#1, main_#t~nondet410#1, main_#t~switch411#1, main_#t~ret412#1, main_#t~ret413#1, main_#t~nondet414#1, main_#t~switch415#1, main_#t~ret416#1, main_#t~ret417#1, main_~ldvarg0~0#1, main_~tmp~21#1, main_~ldvarg1~0#1, main_~tmp___0~6#1, main_~tmp___1~2#1, main_~tmp___2~1#1, main_~tmp___3~0#1, main_~tmp___4~0#1, main_~tmp___5~0#1;havoc main_~ldvarg0~0#1;havoc main_~tmp~21#1;havoc main_~ldvarg1~0#1;havoc main_~tmp___0~6#1;havoc main_~tmp___1~2#1;havoc main_~tmp___2~1#1;havoc main_~tmp___3~0#1;havoc main_~tmp___4~0#1;havoc main_~tmp___5~0#1;assume -2147483648 <= main_#t~nondet399#1 && main_#t~nondet399#1 <= 2147483647;main_~tmp~21#1 := main_#t~nondet399#1;havoc main_#t~nondet399#1;main_~ldvarg0~0#1 := main_~tmp~21#1;assume -2147483648 <= main_#t~nondet400#1 && main_#t~nondet400#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet400#1;havoc main_#t~nondet400#1;main_~ldvarg1~0#1 := main_~tmp___0~6#1;assume { :begin_inline_ldv_initialize } true; {41453#true} is VALID [2022-02-20 22:04:12,880 INFO L290 TraceCheckUtils]: 2: Hoare triple {41453#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_4~0 := 0;~ldv_state_variable_1~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 1;~ldv_state_variable_5~0 := 0; {41453#true} is VALID [2022-02-20 22:04:12,880 INFO L290 TraceCheckUtils]: 3: Hoare triple {41453#true} assume -2147483648 <= main_#t~nondet401#1 && main_#t~nondet401#1 <= 2147483647;main_~tmp___1~2#1 := main_#t~nondet401#1;havoc main_#t~nondet401#1;main_#t~switch402#1 := 0 == main_~tmp___1~2#1; {41453#true} is VALID [2022-02-20 22:04:12,881 INFO L290 TraceCheckUtils]: 4: Hoare triple {41453#true} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 1 == main_~tmp___1~2#1; {41453#true} is VALID [2022-02-20 22:04:12,881 INFO L290 TraceCheckUtils]: 5: Hoare triple {41453#true} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 2 == main_~tmp___1~2#1; {41453#true} is VALID [2022-02-20 22:04:12,881 INFO L290 TraceCheckUtils]: 6: Hoare triple {41453#true} assume main_#t~switch402#1; {41453#true} is VALID [2022-02-20 22:04:12,881 INFO L290 TraceCheckUtils]: 7: Hoare triple {41453#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet407#1 && main_#t~nondet407#1 <= 2147483647;main_~tmp___3~0#1 := main_#t~nondet407#1;havoc main_#t~nondet407#1;main_#t~switch408#1 := 0 == main_~tmp___3~0#1; {41453#true} is VALID [2022-02-20 22:04:12,881 INFO L290 TraceCheckUtils]: 8: Hoare triple {41453#true} assume !main_#t~switch408#1;main_#t~switch408#1 := main_#t~switch408#1 || 1 == main_~tmp___3~0#1; {41453#true} is VALID [2022-02-20 22:04:12,881 INFO L290 TraceCheckUtils]: 9: Hoare triple {41453#true} assume main_#t~switch408#1; {41453#true} is VALID [2022-02-20 22:04:12,881 INFO L290 TraceCheckUtils]: 10: Hoare triple {41453#true} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_alsa_card_serial_init } true;havoc alsa_card_serial_init_#res#1;havoc alsa_card_serial_init_#t~ret376#1, alsa_card_serial_init_#t~mem377#1, alsa_card_serial_init_#t~ret378#1.base, alsa_card_serial_init_#t~ret378#1.offset, alsa_card_serial_init_#t~ret379#1, alsa_card_serial_init_#t~ret380#1.base, alsa_card_serial_init_#t~ret380#1.offset, alsa_card_serial_init_#t~nondet381#1, alsa_card_serial_init_~i~1#1, alsa_card_serial_init_~cards~0#1, alsa_card_serial_init_~err~3#1, alsa_card_serial_init_~device~0#1.base, alsa_card_serial_init_~device~0#1.offset, alsa_card_serial_init_~tmp~15#1, alsa_card_serial_init_~tmp___0~5#1.base, alsa_card_serial_init_~tmp___0~5#1.offset;havoc alsa_card_serial_init_~i~1#1;havoc alsa_card_serial_init_~cards~0#1;havoc alsa_card_serial_init_~err~3#1;havoc alsa_card_serial_init_~device~0#1.base, alsa_card_serial_init_~device~0#1.offset;havoc alsa_card_serial_init_~tmp~15#1;havoc alsa_card_serial_init_~tmp___0~5#1.base, alsa_card_serial_init_~tmp___0~5#1.offset;assume { :begin_inline_ldv___platform_driver_register_23 } true;ldv___platform_driver_register_23_#in~ldv_func_arg1#1.base, ldv___platform_driver_register_23_#in~ldv_func_arg1#1.offset, ldv___platform_driver_register_23_#in~ldv_func_arg2#1.base, ldv___platform_driver_register_23_#in~ldv_func_arg2#1.offset := ~#snd_serial_driver~0.base, ~#snd_serial_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset;havoc ldv___platform_driver_register_23_#res#1;havoc ldv___platform_driver_register_23_#t~ret421#1, ldv___platform_driver_register_23_~ldv_func_arg1#1.base, ldv___platform_driver_register_23_~ldv_func_arg1#1.offset, ldv___platform_driver_register_23_~ldv_func_arg2#1.base, ldv___platform_driver_register_23_~ldv_func_arg2#1.offset, ldv___platform_driver_register_23_~ldv_func_res~2#1, ldv___platform_driver_register_23_~tmp~24#1;ldv___platform_driver_register_23_~ldv_func_arg1#1.base, ldv___platform_driver_register_23_~ldv_func_arg1#1.offset := ldv___platform_driver_register_23_#in~ldv_func_arg1#1.base, ldv___platform_driver_register_23_#in~ldv_func_arg1#1.offset;ldv___platform_driver_register_23_~ldv_func_arg2#1.base, ldv___platform_driver_register_23_~ldv_func_arg2#1.offset := ldv___platform_driver_register_23_#in~ldv_func_arg2#1.base, ldv___platform_driver_register_23_#in~ldv_func_arg2#1.offset;havoc ldv___platform_driver_register_23_~ldv_func_res~2#1;havoc ldv___platform_driver_register_23_~tmp~24#1;assume { :begin_inline___platform_driver_register } true;__platform_driver_register_#in~arg0#1.base, __platform_driver_register_#in~arg0#1.offset, __platform_driver_register_#in~arg1#1.base, __platform_driver_register_#in~arg1#1.offset := ldv___platform_driver_register_23_~ldv_func_arg1#1.base, ldv___platform_driver_register_23_~ldv_func_arg1#1.offset, ldv___platform_driver_register_23_~ldv_func_arg2#1.base, ldv___platform_driver_register_23_~ldv_func_arg2#1.offset;havoc __platform_driver_register_#res#1;havoc __platform_driver_register_#t~nondet424#1, __platform_driver_register_~arg0#1.base, __platform_driver_register_~arg0#1.offset, __platform_driver_register_~arg1#1.base, __platform_driver_register_~arg1#1.offset;__platform_driver_register_~arg0#1.base, __platform_driver_register_~arg0#1.offset := __platform_driver_register_#in~arg0#1.base, __platform_driver_register_#in~arg0#1.offset;__platform_driver_register_~arg1#1.base, __platform_driver_register_~arg1#1.offset := __platform_driver_register_#in~arg1#1.base, __platform_driver_register_#in~arg1#1.offset;assume -2147483648 <= __platform_driver_register_#t~nondet424#1 && __platform_driver_register_#t~nondet424#1 <= 2147483647;__platform_driver_register_#res#1 := __platform_driver_register_#t~nondet424#1;havoc __platform_driver_register_#t~nondet424#1; {41453#true} is VALID [2022-02-20 22:04:12,881 INFO L290 TraceCheckUtils]: 11: Hoare triple {41453#true} ldv___platform_driver_register_23_#t~ret421#1 := __platform_driver_register_#res#1;assume { :end_inline___platform_driver_register } true;assume -2147483648 <= ldv___platform_driver_register_23_#t~ret421#1 && ldv___platform_driver_register_23_#t~ret421#1 <= 2147483647;ldv___platform_driver_register_23_~tmp~24#1 := ldv___platform_driver_register_23_#t~ret421#1;havoc ldv___platform_driver_register_23_#t~ret421#1;ldv___platform_driver_register_23_~ldv_func_res~2#1 := ldv___platform_driver_register_23_~tmp~24#1;~ldv_state_variable_3~0 := 1;assume { :begin_inline_ldv_initialize_platform_driver_3 } true;havoc ldv_initialize_platform_driver_3_#t~ret392#1.base, ldv_initialize_platform_driver_3_#t~ret392#1.offset, ldv_initialize_platform_driver_3_~tmp~19#1.base, ldv_initialize_platform_driver_3_~tmp~19#1.offset;havoc ldv_initialize_platform_driver_3_~tmp~19#1.base, ldv_initialize_platform_driver_3_~tmp~19#1.offset; {41453#true} is VALID [2022-02-20 22:04:12,882 INFO L272 TraceCheckUtils]: 12: Hoare triple {41453#true} call ldv_initialize_platform_driver_3_#t~ret392#1.base, ldv_initialize_platform_driver_3_#t~ret392#1.offset := ldv_zalloc(1464); {41491#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:04:12,882 INFO L290 TraceCheckUtils]: 13: Hoare triple {41491#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {41453#true} is VALID [2022-02-20 22:04:12,882 INFO L290 TraceCheckUtils]: 14: Hoare triple {41453#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {41453#true} is VALID [2022-02-20 22:04:12,882 INFO L290 TraceCheckUtils]: 15: Hoare triple {41453#true} assume true; {41453#true} is VALID [2022-02-20 22:04:12,882 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {41453#true} {41453#true} #1791#return; {41453#true} is VALID [2022-02-20 22:04:12,882 INFO L290 TraceCheckUtils]: 17: Hoare triple {41453#true} ldv_initialize_platform_driver_3_~tmp~19#1.base, ldv_initialize_platform_driver_3_~tmp~19#1.offset := ldv_initialize_platform_driver_3_#t~ret392#1.base, ldv_initialize_platform_driver_3_#t~ret392#1.offset;havoc ldv_initialize_platform_driver_3_#t~ret392#1.base, ldv_initialize_platform_driver_3_#t~ret392#1.offset;~snd_serial_driver_group0~0.base, ~snd_serial_driver_group0~0.offset := ldv_initialize_platform_driver_3_~tmp~19#1.base, ldv_initialize_platform_driver_3_~tmp~19#1.offset; {41453#true} is VALID [2022-02-20 22:04:12,883 INFO L290 TraceCheckUtils]: 18: Hoare triple {41453#true} assume { :end_inline_ldv_initialize_platform_driver_3 } true;ldv___platform_driver_register_23_#res#1 := ldv___platform_driver_register_23_~ldv_func_res~2#1; {41453#true} is VALID [2022-02-20 22:04:12,883 INFO L290 TraceCheckUtils]: 19: Hoare triple {41453#true} alsa_card_serial_init_#t~ret376#1 := ldv___platform_driver_register_23_#res#1;assume { :end_inline_ldv___platform_driver_register_23 } true;assume -2147483648 <= alsa_card_serial_init_#t~ret376#1 && alsa_card_serial_init_#t~ret376#1 <= 2147483647;alsa_card_serial_init_~err~3#1 := alsa_card_serial_init_#t~ret376#1;havoc alsa_card_serial_init_#t~ret376#1; {41453#true} is VALID [2022-02-20 22:04:12,883 INFO L290 TraceCheckUtils]: 20: Hoare triple {41453#true} assume !(alsa_card_serial_init_~err~3#1 < 0);alsa_card_serial_init_~cards~0#1 := 0;alsa_card_serial_init_~i~1#1 := 0; {41459#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:12,883 INFO L290 TraceCheckUtils]: 21: Hoare triple {41459#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} assume alsa_card_serial_init_~i~1#1 <= 31; {41459#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:12,884 INFO L290 TraceCheckUtils]: 22: Hoare triple {41459#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} call alsa_card_serial_init_#t~mem377#1 := read~int(~#enable~0.base, ~#enable~0.offset + alsa_card_serial_init_~i~1#1, 1); {41459#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:12,884 INFO L290 TraceCheckUtils]: 23: Hoare triple {41459#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} assume !(0 == alsa_card_serial_init_#t~mem377#1 % 256);havoc alsa_card_serial_init_#t~mem377#1;assume { :begin_inline_platform_device_register_simple } true;platform_device_register_simple_#in~name#1.base, platform_device_register_simple_#in~name#1.offset, platform_device_register_simple_#in~id___0#1, platform_device_register_simple_#in~res#1.base, platform_device_register_simple_#in~res#1.offset, platform_device_register_simple_#in~num#1 := 33, 0, alsa_card_serial_init_~i~1#1, 0, 0, 0;havoc platform_device_register_simple_#res#1.base, platform_device_register_simple_#res#1.offset;havoc platform_device_register_simple_#t~ret48#1.base, platform_device_register_simple_#t~ret48#1.offset, platform_device_register_simple_~name#1.base, platform_device_register_simple_~name#1.offset, platform_device_register_simple_~id___0#1, platform_device_register_simple_~res#1.base, platform_device_register_simple_~res#1.offset, platform_device_register_simple_~num#1, platform_device_register_simple_~tmp~7#1.base, platform_device_register_simple_~tmp~7#1.offset;platform_device_register_simple_~name#1.base, platform_device_register_simple_~name#1.offset := platform_device_register_simple_#in~name#1.base, platform_device_register_simple_#in~name#1.offset;platform_device_register_simple_~id___0#1 := platform_device_register_simple_#in~id___0#1;platform_device_register_simple_~res#1.base, platform_device_register_simple_~res#1.offset := platform_device_register_simple_#in~res#1.base, platform_device_register_simple_#in~res#1.offset;platform_device_register_simple_~num#1 := platform_device_register_simple_#in~num#1;havoc platform_device_register_simple_~tmp~7#1.base, platform_device_register_simple_~tmp~7#1.offset;assume { :begin_inline_platform_device_register_resndata } true;platform_device_register_resndata_#in~parent#1.base, platform_device_register_resndata_#in~parent#1.offset, platform_device_register_resndata_#in~name#1.base, platform_device_register_resndata_#in~name#1.offset, platform_device_register_resndata_#in~id___0#1, platform_device_register_resndata_#in~res#1.base, platform_device_register_resndata_#in~res#1.offset, platform_device_register_resndata_#in~num#1, platform_device_register_resndata_#in~data#1.base, platform_device_register_resndata_#in~data#1.offset, platform_device_register_resndata_#in~size#1 := 0, 0, platform_device_register_simple_~name#1.base, platform_device_register_simple_~name#1.offset, platform_device_register_simple_~id___0#1, platform_device_register_simple_~res#1.base, platform_device_register_simple_~res#1.offset, platform_device_register_simple_~num#1, 0, 0, 0;havoc platform_device_register_resndata_#res#1.base, platform_device_register_resndata_#res#1.offset;havoc platform_device_register_resndata_#t~ret47#1.base, platform_device_register_resndata_#t~ret47#1.offset, platform_device_register_resndata_~parent#1.base, platform_device_register_resndata_~parent#1.offset, platform_device_register_resndata_~name#1.base, platform_device_register_resndata_~name#1.offset, platform_device_register_resndata_~id___0#1, platform_device_register_resndata_~res#1.base, platform_device_register_resndata_~res#1.offset, platform_device_register_resndata_~num#1, platform_device_register_resndata_~data#1.base, platform_device_register_resndata_~data#1.offset, platform_device_register_resndata_~size#1, platform_device_register_resndata_~#pdevinfo~0#1.base, platform_device_register_resndata_~#pdevinfo~0#1.offset, platform_device_register_resndata_~tmp~6#1.base, platform_device_register_resndata_~tmp~6#1.offset;platform_device_register_resndata_~parent#1.base, platform_device_register_resndata_~parent#1.offset := platform_device_register_resndata_#in~parent#1.base, platform_device_register_resndata_#in~parent#1.offset;platform_device_register_resndata_~name#1.base, platform_device_register_resndata_~name#1.offset := platform_device_register_resndata_#in~name#1.base, platform_device_register_resndata_#in~name#1.offset;platform_device_register_resndata_~id___0#1 := platform_device_register_resndata_#in~id___0#1;platform_device_register_resndata_~res#1.base, platform_device_register_resndata_~res#1.offset := platform_device_register_resndata_#in~res#1.base, platform_device_register_resndata_#in~res#1.offset;platform_device_register_resndata_~num#1 := platform_device_register_resndata_#in~num#1;platform_device_register_resndata_~data#1.base, platform_device_register_resndata_~data#1.offset := platform_device_register_resndata_#in~data#1.base, platform_device_register_resndata_#in~data#1.offset;platform_device_register_resndata_~size#1 := platform_device_register_resndata_#in~size#1;call platform_device_register_resndata_~#pdevinfo~0#1.base, platform_device_register_resndata_~#pdevinfo~0#1.offset := #Ultimate.allocOnStack(64);havoc platform_device_register_resndata_~tmp~6#1.base, platform_device_register_resndata_~tmp~6#1.offset;call write~$Pointer$(platform_device_register_resndata_~parent#1.base, platform_device_register_resndata_~parent#1.offset, platform_device_register_resndata_~#pdevinfo~0#1.base, platform_device_register_resndata_~#pdevinfo~0#1.offset, 8);call write~$Pointer$(0, 0, platform_device_register_resndata_~#pdevinfo~0#1.base, 8 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 8);call write~$Pointer$(platform_device_register_resndata_~name#1.base, platform_device_register_resndata_~name#1.offset, platform_device_register_resndata_~#pdevinfo~0#1.base, 16 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 8);call write~int(platform_device_register_resndata_~id___0#1, platform_device_register_resndata_~#pdevinfo~0#1.base, 24 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 4);call write~$Pointer$(platform_device_register_resndata_~res#1.base, platform_device_register_resndata_~res#1.offset, platform_device_register_resndata_~#pdevinfo~0#1.base, 28 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 8);call write~int(platform_device_register_resndata_~num#1, platform_device_register_resndata_~#pdevinfo~0#1.base, 36 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 4);call write~$Pointer$(platform_device_register_resndata_~data#1.base, platform_device_register_resndata_~data#1.offset, platform_device_register_resndata_~#pdevinfo~0#1.base, 40 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 8);call write~int(platform_device_register_resndata_~size#1, platform_device_register_resndata_~#pdevinfo~0#1.base, 48 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 8);call write~int(0, platform_device_register_resndata_~#pdevinfo~0#1.base, 56 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 8);assume { :begin_inline_platform_device_register_full } true;platform_device_register_full_#in~arg0#1.base, platform_device_register_full_#in~arg0#1.offset := platform_device_register_resndata_~#pdevinfo~0#1.base, platform_device_register_resndata_~#pdevinfo~0#1.offset;havoc platform_device_register_full_#res#1.base, platform_device_register_full_#res#1.offset;havoc platform_device_register_full_#t~ret429#1.base, platform_device_register_full_#t~ret429#1.offset, platform_device_register_full_~arg0#1.base, platform_device_register_full_~arg0#1.offset;platform_device_register_full_~arg0#1.base, platform_device_register_full_~arg0#1.offset := platform_device_register_full_#in~arg0#1.base, platform_device_register_full_#in~arg0#1.offset; {41459#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:12,884 INFO L272 TraceCheckUtils]: 24: Hoare triple {41459#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} call platform_device_register_full_#t~ret429#1.base, platform_device_register_full_#t~ret429#1.offset := ldv_malloc(1386); {41492#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:04:12,885 INFO L290 TraceCheckUtils]: 25: Hoare triple {41492#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~1.base, ~tmp~1.offset;havoc ~tmp___0~0;assume -2147483648 <= #t~nondet27 && #t~nondet27 <= 2147483647;~tmp___0~0 := #t~nondet27;havoc #t~nondet27; {41453#true} is VALID [2022-02-20 22:04:12,885 INFO L290 TraceCheckUtils]: 26: Hoare triple {41453#true} assume 0 != ~tmp___0~0;#res.base, #res.offset := 0, 0; {41453#true} is VALID [2022-02-20 22:04:12,885 INFO L290 TraceCheckUtils]: 27: Hoare triple {41453#true} assume true; {41453#true} is VALID [2022-02-20 22:04:12,885 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {41453#true} {41459#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} #1793#return; {41459#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:12,886 INFO L290 TraceCheckUtils]: 29: Hoare triple {41459#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} platform_device_register_full_#res#1.base, platform_device_register_full_#res#1.offset := platform_device_register_full_#t~ret429#1.base, platform_device_register_full_#t~ret429#1.offset;havoc platform_device_register_full_#t~ret429#1.base, platform_device_register_full_#t~ret429#1.offset; {41459#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:12,886 INFO L290 TraceCheckUtils]: 30: Hoare triple {41459#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} platform_device_register_resndata_#t~ret47#1.base, platform_device_register_resndata_#t~ret47#1.offset := platform_device_register_full_#res#1.base, platform_device_register_full_#res#1.offset;assume { :end_inline_platform_device_register_full } true;platform_device_register_resndata_~tmp~6#1.base, platform_device_register_resndata_~tmp~6#1.offset := platform_device_register_resndata_#t~ret47#1.base, platform_device_register_resndata_#t~ret47#1.offset;havoc platform_device_register_resndata_#t~ret47#1.base, platform_device_register_resndata_#t~ret47#1.offset;platform_device_register_resndata_#res#1.base, platform_device_register_resndata_#res#1.offset := platform_device_register_resndata_~tmp~6#1.base, platform_device_register_resndata_~tmp~6#1.offset;call ULTIMATE.dealloc(platform_device_register_resndata_~#pdevinfo~0#1.base, platform_device_register_resndata_~#pdevinfo~0#1.offset);havoc platform_device_register_resndata_~#pdevinfo~0#1.base, platform_device_register_resndata_~#pdevinfo~0#1.offset; {41459#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:12,886 INFO L290 TraceCheckUtils]: 31: Hoare triple {41459#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} platform_device_register_simple_#t~ret48#1.base, platform_device_register_simple_#t~ret48#1.offset := platform_device_register_resndata_#res#1.base, platform_device_register_resndata_#res#1.offset;assume { :end_inline_platform_device_register_resndata } true;platform_device_register_simple_~tmp~7#1.base, platform_device_register_simple_~tmp~7#1.offset := platform_device_register_simple_#t~ret48#1.base, platform_device_register_simple_#t~ret48#1.offset;havoc platform_device_register_simple_#t~ret48#1.base, platform_device_register_simple_#t~ret48#1.offset;platform_device_register_simple_#res#1.base, platform_device_register_simple_#res#1.offset := platform_device_register_simple_~tmp~7#1.base, platform_device_register_simple_~tmp~7#1.offset; {41459#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:12,887 INFO L290 TraceCheckUtils]: 32: Hoare triple {41459#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} alsa_card_serial_init_#t~ret378#1.base, alsa_card_serial_init_#t~ret378#1.offset := platform_device_register_simple_#res#1.base, platform_device_register_simple_#res#1.offset;assume { :end_inline_platform_device_register_simple } true;alsa_card_serial_init_~device~0#1.base, alsa_card_serial_init_~device~0#1.offset := alsa_card_serial_init_#t~ret378#1.base, alsa_card_serial_init_#t~ret378#1.offset;havoc alsa_card_serial_init_#t~ret378#1.base, alsa_card_serial_init_#t~ret378#1.offset; {41459#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:12,887 INFO L272 TraceCheckUtils]: 33: Hoare triple {41459#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} call alsa_card_serial_init_#t~ret379#1 := IS_ERR(alsa_card_serial_init_~device~0#1.base, alsa_card_serial_init_~device~0#1.offset); {41453#true} is VALID [2022-02-20 22:04:12,887 INFO L290 TraceCheckUtils]: 34: Hoare triple {41453#true} ~ptr#1.base, ~ptr#1.offset := #in~ptr#1.base, #in~ptr#1.offset;havoc ~tmp~0#1;assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := (if (~ptr#1.base + ~ptr#1.offset) % 18446744073709551616 > 18446744073709547520 then 1 else 0), 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; {41453#true} is VALID [2022-02-20 22:04:12,887 INFO L290 TraceCheckUtils]: 35: Hoare triple {41453#true} #t~ret9#1 := ldv__builtin_expect_#res#1;assume { :end_inline_ldv__builtin_expect } true;assume -9223372036854775808 <= #t~ret9#1 && #t~ret9#1 <= 9223372036854775807;~tmp~0#1 := #t~ret9#1;havoc #t~ret9#1;#res#1 := (if 0 == (if 0 != ~tmp~0#1 then 1 else 0) then 0 else 1); {41453#true} is VALID [2022-02-20 22:04:12,887 INFO L290 TraceCheckUtils]: 36: Hoare triple {41453#true} assume true; {41453#true} is VALID [2022-02-20 22:04:12,895 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {41453#true} {41459#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} #1795#return; {41459#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:12,896 INFO L290 TraceCheckUtils]: 38: Hoare triple {41459#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} alsa_card_serial_init_~tmp~15#1 := alsa_card_serial_init_#t~ret379#1;havoc alsa_card_serial_init_#t~ret379#1; {41459#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:12,896 INFO L290 TraceCheckUtils]: 39: Hoare triple {41459#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} assume !(0 != alsa_card_serial_init_~tmp~15#1 % 256); {41459#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:12,896 INFO L272 TraceCheckUtils]: 40: Hoare triple {41459#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} call alsa_card_serial_init_#t~ret380#1.base, alsa_card_serial_init_#t~ret380#1.offset := platform_get_drvdata(alsa_card_serial_init_~device~0#1.base, alsa_card_serial_init_~device~0#1.offset); {41453#true} is VALID [2022-02-20 22:04:12,896 INFO L290 TraceCheckUtils]: 41: Hoare triple {41453#true} ~pdev#1.base, ~pdev#1.offset := #in~pdev#1.base, #in~pdev#1.offset;havoc ~tmp~8#1.base, ~tmp~8#1.offset;assume { :begin_inline_dev_get_drvdata } true;dev_get_drvdata_#in~dev#1.base, dev_get_drvdata_#in~dev#1.offset := ~pdev#1.base, 13 + ~pdev#1.offset;havoc dev_get_drvdata_#res#1.base, dev_get_drvdata_#res#1.offset;havoc dev_get_drvdata_#t~mem44#1.base, dev_get_drvdata_#t~mem44#1.offset, dev_get_drvdata_~dev#1.base, dev_get_drvdata_~dev#1.offset;dev_get_drvdata_~dev#1.base, dev_get_drvdata_~dev#1.offset := dev_get_drvdata_#in~dev#1.base, dev_get_drvdata_#in~dev#1.offset;call dev_get_drvdata_#t~mem44#1.base, dev_get_drvdata_#t~mem44#1.offset := read~$Pointer$(dev_get_drvdata_~dev#1.base, 489 + dev_get_drvdata_~dev#1.offset, 8);dev_get_drvdata_#res#1.base, dev_get_drvdata_#res#1.offset := dev_get_drvdata_#t~mem44#1.base, dev_get_drvdata_#t~mem44#1.offset;havoc dev_get_drvdata_#t~mem44#1.base, dev_get_drvdata_#t~mem44#1.offset; {41453#true} is VALID [2022-02-20 22:04:12,896 INFO L290 TraceCheckUtils]: 42: Hoare triple {41453#true} #t~ret52#1.base, #t~ret52#1.offset := dev_get_drvdata_#res#1.base, dev_get_drvdata_#res#1.offset;assume { :end_inline_dev_get_drvdata } true;~tmp~8#1.base, ~tmp~8#1.offset := #t~ret52#1.base, #t~ret52#1.offset;havoc #t~ret52#1.base, #t~ret52#1.offset;#res#1.base, #res#1.offset := ~tmp~8#1.base, ~tmp~8#1.offset; {41453#true} is VALID [2022-02-20 22:04:12,896 INFO L290 TraceCheckUtils]: 43: Hoare triple {41453#true} assume true; {41453#true} is VALID [2022-02-20 22:04:12,897 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {41453#true} {41459#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} #1797#return; {41459#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:12,897 INFO L290 TraceCheckUtils]: 45: Hoare triple {41459#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} alsa_card_serial_init_~tmp___0~5#1.base, alsa_card_serial_init_~tmp___0~5#1.offset := alsa_card_serial_init_#t~ret380#1.base, alsa_card_serial_init_#t~ret380#1.offset;havoc alsa_card_serial_init_#t~ret380#1.base, alsa_card_serial_init_#t~ret380#1.offset; {41459#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:12,898 INFO L290 TraceCheckUtils]: 46: Hoare triple {41459#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} assume !(0 == (alsa_card_serial_init_~tmp___0~5#1.base + alsa_card_serial_init_~tmp___0~5#1.offset) % 18446744073709551616);call write~$Pointer$(alsa_card_serial_init_~device~0#1.base, alsa_card_serial_init_~device~0#1.offset, ~#devices~0.base, ~#devices~0.offset + 8 * alsa_card_serial_init_~i~1#1, 8);alsa_card_serial_init_~cards~0#1 := 1 + alsa_card_serial_init_~cards~0#1; {41459#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:12,898 INFO L290 TraceCheckUtils]: 47: Hoare triple {41459#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} alsa_card_serial_init_~i~1#1 := 1 + alsa_card_serial_init_~i~1#1; {41472#(<= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 1)} is VALID [2022-02-20 22:04:12,898 INFO L290 TraceCheckUtils]: 48: Hoare triple {41472#(<= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 1)} assume !(alsa_card_serial_init_~i~1#1 <= 31); {41454#false} is VALID [2022-02-20 22:04:12,899 INFO L290 TraceCheckUtils]: 49: Hoare triple {41454#false} assume !(0 == alsa_card_serial_init_~cards~0#1);alsa_card_serial_init_#res#1 := 0; {41454#false} is VALID [2022-02-20 22:04:12,899 INFO L290 TraceCheckUtils]: 50: Hoare triple {41454#false} main_#t~ret409#1 := alsa_card_serial_init_#res#1;assume { :end_inline_alsa_card_serial_init } true;assume -2147483648 <= main_#t~ret409#1 && main_#t~ret409#1 <= 2147483647;~ldv_retval_2~0 := main_#t~ret409#1;havoc main_#t~ret409#1; {41454#false} is VALID [2022-02-20 22:04:12,899 INFO L290 TraceCheckUtils]: 51: Hoare triple {41454#false} assume !(0 != ~ldv_retval_2~0); {41454#false} is VALID [2022-02-20 22:04:12,899 INFO L290 TraceCheckUtils]: 52: Hoare triple {41454#false} assume 0 == ~ldv_retval_2~0;~ldv_state_variable_0~0 := 2;~ldv_state_variable_5~0 := 1;assume { :begin_inline_ldv_initialize_snd_rawmidi_ops_5 } true;havoc ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.base, ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.offset, ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.base, ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.offset;havoc ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.base, ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.offset; {41454#false} is VALID [2022-02-20 22:04:12,899 INFO L272 TraceCheckUtils]: 53: Hoare triple {41454#false} call ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.base, ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.offset := ldv_zalloc(112); {41491#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:04:12,899 INFO L290 TraceCheckUtils]: 54: Hoare triple {41491#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {41453#true} is VALID [2022-02-20 22:04:12,899 INFO L290 TraceCheckUtils]: 55: Hoare triple {41453#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {41453#true} is VALID [2022-02-20 22:04:12,899 INFO L290 TraceCheckUtils]: 56: Hoare triple {41453#true} assume true; {41453#true} is VALID [2022-02-20 22:04:12,899 INFO L284 TraceCheckUtils]: 57: Hoare quadruple {41453#true} {41454#false} #1803#return; {41454#false} is VALID [2022-02-20 22:04:12,900 INFO L290 TraceCheckUtils]: 58: Hoare triple {41454#false} ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.base, ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.offset := ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.base, ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.offset;havoc ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.base, ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.offset;~snd_uart16550_output_group0~0.base, ~snd_uart16550_output_group0~0.offset := ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.base, ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.offset; {41454#false} is VALID [2022-02-20 22:04:12,900 INFO L290 TraceCheckUtils]: 59: Hoare triple {41454#false} assume { :end_inline_ldv_initialize_snd_rawmidi_ops_5 } true;~ldv_state_variable_4~0 := 1;assume { :begin_inline_ldv_initialize_snd_rawmidi_ops_4 } true;havoc ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.base, ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.offset, ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.base, ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.offset;havoc ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.base, ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.offset; {41454#false} is VALID [2022-02-20 22:04:12,900 INFO L272 TraceCheckUtils]: 60: Hoare triple {41454#false} call ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.base, ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.offset := ldv_zalloc(112); {41491#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:04:12,900 INFO L290 TraceCheckUtils]: 61: Hoare triple {41491#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {41453#true} is VALID [2022-02-20 22:04:12,900 INFO L290 TraceCheckUtils]: 62: Hoare triple {41453#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {41453#true} is VALID [2022-02-20 22:04:12,900 INFO L290 TraceCheckUtils]: 63: Hoare triple {41453#true} assume true; {41453#true} is VALID [2022-02-20 22:04:12,900 INFO L284 TraceCheckUtils]: 64: Hoare quadruple {41453#true} {41454#false} #1805#return; {41454#false} is VALID [2022-02-20 22:04:12,900 INFO L290 TraceCheckUtils]: 65: Hoare triple {41454#false} ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.base, ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.offset := ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.base, ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.offset;havoc ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.base, ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.offset;~snd_uart16550_input_group0~0.base, ~snd_uart16550_input_group0~0.offset := ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.base, ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.offset; {41454#false} is VALID [2022-02-20 22:04:12,901 INFO L290 TraceCheckUtils]: 66: Hoare triple {41454#false} assume { :end_inline_ldv_initialize_snd_rawmidi_ops_4 } true; {41454#false} is VALID [2022-02-20 22:04:12,901 INFO L290 TraceCheckUtils]: 67: Hoare triple {41454#false} assume -2147483648 <= main_#t~nondet401#1 && main_#t~nondet401#1 <= 2147483647;main_~tmp___1~2#1 := main_#t~nondet401#1;havoc main_#t~nondet401#1;main_#t~switch402#1 := 0 == main_~tmp___1~2#1; {41454#false} is VALID [2022-02-20 22:04:12,901 INFO L290 TraceCheckUtils]: 68: Hoare triple {41454#false} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 1 == main_~tmp___1~2#1; {41454#false} is VALID [2022-02-20 22:04:12,901 INFO L290 TraceCheckUtils]: 69: Hoare triple {41454#false} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 2 == main_~tmp___1~2#1; {41454#false} is VALID [2022-02-20 22:04:12,901 INFO L290 TraceCheckUtils]: 70: Hoare triple {41454#false} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 3 == main_~tmp___1~2#1; {41454#false} is VALID [2022-02-20 22:04:12,901 INFO L290 TraceCheckUtils]: 71: Hoare triple {41454#false} assume main_#t~switch402#1; {41454#false} is VALID [2022-02-20 22:04:12,901 INFO L290 TraceCheckUtils]: 72: Hoare triple {41454#false} assume 0 != ~ldv_state_variable_3~0;assume -2147483648 <= main_#t~nondet410#1 && main_#t~nondet410#1 <= 2147483647;main_~tmp___4~0#1 := main_#t~nondet410#1;havoc main_#t~nondet410#1;main_#t~switch411#1 := 0 == main_~tmp___4~0#1; {41454#false} is VALID [2022-02-20 22:04:12,901 INFO L290 TraceCheckUtils]: 73: Hoare triple {41454#false} assume main_#t~switch411#1; {41454#false} is VALID [2022-02-20 22:04:12,901 INFO L290 TraceCheckUtils]: 74: Hoare triple {41454#false} assume 1 == ~ldv_state_variable_3~0;assume { :begin_inline_snd_serial_probe } true;snd_serial_probe_#in~devptr#1.base, snd_serial_probe_#in~devptr#1.offset := ~snd_serial_driver_group0~0.base, ~snd_serial_driver_group0~0.offset;havoc snd_serial_probe_#res#1;havoc snd_serial_probe_#t~mem326#1, snd_serial_probe_#t~mem327#1, snd_serial_probe_#t~switch328#1, snd_serial_probe_#t~mem329#1, snd_serial_probe_#t~mem330#1, snd_serial_probe_#t~mem331#1, snd_serial_probe_#t~short332#1, snd_serial_probe_#t~mem333#1, snd_serial_probe_#t~mem334#1, snd_serial_probe_#t~mem335#1, snd_serial_probe_#t~short336#1, snd_serial_probe_#t~mem337#1, snd_serial_probe_#t~mem338#1, snd_serial_probe_#t~mem339#1.base, snd_serial_probe_#t~mem339#1.offset, snd_serial_probe_#t~ret340#1, snd_serial_probe_#t~mem341#1.base, snd_serial_probe_#t~mem341#1.offset, snd_serial_probe_#t~strcpy~res342#1.base, snd_serial_probe_#t~strcpy~res342#1.offset, snd_serial_probe_#t~mem343#1.base, snd_serial_probe_#t~mem343#1.offset, snd_serial_probe_#t~strcpy~res344#1.base, snd_serial_probe_#t~strcpy~res344#1.offset, snd_serial_probe_#t~mem345#1.base, snd_serial_probe_#t~mem345#1.offset, snd_serial_probe_#t~mem346#1, snd_serial_probe_#t~mem347#1, snd_serial_probe_#t~mem348#1, snd_serial_probe_#t~mem349#1, snd_serial_probe_#t~mem350#1, snd_serial_probe_#t~mem351#1, snd_serial_probe_#t~ret352#1, snd_serial_probe_#t~mem353#1.base, snd_serial_probe_#t~mem353#1.offset, snd_serial_probe_#t~mem354#1, snd_serial_probe_#t~mem355#1, snd_serial_probe_#t~mem356#1.base, snd_serial_probe_#t~mem356#1.offset, snd_serial_probe_#t~ret357#1, snd_serial_probe_#t~nondet358#1, snd_serial_probe_#t~mem359#1.base, snd_serial_probe_#t~mem359#1.offset, snd_serial_probe_#t~mem360#1.base, snd_serial_probe_#t~mem360#1.offset, snd_serial_probe_#t~mem361#1.base, snd_serial_probe_#t~mem361#1.offset, snd_serial_probe_#t~mem362#1, snd_serial_probe_#t~mem363#1.base, snd_serial_probe_#t~mem363#1.offset, snd_serial_probe_#t~mem364#1.base, snd_serial_probe_#t~mem364#1.offset, snd_serial_probe_#t~mem365#1, snd_serial_probe_#t~mem366#1.base, snd_serial_probe_#t~mem366#1.offset, snd_serial_probe_#t~mem367#1, snd_serial_probe_#t~mem368#1.base, snd_serial_probe_#t~mem368#1.offset, snd_serial_probe_#t~ret369#1, snd_serial_probe_#t~mem370#1.base, snd_serial_probe_#t~mem370#1.offset, snd_serial_probe_#t~mem371#1.base, snd_serial_probe_#t~mem371#1.offset, snd_serial_probe_#t~ret372#1, snd_serial_probe_~devptr#1.base, snd_serial_probe_~devptr#1.offset, snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset, snd_serial_probe_~#uart~11#1.base, snd_serial_probe_~#uart~11#1.offset, snd_serial_probe_~err~2#1, snd_serial_probe_~dev~0#1;snd_serial_probe_~devptr#1.base, snd_serial_probe_~devptr#1.offset := snd_serial_probe_#in~devptr#1.base, snd_serial_probe_#in~devptr#1.offset;call snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset := #Ultimate.allocOnStack(8);call snd_serial_probe_~#uart~11#1.base, snd_serial_probe_~#uart~11#1.offset := #Ultimate.allocOnStack(8);havoc snd_serial_probe_~err~2#1;havoc snd_serial_probe_~dev~0#1;call snd_serial_probe_#t~mem326#1 := read~int(snd_serial_probe_~devptr#1.base, 8 + snd_serial_probe_~devptr#1.offset, 4);snd_serial_probe_~dev~0#1 := snd_serial_probe_#t~mem326#1;havoc snd_serial_probe_#t~mem326#1;call snd_serial_probe_#t~mem327#1 := read~int(~#adaptor~0.base, ~#adaptor~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);snd_serial_probe_#t~switch328#1 := 0 == snd_serial_probe_#t~mem327#1; {41454#false} is VALID [2022-02-20 22:04:12,902 INFO L290 TraceCheckUtils]: 75: Hoare triple {41454#false} assume snd_serial_probe_#t~switch328#1;call write~int(1, ~#ins~0.base, ~#ins~0.offset + 4 * snd_serial_probe_~dev~0#1, 4); {41454#false} is VALID [2022-02-20 22:04:12,902 INFO L290 TraceCheckUtils]: 76: Hoare triple {41454#false} call snd_serial_probe_#t~mem330#1 := read~int(~#outs~0.base, ~#outs~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);snd_serial_probe_#t~short332#1 := snd_serial_probe_#t~mem330#1 <= 0; {41454#false} is VALID [2022-02-20 22:04:12,902 INFO L290 TraceCheckUtils]: 77: Hoare triple {41454#false} assume !snd_serial_probe_#t~short332#1;call snd_serial_probe_#t~mem331#1 := read~int(~#outs~0.base, ~#outs~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);snd_serial_probe_#t~short332#1 := snd_serial_probe_#t~mem331#1 > 16; {41454#false} is VALID [2022-02-20 22:04:12,902 INFO L290 TraceCheckUtils]: 78: Hoare triple {41454#false} assume !snd_serial_probe_#t~short332#1;havoc snd_serial_probe_#t~mem330#1;havoc snd_serial_probe_#t~mem331#1;havoc snd_serial_probe_#t~short332#1;call snd_serial_probe_#t~mem334#1 := read~int(~#ins~0.base, ~#ins~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);snd_serial_probe_#t~short336#1 := snd_serial_probe_#t~mem334#1 <= 0; {41454#false} is VALID [2022-02-20 22:04:12,902 INFO L290 TraceCheckUtils]: 79: Hoare triple {41454#false} assume snd_serial_probe_#t~short336#1; {41454#false} is VALID [2022-02-20 22:04:12,902 INFO L290 TraceCheckUtils]: 80: Hoare triple {41454#false} assume !snd_serial_probe_#t~short336#1;havoc snd_serial_probe_#t~mem334#1;havoc snd_serial_probe_#t~mem335#1;havoc snd_serial_probe_#t~short336#1;call snd_serial_probe_#t~mem338#1 := read~int(~#index~0.base, ~#index~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem339#1.base, snd_serial_probe_#t~mem339#1.offset := read~$Pointer$(~#id~0.base, ~#id~0.offset + 8 * snd_serial_probe_~dev~0#1, 8);assume { :begin_inline_snd_card_new } true;snd_card_new_#in~arg0#1.base, snd_card_new_#in~arg0#1.offset, snd_card_new_#in~arg1#1, snd_card_new_#in~arg2#1.base, snd_card_new_#in~arg2#1.offset, snd_card_new_#in~arg3#1.base, snd_card_new_#in~arg3#1.offset, snd_card_new_#in~arg4#1, snd_card_new_#in~arg5#1.base, snd_card_new_#in~arg5#1.offset := snd_serial_probe_~devptr#1.base, 13 + snd_serial_probe_~devptr#1.offset, snd_serial_probe_#t~mem338#1, snd_serial_probe_#t~mem339#1.base, snd_serial_probe_#t~mem339#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 0, snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset;havoc snd_card_new_#res#1;havoc snd_card_new_#t~nondet433#1, snd_card_new_~arg0#1.base, snd_card_new_~arg0#1.offset, snd_card_new_~arg1#1, snd_card_new_~arg2#1.base, snd_card_new_~arg2#1.offset, snd_card_new_~arg3#1.base, snd_card_new_~arg3#1.offset, snd_card_new_~arg4#1, snd_card_new_~arg5#1.base, snd_card_new_~arg5#1.offset;snd_card_new_~arg0#1.base, snd_card_new_~arg0#1.offset := snd_card_new_#in~arg0#1.base, snd_card_new_#in~arg0#1.offset;snd_card_new_~arg1#1 := snd_card_new_#in~arg1#1;snd_card_new_~arg2#1.base, snd_card_new_~arg2#1.offset := snd_card_new_#in~arg2#1.base, snd_card_new_#in~arg2#1.offset;snd_card_new_~arg3#1.base, snd_card_new_~arg3#1.offset := snd_card_new_#in~arg3#1.base, snd_card_new_#in~arg3#1.offset;snd_card_new_~arg4#1 := snd_card_new_#in~arg4#1;snd_card_new_~arg5#1.base, snd_card_new_~arg5#1.offset := snd_card_new_#in~arg5#1.base, snd_card_new_#in~arg5#1.offset;assume -2147483648 <= snd_card_new_#t~nondet433#1 && snd_card_new_#t~nondet433#1 <= 2147483647;snd_card_new_#res#1 := snd_card_new_#t~nondet433#1;havoc snd_card_new_#t~nondet433#1; {41454#false} is VALID [2022-02-20 22:04:12,902 INFO L290 TraceCheckUtils]: 81: Hoare triple {41454#false} snd_serial_probe_#t~ret340#1 := snd_card_new_#res#1;assume { :end_inline_snd_card_new } true;assume -2147483648 <= snd_serial_probe_#t~ret340#1 && snd_serial_probe_#t~ret340#1 <= 2147483647;snd_serial_probe_~err~2#1 := snd_serial_probe_#t~ret340#1;havoc snd_serial_probe_#t~mem338#1;havoc snd_serial_probe_#t~mem339#1.base, snd_serial_probe_#t~mem339#1.offset;havoc snd_serial_probe_#t~ret340#1; {41454#false} is VALID [2022-02-20 22:04:12,902 INFO L290 TraceCheckUtils]: 82: Hoare triple {41454#false} assume !(snd_serial_probe_~err~2#1 < 0);call snd_serial_probe_#t~mem341#1.base, snd_serial_probe_#t~mem341#1.offset := read~$Pointer$(snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset, 8); {41454#false} is VALID [2022-02-20 22:04:12,903 INFO L272 TraceCheckUtils]: 83: Hoare triple {41454#false} call snd_serial_probe_#t~strcpy~res342#1.base, snd_serial_probe_#t~strcpy~res342#1.offset := #Ultimate.C_strcpy(snd_serial_probe_#t~mem341#1.base, 20 + snd_serial_probe_#t~mem341#1.offset, 29, 0); {41493#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:04:12,903 INFO L290 TraceCheckUtils]: 84: Hoare triple {41493#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~offset444 := 0; {41453#true} is VALID [2022-02-20 22:04:12,903 INFO L290 TraceCheckUtils]: 85: Hoare triple {41453#true} call #t~mem445 := read~int(src.base, src.offset + #t~offset444, 1);call write~unchecked~int(#t~mem445, dest.base, dest.offset + #t~offset444, 1); {41453#true} is VALID [2022-02-20 22:04:12,903 INFO L290 TraceCheckUtils]: 86: Hoare triple {41453#true} assume 0 == #t~mem445; {41453#true} is VALID [2022-02-20 22:04:12,903 INFO L290 TraceCheckUtils]: 87: Hoare triple {41453#true} assume #res.base == dest.base && #res.offset == dest.offset; {41453#true} is VALID [2022-02-20 22:04:12,903 INFO L284 TraceCheckUtils]: 88: Hoare quadruple {41453#true} {41454#false} #1809#return; {41454#false} is VALID [2022-02-20 22:04:12,903 INFO L290 TraceCheckUtils]: 89: Hoare triple {41454#false} havoc snd_serial_probe_#t~mem341#1.base, snd_serial_probe_#t~mem341#1.offset;havoc snd_serial_probe_#t~strcpy~res342#1.base, snd_serial_probe_#t~strcpy~res342#1.offset;call snd_serial_probe_#t~mem343#1.base, snd_serial_probe_#t~mem343#1.offset := read~$Pointer$(snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset, 8); {41454#false} is VALID [2022-02-20 22:04:12,903 INFO L272 TraceCheckUtils]: 90: Hoare triple {41454#false} call snd_serial_probe_#t~strcpy~res344#1.base, snd_serial_probe_#t~strcpy~res344#1.offset := #Ultimate.C_strcpy(snd_serial_probe_#t~mem343#1.base, 36 + snd_serial_probe_#t~mem343#1.offset, 30, 0); {41493#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:04:12,904 INFO L290 TraceCheckUtils]: 91: Hoare triple {41493#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~offset444 := 0; {41453#true} is VALID [2022-02-20 22:04:12,904 INFO L290 TraceCheckUtils]: 92: Hoare triple {41453#true} call #t~mem445 := read~int(src.base, src.offset + #t~offset444, 1);call write~unchecked~int(#t~mem445, dest.base, dest.offset + #t~offset444, 1); {41453#true} is VALID [2022-02-20 22:04:12,904 INFO L290 TraceCheckUtils]: 93: Hoare triple {41453#true} assume 0 == #t~mem445; {41453#true} is VALID [2022-02-20 22:04:12,904 INFO L290 TraceCheckUtils]: 94: Hoare triple {41453#true} assume #res.base == dest.base && #res.offset == dest.offset; {41453#true} is VALID [2022-02-20 22:04:12,904 INFO L284 TraceCheckUtils]: 95: Hoare quadruple {41453#true} {41454#false} #1811#return; {41454#false} is VALID [2022-02-20 22:04:12,904 INFO L290 TraceCheckUtils]: 96: Hoare triple {41454#false} havoc snd_serial_probe_#t~mem343#1.base, snd_serial_probe_#t~mem343#1.offset;havoc snd_serial_probe_#t~strcpy~res344#1.base, snd_serial_probe_#t~strcpy~res344#1.offset;call snd_serial_probe_#t~mem345#1.base, snd_serial_probe_#t~mem345#1.offset := read~$Pointer$(snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset, 8);call snd_serial_probe_#t~mem346#1 := read~int(~#port~0.base, ~#port~0.offset + 8 * snd_serial_probe_~dev~0#1, 8);call snd_serial_probe_#t~mem347#1 := read~int(~#irq~0.base, ~#irq~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem348#1 := read~int(~#speed~0.base, ~#speed~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem349#1 := read~int(~#base~0.base, ~#base~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem350#1 := read~int(~#adaptor~0.base, ~#adaptor~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem351#1 := read~int(~#droponfull~0.base, ~#droponfull~0.offset + snd_serial_probe_~dev~0#1, 1);assume { :begin_inline_snd_uart16550_create } true;snd_uart16550_create_#in~card#1.base, snd_uart16550_create_#in~card#1.offset, snd_uart16550_create_#in~iobase#1, snd_uart16550_create_#in~irq___0#1, snd_uart16550_create_#in~speed___0#1, snd_uart16550_create_#in~base___0#1, snd_uart16550_create_#in~adaptor___0#1, snd_uart16550_create_#in~droponfull___0#1, snd_uart16550_create_#in~ruart#1.base, snd_uart16550_create_#in~ruart#1.offset := snd_serial_probe_#t~mem345#1.base, snd_serial_probe_#t~mem345#1.offset, snd_serial_probe_#t~mem346#1, snd_serial_probe_#t~mem347#1, snd_serial_probe_#t~mem348#1, snd_serial_probe_#t~mem349#1, snd_serial_probe_#t~mem350#1, snd_serial_probe_#t~mem351#1 % 256, snd_serial_probe_~#uart~11#1.base, snd_serial_probe_~#uart~11#1.offset;havoc snd_uart16550_create_#res#1;havoc snd_uart16550_create_#t~ret296#1.base, snd_uart16550_create_#t~ret296#1.offset, snd_uart16550_create_#t~ret297#1.base, snd_uart16550_create_#t~ret297#1.offset, snd_uart16550_create_#t~ret298#1, snd_uart16550_create_#t~nondet299#1, snd_uart16550_create_#t~ret300#1, snd_uart16550_create_#t~ret301#1, snd_uart16550_create_#t~mem302#1, snd_uart16550_create_#t~memset~res303#1.base, snd_uart16550_create_#t~memset~res303#1.offset, snd_uart16550_create_#t~ret304#1, snd_uart16550_create_#t~ret305#1, snd_uart16550_create_#t~ret306#1, snd_uart16550_create_#t~mem307#1, snd_uart16550_create_#t~switch308#1, snd_uart16550_create_#t~mem309#1, snd_uart16550_create_#t~mem310#1, snd_uart16550_create_~card#1.base, snd_uart16550_create_~card#1.offset, snd_uart16550_create_~iobase#1, snd_uart16550_create_~irq___0#1, snd_uart16550_create_~speed___0#1, snd_uart16550_create_~base___0#1, snd_uart16550_create_~adaptor___0#1, snd_uart16550_create_~droponfull___0#1, snd_uart16550_create_~ruart#1.base, snd_uart16550_create_~ruart#1.offset, snd_uart16550_create_~#ops~0#1.base, snd_uart16550_create_~#ops~0#1.offset, snd_uart16550_create_~uart~10#1.base, snd_uart16550_create_~uart~10#1.offset, snd_uart16550_create_~err~0#1, snd_uart16550_create_~tmp~13#1.base, snd_uart16550_create_~tmp~13#1.offset, snd_uart16550_create_~#__key~0#1.base, snd_uart16550_create_~#__key~0#1.offset, snd_uart16550_create_~tmp___0~4#1;snd_uart16550_create_~card#1.base, snd_uart16550_create_~card#1.offset := snd_uart16550_create_#in~card#1.base, snd_uart16550_create_#in~card#1.offset;snd_uart16550_create_~iobase#1 := snd_uart16550_create_#in~iobase#1;snd_uart16550_create_~irq___0#1 := snd_uart16550_create_#in~irq___0#1;snd_uart16550_create_~speed___0#1 := snd_uart16550_create_#in~speed___0#1;snd_uart16550_create_~base___0#1 := snd_uart16550_create_#in~base___0#1;snd_uart16550_create_~adaptor___0#1 := snd_uart16550_create_#in~adaptor___0#1;snd_uart16550_create_~droponfull___0#1 := snd_uart16550_create_#in~droponfull___0#1;snd_uart16550_create_~ruart#1.base, snd_uart16550_create_~ruart#1.offset := snd_uart16550_create_#in~ruart#1.base, snd_uart16550_create_#in~ruart#1.offset;call snd_uart16550_create_~#ops~0#1.base, snd_uart16550_create_~#ops~0#1.offset := #Ultimate.allocOnStack(24);havoc snd_uart16550_create_~uart~10#1.base, snd_uart16550_create_~uart~10#1.offset;havoc snd_uart16550_create_~err~0#1;havoc snd_uart16550_create_~tmp~13#1.base, snd_uart16550_create_~tmp~13#1.offset;call snd_uart16550_create_~#__key~0#1.base, snd_uart16550_create_~#__key~0#1.offset := #Ultimate.allocOnStack(8);havoc snd_uart16550_create_~tmp___0~4#1;call write~$Pointer$(#funAddr~snd_uart16550_dev_free.base, #funAddr~snd_uart16550_dev_free.offset, snd_uart16550_create_~#ops~0#1.base, snd_uart16550_create_~#ops~0#1.offset, 8);call write~$Pointer$(0, 0, snd_uart16550_create_~#ops~0#1.base, 8 + snd_uart16550_create_~#ops~0#1.offset, 8);call write~$Pointer$(0, 0, snd_uart16550_create_~#ops~0#1.base, 16 + snd_uart16550_create_~#ops~0#1.offset, 8);assume { :begin_inline_kzalloc } true;kzalloc_#in~size#1, kzalloc_#in~flags#1 := 33344, 208;havoc kzalloc_#res#1.base, kzalloc_#res#1.offset;havoc kzalloc_~size#1, kzalloc_~flags#1;kzalloc_~size#1 := kzalloc_#in~size#1;kzalloc_~flags#1 := kzalloc_#in~flags#1;assume { :begin_inline_ldv_check_alloc_flags } true;ldv_check_alloc_flags_#in~flags#1 := kzalloc_~flags#1;havoc ldv_check_alloc_flags_~flags#1;ldv_check_alloc_flags_~flags#1 := ldv_check_alloc_flags_#in~flags#1; {41454#false} is VALID [2022-02-20 22:04:12,904 INFO L290 TraceCheckUtils]: 97: Hoare triple {41454#false} assume !(0 == ~ldv_spin~0 || 0 == (if 0 == ldv_check_alloc_flags_~flags#1 then 0 else (if 1 == ldv_check_alloc_flags_~flags#1 then 0 else ~bitwiseAnd(ldv_check_alloc_flags_~flags#1, 16))) % 4294967296); {41454#false} is VALID [2022-02-20 22:04:12,904 INFO L272 TraceCheckUtils]: 98: Hoare triple {41454#false} call ldv_error(); {41454#false} is VALID [2022-02-20 22:04:12,905 INFO L290 TraceCheckUtils]: 99: Hoare triple {41454#false} assume !false; {41454#false} is VALID [2022-02-20 22:04:12,905 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2022-02-20 22:04:12,905 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:04:12,905 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2044104808] [2022-02-20 22:04:12,905 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2044104808] provided 0 perfect and 1 imperfect interpolant sequences [2022-02-20 22:04:12,905 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1978959484] [2022-02-20 22:04:12,905 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:04:12,906 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-20 22:04:12,906 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-20 22:04:12,907 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-02-20 22:04:12,908 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-02-20 22:04:13,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:04:13,336 INFO L263 TraceCheckSpWp]: Trace formula consists of 2153 conjuncts, 2 conjunts are in the unsatisfiable core [2022-02-20 22:04:13,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:04:13,377 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-02-20 22:04:13,529 INFO L290 TraceCheckUtils]: 0: Hoare triple {41453#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(105, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(8, 4);call #Ultimate.allocInit(12, 5);call #Ultimate.allocInit(12, 6);call #Ultimate.allocInit(8, 7);call #Ultimate.allocInit(217, 8);call #Ultimate.allocInit(33, 9);call #Ultimate.allocInit(12, 10);call #Ultimate.allocInit(217, 11);call #Ultimate.allocInit(32, 12);call #Ultimate.allocInit(217, 13);call #Ultimate.allocInit(40, 14);call #Ultimate.allocInit(27, 15);call #Ultimate.allocInit(28, 16);call #Ultimate.allocInit(12, 17);call #Ultimate.allocInit(217, 18);call #Ultimate.allocInit(30, 19);call #Ultimate.allocInit(15, 20);call #Ultimate.allocInit(17, 21);call #Ultimate.allocInit(12, 22);call #Ultimate.allocInit(217, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(217, 25);call #Ultimate.allocInit(45, 26);call #Ultimate.allocInit(217, 27);call #Ultimate.allocInit(44, 28);call #Ultimate.allocInit(7, 29);call write~init~int(83, 29, 0, 1);call write~init~int(101, 29, 1, 1);call write~init~int(114, 29, 2, 1);call write~init~int(105, 29, 3, 1);call write~init~int(97, 29, 4, 1);call write~init~int(108, 29, 5, 1);call write~init~int(0, 29, 6, 1);call #Ultimate.allocInit(25, 30);call #Ultimate.allocInit(24, 31);call #Ultimate.allocInit(18, 32);call #Ultimate.allocInit(18, 33);call #Ultimate.allocInit(49, 34);~ldv_irq_1_3~0 := 0;~ldv_irq_data_1_1~0.base, ~ldv_irq_data_1_1~0.offset := 0, 0;~ldv_irq_1_0~0 := 0;~ldv_irq_data_1_0~0.base, ~ldv_irq_data_1_0~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_irq_data_1_3~0.base, ~ldv_irq_data_1_3~0.offset := 0, 0;~snd_uart16550_input_group0~0.base, ~snd_uart16550_input_group0~0.offset := 0, 0;~ldv_irq_data_1_2~0.base, ~ldv_irq_data_1_2~0.offset := 0, 0;~ldv_irq_1_2~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_irq_1_1~0 := 0;~ldv_timer_state_2~0 := 0;~ldv_irq_line_1_3~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_irq_line_1_0~0 := 0;~ldv_timer_list_2~0.base, ~ldv_timer_list_2~0.offset := 0, 0;~snd_serial_driver_group0~0.base, ~snd_serial_driver_group0~0.offset := 0, 0;~ref_cnt~0 := 0;~ldv_irq_line_1_1~0 := 0;~snd_uart16550_output_group0~0.base, ~snd_uart16550_output_group0~0.offset := 0, 0;~ldv_state_variable_1~0 := 0;~ldv_irq_line_1_2~0 := 0;~ldv_state_variable_4~0 := 0;~#adaptor_names~0.base, ~#adaptor_names~0.offset := 35, 0;call #Ultimate.allocInit(40, 35);call write~init~$Pointer$(3, 0, ~#adaptor_names~0.base, ~#adaptor_names~0.offset, 8);call write~init~$Pointer$(4, 0, ~#adaptor_names~0.base, 8 + ~#adaptor_names~0.offset, 8);call write~init~$Pointer$(5, 0, ~#adaptor_names~0.base, 16 + ~#adaptor_names~0.offset, 8);call write~init~$Pointer$(6, 0, ~#adaptor_names~0.base, 24 + ~#adaptor_names~0.offset, 8);call write~init~$Pointer$(7, 0, ~#adaptor_names~0.base, 32 + ~#adaptor_names~0.offset, 8);~#index~0.base, ~#index~0.offset := 36, 0;call #Ultimate.allocInit(128, 36);call write~init~int(-1, ~#index~0.base, ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 4 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 8 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 12 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 16 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 20 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 24 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 28 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 32 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 36 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 40 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 44 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 48 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 52 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 56 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 60 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 64 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 68 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 72 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 76 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 80 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 84 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 88 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 92 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 96 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 100 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 104 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 108 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 112 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 116 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 120 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 124 + ~#index~0.offset, 4);~#id~0.base, ~#id~0.offset := 37, 0;call #Ultimate.allocInit(256, 37);call write~init~$Pointer$(0, 0, ~#id~0.base, ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 8 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 16 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 24 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 32 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 40 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 48 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 56 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 64 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 72 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 80 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 88 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 96 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 104 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 112 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 120 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 128 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 136 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 144 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 152 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 160 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 168 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 176 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 184 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 192 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 200 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 208 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 216 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 224 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 232 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 240 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 248 + ~#id~0.offset, 8);~#enable~0.base, ~#enable~0.offset := 38, 0;call #Ultimate.allocInit(32, 38);call write~init~int(1, ~#enable~0.base, ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 1 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 2 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 3 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 4 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 5 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 6 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 7 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 8 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 9 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 10 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 11 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 12 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 13 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 14 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 15 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 16 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 17 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 18 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 19 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 20 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 21 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 22 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 23 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 24 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 25 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 26 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 27 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 28 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 29 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 30 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 31 + ~#enable~0.offset, 1);~#port~0.base, ~#port~0.offset := 39, 0;call #Ultimate.allocInit(256, 39);call write~init~int(1, ~#port~0.base, ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 8 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 16 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 24 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 32 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 40 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 48 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 56 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 64 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 72 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 80 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 88 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 96 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 104 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 112 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 120 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 128 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 136 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 144 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 152 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 160 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 168 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 176 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 184 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 192 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 200 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 208 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 216 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 224 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 232 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 240 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 248 + ~#port~0.offset, 8);~#irq~0.base, ~#irq~0.offset := 40, 0;call #Ultimate.allocInit(128, 40);call write~init~int(65535, ~#irq~0.base, ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 4 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 8 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 12 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 16 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 20 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 24 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 28 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 32 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 36 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 40 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 44 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 48 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 52 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 56 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 60 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 64 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 68 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 72 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 76 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 80 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 84 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 88 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 92 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 96 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 100 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 104 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 108 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 112 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 116 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 120 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 124 + ~#irq~0.offset, 4);~#speed~0.base, ~#speed~0.offset := 41, 0;call #Ultimate.allocInit(128, 41);call write~init~int(38400, ~#speed~0.base, ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 4 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 8 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 12 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 16 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 20 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 24 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 28 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 32 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 36 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 40 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 44 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 48 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 52 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 56 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 60 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 64 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 68 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 72 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 76 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 80 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 84 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 88 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 92 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 96 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 100 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 104 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 108 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 112 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 116 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 120 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 124 + ~#speed~0.offset, 4);~#base~0.base, ~#base~0.offset := 42, 0;call #Ultimate.allocInit(128, 42);call write~init~int(115200, ~#base~0.base, ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 4 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 8 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 12 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 16 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 20 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 24 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 28 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 32 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 36 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 40 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 44 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 48 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 52 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 56 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 60 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 64 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 68 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 72 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 76 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 80 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 84 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 88 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 92 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 96 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 100 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 104 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 108 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 112 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 116 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 120 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 124 + ~#base~0.offset, 4);~#outs~0.base, ~#outs~0.offset := 43, 0;call #Ultimate.allocInit(128, 43);call write~init~int(1, ~#outs~0.base, ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 4 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 8 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 12 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 16 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 20 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 24 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 28 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 32 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 36 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 40 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 44 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 48 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 52 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 56 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 60 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 64 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 68 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 72 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 76 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 80 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 84 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 88 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 92 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 96 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 100 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 104 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 108 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 112 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 116 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 120 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 124 + ~#outs~0.offset, 4);~#ins~0.base, ~#ins~0.offset := 44, 0;call #Ultimate.allocInit(128, 44);call write~init~int(1, ~#ins~0.base, ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 4 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 8 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 12 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 16 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 20 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 24 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 28 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 32 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 36 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 40 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 44 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 48 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 52 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 56 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 60 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 64 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 68 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 72 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 76 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 80 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 84 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 88 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 92 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 96 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 100 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 104 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 108 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 112 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 116 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 120 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 124 + ~#ins~0.offset, 4);~#adaptor~0.base, ~#adaptor~0.offset := 45, 0;call #Ultimate.allocInit(128, 45);call write~init~int(0, ~#adaptor~0.base, ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 4 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 8 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 12 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 16 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 20 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 24 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 28 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 32 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 36 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 40 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 44 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 48 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 52 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 56 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 60 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 64 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 68 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 72 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 76 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 80 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 84 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 88 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 92 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 96 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 100 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 104 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 108 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 112 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 116 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 120 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 124 + ~#adaptor~0.offset, 4);~#droponfull~0.base, ~#droponfull~0.offset := 46, 0;call #Ultimate.allocInit(32, 46);call write~init~int(0, ~#droponfull~0.base, ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 1 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 2 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 3 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 4 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 5 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 6 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 7 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 8 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 9 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 10 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 11 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 12 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 13 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 14 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 15 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 16 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 17 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 18 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 19 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 20 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 21 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 22 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 23 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 24 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 25 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 26 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 27 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 28 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 29 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 30 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 31 + ~#droponfull~0.offset, 1);~#devices~0.base, ~#devices~0.offset := 47, 0;call #Ultimate.allocInit(256, 47);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#devices~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#devices~0.base);~#snd_uart16550_output~0.base, ~#snd_uart16550_output~0.offset := 48, 0;call #Ultimate.allocInit(32, 48);call write~init~$Pointer$(#funAddr~snd_uart16550_output_open.base, #funAddr~snd_uart16550_output_open.offset, ~#snd_uart16550_output~0.base, ~#snd_uart16550_output~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_uart16550_output_close.base, #funAddr~snd_uart16550_output_close.offset, ~#snd_uart16550_output~0.base, 8 + ~#snd_uart16550_output~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_uart16550_output_trigger.base, #funAddr~snd_uart16550_output_trigger.offset, ~#snd_uart16550_output~0.base, 16 + ~#snd_uart16550_output~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_uart16550_output~0.base, 24 + ~#snd_uart16550_output~0.offset, 8);~#snd_uart16550_input~0.base, ~#snd_uart16550_input~0.offset := 49, 0;call #Ultimate.allocInit(32, 49);call write~init~$Pointer$(#funAddr~snd_uart16550_input_open.base, #funAddr~snd_uart16550_input_open.offset, ~#snd_uart16550_input~0.base, ~#snd_uart16550_input~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_uart16550_input_close.base, #funAddr~snd_uart16550_input_close.offset, ~#snd_uart16550_input~0.base, 8 + ~#snd_uart16550_input~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_uart16550_input_trigger.base, #funAddr~snd_uart16550_input_trigger.offset, ~#snd_uart16550_input~0.base, 16 + ~#snd_uart16550_input~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_uart16550_input~0.base, 24 + ~#snd_uart16550_input~0.offset, 8);~#snd_serial_driver~0.base, ~#snd_serial_driver~0.offset := 50, 0;call #Ultimate.allocInit(162, 50);call write~init~$Pointer$(#funAddr~snd_serial_probe.base, #funAddr~snd_serial_probe.offset, ~#snd_serial_driver~0.base, ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_serial_remove.base, #funAddr~snd_serial_remove.offset, ~#snd_serial_driver~0.base, 8 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 16 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 24 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 32 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(32, 0, ~#snd_serial_driver~0.base, 40 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 48 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#snd_serial_driver~0.base, 56 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 64 + ~#snd_serial_driver~0.offset, 8);call write~init~int(0, ~#snd_serial_driver~0.base, 72 + ~#snd_serial_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 73 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 81 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 89 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 97 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 105 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 113 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 121 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 129 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 137 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 145 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 153 + ~#snd_serial_driver~0.offset, 8);call write~init~int(0, ~#snd_serial_driver~0.base, 161 + ~#snd_serial_driver~0.offset, 1);~ldv_retval_2~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_5~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_spin~0 := 0; {41453#true} is VALID [2022-02-20 22:04:13,530 INFO L290 TraceCheckUtils]: 1: Hoare triple {41453#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet399#1, main_#t~nondet400#1, main_#t~nondet401#1, main_#t~switch402#1, main_#t~nondet403#1, main_#t~switch404#1, main_#t~ret405#1, main_#t~ret406#1, main_#t~nondet407#1, main_#t~switch408#1, main_#t~ret409#1, main_#t~nondet410#1, main_#t~switch411#1, main_#t~ret412#1, main_#t~ret413#1, main_#t~nondet414#1, main_#t~switch415#1, main_#t~ret416#1, main_#t~ret417#1, main_~ldvarg0~0#1, main_~tmp~21#1, main_~ldvarg1~0#1, main_~tmp___0~6#1, main_~tmp___1~2#1, main_~tmp___2~1#1, main_~tmp___3~0#1, main_~tmp___4~0#1, main_~tmp___5~0#1;havoc main_~ldvarg0~0#1;havoc main_~tmp~21#1;havoc main_~ldvarg1~0#1;havoc main_~tmp___0~6#1;havoc main_~tmp___1~2#1;havoc main_~tmp___2~1#1;havoc main_~tmp___3~0#1;havoc main_~tmp___4~0#1;havoc main_~tmp___5~0#1;assume -2147483648 <= main_#t~nondet399#1 && main_#t~nondet399#1 <= 2147483647;main_~tmp~21#1 := main_#t~nondet399#1;havoc main_#t~nondet399#1;main_~ldvarg0~0#1 := main_~tmp~21#1;assume -2147483648 <= main_#t~nondet400#1 && main_#t~nondet400#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet400#1;havoc main_#t~nondet400#1;main_~ldvarg1~0#1 := main_~tmp___0~6#1;assume { :begin_inline_ldv_initialize } true; {41453#true} is VALID [2022-02-20 22:04:13,530 INFO L290 TraceCheckUtils]: 2: Hoare triple {41453#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_4~0 := 0;~ldv_state_variable_1~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 1;~ldv_state_variable_5~0 := 0; {41453#true} is VALID [2022-02-20 22:04:13,530 INFO L290 TraceCheckUtils]: 3: Hoare triple {41453#true} assume -2147483648 <= main_#t~nondet401#1 && main_#t~nondet401#1 <= 2147483647;main_~tmp___1~2#1 := main_#t~nondet401#1;havoc main_#t~nondet401#1;main_#t~switch402#1 := 0 == main_~tmp___1~2#1; {41453#true} is VALID [2022-02-20 22:04:13,530 INFO L290 TraceCheckUtils]: 4: Hoare triple {41453#true} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 1 == main_~tmp___1~2#1; {41453#true} is VALID [2022-02-20 22:04:13,530 INFO L290 TraceCheckUtils]: 5: Hoare triple {41453#true} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 2 == main_~tmp___1~2#1; {41453#true} is VALID [2022-02-20 22:04:13,530 INFO L290 TraceCheckUtils]: 6: Hoare triple {41453#true} assume main_#t~switch402#1; {41453#true} is VALID [2022-02-20 22:04:13,530 INFO L290 TraceCheckUtils]: 7: Hoare triple {41453#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet407#1 && main_#t~nondet407#1 <= 2147483647;main_~tmp___3~0#1 := main_#t~nondet407#1;havoc main_#t~nondet407#1;main_#t~switch408#1 := 0 == main_~tmp___3~0#1; {41453#true} is VALID [2022-02-20 22:04:13,531 INFO L290 TraceCheckUtils]: 8: Hoare triple {41453#true} assume !main_#t~switch408#1;main_#t~switch408#1 := main_#t~switch408#1 || 1 == main_~tmp___3~0#1; {41453#true} is VALID [2022-02-20 22:04:13,531 INFO L290 TraceCheckUtils]: 9: Hoare triple {41453#true} assume main_#t~switch408#1; {41453#true} is VALID [2022-02-20 22:04:13,531 INFO L290 TraceCheckUtils]: 10: Hoare triple {41453#true} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_alsa_card_serial_init } true;havoc alsa_card_serial_init_#res#1;havoc alsa_card_serial_init_#t~ret376#1, alsa_card_serial_init_#t~mem377#1, alsa_card_serial_init_#t~ret378#1.base, alsa_card_serial_init_#t~ret378#1.offset, alsa_card_serial_init_#t~ret379#1, alsa_card_serial_init_#t~ret380#1.base, alsa_card_serial_init_#t~ret380#1.offset, alsa_card_serial_init_#t~nondet381#1, alsa_card_serial_init_~i~1#1, alsa_card_serial_init_~cards~0#1, alsa_card_serial_init_~err~3#1, alsa_card_serial_init_~device~0#1.base, alsa_card_serial_init_~device~0#1.offset, alsa_card_serial_init_~tmp~15#1, alsa_card_serial_init_~tmp___0~5#1.base, alsa_card_serial_init_~tmp___0~5#1.offset;havoc alsa_card_serial_init_~i~1#1;havoc alsa_card_serial_init_~cards~0#1;havoc alsa_card_serial_init_~err~3#1;havoc alsa_card_serial_init_~device~0#1.base, alsa_card_serial_init_~device~0#1.offset;havoc alsa_card_serial_init_~tmp~15#1;havoc alsa_card_serial_init_~tmp___0~5#1.base, alsa_card_serial_init_~tmp___0~5#1.offset;assume { :begin_inline_ldv___platform_driver_register_23 } true;ldv___platform_driver_register_23_#in~ldv_func_arg1#1.base, ldv___platform_driver_register_23_#in~ldv_func_arg1#1.offset, ldv___platform_driver_register_23_#in~ldv_func_arg2#1.base, ldv___platform_driver_register_23_#in~ldv_func_arg2#1.offset := ~#snd_serial_driver~0.base, ~#snd_serial_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset;havoc ldv___platform_driver_register_23_#res#1;havoc ldv___platform_driver_register_23_#t~ret421#1, ldv___platform_driver_register_23_~ldv_func_arg1#1.base, ldv___platform_driver_register_23_~ldv_func_arg1#1.offset, ldv___platform_driver_register_23_~ldv_func_arg2#1.base, ldv___platform_driver_register_23_~ldv_func_arg2#1.offset, ldv___platform_driver_register_23_~ldv_func_res~2#1, ldv___platform_driver_register_23_~tmp~24#1;ldv___platform_driver_register_23_~ldv_func_arg1#1.base, ldv___platform_driver_register_23_~ldv_func_arg1#1.offset := ldv___platform_driver_register_23_#in~ldv_func_arg1#1.base, ldv___platform_driver_register_23_#in~ldv_func_arg1#1.offset;ldv___platform_driver_register_23_~ldv_func_arg2#1.base, ldv___platform_driver_register_23_~ldv_func_arg2#1.offset := ldv___platform_driver_register_23_#in~ldv_func_arg2#1.base, ldv___platform_driver_register_23_#in~ldv_func_arg2#1.offset;havoc ldv___platform_driver_register_23_~ldv_func_res~2#1;havoc ldv___platform_driver_register_23_~tmp~24#1;assume { :begin_inline___platform_driver_register } true;__platform_driver_register_#in~arg0#1.base, __platform_driver_register_#in~arg0#1.offset, __platform_driver_register_#in~arg1#1.base, __platform_driver_register_#in~arg1#1.offset := ldv___platform_driver_register_23_~ldv_func_arg1#1.base, ldv___platform_driver_register_23_~ldv_func_arg1#1.offset, ldv___platform_driver_register_23_~ldv_func_arg2#1.base, ldv___platform_driver_register_23_~ldv_func_arg2#1.offset;havoc __platform_driver_register_#res#1;havoc __platform_driver_register_#t~nondet424#1, __platform_driver_register_~arg0#1.base, __platform_driver_register_~arg0#1.offset, __platform_driver_register_~arg1#1.base, __platform_driver_register_~arg1#1.offset;__platform_driver_register_~arg0#1.base, __platform_driver_register_~arg0#1.offset := __platform_driver_register_#in~arg0#1.base, __platform_driver_register_#in~arg0#1.offset;__platform_driver_register_~arg1#1.base, __platform_driver_register_~arg1#1.offset := __platform_driver_register_#in~arg1#1.base, __platform_driver_register_#in~arg1#1.offset;assume -2147483648 <= __platform_driver_register_#t~nondet424#1 && __platform_driver_register_#t~nondet424#1 <= 2147483647;__platform_driver_register_#res#1 := __platform_driver_register_#t~nondet424#1;havoc __platform_driver_register_#t~nondet424#1; {41453#true} is VALID [2022-02-20 22:04:13,531 INFO L290 TraceCheckUtils]: 11: Hoare triple {41453#true} ldv___platform_driver_register_23_#t~ret421#1 := __platform_driver_register_#res#1;assume { :end_inline___platform_driver_register } true;assume -2147483648 <= ldv___platform_driver_register_23_#t~ret421#1 && ldv___platform_driver_register_23_#t~ret421#1 <= 2147483647;ldv___platform_driver_register_23_~tmp~24#1 := ldv___platform_driver_register_23_#t~ret421#1;havoc ldv___platform_driver_register_23_#t~ret421#1;ldv___platform_driver_register_23_~ldv_func_res~2#1 := ldv___platform_driver_register_23_~tmp~24#1;~ldv_state_variable_3~0 := 1;assume { :begin_inline_ldv_initialize_platform_driver_3 } true;havoc ldv_initialize_platform_driver_3_#t~ret392#1.base, ldv_initialize_platform_driver_3_#t~ret392#1.offset, ldv_initialize_platform_driver_3_~tmp~19#1.base, ldv_initialize_platform_driver_3_~tmp~19#1.offset;havoc ldv_initialize_platform_driver_3_~tmp~19#1.base, ldv_initialize_platform_driver_3_~tmp~19#1.offset; {41453#true} is VALID [2022-02-20 22:04:13,531 INFO L272 TraceCheckUtils]: 12: Hoare triple {41453#true} call ldv_initialize_platform_driver_3_#t~ret392#1.base, ldv_initialize_platform_driver_3_#t~ret392#1.offset := ldv_zalloc(1464); {41453#true} is VALID [2022-02-20 22:04:13,531 INFO L290 TraceCheckUtils]: 13: Hoare triple {41453#true} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {41453#true} is VALID [2022-02-20 22:04:13,531 INFO L290 TraceCheckUtils]: 14: Hoare triple {41453#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {41453#true} is VALID [2022-02-20 22:04:13,532 INFO L290 TraceCheckUtils]: 15: Hoare triple {41453#true} assume true; {41453#true} is VALID [2022-02-20 22:04:13,532 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {41453#true} {41453#true} #1791#return; {41453#true} is VALID [2022-02-20 22:04:13,532 INFO L290 TraceCheckUtils]: 17: Hoare triple {41453#true} ldv_initialize_platform_driver_3_~tmp~19#1.base, ldv_initialize_platform_driver_3_~tmp~19#1.offset := ldv_initialize_platform_driver_3_#t~ret392#1.base, ldv_initialize_platform_driver_3_#t~ret392#1.offset;havoc ldv_initialize_platform_driver_3_#t~ret392#1.base, ldv_initialize_platform_driver_3_#t~ret392#1.offset;~snd_serial_driver_group0~0.base, ~snd_serial_driver_group0~0.offset := ldv_initialize_platform_driver_3_~tmp~19#1.base, ldv_initialize_platform_driver_3_~tmp~19#1.offset; {41453#true} is VALID [2022-02-20 22:04:13,532 INFO L290 TraceCheckUtils]: 18: Hoare triple {41453#true} assume { :end_inline_ldv_initialize_platform_driver_3 } true;ldv___platform_driver_register_23_#res#1 := ldv___platform_driver_register_23_~ldv_func_res~2#1; {41453#true} is VALID [2022-02-20 22:04:13,532 INFO L290 TraceCheckUtils]: 19: Hoare triple {41453#true} alsa_card_serial_init_#t~ret376#1 := ldv___platform_driver_register_23_#res#1;assume { :end_inline_ldv___platform_driver_register_23 } true;assume -2147483648 <= alsa_card_serial_init_#t~ret376#1 && alsa_card_serial_init_#t~ret376#1 <= 2147483647;alsa_card_serial_init_~err~3#1 := alsa_card_serial_init_#t~ret376#1;havoc alsa_card_serial_init_#t~ret376#1; {41453#true} is VALID [2022-02-20 22:04:13,532 INFO L290 TraceCheckUtils]: 20: Hoare triple {41453#true} assume !(alsa_card_serial_init_~err~3#1 < 0);alsa_card_serial_init_~cards~0#1 := 0;alsa_card_serial_init_~i~1#1 := 0; {41453#true} is VALID [2022-02-20 22:04:13,532 INFO L290 TraceCheckUtils]: 21: Hoare triple {41453#true} assume alsa_card_serial_init_~i~1#1 <= 31; {41453#true} is VALID [2022-02-20 22:04:13,532 INFO L290 TraceCheckUtils]: 22: Hoare triple {41453#true} call alsa_card_serial_init_#t~mem377#1 := read~int(~#enable~0.base, ~#enable~0.offset + alsa_card_serial_init_~i~1#1, 1); {41453#true} is VALID [2022-02-20 22:04:13,533 INFO L290 TraceCheckUtils]: 23: Hoare triple {41453#true} assume !(0 == alsa_card_serial_init_#t~mem377#1 % 256);havoc alsa_card_serial_init_#t~mem377#1;assume { :begin_inline_platform_device_register_simple } true;platform_device_register_simple_#in~name#1.base, platform_device_register_simple_#in~name#1.offset, platform_device_register_simple_#in~id___0#1, platform_device_register_simple_#in~res#1.base, platform_device_register_simple_#in~res#1.offset, platform_device_register_simple_#in~num#1 := 33, 0, alsa_card_serial_init_~i~1#1, 0, 0, 0;havoc platform_device_register_simple_#res#1.base, platform_device_register_simple_#res#1.offset;havoc platform_device_register_simple_#t~ret48#1.base, platform_device_register_simple_#t~ret48#1.offset, platform_device_register_simple_~name#1.base, platform_device_register_simple_~name#1.offset, platform_device_register_simple_~id___0#1, platform_device_register_simple_~res#1.base, platform_device_register_simple_~res#1.offset, platform_device_register_simple_~num#1, platform_device_register_simple_~tmp~7#1.base, platform_device_register_simple_~tmp~7#1.offset;platform_device_register_simple_~name#1.base, platform_device_register_simple_~name#1.offset := platform_device_register_simple_#in~name#1.base, platform_device_register_simple_#in~name#1.offset;platform_device_register_simple_~id___0#1 := platform_device_register_simple_#in~id___0#1;platform_device_register_simple_~res#1.base, platform_device_register_simple_~res#1.offset := platform_device_register_simple_#in~res#1.base, platform_device_register_simple_#in~res#1.offset;platform_device_register_simple_~num#1 := platform_device_register_simple_#in~num#1;havoc platform_device_register_simple_~tmp~7#1.base, platform_device_register_simple_~tmp~7#1.offset;assume { :begin_inline_platform_device_register_resndata } true;platform_device_register_resndata_#in~parent#1.base, platform_device_register_resndata_#in~parent#1.offset, platform_device_register_resndata_#in~name#1.base, platform_device_register_resndata_#in~name#1.offset, platform_device_register_resndata_#in~id___0#1, platform_device_register_resndata_#in~res#1.base, platform_device_register_resndata_#in~res#1.offset, platform_device_register_resndata_#in~num#1, platform_device_register_resndata_#in~data#1.base, platform_device_register_resndata_#in~data#1.offset, platform_device_register_resndata_#in~size#1 := 0, 0, platform_device_register_simple_~name#1.base, platform_device_register_simple_~name#1.offset, platform_device_register_simple_~id___0#1, platform_device_register_simple_~res#1.base, platform_device_register_simple_~res#1.offset, platform_device_register_simple_~num#1, 0, 0, 0;havoc platform_device_register_resndata_#res#1.base, platform_device_register_resndata_#res#1.offset;havoc platform_device_register_resndata_#t~ret47#1.base, platform_device_register_resndata_#t~ret47#1.offset, platform_device_register_resndata_~parent#1.base, platform_device_register_resndata_~parent#1.offset, platform_device_register_resndata_~name#1.base, platform_device_register_resndata_~name#1.offset, platform_device_register_resndata_~id___0#1, platform_device_register_resndata_~res#1.base, platform_device_register_resndata_~res#1.offset, platform_device_register_resndata_~num#1, platform_device_register_resndata_~data#1.base, platform_device_register_resndata_~data#1.offset, platform_device_register_resndata_~size#1, platform_device_register_resndata_~#pdevinfo~0#1.base, platform_device_register_resndata_~#pdevinfo~0#1.offset, platform_device_register_resndata_~tmp~6#1.base, platform_device_register_resndata_~tmp~6#1.offset;platform_device_register_resndata_~parent#1.base, platform_device_register_resndata_~parent#1.offset := platform_device_register_resndata_#in~parent#1.base, platform_device_register_resndata_#in~parent#1.offset;platform_device_register_resndata_~name#1.base, platform_device_register_resndata_~name#1.offset := platform_device_register_resndata_#in~name#1.base, platform_device_register_resndata_#in~name#1.offset;platform_device_register_resndata_~id___0#1 := platform_device_register_resndata_#in~id___0#1;platform_device_register_resndata_~res#1.base, platform_device_register_resndata_~res#1.offset := platform_device_register_resndata_#in~res#1.base, platform_device_register_resndata_#in~res#1.offset;platform_device_register_resndata_~num#1 := platform_device_register_resndata_#in~num#1;platform_device_register_resndata_~data#1.base, platform_device_register_resndata_~data#1.offset := platform_device_register_resndata_#in~data#1.base, platform_device_register_resndata_#in~data#1.offset;platform_device_register_resndata_~size#1 := platform_device_register_resndata_#in~size#1;call platform_device_register_resndata_~#pdevinfo~0#1.base, platform_device_register_resndata_~#pdevinfo~0#1.offset := #Ultimate.allocOnStack(64);havoc platform_device_register_resndata_~tmp~6#1.base, platform_device_register_resndata_~tmp~6#1.offset;call write~$Pointer$(platform_device_register_resndata_~parent#1.base, platform_device_register_resndata_~parent#1.offset, platform_device_register_resndata_~#pdevinfo~0#1.base, platform_device_register_resndata_~#pdevinfo~0#1.offset, 8);call write~$Pointer$(0, 0, platform_device_register_resndata_~#pdevinfo~0#1.base, 8 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 8);call write~$Pointer$(platform_device_register_resndata_~name#1.base, platform_device_register_resndata_~name#1.offset, platform_device_register_resndata_~#pdevinfo~0#1.base, 16 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 8);call write~int(platform_device_register_resndata_~id___0#1, platform_device_register_resndata_~#pdevinfo~0#1.base, 24 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 4);call write~$Pointer$(platform_device_register_resndata_~res#1.base, platform_device_register_resndata_~res#1.offset, platform_device_register_resndata_~#pdevinfo~0#1.base, 28 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 8);call write~int(platform_device_register_resndata_~num#1, platform_device_register_resndata_~#pdevinfo~0#1.base, 36 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 4);call write~$Pointer$(platform_device_register_resndata_~data#1.base, platform_device_register_resndata_~data#1.offset, platform_device_register_resndata_~#pdevinfo~0#1.base, 40 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 8);call write~int(platform_device_register_resndata_~size#1, platform_device_register_resndata_~#pdevinfo~0#1.base, 48 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 8);call write~int(0, platform_device_register_resndata_~#pdevinfo~0#1.base, 56 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 8);assume { :begin_inline_platform_device_register_full } true;platform_device_register_full_#in~arg0#1.base, platform_device_register_full_#in~arg0#1.offset := platform_device_register_resndata_~#pdevinfo~0#1.base, platform_device_register_resndata_~#pdevinfo~0#1.offset;havoc platform_device_register_full_#res#1.base, platform_device_register_full_#res#1.offset;havoc platform_device_register_full_#t~ret429#1.base, platform_device_register_full_#t~ret429#1.offset, platform_device_register_full_~arg0#1.base, platform_device_register_full_~arg0#1.offset;platform_device_register_full_~arg0#1.base, platform_device_register_full_~arg0#1.offset := platform_device_register_full_#in~arg0#1.base, platform_device_register_full_#in~arg0#1.offset; {41453#true} is VALID [2022-02-20 22:04:13,533 INFO L272 TraceCheckUtils]: 24: Hoare triple {41453#true} call platform_device_register_full_#t~ret429#1.base, platform_device_register_full_#t~ret429#1.offset := ldv_malloc(1386); {41453#true} is VALID [2022-02-20 22:04:13,533 INFO L290 TraceCheckUtils]: 25: Hoare triple {41453#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~1.base, ~tmp~1.offset;havoc ~tmp___0~0;assume -2147483648 <= #t~nondet27 && #t~nondet27 <= 2147483647;~tmp___0~0 := #t~nondet27;havoc #t~nondet27; {41453#true} is VALID [2022-02-20 22:04:13,533 INFO L290 TraceCheckUtils]: 26: Hoare triple {41453#true} assume 0 != ~tmp___0~0;#res.base, #res.offset := 0, 0; {41453#true} is VALID [2022-02-20 22:04:13,533 INFO L290 TraceCheckUtils]: 27: Hoare triple {41453#true} assume true; {41453#true} is VALID [2022-02-20 22:04:13,533 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {41453#true} {41453#true} #1793#return; {41453#true} is VALID [2022-02-20 22:04:13,533 INFO L290 TraceCheckUtils]: 29: Hoare triple {41453#true} platform_device_register_full_#res#1.base, platform_device_register_full_#res#1.offset := platform_device_register_full_#t~ret429#1.base, platform_device_register_full_#t~ret429#1.offset;havoc platform_device_register_full_#t~ret429#1.base, platform_device_register_full_#t~ret429#1.offset; {41453#true} is VALID [2022-02-20 22:04:13,533 INFO L290 TraceCheckUtils]: 30: Hoare triple {41453#true} platform_device_register_resndata_#t~ret47#1.base, platform_device_register_resndata_#t~ret47#1.offset := platform_device_register_full_#res#1.base, platform_device_register_full_#res#1.offset;assume { :end_inline_platform_device_register_full } true;platform_device_register_resndata_~tmp~6#1.base, platform_device_register_resndata_~tmp~6#1.offset := platform_device_register_resndata_#t~ret47#1.base, platform_device_register_resndata_#t~ret47#1.offset;havoc platform_device_register_resndata_#t~ret47#1.base, platform_device_register_resndata_#t~ret47#1.offset;platform_device_register_resndata_#res#1.base, platform_device_register_resndata_#res#1.offset := platform_device_register_resndata_~tmp~6#1.base, platform_device_register_resndata_~tmp~6#1.offset;call ULTIMATE.dealloc(platform_device_register_resndata_~#pdevinfo~0#1.base, platform_device_register_resndata_~#pdevinfo~0#1.offset);havoc platform_device_register_resndata_~#pdevinfo~0#1.base, platform_device_register_resndata_~#pdevinfo~0#1.offset; {41453#true} is VALID [2022-02-20 22:04:13,534 INFO L290 TraceCheckUtils]: 31: Hoare triple {41453#true} platform_device_register_simple_#t~ret48#1.base, platform_device_register_simple_#t~ret48#1.offset := platform_device_register_resndata_#res#1.base, platform_device_register_resndata_#res#1.offset;assume { :end_inline_platform_device_register_resndata } true;platform_device_register_simple_~tmp~7#1.base, platform_device_register_simple_~tmp~7#1.offset := platform_device_register_simple_#t~ret48#1.base, platform_device_register_simple_#t~ret48#1.offset;havoc platform_device_register_simple_#t~ret48#1.base, platform_device_register_simple_#t~ret48#1.offset;platform_device_register_simple_#res#1.base, platform_device_register_simple_#res#1.offset := platform_device_register_simple_~tmp~7#1.base, platform_device_register_simple_~tmp~7#1.offset; {41453#true} is VALID [2022-02-20 22:04:13,534 INFO L290 TraceCheckUtils]: 32: Hoare triple {41453#true} alsa_card_serial_init_#t~ret378#1.base, alsa_card_serial_init_#t~ret378#1.offset := platform_device_register_simple_#res#1.base, platform_device_register_simple_#res#1.offset;assume { :end_inline_platform_device_register_simple } true;alsa_card_serial_init_~device~0#1.base, alsa_card_serial_init_~device~0#1.offset := alsa_card_serial_init_#t~ret378#1.base, alsa_card_serial_init_#t~ret378#1.offset;havoc alsa_card_serial_init_#t~ret378#1.base, alsa_card_serial_init_#t~ret378#1.offset; {41453#true} is VALID [2022-02-20 22:04:13,534 INFO L272 TraceCheckUtils]: 33: Hoare triple {41453#true} call alsa_card_serial_init_#t~ret379#1 := IS_ERR(alsa_card_serial_init_~device~0#1.base, alsa_card_serial_init_~device~0#1.offset); {41453#true} is VALID [2022-02-20 22:04:13,534 INFO L290 TraceCheckUtils]: 34: Hoare triple {41453#true} ~ptr#1.base, ~ptr#1.offset := #in~ptr#1.base, #in~ptr#1.offset;havoc ~tmp~0#1;assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := (if (~ptr#1.base + ~ptr#1.offset) % 18446744073709551616 > 18446744073709547520 then 1 else 0), 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; {41453#true} is VALID [2022-02-20 22:04:13,534 INFO L290 TraceCheckUtils]: 35: Hoare triple {41453#true} #t~ret9#1 := ldv__builtin_expect_#res#1;assume { :end_inline_ldv__builtin_expect } true;assume -9223372036854775808 <= #t~ret9#1 && #t~ret9#1 <= 9223372036854775807;~tmp~0#1 := #t~ret9#1;havoc #t~ret9#1;#res#1 := (if 0 == (if 0 != ~tmp~0#1 then 1 else 0) then 0 else 1); {41453#true} is VALID [2022-02-20 22:04:13,534 INFO L290 TraceCheckUtils]: 36: Hoare triple {41453#true} assume true; {41453#true} is VALID [2022-02-20 22:04:13,534 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {41453#true} {41453#true} #1795#return; {41453#true} is VALID [2022-02-20 22:04:13,534 INFO L290 TraceCheckUtils]: 38: Hoare triple {41453#true} alsa_card_serial_init_~tmp~15#1 := alsa_card_serial_init_#t~ret379#1;havoc alsa_card_serial_init_#t~ret379#1; {41453#true} is VALID [2022-02-20 22:04:13,540 INFO L290 TraceCheckUtils]: 39: Hoare triple {41453#true} assume !(0 != alsa_card_serial_init_~tmp~15#1 % 256); {41453#true} is VALID [2022-02-20 22:04:13,541 INFO L272 TraceCheckUtils]: 40: Hoare triple {41453#true} call alsa_card_serial_init_#t~ret380#1.base, alsa_card_serial_init_#t~ret380#1.offset := platform_get_drvdata(alsa_card_serial_init_~device~0#1.base, alsa_card_serial_init_~device~0#1.offset); {41453#true} is VALID [2022-02-20 22:04:13,541 INFO L290 TraceCheckUtils]: 41: Hoare triple {41453#true} ~pdev#1.base, ~pdev#1.offset := #in~pdev#1.base, #in~pdev#1.offset;havoc ~tmp~8#1.base, ~tmp~8#1.offset;assume { :begin_inline_dev_get_drvdata } true;dev_get_drvdata_#in~dev#1.base, dev_get_drvdata_#in~dev#1.offset := ~pdev#1.base, 13 + ~pdev#1.offset;havoc dev_get_drvdata_#res#1.base, dev_get_drvdata_#res#1.offset;havoc dev_get_drvdata_#t~mem44#1.base, dev_get_drvdata_#t~mem44#1.offset, dev_get_drvdata_~dev#1.base, dev_get_drvdata_~dev#1.offset;dev_get_drvdata_~dev#1.base, dev_get_drvdata_~dev#1.offset := dev_get_drvdata_#in~dev#1.base, dev_get_drvdata_#in~dev#1.offset;call dev_get_drvdata_#t~mem44#1.base, dev_get_drvdata_#t~mem44#1.offset := read~$Pointer$(dev_get_drvdata_~dev#1.base, 489 + dev_get_drvdata_~dev#1.offset, 8);dev_get_drvdata_#res#1.base, dev_get_drvdata_#res#1.offset := dev_get_drvdata_#t~mem44#1.base, dev_get_drvdata_#t~mem44#1.offset;havoc dev_get_drvdata_#t~mem44#1.base, dev_get_drvdata_#t~mem44#1.offset; {41453#true} is VALID [2022-02-20 22:04:13,541 INFO L290 TraceCheckUtils]: 42: Hoare triple {41453#true} #t~ret52#1.base, #t~ret52#1.offset := dev_get_drvdata_#res#1.base, dev_get_drvdata_#res#1.offset;assume { :end_inline_dev_get_drvdata } true;~tmp~8#1.base, ~tmp~8#1.offset := #t~ret52#1.base, #t~ret52#1.offset;havoc #t~ret52#1.base, #t~ret52#1.offset;#res#1.base, #res#1.offset := ~tmp~8#1.base, ~tmp~8#1.offset; {41453#true} is VALID [2022-02-20 22:04:13,541 INFO L290 TraceCheckUtils]: 43: Hoare triple {41453#true} assume true; {41453#true} is VALID [2022-02-20 22:04:13,541 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {41453#true} {41453#true} #1797#return; {41453#true} is VALID [2022-02-20 22:04:13,542 INFO L290 TraceCheckUtils]: 45: Hoare triple {41453#true} alsa_card_serial_init_~tmp___0~5#1.base, alsa_card_serial_init_~tmp___0~5#1.offset := alsa_card_serial_init_#t~ret380#1.base, alsa_card_serial_init_#t~ret380#1.offset;havoc alsa_card_serial_init_#t~ret380#1.base, alsa_card_serial_init_#t~ret380#1.offset; {41453#true} is VALID [2022-02-20 22:04:13,542 INFO L290 TraceCheckUtils]: 46: Hoare triple {41453#true} assume !(0 == (alsa_card_serial_init_~tmp___0~5#1.base + alsa_card_serial_init_~tmp___0~5#1.offset) % 18446744073709551616);call write~$Pointer$(alsa_card_serial_init_~device~0#1.base, alsa_card_serial_init_~device~0#1.offset, ~#devices~0.base, ~#devices~0.offset + 8 * alsa_card_serial_init_~i~1#1, 8);alsa_card_serial_init_~cards~0#1 := 1 + alsa_card_serial_init_~cards~0#1; {41453#true} is VALID [2022-02-20 22:04:13,542 INFO L290 TraceCheckUtils]: 47: Hoare triple {41453#true} alsa_card_serial_init_~i~1#1 := 1 + alsa_card_serial_init_~i~1#1; {41453#true} is VALID [2022-02-20 22:04:13,542 INFO L290 TraceCheckUtils]: 48: Hoare triple {41453#true} assume !(alsa_card_serial_init_~i~1#1 <= 31); {41453#true} is VALID [2022-02-20 22:04:13,542 INFO L290 TraceCheckUtils]: 49: Hoare triple {41453#true} assume !(0 == alsa_card_serial_init_~cards~0#1);alsa_card_serial_init_#res#1 := 0; {41453#true} is VALID [2022-02-20 22:04:13,542 INFO L290 TraceCheckUtils]: 50: Hoare triple {41453#true} main_#t~ret409#1 := alsa_card_serial_init_#res#1;assume { :end_inline_alsa_card_serial_init } true;assume -2147483648 <= main_#t~ret409#1 && main_#t~ret409#1 <= 2147483647;~ldv_retval_2~0 := main_#t~ret409#1;havoc main_#t~ret409#1; {41453#true} is VALID [2022-02-20 22:04:13,542 INFO L290 TraceCheckUtils]: 51: Hoare triple {41453#true} assume !(0 != ~ldv_retval_2~0); {41453#true} is VALID [2022-02-20 22:04:13,542 INFO L290 TraceCheckUtils]: 52: Hoare triple {41453#true} assume 0 == ~ldv_retval_2~0;~ldv_state_variable_0~0 := 2;~ldv_state_variable_5~0 := 1;assume { :begin_inline_ldv_initialize_snd_rawmidi_ops_5 } true;havoc ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.base, ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.offset, ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.base, ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.offset;havoc ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.base, ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.offset; {41453#true} is VALID [2022-02-20 22:04:13,543 INFO L272 TraceCheckUtils]: 53: Hoare triple {41453#true} call ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.base, ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.offset := ldv_zalloc(112); {41453#true} is VALID [2022-02-20 22:04:13,543 INFO L290 TraceCheckUtils]: 54: Hoare triple {41453#true} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {41453#true} is VALID [2022-02-20 22:04:13,543 INFO L290 TraceCheckUtils]: 55: Hoare triple {41453#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {41453#true} is VALID [2022-02-20 22:04:13,543 INFO L290 TraceCheckUtils]: 56: Hoare triple {41453#true} assume true; {41453#true} is VALID [2022-02-20 22:04:13,543 INFO L284 TraceCheckUtils]: 57: Hoare quadruple {41453#true} {41453#true} #1803#return; {41453#true} is VALID [2022-02-20 22:04:13,543 INFO L290 TraceCheckUtils]: 58: Hoare triple {41453#true} ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.base, ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.offset := ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.base, ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.offset;havoc ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.base, ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.offset;~snd_uart16550_output_group0~0.base, ~snd_uart16550_output_group0~0.offset := ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.base, ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.offset; {41453#true} is VALID [2022-02-20 22:04:13,543 INFO L290 TraceCheckUtils]: 59: Hoare triple {41453#true} assume { :end_inline_ldv_initialize_snd_rawmidi_ops_5 } true;~ldv_state_variable_4~0 := 1;assume { :begin_inline_ldv_initialize_snd_rawmidi_ops_4 } true;havoc ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.base, ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.offset, ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.base, ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.offset;havoc ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.base, ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.offset; {41453#true} is VALID [2022-02-20 22:04:13,543 INFO L272 TraceCheckUtils]: 60: Hoare triple {41453#true} call ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.base, ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.offset := ldv_zalloc(112); {41453#true} is VALID [2022-02-20 22:04:13,544 INFO L290 TraceCheckUtils]: 61: Hoare triple {41453#true} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {41453#true} is VALID [2022-02-20 22:04:13,544 INFO L290 TraceCheckUtils]: 62: Hoare triple {41453#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {41453#true} is VALID [2022-02-20 22:04:13,544 INFO L290 TraceCheckUtils]: 63: Hoare triple {41453#true} assume true; {41453#true} is VALID [2022-02-20 22:04:13,544 INFO L284 TraceCheckUtils]: 64: Hoare quadruple {41453#true} {41453#true} #1805#return; {41453#true} is VALID [2022-02-20 22:04:13,544 INFO L290 TraceCheckUtils]: 65: Hoare triple {41453#true} ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.base, ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.offset := ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.base, ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.offset;havoc ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.base, ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.offset;~snd_uart16550_input_group0~0.base, ~snd_uart16550_input_group0~0.offset := ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.base, ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.offset; {41453#true} is VALID [2022-02-20 22:04:13,544 INFO L290 TraceCheckUtils]: 66: Hoare triple {41453#true} assume { :end_inline_ldv_initialize_snd_rawmidi_ops_4 } true; {41453#true} is VALID [2022-02-20 22:04:13,545 INFO L290 TraceCheckUtils]: 67: Hoare triple {41453#true} assume -2147483648 <= main_#t~nondet401#1 && main_#t~nondet401#1 <= 2147483647;main_~tmp___1~2#1 := main_#t~nondet401#1;havoc main_#t~nondet401#1;main_#t~switch402#1 := 0 == main_~tmp___1~2#1; {41453#true} is VALID [2022-02-20 22:04:13,545 INFO L290 TraceCheckUtils]: 68: Hoare triple {41453#true} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 1 == main_~tmp___1~2#1; {41453#true} is VALID [2022-02-20 22:04:13,545 INFO L290 TraceCheckUtils]: 69: Hoare triple {41453#true} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 2 == main_~tmp___1~2#1; {41453#true} is VALID [2022-02-20 22:04:13,545 INFO L290 TraceCheckUtils]: 70: Hoare triple {41453#true} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 3 == main_~tmp___1~2#1; {41453#true} is VALID [2022-02-20 22:04:13,545 INFO L290 TraceCheckUtils]: 71: Hoare triple {41453#true} assume main_#t~switch402#1; {41453#true} is VALID [2022-02-20 22:04:13,546 INFO L290 TraceCheckUtils]: 72: Hoare triple {41453#true} assume 0 != ~ldv_state_variable_3~0;assume -2147483648 <= main_#t~nondet410#1 && main_#t~nondet410#1 <= 2147483647;main_~tmp___4~0#1 := main_#t~nondet410#1;havoc main_#t~nondet410#1;main_#t~switch411#1 := 0 == main_~tmp___4~0#1; {41453#true} is VALID [2022-02-20 22:04:13,546 INFO L290 TraceCheckUtils]: 73: Hoare triple {41453#true} assume main_#t~switch411#1; {41453#true} is VALID [2022-02-20 22:04:13,546 INFO L290 TraceCheckUtils]: 74: Hoare triple {41453#true} assume 1 == ~ldv_state_variable_3~0;assume { :begin_inline_snd_serial_probe } true;snd_serial_probe_#in~devptr#1.base, snd_serial_probe_#in~devptr#1.offset := ~snd_serial_driver_group0~0.base, ~snd_serial_driver_group0~0.offset;havoc snd_serial_probe_#res#1;havoc snd_serial_probe_#t~mem326#1, snd_serial_probe_#t~mem327#1, snd_serial_probe_#t~switch328#1, snd_serial_probe_#t~mem329#1, snd_serial_probe_#t~mem330#1, snd_serial_probe_#t~mem331#1, snd_serial_probe_#t~short332#1, snd_serial_probe_#t~mem333#1, snd_serial_probe_#t~mem334#1, snd_serial_probe_#t~mem335#1, snd_serial_probe_#t~short336#1, snd_serial_probe_#t~mem337#1, snd_serial_probe_#t~mem338#1, snd_serial_probe_#t~mem339#1.base, snd_serial_probe_#t~mem339#1.offset, snd_serial_probe_#t~ret340#1, snd_serial_probe_#t~mem341#1.base, snd_serial_probe_#t~mem341#1.offset, snd_serial_probe_#t~strcpy~res342#1.base, snd_serial_probe_#t~strcpy~res342#1.offset, snd_serial_probe_#t~mem343#1.base, snd_serial_probe_#t~mem343#1.offset, snd_serial_probe_#t~strcpy~res344#1.base, snd_serial_probe_#t~strcpy~res344#1.offset, snd_serial_probe_#t~mem345#1.base, snd_serial_probe_#t~mem345#1.offset, snd_serial_probe_#t~mem346#1, snd_serial_probe_#t~mem347#1, snd_serial_probe_#t~mem348#1, snd_serial_probe_#t~mem349#1, snd_serial_probe_#t~mem350#1, snd_serial_probe_#t~mem351#1, snd_serial_probe_#t~ret352#1, snd_serial_probe_#t~mem353#1.base, snd_serial_probe_#t~mem353#1.offset, snd_serial_probe_#t~mem354#1, snd_serial_probe_#t~mem355#1, snd_serial_probe_#t~mem356#1.base, snd_serial_probe_#t~mem356#1.offset, snd_serial_probe_#t~ret357#1, snd_serial_probe_#t~nondet358#1, snd_serial_probe_#t~mem359#1.base, snd_serial_probe_#t~mem359#1.offset, snd_serial_probe_#t~mem360#1.base, snd_serial_probe_#t~mem360#1.offset, snd_serial_probe_#t~mem361#1.base, snd_serial_probe_#t~mem361#1.offset, snd_serial_probe_#t~mem362#1, snd_serial_probe_#t~mem363#1.base, snd_serial_probe_#t~mem363#1.offset, snd_serial_probe_#t~mem364#1.base, snd_serial_probe_#t~mem364#1.offset, snd_serial_probe_#t~mem365#1, snd_serial_probe_#t~mem366#1.base, snd_serial_probe_#t~mem366#1.offset, snd_serial_probe_#t~mem367#1, snd_serial_probe_#t~mem368#1.base, snd_serial_probe_#t~mem368#1.offset, snd_serial_probe_#t~ret369#1, snd_serial_probe_#t~mem370#1.base, snd_serial_probe_#t~mem370#1.offset, snd_serial_probe_#t~mem371#1.base, snd_serial_probe_#t~mem371#1.offset, snd_serial_probe_#t~ret372#1, snd_serial_probe_~devptr#1.base, snd_serial_probe_~devptr#1.offset, snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset, snd_serial_probe_~#uart~11#1.base, snd_serial_probe_~#uart~11#1.offset, snd_serial_probe_~err~2#1, snd_serial_probe_~dev~0#1;snd_serial_probe_~devptr#1.base, snd_serial_probe_~devptr#1.offset := snd_serial_probe_#in~devptr#1.base, snd_serial_probe_#in~devptr#1.offset;call snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset := #Ultimate.allocOnStack(8);call snd_serial_probe_~#uart~11#1.base, snd_serial_probe_~#uart~11#1.offset := #Ultimate.allocOnStack(8);havoc snd_serial_probe_~err~2#1;havoc snd_serial_probe_~dev~0#1;call snd_serial_probe_#t~mem326#1 := read~int(snd_serial_probe_~devptr#1.base, 8 + snd_serial_probe_~devptr#1.offset, 4);snd_serial_probe_~dev~0#1 := snd_serial_probe_#t~mem326#1;havoc snd_serial_probe_#t~mem326#1;call snd_serial_probe_#t~mem327#1 := read~int(~#adaptor~0.base, ~#adaptor~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);snd_serial_probe_#t~switch328#1 := 0 == snd_serial_probe_#t~mem327#1; {41453#true} is VALID [2022-02-20 22:04:13,546 INFO L290 TraceCheckUtils]: 75: Hoare triple {41453#true} assume snd_serial_probe_#t~switch328#1;call write~int(1, ~#ins~0.base, ~#ins~0.offset + 4 * snd_serial_probe_~dev~0#1, 4); {41453#true} is VALID [2022-02-20 22:04:13,546 INFO L290 TraceCheckUtils]: 76: Hoare triple {41453#true} call snd_serial_probe_#t~mem330#1 := read~int(~#outs~0.base, ~#outs~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);snd_serial_probe_#t~short332#1 := snd_serial_probe_#t~mem330#1 <= 0; {41453#true} is VALID [2022-02-20 22:04:13,546 INFO L290 TraceCheckUtils]: 77: Hoare triple {41453#true} assume !snd_serial_probe_#t~short332#1;call snd_serial_probe_#t~mem331#1 := read~int(~#outs~0.base, ~#outs~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);snd_serial_probe_#t~short332#1 := snd_serial_probe_#t~mem331#1 > 16; {41453#true} is VALID [2022-02-20 22:04:13,546 INFO L290 TraceCheckUtils]: 78: Hoare triple {41453#true} assume !snd_serial_probe_#t~short332#1;havoc snd_serial_probe_#t~mem330#1;havoc snd_serial_probe_#t~mem331#1;havoc snd_serial_probe_#t~short332#1;call snd_serial_probe_#t~mem334#1 := read~int(~#ins~0.base, ~#ins~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);snd_serial_probe_#t~short336#1 := snd_serial_probe_#t~mem334#1 <= 0; {41453#true} is VALID [2022-02-20 22:04:13,547 INFO L290 TraceCheckUtils]: 79: Hoare triple {41453#true} assume snd_serial_probe_#t~short336#1; {41734#|ULTIMATE.start_snd_serial_probe_#t~short336#1|} is VALID [2022-02-20 22:04:13,547 INFO L290 TraceCheckUtils]: 80: Hoare triple {41734#|ULTIMATE.start_snd_serial_probe_#t~short336#1|} assume !snd_serial_probe_#t~short336#1;havoc snd_serial_probe_#t~mem334#1;havoc snd_serial_probe_#t~mem335#1;havoc snd_serial_probe_#t~short336#1;call snd_serial_probe_#t~mem338#1 := read~int(~#index~0.base, ~#index~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem339#1.base, snd_serial_probe_#t~mem339#1.offset := read~$Pointer$(~#id~0.base, ~#id~0.offset + 8 * snd_serial_probe_~dev~0#1, 8);assume { :begin_inline_snd_card_new } true;snd_card_new_#in~arg0#1.base, snd_card_new_#in~arg0#1.offset, snd_card_new_#in~arg1#1, snd_card_new_#in~arg2#1.base, snd_card_new_#in~arg2#1.offset, snd_card_new_#in~arg3#1.base, snd_card_new_#in~arg3#1.offset, snd_card_new_#in~arg4#1, snd_card_new_#in~arg5#1.base, snd_card_new_#in~arg5#1.offset := snd_serial_probe_~devptr#1.base, 13 + snd_serial_probe_~devptr#1.offset, snd_serial_probe_#t~mem338#1, snd_serial_probe_#t~mem339#1.base, snd_serial_probe_#t~mem339#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 0, snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset;havoc snd_card_new_#res#1;havoc snd_card_new_#t~nondet433#1, snd_card_new_~arg0#1.base, snd_card_new_~arg0#1.offset, snd_card_new_~arg1#1, snd_card_new_~arg2#1.base, snd_card_new_~arg2#1.offset, snd_card_new_~arg3#1.base, snd_card_new_~arg3#1.offset, snd_card_new_~arg4#1, snd_card_new_~arg5#1.base, snd_card_new_~arg5#1.offset;snd_card_new_~arg0#1.base, snd_card_new_~arg0#1.offset := snd_card_new_#in~arg0#1.base, snd_card_new_#in~arg0#1.offset;snd_card_new_~arg1#1 := snd_card_new_#in~arg1#1;snd_card_new_~arg2#1.base, snd_card_new_~arg2#1.offset := snd_card_new_#in~arg2#1.base, snd_card_new_#in~arg2#1.offset;snd_card_new_~arg3#1.base, snd_card_new_~arg3#1.offset := snd_card_new_#in~arg3#1.base, snd_card_new_#in~arg3#1.offset;snd_card_new_~arg4#1 := snd_card_new_#in~arg4#1;snd_card_new_~arg5#1.base, snd_card_new_~arg5#1.offset := snd_card_new_#in~arg5#1.base, snd_card_new_#in~arg5#1.offset;assume -2147483648 <= snd_card_new_#t~nondet433#1 && snd_card_new_#t~nondet433#1 <= 2147483647;snd_card_new_#res#1 := snd_card_new_#t~nondet433#1;havoc snd_card_new_#t~nondet433#1; {41454#false} is VALID [2022-02-20 22:04:13,547 INFO L290 TraceCheckUtils]: 81: Hoare triple {41454#false} snd_serial_probe_#t~ret340#1 := snd_card_new_#res#1;assume { :end_inline_snd_card_new } true;assume -2147483648 <= snd_serial_probe_#t~ret340#1 && snd_serial_probe_#t~ret340#1 <= 2147483647;snd_serial_probe_~err~2#1 := snd_serial_probe_#t~ret340#1;havoc snd_serial_probe_#t~mem338#1;havoc snd_serial_probe_#t~mem339#1.base, snd_serial_probe_#t~mem339#1.offset;havoc snd_serial_probe_#t~ret340#1; {41454#false} is VALID [2022-02-20 22:04:13,547 INFO L290 TraceCheckUtils]: 82: Hoare triple {41454#false} assume !(snd_serial_probe_~err~2#1 < 0);call snd_serial_probe_#t~mem341#1.base, snd_serial_probe_#t~mem341#1.offset := read~$Pointer$(snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset, 8); {41454#false} is VALID [2022-02-20 22:04:13,548 INFO L272 TraceCheckUtils]: 83: Hoare triple {41454#false} call snd_serial_probe_#t~strcpy~res342#1.base, snd_serial_probe_#t~strcpy~res342#1.offset := #Ultimate.C_strcpy(snd_serial_probe_#t~mem341#1.base, 20 + snd_serial_probe_#t~mem341#1.offset, 29, 0); {41454#false} is VALID [2022-02-20 22:04:13,548 INFO L290 TraceCheckUtils]: 84: Hoare triple {41454#false} #t~offset444 := 0; {41454#false} is VALID [2022-02-20 22:04:13,548 INFO L290 TraceCheckUtils]: 85: Hoare triple {41454#false} call #t~mem445 := read~int(src.base, src.offset + #t~offset444, 1);call write~unchecked~int(#t~mem445, dest.base, dest.offset + #t~offset444, 1); {41454#false} is VALID [2022-02-20 22:04:13,548 INFO L290 TraceCheckUtils]: 86: Hoare triple {41454#false} assume 0 == #t~mem445; {41454#false} is VALID [2022-02-20 22:04:13,548 INFO L290 TraceCheckUtils]: 87: Hoare triple {41454#false} assume #res.base == dest.base && #res.offset == dest.offset; {41454#false} is VALID [2022-02-20 22:04:13,548 INFO L284 TraceCheckUtils]: 88: Hoare quadruple {41454#false} {41454#false} #1809#return; {41454#false} is VALID [2022-02-20 22:04:13,548 INFO L290 TraceCheckUtils]: 89: Hoare triple {41454#false} havoc snd_serial_probe_#t~mem341#1.base, snd_serial_probe_#t~mem341#1.offset;havoc snd_serial_probe_#t~strcpy~res342#1.base, snd_serial_probe_#t~strcpy~res342#1.offset;call snd_serial_probe_#t~mem343#1.base, snd_serial_probe_#t~mem343#1.offset := read~$Pointer$(snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset, 8); {41454#false} is VALID [2022-02-20 22:04:13,549 INFO L272 TraceCheckUtils]: 90: Hoare triple {41454#false} call snd_serial_probe_#t~strcpy~res344#1.base, snd_serial_probe_#t~strcpy~res344#1.offset := #Ultimate.C_strcpy(snd_serial_probe_#t~mem343#1.base, 36 + snd_serial_probe_#t~mem343#1.offset, 30, 0); {41454#false} is VALID [2022-02-20 22:04:13,549 INFO L290 TraceCheckUtils]: 91: Hoare triple {41454#false} #t~offset444 := 0; {41454#false} is VALID [2022-02-20 22:04:13,549 INFO L290 TraceCheckUtils]: 92: Hoare triple {41454#false} call #t~mem445 := read~int(src.base, src.offset + #t~offset444, 1);call write~unchecked~int(#t~mem445, dest.base, dest.offset + #t~offset444, 1); {41454#false} is VALID [2022-02-20 22:04:13,550 INFO L290 TraceCheckUtils]: 93: Hoare triple {41454#false} assume 0 == #t~mem445; {41454#false} is VALID [2022-02-20 22:04:13,550 INFO L290 TraceCheckUtils]: 94: Hoare triple {41454#false} assume #res.base == dest.base && #res.offset == dest.offset; {41454#false} is VALID [2022-02-20 22:04:13,550 INFO L284 TraceCheckUtils]: 95: Hoare quadruple {41454#false} {41454#false} #1811#return; {41454#false} is VALID [2022-02-20 22:04:13,550 INFO L290 TraceCheckUtils]: 96: Hoare triple {41454#false} havoc snd_serial_probe_#t~mem343#1.base, snd_serial_probe_#t~mem343#1.offset;havoc snd_serial_probe_#t~strcpy~res344#1.base, snd_serial_probe_#t~strcpy~res344#1.offset;call snd_serial_probe_#t~mem345#1.base, snd_serial_probe_#t~mem345#1.offset := read~$Pointer$(snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset, 8);call snd_serial_probe_#t~mem346#1 := read~int(~#port~0.base, ~#port~0.offset + 8 * snd_serial_probe_~dev~0#1, 8);call snd_serial_probe_#t~mem347#1 := read~int(~#irq~0.base, ~#irq~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem348#1 := read~int(~#speed~0.base, ~#speed~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem349#1 := read~int(~#base~0.base, ~#base~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem350#1 := read~int(~#adaptor~0.base, ~#adaptor~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem351#1 := read~int(~#droponfull~0.base, ~#droponfull~0.offset + snd_serial_probe_~dev~0#1, 1);assume { :begin_inline_snd_uart16550_create } true;snd_uart16550_create_#in~card#1.base, snd_uart16550_create_#in~card#1.offset, snd_uart16550_create_#in~iobase#1, snd_uart16550_create_#in~irq___0#1, snd_uart16550_create_#in~speed___0#1, snd_uart16550_create_#in~base___0#1, snd_uart16550_create_#in~adaptor___0#1, snd_uart16550_create_#in~droponfull___0#1, snd_uart16550_create_#in~ruart#1.base, snd_uart16550_create_#in~ruart#1.offset := snd_serial_probe_#t~mem345#1.base, snd_serial_probe_#t~mem345#1.offset, snd_serial_probe_#t~mem346#1, snd_serial_probe_#t~mem347#1, snd_serial_probe_#t~mem348#1, snd_serial_probe_#t~mem349#1, snd_serial_probe_#t~mem350#1, snd_serial_probe_#t~mem351#1 % 256, snd_serial_probe_~#uart~11#1.base, snd_serial_probe_~#uart~11#1.offset;havoc snd_uart16550_create_#res#1;havoc snd_uart16550_create_#t~ret296#1.base, snd_uart16550_create_#t~ret296#1.offset, snd_uart16550_create_#t~ret297#1.base, snd_uart16550_create_#t~ret297#1.offset, snd_uart16550_create_#t~ret298#1, snd_uart16550_create_#t~nondet299#1, snd_uart16550_create_#t~ret300#1, snd_uart16550_create_#t~ret301#1, snd_uart16550_create_#t~mem302#1, snd_uart16550_create_#t~memset~res303#1.base, snd_uart16550_create_#t~memset~res303#1.offset, snd_uart16550_create_#t~ret304#1, snd_uart16550_create_#t~ret305#1, snd_uart16550_create_#t~ret306#1, snd_uart16550_create_#t~mem307#1, snd_uart16550_create_#t~switch308#1, snd_uart16550_create_#t~mem309#1, snd_uart16550_create_#t~mem310#1, snd_uart16550_create_~card#1.base, snd_uart16550_create_~card#1.offset, snd_uart16550_create_~iobase#1, snd_uart16550_create_~irq___0#1, snd_uart16550_create_~speed___0#1, snd_uart16550_create_~base___0#1, snd_uart16550_create_~adaptor___0#1, snd_uart16550_create_~droponfull___0#1, snd_uart16550_create_~ruart#1.base, snd_uart16550_create_~ruart#1.offset, snd_uart16550_create_~#ops~0#1.base, snd_uart16550_create_~#ops~0#1.offset, snd_uart16550_create_~uart~10#1.base, snd_uart16550_create_~uart~10#1.offset, snd_uart16550_create_~err~0#1, snd_uart16550_create_~tmp~13#1.base, snd_uart16550_create_~tmp~13#1.offset, snd_uart16550_create_~#__key~0#1.base, snd_uart16550_create_~#__key~0#1.offset, snd_uart16550_create_~tmp___0~4#1;snd_uart16550_create_~card#1.base, snd_uart16550_create_~card#1.offset := snd_uart16550_create_#in~card#1.base, snd_uart16550_create_#in~card#1.offset;snd_uart16550_create_~iobase#1 := snd_uart16550_create_#in~iobase#1;snd_uart16550_create_~irq___0#1 := snd_uart16550_create_#in~irq___0#1;snd_uart16550_create_~speed___0#1 := snd_uart16550_create_#in~speed___0#1;snd_uart16550_create_~base___0#1 := snd_uart16550_create_#in~base___0#1;snd_uart16550_create_~adaptor___0#1 := snd_uart16550_create_#in~adaptor___0#1;snd_uart16550_create_~droponfull___0#1 := snd_uart16550_create_#in~droponfull___0#1;snd_uart16550_create_~ruart#1.base, snd_uart16550_create_~ruart#1.offset := snd_uart16550_create_#in~ruart#1.base, snd_uart16550_create_#in~ruart#1.offset;call snd_uart16550_create_~#ops~0#1.base, snd_uart16550_create_~#ops~0#1.offset := #Ultimate.allocOnStack(24);havoc snd_uart16550_create_~uart~10#1.base, snd_uart16550_create_~uart~10#1.offset;havoc snd_uart16550_create_~err~0#1;havoc snd_uart16550_create_~tmp~13#1.base, snd_uart16550_create_~tmp~13#1.offset;call snd_uart16550_create_~#__key~0#1.base, snd_uart16550_create_~#__key~0#1.offset := #Ultimate.allocOnStack(8);havoc snd_uart16550_create_~tmp___0~4#1;call write~$Pointer$(#funAddr~snd_uart16550_dev_free.base, #funAddr~snd_uart16550_dev_free.offset, snd_uart16550_create_~#ops~0#1.base, snd_uart16550_create_~#ops~0#1.offset, 8);call write~$Pointer$(0, 0, snd_uart16550_create_~#ops~0#1.base, 8 + snd_uart16550_create_~#ops~0#1.offset, 8);call write~$Pointer$(0, 0, snd_uart16550_create_~#ops~0#1.base, 16 + snd_uart16550_create_~#ops~0#1.offset, 8);assume { :begin_inline_kzalloc } true;kzalloc_#in~size#1, kzalloc_#in~flags#1 := 33344, 208;havoc kzalloc_#res#1.base, kzalloc_#res#1.offset;havoc kzalloc_~size#1, kzalloc_~flags#1;kzalloc_~size#1 := kzalloc_#in~size#1;kzalloc_~flags#1 := kzalloc_#in~flags#1;assume { :begin_inline_ldv_check_alloc_flags } true;ldv_check_alloc_flags_#in~flags#1 := kzalloc_~flags#1;havoc ldv_check_alloc_flags_~flags#1;ldv_check_alloc_flags_~flags#1 := ldv_check_alloc_flags_#in~flags#1; {41454#false} is VALID [2022-02-20 22:04:13,550 INFO L290 TraceCheckUtils]: 97: Hoare triple {41454#false} assume !(0 == ~ldv_spin~0 || 0 == (if 0 == ldv_check_alloc_flags_~flags#1 then 0 else (if 1 == ldv_check_alloc_flags_~flags#1 then 0 else ~bitwiseAnd(ldv_check_alloc_flags_~flags#1, 16))) % 4294967296); {41454#false} is VALID [2022-02-20 22:04:13,550 INFO L272 TraceCheckUtils]: 98: Hoare triple {41454#false} call ldv_error(); {41454#false} is VALID [2022-02-20 22:04:13,550 INFO L290 TraceCheckUtils]: 99: Hoare triple {41454#false} assume !false; {41454#false} is VALID [2022-02-20 22:04:13,551 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2022-02-20 22:04:13,551 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-02-20 22:04:13,551 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1978959484] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:04:13,551 INFO L191 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-02-20 22:04:13,551 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [7] total 8 [2022-02-20 22:04:13,551 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [900535910] [2022-02-20 22:04:13,551 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:04:13,553 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 23.333333333333332) internal successors, (70), 3 states have internal predecessors, (70), 2 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 100 [2022-02-20 22:04:13,553 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:04:13,553 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 23.333333333333332) internal successors, (70), 3 states have internal predecessors, (70), 2 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2022-02-20 22:04:13,615 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 87 edges. 87 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:04:13,615 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-02-20 22:04:13,615 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:04:13,616 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-02-20 22:04:13,616 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-02-20 22:04:13,616 INFO L87 Difference]: Start difference. First operand 1060 states and 1521 transitions. Second operand has 3 states, 3 states have (on average 23.333333333333332) internal successors, (70), 3 states have internal predecessors, (70), 2 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2022-02-20 22:04:14,759 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:04:14,759 INFO L93 Difference]: Finished difference Result 2118 states and 3041 transitions. [2022-02-20 22:04:14,759 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-02-20 22:04:14,759 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 23.333333333333332) internal successors, (70), 3 states have internal predecessors, (70), 2 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 100 [2022-02-20 22:04:14,760 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 22:04:14,761 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 23.333333333333332) internal successors, (70), 3 states have internal predecessors, (70), 2 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2022-02-20 22:04:14,777 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 1799 transitions. [2022-02-20 22:04:14,777 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 23.333333333333332) internal successors, (70), 3 states have internal predecessors, (70), 2 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2022-02-20 22:04:14,792 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 1799 transitions. [2022-02-20 22:04:14,792 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 1799 transitions. [2022-02-20 22:04:15,729 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 1799 edges. 1799 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:04:15,777 INFO L225 Difference]: With dead ends: 2118 [2022-02-20 22:04:15,777 INFO L226 Difference]: Without dead ends: 1061 [2022-02-20 22:04:15,779 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 119 GetRequests, 113 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-02-20 22:04:15,780 INFO L933 BasicCegarLoop]: 899 mSDtfsCounter, 0 mSDsluCounter, 894 mSDsCounter, 0 mSdLazyCounter, 6 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1793 SdHoareTripleChecker+Invalid, 6 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 6 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-02-20 22:04:15,780 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [0 Valid, 1793 Invalid, 6 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 6 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-02-20 22:04:15,782 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1061 states. [2022-02-20 22:04:15,800 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1061 to 1061. [2022-02-20 22:04:15,800 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 22:04:15,802 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1061 states. Second operand has 1061 states, 798 states have (on average 1.3721804511278195) internal successors, (1095), 818 states have internal predecessors, (1095), 214 states have call successors, (214), 49 states have call predecessors, (214), 48 states have return successors, (213), 213 states have call predecessors, (213), 213 states have call successors, (213) [2022-02-20 22:04:15,803 INFO L74 IsIncluded]: Start isIncluded. First operand 1061 states. Second operand has 1061 states, 798 states have (on average 1.3721804511278195) internal successors, (1095), 818 states have internal predecessors, (1095), 214 states have call successors, (214), 49 states have call predecessors, (214), 48 states have return successors, (213), 213 states have call predecessors, (213), 213 states have call successors, (213) [2022-02-20 22:04:15,804 INFO L87 Difference]: Start difference. First operand 1061 states. Second operand has 1061 states, 798 states have (on average 1.3721804511278195) internal successors, (1095), 818 states have internal predecessors, (1095), 214 states have call successors, (214), 49 states have call predecessors, (214), 48 states have return successors, (213), 213 states have call predecessors, (213), 213 states have call successors, (213) [2022-02-20 22:04:15,839 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:04:15,839 INFO L93 Difference]: Finished difference Result 1061 states and 1522 transitions. [2022-02-20 22:04:15,839 INFO L276 IsEmpty]: Start isEmpty. Operand 1061 states and 1522 transitions. [2022-02-20 22:04:15,841 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:04:15,841 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:04:15,843 INFO L74 IsIncluded]: Start isIncluded. First operand has 1061 states, 798 states have (on average 1.3721804511278195) internal successors, (1095), 818 states have internal predecessors, (1095), 214 states have call successors, (214), 49 states have call predecessors, (214), 48 states have return successors, (213), 213 states have call predecessors, (213), 213 states have call successors, (213) Second operand 1061 states. [2022-02-20 22:04:15,844 INFO L87 Difference]: Start difference. First operand has 1061 states, 798 states have (on average 1.3721804511278195) internal successors, (1095), 818 states have internal predecessors, (1095), 214 states have call successors, (214), 49 states have call predecessors, (214), 48 states have return successors, (213), 213 states have call predecessors, (213), 213 states have call successors, (213) Second operand 1061 states. [2022-02-20 22:04:15,879 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:04:15,879 INFO L93 Difference]: Finished difference Result 1061 states and 1522 transitions. [2022-02-20 22:04:15,879 INFO L276 IsEmpty]: Start isEmpty. Operand 1061 states and 1522 transitions. [2022-02-20 22:04:15,881 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:04:15,882 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:04:15,882 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 22:04:15,882 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 22:04:15,883 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1061 states, 798 states have (on average 1.3721804511278195) internal successors, (1095), 818 states have internal predecessors, (1095), 214 states have call successors, (214), 49 states have call predecessors, (214), 48 states have return successors, (213), 213 states have call predecessors, (213), 213 states have call successors, (213) [2022-02-20 22:04:15,932 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1061 states to 1061 states and 1522 transitions. [2022-02-20 22:04:15,932 INFO L78 Accepts]: Start accepts. Automaton has 1061 states and 1522 transitions. Word has length 100 [2022-02-20 22:04:15,933 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 22:04:15,933 INFO L470 AbstractCegarLoop]: Abstraction has 1061 states and 1522 transitions. [2022-02-20 22:04:15,933 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 23.333333333333332) internal successors, (70), 3 states have internal predecessors, (70), 2 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2022-02-20 22:04:15,933 INFO L276 IsEmpty]: Start isEmpty. Operand 1061 states and 1522 transitions. [2022-02-20 22:04:15,936 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2022-02-20 22:04:15,936 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:04:15,936 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:04:15,966 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-02-20 22:04:16,151 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable6 [2022-02-20 22:04:16,152 INFO L402 AbstractCegarLoop]: === Iteration 8 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:04:16,152 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:04:16,152 INFO L85 PathProgramCache]: Analyzing trace with hash 349842634, now seen corresponding path program 1 times [2022-02-20 22:04:16,152 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:04:16,152 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [835341413] [2022-02-20 22:04:16,152 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:04:16,152 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:04:16,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:04:16,288 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 12 [2022-02-20 22:04:16,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:04:16,295 INFO L290 TraceCheckUtils]: 0: Hoare triple {48308#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {48270#true} is VALID [2022-02-20 22:04:16,295 INFO L290 TraceCheckUtils]: 1: Hoare triple {48270#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {48270#true} is VALID [2022-02-20 22:04:16,295 INFO L290 TraceCheckUtils]: 2: Hoare triple {48270#true} assume true; {48270#true} is VALID [2022-02-20 22:04:16,295 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {48270#true} {48270#true} #1791#return; {48270#true} is VALID [2022-02-20 22:04:16,301 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 24 [2022-02-20 22:04:16,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:04:16,307 INFO L290 TraceCheckUtils]: 0: Hoare triple {48309#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~1.base, ~tmp~1.offset;havoc ~tmp___0~0;assume -2147483648 <= #t~nondet27 && #t~nondet27 <= 2147483647;~tmp___0~0 := #t~nondet27;havoc #t~nondet27; {48270#true} is VALID [2022-02-20 22:04:16,307 INFO L290 TraceCheckUtils]: 1: Hoare triple {48270#true} assume 0 != ~tmp___0~0;#res.base, #res.offset := 0, 0; {48270#true} is VALID [2022-02-20 22:04:16,307 INFO L290 TraceCheckUtils]: 2: Hoare triple {48270#true} assume true; {48270#true} is VALID [2022-02-20 22:04:16,308 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {48270#true} {48276#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} #1793#return; {48276#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:16,308 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 33 [2022-02-20 22:04:16,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:04:16,316 INFO L290 TraceCheckUtils]: 0: Hoare triple {48270#true} ~ptr#1.base, ~ptr#1.offset := #in~ptr#1.base, #in~ptr#1.offset;havoc ~tmp~0#1;assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := (if (~ptr#1.base + ~ptr#1.offset) % 18446744073709551616 > 18446744073709547520 then 1 else 0), 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; {48270#true} is VALID [2022-02-20 22:04:16,317 INFO L290 TraceCheckUtils]: 1: Hoare triple {48270#true} #t~ret9#1 := ldv__builtin_expect_#res#1;assume { :end_inline_ldv__builtin_expect } true;assume -9223372036854775808 <= #t~ret9#1 && #t~ret9#1 <= 9223372036854775807;~tmp~0#1 := #t~ret9#1;havoc #t~ret9#1;#res#1 := (if 0 == (if 0 != ~tmp~0#1 then 1 else 0) then 0 else 1); {48270#true} is VALID [2022-02-20 22:04:16,317 INFO L290 TraceCheckUtils]: 2: Hoare triple {48270#true} assume true; {48270#true} is VALID [2022-02-20 22:04:16,317 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {48270#true} {48276#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} #1795#return; {48276#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:16,317 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 40 [2022-02-20 22:04:16,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:04:16,325 INFO L290 TraceCheckUtils]: 0: Hoare triple {48270#true} ~pdev#1.base, ~pdev#1.offset := #in~pdev#1.base, #in~pdev#1.offset;havoc ~tmp~8#1.base, ~tmp~8#1.offset;assume { :begin_inline_dev_get_drvdata } true;dev_get_drvdata_#in~dev#1.base, dev_get_drvdata_#in~dev#1.offset := ~pdev#1.base, 13 + ~pdev#1.offset;havoc dev_get_drvdata_#res#1.base, dev_get_drvdata_#res#1.offset;havoc dev_get_drvdata_#t~mem44#1.base, dev_get_drvdata_#t~mem44#1.offset, dev_get_drvdata_~dev#1.base, dev_get_drvdata_~dev#1.offset;dev_get_drvdata_~dev#1.base, dev_get_drvdata_~dev#1.offset := dev_get_drvdata_#in~dev#1.base, dev_get_drvdata_#in~dev#1.offset;call dev_get_drvdata_#t~mem44#1.base, dev_get_drvdata_#t~mem44#1.offset := read~$Pointer$(dev_get_drvdata_~dev#1.base, 489 + dev_get_drvdata_~dev#1.offset, 8);dev_get_drvdata_#res#1.base, dev_get_drvdata_#res#1.offset := dev_get_drvdata_#t~mem44#1.base, dev_get_drvdata_#t~mem44#1.offset;havoc dev_get_drvdata_#t~mem44#1.base, dev_get_drvdata_#t~mem44#1.offset; {48270#true} is VALID [2022-02-20 22:04:16,325 INFO L290 TraceCheckUtils]: 1: Hoare triple {48270#true} #t~ret52#1.base, #t~ret52#1.offset := dev_get_drvdata_#res#1.base, dev_get_drvdata_#res#1.offset;assume { :end_inline_dev_get_drvdata } true;~tmp~8#1.base, ~tmp~8#1.offset := #t~ret52#1.base, #t~ret52#1.offset;havoc #t~ret52#1.base, #t~ret52#1.offset;#res#1.base, #res#1.offset := ~tmp~8#1.base, ~tmp~8#1.offset; {48270#true} is VALID [2022-02-20 22:04:16,326 INFO L290 TraceCheckUtils]: 2: Hoare triple {48270#true} assume true; {48270#true} is VALID [2022-02-20 22:04:16,326 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {48270#true} {48276#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} #1797#return; {48276#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:16,326 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 53 [2022-02-20 22:04:16,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:04:16,334 INFO L290 TraceCheckUtils]: 0: Hoare triple {48308#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {48270#true} is VALID [2022-02-20 22:04:16,334 INFO L290 TraceCheckUtils]: 1: Hoare triple {48270#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {48270#true} is VALID [2022-02-20 22:04:16,334 INFO L290 TraceCheckUtils]: 2: Hoare triple {48270#true} assume true; {48270#true} is VALID [2022-02-20 22:04:16,334 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {48270#true} {48271#false} #1803#return; {48271#false} is VALID [2022-02-20 22:04:16,334 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2022-02-20 22:04:16,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:04:16,339 INFO L290 TraceCheckUtils]: 0: Hoare triple {48308#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {48270#true} is VALID [2022-02-20 22:04:16,339 INFO L290 TraceCheckUtils]: 1: Hoare triple {48270#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {48270#true} is VALID [2022-02-20 22:04:16,339 INFO L290 TraceCheckUtils]: 2: Hoare triple {48270#true} assume true; {48270#true} is VALID [2022-02-20 22:04:16,339 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {48270#true} {48271#false} #1805#return; {48271#false} is VALID [2022-02-20 22:04:16,345 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 83 [2022-02-20 22:04:16,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:04:16,353 INFO L290 TraceCheckUtils]: 0: Hoare triple {48310#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~offset444 := 0; {48270#true} is VALID [2022-02-20 22:04:16,353 INFO L290 TraceCheckUtils]: 1: Hoare triple {48270#true} call #t~mem445 := read~int(src.base, src.offset + #t~offset444, 1);call write~unchecked~int(#t~mem445, dest.base, dest.offset + #t~offset444, 1); {48270#true} is VALID [2022-02-20 22:04:16,353 INFO L290 TraceCheckUtils]: 2: Hoare triple {48270#true} assume 0 == #t~mem445; {48270#true} is VALID [2022-02-20 22:04:16,354 INFO L290 TraceCheckUtils]: 3: Hoare triple {48270#true} assume #res.base == dest.base && #res.offset == dest.offset; {48270#true} is VALID [2022-02-20 22:04:16,354 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {48270#true} {48271#false} #1809#return; {48271#false} is VALID [2022-02-20 22:04:16,354 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 90 [2022-02-20 22:04:16,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:04:16,359 INFO L290 TraceCheckUtils]: 0: Hoare triple {48310#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~offset444 := 0; {48270#true} is VALID [2022-02-20 22:04:16,360 INFO L290 TraceCheckUtils]: 1: Hoare triple {48270#true} call #t~mem445 := read~int(src.base, src.offset + #t~offset444, 1);call write~unchecked~int(#t~mem445, dest.base, dest.offset + #t~offset444, 1); {48270#true} is VALID [2022-02-20 22:04:16,360 INFO L290 TraceCheckUtils]: 2: Hoare triple {48270#true} assume 0 == #t~mem445; {48270#true} is VALID [2022-02-20 22:04:16,360 INFO L290 TraceCheckUtils]: 3: Hoare triple {48270#true} assume #res.base == dest.base && #res.offset == dest.offset; {48270#true} is VALID [2022-02-20 22:04:16,360 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {48270#true} {48271#false} #1811#return; {48271#false} is VALID [2022-02-20 22:04:16,360 INFO L290 TraceCheckUtils]: 0: Hoare triple {48270#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(105, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(8, 4);call #Ultimate.allocInit(12, 5);call #Ultimate.allocInit(12, 6);call #Ultimate.allocInit(8, 7);call #Ultimate.allocInit(217, 8);call #Ultimate.allocInit(33, 9);call #Ultimate.allocInit(12, 10);call #Ultimate.allocInit(217, 11);call #Ultimate.allocInit(32, 12);call #Ultimate.allocInit(217, 13);call #Ultimate.allocInit(40, 14);call #Ultimate.allocInit(27, 15);call #Ultimate.allocInit(28, 16);call #Ultimate.allocInit(12, 17);call #Ultimate.allocInit(217, 18);call #Ultimate.allocInit(30, 19);call #Ultimate.allocInit(15, 20);call #Ultimate.allocInit(17, 21);call #Ultimate.allocInit(12, 22);call #Ultimate.allocInit(217, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(217, 25);call #Ultimate.allocInit(45, 26);call #Ultimate.allocInit(217, 27);call #Ultimate.allocInit(44, 28);call #Ultimate.allocInit(7, 29);call write~init~int(83, 29, 0, 1);call write~init~int(101, 29, 1, 1);call write~init~int(114, 29, 2, 1);call write~init~int(105, 29, 3, 1);call write~init~int(97, 29, 4, 1);call write~init~int(108, 29, 5, 1);call write~init~int(0, 29, 6, 1);call #Ultimate.allocInit(25, 30);call #Ultimate.allocInit(24, 31);call #Ultimate.allocInit(18, 32);call #Ultimate.allocInit(18, 33);call #Ultimate.allocInit(49, 34);~ldv_irq_1_3~0 := 0;~ldv_irq_data_1_1~0.base, ~ldv_irq_data_1_1~0.offset := 0, 0;~ldv_irq_1_0~0 := 0;~ldv_irq_data_1_0~0.base, ~ldv_irq_data_1_0~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_irq_data_1_3~0.base, ~ldv_irq_data_1_3~0.offset := 0, 0;~snd_uart16550_input_group0~0.base, ~snd_uart16550_input_group0~0.offset := 0, 0;~ldv_irq_data_1_2~0.base, ~ldv_irq_data_1_2~0.offset := 0, 0;~ldv_irq_1_2~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_irq_1_1~0 := 0;~ldv_timer_state_2~0 := 0;~ldv_irq_line_1_3~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_irq_line_1_0~0 := 0;~ldv_timer_list_2~0.base, ~ldv_timer_list_2~0.offset := 0, 0;~snd_serial_driver_group0~0.base, ~snd_serial_driver_group0~0.offset := 0, 0;~ref_cnt~0 := 0;~ldv_irq_line_1_1~0 := 0;~snd_uart16550_output_group0~0.base, ~snd_uart16550_output_group0~0.offset := 0, 0;~ldv_state_variable_1~0 := 0;~ldv_irq_line_1_2~0 := 0;~ldv_state_variable_4~0 := 0;~#adaptor_names~0.base, ~#adaptor_names~0.offset := 35, 0;call #Ultimate.allocInit(40, 35);call write~init~$Pointer$(3, 0, ~#adaptor_names~0.base, ~#adaptor_names~0.offset, 8);call write~init~$Pointer$(4, 0, ~#adaptor_names~0.base, 8 + ~#adaptor_names~0.offset, 8);call write~init~$Pointer$(5, 0, ~#adaptor_names~0.base, 16 + ~#adaptor_names~0.offset, 8);call write~init~$Pointer$(6, 0, ~#adaptor_names~0.base, 24 + ~#adaptor_names~0.offset, 8);call write~init~$Pointer$(7, 0, ~#adaptor_names~0.base, 32 + ~#adaptor_names~0.offset, 8);~#index~0.base, ~#index~0.offset := 36, 0;call #Ultimate.allocInit(128, 36);call write~init~int(-1, ~#index~0.base, ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 4 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 8 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 12 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 16 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 20 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 24 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 28 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 32 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 36 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 40 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 44 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 48 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 52 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 56 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 60 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 64 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 68 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 72 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 76 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 80 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 84 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 88 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 92 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 96 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 100 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 104 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 108 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 112 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 116 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 120 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 124 + ~#index~0.offset, 4);~#id~0.base, ~#id~0.offset := 37, 0;call #Ultimate.allocInit(256, 37);call write~init~$Pointer$(0, 0, ~#id~0.base, ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 8 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 16 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 24 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 32 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 40 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 48 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 56 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 64 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 72 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 80 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 88 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 96 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 104 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 112 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 120 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 128 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 136 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 144 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 152 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 160 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 168 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 176 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 184 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 192 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 200 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 208 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 216 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 224 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 232 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 240 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 248 + ~#id~0.offset, 8);~#enable~0.base, ~#enable~0.offset := 38, 0;call #Ultimate.allocInit(32, 38);call write~init~int(1, ~#enable~0.base, ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 1 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 2 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 3 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 4 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 5 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 6 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 7 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 8 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 9 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 10 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 11 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 12 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 13 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 14 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 15 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 16 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 17 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 18 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 19 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 20 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 21 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 22 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 23 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 24 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 25 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 26 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 27 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 28 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 29 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 30 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 31 + ~#enable~0.offset, 1);~#port~0.base, ~#port~0.offset := 39, 0;call #Ultimate.allocInit(256, 39);call write~init~int(1, ~#port~0.base, ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 8 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 16 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 24 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 32 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 40 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 48 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 56 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 64 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 72 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 80 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 88 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 96 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 104 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 112 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 120 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 128 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 136 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 144 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 152 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 160 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 168 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 176 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 184 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 192 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 200 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 208 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 216 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 224 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 232 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 240 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 248 + ~#port~0.offset, 8);~#irq~0.base, ~#irq~0.offset := 40, 0;call #Ultimate.allocInit(128, 40);call write~init~int(65535, ~#irq~0.base, ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 4 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 8 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 12 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 16 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 20 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 24 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 28 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 32 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 36 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 40 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 44 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 48 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 52 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 56 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 60 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 64 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 68 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 72 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 76 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 80 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 84 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 88 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 92 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 96 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 100 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 104 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 108 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 112 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 116 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 120 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 124 + ~#irq~0.offset, 4);~#speed~0.base, ~#speed~0.offset := 41, 0;call #Ultimate.allocInit(128, 41);call write~init~int(38400, ~#speed~0.base, ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 4 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 8 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 12 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 16 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 20 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 24 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 28 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 32 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 36 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 40 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 44 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 48 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 52 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 56 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 60 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 64 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 68 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 72 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 76 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 80 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 84 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 88 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 92 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 96 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 100 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 104 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 108 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 112 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 116 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 120 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 124 + ~#speed~0.offset, 4);~#base~0.base, ~#base~0.offset := 42, 0;call #Ultimate.allocInit(128, 42);call write~init~int(115200, ~#base~0.base, ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 4 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 8 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 12 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 16 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 20 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 24 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 28 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 32 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 36 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 40 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 44 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 48 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 52 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 56 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 60 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 64 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 68 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 72 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 76 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 80 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 84 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 88 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 92 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 96 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 100 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 104 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 108 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 112 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 116 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 120 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 124 + ~#base~0.offset, 4);~#outs~0.base, ~#outs~0.offset := 43, 0;call #Ultimate.allocInit(128, 43);call write~init~int(1, ~#outs~0.base, ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 4 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 8 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 12 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 16 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 20 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 24 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 28 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 32 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 36 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 40 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 44 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 48 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 52 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 56 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 60 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 64 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 68 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 72 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 76 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 80 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 84 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 88 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 92 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 96 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 100 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 104 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 108 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 112 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 116 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 120 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 124 + ~#outs~0.offset, 4);~#ins~0.base, ~#ins~0.offset := 44, 0;call #Ultimate.allocInit(128, 44);call write~init~int(1, ~#ins~0.base, ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 4 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 8 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 12 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 16 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 20 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 24 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 28 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 32 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 36 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 40 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 44 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 48 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 52 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 56 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 60 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 64 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 68 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 72 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 76 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 80 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 84 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 88 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 92 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 96 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 100 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 104 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 108 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 112 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 116 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 120 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 124 + ~#ins~0.offset, 4);~#adaptor~0.base, ~#adaptor~0.offset := 45, 0;call #Ultimate.allocInit(128, 45);call write~init~int(0, ~#adaptor~0.base, ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 4 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 8 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 12 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 16 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 20 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 24 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 28 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 32 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 36 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 40 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 44 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 48 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 52 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 56 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 60 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 64 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 68 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 72 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 76 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 80 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 84 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 88 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 92 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 96 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 100 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 104 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 108 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 112 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 116 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 120 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 124 + ~#adaptor~0.offset, 4);~#droponfull~0.base, ~#droponfull~0.offset := 46, 0;call #Ultimate.allocInit(32, 46);call write~init~int(0, ~#droponfull~0.base, ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 1 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 2 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 3 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 4 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 5 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 6 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 7 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 8 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 9 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 10 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 11 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 12 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 13 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 14 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 15 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 16 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 17 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 18 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 19 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 20 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 21 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 22 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 23 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 24 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 25 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 26 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 27 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 28 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 29 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 30 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 31 + ~#droponfull~0.offset, 1);~#devices~0.base, ~#devices~0.offset := 47, 0;call #Ultimate.allocInit(256, 47);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#devices~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#devices~0.base);~#snd_uart16550_output~0.base, ~#snd_uart16550_output~0.offset := 48, 0;call #Ultimate.allocInit(32, 48);call write~init~$Pointer$(#funAddr~snd_uart16550_output_open.base, #funAddr~snd_uart16550_output_open.offset, ~#snd_uart16550_output~0.base, ~#snd_uart16550_output~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_uart16550_output_close.base, #funAddr~snd_uart16550_output_close.offset, ~#snd_uart16550_output~0.base, 8 + ~#snd_uart16550_output~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_uart16550_output_trigger.base, #funAddr~snd_uart16550_output_trigger.offset, ~#snd_uart16550_output~0.base, 16 + ~#snd_uart16550_output~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_uart16550_output~0.base, 24 + ~#snd_uart16550_output~0.offset, 8);~#snd_uart16550_input~0.base, ~#snd_uart16550_input~0.offset := 49, 0;call #Ultimate.allocInit(32, 49);call write~init~$Pointer$(#funAddr~snd_uart16550_input_open.base, #funAddr~snd_uart16550_input_open.offset, ~#snd_uart16550_input~0.base, ~#snd_uart16550_input~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_uart16550_input_close.base, #funAddr~snd_uart16550_input_close.offset, ~#snd_uart16550_input~0.base, 8 + ~#snd_uart16550_input~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_uart16550_input_trigger.base, #funAddr~snd_uart16550_input_trigger.offset, ~#snd_uart16550_input~0.base, 16 + ~#snd_uart16550_input~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_uart16550_input~0.base, 24 + ~#snd_uart16550_input~0.offset, 8);~#snd_serial_driver~0.base, ~#snd_serial_driver~0.offset := 50, 0;call #Ultimate.allocInit(162, 50);call write~init~$Pointer$(#funAddr~snd_serial_probe.base, #funAddr~snd_serial_probe.offset, ~#snd_serial_driver~0.base, ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_serial_remove.base, #funAddr~snd_serial_remove.offset, ~#snd_serial_driver~0.base, 8 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 16 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 24 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 32 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(32, 0, ~#snd_serial_driver~0.base, 40 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 48 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#snd_serial_driver~0.base, 56 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 64 + ~#snd_serial_driver~0.offset, 8);call write~init~int(0, ~#snd_serial_driver~0.base, 72 + ~#snd_serial_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 73 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 81 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 89 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 97 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 105 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 113 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 121 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 129 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 137 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 145 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 153 + ~#snd_serial_driver~0.offset, 8);call write~init~int(0, ~#snd_serial_driver~0.base, 161 + ~#snd_serial_driver~0.offset, 1);~ldv_retval_2~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_5~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_spin~0 := 0; {48270#true} is VALID [2022-02-20 22:04:16,361 INFO L290 TraceCheckUtils]: 1: Hoare triple {48270#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet399#1, main_#t~nondet400#1, main_#t~nondet401#1, main_#t~switch402#1, main_#t~nondet403#1, main_#t~switch404#1, main_#t~ret405#1, main_#t~ret406#1, main_#t~nondet407#1, main_#t~switch408#1, main_#t~ret409#1, main_#t~nondet410#1, main_#t~switch411#1, main_#t~ret412#1, main_#t~ret413#1, main_#t~nondet414#1, main_#t~switch415#1, main_#t~ret416#1, main_#t~ret417#1, main_~ldvarg0~0#1, main_~tmp~21#1, main_~ldvarg1~0#1, main_~tmp___0~6#1, main_~tmp___1~2#1, main_~tmp___2~1#1, main_~tmp___3~0#1, main_~tmp___4~0#1, main_~tmp___5~0#1;havoc main_~ldvarg0~0#1;havoc main_~tmp~21#1;havoc main_~ldvarg1~0#1;havoc main_~tmp___0~6#1;havoc main_~tmp___1~2#1;havoc main_~tmp___2~1#1;havoc main_~tmp___3~0#1;havoc main_~tmp___4~0#1;havoc main_~tmp___5~0#1;assume -2147483648 <= main_#t~nondet399#1 && main_#t~nondet399#1 <= 2147483647;main_~tmp~21#1 := main_#t~nondet399#1;havoc main_#t~nondet399#1;main_~ldvarg0~0#1 := main_~tmp~21#1;assume -2147483648 <= main_#t~nondet400#1 && main_#t~nondet400#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet400#1;havoc main_#t~nondet400#1;main_~ldvarg1~0#1 := main_~tmp___0~6#1;assume { :begin_inline_ldv_initialize } true; {48270#true} is VALID [2022-02-20 22:04:16,361 INFO L290 TraceCheckUtils]: 2: Hoare triple {48270#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_4~0 := 0;~ldv_state_variable_1~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 1;~ldv_state_variable_5~0 := 0; {48270#true} is VALID [2022-02-20 22:04:16,361 INFO L290 TraceCheckUtils]: 3: Hoare triple {48270#true} assume -2147483648 <= main_#t~nondet401#1 && main_#t~nondet401#1 <= 2147483647;main_~tmp___1~2#1 := main_#t~nondet401#1;havoc main_#t~nondet401#1;main_#t~switch402#1 := 0 == main_~tmp___1~2#1; {48270#true} is VALID [2022-02-20 22:04:16,361 INFO L290 TraceCheckUtils]: 4: Hoare triple {48270#true} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 1 == main_~tmp___1~2#1; {48270#true} is VALID [2022-02-20 22:04:16,361 INFO L290 TraceCheckUtils]: 5: Hoare triple {48270#true} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 2 == main_~tmp___1~2#1; {48270#true} is VALID [2022-02-20 22:04:16,361 INFO L290 TraceCheckUtils]: 6: Hoare triple {48270#true} assume main_#t~switch402#1; {48270#true} is VALID [2022-02-20 22:04:16,361 INFO L290 TraceCheckUtils]: 7: Hoare triple {48270#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet407#1 && main_#t~nondet407#1 <= 2147483647;main_~tmp___3~0#1 := main_#t~nondet407#1;havoc main_#t~nondet407#1;main_#t~switch408#1 := 0 == main_~tmp___3~0#1; {48270#true} is VALID [2022-02-20 22:04:16,361 INFO L290 TraceCheckUtils]: 8: Hoare triple {48270#true} assume !main_#t~switch408#1;main_#t~switch408#1 := main_#t~switch408#1 || 1 == main_~tmp___3~0#1; {48270#true} is VALID [2022-02-20 22:04:16,362 INFO L290 TraceCheckUtils]: 9: Hoare triple {48270#true} assume main_#t~switch408#1; {48270#true} is VALID [2022-02-20 22:04:16,362 INFO L290 TraceCheckUtils]: 10: Hoare triple {48270#true} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_alsa_card_serial_init } true;havoc alsa_card_serial_init_#res#1;havoc alsa_card_serial_init_#t~ret376#1, alsa_card_serial_init_#t~mem377#1, alsa_card_serial_init_#t~ret378#1.base, alsa_card_serial_init_#t~ret378#1.offset, alsa_card_serial_init_#t~ret379#1, alsa_card_serial_init_#t~ret380#1.base, alsa_card_serial_init_#t~ret380#1.offset, alsa_card_serial_init_#t~nondet381#1, alsa_card_serial_init_~i~1#1, alsa_card_serial_init_~cards~0#1, alsa_card_serial_init_~err~3#1, alsa_card_serial_init_~device~0#1.base, alsa_card_serial_init_~device~0#1.offset, alsa_card_serial_init_~tmp~15#1, alsa_card_serial_init_~tmp___0~5#1.base, alsa_card_serial_init_~tmp___0~5#1.offset;havoc alsa_card_serial_init_~i~1#1;havoc alsa_card_serial_init_~cards~0#1;havoc alsa_card_serial_init_~err~3#1;havoc alsa_card_serial_init_~device~0#1.base, alsa_card_serial_init_~device~0#1.offset;havoc alsa_card_serial_init_~tmp~15#1;havoc alsa_card_serial_init_~tmp___0~5#1.base, alsa_card_serial_init_~tmp___0~5#1.offset;assume { :begin_inline_ldv___platform_driver_register_23 } true;ldv___platform_driver_register_23_#in~ldv_func_arg1#1.base, ldv___platform_driver_register_23_#in~ldv_func_arg1#1.offset, ldv___platform_driver_register_23_#in~ldv_func_arg2#1.base, ldv___platform_driver_register_23_#in~ldv_func_arg2#1.offset := ~#snd_serial_driver~0.base, ~#snd_serial_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset;havoc ldv___platform_driver_register_23_#res#1;havoc ldv___platform_driver_register_23_#t~ret421#1, ldv___platform_driver_register_23_~ldv_func_arg1#1.base, ldv___platform_driver_register_23_~ldv_func_arg1#1.offset, ldv___platform_driver_register_23_~ldv_func_arg2#1.base, ldv___platform_driver_register_23_~ldv_func_arg2#1.offset, ldv___platform_driver_register_23_~ldv_func_res~2#1, ldv___platform_driver_register_23_~tmp~24#1;ldv___platform_driver_register_23_~ldv_func_arg1#1.base, ldv___platform_driver_register_23_~ldv_func_arg1#1.offset := ldv___platform_driver_register_23_#in~ldv_func_arg1#1.base, ldv___platform_driver_register_23_#in~ldv_func_arg1#1.offset;ldv___platform_driver_register_23_~ldv_func_arg2#1.base, ldv___platform_driver_register_23_~ldv_func_arg2#1.offset := ldv___platform_driver_register_23_#in~ldv_func_arg2#1.base, ldv___platform_driver_register_23_#in~ldv_func_arg2#1.offset;havoc ldv___platform_driver_register_23_~ldv_func_res~2#1;havoc ldv___platform_driver_register_23_~tmp~24#1;assume { :begin_inline___platform_driver_register } true;__platform_driver_register_#in~arg0#1.base, __platform_driver_register_#in~arg0#1.offset, __platform_driver_register_#in~arg1#1.base, __platform_driver_register_#in~arg1#1.offset := ldv___platform_driver_register_23_~ldv_func_arg1#1.base, ldv___platform_driver_register_23_~ldv_func_arg1#1.offset, ldv___platform_driver_register_23_~ldv_func_arg2#1.base, ldv___platform_driver_register_23_~ldv_func_arg2#1.offset;havoc __platform_driver_register_#res#1;havoc __platform_driver_register_#t~nondet424#1, __platform_driver_register_~arg0#1.base, __platform_driver_register_~arg0#1.offset, __platform_driver_register_~arg1#1.base, __platform_driver_register_~arg1#1.offset;__platform_driver_register_~arg0#1.base, __platform_driver_register_~arg0#1.offset := __platform_driver_register_#in~arg0#1.base, __platform_driver_register_#in~arg0#1.offset;__platform_driver_register_~arg1#1.base, __platform_driver_register_~arg1#1.offset := __platform_driver_register_#in~arg1#1.base, __platform_driver_register_#in~arg1#1.offset;assume -2147483648 <= __platform_driver_register_#t~nondet424#1 && __platform_driver_register_#t~nondet424#1 <= 2147483647;__platform_driver_register_#res#1 := __platform_driver_register_#t~nondet424#1;havoc __platform_driver_register_#t~nondet424#1; {48270#true} is VALID [2022-02-20 22:04:16,362 INFO L290 TraceCheckUtils]: 11: Hoare triple {48270#true} ldv___platform_driver_register_23_#t~ret421#1 := __platform_driver_register_#res#1;assume { :end_inline___platform_driver_register } true;assume -2147483648 <= ldv___platform_driver_register_23_#t~ret421#1 && ldv___platform_driver_register_23_#t~ret421#1 <= 2147483647;ldv___platform_driver_register_23_~tmp~24#1 := ldv___platform_driver_register_23_#t~ret421#1;havoc ldv___platform_driver_register_23_#t~ret421#1;ldv___platform_driver_register_23_~ldv_func_res~2#1 := ldv___platform_driver_register_23_~tmp~24#1;~ldv_state_variable_3~0 := 1;assume { :begin_inline_ldv_initialize_platform_driver_3 } true;havoc ldv_initialize_platform_driver_3_#t~ret392#1.base, ldv_initialize_platform_driver_3_#t~ret392#1.offset, ldv_initialize_platform_driver_3_~tmp~19#1.base, ldv_initialize_platform_driver_3_~tmp~19#1.offset;havoc ldv_initialize_platform_driver_3_~tmp~19#1.base, ldv_initialize_platform_driver_3_~tmp~19#1.offset; {48270#true} is VALID [2022-02-20 22:04:16,362 INFO L272 TraceCheckUtils]: 12: Hoare triple {48270#true} call ldv_initialize_platform_driver_3_#t~ret392#1.base, ldv_initialize_platform_driver_3_#t~ret392#1.offset := ldv_zalloc(1464); {48308#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:04:16,363 INFO L290 TraceCheckUtils]: 13: Hoare triple {48308#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {48270#true} is VALID [2022-02-20 22:04:16,363 INFO L290 TraceCheckUtils]: 14: Hoare triple {48270#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {48270#true} is VALID [2022-02-20 22:04:16,363 INFO L290 TraceCheckUtils]: 15: Hoare triple {48270#true} assume true; {48270#true} is VALID [2022-02-20 22:04:16,363 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {48270#true} {48270#true} #1791#return; {48270#true} is VALID [2022-02-20 22:04:16,363 INFO L290 TraceCheckUtils]: 17: Hoare triple {48270#true} ldv_initialize_platform_driver_3_~tmp~19#1.base, ldv_initialize_platform_driver_3_~tmp~19#1.offset := ldv_initialize_platform_driver_3_#t~ret392#1.base, ldv_initialize_platform_driver_3_#t~ret392#1.offset;havoc ldv_initialize_platform_driver_3_#t~ret392#1.base, ldv_initialize_platform_driver_3_#t~ret392#1.offset;~snd_serial_driver_group0~0.base, ~snd_serial_driver_group0~0.offset := ldv_initialize_platform_driver_3_~tmp~19#1.base, ldv_initialize_platform_driver_3_~tmp~19#1.offset; {48270#true} is VALID [2022-02-20 22:04:16,363 INFO L290 TraceCheckUtils]: 18: Hoare triple {48270#true} assume { :end_inline_ldv_initialize_platform_driver_3 } true;ldv___platform_driver_register_23_#res#1 := ldv___platform_driver_register_23_~ldv_func_res~2#1; {48270#true} is VALID [2022-02-20 22:04:16,363 INFO L290 TraceCheckUtils]: 19: Hoare triple {48270#true} alsa_card_serial_init_#t~ret376#1 := ldv___platform_driver_register_23_#res#1;assume { :end_inline_ldv___platform_driver_register_23 } true;assume -2147483648 <= alsa_card_serial_init_#t~ret376#1 && alsa_card_serial_init_#t~ret376#1 <= 2147483647;alsa_card_serial_init_~err~3#1 := alsa_card_serial_init_#t~ret376#1;havoc alsa_card_serial_init_#t~ret376#1; {48270#true} is VALID [2022-02-20 22:04:16,364 INFO L290 TraceCheckUtils]: 20: Hoare triple {48270#true} assume !(alsa_card_serial_init_~err~3#1 < 0);alsa_card_serial_init_~cards~0#1 := 0;alsa_card_serial_init_~i~1#1 := 0; {48276#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:16,364 INFO L290 TraceCheckUtils]: 21: Hoare triple {48276#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} assume alsa_card_serial_init_~i~1#1 <= 31; {48276#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:16,364 INFO L290 TraceCheckUtils]: 22: Hoare triple {48276#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} call alsa_card_serial_init_#t~mem377#1 := read~int(~#enable~0.base, ~#enable~0.offset + alsa_card_serial_init_~i~1#1, 1); {48276#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:16,365 INFO L290 TraceCheckUtils]: 23: Hoare triple {48276#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} assume !(0 == alsa_card_serial_init_#t~mem377#1 % 256);havoc alsa_card_serial_init_#t~mem377#1;assume { :begin_inline_platform_device_register_simple } true;platform_device_register_simple_#in~name#1.base, platform_device_register_simple_#in~name#1.offset, platform_device_register_simple_#in~id___0#1, platform_device_register_simple_#in~res#1.base, platform_device_register_simple_#in~res#1.offset, platform_device_register_simple_#in~num#1 := 33, 0, alsa_card_serial_init_~i~1#1, 0, 0, 0;havoc platform_device_register_simple_#res#1.base, platform_device_register_simple_#res#1.offset;havoc platform_device_register_simple_#t~ret48#1.base, platform_device_register_simple_#t~ret48#1.offset, platform_device_register_simple_~name#1.base, platform_device_register_simple_~name#1.offset, platform_device_register_simple_~id___0#1, platform_device_register_simple_~res#1.base, platform_device_register_simple_~res#1.offset, platform_device_register_simple_~num#1, platform_device_register_simple_~tmp~7#1.base, platform_device_register_simple_~tmp~7#1.offset;platform_device_register_simple_~name#1.base, platform_device_register_simple_~name#1.offset := platform_device_register_simple_#in~name#1.base, platform_device_register_simple_#in~name#1.offset;platform_device_register_simple_~id___0#1 := platform_device_register_simple_#in~id___0#1;platform_device_register_simple_~res#1.base, platform_device_register_simple_~res#1.offset := platform_device_register_simple_#in~res#1.base, platform_device_register_simple_#in~res#1.offset;platform_device_register_simple_~num#1 := platform_device_register_simple_#in~num#1;havoc platform_device_register_simple_~tmp~7#1.base, platform_device_register_simple_~tmp~7#1.offset;assume { :begin_inline_platform_device_register_resndata } true;platform_device_register_resndata_#in~parent#1.base, platform_device_register_resndata_#in~parent#1.offset, platform_device_register_resndata_#in~name#1.base, platform_device_register_resndata_#in~name#1.offset, platform_device_register_resndata_#in~id___0#1, platform_device_register_resndata_#in~res#1.base, platform_device_register_resndata_#in~res#1.offset, platform_device_register_resndata_#in~num#1, platform_device_register_resndata_#in~data#1.base, platform_device_register_resndata_#in~data#1.offset, platform_device_register_resndata_#in~size#1 := 0, 0, platform_device_register_simple_~name#1.base, platform_device_register_simple_~name#1.offset, platform_device_register_simple_~id___0#1, platform_device_register_simple_~res#1.base, platform_device_register_simple_~res#1.offset, platform_device_register_simple_~num#1, 0, 0, 0;havoc platform_device_register_resndata_#res#1.base, platform_device_register_resndata_#res#1.offset;havoc platform_device_register_resndata_#t~ret47#1.base, platform_device_register_resndata_#t~ret47#1.offset, platform_device_register_resndata_~parent#1.base, platform_device_register_resndata_~parent#1.offset, platform_device_register_resndata_~name#1.base, platform_device_register_resndata_~name#1.offset, platform_device_register_resndata_~id___0#1, platform_device_register_resndata_~res#1.base, platform_device_register_resndata_~res#1.offset, platform_device_register_resndata_~num#1, platform_device_register_resndata_~data#1.base, platform_device_register_resndata_~data#1.offset, platform_device_register_resndata_~size#1, platform_device_register_resndata_~#pdevinfo~0#1.base, platform_device_register_resndata_~#pdevinfo~0#1.offset, platform_device_register_resndata_~tmp~6#1.base, platform_device_register_resndata_~tmp~6#1.offset;platform_device_register_resndata_~parent#1.base, platform_device_register_resndata_~parent#1.offset := platform_device_register_resndata_#in~parent#1.base, platform_device_register_resndata_#in~parent#1.offset;platform_device_register_resndata_~name#1.base, platform_device_register_resndata_~name#1.offset := platform_device_register_resndata_#in~name#1.base, platform_device_register_resndata_#in~name#1.offset;platform_device_register_resndata_~id___0#1 := platform_device_register_resndata_#in~id___0#1;platform_device_register_resndata_~res#1.base, platform_device_register_resndata_~res#1.offset := platform_device_register_resndata_#in~res#1.base, platform_device_register_resndata_#in~res#1.offset;platform_device_register_resndata_~num#1 := platform_device_register_resndata_#in~num#1;platform_device_register_resndata_~data#1.base, platform_device_register_resndata_~data#1.offset := platform_device_register_resndata_#in~data#1.base, platform_device_register_resndata_#in~data#1.offset;platform_device_register_resndata_~size#1 := platform_device_register_resndata_#in~size#1;call platform_device_register_resndata_~#pdevinfo~0#1.base, platform_device_register_resndata_~#pdevinfo~0#1.offset := #Ultimate.allocOnStack(64);havoc platform_device_register_resndata_~tmp~6#1.base, platform_device_register_resndata_~tmp~6#1.offset;call write~$Pointer$(platform_device_register_resndata_~parent#1.base, platform_device_register_resndata_~parent#1.offset, platform_device_register_resndata_~#pdevinfo~0#1.base, platform_device_register_resndata_~#pdevinfo~0#1.offset, 8);call write~$Pointer$(0, 0, platform_device_register_resndata_~#pdevinfo~0#1.base, 8 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 8);call write~$Pointer$(platform_device_register_resndata_~name#1.base, platform_device_register_resndata_~name#1.offset, platform_device_register_resndata_~#pdevinfo~0#1.base, 16 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 8);call write~int(platform_device_register_resndata_~id___0#1, platform_device_register_resndata_~#pdevinfo~0#1.base, 24 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 4);call write~$Pointer$(platform_device_register_resndata_~res#1.base, platform_device_register_resndata_~res#1.offset, platform_device_register_resndata_~#pdevinfo~0#1.base, 28 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 8);call write~int(platform_device_register_resndata_~num#1, platform_device_register_resndata_~#pdevinfo~0#1.base, 36 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 4);call write~$Pointer$(platform_device_register_resndata_~data#1.base, platform_device_register_resndata_~data#1.offset, platform_device_register_resndata_~#pdevinfo~0#1.base, 40 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 8);call write~int(platform_device_register_resndata_~size#1, platform_device_register_resndata_~#pdevinfo~0#1.base, 48 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 8);call write~int(0, platform_device_register_resndata_~#pdevinfo~0#1.base, 56 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 8);assume { :begin_inline_platform_device_register_full } true;platform_device_register_full_#in~arg0#1.base, platform_device_register_full_#in~arg0#1.offset := platform_device_register_resndata_~#pdevinfo~0#1.base, platform_device_register_resndata_~#pdevinfo~0#1.offset;havoc platform_device_register_full_#res#1.base, platform_device_register_full_#res#1.offset;havoc platform_device_register_full_#t~ret429#1.base, platform_device_register_full_#t~ret429#1.offset, platform_device_register_full_~arg0#1.base, platform_device_register_full_~arg0#1.offset;platform_device_register_full_~arg0#1.base, platform_device_register_full_~arg0#1.offset := platform_device_register_full_#in~arg0#1.base, platform_device_register_full_#in~arg0#1.offset; {48276#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:16,365 INFO L272 TraceCheckUtils]: 24: Hoare triple {48276#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} call platform_device_register_full_#t~ret429#1.base, platform_device_register_full_#t~ret429#1.offset := ldv_malloc(1386); {48309#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:04:16,365 INFO L290 TraceCheckUtils]: 25: Hoare triple {48309#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~1.base, ~tmp~1.offset;havoc ~tmp___0~0;assume -2147483648 <= #t~nondet27 && #t~nondet27 <= 2147483647;~tmp___0~0 := #t~nondet27;havoc #t~nondet27; {48270#true} is VALID [2022-02-20 22:04:16,365 INFO L290 TraceCheckUtils]: 26: Hoare triple {48270#true} assume 0 != ~tmp___0~0;#res.base, #res.offset := 0, 0; {48270#true} is VALID [2022-02-20 22:04:16,365 INFO L290 TraceCheckUtils]: 27: Hoare triple {48270#true} assume true; {48270#true} is VALID [2022-02-20 22:04:16,366 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {48270#true} {48276#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} #1793#return; {48276#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:16,366 INFO L290 TraceCheckUtils]: 29: Hoare triple {48276#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} platform_device_register_full_#res#1.base, platform_device_register_full_#res#1.offset := platform_device_register_full_#t~ret429#1.base, platform_device_register_full_#t~ret429#1.offset;havoc platform_device_register_full_#t~ret429#1.base, platform_device_register_full_#t~ret429#1.offset; {48276#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:16,367 INFO L290 TraceCheckUtils]: 30: Hoare triple {48276#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} platform_device_register_resndata_#t~ret47#1.base, platform_device_register_resndata_#t~ret47#1.offset := platform_device_register_full_#res#1.base, platform_device_register_full_#res#1.offset;assume { :end_inline_platform_device_register_full } true;platform_device_register_resndata_~tmp~6#1.base, platform_device_register_resndata_~tmp~6#1.offset := platform_device_register_resndata_#t~ret47#1.base, platform_device_register_resndata_#t~ret47#1.offset;havoc platform_device_register_resndata_#t~ret47#1.base, platform_device_register_resndata_#t~ret47#1.offset;platform_device_register_resndata_#res#1.base, platform_device_register_resndata_#res#1.offset := platform_device_register_resndata_~tmp~6#1.base, platform_device_register_resndata_~tmp~6#1.offset;call ULTIMATE.dealloc(platform_device_register_resndata_~#pdevinfo~0#1.base, platform_device_register_resndata_~#pdevinfo~0#1.offset);havoc platform_device_register_resndata_~#pdevinfo~0#1.base, platform_device_register_resndata_~#pdevinfo~0#1.offset; {48276#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:16,367 INFO L290 TraceCheckUtils]: 31: Hoare triple {48276#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} platform_device_register_simple_#t~ret48#1.base, platform_device_register_simple_#t~ret48#1.offset := platform_device_register_resndata_#res#1.base, platform_device_register_resndata_#res#1.offset;assume { :end_inline_platform_device_register_resndata } true;platform_device_register_simple_~tmp~7#1.base, platform_device_register_simple_~tmp~7#1.offset := platform_device_register_simple_#t~ret48#1.base, platform_device_register_simple_#t~ret48#1.offset;havoc platform_device_register_simple_#t~ret48#1.base, platform_device_register_simple_#t~ret48#1.offset;platform_device_register_simple_#res#1.base, platform_device_register_simple_#res#1.offset := platform_device_register_simple_~tmp~7#1.base, platform_device_register_simple_~tmp~7#1.offset; {48276#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:16,367 INFO L290 TraceCheckUtils]: 32: Hoare triple {48276#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} alsa_card_serial_init_#t~ret378#1.base, alsa_card_serial_init_#t~ret378#1.offset := platform_device_register_simple_#res#1.base, platform_device_register_simple_#res#1.offset;assume { :end_inline_platform_device_register_simple } true;alsa_card_serial_init_~device~0#1.base, alsa_card_serial_init_~device~0#1.offset := alsa_card_serial_init_#t~ret378#1.base, alsa_card_serial_init_#t~ret378#1.offset;havoc alsa_card_serial_init_#t~ret378#1.base, alsa_card_serial_init_#t~ret378#1.offset; {48276#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:16,367 INFO L272 TraceCheckUtils]: 33: Hoare triple {48276#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} call alsa_card_serial_init_#t~ret379#1 := IS_ERR(alsa_card_serial_init_~device~0#1.base, alsa_card_serial_init_~device~0#1.offset); {48270#true} is VALID [2022-02-20 22:04:16,367 INFO L290 TraceCheckUtils]: 34: Hoare triple {48270#true} ~ptr#1.base, ~ptr#1.offset := #in~ptr#1.base, #in~ptr#1.offset;havoc ~tmp~0#1;assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := (if (~ptr#1.base + ~ptr#1.offset) % 18446744073709551616 > 18446744073709547520 then 1 else 0), 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; {48270#true} is VALID [2022-02-20 22:04:16,368 INFO L290 TraceCheckUtils]: 35: Hoare triple {48270#true} #t~ret9#1 := ldv__builtin_expect_#res#1;assume { :end_inline_ldv__builtin_expect } true;assume -9223372036854775808 <= #t~ret9#1 && #t~ret9#1 <= 9223372036854775807;~tmp~0#1 := #t~ret9#1;havoc #t~ret9#1;#res#1 := (if 0 == (if 0 != ~tmp~0#1 then 1 else 0) then 0 else 1); {48270#true} is VALID [2022-02-20 22:04:16,368 INFO L290 TraceCheckUtils]: 36: Hoare triple {48270#true} assume true; {48270#true} is VALID [2022-02-20 22:04:16,368 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {48270#true} {48276#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} #1795#return; {48276#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:16,369 INFO L290 TraceCheckUtils]: 38: Hoare triple {48276#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} alsa_card_serial_init_~tmp~15#1 := alsa_card_serial_init_#t~ret379#1;havoc alsa_card_serial_init_#t~ret379#1; {48276#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:16,369 INFO L290 TraceCheckUtils]: 39: Hoare triple {48276#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} assume !(0 != alsa_card_serial_init_~tmp~15#1 % 256); {48276#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:16,369 INFO L272 TraceCheckUtils]: 40: Hoare triple {48276#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} call alsa_card_serial_init_#t~ret380#1.base, alsa_card_serial_init_#t~ret380#1.offset := platform_get_drvdata(alsa_card_serial_init_~device~0#1.base, alsa_card_serial_init_~device~0#1.offset); {48270#true} is VALID [2022-02-20 22:04:16,369 INFO L290 TraceCheckUtils]: 41: Hoare triple {48270#true} ~pdev#1.base, ~pdev#1.offset := #in~pdev#1.base, #in~pdev#1.offset;havoc ~tmp~8#1.base, ~tmp~8#1.offset;assume { :begin_inline_dev_get_drvdata } true;dev_get_drvdata_#in~dev#1.base, dev_get_drvdata_#in~dev#1.offset := ~pdev#1.base, 13 + ~pdev#1.offset;havoc dev_get_drvdata_#res#1.base, dev_get_drvdata_#res#1.offset;havoc dev_get_drvdata_#t~mem44#1.base, dev_get_drvdata_#t~mem44#1.offset, dev_get_drvdata_~dev#1.base, dev_get_drvdata_~dev#1.offset;dev_get_drvdata_~dev#1.base, dev_get_drvdata_~dev#1.offset := dev_get_drvdata_#in~dev#1.base, dev_get_drvdata_#in~dev#1.offset;call dev_get_drvdata_#t~mem44#1.base, dev_get_drvdata_#t~mem44#1.offset := read~$Pointer$(dev_get_drvdata_~dev#1.base, 489 + dev_get_drvdata_~dev#1.offset, 8);dev_get_drvdata_#res#1.base, dev_get_drvdata_#res#1.offset := dev_get_drvdata_#t~mem44#1.base, dev_get_drvdata_#t~mem44#1.offset;havoc dev_get_drvdata_#t~mem44#1.base, dev_get_drvdata_#t~mem44#1.offset; {48270#true} is VALID [2022-02-20 22:04:16,369 INFO L290 TraceCheckUtils]: 42: Hoare triple {48270#true} #t~ret52#1.base, #t~ret52#1.offset := dev_get_drvdata_#res#1.base, dev_get_drvdata_#res#1.offset;assume { :end_inline_dev_get_drvdata } true;~tmp~8#1.base, ~tmp~8#1.offset := #t~ret52#1.base, #t~ret52#1.offset;havoc #t~ret52#1.base, #t~ret52#1.offset;#res#1.base, #res#1.offset := ~tmp~8#1.base, ~tmp~8#1.offset; {48270#true} is VALID [2022-02-20 22:04:16,369 INFO L290 TraceCheckUtils]: 43: Hoare triple {48270#true} assume true; {48270#true} is VALID [2022-02-20 22:04:16,370 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {48270#true} {48276#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} #1797#return; {48276#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:16,370 INFO L290 TraceCheckUtils]: 45: Hoare triple {48276#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} alsa_card_serial_init_~tmp___0~5#1.base, alsa_card_serial_init_~tmp___0~5#1.offset := alsa_card_serial_init_#t~ret380#1.base, alsa_card_serial_init_#t~ret380#1.offset;havoc alsa_card_serial_init_#t~ret380#1.base, alsa_card_serial_init_#t~ret380#1.offset; {48276#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:16,371 INFO L290 TraceCheckUtils]: 46: Hoare triple {48276#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} assume !(0 == (alsa_card_serial_init_~tmp___0~5#1.base + alsa_card_serial_init_~tmp___0~5#1.offset) % 18446744073709551616);call write~$Pointer$(alsa_card_serial_init_~device~0#1.base, alsa_card_serial_init_~device~0#1.offset, ~#devices~0.base, ~#devices~0.offset + 8 * alsa_card_serial_init_~i~1#1, 8);alsa_card_serial_init_~cards~0#1 := 1 + alsa_card_serial_init_~cards~0#1; {48276#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} is VALID [2022-02-20 22:04:16,371 INFO L290 TraceCheckUtils]: 47: Hoare triple {48276#(= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 0)} alsa_card_serial_init_~i~1#1 := 1 + alsa_card_serial_init_~i~1#1; {48289#(<= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 1)} is VALID [2022-02-20 22:04:16,372 INFO L290 TraceCheckUtils]: 48: Hoare triple {48289#(<= |ULTIMATE.start_alsa_card_serial_init_~i~1#1| 1)} assume !(alsa_card_serial_init_~i~1#1 <= 31); {48271#false} is VALID [2022-02-20 22:04:16,372 INFO L290 TraceCheckUtils]: 49: Hoare triple {48271#false} assume !(0 == alsa_card_serial_init_~cards~0#1);alsa_card_serial_init_#res#1 := 0; {48271#false} is VALID [2022-02-20 22:04:16,372 INFO L290 TraceCheckUtils]: 50: Hoare triple {48271#false} main_#t~ret409#1 := alsa_card_serial_init_#res#1;assume { :end_inline_alsa_card_serial_init } true;assume -2147483648 <= main_#t~ret409#1 && main_#t~ret409#1 <= 2147483647;~ldv_retval_2~0 := main_#t~ret409#1;havoc main_#t~ret409#1; {48271#false} is VALID [2022-02-20 22:04:16,372 INFO L290 TraceCheckUtils]: 51: Hoare triple {48271#false} assume !(0 != ~ldv_retval_2~0); {48271#false} is VALID [2022-02-20 22:04:16,372 INFO L290 TraceCheckUtils]: 52: Hoare triple {48271#false} assume 0 == ~ldv_retval_2~0;~ldv_state_variable_0~0 := 2;~ldv_state_variable_5~0 := 1;assume { :begin_inline_ldv_initialize_snd_rawmidi_ops_5 } true;havoc ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.base, ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.offset, ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.base, ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.offset;havoc ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.base, ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.offset; {48271#false} is VALID [2022-02-20 22:04:16,372 INFO L272 TraceCheckUtils]: 53: Hoare triple {48271#false} call ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.base, ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.offset := ldv_zalloc(112); {48308#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:04:16,372 INFO L290 TraceCheckUtils]: 54: Hoare triple {48308#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {48270#true} is VALID [2022-02-20 22:04:16,372 INFO L290 TraceCheckUtils]: 55: Hoare triple {48270#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {48270#true} is VALID [2022-02-20 22:04:16,373 INFO L290 TraceCheckUtils]: 56: Hoare triple {48270#true} assume true; {48270#true} is VALID [2022-02-20 22:04:16,373 INFO L284 TraceCheckUtils]: 57: Hoare quadruple {48270#true} {48271#false} #1803#return; {48271#false} is VALID [2022-02-20 22:04:16,373 INFO L290 TraceCheckUtils]: 58: Hoare triple {48271#false} ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.base, ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.offset := ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.base, ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.offset;havoc ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.base, ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.offset;~snd_uart16550_output_group0~0.base, ~snd_uart16550_output_group0~0.offset := ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.base, ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.offset; {48271#false} is VALID [2022-02-20 22:04:16,373 INFO L290 TraceCheckUtils]: 59: Hoare triple {48271#false} assume { :end_inline_ldv_initialize_snd_rawmidi_ops_5 } true;~ldv_state_variable_4~0 := 1;assume { :begin_inline_ldv_initialize_snd_rawmidi_ops_4 } true;havoc ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.base, ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.offset, ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.base, ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.offset;havoc ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.base, ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.offset; {48271#false} is VALID [2022-02-20 22:04:16,373 INFO L272 TraceCheckUtils]: 60: Hoare triple {48271#false} call ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.base, ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.offset := ldv_zalloc(112); {48308#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:04:16,373 INFO L290 TraceCheckUtils]: 61: Hoare triple {48308#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {48270#true} is VALID [2022-02-20 22:04:16,373 INFO L290 TraceCheckUtils]: 62: Hoare triple {48270#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {48270#true} is VALID [2022-02-20 22:04:16,373 INFO L290 TraceCheckUtils]: 63: Hoare triple {48270#true} assume true; {48270#true} is VALID [2022-02-20 22:04:16,374 INFO L284 TraceCheckUtils]: 64: Hoare quadruple {48270#true} {48271#false} #1805#return; {48271#false} is VALID [2022-02-20 22:04:16,374 INFO L290 TraceCheckUtils]: 65: Hoare triple {48271#false} ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.base, ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.offset := ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.base, ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.offset;havoc ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.base, ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.offset;~snd_uart16550_input_group0~0.base, ~snd_uart16550_input_group0~0.offset := ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.base, ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.offset; {48271#false} is VALID [2022-02-20 22:04:16,374 INFO L290 TraceCheckUtils]: 66: Hoare triple {48271#false} assume { :end_inline_ldv_initialize_snd_rawmidi_ops_4 } true; {48271#false} is VALID [2022-02-20 22:04:16,374 INFO L290 TraceCheckUtils]: 67: Hoare triple {48271#false} assume -2147483648 <= main_#t~nondet401#1 && main_#t~nondet401#1 <= 2147483647;main_~tmp___1~2#1 := main_#t~nondet401#1;havoc main_#t~nondet401#1;main_#t~switch402#1 := 0 == main_~tmp___1~2#1; {48271#false} is VALID [2022-02-20 22:04:16,374 INFO L290 TraceCheckUtils]: 68: Hoare triple {48271#false} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 1 == main_~tmp___1~2#1; {48271#false} is VALID [2022-02-20 22:04:16,374 INFO L290 TraceCheckUtils]: 69: Hoare triple {48271#false} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 2 == main_~tmp___1~2#1; {48271#false} is VALID [2022-02-20 22:04:16,374 INFO L290 TraceCheckUtils]: 70: Hoare triple {48271#false} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 3 == main_~tmp___1~2#1; {48271#false} is VALID [2022-02-20 22:04:16,374 INFO L290 TraceCheckUtils]: 71: Hoare triple {48271#false} assume main_#t~switch402#1; {48271#false} is VALID [2022-02-20 22:04:16,374 INFO L290 TraceCheckUtils]: 72: Hoare triple {48271#false} assume 0 != ~ldv_state_variable_3~0;assume -2147483648 <= main_#t~nondet410#1 && main_#t~nondet410#1 <= 2147483647;main_~tmp___4~0#1 := main_#t~nondet410#1;havoc main_#t~nondet410#1;main_#t~switch411#1 := 0 == main_~tmp___4~0#1; {48271#false} is VALID [2022-02-20 22:04:16,375 INFO L290 TraceCheckUtils]: 73: Hoare triple {48271#false} assume main_#t~switch411#1; {48271#false} is VALID [2022-02-20 22:04:16,375 INFO L290 TraceCheckUtils]: 74: Hoare triple {48271#false} assume 1 == ~ldv_state_variable_3~0;assume { :begin_inline_snd_serial_probe } true;snd_serial_probe_#in~devptr#1.base, snd_serial_probe_#in~devptr#1.offset := ~snd_serial_driver_group0~0.base, ~snd_serial_driver_group0~0.offset;havoc snd_serial_probe_#res#1;havoc snd_serial_probe_#t~mem326#1, snd_serial_probe_#t~mem327#1, snd_serial_probe_#t~switch328#1, snd_serial_probe_#t~mem329#1, snd_serial_probe_#t~mem330#1, snd_serial_probe_#t~mem331#1, snd_serial_probe_#t~short332#1, snd_serial_probe_#t~mem333#1, snd_serial_probe_#t~mem334#1, snd_serial_probe_#t~mem335#1, snd_serial_probe_#t~short336#1, snd_serial_probe_#t~mem337#1, snd_serial_probe_#t~mem338#1, snd_serial_probe_#t~mem339#1.base, snd_serial_probe_#t~mem339#1.offset, snd_serial_probe_#t~ret340#1, snd_serial_probe_#t~mem341#1.base, snd_serial_probe_#t~mem341#1.offset, snd_serial_probe_#t~strcpy~res342#1.base, snd_serial_probe_#t~strcpy~res342#1.offset, snd_serial_probe_#t~mem343#1.base, snd_serial_probe_#t~mem343#1.offset, snd_serial_probe_#t~strcpy~res344#1.base, snd_serial_probe_#t~strcpy~res344#1.offset, snd_serial_probe_#t~mem345#1.base, snd_serial_probe_#t~mem345#1.offset, snd_serial_probe_#t~mem346#1, snd_serial_probe_#t~mem347#1, snd_serial_probe_#t~mem348#1, snd_serial_probe_#t~mem349#1, snd_serial_probe_#t~mem350#1, snd_serial_probe_#t~mem351#1, snd_serial_probe_#t~ret352#1, snd_serial_probe_#t~mem353#1.base, snd_serial_probe_#t~mem353#1.offset, snd_serial_probe_#t~mem354#1, snd_serial_probe_#t~mem355#1, snd_serial_probe_#t~mem356#1.base, snd_serial_probe_#t~mem356#1.offset, snd_serial_probe_#t~ret357#1, snd_serial_probe_#t~nondet358#1, snd_serial_probe_#t~mem359#1.base, snd_serial_probe_#t~mem359#1.offset, snd_serial_probe_#t~mem360#1.base, snd_serial_probe_#t~mem360#1.offset, snd_serial_probe_#t~mem361#1.base, snd_serial_probe_#t~mem361#1.offset, snd_serial_probe_#t~mem362#1, snd_serial_probe_#t~mem363#1.base, snd_serial_probe_#t~mem363#1.offset, snd_serial_probe_#t~mem364#1.base, snd_serial_probe_#t~mem364#1.offset, snd_serial_probe_#t~mem365#1, snd_serial_probe_#t~mem366#1.base, snd_serial_probe_#t~mem366#1.offset, snd_serial_probe_#t~mem367#1, snd_serial_probe_#t~mem368#1.base, snd_serial_probe_#t~mem368#1.offset, snd_serial_probe_#t~ret369#1, snd_serial_probe_#t~mem370#1.base, snd_serial_probe_#t~mem370#1.offset, snd_serial_probe_#t~mem371#1.base, snd_serial_probe_#t~mem371#1.offset, snd_serial_probe_#t~ret372#1, snd_serial_probe_~devptr#1.base, snd_serial_probe_~devptr#1.offset, snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset, snd_serial_probe_~#uart~11#1.base, snd_serial_probe_~#uart~11#1.offset, snd_serial_probe_~err~2#1, snd_serial_probe_~dev~0#1;snd_serial_probe_~devptr#1.base, snd_serial_probe_~devptr#1.offset := snd_serial_probe_#in~devptr#1.base, snd_serial_probe_#in~devptr#1.offset;call snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset := #Ultimate.allocOnStack(8);call snd_serial_probe_~#uart~11#1.base, snd_serial_probe_~#uart~11#1.offset := #Ultimate.allocOnStack(8);havoc snd_serial_probe_~err~2#1;havoc snd_serial_probe_~dev~0#1;call snd_serial_probe_#t~mem326#1 := read~int(snd_serial_probe_~devptr#1.base, 8 + snd_serial_probe_~devptr#1.offset, 4);snd_serial_probe_~dev~0#1 := snd_serial_probe_#t~mem326#1;havoc snd_serial_probe_#t~mem326#1;call snd_serial_probe_#t~mem327#1 := read~int(~#adaptor~0.base, ~#adaptor~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);snd_serial_probe_#t~switch328#1 := 0 == snd_serial_probe_#t~mem327#1; {48271#false} is VALID [2022-02-20 22:04:16,375 INFO L290 TraceCheckUtils]: 75: Hoare triple {48271#false} assume snd_serial_probe_#t~switch328#1;call write~int(1, ~#ins~0.base, ~#ins~0.offset + 4 * snd_serial_probe_~dev~0#1, 4); {48271#false} is VALID [2022-02-20 22:04:16,375 INFO L290 TraceCheckUtils]: 76: Hoare triple {48271#false} call snd_serial_probe_#t~mem330#1 := read~int(~#outs~0.base, ~#outs~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);snd_serial_probe_#t~short332#1 := snd_serial_probe_#t~mem330#1 <= 0; {48271#false} is VALID [2022-02-20 22:04:16,375 INFO L290 TraceCheckUtils]: 77: Hoare triple {48271#false} assume !snd_serial_probe_#t~short332#1;call snd_serial_probe_#t~mem331#1 := read~int(~#outs~0.base, ~#outs~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);snd_serial_probe_#t~short332#1 := snd_serial_probe_#t~mem331#1 > 16; {48271#false} is VALID [2022-02-20 22:04:16,375 INFO L290 TraceCheckUtils]: 78: Hoare triple {48271#false} assume !snd_serial_probe_#t~short332#1;havoc snd_serial_probe_#t~mem330#1;havoc snd_serial_probe_#t~mem331#1;havoc snd_serial_probe_#t~short332#1;call snd_serial_probe_#t~mem334#1 := read~int(~#ins~0.base, ~#ins~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);snd_serial_probe_#t~short336#1 := snd_serial_probe_#t~mem334#1 <= 0; {48271#false} is VALID [2022-02-20 22:04:16,376 INFO L290 TraceCheckUtils]: 79: Hoare triple {48271#false} assume !snd_serial_probe_#t~short336#1;call snd_serial_probe_#t~mem335#1 := read~int(~#ins~0.base, ~#ins~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);snd_serial_probe_#t~short336#1 := snd_serial_probe_#t~mem335#1 > 16; {48271#false} is VALID [2022-02-20 22:04:16,376 INFO L290 TraceCheckUtils]: 80: Hoare triple {48271#false} assume !snd_serial_probe_#t~short336#1;havoc snd_serial_probe_#t~mem334#1;havoc snd_serial_probe_#t~mem335#1;havoc snd_serial_probe_#t~short336#1;call snd_serial_probe_#t~mem338#1 := read~int(~#index~0.base, ~#index~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem339#1.base, snd_serial_probe_#t~mem339#1.offset := read~$Pointer$(~#id~0.base, ~#id~0.offset + 8 * snd_serial_probe_~dev~0#1, 8);assume { :begin_inline_snd_card_new } true;snd_card_new_#in~arg0#1.base, snd_card_new_#in~arg0#1.offset, snd_card_new_#in~arg1#1, snd_card_new_#in~arg2#1.base, snd_card_new_#in~arg2#1.offset, snd_card_new_#in~arg3#1.base, snd_card_new_#in~arg3#1.offset, snd_card_new_#in~arg4#1, snd_card_new_#in~arg5#1.base, snd_card_new_#in~arg5#1.offset := snd_serial_probe_~devptr#1.base, 13 + snd_serial_probe_~devptr#1.offset, snd_serial_probe_#t~mem338#1, snd_serial_probe_#t~mem339#1.base, snd_serial_probe_#t~mem339#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 0, snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset;havoc snd_card_new_#res#1;havoc snd_card_new_#t~nondet433#1, snd_card_new_~arg0#1.base, snd_card_new_~arg0#1.offset, snd_card_new_~arg1#1, snd_card_new_~arg2#1.base, snd_card_new_~arg2#1.offset, snd_card_new_~arg3#1.base, snd_card_new_~arg3#1.offset, snd_card_new_~arg4#1, snd_card_new_~arg5#1.base, snd_card_new_~arg5#1.offset;snd_card_new_~arg0#1.base, snd_card_new_~arg0#1.offset := snd_card_new_#in~arg0#1.base, snd_card_new_#in~arg0#1.offset;snd_card_new_~arg1#1 := snd_card_new_#in~arg1#1;snd_card_new_~arg2#1.base, snd_card_new_~arg2#1.offset := snd_card_new_#in~arg2#1.base, snd_card_new_#in~arg2#1.offset;snd_card_new_~arg3#1.base, snd_card_new_~arg3#1.offset := snd_card_new_#in~arg3#1.base, snd_card_new_#in~arg3#1.offset;snd_card_new_~arg4#1 := snd_card_new_#in~arg4#1;snd_card_new_~arg5#1.base, snd_card_new_~arg5#1.offset := snd_card_new_#in~arg5#1.base, snd_card_new_#in~arg5#1.offset;assume -2147483648 <= snd_card_new_#t~nondet433#1 && snd_card_new_#t~nondet433#1 <= 2147483647;snd_card_new_#res#1 := snd_card_new_#t~nondet433#1;havoc snd_card_new_#t~nondet433#1; {48271#false} is VALID [2022-02-20 22:04:16,376 INFO L290 TraceCheckUtils]: 81: Hoare triple {48271#false} snd_serial_probe_#t~ret340#1 := snd_card_new_#res#1;assume { :end_inline_snd_card_new } true;assume -2147483648 <= snd_serial_probe_#t~ret340#1 && snd_serial_probe_#t~ret340#1 <= 2147483647;snd_serial_probe_~err~2#1 := snd_serial_probe_#t~ret340#1;havoc snd_serial_probe_#t~mem338#1;havoc snd_serial_probe_#t~mem339#1.base, snd_serial_probe_#t~mem339#1.offset;havoc snd_serial_probe_#t~ret340#1; {48271#false} is VALID [2022-02-20 22:04:16,377 INFO L290 TraceCheckUtils]: 82: Hoare triple {48271#false} assume !(snd_serial_probe_~err~2#1 < 0);call snd_serial_probe_#t~mem341#1.base, snd_serial_probe_#t~mem341#1.offset := read~$Pointer$(snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset, 8); {48271#false} is VALID [2022-02-20 22:04:16,377 INFO L272 TraceCheckUtils]: 83: Hoare triple {48271#false} call snd_serial_probe_#t~strcpy~res342#1.base, snd_serial_probe_#t~strcpy~res342#1.offset := #Ultimate.C_strcpy(snd_serial_probe_#t~mem341#1.base, 20 + snd_serial_probe_#t~mem341#1.offset, 29, 0); {48310#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:04:16,377 INFO L290 TraceCheckUtils]: 84: Hoare triple {48310#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~offset444 := 0; {48270#true} is VALID [2022-02-20 22:04:16,377 INFO L290 TraceCheckUtils]: 85: Hoare triple {48270#true} call #t~mem445 := read~int(src.base, src.offset + #t~offset444, 1);call write~unchecked~int(#t~mem445, dest.base, dest.offset + #t~offset444, 1); {48270#true} is VALID [2022-02-20 22:04:16,377 INFO L290 TraceCheckUtils]: 86: Hoare triple {48270#true} assume 0 == #t~mem445; {48270#true} is VALID [2022-02-20 22:04:16,377 INFO L290 TraceCheckUtils]: 87: Hoare triple {48270#true} assume #res.base == dest.base && #res.offset == dest.offset; {48270#true} is VALID [2022-02-20 22:04:16,377 INFO L284 TraceCheckUtils]: 88: Hoare quadruple {48270#true} {48271#false} #1809#return; {48271#false} is VALID [2022-02-20 22:04:16,377 INFO L290 TraceCheckUtils]: 89: Hoare triple {48271#false} havoc snd_serial_probe_#t~mem341#1.base, snd_serial_probe_#t~mem341#1.offset;havoc snd_serial_probe_#t~strcpy~res342#1.base, snd_serial_probe_#t~strcpy~res342#1.offset;call snd_serial_probe_#t~mem343#1.base, snd_serial_probe_#t~mem343#1.offset := read~$Pointer$(snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset, 8); {48271#false} is VALID [2022-02-20 22:04:16,377 INFO L272 TraceCheckUtils]: 90: Hoare triple {48271#false} call snd_serial_probe_#t~strcpy~res344#1.base, snd_serial_probe_#t~strcpy~res344#1.offset := #Ultimate.C_strcpy(snd_serial_probe_#t~mem343#1.base, 36 + snd_serial_probe_#t~mem343#1.offset, 30, 0); {48310#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:04:16,378 INFO L290 TraceCheckUtils]: 91: Hoare triple {48310#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~offset444 := 0; {48270#true} is VALID [2022-02-20 22:04:16,378 INFO L290 TraceCheckUtils]: 92: Hoare triple {48270#true} call #t~mem445 := read~int(src.base, src.offset + #t~offset444, 1);call write~unchecked~int(#t~mem445, dest.base, dest.offset + #t~offset444, 1); {48270#true} is VALID [2022-02-20 22:04:16,378 INFO L290 TraceCheckUtils]: 93: Hoare triple {48270#true} assume 0 == #t~mem445; {48270#true} is VALID [2022-02-20 22:04:16,378 INFO L290 TraceCheckUtils]: 94: Hoare triple {48270#true} assume #res.base == dest.base && #res.offset == dest.offset; {48270#true} is VALID [2022-02-20 22:04:16,378 INFO L284 TraceCheckUtils]: 95: Hoare quadruple {48270#true} {48271#false} #1811#return; {48271#false} is VALID [2022-02-20 22:04:16,378 INFO L290 TraceCheckUtils]: 96: Hoare triple {48271#false} havoc snd_serial_probe_#t~mem343#1.base, snd_serial_probe_#t~mem343#1.offset;havoc snd_serial_probe_#t~strcpy~res344#1.base, snd_serial_probe_#t~strcpy~res344#1.offset;call snd_serial_probe_#t~mem345#1.base, snd_serial_probe_#t~mem345#1.offset := read~$Pointer$(snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset, 8);call snd_serial_probe_#t~mem346#1 := read~int(~#port~0.base, ~#port~0.offset + 8 * snd_serial_probe_~dev~0#1, 8);call snd_serial_probe_#t~mem347#1 := read~int(~#irq~0.base, ~#irq~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem348#1 := read~int(~#speed~0.base, ~#speed~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem349#1 := read~int(~#base~0.base, ~#base~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem350#1 := read~int(~#adaptor~0.base, ~#adaptor~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem351#1 := read~int(~#droponfull~0.base, ~#droponfull~0.offset + snd_serial_probe_~dev~0#1, 1);assume { :begin_inline_snd_uart16550_create } true;snd_uart16550_create_#in~card#1.base, snd_uart16550_create_#in~card#1.offset, snd_uart16550_create_#in~iobase#1, snd_uart16550_create_#in~irq___0#1, snd_uart16550_create_#in~speed___0#1, snd_uart16550_create_#in~base___0#1, snd_uart16550_create_#in~adaptor___0#1, snd_uart16550_create_#in~droponfull___0#1, snd_uart16550_create_#in~ruart#1.base, snd_uart16550_create_#in~ruart#1.offset := snd_serial_probe_#t~mem345#1.base, snd_serial_probe_#t~mem345#1.offset, snd_serial_probe_#t~mem346#1, snd_serial_probe_#t~mem347#1, snd_serial_probe_#t~mem348#1, snd_serial_probe_#t~mem349#1, snd_serial_probe_#t~mem350#1, snd_serial_probe_#t~mem351#1 % 256, snd_serial_probe_~#uart~11#1.base, snd_serial_probe_~#uart~11#1.offset;havoc snd_uart16550_create_#res#1;havoc snd_uart16550_create_#t~ret296#1.base, snd_uart16550_create_#t~ret296#1.offset, snd_uart16550_create_#t~ret297#1.base, snd_uart16550_create_#t~ret297#1.offset, snd_uart16550_create_#t~ret298#1, snd_uart16550_create_#t~nondet299#1, snd_uart16550_create_#t~ret300#1, snd_uart16550_create_#t~ret301#1, snd_uart16550_create_#t~mem302#1, snd_uart16550_create_#t~memset~res303#1.base, snd_uart16550_create_#t~memset~res303#1.offset, snd_uart16550_create_#t~ret304#1, snd_uart16550_create_#t~ret305#1, snd_uart16550_create_#t~ret306#1, snd_uart16550_create_#t~mem307#1, snd_uart16550_create_#t~switch308#1, snd_uart16550_create_#t~mem309#1, snd_uart16550_create_#t~mem310#1, snd_uart16550_create_~card#1.base, snd_uart16550_create_~card#1.offset, snd_uart16550_create_~iobase#1, snd_uart16550_create_~irq___0#1, snd_uart16550_create_~speed___0#1, snd_uart16550_create_~base___0#1, snd_uart16550_create_~adaptor___0#1, snd_uart16550_create_~droponfull___0#1, snd_uart16550_create_~ruart#1.base, snd_uart16550_create_~ruart#1.offset, snd_uart16550_create_~#ops~0#1.base, snd_uart16550_create_~#ops~0#1.offset, snd_uart16550_create_~uart~10#1.base, snd_uart16550_create_~uart~10#1.offset, snd_uart16550_create_~err~0#1, snd_uart16550_create_~tmp~13#1.base, snd_uart16550_create_~tmp~13#1.offset, snd_uart16550_create_~#__key~0#1.base, snd_uart16550_create_~#__key~0#1.offset, snd_uart16550_create_~tmp___0~4#1;snd_uart16550_create_~card#1.base, snd_uart16550_create_~card#1.offset := snd_uart16550_create_#in~card#1.base, snd_uart16550_create_#in~card#1.offset;snd_uart16550_create_~iobase#1 := snd_uart16550_create_#in~iobase#1;snd_uart16550_create_~irq___0#1 := snd_uart16550_create_#in~irq___0#1;snd_uart16550_create_~speed___0#1 := snd_uart16550_create_#in~speed___0#1;snd_uart16550_create_~base___0#1 := snd_uart16550_create_#in~base___0#1;snd_uart16550_create_~adaptor___0#1 := snd_uart16550_create_#in~adaptor___0#1;snd_uart16550_create_~droponfull___0#1 := snd_uart16550_create_#in~droponfull___0#1;snd_uart16550_create_~ruart#1.base, snd_uart16550_create_~ruart#1.offset := snd_uart16550_create_#in~ruart#1.base, snd_uart16550_create_#in~ruart#1.offset;call snd_uart16550_create_~#ops~0#1.base, snd_uart16550_create_~#ops~0#1.offset := #Ultimate.allocOnStack(24);havoc snd_uart16550_create_~uart~10#1.base, snd_uart16550_create_~uart~10#1.offset;havoc snd_uart16550_create_~err~0#1;havoc snd_uart16550_create_~tmp~13#1.base, snd_uart16550_create_~tmp~13#1.offset;call snd_uart16550_create_~#__key~0#1.base, snd_uart16550_create_~#__key~0#1.offset := #Ultimate.allocOnStack(8);havoc snd_uart16550_create_~tmp___0~4#1;call write~$Pointer$(#funAddr~snd_uart16550_dev_free.base, #funAddr~snd_uart16550_dev_free.offset, snd_uart16550_create_~#ops~0#1.base, snd_uart16550_create_~#ops~0#1.offset, 8);call write~$Pointer$(0, 0, snd_uart16550_create_~#ops~0#1.base, 8 + snd_uart16550_create_~#ops~0#1.offset, 8);call write~$Pointer$(0, 0, snd_uart16550_create_~#ops~0#1.base, 16 + snd_uart16550_create_~#ops~0#1.offset, 8);assume { :begin_inline_kzalloc } true;kzalloc_#in~size#1, kzalloc_#in~flags#1 := 33344, 208;havoc kzalloc_#res#1.base, kzalloc_#res#1.offset;havoc kzalloc_~size#1, kzalloc_~flags#1;kzalloc_~size#1 := kzalloc_#in~size#1;kzalloc_~flags#1 := kzalloc_#in~flags#1;assume { :begin_inline_ldv_check_alloc_flags } true;ldv_check_alloc_flags_#in~flags#1 := kzalloc_~flags#1;havoc ldv_check_alloc_flags_~flags#1;ldv_check_alloc_flags_~flags#1 := ldv_check_alloc_flags_#in~flags#1; {48271#false} is VALID [2022-02-20 22:04:16,378 INFO L290 TraceCheckUtils]: 97: Hoare triple {48271#false} assume !(0 == ~ldv_spin~0 || 0 == (if 0 == ldv_check_alloc_flags_~flags#1 then 0 else (if 1 == ldv_check_alloc_flags_~flags#1 then 0 else ~bitwiseAnd(ldv_check_alloc_flags_~flags#1, 16))) % 4294967296); {48271#false} is VALID [2022-02-20 22:04:16,378 INFO L272 TraceCheckUtils]: 98: Hoare triple {48271#false} call ldv_error(); {48271#false} is VALID [2022-02-20 22:04:16,379 INFO L290 TraceCheckUtils]: 99: Hoare triple {48271#false} assume !false; {48271#false} is VALID [2022-02-20 22:04:16,379 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2022-02-20 22:04:16,379 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:04:16,379 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [835341413] [2022-02-20 22:04:16,379 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [835341413] provided 0 perfect and 1 imperfect interpolant sequences [2022-02-20 22:04:16,379 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [328834704] [2022-02-20 22:04:16,380 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:04:16,380 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-20 22:04:16,380 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-20 22:04:16,381 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-02-20 22:04:16,382 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-02-20 22:04:16,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:04:16,825 INFO L263 TraceCheckSpWp]: Trace formula consists of 2156 conjuncts, 3 conjunts are in the unsatisfiable core [2022-02-20 22:04:16,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:04:16,875 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-02-20 22:04:17,133 INFO L290 TraceCheckUtils]: 0: Hoare triple {48270#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(105, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(8, 4);call #Ultimate.allocInit(12, 5);call #Ultimate.allocInit(12, 6);call #Ultimate.allocInit(8, 7);call #Ultimate.allocInit(217, 8);call #Ultimate.allocInit(33, 9);call #Ultimate.allocInit(12, 10);call #Ultimate.allocInit(217, 11);call #Ultimate.allocInit(32, 12);call #Ultimate.allocInit(217, 13);call #Ultimate.allocInit(40, 14);call #Ultimate.allocInit(27, 15);call #Ultimate.allocInit(28, 16);call #Ultimate.allocInit(12, 17);call #Ultimate.allocInit(217, 18);call #Ultimate.allocInit(30, 19);call #Ultimate.allocInit(15, 20);call #Ultimate.allocInit(17, 21);call #Ultimate.allocInit(12, 22);call #Ultimate.allocInit(217, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(217, 25);call #Ultimate.allocInit(45, 26);call #Ultimate.allocInit(217, 27);call #Ultimate.allocInit(44, 28);call #Ultimate.allocInit(7, 29);call write~init~int(83, 29, 0, 1);call write~init~int(101, 29, 1, 1);call write~init~int(114, 29, 2, 1);call write~init~int(105, 29, 3, 1);call write~init~int(97, 29, 4, 1);call write~init~int(108, 29, 5, 1);call write~init~int(0, 29, 6, 1);call #Ultimate.allocInit(25, 30);call #Ultimate.allocInit(24, 31);call #Ultimate.allocInit(18, 32);call #Ultimate.allocInit(18, 33);call #Ultimate.allocInit(49, 34);~ldv_irq_1_3~0 := 0;~ldv_irq_data_1_1~0.base, ~ldv_irq_data_1_1~0.offset := 0, 0;~ldv_irq_1_0~0 := 0;~ldv_irq_data_1_0~0.base, ~ldv_irq_data_1_0~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_irq_data_1_3~0.base, ~ldv_irq_data_1_3~0.offset := 0, 0;~snd_uart16550_input_group0~0.base, ~snd_uart16550_input_group0~0.offset := 0, 0;~ldv_irq_data_1_2~0.base, ~ldv_irq_data_1_2~0.offset := 0, 0;~ldv_irq_1_2~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_irq_1_1~0 := 0;~ldv_timer_state_2~0 := 0;~ldv_irq_line_1_3~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_irq_line_1_0~0 := 0;~ldv_timer_list_2~0.base, ~ldv_timer_list_2~0.offset := 0, 0;~snd_serial_driver_group0~0.base, ~snd_serial_driver_group0~0.offset := 0, 0;~ref_cnt~0 := 0;~ldv_irq_line_1_1~0 := 0;~snd_uart16550_output_group0~0.base, ~snd_uart16550_output_group0~0.offset := 0, 0;~ldv_state_variable_1~0 := 0;~ldv_irq_line_1_2~0 := 0;~ldv_state_variable_4~0 := 0;~#adaptor_names~0.base, ~#adaptor_names~0.offset := 35, 0;call #Ultimate.allocInit(40, 35);call write~init~$Pointer$(3, 0, ~#adaptor_names~0.base, ~#adaptor_names~0.offset, 8);call write~init~$Pointer$(4, 0, ~#adaptor_names~0.base, 8 + ~#adaptor_names~0.offset, 8);call write~init~$Pointer$(5, 0, ~#adaptor_names~0.base, 16 + ~#adaptor_names~0.offset, 8);call write~init~$Pointer$(6, 0, ~#adaptor_names~0.base, 24 + ~#adaptor_names~0.offset, 8);call write~init~$Pointer$(7, 0, ~#adaptor_names~0.base, 32 + ~#adaptor_names~0.offset, 8);~#index~0.base, ~#index~0.offset := 36, 0;call #Ultimate.allocInit(128, 36);call write~init~int(-1, ~#index~0.base, ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 4 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 8 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 12 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 16 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 20 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 24 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 28 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 32 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 36 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 40 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 44 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 48 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 52 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 56 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 60 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 64 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 68 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 72 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 76 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 80 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 84 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 88 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 92 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 96 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 100 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 104 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 108 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 112 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 116 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 120 + ~#index~0.offset, 4);call write~init~int(-1, ~#index~0.base, 124 + ~#index~0.offset, 4);~#id~0.base, ~#id~0.offset := 37, 0;call #Ultimate.allocInit(256, 37);call write~init~$Pointer$(0, 0, ~#id~0.base, ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 8 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 16 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 24 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 32 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 40 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 48 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 56 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 64 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 72 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 80 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 88 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 96 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 104 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 112 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 120 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 128 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 136 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 144 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 152 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 160 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 168 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 176 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 184 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 192 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 200 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 208 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 216 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 224 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 232 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 240 + ~#id~0.offset, 8);call write~init~$Pointer$(0, 0, ~#id~0.base, 248 + ~#id~0.offset, 8);~#enable~0.base, ~#enable~0.offset := 38, 0;call #Ultimate.allocInit(32, 38);call write~init~int(1, ~#enable~0.base, ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 1 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 2 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 3 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 4 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 5 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 6 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 7 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 8 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 9 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 10 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 11 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 12 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 13 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 14 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 15 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 16 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 17 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 18 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 19 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 20 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 21 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 22 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 23 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 24 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 25 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 26 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 27 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 28 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 29 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 30 + ~#enable~0.offset, 1);call write~init~int(0, ~#enable~0.base, 31 + ~#enable~0.offset, 1);~#port~0.base, ~#port~0.offset := 39, 0;call #Ultimate.allocInit(256, 39);call write~init~int(1, ~#port~0.base, ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 8 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 16 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 24 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 32 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 40 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 48 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 56 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 64 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 72 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 80 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 88 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 96 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 104 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 112 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 120 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 128 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 136 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 144 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 152 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 160 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 168 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 176 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 184 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 192 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 200 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 208 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 216 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 224 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 232 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 240 + ~#port~0.offset, 8);call write~init~int(1, ~#port~0.base, 248 + ~#port~0.offset, 8);~#irq~0.base, ~#irq~0.offset := 40, 0;call #Ultimate.allocInit(128, 40);call write~init~int(65535, ~#irq~0.base, ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 4 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 8 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 12 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 16 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 20 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 24 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 28 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 32 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 36 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 40 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 44 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 48 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 52 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 56 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 60 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 64 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 68 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 72 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 76 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 80 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 84 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 88 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 92 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 96 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 100 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 104 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 108 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 112 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 116 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 120 + ~#irq~0.offset, 4);call write~init~int(65535, ~#irq~0.base, 124 + ~#irq~0.offset, 4);~#speed~0.base, ~#speed~0.offset := 41, 0;call #Ultimate.allocInit(128, 41);call write~init~int(38400, ~#speed~0.base, ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 4 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 8 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 12 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 16 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 20 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 24 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 28 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 32 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 36 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 40 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 44 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 48 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 52 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 56 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 60 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 64 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 68 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 72 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 76 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 80 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 84 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 88 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 92 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 96 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 100 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 104 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 108 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 112 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 116 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 120 + ~#speed~0.offset, 4);call write~init~int(38400, ~#speed~0.base, 124 + ~#speed~0.offset, 4);~#base~0.base, ~#base~0.offset := 42, 0;call #Ultimate.allocInit(128, 42);call write~init~int(115200, ~#base~0.base, ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 4 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 8 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 12 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 16 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 20 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 24 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 28 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 32 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 36 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 40 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 44 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 48 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 52 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 56 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 60 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 64 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 68 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 72 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 76 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 80 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 84 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 88 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 92 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 96 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 100 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 104 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 108 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 112 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 116 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 120 + ~#base~0.offset, 4);call write~init~int(115200, ~#base~0.base, 124 + ~#base~0.offset, 4);~#outs~0.base, ~#outs~0.offset := 43, 0;call #Ultimate.allocInit(128, 43);call write~init~int(1, ~#outs~0.base, ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 4 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 8 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 12 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 16 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 20 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 24 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 28 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 32 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 36 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 40 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 44 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 48 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 52 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 56 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 60 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 64 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 68 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 72 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 76 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 80 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 84 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 88 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 92 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 96 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 100 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 104 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 108 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 112 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 116 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 120 + ~#outs~0.offset, 4);call write~init~int(1, ~#outs~0.base, 124 + ~#outs~0.offset, 4);~#ins~0.base, ~#ins~0.offset := 44, 0;call #Ultimate.allocInit(128, 44);call write~init~int(1, ~#ins~0.base, ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 4 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 8 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 12 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 16 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 20 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 24 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 28 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 32 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 36 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 40 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 44 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 48 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 52 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 56 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 60 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 64 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 68 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 72 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 76 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 80 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 84 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 88 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 92 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 96 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 100 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 104 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 108 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 112 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 116 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 120 + ~#ins~0.offset, 4);call write~init~int(1, ~#ins~0.base, 124 + ~#ins~0.offset, 4);~#adaptor~0.base, ~#adaptor~0.offset := 45, 0;call #Ultimate.allocInit(128, 45);call write~init~int(0, ~#adaptor~0.base, ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 4 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 8 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 12 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 16 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 20 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 24 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 28 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 32 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 36 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 40 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 44 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 48 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 52 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 56 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 60 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 64 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 68 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 72 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 76 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 80 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 84 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 88 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 92 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 96 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 100 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 104 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 108 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 112 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 116 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 120 + ~#adaptor~0.offset, 4);call write~init~int(0, ~#adaptor~0.base, 124 + ~#adaptor~0.offset, 4);~#droponfull~0.base, ~#droponfull~0.offset := 46, 0;call #Ultimate.allocInit(32, 46);call write~init~int(0, ~#droponfull~0.base, ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 1 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 2 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 3 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 4 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 5 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 6 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 7 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 8 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 9 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 10 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 11 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 12 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 13 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 14 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 15 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 16 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 17 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 18 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 19 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 20 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 21 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 22 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 23 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 24 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 25 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 26 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 27 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 28 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 29 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 30 + ~#droponfull~0.offset, 1);call write~init~int(0, ~#droponfull~0.base, 31 + ~#droponfull~0.offset, 1);~#devices~0.base, ~#devices~0.offset := 47, 0;call #Ultimate.allocInit(256, 47);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#devices~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#devices~0.base);~#snd_uart16550_output~0.base, ~#snd_uart16550_output~0.offset := 48, 0;call #Ultimate.allocInit(32, 48);call write~init~$Pointer$(#funAddr~snd_uart16550_output_open.base, #funAddr~snd_uart16550_output_open.offset, ~#snd_uart16550_output~0.base, ~#snd_uart16550_output~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_uart16550_output_close.base, #funAddr~snd_uart16550_output_close.offset, ~#snd_uart16550_output~0.base, 8 + ~#snd_uart16550_output~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_uart16550_output_trigger.base, #funAddr~snd_uart16550_output_trigger.offset, ~#snd_uart16550_output~0.base, 16 + ~#snd_uart16550_output~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_uart16550_output~0.base, 24 + ~#snd_uart16550_output~0.offset, 8);~#snd_uart16550_input~0.base, ~#snd_uart16550_input~0.offset := 49, 0;call #Ultimate.allocInit(32, 49);call write~init~$Pointer$(#funAddr~snd_uart16550_input_open.base, #funAddr~snd_uart16550_input_open.offset, ~#snd_uart16550_input~0.base, ~#snd_uart16550_input~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_uart16550_input_close.base, #funAddr~snd_uart16550_input_close.offset, ~#snd_uart16550_input~0.base, 8 + ~#snd_uart16550_input~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_uart16550_input_trigger.base, #funAddr~snd_uart16550_input_trigger.offset, ~#snd_uart16550_input~0.base, 16 + ~#snd_uart16550_input~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_uart16550_input~0.base, 24 + ~#snd_uart16550_input~0.offset, 8);~#snd_serial_driver~0.base, ~#snd_serial_driver~0.offset := 50, 0;call #Ultimate.allocInit(162, 50);call write~init~$Pointer$(#funAddr~snd_serial_probe.base, #funAddr~snd_serial_probe.offset, ~#snd_serial_driver~0.base, ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~snd_serial_remove.base, #funAddr~snd_serial_remove.offset, ~#snd_serial_driver~0.base, 8 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 16 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 24 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 32 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(32, 0, ~#snd_serial_driver~0.base, 40 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 48 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#snd_serial_driver~0.base, 56 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 64 + ~#snd_serial_driver~0.offset, 8);call write~init~int(0, ~#snd_serial_driver~0.base, 72 + ~#snd_serial_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 73 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 81 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 89 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 97 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 105 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 113 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 121 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 129 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 137 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 145 + ~#snd_serial_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#snd_serial_driver~0.base, 153 + ~#snd_serial_driver~0.offset, 8);call write~init~int(0, ~#snd_serial_driver~0.base, 161 + ~#snd_serial_driver~0.offset, 1);~ldv_retval_2~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_5~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_spin~0 := 0; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,134 INFO L290 TraceCheckUtils]: 1: Hoare triple {48314#(= ~ldv_spin~0 0)} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet399#1, main_#t~nondet400#1, main_#t~nondet401#1, main_#t~switch402#1, main_#t~nondet403#1, main_#t~switch404#1, main_#t~ret405#1, main_#t~ret406#1, main_#t~nondet407#1, main_#t~switch408#1, main_#t~ret409#1, main_#t~nondet410#1, main_#t~switch411#1, main_#t~ret412#1, main_#t~ret413#1, main_#t~nondet414#1, main_#t~switch415#1, main_#t~ret416#1, main_#t~ret417#1, main_~ldvarg0~0#1, main_~tmp~21#1, main_~ldvarg1~0#1, main_~tmp___0~6#1, main_~tmp___1~2#1, main_~tmp___2~1#1, main_~tmp___3~0#1, main_~tmp___4~0#1, main_~tmp___5~0#1;havoc main_~ldvarg0~0#1;havoc main_~tmp~21#1;havoc main_~ldvarg1~0#1;havoc main_~tmp___0~6#1;havoc main_~tmp___1~2#1;havoc main_~tmp___2~1#1;havoc main_~tmp___3~0#1;havoc main_~tmp___4~0#1;havoc main_~tmp___5~0#1;assume -2147483648 <= main_#t~nondet399#1 && main_#t~nondet399#1 <= 2147483647;main_~tmp~21#1 := main_#t~nondet399#1;havoc main_#t~nondet399#1;main_~ldvarg0~0#1 := main_~tmp~21#1;assume -2147483648 <= main_#t~nondet400#1 && main_#t~nondet400#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet400#1;havoc main_#t~nondet400#1;main_~ldvarg1~0#1 := main_~tmp___0~6#1;assume { :begin_inline_ldv_initialize } true; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,135 INFO L290 TraceCheckUtils]: 2: Hoare triple {48314#(= ~ldv_spin~0 0)} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_4~0 := 0;~ldv_state_variable_1~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 1;~ldv_state_variable_5~0 := 0; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,135 INFO L290 TraceCheckUtils]: 3: Hoare triple {48314#(= ~ldv_spin~0 0)} assume -2147483648 <= main_#t~nondet401#1 && main_#t~nondet401#1 <= 2147483647;main_~tmp___1~2#1 := main_#t~nondet401#1;havoc main_#t~nondet401#1;main_#t~switch402#1 := 0 == main_~tmp___1~2#1; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,136 INFO L290 TraceCheckUtils]: 4: Hoare triple {48314#(= ~ldv_spin~0 0)} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 1 == main_~tmp___1~2#1; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,136 INFO L290 TraceCheckUtils]: 5: Hoare triple {48314#(= ~ldv_spin~0 0)} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 2 == main_~tmp___1~2#1; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,136 INFO L290 TraceCheckUtils]: 6: Hoare triple {48314#(= ~ldv_spin~0 0)} assume main_#t~switch402#1; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,137 INFO L290 TraceCheckUtils]: 7: Hoare triple {48314#(= ~ldv_spin~0 0)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet407#1 && main_#t~nondet407#1 <= 2147483647;main_~tmp___3~0#1 := main_#t~nondet407#1;havoc main_#t~nondet407#1;main_#t~switch408#1 := 0 == main_~tmp___3~0#1; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,138 INFO L290 TraceCheckUtils]: 8: Hoare triple {48314#(= ~ldv_spin~0 0)} assume !main_#t~switch408#1;main_#t~switch408#1 := main_#t~switch408#1 || 1 == main_~tmp___3~0#1; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,139 INFO L290 TraceCheckUtils]: 9: Hoare triple {48314#(= ~ldv_spin~0 0)} assume main_#t~switch408#1; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,139 INFO L290 TraceCheckUtils]: 10: Hoare triple {48314#(= ~ldv_spin~0 0)} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_alsa_card_serial_init } true;havoc alsa_card_serial_init_#res#1;havoc alsa_card_serial_init_#t~ret376#1, alsa_card_serial_init_#t~mem377#1, alsa_card_serial_init_#t~ret378#1.base, alsa_card_serial_init_#t~ret378#1.offset, alsa_card_serial_init_#t~ret379#1, alsa_card_serial_init_#t~ret380#1.base, alsa_card_serial_init_#t~ret380#1.offset, alsa_card_serial_init_#t~nondet381#1, alsa_card_serial_init_~i~1#1, alsa_card_serial_init_~cards~0#1, alsa_card_serial_init_~err~3#1, alsa_card_serial_init_~device~0#1.base, alsa_card_serial_init_~device~0#1.offset, alsa_card_serial_init_~tmp~15#1, alsa_card_serial_init_~tmp___0~5#1.base, alsa_card_serial_init_~tmp___0~5#1.offset;havoc alsa_card_serial_init_~i~1#1;havoc alsa_card_serial_init_~cards~0#1;havoc alsa_card_serial_init_~err~3#1;havoc alsa_card_serial_init_~device~0#1.base, alsa_card_serial_init_~device~0#1.offset;havoc alsa_card_serial_init_~tmp~15#1;havoc alsa_card_serial_init_~tmp___0~5#1.base, alsa_card_serial_init_~tmp___0~5#1.offset;assume { :begin_inline_ldv___platform_driver_register_23 } true;ldv___platform_driver_register_23_#in~ldv_func_arg1#1.base, ldv___platform_driver_register_23_#in~ldv_func_arg1#1.offset, ldv___platform_driver_register_23_#in~ldv_func_arg2#1.base, ldv___platform_driver_register_23_#in~ldv_func_arg2#1.offset := ~#snd_serial_driver~0.base, ~#snd_serial_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset;havoc ldv___platform_driver_register_23_#res#1;havoc ldv___platform_driver_register_23_#t~ret421#1, ldv___platform_driver_register_23_~ldv_func_arg1#1.base, ldv___platform_driver_register_23_~ldv_func_arg1#1.offset, ldv___platform_driver_register_23_~ldv_func_arg2#1.base, ldv___platform_driver_register_23_~ldv_func_arg2#1.offset, ldv___platform_driver_register_23_~ldv_func_res~2#1, ldv___platform_driver_register_23_~tmp~24#1;ldv___platform_driver_register_23_~ldv_func_arg1#1.base, ldv___platform_driver_register_23_~ldv_func_arg1#1.offset := ldv___platform_driver_register_23_#in~ldv_func_arg1#1.base, ldv___platform_driver_register_23_#in~ldv_func_arg1#1.offset;ldv___platform_driver_register_23_~ldv_func_arg2#1.base, ldv___platform_driver_register_23_~ldv_func_arg2#1.offset := ldv___platform_driver_register_23_#in~ldv_func_arg2#1.base, ldv___platform_driver_register_23_#in~ldv_func_arg2#1.offset;havoc ldv___platform_driver_register_23_~ldv_func_res~2#1;havoc ldv___platform_driver_register_23_~tmp~24#1;assume { :begin_inline___platform_driver_register } true;__platform_driver_register_#in~arg0#1.base, __platform_driver_register_#in~arg0#1.offset, __platform_driver_register_#in~arg1#1.base, __platform_driver_register_#in~arg1#1.offset := ldv___platform_driver_register_23_~ldv_func_arg1#1.base, ldv___platform_driver_register_23_~ldv_func_arg1#1.offset, ldv___platform_driver_register_23_~ldv_func_arg2#1.base, ldv___platform_driver_register_23_~ldv_func_arg2#1.offset;havoc __platform_driver_register_#res#1;havoc __platform_driver_register_#t~nondet424#1, __platform_driver_register_~arg0#1.base, __platform_driver_register_~arg0#1.offset, __platform_driver_register_~arg1#1.base, __platform_driver_register_~arg1#1.offset;__platform_driver_register_~arg0#1.base, __platform_driver_register_~arg0#1.offset := __platform_driver_register_#in~arg0#1.base, __platform_driver_register_#in~arg0#1.offset;__platform_driver_register_~arg1#1.base, __platform_driver_register_~arg1#1.offset := __platform_driver_register_#in~arg1#1.base, __platform_driver_register_#in~arg1#1.offset;assume -2147483648 <= __platform_driver_register_#t~nondet424#1 && __platform_driver_register_#t~nondet424#1 <= 2147483647;__platform_driver_register_#res#1 := __platform_driver_register_#t~nondet424#1;havoc __platform_driver_register_#t~nondet424#1; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,140 INFO L290 TraceCheckUtils]: 11: Hoare triple {48314#(= ~ldv_spin~0 0)} ldv___platform_driver_register_23_#t~ret421#1 := __platform_driver_register_#res#1;assume { :end_inline___platform_driver_register } true;assume -2147483648 <= ldv___platform_driver_register_23_#t~ret421#1 && ldv___platform_driver_register_23_#t~ret421#1 <= 2147483647;ldv___platform_driver_register_23_~tmp~24#1 := ldv___platform_driver_register_23_#t~ret421#1;havoc ldv___platform_driver_register_23_#t~ret421#1;ldv___platform_driver_register_23_~ldv_func_res~2#1 := ldv___platform_driver_register_23_~tmp~24#1;~ldv_state_variable_3~0 := 1;assume { :begin_inline_ldv_initialize_platform_driver_3 } true;havoc ldv_initialize_platform_driver_3_#t~ret392#1.base, ldv_initialize_platform_driver_3_#t~ret392#1.offset, ldv_initialize_platform_driver_3_~tmp~19#1.base, ldv_initialize_platform_driver_3_~tmp~19#1.offset;havoc ldv_initialize_platform_driver_3_~tmp~19#1.base, ldv_initialize_platform_driver_3_~tmp~19#1.offset; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,141 INFO L272 TraceCheckUtils]: 12: Hoare triple {48314#(= ~ldv_spin~0 0)} call ldv_initialize_platform_driver_3_#t~ret392#1.base, ldv_initialize_platform_driver_3_#t~ret392#1.offset := ldv_zalloc(1464); {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,143 INFO L290 TraceCheckUtils]: 13: Hoare triple {48314#(= ~ldv_spin~0 0)} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,144 INFO L290 TraceCheckUtils]: 14: Hoare triple {48314#(= ~ldv_spin~0 0)} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,145 INFO L290 TraceCheckUtils]: 15: Hoare triple {48314#(= ~ldv_spin~0 0)} assume true; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,145 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {48314#(= ~ldv_spin~0 0)} {48314#(= ~ldv_spin~0 0)} #1791#return; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,146 INFO L290 TraceCheckUtils]: 17: Hoare triple {48314#(= ~ldv_spin~0 0)} ldv_initialize_platform_driver_3_~tmp~19#1.base, ldv_initialize_platform_driver_3_~tmp~19#1.offset := ldv_initialize_platform_driver_3_#t~ret392#1.base, ldv_initialize_platform_driver_3_#t~ret392#1.offset;havoc ldv_initialize_platform_driver_3_#t~ret392#1.base, ldv_initialize_platform_driver_3_#t~ret392#1.offset;~snd_serial_driver_group0~0.base, ~snd_serial_driver_group0~0.offset := ldv_initialize_platform_driver_3_~tmp~19#1.base, ldv_initialize_platform_driver_3_~tmp~19#1.offset; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,146 INFO L290 TraceCheckUtils]: 18: Hoare triple {48314#(= ~ldv_spin~0 0)} assume { :end_inline_ldv_initialize_platform_driver_3 } true;ldv___platform_driver_register_23_#res#1 := ldv___platform_driver_register_23_~ldv_func_res~2#1; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,146 INFO L290 TraceCheckUtils]: 19: Hoare triple {48314#(= ~ldv_spin~0 0)} alsa_card_serial_init_#t~ret376#1 := ldv___platform_driver_register_23_#res#1;assume { :end_inline_ldv___platform_driver_register_23 } true;assume -2147483648 <= alsa_card_serial_init_#t~ret376#1 && alsa_card_serial_init_#t~ret376#1 <= 2147483647;alsa_card_serial_init_~err~3#1 := alsa_card_serial_init_#t~ret376#1;havoc alsa_card_serial_init_#t~ret376#1; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,147 INFO L290 TraceCheckUtils]: 20: Hoare triple {48314#(= ~ldv_spin~0 0)} assume !(alsa_card_serial_init_~err~3#1 < 0);alsa_card_serial_init_~cards~0#1 := 0;alsa_card_serial_init_~i~1#1 := 0; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,147 INFO L290 TraceCheckUtils]: 21: Hoare triple {48314#(= ~ldv_spin~0 0)} assume alsa_card_serial_init_~i~1#1 <= 31; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,147 INFO L290 TraceCheckUtils]: 22: Hoare triple {48314#(= ~ldv_spin~0 0)} call alsa_card_serial_init_#t~mem377#1 := read~int(~#enable~0.base, ~#enable~0.offset + alsa_card_serial_init_~i~1#1, 1); {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,149 INFO L290 TraceCheckUtils]: 23: Hoare triple {48314#(= ~ldv_spin~0 0)} assume !(0 == alsa_card_serial_init_#t~mem377#1 % 256);havoc alsa_card_serial_init_#t~mem377#1;assume { :begin_inline_platform_device_register_simple } true;platform_device_register_simple_#in~name#1.base, platform_device_register_simple_#in~name#1.offset, platform_device_register_simple_#in~id___0#1, platform_device_register_simple_#in~res#1.base, platform_device_register_simple_#in~res#1.offset, platform_device_register_simple_#in~num#1 := 33, 0, alsa_card_serial_init_~i~1#1, 0, 0, 0;havoc platform_device_register_simple_#res#1.base, platform_device_register_simple_#res#1.offset;havoc platform_device_register_simple_#t~ret48#1.base, platform_device_register_simple_#t~ret48#1.offset, platform_device_register_simple_~name#1.base, platform_device_register_simple_~name#1.offset, platform_device_register_simple_~id___0#1, platform_device_register_simple_~res#1.base, platform_device_register_simple_~res#1.offset, platform_device_register_simple_~num#1, platform_device_register_simple_~tmp~7#1.base, platform_device_register_simple_~tmp~7#1.offset;platform_device_register_simple_~name#1.base, platform_device_register_simple_~name#1.offset := platform_device_register_simple_#in~name#1.base, platform_device_register_simple_#in~name#1.offset;platform_device_register_simple_~id___0#1 := platform_device_register_simple_#in~id___0#1;platform_device_register_simple_~res#1.base, platform_device_register_simple_~res#1.offset := platform_device_register_simple_#in~res#1.base, platform_device_register_simple_#in~res#1.offset;platform_device_register_simple_~num#1 := platform_device_register_simple_#in~num#1;havoc platform_device_register_simple_~tmp~7#1.base, platform_device_register_simple_~tmp~7#1.offset;assume { :begin_inline_platform_device_register_resndata } true;platform_device_register_resndata_#in~parent#1.base, platform_device_register_resndata_#in~parent#1.offset, platform_device_register_resndata_#in~name#1.base, platform_device_register_resndata_#in~name#1.offset, platform_device_register_resndata_#in~id___0#1, platform_device_register_resndata_#in~res#1.base, platform_device_register_resndata_#in~res#1.offset, platform_device_register_resndata_#in~num#1, platform_device_register_resndata_#in~data#1.base, platform_device_register_resndata_#in~data#1.offset, platform_device_register_resndata_#in~size#1 := 0, 0, platform_device_register_simple_~name#1.base, platform_device_register_simple_~name#1.offset, platform_device_register_simple_~id___0#1, platform_device_register_simple_~res#1.base, platform_device_register_simple_~res#1.offset, platform_device_register_simple_~num#1, 0, 0, 0;havoc platform_device_register_resndata_#res#1.base, platform_device_register_resndata_#res#1.offset;havoc platform_device_register_resndata_#t~ret47#1.base, platform_device_register_resndata_#t~ret47#1.offset, platform_device_register_resndata_~parent#1.base, platform_device_register_resndata_~parent#1.offset, platform_device_register_resndata_~name#1.base, platform_device_register_resndata_~name#1.offset, platform_device_register_resndata_~id___0#1, platform_device_register_resndata_~res#1.base, platform_device_register_resndata_~res#1.offset, platform_device_register_resndata_~num#1, platform_device_register_resndata_~data#1.base, platform_device_register_resndata_~data#1.offset, platform_device_register_resndata_~size#1, platform_device_register_resndata_~#pdevinfo~0#1.base, platform_device_register_resndata_~#pdevinfo~0#1.offset, platform_device_register_resndata_~tmp~6#1.base, platform_device_register_resndata_~tmp~6#1.offset;platform_device_register_resndata_~parent#1.base, platform_device_register_resndata_~parent#1.offset := platform_device_register_resndata_#in~parent#1.base, platform_device_register_resndata_#in~parent#1.offset;platform_device_register_resndata_~name#1.base, platform_device_register_resndata_~name#1.offset := platform_device_register_resndata_#in~name#1.base, platform_device_register_resndata_#in~name#1.offset;platform_device_register_resndata_~id___0#1 := platform_device_register_resndata_#in~id___0#1;platform_device_register_resndata_~res#1.base, platform_device_register_resndata_~res#1.offset := platform_device_register_resndata_#in~res#1.base, platform_device_register_resndata_#in~res#1.offset;platform_device_register_resndata_~num#1 := platform_device_register_resndata_#in~num#1;platform_device_register_resndata_~data#1.base, platform_device_register_resndata_~data#1.offset := platform_device_register_resndata_#in~data#1.base, platform_device_register_resndata_#in~data#1.offset;platform_device_register_resndata_~size#1 := platform_device_register_resndata_#in~size#1;call platform_device_register_resndata_~#pdevinfo~0#1.base, platform_device_register_resndata_~#pdevinfo~0#1.offset := #Ultimate.allocOnStack(64);havoc platform_device_register_resndata_~tmp~6#1.base, platform_device_register_resndata_~tmp~6#1.offset;call write~$Pointer$(platform_device_register_resndata_~parent#1.base, platform_device_register_resndata_~parent#1.offset, platform_device_register_resndata_~#pdevinfo~0#1.base, platform_device_register_resndata_~#pdevinfo~0#1.offset, 8);call write~$Pointer$(0, 0, platform_device_register_resndata_~#pdevinfo~0#1.base, 8 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 8);call write~$Pointer$(platform_device_register_resndata_~name#1.base, platform_device_register_resndata_~name#1.offset, platform_device_register_resndata_~#pdevinfo~0#1.base, 16 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 8);call write~int(platform_device_register_resndata_~id___0#1, platform_device_register_resndata_~#pdevinfo~0#1.base, 24 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 4);call write~$Pointer$(platform_device_register_resndata_~res#1.base, platform_device_register_resndata_~res#1.offset, platform_device_register_resndata_~#pdevinfo~0#1.base, 28 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 8);call write~int(platform_device_register_resndata_~num#1, platform_device_register_resndata_~#pdevinfo~0#1.base, 36 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 4);call write~$Pointer$(platform_device_register_resndata_~data#1.base, platform_device_register_resndata_~data#1.offset, platform_device_register_resndata_~#pdevinfo~0#1.base, 40 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 8);call write~int(platform_device_register_resndata_~size#1, platform_device_register_resndata_~#pdevinfo~0#1.base, 48 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 8);call write~int(0, platform_device_register_resndata_~#pdevinfo~0#1.base, 56 + platform_device_register_resndata_~#pdevinfo~0#1.offset, 8);assume { :begin_inline_platform_device_register_full } true;platform_device_register_full_#in~arg0#1.base, platform_device_register_full_#in~arg0#1.offset := platform_device_register_resndata_~#pdevinfo~0#1.base, platform_device_register_resndata_~#pdevinfo~0#1.offset;havoc platform_device_register_full_#res#1.base, platform_device_register_full_#res#1.offset;havoc platform_device_register_full_#t~ret429#1.base, platform_device_register_full_#t~ret429#1.offset, platform_device_register_full_~arg0#1.base, platform_device_register_full_~arg0#1.offset;platform_device_register_full_~arg0#1.base, platform_device_register_full_~arg0#1.offset := platform_device_register_full_#in~arg0#1.base, platform_device_register_full_#in~arg0#1.offset; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,150 INFO L272 TraceCheckUtils]: 24: Hoare triple {48314#(= ~ldv_spin~0 0)} call platform_device_register_full_#t~ret429#1.base, platform_device_register_full_#t~ret429#1.offset := ldv_malloc(1386); {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,150 INFO L290 TraceCheckUtils]: 25: Hoare triple {48314#(= ~ldv_spin~0 0)} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~1.base, ~tmp~1.offset;havoc ~tmp___0~0;assume -2147483648 <= #t~nondet27 && #t~nondet27 <= 2147483647;~tmp___0~0 := #t~nondet27;havoc #t~nondet27; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,150 INFO L290 TraceCheckUtils]: 26: Hoare triple {48314#(= ~ldv_spin~0 0)} assume 0 != ~tmp___0~0;#res.base, #res.offset := 0, 0; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,151 INFO L290 TraceCheckUtils]: 27: Hoare triple {48314#(= ~ldv_spin~0 0)} assume true; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,151 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {48314#(= ~ldv_spin~0 0)} {48314#(= ~ldv_spin~0 0)} #1793#return; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,151 INFO L290 TraceCheckUtils]: 29: Hoare triple {48314#(= ~ldv_spin~0 0)} platform_device_register_full_#res#1.base, platform_device_register_full_#res#1.offset := platform_device_register_full_#t~ret429#1.base, platform_device_register_full_#t~ret429#1.offset;havoc platform_device_register_full_#t~ret429#1.base, platform_device_register_full_#t~ret429#1.offset; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,152 INFO L290 TraceCheckUtils]: 30: Hoare triple {48314#(= ~ldv_spin~0 0)} platform_device_register_resndata_#t~ret47#1.base, platform_device_register_resndata_#t~ret47#1.offset := platform_device_register_full_#res#1.base, platform_device_register_full_#res#1.offset;assume { :end_inline_platform_device_register_full } true;platform_device_register_resndata_~tmp~6#1.base, platform_device_register_resndata_~tmp~6#1.offset := platform_device_register_resndata_#t~ret47#1.base, platform_device_register_resndata_#t~ret47#1.offset;havoc platform_device_register_resndata_#t~ret47#1.base, platform_device_register_resndata_#t~ret47#1.offset;platform_device_register_resndata_#res#1.base, platform_device_register_resndata_#res#1.offset := platform_device_register_resndata_~tmp~6#1.base, platform_device_register_resndata_~tmp~6#1.offset;call ULTIMATE.dealloc(platform_device_register_resndata_~#pdevinfo~0#1.base, platform_device_register_resndata_~#pdevinfo~0#1.offset);havoc platform_device_register_resndata_~#pdevinfo~0#1.base, platform_device_register_resndata_~#pdevinfo~0#1.offset; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,152 INFO L290 TraceCheckUtils]: 31: Hoare triple {48314#(= ~ldv_spin~0 0)} platform_device_register_simple_#t~ret48#1.base, platform_device_register_simple_#t~ret48#1.offset := platform_device_register_resndata_#res#1.base, platform_device_register_resndata_#res#1.offset;assume { :end_inline_platform_device_register_resndata } true;platform_device_register_simple_~tmp~7#1.base, platform_device_register_simple_~tmp~7#1.offset := platform_device_register_simple_#t~ret48#1.base, platform_device_register_simple_#t~ret48#1.offset;havoc platform_device_register_simple_#t~ret48#1.base, platform_device_register_simple_#t~ret48#1.offset;platform_device_register_simple_#res#1.base, platform_device_register_simple_#res#1.offset := platform_device_register_simple_~tmp~7#1.base, platform_device_register_simple_~tmp~7#1.offset; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,153 INFO L290 TraceCheckUtils]: 32: Hoare triple {48314#(= ~ldv_spin~0 0)} alsa_card_serial_init_#t~ret378#1.base, alsa_card_serial_init_#t~ret378#1.offset := platform_device_register_simple_#res#1.base, platform_device_register_simple_#res#1.offset;assume { :end_inline_platform_device_register_simple } true;alsa_card_serial_init_~device~0#1.base, alsa_card_serial_init_~device~0#1.offset := alsa_card_serial_init_#t~ret378#1.base, alsa_card_serial_init_#t~ret378#1.offset;havoc alsa_card_serial_init_#t~ret378#1.base, alsa_card_serial_init_#t~ret378#1.offset; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,153 INFO L272 TraceCheckUtils]: 33: Hoare triple {48314#(= ~ldv_spin~0 0)} call alsa_card_serial_init_#t~ret379#1 := IS_ERR(alsa_card_serial_init_~device~0#1.base, alsa_card_serial_init_~device~0#1.offset); {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,154 INFO L290 TraceCheckUtils]: 34: Hoare triple {48314#(= ~ldv_spin~0 0)} ~ptr#1.base, ~ptr#1.offset := #in~ptr#1.base, #in~ptr#1.offset;havoc ~tmp~0#1;assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := (if (~ptr#1.base + ~ptr#1.offset) % 18446744073709551616 > 18446744073709547520 then 1 else 0), 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,154 INFO L290 TraceCheckUtils]: 35: Hoare triple {48314#(= ~ldv_spin~0 0)} #t~ret9#1 := ldv__builtin_expect_#res#1;assume { :end_inline_ldv__builtin_expect } true;assume -9223372036854775808 <= #t~ret9#1 && #t~ret9#1 <= 9223372036854775807;~tmp~0#1 := #t~ret9#1;havoc #t~ret9#1;#res#1 := (if 0 == (if 0 != ~tmp~0#1 then 1 else 0) then 0 else 1); {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,154 INFO L290 TraceCheckUtils]: 36: Hoare triple {48314#(= ~ldv_spin~0 0)} assume true; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,155 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {48314#(= ~ldv_spin~0 0)} {48314#(= ~ldv_spin~0 0)} #1795#return; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,155 INFO L290 TraceCheckUtils]: 38: Hoare triple {48314#(= ~ldv_spin~0 0)} alsa_card_serial_init_~tmp~15#1 := alsa_card_serial_init_#t~ret379#1;havoc alsa_card_serial_init_#t~ret379#1; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,156 INFO L290 TraceCheckUtils]: 39: Hoare triple {48314#(= ~ldv_spin~0 0)} assume !(0 != alsa_card_serial_init_~tmp~15#1 % 256); {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,156 INFO L272 TraceCheckUtils]: 40: Hoare triple {48314#(= ~ldv_spin~0 0)} call alsa_card_serial_init_#t~ret380#1.base, alsa_card_serial_init_#t~ret380#1.offset := platform_get_drvdata(alsa_card_serial_init_~device~0#1.base, alsa_card_serial_init_~device~0#1.offset); {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,157 INFO L290 TraceCheckUtils]: 41: Hoare triple {48314#(= ~ldv_spin~0 0)} ~pdev#1.base, ~pdev#1.offset := #in~pdev#1.base, #in~pdev#1.offset;havoc ~tmp~8#1.base, ~tmp~8#1.offset;assume { :begin_inline_dev_get_drvdata } true;dev_get_drvdata_#in~dev#1.base, dev_get_drvdata_#in~dev#1.offset := ~pdev#1.base, 13 + ~pdev#1.offset;havoc dev_get_drvdata_#res#1.base, dev_get_drvdata_#res#1.offset;havoc dev_get_drvdata_#t~mem44#1.base, dev_get_drvdata_#t~mem44#1.offset, dev_get_drvdata_~dev#1.base, dev_get_drvdata_~dev#1.offset;dev_get_drvdata_~dev#1.base, dev_get_drvdata_~dev#1.offset := dev_get_drvdata_#in~dev#1.base, dev_get_drvdata_#in~dev#1.offset;call dev_get_drvdata_#t~mem44#1.base, dev_get_drvdata_#t~mem44#1.offset := read~$Pointer$(dev_get_drvdata_~dev#1.base, 489 + dev_get_drvdata_~dev#1.offset, 8);dev_get_drvdata_#res#1.base, dev_get_drvdata_#res#1.offset := dev_get_drvdata_#t~mem44#1.base, dev_get_drvdata_#t~mem44#1.offset;havoc dev_get_drvdata_#t~mem44#1.base, dev_get_drvdata_#t~mem44#1.offset; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,157 INFO L290 TraceCheckUtils]: 42: Hoare triple {48314#(= ~ldv_spin~0 0)} #t~ret52#1.base, #t~ret52#1.offset := dev_get_drvdata_#res#1.base, dev_get_drvdata_#res#1.offset;assume { :end_inline_dev_get_drvdata } true;~tmp~8#1.base, ~tmp~8#1.offset := #t~ret52#1.base, #t~ret52#1.offset;havoc #t~ret52#1.base, #t~ret52#1.offset;#res#1.base, #res#1.offset := ~tmp~8#1.base, ~tmp~8#1.offset; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,157 INFO L290 TraceCheckUtils]: 43: Hoare triple {48314#(= ~ldv_spin~0 0)} assume true; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,158 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {48314#(= ~ldv_spin~0 0)} {48314#(= ~ldv_spin~0 0)} #1797#return; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,158 INFO L290 TraceCheckUtils]: 45: Hoare triple {48314#(= ~ldv_spin~0 0)} alsa_card_serial_init_~tmp___0~5#1.base, alsa_card_serial_init_~tmp___0~5#1.offset := alsa_card_serial_init_#t~ret380#1.base, alsa_card_serial_init_#t~ret380#1.offset;havoc alsa_card_serial_init_#t~ret380#1.base, alsa_card_serial_init_#t~ret380#1.offset; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,159 INFO L290 TraceCheckUtils]: 46: Hoare triple {48314#(= ~ldv_spin~0 0)} assume !(0 == (alsa_card_serial_init_~tmp___0~5#1.base + alsa_card_serial_init_~tmp___0~5#1.offset) % 18446744073709551616);call write~$Pointer$(alsa_card_serial_init_~device~0#1.base, alsa_card_serial_init_~device~0#1.offset, ~#devices~0.base, ~#devices~0.offset + 8 * alsa_card_serial_init_~i~1#1, 8);alsa_card_serial_init_~cards~0#1 := 1 + alsa_card_serial_init_~cards~0#1; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,159 INFO L290 TraceCheckUtils]: 47: Hoare triple {48314#(= ~ldv_spin~0 0)} alsa_card_serial_init_~i~1#1 := 1 + alsa_card_serial_init_~i~1#1; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,159 INFO L290 TraceCheckUtils]: 48: Hoare triple {48314#(= ~ldv_spin~0 0)} assume !(alsa_card_serial_init_~i~1#1 <= 31); {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,160 INFO L290 TraceCheckUtils]: 49: Hoare triple {48314#(= ~ldv_spin~0 0)} assume !(0 == alsa_card_serial_init_~cards~0#1);alsa_card_serial_init_#res#1 := 0; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,160 INFO L290 TraceCheckUtils]: 50: Hoare triple {48314#(= ~ldv_spin~0 0)} main_#t~ret409#1 := alsa_card_serial_init_#res#1;assume { :end_inline_alsa_card_serial_init } true;assume -2147483648 <= main_#t~ret409#1 && main_#t~ret409#1 <= 2147483647;~ldv_retval_2~0 := main_#t~ret409#1;havoc main_#t~ret409#1; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,160 INFO L290 TraceCheckUtils]: 51: Hoare triple {48314#(= ~ldv_spin~0 0)} assume !(0 != ~ldv_retval_2~0); {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,161 INFO L290 TraceCheckUtils]: 52: Hoare triple {48314#(= ~ldv_spin~0 0)} assume 0 == ~ldv_retval_2~0;~ldv_state_variable_0~0 := 2;~ldv_state_variable_5~0 := 1;assume { :begin_inline_ldv_initialize_snd_rawmidi_ops_5 } true;havoc ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.base, ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.offset, ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.base, ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.offset;havoc ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.base, ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.offset; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,161 INFO L272 TraceCheckUtils]: 53: Hoare triple {48314#(= ~ldv_spin~0 0)} call ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.base, ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.offset := ldv_zalloc(112); {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,161 INFO L290 TraceCheckUtils]: 54: Hoare triple {48314#(= ~ldv_spin~0 0)} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,162 INFO L290 TraceCheckUtils]: 55: Hoare triple {48314#(= ~ldv_spin~0 0)} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,162 INFO L290 TraceCheckUtils]: 56: Hoare triple {48314#(= ~ldv_spin~0 0)} assume true; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,163 INFO L284 TraceCheckUtils]: 57: Hoare quadruple {48314#(= ~ldv_spin~0 0)} {48314#(= ~ldv_spin~0 0)} #1803#return; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,163 INFO L290 TraceCheckUtils]: 58: Hoare triple {48314#(= ~ldv_spin~0 0)} ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.base, ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.offset := ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.base, ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.offset;havoc ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.base, ldv_initialize_snd_rawmidi_ops_5_#t~ret386#1.offset;~snd_uart16550_output_group0~0.base, ~snd_uart16550_output_group0~0.offset := ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.base, ldv_initialize_snd_rawmidi_ops_5_~tmp~16#1.offset; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,163 INFO L290 TraceCheckUtils]: 59: Hoare triple {48314#(= ~ldv_spin~0 0)} assume { :end_inline_ldv_initialize_snd_rawmidi_ops_5 } true;~ldv_state_variable_4~0 := 1;assume { :begin_inline_ldv_initialize_snd_rawmidi_ops_4 } true;havoc ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.base, ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.offset, ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.base, ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.offset;havoc ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.base, ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.offset; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,164 INFO L272 TraceCheckUtils]: 60: Hoare triple {48314#(= ~ldv_spin~0 0)} call ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.base, ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.offset := ldv_zalloc(112); {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,164 INFO L290 TraceCheckUtils]: 61: Hoare triple {48314#(= ~ldv_spin~0 0)} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet30#1 && #t~nondet30#1 <= 2147483647;~tmp___0~1#1 := #t~nondet30#1;havoc #t~nondet30#1; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,165 INFO L290 TraceCheckUtils]: 62: Hoare triple {48314#(= ~ldv_spin~0 0)} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,165 INFO L290 TraceCheckUtils]: 63: Hoare triple {48314#(= ~ldv_spin~0 0)} assume true; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,165 INFO L284 TraceCheckUtils]: 64: Hoare quadruple {48314#(= ~ldv_spin~0 0)} {48314#(= ~ldv_spin~0 0)} #1805#return; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,166 INFO L290 TraceCheckUtils]: 65: Hoare triple {48314#(= ~ldv_spin~0 0)} ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.base, ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.offset := ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.base, ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.offset;havoc ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.base, ldv_initialize_snd_rawmidi_ops_4_#t~ret388#1.offset;~snd_uart16550_input_group0~0.base, ~snd_uart16550_input_group0~0.offset := ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.base, ldv_initialize_snd_rawmidi_ops_4_~tmp~17#1.offset; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,166 INFO L290 TraceCheckUtils]: 66: Hoare triple {48314#(= ~ldv_spin~0 0)} assume { :end_inline_ldv_initialize_snd_rawmidi_ops_4 } true; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,166 INFO L290 TraceCheckUtils]: 67: Hoare triple {48314#(= ~ldv_spin~0 0)} assume -2147483648 <= main_#t~nondet401#1 && main_#t~nondet401#1 <= 2147483647;main_~tmp___1~2#1 := main_#t~nondet401#1;havoc main_#t~nondet401#1;main_#t~switch402#1 := 0 == main_~tmp___1~2#1; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,167 INFO L290 TraceCheckUtils]: 68: Hoare triple {48314#(= ~ldv_spin~0 0)} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 1 == main_~tmp___1~2#1; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,167 INFO L290 TraceCheckUtils]: 69: Hoare triple {48314#(= ~ldv_spin~0 0)} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 2 == main_~tmp___1~2#1; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,168 INFO L290 TraceCheckUtils]: 70: Hoare triple {48314#(= ~ldv_spin~0 0)} assume !main_#t~switch402#1;main_#t~switch402#1 := main_#t~switch402#1 || 3 == main_~tmp___1~2#1; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,168 INFO L290 TraceCheckUtils]: 71: Hoare triple {48314#(= ~ldv_spin~0 0)} assume main_#t~switch402#1; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,168 INFO L290 TraceCheckUtils]: 72: Hoare triple {48314#(= ~ldv_spin~0 0)} assume 0 != ~ldv_state_variable_3~0;assume -2147483648 <= main_#t~nondet410#1 && main_#t~nondet410#1 <= 2147483647;main_~tmp___4~0#1 := main_#t~nondet410#1;havoc main_#t~nondet410#1;main_#t~switch411#1 := 0 == main_~tmp___4~0#1; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,169 INFO L290 TraceCheckUtils]: 73: Hoare triple {48314#(= ~ldv_spin~0 0)} assume main_#t~switch411#1; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,169 INFO L290 TraceCheckUtils]: 74: Hoare triple {48314#(= ~ldv_spin~0 0)} assume 1 == ~ldv_state_variable_3~0;assume { :begin_inline_snd_serial_probe } true;snd_serial_probe_#in~devptr#1.base, snd_serial_probe_#in~devptr#1.offset := ~snd_serial_driver_group0~0.base, ~snd_serial_driver_group0~0.offset;havoc snd_serial_probe_#res#1;havoc snd_serial_probe_#t~mem326#1, snd_serial_probe_#t~mem327#1, snd_serial_probe_#t~switch328#1, snd_serial_probe_#t~mem329#1, snd_serial_probe_#t~mem330#1, snd_serial_probe_#t~mem331#1, snd_serial_probe_#t~short332#1, snd_serial_probe_#t~mem333#1, snd_serial_probe_#t~mem334#1, snd_serial_probe_#t~mem335#1, snd_serial_probe_#t~short336#1, snd_serial_probe_#t~mem337#1, snd_serial_probe_#t~mem338#1, snd_serial_probe_#t~mem339#1.base, snd_serial_probe_#t~mem339#1.offset, snd_serial_probe_#t~ret340#1, snd_serial_probe_#t~mem341#1.base, snd_serial_probe_#t~mem341#1.offset, snd_serial_probe_#t~strcpy~res342#1.base, snd_serial_probe_#t~strcpy~res342#1.offset, snd_serial_probe_#t~mem343#1.base, snd_serial_probe_#t~mem343#1.offset, snd_serial_probe_#t~strcpy~res344#1.base, snd_serial_probe_#t~strcpy~res344#1.offset, snd_serial_probe_#t~mem345#1.base, snd_serial_probe_#t~mem345#1.offset, snd_serial_probe_#t~mem346#1, snd_serial_probe_#t~mem347#1, snd_serial_probe_#t~mem348#1, snd_serial_probe_#t~mem349#1, snd_serial_probe_#t~mem350#1, snd_serial_probe_#t~mem351#1, snd_serial_probe_#t~ret352#1, snd_serial_probe_#t~mem353#1.base, snd_serial_probe_#t~mem353#1.offset, snd_serial_probe_#t~mem354#1, snd_serial_probe_#t~mem355#1, snd_serial_probe_#t~mem356#1.base, snd_serial_probe_#t~mem356#1.offset, snd_serial_probe_#t~ret357#1, snd_serial_probe_#t~nondet358#1, snd_serial_probe_#t~mem359#1.base, snd_serial_probe_#t~mem359#1.offset, snd_serial_probe_#t~mem360#1.base, snd_serial_probe_#t~mem360#1.offset, snd_serial_probe_#t~mem361#1.base, snd_serial_probe_#t~mem361#1.offset, snd_serial_probe_#t~mem362#1, snd_serial_probe_#t~mem363#1.base, snd_serial_probe_#t~mem363#1.offset, snd_serial_probe_#t~mem364#1.base, snd_serial_probe_#t~mem364#1.offset, snd_serial_probe_#t~mem365#1, snd_serial_probe_#t~mem366#1.base, snd_serial_probe_#t~mem366#1.offset, snd_serial_probe_#t~mem367#1, snd_serial_probe_#t~mem368#1.base, snd_serial_probe_#t~mem368#1.offset, snd_serial_probe_#t~ret369#1, snd_serial_probe_#t~mem370#1.base, snd_serial_probe_#t~mem370#1.offset, snd_serial_probe_#t~mem371#1.base, snd_serial_probe_#t~mem371#1.offset, snd_serial_probe_#t~ret372#1, snd_serial_probe_~devptr#1.base, snd_serial_probe_~devptr#1.offset, snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset, snd_serial_probe_~#uart~11#1.base, snd_serial_probe_~#uart~11#1.offset, snd_serial_probe_~err~2#1, snd_serial_probe_~dev~0#1;snd_serial_probe_~devptr#1.base, snd_serial_probe_~devptr#1.offset := snd_serial_probe_#in~devptr#1.base, snd_serial_probe_#in~devptr#1.offset;call snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset := #Ultimate.allocOnStack(8);call snd_serial_probe_~#uart~11#1.base, snd_serial_probe_~#uart~11#1.offset := #Ultimate.allocOnStack(8);havoc snd_serial_probe_~err~2#1;havoc snd_serial_probe_~dev~0#1;call snd_serial_probe_#t~mem326#1 := read~int(snd_serial_probe_~devptr#1.base, 8 + snd_serial_probe_~devptr#1.offset, 4);snd_serial_probe_~dev~0#1 := snd_serial_probe_#t~mem326#1;havoc snd_serial_probe_#t~mem326#1;call snd_serial_probe_#t~mem327#1 := read~int(~#adaptor~0.base, ~#adaptor~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);snd_serial_probe_#t~switch328#1 := 0 == snd_serial_probe_#t~mem327#1; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,170 INFO L290 TraceCheckUtils]: 75: Hoare triple {48314#(= ~ldv_spin~0 0)} assume snd_serial_probe_#t~switch328#1;call write~int(1, ~#ins~0.base, ~#ins~0.offset + 4 * snd_serial_probe_~dev~0#1, 4); {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,177 INFO L290 TraceCheckUtils]: 76: Hoare triple {48314#(= ~ldv_spin~0 0)} call snd_serial_probe_#t~mem330#1 := read~int(~#outs~0.base, ~#outs~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);snd_serial_probe_#t~short332#1 := snd_serial_probe_#t~mem330#1 <= 0; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,178 INFO L290 TraceCheckUtils]: 77: Hoare triple {48314#(= ~ldv_spin~0 0)} assume !snd_serial_probe_#t~short332#1;call snd_serial_probe_#t~mem331#1 := read~int(~#outs~0.base, ~#outs~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);snd_serial_probe_#t~short332#1 := snd_serial_probe_#t~mem331#1 > 16; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,178 INFO L290 TraceCheckUtils]: 78: Hoare triple {48314#(= ~ldv_spin~0 0)} assume !snd_serial_probe_#t~short332#1;havoc snd_serial_probe_#t~mem330#1;havoc snd_serial_probe_#t~mem331#1;havoc snd_serial_probe_#t~short332#1;call snd_serial_probe_#t~mem334#1 := read~int(~#ins~0.base, ~#ins~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);snd_serial_probe_#t~short336#1 := snd_serial_probe_#t~mem334#1 <= 0; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,179 INFO L290 TraceCheckUtils]: 79: Hoare triple {48314#(= ~ldv_spin~0 0)} assume !snd_serial_probe_#t~short336#1;call snd_serial_probe_#t~mem335#1 := read~int(~#ins~0.base, ~#ins~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);snd_serial_probe_#t~short336#1 := snd_serial_probe_#t~mem335#1 > 16; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,179 INFO L290 TraceCheckUtils]: 80: Hoare triple {48314#(= ~ldv_spin~0 0)} assume !snd_serial_probe_#t~short336#1;havoc snd_serial_probe_#t~mem334#1;havoc snd_serial_probe_#t~mem335#1;havoc snd_serial_probe_#t~short336#1;call snd_serial_probe_#t~mem338#1 := read~int(~#index~0.base, ~#index~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem339#1.base, snd_serial_probe_#t~mem339#1.offset := read~$Pointer$(~#id~0.base, ~#id~0.offset + 8 * snd_serial_probe_~dev~0#1, 8);assume { :begin_inline_snd_card_new } true;snd_card_new_#in~arg0#1.base, snd_card_new_#in~arg0#1.offset, snd_card_new_#in~arg1#1, snd_card_new_#in~arg2#1.base, snd_card_new_#in~arg2#1.offset, snd_card_new_#in~arg3#1.base, snd_card_new_#in~arg3#1.offset, snd_card_new_#in~arg4#1, snd_card_new_#in~arg5#1.base, snd_card_new_#in~arg5#1.offset := snd_serial_probe_~devptr#1.base, 13 + snd_serial_probe_~devptr#1.offset, snd_serial_probe_#t~mem338#1, snd_serial_probe_#t~mem339#1.base, snd_serial_probe_#t~mem339#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 0, snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset;havoc snd_card_new_#res#1;havoc snd_card_new_#t~nondet433#1, snd_card_new_~arg0#1.base, snd_card_new_~arg0#1.offset, snd_card_new_~arg1#1, snd_card_new_~arg2#1.base, snd_card_new_~arg2#1.offset, snd_card_new_~arg3#1.base, snd_card_new_~arg3#1.offset, snd_card_new_~arg4#1, snd_card_new_~arg5#1.base, snd_card_new_~arg5#1.offset;snd_card_new_~arg0#1.base, snd_card_new_~arg0#1.offset := snd_card_new_#in~arg0#1.base, snd_card_new_#in~arg0#1.offset;snd_card_new_~arg1#1 := snd_card_new_#in~arg1#1;snd_card_new_~arg2#1.base, snd_card_new_~arg2#1.offset := snd_card_new_#in~arg2#1.base, snd_card_new_#in~arg2#1.offset;snd_card_new_~arg3#1.base, snd_card_new_~arg3#1.offset := snd_card_new_#in~arg3#1.base, snd_card_new_#in~arg3#1.offset;snd_card_new_~arg4#1 := snd_card_new_#in~arg4#1;snd_card_new_~arg5#1.base, snd_card_new_~arg5#1.offset := snd_card_new_#in~arg5#1.base, snd_card_new_#in~arg5#1.offset;assume -2147483648 <= snd_card_new_#t~nondet433#1 && snd_card_new_#t~nondet433#1 <= 2147483647;snd_card_new_#res#1 := snd_card_new_#t~nondet433#1;havoc snd_card_new_#t~nondet433#1; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,180 INFO L290 TraceCheckUtils]: 81: Hoare triple {48314#(= ~ldv_spin~0 0)} snd_serial_probe_#t~ret340#1 := snd_card_new_#res#1;assume { :end_inline_snd_card_new } true;assume -2147483648 <= snd_serial_probe_#t~ret340#1 && snd_serial_probe_#t~ret340#1 <= 2147483647;snd_serial_probe_~err~2#1 := snd_serial_probe_#t~ret340#1;havoc snd_serial_probe_#t~mem338#1;havoc snd_serial_probe_#t~mem339#1.base, snd_serial_probe_#t~mem339#1.offset;havoc snd_serial_probe_#t~ret340#1; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,180 INFO L290 TraceCheckUtils]: 82: Hoare triple {48314#(= ~ldv_spin~0 0)} assume !(snd_serial_probe_~err~2#1 < 0);call snd_serial_probe_#t~mem341#1.base, snd_serial_probe_#t~mem341#1.offset := read~$Pointer$(snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset, 8); {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,181 INFO L272 TraceCheckUtils]: 83: Hoare triple {48314#(= ~ldv_spin~0 0)} call snd_serial_probe_#t~strcpy~res342#1.base, snd_serial_probe_#t~strcpy~res342#1.offset := #Ultimate.C_strcpy(snd_serial_probe_#t~mem341#1.base, 20 + snd_serial_probe_#t~mem341#1.offset, 29, 0); {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,181 INFO L290 TraceCheckUtils]: 84: Hoare triple {48314#(= ~ldv_spin~0 0)} #t~offset444 := 0; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,182 INFO L290 TraceCheckUtils]: 85: Hoare triple {48314#(= ~ldv_spin~0 0)} call #t~mem445 := read~int(src.base, src.offset + #t~offset444, 1);call write~unchecked~int(#t~mem445, dest.base, dest.offset + #t~offset444, 1); {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,185 INFO L290 TraceCheckUtils]: 86: Hoare triple {48314#(= ~ldv_spin~0 0)} assume 0 == #t~mem445; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,186 INFO L290 TraceCheckUtils]: 87: Hoare triple {48314#(= ~ldv_spin~0 0)} assume #res.base == dest.base && #res.offset == dest.offset; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,186 INFO L284 TraceCheckUtils]: 88: Hoare quadruple {48314#(= ~ldv_spin~0 0)} {48314#(= ~ldv_spin~0 0)} #1809#return; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,187 INFO L290 TraceCheckUtils]: 89: Hoare triple {48314#(= ~ldv_spin~0 0)} havoc snd_serial_probe_#t~mem341#1.base, snd_serial_probe_#t~mem341#1.offset;havoc snd_serial_probe_#t~strcpy~res342#1.base, snd_serial_probe_#t~strcpy~res342#1.offset;call snd_serial_probe_#t~mem343#1.base, snd_serial_probe_#t~mem343#1.offset := read~$Pointer$(snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset, 8); {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,187 INFO L272 TraceCheckUtils]: 90: Hoare triple {48314#(= ~ldv_spin~0 0)} call snd_serial_probe_#t~strcpy~res344#1.base, snd_serial_probe_#t~strcpy~res344#1.offset := #Ultimate.C_strcpy(snd_serial_probe_#t~mem343#1.base, 36 + snd_serial_probe_#t~mem343#1.offset, 30, 0); {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,188 INFO L290 TraceCheckUtils]: 91: Hoare triple {48314#(= ~ldv_spin~0 0)} #t~offset444 := 0; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,188 INFO L290 TraceCheckUtils]: 92: Hoare triple {48314#(= ~ldv_spin~0 0)} call #t~mem445 := read~int(src.base, src.offset + #t~offset444, 1);call write~unchecked~int(#t~mem445, dest.base, dest.offset + #t~offset444, 1); {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,189 INFO L290 TraceCheckUtils]: 93: Hoare triple {48314#(= ~ldv_spin~0 0)} assume 0 == #t~mem445; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,189 INFO L290 TraceCheckUtils]: 94: Hoare triple {48314#(= ~ldv_spin~0 0)} assume #res.base == dest.base && #res.offset == dest.offset; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,190 INFO L284 TraceCheckUtils]: 95: Hoare quadruple {48314#(= ~ldv_spin~0 0)} {48314#(= ~ldv_spin~0 0)} #1811#return; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,191 INFO L290 TraceCheckUtils]: 96: Hoare triple {48314#(= ~ldv_spin~0 0)} havoc snd_serial_probe_#t~mem343#1.base, snd_serial_probe_#t~mem343#1.offset;havoc snd_serial_probe_#t~strcpy~res344#1.base, snd_serial_probe_#t~strcpy~res344#1.offset;call snd_serial_probe_#t~mem345#1.base, snd_serial_probe_#t~mem345#1.offset := read~$Pointer$(snd_serial_probe_~#card~0#1.base, snd_serial_probe_~#card~0#1.offset, 8);call snd_serial_probe_#t~mem346#1 := read~int(~#port~0.base, ~#port~0.offset + 8 * snd_serial_probe_~dev~0#1, 8);call snd_serial_probe_#t~mem347#1 := read~int(~#irq~0.base, ~#irq~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem348#1 := read~int(~#speed~0.base, ~#speed~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem349#1 := read~int(~#base~0.base, ~#base~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem350#1 := read~int(~#adaptor~0.base, ~#adaptor~0.offset + 4 * snd_serial_probe_~dev~0#1, 4);call snd_serial_probe_#t~mem351#1 := read~int(~#droponfull~0.base, ~#droponfull~0.offset + snd_serial_probe_~dev~0#1, 1);assume { :begin_inline_snd_uart16550_create } true;snd_uart16550_create_#in~card#1.base, snd_uart16550_create_#in~card#1.offset, snd_uart16550_create_#in~iobase#1, snd_uart16550_create_#in~irq___0#1, snd_uart16550_create_#in~speed___0#1, snd_uart16550_create_#in~base___0#1, snd_uart16550_create_#in~adaptor___0#1, snd_uart16550_create_#in~droponfull___0#1, snd_uart16550_create_#in~ruart#1.base, snd_uart16550_create_#in~ruart#1.offset := snd_serial_probe_#t~mem345#1.base, snd_serial_probe_#t~mem345#1.offset, snd_serial_probe_#t~mem346#1, snd_serial_probe_#t~mem347#1, snd_serial_probe_#t~mem348#1, snd_serial_probe_#t~mem349#1, snd_serial_probe_#t~mem350#1, snd_serial_probe_#t~mem351#1 % 256, snd_serial_probe_~#uart~11#1.base, snd_serial_probe_~#uart~11#1.offset;havoc snd_uart16550_create_#res#1;havoc snd_uart16550_create_#t~ret296#1.base, snd_uart16550_create_#t~ret296#1.offset, snd_uart16550_create_#t~ret297#1.base, snd_uart16550_create_#t~ret297#1.offset, snd_uart16550_create_#t~ret298#1, snd_uart16550_create_#t~nondet299#1, snd_uart16550_create_#t~ret300#1, snd_uart16550_create_#t~ret301#1, snd_uart16550_create_#t~mem302#1, snd_uart16550_create_#t~memset~res303#1.base, snd_uart16550_create_#t~memset~res303#1.offset, snd_uart16550_create_#t~ret304#1, snd_uart16550_create_#t~ret305#1, snd_uart16550_create_#t~ret306#1, snd_uart16550_create_#t~mem307#1, snd_uart16550_create_#t~switch308#1, snd_uart16550_create_#t~mem309#1, snd_uart16550_create_#t~mem310#1, snd_uart16550_create_~card#1.base, snd_uart16550_create_~card#1.offset, snd_uart16550_create_~iobase#1, snd_uart16550_create_~irq___0#1, snd_uart16550_create_~speed___0#1, snd_uart16550_create_~base___0#1, snd_uart16550_create_~adaptor___0#1, snd_uart16550_create_~droponfull___0#1, snd_uart16550_create_~ruart#1.base, snd_uart16550_create_~ruart#1.offset, snd_uart16550_create_~#ops~0#1.base, snd_uart16550_create_~#ops~0#1.offset, snd_uart16550_create_~uart~10#1.base, snd_uart16550_create_~uart~10#1.offset, snd_uart16550_create_~err~0#1, snd_uart16550_create_~tmp~13#1.base, snd_uart16550_create_~tmp~13#1.offset, snd_uart16550_create_~#__key~0#1.base, snd_uart16550_create_~#__key~0#1.offset, snd_uart16550_create_~tmp___0~4#1;snd_uart16550_create_~card#1.base, snd_uart16550_create_~card#1.offset := snd_uart16550_create_#in~card#1.base, snd_uart16550_create_#in~card#1.offset;snd_uart16550_create_~iobase#1 := snd_uart16550_create_#in~iobase#1;snd_uart16550_create_~irq___0#1 := snd_uart16550_create_#in~irq___0#1;snd_uart16550_create_~speed___0#1 := snd_uart16550_create_#in~speed___0#1;snd_uart16550_create_~base___0#1 := snd_uart16550_create_#in~base___0#1;snd_uart16550_create_~adaptor___0#1 := snd_uart16550_create_#in~adaptor___0#1;snd_uart16550_create_~droponfull___0#1 := snd_uart16550_create_#in~droponfull___0#1;snd_uart16550_create_~ruart#1.base, snd_uart16550_create_~ruart#1.offset := snd_uart16550_create_#in~ruart#1.base, snd_uart16550_create_#in~ruart#1.offset;call snd_uart16550_create_~#ops~0#1.base, snd_uart16550_create_~#ops~0#1.offset := #Ultimate.allocOnStack(24);havoc snd_uart16550_create_~uart~10#1.base, snd_uart16550_create_~uart~10#1.offset;havoc snd_uart16550_create_~err~0#1;havoc snd_uart16550_create_~tmp~13#1.base, snd_uart16550_create_~tmp~13#1.offset;call snd_uart16550_create_~#__key~0#1.base, snd_uart16550_create_~#__key~0#1.offset := #Ultimate.allocOnStack(8);havoc snd_uart16550_create_~tmp___0~4#1;call write~$Pointer$(#funAddr~snd_uart16550_dev_free.base, #funAddr~snd_uart16550_dev_free.offset, snd_uart16550_create_~#ops~0#1.base, snd_uart16550_create_~#ops~0#1.offset, 8);call write~$Pointer$(0, 0, snd_uart16550_create_~#ops~0#1.base, 8 + snd_uart16550_create_~#ops~0#1.offset, 8);call write~$Pointer$(0, 0, snd_uart16550_create_~#ops~0#1.base, 16 + snd_uart16550_create_~#ops~0#1.offset, 8);assume { :begin_inline_kzalloc } true;kzalloc_#in~size#1, kzalloc_#in~flags#1 := 33344, 208;havoc kzalloc_#res#1.base, kzalloc_#res#1.offset;havoc kzalloc_~size#1, kzalloc_~flags#1;kzalloc_~size#1 := kzalloc_#in~size#1;kzalloc_~flags#1 := kzalloc_#in~flags#1;assume { :begin_inline_ldv_check_alloc_flags } true;ldv_check_alloc_flags_#in~flags#1 := kzalloc_~flags#1;havoc ldv_check_alloc_flags_~flags#1;ldv_check_alloc_flags_~flags#1 := ldv_check_alloc_flags_#in~flags#1; {48314#(= ~ldv_spin~0 0)} is VALID [2022-02-20 22:04:17,191 INFO L290 TraceCheckUtils]: 97: Hoare triple {48314#(= ~ldv_spin~0 0)} assume !(0 == ~ldv_spin~0 || 0 == (if 0 == ldv_check_alloc_flags_~flags#1 then 0 else (if 1 == ldv_check_alloc_flags_~flags#1 then 0 else ~bitwiseAnd(ldv_check_alloc_flags_~flags#1, 16))) % 4294967296); {48271#false} is VALID [2022-02-20 22:04:17,191 INFO L272 TraceCheckUtils]: 98: Hoare triple {48271#false} call ldv_error(); {48271#false} is VALID [2022-02-20 22:04:17,191 INFO L290 TraceCheckUtils]: 99: Hoare triple {48271#false} assume !false; {48271#false} is VALID [2022-02-20 22:04:17,192 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2022-02-20 22:04:17,192 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-02-20 22:04:17,192 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [328834704] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:04:17,192 INFO L191 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-02-20 22:04:17,192 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [7] total 8 [2022-02-20 22:04:17,193 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1274636156] [2022-02-20 22:04:17,193 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:04:17,194 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 23.333333333333332) internal successors, (70), 2 states have internal predecessors, (70), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 1 states have call predecessors, (8), 1 states have call successors, (8) Word has length 100 [2022-02-20 22:04:17,194 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:04:17,194 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 23.333333333333332) internal successors, (70), 2 states have internal predecessors, (70), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 1 states have call predecessors, (8), 1 states have call successors, (8) [2022-02-20 22:04:17,276 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 87 edges. 87 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:04:17,276 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-02-20 22:04:17,276 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:04:17,276 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-02-20 22:04:17,277 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-02-20 22:04:17,277 INFO L87 Difference]: Start difference. First operand 1061 states and 1522 transitions. Second operand has 3 states, 3 states have (on average 23.333333333333332) internal successors, (70), 2 states have internal predecessors, (70), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 1 states have call predecessors, (8), 1 states have call successors, (8) [2022-02-20 22:04:18,467 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:04:18,468 INFO L93 Difference]: Finished difference Result 1067 states and 1526 transitions. [2022-02-20 22:04:18,468 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-02-20 22:04:18,468 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 23.333333333333332) internal successors, (70), 2 states have internal predecessors, (70), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 1 states have call predecessors, (8), 1 states have call successors, (8) Word has length 100 [2022-02-20 22:04:18,468 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 22:04:18,469 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 23.333333333333332) internal successors, (70), 2 states have internal predecessors, (70), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 1 states have call predecessors, (8), 1 states have call successors, (8) [2022-02-20 22:04:18,476 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 904 transitions. [2022-02-20 22:04:18,476 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 23.333333333333332) internal successors, (70), 2 states have internal predecessors, (70), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 1 states have call predecessors, (8), 1 states have call successors, (8) [2022-02-20 22:04:18,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 904 transitions. [2022-02-20 22:04:18,482 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 904 transitions. [2022-02-20 22:04:19,002 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 904 edges. 904 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:04:19,002 INFO L225 Difference]: With dead ends: 1067 [2022-02-20 22:04:19,002 INFO L226 Difference]: Without dead ends: 0 [2022-02-20 22:04:19,005 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 119 GetRequests, 113 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-02-20 22:04:19,005 INFO L933 BasicCegarLoop]: 900 mSDtfsCounter, 393 mSDsluCounter, 422 mSDsCounter, 0 mSdLazyCounter, 2 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 393 SdHoareTripleChecker+Valid, 1322 SdHoareTripleChecker+Invalid, 3 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 2 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-02-20 22:04:19,005 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [393 Valid, 1322 Invalid, 3 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 2 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-02-20 22:04:19,006 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 0 states. [2022-02-20 22:04:19,006 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 0 to 0. [2022-02-20 22:04:19,007 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 22:04:19,007 INFO L82 GeneralOperation]: Start isEquivalent. First operand 0 states. Second operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 22:04:19,007 INFO L74 IsIncluded]: Start isIncluded. First operand 0 states. Second operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 22:04:19,008 INFO L87 Difference]: Start difference. First operand 0 states. Second operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 22:04:19,009 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:04:19,009 INFO L93 Difference]: Finished difference Result 0 states and 0 transitions. [2022-02-20 22:04:19,009 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2022-02-20 22:04:19,009 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:04:19,009 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:04:19,009 INFO L74 IsIncluded]: Start isIncluded. First operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand 0 states. [2022-02-20 22:04:19,009 INFO L87 Difference]: Start difference. First operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand 0 states. [2022-02-20 22:04:19,009 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:04:19,009 INFO L93 Difference]: Finished difference Result 0 states and 0 transitions. [2022-02-20 22:04:19,010 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2022-02-20 22:04:19,010 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:04:19,010 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:04:19,010 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 22:04:19,010 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 22:04:19,010 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 22:04:19,010 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 0 states to 0 states and 0 transitions. [2022-02-20 22:04:19,011 INFO L78 Accepts]: Start accepts. Automaton has 0 states and 0 transitions. Word has length 100 [2022-02-20 22:04:19,011 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 22:04:19,011 INFO L470 AbstractCegarLoop]: Abstraction has 0 states and 0 transitions. [2022-02-20 22:04:19,011 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 23.333333333333332) internal successors, (70), 2 states have internal predecessors, (70), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 1 states have call predecessors, (8), 1 states have call successors, (8) [2022-02-20 22:04:19,011 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2022-02-20 22:04:19,012 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:04:19,014 INFO L764 garLoopResultBuilder]: Registering result SAFE for location ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-02-20 22:04:19,036 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-02-20 22:04:19,236 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-20 22:04:19,239 INFO L343 DoubleDeckerVisitor]: Before removal of dead ends 0 states and 0 transitions. [2022-02-20 22:04:22,007 INFO L854 garLoopResultBuilder]: At program point L3935(lines 3912 3937) the Hoare annotation is: (or (not (= ~ldv_spin~0 0)) (not (= ~ldv_retval_2~0 0)) (= |old(#valid)| |#valid|)) [2022-02-20 22:04:22,008 INFO L858 garLoopResultBuilder]: For program point L4505(lines 4505 4507) no Hoare annotation was computed. [2022-02-20 22:04:22,008 INFO L858 garLoopResultBuilder]: For program point L3925(lines 3925 3929) no Hoare annotation was computed. [2022-02-20 22:04:22,008 INFO L854 garLoopResultBuilder]: At program point L4431(lines 4430 4432) the Hoare annotation is: (or (not (= ~ldv_spin~0 0)) (not (= ~ldv_retval_2~0 0)) (= |old(#valid)| |#valid|)) [2022-02-20 22:04:22,013 INFO L858 garLoopResultBuilder]: For program point snd_uart16550_freeFINAL(lines 3522 3533) no Hoare annotation was computed. [2022-02-20 22:04:22,014 INFO L858 garLoopResultBuilder]: For program point L3915(lines 3915 3919) no Hoare annotation was computed. [2022-02-20 22:04:22,014 INFO L854 garLoopResultBuilder]: At program point L4297(lines 4292 4299) the Hoare annotation is: (or (not (= ~ldv_spin~0 0)) (not (= ~ldv_retval_2~0 0)) (= |old(#valid)| |#valid|)) [2022-02-20 22:04:22,014 INFO L858 garLoopResultBuilder]: For program point L3525(lines 3525 3528) no Hoare annotation was computed. [2022-02-20 22:04:22,014 INFO L858 garLoopResultBuilder]: For program point L3525-2(lines 3525 3528) no Hoare annotation was computed. [2022-02-20 22:04:22,014 INFO L858 garLoopResultBuilder]: For program point L3930(lines 3930 3934) no Hoare annotation was computed. [2022-02-20 22:04:22,014 INFO L858 garLoopResultBuilder]: For program point L3920(lines 3920 3924) no Hoare annotation was computed. [2022-02-20 22:04:22,014 INFO L854 garLoopResultBuilder]: At program point L4459(lines 4458 4460) the Hoare annotation is: (or (not (= ~ldv_spin~0 0)) (not (= ~ldv_retval_2~0 0)) (= |old(#valid)| |#valid|)) [2022-02-20 22:04:22,015 INFO L854 garLoopResultBuilder]: At program point snd_uart16550_freeENTRY(lines 3522 3533) the Hoare annotation is: (or (not (= ~ldv_spin~0 0)) (not (= ~ldv_retval_2~0 0)) (= |old(#valid)| |#valid|)) [2022-02-20 22:04:22,015 INFO L858 garLoopResultBuilder]: For program point snd_uart16550_freeEXIT(lines 3522 3533) no Hoare annotation was computed. [2022-02-20 22:04:22,015 INFO L858 garLoopResultBuilder]: For program point snd_card_freeEXIT(lines 4466 4468) no Hoare annotation was computed. [2022-02-20 22:04:22,015 INFO L861 garLoopResultBuilder]: At program point snd_card_freeENTRY(lines 4466 4468) the Hoare annotation is: true [2022-02-20 22:04:22,015 INFO L858 garLoopResultBuilder]: For program point snd_card_freeFINAL(lines 4466 4468) no Hoare annotation was computed. [2022-02-20 22:04:22,015 INFO L861 garLoopResultBuilder]: At program point platform_get_drvdataENTRY(lines 2835 2842) the Hoare annotation is: true [2022-02-20 22:04:22,015 INFO L861 garLoopResultBuilder]: At program point L2783(lines 2780 2785) the Hoare annotation is: true [2022-02-20 22:04:22,016 INFO L858 garLoopResultBuilder]: For program point platform_get_drvdataEXIT(lines 2835 2842) no Hoare annotation was computed. [2022-02-20 22:04:22,016 INFO L858 garLoopResultBuilder]: For program point platform_get_drvdataFINAL(lines 2835 2842) no Hoare annotation was computed. [2022-02-20 22:04:22,016 INFO L858 garLoopResultBuilder]: For program point L3231(line 3231) no Hoare annotation was computed. [2022-02-20 22:04:22,016 INFO L858 garLoopResultBuilder]: For program point snd_uart16550_do_closeEXIT(lines 3218 3249) no Hoare annotation was computed. [2022-02-20 22:04:22,016 INFO L858 garLoopResultBuilder]: For program point L3227(line 3227) no Hoare annotation was computed. [2022-02-20 22:04:22,016 INFO L861 garLoopResultBuilder]: At program point L3244(line 3244) the Hoare annotation is: true [2022-02-20 22:04:22,016 INFO L858 garLoopResultBuilder]: For program point L3244-1(line 3244) no Hoare annotation was computed. [2022-02-20 22:04:22,017 INFO L858 garLoopResultBuilder]: For program point L3240(lines 3240 3246) no Hoare annotation was computed. [2022-02-20 22:04:22,017 INFO L858 garLoopResultBuilder]: For program point L3240-2(lines 3218 3249) no Hoare annotation was computed. [2022-02-20 22:04:22,017 INFO L861 garLoopResultBuilder]: At program point L3232(line 3232) the Hoare annotation is: true [2022-02-20 22:04:22,017 INFO L858 garLoopResultBuilder]: For program point L3232-1(line 3232) no Hoare annotation was computed. [2022-02-20 22:04:22,017 INFO L861 garLoopResultBuilder]: At program point L3228(line 3228) the Hoare annotation is: true [2022-02-20 22:04:22,017 INFO L858 garLoopResultBuilder]: For program point L3228-1(line 3228) no Hoare annotation was computed. [2022-02-20 22:04:22,017 INFO L858 garLoopResultBuilder]: For program point L3241-1(line 3241) no Hoare annotation was computed. [2022-02-20 22:04:22,017 INFO L861 garLoopResultBuilder]: At program point L3241(line 3241) the Hoare annotation is: true [2022-02-20 22:04:22,018 INFO L858 garLoopResultBuilder]: For program point L3225-1(line 3225) no Hoare annotation was computed. [2022-02-20 22:04:22,018 INFO L861 garLoopResultBuilder]: At program point L3225(line 3225) the Hoare annotation is: true [2022-02-20 22:04:22,018 INFO L858 garLoopResultBuilder]: For program point L3221-1(lines 3221 3224) no Hoare annotation was computed. [2022-02-20 22:04:22,018 INFO L858 garLoopResultBuilder]: For program point L3221(lines 3221 3224) no Hoare annotation was computed. [2022-02-20 22:04:22,018 INFO L861 garLoopResultBuilder]: At program point L3242(line 3242) the Hoare annotation is: true [2022-02-20 22:04:22,018 INFO L858 garLoopResultBuilder]: For program point L3242-1(line 3242) no Hoare annotation was computed. [2022-02-20 22:04:22,018 INFO L861 garLoopResultBuilder]: At program point L3238(lines 3220 3248) the Hoare annotation is: true [2022-02-20 22:04:22,019 INFO L858 garLoopResultBuilder]: For program point L3234(line 3234) no Hoare annotation was computed. [2022-02-20 22:04:22,019 INFO L854 garLoopResultBuilder]: At program point snd_uart16550_do_closeENTRY(lines 3218 3249) the Hoare annotation is: (or (and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)) (not (= ~ldv_retval_2~0 0))) [2022-02-20 22:04:22,019 INFO L858 garLoopResultBuilder]: For program point L3230(line 3230) no Hoare annotation was computed. [2022-02-20 22:04:22,019 INFO L858 garLoopResultBuilder]: For program point L3230-2(line 3230) no Hoare annotation was computed. [2022-02-20 22:04:22,019 INFO L858 garLoopResultBuilder]: For program point L3226(lines 3226 3237) no Hoare annotation was computed. [2022-02-20 22:04:22,019 INFO L854 garLoopResultBuilder]: At program point L3222(line 3222) the Hoare annotation is: (or (and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)) (not (= ~ldv_retval_2~0 0))) [2022-02-20 22:04:22,019 INFO L858 garLoopResultBuilder]: For program point L3243-1(line 3243) no Hoare annotation was computed. [2022-02-20 22:04:22,020 INFO L861 garLoopResultBuilder]: At program point L3243(line 3243) the Hoare annotation is: true [2022-02-20 22:04:22,020 INFO L858 garLoopResultBuilder]: For program point L3239-1(line 3239) no Hoare annotation was computed. [2022-02-20 22:04:22,020 INFO L861 garLoopResultBuilder]: At program point L3239(line 3239) the Hoare annotation is: true [2022-02-20 22:04:22,020 INFO L858 garLoopResultBuilder]: For program point L3235-1(line 3235) no Hoare annotation was computed. [2022-02-20 22:04:22,020 INFO L861 garLoopResultBuilder]: At program point L3235(line 3235) the Hoare annotation is: true [2022-02-20 22:04:22,020 INFO L858 garLoopResultBuilder]: For program point L-1-1(line -1) no Hoare annotation was computed. [2022-02-20 22:04:22,020 INFO L861 garLoopResultBuilder]: At program point L-1-3(line -1) the Hoare annotation is: true [2022-02-20 22:04:22,020 INFO L858 garLoopResultBuilder]: For program point L-1-4(line -1) no Hoare annotation was computed. [2022-02-20 22:04:22,021 INFO L858 garLoopResultBuilder]: For program point #Ultimate.C_strcpyEXIT(line -1) no Hoare annotation was computed. [2022-02-20 22:04:22,021 INFO L854 garLoopResultBuilder]: At program point #Ultimate.C_strcpyENTRY(line -1) the Hoare annotation is: (or (and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)) (not (= ~ldv_spin~0 0)) (not (= ~ldv_retval_2~0 0))) [2022-02-20 22:04:22,021 INFO L854 garLoopResultBuilder]: At program point snd_uart16550_add_timerENTRY(lines 2968 2979) the Hoare annotation is: (or (and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)) (not (= ~ldv_retval_2~0 0))) [2022-02-20 22:04:22,021 INFO L858 garLoopResultBuilder]: For program point snd_uart16550_add_timerEXIT(lines 2968 2979) no Hoare annotation was computed. [2022-02-20 22:04:22,021 INFO L858 garLoopResultBuilder]: For program point L2971(lines 2971 2976) no Hoare annotation was computed. [2022-02-20 22:04:22,021 INFO L858 garLoopResultBuilder]: For program point L2971-2(lines 2968 2979) no Hoare annotation was computed. [2022-02-20 22:04:22,021 INFO L861 garLoopResultBuilder]: At program point L4424(lines 4423 4425) the Hoare annotation is: true [2022-02-20 22:04:22,022 INFO L858 garLoopResultBuilder]: For program point ldv_errorFINAL(lines 2696 2702) no Hoare annotation was computed. [2022-02-20 22:04:22,022 INFO L861 garLoopResultBuilder]: At program point ldv_errorENTRY(lines 2696 2702) the Hoare annotation is: true [2022-02-20 22:04:22,022 INFO L858 garLoopResultBuilder]: For program point ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION(line 2700) no Hoare annotation was computed. [2022-02-20 22:04:22,022 INFO L858 garLoopResultBuilder]: For program point ldv_errorEXIT(lines 2696 2702) no Hoare annotation was computed. [2022-02-20 22:04:22,022 INFO L854 garLoopResultBuilder]: At program point L3103(lines 3089 3105) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| 0)) (= ~ldv_spin~0 0) (not (= ~ldv_retval_2~0 0))) [2022-02-20 22:04:22,022 INFO L858 garLoopResultBuilder]: For program point L3999(line 3999) no Hoare annotation was computed. [2022-02-20 22:04:22,022 INFO L861 garLoopResultBuilder]: At program point L3101-1(line 3101) the Hoare annotation is: true [2022-02-20 22:04:22,023 INFO L854 garLoopResultBuilder]: At program point L2589(lines 2585 2591) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| 0)) (not (= ~ldv_retval_2~0 0)) (and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|))) [2022-02-20 22:04:22,023 INFO L854 garLoopResultBuilder]: At program point L3101(line 3101) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| 0)) (not (= ~ldv_retval_2~0 0)) (and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|))) [2022-02-20 22:04:22,023 INFO L858 garLoopResultBuilder]: For program point ldv_irq_1FINAL(lines 3982 4007) no Hoare annotation was computed. [2022-02-20 22:04:22,023 INFO L858 garLoopResultBuilder]: For program point L3991(lines 3991 3997) no Hoare annotation was computed. [2022-02-20 22:04:22,024 INFO L858 garLoopResultBuilder]: For program point L3095(lines 3095 3099) no Hoare annotation was computed. [2022-02-20 22:04:22,024 INFO L858 garLoopResultBuilder]: For program point L3989(lines 3989 4001) no Hoare annotation was computed. [2022-02-20 22:04:22,024 INFO L854 garLoopResultBuilder]: At program point L3987-1(lines 3987 4004) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| 0)) (not (= ~ldv_retval_2~0 0)) (and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= ~ldv_spin~0 0) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|))) [2022-02-20 22:04:22,024 INFO L858 garLoopResultBuilder]: For program point L3987(lines 3987 4004) no Hoare annotation was computed. [2022-02-20 22:04:22,024 INFO L854 garLoopResultBuilder]: At program point ldv_irq_1ENTRY(lines 3982 4007) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| 0)) (not (= ~ldv_retval_2~0 0)) (and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= ~ldv_spin~0 0) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|))) [2022-02-20 22:04:22,025 INFO L858 garLoopResultBuilder]: For program point ldv_irq_1EXIT(lines 3982 4007) no Hoare annotation was computed. [2022-02-20 22:04:22,025 INFO L854 garLoopResultBuilder]: At program point L4415(lines 4414 4416) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| 0)) (not (= ~ldv_retval_2~0 0)) (and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|))) [2022-02-20 22:04:22,025 INFO L854 garLoopResultBuilder]: At program point L4000(line 4000) the Hoare annotation is: (or (and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)) (not (= |old(~ldv_spin~0)| 0)) (not (= ~ldv_retval_2~0 0))) [2022-02-20 22:04:22,025 INFO L854 garLoopResultBuilder]: At program point L4254(lines 4249 4256) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| 0)) (not (= ~ldv_retval_2~0 0)) (and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|))) [2022-02-20 22:04:22,025 INFO L858 garLoopResultBuilder]: For program point L3102(line 3102) no Hoare annotation was computed. [2022-02-20 22:04:22,025 INFO L858 garLoopResultBuilder]: For program point L4252-1(line 4252) no Hoare annotation was computed. [2022-02-20 22:04:22,025 INFO L854 garLoopResultBuilder]: At program point L3100(line 3100) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| 0)) (not (= ~ldv_retval_2~0 0)) (and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|))) [2022-02-20 22:04:22,026 INFO L854 garLoopResultBuilder]: At program point L4252(line 4252) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| 0)) (not (= ~ldv_retval_2~0 0)) (and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= ~ldv_spin~0 0) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|))) [2022-02-20 22:04:22,026 INFO L858 garLoopResultBuilder]: For program point L3100-1(line 3100) no Hoare annotation was computed. [2022-02-20 22:04:22,026 INFO L854 garLoopResultBuilder]: At program point L3096(line 3096) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| 0)) (not (= ~ldv_retval_2~0 0)) (and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|))) [2022-02-20 22:04:22,026 INFO L858 garLoopResultBuilder]: For program point L3990(line 3990) no Hoare annotation was computed. [2022-02-20 22:04:22,026 INFO L858 garLoopResultBuilder]: For program point L3096-1(line 3096) no Hoare annotation was computed. [2022-02-20 22:04:22,026 INFO L858 garLoopResultBuilder]: For program point reg_timer_2EXIT(lines 3866 3873) no Hoare annotation was computed. [2022-02-20 22:04:22,026 INFO L861 garLoopResultBuilder]: At program point reg_timer_2ENTRY(lines 3866 3873) the Hoare annotation is: true [2022-02-20 22:04:22,026 INFO L858 garLoopResultBuilder]: For program point reg_timer_2FINAL(lines 3866 3873) no Hoare annotation was computed. [2022-02-20 22:04:22,027 INFO L861 garLoopResultBuilder]: At program point L3066(line 3066) the Hoare annotation is: true [2022-02-20 22:04:22,027 INFO L858 garLoopResultBuilder]: For program point L3033(line 3033) no Hoare annotation was computed. [2022-02-20 22:04:22,027 INFO L858 garLoopResultBuilder]: For program point L3066-1(line 3066) no Hoare annotation was computed. [2022-02-20 22:04:22,027 INFO L858 garLoopResultBuilder]: For program point L3033-2(lines 3033 3037) no Hoare annotation was computed. [2022-02-20 22:04:22,027 INFO L861 garLoopResultBuilder]: At program point L3050(lines 3013 3087) the Hoare annotation is: true [2022-02-20 22:04:22,027 INFO L861 garLoopResultBuilder]: At program point L3083(line 3083) the Hoare annotation is: true [2022-02-20 22:04:22,027 INFO L858 garLoopResultBuilder]: For program point L3017-1(line 3017) no Hoare annotation was computed. [2022-02-20 22:04:22,028 INFO L861 garLoopResultBuilder]: At program point L3017(line 3017) the Hoare annotation is: true [2022-02-20 22:04:22,028 INFO L861 garLoopResultBuilder]: At program point L3075(lines 3072 3081) the Hoare annotation is: true [2022-02-20 22:04:22,028 INFO L861 garLoopResultBuilder]: At program point L3034(lines 3034 3035) the Hoare annotation is: true [2022-02-20 22:04:22,028 INFO L858 garLoopResultBuilder]: For program point snd_uart16550_io_loopEXIT(lines 3008 3088) no Hoare annotation was computed. [2022-02-20 22:04:22,028 INFO L861 garLoopResultBuilder]: At program point L3067(lines 3061 3072) the Hoare annotation is: true [2022-02-20 22:04:22,028 INFO L858 garLoopResultBuilder]: For program point L3034-1(lines 3034 3035) no Hoare annotation was computed. [2022-02-20 22:04:22,028 INFO L858 garLoopResultBuilder]: For program point L3018(lines 3018 3021) no Hoare annotation was computed. [2022-02-20 22:04:22,028 INFO L858 garLoopResultBuilder]: For program point L3051-1(line 3051) no Hoare annotation was computed. [2022-02-20 22:04:22,029 INFO L861 garLoopResultBuilder]: At program point L3051(line 3051) the Hoare annotation is: true [2022-02-20 22:04:22,029 INFO L858 garLoopResultBuilder]: For program point L3018-2(lines 3018 3021) no Hoare annotation was computed. [2022-02-20 22:04:22,029 INFO L858 garLoopResultBuilder]: For program point L3068(line 3068) no Hoare annotation was computed. [2022-02-20 22:04:22,029 INFO L858 garLoopResultBuilder]: For program point L3068-2(lines 3068 3071) no Hoare annotation was computed. [2022-02-20 22:04:22,029 INFO L858 garLoopResultBuilder]: For program point L3052(lines 3052 3055) no Hoare annotation was computed. [2022-02-20 22:04:22,029 INFO L858 garLoopResultBuilder]: For program point L3077(line 3077) no Hoare annotation was computed. [2022-02-20 22:04:22,029 INFO L858 garLoopResultBuilder]: For program point L3077-2(lines 3077 3080) no Hoare annotation was computed. [2022-02-20 22:04:22,030 INFO L861 garLoopResultBuilder]: At program point L3069(lines 3061 3072) the Hoare annotation is: true [2022-02-20 22:04:22,030 INFO L858 garLoopResultBuilder]: For program point L3028(lines 3028 3031) no Hoare annotation was computed. [2022-02-20 22:04:22,030 INFO L858 garLoopResultBuilder]: For program point L3061(line 3061) no Hoare annotation was computed. [2022-02-20 22:04:22,030 INFO L858 garLoopResultBuilder]: For program point L3061-2(lines 3061 3081) no Hoare annotation was computed. [2022-02-20 22:04:22,030 INFO L858 garLoopResultBuilder]: For program point L3061-4(lines 3061 3081) no Hoare annotation was computed. [2022-02-20 22:04:22,031 INFO L861 garLoopResultBuilder]: At program point L3053(lines 3013 3087) the Hoare annotation is: true [2022-02-20 22:04:22,031 INFO L861 garLoopResultBuilder]: At program point L3078(lines 3072 3081) the Hoare annotation is: true [2022-02-20 22:04:22,032 INFO L854 garLoopResultBuilder]: At program point snd_uart16550_io_loopENTRY(lines 3008 3088) the Hoare annotation is: (or (not (= ~ldv_retval_2~0 0)) (and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|))) [2022-02-20 22:04:22,032 INFO L861 garLoopResultBuilder]: At program point L3062(line 3062) the Hoare annotation is: true [2022-02-20 22:04:22,032 INFO L858 garLoopResultBuilder]: For program point snd_uart16550_io_loopFINAL(lines 3008 3088) no Hoare annotation was computed. [2022-02-20 22:04:22,033 INFO L858 garLoopResultBuilder]: For program point L3062-1(line 3062) no Hoare annotation was computed. [2022-02-20 22:04:22,033 INFO L858 garLoopResultBuilder]: For program point L3022(lines 3022 3043) no Hoare annotation was computed. [2022-02-20 22:04:22,033 INFO L858 garLoopResultBuilder]: For program point L3039(line 3039) no Hoare annotation was computed. [2022-02-20 22:04:22,034 INFO L858 garLoopResultBuilder]: For program point L3039-2(lines 3039 3043) no Hoare annotation was computed. [2022-02-20 22:04:22,034 INFO L858 garLoopResultBuilder]: For program point L3039-4(lines 3013 3087) no Hoare annotation was computed. [2022-02-20 22:04:22,034 INFO L858 garLoopResultBuilder]: For program point L3023(lines 3023 3037) no Hoare annotation was computed. [2022-02-20 22:04:22,034 INFO L861 garLoopResultBuilder]: At program point L3040(lines 3040 3041) the Hoare annotation is: true [2022-02-20 22:04:22,036 INFO L858 garLoopResultBuilder]: For program point L3040-1(lines 3040 3041) no Hoare annotation was computed. [2022-02-20 22:04:22,036 INFO L858 garLoopResultBuilder]: For program point L3065(line 3065) no Hoare annotation was computed. [2022-02-20 22:04:22,036 INFO L858 garLoopResultBuilder]: For program point L3024(line 3024) no Hoare annotation was computed. [2022-02-20 22:04:22,036 INFO L858 garLoopResultBuilder]: For program point L3057(lines 3057 3060) no Hoare annotation was computed. [2022-02-20 22:04:22,037 INFO L858 garLoopResultBuilder]: For program point L3024-2(lines 3024 3027) no Hoare annotation was computed. [2022-02-20 22:04:22,037 INFO L858 garLoopResultBuilder]: For program point L3057-2(lines 3057 3060) no Hoare annotation was computed. [2022-02-20 22:04:22,037 INFO L858 garLoopResultBuilder]: For program point L3024-4(lines 3024 3027) no Hoare annotation was computed. [2022-02-20 22:04:22,037 INFO L858 garLoopResultBuilder]: For program point L3082(line 3082) no Hoare annotation was computed. [2022-02-20 22:04:22,037 INFO L858 garLoopResultBuilder]: For program point L3082-2(lines 3082 3085) no Hoare annotation was computed. [2022-02-20 22:04:22,037 INFO L858 garLoopResultBuilder]: For program point L3082-3(lines 3082 3085) no Hoare annotation was computed. [2022-02-20 22:04:22,037 INFO L858 garLoopResultBuilder]: For program point ldv_stopEXIT(lines 2703 2709) no Hoare annotation was computed. [2022-02-20 22:04:22,037 INFO L861 garLoopResultBuilder]: At program point ldv_stopENTRY(lines 2703 2709) the Hoare annotation is: true [2022-02-20 22:04:22,038 INFO L861 garLoopResultBuilder]: At program point L3487(lines 3452 3492) the Hoare annotation is: true [2022-02-20 22:04:22,038 INFO L854 garLoopResultBuilder]: At program point snd_uart16550_output_triggerENTRY(lines 3497 3517) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| 0)) (not (= ~ldv_retval_2~0 0)) (and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= ~ldv_spin~0 0) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|))) [2022-02-20 22:04:22,038 INFO L854 garLoopResultBuilder]: At program point L3504(line 3504) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| 0)) (not (= ~ldv_retval_2~0 0)) (and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= ~ldv_spin~0 0) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|))) [2022-02-20 22:04:22,038 INFO L858 garLoopResultBuilder]: For program point L3504-1(lines 3502 3516) no Hoare annotation was computed. [2022-02-20 22:04:22,038 INFO L858 garLoopResultBuilder]: For program point L3463-1(line 3463) no Hoare annotation was computed. [2022-02-20 22:04:22,038 INFO L861 garLoopResultBuilder]: At program point L3463(line 3463) the Hoare annotation is: true [2022-02-20 22:04:22,038 INFO L861 garLoopResultBuilder]: At program point L3505-1(lines 3505 3509) the Hoare annotation is: true [2022-02-20 22:04:22,039 INFO L858 garLoopResultBuilder]: For program point L3439(lines 3439 3442) no Hoare annotation was computed. [2022-02-20 22:04:22,039 INFO L858 garLoopResultBuilder]: For program point L3456(line 3456) no Hoare annotation was computed. [2022-02-20 22:04:22,039 INFO L858 garLoopResultBuilder]: For program point L3456-1(line 3456) no Hoare annotation was computed. [2022-02-20 22:04:22,039 INFO L858 garLoopResultBuilder]: For program point L3456-3(line 3456) no Hoare annotation was computed. [2022-02-20 22:04:22,039 INFO L858 garLoopResultBuilder]: For program point L3456-6(line 3456) no Hoare annotation was computed. [2022-02-20 22:04:22,039 INFO L858 garLoopResultBuilder]: For program point L3456-5(line 3456) no Hoare annotation was computed. [2022-02-20 22:04:22,039 INFO L858 garLoopResultBuilder]: For program point L3448(line 3448) no Hoare annotation was computed. [2022-02-20 22:04:22,039 INFO L858 garLoopResultBuilder]: For program point L3456-8(lines 3456 3472) no Hoare annotation was computed. [2022-02-20 22:04:22,040 INFO L858 garLoopResultBuilder]: For program point L3456-9(lines 3456 3472) no Hoare annotation was computed. [2022-02-20 22:04:22,040 INFO L858 garLoopResultBuilder]: For program point L3473-1(line 3473) no Hoare annotation was computed. [2022-02-20 22:04:22,040 INFO L861 garLoopResultBuilder]: At program point L3473(line 3473) the Hoare annotation is: true [2022-02-20 22:04:22,040 INFO L861 garLoopResultBuilder]: At program point L3341(lines 3335 3344) the Hoare annotation is: true [2022-02-20 22:04:22,040 INFO L858 garLoopResultBuilder]: For program point L3432(lines 3432 3492) no Hoare annotation was computed. [2022-02-20 22:04:22,040 INFO L861 garLoopResultBuilder]: At program point L3432-1(lines 3432 3492) the Hoare annotation is: true [2022-02-20 22:04:22,040 INFO L861 garLoopResultBuilder]: At program point L3490(lines 3452 3492) the Hoare annotation is: true [2022-02-20 22:04:22,041 INFO L858 garLoopResultBuilder]: For program point L3449-1(line 3449) no Hoare annotation was computed. [2022-02-20 22:04:22,041 INFO L861 garLoopResultBuilder]: At program point L3449(line 3449) the Hoare annotation is: true [2022-02-20 22:04:22,041 INFO L861 garLoopResultBuilder]: At program point L4498(lines 4497 4499) the Hoare annotation is: true [2022-02-20 22:04:22,041 INFO L858 garLoopResultBuilder]: For program point L3474(line 3474) no Hoare annotation was computed. [2022-02-20 22:04:22,041 INFO L858 garLoopResultBuilder]: For program point L3474-2(lines 3474 3477) no Hoare annotation was computed. [2022-02-20 22:04:22,041 INFO L858 garLoopResultBuilder]: For program point L3458(lines 3458 3470) no Hoare annotation was computed. [2022-02-20 22:04:22,041 INFO L861 garLoopResultBuilder]: At program point L3450(lines 3432 3452) the Hoare annotation is: true [2022-02-20 22:04:22,041 INFO L858 garLoopResultBuilder]: For program point L3434(lines 3434 3437) no Hoare annotation was computed. [2022-02-20 22:04:22,042 INFO L858 garLoopResultBuilder]: For program point L3467(lines 3467 3470) no Hoare annotation was computed. [2022-02-20 22:04:22,042 INFO L861 garLoopResultBuilder]: At program point L3484(lines 3452 3492) the Hoare annotation is: true [2022-02-20 22:04:22,042 INFO L861 garLoopResultBuilder]: At program point L3460(line 3460) the Hoare annotation is: true [2022-02-20 22:04:22,042 INFO L858 garLoopResultBuilder]: For program point L3493(line 3493) no Hoare annotation was computed. [2022-02-20 22:04:22,042 INFO L858 garLoopResultBuilder]: For program point L3427-1(line 3427) no Hoare annotation was computed. [2022-02-20 22:04:22,042 INFO L854 garLoopResultBuilder]: At program point L3427(line 3427) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| 0)) (= ~ldv_spin~0 0) (not (= ~ldv_retval_2~0 0))) [2022-02-20 22:04:22,042 INFO L858 garLoopResultBuilder]: For program point L3460-1(line 3460) no Hoare annotation was computed. [2022-02-20 22:04:22,043 INFO L858 garLoopResultBuilder]: For program point L3510(lines 3502 3516) no Hoare annotation was computed. [2022-02-20 22:04:22,043 INFO L858 garLoopResultBuilder]: For program point L3444(lines 3444 3447) no Hoare annotation was computed. [2022-02-20 22:04:22,043 INFO L861 garLoopResultBuilder]: At program point L3444-2(lines 3444 3447) the Hoare annotation is: true [2022-02-20 22:04:22,043 INFO L854 garLoopResultBuilder]: At program point L3494(lines 3412 3496) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| 0)) (= ~ldv_spin~0 0) (not (= ~ldv_retval_2~0 0))) [2022-02-20 22:04:22,043 INFO L858 garLoopResultBuilder]: For program point L3428(lines 3428 3431) no Hoare annotation was computed. [2022-02-20 22:04:22,043 INFO L858 garLoopResultBuilder]: For program point L3461-1(line 3461) no Hoare annotation was computed. [2022-02-20 22:04:22,043 INFO L861 garLoopResultBuilder]: At program point L3461(line 3461) the Hoare annotation is: true [2022-02-20 22:04:22,043 INFO L858 garLoopResultBuilder]: For program point L3428-1(lines 3428 3431) no Hoare annotation was computed. [2022-02-20 22:04:22,044 INFO L858 garLoopResultBuilder]: For program point L3486(lines 3486 3489) no Hoare annotation was computed. [2022-02-20 22:04:22,044 INFO L861 garLoopResultBuilder]: At program point L4502(lines 4501 4503) the Hoare annotation is: true [2022-02-20 22:04:22,044 INFO L858 garLoopResultBuilder]: For program point L3478(line 3478) no Hoare annotation was computed. [2022-02-20 22:04:22,044 INFO L858 garLoopResultBuilder]: For program point L3511-1(lines 3497 3517) no Hoare annotation was computed. [2022-02-20 22:04:22,044 INFO L858 garLoopResultBuilder]: For program point L3478-2(lines 3478 3481) no Hoare annotation was computed. [2022-02-20 22:04:22,044 INFO L858 garLoopResultBuilder]: For program point L3478-4(lines 3478 3481) no Hoare annotation was computed. [2022-02-20 22:04:22,044 INFO L861 garLoopResultBuilder]: At program point L4494(lines 4493 4495) the Hoare annotation is: true [2022-02-20 22:04:22,044 INFO L858 garLoopResultBuilder]: For program point snd_uart16550_output_triggerEXIT(lines 3497 3517) no Hoare annotation was computed. [2022-02-20 22:04:22,045 INFO L858 garLoopResultBuilder]: For program point L3338(lines 3338 3342) no Hoare annotation was computed. [2022-02-20 22:04:22,045 INFO L858 garLoopResultBuilder]: For program point L3462(line 3462) no Hoare annotation was computed. [2022-02-20 22:04:22,045 INFO L858 garLoopResultBuilder]: For program point L3462-2(lines 3462 3465) no Hoare annotation was computed. [2022-02-20 22:04:22,045 INFO L861 garLoopResultBuilder]: At program point L3429(line 3429) the Hoare annotation is: true [2022-02-20 22:04:22,045 INFO L858 garLoopResultBuilder]: For program point inbEXIT(lines 2623 2630) no Hoare annotation was computed. [2022-02-20 22:04:22,045 INFO L861 garLoopResultBuilder]: At program point inbENTRY(lines 2623 2630) the Hoare annotation is: true [2022-02-20 22:04:22,045 INFO L858 garLoopResultBuilder]: For program point inbFINAL(lines 2623 2630) no Hoare annotation was computed. [2022-02-20 22:04:22,046 INFO L858 garLoopResultBuilder]: For program point L3904(lines 3904 3908) no Hoare annotation was computed. [2022-02-20 22:04:22,046 INFO L854 garLoopResultBuilder]: At program point L4289(lines 4281 4291) the Hoare annotation is: (or (and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)) (not (= ~ldv_retval_2~0 0))) [2022-02-20 22:04:22,046 INFO L854 garLoopResultBuilder]: At program point L4428(lines 4427 4429) the Hoare annotation is: (or (and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)) (not (= ~ldv_retval_2~0 0))) [2022-02-20 22:04:22,046 INFO L858 garLoopResultBuilder]: For program point snd_uart16550_del_timerEXIT(lines 2980 2990) no Hoare annotation was computed. [2022-02-20 22:04:22,046 INFO L854 garLoopResultBuilder]: At program point snd_uart16550_del_timerENTRY(lines 2980 2990) the Hoare annotation is: (or (and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)) (not (= ~ldv_retval_2~0 0))) [2022-02-20 22:04:22,047 INFO L858 garLoopResultBuilder]: For program point L2983(lines 2983 2987) no Hoare annotation was computed. [2022-02-20 22:04:22,047 INFO L854 garLoopResultBuilder]: At program point L3909(lines 3901 3911) the Hoare annotation is: (or (and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)) (not (= ~ldv_retval_2~0 0))) [2022-02-20 22:04:22,047 INFO L858 garLoopResultBuilder]: For program point L2983-2(lines 2980 2990) no Hoare annotation was computed. [2022-02-20 22:04:22,047 INFO L858 garLoopResultBuilder]: For program point outbEXIT(lines 2616 2622) no Hoare annotation was computed. [2022-02-20 22:04:22,047 INFO L861 garLoopResultBuilder]: At program point outbENTRY(lines 2616 2622) the Hoare annotation is: true [2022-02-20 22:04:22,047 INFO L858 garLoopResultBuilder]: For program point outbFINAL(lines 2616 2622) no Hoare annotation was computed. [2022-02-20 22:04:22,047 INFO L858 garLoopResultBuilder]: For program point snd_serial_unregister_allFINAL(lines 3761 3778) no Hoare annotation was computed. [2022-02-20 22:04:22,047 INFO L854 garLoopResultBuilder]: At program point L3772(lines 3764 3777) the Hoare annotation is: (or (not (= |old(~ldv_state_variable_3~0)| 0)) (= ~ldv_state_variable_3~0 0)) [2022-02-20 22:04:22,048 INFO L858 garLoopResultBuilder]: For program point snd_serial_unregister_allEXIT(lines 3761 3778) no Hoare annotation was computed. [2022-02-20 22:04:22,048 INFO L854 garLoopResultBuilder]: At program point L3770(lines 3764 3777) the Hoare annotation is: (or (not (= |old(~ldv_state_variable_3~0)| 0)) (= ~ldv_state_variable_3~0 0)) [2022-02-20 22:04:22,048 INFO L854 garLoopResultBuilder]: At program point L3768(line 3768) the Hoare annotation is: (or (not (= |old(~ldv_state_variable_3~0)| 0)) (= ~ldv_state_variable_3~0 0)) [2022-02-20 22:04:22,048 INFO L858 garLoopResultBuilder]: For program point L3768-1(line 3768) no Hoare annotation was computed. [2022-02-20 22:04:22,048 INFO L854 garLoopResultBuilder]: At program point snd_serial_unregister_allENTRY(lines 3761 3778) the Hoare annotation is: (or (not (= |old(~ldv_state_variable_3~0)| 0)) (= ~ldv_state_variable_3~0 0)) [2022-02-20 22:04:22,048 INFO L854 garLoopResultBuilder]: At program point L4452(lines 4451 4453) the Hoare annotation is: (or (not (= |old(~ldv_state_variable_3~0)| 0)) (= ~ldv_state_variable_3~0 0)) [2022-02-20 22:04:22,048 INFO L854 garLoopResultBuilder]: At program point L4324(lines 4319 4326) the Hoare annotation is: (= ~ldv_state_variable_3~0 0) [2022-02-20 22:04:22,049 INFO L861 garLoopResultBuilder]: At program point spin_unlockENTRY(lines 4257 4264) the Hoare annotation is: true [2022-02-20 22:04:22,049 INFO L858 garLoopResultBuilder]: For program point spin_unlockFINAL(lines 4257 4264) no Hoare annotation was computed. [2022-02-20 22:04:22,049 INFO L858 garLoopResultBuilder]: For program point spin_unlockEXIT(lines 4257 4264) no Hoare annotation was computed. [2022-02-20 22:04:22,049 INFO L858 garLoopResultBuilder]: For program point L4260-1(line 4260) no Hoare annotation was computed. [2022-02-20 22:04:22,049 INFO L854 garLoopResultBuilder]: At program point L4418(lines 4417 4419) the Hoare annotation is: (or (= ~ldv_spin~0 0) (not (= ~ldv_retval_2~0 0))) [2022-02-20 22:04:22,049 INFO L854 garLoopResultBuilder]: At program point L2597(lines 2593 2599) the Hoare annotation is: (or (= ~ldv_spin~0 0) (not (= ~ldv_retval_2~0 0))) [2022-02-20 22:04:22,049 INFO L861 garLoopResultBuilder]: At program point L4260(line 4260) the Hoare annotation is: true [2022-02-20 22:04:22,050 INFO L858 garLoopResultBuilder]: For program point L2641(line 2641) no Hoare annotation was computed. [2022-02-20 22:04:22,050 INFO L858 garLoopResultBuilder]: For program point L2641-2(lines 2640 2642) no Hoare annotation was computed. [2022-02-20 22:04:22,050 INFO L861 garLoopResultBuilder]: At program point assume_abort_if_notENTRY(lines 2640 2642) the Hoare annotation is: true [2022-02-20 22:04:22,051 INFO L858 garLoopResultBuilder]: For program point assume_abort_if_notEXIT(lines 2640 2642) no Hoare annotation was computed. [2022-02-20 22:04:22,051 INFO L861 garLoopResultBuilder]: At program point L3388(line 3388) the Hoare annotation is: true [2022-02-20 22:04:22,051 INFO L858 garLoopResultBuilder]: For program point L3388-1(line 3388) no Hoare annotation was computed. [2022-02-20 22:04:22,051 INFO L861 garLoopResultBuilder]: At program point L3384(line 3384) the Hoare annotation is: true [2022-02-20 22:04:22,051 INFO L858 garLoopResultBuilder]: For program point L3384-1(line 3384) no Hoare annotation was computed. [2022-02-20 22:04:22,051 INFO L854 garLoopResultBuilder]: At program point L3380(lines 3374 3397) the Hoare annotation is: (or (and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)) (not (= ~ldv_retval_2~0 0))) [2022-02-20 22:04:22,051 INFO L858 garLoopResultBuilder]: For program point L3401(lines 3401 3407) no Hoare annotation was computed. [2022-02-20 22:04:22,051 INFO L858 garLoopResultBuilder]: For program point snd_uart16550_output_byteFINAL(lines 3366 3411) no Hoare annotation was computed. [2022-02-20 22:04:22,052 INFO L854 garLoopResultBuilder]: At program point snd_uart16550_output_byteENTRY(lines 3366 3411) the Hoare annotation is: (or (and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)) (not (= ~ldv_retval_2~0 0))) [2022-02-20 22:04:22,052 INFO L858 garLoopResultBuilder]: For program point L3381-1(line 3381) no Hoare annotation was computed. [2022-02-20 22:04:22,052 INFO L854 garLoopResultBuilder]: At program point L3381(line 3381) the Hoare annotation is: (or (and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)) (not (= ~ldv_retval_2~0 0))) [2022-02-20 22:04:22,052 INFO L858 garLoopResultBuilder]: For program point L3377(lines 3377 3397) no Hoare annotation was computed. [2022-02-20 22:04:22,052 INFO L858 garLoopResultBuilder]: For program point L3373-1(lines 3373 3408) no Hoare annotation was computed. [2022-02-20 22:04:22,052 INFO L858 garLoopResultBuilder]: For program point L3373(lines 3373 3408) no Hoare annotation was computed. [2022-02-20 22:04:22,052 INFO L854 garLoopResultBuilder]: At program point L3390(line 3390) the Hoare annotation is: (or (and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)) (not (= ~ldv_retval_2~0 0))) [2022-02-20 22:04:22,053 INFO L858 garLoopResultBuilder]: For program point L3390-1(line 3390) no Hoare annotation was computed. [2022-02-20 22:04:22,053 INFO L858 garLoopResultBuilder]: For program point L3386(lines 3386 3391) no Hoare annotation was computed. [2022-02-20 22:04:22,053 INFO L858 garLoopResultBuilder]: For program point L3382(lines 3382 3391) no Hoare annotation was computed. [2022-02-20 22:04:22,053 INFO L854 garLoopResultBuilder]: At program point L3378(line 3378) the Hoare annotation is: (or (and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)) (not (= ~ldv_retval_2~0 0))) [2022-02-20 22:04:22,053 INFO L858 garLoopResultBuilder]: For program point L3378-1(line 3378) no Hoare annotation was computed. [2022-02-20 22:04:22,054 INFO L858 garLoopResultBuilder]: For program point L3374(line 3374) no Hoare annotation was computed. [2022-02-20 22:04:22,055 INFO L858 garLoopResultBuilder]: For program point L3374-2(lines 3374 3397) no Hoare annotation was computed. [2022-02-20 22:04:22,055 INFO L854 garLoopResultBuilder]: At program point L3399(lines 3373 3408) the Hoare annotation is: (or (and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)) (not (= ~ldv_retval_2~0 0))) [2022-02-20 22:04:22,055 INFO L858 garLoopResultBuilder]: For program point snd_uart16550_output_byteEXIT(lines 3366 3411) no Hoare annotation was computed. [2022-02-20 22:04:22,055 INFO L858 garLoopResultBuilder]: For program point L3379(lines 3379 3394) no Hoare annotation was computed. [2022-02-20 22:04:22,055 INFO L858 garLoopResultBuilder]: For program point L3400(line 3400) no Hoare annotation was computed. [2022-02-20 22:04:22,055 INFO L861 garLoopResultBuilder]: At program point ldv_spin_unlockENTRY(lines 4381 4387) the Hoare annotation is: true [2022-02-20 22:04:22,055 INFO L858 garLoopResultBuilder]: For program point ldv_spin_unlockFINAL(lines 4381 4387) no Hoare annotation was computed. [2022-02-20 22:04:22,055 INFO L858 garLoopResultBuilder]: For program point ldv_spin_unlockEXIT(lines 4381 4387) no Hoare annotation was computed. [2022-02-20 22:04:22,056 INFO L858 garLoopResultBuilder]: For program point ldv_spin_lockEXIT(lines 4374 4380) no Hoare annotation was computed. [2022-02-20 22:04:22,056 INFO L854 garLoopResultBuilder]: At program point ldv_spin_lockENTRY(lines 4374 4380) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| 0)) (= ~ldv_spin~0 0) (not (= ~ldv_retval_2~0 0))) [2022-02-20 22:04:22,056 INFO L858 garLoopResultBuilder]: For program point ldv_spin_lockFINAL(lines 4374 4380) no Hoare annotation was computed. [2022-02-20 22:04:22,056 INFO L858 garLoopResultBuilder]: For program point platform_device_unregisterEXIT(lines 4448 4450) no Hoare annotation was computed. [2022-02-20 22:04:22,056 INFO L861 garLoopResultBuilder]: At program point platform_device_unregisterENTRY(lines 4448 4450) the Hoare annotation is: true [2022-02-20 22:04:22,056 INFO L858 garLoopResultBuilder]: For program point platform_device_unregisterFINAL(lines 4448 4450) no Hoare annotation was computed. [2022-02-20 22:04:22,056 INFO L861 garLoopResultBuilder]: At program point spin_unlock_irqrestoreENTRY(lines 4265 4272) the Hoare annotation is: true [2022-02-20 22:04:22,057 INFO L858 garLoopResultBuilder]: For program point L4268-1(line 4268) no Hoare annotation was computed. [2022-02-20 22:04:22,057 INFO L854 garLoopResultBuilder]: At program point L2605(lines 2601 2607) the Hoare annotation is: (or (= ~ldv_spin~0 0) (not (= ~ldv_retval_2~0 0))) [2022-02-20 22:04:22,057 INFO L861 garLoopResultBuilder]: At program point L4268(line 4268) the Hoare annotation is: true [2022-02-20 22:04:22,057 INFO L858 garLoopResultBuilder]: For program point spin_unlock_irqrestoreEXIT(lines 4265 4272) no Hoare annotation was computed. [2022-02-20 22:04:22,057 INFO L858 garLoopResultBuilder]: For program point spin_unlock_irqrestoreFINAL(lines 4265 4272) no Hoare annotation was computed. [2022-02-20 22:04:22,057 INFO L854 garLoopResultBuilder]: At program point L4421(lines 4420 4422) the Hoare annotation is: (or (= ~ldv_spin~0 0) (not (= ~ldv_retval_2~0 0))) [2022-02-20 22:04:22,057 INFO L861 garLoopResultBuilder]: At program point L2656(line 2656) the Hoare annotation is: true [2022-02-20 22:04:22,057 INFO L858 garLoopResultBuilder]: For program point L2657-1(line 2657) no Hoare annotation was computed. [2022-02-20 22:04:22,058 INFO L861 garLoopResultBuilder]: At program point L2657(line 2657) the Hoare annotation is: true [2022-02-20 22:04:22,058 INFO L854 garLoopResultBuilder]: At program point ldv_mallocENTRY(lines 2644 2661) the Hoare annotation is: (or (not (= ~ldv_spin~0 0)) (not (= ~ldv_retval_2~0 0)) (and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))) [2022-02-20 22:04:22,058 INFO L861 garLoopResultBuilder]: At program point L2656-1(line 2656) the Hoare annotation is: true [2022-02-20 22:04:22,058 INFO L858 garLoopResultBuilder]: For program point L2651(lines 2651 2659) no Hoare annotation was computed. [2022-02-20 22:04:22,058 INFO L858 garLoopResultBuilder]: For program point ldv_mallocFINAL(lines 2644 2661) no Hoare annotation was computed. [2022-02-20 22:04:22,058 INFO L858 garLoopResultBuilder]: For program point ldv_mallocEXIT(lines 2644 2661) no Hoare annotation was computed. [2022-02-20 22:04:22,058 INFO L858 garLoopResultBuilder]: For program point snd_uart16550_do_openFINAL(lines 3160 3217) no Hoare annotation was computed. [2022-02-20 22:04:22,058 INFO L861 garLoopResultBuilder]: At program point L3186(line 3186) the Hoare annotation is: true [2022-02-20 22:04:22,059 INFO L858 garLoopResultBuilder]: For program point L3186-1(line 3186) no Hoare annotation was computed. [2022-02-20 22:04:22,059 INFO L861 garLoopResultBuilder]: At program point L3182(line 3182) the Hoare annotation is: true [2022-02-20 22:04:22,059 INFO L858 garLoopResultBuilder]: For program point L3182-1(line 3182) no Hoare annotation was computed. [2022-02-20 22:04:22,059 INFO L861 garLoopResultBuilder]: At program point L3178(line 3178) the Hoare annotation is: true [2022-02-20 22:04:22,059 INFO L858 garLoopResultBuilder]: For program point L3211-1(line 3211) no Hoare annotation was computed. [2022-02-20 22:04:22,059 INFO L861 garLoopResultBuilder]: At program point L3211(line 3211) the Hoare annotation is: true [2022-02-20 22:04:22,059 INFO L858 garLoopResultBuilder]: For program point snd_uart16550_do_openEXIT(lines 3160 3217) no Hoare annotation was computed. [2022-02-20 22:04:22,059 INFO L858 garLoopResultBuilder]: For program point L3178-1(line 3178) no Hoare annotation was computed. [2022-02-20 22:04:22,060 INFO L854 garLoopResultBuilder]: At program point snd_uart16550_do_openENTRY(lines 3160 3217) the Hoare annotation is: (or (and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)) (not (= ~ldv_retval_2~0 0))) [2022-02-20 22:04:22,060 INFO L858 garLoopResultBuilder]: For program point L3203(lines 3203 3210) no Hoare annotation was computed. [2022-02-20 22:04:22,060 INFO L861 garLoopResultBuilder]: At program point L3199(lines 3164 3216) the Hoare annotation is: true [2022-02-20 22:04:22,060 INFO L858 garLoopResultBuilder]: For program point L3195(line 3195) no Hoare annotation was computed. [2022-02-20 22:04:22,060 INFO L858 garLoopResultBuilder]: For program point L3191(line 3191) no Hoare annotation was computed. [2022-02-20 22:04:22,060 INFO L858 garLoopResultBuilder]: For program point L3191-2(line 3191) no Hoare annotation was computed. [2022-02-20 22:04:22,060 INFO L858 garLoopResultBuilder]: For program point L3187(lines 3187 3198) no Hoare annotation was computed. [2022-02-20 22:04:22,061 INFO L858 garLoopResultBuilder]: For program point L3183-1(line 3183) no Hoare annotation was computed. [2022-02-20 22:04:22,061 INFO L861 garLoopResultBuilder]: At program point L3183(line 3183) the Hoare annotation is: true [2022-02-20 22:04:22,061 INFO L861 garLoopResultBuilder]: At program point L3212(line 3212) the Hoare annotation is: true [2022-02-20 22:04:22,061 INFO L858 garLoopResultBuilder]: For program point L3179-1(line 3179) no Hoare annotation was computed. [2022-02-20 22:04:22,061 INFO L861 garLoopResultBuilder]: At program point L3179(line 3179) the Hoare annotation is: true [2022-02-20 22:04:22,061 INFO L858 garLoopResultBuilder]: For program point L3212-1(line 3212) no Hoare annotation was computed. [2022-02-20 22:04:22,061 INFO L858 garLoopResultBuilder]: For program point L3171-1(line 3171) no Hoare annotation was computed. [2022-02-20 22:04:22,061 INFO L861 garLoopResultBuilder]: At program point L3171(line 3171) the Hoare annotation is: true [2022-02-20 22:04:22,062 INFO L858 garLoopResultBuilder]: For program point L3200(lines 3200 3210) no Hoare annotation was computed. [2022-02-20 22:04:22,062 INFO L861 garLoopResultBuilder]: At program point L3196(line 3196) the Hoare annotation is: true [2022-02-20 22:04:22,062 INFO L858 garLoopResultBuilder]: For program point L3196-1(line 3196) no Hoare annotation was computed. [2022-02-20 22:04:22,062 INFO L858 garLoopResultBuilder]: For program point L3192(line 3192) no Hoare annotation was computed. [2022-02-20 22:04:22,062 INFO L858 garLoopResultBuilder]: For program point L3188(line 3188) no Hoare annotation was computed. [2022-02-20 22:04:22,062 INFO L861 garLoopResultBuilder]: At program point L3180(line 3180) the Hoare annotation is: true [2022-02-20 22:04:22,062 INFO L858 garLoopResultBuilder]: For program point L3213-1(line 3213) no Hoare annotation was computed. [2022-02-20 22:04:22,062 INFO L861 garLoopResultBuilder]: At program point L3213(line 3213) the Hoare annotation is: true [2022-02-20 22:04:22,063 INFO L858 garLoopResultBuilder]: For program point L3180-1(line 3180) no Hoare annotation was computed. [2022-02-20 22:04:22,063 INFO L861 garLoopResultBuilder]: At program point L3172(line 3172) the Hoare annotation is: true [2022-02-20 22:04:22,063 INFO L858 garLoopResultBuilder]: For program point L3172-1(line 3172) no Hoare annotation was computed. [2022-02-20 22:04:22,063 INFO L858 garLoopResultBuilder]: For program point L3193-1(line 3193) no Hoare annotation was computed. [2022-02-20 22:04:22,063 INFO L861 garLoopResultBuilder]: At program point L3193(line 3193) the Hoare annotation is: true [2022-02-20 22:04:22,063 INFO L858 garLoopResultBuilder]: For program point L3189-1(line 3189) no Hoare annotation was computed. [2022-02-20 22:04:22,063 INFO L861 garLoopResultBuilder]: At program point L3189(line 3189) the Hoare annotation is: true [2022-02-20 22:04:22,063 INFO L861 garLoopResultBuilder]: At program point L3214(line 3214) the Hoare annotation is: true [2022-02-20 22:04:22,064 INFO L858 garLoopResultBuilder]: For program point L3181-1(line 3181) no Hoare annotation was computed. [2022-02-20 22:04:22,064 INFO L861 garLoopResultBuilder]: At program point L3181(line 3181) the Hoare annotation is: true [2022-02-20 22:04:22,064 INFO L858 garLoopResultBuilder]: For program point L3214-1(line 3214) no Hoare annotation was computed. [2022-02-20 22:04:22,064 INFO L858 garLoopResultBuilder]: For program point L3177(lines 3177 3185) no Hoare annotation was computed. [2022-02-20 22:04:22,064 INFO L858 garLoopResultBuilder]: For program point L3206(lines 3206 3210) no Hoare annotation was computed. [2022-02-20 22:04:22,064 INFO L858 garLoopResultBuilder]: For program point L3177-2(lines 3177 3185) no Hoare annotation was computed. [2022-02-20 22:04:22,065 INFO L858 garLoopResultBuilder]: For program point L3206-2(lines 3200 3210) no Hoare annotation was computed. [2022-02-20 22:04:22,065 INFO L858 garLoopResultBuilder]: For program point L3173(lines 3173 3176) no Hoare annotation was computed. [2022-02-20 22:04:22,065 INFO L858 garLoopResultBuilder]: For program point L3173-2(lines 3173 3176) no Hoare annotation was computed. [2022-02-20 22:04:22,065 INFO L858 garLoopResultBuilder]: For program point L3000(line 3000) no Hoare annotation was computed. [2022-02-20 22:04:22,065 INFO L858 garLoopResultBuilder]: For program point snd_uart16550_buffer_outputEXIT(lines 2991 3007) no Hoare annotation was computed. [2022-02-20 22:04:22,065 INFO L858 garLoopResultBuilder]: For program point L3000-2(line 3000) no Hoare annotation was computed. [2022-02-20 22:04:22,065 INFO L858 garLoopResultBuilder]: For program point L2996(lines 2996 3004) no Hoare annotation was computed. [2022-02-20 22:04:22,065 INFO L858 garLoopResultBuilder]: For program point L3000-4(line 3000) no Hoare annotation was computed. [2022-02-20 22:04:22,066 INFO L858 garLoopResultBuilder]: For program point L3000-6(line 3000) no Hoare annotation was computed. [2022-02-20 22:04:22,066 INFO L858 garLoopResultBuilder]: For program point L2996-2(lines 2991 3007) no Hoare annotation was computed. [2022-02-20 22:04:22,066 INFO L858 garLoopResultBuilder]: For program point L3000-8(line 3000) no Hoare annotation was computed. [2022-02-20 22:04:22,066 INFO L854 garLoopResultBuilder]: At program point snd_uart16550_buffer_outputENTRY(lines 2991 3007) the Hoare annotation is: (or (and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)) (not (= ~ldv_retval_2~0 0))) [2022-02-20 22:04:22,066 INFO L858 garLoopResultBuilder]: For program point L2997-1(line 2997) no Hoare annotation was computed. [2022-02-20 22:04:22,066 INFO L854 garLoopResultBuilder]: At program point L2997(line 2997) the Hoare annotation is: (or (and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)) (not (= ~ldv_retval_2~0 0))) [2022-02-20 22:04:22,066 INFO L861 garLoopResultBuilder]: At program point L2674-1(line 2674) the Hoare annotation is: true [2022-02-20 22:04:22,067 INFO L858 garLoopResultBuilder]: For program point L-1(line -1) no Hoare annotation was computed. [2022-02-20 22:04:22,067 INFO L858 garLoopResultBuilder]: For program point L2669(lines 2669 2677) no Hoare annotation was computed. [2022-02-20 22:04:22,067 INFO L858 garLoopResultBuilder]: For program point ldv_zallocEXIT(lines 2662 2679) no Hoare annotation was computed. [2022-02-20 22:04:22,067 INFO L854 garLoopResultBuilder]: At program point ldv_zallocENTRY(lines 2662 2679) the Hoare annotation is: (or (not (= ~ldv_spin~0 0)) (not (= ~ldv_retval_2~0 0)) (and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))) [2022-02-20 22:04:22,067 INFO L858 garLoopResultBuilder]: For program point ldv_zallocFINAL(lines 2662 2679) no Hoare annotation was computed. [2022-02-20 22:04:22,067 INFO L861 garLoopResultBuilder]: At program point L2674(line 2674) the Hoare annotation is: true [2022-02-20 22:04:22,067 INFO L858 garLoopResultBuilder]: For program point L2675-1(line 2675) no Hoare annotation was computed. [2022-02-20 22:04:22,067 INFO L861 garLoopResultBuilder]: At program point L2675(line 2675) the Hoare annotation is: true [2022-02-20 22:04:22,068 INFO L861 garLoopResultBuilder]: At program point snd_rawmidi_receiveENTRY(lines 4486 4488) the Hoare annotation is: true [2022-02-20 22:04:22,068 INFO L858 garLoopResultBuilder]: For program point snd_rawmidi_receiveEXIT(lines 4486 4488) no Hoare annotation was computed. [2022-02-20 22:04:22,068 INFO L858 garLoopResultBuilder]: For program point snd_rawmidi_receiveFINAL(lines 4486 4488) no Hoare annotation was computed. [2022-02-20 22:04:22,068 INFO L858 garLoopResultBuilder]: For program point L4032(line 4032) no Hoare annotation was computed. [2022-02-20 22:04:22,068 INFO L858 garLoopResultBuilder]: For program point L3702(line 3702) no Hoare annotation was computed. [2022-02-20 22:04:22,068 INFO L858 garLoopResultBuilder]: For program point L3702-2(lines 3702 3707) no Hoare annotation was computed. [2022-02-20 22:04:22,068 INFO L858 garLoopResultBuilder]: For program point L3603-1(line 3603) no Hoare annotation was computed. [2022-02-20 22:04:22,068 INFO L854 garLoopResultBuilder]: At program point L3603(line 3603) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,069 INFO L858 garLoopResultBuilder]: For program point L3273-1(line 3273) no Hoare annotation was computed. [2022-02-20 22:04:22,069 INFO L854 garLoopResultBuilder]: At program point L3273(line 3273) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,069 INFO L858 garLoopResultBuilder]: For program point L4198(line 4198) no Hoare annotation was computed. [2022-02-20 22:04:22,069 INFO L858 garLoopResultBuilder]: For program point L4132(line 4132) no Hoare annotation was computed. [2022-02-20 22:04:22,069 INFO L858 garLoopResultBuilder]: For program point L3141(lines 3141 3144) no Hoare annotation was computed. [2022-02-20 22:04:22,069 INFO L858 garLoopResultBuilder]: For program point L4165(lines 4165 4169) no Hoare annotation was computed. [2022-02-20 22:04:22,069 INFO L858 garLoopResultBuilder]: For program point L4099(lines 4099 4103) no Hoare annotation was computed. [2022-02-20 22:04:22,070 INFO L854 garLoopResultBuilder]: At program point L3141-2(lines 3141 3144) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,070 INFO L858 garLoopResultBuilder]: For program point L4033-1(line 4033) no Hoare annotation was computed. [2022-02-20 22:04:22,070 INFO L854 garLoopResultBuilder]: At program point L4033(line 4033) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,070 INFO L854 garLoopResultBuilder]: At program point L3835-1(lines 3832 3838) the Hoare annotation is: (= ~ldv_state_variable_3~0 0) [2022-02-20 22:04:22,070 INFO L861 garLoopResultBuilder]: At program point L3835(line 3835) the Hoare annotation is: true [2022-02-20 22:04:22,070 INFO L854 garLoopResultBuilder]: At program point L3670(lines 3647 3672) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,070 INFO L854 garLoopResultBuilder]: At program point L4463(lines 4462 4464) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,070 INFO L858 garLoopResultBuilder]: For program point L3307-1(line 3307) no Hoare annotation was computed. [2022-02-20 22:04:22,071 INFO L854 garLoopResultBuilder]: At program point L3307(line 3307) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,071 INFO L858 garLoopResultBuilder]: For program point L4199(lines 4199 4203) no Hoare annotation was computed. [2022-02-20 22:04:22,071 INFO L858 garLoopResultBuilder]: For program point L4232(line 4232) no Hoare annotation was computed. [2022-02-20 22:04:22,071 INFO L858 garLoopResultBuilder]: For program point L4133(lines 4133 4149) no Hoare annotation was computed. [2022-02-20 22:04:22,071 INFO L858 garLoopResultBuilder]: For program point L4199-2(lines 4197 4234) no Hoare annotation was computed. [2022-02-20 22:04:22,071 INFO L858 garLoopResultBuilder]: For program point L3803-1(line 3803) no Hoare annotation was computed. [2022-02-20 22:04:22,071 INFO L854 garLoopResultBuilder]: At program point L3803(line 3803) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,071 INFO L858 garLoopResultBuilder]: For program point L3737(lines 3737 3740) no Hoare annotation was computed. [2022-02-20 22:04:22,072 INFO L858 garLoopResultBuilder]: For program point L3308(lines 3308 3311) no Hoare annotation was computed. [2022-02-20 22:04:22,072 INFO L858 garLoopResultBuilder]: For program point L3308-1(lines 3308 3311) no Hoare annotation was computed. [2022-02-20 22:04:22,072 INFO L858 garLoopResultBuilder]: For program point L4200-1(line 4200) no Hoare annotation was computed. [2022-02-20 22:04:22,072 INFO L861 garLoopResultBuilder]: At program point L4233(line 4233) the Hoare annotation is: true [2022-02-20 22:04:22,072 INFO L854 garLoopResultBuilder]: At program point L4200(line 4200) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,072 INFO L858 garLoopResultBuilder]: For program point L4068(lines 4068 4241) no Hoare annotation was computed. [2022-02-20 22:04:22,072 INFO L858 garLoopResultBuilder]: For program point L4035(line 4035) no Hoare annotation was computed. [2022-02-20 22:04:22,073 INFO L858 garLoopResultBuilder]: For program point L3804(lines 3804 3807) no Hoare annotation was computed. [2022-02-20 22:04:22,073 INFO L854 garLoopResultBuilder]: At program point L3738(lines 3679 3746) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,073 INFO L854 garLoopResultBuilder]: At program point L2582(lines 2579 2584) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,073 INFO L858 garLoopResultBuilder]: For program point L3573(lines 3573 3578) no Hoare annotation was computed. [2022-02-20 22:04:22,073 INFO L858 garLoopResultBuilder]: For program point L3276(lines 3276 3279) no Hoare annotation was computed. [2022-02-20 22:04:22,073 INFO L854 garLoopResultBuilder]: At program point L3309(line 3309) the Hoare annotation is: (= ~ldv_retval_2~0 0) [2022-02-20 22:04:22,073 INFO L854 garLoopResultBuilder]: At program point L3276-1(lines 3276 3279) the Hoare annotation is: (= ~ldv_retval_2~0 0) [2022-02-20 22:04:22,073 INFO L858 garLoopResultBuilder]: For program point L4135(lines 4135 4139) no Hoare annotation was computed. [2022-02-20 22:04:22,074 INFO L861 garLoopResultBuilder]: At program point L4036(line 4036) the Hoare annotation is: true [2022-02-20 22:04:22,074 INFO L858 garLoopResultBuilder]: For program point L4069(line 4069) no Hoare annotation was computed. [2022-02-20 22:04:22,074 INFO L854 garLoopResultBuilder]: At program point L2847(lines 2843 2849) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,074 INFO L858 garLoopResultBuilder]: For program point L3607(lines 3607 3617) no Hoare annotation was computed. [2022-02-20 22:04:22,074 INFO L854 garLoopResultBuilder]: At program point L3277(line 3277) the Hoare annotation is: (= ~ldv_retval_2~0 0) [2022-02-20 22:04:22,074 INFO L854 garLoopResultBuilder]: At program point L3112(line 3112) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,074 INFO L854 garLoopResultBuilder]: At program point L3145(line 3145) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,074 INFO L858 garLoopResultBuilder]: For program point L4070(lines 4070 4112) no Hoare annotation was computed. [2022-02-20 22:04:22,075 INFO L854 garLoopResultBuilder]: At program point L3112-1(line 3112) the Hoare annotation is: (= ~ldv_retval_2~0 0) [2022-02-20 22:04:22,075 INFO L858 garLoopResultBuilder]: For program point L3608(line 3608) no Hoare annotation was computed. [2022-02-20 22:04:22,075 INFO L858 garLoopResultBuilder]: For program point L3575-1(line 3575) no Hoare annotation was computed. [2022-02-20 22:04:22,075 INFO L858 garLoopResultBuilder]: For program point L3608-2(line 3608) no Hoare annotation was computed. [2022-02-20 22:04:22,075 INFO L854 garLoopResultBuilder]: At program point L3575(line 3575) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,075 INFO L858 garLoopResultBuilder]: For program point L3146(line 3146) no Hoare annotation was computed. [2022-02-20 22:04:22,075 INFO L861 garLoopResultBuilder]: At program point L4137(lines 4053 4247) the Hoare annotation is: true [2022-02-20 22:04:22,076 INFO L854 garLoopResultBuilder]: At program point L3113(line 3113) the Hoare annotation is: (= ~ldv_retval_2~0 0) [2022-02-20 22:04:22,076 INFO L854 garLoopResultBuilder]: At program point L4038(lines 4017 4041) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,076 INFO L858 garLoopResultBuilder]: For program point L3972(lines 3972 3978) no Hoare annotation was computed. [2022-02-20 22:04:22,076 INFO L854 garLoopResultBuilder]: At program point L2816(lines 2795 2818) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,076 INFO L858 garLoopResultBuilder]: For program point L3708(line 3708) no Hoare annotation was computed. [2022-02-20 22:04:22,076 INFO L858 garLoopResultBuilder]: For program point L3708-2(lines 3708 3713) no Hoare annotation was computed. [2022-02-20 22:04:22,076 INFO L858 garLoopResultBuilder]: For program point L3609(line 3609) no Hoare annotation was computed. [2022-02-20 22:04:22,076 INFO L854 garLoopResultBuilder]: At program point L4336(lines 4327 4338) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,077 INFO L854 garLoopResultBuilder]: At program point L3114(line 3114) the Hoare annotation is: (= ~ldv_retval_2~0 0) [2022-02-20 22:04:22,077 INFO L858 garLoopResultBuilder]: For program point L3147(lines 3147 3150) no Hoare annotation was computed. [2022-02-20 22:04:22,077 INFO L858 garLoopResultBuilder]: For program point L4072(lines 4072 4109) no Hoare annotation was computed. [2022-02-20 22:04:22,077 INFO L854 garLoopResultBuilder]: At program point L3147-2(lines 3147 3150) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,077 INFO L854 garLoopResultBuilder]: At program point L3808(line 3808) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,077 INFO L858 garLoopResultBuilder]: For program point L3808-1(line 3808) no Hoare annotation was computed. [2022-02-20 22:04:22,077 INFO L854 garLoopResultBuilder]: At program point L3610(line 3610) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,077 INFO L858 garLoopResultBuilder]: For program point L3610-1(line 3610) no Hoare annotation was computed. [2022-02-20 22:04:22,078 INFO L854 garLoopResultBuilder]: At program point L4403(lines 4402 4404) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,078 INFO L858 garLoopResultBuilder]: For program point L3280(line 3280) no Hoare annotation was computed. [2022-02-20 22:04:22,078 INFO L854 garLoopResultBuilder]: At program point L4205(line 4205) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,078 INFO L854 garLoopResultBuilder]: At program point L3115(lines 3106 3118) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,078 INFO L858 garLoopResultBuilder]: For program point L4205-1(line 4205) no Hoare annotation was computed. [2022-02-20 22:04:22,078 INFO L858 garLoopResultBuilder]: For program point L4073(line 4073) no Hoare annotation was computed. [2022-02-20 22:04:22,078 INFO L858 garLoopResultBuilder]: For program point L3941(lines 3941 3944) no Hoare annotation was computed. [2022-02-20 22:04:22,078 INFO L858 garLoopResultBuilder]: For program point L3809(lines 3809 3813) no Hoare annotation was computed. [2022-02-20 22:04:22,079 INFO L854 garLoopResultBuilder]: At program point L3314(line 3314) the Hoare annotation is: (= ~ldv_retval_2~0 0) [2022-02-20 22:04:22,079 INFO L861 garLoopResultBuilder]: At program point L4437(lines 4436 4438) the Hoare annotation is: true [2022-02-20 22:04:22,079 INFO L858 garLoopResultBuilder]: For program point L4239(line 4239) no Hoare annotation was computed. [2022-02-20 22:04:22,079 INFO L854 garLoopResultBuilder]: At program point L3281(lines 3267 3283) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,079 INFO L858 garLoopResultBuilder]: For program point L3314-1(line 3314) no Hoare annotation was computed. [2022-02-20 22:04:22,079 INFO L858 garLoopResultBuilder]: For program point L4140(lines 4140 4147) no Hoare annotation was computed. [2022-02-20 22:04:22,079 INFO L858 garLoopResultBuilder]: For program point L4173(line 4173) no Hoare annotation was computed. [2022-02-20 22:04:22,080 INFO L858 garLoopResultBuilder]: For program point L4074(lines 4074 4078) no Hoare annotation was computed. [2022-02-20 22:04:22,080 INFO L858 garLoopResultBuilder]: For program point L4107(line 4107) no Hoare annotation was computed. [2022-02-20 22:04:22,080 INFO L858 garLoopResultBuilder]: For program point L4074-2(lines 4072 4109) no Hoare annotation was computed. [2022-02-20 22:04:22,080 INFO L854 garLoopResultBuilder]: At program point L3810(line 3810) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,080 INFO L854 garLoopResultBuilder]: At program point L3744(line 3744) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,080 INFO L858 garLoopResultBuilder]: For program point L3744-1(line 3744) no Hoare annotation was computed. [2022-02-20 22:04:22,080 INFO L858 garLoopResultBuilder]: For program point L3612(line 3612) no Hoare annotation was computed. [2022-02-20 22:04:22,080 INFO L858 garLoopResultBuilder]: For program point L3579-1(lines 3579 3589) no Hoare annotation was computed. [2022-02-20 22:04:22,081 INFO L858 garLoopResultBuilder]: For program point L3579(lines 3579 3589) no Hoare annotation was computed. [2022-02-20 22:04:22,081 INFO L854 garLoopResultBuilder]: At program point L4471(lines 4470 4472) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,081 INFO L854 garLoopResultBuilder]: At program point L3315(lines 3301 3317) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,081 INFO L858 garLoopResultBuilder]: For program point L4174(lines 4174 4179) no Hoare annotation was computed. [2022-02-20 22:04:22,081 INFO L861 garLoopResultBuilder]: At program point L4240(line 4240) the Hoare annotation is: true [2022-02-20 22:04:22,081 INFO L861 garLoopResultBuilder]: At program point L4108(line 4108) the Hoare annotation is: true [2022-02-20 22:04:22,081 INFO L858 garLoopResultBuilder]: For program point L4075-1(line 4075) no Hoare annotation was computed. [2022-02-20 22:04:22,081 INFO L854 garLoopResultBuilder]: At program point L4075(line 4075) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,082 INFO L854 garLoopResultBuilder]: At program point L3745(lines 3673 3747) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,082 INFO L858 garLoopResultBuilder]: For program point L3613-1(line 3613) no Hoare annotation was computed. [2022-02-20 22:04:22,082 INFO L854 garLoopResultBuilder]: At program point L3613(line 3613) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,082 INFO L854 garLoopResultBuilder]: At program point L4406(lines 4405 4407) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,082 INFO L854 garLoopResultBuilder]: At program point L3151(line 3151) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,082 INFO L854 garLoopResultBuilder]: At program point L4440(lines 4439 4441) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_state_variable_3~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,082 INFO L854 garLoopResultBuilder]: At program point L4242(lines 4053 4247) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,083 INFO L858 garLoopResultBuilder]: For program point L3152(line 3152) no Hoare annotation was computed. [2022-02-20 22:04:22,083 INFO L854 garLoopResultBuilder]: At program point L3945(lines 3938 3947) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,083 INFO L858 garLoopResultBuilder]: For program point L3681(lines 3681 3700) no Hoare annotation was computed. [2022-02-20 22:04:22,083 INFO L858 garLoopResultBuilder]: For program point L3582(lines 3582 3587) no Hoare annotation was computed. [2022-02-20 22:04:22,083 INFO L858 garLoopResultBuilder]: For program point L3615(line 3615) no Hoare annotation was computed. [2022-02-20 22:04:22,083 INFO L858 garLoopResultBuilder]: For program point L4210(line 4210) no Hoare annotation was computed. [2022-02-20 22:04:22,083 INFO L858 garLoopResultBuilder]: For program point L3153(lines 3153 3156) no Hoare annotation was computed. [2022-02-20 22:04:22,083 INFO L858 garLoopResultBuilder]: For program point L3153-2(lines 3153 3156) no Hoare annotation was computed. [2022-02-20 22:04:22,084 INFO L854 garLoopResultBuilder]: At program point L4012(line 4012) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,084 INFO L858 garLoopResultBuilder]: For program point L4012-1(line 4012) no Hoare annotation was computed. [2022-02-20 22:04:22,084 INFO L854 garLoopResultBuilder]: At program point L3979(lines 3948 3981) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,084 INFO L854 garLoopResultBuilder]: At program point L2790(lines 2786 2792) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,084 INFO L858 garLoopResultBuilder]: For program point L3682(line 3682) no Hoare annotation was computed. [2022-02-20 22:04:22,084 INFO L854 garLoopResultBuilder]: At program point L4475(lines 4474 4476) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,084 INFO L854 garLoopResultBuilder]: At program point L4409-2(lines 4408 4410) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,085 INFO L854 garLoopResultBuilder]: At program point L4409(line 4409) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,085 INFO L858 garLoopResultBuilder]: For program point L4409-1(line 4409) no Hoare annotation was computed. [2022-02-20 22:04:22,085 INFO L858 garLoopResultBuilder]: For program point L4211(lines 4211 4219) no Hoare annotation was computed. [2022-02-20 22:04:22,085 INFO L858 garLoopResultBuilder]: For program point L3716(lines 3716 3719) no Hoare annotation was computed. [2022-02-20 22:04:22,085 INFO L854 garLoopResultBuilder]: At program point L4278(lines 4274 4280) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,085 INFO L858 garLoopResultBuilder]: For program point L4344(lines 4344 4347) no Hoare annotation was computed. [2022-02-20 22:04:22,085 INFO L854 garLoopResultBuilder]: At program point L4080(line 4080) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,085 INFO L854 garLoopResultBuilder]: At program point L4014(lines 4008 4016) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,086 INFO L858 garLoopResultBuilder]: For program point L4080-1(line 4080) no Hoare annotation was computed. [2022-02-20 22:04:22,086 INFO L854 garLoopResultBuilder]: At program point L3816(lines 3787 3830) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,086 INFO L854 garLoopResultBuilder]: At program point L3618(lines 3554 3624) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,086 INFO L858 garLoopResultBuilder]: For program point L4312-2(lines 4312 4315) no Hoare annotation was computed. [2022-02-20 22:04:22,086 INFO L861 garLoopResultBuilder]: At program point L4246(lines 4042 4248) the Hoare annotation is: true [2022-02-20 22:04:22,086 INFO L858 garLoopResultBuilder]: For program point L4312(lines 4312 4315) no Hoare annotation was computed. [2022-02-20 22:04:22,086 INFO L858 garLoopResultBuilder]: For program point L4114(line 4114) no Hoare annotation was computed. [2022-02-20 22:04:22,086 INFO L858 garLoopResultBuilder]: For program point L4213(lines 4213 4217) no Hoare annotation was computed. [2022-02-20 22:04:22,087 INFO L858 garLoopResultBuilder]: For program point L3685(line 3685) no Hoare annotation was computed. [2022-02-20 22:04:22,087 INFO L858 garLoopResultBuilder]: For program point L3619-1(lines 3619 3622) no Hoare annotation was computed. [2022-02-20 22:04:22,087 INFO L858 garLoopResultBuilder]: For program point L3685-2(line 3685) no Hoare annotation was computed. [2022-02-20 22:04:22,087 INFO L854 garLoopResultBuilder]: At program point L4346(line 4346) the Hoare annotation is: false [2022-02-20 22:04:22,087 INFO L854 garLoopResultBuilder]: At program point L3256(line 3256) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,087 INFO L854 garLoopResultBuilder]: At program point L4346-1(lines 4341 4350) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,087 INFO L858 garLoopResultBuilder]: For program point L3256-1(line 3256) no Hoare annotation was computed. [2022-02-20 22:04:22,088 INFO L854 garLoopResultBuilder]: At program point L3157(lines 3119 3159) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,088 INFO L858 garLoopResultBuilder]: For program point L4181(line 4181) no Hoare annotation was computed. [2022-02-20 22:04:22,088 INFO L858 garLoopResultBuilder]: For program point L4115(lines 4115 4118) no Hoare annotation was computed. [2022-02-20 22:04:22,088 INFO L854 garLoopResultBuilder]: At program point L3818(lines 3787 3830) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,088 INFO L854 garLoopResultBuilder]: At program point L3752(line 3752) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,088 INFO L858 garLoopResultBuilder]: For program point L3686(line 3686) no Hoare annotation was computed. [2022-02-20 22:04:22,088 INFO L858 garLoopResultBuilder]: For program point L3752-1(line 3752) no Hoare annotation was computed. [2022-02-20 22:04:22,088 INFO L854 garLoopResultBuilder]: At program point L4479(lines 4478 4480) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,089 INFO L854 garLoopResultBuilder]: At program point L4446(line 4446) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,089 INFO L858 garLoopResultBuilder]: For program point ULTIMATE.startENTRY(line -1) no Hoare annotation was computed. [2022-02-20 22:04:22,089 INFO L858 garLoopResultBuilder]: For program point L4446-1(line 4446) no Hoare annotation was computed. [2022-02-20 22:04:22,089 INFO L854 garLoopResultBuilder]: At program point L4446-2(lines 4445 4447) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,089 INFO L858 garLoopResultBuilder]: For program point L3257-1(lines 3257 3260) no Hoare annotation was computed. [2022-02-20 22:04:22,089 INFO L858 garLoopResultBuilder]: For program point L3257(lines 3257 3260) no Hoare annotation was computed. [2022-02-20 22:04:22,089 INFO L861 garLoopResultBuilder]: At program point L4182(line 4182) the Hoare annotation is: true [2022-02-20 22:04:22,089 INFO L858 garLoopResultBuilder]: For program point L3951(lines 3951 3957) no Hoare annotation was computed. [2022-02-20 22:04:22,090 INFO L854 garLoopResultBuilder]: At program point L2828(lines 2819 2830) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,090 INFO L854 garLoopResultBuilder]: At program point L3720(line 3720) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,090 INFO L858 garLoopResultBuilder]: For program point L3753-1(line 3753) no Hoare annotation was computed. [2022-02-20 22:04:22,090 INFO L854 garLoopResultBuilder]: At program point L3753(line 3753) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,090 INFO L858 garLoopResultBuilder]: For program point L3720-1(line 3720) no Hoare annotation was computed. [2022-02-20 22:04:22,090 INFO L854 garLoopResultBuilder]: At program point L3324(line 3324) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,090 INFO L854 garLoopResultBuilder]: At program point L3258(line 3258) the Hoare annotation is: (= ~ldv_retval_2~0 0) [2022-02-20 22:04:22,090 INFO L858 garLoopResultBuilder]: For program point L3324-1(line 3324) no Hoare annotation was computed. [2022-02-20 22:04:22,091 INFO L858 garLoopResultBuilder]: For program point L3126(lines 3126 3129) no Hoare annotation was computed. [2022-02-20 22:04:22,091 INFO L854 garLoopResultBuilder]: At program point L3820(lines 3787 3830) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,091 INFO L854 garLoopResultBuilder]: At program point L3754(lines 3748 3756) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,091 INFO L858 garLoopResultBuilder]: For program point L3721-1(line 3721) no Hoare annotation was computed. [2022-02-20 22:04:22,091 INFO L854 garLoopResultBuilder]: At program point L3721(line 3721) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,091 INFO L858 garLoopResultBuilder]: For program point L3655(lines 3655 3658) no Hoare annotation was computed. [2022-02-20 22:04:22,091 INFO L854 garLoopResultBuilder]: At program point L4316(lines 4300 4318) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,092 INFO L858 garLoopResultBuilder]: For program point L4151(line 4151) no Hoare annotation was computed. [2022-02-20 22:04:22,092 INFO L858 garLoopResultBuilder]: For program point L4085(line 4085) no Hoare annotation was computed. [2022-02-20 22:04:22,092 INFO L854 garLoopResultBuilder]: At program point L3854(lines 3847 3856) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,092 INFO L854 garLoopResultBuilder]: At program point L3623(lines 3544 3625) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,092 INFO L861 garLoopResultBuilder]: At program point L4152(line 4152) the Hoare annotation is: true [2022-02-20 22:04:22,092 INFO L858 garLoopResultBuilder]: For program point L4086(lines 4086 4094) no Hoare annotation was computed. [2022-02-20 22:04:22,092 INFO L858 garLoopResultBuilder]: For program point L3789(lines 3789 3792) no Hoare annotation was computed. [2022-02-20 22:04:22,092 INFO L858 garLoopResultBuilder]: For program point L3690(line 3690) no Hoare annotation was computed. [2022-02-20 22:04:22,093 INFO L854 garLoopResultBuilder]: At program point L4483(lines 4482 4484) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,093 INFO L854 garLoopResultBuilder]: At program point L3327-1(lines 3327 3330) the Hoare annotation is: (= ~ldv_retval_2~0 0) [2022-02-20 22:04:22,093 INFO L858 garLoopResultBuilder]: For program point L3327(lines 3327 3330) no Hoare annotation was computed. [2022-02-20 22:04:22,093 INFO L858 garLoopResultBuilder]: For program point L4120(line 4120) no Hoare annotation was computed. [2022-02-20 22:04:22,093 INFO L858 garLoopResultBuilder]: For program point L3823(lines 3823 3828) no Hoare annotation was computed. [2022-02-20 22:04:22,093 INFO L854 garLoopResultBuilder]: At program point L3328(line 3328) the Hoare annotation is: (= ~ldv_retval_2~0 0) [2022-02-20 22:04:22,093 INFO L858 garLoopResultBuilder]: For program point ULTIMATE.startEXIT(line -1) no Hoare annotation was computed. [2022-02-20 22:04:22,093 INFO L858 garLoopResultBuilder]: For program point L4088(lines 4088 4092) no Hoare annotation was computed. [2022-02-20 22:04:22,094 INFO L858 garLoopResultBuilder]: For program point L4121(lines 4121 4156) no Hoare annotation was computed. [2022-02-20 22:04:22,094 INFO L858 garLoopResultBuilder]: For program point L4022(lines 4022 4037) no Hoare annotation was computed. [2022-02-20 22:04:22,094 INFO L858 garLoopResultBuilder]: For program point L3725(lines 3725 3728) no Hoare annotation was computed. [2022-02-20 22:04:22,094 INFO L858 garLoopResultBuilder]: For program point L3659-1(line 3659) no Hoare annotation was computed. [2022-02-20 22:04:22,094 INFO L854 garLoopResultBuilder]: At program point L3659(line 3659) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,094 INFO L858 garLoopResultBuilder]: For program point L3560(lines 3560 3563) no Hoare annotation was computed. [2022-02-20 22:04:22,094 INFO L858 garLoopResultBuilder]: For program point L3263-1(line 3263) no Hoare annotation was computed. [2022-02-20 22:04:22,094 INFO L854 garLoopResultBuilder]: At program point L3263(line 3263) the Hoare annotation is: (= ~ldv_retval_2~0 0) [2022-02-20 22:04:22,095 INFO L858 garLoopResultBuilder]: For program point L4188(line 4188) no Hoare annotation was computed. [2022-02-20 22:04:22,095 INFO L858 garLoopResultBuilder]: For program point L4221(line 4221) no Hoare annotation was computed. [2022-02-20 22:04:22,095 INFO L858 garLoopResultBuilder]: For program point L4023(line 4023) no Hoare annotation was computed. [2022-02-20 22:04:22,095 INFO L858 garLoopResultBuilder]: For program point L3825-1(line 3825) no Hoare annotation was computed. [2022-02-20 22:04:22,095 INFO L854 garLoopResultBuilder]: At program point L3825(line 3825) the Hoare annotation is: (= ~ldv_retval_2~0 0) [2022-02-20 22:04:22,095 INFO L854 garLoopResultBuilder]: At program point L3660(line 3660) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,095 INFO L858 garLoopResultBuilder]: For program point L3660-1(line 3660) no Hoare annotation was computed. [2022-02-20 22:04:22,095 INFO L854 garLoopResultBuilder]: At program point L3264(lines 3250 3266) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,096 INFO L858 garLoopResultBuilder]: For program point L4222(lines 4222 4230) no Hoare annotation was computed. [2022-02-20 22:04:22,096 INFO L858 garLoopResultBuilder]: For program point L3132(lines 3132 3137) no Hoare annotation was computed. [2022-02-20 22:04:22,096 INFO L858 garLoopResultBuilder]: For program point L4189(lines 4189 4192) no Hoare annotation was computed. [2022-02-20 22:04:22,096 INFO L858 garLoopResultBuilder]: For program point L4123(lines 4123 4153) no Hoare annotation was computed. [2022-02-20 22:04:22,096 INFO L854 garLoopResultBuilder]: At program point L4024(line 4024) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,096 INFO L858 garLoopResultBuilder]: For program point L3958(lines 3958 3964) no Hoare annotation was computed. [2022-02-20 22:04:22,096 INFO L858 garLoopResultBuilder]: For program point L4024-1(line 4024) no Hoare annotation was computed. [2022-02-20 22:04:22,096 INFO L858 garLoopResultBuilder]: For program point L3694(line 3694) no Hoare annotation was computed. [2022-02-20 22:04:22,097 INFO L858 garLoopResultBuilder]: For program point L3661-1(line 3661) no Hoare annotation was computed. [2022-02-20 22:04:22,097 INFO L854 garLoopResultBuilder]: At program point L3661(line 3661) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,097 INFO L858 garLoopResultBuilder]: For program point L3331(line 3331) no Hoare annotation was computed. [2022-02-20 22:04:22,097 INFO L858 garLoopResultBuilder]: For program point L4124(line 4124) no Hoare annotation was computed. [2022-02-20 22:04:22,097 INFO L858 garLoopResultBuilder]: For program point ULTIMATE.startFINAL(line -1) no Hoare annotation was computed. [2022-02-20 22:04:22,097 INFO L854 garLoopResultBuilder]: At program point L3662(line 3662) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,097 INFO L858 garLoopResultBuilder]: For program point L3662-1(line 3662) no Hoare annotation was computed. [2022-02-20 22:04:22,097 INFO L854 garLoopResultBuilder]: At program point L3332(lines 3318 3334) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,098 INFO L858 garLoopResultBuilder]: For program point L4158(line 4158) no Hoare annotation was computed. [2022-02-20 22:04:22,098 INFO L858 garLoopResultBuilder]: For program point L4224(lines 4224 4228) no Hoare annotation was computed. [2022-02-20 22:04:22,098 INFO L858 garLoopResultBuilder]: For program point L4125(lines 4125 4130) no Hoare annotation was computed. [2022-02-20 22:04:22,098 INFO L858 garLoopResultBuilder]: For program point L4026(line 4026) no Hoare annotation was computed. [2022-02-20 22:04:22,098 INFO L858 garLoopResultBuilder]: For program point L3861-1(line 3861) no Hoare annotation was computed. [2022-02-20 22:04:22,098 INFO L854 garLoopResultBuilder]: At program point L3861(line 3861) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,098 INFO L854 garLoopResultBuilder]: At program point L2771(lines 2763 2773) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,098 INFO L858 garLoopResultBuilder]: For program point L3696(line 3696) no Hoare annotation was computed. [2022-02-20 22:04:22,099 INFO L858 garLoopResultBuilder]: For program point L3663-1(line 3663) no Hoare annotation was computed. [2022-02-20 22:04:22,099 INFO L854 garLoopResultBuilder]: At program point L3663(line 3663) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,099 INFO L858 garLoopResultBuilder]: For program point L3597-1(line 3597) no Hoare annotation was computed. [2022-02-20 22:04:22,099 INFO L854 garLoopResultBuilder]: At program point L3597(line 3597) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,100 INFO L858 garLoopResultBuilder]: For program point L4159(lines 4159 4186) no Hoare annotation was computed. [2022-02-20 22:04:22,100 INFO L858 garLoopResultBuilder]: For program point L4027-1(line 4027) no Hoare annotation was computed. [2022-02-20 22:04:22,100 INFO L854 garLoopResultBuilder]: At program point L4027(line 4027) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,100 INFO L854 garLoopResultBuilder]: At program point L3829(lines 3779 3831) the Hoare annotation is: (let ((.cse0 (= ~ldv_retval_2~0 0))) (or (and (= ~ldv_spin~0 0) .cse0) (and (not (= |ULTIMATE.start_alsa_card_serial_init_#res#1| 0)) .cse0))) [2022-02-20 22:04:22,100 INFO L858 garLoopResultBuilder]: For program point L3730(lines 3730 3733) no Hoare annotation was computed. [2022-02-20 22:04:22,100 INFO L854 garLoopResultBuilder]: At program point L3896(line 3896) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,100 INFO L854 garLoopResultBuilder]: At program point L3863(lines 3857 3865) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,101 INFO L858 garLoopResultBuilder]: For program point L3896-1(line 3896) no Hoare annotation was computed. [2022-02-20 22:04:22,101 INFO L858 garLoopResultBuilder]: For program point L3797(lines 3797 3800) no Hoare annotation was computed. [2022-02-20 22:04:22,101 INFO L858 garLoopResultBuilder]: For program point L4194(line 4194) no Hoare annotation was computed. [2022-02-20 22:04:22,101 INFO L858 garLoopResultBuilder]: For program point L4161(lines 4161 4183) no Hoare annotation was computed. [2022-02-20 22:04:22,101 INFO L858 garLoopResultBuilder]: For program point L-1(line -1) no Hoare annotation was computed. [2022-02-20 22:04:22,101 INFO L854 garLoopResultBuilder]: At program point L-1-2(line -1) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,101 INFO L858 garLoopResultBuilder]: For program point L4029(line 4029) no Hoare annotation was computed. [2022-02-20 22:04:22,101 INFO L858 garLoopResultBuilder]: For program point L-1-3(line -1) no Hoare annotation was computed. [2022-02-20 22:04:22,102 INFO L854 garLoopResultBuilder]: At program point L-1-4(line -1) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,102 INFO L858 garLoopResultBuilder]: For program point L3666(lines 3666 3669) no Hoare annotation was computed. [2022-02-20 22:04:22,102 INFO L858 garLoopResultBuilder]: For program point L3666-2(lines 3666 3669) no Hoare annotation was computed. [2022-02-20 22:04:22,102 INFO L858 garLoopResultBuilder]: For program point L4162(line 4162) no Hoare annotation was computed. [2022-02-20 22:04:22,102 INFO L858 garLoopResultBuilder]: For program point L4195(lines 4195 4237) no Hoare annotation was computed. [2022-02-20 22:04:22,102 INFO L858 garLoopResultBuilder]: For program point L4096(line 4096) no Hoare annotation was computed. [2022-02-20 22:04:22,102 INFO L854 garLoopResultBuilder]: At program point L4030(line 4030) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,102 INFO L858 garLoopResultBuilder]: For program point L4030-1(line 4030) no Hoare annotation was computed. [2022-02-20 22:04:22,103 INFO L854 garLoopResultBuilder]: At program point L3898(lines 3892 3900) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,103 INFO L854 garLoopResultBuilder]: At program point L3139-1(line 3139) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,103 INFO L858 garLoopResultBuilder]: For program point L4163(lines 4163 4171) no Hoare annotation was computed. [2022-02-20 22:04:22,103 INFO L854 garLoopResultBuilder]: At program point L3139(line 3139) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,103 INFO L858 garLoopResultBuilder]: For program point L4097(lines 4097 4105) no Hoare annotation was computed. [2022-02-20 22:04:22,103 INFO L858 garLoopResultBuilder]: For program point L3965(lines 3965 3971) no Hoare annotation was computed. [2022-02-20 22:04:22,103 INFO L854 garLoopResultBuilder]: At program point L3701(lines 3679 3746) the Hoare annotation is: (and (= ~ldv_spin~0 0) (= ~ldv_retval_2~0 0)) [2022-02-20 22:04:22,104 INFO L858 garLoopResultBuilder]: For program point L3602(lines 3602 3606) no Hoare annotation was computed. [2022-02-20 22:04:22,104 INFO L858 garLoopResultBuilder]: For program point L3140(line 3140) no Hoare annotation was computed. [2022-02-20 22:04:22,104 INFO L858 garLoopResultBuilder]: For program point L4197(lines 4197 4234) no Hoare annotation was computed. [2022-02-20 22:04:22,104 INFO L858 garLoopResultBuilder]: For program point snd_uart16550_substreamsFINAL(lines 3626 3646) no Hoare annotation was computed. [2022-02-20 22:04:22,104 INFO L861 garLoopResultBuilder]: At program point snd_uart16550_substreamsENTRY(lines 3626 3646) the Hoare annotation is: true [2022-02-20 22:04:22,104 INFO L861 garLoopResultBuilder]: At program point L3641(lines 3631 3645) the Hoare annotation is: true [2022-02-20 22:04:22,104 INFO L861 garLoopResultBuilder]: At program point L3639(lines 3631 3645) the Hoare annotation is: true [2022-02-20 22:04:22,104 INFO L858 garLoopResultBuilder]: For program point snd_uart16550_substreamsEXIT(lines 3626 3646) no Hoare annotation was computed. [2022-02-20 22:04:22,105 INFO L861 garLoopResultBuilder]: At program point snd_rawmidi_set_opsENTRY(lines 4489 4491) the Hoare annotation is: true [2022-02-20 22:04:22,105 INFO L858 garLoopResultBuilder]: For program point snd_rawmidi_set_opsFINAL(lines 4489 4491) no Hoare annotation was computed. [2022-02-20 22:04:22,105 INFO L858 garLoopResultBuilder]: For program point snd_rawmidi_set_opsEXIT(lines 4489 4491) no Hoare annotation was computed. [2022-02-20 22:04:22,105 INFO L858 garLoopResultBuilder]: For program point snd_uart16550_input_triggerFINAL(lines 3284 3300) no Hoare annotation was computed. [2022-02-20 22:04:22,105 INFO L858 garLoopResultBuilder]: For program point snd_uart16550_input_triggerEXIT(lines 3284 3300) no Hoare annotation was computed. [2022-02-20 22:04:22,105 INFO L858 garLoopResultBuilder]: For program point L3291-1(lines 3289 3299) no Hoare annotation was computed. [2022-02-20 22:04:22,105 INFO L854 garLoopResultBuilder]: At program point L3291(line 3291) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| 0)) (not (= ~ldv_retval_2~0 0)) (and (= |#memory_int| |old(#memory_int)|) (= ~ldv_spin~0 0) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))) [2022-02-20 22:04:22,105 INFO L861 garLoopResultBuilder]: At program point L3292-1(lines 3292 3296) the Hoare annotation is: true [2022-02-20 22:04:22,106 INFO L854 garLoopResultBuilder]: At program point snd_uart16550_input_triggerENTRY(lines 3284 3300) the Hoare annotation is: (or (not (= |old(~ldv_spin~0)| 0)) (not (= ~ldv_retval_2~0 0)) (and (= |#memory_int| |old(#memory_int)|) (= ~ldv_spin~0 0) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))) [2022-02-20 22:04:22,106 INFO L861 garLoopResultBuilder]: At program point L3357(line 3357) the Hoare annotation is: true [2022-02-20 22:04:22,106 INFO L858 garLoopResultBuilder]: For program point L3353(line 3353) no Hoare annotation was computed. [2022-02-20 22:04:22,106 INFO L858 garLoopResultBuilder]: For program point L3353-2(line 3353) no Hoare annotation was computed. [2022-02-20 22:04:22,106 INFO L858 garLoopResultBuilder]: For program point L3353-4(line 3353) no Hoare annotation was computed. [2022-02-20 22:04:22,106 INFO L858 garLoopResultBuilder]: For program point L3353-6(line 3353) no Hoare annotation was computed. [2022-02-20 22:04:22,106 INFO L858 garLoopResultBuilder]: For program point L3353-8(line 3353) no Hoare annotation was computed. [2022-02-20 22:04:22,106 INFO L858 garLoopResultBuilder]: For program point L3356(lines 3356 3359) no Hoare annotation was computed. [2022-02-20 22:04:22,107 INFO L858 garLoopResultBuilder]: For program point L3356-1(lines 3356 3359) no Hoare annotation was computed. [2022-02-20 22:04:22,107 INFO L858 garLoopResultBuilder]: For program point L3350(lines 3350 3363) no Hoare annotation was computed. [2022-02-20 22:04:22,107 INFO L858 garLoopResultBuilder]: For program point snd_uart16550_write_bufferFINAL(lines 3345 3365) no Hoare annotation was computed. [2022-02-20 22:04:22,107 INFO L854 garLoopResultBuilder]: At program point snd_uart16550_write_bufferENTRY(lines 3345 3365) the Hoare annotation is: (or (and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)) (not (= ~ldv_retval_2~0 0))) [2022-02-20 22:04:22,107 INFO L858 garLoopResultBuilder]: For program point snd_uart16550_write_bufferEXIT(lines 3345 3365) no Hoare annotation was computed. [2022-02-20 22:04:22,107 INFO L861 garLoopResultBuilder]: At program point IS_ERRENTRY(lines 2567 2574) the Hoare annotation is: true [2022-02-20 22:04:22,107 INFO L858 garLoopResultBuilder]: For program point IS_ERRFINAL(lines 2567 2574) no Hoare annotation was computed. [2022-02-20 22:04:22,107 INFO L861 garLoopResultBuilder]: At program point L2713(lines 2710 2715) the Hoare annotation is: true [2022-02-20 22:04:22,108 INFO L858 garLoopResultBuilder]: For program point IS_ERREXIT(lines 2567 2574) no Hoare annotation was computed. [2022-02-20 22:04:22,110 INFO L732 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:04:22,111 INFO L180 ceAbstractionStarter]: Computing trace abstraction results [2022-02-20 22:04:22,114 WARN L170 areAnnotationChecker]: L3525 has no Hoare annotation [2022-02-20 22:04:22,114 WARN L170 areAnnotationChecker]: snd_card_freeFINAL has no Hoare annotation [2022-02-20 22:04:22,114 WARN L170 areAnnotationChecker]: L3221 has no Hoare annotation [2022-02-20 22:04:22,114 WARN L170 areAnnotationChecker]: L2971 has no Hoare annotation [2022-02-20 22:04:22,115 WARN L170 areAnnotationChecker]: ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION has no Hoare annotation [2022-02-20 22:04:22,115 WARN L170 areAnnotationChecker]: ldv_errorFINAL has no Hoare annotation [2022-02-20 22:04:22,115 WARN L170 areAnnotationChecker]: L3987 has no Hoare annotation [2022-02-20 22:04:22,115 WARN L170 areAnnotationChecker]: reg_timer_2FINAL has no Hoare annotation [2022-02-20 22:04:22,116 WARN L170 areAnnotationChecker]: inbFINAL has no Hoare annotation [2022-02-20 22:04:22,116 WARN L170 areAnnotationChecker]: L2983 has no Hoare annotation [2022-02-20 22:04:22,116 WARN L170 areAnnotationChecker]: outbFINAL has no Hoare annotation [2022-02-20 22:04:22,117 WARN L170 areAnnotationChecker]: L2641 has no Hoare annotation [2022-02-20 22:04:22,117 WARN L170 areAnnotationChecker]: L3373 has no Hoare annotation [2022-02-20 22:04:22,117 WARN L170 areAnnotationChecker]: ldv_spin_unlockFINAL has no Hoare annotation [2022-02-20 22:04:22,117 WARN L170 areAnnotationChecker]: ldv_spin_lockFINAL has no Hoare annotation [2022-02-20 22:04:22,117 WARN L170 areAnnotationChecker]: platform_device_unregisterFINAL has no Hoare annotation [2022-02-20 22:04:22,117 WARN L170 areAnnotationChecker]: L2651 has no Hoare annotation [2022-02-20 22:04:22,118 WARN L170 areAnnotationChecker]: L2996 has no Hoare annotation [2022-02-20 22:04:22,118 WARN L170 areAnnotationChecker]: L2669 has no Hoare annotation [2022-02-20 22:04:22,118 WARN L170 areAnnotationChecker]: snd_rawmidi_receiveFINAL has no Hoare annotation [2022-02-20 22:04:22,118 WARN L170 areAnnotationChecker]: ULTIMATE.startENTRY has no Hoare annotation [2022-02-20 22:04:22,118 WARN L170 areAnnotationChecker]: snd_rawmidi_set_opsFINAL has no Hoare annotation [2022-02-20 22:04:22,119 WARN L170 areAnnotationChecker]: L3350 has no Hoare annotation [2022-02-20 22:04:22,119 WARN L170 areAnnotationChecker]: L3525 has no Hoare annotation [2022-02-20 22:04:22,119 WARN L170 areAnnotationChecker]: L3525 has no Hoare annotation [2022-02-20 22:04:22,119 WARN L170 areAnnotationChecker]: snd_card_freeFINAL has no Hoare annotation [2022-02-20 22:04:22,119 WARN L170 areAnnotationChecker]: platform_get_drvdataFINAL has no Hoare annotation [2022-02-20 22:04:22,119 WARN L170 areAnnotationChecker]: L3221 has no Hoare annotation [2022-02-20 22:04:22,119 WARN L170 areAnnotationChecker]: L3221 has no Hoare annotation [2022-02-20 22:04:22,120 WARN L170 areAnnotationChecker]: L-1-1 has no Hoare annotation [2022-02-20 22:04:22,120 WARN L170 areAnnotationChecker]: L-1-4 has no Hoare annotation [2022-02-20 22:04:22,120 WARN L170 areAnnotationChecker]: L2971 has no Hoare annotation [2022-02-20 22:04:22,120 WARN L170 areAnnotationChecker]: L2971 has no Hoare annotation [2022-02-20 22:04:22,120 WARN L170 areAnnotationChecker]: ldv_errorFINAL has no Hoare annotation [2022-02-20 22:04:22,120 WARN L170 areAnnotationChecker]: L3987 has no Hoare annotation [2022-02-20 22:04:22,120 WARN L170 areAnnotationChecker]: L3987 has no Hoare annotation [2022-02-20 22:04:22,120 WARN L170 areAnnotationChecker]: reg_timer_2FINAL has no Hoare annotation [2022-02-20 22:04:22,120 WARN L170 areAnnotationChecker]: L3504-1 has no Hoare annotation [2022-02-20 22:04:22,121 WARN L170 areAnnotationChecker]: inbFINAL has no Hoare annotation [2022-02-20 22:04:22,121 WARN L170 areAnnotationChecker]: L2983 has no Hoare annotation [2022-02-20 22:04:22,122 WARN L170 areAnnotationChecker]: L2983 has no Hoare annotation [2022-02-20 22:04:22,122 WARN L170 areAnnotationChecker]: outbFINAL has no Hoare annotation [2022-02-20 22:04:22,122 WARN L170 areAnnotationChecker]: L4260-1 has no Hoare annotation [2022-02-20 22:04:22,122 WARN L170 areAnnotationChecker]: L2641 has no Hoare annotation [2022-02-20 22:04:22,122 WARN L170 areAnnotationChecker]: L2641 has no Hoare annotation [2022-02-20 22:04:22,123 WARN L170 areAnnotationChecker]: L3373 has no Hoare annotation [2022-02-20 22:04:22,123 WARN L170 areAnnotationChecker]: L3373 has no Hoare annotation [2022-02-20 22:04:22,123 WARN L170 areAnnotationChecker]: ldv_spin_unlockFINAL has no Hoare annotation [2022-02-20 22:04:22,123 WARN L170 areAnnotationChecker]: ldv_spin_lockFINAL has no Hoare annotation [2022-02-20 22:04:22,123 WARN L170 areAnnotationChecker]: platform_device_unregisterFINAL has no Hoare annotation [2022-02-20 22:04:22,123 WARN L170 areAnnotationChecker]: L4268-1 has no Hoare annotation [2022-02-20 22:04:22,123 WARN L170 areAnnotationChecker]: L2651 has no Hoare annotation [2022-02-20 22:04:22,123 WARN L170 areAnnotationChecker]: L2651 has no Hoare annotation [2022-02-20 22:04:22,123 WARN L170 areAnnotationChecker]: L3171-1 has no Hoare annotation [2022-02-20 22:04:22,124 WARN L170 areAnnotationChecker]: L2996 has no Hoare annotation [2022-02-20 22:04:22,124 WARN L170 areAnnotationChecker]: L2996 has no Hoare annotation [2022-02-20 22:04:22,124 WARN L170 areAnnotationChecker]: L2669 has no Hoare annotation [2022-02-20 22:04:22,124 WARN L170 areAnnotationChecker]: L2669 has no Hoare annotation [2022-02-20 22:04:22,124 WARN L170 areAnnotationChecker]: snd_rawmidi_receiveFINAL has no Hoare annotation [2022-02-20 22:04:22,124 WARN L170 areAnnotationChecker]: L-1 has no Hoare annotation [2022-02-20 22:04:22,124 WARN L170 areAnnotationChecker]: snd_uart16550_substreamsFINAL has no Hoare annotation [2022-02-20 22:04:22,124 WARN L170 areAnnotationChecker]: snd_rawmidi_set_opsFINAL has no Hoare annotation [2022-02-20 22:04:22,124 WARN L170 areAnnotationChecker]: L3291-1 has no Hoare annotation [2022-02-20 22:04:22,125 WARN L170 areAnnotationChecker]: L3350 has no Hoare annotation [2022-02-20 22:04:22,125 WARN L170 areAnnotationChecker]: L3350 has no Hoare annotation [2022-02-20 22:04:22,125 WARN L170 areAnnotationChecker]: IS_ERRFINAL has no Hoare annotation [2022-02-20 22:04:22,125 WARN L170 areAnnotationChecker]: L3915 has no Hoare annotation [2022-02-20 22:04:22,126 WARN L170 areAnnotationChecker]: L3525-2 has no Hoare annotation [2022-02-20 22:04:22,126 WARN L170 areAnnotationChecker]: snd_card_freeEXIT has no Hoare annotation [2022-02-20 22:04:22,126 WARN L170 areAnnotationChecker]: snd_card_freeEXIT has no Hoare annotation [2022-02-20 22:04:22,126 WARN L170 areAnnotationChecker]: platform_get_drvdataFINAL has no Hoare annotation [2022-02-20 22:04:22,126 WARN L170 areAnnotationChecker]: L3221-1 has no Hoare annotation [2022-02-20 22:04:22,127 WARN L170 areAnnotationChecker]: L3221-1 has no Hoare annotation [2022-02-20 22:04:22,127 WARN L170 areAnnotationChecker]: L-1-1 has no Hoare annotation [2022-02-20 22:04:22,127 WARN L170 areAnnotationChecker]: L-1-1 has no Hoare annotation [2022-02-20 22:04:22,127 WARN L170 areAnnotationChecker]: L-1-4 has no Hoare annotation [2022-02-20 22:04:22,127 WARN L170 areAnnotationChecker]: L2971-2 has no Hoare annotation [2022-02-20 22:04:22,127 WARN L170 areAnnotationChecker]: L2971-2 has no Hoare annotation [2022-02-20 22:04:22,127 WARN L170 areAnnotationChecker]: ldv_errorEXIT has no Hoare annotation [2022-02-20 22:04:22,128 WARN L170 areAnnotationChecker]: L3990 has no Hoare annotation [2022-02-20 22:04:22,128 WARN L170 areAnnotationChecker]: L3990 has no Hoare annotation [2022-02-20 22:04:22,128 WARN L170 areAnnotationChecker]: ldv_irq_1FINAL has no Hoare annotation [2022-02-20 22:04:22,128 WARN L170 areAnnotationChecker]: reg_timer_2EXIT has no Hoare annotation [2022-02-20 22:04:22,128 WARN L170 areAnnotationChecker]: L3051-1 has no Hoare annotation [2022-02-20 22:04:22,128 WARN L170 areAnnotationChecker]: L3504-1 has no Hoare annotation [2022-02-20 22:04:22,128 WARN L170 areAnnotationChecker]: L3504-1 has no Hoare annotation [2022-02-20 22:04:22,128 WARN L170 areAnnotationChecker]: inbEXIT has no Hoare annotation [2022-02-20 22:04:22,128 WARN L170 areAnnotationChecker]: inbEXIT has no Hoare annotation [2022-02-20 22:04:22,128 WARN L170 areAnnotationChecker]: inbEXIT has no Hoare annotation [2022-02-20 22:04:22,129 WARN L170 areAnnotationChecker]: inbEXIT has no Hoare annotation [2022-02-20 22:04:22,129 WARN L170 areAnnotationChecker]: inbEXIT has no Hoare annotation [2022-02-20 22:04:22,129 WARN L170 areAnnotationChecker]: inbEXIT has no Hoare annotation [2022-02-20 22:04:22,129 WARN L170 areAnnotationChecker]: inbEXIT has no Hoare annotation [2022-02-20 22:04:22,129 WARN L170 areAnnotationChecker]: inbEXIT has no Hoare annotation [2022-02-20 22:04:22,129 WARN L170 areAnnotationChecker]: inbEXIT has no Hoare annotation [2022-02-20 22:04:22,129 WARN L170 areAnnotationChecker]: inbEXIT has no Hoare annotation [2022-02-20 22:04:22,129 WARN L170 areAnnotationChecker]: inbEXIT has no Hoare annotation [2022-02-20 22:04:22,129 WARN L170 areAnnotationChecker]: inbEXIT has no Hoare annotation [2022-02-20 22:04:22,130 WARN L170 areAnnotationChecker]: inbEXIT has no Hoare annotation [2022-02-20 22:04:22,130 WARN L170 areAnnotationChecker]: inbEXIT has no Hoare annotation [2022-02-20 22:04:22,130 WARN L170 areAnnotationChecker]: inbEXIT has no Hoare annotation [2022-02-20 22:04:22,130 WARN L170 areAnnotationChecker]: inbEXIT has no Hoare annotation [2022-02-20 22:04:22,130 WARN L170 areAnnotationChecker]: inbEXIT has no Hoare annotation [2022-02-20 22:04:22,130 WARN L170 areAnnotationChecker]: inbEXIT has no Hoare annotation [2022-02-20 22:04:22,130 WARN L170 areAnnotationChecker]: L3904 has no Hoare annotation [2022-02-20 22:04:22,130 WARN L170 areAnnotationChecker]: L2983-2 has no Hoare annotation [2022-02-20 22:04:22,130 WARN L170 areAnnotationChecker]: outbEXIT has no Hoare annotation [2022-02-20 22:04:22,131 WARN L170 areAnnotationChecker]: outbEXIT has no Hoare annotation [2022-02-20 22:04:22,131 WARN L170 areAnnotationChecker]: outbEXIT has no Hoare annotation [2022-02-20 22:04:22,131 WARN L170 areAnnotationChecker]: outbEXIT has no Hoare annotation [2022-02-20 22:04:22,131 WARN L170 areAnnotationChecker]: outbEXIT has no Hoare annotation [2022-02-20 22:04:22,131 WARN L170 areAnnotationChecker]: outbEXIT has no Hoare annotation [2022-02-20 22:04:22,131 WARN L170 areAnnotationChecker]: outbEXIT has no Hoare annotation [2022-02-20 22:04:22,131 WARN L170 areAnnotationChecker]: outbEXIT has no Hoare annotation [2022-02-20 22:04:22,131 WARN L170 areAnnotationChecker]: outbEXIT has no Hoare annotation [2022-02-20 22:04:22,131 WARN L170 areAnnotationChecker]: outbEXIT has no Hoare annotation [2022-02-20 22:04:22,131 WARN L170 areAnnotationChecker]: outbEXIT has no Hoare annotation [2022-02-20 22:04:22,132 WARN L170 areAnnotationChecker]: outbEXIT has no Hoare annotation [2022-02-20 22:04:22,132 WARN L170 areAnnotationChecker]: outbEXIT has no Hoare annotation [2022-02-20 22:04:22,132 WARN L170 areAnnotationChecker]: outbEXIT has no Hoare annotation [2022-02-20 22:04:22,132 WARN L170 areAnnotationChecker]: outbEXIT has no Hoare annotation [2022-02-20 22:04:22,132 WARN L170 areAnnotationChecker]: outbEXIT has no Hoare annotation [2022-02-20 22:04:22,132 WARN L170 areAnnotationChecker]: outbEXIT has no Hoare annotation [2022-02-20 22:04:22,132 WARN L170 areAnnotationChecker]: outbEXIT has no Hoare annotation [2022-02-20 22:04:22,132 WARN L170 areAnnotationChecker]: outbEXIT has no Hoare annotation [2022-02-20 22:04:22,132 WARN L170 areAnnotationChecker]: outbEXIT has no Hoare annotation [2022-02-20 22:04:22,133 WARN L170 areAnnotationChecker]: outbEXIT has no Hoare annotation [2022-02-20 22:04:22,133 WARN L170 areAnnotationChecker]: outbEXIT has no Hoare annotation [2022-02-20 22:04:22,133 WARN L170 areAnnotationChecker]: outbEXIT has no Hoare annotation [2022-02-20 22:04:22,133 WARN L170 areAnnotationChecker]: outbEXIT has no Hoare annotation [2022-02-20 22:04:22,133 WARN L170 areAnnotationChecker]: outbEXIT has no Hoare annotation [2022-02-20 22:04:22,134 WARN L170 areAnnotationChecker]: L4260-1 has no Hoare annotation [2022-02-20 22:04:22,134 WARN L170 areAnnotationChecker]: L2641-2 has no Hoare annotation [2022-02-20 22:04:22,134 WARN L170 areAnnotationChecker]: L3374 has no Hoare annotation [2022-02-20 22:04:22,134 WARN L170 areAnnotationChecker]: L3374 has no Hoare annotation [2022-02-20 22:04:22,134 WARN L170 areAnnotationChecker]: L3400 has no Hoare annotation [2022-02-20 22:04:22,135 WARN L170 areAnnotationChecker]: ldv_spin_unlockEXIT has no Hoare annotation [2022-02-20 22:04:22,135 WARN L170 areAnnotationChecker]: ldv_spin_unlockEXIT has no Hoare annotation [2022-02-20 22:04:22,135 WARN L170 areAnnotationChecker]: ldv_spin_lockEXIT has no Hoare annotation [2022-02-20 22:04:22,135 WARN L170 areAnnotationChecker]: ldv_spin_lockEXIT has no Hoare annotation [2022-02-20 22:04:22,135 WARN L170 areAnnotationChecker]: ldv_spin_lockEXIT has no Hoare annotation [2022-02-20 22:04:22,135 WARN L170 areAnnotationChecker]: ldv_spin_lockEXIT has no Hoare annotation [2022-02-20 22:04:22,136 WARN L170 areAnnotationChecker]: ldv_spin_lockEXIT has no Hoare annotation [2022-02-20 22:04:22,136 WARN L170 areAnnotationChecker]: ldv_spin_lockEXIT has no Hoare annotation [2022-02-20 22:04:22,136 WARN L170 areAnnotationChecker]: ldv_spin_lockEXIT has no Hoare annotation [2022-02-20 22:04:22,136 WARN L170 areAnnotationChecker]: ldv_spin_lockEXIT has no Hoare annotation [2022-02-20 22:04:22,136 WARN L170 areAnnotationChecker]: ldv_spin_lockEXIT has no Hoare annotation [2022-02-20 22:04:22,136 WARN L170 areAnnotationChecker]: platform_device_unregisterEXIT has no Hoare annotation [2022-02-20 22:04:22,136 WARN L170 areAnnotationChecker]: platform_device_unregisterEXIT has no Hoare annotation [2022-02-20 22:04:22,136 WARN L170 areAnnotationChecker]: L4268-1 has no Hoare annotation [2022-02-20 22:04:22,136 WARN L170 areAnnotationChecker]: ldv_mallocFINAL has no Hoare annotation [2022-02-20 22:04:22,136 WARN L170 areAnnotationChecker]: L3171-1 has no Hoare annotation [2022-02-20 22:04:22,137 WARN L170 areAnnotationChecker]: L2997-1 has no Hoare annotation [2022-02-20 22:04:22,137 WARN L170 areAnnotationChecker]: L2996-2 has no Hoare annotation [2022-02-20 22:04:22,137 WARN L170 areAnnotationChecker]: ldv_zallocFINAL has no Hoare annotation [2022-02-20 22:04:22,137 WARN L170 areAnnotationChecker]: L-1 has no Hoare annotation [2022-02-20 22:04:22,137 WARN L170 areAnnotationChecker]: snd_rawmidi_receiveEXIT has no Hoare annotation [2022-02-20 22:04:22,137 WARN L170 areAnnotationChecker]: snd_rawmidi_receiveEXIT has no Hoare annotation [2022-02-20 22:04:22,138 WARN L170 areAnnotationChecker]: snd_uart16550_substreamsFINAL has no Hoare annotation [2022-02-20 22:04:22,138 WARN L170 areAnnotationChecker]: snd_rawmidi_set_opsEXIT has no Hoare annotation [2022-02-20 22:04:22,138 WARN L170 areAnnotationChecker]: snd_rawmidi_set_opsEXIT has no Hoare annotation [2022-02-20 22:04:22,138 WARN L170 areAnnotationChecker]: L3291-1 has no Hoare annotation [2022-02-20 22:04:22,138 WARN L170 areAnnotationChecker]: L3291-1 has no Hoare annotation [2022-02-20 22:04:22,138 WARN L170 areAnnotationChecker]: L3353 has no Hoare annotation [2022-02-20 22:04:22,138 WARN L170 areAnnotationChecker]: L3353 has no Hoare annotation [2022-02-20 22:04:22,138 WARN L170 areAnnotationChecker]: snd_uart16550_write_bufferFINAL has no Hoare annotation [2022-02-20 22:04:22,138 WARN L170 areAnnotationChecker]: IS_ERRFINAL has no Hoare annotation [2022-02-20 22:04:22,139 WARN L170 areAnnotationChecker]: L3915 has no Hoare annotation [2022-02-20 22:04:22,139 WARN L170 areAnnotationChecker]: L3915 has no Hoare annotation [2022-02-20 22:04:22,139 WARN L170 areAnnotationChecker]: L4505 has no Hoare annotation [2022-02-20 22:04:22,139 WARN L170 areAnnotationChecker]: L3744-1 has no Hoare annotation [2022-02-20 22:04:22,139 WARN L170 areAnnotationChecker]: L3753-1 has no Hoare annotation [2022-02-20 22:04:22,139 WARN L170 areAnnotationChecker]: platform_get_drvdataEXIT has no Hoare annotation [2022-02-20 22:04:22,139 WARN L170 areAnnotationChecker]: platform_get_drvdataEXIT has no Hoare annotation [2022-02-20 22:04:22,139 WARN L170 areAnnotationChecker]: L3225-1 has no Hoare annotation [2022-02-20 22:04:22,139 WARN L170 areAnnotationChecker]: #Ultimate.C_strcpyEXIT has no Hoare annotation [2022-02-20 22:04:22,140 WARN L170 areAnnotationChecker]: #Ultimate.C_strcpyEXIT has no Hoare annotation [2022-02-20 22:04:22,140 WARN L170 areAnnotationChecker]: #Ultimate.C_strcpyEXIT has no Hoare annotation [2022-02-20 22:04:22,140 WARN L170 areAnnotationChecker]: snd_uart16550_add_timerEXIT has no Hoare annotation [2022-02-20 22:04:22,141 WARN L170 areAnnotationChecker]: snd_uart16550_add_timerEXIT has no Hoare annotation [2022-02-20 22:04:22,141 WARN L170 areAnnotationChecker]: L3991 has no Hoare annotation [2022-02-20 22:04:22,141 WARN L170 areAnnotationChecker]: L3991 has no Hoare annotation [2022-02-20 22:04:22,141 WARN L170 areAnnotationChecker]: L3999 has no Hoare annotation [2022-02-20 22:04:22,142 WARN L170 areAnnotationChecker]: L3999 has no Hoare annotation [2022-02-20 22:04:22,142 WARN L170 areAnnotationChecker]: ldv_irq_1FINAL has no Hoare annotation [2022-02-20 22:04:22,142 WARN L170 areAnnotationChecker]: L3597-1 has no Hoare annotation [2022-02-20 22:04:22,142 WARN L170 areAnnotationChecker]: L3051-1 has no Hoare annotation [2022-02-20 22:04:22,142 WARN L170 areAnnotationChecker]: L3510 has no Hoare annotation [2022-02-20 22:04:22,142 WARN L170 areAnnotationChecker]: L3239-1 has no Hoare annotation [2022-02-20 22:04:22,142 WARN L170 areAnnotationChecker]: L3100-1 has no Hoare annotation [2022-02-20 22:04:22,142 WARN L170 areAnnotationChecker]: L3017-1 has no Hoare annotation [2022-02-20 22:04:22,142 WARN L170 areAnnotationChecker]: L3062-1 has no Hoare annotation [2022-02-20 22:04:22,143 WARN L170 areAnnotationChecker]: L3066-1 has no Hoare annotation [2022-02-20 22:04:22,143 WARN L170 areAnnotationChecker]: L3378-1 has no Hoare annotation [2022-02-20 22:04:22,143 WARN L170 areAnnotationChecker]: L3381-1 has no Hoare annotation [2022-02-20 22:04:22,143 WARN L170 areAnnotationChecker]: L3172-1 has no Hoare annotation [2022-02-20 22:04:22,143 WARN L170 areAnnotationChecker]: L3178-1 has no Hoare annotation [2022-02-20 22:04:22,143 WARN L170 areAnnotationChecker]: L3180-1 has no Hoare annotation [2022-02-20 22:04:22,143 WARN L170 areAnnotationChecker]: L3181-1 has no Hoare annotation [2022-02-20 22:04:22,143 WARN L170 areAnnotationChecker]: L3212-1 has no Hoare annotation [2022-02-20 22:04:22,143 WARN L170 areAnnotationChecker]: L3213-1 has no Hoare annotation [2022-02-20 22:04:22,144 WARN L170 areAnnotationChecker]: L3214-1 has no Hoare annotation [2022-02-20 22:04:22,144 WARN L170 areAnnotationChecker]: L3140 has no Hoare annotation [2022-02-20 22:04:22,144 WARN L170 areAnnotationChecker]: L3146 has no Hoare annotation [2022-02-20 22:04:22,144 WARN L170 areAnnotationChecker]: L3152 has no Hoare annotation [2022-02-20 22:04:22,144 WARN L170 areAnnotationChecker]: L3904 has no Hoare annotation [2022-02-20 22:04:22,144 WARN L170 areAnnotationChecker]: L3904 has no Hoare annotation [2022-02-20 22:04:22,144 WARN L170 areAnnotationChecker]: snd_uart16550_del_timerEXIT has no Hoare annotation [2022-02-20 22:04:22,144 WARN L170 areAnnotationChecker]: snd_uart16550_del_timerEXIT has no Hoare annotation [2022-02-20 22:04:22,144 WARN L170 areAnnotationChecker]: L3225-1 has no Hoare annotation [2022-02-20 22:04:22,145 WARN L170 areAnnotationChecker]: L3228-1 has no Hoare annotation [2022-02-20 22:04:22,145 WARN L170 areAnnotationChecker]: L3232-1 has no Hoare annotation [2022-02-20 22:04:22,145 WARN L170 areAnnotationChecker]: L3235-1 has no Hoare annotation [2022-02-20 22:04:22,145 WARN L170 areAnnotationChecker]: L3241-1 has no Hoare annotation [2022-02-20 22:04:22,145 WARN L170 areAnnotationChecker]: L3242-1 has no Hoare annotation [2022-02-20 22:04:22,145 WARN L170 areAnnotationChecker]: L3243-1 has no Hoare annotation [2022-02-20 22:04:22,145 WARN L170 areAnnotationChecker]: L3244-1 has no Hoare annotation [2022-02-20 22:04:22,145 WARN L170 areAnnotationChecker]: L3384-1 has no Hoare annotation [2022-02-20 22:04:22,145 WARN L170 areAnnotationChecker]: L3388-1 has no Hoare annotation [2022-02-20 22:04:22,145 WARN L170 areAnnotationChecker]: L3179-1 has no Hoare annotation [2022-02-20 22:04:22,146 WARN L170 areAnnotationChecker]: L3182-1 has no Hoare annotation [2022-02-20 22:04:22,146 WARN L170 areAnnotationChecker]: L3183-1 has no Hoare annotation [2022-02-20 22:04:22,146 WARN L170 areAnnotationChecker]: L3186-1 has no Hoare annotation [2022-02-20 22:04:22,146 WARN L170 areAnnotationChecker]: L3189-1 has no Hoare annotation [2022-02-20 22:04:22,146 WARN L170 areAnnotationChecker]: L3193-1 has no Hoare annotation [2022-02-20 22:04:22,146 WARN L170 areAnnotationChecker]: L3196-1 has no Hoare annotation [2022-02-20 22:04:22,146 WARN L170 areAnnotationChecker]: L3211-1 has no Hoare annotation [2022-02-20 22:04:22,146 WARN L170 areAnnotationChecker]: L2997-1 has no Hoare annotation [2022-02-20 22:04:22,146 WARN L170 areAnnotationChecker]: L3140 has no Hoare annotation [2022-02-20 22:04:22,147 WARN L170 areAnnotationChecker]: L3146 has no Hoare annotation [2022-02-20 22:04:22,147 WARN L170 areAnnotationChecker]: L3152 has no Hoare annotation [2022-02-20 22:04:22,147 WARN L170 areAnnotationChecker]: L3610-1 has no Hoare annotation [2022-02-20 22:04:22,147 WARN L170 areAnnotationChecker]: L3613-1 has no Hoare annotation [2022-02-20 22:04:22,147 WARN L170 areAnnotationChecker]: L3768-1 has no Hoare annotation [2022-02-20 22:04:22,147 WARN L170 areAnnotationChecker]: snd_serial_unregister_allFINAL has no Hoare annotation [2022-02-20 22:04:22,148 WARN L170 areAnnotationChecker]: assume_abort_if_notEXIT has no Hoare annotation [2022-02-20 22:04:22,148 WARN L170 areAnnotationChecker]: assume_abort_if_notEXIT has no Hoare annotation [2022-02-20 22:04:22,148 WARN L170 areAnnotationChecker]: assume_abort_if_notEXIT has no Hoare annotation [2022-02-20 22:04:22,148 WARN L170 areAnnotationChecker]: assume_abort_if_notEXIT has no Hoare annotation [2022-02-20 22:04:22,148 WARN L170 areAnnotationChecker]: L3374-2 has no Hoare annotation [2022-02-20 22:04:22,148 WARN L170 areAnnotationChecker]: L3374-2 has no Hoare annotation [2022-02-20 22:04:22,148 WARN L170 areAnnotationChecker]: L3400 has no Hoare annotation [2022-02-20 22:04:22,148 WARN L170 areAnnotationChecker]: L4252-1 has no Hoare annotation [2022-02-20 22:04:22,148 WARN L170 areAnnotationChecker]: L3427-1 has no Hoare annotation [2022-02-20 22:04:22,148 WARN L170 areAnnotationChecker]: L3273-1 has no Hoare annotation [2022-02-20 22:04:22,149 WARN L170 areAnnotationChecker]: L3256-1 has no Hoare annotation [2022-02-20 22:04:22,149 WARN L170 areAnnotationChecker]: L3324-1 has no Hoare annotation [2022-02-20 22:04:22,150 WARN L170 areAnnotationChecker]: L3307-1 has no Hoare annotation [2022-02-20 22:04:22,150 WARN L170 areAnnotationChecker]: L3768-1 has no Hoare annotation [2022-02-20 22:04:22,150 WARN L170 areAnnotationChecker]: ldv_mallocEXIT has no Hoare annotation [2022-02-20 22:04:22,150 WARN L170 areAnnotationChecker]: ldv_mallocEXIT has no Hoare annotation [2022-02-20 22:04:22,151 WARN L170 areAnnotationChecker]: L3172-1 has no Hoare annotation [2022-02-20 22:04:22,151 WARN L170 areAnnotationChecker]: snd_uart16550_buffer_outputEXIT has no Hoare annotation [2022-02-20 22:04:22,151 WARN L170 areAnnotationChecker]: snd_uart16550_buffer_outputEXIT has no Hoare annotation [2022-02-20 22:04:22,151 WARN L170 areAnnotationChecker]: ldv_zallocEXIT has no Hoare annotation [2022-02-20 22:04:22,152 WARN L170 areAnnotationChecker]: ldv_zallocEXIT has no Hoare annotation [2022-02-20 22:04:22,152 WARN L170 areAnnotationChecker]: ldv_zallocEXIT has no Hoare annotation [2022-02-20 22:04:22,152 WARN L170 areAnnotationChecker]: L3034-1 has no Hoare annotation [2022-02-20 22:04:22,152 WARN L170 areAnnotationChecker]: L3040-1 has no Hoare annotation [2022-02-20 22:04:22,152 WARN L170 areAnnotationChecker]: L4069 has no Hoare annotation [2022-02-20 22:04:22,152 WARN L170 areAnnotationChecker]: snd_uart16550_substreamsEXIT has no Hoare annotation [2022-02-20 22:04:22,152 WARN L170 areAnnotationChecker]: snd_uart16550_substreamsEXIT has no Hoare annotation [2022-02-20 22:04:22,152 WARN L170 areAnnotationChecker]: L3659-1 has no Hoare annotation [2022-02-20 22:04:22,153 WARN L170 areAnnotationChecker]: L3660-1 has no Hoare annotation [2022-02-20 22:04:22,153 WARN L170 areAnnotationChecker]: snd_uart16550_input_triggerFINAL has no Hoare annotation [2022-02-20 22:04:22,153 WARN L170 areAnnotationChecker]: L3353-8 has no Hoare annotation [2022-02-20 22:04:22,153 WARN L170 areAnnotationChecker]: L3353-2 has no Hoare annotation [2022-02-20 22:04:22,153 WARN L170 areAnnotationChecker]: L3353-2 has no Hoare annotation [2022-02-20 22:04:22,153 WARN L170 areAnnotationChecker]: snd_uart16550_write_bufferEXIT has no Hoare annotation [2022-02-20 22:04:22,153 WARN L170 areAnnotationChecker]: snd_uart16550_write_bufferEXIT has no Hoare annotation [2022-02-20 22:04:22,153 WARN L170 areAnnotationChecker]: IS_ERREXIT has no Hoare annotation [2022-02-20 22:04:22,153 WARN L170 areAnnotationChecker]: IS_ERREXIT has no Hoare annotation [2022-02-20 22:04:22,153 WARN L170 areAnnotationChecker]: IS_ERREXIT has no Hoare annotation [2022-02-20 22:04:22,154 WARN L170 areAnnotationChecker]: L3920 has no Hoare annotation [2022-02-20 22:04:22,154 WARN L170 areAnnotationChecker]: L3920 has no Hoare annotation [2022-02-20 22:04:22,154 WARN L170 areAnnotationChecker]: L4505 has no Hoare annotation [2022-02-20 22:04:22,154 WARN L170 areAnnotationChecker]: L4165 has no Hoare annotation [2022-02-20 22:04:22,155 WARN L170 areAnnotationChecker]: L3808-1 has no Hoare annotation [2022-02-20 22:04:22,155 WARN L170 areAnnotationChecker]: L3752-1 has no Hoare annotation [2022-02-20 22:04:22,155 WARN L170 areAnnotationChecker]: L3720-1 has no Hoare annotation [2022-02-20 22:04:22,155 WARN L170 areAnnotationChecker]: L3721-1 has no Hoare annotation [2022-02-20 22:04:22,155 WARN L170 areAnnotationChecker]: L3661-1 has no Hoare annotation [2022-02-20 22:04:22,155 WARN L170 areAnnotationChecker]: L3082-3 has no Hoare annotation [2022-02-20 22:04:22,155 WARN L170 areAnnotationChecker]: L3356-1 has no Hoare annotation [2022-02-20 22:04:22,156 WARN L170 areAnnotationChecker]: L3560 has no Hoare annotation [2022-02-20 22:04:22,156 WARN L170 areAnnotationChecker]: L4252-1 has no Hoare annotation [2022-02-20 22:04:22,156 WARN L170 areAnnotationChecker]: L3989 has no Hoare annotation [2022-02-20 22:04:22,156 WARN L170 areAnnotationChecker]: L3989 has no Hoare annotation [2022-02-20 22:04:22,157 WARN L170 areAnnotationChecker]: ldv_irq_1EXIT has no Hoare annotation [2022-02-20 22:04:22,157 WARN L170 areAnnotationChecker]: ldv_irq_1EXIT has no Hoare annotation [2022-02-20 22:04:22,157 WARN L170 areAnnotationChecker]: ldv_irq_1EXIT has no Hoare annotation [2022-02-20 22:04:22,157 WARN L170 areAnnotationChecker]: ldv_irq_1EXIT has no Hoare annotation [2022-02-20 22:04:22,157 WARN L170 areAnnotationChecker]: L3602 has no Hoare annotation [2022-02-20 22:04:22,157 WARN L170 areAnnotationChecker]: L3052 has no Hoare annotation [2022-02-20 22:04:22,157 WARN L170 areAnnotationChecker]: L3052 has no Hoare annotation [2022-02-20 22:04:22,157 WARN L170 areAnnotationChecker]: L3510 has no Hoare annotation [2022-02-20 22:04:22,157 WARN L170 areAnnotationChecker]: L3510 has no Hoare annotation [2022-02-20 22:04:22,158 WARN L170 areAnnotationChecker]: L3240 has no Hoare annotation [2022-02-20 22:04:22,158 WARN L170 areAnnotationChecker]: L3240 has no Hoare annotation [2022-02-20 22:04:22,158 WARN L170 areAnnotationChecker]: L3018 has no Hoare annotation [2022-02-20 22:04:22,159 WARN L170 areAnnotationChecker]: L3018 has no Hoare annotation [2022-02-20 22:04:22,159 WARN L170 areAnnotationChecker]: L3068 has no Hoare annotation [2022-02-20 22:04:22,159 WARN L170 areAnnotationChecker]: L3379 has no Hoare annotation [2022-02-20 22:04:22,159 WARN L170 areAnnotationChecker]: L3379 has no Hoare annotation [2022-02-20 22:04:22,159 WARN L170 areAnnotationChecker]: L3382 has no Hoare annotation [2022-02-20 22:04:22,159 WARN L170 areAnnotationChecker]: L3382 has no Hoare annotation [2022-02-20 22:04:22,159 WARN L170 areAnnotationChecker]: L3173 has no Hoare annotation [2022-02-20 22:04:22,159 WARN L170 areAnnotationChecker]: L3173 has no Hoare annotation [2022-02-20 22:04:22,159 WARN L170 areAnnotationChecker]: L3179-1 has no Hoare annotation [2022-02-20 22:04:22,160 WARN L170 areAnnotationChecker]: L3181-1 has no Hoare annotation [2022-02-20 22:04:22,160 WARN L170 areAnnotationChecker]: L3182-1 has no Hoare annotation [2022-02-20 22:04:22,160 WARN L170 areAnnotationChecker]: L3213-1 has no Hoare annotation [2022-02-20 22:04:22,160 WARN L170 areAnnotationChecker]: L3214-1 has no Hoare annotation [2022-02-20 22:04:22,160 WARN L170 areAnnotationChecker]: snd_uart16550_do_openFINAL has no Hoare annotation [2022-02-20 22:04:22,160 WARN L170 areAnnotationChecker]: L3141 has no Hoare annotation [2022-02-20 22:04:22,160 WARN L170 areAnnotationChecker]: L3141 has no Hoare annotation [2022-02-20 22:04:22,160 WARN L170 areAnnotationChecker]: L3147 has no Hoare annotation [2022-02-20 22:04:22,160 WARN L170 areAnnotationChecker]: L3147 has no Hoare annotation [2022-02-20 22:04:22,160 WARN L170 areAnnotationChecker]: L3153 has no Hoare annotation [2022-02-20 22:04:22,161 WARN L170 areAnnotationChecker]: L3153 has no Hoare annotation [2022-02-20 22:04:22,162 WARN L170 areAnnotationChecker]: L3227 has no Hoare annotation [2022-02-20 22:04:22,162 WARN L170 areAnnotationChecker]: L3227 has no Hoare annotation [2022-02-20 22:04:22,162 WARN L170 areAnnotationChecker]: L3242-1 has no Hoare annotation [2022-02-20 22:04:22,162 WARN L170 areAnnotationChecker]: L3243-1 has no Hoare annotation [2022-02-20 22:04:22,162 WARN L170 areAnnotationChecker]: L3244-1 has no Hoare annotation [2022-02-20 22:04:22,162 WARN L170 areAnnotationChecker]: L3240-2 has no Hoare annotation [2022-02-20 22:04:22,162 WARN L170 areAnnotationChecker]: L3373-1 has no Hoare annotation [2022-02-20 22:04:22,163 WARN L170 areAnnotationChecker]: L3180-1 has no Hoare annotation [2022-02-20 22:04:22,163 WARN L170 areAnnotationChecker]: L3183-1 has no Hoare annotation [2022-02-20 22:04:22,163 WARN L170 areAnnotationChecker]: L3177-2 has no Hoare annotation [2022-02-20 22:04:22,163 WARN L170 areAnnotationChecker]: L3188 has no Hoare annotation [2022-02-20 22:04:22,163 WARN L170 areAnnotationChecker]: L3188 has no Hoare annotation [2022-02-20 22:04:22,163 WARN L170 areAnnotationChecker]: L3200 has no Hoare annotation [2022-02-20 22:04:22,163 WARN L170 areAnnotationChecker]: L3212-1 has no Hoare annotation [2022-02-20 22:04:22,163 WARN L170 areAnnotationChecker]: L3000 has no Hoare annotation [2022-02-20 22:04:22,163 WARN L170 areAnnotationChecker]: L3000 has no Hoare annotation [2022-02-20 22:04:22,164 WARN L170 areAnnotationChecker]: L3619-1 has no Hoare annotation [2022-02-20 22:04:22,164 WARN L170 areAnnotationChecker]: L3619-1 has no Hoare annotation [2022-02-20 22:04:22,164 WARN L170 areAnnotationChecker]: snd_serial_unregister_allFINAL has no Hoare annotation [2022-02-20 22:04:22,164 WARN L170 areAnnotationChecker]: spin_unlockFINAL has no Hoare annotation [2022-02-20 22:04:22,164 WARN L170 areAnnotationChecker]: L2657-1 has no Hoare annotation [2022-02-20 22:04:22,164 WARN L170 areAnnotationChecker]: L2675-1 has no Hoare annotation [2022-02-20 22:04:22,165 WARN L170 areAnnotationChecker]: L3377 has no Hoare annotation [2022-02-20 22:04:22,165 WARN L170 areAnnotationChecker]: L3377 has no Hoare annotation [2022-02-20 22:04:22,165 WARN L170 areAnnotationChecker]: L3401 has no Hoare annotation [2022-02-20 22:04:22,165 WARN L170 areAnnotationChecker]: L3401 has no Hoare annotation [2022-02-20 22:04:22,166 WARN L170 areAnnotationChecker]: L3428 has no Hoare annotation [2022-02-20 22:04:22,166 WARN L170 areAnnotationChecker]: L3428 has no Hoare annotation [2022-02-20 22:04:22,166 WARN L170 areAnnotationChecker]: L3276 has no Hoare annotation [2022-02-20 22:04:22,166 WARN L170 areAnnotationChecker]: L3276 has no Hoare annotation [2022-02-20 22:04:22,166 WARN L170 areAnnotationChecker]: L3257 has no Hoare annotation [2022-02-20 22:04:22,166 WARN L170 areAnnotationChecker]: L3257 has no Hoare annotation [2022-02-20 22:04:22,167 WARN L170 areAnnotationChecker]: L3327 has no Hoare annotation [2022-02-20 22:04:22,167 WARN L170 areAnnotationChecker]: L3327 has no Hoare annotation [2022-02-20 22:04:22,167 WARN L170 areAnnotationChecker]: L3308 has no Hoare annotation [2022-02-20 22:04:22,167 WARN L170 areAnnotationChecker]: L3308 has no Hoare annotation [2022-02-20 22:04:22,167 WARN L170 areAnnotationChecker]: L3823 has no Hoare annotation [2022-02-20 22:04:22,167 WARN L170 areAnnotationChecker]: spin_unlock_irqrestoreFINAL has no Hoare annotation [2022-02-20 22:04:22,167 WARN L170 areAnnotationChecker]: L4446-1 has no Hoare annotation [2022-02-20 22:04:22,168 WARN L170 areAnnotationChecker]: L4409-1 has no Hoare annotation [2022-02-20 22:04:22,168 WARN L170 areAnnotationChecker]: L2657-1 has no Hoare annotation [2022-02-20 22:04:22,168 WARN L170 areAnnotationChecker]: L3065 has no Hoare annotation [2022-02-20 22:04:22,168 WARN L170 areAnnotationChecker]: L3077 has no Hoare annotation [2022-02-20 22:04:22,168 WARN L170 areAnnotationChecker]: L4012-1 has no Hoare annotation [2022-02-20 22:04:22,168 WARN L170 areAnnotationChecker]: L3861-1 has no Hoare annotation [2022-02-20 22:04:22,168 WARN L170 areAnnotationChecker]: L3896-1 has no Hoare annotation [2022-02-20 22:04:22,168 WARN L170 areAnnotationChecker]: L3039-4 has no Hoare annotation [2022-02-20 22:04:22,168 WARN L170 areAnnotationChecker]: L3039-4 has no Hoare annotation [2022-02-20 22:04:22,169 WARN L170 areAnnotationChecker]: L4069 has no Hoare annotation [2022-02-20 22:04:22,169 WARN L170 areAnnotationChecker]: L4069 has no Hoare annotation [2022-02-20 22:04:22,169 WARN L170 areAnnotationChecker]: L3662-1 has no Hoare annotation [2022-02-20 22:04:22,169 WARN L170 areAnnotationChecker]: L3663-1 has no Hoare annotation [2022-02-20 22:04:22,169 WARN L170 areAnnotationChecker]: L3660-1 has no Hoare annotation [2022-02-20 22:04:22,169 WARN L170 areAnnotationChecker]: L3661-1 has no Hoare annotation [2022-02-20 22:04:22,170 WARN L170 areAnnotationChecker]: snd_uart16550_input_triggerFINAL has no Hoare annotation [2022-02-20 22:04:22,170 WARN L170 areAnnotationChecker]: L3356 has no Hoare annotation [2022-02-20 22:04:22,170 WARN L170 areAnnotationChecker]: L3356 has no Hoare annotation [2022-02-20 22:04:22,170 WARN L170 areAnnotationChecker]: L3353-4 has no Hoare annotation [2022-02-20 22:04:22,170 WARN L170 areAnnotationChecker]: L3353-4 has no Hoare annotation [2022-02-20 22:04:22,171 WARN L170 areAnnotationChecker]: L3390-1 has no Hoare annotation [2022-02-20 22:04:22,171 WARN L170 areAnnotationChecker]: L2675-1 has no Hoare annotation [2022-02-20 22:04:22,171 WARN L170 areAnnotationChecker]: L3803-1 has no Hoare annotation [2022-02-20 22:04:22,171 WARN L170 areAnnotationChecker]: L3525-2 has no Hoare annotation [2022-02-20 22:04:22,171 WARN L170 areAnnotationChecker]: L3925 has no Hoare annotation [2022-02-20 22:04:22,171 WARN L170 areAnnotationChecker]: L3925 has no Hoare annotation [2022-02-20 22:04:22,171 WARN L170 areAnnotationChecker]: snd_uart16550_freeFINAL has no Hoare annotation [2022-02-20 22:04:22,171 WARN L170 areAnnotationChecker]: L4165 has no Hoare annotation [2022-02-20 22:04:22,171 WARN L170 areAnnotationChecker]: L4165 has no Hoare annotation [2022-02-20 22:04:22,172 WARN L170 areAnnotationChecker]: L3809 has no Hoare annotation [2022-02-20 22:04:22,172 WARN L170 areAnnotationChecker]: L3809 has no Hoare annotation [2022-02-20 22:04:22,172 WARN L170 areAnnotationChecker]: L3753-1 has no Hoare annotation [2022-02-20 22:04:22,172 WARN L170 areAnnotationChecker]: L3721-1 has no Hoare annotation [2022-02-20 22:04:22,173 WARN L170 areAnnotationChecker]: L4344 has no Hoare annotation [2022-02-20 22:04:22,173 WARN L170 areAnnotationChecker]: L4344 has no Hoare annotation [2022-02-20 22:04:22,173 WARN L170 areAnnotationChecker]: L3662-1 has no Hoare annotation [2022-02-20 22:04:22,173 WARN L170 areAnnotationChecker]: snd_uart16550_io_loopFINAL has no Hoare annotation [2022-02-20 22:04:22,173 WARN L170 areAnnotationChecker]: L3560 has no Hoare annotation [2022-02-20 22:04:22,173 WARN L170 areAnnotationChecker]: L3560 has no Hoare annotation [2022-02-20 22:04:22,173 WARN L170 areAnnotationChecker]: L4024-1 has no Hoare annotation [2022-02-20 22:04:22,173 WARN L170 areAnnotationChecker]: L4027-1 has no Hoare annotation [2022-02-20 22:04:22,174 WARN L170 areAnnotationChecker]: L4030-1 has no Hoare annotation [2022-02-20 22:04:22,174 WARN L170 areAnnotationChecker]: L4033-1 has no Hoare annotation [2022-02-20 22:04:22,174 WARN L170 areAnnotationChecker]: L3602 has no Hoare annotation [2022-02-20 22:04:22,174 WARN L170 areAnnotationChecker]: L3602 has no Hoare annotation [2022-02-20 22:04:22,174 WARN L170 areAnnotationChecker]: L3057 has no Hoare annotation [2022-02-20 22:04:22,174 WARN L170 areAnnotationChecker]: L3057 has no Hoare annotation [2022-02-20 22:04:22,174 WARN L170 areAnnotationChecker]: L3427-1 has no Hoare annotation [2022-02-20 22:04:22,175 WARN L170 areAnnotationChecker]: L3511-1 has no Hoare annotation [2022-02-20 22:04:22,175 WARN L170 areAnnotationChecker]: L3241-1 has no Hoare annotation [2022-02-20 22:04:22,175 WARN L170 areAnnotationChecker]: L3102 has no Hoare annotation [2022-02-20 22:04:22,175 WARN L170 areAnnotationChecker]: L3018-2 has no Hoare annotation [2022-02-20 22:04:22,175 WARN L170 areAnnotationChecker]: L3068 has no Hoare annotation [2022-02-20 22:04:22,175 WARN L170 areAnnotationChecker]: L3068 has no Hoare annotation [2022-02-20 22:04:22,175 WARN L170 areAnnotationChecker]: L3384-1 has no Hoare annotation [2022-02-20 22:04:22,175 WARN L170 areAnnotationChecker]: L3386 has no Hoare annotation [2022-02-20 22:04:22,176 WARN L170 areAnnotationChecker]: L3386 has no Hoare annotation [2022-02-20 22:04:22,176 WARN L170 areAnnotationChecker]: L3173-2 has no Hoare annotation [2022-02-20 22:04:22,176 WARN L170 areAnnotationChecker]: snd_uart16550_do_openEXIT has no Hoare annotation [2022-02-20 22:04:22,176 WARN L170 areAnnotationChecker]: snd_uart16550_do_openEXIT has no Hoare annotation [2022-02-20 22:04:22,176 WARN L170 areAnnotationChecker]: L3153-2 has no Hoare annotation [2022-02-20 22:04:22,176 WARN L170 areAnnotationChecker]: L2983-2 has no Hoare annotation [2022-02-20 22:04:22,176 WARN L170 areAnnotationChecker]: L3228-1 has no Hoare annotation [2022-02-20 22:04:22,176 WARN L170 areAnnotationChecker]: L3230 has no Hoare annotation [2022-02-20 22:04:22,176 WARN L170 areAnnotationChecker]: L3230 has no Hoare annotation [2022-02-20 22:04:22,177 WARN L170 areAnnotationChecker]: L3239-1 has no Hoare annotation [2022-02-20 22:04:22,177 WARN L170 areAnnotationChecker]: snd_uart16550_do_closeEXIT has no Hoare annotation [2022-02-20 22:04:22,177 WARN L170 areAnnotationChecker]: snd_uart16550_do_closeEXIT has no Hoare annotation [2022-02-20 22:04:22,177 WARN L170 areAnnotationChecker]: snd_uart16550_output_byteFINAL has no Hoare annotation [2022-02-20 22:04:22,177 WARN L170 areAnnotationChecker]: L3186-1 has no Hoare annotation [2022-02-20 22:04:22,177 WARN L170 areAnnotationChecker]: L3189-1 has no Hoare annotation [2022-02-20 22:04:22,177 WARN L170 areAnnotationChecker]: L3191 has no Hoare annotation [2022-02-20 22:04:22,177 WARN L170 areAnnotationChecker]: L3191 has no Hoare annotation [2022-02-20 22:04:22,177 WARN L170 areAnnotationChecker]: L3200 has no Hoare annotation [2022-02-20 22:04:22,177 WARN L170 areAnnotationChecker]: L3200 has no Hoare annotation [2022-02-20 22:04:22,178 WARN L170 areAnnotationChecker]: L3000-8 has no Hoare annotation [2022-02-20 22:04:22,178 WARN L170 areAnnotationChecker]: L3000-2 has no Hoare annotation [2022-02-20 22:04:22,178 WARN L170 areAnnotationChecker]: L3000-2 has no Hoare annotation [2022-02-20 22:04:22,178 WARN L170 areAnnotationChecker]: L3619-1 has no Hoare annotation [2022-02-20 22:04:22,178 WARN L170 areAnnotationChecker]: snd_serial_unregister_allEXIT has no Hoare annotation [2022-02-20 22:04:22,178 WARN L170 areAnnotationChecker]: snd_serial_unregister_allEXIT has no Hoare annotation [2022-02-20 22:04:22,178 WARN L170 areAnnotationChecker]: spin_unlockFINAL has no Hoare annotation [2022-02-20 22:04:22,178 WARN L170 areAnnotationChecker]: L3381-1 has no Hoare annotation [2022-02-20 22:04:22,178 WARN L170 areAnnotationChecker]: L3378-1 has no Hoare annotation [2022-02-20 22:04:22,179 WARN L170 areAnnotationChecker]: L3428-1 has no Hoare annotation [2022-02-20 22:04:22,180 WARN L170 areAnnotationChecker]: L3428-1 has no Hoare annotation [2022-02-20 22:04:22,181 WARN L170 areAnnotationChecker]: L3280 has no Hoare annotation [2022-02-20 22:04:22,181 WARN L170 areAnnotationChecker]: L3257-1 has no Hoare annotation [2022-02-20 22:04:22,181 WARN L170 areAnnotationChecker]: L3257-1 has no Hoare annotation [2022-02-20 22:04:22,182 WARN L170 areAnnotationChecker]: L3331 has no Hoare annotation [2022-02-20 22:04:22,182 WARN L170 areAnnotationChecker]: L3308-1 has no Hoare annotation [2022-02-20 22:04:22,183 WARN L170 areAnnotationChecker]: L3308-1 has no Hoare annotation [2022-02-20 22:04:22,183 WARN L170 areAnnotationChecker]: L3797 has no Hoare annotation [2022-02-20 22:04:22,183 WARN L170 areAnnotationChecker]: L3823 has no Hoare annotation [2022-02-20 22:04:22,183 WARN L170 areAnnotationChecker]: L3823 has no Hoare annotation [2022-02-20 22:04:22,183 WARN L170 areAnnotationChecker]: spin_unlock_irqrestoreFINAL has no Hoare annotation [2022-02-20 22:04:22,184 WARN L170 areAnnotationChecker]: L3132 has no Hoare annotation [2022-02-20 22:04:22,184 WARN L170 areAnnotationChecker]: L3066-1 has no Hoare annotation [2022-02-20 22:04:22,184 WARN L170 areAnnotationChecker]: L3077 has no Hoare annotation [2022-02-20 22:04:22,184 WARN L170 areAnnotationChecker]: L3077 has no Hoare annotation [2022-02-20 22:04:22,185 WARN L170 areAnnotationChecker]: L4070 has no Hoare annotation [2022-02-20 22:04:22,185 WARN L170 areAnnotationChecker]: L4070 has no Hoare annotation [2022-02-20 22:04:22,185 WARN L170 areAnnotationChecker]: L4114 has no Hoare annotation [2022-02-20 22:04:22,185 WARN L170 areAnnotationChecker]: L4114 has no Hoare annotation [2022-02-20 22:04:22,186 WARN L170 areAnnotationChecker]: L3663-1 has no Hoare annotation [2022-02-20 22:04:22,186 WARN L170 areAnnotationChecker]: L3666 has no Hoare annotation [2022-02-20 22:04:22,186 WARN L170 areAnnotationChecker]: L3666 has no Hoare annotation [2022-02-20 22:04:22,186 WARN L170 areAnnotationChecker]: snd_uart16550_input_triggerEXIT has no Hoare annotation [2022-02-20 22:04:22,186 WARN L170 areAnnotationChecker]: snd_uart16550_input_triggerEXIT has no Hoare annotation [2022-02-20 22:04:22,186 WARN L170 areAnnotationChecker]: L3356-1 has no Hoare annotation [2022-02-20 22:04:22,187 WARN L170 areAnnotationChecker]: L3353-6 has no Hoare annotation [2022-02-20 22:04:22,187 WARN L170 areAnnotationChecker]: L3353-6 has no Hoare annotation [2022-02-20 22:04:22,187 WARN L170 areAnnotationChecker]: L3804 has no Hoare annotation [2022-02-20 22:04:22,187 WARN L170 areAnnotationChecker]: L3804 has no Hoare annotation [2022-02-20 22:04:22,187 WARN L170 areAnnotationChecker]: L3930 has no Hoare annotation [2022-02-20 22:04:22,187 WARN L170 areAnnotationChecker]: L3930 has no Hoare annotation [2022-02-20 22:04:22,187 WARN L170 areAnnotationChecker]: snd_uart16550_freeEXIT has no Hoare annotation [2022-02-20 22:04:22,187 WARN L170 areAnnotationChecker]: snd_uart16550_freeEXIT has no Hoare annotation [2022-02-20 22:04:22,188 WARN L170 areAnnotationChecker]: snd_uart16550_io_loopEXIT has no Hoare annotation [2022-02-20 22:04:22,188 WARN L170 areAnnotationChecker]: snd_uart16550_io_loopEXIT has no Hoare annotation [2022-02-20 22:04:22,188 WARN L170 areAnnotationChecker]: snd_uart16550_io_loopEXIT has no Hoare annotation [2022-02-20 22:04:22,188 WARN L170 areAnnotationChecker]: L3725 has no Hoare annotation [2022-02-20 22:04:22,189 WARN L170 areAnnotationChecker]: L3603-1 has no Hoare annotation [2022-02-20 22:04:22,189 WARN L170 areAnnotationChecker]: L3608 has no Hoare annotation [2022-02-20 22:04:22,189 WARN L170 areAnnotationChecker]: L3608 has no Hoare annotation [2022-02-20 22:04:22,189 WARN L170 areAnnotationChecker]: L3017-1 has no Hoare annotation [2022-02-20 22:04:22,190 WARN L170 areAnnotationChecker]: L3057-2 has no Hoare annotation [2022-02-20 22:04:22,190 WARN L170 areAnnotationChecker]: snd_uart16550_output_triggerEXIT has no Hoare annotation [2022-02-20 22:04:22,190 WARN L170 areAnnotationChecker]: snd_uart16550_output_triggerEXIT has no Hoare annotation [2022-02-20 22:04:22,190 WARN L170 areAnnotationChecker]: L3102 has no Hoare annotation [2022-02-20 22:04:22,190 WARN L170 areAnnotationChecker]: L3022 has no Hoare annotation [2022-02-20 22:04:22,190 WARN L170 areAnnotationChecker]: L3022 has no Hoare annotation [2022-02-20 22:04:22,190 WARN L170 areAnnotationChecker]: L3068-2 has no Hoare annotation [2022-02-20 22:04:22,190 WARN L170 areAnnotationChecker]: L3068-2 has no Hoare annotation [2022-02-20 22:04:22,190 WARN L170 areAnnotationChecker]: L3388-1 has no Hoare annotation [2022-02-20 22:04:22,191 WARN L170 areAnnotationChecker]: L3390-1 has no Hoare annotation [2022-02-20 22:04:22,191 WARN L170 areAnnotationChecker]: L3177 has no Hoare annotation [2022-02-20 22:04:22,191 WARN L170 areAnnotationChecker]: L3177 has no Hoare annotation [2022-02-20 22:04:22,192 WARN L170 areAnnotationChecker]: L3573 has no Hoare annotation [2022-02-20 22:04:22,192 WARN L170 areAnnotationChecker]: L3230-2 has no Hoare annotation [2022-02-20 22:04:22,192 WARN L170 areAnnotationChecker]: snd_uart16550_output_byteEXIT has no Hoare annotation [2022-02-20 22:04:22,192 WARN L170 areAnnotationChecker]: snd_uart16550_output_byteEXIT has no Hoare annotation [2022-02-20 22:04:22,192 WARN L170 areAnnotationChecker]: snd_uart16550_output_byteEXIT has no Hoare annotation [2022-02-20 22:04:22,192 WARN L170 areAnnotationChecker]: snd_uart16550_output_byteEXIT has no Hoare annotation [2022-02-20 22:04:22,192 WARN L170 areAnnotationChecker]: snd_uart16550_output_byteEXIT has no Hoare annotation [2022-02-20 22:04:22,192 WARN L170 areAnnotationChecker]: snd_uart16550_output_byteEXIT has no Hoare annotation [2022-02-20 22:04:22,193 WARN L170 areAnnotationChecker]: L3191-2 has no Hoare annotation [2022-02-20 22:04:22,193 WARN L170 areAnnotationChecker]: L3206-2 has no Hoare annotation [2022-02-20 22:04:22,193 WARN L170 areAnnotationChecker]: L3203 has no Hoare annotation [2022-02-20 22:04:22,193 WARN L170 areAnnotationChecker]: L3203 has no Hoare annotation [2022-02-20 22:04:22,193 WARN L170 areAnnotationChecker]: L3000-4 has no Hoare annotation [2022-02-20 22:04:22,193 WARN L170 areAnnotationChecker]: L3000-4 has no Hoare annotation [2022-02-20 22:04:22,193 WARN L170 areAnnotationChecker]: L3825-1 has no Hoare annotation [2022-02-20 22:04:22,193 WARN L170 areAnnotationChecker]: spin_unlockEXIT has no Hoare annotation [2022-02-20 22:04:22,193 WARN L170 areAnnotationChecker]: spin_unlockEXIT has no Hoare annotation [2022-02-20 22:04:22,194 WARN L170 areAnnotationChecker]: L3095 has no Hoare annotation [2022-02-20 22:04:22,194 WARN L170 areAnnotationChecker]: L3432 has no Hoare annotation [2022-02-20 22:04:22,194 WARN L170 areAnnotationChecker]: L3432 has no Hoare annotation [2022-02-20 22:04:22,194 WARN L170 areAnnotationChecker]: L3280 has no Hoare annotation [2022-02-20 22:04:22,194 WARN L170 areAnnotationChecker]: L3263-1 has no Hoare annotation [2022-02-20 22:04:22,194 WARN L170 areAnnotationChecker]: L3331 has no Hoare annotation [2022-02-20 22:04:22,194 WARN L170 areAnnotationChecker]: L3314-1 has no Hoare annotation [2022-02-20 22:04:22,194 WARN L170 areAnnotationChecker]: L3797 has no Hoare annotation [2022-02-20 22:04:22,194 WARN L170 areAnnotationChecker]: L3797 has no Hoare annotation [2022-02-20 22:04:22,194 WARN L170 areAnnotationChecker]: L3825-1 has no Hoare annotation [2022-02-20 22:04:22,195 WARN L170 areAnnotationChecker]: L4135 has no Hoare annotation [2022-02-20 22:04:22,195 WARN L170 areAnnotationChecker]: spin_unlock_irqrestoreEXIT has no Hoare annotation [2022-02-20 22:04:22,195 WARN L170 areAnnotationChecker]: spin_unlock_irqrestoreEXIT has no Hoare annotation [2022-02-20 22:04:22,195 WARN L170 areAnnotationChecker]: spin_unlock_irqrestoreEXIT has no Hoare annotation [2022-02-20 22:04:22,195 WARN L170 areAnnotationChecker]: spin_unlock_irqrestoreEXIT has no Hoare annotation [2022-02-20 22:04:22,195 WARN L170 areAnnotationChecker]: spin_unlock_irqrestoreEXIT has no Hoare annotation [2022-02-20 22:04:22,195 WARN L170 areAnnotationChecker]: spin_unlock_irqrestoreEXIT has no Hoare annotation [2022-02-20 22:04:22,196 WARN L170 areAnnotationChecker]: spin_unlock_irqrestoreEXIT has no Hoare annotation [2022-02-20 22:04:22,196 WARN L170 areAnnotationChecker]: spin_unlock_irqrestoreEXIT has no Hoare annotation [2022-02-20 22:04:22,196 WARN L170 areAnnotationChecker]: L3132 has no Hoare annotation [2022-02-20 22:04:22,196 WARN L170 areAnnotationChecker]: L3132 has no Hoare annotation [2022-02-20 22:04:22,196 WARN L170 areAnnotationChecker]: L3077-2 has no Hoare annotation [2022-02-20 22:04:22,196 WARN L170 areAnnotationChecker]: L3077-2 has no Hoare annotation [2022-02-20 22:04:22,197 WARN L170 areAnnotationChecker]: L3789 has no Hoare annotation [2022-02-20 22:04:22,197 WARN L170 areAnnotationChecker]: L3896-1 has no Hoare annotation [2022-02-20 22:04:22,197 WARN L170 areAnnotationChecker]: L4073 has no Hoare annotation [2022-02-20 22:04:22,197 WARN L170 areAnnotationChecker]: L4073 has no Hoare annotation [2022-02-20 22:04:22,197 WARN L170 areAnnotationChecker]: L4115 has no Hoare annotation [2022-02-20 22:04:22,198 WARN L170 areAnnotationChecker]: L4115 has no Hoare annotation [2022-02-20 22:04:22,198 WARN L170 areAnnotationChecker]: L4120 has no Hoare annotation [2022-02-20 22:04:22,198 WARN L170 areAnnotationChecker]: L4120 has no Hoare annotation [2022-02-20 22:04:22,198 WARN L170 areAnnotationChecker]: L3666-2 has no Hoare annotation [2022-02-20 22:04:22,198 WARN L170 areAnnotationChecker]: L4075-1 has no Hoare annotation [2022-02-20 22:04:22,198 WARN L170 areAnnotationChecker]: L4080-1 has no Hoare annotation [2022-02-20 22:04:22,198 WARN L170 areAnnotationChecker]: L3808-1 has no Hoare annotation [2022-02-20 22:04:22,198 WARN L170 areAnnotationChecker]: L3575-1 has no Hoare annotation [2022-02-20 22:04:22,198 WARN L170 areAnnotationChecker]: L3603-1 has no Hoare annotation [2022-02-20 22:04:22,199 WARN L170 areAnnotationChecker]: L3725 has no Hoare annotation [2022-02-20 22:04:22,199 WARN L170 areAnnotationChecker]: L3725 has no Hoare annotation [2022-02-20 22:04:22,199 WARN L170 areAnnotationChecker]: L3126 has no Hoare annotation [2022-02-20 22:04:22,199 WARN L170 areAnnotationChecker]: L3608-2 has no Hoare annotation [2022-02-20 22:04:22,199 WARN L170 areAnnotationChecker]: L3061 has no Hoare annotation [2022-02-20 22:04:22,199 WARN L170 areAnnotationChecker]: L3061 has no Hoare annotation [2022-02-20 22:04:22,199 WARN L170 areAnnotationChecker]: L4200-1 has no Hoare annotation [2022-02-20 22:04:22,199 WARN L170 areAnnotationChecker]: L4205-1 has no Hoare annotation [2022-02-20 22:04:22,199 WARN L170 areAnnotationChecker]: ldv_irq_1FINAL has no Hoare annotation [2022-02-20 22:04:22,199 WARN L170 areAnnotationChecker]: L3023 has no Hoare annotation [2022-02-20 22:04:22,200 WARN L170 areAnnotationChecker]: L3023 has no Hoare annotation [2022-02-20 22:04:22,200 WARN L170 areAnnotationChecker]: L3039 has no Hoare annotation [2022-02-20 22:04:22,200 WARN L170 areAnnotationChecker]: L3039 has no Hoare annotation [2022-02-20 22:04:22,200 WARN L170 areAnnotationChecker]: L3065 has no Hoare annotation [2022-02-20 22:04:22,201 WARN L170 areAnnotationChecker]: L3061-4 has no Hoare annotation [2022-02-20 22:04:22,201 WARN L170 areAnnotationChecker]: L3178-1 has no Hoare annotation [2022-02-20 22:04:22,201 WARN L170 areAnnotationChecker]: L3573 has no Hoare annotation [2022-02-20 22:04:22,201 WARN L170 areAnnotationChecker]: L3573 has no Hoare annotation [2022-02-20 22:04:22,201 WARN L170 areAnnotationChecker]: L3231 has no Hoare annotation [2022-02-20 22:04:22,201 WARN L170 areAnnotationChecker]: L3231 has no Hoare annotation [2022-02-20 22:04:22,202 WARN L170 areAnnotationChecker]: L3448 has no Hoare annotation [2022-02-20 22:04:22,202 WARN L170 areAnnotationChecker]: L3449-1 has no Hoare annotation [2022-02-20 22:04:22,202 WARN L170 areAnnotationChecker]: L3460-1 has no Hoare annotation [2022-02-20 22:04:22,202 WARN L170 areAnnotationChecker]: L3461-1 has no Hoare annotation [2022-02-20 22:04:22,202 WARN L170 areAnnotationChecker]: L3463-1 has no Hoare annotation [2022-02-20 22:04:22,202 WARN L170 areAnnotationChecker]: L3473-1 has no Hoare annotation [2022-02-20 22:04:22,202 WARN L170 areAnnotationChecker]: L3192 has no Hoare annotation [2022-02-20 22:04:22,202 WARN L170 areAnnotationChecker]: L3192 has no Hoare annotation [2022-02-20 22:04:22,202 WARN L170 areAnnotationChecker]: L3211-1 has no Hoare annotation [2022-02-20 22:04:22,202 WARN L170 areAnnotationChecker]: L3206 has no Hoare annotation [2022-02-20 22:04:22,203 WARN L170 areAnnotationChecker]: L3206 has no Hoare annotation [2022-02-20 22:04:22,203 WARN L170 areAnnotationChecker]: L3000-6 has no Hoare annotation [2022-02-20 22:04:22,203 WARN L170 areAnnotationChecker]: L3000-6 has no Hoare annotation [2022-02-20 22:04:22,203 WARN L170 areAnnotationChecker]: L3096-1 has no Hoare annotation [2022-02-20 22:04:22,203 WARN L170 areAnnotationChecker]: L3095 has no Hoare annotation [2022-02-20 22:04:22,203 WARN L170 areAnnotationChecker]: L3095 has no Hoare annotation [2022-02-20 22:04:22,203 WARN L170 areAnnotationChecker]: L3434 has no Hoare annotation [2022-02-20 22:04:22,203 WARN L170 areAnnotationChecker]: L4088 has no Hoare annotation [2022-02-20 22:04:22,203 WARN L170 areAnnotationChecker]: L3263-1 has no Hoare annotation [2022-02-20 22:04:22,204 WARN L170 areAnnotationChecker]: L4213 has no Hoare annotation [2022-02-20 22:04:22,204 WARN L170 areAnnotationChecker]: L3314-1 has no Hoare annotation [2022-02-20 22:04:22,204 WARN L170 areAnnotationChecker]: L4446-1 has no Hoare annotation [2022-02-20 22:04:22,204 WARN L170 areAnnotationChecker]: L4135 has no Hoare annotation [2022-02-20 22:04:22,205 WARN L170 areAnnotationChecker]: L4135 has no Hoare annotation [2022-02-20 22:04:22,205 WARN L170 areAnnotationChecker]: L3493 has no Hoare annotation [2022-02-20 22:04:22,206 WARN L170 areAnnotationChecker]: L3789 has no Hoare annotation [2022-02-20 22:04:22,206 WARN L170 areAnnotationChecker]: L3789 has no Hoare annotation [2022-02-20 22:04:22,206 WARN L170 areAnnotationChecker]: L4074 has no Hoare annotation [2022-02-20 22:04:22,206 WARN L170 areAnnotationChecker]: L4074 has no Hoare annotation [2022-02-20 22:04:22,206 WARN L170 areAnnotationChecker]: L4085 has no Hoare annotation [2022-02-20 22:04:22,206 WARN L170 areAnnotationChecker]: L4085 has no Hoare annotation [2022-02-20 22:04:22,206 WARN L170 areAnnotationChecker]: L4023 has no Hoare annotation [2022-02-20 22:04:22,206 WARN L170 areAnnotationChecker]: L4023 has no Hoare annotation [2022-02-20 22:04:22,206 WARN L170 areAnnotationChecker]: L4121 has no Hoare annotation [2022-02-20 22:04:22,207 WARN L170 areAnnotationChecker]: L4121 has no Hoare annotation [2022-02-20 22:04:22,207 WARN L170 areAnnotationChecker]: L4158 has no Hoare annotation [2022-02-20 22:04:22,207 WARN L170 areAnnotationChecker]: L4158 has no Hoare annotation [2022-02-20 22:04:22,207 WARN L170 areAnnotationChecker]: L3730 has no Hoare annotation [2022-02-20 22:04:22,207 WARN L170 areAnnotationChecker]: L4074-2 has no Hoare annotation [2022-02-20 22:04:22,207 WARN L170 areAnnotationChecker]: L4074-2 has no Hoare annotation [2022-02-20 22:04:22,207 WARN L170 areAnnotationChecker]: L3655 has no Hoare annotation [2022-02-20 22:04:22,208 WARN L170 areAnnotationChecker]: L3126 has no Hoare annotation [2022-02-20 22:04:22,208 WARN L170 areAnnotationChecker]: L3126 has no Hoare annotation [2022-02-20 22:04:22,208 WARN L170 areAnnotationChecker]: L3609 has no Hoare annotation [2022-02-20 22:04:22,208 WARN L170 areAnnotationChecker]: L3609 has no Hoare annotation [2022-02-20 22:04:22,208 WARN L170 areAnnotationChecker]: L3061-2 has no Hoare annotation [2022-02-20 22:04:22,208 WARN L170 areAnnotationChecker]: L3061-2 has no Hoare annotation [2022-02-20 22:04:22,208 WARN L170 areAnnotationChecker]: L4199-2 has no Hoare annotation [2022-02-20 22:04:22,208 WARN L170 areAnnotationChecker]: L4199-2 has no Hoare annotation [2022-02-20 22:04:22,208 WARN L170 areAnnotationChecker]: L3024 has no Hoare annotation [2022-02-20 22:04:22,209 WARN L170 areAnnotationChecker]: L3024 has no Hoare annotation [2022-02-20 22:04:22,209 WARN L170 areAnnotationChecker]: L3033 has no Hoare annotation [2022-02-20 22:04:22,209 WARN L170 areAnnotationChecker]: L3033 has no Hoare annotation [2022-02-20 22:04:22,209 WARN L170 areAnnotationChecker]: L3039-2 has no Hoare annotation [2022-02-20 22:04:22,209 WARN L170 areAnnotationChecker]: L3039-2 has no Hoare annotation [2022-02-20 22:04:22,209 WARN L170 areAnnotationChecker]: L3082 has no Hoare annotation [2022-02-20 22:04:22,209 WARN L170 areAnnotationChecker]: L3082 has no Hoare annotation [2022-02-20 22:04:22,209 WARN L170 areAnnotationChecker]: L3575-1 has no Hoare annotation [2022-02-20 22:04:22,210 WARN L170 areAnnotationChecker]: L3579 has no Hoare annotation [2022-02-20 22:04:22,210 WARN L170 areAnnotationChecker]: L3579 has no Hoare annotation [2022-02-20 22:04:22,210 WARN L170 areAnnotationChecker]: L3232-1 has no Hoare annotation [2022-02-20 22:04:22,210 WARN L170 areAnnotationChecker]: L3234 has no Hoare annotation [2022-02-20 22:04:22,211 WARN L170 areAnnotationChecker]: L3234 has no Hoare annotation [2022-02-20 22:04:22,211 WARN L170 areAnnotationChecker]: L3449-1 has no Hoare annotation [2022-02-20 22:04:22,212 WARN L170 areAnnotationChecker]: L3461-1 has no Hoare annotation [2022-02-20 22:04:22,213 WARN L170 areAnnotationChecker]: L3462 has no Hoare annotation [2022-02-20 22:04:22,213 WARN L170 areAnnotationChecker]: L3462 has no Hoare annotation [2022-02-20 22:04:22,213 WARN L170 areAnnotationChecker]: L3456-9 has no Hoare annotation [2022-02-20 22:04:22,213 WARN L170 areAnnotationChecker]: L3474 has no Hoare annotation [2022-02-20 22:04:22,213 WARN L170 areAnnotationChecker]: L3474 has no Hoare annotation [2022-02-20 22:04:22,213 WARN L170 areAnnotationChecker]: L3193-1 has no Hoare annotation [2022-02-20 22:04:22,213 WARN L170 areAnnotationChecker]: L3195 has no Hoare annotation [2022-02-20 22:04:22,213 WARN L170 areAnnotationChecker]: L3195 has no Hoare annotation [2022-02-20 22:04:22,213 WARN L170 areAnnotationChecker]: L3096-1 has no Hoare annotation [2022-02-20 22:04:22,214 WARN L170 areAnnotationChecker]: L3100-1 has no Hoare annotation [2022-02-20 22:04:22,214 WARN L170 areAnnotationChecker]: L3434 has no Hoare annotation [2022-02-20 22:04:22,214 WARN L170 areAnnotationChecker]: L3434 has no Hoare annotation [2022-02-20 22:04:22,214 WARN L170 areAnnotationChecker]: L3486 has no Hoare annotation [2022-02-20 22:04:22,214 WARN L170 areAnnotationChecker]: L4088 has no Hoare annotation [2022-02-20 22:04:22,214 WARN L170 areAnnotationChecker]: L4088 has no Hoare annotation [2022-02-20 22:04:22,214 WARN L170 areAnnotationChecker]: L4099 has no Hoare annotation [2022-02-20 22:04:22,214 WARN L170 areAnnotationChecker]: L4213 has no Hoare annotation [2022-02-20 22:04:22,214 WARN L170 areAnnotationChecker]: L4213 has no Hoare annotation [2022-02-20 22:04:22,214 WARN L170 areAnnotationChecker]: L4224 has no Hoare annotation [2022-02-20 22:04:22,215 WARN L170 areAnnotationChecker]: L4140 has no Hoare annotation [2022-02-20 22:04:22,215 WARN L170 areAnnotationChecker]: L4140 has no Hoare annotation [2022-02-20 22:04:22,215 WARN L170 areAnnotationChecker]: L3511-1 has no Hoare annotation [2022-02-20 22:04:22,215 WARN L170 areAnnotationChecker]: L3803-1 has no Hoare annotation [2022-02-20 22:04:22,215 WARN L170 areAnnotationChecker]: L4075-1 has no Hoare annotation [2022-02-20 22:04:22,216 WARN L170 areAnnotationChecker]: L4086 has no Hoare annotation [2022-02-20 22:04:22,216 WARN L170 areAnnotationChecker]: L4086 has no Hoare annotation [2022-02-20 22:04:22,216 WARN L170 areAnnotationChecker]: L4096 has no Hoare annotation [2022-02-20 22:04:22,216 WARN L170 areAnnotationChecker]: L4096 has no Hoare annotation [2022-02-20 22:04:22,216 WARN L170 areAnnotationChecker]: L4024-1 has no Hoare annotation [2022-02-20 22:04:22,217 WARN L170 areAnnotationChecker]: L4026 has no Hoare annotation [2022-02-20 22:04:22,217 WARN L170 areAnnotationChecker]: L4026 has no Hoare annotation [2022-02-20 22:04:22,217 WARN L170 areAnnotationChecker]: L4124 has no Hoare annotation [2022-02-20 22:04:22,217 WARN L170 areAnnotationChecker]: L4124 has no Hoare annotation [2022-02-20 22:04:22,217 WARN L170 areAnnotationChecker]: L4159 has no Hoare annotation [2022-02-20 22:04:22,218 WARN L170 areAnnotationChecker]: L4159 has no Hoare annotation [2022-02-20 22:04:22,218 WARN L170 areAnnotationChecker]: L4188 has no Hoare annotation [2022-02-20 22:04:22,218 WARN L170 areAnnotationChecker]: L4188 has no Hoare annotation [2022-02-20 22:04:22,218 WARN L170 areAnnotationChecker]: L3730 has no Hoare annotation [2022-02-20 22:04:22,218 WARN L170 areAnnotationChecker]: L3730 has no Hoare annotation [2022-02-20 22:04:22,218 WARN L170 areAnnotationChecker]: L4080-1 has no Hoare annotation [2022-02-20 22:04:22,219 WARN L170 areAnnotationChecker]: L3744-1 has no Hoare annotation [2022-02-20 22:04:22,219 WARN L170 areAnnotationChecker]: L3655 has no Hoare annotation [2022-02-20 22:04:22,219 WARN L170 areAnnotationChecker]: L3655 has no Hoare annotation [2022-02-20 22:04:22,219 WARN L170 areAnnotationChecker]: L4409-1 has no Hoare annotation [2022-02-20 22:04:22,220 WARN L170 areAnnotationChecker]: L3610-1 has no Hoare annotation [2022-02-20 22:04:22,220 WARN L170 areAnnotationChecker]: L3612 has no Hoare annotation [2022-02-20 22:04:22,220 WARN L170 areAnnotationChecker]: L3612 has no Hoare annotation [2022-02-20 22:04:22,220 WARN L170 areAnnotationChecker]: L3062-1 has no Hoare annotation [2022-02-20 22:04:22,220 WARN L170 areAnnotationChecker]: L4205-1 has no Hoare annotation [2022-02-20 22:04:22,221 WARN L170 areAnnotationChecker]: L3024-2 has no Hoare annotation [2022-02-20 22:04:22,221 WARN L170 areAnnotationChecker]: L3024-2 has no Hoare annotation [2022-02-20 22:04:22,221 WARN L170 areAnnotationChecker]: L3033-2 has no Hoare annotation [2022-02-20 22:04:22,221 WARN L170 areAnnotationChecker]: L3033-2 has no Hoare annotation [2022-02-20 22:04:22,221 WARN L170 areAnnotationChecker]: L3040-1 has no Hoare annotation [2022-02-20 22:04:22,222 WARN L170 areAnnotationChecker]: L3082-2 has no Hoare annotation [2022-02-20 22:04:22,222 WARN L170 areAnnotationChecker]: L3082-2 has no Hoare annotation [2022-02-20 22:04:22,222 WARN L170 areAnnotationChecker]: L3579-1 has no Hoare annotation [2022-02-20 22:04:22,222 WARN L170 areAnnotationChecker]: L3235-1 has no Hoare annotation [2022-02-20 22:04:22,222 WARN L170 areAnnotationChecker]: L3226 has no Hoare annotation [2022-02-20 22:04:22,222 WARN L170 areAnnotationChecker]: L3462-2 has no Hoare annotation [2022-02-20 22:04:22,223 WARN L170 areAnnotationChecker]: L3462-2 has no Hoare annotation [2022-02-20 22:04:22,223 WARN L170 areAnnotationChecker]: L3473-1 has no Hoare annotation [2022-02-20 22:04:22,224 WARN L170 areAnnotationChecker]: L3474-2 has no Hoare annotation [2022-02-20 22:04:22,224 WARN L170 areAnnotationChecker]: L3474-2 has no Hoare annotation [2022-02-20 22:04:22,224 WARN L170 areAnnotationChecker]: L3196-1 has no Hoare annotation [2022-02-20 22:04:22,224 WARN L170 areAnnotationChecker]: L3187 has no Hoare annotation [2022-02-20 22:04:22,224 WARN L170 areAnnotationChecker]: ULTIMATE.startFINAL has no Hoare annotation [2022-02-20 22:04:22,224 WARN L170 areAnnotationChecker]: L3493 has no Hoare annotation [2022-02-20 22:04:22,224 WARN L170 areAnnotationChecker]: L3439 has no Hoare annotation [2022-02-20 22:04:22,224 WARN L170 areAnnotationChecker]: L3486 has no Hoare annotation [2022-02-20 22:04:22,224 WARN L170 areAnnotationChecker]: L3486 has no Hoare annotation [2022-02-20 22:04:22,225 WARN L170 areAnnotationChecker]: L4099 has no Hoare annotation [2022-02-20 22:04:22,225 WARN L170 areAnnotationChecker]: L4099 has no Hoare annotation [2022-02-20 22:04:22,225 WARN L170 areAnnotationChecker]: L4224 has no Hoare annotation [2022-02-20 22:04:22,225 WARN L170 areAnnotationChecker]: L4224 has no Hoare annotation [2022-02-20 22:04:22,225 WARN L170 areAnnotationChecker]: L3861-1 has no Hoare annotation [2022-02-20 22:04:22,226 WARN L170 areAnnotationChecker]: L3273-1 has no Hoare annotation [2022-02-20 22:04:22,226 WARN L170 areAnnotationChecker]: L4097 has no Hoare annotation [2022-02-20 22:04:22,226 WARN L170 areAnnotationChecker]: L4097 has no Hoare annotation [2022-02-20 22:04:22,226 WARN L170 areAnnotationChecker]: L4107 has no Hoare annotation [2022-02-20 22:04:22,226 WARN L170 areAnnotationChecker]: L4107 has no Hoare annotation [2022-02-20 22:04:22,226 WARN L170 areAnnotationChecker]: L4027-1 has no Hoare annotation [2022-02-20 22:04:22,227 WARN L170 areAnnotationChecker]: L4029 has no Hoare annotation [2022-02-20 22:04:22,228 WARN L170 areAnnotationChecker]: L4029 has no Hoare annotation [2022-02-20 22:04:22,228 WARN L170 areAnnotationChecker]: L4125 has no Hoare annotation [2022-02-20 22:04:22,228 WARN L170 areAnnotationChecker]: L4125 has no Hoare annotation [2022-02-20 22:04:22,228 WARN L170 areAnnotationChecker]: L4132 has no Hoare annotation [2022-02-20 22:04:22,228 WARN L170 areAnnotationChecker]: L4132 has no Hoare annotation [2022-02-20 22:04:22,228 WARN L170 areAnnotationChecker]: L4162 has no Hoare annotation [2022-02-20 22:04:22,228 WARN L170 areAnnotationChecker]: L4162 has no Hoare annotation [2022-02-20 22:04:22,228 WARN L170 areAnnotationChecker]: L4189 has no Hoare annotation [2022-02-20 22:04:22,228 WARN L170 areAnnotationChecker]: L4189 has no Hoare annotation [2022-02-20 22:04:22,228 WARN L170 areAnnotationChecker]: L4194 has no Hoare annotation [2022-02-20 22:04:22,229 WARN L170 areAnnotationChecker]: L4194 has no Hoare annotation [2022-02-20 22:04:22,229 WARN L170 areAnnotationChecker]: L3737 has no Hoare annotation [2022-02-20 22:04:22,229 WARN L170 areAnnotationChecker]: L3659-1 has no Hoare annotation [2022-02-20 22:04:22,229 WARN L170 areAnnotationChecker]: L3613-1 has no Hoare annotation [2022-02-20 22:04:22,229 WARN L170 areAnnotationChecker]: L3615 has no Hoare annotation [2022-02-20 22:04:22,230 WARN L170 areAnnotationChecker]: L3615 has no Hoare annotation [2022-02-20 22:04:22,230 WARN L170 areAnnotationChecker]: L3024-4 has no Hoare annotation [2022-02-20 22:04:22,230 WARN L170 areAnnotationChecker]: L3034-1 has no Hoare annotation [2022-02-20 22:04:22,231 WARN L170 areAnnotationChecker]: L3082-3 has no Hoare annotation [2022-02-20 22:04:22,231 WARN L170 areAnnotationChecker]: L3941 has no Hoare annotation [2022-02-20 22:04:22,232 WARN L170 areAnnotationChecker]: L-1-3 has no Hoare annotation [2022-02-20 22:04:22,232 WARN L170 areAnnotationChecker]: L3463-1 has no Hoare annotation [2022-02-20 22:04:22,233 WARN L170 areAnnotationChecker]: L3478 has no Hoare annotation [2022-02-20 22:04:22,233 WARN L170 areAnnotationChecker]: L3478 has no Hoare annotation [2022-02-20 22:04:22,233 WARN L170 areAnnotationChecker]: ULTIMATE.startFINAL has no Hoare annotation [2022-02-20 22:04:22,233 WARN L170 areAnnotationChecker]: L3439 has no Hoare annotation [2022-02-20 22:04:22,233 WARN L170 areAnnotationChecker]: L3439 has no Hoare annotation [2022-02-20 22:04:22,233 WARN L170 areAnnotationChecker]: L3456 has no Hoare annotation [2022-02-20 22:04:22,234 WARN L170 areAnnotationChecker]: L3256-1 has no Hoare annotation [2022-02-20 22:04:22,234 WARN L170 areAnnotationChecker]: L4072 has no Hoare annotation [2022-02-20 22:04:22,234 WARN L170 areAnnotationChecker]: L4072 has no Hoare annotation [2022-02-20 22:04:22,234 WARN L170 areAnnotationChecker]: L4030-1 has no Hoare annotation [2022-02-20 22:04:22,235 WARN L170 areAnnotationChecker]: L4032 has no Hoare annotation [2022-02-20 22:04:22,235 WARN L170 areAnnotationChecker]: L4032 has no Hoare annotation [2022-02-20 22:04:22,236 WARN L170 areAnnotationChecker]: L4133 has no Hoare annotation [2022-02-20 22:04:22,236 WARN L170 areAnnotationChecker]: L4133 has no Hoare annotation [2022-02-20 22:04:22,236 WARN L170 areAnnotationChecker]: L4151 has no Hoare annotation [2022-02-20 22:04:22,236 WARN L170 areAnnotationChecker]: L4151 has no Hoare annotation [2022-02-20 22:04:22,236 WARN L170 areAnnotationChecker]: L4163 has no Hoare annotation [2022-02-20 22:04:22,236 WARN L170 areAnnotationChecker]: L4163 has no Hoare annotation [2022-02-20 22:04:22,236 WARN L170 areAnnotationChecker]: L4173 has no Hoare annotation [2022-02-20 22:04:22,236 WARN L170 areAnnotationChecker]: L4173 has no Hoare annotation [2022-02-20 22:04:22,237 WARN L170 areAnnotationChecker]: L4195 has no Hoare annotation [2022-02-20 22:04:22,237 WARN L170 areAnnotationChecker]: L4195 has no Hoare annotation [2022-02-20 22:04:22,237 WARN L170 areAnnotationChecker]: L4239 has no Hoare annotation [2022-02-20 22:04:22,237 WARN L170 areAnnotationChecker]: L4239 has no Hoare annotation [2022-02-20 22:04:22,237 WARN L170 areAnnotationChecker]: L3737 has no Hoare annotation [2022-02-20 22:04:22,237 WARN L170 areAnnotationChecker]: L3737 has no Hoare annotation [2022-02-20 22:04:22,237 WARN L170 areAnnotationChecker]: L3607 has no Hoare annotation [2022-02-20 22:04:22,238 WARN L170 areAnnotationChecker]: L3028 has no Hoare annotation [2022-02-20 22:04:22,238 WARN L170 areAnnotationChecker]: L3028 has no Hoare annotation [2022-02-20 22:04:22,238 WARN L170 areAnnotationChecker]: L3941 has no Hoare annotation [2022-02-20 22:04:22,238 WARN L170 areAnnotationChecker]: L3941 has no Hoare annotation [2022-02-20 22:04:22,238 WARN L170 areAnnotationChecker]: L-1-3 has no Hoare annotation [2022-02-20 22:04:22,238 WARN L170 areAnnotationChecker]: L3478-2 has no Hoare annotation [2022-02-20 22:04:22,238 WARN L170 areAnnotationChecker]: L3478-2 has no Hoare annotation [2022-02-20 22:04:22,238 WARN L170 areAnnotationChecker]: L3444 has no Hoare annotation [2022-02-20 22:04:22,238 WARN L170 areAnnotationChecker]: L3444 has no Hoare annotation [2022-02-20 22:04:22,238 WARN L170 areAnnotationChecker]: L3456 has no Hoare annotation [2022-02-20 22:04:22,239 WARN L170 areAnnotationChecker]: L3456 has no Hoare annotation [2022-02-20 22:04:22,239 WARN L170 areAnnotationChecker]: L4033-1 has no Hoare annotation [2022-02-20 22:04:22,240 WARN L170 areAnnotationChecker]: L4035 has no Hoare annotation [2022-02-20 22:04:22,240 WARN L170 areAnnotationChecker]: L4035 has no Hoare annotation [2022-02-20 22:04:22,240 WARN L170 areAnnotationChecker]: L4123 has no Hoare annotation [2022-02-20 22:04:22,240 WARN L170 areAnnotationChecker]: L4123 has no Hoare annotation [2022-02-20 22:04:22,240 WARN L170 areAnnotationChecker]: L3682 has no Hoare annotation [2022-02-20 22:04:22,241 WARN L170 areAnnotationChecker]: L3682 has no Hoare annotation [2022-02-20 22:04:22,241 WARN L170 areAnnotationChecker]: L4174 has no Hoare annotation [2022-02-20 22:04:22,241 WARN L170 areAnnotationChecker]: L4174 has no Hoare annotation [2022-02-20 22:04:22,241 WARN L170 areAnnotationChecker]: L4181 has no Hoare annotation [2022-02-20 22:04:22,241 WARN L170 areAnnotationChecker]: L4181 has no Hoare annotation [2022-02-20 22:04:22,241 WARN L170 areAnnotationChecker]: L4198 has no Hoare annotation [2022-02-20 22:04:22,241 WARN L170 areAnnotationChecker]: L4198 has no Hoare annotation [2022-02-20 22:04:22,241 WARN L170 areAnnotationChecker]: L4068 has no Hoare annotation [2022-02-20 22:04:22,241 WARN L170 areAnnotationChecker]: L4068 has no Hoare annotation [2022-02-20 22:04:22,242 WARN L170 areAnnotationChecker]: L4312 has no Hoare annotation [2022-02-20 22:04:22,242 WARN L170 areAnnotationChecker]: L3597-1 has no Hoare annotation [2022-02-20 22:04:22,242 WARN L170 areAnnotationChecker]: L3478-4 has no Hoare annotation [2022-02-20 22:04:22,242 WARN L170 areAnnotationChecker]: L3448 has no Hoare annotation [2022-02-20 22:04:22,243 WARN L170 areAnnotationChecker]: L3456-1 has no Hoare annotation [2022-02-20 22:04:22,243 WARN L170 areAnnotationChecker]: L3456-1 has no Hoare annotation [2022-02-20 22:04:22,243 WARN L170 areAnnotationChecker]: L3456-5 has no Hoare annotation [2022-02-20 22:04:22,243 WARN L170 areAnnotationChecker]: L4022 has no Hoare annotation [2022-02-20 22:04:22,243 WARN L170 areAnnotationChecker]: L4022 has no Hoare annotation [2022-02-20 22:04:22,244 WARN L170 areAnnotationChecker]: L4012-1 has no Hoare annotation [2022-02-20 22:04:22,244 WARN L170 areAnnotationChecker]: L3702 has no Hoare annotation [2022-02-20 22:04:22,244 WARN L170 areAnnotationChecker]: L3685 has no Hoare annotation [2022-02-20 22:04:22,244 WARN L170 areAnnotationChecker]: L3685 has no Hoare annotation [2022-02-20 22:04:22,244 WARN L170 areAnnotationChecker]: L3752-1 has no Hoare annotation [2022-02-20 22:04:22,244 WARN L170 areAnnotationChecker]: L4161 has no Hoare annotation [2022-02-20 22:04:22,244 WARN L170 areAnnotationChecker]: L4161 has no Hoare annotation [2022-02-20 22:04:22,245 WARN L170 areAnnotationChecker]: L4199 has no Hoare annotation [2022-02-20 22:04:22,245 WARN L170 areAnnotationChecker]: L4199 has no Hoare annotation [2022-02-20 22:04:22,245 WARN L170 areAnnotationChecker]: L4210 has no Hoare annotation [2022-02-20 22:04:22,245 WARN L170 areAnnotationChecker]: L4210 has no Hoare annotation [2022-02-20 22:04:22,245 WARN L170 areAnnotationChecker]: L4312 has no Hoare annotation [2022-02-20 22:04:22,245 WARN L170 areAnnotationChecker]: L4312 has no Hoare annotation [2022-02-20 22:04:22,245 WARN L170 areAnnotationChecker]: L3456-3 has no Hoare annotation [2022-02-20 22:04:22,245 WARN L170 areAnnotationChecker]: L3456-6 has no Hoare annotation [2022-02-20 22:04:22,246 WARN L170 areAnnotationChecker]: L3456-6 has no Hoare annotation [2022-02-20 22:04:22,246 WARN L170 areAnnotationChecker]: L3702 has no Hoare annotation [2022-02-20 22:04:22,246 WARN L170 areAnnotationChecker]: L3702 has no Hoare annotation [2022-02-20 22:04:22,246 WARN L170 areAnnotationChecker]: L3685-2 has no Hoare annotation [2022-02-20 22:04:22,246 WARN L170 areAnnotationChecker]: L4200-1 has no Hoare annotation [2022-02-20 22:04:22,247 WARN L170 areAnnotationChecker]: L4211 has no Hoare annotation [2022-02-20 22:04:22,247 WARN L170 areAnnotationChecker]: L4211 has no Hoare annotation [2022-02-20 22:04:22,247 WARN L170 areAnnotationChecker]: L4221 has no Hoare annotation [2022-02-20 22:04:22,247 WARN L170 areAnnotationChecker]: L4221 has no Hoare annotation [2022-02-20 22:04:22,247 WARN L170 areAnnotationChecker]: L3951 has no Hoare annotation [2022-02-20 22:04:22,247 WARN L170 areAnnotationChecker]: L3951 has no Hoare annotation [2022-02-20 22:04:22,247 WARN L170 areAnnotationChecker]: L4312-2 has no Hoare annotation [2022-02-20 22:04:22,247 WARN L170 areAnnotationChecker]: L3456-8 has no Hoare annotation [2022-02-20 22:04:22,247 WARN L170 areAnnotationChecker]: L3456-8 has no Hoare annotation [2022-02-20 22:04:22,248 WARN L170 areAnnotationChecker]: L3702-2 has no Hoare annotation [2022-02-20 22:04:22,248 WARN L170 areAnnotationChecker]: L3702-2 has no Hoare annotation [2022-02-20 22:04:22,248 WARN L170 areAnnotationChecker]: L3686 has no Hoare annotation [2022-02-20 22:04:22,248 WARN L170 areAnnotationChecker]: L3686 has no Hoare annotation [2022-02-20 22:04:22,248 WARN L170 areAnnotationChecker]: L3324-1 has no Hoare annotation [2022-02-20 22:04:22,248 WARN L170 areAnnotationChecker]: L4222 has no Hoare annotation [2022-02-20 22:04:22,248 WARN L170 areAnnotationChecker]: L4222 has no Hoare annotation [2022-02-20 22:04:22,248 WARN L170 areAnnotationChecker]: L4232 has no Hoare annotation [2022-02-20 22:04:22,248 WARN L170 areAnnotationChecker]: L4232 has no Hoare annotation [2022-02-20 22:04:22,249 WARN L170 areAnnotationChecker]: L4312-2 has no Hoare annotation [2022-02-20 22:04:22,249 WARN L170 areAnnotationChecker]: L3958 has no Hoare annotation [2022-02-20 22:04:22,249 WARN L170 areAnnotationChecker]: L3958 has no Hoare annotation [2022-02-20 22:04:22,249 WARN L170 areAnnotationChecker]: L3582 has no Hoare annotation [2022-02-20 22:04:22,249 WARN L170 areAnnotationChecker]: L3338 has no Hoare annotation [2022-02-20 22:04:22,249 WARN L170 areAnnotationChecker]: L3338 has no Hoare annotation [2022-02-20 22:04:22,249 WARN L170 areAnnotationChecker]: L3708 has no Hoare annotation [2022-02-20 22:04:22,249 WARN L170 areAnnotationChecker]: L3708 has no Hoare annotation [2022-02-20 22:04:22,249 WARN L170 areAnnotationChecker]: L3690 has no Hoare annotation [2022-02-20 22:04:22,249 WARN L170 areAnnotationChecker]: L3690 has no Hoare annotation [2022-02-20 22:04:22,249 WARN L170 areAnnotationChecker]: L3307-1 has no Hoare annotation [2022-02-20 22:04:22,250 WARN L170 areAnnotationChecker]: L4197 has no Hoare annotation [2022-02-20 22:04:22,250 WARN L170 areAnnotationChecker]: L4197 has no Hoare annotation [2022-02-20 22:04:22,250 WARN L170 areAnnotationChecker]: L3965 has no Hoare annotation [2022-02-20 22:04:22,250 WARN L170 areAnnotationChecker]: L3965 has no Hoare annotation [2022-02-20 22:04:22,250 WARN L170 areAnnotationChecker]: L3582 has no Hoare annotation [2022-02-20 22:04:22,250 WARN L170 areAnnotationChecker]: L3582 has no Hoare annotation [2022-02-20 22:04:22,250 WARN L170 areAnnotationChecker]: L3458 has no Hoare annotation [2022-02-20 22:04:22,250 WARN L170 areAnnotationChecker]: L3708-2 has no Hoare annotation [2022-02-20 22:04:22,250 WARN L170 areAnnotationChecker]: L3708-2 has no Hoare annotation [2022-02-20 22:04:22,251 WARN L170 areAnnotationChecker]: L3694 has no Hoare annotation [2022-02-20 22:04:22,251 WARN L170 areAnnotationChecker]: L3694 has no Hoare annotation [2022-02-20 22:04:22,251 WARN L170 areAnnotationChecker]: L3972 has no Hoare annotation [2022-02-20 22:04:22,251 WARN L170 areAnnotationChecker]: L3972 has no Hoare annotation [2022-02-20 22:04:22,251 WARN L170 areAnnotationChecker]: L3458 has no Hoare annotation [2022-02-20 22:04:22,251 WARN L170 areAnnotationChecker]: L3458 has no Hoare annotation [2022-02-20 22:04:22,251 WARN L170 areAnnotationChecker]: L3716 has no Hoare annotation [2022-02-20 22:04:22,251 WARN L170 areAnnotationChecker]: L3696 has no Hoare annotation [2022-02-20 22:04:22,251 WARN L170 areAnnotationChecker]: L3696 has no Hoare annotation [2022-02-20 22:04:22,251 WARN L170 areAnnotationChecker]: L3460-1 has no Hoare annotation [2022-02-20 22:04:22,252 WARN L170 areAnnotationChecker]: L3467 has no Hoare annotation [2022-02-20 22:04:22,252 WARN L170 areAnnotationChecker]: L3467 has no Hoare annotation [2022-02-20 22:04:22,252 WARN L170 areAnnotationChecker]: L3716 has no Hoare annotation [2022-02-20 22:04:22,252 WARN L170 areAnnotationChecker]: L3716 has no Hoare annotation [2022-02-20 22:04:22,252 WARN L170 areAnnotationChecker]: L3681 has no Hoare annotation [2022-02-20 22:04:22,253 WARN L170 areAnnotationChecker]: L3720-1 has no Hoare annotation [2022-02-20 22:04:22,253 INFO L163 areAnnotationChecker]: CFG has 189 edges. 189 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. 0 times interpolants missing. [2022-02-20 22:04:22,270 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,271 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,271 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,271 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,272 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,272 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,272 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,273 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,274 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,274 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,274 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,274 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,278 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,278 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,278 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,278 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,280 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,280 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,280 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,280 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,281 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,281 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,281 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,281 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,281 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,281 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,282 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,282 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,283 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,283 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,283 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,284 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,290 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,290 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,290 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,290 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,291 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,291 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,291 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,291 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,291 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,291 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,291 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,292 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,292 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,292 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,292 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,293 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,295 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,295 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,295 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,295 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,296 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,296 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,297 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,297 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,298 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,298 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,298 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,298 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,298 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,298 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,298 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,299 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,300 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,300 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,300 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,300 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,300 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,301 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,301 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,302 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,302 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 20.02 10:04:22 BoogieIcfgContainer [2022-02-20 22:04:22,302 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-02-20 22:04:22,303 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-02-20 22:04:22,303 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-02-20 22:04:22,303 INFO L275 PluginConnector]: Witness Printer initialized [2022-02-20 22:04:22,303 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 10:03:33" (3/4) ... [2022-02-20 22:04:22,305 INFO L137 WitnessPrinter]: Generating witness for correct program [2022-02-20 22:04:22,309 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure snd_uart16550_free [2022-02-20 22:04:22,309 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure snd_card_free [2022-02-20 22:04:22,309 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure platform_get_drvdata [2022-02-20 22:04:22,309 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure snd_uart16550_do_close [2022-02-20 22:04:22,309 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure #Ultimate.C_strcpy [2022-02-20 22:04:22,309 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure snd_uart16550_add_timer [2022-02-20 22:04:22,309 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ldv_error [2022-02-20 22:04:22,309 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ldv_irq_1 [2022-02-20 22:04:22,310 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure reg_timer_2 [2022-02-20 22:04:22,310 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure snd_uart16550_io_loop [2022-02-20 22:04:22,310 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ldv_stop [2022-02-20 22:04:22,310 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure snd_uart16550_output_trigger [2022-02-20 22:04:22,310 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure inb [2022-02-20 22:04:22,310 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure snd_uart16550_del_timer [2022-02-20 22:04:22,310 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure outb [2022-02-20 22:04:22,310 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure snd_serial_unregister_all [2022-02-20 22:04:22,310 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure spin_unlock [2022-02-20 22:04:22,310 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure assume_abort_if_not [2022-02-20 22:04:22,310 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure snd_uart16550_output_byte [2022-02-20 22:04:22,311 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ldv_spin_unlock [2022-02-20 22:04:22,311 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ldv_spin_lock [2022-02-20 22:04:22,311 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure platform_device_unregister [2022-02-20 22:04:22,311 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure spin_unlock_irqrestore [2022-02-20 22:04:22,311 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ldv_malloc [2022-02-20 22:04:22,311 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure snd_uart16550_do_open [2022-02-20 22:04:22,311 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure snd_uart16550_buffer_output [2022-02-20 22:04:22,311 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ldv_zalloc [2022-02-20 22:04:22,311 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure snd_rawmidi_receive [2022-02-20 22:04:22,312 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure snd_uart16550_substreams [2022-02-20 22:04:22,312 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure snd_rawmidi_set_ops [2022-02-20 22:04:22,312 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure snd_uart16550_input_trigger [2022-02-20 22:04:22,312 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure snd_uart16550_write_buffer [2022-02-20 22:04:22,312 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure IS_ERR [2022-02-20 22:04:22,335 INFO L910 BoogieBacktranslator]: Reduced CFG by removing 241 nodes and edges [2022-02-20 22:04:22,338 INFO L910 BoogieBacktranslator]: Reduced CFG by removing 63 nodes and edges [2022-02-20 22:04:22,340 INFO L910 BoogieBacktranslator]: Reduced CFG by removing 20 nodes and edges [2022-02-20 22:04:22,342 INFO L910 BoogieBacktranslator]: Reduced CFG by removing 5 nodes and edges [2022-02-20 22:04:22,344 INFO L910 BoogieBacktranslator]: Reduced CFG by removing 2 nodes and edges [2022-02-20 22:04:22,346 INFO L910 BoogieBacktranslator]: Reduced CFG by removing 1 nodes and edges [2022-02-20 22:04:22,378 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: (!(\old(ldv_spin) == 0) || !(ldv_retval_2 == 0)) || (((((\old(unknown-#length-unknown) == unknown-#length-unknown && unknown-#memory_int-unknown == \old(unknown-#memory_int-unknown)) && ldv_spin == 0) && #memory_$Pointer$ == \old(#memory_$Pointer$)) && #memory_$Pointer$ == \old(#memory_$Pointer$)) && \old(\valid) == \valid) [2022-02-20 22:04:22,378 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: !(\old(ldv_state_variable_3) == 0) || ldv_state_variable_3 == 0 [2022-02-20 22:04:22,378 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: !(\old(ldv_state_variable_3) == 0) || ldv_state_variable_3 == 0 [2022-02-20 22:04:22,379 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: !(\old(ldv_state_variable_3) == 0) || ldv_state_variable_3 == 0 [2022-02-20 22:04:22,379 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: (ldv_spin == 0 && ldv_retval_2 == 0) || (!(\result == 0) && ldv_retval_2 == 0) [2022-02-20 22:04:22,379 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: (!(\old(ldv_spin) == 0) || !(ldv_retval_2 == 0)) || ((((\old(unknown-#length-unknown) == unknown-#length-unknown && unknown-#memory_int-unknown == \old(unknown-#memory_int-unknown)) && #memory_$Pointer$ == \old(#memory_$Pointer$)) && #memory_$Pointer$ == \old(#memory_$Pointer$)) && \old(\valid) == \valid) [2022-02-20 22:04:22,379 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: (!(\old(ldv_spin) == 0) || !(ldv_retval_2 == 0)) || ((((\old(unknown-#length-unknown) == unknown-#length-unknown && unknown-#memory_int-unknown == \old(unknown-#memory_int-unknown)) && #memory_$Pointer$ == \old(#memory_$Pointer$)) && #memory_$Pointer$ == \old(#memory_$Pointer$)) && \old(\valid) == \valid) [2022-02-20 22:04:22,380 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: (!(\old(ldv_spin) == 0) || !(ldv_retval_2 == 0)) || ((((\old(unknown-#length-unknown) == unknown-#length-unknown && unknown-#memory_int-unknown == \old(unknown-#memory_int-unknown)) && #memory_$Pointer$ == \old(#memory_$Pointer$)) && #memory_$Pointer$ == \old(#memory_$Pointer$)) && \old(\valid) == \valid) [2022-02-20 22:04:22,380 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: (!(\old(ldv_spin) == 0) || ldv_spin == 0) || !(ldv_retval_2 == 0) [2022-02-20 22:04:22,381 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: (!(\old(ldv_spin) == 0) || ldv_spin == 0) || !(ldv_retval_2 == 0) [2022-02-20 22:04:22,381 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: ((unknown-#memory_int-unknown == \old(unknown-#memory_int-unknown) && #memory_$Pointer$ == \old(#memory_$Pointer$)) && #memory_$Pointer$ == \old(#memory_$Pointer$)) || !(ldv_retval_2 == 0) [2022-02-20 22:04:22,381 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: ((unknown-#memory_int-unknown == \old(unknown-#memory_int-unknown) && #memory_$Pointer$ == \old(#memory_$Pointer$)) && #memory_$Pointer$ == \old(#memory_$Pointer$)) || !(ldv_retval_2 == 0) [2022-02-20 22:04:22,381 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: ((unknown-#memory_int-unknown == \old(unknown-#memory_int-unknown) && #memory_$Pointer$ == \old(#memory_$Pointer$)) && #memory_$Pointer$ == \old(#memory_$Pointer$)) || !(ldv_retval_2 == 0) [2022-02-20 22:04:22,383 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: ((unknown-#memory_int-unknown == \old(unknown-#memory_int-unknown) && #memory_$Pointer$ == \old(#memory_$Pointer$)) && #memory_$Pointer$ == \old(#memory_$Pointer$)) || !(ldv_retval_2 == 0) [2022-02-20 22:04:22,383 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: ((unknown-#memory_int-unknown == \old(unknown-#memory_int-unknown) && #memory_$Pointer$ == \old(#memory_$Pointer$)) && #memory_$Pointer$ == \old(#memory_$Pointer$)) || !(ldv_retval_2 == 0) [2022-02-20 22:04:22,383 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: (!(ldv_spin == 0) || !(ldv_retval_2 == 0)) || \old(\valid) == \valid [2022-02-20 22:04:22,383 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: (!(ldv_spin == 0) || !(ldv_retval_2 == 0)) || \old(\valid) == \valid [2022-02-20 22:04:22,384 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: (!(ldv_spin == 0) || !(ldv_retval_2 == 0)) || \old(\valid) == \valid [2022-02-20 22:04:22,384 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: (!(ldv_spin == 0) || !(ldv_retval_2 == 0)) || \old(\valid) == \valid [2022-02-20 22:04:22,560 INFO L141 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2022-02-20 22:04:22,560 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-02-20 22:04:22,561 INFO L158 Benchmark]: Toolchain (without parser) took 52808.16ms. Allocated memory was 123.7MB in the beginning and 625.0MB in the end (delta: 501.2MB). Free memory was 81.6MB in the beginning and 535.7MB in the end (delta: -454.2MB). Peak memory consumption was 393.9MB. Max. memory is 16.1GB. [2022-02-20 22:04:22,561 INFO L158 Benchmark]: CDTParser took 0.17ms. Allocated memory is still 123.7MB. Free memory was 94.3MB in the beginning and 94.3MB in the end (delta: 21.3kB). There was no memory consumed. Max. memory is 16.1GB. [2022-02-20 22:04:22,575 INFO L158 Benchmark]: CACSL2BoogieTranslator took 963.39ms. Allocated memory was 123.7MB in the beginning and 148.9MB in the end (delta: 25.2MB). Free memory was 81.3MB in the beginning and 78.8MB in the end (delta: 2.5MB). Peak memory consumption was 32.9MB. Max. memory is 16.1GB. [2022-02-20 22:04:22,575 INFO L158 Benchmark]: Boogie Procedure Inliner took 231.86ms. Allocated memory is still 148.9MB. Free memory was 78.8MB in the beginning and 92.5MB in the end (delta: -13.8MB). Peak memory consumption was 12.8MB. Max. memory is 16.1GB. [2022-02-20 22:04:22,575 INFO L158 Benchmark]: Boogie Preprocessor took 132.93ms. Allocated memory is still 148.9MB. Free memory was 92.5MB in the beginning and 71.6MB in the end (delta: 21.0MB). Peak memory consumption was 21.0MB. Max. memory is 16.1GB. [2022-02-20 22:04:22,576 INFO L158 Benchmark]: RCFGBuilder took 2188.05ms. Allocated memory was 148.9MB in the beginning and 216.0MB in the end (delta: 67.1MB). Free memory was 71.6MB in the beginning and 105.5MB in the end (delta: -33.9MB). Peak memory consumption was 61.6MB. Max. memory is 16.1GB. [2022-02-20 22:04:22,576 INFO L158 Benchmark]: TraceAbstraction took 49029.67ms. Allocated memory was 216.0MB in the beginning and 625.0MB in the end (delta: 408.9MB). Free memory was 105.5MB in the beginning and 210.9MB in the end (delta: -105.4MB). Peak memory consumption was 322.5MB. Max. memory is 16.1GB. [2022-02-20 22:04:22,579 INFO L158 Benchmark]: Witness Printer took 257.57ms. Allocated memory is still 625.0MB. Free memory was 210.9MB in the beginning and 535.7MB in the end (delta: -324.8MB). Peak memory consumption was 21.0MB. Max. memory is 16.1GB. [2022-02-20 22:04:22,580 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - AssertionsEnabledResult: Assertions are enabled Assertions are enabled - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17ms. Allocated memory is still 123.7MB. Free memory was 94.3MB in the beginning and 94.3MB in the end (delta: 21.3kB). There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 963.39ms. Allocated memory was 123.7MB in the beginning and 148.9MB in the end (delta: 25.2MB). Free memory was 81.3MB in the beginning and 78.8MB in the end (delta: 2.5MB). Peak memory consumption was 32.9MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 231.86ms. Allocated memory is still 148.9MB. Free memory was 78.8MB in the beginning and 92.5MB in the end (delta: -13.8MB). Peak memory consumption was 12.8MB. Max. memory is 16.1GB. * Boogie Preprocessor took 132.93ms. Allocated memory is still 148.9MB. Free memory was 92.5MB in the beginning and 71.6MB in the end (delta: 21.0MB). Peak memory consumption was 21.0MB. Max. memory is 16.1GB. * RCFGBuilder took 2188.05ms. Allocated memory was 148.9MB in the beginning and 216.0MB in the end (delta: 67.1MB). Free memory was 71.6MB in the beginning and 105.5MB in the end (delta: -33.9MB). Peak memory consumption was 61.6MB. Max. memory is 16.1GB. * TraceAbstraction took 49029.67ms. Allocated memory was 216.0MB in the beginning and 625.0MB in the end (delta: 408.9MB). Free memory was 105.5MB in the beginning and 210.9MB in the end (delta: -105.4MB). Peak memory consumption was 322.5MB. Max. memory is 16.1GB. * Witness Printer took 257.57ms. Allocated memory is still 625.0MB. Free memory was 210.9MB in the beginning and 535.7MB in the end (delta: -324.8MB). Peak memory consumption was 21.0MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset - GenericResult: Unfinished Backtranslation Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - PositiveResult [Line: 2700]: call to reach_error is unreachable For all program executions holds that call to reach_error is unreachable at this location - StatisticsResult: Ultimate Automizer benchmark data CFG has 34 procedures, 662 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 48.8s, OverallIterations: 8, TraceHistogramMax: 3, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.0s, AutomataDifference: 38.9s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 2.8s, InitialAbstractionConstructionTime: 0.0s, PartialOrderReductionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 3650 SdHoareTripleChecker+Valid, 7.4s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 3442 mSDsluCounter, 15865 SdHoareTripleChecker+Invalid, 7.3s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 8776 mSDsCounter, 1700 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 4560 IncrementalHoareTripleChecker+Invalid, 6260 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 1700 mSolverCounterUnsat, 7089 mSDtfsCounter, 4560 mSolverCounterSat, 0.1s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 430 GetRequests, 390 SyntacticMatches, 0 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=1080occurred in iteration=1, InterpolantAutomatonStates: 35, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 1.5s AutomataMinimizationTime, 8 MinimizatonAttempts, 574 StatesRemovedByMinimization, 5 NontrivialMinimizations, HoareAnnotationStatistics: 0.0s HoareAnnotationTime, 259 LocationsWithAnnotation, 6109 PreInvPairs, 6406 NumberOfFragments, 1643 HoareAnnotationTreeSize, 6109 FomulaSimplifications, 18643 FormulaSimplificationTreeSizeReduction, 0.9s HoareSimplificationTime, 259 FomulaSimplificationsInter, 7090 FormulaSimplificationTreeSizeReductionInter, 1.7s HoareSimplificationTimeInter, RefinementEngineStatistics: TRACE_CHECK: 0.2s SsaConstructionTime, 1.0s SatisfiabilityAnalysisTime, 2.1s InterpolantComputationTime, 912 NumberOfCodeBlocks, 912 NumberOfCodeBlocksAsserted, 11 NumberOfCheckSat, 901 ConstructedInterpolants, 0 QuantifiedInterpolants, 1558 SizeOfPredicates, 0 NumberOfNonLiveVariables, 6459 ConjunctsInSsa, 7 ConjunctsInUnsatCore, 11 InterpolantComputations, 8 PerfectInterpolantSequences, 206/209 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available - AllSpecificationsHoldResult: All specifications hold 1 specifications checked. All of them hold - InvariantResult [Line: 4451]: Loop Invariant Derived loop invariant: !(\old(ldv_state_variable_3) == 0) || ldv_state_variable_3 == 0 - InvariantResult [Line: 3267]: Loop Invariant Derived loop invariant: ldv_spin == 0 && ldv_retval_2 == 0 - InvariantResult [Line: 4402]: Loop Invariant Derived loop invariant: ldv_spin == 0 && ldv_retval_2 == 0 - InvariantResult [Line: 4405]: Loop Invariant Derived loop invariant: ldv_spin == 0 && ldv_retval_2 == 0 - InvariantResult [Line: 4423]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 2585]: Loop Invariant [2022-02-20 22:04:22,589 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,589 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,589 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,589 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,589 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,589 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,589 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,589 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset Derived loop invariant: (!(\old(ldv_spin) == 0) || !(ldv_retval_2 == 0)) || ((((\old(unknown-#length-unknown) == unknown-#length-unknown && unknown-#memory_int-unknown == \old(unknown-#memory_int-unknown)) && #memory_$Pointer$ == \old(#memory_$Pointer$)) && #memory_$Pointer$ == \old(#memory_$Pointer$)) && \old(\valid) == \valid) - InvariantResult [Line: 3432]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 4462]: Loop Invariant Derived loop invariant: ldv_spin == 0 && ldv_retval_2 == 0 - InvariantResult [Line: 3948]: Loop Invariant Derived loop invariant: ldv_spin == 0 && ldv_retval_2 == 0 - InvariantResult [Line: 3912]: Loop Invariant Derived loop invariant: (!(ldv_spin == 0) || !(ldv_retval_2 == 0)) || \old(\valid) == \valid - InvariantResult [Line: 3220]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 4341]: Loop Invariant Derived loop invariant: ldv_spin == 0 && ldv_retval_2 == 0 - InvariantResult [Line: 2593]: Loop Invariant Derived loop invariant: ldv_spin == 0 || !(ldv_retval_2 == 0) - InvariantResult [Line: 3987]: Loop Invariant [2022-02-20 22:04:22,590 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,590 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,590 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,590 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,591 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,591 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,591 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,591 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset Derived loop invariant: (!(\old(ldv_spin) == 0) || !(ldv_retval_2 == 0)) || (((((\old(unknown-#length-unknown) == unknown-#length-unknown && unknown-#memory_int-unknown == \old(unknown-#memory_int-unknown)) && ldv_spin == 0) && #memory_$Pointer$ == \old(#memory_$Pointer$)) && #memory_$Pointer$ == \old(#memory_$Pointer$)) && \old(\valid) == \valid) - InvariantResult [Line: 4274]: Loop Invariant Derived loop invariant: ldv_spin == 0 && ldv_retval_2 == 0 - InvariantResult [Line: 4493]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 4053]: Loop Invariant Derived loop invariant: ldv_spin == 0 && ldv_retval_2 == 0 - InvariantResult [Line: 3061]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 3764]: Loop Invariant Derived loop invariant: !(\old(ldv_state_variable_3) == 0) || ldv_state_variable_3 == 0 - InvariantResult [Line: 4445]: Loop Invariant Derived loop invariant: ldv_spin == 0 && ldv_retval_2 == 0 - InvariantResult [Line: 4439]: Loop Invariant Derived loop invariant: (ldv_spin == 0 && ldv_state_variable_3 == 0) && ldv_retval_2 == 0 - InvariantResult [Line: 3748]: Loop Invariant Derived loop invariant: ldv_spin == 0 && ldv_retval_2 == 0 - InvariantResult [Line: 3318]: Loop Invariant Derived loop invariant: ldv_spin == 0 && ldv_retval_2 == 0 - InvariantResult [Line: 4501]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 3673]: Loop Invariant Derived loop invariant: ldv_spin == 0 && ldv_retval_2 == 0 - InvariantResult [Line: 3452]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 3072]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 4414]: Loop Invariant [2022-02-20 22:04:22,592 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,592 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,592 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,592 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,593 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,593 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,593 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,593 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset Derived loop invariant: (!(\old(ldv_spin) == 0) || !(ldv_retval_2 == 0)) || ((((\old(unknown-#length-unknown) == unknown-#length-unknown && unknown-#memory_int-unknown == \old(unknown-#memory_int-unknown)) && #memory_$Pointer$ == \old(#memory_$Pointer$)) && #memory_$Pointer$ == \old(#memory_$Pointer$)) && \old(\valid) == \valid) - InvariantResult [Line: 3250]: Loop Invariant Derived loop invariant: ldv_spin == 0 && ldv_retval_2 == 0 - InvariantResult [Line: 3374]: Loop Invariant [2022-02-20 22:04:22,594 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,594 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,594 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,594 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,594 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,594 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,594 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,594 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset Derived loop invariant: ((unknown-#memory_int-unknown == \old(unknown-#memory_int-unknown) && #memory_$Pointer$ == \old(#memory_$Pointer$)) && #memory_$Pointer$ == \old(#memory_$Pointer$)) || !(ldv_retval_2 == 0) - InvariantResult [Line: 4478]: Loop Invariant Derived loop invariant: ldv_spin == 0 && ldv_retval_2 == 0 - InvariantResult [Line: 3847]: Loop Invariant Derived loop invariant: ldv_spin == 0 && ldv_retval_2 == 0 - InvariantResult [Line: 3787]: Loop Invariant Derived loop invariant: ldv_spin == 0 && ldv_retval_2 == 0 - InvariantResult [Line: 3938]: Loop Invariant Derived loop invariant: ldv_spin == 0 && ldv_retval_2 == 0 - InvariantResult [Line: -1]: Loop Invariant Derived loop invariant: ldv_spin == 0 && ldv_retval_2 == 0 - InvariantResult [Line: 3647]: Loop Invariant Derived loop invariant: ldv_spin == 0 && ldv_retval_2 == 0 - InvariantResult [Line: 3631]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 3061]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 2703]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 4482]: Loop Invariant Derived loop invariant: ldv_spin == 0 && ldv_retval_2 == 0 - InvariantResult [Line: 4474]: Loop Invariant Derived loop invariant: ldv_spin == 0 && ldv_retval_2 == 0 - InvariantResult [Line: 3335]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 4042]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 3787]: Loop Invariant Derived loop invariant: ldv_spin == 0 && ldv_retval_2 == 0 - InvariantResult [Line: 3089]: Loop Invariant Derived loop invariant: (!(\old(ldv_spin) == 0) || ldv_spin == 0) || !(ldv_retval_2 == 0) - InvariantResult [Line: 2710]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 4458]: Loop Invariant Derived loop invariant: (!(ldv_spin == 0) || !(ldv_retval_2 == 0)) || \old(\valid) == \valid - InvariantResult [Line: 3072]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 3679]: Loop Invariant Derived loop invariant: ldv_spin == 0 && ldv_retval_2 == 0 - InvariantResult [Line: 3892]: Loop Invariant Derived loop invariant: ldv_spin == 0 && ldv_retval_2 == 0 - InvariantResult [Line: 3631]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 3013]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 4420]: Loop Invariant Derived loop invariant: ldv_spin == 0 || !(ldv_retval_2 == 0) - InvariantResult [Line: 3452]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 4427]: Loop Invariant [2022-02-20 22:04:22,600 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,600 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,600 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,600 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,600 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,600 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,600 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,601 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset Derived loop invariant: ((unknown-#memory_int-unknown == \old(unknown-#memory_int-unknown) && #memory_$Pointer$ == \old(#memory_$Pointer$)) && #memory_$Pointer$ == \old(#memory_$Pointer$)) || !(ldv_retval_2 == 0) - InvariantResult [Line: 4249]: Loop Invariant [2022-02-20 22:04:22,601 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,601 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,601 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,601 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,601 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,601 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,602 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,602 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset Derived loop invariant: (!(\old(ldv_spin) == 0) || !(ldv_retval_2 == 0)) || ((((\old(unknown-#length-unknown) == unknown-#length-unknown && unknown-#memory_int-unknown == \old(unknown-#memory_int-unknown)) && #memory_$Pointer$ == \old(#memory_$Pointer$)) && #memory_$Pointer$ == \old(#memory_$Pointer$)) && \old(\valid) == \valid) - InvariantResult [Line: 3857]: Loop Invariant Derived loop invariant: ldv_spin == 0 && ldv_retval_2 == 0 - InvariantResult [Line: 4408]: Loop Invariant Derived loop invariant: ldv_spin == 0 && ldv_retval_2 == 0 - InvariantResult [Line: 2786]: Loop Invariant Derived loop invariant: ldv_spin == 0 && ldv_retval_2 == 0 - InvariantResult [Line: 2795]: Loop Invariant Derived loop invariant: ldv_spin == 0 && ldv_retval_2 == 0 - InvariantResult [Line: 3432]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 4017]: Loop Invariant Derived loop invariant: ldv_spin == 0 && ldv_retval_2 == 0 - InvariantResult [Line: 3787]: Loop Invariant Derived loop invariant: ldv_spin == 0 && ldv_retval_2 == 0 - InvariantResult [Line: 4053]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 3106]: Loop Invariant Derived loop invariant: ldv_spin == 0 && ldv_retval_2 == 0 - InvariantResult [Line: 3164]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 3764]: Loop Invariant Derived loop invariant: !(\old(ldv_state_variable_3) == 0) || ldv_state_variable_3 == 0 - InvariantResult [Line: 3544]: Loop Invariant Derived loop invariant: ldv_spin == 0 && ldv_retval_2 == 0 - InvariantResult [Line: 4300]: Loop Invariant Derived loop invariant: ldv_spin == 0 && ldv_retval_2 == 0 - InvariantResult [Line: 2819]: Loop Invariant Derived loop invariant: ldv_spin == 0 && ldv_retval_2 == 0 - InvariantResult [Line: 3832]: Loop Invariant Derived loop invariant: ldv_state_variable_3 == 0 - InvariantResult [Line: 3412]: Loop Invariant Derived loop invariant: (!(\old(ldv_spin) == 0) || ldv_spin == 0) || !(ldv_retval_2 == 0) - InvariantResult [Line: 3901]: Loop Invariant [2022-02-20 22:04:22,612 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,613 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,613 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,613 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,613 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,613 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,613 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,613 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset Derived loop invariant: ((unknown-#memory_int-unknown == \old(unknown-#memory_int-unknown) && #memory_$Pointer$ == \old(#memory_$Pointer$)) && #memory_$Pointer$ == \old(#memory_$Pointer$)) || !(ldv_retval_2 == 0) - InvariantResult [Line: 3013]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 3554]: Loop Invariant Derived loop invariant: ldv_spin == 0 && ldv_retval_2 == 0 - InvariantResult [Line: 4497]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 4319]: Loop Invariant Derived loop invariant: ldv_state_variable_3 == 0 - InvariantResult [Line: 3679]: Loop Invariant Derived loop invariant: ldv_spin == 0 && ldv_retval_2 == 0 - InvariantResult [Line: 3779]: Loop Invariant Derived loop invariant: (ldv_spin == 0 && ldv_retval_2 == 0) || (!(\result == 0) && ldv_retval_2 == 0) - InvariantResult [Line: 2763]: Loop Invariant Derived loop invariant: ldv_spin == 0 && ldv_retval_2 == 0 - InvariantResult [Line: 2843]: Loop Invariant Derived loop invariant: ldv_spin == 0 && ldv_retval_2 == 0 - InvariantResult [Line: 3373]: Loop Invariant [2022-02-20 22:04:22,615 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,615 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,616 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,616 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,616 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,616 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,616 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,616 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset Derived loop invariant: ((unknown-#memory_int-unknown == \old(unknown-#memory_int-unknown) && #memory_$Pointer$ == \old(#memory_$Pointer$)) && #memory_$Pointer$ == \old(#memory_$Pointer$)) || !(ldv_retval_2 == 0) - InvariantResult [Line: 4470]: Loop Invariant Derived loop invariant: ldv_spin == 0 && ldv_retval_2 == 0 - InvariantResult [Line: 4292]: Loop Invariant Derived loop invariant: (!(ldv_spin == 0) || !(ldv_retval_2 == 0)) || \old(\valid) == \valid - InvariantResult [Line: 2601]: Loop Invariant Derived loop invariant: ldv_spin == 0 || !(ldv_retval_2 == 0) - InvariantResult [Line: 4430]: Loop Invariant Derived loop invariant: (!(ldv_spin == 0) || !(ldv_retval_2 == 0)) || \old(\valid) == \valid - InvariantResult [Line: 4436]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 2579]: Loop Invariant Derived loop invariant: ldv_spin == 0 && ldv_retval_2 == 0 - InvariantResult [Line: 3119]: Loop Invariant Derived loop invariant: ldv_spin == 0 && ldv_retval_2 == 0 - InvariantResult [Line: 4327]: Loop Invariant Derived loop invariant: ldv_spin == 0 && ldv_retval_2 == 0 - InvariantResult [Line: 4008]: Loop Invariant Derived loop invariant: ldv_spin == 0 && ldv_retval_2 == 0 - InvariantResult [Line: -1]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 3452]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 4281]: Loop Invariant [2022-02-20 22:04:22,626 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,626 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,626 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,627 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,627 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,627 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.base [2022-02-20 22:04:22,627 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset [2022-02-20 22:04:22,627 WARN L418 cessorBacktranslator]: Unfinished backtranslation: Name guessing unsuccessful for VarDecl var #memory_$Pointer$ : [$Pointer$]$Pointer$; and expression #memory_$Pointer$.offset Derived loop invariant: ((unknown-#memory_int-unknown == \old(unknown-#memory_int-unknown) && #memory_$Pointer$ == \old(#memory_$Pointer$)) && #memory_$Pointer$ == \old(#memory_$Pointer$)) || !(ldv_retval_2 == 0) - InvariantResult [Line: -1]: Loop Invariant Derived loop invariant: ldv_spin == 0 && ldv_retval_2 == 0 - InvariantResult [Line: 2780]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 4417]: Loop Invariant Derived loop invariant: ldv_spin == 0 || !(ldv_retval_2 == 0) - InvariantResult [Line: 3301]: Loop Invariant Derived loop invariant: ldv_spin == 0 && ldv_retval_2 == 0 RESULT: Ultimate proved your program to be correct! [2022-02-20 22:04:22,693 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Result: TRUE