./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/ldv-linux-3.12-rc1/linux-3.12-rc1.tar.xz-144_2a-drivers--input--misc--ims-pcu.ko-entry_point.cil.out.i --full-output -ea --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 03d7b7b3 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -ea -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/ldv-linux-3.12-rc1/linux-3.12-rc1.tar.xz-144_2a-drivers--input--misc--ims-pcu.ko-entry_point.cil.out.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 7f108eec0e6f75d7c7724c96156fb3bec5ecbcd0f2a8def1b3ebffa34d9deb6c --- Real Ultimate output --- This is Ultimate 0.2.2-dev-03d7b7b [2022-02-20 21:49:49,273 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-02-20 21:49:49,275 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-02-20 21:49:49,299 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-02-20 21:49:49,301 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-02-20 21:49:49,302 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-02-20 21:49:49,303 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-02-20 21:49:49,306 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-02-20 21:49:49,308 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-02-20 21:49:49,309 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-02-20 21:49:49,310 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-02-20 21:49:49,315 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-02-20 21:49:49,316 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-02-20 21:49:49,316 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-02-20 21:49:49,317 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-02-20 21:49:49,317 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-02-20 21:49:49,318 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-02-20 21:49:49,318 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-02-20 21:49:49,319 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-02-20 21:49:49,321 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-02-20 21:49:49,323 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-02-20 21:49:49,327 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-02-20 21:49:49,328 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-02-20 21:49:49,329 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-02-20 21:49:49,331 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-02-20 21:49:49,335 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-02-20 21:49:49,335 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-02-20 21:49:49,336 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-02-20 21:49:49,337 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-02-20 21:49:49,338 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-02-20 21:49:49,338 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-02-20 21:49:49,339 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-02-20 21:49:49,339 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-02-20 21:49:49,340 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-02-20 21:49:49,341 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-02-20 21:49:49,341 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-02-20 21:49:49,342 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-02-20 21:49:49,342 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-02-20 21:49:49,342 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-02-20 21:49:49,343 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-02-20 21:49:49,343 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-02-20 21:49:49,344 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2022-02-20 21:49:49,360 INFO L113 SettingsManager]: Loading preferences was successful [2022-02-20 21:49:49,363 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-02-20 21:49:49,364 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-02-20 21:49:49,364 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-02-20 21:49:49,365 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-02-20 21:49:49,365 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-02-20 21:49:49,365 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-02-20 21:49:49,366 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-02-20 21:49:49,366 INFO L138 SettingsManager]: * Use SBE=true [2022-02-20 21:49:49,366 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-02-20 21:49:49,367 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-02-20 21:49:49,367 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-02-20 21:49:49,367 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-02-20 21:49:49,367 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-02-20 21:49:49,367 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-02-20 21:49:49,368 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-02-20 21:49:49,368 INFO L138 SettingsManager]: * Use constant arrays=true [2022-02-20 21:49:49,368 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-02-20 21:49:49,368 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-02-20 21:49:49,368 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-02-20 21:49:49,368 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-02-20 21:49:49,368 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-02-20 21:49:49,369 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-02-20 21:49:49,369 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-02-20 21:49:49,369 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-02-20 21:49:49,369 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-02-20 21:49:49,369 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-02-20 21:49:49,370 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2022-02-20 21:49:49,370 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2022-02-20 21:49:49,371 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-02-20 21:49:49,371 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 7f108eec0e6f75d7c7724c96156fb3bec5ecbcd0f2a8def1b3ebffa34d9deb6c [2022-02-20 21:49:49,536 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-02-20 21:49:49,549 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-02-20 21:49:49,551 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-02-20 21:49:49,552 INFO L271 PluginConnector]: Initializing CDTParser... [2022-02-20 21:49:49,553 INFO L275 PluginConnector]: CDTParser initialized [2022-02-20 21:49:49,553 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/ldv-linux-3.12-rc1/linux-3.12-rc1.tar.xz-144_2a-drivers--input--misc--ims-pcu.ko-entry_point.cil.out.i [2022-02-20 21:49:49,605 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/35b0a0d06/10cf36bc18964ce286543b3b5fbe71f1/FLAGee572cc94 [2022-02-20 21:49:50,096 INFO L306 CDTParser]: Found 1 translation units. [2022-02-20 21:49:50,097 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.12-rc1/linux-3.12-rc1.tar.xz-144_2a-drivers--input--misc--ims-pcu.ko-entry_point.cil.out.i [2022-02-20 21:49:50,119 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/35b0a0d06/10cf36bc18964ce286543b3b5fbe71f1/FLAGee572cc94 [2022-02-20 21:49:50,624 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/35b0a0d06/10cf36bc18964ce286543b3b5fbe71f1 [2022-02-20 21:49:50,626 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-02-20 21:49:50,627 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-02-20 21:49:50,643 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-02-20 21:49:50,644 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-02-20 21:49:50,646 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-02-20 21:49:50,647 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.02 09:49:50" (1/1) ... [2022-02-20 21:49:50,647 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@47abe39d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:49:50, skipping insertion in model container [2022-02-20 21:49:50,647 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.02 09:49:50" (1/1) ... [2022-02-20 21:49:50,652 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-02-20 21:49:50,728 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-02-20 21:49:51,309 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.12-rc1/linux-3.12-rc1.tar.xz-144_2a-drivers--input--misc--ims-pcu.ko-entry_point.cil.out.i[114617,114630] [2022-02-20 21:49:51,860 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-20 21:49:51,901 INFO L203 MainTranslator]: Completed pre-run [2022-02-20 21:49:52,014 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.12-rc1/linux-3.12-rc1.tar.xz-144_2a-drivers--input--misc--ims-pcu.ko-entry_point.cil.out.i[114617,114630] [2022-02-20 21:49:52,160 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-20 21:49:52,252 INFO L208 MainTranslator]: Completed translation [2022-02-20 21:49:52,253 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:49:52 WrapperNode [2022-02-20 21:49:52,254 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-02-20 21:49:52,255 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-02-20 21:49:52,255 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-02-20 21:49:52,256 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-02-20 21:49:52,261 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:49:52" (1/1) ... [2022-02-20 21:49:52,322 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:49:52" (1/1) ... [2022-02-20 21:49:52,479 INFO L137 Inliner]: procedures = 222, calls = 1486, calls flagged for inlining = 101, calls inlined = 96, statements flattened = 3995 [2022-02-20 21:49:52,479 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-02-20 21:49:52,480 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-02-20 21:49:52,480 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-02-20 21:49:52,480 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-02-20 21:49:52,488 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:49:52" (1/1) ... [2022-02-20 21:49:52,488 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:49:52" (1/1) ... [2022-02-20 21:49:52,512 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:49:52" (1/1) ... [2022-02-20 21:49:52,512 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:49:52" (1/1) ... [2022-02-20 21:49:52,600 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:49:52" (1/1) ... [2022-02-20 21:49:52,619 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:49:52" (1/1) ... [2022-02-20 21:49:52,677 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:49:52" (1/1) ... [2022-02-20 21:49:52,696 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-02-20 21:49:52,697 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-02-20 21:49:52,697 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-02-20 21:49:52,697 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-02-20 21:49:52,698 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:49:52" (1/1) ... [2022-02-20 21:49:52,704 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-02-20 21:49:52,712 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-20 21:49:52,732 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-02-20 21:49:52,749 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-02-20 21:49:52,760 INFO L130 BoogieDeclarations]: Found specification of procedure __fswab32 [2022-02-20 21:49:52,761 INFO L138 BoogieDeclarations]: Found implementation of procedure __fswab32 [2022-02-20 21:49:52,761 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_set_intfdata_18 [2022-02-20 21:49:52,761 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_set_intfdata_18 [2022-02-20 21:49:52,761 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2022-02-20 21:49:52,761 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2022-02-20 21:49:52,761 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_stop [2022-02-20 21:49:52,761 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_stop [2022-02-20 21:49:52,761 INFO L130 BoogieDeclarations]: Found specification of procedure put_unaligned_le32 [2022-02-20 21:49:52,762 INFO L138 BoogieDeclarations]: Found implementation of procedure put_unaligned_le32 [2022-02-20 21:49:52,762 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_submit_urb [2022-02-20 21:49:52,762 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_submit_urb [2022-02-20 21:49:52,762 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_handle_firmware_update [2022-02-20 21:49:52,762 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_handle_firmware_update [2022-02-20 21:49:52,762 INFO L130 BoogieDeclarations]: Found specification of procedure usb_make_path [2022-02-20 21:49:52,762 INFO L138 BoogieDeclarations]: Found implementation of procedure usb_make_path [2022-02-20 21:49:52,762 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2022-02-20 21:49:52,762 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2022-02-20 21:49:52,763 INFO L130 BoogieDeclarations]: Found specification of procedure usb_endpoint_maxp [2022-02-20 21:49:52,763 INFO L138 BoogieDeclarations]: Found implementation of procedure usb_endpoint_maxp [2022-02-20 21:49:52,763 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_alloc_urb [2022-02-20 21:49:52,763 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_alloc_urb [2022-02-20 21:49:52,763 INFO L130 BoogieDeclarations]: Found specification of procedure mutex_lock_interruptible_nested [2022-02-20 21:49:52,763 INFO L138 BoogieDeclarations]: Found implementation of procedure mutex_lock_interruptible_nested [2022-02-20 21:49:52,763 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_get_info [2022-02-20 21:49:52,764 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_get_info [2022-02-20 21:49:52,764 INFO L130 BoogieDeclarations]: Found specification of procedure strlcat [2022-02-20 21:49:52,764 INFO L138 BoogieDeclarations]: Found implementation of procedure strlcat [2022-02-20 21:49:52,764 INFO L130 BoogieDeclarations]: Found specification of procedure mutex_unlock [2022-02-20 21:49:52,764 INFO L138 BoogieDeclarations]: Found implementation of procedure mutex_unlock [2022-02-20 21:49:52,764 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_error [2022-02-20 21:49:52,764 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_error [2022-02-20 21:49:52,764 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2022-02-20 21:49:52,764 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2022-02-20 21:49:52,765 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2022-02-20 21:49:52,765 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2022-02-20 21:49:52,765 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_stop___0 [2022-02-20 21:49:52,765 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_stop___0 [2022-02-20 21:49:52,765 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-02-20 21:49:52,765 INFO L130 BoogieDeclarations]: Found specification of procedure input_event [2022-02-20 21:49:52,766 INFO L138 BoogieDeclarations]: Found implementation of procedure input_event [2022-02-20 21:49:52,766 INFO L130 BoogieDeclarations]: Found specification of procedure memcmp [2022-02-20 21:49:52,766 INFO L130 BoogieDeclarations]: Found specification of procedure ihex_next_binrec [2022-02-20 21:49:52,766 INFO L138 BoogieDeclarations]: Found implementation of procedure ihex_next_binrec [2022-02-20 21:49:52,766 INFO L130 BoogieDeclarations]: Found specification of procedure usb_free_coherent [2022-02-20 21:49:52,766 INFO L138 BoogieDeclarations]: Found implementation of procedure usb_free_coherent [2022-02-20 21:49:52,766 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_buffers_free [2022-02-20 21:49:52,766 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_buffers_free [2022-02-20 21:49:52,766 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-02-20 21:49:52,767 INFO L130 BoogieDeclarations]: Found specification of procedure usb_ifnum_to_if [2022-02-20 21:49:52,767 INFO L138 BoogieDeclarations]: Found implementation of procedure usb_ifnum_to_if [2022-02-20 21:49:52,767 INFO L130 BoogieDeclarations]: Found specification of procedure __xadd_wrong_size [2022-02-20 21:49:52,767 INFO L130 BoogieDeclarations]: Found specification of procedure input_allocate_device [2022-02-20 21:49:52,767 INFO L138 BoogieDeclarations]: Found implementation of procedure input_allocate_device [2022-02-20 21:49:52,767 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_attribute_show [2022-02-20 21:49:52,768 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_attribute_show [2022-02-20 21:49:52,768 INFO L130 BoogieDeclarations]: Found specification of procedure get_unaligned_le32 [2022-02-20 21:49:52,768 INFO L138 BoogieDeclarations]: Found implementation of procedure get_unaligned_le32 [2022-02-20 21:49:52,769 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-02-20 21:49:52,769 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2022-02-20 21:49:52,769 INFO L130 BoogieDeclarations]: Found specification of procedure kzalloc [2022-02-20 21:49:52,769 INFO L138 BoogieDeclarations]: Found implementation of procedure kzalloc [2022-02-20 21:49:52,769 INFO L130 BoogieDeclarations]: Found specification of procedure kmalloc [2022-02-20 21:49:52,769 INFO L138 BoogieDeclarations]: Found implementation of procedure kmalloc [2022-02-20 21:49:52,770 INFO L130 BoogieDeclarations]: Found specification of procedure __fswab16 [2022-02-20 21:49:52,770 INFO L138 BoogieDeclarations]: Found implementation of procedure __fswab16 [2022-02-20 21:49:52,770 INFO L130 BoogieDeclarations]: Found specification of procedure mutex_lock_nested [2022-02-20 21:49:52,770 INFO L138 BoogieDeclarations]: Found implementation of procedure mutex_lock_nested [2022-02-20 21:49:52,770 INFO L130 BoogieDeclarations]: Found specification of procedure __ims_pcu_execute_command [2022-02-20 21:49:52,770 INFO L138 BoogieDeclarations]: Found implementation of procedure __ims_pcu_execute_command [2022-02-20 21:49:52,770 INFO L130 BoogieDeclarations]: Found specification of procedure release_firmware [2022-02-20 21:49:52,770 INFO L138 BoogieDeclarations]: Found implementation of procedure release_firmware [2022-02-20 21:49:52,771 INFO L130 BoogieDeclarations]: Found specification of procedure __ims_pcu_execute_bl_command [2022-02-20 21:49:52,771 INFO L138 BoogieDeclarations]: Found implementation of procedure __ims_pcu_execute_bl_command [2022-02-20 21:49:52,771 INFO L130 BoogieDeclarations]: Found specification of procedure input_report_key [2022-02-20 21:49:52,771 INFO L138 BoogieDeclarations]: Found implementation of procedure input_report_key [2022-02-20 21:49:52,771 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~int [2022-02-20 21:49:52,771 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2022-02-20 21:49:52,772 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2022-02-20 21:49:52,772 INFO L130 BoogieDeclarations]: Found specification of procedure input_report_abs [2022-02-20 21:49:52,772 INFO L138 BoogieDeclarations]: Found implementation of procedure input_report_abs [2022-02-20 21:49:52,772 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2022-02-20 21:49:52,772 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_submit_urb_8 [2022-02-20 21:49:52,772 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_submit_urb_8 [2022-02-20 21:49:52,772 INFO L130 BoogieDeclarations]: Found specification of procedure input_free_device [2022-02-20 21:49:52,772 INFO L138 BoogieDeclarations]: Found implementation of procedure input_free_device [2022-02-20 21:49:52,772 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-02-20 21:49:52,772 INFO L130 BoogieDeclarations]: Found specification of procedure usb_endpoint_xfer_bulk [2022-02-20 21:49:52,773 INFO L138 BoogieDeclarations]: Found implementation of procedure usb_endpoint_xfer_bulk [2022-02-20 21:49:52,773 INFO L130 BoogieDeclarations]: Found specification of procedure sysfs_remove_group [2022-02-20 21:49:52,773 INFO L138 BoogieDeclarations]: Found implementation of procedure sysfs_remove_group [2022-02-20 21:49:52,773 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_destroy_backlight [2022-02-20 21:49:52,773 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_destroy_backlight [2022-02-20 21:49:52,774 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_attribute_store [2022-02-20 21:49:52,774 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_attribute_store [2022-02-20 21:49:52,774 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2022-02-20 21:49:52,774 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2022-02-20 21:49:52,774 INFO L130 BoogieDeclarations]: Found specification of procedure __create_pipe [2022-02-20 21:49:52,775 INFO L138 BoogieDeclarations]: Found implementation of procedure __create_pipe [2022-02-20 21:49:52,775 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_resume [2022-02-20 21:49:52,775 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_resume [2022-02-20 21:49:52,775 INFO L130 BoogieDeclarations]: Found specification of procedure usb_kill_urb [2022-02-20 21:49:52,775 INFO L138 BoogieDeclarations]: Found implementation of procedure usb_kill_urb [2022-02-20 21:49:52,775 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_destroy_buttons [2022-02-20 21:49:52,776 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_destroy_buttons [2022-02-20 21:49:52,776 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2022-02-20 21:49:52,776 INFO L138 BoogieDeclarations]: Found implementation of procedure kfree [2022-02-20 21:49:52,776 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_start_io [2022-02-20 21:49:52,776 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_start_io [2022-02-20 21:49:52,776 INFO L130 BoogieDeclarations]: Found specification of procedure init_completion [2022-02-20 21:49:52,776 INFO L138 BoogieDeclarations]: Found implementation of procedure init_completion [2022-02-20 21:49:52,776 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-02-20 21:49:52,776 INFO L130 BoogieDeclarations]: Found specification of procedure usb_to_input_id [2022-02-20 21:49:52,777 INFO L138 BoogieDeclarations]: Found implementation of procedure usb_to_input_id [2022-02-20 21:49:52,777 INFO L130 BoogieDeclarations]: Found specification of procedure input_sync [2022-02-20 21:49:52,777 INFO L138 BoogieDeclarations]: Found implementation of procedure input_sync [2022-02-20 21:49:52,777 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_send_cmd_chunk [2022-02-20 21:49:52,777 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_send_cmd_chunk [2022-02-20 21:49:52,778 INFO L130 BoogieDeclarations]: Found specification of procedure kstrtoint [2022-02-20 21:49:52,778 INFO L138 BoogieDeclarations]: Found implementation of procedure kstrtoint [2022-02-20 21:49:52,780 INFO L130 BoogieDeclarations]: Found specification of procedure ldv__builtin_expect [2022-02-20 21:49:52,780 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv__builtin_expect [2022-02-20 21:49:52,780 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-02-20 21:49:52,780 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_get_intfdata_2 [2022-02-20 21:49:52,781 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_get_intfdata_2 [2022-02-20 21:49:52,781 INFO L130 BoogieDeclarations]: Found specification of procedure input_register_device [2022-02-20 21:49:52,782 INFO L138 BoogieDeclarations]: Found implementation of procedure input_register_device [2022-02-20 21:49:52,782 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_line_setup [2022-02-20 21:49:52,782 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_line_setup [2022-02-20 21:49:52,786 INFO L130 BoogieDeclarations]: Found specification of procedure complete [2022-02-20 21:49:52,786 INFO L138 BoogieDeclarations]: Found implementation of procedure complete [2022-02-20 21:49:52,786 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-02-20 21:49:52,786 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_stop_io [2022-02-20 21:49:52,786 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_stop_io [2022-02-20 21:49:52,786 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_undef_int [2022-02-20 21:49:52,786 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_undef_int [2022-02-20 21:49:52,787 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_byte_needs_escape [2022-02-20 21:49:52,787 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_byte_needs_escape [2022-02-20 21:49:52,787 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-02-20 21:49:52,787 INFO L130 BoogieDeclarations]: Found specification of procedure input_set_abs_params [2022-02-20 21:49:52,787 INFO L138 BoogieDeclarations]: Found implementation of procedure input_set_abs_params [2022-02-20 21:49:52,787 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2022-02-20 21:49:52,787 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2022-02-20 21:49:52,787 INFO L130 BoogieDeclarations]: Found specification of procedure __set_bit [2022-02-20 21:49:52,787 INFO L138 BoogieDeclarations]: Found implementation of procedure __set_bit [2022-02-20 21:49:52,787 INFO L130 BoogieDeclarations]: Found specification of procedure usb_alloc_coherent [2022-02-20 21:49:52,788 INFO L138 BoogieDeclarations]: Found implementation of procedure usb_alloc_coherent [2022-02-20 21:49:52,788 INFO L130 BoogieDeclarations]: Found specification of procedure usb_control_msg [2022-02-20 21:49:52,788 INFO L138 BoogieDeclarations]: Found implementation of procedure usb_control_msg [2022-02-20 21:49:52,788 INFO L130 BoogieDeclarations]: Found specification of procedure ihex_validate_fw [2022-02-20 21:49:52,788 INFO L138 BoogieDeclarations]: Found implementation of procedure ihex_validate_fw [2022-02-20 21:49:52,788 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_irq [2022-02-20 21:49:52,788 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_irq [2022-02-20 21:49:52,788 INFO L130 BoogieDeclarations]: Found specification of procedure input_unregister_device [2022-02-20 21:49:52,788 INFO L138 BoogieDeclarations]: Found implementation of procedure input_unregister_device [2022-02-20 21:49:52,788 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_free_urb [2022-02-20 21:49:52,788 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_free_urb [2022-02-20 21:49:52,789 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-02-20 21:49:52,789 INFO L130 BoogieDeclarations]: Found specification of procedure ims_pcu_disconnect [2022-02-20 21:49:52,789 INFO L138 BoogieDeclarations]: Found implementation of procedure ims_pcu_disconnect [2022-02-20 21:49:52,789 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-02-20 21:49:52,789 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-02-20 21:49:53,281 INFO L234 CfgBuilder]: Building ICFG [2022-02-20 21:49:53,284 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-02-20 21:49:53,422 INFO L766 $ProcedureCfgBuilder]: dead code at ProgramPoint ldv_stopFINAL: assume true; [2022-02-20 21:49:54,359 INFO L766 $ProcedureCfgBuilder]: dead code at ProgramPoint ldv_stop___0FINAL: assume true; [2022-02-20 21:49:55,500 INFO L275 CfgBuilder]: Performing block encoding [2022-02-20 21:49:55,512 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-02-20 21:49:55,513 INFO L299 CfgBuilder]: Removed 0 assume(true) statements. [2022-02-20 21:49:55,515 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 09:49:55 BoogieIcfgContainer [2022-02-20 21:49:55,515 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-02-20 21:49:55,516 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-02-20 21:49:55,516 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-02-20 21:49:55,518 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-02-20 21:49:55,519 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 20.02 09:49:50" (1/3) ... [2022-02-20 21:49:55,519 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3d449ddf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.02 09:49:55, skipping insertion in model container [2022-02-20 21:49:55,519 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:49:52" (2/3) ... [2022-02-20 21:49:55,520 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3d449ddf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.02 09:49:55, skipping insertion in model container [2022-02-20 21:49:55,520 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 09:49:55" (3/3) ... [2022-02-20 21:49:55,521 INFO L111 eAbstractionObserver]: Analyzing ICFG linux-3.12-rc1.tar.xz-144_2a-drivers--input--misc--ims-pcu.ko-entry_point.cil.out.i [2022-02-20 21:49:55,524 INFO L205 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-02-20 21:49:55,524 INFO L164 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-02-20 21:49:55,594 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-02-20 21:49:55,600 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2022-02-20 21:49:55,600 INFO L340 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-02-20 21:49:55,648 INFO L276 IsEmpty]: Start isEmpty. Operand has 1168 states, 813 states have (on average 1.3444034440344403) internal successors, (1093), 846 states have internal predecessors, (1093), 283 states have call successors, (283), 72 states have call predecessors, (283), 70 states have return successors, (268), 267 states have call predecessors, (268), 268 states have call successors, (268) [2022-02-20 21:49:55,659 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 175 [2022-02-20 21:49:55,660 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:49:55,660 INFO L514 BasicCegarLoop]: trace histogram [24, 24, 24, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:49:55,661 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:49:55,664 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:49:55,664 INFO L85 PathProgramCache]: Analyzing trace with hash 1340860104, now seen corresponding path program 1 times [2022-02-20 21:49:55,670 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:49:55,671 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1164705063] [2022-02-20 21:49:55,671 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:49:55,672 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:49:55,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:49:56,121 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 21:49:56,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:49:56,135 INFO L290 TraceCheckUtils]: 0: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,135 INFO L290 TraceCheckUtils]: 1: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,136 INFO L290 TraceCheckUtils]: 2: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,136 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1171#true} {1171#true} #2721#return; {1171#true} is VALID [2022-02-20 21:49:56,137 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-02-20 21:49:56,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:49:56,145 INFO L290 TraceCheckUtils]: 0: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,146 INFO L290 TraceCheckUtils]: 1: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,146 INFO L290 TraceCheckUtils]: 2: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,146 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1171#true} {1171#true} #2723#return; {1171#true} is VALID [2022-02-20 21:49:56,147 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2022-02-20 21:49:56,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:49:56,155 INFO L290 TraceCheckUtils]: 0: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,155 INFO L290 TraceCheckUtils]: 1: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,155 INFO L290 TraceCheckUtils]: 2: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,156 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1171#true} {1171#true} #2725#return; {1171#true} is VALID [2022-02-20 21:49:56,156 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 20 [2022-02-20 21:49:56,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:49:56,164 INFO L290 TraceCheckUtils]: 0: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,164 INFO L290 TraceCheckUtils]: 1: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,165 INFO L290 TraceCheckUtils]: 2: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,165 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1171#true} {1171#true} #2727#return; {1171#true} is VALID [2022-02-20 21:49:56,165 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-02-20 21:49:56,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:49:56,173 INFO L290 TraceCheckUtils]: 0: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,174 INFO L290 TraceCheckUtils]: 1: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,174 INFO L290 TraceCheckUtils]: 2: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,174 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1171#true} {1171#true} #2729#return; {1171#true} is VALID [2022-02-20 21:49:56,174 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 32 [2022-02-20 21:49:56,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:49:56,183 INFO L290 TraceCheckUtils]: 0: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,183 INFO L290 TraceCheckUtils]: 1: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,183 INFO L290 TraceCheckUtils]: 2: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,183 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1171#true} {1171#true} #2731#return; {1171#true} is VALID [2022-02-20 21:49:56,184 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 38 [2022-02-20 21:49:56,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:49:56,195 INFO L290 TraceCheckUtils]: 0: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,195 INFO L290 TraceCheckUtils]: 1: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,196 INFO L290 TraceCheckUtils]: 2: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,196 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1171#true} {1171#true} #2733#return; {1171#true} is VALID [2022-02-20 21:49:56,196 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2022-02-20 21:49:56,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:49:56,205 INFO L290 TraceCheckUtils]: 0: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,205 INFO L290 TraceCheckUtils]: 1: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,205 INFO L290 TraceCheckUtils]: 2: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,205 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1171#true} {1171#true} #2735#return; {1171#true} is VALID [2022-02-20 21:49:56,206 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 50 [2022-02-20 21:49:56,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:49:56,214 INFO L290 TraceCheckUtils]: 0: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,214 INFO L290 TraceCheckUtils]: 1: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,214 INFO L290 TraceCheckUtils]: 2: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,214 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1171#true} {1171#true} #2737#return; {1171#true} is VALID [2022-02-20 21:49:56,215 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 56 [2022-02-20 21:49:56,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:49:56,223 INFO L290 TraceCheckUtils]: 0: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,223 INFO L290 TraceCheckUtils]: 1: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,223 INFO L290 TraceCheckUtils]: 2: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,224 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1171#true} {1171#true} #2739#return; {1171#true} is VALID [2022-02-20 21:49:56,224 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 62 [2022-02-20 21:49:56,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:49:56,232 INFO L290 TraceCheckUtils]: 0: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,232 INFO L290 TraceCheckUtils]: 1: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,232 INFO L290 TraceCheckUtils]: 2: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,232 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1171#true} {1171#true} #2741#return; {1171#true} is VALID [2022-02-20 21:49:56,233 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 68 [2022-02-20 21:49:56,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:49:56,241 INFO L290 TraceCheckUtils]: 0: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,241 INFO L290 TraceCheckUtils]: 1: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,242 INFO L290 TraceCheckUtils]: 2: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,242 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1171#true} {1171#true} #2743#return; {1171#true} is VALID [2022-02-20 21:49:56,242 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 74 [2022-02-20 21:49:56,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:49:56,250 INFO L290 TraceCheckUtils]: 0: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,250 INFO L290 TraceCheckUtils]: 1: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,251 INFO L290 TraceCheckUtils]: 2: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,251 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1171#true} {1171#true} #2745#return; {1171#true} is VALID [2022-02-20 21:49:56,251 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 80 [2022-02-20 21:49:56,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:49:56,259 INFO L290 TraceCheckUtils]: 0: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,260 INFO L290 TraceCheckUtils]: 1: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,260 INFO L290 TraceCheckUtils]: 2: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,260 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1171#true} {1171#true} #2747#return; {1171#true} is VALID [2022-02-20 21:49:56,260 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 86 [2022-02-20 21:49:56,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:49:56,269 INFO L290 TraceCheckUtils]: 0: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,269 INFO L290 TraceCheckUtils]: 1: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,269 INFO L290 TraceCheckUtils]: 2: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,269 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1171#true} {1171#true} #2749#return; {1171#true} is VALID [2022-02-20 21:49:56,270 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 92 [2022-02-20 21:49:56,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:49:56,283 INFO L290 TraceCheckUtils]: 0: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,283 INFO L290 TraceCheckUtils]: 1: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,283 INFO L290 TraceCheckUtils]: 2: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,284 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1171#true} {1171#true} #2751#return; {1171#true} is VALID [2022-02-20 21:49:56,284 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 98 [2022-02-20 21:49:56,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:49:56,292 INFO L290 TraceCheckUtils]: 0: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,293 INFO L290 TraceCheckUtils]: 1: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,293 INFO L290 TraceCheckUtils]: 2: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,293 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1171#true} {1171#true} #2753#return; {1171#true} is VALID [2022-02-20 21:49:56,293 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 104 [2022-02-20 21:49:56,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:49:56,302 INFO L290 TraceCheckUtils]: 0: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,302 INFO L290 TraceCheckUtils]: 1: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,302 INFO L290 TraceCheckUtils]: 2: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,302 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1171#true} {1171#true} #2755#return; {1171#true} is VALID [2022-02-20 21:49:56,303 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 110 [2022-02-20 21:49:56,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:49:56,312 INFO L290 TraceCheckUtils]: 0: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,312 INFO L290 TraceCheckUtils]: 1: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,312 INFO L290 TraceCheckUtils]: 2: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,312 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1171#true} {1171#true} #2757#return; {1171#true} is VALID [2022-02-20 21:49:56,313 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 116 [2022-02-20 21:49:56,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:49:56,322 INFO L290 TraceCheckUtils]: 0: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,322 INFO L290 TraceCheckUtils]: 1: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,322 INFO L290 TraceCheckUtils]: 2: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,322 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1171#true} {1171#true} #2759#return; {1171#true} is VALID [2022-02-20 21:49:56,323 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 122 [2022-02-20 21:49:56,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:49:56,332 INFO L290 TraceCheckUtils]: 0: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,332 INFO L290 TraceCheckUtils]: 1: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,333 INFO L290 TraceCheckUtils]: 2: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,333 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1171#true} {1171#true} #2761#return; {1171#true} is VALID [2022-02-20 21:49:56,333 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 128 [2022-02-20 21:49:56,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:49:56,347 INFO L290 TraceCheckUtils]: 0: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,348 INFO L290 TraceCheckUtils]: 1: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,348 INFO L290 TraceCheckUtils]: 2: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,348 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1171#true} {1171#true} #2763#return; {1171#true} is VALID [2022-02-20 21:49:56,348 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 134 [2022-02-20 21:49:56,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:49:56,357 INFO L290 TraceCheckUtils]: 0: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,358 INFO L290 TraceCheckUtils]: 1: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,358 INFO L290 TraceCheckUtils]: 2: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,358 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1171#true} {1171#true} #2765#return; {1171#true} is VALID [2022-02-20 21:49:56,358 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 140 [2022-02-20 21:49:56,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:49:56,367 INFO L290 TraceCheckUtils]: 0: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,367 INFO L290 TraceCheckUtils]: 1: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,367 INFO L290 TraceCheckUtils]: 2: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,367 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1171#true} {1171#true} #2767#return; {1171#true} is VALID [2022-02-20 21:49:56,373 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 147 [2022-02-20 21:49:56,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:49:56,382 INFO L290 TraceCheckUtils]: 0: Hoare triple {1275#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr867 := 0; {1171#true} is VALID [2022-02-20 21:49:56,382 INFO L290 TraceCheckUtils]: 1: Hoare triple {1171#true} assume !(#t~loopctr867 % 18446744073709551616 < #amount % 18446744073709551616); {1171#true} is VALID [2022-02-20 21:49:56,382 INFO L290 TraceCheckUtils]: 2: Hoare triple {1171#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1171#true} is VALID [2022-02-20 21:49:56,383 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1171#true} {1171#true} #2769#return; {1171#true} is VALID [2022-02-20 21:49:56,385 INFO L290 TraceCheckUtils]: 0: Hoare triple {1171#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(84, 2);call #Ultimate.allocInit(9, 3);call #Ultimate.allocInit(10, 4);call #Ultimate.allocInit(38, 5);call #Ultimate.allocInit(42, 6);call #Ultimate.allocInit(28, 7);call #Ultimate.allocInit(8, 8);call #Ultimate.allocInit(45, 9);call #Ultimate.allocInit(38, 10);call #Ultimate.allocInit(29, 11);call #Ultimate.allocInit(8, 12);call #Ultimate.allocInit(45, 13);call #Ultimate.allocInit(48, 14);call #Ultimate.allocInit(44, 15);call #Ultimate.allocInit(49, 16);call #Ultimate.allocInit(8, 17);call #Ultimate.allocInit(23, 18);call #Ultimate.allocInit(220, 19);call #Ultimate.allocInit(47, 20);call #Ultimate.allocInit(47, 21);call #Ultimate.allocInit(8, 22);call #Ultimate.allocInit(26, 23);call #Ultimate.allocInit(220, 24);call #Ultimate.allocInit(26, 25);call #Ultimate.allocInit(26, 26);call #Ultimate.allocInit(62, 27);call #Ultimate.allocInit(60, 28);call #Ultimate.allocInit(36, 29);call #Ultimate.allocInit(48, 30);call #Ultimate.allocInit(61, 31);call #Ultimate.allocInit(55, 32);call #Ultimate.allocInit(58, 33);call #Ultimate.allocInit(37, 34);call #Ultimate.allocInit(46, 35);call #Ultimate.allocInit(52, 36);call #Ultimate.allocInit(44, 37);call #Ultimate.allocInit(33, 38);call #Ultimate.allocInit(10, 39);call #Ultimate.allocInit(46, 40);call #Ultimate.allocInit(23, 41);call #Ultimate.allocInit(27, 42);call #Ultimate.allocInit(10, 43);call #Ultimate.allocInit(24, 44);call #Ultimate.allocInit(10, 45);call #Ultimate.allocInit(48, 46);call #Ultimate.allocInit(45, 47);call #Ultimate.allocInit(19, 48);call #Ultimate.allocInit(21, 49);call #Ultimate.allocInit(52, 50);call #Ultimate.allocInit(6, 51);call write~init~int(37, 51, 0, 1);call write~init~int(46, 51, 1, 1);call write~init~int(42, 51, 2, 1);call write~init~int(115, 51, 3, 1);call write~init~int(10, 51, 4, 1);call write~init~int(0, 51, 5, 1);call #Ultimate.allocInit(12, 52);call #Ultimate.allocInit(14, 53);call #Ultimate.allocInit(22, 54);call #Ultimate.allocInit(11, 55);call #Ultimate.allocInit(11, 56);call #Ultimate.allocInit(13, 57);call #Ultimate.allocInit(28, 58);call #Ultimate.allocInit(35, 59);call #Ultimate.allocInit(13, 60);call #Ultimate.allocInit(10, 61);call #Ultimate.allocInit(42, 62);call #Ultimate.allocInit(10, 63);call #Ultimate.allocInit(16, 64);call #Ultimate.allocInit(4, 65);call write~init~int(37, 65, 0, 1);call write~init~int(100, 65, 1, 1);call write~init~int(10, 65, 2, 1);call write~init~int(0, 65, 3, 1);call #Ultimate.allocInit(23, 66);call #Ultimate.allocInit(8, 67);call #Ultimate.allocInit(12, 68);call #Ultimate.allocInit(220, 69);call #Ultimate.allocInit(40, 70);call #Ultimate.allocInit(40, 71);call #Ultimate.allocInit(12, 72);call #Ultimate.allocInit(8, 73);call #Ultimate.allocInit(12, 74);call #Ultimate.allocInit(220, 75);call #Ultimate.allocInit(38, 76);call #Ultimate.allocInit(38, 77);call #Ultimate.allocInit(12, 78);call #Ultimate.allocInit(8, 79);call #Ultimate.allocInit(12, 80);call #Ultimate.allocInit(220, 81);call #Ultimate.allocInit(23, 82);call #Ultimate.allocInit(23, 83);call #Ultimate.allocInit(12, 84);call #Ultimate.allocInit(43, 85);call #Ultimate.allocInit(12, 86);call #Ultimate.allocInit(43, 87);call #Ultimate.allocInit(30, 88);call #Ultimate.allocInit(44, 89);call #Ultimate.allocInit(43, 90);call #Ultimate.allocInit(30, 91);call #Ultimate.allocInit(25, 92);call #Ultimate.allocInit(24, 93);call #Ultimate.allocInit(8, 94);call #Ultimate.allocInit(27, 95);call #Ultimate.allocInit(220, 96);call #Ultimate.allocInit(20, 97);call #Ultimate.allocInit(20, 98);call #Ultimate.allocInit(30, 99);call #Ultimate.allocInit(54, 100);call #Ultimate.allocInit(50, 101);call #Ultimate.allocInit(40, 102);call #Ultimate.allocInit(50, 103);call #Ultimate.allocInit(39, 104);call #Ultimate.allocInit(68, 105);call #Ultimate.allocInit(60, 106);call #Ultimate.allocInit(38, 107);call #Ultimate.allocInit(37, 108);call #Ultimate.allocInit(42, 109);call #Ultimate.allocInit(22, 110);call #Ultimate.allocInit(42, 111);call #Ultimate.allocInit(22, 112);call #Ultimate.allocInit(40, 113);call #Ultimate.allocInit(5, 114);call write~init~int(37, 114, 0, 1);call write~init~int(48, 114, 1, 1);call write~init~int(50, 114, 2, 1);call write~init~int(120, 114, 3, 1);call write~init~int(0, 114, 4, 1);call #Ultimate.allocInit(8, 115);call #Ultimate.allocInit(24, 116);call #Ultimate.allocInit(220, 117);call #Ultimate.allocInit(50, 118);call #Ultimate.allocInit(50, 119);call #Ultimate.allocInit(41, 120);call #Ultimate.allocInit(8, 121);call #Ultimate.allocInit(22, 122);call #Ultimate.allocInit(220, 123);call #Ultimate.allocInit(24, 124);call #Ultimate.allocInit(24, 125);call #Ultimate.allocInit(38, 126);call #Ultimate.allocInit(27, 127);call #Ultimate.allocInit(39, 128);call #Ultimate.allocInit(72, 129);call #Ultimate.allocInit(10, 130);call #Ultimate.allocInit(16, 131);call #Ultimate.allocInit(50, 132);call #Ultimate.allocInit(8, 133);call #Ultimate.allocInit(8, 134);~ldv_state_variable_8~0 := 0;~ldv_state_variable_10~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ims_pcu_attr_serial_number_group1~0.base, ~ims_pcu_attr_serial_number_group1~0.offset := 0, 0;~ldv_state_variable_2~0 := 0;~ims_pcu_attr_bl_version_group0~0.base, ~ims_pcu_attr_bl_version_group0~0.offset := 0, 0;~ims_pcu_attr_fw_version_group1~0.base, ~ims_pcu_attr_fw_version_group1~0.offset := 0, 0;~usb_counter~0 := 0;~ldv_state_variable_11~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ims_pcu_attr_reset_reason_group1~0.base, ~ims_pcu_attr_reset_reason_group1~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group0~0.base, ~ims_pcu_attr_date_of_manufacturing_group0~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group0~0.base, ~ims_pcu_attr_reset_reason_group0~0.offset := 0, 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_3~0 := 0;~ims_pcu_attr_date_of_manufacturing_group1~0.base, ~ims_pcu_attr_date_of_manufacturing_group1~0.offset := 0, 0;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := 0, 0;~ref_cnt~0 := 0;~ims_pcu_attr_part_number_group1~0.base, ~ims_pcu_attr_part_number_group1~0.offset := 0, 0;~ims_pcu_attr_fw_version_group0~0.base, ~ims_pcu_attr_fw_version_group0~0.offset := 0, 0;~ldv_state_variable_1~0 := 0;~ims_pcu_attr_part_number_group0~0.base, ~ims_pcu_attr_part_number_group0~0.offset := 0, 0;~ims_pcu_attr_serial_number_group0~0.base, ~ims_pcu_attr_serial_number_group0~0.offset := 0, 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;~ims_pcu_attr_bl_version_group1~0.base, ~ims_pcu_attr_bl_version_group1~0.offset := 0, 0;~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset := 135, 0;call #Ultimate.allocInit(14, 135);call write~init~int(0, ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, 2);call write~init~int(540, ~#ims_pcu_keymap_1~0.base, 2 + ~#ims_pcu_keymap_1~0.offset, 2);call write~init~int(539, ~#ims_pcu_keymap_1~0.base, 4 + ~#ims_pcu_keymap_1~0.offset, 2);call write~init~int(542, ~#ims_pcu_keymap_1~0.base, 6 + ~#ims_pcu_keymap_1~0.offset, 2);call write~init~int(115, ~#ims_pcu_keymap_1~0.base, 8 + ~#ims_pcu_keymap_1~0.offset, 2);call write~init~int(114, ~#ims_pcu_keymap_1~0.base, 10 + ~#ims_pcu_keymap_1~0.offset, 2);call write~init~int(358, ~#ims_pcu_keymap_1~0.base, 12 + ~#ims_pcu_keymap_1~0.offset, 2);~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset := 136, 0;call #Ultimate.allocInit(14, 136);call write~init~int(0, ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_2~0.base, 2 + ~#ims_pcu_keymap_2~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_2~0.base, 4 + ~#ims_pcu_keymap_2~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_2~0.base, 6 + ~#ims_pcu_keymap_2~0.offset, 2);call write~init~int(115, ~#ims_pcu_keymap_2~0.base, 8 + ~#ims_pcu_keymap_2~0.offset, 2);call write~init~int(114, ~#ims_pcu_keymap_2~0.base, 10 + ~#ims_pcu_keymap_2~0.offset, 2);call write~init~int(358, ~#ims_pcu_keymap_2~0.base, 12 + ~#ims_pcu_keymap_2~0.offset, 2);~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset := 137, 0;call #Ultimate.allocInit(38, 137);call write~init~int(0, ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(172, ~#ims_pcu_keymap_3~0.base, 2 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(541, ~#ims_pcu_keymap_3~0.base, 4 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(542, ~#ims_pcu_keymap_3~0.base, 6 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(115, ~#ims_pcu_keymap_3~0.base, 8 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(114, ~#ims_pcu_keymap_3~0.base, 10 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(431, ~#ims_pcu_keymap_3~0.base, 12 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_3~0.base, 14 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_3~0.base, 16 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_3~0.base, 18 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_3~0.base, 20 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_3~0.base, 22 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_3~0.base, 24 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_3~0.base, 26 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_3~0.base, 28 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_3~0.base, 30 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_3~0.base, 32 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_3~0.base, 34 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(164, ~#ims_pcu_keymap_3~0.base, 36 + ~#ims_pcu_keymap_3~0.offset, 2);~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset := 138, 0;call #Ultimate.allocInit(38, 138);call write~init~int(0, ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(540, ~#ims_pcu_keymap_4~0.base, 2 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(539, ~#ims_pcu_keymap_4~0.base, 4 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(542, ~#ims_pcu_keymap_4~0.base, 6 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(115, ~#ims_pcu_keymap_4~0.base, 8 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(114, ~#ims_pcu_keymap_4~0.base, 10 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(358, ~#ims_pcu_keymap_4~0.base, 12 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_4~0.base, 14 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_4~0.base, 16 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_4~0.base, 18 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_4~0.base, 20 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_4~0.base, 22 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_4~0.base, 24 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_4~0.base, 26 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_4~0.base, 28 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_4~0.base, 30 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_4~0.base, 32 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_4~0.base, 34 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(164, ~#ims_pcu_keymap_4~0.base, 36 + ~#ims_pcu_keymap_4~0.offset, 2);~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset := 139, 0;call #Ultimate.allocInit(8, 139);call write~init~int(0, ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, 2);call write~init~int(540, ~#ims_pcu_keymap_5~0.base, 2 + ~#ims_pcu_keymap_5~0.offset, 2);call write~init~int(539, ~#ims_pcu_keymap_5~0.base, 4 + ~#ims_pcu_keymap_5~0.offset, 2);call write~init~int(542, ~#ims_pcu_keymap_5~0.base, 6 + ~#ims_pcu_keymap_5~0.offset, 2);~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset := 140, 0;call #Ultimate.allocInit(102, 140);call write~init~$Pointer$(0, 0, ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset, 8);call write~init~int(0, ~#ims_pcu_device_info~0.base, 8 + ~#ims_pcu_device_info~0.offset, 8);call write~init~int(0, ~#ims_pcu_device_info~0.base, 16 + ~#ims_pcu_device_info~0.offset, 1);call write~init~$Pointer$(~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, ~#ims_pcu_device_info~0.base, 17 + ~#ims_pcu_device_info~0.offset, 8);call write~init~int(7, ~#ims_pcu_device_info~0.base, 25 + ~#ims_pcu_device_info~0.offset, 8);call write~init~int(1, ~#ims_pcu_device_info~0.base, 33 + ~#ims_pcu_device_info~0.offset, 1);call write~init~$Pointer$(~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, ~#ims_pcu_device_info~0.base, 34 + ~#ims_pcu_device_info~0.offset, 8);call write~init~int(7, ~#ims_pcu_device_info~0.base, 42 + ~#ims_pcu_device_info~0.offset, 8);call write~init~int(1, ~#ims_pcu_device_info~0.base, 50 + ~#ims_pcu_device_info~0.offset, 1);call write~init~$Pointer$(~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, ~#ims_pcu_device_info~0.base, 51 + ~#ims_pcu_device_info~0.offset, 8);call write~init~int(19, ~#ims_pcu_device_info~0.base, 59 + ~#ims_pcu_device_info~0.offset, 8);call write~init~int(1, ~#ims_pcu_device_info~0.base, 67 + ~#ims_pcu_device_info~0.offset, 1);call write~init~$Pointer$(~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, ~#ims_pcu_device_info~0.base, 68 + ~#ims_pcu_device_info~0.offset, 8);call write~init~int(19, ~#ims_pcu_device_info~0.base, 76 + ~#ims_pcu_device_info~0.offset, 8);call write~init~int(1, ~#ims_pcu_device_info~0.base, 84 + ~#ims_pcu_device_info~0.offset, 1);call write~init~$Pointer$(~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, ~#ims_pcu_device_info~0.base, 85 + ~#ims_pcu_device_info~0.offset, 8);call write~init~int(4, ~#ims_pcu_device_info~0.base, 93 + ~#ims_pcu_device_info~0.offset, 8);call write~init~int(0, ~#ims_pcu_device_info~0.base, 101 + ~#ims_pcu_device_info~0.offset, 1);~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset := 141, 0;call #Ultimate.allocInit(55, 141);call write~init~$Pointer$(52, 0, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~init~int(420, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~init~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~init~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~init~int(0, ~#ims_pcu_attr_part_number~0.base, 19 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_part_number~0.base, 20 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_part_number~0.base, 21 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_part_number~0.base, 22 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_part_number~0.base, 23 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_part_number~0.base, 24 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_part_number~0.base, 25 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_part_number~0.base, 26 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~init~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~init~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~init~int(21, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~init~int(15, ~#ims_pcu_attr_part_number~0.base, 51 + ~#ims_pcu_attr_part_number~0.offset, 4);~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset := 142, 0;call #Ultimate.allocInit(55, 142);call write~init~$Pointer$(53, 0, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~init~int(420, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~init~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~init~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~init~int(0, ~#ims_pcu_attr_serial_number~0.base, 19 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_serial_number~0.base, 20 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_serial_number~0.base, 21 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_serial_number~0.base, 22 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_serial_number~0.base, 23 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_serial_number~0.base, 24 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_serial_number~0.base, 25 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_serial_number~0.base, 26 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~init~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~init~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~init~int(36, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~init~int(8, ~#ims_pcu_attr_serial_number~0.base, 51 + ~#ims_pcu_attr_serial_number~0.offset, 4);~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset := 143, 0;call #Ultimate.allocInit(55, 143);call write~init~$Pointer$(54, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~init~int(420, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~init~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~init~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~init~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 19 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 20 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 21 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 22 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 23 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 24 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 25 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 26 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~init~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~init~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~init~int(44, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~init~int(8, ~#ims_pcu_attr_date_of_manufacturing~0.base, 51 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset := 144, 0;call #Ultimate.allocInit(55, 144);call write~init~$Pointer$(55, 0, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~init~int(292, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~init~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~init~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~init~int(0, ~#ims_pcu_attr_fw_version~0.base, 19 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_fw_version~0.base, 20 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_fw_version~0.base, 21 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_fw_version~0.base, 22 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_fw_version~0.base, 23 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_fw_version~0.base, 24 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_fw_version~0.base, 25 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_fw_version~0.base, 26 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~init~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~init~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~init~int(52, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~init~int(10, ~#ims_pcu_attr_fw_version~0.base, 51 + ~#ims_pcu_attr_fw_version~0.offset, 4);~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset := 145, 0;call #Ultimate.allocInit(55, 145);call write~init~$Pointer$(56, 0, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~init~int(292, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~init~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~init~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~init~int(0, ~#ims_pcu_attr_bl_version~0.base, 19 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_bl_version~0.base, 20 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_bl_version~0.base, 21 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_bl_version~0.base, 22 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_bl_version~0.base, 23 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_bl_version~0.base, 24 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_bl_version~0.base, 25 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_bl_version~0.base, 26 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~init~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~init~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~init~int(62, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~init~int(10, ~#ims_pcu_attr_bl_version~0.base, 51 + ~#ims_pcu_attr_bl_version~0.offset, 4);~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset := 146, 0;call #Ultimate.allocInit(55, 146);call write~init~$Pointer$(57, 0, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~init~int(292, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~init~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~init~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~init~int(0, ~#ims_pcu_attr_reset_reason~0.base, 19 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_reset_reason~0.base, 20 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_reset_reason~0.base, 21 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_reset_reason~0.base, 22 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_reset_reason~0.base, 23 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_reset_reason~0.base, 24 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_reset_reason~0.base, 25 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_reset_reason~0.base, 26 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~init~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~init~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~init~int(72, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~init~int(3, ~#ims_pcu_attr_reset_reason~0.base, 51 + ~#ims_pcu_attr_reset_reason~0.offset, 4);~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset := 147, 0;call #Ultimate.allocInit(43, 147);call write~init~$Pointer$(60, 0, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~init~int(128, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~init~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~init~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);call write~init~int(0, ~#dev_attr_reset_device~0.base, 19 + ~#dev_attr_reset_device~0.offset, 1);call write~init~int(0, ~#dev_attr_reset_device~0.base, 20 + ~#dev_attr_reset_device~0.offset, 1);call write~init~int(0, ~#dev_attr_reset_device~0.base, 21 + ~#dev_attr_reset_device~0.offset, 1);call write~init~int(0, ~#dev_attr_reset_device~0.base, 22 + ~#dev_attr_reset_device~0.offset, 1);call write~init~int(0, ~#dev_attr_reset_device~0.base, 23 + ~#dev_attr_reset_device~0.offset, 1);call write~init~int(0, ~#dev_attr_reset_device~0.base, 24 + ~#dev_attr_reset_device~0.offset, 1);call write~init~int(0, ~#dev_attr_reset_device~0.base, 25 + ~#dev_attr_reset_device~0.offset, 1);call write~init~int(0, ~#dev_attr_reset_device~0.base, 26 + ~#dev_attr_reset_device~0.offset, 1);call write~init~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~init~$Pointer$(#funAddr~ims_pcu_reset_device.base, #funAddr~ims_pcu_reset_device.offset, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset := 148, 0;call #Ultimate.allocInit(43, 148);call write~init~$Pointer$(64, 0, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~init~int(128, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~init~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~init~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);call write~init~int(0, ~#dev_attr_update_firmware~0.base, 19 + ~#dev_attr_update_firmware~0.offset, 1);call write~init~int(0, ~#dev_attr_update_firmware~0.base, 20 + ~#dev_attr_update_firmware~0.offset, 1);call write~init~int(0, ~#dev_attr_update_firmware~0.base, 21 + ~#dev_attr_update_firmware~0.offset, 1);call write~init~int(0, ~#dev_attr_update_firmware~0.base, 22 + ~#dev_attr_update_firmware~0.offset, 1);call write~init~int(0, ~#dev_attr_update_firmware~0.base, 23 + ~#dev_attr_update_firmware~0.offset, 1);call write~init~int(0, ~#dev_attr_update_firmware~0.base, 24 + ~#dev_attr_update_firmware~0.offset, 1);call write~init~int(0, ~#dev_attr_update_firmware~0.base, 25 + ~#dev_attr_update_firmware~0.offset, 1);call write~init~int(0, ~#dev_attr_update_firmware~0.base, 26 + ~#dev_attr_update_firmware~0.offset, 1);call write~init~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~init~$Pointer$(#funAddr~ims_pcu_update_firmware_store.base, #funAddr~ims_pcu_update_firmware_store.offset, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset := 149, 0;call #Ultimate.allocInit(43, 149);call write~init~$Pointer$(66, 0, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~init~int(292, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~init~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~init~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~init~int(0, ~#dev_attr_update_firmware_status~0.base, 19 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~init~int(0, ~#dev_attr_update_firmware_status~0.base, 20 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~init~int(0, ~#dev_attr_update_firmware_status~0.base, 21 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~init~int(0, ~#dev_attr_update_firmware_status~0.base, 22 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~init~int(0, ~#dev_attr_update_firmware_status~0.base, 23 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~init~int(0, ~#dev_attr_update_firmware_status~0.base, 24 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~init~int(0, ~#dev_attr_update_firmware_status~0.base, 25 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~init~int(0, ~#dev_attr_update_firmware_status~0.base, 26 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~init~$Pointer$(#funAddr~ims_pcu_update_firmware_status_show.base, #funAddr~ims_pcu_update_firmware_status_show.offset, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~init~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset := 150, 0;call #Ultimate.allocInit(80, 150);call write~init~$Pointer$(~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, 8);call write~init~$Pointer$(~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, ~#ims_pcu_attrs~0.base, 8 + ~#ims_pcu_attrs~0.offset, 8);call write~init~$Pointer$(~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, ~#ims_pcu_attrs~0.base, 16 + ~#ims_pcu_attrs~0.offset, 8);call write~init~$Pointer$(~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, ~#ims_pcu_attrs~0.base, 24 + ~#ims_pcu_attrs~0.offset, 8);call write~init~$Pointer$(~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, ~#ims_pcu_attrs~0.base, 32 + ~#ims_pcu_attrs~0.offset, 8);call write~init~$Pointer$(~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, ~#ims_pcu_attrs~0.base, 40 + ~#ims_pcu_attrs~0.offset, 8);call write~init~$Pointer$(~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, ~#ims_pcu_attrs~0.base, 48 + ~#ims_pcu_attrs~0.offset, 8);call write~init~$Pointer$(~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, ~#ims_pcu_attrs~0.base, 56 + ~#ims_pcu_attrs~0.offset, 8);call write~init~$Pointer$(~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, ~#ims_pcu_attrs~0.base, 64 + ~#ims_pcu_attrs~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_attrs~0.base, 72 + ~#ims_pcu_attrs~0.offset, 8);~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset := 151, 0;call #Ultimate.allocInit(32, 151);call write~init~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~init~$Pointer$(#funAddr~ims_pcu_is_attr_visible.base, #funAddr~ims_pcu_is_attr_visible.offset, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~init~$Pointer$(~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset := 152, 0;call #Ultimate.allocInit(75, 152);call write~init~int(899, ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, 2);call write~init~int(1240, ~#ims_pcu_id_table~0.base, 2 + ~#ims_pcu_id_table~0.offset, 2);call write~init~int(130, ~#ims_pcu_id_table~0.base, 4 + ~#ims_pcu_id_table~0.offset, 2);call write~init~int(0, ~#ims_pcu_id_table~0.base, 6 + ~#ims_pcu_id_table~0.offset, 2);call write~init~int(0, ~#ims_pcu_id_table~0.base, 8 + ~#ims_pcu_id_table~0.offset, 2);call write~init~int(0, ~#ims_pcu_id_table~0.base, 10 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(0, ~#ims_pcu_id_table~0.base, 11 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(0, ~#ims_pcu_id_table~0.base, 12 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(2, ~#ims_pcu_id_table~0.base, 13 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(2, ~#ims_pcu_id_table~0.base, 14 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(1, ~#ims_pcu_id_table~0.base, 15 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(0, ~#ims_pcu_id_table~0.base, 16 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(0, ~#ims_pcu_id_table~0.base, 17 + ~#ims_pcu_id_table~0.offset, 8);call write~init~int(899, ~#ims_pcu_id_table~0.base, 25 + ~#ims_pcu_id_table~0.offset, 2);call write~init~int(1240, ~#ims_pcu_id_table~0.base, 27 + ~#ims_pcu_id_table~0.offset, 2);call write~init~int(131, ~#ims_pcu_id_table~0.base, 29 + ~#ims_pcu_id_table~0.offset, 2);call write~init~int(0, ~#ims_pcu_id_table~0.base, 31 + ~#ims_pcu_id_table~0.offset, 2);call write~init~int(0, ~#ims_pcu_id_table~0.base, 33 + ~#ims_pcu_id_table~0.offset, 2);call write~init~int(0, ~#ims_pcu_id_table~0.base, 35 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(0, ~#ims_pcu_id_table~0.base, 36 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(0, ~#ims_pcu_id_table~0.base, 37 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(2, ~#ims_pcu_id_table~0.base, 38 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(2, ~#ims_pcu_id_table~0.base, 39 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(1, ~#ims_pcu_id_table~0.base, 40 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(0, ~#ims_pcu_id_table~0.base, 41 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(1, ~#ims_pcu_id_table~0.base, 42 + ~#ims_pcu_id_table~0.offset, 8);call write~init~int(0, ~#ims_pcu_id_table~0.base, 50 + ~#ims_pcu_id_table~0.offset, 2);call write~init~int(0, ~#ims_pcu_id_table~0.base, 52 + ~#ims_pcu_id_table~0.offset, 2);call write~init~int(0, ~#ims_pcu_id_table~0.base, 54 + ~#ims_pcu_id_table~0.offset, 2);call write~init~int(0, ~#ims_pcu_id_table~0.base, 56 + ~#ims_pcu_id_table~0.offset, 2);call write~init~int(0, ~#ims_pcu_id_table~0.base, 58 + ~#ims_pcu_id_table~0.offset, 2);call write~init~int(0, ~#ims_pcu_id_table~0.base, 60 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(0, ~#ims_pcu_id_table~0.base, 61 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(0, ~#ims_pcu_id_table~0.base, 62 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(0, ~#ims_pcu_id_table~0.base, 63 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(0, ~#ims_pcu_id_table~0.base, 64 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(0, ~#ims_pcu_id_table~0.base, 65 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(0, ~#ims_pcu_id_table~0.base, 66 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(0, ~#ims_pcu_id_table~0.base, 67 + ~#ims_pcu_id_table~0.offset, 8);~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset := 153, 0;call #Ultimate.allocInit(285, 153);call write~init~$Pointer$(133, 0, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~ims_pcu_probe.base, #funAddr~ims_pcu_probe.offset, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~ims_pcu_disconnect.base, #funAddr~ims_pcu_disconnect.offset, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~ims_pcu_suspend.base, #funAddr~ims_pcu_suspend.offset, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~init~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~init~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~init~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 108 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 116 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~init~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~init~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~init~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~init~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~init~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~init~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~init~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~init~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);~ldv_retval_0~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_retval_2~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,386 INFO L290 TraceCheckUtils]: 1: Hoare triple {1171#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet742#1, main_#t~ret743#1.base, main_#t~ret743#1.offset, main_#t~ret744#1.base, main_#t~ret744#1.offset, main_#t~nondet745#1, main_#t~ret746#1.base, main_#t~ret746#1.offset, main_#t~ret747#1.base, main_#t~ret747#1.offset, main_#t~ret748#1.base, main_#t~ret748#1.offset, main_#t~ret749#1.base, main_#t~ret749#1.offset, main_#t~ret750#1.base, main_#t~ret750#1.offset, main_#t~ret751#1.base, main_#t~ret751#1.offset, main_#t~nondet752#1, main_#t~ret753#1.base, main_#t~ret753#1.offset, main_#t~ret754#1.base, main_#t~ret754#1.offset, main_#t~nondet755#1, main_#t~ret756#1.base, main_#t~ret756#1.offset, main_#t~ret757#1.base, main_#t~ret757#1.offset, main_#t~nondet758#1, main_#t~ret759#1.base, main_#t~ret759#1.offset, main_#t~ret760#1.base, main_#t~ret760#1.offset, main_#t~ret761#1.base, main_#t~ret761#1.offset, main_#t~nondet762#1, main_#t~ret763#1.base, main_#t~ret763#1.offset, main_#t~ret764#1.base, main_#t~ret764#1.offset, main_#t~ret765#1.base, main_#t~ret765#1.offset, main_#t~ret766#1.base, main_#t~ret766#1.offset, main_#t~nondet767#1, main_#t~ret768#1.base, main_#t~ret768#1.offset, main_#t~ret769#1.base, main_#t~ret769#1.offset, main_#t~nondet770#1, main_#t~ret771#1.base, main_#t~ret771#1.offset, main_#t~ret772#1.base, main_#t~ret772#1.offset, main_#t~ret773#1.base, main_#t~ret773#1.offset, main_#t~nondet774#1, main_#t~memset~res775#1.base, main_#t~memset~res775#1.offset, main_#t~nondet776#1, main_#t~switch777#1, main_#t~nondet778#1, main_#t~switch779#1, main_#t~ret780#1, main_#t~ret781#1, main_#t~nondet782#1, main_#t~switch783#1, main_#t~ret784#1, main_#t~ret785#1, main_#t~nondet786#1, main_#t~switch787#1, main_#t~ret788#1, main_#t~nondet789#1, main_#t~switch790#1, main_#t~ret791#1, main_#t~ret792#1, main_#t~nondet793#1, main_#t~switch794#1, main_#t~ret795#1, main_#t~ret796#1, main_#t~nondet797#1, main_#t~switch798#1, main_#t~ret799#1, main_#t~nondet800#1, main_#t~switch801#1, main_#t~ret802#1, main_#t~ret803#1, main_#t~nondet804#1, main_#t~switch805#1, main_#t~ret806#1, main_#t~ret807#1, main_#t~mem808#1, main_#t~ret809#1, main_#t~ret810#1, main_#t~nondet811#1, main_#t~switch812#1, main_#t~ret813#1, main_#t~nondet814#1, main_#t~switch815#1, main_#t~ret816#1, main_#t~nondet817#1, main_#t~switch818#1, main_#t~ret819#1, main_#t~ret820#1, main_#t~nondet821#1, main_#t~switch822#1, main_#t~ret823#1, main_~ldvarg1~0#1, main_~tmp~53#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp___0~25#1.base, main_~tmp___0~25#1.offset, main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset, main_~tmp___1~9#1.base, main_~tmp___1~9#1.offset, main_~ldvarg4~0#1, main_~tmp___2~5#1, main_~ldvarg3~0#1.base, main_~ldvarg3~0#1.offset, main_~tmp___3~3#1.base, main_~tmp___3~3#1.offset, main_~ldvarg5~0#1.base, main_~ldvarg5~0#1.offset, main_~tmp___4~1#1.base, main_~tmp___4~1#1.offset, main_~ldvarg8~0#1.base, main_~ldvarg8~0#1.offset, main_~tmp___5~1#1.base, main_~tmp___5~1#1.offset, main_~ldvarg7~0#1.base, main_~ldvarg7~0#1.offset, main_~tmp___6~1#1.base, main_~tmp___6~1#1.offset, main_~ldvarg6~0#1.base, main_~ldvarg6~0#1.offset, main_~tmp___7~1#1.base, main_~tmp___7~1#1.offset, main_~ldvarg11~0#1.base, main_~ldvarg11~0#1.offset, main_~tmp___8~1#1.base, main_~tmp___8~1#1.offset, main_~ldvarg10~0#1, main_~tmp___9~1#1, main_~ldvarg9~0#1.base, main_~ldvarg9~0#1.offset, main_~tmp___10~1#1.base, main_~tmp___10~1#1.offset, main_~ldvarg14~0#1.base, main_~ldvarg14~0#1.offset, main_~tmp___11~1#1.base, main_~tmp___11~1#1.offset, main_~ldvarg13~0#1, main_~tmp___12~1#1, main_~ldvarg12~0#1.base, main_~ldvarg12~0#1.offset, main_~tmp___13~1#1.base, main_~tmp___13~1#1.offset, main_~ldvarg17~0#1.base, main_~ldvarg17~0#1.offset, main_~tmp___14~0#1.base, main_~tmp___14~0#1.offset, main_~ldvarg16~0#1, main_~tmp___15~0#1, main_~ldvarg15~0#1.base, main_~ldvarg15~0#1.offset, main_~tmp___16~0#1.base, main_~tmp___16~0#1.offset, main_~ldvarg18~0#1.base, main_~ldvarg18~0#1.offset, main_~tmp___17~0#1.base, main_~tmp___17~0#1.offset, main_~ldvarg20~0#1.base, main_~ldvarg20~0#1.offset, main_~tmp___18~0#1.base, main_~tmp___18~0#1.offset, main_~ldvarg19~0#1, main_~tmp___19~0#1, main_~#ldvarg21~0#1.base, main_~#ldvarg21~0#1.offset, main_~ldvarg22~0#1.base, main_~ldvarg22~0#1.offset, main_~tmp___20~0#1.base, main_~tmp___20~0#1.offset, main_~ldvarg24~0#1.base, main_~ldvarg24~0#1.offset, main_~tmp___21~0#1.base, main_~tmp___21~0#1.offset, main_~ldvarg26~0#1.base, main_~ldvarg26~0#1.offset, main_~tmp___22~0#1.base, main_~tmp___22~0#1.offset, main_~ldvarg25~0#1.base, main_~ldvarg25~0#1.offset, main_~tmp___23~0#1.base, main_~tmp___23~0#1.offset, main_~ldvarg23~0#1, main_~tmp___24~0#1, main_~ldvarg27~0#1.base, main_~ldvarg27~0#1.offset, main_~tmp___25~0#1.base, main_~tmp___25~0#1.offset, main_~ldvarg29~0#1.base, main_~ldvarg29~0#1.offset, main_~tmp___26~0#1.base, main_~tmp___26~0#1.offset, main_~ldvarg28~0#1, main_~tmp___27~0#1, main_~ldvarg32~0#1.base, main_~ldvarg32~0#1.offset, main_~tmp___28~0#1.base, main_~tmp___28~0#1.offset, main_~ldvarg31~0#1.base, main_~ldvarg31~0#1.offset, main_~tmp___29~0#1.base, main_~tmp___29~0#1.offset, main_~ldvarg33~0#1.base, main_~ldvarg33~0#1.offset, main_~tmp___30~0#1.base, main_~tmp___30~0#1.offset, main_~ldvarg30~0#1, main_~tmp___31~0#1, main_~tmp___32~0#1, main_~tmp___33~0#1, main_~tmp___34~0#1, main_~tmp___35~0#1, main_~tmp___36~0#1, main_~tmp___37~0#1, main_~tmp___38~0#1, main_~tmp___39~0#1, main_~tmp___40~0#1, main_~tmp___41~0#1, main_~tmp___42~0#1, main_~tmp___43~0#1, main_~tmp___44~0#1;havoc main_~ldvarg1~0#1;havoc main_~tmp~53#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp___0~25#1.base, main_~tmp___0~25#1.offset;havoc main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset;havoc main_~tmp___1~9#1.base, main_~tmp___1~9#1.offset;havoc main_~ldvarg4~0#1;havoc main_~tmp___2~5#1;havoc main_~ldvarg3~0#1.base, main_~ldvarg3~0#1.offset;havoc main_~tmp___3~3#1.base, main_~tmp___3~3#1.offset;havoc main_~ldvarg5~0#1.base, main_~ldvarg5~0#1.offset;havoc main_~tmp___4~1#1.base, main_~tmp___4~1#1.offset;havoc main_~ldvarg8~0#1.base, main_~ldvarg8~0#1.offset;havoc main_~tmp___5~1#1.base, main_~tmp___5~1#1.offset;havoc main_~ldvarg7~0#1.base, main_~ldvarg7~0#1.offset;havoc main_~tmp___6~1#1.base, main_~tmp___6~1#1.offset;havoc main_~ldvarg6~0#1.base, main_~ldvarg6~0#1.offset;havoc main_~tmp___7~1#1.base, main_~tmp___7~1#1.offset;havoc main_~ldvarg11~0#1.base, main_~ldvarg11~0#1.offset;havoc main_~tmp___8~1#1.base, main_~tmp___8~1#1.offset;havoc main_~ldvarg10~0#1;havoc main_~tmp___9~1#1;havoc main_~ldvarg9~0#1.base, main_~ldvarg9~0#1.offset;havoc main_~tmp___10~1#1.base, main_~tmp___10~1#1.offset;havoc main_~ldvarg14~0#1.base, main_~ldvarg14~0#1.offset;havoc main_~tmp___11~1#1.base, main_~tmp___11~1#1.offset;havoc main_~ldvarg13~0#1;havoc main_~tmp___12~1#1;havoc main_~ldvarg12~0#1.base, main_~ldvarg12~0#1.offset;havoc main_~tmp___13~1#1.base, main_~tmp___13~1#1.offset;havoc main_~ldvarg17~0#1.base, main_~ldvarg17~0#1.offset;havoc main_~tmp___14~0#1.base, main_~tmp___14~0#1.offset;havoc main_~ldvarg16~0#1;havoc main_~tmp___15~0#1;havoc main_~ldvarg15~0#1.base, main_~ldvarg15~0#1.offset;havoc main_~tmp___16~0#1.base, main_~tmp___16~0#1.offset;havoc main_~ldvarg18~0#1.base, main_~ldvarg18~0#1.offset;havoc main_~tmp___17~0#1.base, main_~tmp___17~0#1.offset;havoc main_~ldvarg20~0#1.base, main_~ldvarg20~0#1.offset;havoc main_~tmp___18~0#1.base, main_~tmp___18~0#1.offset;havoc main_~ldvarg19~0#1;havoc main_~tmp___19~0#1;call main_~#ldvarg21~0#1.base, main_~#ldvarg21~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~ldvarg22~0#1.base, main_~ldvarg22~0#1.offset;havoc main_~tmp___20~0#1.base, main_~tmp___20~0#1.offset;havoc main_~ldvarg24~0#1.base, main_~ldvarg24~0#1.offset;havoc main_~tmp___21~0#1.base, main_~tmp___21~0#1.offset;havoc main_~ldvarg26~0#1.base, main_~ldvarg26~0#1.offset;havoc main_~tmp___22~0#1.base, main_~tmp___22~0#1.offset;havoc main_~ldvarg25~0#1.base, main_~ldvarg25~0#1.offset;havoc main_~tmp___23~0#1.base, main_~tmp___23~0#1.offset;havoc main_~ldvarg23~0#1;havoc main_~tmp___24~0#1;havoc main_~ldvarg27~0#1.base, main_~ldvarg27~0#1.offset;havoc main_~tmp___25~0#1.base, main_~tmp___25~0#1.offset;havoc main_~ldvarg29~0#1.base, main_~ldvarg29~0#1.offset;havoc main_~tmp___26~0#1.base, main_~tmp___26~0#1.offset;havoc main_~ldvarg28~0#1;havoc main_~tmp___27~0#1;havoc main_~ldvarg32~0#1.base, main_~ldvarg32~0#1.offset;havoc main_~tmp___28~0#1.base, main_~tmp___28~0#1.offset;havoc main_~ldvarg31~0#1.base, main_~ldvarg31~0#1.offset;havoc main_~tmp___29~0#1.base, main_~tmp___29~0#1.offset;havoc main_~ldvarg33~0#1.base, main_~ldvarg33~0#1.offset;havoc main_~tmp___30~0#1.base, main_~tmp___30~0#1.offset;havoc main_~ldvarg30~0#1;havoc main_~tmp___31~0#1;havoc main_~tmp___32~0#1;havoc main_~tmp___33~0#1;havoc main_~tmp___34~0#1;havoc main_~tmp___35~0#1;havoc main_~tmp___36~0#1;havoc main_~tmp___37~0#1;havoc main_~tmp___38~0#1;havoc main_~tmp___39~0#1;havoc main_~tmp___40~0#1;havoc main_~tmp___41~0#1;havoc main_~tmp___42~0#1;havoc main_~tmp___43~0#1;havoc main_~tmp___44~0#1;assume -2147483648 <= main_#t~nondet742#1 && main_#t~nondet742#1 <= 2147483647;main_~tmp~53#1 := main_#t~nondet742#1;havoc main_#t~nondet742#1;main_~ldvarg1~0#1 := main_~tmp~53#1; {1171#true} is VALID [2022-02-20 21:49:56,392 INFO L272 TraceCheckUtils]: 2: Hoare triple {1171#true} call main_#t~ret743#1.base, main_#t~ret743#1.offset := ldv_zalloc(1); {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:49:56,392 INFO L290 TraceCheckUtils]: 3: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,392 INFO L290 TraceCheckUtils]: 4: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,392 INFO L290 TraceCheckUtils]: 5: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,393 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {1171#true} {1171#true} #2721#return; {1171#true} is VALID [2022-02-20 21:49:56,393 INFO L290 TraceCheckUtils]: 7: Hoare triple {1171#true} main_~tmp___0~25#1.base, main_~tmp___0~25#1.offset := main_#t~ret743#1.base, main_#t~ret743#1.offset;havoc main_#t~ret743#1.base, main_#t~ret743#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp___0~25#1.base, main_~tmp___0~25#1.offset; {1171#true} is VALID [2022-02-20 21:49:56,393 INFO L272 TraceCheckUtils]: 8: Hoare triple {1171#true} call main_#t~ret744#1.base, main_#t~ret744#1.offset := ldv_zalloc(1); {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:49:56,394 INFO L290 TraceCheckUtils]: 9: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,394 INFO L290 TraceCheckUtils]: 10: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,394 INFO L290 TraceCheckUtils]: 11: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,394 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {1171#true} {1171#true} #2723#return; {1171#true} is VALID [2022-02-20 21:49:56,394 INFO L290 TraceCheckUtils]: 13: Hoare triple {1171#true} main_~tmp___1~9#1.base, main_~tmp___1~9#1.offset := main_#t~ret744#1.base, main_#t~ret744#1.offset;havoc main_#t~ret744#1.base, main_#t~ret744#1.offset;main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset := main_~tmp___1~9#1.base, main_~tmp___1~9#1.offset;assume -2147483648 <= main_#t~nondet745#1 && main_#t~nondet745#1 <= 2147483647;main_~tmp___2~5#1 := main_#t~nondet745#1;havoc main_#t~nondet745#1;main_~ldvarg4~0#1 := main_~tmp___2~5#1; {1171#true} is VALID [2022-02-20 21:49:56,395 INFO L272 TraceCheckUtils]: 14: Hoare triple {1171#true} call main_#t~ret746#1.base, main_#t~ret746#1.offset := ldv_zalloc(1); {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:49:56,395 INFO L290 TraceCheckUtils]: 15: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,395 INFO L290 TraceCheckUtils]: 16: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,395 INFO L290 TraceCheckUtils]: 17: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,396 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {1171#true} {1171#true} #2725#return; {1171#true} is VALID [2022-02-20 21:49:56,396 INFO L290 TraceCheckUtils]: 19: Hoare triple {1171#true} main_~tmp___3~3#1.base, main_~tmp___3~3#1.offset := main_#t~ret746#1.base, main_#t~ret746#1.offset;havoc main_#t~ret746#1.base, main_#t~ret746#1.offset;main_~ldvarg3~0#1.base, main_~ldvarg3~0#1.offset := main_~tmp___3~3#1.base, main_~tmp___3~3#1.offset; {1171#true} is VALID [2022-02-20 21:49:56,396 INFO L272 TraceCheckUtils]: 20: Hoare triple {1171#true} call main_#t~ret747#1.base, main_#t~ret747#1.offset := ldv_zalloc(1); {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:49:56,397 INFO L290 TraceCheckUtils]: 21: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,397 INFO L290 TraceCheckUtils]: 22: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,397 INFO L290 TraceCheckUtils]: 23: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,397 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {1171#true} {1171#true} #2727#return; {1171#true} is VALID [2022-02-20 21:49:56,397 INFO L290 TraceCheckUtils]: 25: Hoare triple {1171#true} main_~tmp___4~1#1.base, main_~tmp___4~1#1.offset := main_#t~ret747#1.base, main_#t~ret747#1.offset;havoc main_#t~ret747#1.base, main_#t~ret747#1.offset;main_~ldvarg5~0#1.base, main_~ldvarg5~0#1.offset := main_~tmp___4~1#1.base, main_~tmp___4~1#1.offset; {1171#true} is VALID [2022-02-20 21:49:56,398 INFO L272 TraceCheckUtils]: 26: Hoare triple {1171#true} call main_#t~ret748#1.base, main_#t~ret748#1.offset := ldv_zalloc(48); {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:49:56,398 INFO L290 TraceCheckUtils]: 27: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,398 INFO L290 TraceCheckUtils]: 28: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,398 INFO L290 TraceCheckUtils]: 29: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,398 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {1171#true} {1171#true} #2729#return; {1171#true} is VALID [2022-02-20 21:49:56,399 INFO L290 TraceCheckUtils]: 31: Hoare triple {1171#true} main_~tmp___5~1#1.base, main_~tmp___5~1#1.offset := main_#t~ret748#1.base, main_#t~ret748#1.offset;havoc main_#t~ret748#1.base, main_#t~ret748#1.offset;main_~ldvarg8~0#1.base, main_~ldvarg8~0#1.offset := main_~tmp___5~1#1.base, main_~tmp___5~1#1.offset; {1171#true} is VALID [2022-02-20 21:49:56,399 INFO L272 TraceCheckUtils]: 32: Hoare triple {1171#true} call main_#t~ret749#1.base, main_#t~ret749#1.offset := ldv_zalloc(1); {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:49:56,399 INFO L290 TraceCheckUtils]: 33: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,400 INFO L290 TraceCheckUtils]: 34: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,400 INFO L290 TraceCheckUtils]: 35: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,400 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {1171#true} {1171#true} #2731#return; {1171#true} is VALID [2022-02-20 21:49:56,400 INFO L290 TraceCheckUtils]: 37: Hoare triple {1171#true} main_~tmp___6~1#1.base, main_~tmp___6~1#1.offset := main_#t~ret749#1.base, main_#t~ret749#1.offset;havoc main_#t~ret749#1.base, main_#t~ret749#1.offset;main_~ldvarg7~0#1.base, main_~ldvarg7~0#1.offset := main_~tmp___6~1#1.base, main_~tmp___6~1#1.offset; {1171#true} is VALID [2022-02-20 21:49:56,401 INFO L272 TraceCheckUtils]: 38: Hoare triple {1171#true} call main_#t~ret750#1.base, main_#t~ret750#1.offset := ldv_zalloc(1376); {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:49:56,401 INFO L290 TraceCheckUtils]: 39: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,401 INFO L290 TraceCheckUtils]: 40: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,401 INFO L290 TraceCheckUtils]: 41: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,401 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {1171#true} {1171#true} #2733#return; {1171#true} is VALID [2022-02-20 21:49:56,401 INFO L290 TraceCheckUtils]: 43: Hoare triple {1171#true} main_~tmp___7~1#1.base, main_~tmp___7~1#1.offset := main_#t~ret750#1.base, main_#t~ret750#1.offset;havoc main_#t~ret750#1.base, main_#t~ret750#1.offset;main_~ldvarg6~0#1.base, main_~ldvarg6~0#1.offset := main_~tmp___7~1#1.base, main_~tmp___7~1#1.offset; {1171#true} is VALID [2022-02-20 21:49:56,402 INFO L272 TraceCheckUtils]: 44: Hoare triple {1171#true} call main_#t~ret751#1.base, main_#t~ret751#1.offset := ldv_zalloc(1); {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:49:56,402 INFO L290 TraceCheckUtils]: 45: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,402 INFO L290 TraceCheckUtils]: 46: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,402 INFO L290 TraceCheckUtils]: 47: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,402 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {1171#true} {1171#true} #2735#return; {1171#true} is VALID [2022-02-20 21:49:56,403 INFO L290 TraceCheckUtils]: 49: Hoare triple {1171#true} main_~tmp___8~1#1.base, main_~tmp___8~1#1.offset := main_#t~ret751#1.base, main_#t~ret751#1.offset;havoc main_#t~ret751#1.base, main_#t~ret751#1.offset;main_~ldvarg11~0#1.base, main_~ldvarg11~0#1.offset := main_~tmp___8~1#1.base, main_~tmp___8~1#1.offset;assume -2147483648 <= main_#t~nondet752#1 && main_#t~nondet752#1 <= 2147483647;main_~tmp___9~1#1 := main_#t~nondet752#1;havoc main_#t~nondet752#1;main_~ldvarg10~0#1 := main_~tmp___9~1#1; {1171#true} is VALID [2022-02-20 21:49:56,403 INFO L272 TraceCheckUtils]: 50: Hoare triple {1171#true} call main_#t~ret753#1.base, main_#t~ret753#1.offset := ldv_zalloc(1); {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:49:56,403 INFO L290 TraceCheckUtils]: 51: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,404 INFO L290 TraceCheckUtils]: 52: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,404 INFO L290 TraceCheckUtils]: 53: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,404 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {1171#true} {1171#true} #2737#return; {1171#true} is VALID [2022-02-20 21:49:56,404 INFO L290 TraceCheckUtils]: 55: Hoare triple {1171#true} main_~tmp___10~1#1.base, main_~tmp___10~1#1.offset := main_#t~ret753#1.base, main_#t~ret753#1.offset;havoc main_#t~ret753#1.base, main_#t~ret753#1.offset;main_~ldvarg9~0#1.base, main_~ldvarg9~0#1.offset := main_~tmp___10~1#1.base, main_~tmp___10~1#1.offset; {1171#true} is VALID [2022-02-20 21:49:56,405 INFO L272 TraceCheckUtils]: 56: Hoare triple {1171#true} call main_#t~ret754#1.base, main_#t~ret754#1.offset := ldv_zalloc(1); {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:49:56,405 INFO L290 TraceCheckUtils]: 57: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,405 INFO L290 TraceCheckUtils]: 58: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,405 INFO L290 TraceCheckUtils]: 59: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,405 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {1171#true} {1171#true} #2739#return; {1171#true} is VALID [2022-02-20 21:49:56,405 INFO L290 TraceCheckUtils]: 61: Hoare triple {1171#true} main_~tmp___11~1#1.base, main_~tmp___11~1#1.offset := main_#t~ret754#1.base, main_#t~ret754#1.offset;havoc main_#t~ret754#1.base, main_#t~ret754#1.offset;main_~ldvarg14~0#1.base, main_~ldvarg14~0#1.offset := main_~tmp___11~1#1.base, main_~tmp___11~1#1.offset;assume -2147483648 <= main_#t~nondet755#1 && main_#t~nondet755#1 <= 2147483647;main_~tmp___12~1#1 := main_#t~nondet755#1;havoc main_#t~nondet755#1;main_~ldvarg13~0#1 := main_~tmp___12~1#1; {1171#true} is VALID [2022-02-20 21:49:56,406 INFO L272 TraceCheckUtils]: 62: Hoare triple {1171#true} call main_#t~ret756#1.base, main_#t~ret756#1.offset := ldv_zalloc(1); {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:49:56,406 INFO L290 TraceCheckUtils]: 63: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,406 INFO L290 TraceCheckUtils]: 64: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,406 INFO L290 TraceCheckUtils]: 65: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,407 INFO L284 TraceCheckUtils]: 66: Hoare quadruple {1171#true} {1171#true} #2741#return; {1171#true} is VALID [2022-02-20 21:49:56,407 INFO L290 TraceCheckUtils]: 67: Hoare triple {1171#true} main_~tmp___13~1#1.base, main_~tmp___13~1#1.offset := main_#t~ret756#1.base, main_#t~ret756#1.offset;havoc main_#t~ret756#1.base, main_#t~ret756#1.offset;main_~ldvarg12~0#1.base, main_~ldvarg12~0#1.offset := main_~tmp___13~1#1.base, main_~tmp___13~1#1.offset; {1171#true} is VALID [2022-02-20 21:49:56,407 INFO L272 TraceCheckUtils]: 68: Hoare triple {1171#true} call main_#t~ret757#1.base, main_#t~ret757#1.offset := ldv_zalloc(32); {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:49:56,407 INFO L290 TraceCheckUtils]: 69: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,408 INFO L290 TraceCheckUtils]: 70: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,408 INFO L290 TraceCheckUtils]: 71: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,408 INFO L284 TraceCheckUtils]: 72: Hoare quadruple {1171#true} {1171#true} #2743#return; {1171#true} is VALID [2022-02-20 21:49:56,408 INFO L290 TraceCheckUtils]: 73: Hoare triple {1171#true} main_~tmp___14~0#1.base, main_~tmp___14~0#1.offset := main_#t~ret757#1.base, main_#t~ret757#1.offset;havoc main_#t~ret757#1.base, main_#t~ret757#1.offset;main_~ldvarg17~0#1.base, main_~ldvarg17~0#1.offset := main_~tmp___14~0#1.base, main_~tmp___14~0#1.offset;assume -2147483648 <= main_#t~nondet758#1 && main_#t~nondet758#1 <= 2147483647;main_~tmp___15~0#1 := main_#t~nondet758#1;havoc main_#t~nondet758#1;main_~ldvarg16~0#1 := main_~tmp___15~0#1; {1171#true} is VALID [2022-02-20 21:49:56,409 INFO L272 TraceCheckUtils]: 74: Hoare triple {1171#true} call main_#t~ret759#1.base, main_#t~ret759#1.offset := ldv_zalloc(296); {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:49:56,409 INFO L290 TraceCheckUtils]: 75: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,409 INFO L290 TraceCheckUtils]: 76: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,409 INFO L290 TraceCheckUtils]: 77: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,409 INFO L284 TraceCheckUtils]: 78: Hoare quadruple {1171#true} {1171#true} #2745#return; {1171#true} is VALID [2022-02-20 21:49:56,409 INFO L290 TraceCheckUtils]: 79: Hoare triple {1171#true} main_~tmp___16~0#1.base, main_~tmp___16~0#1.offset := main_#t~ret759#1.base, main_#t~ret759#1.offset;havoc main_#t~ret759#1.base, main_#t~ret759#1.offset;main_~ldvarg15~0#1.base, main_~ldvarg15~0#1.offset := main_~tmp___16~0#1.base, main_~tmp___16~0#1.offset; {1171#true} is VALID [2022-02-20 21:49:56,410 INFO L272 TraceCheckUtils]: 80: Hoare triple {1171#true} call main_#t~ret760#1.base, main_#t~ret760#1.offset := ldv_zalloc(1); {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:49:56,410 INFO L290 TraceCheckUtils]: 81: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,410 INFO L290 TraceCheckUtils]: 82: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,410 INFO L290 TraceCheckUtils]: 83: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,410 INFO L284 TraceCheckUtils]: 84: Hoare quadruple {1171#true} {1171#true} #2747#return; {1171#true} is VALID [2022-02-20 21:49:56,411 INFO L290 TraceCheckUtils]: 85: Hoare triple {1171#true} main_~tmp___17~0#1.base, main_~tmp___17~0#1.offset := main_#t~ret760#1.base, main_#t~ret760#1.offset;havoc main_#t~ret760#1.base, main_#t~ret760#1.offset;main_~ldvarg18~0#1.base, main_~ldvarg18~0#1.offset := main_~tmp___17~0#1.base, main_~tmp___17~0#1.offset; {1171#true} is VALID [2022-02-20 21:49:56,411 INFO L272 TraceCheckUtils]: 86: Hoare triple {1171#true} call main_#t~ret761#1.base, main_#t~ret761#1.offset := ldv_zalloc(1); {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:49:56,411 INFO L290 TraceCheckUtils]: 87: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,411 INFO L290 TraceCheckUtils]: 88: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,412 INFO L290 TraceCheckUtils]: 89: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,412 INFO L284 TraceCheckUtils]: 90: Hoare quadruple {1171#true} {1171#true} #2749#return; {1171#true} is VALID [2022-02-20 21:49:56,412 INFO L290 TraceCheckUtils]: 91: Hoare triple {1171#true} main_~tmp___18~0#1.base, main_~tmp___18~0#1.offset := main_#t~ret761#1.base, main_#t~ret761#1.offset;havoc main_#t~ret761#1.base, main_#t~ret761#1.offset;main_~ldvarg20~0#1.base, main_~ldvarg20~0#1.offset := main_~tmp___18~0#1.base, main_~tmp___18~0#1.offset;assume -2147483648 <= main_#t~nondet762#1 && main_#t~nondet762#1 <= 2147483647;main_~tmp___19~0#1 := main_#t~nondet762#1;havoc main_#t~nondet762#1;main_~ldvarg19~0#1 := main_~tmp___19~0#1; {1171#true} is VALID [2022-02-20 21:49:56,413 INFO L272 TraceCheckUtils]: 92: Hoare triple {1171#true} call main_#t~ret763#1.base, main_#t~ret763#1.offset := ldv_zalloc(32); {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:49:56,413 INFO L290 TraceCheckUtils]: 93: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,413 INFO L290 TraceCheckUtils]: 94: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,413 INFO L290 TraceCheckUtils]: 95: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,413 INFO L284 TraceCheckUtils]: 96: Hoare quadruple {1171#true} {1171#true} #2751#return; {1171#true} is VALID [2022-02-20 21:49:56,413 INFO L290 TraceCheckUtils]: 97: Hoare triple {1171#true} main_~tmp___20~0#1.base, main_~tmp___20~0#1.offset := main_#t~ret763#1.base, main_#t~ret763#1.offset;havoc main_#t~ret763#1.base, main_#t~ret763#1.offset;main_~ldvarg22~0#1.base, main_~ldvarg22~0#1.offset := main_~tmp___20~0#1.base, main_~tmp___20~0#1.offset; {1171#true} is VALID [2022-02-20 21:49:56,414 INFO L272 TraceCheckUtils]: 98: Hoare triple {1171#true} call main_#t~ret764#1.base, main_#t~ret764#1.offset := ldv_zalloc(1376); {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:49:56,414 INFO L290 TraceCheckUtils]: 99: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,414 INFO L290 TraceCheckUtils]: 100: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,414 INFO L290 TraceCheckUtils]: 101: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,414 INFO L284 TraceCheckUtils]: 102: Hoare quadruple {1171#true} {1171#true} #2753#return; {1171#true} is VALID [2022-02-20 21:49:56,415 INFO L290 TraceCheckUtils]: 103: Hoare triple {1171#true} main_~tmp___21~0#1.base, main_~tmp___21~0#1.offset := main_#t~ret764#1.base, main_#t~ret764#1.offset;havoc main_#t~ret764#1.base, main_#t~ret764#1.offset;main_~ldvarg24~0#1.base, main_~ldvarg24~0#1.offset := main_~tmp___21~0#1.base, main_~tmp___21~0#1.offset; {1171#true} is VALID [2022-02-20 21:49:56,415 INFO L272 TraceCheckUtils]: 104: Hoare triple {1171#true} call main_#t~ret765#1.base, main_#t~ret765#1.offset := ldv_zalloc(48); {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:49:56,415 INFO L290 TraceCheckUtils]: 105: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,416 INFO L290 TraceCheckUtils]: 106: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,416 INFO L290 TraceCheckUtils]: 107: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,416 INFO L284 TraceCheckUtils]: 108: Hoare quadruple {1171#true} {1171#true} #2755#return; {1171#true} is VALID [2022-02-20 21:49:56,416 INFO L290 TraceCheckUtils]: 109: Hoare triple {1171#true} main_~tmp___22~0#1.base, main_~tmp___22~0#1.offset := main_#t~ret765#1.base, main_#t~ret765#1.offset;havoc main_#t~ret765#1.base, main_#t~ret765#1.offset;main_~ldvarg26~0#1.base, main_~ldvarg26~0#1.offset := main_~tmp___22~0#1.base, main_~tmp___22~0#1.offset; {1171#true} is VALID [2022-02-20 21:49:56,416 INFO L272 TraceCheckUtils]: 110: Hoare triple {1171#true} call main_#t~ret766#1.base, main_#t~ret766#1.offset := ldv_zalloc(1); {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:49:56,417 INFO L290 TraceCheckUtils]: 111: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,417 INFO L290 TraceCheckUtils]: 112: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,417 INFO L290 TraceCheckUtils]: 113: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,417 INFO L284 TraceCheckUtils]: 114: Hoare quadruple {1171#true} {1171#true} #2757#return; {1171#true} is VALID [2022-02-20 21:49:56,417 INFO L290 TraceCheckUtils]: 115: Hoare triple {1171#true} main_~tmp___23~0#1.base, main_~tmp___23~0#1.offset := main_#t~ret766#1.base, main_#t~ret766#1.offset;havoc main_#t~ret766#1.base, main_#t~ret766#1.offset;main_~ldvarg25~0#1.base, main_~ldvarg25~0#1.offset := main_~tmp___23~0#1.base, main_~tmp___23~0#1.offset;assume -2147483648 <= main_#t~nondet767#1 && main_#t~nondet767#1 <= 2147483647;main_~tmp___24~0#1 := main_#t~nondet767#1;havoc main_#t~nondet767#1;main_~ldvarg23~0#1 := main_~tmp___24~0#1; {1171#true} is VALID [2022-02-20 21:49:56,418 INFO L272 TraceCheckUtils]: 116: Hoare triple {1171#true} call main_#t~ret768#1.base, main_#t~ret768#1.offset := ldv_zalloc(1); {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:49:56,418 INFO L290 TraceCheckUtils]: 117: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,418 INFO L290 TraceCheckUtils]: 118: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,418 INFO L290 TraceCheckUtils]: 119: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,418 INFO L284 TraceCheckUtils]: 120: Hoare quadruple {1171#true} {1171#true} #2759#return; {1171#true} is VALID [2022-02-20 21:49:56,419 INFO L290 TraceCheckUtils]: 121: Hoare triple {1171#true} main_~tmp___25~0#1.base, main_~tmp___25~0#1.offset := main_#t~ret768#1.base, main_#t~ret768#1.offset;havoc main_#t~ret768#1.base, main_#t~ret768#1.offset;main_~ldvarg27~0#1.base, main_~ldvarg27~0#1.offset := main_~tmp___25~0#1.base, main_~tmp___25~0#1.offset; {1171#true} is VALID [2022-02-20 21:49:56,419 INFO L272 TraceCheckUtils]: 122: Hoare triple {1171#true} call main_#t~ret769#1.base, main_#t~ret769#1.offset := ldv_zalloc(1); {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:49:56,419 INFO L290 TraceCheckUtils]: 123: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,419 INFO L290 TraceCheckUtils]: 124: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,420 INFO L290 TraceCheckUtils]: 125: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,420 INFO L284 TraceCheckUtils]: 126: Hoare quadruple {1171#true} {1171#true} #2761#return; {1171#true} is VALID [2022-02-20 21:49:56,420 INFO L290 TraceCheckUtils]: 127: Hoare triple {1171#true} main_~tmp___26~0#1.base, main_~tmp___26~0#1.offset := main_#t~ret769#1.base, main_#t~ret769#1.offset;havoc main_#t~ret769#1.base, main_#t~ret769#1.offset;main_~ldvarg29~0#1.base, main_~ldvarg29~0#1.offset := main_~tmp___26~0#1.base, main_~tmp___26~0#1.offset;assume -2147483648 <= main_#t~nondet770#1 && main_#t~nondet770#1 <= 2147483647;main_~tmp___27~0#1 := main_#t~nondet770#1;havoc main_#t~nondet770#1;main_~ldvarg28~0#1 := main_~tmp___27~0#1; {1171#true} is VALID [2022-02-20 21:49:56,420 INFO L272 TraceCheckUtils]: 128: Hoare triple {1171#true} call main_#t~ret771#1.base, main_#t~ret771#1.offset := ldv_zalloc(1); {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:49:56,421 INFO L290 TraceCheckUtils]: 129: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,421 INFO L290 TraceCheckUtils]: 130: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,421 INFO L290 TraceCheckUtils]: 131: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,421 INFO L284 TraceCheckUtils]: 132: Hoare quadruple {1171#true} {1171#true} #2763#return; {1171#true} is VALID [2022-02-20 21:49:56,421 INFO L290 TraceCheckUtils]: 133: Hoare triple {1171#true} main_~tmp___28~0#1.base, main_~tmp___28~0#1.offset := main_#t~ret771#1.base, main_#t~ret771#1.offset;havoc main_#t~ret771#1.base, main_#t~ret771#1.offset;main_~ldvarg32~0#1.base, main_~ldvarg32~0#1.offset := main_~tmp___28~0#1.base, main_~tmp___28~0#1.offset; {1171#true} is VALID [2022-02-20 21:49:56,465 INFO L272 TraceCheckUtils]: 134: Hoare triple {1171#true} call main_#t~ret772#1.base, main_#t~ret772#1.offset := ldv_zalloc(1376); {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:49:56,466 INFO L290 TraceCheckUtils]: 135: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,466 INFO L290 TraceCheckUtils]: 136: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,466 INFO L290 TraceCheckUtils]: 137: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,466 INFO L284 TraceCheckUtils]: 138: Hoare quadruple {1171#true} {1171#true} #2765#return; {1171#true} is VALID [2022-02-20 21:49:56,467 INFO L290 TraceCheckUtils]: 139: Hoare triple {1171#true} main_~tmp___29~0#1.base, main_~tmp___29~0#1.offset := main_#t~ret772#1.base, main_#t~ret772#1.offset;havoc main_#t~ret772#1.base, main_#t~ret772#1.offset;main_~ldvarg31~0#1.base, main_~ldvarg31~0#1.offset := main_~tmp___29~0#1.base, main_~tmp___29~0#1.offset; {1171#true} is VALID [2022-02-20 21:49:56,467 INFO L272 TraceCheckUtils]: 140: Hoare triple {1171#true} call main_#t~ret773#1.base, main_#t~ret773#1.offset := ldv_zalloc(48); {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:49:56,468 INFO L290 TraceCheckUtils]: 141: Hoare triple {1274#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {1171#true} is VALID [2022-02-20 21:49:56,468 INFO L290 TraceCheckUtils]: 142: Hoare triple {1171#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {1171#true} is VALID [2022-02-20 21:49:56,468 INFO L290 TraceCheckUtils]: 143: Hoare triple {1171#true} assume true; {1171#true} is VALID [2022-02-20 21:49:56,468 INFO L284 TraceCheckUtils]: 144: Hoare quadruple {1171#true} {1171#true} #2767#return; {1171#true} is VALID [2022-02-20 21:49:56,468 INFO L290 TraceCheckUtils]: 145: Hoare triple {1171#true} main_~tmp___30~0#1.base, main_~tmp___30~0#1.offset := main_#t~ret773#1.base, main_#t~ret773#1.offset;havoc main_#t~ret773#1.base, main_#t~ret773#1.offset;main_~ldvarg33~0#1.base, main_~ldvarg33~0#1.offset := main_~tmp___30~0#1.base, main_~tmp___30~0#1.offset;assume -2147483648 <= main_#t~nondet774#1 && main_#t~nondet774#1 <= 2147483647;main_~tmp___31~0#1 := main_#t~nondet774#1;havoc main_#t~nondet774#1;main_~ldvarg30~0#1 := main_~tmp___31~0#1;assume { :begin_inline_ldv_initialize } true; {1171#true} is VALID [2022-02-20 21:49:56,468 INFO L290 TraceCheckUtils]: 146: Hoare triple {1171#true} assume { :end_inline_ldv_initialize } true; {1171#true} is VALID [2022-02-20 21:49:56,472 INFO L272 TraceCheckUtils]: 147: Hoare triple {1171#true} call main_#t~memset~res775#1.base, main_#t~memset~res775#1.offset := #Ultimate.C_memset(main_~#ldvarg21~0#1.base, main_~#ldvarg21~0#1.offset, 0, 4); {1275#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 21:49:56,472 INFO L290 TraceCheckUtils]: 148: Hoare triple {1275#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr867 := 0; {1171#true} is VALID [2022-02-20 21:49:56,473 INFO L290 TraceCheckUtils]: 149: Hoare triple {1171#true} assume !(#t~loopctr867 % 18446744073709551616 < #amount % 18446744073709551616); {1171#true} is VALID [2022-02-20 21:49:56,473 INFO L290 TraceCheckUtils]: 150: Hoare triple {1171#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1171#true} is VALID [2022-02-20 21:49:56,473 INFO L284 TraceCheckUtils]: 151: Hoare quadruple {1171#true} {1171#true} #2769#return; {1171#true} is VALID [2022-02-20 21:49:56,474 INFO L290 TraceCheckUtils]: 152: Hoare triple {1171#true} havoc main_#t~memset~res775#1.base, main_#t~memset~res775#1.offset;~ldv_state_variable_6~0 := 0;~ldv_state_variable_11~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_8~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_10~0 := 0;~ldv_state_variable_5~0 := 0; {1273#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:49:56,474 INFO L290 TraceCheckUtils]: 153: Hoare triple {1273#(= ~ldv_state_variable_0~0 1)} assume -2147483648 <= main_#t~nondet776#1 && main_#t~nondet776#1 <= 2147483647;main_~tmp___32~0#1 := main_#t~nondet776#1;havoc main_#t~nondet776#1;main_#t~switch777#1 := 0 == main_~tmp___32~0#1; {1273#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:49:56,477 INFO L290 TraceCheckUtils]: 154: Hoare triple {1273#(= ~ldv_state_variable_0~0 1)} assume !main_#t~switch777#1;main_#t~switch777#1 := main_#t~switch777#1 || 1 == main_~tmp___32~0#1; {1273#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:49:56,477 INFO L290 TraceCheckUtils]: 155: Hoare triple {1273#(= ~ldv_state_variable_0~0 1)} assume !main_#t~switch777#1;main_#t~switch777#1 := main_#t~switch777#1 || 2 == main_~tmp___32~0#1; {1273#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:49:56,478 INFO L290 TraceCheckUtils]: 156: Hoare triple {1273#(= ~ldv_state_variable_0~0 1)} assume !main_#t~switch777#1;main_#t~switch777#1 := main_#t~switch777#1 || 3 == main_~tmp___32~0#1; {1273#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:49:56,478 INFO L290 TraceCheckUtils]: 157: Hoare triple {1273#(= ~ldv_state_variable_0~0 1)} assume !main_#t~switch777#1;main_#t~switch777#1 := main_#t~switch777#1 || 4 == main_~tmp___32~0#1; {1273#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:49:56,478 INFO L290 TraceCheckUtils]: 158: Hoare triple {1273#(= ~ldv_state_variable_0~0 1)} assume !main_#t~switch777#1;main_#t~switch777#1 := main_#t~switch777#1 || 5 == main_~tmp___32~0#1; {1273#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:49:56,479 INFO L290 TraceCheckUtils]: 159: Hoare triple {1273#(= ~ldv_state_variable_0~0 1)} assume !main_#t~switch777#1;main_#t~switch777#1 := main_#t~switch777#1 || 6 == main_~tmp___32~0#1; {1273#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:49:56,479 INFO L290 TraceCheckUtils]: 160: Hoare triple {1273#(= ~ldv_state_variable_0~0 1)} assume !main_#t~switch777#1;main_#t~switch777#1 := main_#t~switch777#1 || 7 == main_~tmp___32~0#1; {1273#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:49:56,479 INFO L290 TraceCheckUtils]: 161: Hoare triple {1273#(= ~ldv_state_variable_0~0 1)} assume !main_#t~switch777#1;main_#t~switch777#1 := main_#t~switch777#1 || 8 == main_~tmp___32~0#1; {1273#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:49:56,480 INFO L290 TraceCheckUtils]: 162: Hoare triple {1273#(= ~ldv_state_variable_0~0 1)} assume !main_#t~switch777#1;main_#t~switch777#1 := main_#t~switch777#1 || 9 == main_~tmp___32~0#1; {1273#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:49:56,480 INFO L290 TraceCheckUtils]: 163: Hoare triple {1273#(= ~ldv_state_variable_0~0 1)} assume main_#t~switch777#1; {1273#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:49:56,480 INFO L290 TraceCheckUtils]: 164: Hoare triple {1273#(= ~ldv_state_variable_0~0 1)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet814#1 && main_#t~nondet814#1 <= 2147483647;main_~tmp___42~0#1 := main_#t~nondet814#1;havoc main_#t~nondet814#1;main_#t~switch815#1 := 0 == main_~tmp___42~0#1; {1273#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:49:56,481 INFO L290 TraceCheckUtils]: 165: Hoare triple {1273#(= ~ldv_state_variable_0~0 1)} assume main_#t~switch815#1; {1273#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:49:56,481 INFO L290 TraceCheckUtils]: 166: Hoare triple {1273#(= ~ldv_state_variable_0~0 1)} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0;assume { :begin_inline_ims_pcu_driver_exit } true;assume { :begin_inline_ldv_usb_deregister_25 } true;ldv_usb_deregister_25_#in~arg#1.base, ldv_usb_deregister_25_#in~arg#1.offset := ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset;havoc ldv_usb_deregister_25_~arg#1.base, ldv_usb_deregister_25_~arg#1.offset;ldv_usb_deregister_25_~arg#1.base, ldv_usb_deregister_25_~arg#1.offset := ldv_usb_deregister_25_#in~arg#1.base, ldv_usb_deregister_25_#in~arg#1.offset;assume { :begin_inline_usb_deregister } true;usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset := ldv_usb_deregister_25_~arg#1.base, ldv_usb_deregister_25_~arg#1.offset;havoc usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset;usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset := usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset; {1172#false} is VALID [2022-02-20 21:49:56,482 INFO L290 TraceCheckUtils]: 167: Hoare triple {1172#false} assume { :end_inline_usb_deregister } true;~ldv_state_variable_1~0 := 0; {1172#false} is VALID [2022-02-20 21:49:56,482 INFO L290 TraceCheckUtils]: 168: Hoare triple {1172#false} assume { :end_inline_ldv_usb_deregister_25 } true; {1172#false} is VALID [2022-02-20 21:49:56,482 INFO L290 TraceCheckUtils]: 169: Hoare triple {1172#false} assume { :end_inline_ims_pcu_driver_exit } true;~ldv_state_variable_0~0 := 2; {1172#false} is VALID [2022-02-20 21:49:56,482 INFO L290 TraceCheckUtils]: 170: Hoare triple {1172#false} assume { :begin_inline_ldv_check_final_state } true; {1172#false} is VALID [2022-02-20 21:49:56,482 INFO L290 TraceCheckUtils]: 171: Hoare triple {1172#false} assume !(0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616); {1172#false} is VALID [2022-02-20 21:49:56,482 INFO L272 TraceCheckUtils]: 172: Hoare triple {1172#false} call ldv_error(); {1172#false} is VALID [2022-02-20 21:49:56,483 INFO L290 TraceCheckUtils]: 173: Hoare triple {1172#false} assume !false; {1172#false} is VALID [2022-02-20 21:49:56,484 INFO L134 CoverageAnalysis]: Checked inductivity of 1104 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1104 trivial. 0 not checked. [2022-02-20 21:49:56,484 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:49:56,484 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1164705063] [2022-02-20 21:49:56,485 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1164705063] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:49:56,485 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:49:56,485 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-02-20 21:49:56,486 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1574688530] [2022-02-20 21:49:56,487 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:49:56,491 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 10.8) internal successors, (54), 3 states have internal predecessors, (54), 2 states have call successors, (26), 3 states have call predecessors, (26), 1 states have return successors, (25), 1 states have call predecessors, (25), 1 states have call successors, (25) Word has length 174 [2022-02-20 21:49:56,493 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:49:56,497 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 10.8) internal successors, (54), 3 states have internal predecessors, (54), 2 states have call successors, (26), 3 states have call predecessors, (26), 1 states have return successors, (25), 1 states have call predecessors, (25), 1 states have call successors, (25) [2022-02-20 21:49:56,609 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 105 edges. 105 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:49:56,609 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-02-20 21:49:56,609 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:49:56,625 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-02-20 21:49:56,626 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-02-20 21:49:56,635 INFO L87 Difference]: Start difference. First operand has 1168 states, 813 states have (on average 1.3444034440344403) internal successors, (1093), 846 states have internal predecessors, (1093), 283 states have call successors, (283), 72 states have call predecessors, (283), 70 states have return successors, (268), 267 states have call predecessors, (268), 268 states have call successors, (268) Second operand has 5 states, 5 states have (on average 10.8) internal successors, (54), 3 states have internal predecessors, (54), 2 states have call successors, (26), 3 states have call predecessors, (26), 1 states have return successors, (25), 1 states have call predecessors, (25), 1 states have call successors, (25) [2022-02-20 21:50:10,284 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:50:10,284 INFO L93 Difference]: Finished difference Result 3639 states and 5331 transitions. [2022-02-20 21:50:10,284 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-02-20 21:50:10,285 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 10.8) internal successors, (54), 3 states have internal predecessors, (54), 2 states have call successors, (26), 3 states have call predecessors, (26), 1 states have return successors, (25), 1 states have call predecessors, (25), 1 states have call successors, (25) Word has length 174 [2022-02-20 21:50:10,285 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:50:10,286 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 10.8) internal successors, (54), 3 states have internal predecessors, (54), 2 states have call successors, (26), 3 states have call predecessors, (26), 1 states have return successors, (25), 1 states have call predecessors, (25), 1 states have call successors, (25) [2022-02-20 21:50:10,431 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 5331 transitions. [2022-02-20 21:50:10,431 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 10.8) internal successors, (54), 3 states have internal predecessors, (54), 2 states have call successors, (26), 3 states have call predecessors, (26), 1 states have return successors, (25), 1 states have call predecessors, (25), 1 states have call successors, (25) [2022-02-20 21:50:10,568 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 5331 transitions. [2022-02-20 21:50:10,569 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 7 states and 5331 transitions. [2022-02-20 21:50:14,779 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 5331 edges. 5331 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:50:15,118 INFO L225 Difference]: With dead ends: 3639 [2022-02-20 21:50:15,118 INFO L226 Difference]: Without dead ends: 2436 [2022-02-20 21:50:15,127 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 52 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2022-02-20 21:50:15,129 INFO L933 BasicCegarLoop]: 1764 mSDtfsCounter, 2413 mSDsluCounter, 2731 mSDsCounter, 0 mSdLazyCounter, 1923 mSolverCounterSat, 1435 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 4.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2586 SdHoareTripleChecker+Valid, 4495 SdHoareTripleChecker+Invalid, 3358 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 1435 IncrementalHoareTripleChecker+Valid, 1923 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.3s IncrementalHoareTripleChecker+Time [2022-02-20 21:50:15,129 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [2586 Valid, 4495 Invalid, 3358 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [1435 Valid, 1923 Invalid, 0 Unknown, 0 Unchecked, 4.3s Time] [2022-02-20 21:50:15,144 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2436 states. [2022-02-20 21:50:15,277 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2436 to 2184. [2022-02-20 21:50:15,277 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:50:15,290 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2436 states. Second operand has 2184 states, 1552 states have (on average 1.3324742268041236) internal successors, (2068), 1580 states have internal predecessors, (2068), 493 states have call successors, (493), 139 states have call predecessors, (493), 138 states have return successors, (488), 486 states have call predecessors, (488), 488 states have call successors, (488) [2022-02-20 21:50:15,296 INFO L74 IsIncluded]: Start isIncluded. First operand 2436 states. Second operand has 2184 states, 1552 states have (on average 1.3324742268041236) internal successors, (2068), 1580 states have internal predecessors, (2068), 493 states have call successors, (493), 139 states have call predecessors, (493), 138 states have return successors, (488), 486 states have call predecessors, (488), 488 states have call successors, (488) [2022-02-20 21:50:15,301 INFO L87 Difference]: Start difference. First operand 2436 states. Second operand has 2184 states, 1552 states have (on average 1.3324742268041236) internal successors, (2068), 1580 states have internal predecessors, (2068), 493 states have call successors, (493), 139 states have call predecessors, (493), 138 states have return successors, (488), 486 states have call predecessors, (488), 488 states have call successors, (488) [2022-02-20 21:50:15,486 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:50:15,487 INFO L93 Difference]: Finished difference Result 2436 states and 3535 transitions. [2022-02-20 21:50:15,487 INFO L276 IsEmpty]: Start isEmpty. Operand 2436 states and 3535 transitions. [2022-02-20 21:50:15,501 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:50:15,502 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:50:15,507 INFO L74 IsIncluded]: Start isIncluded. First operand has 2184 states, 1552 states have (on average 1.3324742268041236) internal successors, (2068), 1580 states have internal predecessors, (2068), 493 states have call successors, (493), 139 states have call predecessors, (493), 138 states have return successors, (488), 486 states have call predecessors, (488), 488 states have call successors, (488) Second operand 2436 states. [2022-02-20 21:50:15,512 INFO L87 Difference]: Start difference. First operand has 2184 states, 1552 states have (on average 1.3324742268041236) internal successors, (2068), 1580 states have internal predecessors, (2068), 493 states have call successors, (493), 139 states have call predecessors, (493), 138 states have return successors, (488), 486 states have call predecessors, (488), 488 states have call successors, (488) Second operand 2436 states. [2022-02-20 21:50:15,701 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:50:15,701 INFO L93 Difference]: Finished difference Result 2436 states and 3535 transitions. [2022-02-20 21:50:15,701 INFO L276 IsEmpty]: Start isEmpty. Operand 2436 states and 3535 transitions. [2022-02-20 21:50:15,710 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:50:15,710 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:50:15,710 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:50:15,711 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:50:15,716 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2184 states, 1552 states have (on average 1.3324742268041236) internal successors, (2068), 1580 states have internal predecessors, (2068), 493 states have call successors, (493), 139 states have call predecessors, (493), 138 states have return successors, (488), 486 states have call predecessors, (488), 488 states have call successors, (488) [2022-02-20 21:50:15,942 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2184 states to 2184 states and 3049 transitions. [2022-02-20 21:50:15,944 INFO L78 Accepts]: Start accepts. Automaton has 2184 states and 3049 transitions. Word has length 174 [2022-02-20 21:50:15,945 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:50:15,945 INFO L470 AbstractCegarLoop]: Abstraction has 2184 states and 3049 transitions. [2022-02-20 21:50:15,945 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 10.8) internal successors, (54), 3 states have internal predecessors, (54), 2 states have call successors, (26), 3 states have call predecessors, (26), 1 states have return successors, (25), 1 states have call predecessors, (25), 1 states have call successors, (25) [2022-02-20 21:50:15,945 INFO L276 IsEmpty]: Start isEmpty. Operand 2184 states and 3049 transitions. [2022-02-20 21:50:15,949 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 185 [2022-02-20 21:50:15,949 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:50:15,949 INFO L514 BasicCegarLoop]: trace histogram [25, 25, 25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:50:15,949 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-02-20 21:50:15,950 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:50:15,951 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:50:15,951 INFO L85 PathProgramCache]: Analyzing trace with hash -741605332, now seen corresponding path program 1 times [2022-02-20 21:50:15,951 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:50:15,951 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2026350440] [2022-02-20 21:50:15,951 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:50:15,952 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:50:16,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:16,261 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 21:50:16,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:16,269 INFO L290 TraceCheckUtils]: 0: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,270 INFO L290 TraceCheckUtils]: 1: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,270 INFO L290 TraceCheckUtils]: 2: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,270 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2721#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,271 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-02-20 21:50:16,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:16,278 INFO L290 TraceCheckUtils]: 0: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,278 INFO L290 TraceCheckUtils]: 1: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,278 INFO L290 TraceCheckUtils]: 2: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,279 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2723#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,279 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2022-02-20 21:50:16,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:16,287 INFO L290 TraceCheckUtils]: 0: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,287 INFO L290 TraceCheckUtils]: 1: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,287 INFO L290 TraceCheckUtils]: 2: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,288 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2725#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,288 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 20 [2022-02-20 21:50:16,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:16,295 INFO L290 TraceCheckUtils]: 0: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,296 INFO L290 TraceCheckUtils]: 1: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,296 INFO L290 TraceCheckUtils]: 2: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,296 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2727#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,297 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-02-20 21:50:16,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:16,304 INFO L290 TraceCheckUtils]: 0: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,304 INFO L290 TraceCheckUtils]: 1: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,304 INFO L290 TraceCheckUtils]: 2: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,305 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2729#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,305 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 32 [2022-02-20 21:50:16,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:16,313 INFO L290 TraceCheckUtils]: 0: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,313 INFO L290 TraceCheckUtils]: 1: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,313 INFO L290 TraceCheckUtils]: 2: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,314 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2731#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,314 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 38 [2022-02-20 21:50:16,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:16,322 INFO L290 TraceCheckUtils]: 0: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,322 INFO L290 TraceCheckUtils]: 1: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,322 INFO L290 TraceCheckUtils]: 2: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,323 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2733#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,323 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2022-02-20 21:50:16,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:16,331 INFO L290 TraceCheckUtils]: 0: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,331 INFO L290 TraceCheckUtils]: 1: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,332 INFO L290 TraceCheckUtils]: 2: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,332 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2735#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,332 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 50 [2022-02-20 21:50:16,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:16,340 INFO L290 TraceCheckUtils]: 0: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,340 INFO L290 TraceCheckUtils]: 1: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,340 INFO L290 TraceCheckUtils]: 2: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,341 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2737#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,341 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 56 [2022-02-20 21:50:16,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:16,349 INFO L290 TraceCheckUtils]: 0: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,349 INFO L290 TraceCheckUtils]: 1: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,349 INFO L290 TraceCheckUtils]: 2: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,350 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2739#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,350 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 62 [2022-02-20 21:50:16,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:16,358 INFO L290 TraceCheckUtils]: 0: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,358 INFO L290 TraceCheckUtils]: 1: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,358 INFO L290 TraceCheckUtils]: 2: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,359 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2741#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,359 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 68 [2022-02-20 21:50:16,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:16,366 INFO L290 TraceCheckUtils]: 0: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,367 INFO L290 TraceCheckUtils]: 1: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,367 INFO L290 TraceCheckUtils]: 2: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,368 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2743#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,368 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 74 [2022-02-20 21:50:16,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:16,375 INFO L290 TraceCheckUtils]: 0: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,376 INFO L290 TraceCheckUtils]: 1: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,376 INFO L290 TraceCheckUtils]: 2: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,376 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2745#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,377 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 80 [2022-02-20 21:50:16,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:16,384 INFO L290 TraceCheckUtils]: 0: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,385 INFO L290 TraceCheckUtils]: 1: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,385 INFO L290 TraceCheckUtils]: 2: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,385 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2747#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,386 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 86 [2022-02-20 21:50:16,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:16,393 INFO L290 TraceCheckUtils]: 0: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,393 INFO L290 TraceCheckUtils]: 1: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,393 INFO L290 TraceCheckUtils]: 2: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,394 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2749#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,394 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 92 [2022-02-20 21:50:16,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:16,404 INFO L290 TraceCheckUtils]: 0: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,404 INFO L290 TraceCheckUtils]: 1: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,404 INFO L290 TraceCheckUtils]: 2: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,405 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2751#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,405 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 98 [2022-02-20 21:50:16,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:16,418 INFO L290 TraceCheckUtils]: 0: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,418 INFO L290 TraceCheckUtils]: 1: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,418 INFO L290 TraceCheckUtils]: 2: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,419 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2753#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,419 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 104 [2022-02-20 21:50:16,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:16,428 INFO L290 TraceCheckUtils]: 0: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,428 INFO L290 TraceCheckUtils]: 1: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,428 INFO L290 TraceCheckUtils]: 2: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,429 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2755#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,429 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 110 [2022-02-20 21:50:16,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:16,438 INFO L290 TraceCheckUtils]: 0: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,438 INFO L290 TraceCheckUtils]: 1: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,439 INFO L290 TraceCheckUtils]: 2: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,439 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2757#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,439 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 116 [2022-02-20 21:50:16,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:16,447 INFO L290 TraceCheckUtils]: 0: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,448 INFO L290 TraceCheckUtils]: 1: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,448 INFO L290 TraceCheckUtils]: 2: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,448 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2759#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,449 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 122 [2022-02-20 21:50:16,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:16,461 INFO L290 TraceCheckUtils]: 0: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,462 INFO L290 TraceCheckUtils]: 1: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,462 INFO L290 TraceCheckUtils]: 2: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,462 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2761#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,462 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 128 [2022-02-20 21:50:16,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:16,472 INFO L290 TraceCheckUtils]: 0: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,473 INFO L290 TraceCheckUtils]: 1: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,473 INFO L290 TraceCheckUtils]: 2: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,473 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2763#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,474 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 134 [2022-02-20 21:50:16,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:16,485 INFO L290 TraceCheckUtils]: 0: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,485 INFO L290 TraceCheckUtils]: 1: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,485 INFO L290 TraceCheckUtils]: 2: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,486 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2765#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,486 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 140 [2022-02-20 21:50:16,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:16,495 INFO L290 TraceCheckUtils]: 0: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,495 INFO L290 TraceCheckUtils]: 1: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,495 INFO L290 TraceCheckUtils]: 2: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,496 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2767#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,501 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 147 [2022-02-20 21:50:16,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:16,512 INFO L290 TraceCheckUtils]: 0: Hoare triple {14376#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr867 := 0; {14268#true} is VALID [2022-02-20 21:50:16,516 INFO L290 TraceCheckUtils]: 1: Hoare triple {14268#true} assume !(#t~loopctr867 % 18446744073709551616 < #amount % 18446744073709551616); {14268#true} is VALID [2022-02-20 21:50:16,517 INFO L290 TraceCheckUtils]: 2: Hoare triple {14268#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {14268#true} is VALID [2022-02-20 21:50:16,518 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2769#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,518 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 169 [2022-02-20 21:50:16,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:16,528 INFO L290 TraceCheckUtils]: 0: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,528 INFO L290 TraceCheckUtils]: 1: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,528 INFO L290 TraceCheckUtils]: 2: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,529 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2987#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,543 INFO L290 TraceCheckUtils]: 0: Hoare triple {14268#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(84, 2);call #Ultimate.allocInit(9, 3);call #Ultimate.allocInit(10, 4);call #Ultimate.allocInit(38, 5);call #Ultimate.allocInit(42, 6);call #Ultimate.allocInit(28, 7);call #Ultimate.allocInit(8, 8);call #Ultimate.allocInit(45, 9);call #Ultimate.allocInit(38, 10);call #Ultimate.allocInit(29, 11);call #Ultimate.allocInit(8, 12);call #Ultimate.allocInit(45, 13);call #Ultimate.allocInit(48, 14);call #Ultimate.allocInit(44, 15);call #Ultimate.allocInit(49, 16);call #Ultimate.allocInit(8, 17);call #Ultimate.allocInit(23, 18);call #Ultimate.allocInit(220, 19);call #Ultimate.allocInit(47, 20);call #Ultimate.allocInit(47, 21);call #Ultimate.allocInit(8, 22);call #Ultimate.allocInit(26, 23);call #Ultimate.allocInit(220, 24);call #Ultimate.allocInit(26, 25);call #Ultimate.allocInit(26, 26);call #Ultimate.allocInit(62, 27);call #Ultimate.allocInit(60, 28);call #Ultimate.allocInit(36, 29);call #Ultimate.allocInit(48, 30);call #Ultimate.allocInit(61, 31);call #Ultimate.allocInit(55, 32);call #Ultimate.allocInit(58, 33);call #Ultimate.allocInit(37, 34);call #Ultimate.allocInit(46, 35);call #Ultimate.allocInit(52, 36);call #Ultimate.allocInit(44, 37);call #Ultimate.allocInit(33, 38);call #Ultimate.allocInit(10, 39);call #Ultimate.allocInit(46, 40);call #Ultimate.allocInit(23, 41);call #Ultimate.allocInit(27, 42);call #Ultimate.allocInit(10, 43);call #Ultimate.allocInit(24, 44);call #Ultimate.allocInit(10, 45);call #Ultimate.allocInit(48, 46);call #Ultimate.allocInit(45, 47);call #Ultimate.allocInit(19, 48);call #Ultimate.allocInit(21, 49);call #Ultimate.allocInit(52, 50);call #Ultimate.allocInit(6, 51);call write~init~int(37, 51, 0, 1);call write~init~int(46, 51, 1, 1);call write~init~int(42, 51, 2, 1);call write~init~int(115, 51, 3, 1);call write~init~int(10, 51, 4, 1);call write~init~int(0, 51, 5, 1);call #Ultimate.allocInit(12, 52);call #Ultimate.allocInit(14, 53);call #Ultimate.allocInit(22, 54);call #Ultimate.allocInit(11, 55);call #Ultimate.allocInit(11, 56);call #Ultimate.allocInit(13, 57);call #Ultimate.allocInit(28, 58);call #Ultimate.allocInit(35, 59);call #Ultimate.allocInit(13, 60);call #Ultimate.allocInit(10, 61);call #Ultimate.allocInit(42, 62);call #Ultimate.allocInit(10, 63);call #Ultimate.allocInit(16, 64);call #Ultimate.allocInit(4, 65);call write~init~int(37, 65, 0, 1);call write~init~int(100, 65, 1, 1);call write~init~int(10, 65, 2, 1);call write~init~int(0, 65, 3, 1);call #Ultimate.allocInit(23, 66);call #Ultimate.allocInit(8, 67);call #Ultimate.allocInit(12, 68);call #Ultimate.allocInit(220, 69);call #Ultimate.allocInit(40, 70);call #Ultimate.allocInit(40, 71);call #Ultimate.allocInit(12, 72);call #Ultimate.allocInit(8, 73);call #Ultimate.allocInit(12, 74);call #Ultimate.allocInit(220, 75);call #Ultimate.allocInit(38, 76);call #Ultimate.allocInit(38, 77);call #Ultimate.allocInit(12, 78);call #Ultimate.allocInit(8, 79);call #Ultimate.allocInit(12, 80);call #Ultimate.allocInit(220, 81);call #Ultimate.allocInit(23, 82);call #Ultimate.allocInit(23, 83);call #Ultimate.allocInit(12, 84);call #Ultimate.allocInit(43, 85);call #Ultimate.allocInit(12, 86);call #Ultimate.allocInit(43, 87);call #Ultimate.allocInit(30, 88);call #Ultimate.allocInit(44, 89);call #Ultimate.allocInit(43, 90);call #Ultimate.allocInit(30, 91);call #Ultimate.allocInit(25, 92);call #Ultimate.allocInit(24, 93);call #Ultimate.allocInit(8, 94);call #Ultimate.allocInit(27, 95);call #Ultimate.allocInit(220, 96);call #Ultimate.allocInit(20, 97);call #Ultimate.allocInit(20, 98);call #Ultimate.allocInit(30, 99);call #Ultimate.allocInit(54, 100);call #Ultimate.allocInit(50, 101);call #Ultimate.allocInit(40, 102);call #Ultimate.allocInit(50, 103);call #Ultimate.allocInit(39, 104);call #Ultimate.allocInit(68, 105);call #Ultimate.allocInit(60, 106);call #Ultimate.allocInit(38, 107);call #Ultimate.allocInit(37, 108);call #Ultimate.allocInit(42, 109);call #Ultimate.allocInit(22, 110);call #Ultimate.allocInit(42, 111);call #Ultimate.allocInit(22, 112);call #Ultimate.allocInit(40, 113);call #Ultimate.allocInit(5, 114);call write~init~int(37, 114, 0, 1);call write~init~int(48, 114, 1, 1);call write~init~int(50, 114, 2, 1);call write~init~int(120, 114, 3, 1);call write~init~int(0, 114, 4, 1);call #Ultimate.allocInit(8, 115);call #Ultimate.allocInit(24, 116);call #Ultimate.allocInit(220, 117);call #Ultimate.allocInit(50, 118);call #Ultimate.allocInit(50, 119);call #Ultimate.allocInit(41, 120);call #Ultimate.allocInit(8, 121);call #Ultimate.allocInit(22, 122);call #Ultimate.allocInit(220, 123);call #Ultimate.allocInit(24, 124);call #Ultimate.allocInit(24, 125);call #Ultimate.allocInit(38, 126);call #Ultimate.allocInit(27, 127);call #Ultimate.allocInit(39, 128);call #Ultimate.allocInit(72, 129);call #Ultimate.allocInit(10, 130);call #Ultimate.allocInit(16, 131);call #Ultimate.allocInit(50, 132);call #Ultimate.allocInit(8, 133);call #Ultimate.allocInit(8, 134);~ldv_state_variable_8~0 := 0;~ldv_state_variable_10~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ims_pcu_attr_serial_number_group1~0.base, ~ims_pcu_attr_serial_number_group1~0.offset := 0, 0;~ldv_state_variable_2~0 := 0;~ims_pcu_attr_bl_version_group0~0.base, ~ims_pcu_attr_bl_version_group0~0.offset := 0, 0;~ims_pcu_attr_fw_version_group1~0.base, ~ims_pcu_attr_fw_version_group1~0.offset := 0, 0;~usb_counter~0 := 0;~ldv_state_variable_11~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ims_pcu_attr_reset_reason_group1~0.base, ~ims_pcu_attr_reset_reason_group1~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group0~0.base, ~ims_pcu_attr_date_of_manufacturing_group0~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group0~0.base, ~ims_pcu_attr_reset_reason_group0~0.offset := 0, 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_3~0 := 0;~ims_pcu_attr_date_of_manufacturing_group1~0.base, ~ims_pcu_attr_date_of_manufacturing_group1~0.offset := 0, 0;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := 0, 0;~ref_cnt~0 := 0;~ims_pcu_attr_part_number_group1~0.base, ~ims_pcu_attr_part_number_group1~0.offset := 0, 0;~ims_pcu_attr_fw_version_group0~0.base, ~ims_pcu_attr_fw_version_group0~0.offset := 0, 0;~ldv_state_variable_1~0 := 0;~ims_pcu_attr_part_number_group0~0.base, ~ims_pcu_attr_part_number_group0~0.offset := 0, 0;~ims_pcu_attr_serial_number_group0~0.base, ~ims_pcu_attr_serial_number_group0~0.offset := 0, 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;~ims_pcu_attr_bl_version_group1~0.base, ~ims_pcu_attr_bl_version_group1~0.offset := 0, 0;~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset := 135, 0;call #Ultimate.allocInit(14, 135);call write~init~int(0, ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, 2);call write~init~int(540, ~#ims_pcu_keymap_1~0.base, 2 + ~#ims_pcu_keymap_1~0.offset, 2);call write~init~int(539, ~#ims_pcu_keymap_1~0.base, 4 + ~#ims_pcu_keymap_1~0.offset, 2);call write~init~int(542, ~#ims_pcu_keymap_1~0.base, 6 + ~#ims_pcu_keymap_1~0.offset, 2);call write~init~int(115, ~#ims_pcu_keymap_1~0.base, 8 + ~#ims_pcu_keymap_1~0.offset, 2);call write~init~int(114, ~#ims_pcu_keymap_1~0.base, 10 + ~#ims_pcu_keymap_1~0.offset, 2);call write~init~int(358, ~#ims_pcu_keymap_1~0.base, 12 + ~#ims_pcu_keymap_1~0.offset, 2);~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset := 136, 0;call #Ultimate.allocInit(14, 136);call write~init~int(0, ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_2~0.base, 2 + ~#ims_pcu_keymap_2~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_2~0.base, 4 + ~#ims_pcu_keymap_2~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_2~0.base, 6 + ~#ims_pcu_keymap_2~0.offset, 2);call write~init~int(115, ~#ims_pcu_keymap_2~0.base, 8 + ~#ims_pcu_keymap_2~0.offset, 2);call write~init~int(114, ~#ims_pcu_keymap_2~0.base, 10 + ~#ims_pcu_keymap_2~0.offset, 2);call write~init~int(358, ~#ims_pcu_keymap_2~0.base, 12 + ~#ims_pcu_keymap_2~0.offset, 2);~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset := 137, 0;call #Ultimate.allocInit(38, 137);call write~init~int(0, ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(172, ~#ims_pcu_keymap_3~0.base, 2 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(541, ~#ims_pcu_keymap_3~0.base, 4 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(542, ~#ims_pcu_keymap_3~0.base, 6 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(115, ~#ims_pcu_keymap_3~0.base, 8 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(114, ~#ims_pcu_keymap_3~0.base, 10 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(431, ~#ims_pcu_keymap_3~0.base, 12 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_3~0.base, 14 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_3~0.base, 16 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_3~0.base, 18 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_3~0.base, 20 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_3~0.base, 22 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_3~0.base, 24 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_3~0.base, 26 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_3~0.base, 28 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_3~0.base, 30 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_3~0.base, 32 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_3~0.base, 34 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(164, ~#ims_pcu_keymap_3~0.base, 36 + ~#ims_pcu_keymap_3~0.offset, 2);~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset := 138, 0;call #Ultimate.allocInit(38, 138);call write~init~int(0, ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(540, ~#ims_pcu_keymap_4~0.base, 2 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(539, ~#ims_pcu_keymap_4~0.base, 4 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(542, ~#ims_pcu_keymap_4~0.base, 6 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(115, ~#ims_pcu_keymap_4~0.base, 8 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(114, ~#ims_pcu_keymap_4~0.base, 10 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(358, ~#ims_pcu_keymap_4~0.base, 12 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_4~0.base, 14 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_4~0.base, 16 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_4~0.base, 18 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_4~0.base, 20 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_4~0.base, 22 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_4~0.base, 24 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_4~0.base, 26 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_4~0.base, 28 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_4~0.base, 30 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_4~0.base, 32 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_4~0.base, 34 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(164, ~#ims_pcu_keymap_4~0.base, 36 + ~#ims_pcu_keymap_4~0.offset, 2);~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset := 139, 0;call #Ultimate.allocInit(8, 139);call write~init~int(0, ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, 2);call write~init~int(540, ~#ims_pcu_keymap_5~0.base, 2 + ~#ims_pcu_keymap_5~0.offset, 2);call write~init~int(539, ~#ims_pcu_keymap_5~0.base, 4 + ~#ims_pcu_keymap_5~0.offset, 2);call write~init~int(542, ~#ims_pcu_keymap_5~0.base, 6 + ~#ims_pcu_keymap_5~0.offset, 2);~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset := 140, 0;call #Ultimate.allocInit(102, 140);call write~init~$Pointer$(0, 0, ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset, 8);call write~init~int(0, ~#ims_pcu_device_info~0.base, 8 + ~#ims_pcu_device_info~0.offset, 8);call write~init~int(0, ~#ims_pcu_device_info~0.base, 16 + ~#ims_pcu_device_info~0.offset, 1);call write~init~$Pointer$(~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, ~#ims_pcu_device_info~0.base, 17 + ~#ims_pcu_device_info~0.offset, 8);call write~init~int(7, ~#ims_pcu_device_info~0.base, 25 + ~#ims_pcu_device_info~0.offset, 8);call write~init~int(1, ~#ims_pcu_device_info~0.base, 33 + ~#ims_pcu_device_info~0.offset, 1);call write~init~$Pointer$(~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, ~#ims_pcu_device_info~0.base, 34 + ~#ims_pcu_device_info~0.offset, 8);call write~init~int(7, ~#ims_pcu_device_info~0.base, 42 + ~#ims_pcu_device_info~0.offset, 8);call write~init~int(1, ~#ims_pcu_device_info~0.base, 50 + ~#ims_pcu_device_info~0.offset, 1);call write~init~$Pointer$(~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, ~#ims_pcu_device_info~0.base, 51 + ~#ims_pcu_device_info~0.offset, 8);call write~init~int(19, ~#ims_pcu_device_info~0.base, 59 + ~#ims_pcu_device_info~0.offset, 8);call write~init~int(1, ~#ims_pcu_device_info~0.base, 67 + ~#ims_pcu_device_info~0.offset, 1);call write~init~$Pointer$(~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, ~#ims_pcu_device_info~0.base, 68 + ~#ims_pcu_device_info~0.offset, 8);call write~init~int(19, ~#ims_pcu_device_info~0.base, 76 + ~#ims_pcu_device_info~0.offset, 8);call write~init~int(1, ~#ims_pcu_device_info~0.base, 84 + ~#ims_pcu_device_info~0.offset, 1);call write~init~$Pointer$(~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, ~#ims_pcu_device_info~0.base, 85 + ~#ims_pcu_device_info~0.offset, 8);call write~init~int(4, ~#ims_pcu_device_info~0.base, 93 + ~#ims_pcu_device_info~0.offset, 8);call write~init~int(0, ~#ims_pcu_device_info~0.base, 101 + ~#ims_pcu_device_info~0.offset, 1);~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset := 141, 0;call #Ultimate.allocInit(55, 141);call write~init~$Pointer$(52, 0, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~init~int(420, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~init~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~init~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~init~int(0, ~#ims_pcu_attr_part_number~0.base, 19 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_part_number~0.base, 20 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_part_number~0.base, 21 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_part_number~0.base, 22 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_part_number~0.base, 23 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_part_number~0.base, 24 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_part_number~0.base, 25 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_part_number~0.base, 26 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~init~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~init~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~init~int(21, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~init~int(15, ~#ims_pcu_attr_part_number~0.base, 51 + ~#ims_pcu_attr_part_number~0.offset, 4);~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset := 142, 0;call #Ultimate.allocInit(55, 142);call write~init~$Pointer$(53, 0, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~init~int(420, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~init~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~init~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~init~int(0, ~#ims_pcu_attr_serial_number~0.base, 19 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_serial_number~0.base, 20 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_serial_number~0.base, 21 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_serial_number~0.base, 22 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_serial_number~0.base, 23 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_serial_number~0.base, 24 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_serial_number~0.base, 25 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_serial_number~0.base, 26 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~init~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~init~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~init~int(36, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~init~int(8, ~#ims_pcu_attr_serial_number~0.base, 51 + ~#ims_pcu_attr_serial_number~0.offset, 4);~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset := 143, 0;call #Ultimate.allocInit(55, 143);call write~init~$Pointer$(54, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~init~int(420, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~init~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~init~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~init~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 19 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 20 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 21 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 22 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 23 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 24 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 25 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 26 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~init~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~init~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~init~int(44, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~init~int(8, ~#ims_pcu_attr_date_of_manufacturing~0.base, 51 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset := 144, 0;call #Ultimate.allocInit(55, 144);call write~init~$Pointer$(55, 0, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~init~int(292, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~init~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~init~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~init~int(0, ~#ims_pcu_attr_fw_version~0.base, 19 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_fw_version~0.base, 20 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_fw_version~0.base, 21 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_fw_version~0.base, 22 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_fw_version~0.base, 23 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_fw_version~0.base, 24 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_fw_version~0.base, 25 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_fw_version~0.base, 26 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~init~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~init~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~init~int(52, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~init~int(10, ~#ims_pcu_attr_fw_version~0.base, 51 + ~#ims_pcu_attr_fw_version~0.offset, 4);~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset := 145, 0;call #Ultimate.allocInit(55, 145);call write~init~$Pointer$(56, 0, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~init~int(292, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~init~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~init~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~init~int(0, ~#ims_pcu_attr_bl_version~0.base, 19 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_bl_version~0.base, 20 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_bl_version~0.base, 21 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_bl_version~0.base, 22 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_bl_version~0.base, 23 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_bl_version~0.base, 24 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_bl_version~0.base, 25 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_bl_version~0.base, 26 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~init~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~init~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~init~int(62, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~init~int(10, ~#ims_pcu_attr_bl_version~0.base, 51 + ~#ims_pcu_attr_bl_version~0.offset, 4);~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset := 146, 0;call #Ultimate.allocInit(55, 146);call write~init~$Pointer$(57, 0, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~init~int(292, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~init~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~init~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~init~int(0, ~#ims_pcu_attr_reset_reason~0.base, 19 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_reset_reason~0.base, 20 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_reset_reason~0.base, 21 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_reset_reason~0.base, 22 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_reset_reason~0.base, 23 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_reset_reason~0.base, 24 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_reset_reason~0.base, 25 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_reset_reason~0.base, 26 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~init~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~init~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~init~int(72, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~init~int(3, ~#ims_pcu_attr_reset_reason~0.base, 51 + ~#ims_pcu_attr_reset_reason~0.offset, 4);~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset := 147, 0;call #Ultimate.allocInit(43, 147);call write~init~$Pointer$(60, 0, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~init~int(128, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~init~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~init~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);call write~init~int(0, ~#dev_attr_reset_device~0.base, 19 + ~#dev_attr_reset_device~0.offset, 1);call write~init~int(0, ~#dev_attr_reset_device~0.base, 20 + ~#dev_attr_reset_device~0.offset, 1);call write~init~int(0, ~#dev_attr_reset_device~0.base, 21 + ~#dev_attr_reset_device~0.offset, 1);call write~init~int(0, ~#dev_attr_reset_device~0.base, 22 + ~#dev_attr_reset_device~0.offset, 1);call write~init~int(0, ~#dev_attr_reset_device~0.base, 23 + ~#dev_attr_reset_device~0.offset, 1);call write~init~int(0, ~#dev_attr_reset_device~0.base, 24 + ~#dev_attr_reset_device~0.offset, 1);call write~init~int(0, ~#dev_attr_reset_device~0.base, 25 + ~#dev_attr_reset_device~0.offset, 1);call write~init~int(0, ~#dev_attr_reset_device~0.base, 26 + ~#dev_attr_reset_device~0.offset, 1);call write~init~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~init~$Pointer$(#funAddr~ims_pcu_reset_device.base, #funAddr~ims_pcu_reset_device.offset, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset := 148, 0;call #Ultimate.allocInit(43, 148);call write~init~$Pointer$(64, 0, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~init~int(128, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~init~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~init~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);call write~init~int(0, ~#dev_attr_update_firmware~0.base, 19 + ~#dev_attr_update_firmware~0.offset, 1);call write~init~int(0, ~#dev_attr_update_firmware~0.base, 20 + ~#dev_attr_update_firmware~0.offset, 1);call write~init~int(0, ~#dev_attr_update_firmware~0.base, 21 + ~#dev_attr_update_firmware~0.offset, 1);call write~init~int(0, ~#dev_attr_update_firmware~0.base, 22 + ~#dev_attr_update_firmware~0.offset, 1);call write~init~int(0, ~#dev_attr_update_firmware~0.base, 23 + ~#dev_attr_update_firmware~0.offset, 1);call write~init~int(0, ~#dev_attr_update_firmware~0.base, 24 + ~#dev_attr_update_firmware~0.offset, 1);call write~init~int(0, ~#dev_attr_update_firmware~0.base, 25 + ~#dev_attr_update_firmware~0.offset, 1);call write~init~int(0, ~#dev_attr_update_firmware~0.base, 26 + ~#dev_attr_update_firmware~0.offset, 1);call write~init~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~init~$Pointer$(#funAddr~ims_pcu_update_firmware_store.base, #funAddr~ims_pcu_update_firmware_store.offset, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset := 149, 0;call #Ultimate.allocInit(43, 149);call write~init~$Pointer$(66, 0, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~init~int(292, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~init~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~init~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~init~int(0, ~#dev_attr_update_firmware_status~0.base, 19 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~init~int(0, ~#dev_attr_update_firmware_status~0.base, 20 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~init~int(0, ~#dev_attr_update_firmware_status~0.base, 21 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~init~int(0, ~#dev_attr_update_firmware_status~0.base, 22 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~init~int(0, ~#dev_attr_update_firmware_status~0.base, 23 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~init~int(0, ~#dev_attr_update_firmware_status~0.base, 24 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~init~int(0, ~#dev_attr_update_firmware_status~0.base, 25 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~init~int(0, ~#dev_attr_update_firmware_status~0.base, 26 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~init~$Pointer$(#funAddr~ims_pcu_update_firmware_status_show.base, #funAddr~ims_pcu_update_firmware_status_show.offset, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~init~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset := 150, 0;call #Ultimate.allocInit(80, 150);call write~init~$Pointer$(~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, 8);call write~init~$Pointer$(~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, ~#ims_pcu_attrs~0.base, 8 + ~#ims_pcu_attrs~0.offset, 8);call write~init~$Pointer$(~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, ~#ims_pcu_attrs~0.base, 16 + ~#ims_pcu_attrs~0.offset, 8);call write~init~$Pointer$(~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, ~#ims_pcu_attrs~0.base, 24 + ~#ims_pcu_attrs~0.offset, 8);call write~init~$Pointer$(~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, ~#ims_pcu_attrs~0.base, 32 + ~#ims_pcu_attrs~0.offset, 8);call write~init~$Pointer$(~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, ~#ims_pcu_attrs~0.base, 40 + ~#ims_pcu_attrs~0.offset, 8);call write~init~$Pointer$(~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, ~#ims_pcu_attrs~0.base, 48 + ~#ims_pcu_attrs~0.offset, 8);call write~init~$Pointer$(~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, ~#ims_pcu_attrs~0.base, 56 + ~#ims_pcu_attrs~0.offset, 8);call write~init~$Pointer$(~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, ~#ims_pcu_attrs~0.base, 64 + ~#ims_pcu_attrs~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_attrs~0.base, 72 + ~#ims_pcu_attrs~0.offset, 8);~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset := 151, 0;call #Ultimate.allocInit(32, 151);call write~init~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~init~$Pointer$(#funAddr~ims_pcu_is_attr_visible.base, #funAddr~ims_pcu_is_attr_visible.offset, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~init~$Pointer$(~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset := 152, 0;call #Ultimate.allocInit(75, 152);call write~init~int(899, ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, 2);call write~init~int(1240, ~#ims_pcu_id_table~0.base, 2 + ~#ims_pcu_id_table~0.offset, 2);call write~init~int(130, ~#ims_pcu_id_table~0.base, 4 + ~#ims_pcu_id_table~0.offset, 2);call write~init~int(0, ~#ims_pcu_id_table~0.base, 6 + ~#ims_pcu_id_table~0.offset, 2);call write~init~int(0, ~#ims_pcu_id_table~0.base, 8 + ~#ims_pcu_id_table~0.offset, 2);call write~init~int(0, ~#ims_pcu_id_table~0.base, 10 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(0, ~#ims_pcu_id_table~0.base, 11 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(0, ~#ims_pcu_id_table~0.base, 12 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(2, ~#ims_pcu_id_table~0.base, 13 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(2, ~#ims_pcu_id_table~0.base, 14 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(1, ~#ims_pcu_id_table~0.base, 15 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(0, ~#ims_pcu_id_table~0.base, 16 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(0, ~#ims_pcu_id_table~0.base, 17 + ~#ims_pcu_id_table~0.offset, 8);call write~init~int(899, ~#ims_pcu_id_table~0.base, 25 + ~#ims_pcu_id_table~0.offset, 2);call write~init~int(1240, ~#ims_pcu_id_table~0.base, 27 + ~#ims_pcu_id_table~0.offset, 2);call write~init~int(131, ~#ims_pcu_id_table~0.base, 29 + ~#ims_pcu_id_table~0.offset, 2);call write~init~int(0, ~#ims_pcu_id_table~0.base, 31 + ~#ims_pcu_id_table~0.offset, 2);call write~init~int(0, ~#ims_pcu_id_table~0.base, 33 + ~#ims_pcu_id_table~0.offset, 2);call write~init~int(0, ~#ims_pcu_id_table~0.base, 35 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(0, ~#ims_pcu_id_table~0.base, 36 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(0, ~#ims_pcu_id_table~0.base, 37 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(2, ~#ims_pcu_id_table~0.base, 38 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(2, ~#ims_pcu_id_table~0.base, 39 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(1, ~#ims_pcu_id_table~0.base, 40 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(0, ~#ims_pcu_id_table~0.base, 41 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(1, ~#ims_pcu_id_table~0.base, 42 + ~#ims_pcu_id_table~0.offset, 8);call write~init~int(0, ~#ims_pcu_id_table~0.base, 50 + ~#ims_pcu_id_table~0.offset, 2);call write~init~int(0, ~#ims_pcu_id_table~0.base, 52 + ~#ims_pcu_id_table~0.offset, 2);call write~init~int(0, ~#ims_pcu_id_table~0.base, 54 + ~#ims_pcu_id_table~0.offset, 2);call write~init~int(0, ~#ims_pcu_id_table~0.base, 56 + ~#ims_pcu_id_table~0.offset, 2);call write~init~int(0, ~#ims_pcu_id_table~0.base, 58 + ~#ims_pcu_id_table~0.offset, 2);call write~init~int(0, ~#ims_pcu_id_table~0.base, 60 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(0, ~#ims_pcu_id_table~0.base, 61 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(0, ~#ims_pcu_id_table~0.base, 62 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(0, ~#ims_pcu_id_table~0.base, 63 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(0, ~#ims_pcu_id_table~0.base, 64 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(0, ~#ims_pcu_id_table~0.base, 65 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(0, ~#ims_pcu_id_table~0.base, 66 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(0, ~#ims_pcu_id_table~0.base, 67 + ~#ims_pcu_id_table~0.offset, 8);~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset := 153, 0;call #Ultimate.allocInit(285, 153);call write~init~$Pointer$(133, 0, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~ims_pcu_probe.base, #funAddr~ims_pcu_probe.offset, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~ims_pcu_disconnect.base, #funAddr~ims_pcu_disconnect.offset, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~ims_pcu_suspend.base, #funAddr~ims_pcu_suspend.offset, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~init~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~init~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~init~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 108 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 116 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~init~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~init~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~init~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~init~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~init~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~init~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~init~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~init~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);~ldv_retval_0~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_retval_2~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,544 INFO L290 TraceCheckUtils]: 1: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet742#1, main_#t~ret743#1.base, main_#t~ret743#1.offset, main_#t~ret744#1.base, main_#t~ret744#1.offset, main_#t~nondet745#1, main_#t~ret746#1.base, main_#t~ret746#1.offset, main_#t~ret747#1.base, main_#t~ret747#1.offset, main_#t~ret748#1.base, main_#t~ret748#1.offset, main_#t~ret749#1.base, main_#t~ret749#1.offset, main_#t~ret750#1.base, main_#t~ret750#1.offset, main_#t~ret751#1.base, main_#t~ret751#1.offset, main_#t~nondet752#1, main_#t~ret753#1.base, main_#t~ret753#1.offset, main_#t~ret754#1.base, main_#t~ret754#1.offset, main_#t~nondet755#1, main_#t~ret756#1.base, main_#t~ret756#1.offset, main_#t~ret757#1.base, main_#t~ret757#1.offset, main_#t~nondet758#1, main_#t~ret759#1.base, main_#t~ret759#1.offset, main_#t~ret760#1.base, main_#t~ret760#1.offset, main_#t~ret761#1.base, main_#t~ret761#1.offset, main_#t~nondet762#1, main_#t~ret763#1.base, main_#t~ret763#1.offset, main_#t~ret764#1.base, main_#t~ret764#1.offset, main_#t~ret765#1.base, main_#t~ret765#1.offset, main_#t~ret766#1.base, main_#t~ret766#1.offset, main_#t~nondet767#1, main_#t~ret768#1.base, main_#t~ret768#1.offset, main_#t~ret769#1.base, main_#t~ret769#1.offset, main_#t~nondet770#1, main_#t~ret771#1.base, main_#t~ret771#1.offset, main_#t~ret772#1.base, main_#t~ret772#1.offset, main_#t~ret773#1.base, main_#t~ret773#1.offset, main_#t~nondet774#1, main_#t~memset~res775#1.base, main_#t~memset~res775#1.offset, main_#t~nondet776#1, main_#t~switch777#1, main_#t~nondet778#1, main_#t~switch779#1, main_#t~ret780#1, main_#t~ret781#1, main_#t~nondet782#1, main_#t~switch783#1, main_#t~ret784#1, main_#t~ret785#1, main_#t~nondet786#1, main_#t~switch787#1, main_#t~ret788#1, main_#t~nondet789#1, main_#t~switch790#1, main_#t~ret791#1, main_#t~ret792#1, main_#t~nondet793#1, main_#t~switch794#1, main_#t~ret795#1, main_#t~ret796#1, main_#t~nondet797#1, main_#t~switch798#1, main_#t~ret799#1, main_#t~nondet800#1, main_#t~switch801#1, main_#t~ret802#1, main_#t~ret803#1, main_#t~nondet804#1, main_#t~switch805#1, main_#t~ret806#1, main_#t~ret807#1, main_#t~mem808#1, main_#t~ret809#1, main_#t~ret810#1, main_#t~nondet811#1, main_#t~switch812#1, main_#t~ret813#1, main_#t~nondet814#1, main_#t~switch815#1, main_#t~ret816#1, main_#t~nondet817#1, main_#t~switch818#1, main_#t~ret819#1, main_#t~ret820#1, main_#t~nondet821#1, main_#t~switch822#1, main_#t~ret823#1, main_~ldvarg1~0#1, main_~tmp~53#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp___0~25#1.base, main_~tmp___0~25#1.offset, main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset, main_~tmp___1~9#1.base, main_~tmp___1~9#1.offset, main_~ldvarg4~0#1, main_~tmp___2~5#1, main_~ldvarg3~0#1.base, main_~ldvarg3~0#1.offset, main_~tmp___3~3#1.base, main_~tmp___3~3#1.offset, main_~ldvarg5~0#1.base, main_~ldvarg5~0#1.offset, main_~tmp___4~1#1.base, main_~tmp___4~1#1.offset, main_~ldvarg8~0#1.base, main_~ldvarg8~0#1.offset, main_~tmp___5~1#1.base, main_~tmp___5~1#1.offset, main_~ldvarg7~0#1.base, main_~ldvarg7~0#1.offset, main_~tmp___6~1#1.base, main_~tmp___6~1#1.offset, main_~ldvarg6~0#1.base, main_~ldvarg6~0#1.offset, main_~tmp___7~1#1.base, main_~tmp___7~1#1.offset, main_~ldvarg11~0#1.base, main_~ldvarg11~0#1.offset, main_~tmp___8~1#1.base, main_~tmp___8~1#1.offset, main_~ldvarg10~0#1, main_~tmp___9~1#1, main_~ldvarg9~0#1.base, main_~ldvarg9~0#1.offset, main_~tmp___10~1#1.base, main_~tmp___10~1#1.offset, main_~ldvarg14~0#1.base, main_~ldvarg14~0#1.offset, main_~tmp___11~1#1.base, main_~tmp___11~1#1.offset, main_~ldvarg13~0#1, main_~tmp___12~1#1, main_~ldvarg12~0#1.base, main_~ldvarg12~0#1.offset, main_~tmp___13~1#1.base, main_~tmp___13~1#1.offset, main_~ldvarg17~0#1.base, main_~ldvarg17~0#1.offset, main_~tmp___14~0#1.base, main_~tmp___14~0#1.offset, main_~ldvarg16~0#1, main_~tmp___15~0#1, main_~ldvarg15~0#1.base, main_~ldvarg15~0#1.offset, main_~tmp___16~0#1.base, main_~tmp___16~0#1.offset, main_~ldvarg18~0#1.base, main_~ldvarg18~0#1.offset, main_~tmp___17~0#1.base, main_~tmp___17~0#1.offset, main_~ldvarg20~0#1.base, main_~ldvarg20~0#1.offset, main_~tmp___18~0#1.base, main_~tmp___18~0#1.offset, main_~ldvarg19~0#1, main_~tmp___19~0#1, main_~#ldvarg21~0#1.base, main_~#ldvarg21~0#1.offset, main_~ldvarg22~0#1.base, main_~ldvarg22~0#1.offset, main_~tmp___20~0#1.base, main_~tmp___20~0#1.offset, main_~ldvarg24~0#1.base, main_~ldvarg24~0#1.offset, main_~tmp___21~0#1.base, main_~tmp___21~0#1.offset, main_~ldvarg26~0#1.base, main_~ldvarg26~0#1.offset, main_~tmp___22~0#1.base, main_~tmp___22~0#1.offset, main_~ldvarg25~0#1.base, main_~ldvarg25~0#1.offset, main_~tmp___23~0#1.base, main_~tmp___23~0#1.offset, main_~ldvarg23~0#1, main_~tmp___24~0#1, main_~ldvarg27~0#1.base, main_~ldvarg27~0#1.offset, main_~tmp___25~0#1.base, main_~tmp___25~0#1.offset, main_~ldvarg29~0#1.base, main_~ldvarg29~0#1.offset, main_~tmp___26~0#1.base, main_~tmp___26~0#1.offset, main_~ldvarg28~0#1, main_~tmp___27~0#1, main_~ldvarg32~0#1.base, main_~ldvarg32~0#1.offset, main_~tmp___28~0#1.base, main_~tmp___28~0#1.offset, main_~ldvarg31~0#1.base, main_~ldvarg31~0#1.offset, main_~tmp___29~0#1.base, main_~tmp___29~0#1.offset, main_~ldvarg33~0#1.base, main_~ldvarg33~0#1.offset, main_~tmp___30~0#1.base, main_~tmp___30~0#1.offset, main_~ldvarg30~0#1, main_~tmp___31~0#1, main_~tmp___32~0#1, main_~tmp___33~0#1, main_~tmp___34~0#1, main_~tmp___35~0#1, main_~tmp___36~0#1, main_~tmp___37~0#1, main_~tmp___38~0#1, main_~tmp___39~0#1, main_~tmp___40~0#1, main_~tmp___41~0#1, main_~tmp___42~0#1, main_~tmp___43~0#1, main_~tmp___44~0#1;havoc main_~ldvarg1~0#1;havoc main_~tmp~53#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp___0~25#1.base, main_~tmp___0~25#1.offset;havoc main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset;havoc main_~tmp___1~9#1.base, main_~tmp___1~9#1.offset;havoc main_~ldvarg4~0#1;havoc main_~tmp___2~5#1;havoc main_~ldvarg3~0#1.base, main_~ldvarg3~0#1.offset;havoc main_~tmp___3~3#1.base, main_~tmp___3~3#1.offset;havoc main_~ldvarg5~0#1.base, main_~ldvarg5~0#1.offset;havoc main_~tmp___4~1#1.base, main_~tmp___4~1#1.offset;havoc main_~ldvarg8~0#1.base, main_~ldvarg8~0#1.offset;havoc main_~tmp___5~1#1.base, main_~tmp___5~1#1.offset;havoc main_~ldvarg7~0#1.base, main_~ldvarg7~0#1.offset;havoc main_~tmp___6~1#1.base, main_~tmp___6~1#1.offset;havoc main_~ldvarg6~0#1.base, main_~ldvarg6~0#1.offset;havoc main_~tmp___7~1#1.base, main_~tmp___7~1#1.offset;havoc main_~ldvarg11~0#1.base, main_~ldvarg11~0#1.offset;havoc main_~tmp___8~1#1.base, main_~tmp___8~1#1.offset;havoc main_~ldvarg10~0#1;havoc main_~tmp___9~1#1;havoc main_~ldvarg9~0#1.base, main_~ldvarg9~0#1.offset;havoc main_~tmp___10~1#1.base, main_~tmp___10~1#1.offset;havoc main_~ldvarg14~0#1.base, main_~ldvarg14~0#1.offset;havoc main_~tmp___11~1#1.base, main_~tmp___11~1#1.offset;havoc main_~ldvarg13~0#1;havoc main_~tmp___12~1#1;havoc main_~ldvarg12~0#1.base, main_~ldvarg12~0#1.offset;havoc main_~tmp___13~1#1.base, main_~tmp___13~1#1.offset;havoc main_~ldvarg17~0#1.base, main_~ldvarg17~0#1.offset;havoc main_~tmp___14~0#1.base, main_~tmp___14~0#1.offset;havoc main_~ldvarg16~0#1;havoc main_~tmp___15~0#1;havoc main_~ldvarg15~0#1.base, main_~ldvarg15~0#1.offset;havoc main_~tmp___16~0#1.base, main_~tmp___16~0#1.offset;havoc main_~ldvarg18~0#1.base, main_~ldvarg18~0#1.offset;havoc main_~tmp___17~0#1.base, main_~tmp___17~0#1.offset;havoc main_~ldvarg20~0#1.base, main_~ldvarg20~0#1.offset;havoc main_~tmp___18~0#1.base, main_~tmp___18~0#1.offset;havoc main_~ldvarg19~0#1;havoc main_~tmp___19~0#1;call main_~#ldvarg21~0#1.base, main_~#ldvarg21~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~ldvarg22~0#1.base, main_~ldvarg22~0#1.offset;havoc main_~tmp___20~0#1.base, main_~tmp___20~0#1.offset;havoc main_~ldvarg24~0#1.base, main_~ldvarg24~0#1.offset;havoc main_~tmp___21~0#1.base, main_~tmp___21~0#1.offset;havoc main_~ldvarg26~0#1.base, main_~ldvarg26~0#1.offset;havoc main_~tmp___22~0#1.base, main_~tmp___22~0#1.offset;havoc main_~ldvarg25~0#1.base, main_~ldvarg25~0#1.offset;havoc main_~tmp___23~0#1.base, main_~tmp___23~0#1.offset;havoc main_~ldvarg23~0#1;havoc main_~tmp___24~0#1;havoc main_~ldvarg27~0#1.base, main_~ldvarg27~0#1.offset;havoc main_~tmp___25~0#1.base, main_~tmp___25~0#1.offset;havoc main_~ldvarg29~0#1.base, main_~ldvarg29~0#1.offset;havoc main_~tmp___26~0#1.base, main_~tmp___26~0#1.offset;havoc main_~ldvarg28~0#1;havoc main_~tmp___27~0#1;havoc main_~ldvarg32~0#1.base, main_~ldvarg32~0#1.offset;havoc main_~tmp___28~0#1.base, main_~tmp___28~0#1.offset;havoc main_~ldvarg31~0#1.base, main_~ldvarg31~0#1.offset;havoc main_~tmp___29~0#1.base, main_~tmp___29~0#1.offset;havoc main_~ldvarg33~0#1.base, main_~ldvarg33~0#1.offset;havoc main_~tmp___30~0#1.base, main_~tmp___30~0#1.offset;havoc main_~ldvarg30~0#1;havoc main_~tmp___31~0#1;havoc main_~tmp___32~0#1;havoc main_~tmp___33~0#1;havoc main_~tmp___34~0#1;havoc main_~tmp___35~0#1;havoc main_~tmp___36~0#1;havoc main_~tmp___37~0#1;havoc main_~tmp___38~0#1;havoc main_~tmp___39~0#1;havoc main_~tmp___40~0#1;havoc main_~tmp___41~0#1;havoc main_~tmp___42~0#1;havoc main_~tmp___43~0#1;havoc main_~tmp___44~0#1;assume -2147483648 <= main_#t~nondet742#1 && main_#t~nondet742#1 <= 2147483647;main_~tmp~53#1 := main_#t~nondet742#1;havoc main_#t~nondet742#1;main_~ldvarg1~0#1 := main_~tmp~53#1; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,545 INFO L272 TraceCheckUtils]: 2: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} call main_#t~ret743#1.base, main_#t~ret743#1.offset := ldv_zalloc(1); {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:16,545 INFO L290 TraceCheckUtils]: 3: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,545 INFO L290 TraceCheckUtils]: 4: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,546 INFO L290 TraceCheckUtils]: 5: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,546 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2721#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,547 INFO L290 TraceCheckUtils]: 7: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} main_~tmp___0~25#1.base, main_~tmp___0~25#1.offset := main_#t~ret743#1.base, main_#t~ret743#1.offset;havoc main_#t~ret743#1.base, main_#t~ret743#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp___0~25#1.base, main_~tmp___0~25#1.offset; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,547 INFO L272 TraceCheckUtils]: 8: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} call main_#t~ret744#1.base, main_#t~ret744#1.offset := ldv_zalloc(1); {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:16,549 INFO L290 TraceCheckUtils]: 9: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,549 INFO L290 TraceCheckUtils]: 10: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,549 INFO L290 TraceCheckUtils]: 11: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,549 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2723#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,550 INFO L290 TraceCheckUtils]: 13: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} main_~tmp___1~9#1.base, main_~tmp___1~9#1.offset := main_#t~ret744#1.base, main_#t~ret744#1.offset;havoc main_#t~ret744#1.base, main_#t~ret744#1.offset;main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset := main_~tmp___1~9#1.base, main_~tmp___1~9#1.offset;assume -2147483648 <= main_#t~nondet745#1 && main_#t~nondet745#1 <= 2147483647;main_~tmp___2~5#1 := main_#t~nondet745#1;havoc main_#t~nondet745#1;main_~ldvarg4~0#1 := main_~tmp___2~5#1; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,550 INFO L272 TraceCheckUtils]: 14: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} call main_#t~ret746#1.base, main_#t~ret746#1.offset := ldv_zalloc(1); {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:16,550 INFO L290 TraceCheckUtils]: 15: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,551 INFO L290 TraceCheckUtils]: 16: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,551 INFO L290 TraceCheckUtils]: 17: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,553 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2725#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,554 INFO L290 TraceCheckUtils]: 19: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} main_~tmp___3~3#1.base, main_~tmp___3~3#1.offset := main_#t~ret746#1.base, main_#t~ret746#1.offset;havoc main_#t~ret746#1.base, main_#t~ret746#1.offset;main_~ldvarg3~0#1.base, main_~ldvarg3~0#1.offset := main_~tmp___3~3#1.base, main_~tmp___3~3#1.offset; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,554 INFO L272 TraceCheckUtils]: 20: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} call main_#t~ret747#1.base, main_#t~ret747#1.offset := ldv_zalloc(1); {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:16,554 INFO L290 TraceCheckUtils]: 21: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,555 INFO L290 TraceCheckUtils]: 22: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,555 INFO L290 TraceCheckUtils]: 23: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,555 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2727#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,556 INFO L290 TraceCheckUtils]: 25: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} main_~tmp___4~1#1.base, main_~tmp___4~1#1.offset := main_#t~ret747#1.base, main_#t~ret747#1.offset;havoc main_#t~ret747#1.base, main_#t~ret747#1.offset;main_~ldvarg5~0#1.base, main_~ldvarg5~0#1.offset := main_~tmp___4~1#1.base, main_~tmp___4~1#1.offset; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,556 INFO L272 TraceCheckUtils]: 26: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} call main_#t~ret748#1.base, main_#t~ret748#1.offset := ldv_zalloc(48); {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:16,556 INFO L290 TraceCheckUtils]: 27: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,556 INFO L290 TraceCheckUtils]: 28: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,556 INFO L290 TraceCheckUtils]: 29: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,557 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2729#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,557 INFO L290 TraceCheckUtils]: 31: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} main_~tmp___5~1#1.base, main_~tmp___5~1#1.offset := main_#t~ret748#1.base, main_#t~ret748#1.offset;havoc main_#t~ret748#1.base, main_#t~ret748#1.offset;main_~ldvarg8~0#1.base, main_~ldvarg8~0#1.offset := main_~tmp___5~1#1.base, main_~tmp___5~1#1.offset; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,558 INFO L272 TraceCheckUtils]: 32: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} call main_#t~ret749#1.base, main_#t~ret749#1.offset := ldv_zalloc(1); {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:16,558 INFO L290 TraceCheckUtils]: 33: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,558 INFO L290 TraceCheckUtils]: 34: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,558 INFO L290 TraceCheckUtils]: 35: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,559 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2731#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,559 INFO L290 TraceCheckUtils]: 37: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} main_~tmp___6~1#1.base, main_~tmp___6~1#1.offset := main_#t~ret749#1.base, main_#t~ret749#1.offset;havoc main_#t~ret749#1.base, main_#t~ret749#1.offset;main_~ldvarg7~0#1.base, main_~ldvarg7~0#1.offset := main_~tmp___6~1#1.base, main_~tmp___6~1#1.offset; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,560 INFO L272 TraceCheckUtils]: 38: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} call main_#t~ret750#1.base, main_#t~ret750#1.offset := ldv_zalloc(1376); {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:16,560 INFO L290 TraceCheckUtils]: 39: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,560 INFO L290 TraceCheckUtils]: 40: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,560 INFO L290 TraceCheckUtils]: 41: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,560 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2733#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,561 INFO L290 TraceCheckUtils]: 43: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} main_~tmp___7~1#1.base, main_~tmp___7~1#1.offset := main_#t~ret750#1.base, main_#t~ret750#1.offset;havoc main_#t~ret750#1.base, main_#t~ret750#1.offset;main_~ldvarg6~0#1.base, main_~ldvarg6~0#1.offset := main_~tmp___7~1#1.base, main_~tmp___7~1#1.offset; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,561 INFO L272 TraceCheckUtils]: 44: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} call main_#t~ret751#1.base, main_#t~ret751#1.offset := ldv_zalloc(1); {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:16,561 INFO L290 TraceCheckUtils]: 45: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,562 INFO L290 TraceCheckUtils]: 46: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,562 INFO L290 TraceCheckUtils]: 47: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,562 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2735#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,563 INFO L290 TraceCheckUtils]: 49: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} main_~tmp___8~1#1.base, main_~tmp___8~1#1.offset := main_#t~ret751#1.base, main_#t~ret751#1.offset;havoc main_#t~ret751#1.base, main_#t~ret751#1.offset;main_~ldvarg11~0#1.base, main_~ldvarg11~0#1.offset := main_~tmp___8~1#1.base, main_~tmp___8~1#1.offset;assume -2147483648 <= main_#t~nondet752#1 && main_#t~nondet752#1 <= 2147483647;main_~tmp___9~1#1 := main_#t~nondet752#1;havoc main_#t~nondet752#1;main_~ldvarg10~0#1 := main_~tmp___9~1#1; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,563 INFO L272 TraceCheckUtils]: 50: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} call main_#t~ret753#1.base, main_#t~ret753#1.offset := ldv_zalloc(1); {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:16,563 INFO L290 TraceCheckUtils]: 51: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,563 INFO L290 TraceCheckUtils]: 52: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,564 INFO L290 TraceCheckUtils]: 53: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,564 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2737#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,565 INFO L290 TraceCheckUtils]: 55: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} main_~tmp___10~1#1.base, main_~tmp___10~1#1.offset := main_#t~ret753#1.base, main_#t~ret753#1.offset;havoc main_#t~ret753#1.base, main_#t~ret753#1.offset;main_~ldvarg9~0#1.base, main_~ldvarg9~0#1.offset := main_~tmp___10~1#1.base, main_~tmp___10~1#1.offset; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,565 INFO L272 TraceCheckUtils]: 56: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} call main_#t~ret754#1.base, main_#t~ret754#1.offset := ldv_zalloc(1); {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:16,565 INFO L290 TraceCheckUtils]: 57: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,566 INFO L290 TraceCheckUtils]: 58: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,566 INFO L290 TraceCheckUtils]: 59: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,566 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2739#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,567 INFO L290 TraceCheckUtils]: 61: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} main_~tmp___11~1#1.base, main_~tmp___11~1#1.offset := main_#t~ret754#1.base, main_#t~ret754#1.offset;havoc main_#t~ret754#1.base, main_#t~ret754#1.offset;main_~ldvarg14~0#1.base, main_~ldvarg14~0#1.offset := main_~tmp___11~1#1.base, main_~tmp___11~1#1.offset;assume -2147483648 <= main_#t~nondet755#1 && main_#t~nondet755#1 <= 2147483647;main_~tmp___12~1#1 := main_#t~nondet755#1;havoc main_#t~nondet755#1;main_~ldvarg13~0#1 := main_~tmp___12~1#1; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,567 INFO L272 TraceCheckUtils]: 62: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} call main_#t~ret756#1.base, main_#t~ret756#1.offset := ldv_zalloc(1); {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:16,567 INFO L290 TraceCheckUtils]: 63: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,567 INFO L290 TraceCheckUtils]: 64: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,568 INFO L290 TraceCheckUtils]: 65: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,568 INFO L284 TraceCheckUtils]: 66: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2741#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,568 INFO L290 TraceCheckUtils]: 67: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} main_~tmp___13~1#1.base, main_~tmp___13~1#1.offset := main_#t~ret756#1.base, main_#t~ret756#1.offset;havoc main_#t~ret756#1.base, main_#t~ret756#1.offset;main_~ldvarg12~0#1.base, main_~ldvarg12~0#1.offset := main_~tmp___13~1#1.base, main_~tmp___13~1#1.offset; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,569 INFO L272 TraceCheckUtils]: 68: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} call main_#t~ret757#1.base, main_#t~ret757#1.offset := ldv_zalloc(32); {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:16,569 INFO L290 TraceCheckUtils]: 69: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,569 INFO L290 TraceCheckUtils]: 70: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,569 INFO L290 TraceCheckUtils]: 71: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,570 INFO L284 TraceCheckUtils]: 72: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2743#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,570 INFO L290 TraceCheckUtils]: 73: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} main_~tmp___14~0#1.base, main_~tmp___14~0#1.offset := main_#t~ret757#1.base, main_#t~ret757#1.offset;havoc main_#t~ret757#1.base, main_#t~ret757#1.offset;main_~ldvarg17~0#1.base, main_~ldvarg17~0#1.offset := main_~tmp___14~0#1.base, main_~tmp___14~0#1.offset;assume -2147483648 <= main_#t~nondet758#1 && main_#t~nondet758#1 <= 2147483647;main_~tmp___15~0#1 := main_#t~nondet758#1;havoc main_#t~nondet758#1;main_~ldvarg16~0#1 := main_~tmp___15~0#1; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,571 INFO L272 TraceCheckUtils]: 74: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} call main_#t~ret759#1.base, main_#t~ret759#1.offset := ldv_zalloc(296); {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:16,571 INFO L290 TraceCheckUtils]: 75: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,571 INFO L290 TraceCheckUtils]: 76: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,571 INFO L290 TraceCheckUtils]: 77: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,572 INFO L284 TraceCheckUtils]: 78: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2745#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,572 INFO L290 TraceCheckUtils]: 79: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} main_~tmp___16~0#1.base, main_~tmp___16~0#1.offset := main_#t~ret759#1.base, main_#t~ret759#1.offset;havoc main_#t~ret759#1.base, main_#t~ret759#1.offset;main_~ldvarg15~0#1.base, main_~ldvarg15~0#1.offset := main_~tmp___16~0#1.base, main_~tmp___16~0#1.offset; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,573 INFO L272 TraceCheckUtils]: 80: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} call main_#t~ret760#1.base, main_#t~ret760#1.offset := ldv_zalloc(1); {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:16,573 INFO L290 TraceCheckUtils]: 81: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,573 INFO L290 TraceCheckUtils]: 82: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,573 INFO L290 TraceCheckUtils]: 83: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,573 INFO L284 TraceCheckUtils]: 84: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2747#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,574 INFO L290 TraceCheckUtils]: 85: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} main_~tmp___17~0#1.base, main_~tmp___17~0#1.offset := main_#t~ret760#1.base, main_#t~ret760#1.offset;havoc main_#t~ret760#1.base, main_#t~ret760#1.offset;main_~ldvarg18~0#1.base, main_~ldvarg18~0#1.offset := main_~tmp___17~0#1.base, main_~tmp___17~0#1.offset; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,574 INFO L272 TraceCheckUtils]: 86: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} call main_#t~ret761#1.base, main_#t~ret761#1.offset := ldv_zalloc(1); {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:16,574 INFO L290 TraceCheckUtils]: 87: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,575 INFO L290 TraceCheckUtils]: 88: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,575 INFO L290 TraceCheckUtils]: 89: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,575 INFO L284 TraceCheckUtils]: 90: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2749#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,576 INFO L290 TraceCheckUtils]: 91: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} main_~tmp___18~0#1.base, main_~tmp___18~0#1.offset := main_#t~ret761#1.base, main_#t~ret761#1.offset;havoc main_#t~ret761#1.base, main_#t~ret761#1.offset;main_~ldvarg20~0#1.base, main_~ldvarg20~0#1.offset := main_~tmp___18~0#1.base, main_~tmp___18~0#1.offset;assume -2147483648 <= main_#t~nondet762#1 && main_#t~nondet762#1 <= 2147483647;main_~tmp___19~0#1 := main_#t~nondet762#1;havoc main_#t~nondet762#1;main_~ldvarg19~0#1 := main_~tmp___19~0#1; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,576 INFO L272 TraceCheckUtils]: 92: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} call main_#t~ret763#1.base, main_#t~ret763#1.offset := ldv_zalloc(32); {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:16,576 INFO L290 TraceCheckUtils]: 93: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,576 INFO L290 TraceCheckUtils]: 94: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,576 INFO L290 TraceCheckUtils]: 95: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,577 INFO L284 TraceCheckUtils]: 96: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2751#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,577 INFO L290 TraceCheckUtils]: 97: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} main_~tmp___20~0#1.base, main_~tmp___20~0#1.offset := main_#t~ret763#1.base, main_#t~ret763#1.offset;havoc main_#t~ret763#1.base, main_#t~ret763#1.offset;main_~ldvarg22~0#1.base, main_~ldvarg22~0#1.offset := main_~tmp___20~0#1.base, main_~tmp___20~0#1.offset; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,578 INFO L272 TraceCheckUtils]: 98: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} call main_#t~ret764#1.base, main_#t~ret764#1.offset := ldv_zalloc(1376); {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:16,578 INFO L290 TraceCheckUtils]: 99: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,578 INFO L290 TraceCheckUtils]: 100: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,578 INFO L290 TraceCheckUtils]: 101: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,579 INFO L284 TraceCheckUtils]: 102: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2753#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,579 INFO L290 TraceCheckUtils]: 103: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} main_~tmp___21~0#1.base, main_~tmp___21~0#1.offset := main_#t~ret764#1.base, main_#t~ret764#1.offset;havoc main_#t~ret764#1.base, main_#t~ret764#1.offset;main_~ldvarg24~0#1.base, main_~ldvarg24~0#1.offset := main_~tmp___21~0#1.base, main_~tmp___21~0#1.offset; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,580 INFO L272 TraceCheckUtils]: 104: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} call main_#t~ret765#1.base, main_#t~ret765#1.offset := ldv_zalloc(48); {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:16,580 INFO L290 TraceCheckUtils]: 105: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,580 INFO L290 TraceCheckUtils]: 106: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,580 INFO L290 TraceCheckUtils]: 107: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,580 INFO L284 TraceCheckUtils]: 108: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2755#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,581 INFO L290 TraceCheckUtils]: 109: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} main_~tmp___22~0#1.base, main_~tmp___22~0#1.offset := main_#t~ret765#1.base, main_#t~ret765#1.offset;havoc main_#t~ret765#1.base, main_#t~ret765#1.offset;main_~ldvarg26~0#1.base, main_~ldvarg26~0#1.offset := main_~tmp___22~0#1.base, main_~tmp___22~0#1.offset; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,581 INFO L272 TraceCheckUtils]: 110: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} call main_#t~ret766#1.base, main_#t~ret766#1.offset := ldv_zalloc(1); {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:16,581 INFO L290 TraceCheckUtils]: 111: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,582 INFO L290 TraceCheckUtils]: 112: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,582 INFO L290 TraceCheckUtils]: 113: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,582 INFO L284 TraceCheckUtils]: 114: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2757#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,583 INFO L290 TraceCheckUtils]: 115: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} main_~tmp___23~0#1.base, main_~tmp___23~0#1.offset := main_#t~ret766#1.base, main_#t~ret766#1.offset;havoc main_#t~ret766#1.base, main_#t~ret766#1.offset;main_~ldvarg25~0#1.base, main_~ldvarg25~0#1.offset := main_~tmp___23~0#1.base, main_~tmp___23~0#1.offset;assume -2147483648 <= main_#t~nondet767#1 && main_#t~nondet767#1 <= 2147483647;main_~tmp___24~0#1 := main_#t~nondet767#1;havoc main_#t~nondet767#1;main_~ldvarg23~0#1 := main_~tmp___24~0#1; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,583 INFO L272 TraceCheckUtils]: 116: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} call main_#t~ret768#1.base, main_#t~ret768#1.offset := ldv_zalloc(1); {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:16,583 INFO L290 TraceCheckUtils]: 117: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,583 INFO L290 TraceCheckUtils]: 118: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,584 INFO L290 TraceCheckUtils]: 119: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,586 INFO L284 TraceCheckUtils]: 120: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2759#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,587 INFO L290 TraceCheckUtils]: 121: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} main_~tmp___25~0#1.base, main_~tmp___25~0#1.offset := main_#t~ret768#1.base, main_#t~ret768#1.offset;havoc main_#t~ret768#1.base, main_#t~ret768#1.offset;main_~ldvarg27~0#1.base, main_~ldvarg27~0#1.offset := main_~tmp___25~0#1.base, main_~tmp___25~0#1.offset; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,588 INFO L272 TraceCheckUtils]: 122: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} call main_#t~ret769#1.base, main_#t~ret769#1.offset := ldv_zalloc(1); {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:16,588 INFO L290 TraceCheckUtils]: 123: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,588 INFO L290 TraceCheckUtils]: 124: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,588 INFO L290 TraceCheckUtils]: 125: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,589 INFO L284 TraceCheckUtils]: 126: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2761#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,589 INFO L290 TraceCheckUtils]: 127: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} main_~tmp___26~0#1.base, main_~tmp___26~0#1.offset := main_#t~ret769#1.base, main_#t~ret769#1.offset;havoc main_#t~ret769#1.base, main_#t~ret769#1.offset;main_~ldvarg29~0#1.base, main_~ldvarg29~0#1.offset := main_~tmp___26~0#1.base, main_~tmp___26~0#1.offset;assume -2147483648 <= main_#t~nondet770#1 && main_#t~nondet770#1 <= 2147483647;main_~tmp___27~0#1 := main_#t~nondet770#1;havoc main_#t~nondet770#1;main_~ldvarg28~0#1 := main_~tmp___27~0#1; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,590 INFO L272 TraceCheckUtils]: 128: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} call main_#t~ret771#1.base, main_#t~ret771#1.offset := ldv_zalloc(1); {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:16,590 INFO L290 TraceCheckUtils]: 129: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,590 INFO L290 TraceCheckUtils]: 130: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,590 INFO L290 TraceCheckUtils]: 131: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,590 INFO L284 TraceCheckUtils]: 132: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2763#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,591 INFO L290 TraceCheckUtils]: 133: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} main_~tmp___28~0#1.base, main_~tmp___28~0#1.offset := main_#t~ret771#1.base, main_#t~ret771#1.offset;havoc main_#t~ret771#1.base, main_#t~ret771#1.offset;main_~ldvarg32~0#1.base, main_~ldvarg32~0#1.offset := main_~tmp___28~0#1.base, main_~tmp___28~0#1.offset; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,591 INFO L272 TraceCheckUtils]: 134: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} call main_#t~ret772#1.base, main_#t~ret772#1.offset := ldv_zalloc(1376); {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:16,591 INFO L290 TraceCheckUtils]: 135: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,592 INFO L290 TraceCheckUtils]: 136: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,592 INFO L290 TraceCheckUtils]: 137: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,592 INFO L284 TraceCheckUtils]: 138: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2765#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,593 INFO L290 TraceCheckUtils]: 139: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} main_~tmp___29~0#1.base, main_~tmp___29~0#1.offset := main_#t~ret772#1.base, main_#t~ret772#1.offset;havoc main_#t~ret772#1.base, main_#t~ret772#1.offset;main_~ldvarg31~0#1.base, main_~ldvarg31~0#1.offset := main_~tmp___29~0#1.base, main_~tmp___29~0#1.offset; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,593 INFO L272 TraceCheckUtils]: 140: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} call main_#t~ret773#1.base, main_#t~ret773#1.offset := ldv_zalloc(48); {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:16,593 INFO L290 TraceCheckUtils]: 141: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,593 INFO L290 TraceCheckUtils]: 142: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,593 INFO L290 TraceCheckUtils]: 143: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,594 INFO L284 TraceCheckUtils]: 144: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2767#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,594 INFO L290 TraceCheckUtils]: 145: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} main_~tmp___30~0#1.base, main_~tmp___30~0#1.offset := main_#t~ret773#1.base, main_#t~ret773#1.offset;havoc main_#t~ret773#1.base, main_#t~ret773#1.offset;main_~ldvarg33~0#1.base, main_~ldvarg33~0#1.offset := main_~tmp___30~0#1.base, main_~tmp___30~0#1.offset;assume -2147483648 <= main_#t~nondet774#1 && main_#t~nondet774#1 <= 2147483647;main_~tmp___31~0#1 := main_#t~nondet774#1;havoc main_#t~nondet774#1;main_~ldvarg30~0#1 := main_~tmp___31~0#1;assume { :begin_inline_ldv_initialize } true; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,595 INFO L290 TraceCheckUtils]: 146: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume { :end_inline_ldv_initialize } true; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,595 INFO L272 TraceCheckUtils]: 147: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} call main_#t~memset~res775#1.base, main_#t~memset~res775#1.offset := #Ultimate.C_memset(main_~#ldvarg21~0#1.base, main_~#ldvarg21~0#1.offset, 0, 4); {14376#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 21:50:16,595 INFO L290 TraceCheckUtils]: 148: Hoare triple {14376#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr867 := 0; {14268#true} is VALID [2022-02-20 21:50:16,596 INFO L290 TraceCheckUtils]: 149: Hoare triple {14268#true} assume !(#t~loopctr867 % 18446744073709551616 < #amount % 18446744073709551616); {14268#true} is VALID [2022-02-20 21:50:16,596 INFO L290 TraceCheckUtils]: 150: Hoare triple {14268#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {14268#true} is VALID [2022-02-20 21:50:16,596 INFO L284 TraceCheckUtils]: 151: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2769#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,597 INFO L290 TraceCheckUtils]: 152: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} havoc main_#t~memset~res775#1.base, main_#t~memset~res775#1.offset;~ldv_state_variable_6~0 := 0;~ldv_state_variable_11~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_8~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_10~0 := 0;~ldv_state_variable_5~0 := 0; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,597 INFO L290 TraceCheckUtils]: 153: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume -2147483648 <= main_#t~nondet776#1 && main_#t~nondet776#1 <= 2147483647;main_~tmp___32~0#1 := main_#t~nondet776#1;havoc main_#t~nondet776#1;main_#t~switch777#1 := 0 == main_~tmp___32~0#1; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,598 INFO L290 TraceCheckUtils]: 154: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume !main_#t~switch777#1;main_#t~switch777#1 := main_#t~switch777#1 || 1 == main_~tmp___32~0#1; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,599 INFO L290 TraceCheckUtils]: 155: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume !main_#t~switch777#1;main_#t~switch777#1 := main_#t~switch777#1 || 2 == main_~tmp___32~0#1; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,599 INFO L290 TraceCheckUtils]: 156: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume !main_#t~switch777#1;main_#t~switch777#1 := main_#t~switch777#1 || 3 == main_~tmp___32~0#1; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,599 INFO L290 TraceCheckUtils]: 157: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume !main_#t~switch777#1;main_#t~switch777#1 := main_#t~switch777#1 || 4 == main_~tmp___32~0#1; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,600 INFO L290 TraceCheckUtils]: 158: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume !main_#t~switch777#1;main_#t~switch777#1 := main_#t~switch777#1 || 5 == main_~tmp___32~0#1; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,600 INFO L290 TraceCheckUtils]: 159: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume !main_#t~switch777#1;main_#t~switch777#1 := main_#t~switch777#1 || 6 == main_~tmp___32~0#1; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,601 INFO L290 TraceCheckUtils]: 160: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume !main_#t~switch777#1;main_#t~switch777#1 := main_#t~switch777#1 || 7 == main_~tmp___32~0#1; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,601 INFO L290 TraceCheckUtils]: 161: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume !main_#t~switch777#1;main_#t~switch777#1 := main_#t~switch777#1 || 8 == main_~tmp___32~0#1; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,601 INFO L290 TraceCheckUtils]: 162: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume !main_#t~switch777#1;main_#t~switch777#1 := main_#t~switch777#1 || 9 == main_~tmp___32~0#1; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,602 INFO L290 TraceCheckUtils]: 163: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume main_#t~switch777#1; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,602 INFO L290 TraceCheckUtils]: 164: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet814#1 && main_#t~nondet814#1 <= 2147483647;main_~tmp___42~0#1 := main_#t~nondet814#1;havoc main_#t~nondet814#1;main_#t~switch815#1 := 0 == main_~tmp___42~0#1; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,603 INFO L290 TraceCheckUtils]: 165: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume !main_#t~switch815#1;main_#t~switch815#1 := main_#t~switch815#1 || 1 == main_~tmp___42~0#1; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,603 INFO L290 TraceCheckUtils]: 166: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume main_#t~switch815#1; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,604 INFO L290 TraceCheckUtils]: 167: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_ims_pcu_driver_init } true;havoc ims_pcu_driver_init_#res#1;havoc ims_pcu_driver_init_#t~ret728#1, ims_pcu_driver_init_~tmp~45#1;havoc ims_pcu_driver_init_~tmp~45#1;assume { :begin_inline_ldv_usb_register_driver_24 } true;ldv_usb_register_driver_24_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_24_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_24_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_24_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_24_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_24_#in~ldv_func_arg3#1.offset := ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 134, 0;havoc ldv_usb_register_driver_24_#res#1;havoc ldv_usb_register_driver_24_#t~ret831#1, ldv_usb_register_driver_24_~ldv_func_arg1#1.base, ldv_usb_register_driver_24_~ldv_func_arg1#1.offset, ldv_usb_register_driver_24_~ldv_func_arg2#1.base, ldv_usb_register_driver_24_~ldv_func_arg2#1.offset, ldv_usb_register_driver_24_~ldv_func_arg3#1.base, ldv_usb_register_driver_24_~ldv_func_arg3#1.offset, ldv_usb_register_driver_24_~ldv_func_res~0#1, ldv_usb_register_driver_24_~tmp~61#1;ldv_usb_register_driver_24_~ldv_func_arg1#1.base, ldv_usb_register_driver_24_~ldv_func_arg1#1.offset := ldv_usb_register_driver_24_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_24_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_24_~ldv_func_arg2#1.base, ldv_usb_register_driver_24_~ldv_func_arg2#1.offset := ldv_usb_register_driver_24_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_24_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_24_~ldv_func_arg3#1.base, ldv_usb_register_driver_24_~ldv_func_arg3#1.offset := ldv_usb_register_driver_24_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_24_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_24_~ldv_func_res~0#1;havoc ldv_usb_register_driver_24_~tmp~61#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_24_~ldv_func_arg1#1.base, ldv_usb_register_driver_24_~ldv_func_arg1#1.offset, ldv_usb_register_driver_24_~ldv_func_arg2#1.base, ldv_usb_register_driver_24_~ldv_func_arg2#1.offset, ldv_usb_register_driver_24_~ldv_func_arg3#1.base, ldv_usb_register_driver_24_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet863#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet863#1 && usb_register_driver_#t~nondet863#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet863#1;havoc usb_register_driver_#t~nondet863#1; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,604 INFO L290 TraceCheckUtils]: 168: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} ldv_usb_register_driver_24_#t~ret831#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_24_#t~ret831#1 && ldv_usb_register_driver_24_#t~ret831#1 <= 2147483647;ldv_usb_register_driver_24_~tmp~61#1 := ldv_usb_register_driver_24_#t~ret831#1;havoc ldv_usb_register_driver_24_#t~ret831#1;ldv_usb_register_driver_24_~ldv_func_res~0#1 := ldv_usb_register_driver_24_~tmp~61#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret741#1.base, ldv_usb_driver_1_#t~ret741#1.offset, ldv_usb_driver_1_~tmp~52#1.base, ldv_usb_driver_1_~tmp~52#1.offset;havoc ldv_usb_driver_1_~tmp~52#1.base, ldv_usb_driver_1_~tmp~52#1.offset; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,605 INFO L272 TraceCheckUtils]: 169: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} call ldv_usb_driver_1_#t~ret741#1.base, ldv_usb_driver_1_#t~ret741#1.offset := ldv_zalloc(1520); {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:16,605 INFO L290 TraceCheckUtils]: 170: Hoare triple {14375#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {14268#true} is VALID [2022-02-20 21:50:16,605 INFO L290 TraceCheckUtils]: 171: Hoare triple {14268#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {14268#true} is VALID [2022-02-20 21:50:16,605 INFO L290 TraceCheckUtils]: 172: Hoare triple {14268#true} assume true; {14268#true} is VALID [2022-02-20 21:50:16,606 INFO L284 TraceCheckUtils]: 173: Hoare quadruple {14268#true} {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2987#return; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,606 INFO L290 TraceCheckUtils]: 174: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} ldv_usb_driver_1_~tmp~52#1.base, ldv_usb_driver_1_~tmp~52#1.offset := ldv_usb_driver_1_#t~ret741#1.base, ldv_usb_driver_1_#t~ret741#1.offset;havoc ldv_usb_driver_1_#t~ret741#1.base, ldv_usb_driver_1_#t~ret741#1.offset;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := ldv_usb_driver_1_~tmp~52#1.base, ldv_usb_driver_1_~tmp~52#1.offset; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,606 INFO L290 TraceCheckUtils]: 175: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_24_#res#1 := ldv_usb_register_driver_24_~ldv_func_res~0#1; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,607 INFO L290 TraceCheckUtils]: 176: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} ims_pcu_driver_init_#t~ret728#1 := ldv_usb_register_driver_24_#res#1;assume { :end_inline_ldv_usb_register_driver_24 } true;assume -2147483648 <= ims_pcu_driver_init_#t~ret728#1 && ims_pcu_driver_init_#t~ret728#1 <= 2147483647;ims_pcu_driver_init_~tmp~45#1 := ims_pcu_driver_init_#t~ret728#1;havoc ims_pcu_driver_init_#t~ret728#1;ims_pcu_driver_init_#res#1 := ims_pcu_driver_init_~tmp~45#1; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,608 INFO L290 TraceCheckUtils]: 177: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} main_#t~ret816#1 := ims_pcu_driver_init_#res#1;assume { :end_inline_ims_pcu_driver_init } true;assume -2147483648 <= main_#t~ret816#1 && main_#t~ret816#1 <= 2147483647;~ldv_retval_4~0 := main_#t~ret816#1;havoc main_#t~ret816#1; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,608 INFO L290 TraceCheckUtils]: 178: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume !(0 == ~ldv_retval_4~0); {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,609 INFO L290 TraceCheckUtils]: 179: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume 0 != ~ldv_retval_4~0;~ldv_state_variable_0~0 := 2; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,609 INFO L290 TraceCheckUtils]: 180: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume { :begin_inline_ldv_check_final_state } true; {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:50:16,609 INFO L290 TraceCheckUtils]: 181: Hoare triple {14270#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume !(0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616); {14269#false} is VALID [2022-02-20 21:50:16,610 INFO L272 TraceCheckUtils]: 182: Hoare triple {14269#false} call ldv_error(); {14269#false} is VALID [2022-02-20 21:50:16,610 INFO L290 TraceCheckUtils]: 183: Hoare triple {14269#false} assume !false; {14269#false} is VALID [2022-02-20 21:50:16,611 INFO L134 CoverageAnalysis]: Checked inductivity of 1200 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2022-02-20 21:50:16,611 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:50:16,611 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2026350440] [2022-02-20 21:50:16,611 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2026350440] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:50:16,611 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:50:16,612 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-02-20 21:50:16,612 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1659506744] [2022-02-20 21:50:16,612 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:50:16,614 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 11.8) internal successors, (59), 3 states have internal predecessors, (59), 2 states have call successors, (27), 3 states have call predecessors, (27), 1 states have return successors, (26), 1 states have call predecessors, (26), 1 states have call successors, (26) Word has length 184 [2022-02-20 21:50:16,615 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:50:16,616 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 11.8) internal successors, (59), 3 states have internal predecessors, (59), 2 states have call successors, (27), 3 states have call predecessors, (27), 1 states have return successors, (26), 1 states have call predecessors, (26), 1 states have call successors, (26) [2022-02-20 21:50:16,731 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 112 edges. 112 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:50:16,731 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-02-20 21:50:16,731 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:50:16,732 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-02-20 21:50:16,732 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-02-20 21:50:16,732 INFO L87 Difference]: Start difference. First operand 2184 states and 3049 transitions. Second operand has 5 states, 5 states have (on average 11.8) internal successors, (59), 3 states have internal predecessors, (59), 2 states have call successors, (27), 3 states have call predecessors, (27), 1 states have return successors, (26), 1 states have call predecessors, (26), 1 states have call successors, (26) [2022-02-20 21:50:33,515 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:50:33,515 INFO L93 Difference]: Finished difference Result 6949 states and 10117 transitions. [2022-02-20 21:50:33,515 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-02-20 21:50:33,516 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 11.8) internal successors, (59), 3 states have internal predecessors, (59), 2 states have call successors, (27), 3 states have call predecessors, (27), 1 states have return successors, (26), 1 states have call predecessors, (26), 1 states have call successors, (26) Word has length 184 [2022-02-20 21:50:33,516 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:50:33,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 11.8) internal successors, (59), 3 states have internal predecessors, (59), 2 states have call successors, (27), 3 states have call predecessors, (27), 1 states have return successors, (26), 1 states have call predecessors, (26), 1 states have call successors, (26) [2022-02-20 21:50:33,619 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 5232 transitions. [2022-02-20 21:50:33,620 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 11.8) internal successors, (59), 3 states have internal predecessors, (59), 2 states have call successors, (27), 3 states have call predecessors, (27), 1 states have return successors, (26), 1 states have call predecessors, (26), 1 states have call successors, (26) [2022-02-20 21:50:33,725 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 5232 transitions. [2022-02-20 21:50:33,725 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 7 states and 5232 transitions. [2022-02-20 21:50:37,849 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 5232 edges. 5232 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:50:38,875 INFO L225 Difference]: With dead ends: 6949 [2022-02-20 21:50:38,876 INFO L226 Difference]: Without dead ends: 4818 [2022-02-20 21:50:38,882 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 53 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2022-02-20 21:50:38,883 INFO L933 BasicCegarLoop]: 1956 mSDtfsCounter, 2453 mSDsluCounter, 2835 mSDsCounter, 0 mSdLazyCounter, 2030 mSolverCounterSat, 1345 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 4.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2622 SdHoareTripleChecker+Valid, 4791 SdHoareTripleChecker+Invalid, 3375 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1345 IncrementalHoareTripleChecker+Valid, 2030 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.7s IncrementalHoareTripleChecker+Time [2022-02-20 21:50:38,883 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [2622 Valid, 4791 Invalid, 3375 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1345 Valid, 2030 Invalid, 0 Unknown, 0 Unchecked, 4.7s Time] [2022-02-20 21:50:38,887 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4818 states. [2022-02-20 21:50:38,990 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4818 to 4364. [2022-02-20 21:50:38,991 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:50:38,999 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4818 states. Second operand has 4364 states, 3113 states have (on average 1.332155477031802) internal successors, (4147), 3165 states have internal predecessors, (4147), 962 states have call successors, (962), 277 states have call predecessors, (962), 288 states have return successors, (1029), 963 states have call predecessors, (1029), 957 states have call successors, (1029) [2022-02-20 21:50:39,009 INFO L74 IsIncluded]: Start isIncluded. First operand 4818 states. Second operand has 4364 states, 3113 states have (on average 1.332155477031802) internal successors, (4147), 3165 states have internal predecessors, (4147), 962 states have call successors, (962), 277 states have call predecessors, (962), 288 states have return successors, (1029), 963 states have call predecessors, (1029), 957 states have call successors, (1029) [2022-02-20 21:50:39,017 INFO L87 Difference]: Start difference. First operand 4818 states. Second operand has 4364 states, 3113 states have (on average 1.332155477031802) internal successors, (4147), 3165 states have internal predecessors, (4147), 962 states have call successors, (962), 277 states have call predecessors, (962), 288 states have return successors, (1029), 963 states have call predecessors, (1029), 957 states have call successors, (1029) [2022-02-20 21:50:39,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:50:39,690 INFO L93 Difference]: Finished difference Result 4818 states and 7053 transitions. [2022-02-20 21:50:39,691 INFO L276 IsEmpty]: Start isEmpty. Operand 4818 states and 7053 transitions. [2022-02-20 21:50:39,710 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:50:39,710 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:50:39,718 INFO L74 IsIncluded]: Start isIncluded. First operand has 4364 states, 3113 states have (on average 1.332155477031802) internal successors, (4147), 3165 states have internal predecessors, (4147), 962 states have call successors, (962), 277 states have call predecessors, (962), 288 states have return successors, (1029), 963 states have call predecessors, (1029), 957 states have call successors, (1029) Second operand 4818 states. [2022-02-20 21:50:39,725 INFO L87 Difference]: Start difference. First operand has 4364 states, 3113 states have (on average 1.332155477031802) internal successors, (4147), 3165 states have internal predecessors, (4147), 962 states have call successors, (962), 277 states have call predecessors, (962), 288 states have return successors, (1029), 963 states have call predecessors, (1029), 957 states have call successors, (1029) Second operand 4818 states. [2022-02-20 21:50:40,414 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:50:40,414 INFO L93 Difference]: Finished difference Result 4818 states and 7053 transitions. [2022-02-20 21:50:40,414 INFO L276 IsEmpty]: Start isEmpty. Operand 4818 states and 7053 transitions. [2022-02-20 21:50:40,431 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:50:40,432 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:50:40,432 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:50:40,432 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:50:40,439 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4364 states, 3113 states have (on average 1.332155477031802) internal successors, (4147), 3165 states have internal predecessors, (4147), 962 states have call successors, (962), 277 states have call predecessors, (962), 288 states have return successors, (1029), 963 states have call predecessors, (1029), 957 states have call successors, (1029) [2022-02-20 21:50:41,321 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4364 states to 4364 states and 6138 transitions. [2022-02-20 21:50:41,322 INFO L78 Accepts]: Start accepts. Automaton has 4364 states and 6138 transitions. Word has length 184 [2022-02-20 21:50:41,322 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:50:41,322 INFO L470 AbstractCegarLoop]: Abstraction has 4364 states and 6138 transitions. [2022-02-20 21:50:41,323 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 11.8) internal successors, (59), 3 states have internal predecessors, (59), 2 states have call successors, (27), 3 states have call predecessors, (27), 1 states have return successors, (26), 1 states have call predecessors, (26), 1 states have call successors, (26) [2022-02-20 21:50:41,323 INFO L276 IsEmpty]: Start isEmpty. Operand 4364 states and 6138 transitions. [2022-02-20 21:50:41,325 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 186 [2022-02-20 21:50:41,325 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:50:41,325 INFO L514 BasicCegarLoop]: trace histogram [25, 25, 25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:50:41,325 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-02-20 21:50:41,325 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:50:41,326 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:50:41,326 INFO L85 PathProgramCache]: Analyzing trace with hash -1515497706, now seen corresponding path program 1 times [2022-02-20 21:50:41,326 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:50:41,326 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1277123323] [2022-02-20 21:50:41,326 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:50:41,326 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:50:41,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:41,485 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 21:50:41,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:41,500 INFO L290 TraceCheckUtils]: 0: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,500 INFO L290 TraceCheckUtils]: 1: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,500 INFO L290 TraceCheckUtils]: 2: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,501 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2721#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,501 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-02-20 21:50:41,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:41,510 INFO L290 TraceCheckUtils]: 0: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,510 INFO L290 TraceCheckUtils]: 1: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,510 INFO L290 TraceCheckUtils]: 2: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,511 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2723#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,511 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2022-02-20 21:50:41,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:41,518 INFO L290 TraceCheckUtils]: 0: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,519 INFO L290 TraceCheckUtils]: 1: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,519 INFO L290 TraceCheckUtils]: 2: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,519 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2725#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,520 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 20 [2022-02-20 21:50:41,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:41,535 INFO L290 TraceCheckUtils]: 0: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,536 INFO L290 TraceCheckUtils]: 1: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,536 INFO L290 TraceCheckUtils]: 2: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,536 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2727#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,537 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-02-20 21:50:41,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:41,544 INFO L290 TraceCheckUtils]: 0: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,544 INFO L290 TraceCheckUtils]: 1: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,544 INFO L290 TraceCheckUtils]: 2: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,545 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2729#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,545 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 32 [2022-02-20 21:50:41,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:41,551 INFO L290 TraceCheckUtils]: 0: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,551 INFO L290 TraceCheckUtils]: 1: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,552 INFO L290 TraceCheckUtils]: 2: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,552 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2731#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,552 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 38 [2022-02-20 21:50:41,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:41,566 INFO L290 TraceCheckUtils]: 0: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,566 INFO L290 TraceCheckUtils]: 1: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,566 INFO L290 TraceCheckUtils]: 2: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,567 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2733#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,567 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2022-02-20 21:50:41,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:41,573 INFO L290 TraceCheckUtils]: 0: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,574 INFO L290 TraceCheckUtils]: 1: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,574 INFO L290 TraceCheckUtils]: 2: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,574 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2735#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,575 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 50 [2022-02-20 21:50:41,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:41,581 INFO L290 TraceCheckUtils]: 0: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,581 INFO L290 TraceCheckUtils]: 1: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,582 INFO L290 TraceCheckUtils]: 2: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,582 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2737#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,582 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 56 [2022-02-20 21:50:41,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:41,589 INFO L290 TraceCheckUtils]: 0: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,590 INFO L290 TraceCheckUtils]: 1: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,590 INFO L290 TraceCheckUtils]: 2: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,590 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2739#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,591 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 62 [2022-02-20 21:50:41,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:41,597 INFO L290 TraceCheckUtils]: 0: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,597 INFO L290 TraceCheckUtils]: 1: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,597 INFO L290 TraceCheckUtils]: 2: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,598 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2741#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,598 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 68 [2022-02-20 21:50:41,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:41,606 INFO L290 TraceCheckUtils]: 0: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,606 INFO L290 TraceCheckUtils]: 1: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,606 INFO L290 TraceCheckUtils]: 2: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,607 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2743#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,607 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 74 [2022-02-20 21:50:41,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:41,614 INFO L290 TraceCheckUtils]: 0: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,615 INFO L290 TraceCheckUtils]: 1: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,615 INFO L290 TraceCheckUtils]: 2: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,615 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2745#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,616 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 80 [2022-02-20 21:50:41,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:41,623 INFO L290 TraceCheckUtils]: 0: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,623 INFO L290 TraceCheckUtils]: 1: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,624 INFO L290 TraceCheckUtils]: 2: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,624 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2747#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,624 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 86 [2022-02-20 21:50:41,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:41,632 INFO L290 TraceCheckUtils]: 0: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,633 INFO L290 TraceCheckUtils]: 1: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,634 INFO L290 TraceCheckUtils]: 2: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,634 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2749#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,634 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 92 [2022-02-20 21:50:41,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:41,642 INFO L290 TraceCheckUtils]: 0: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,643 INFO L290 TraceCheckUtils]: 1: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,643 INFO L290 TraceCheckUtils]: 2: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,643 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2751#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,644 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 98 [2022-02-20 21:50:41,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:41,653 INFO L290 TraceCheckUtils]: 0: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,653 INFO L290 TraceCheckUtils]: 1: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,653 INFO L290 TraceCheckUtils]: 2: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,654 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2753#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,654 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 104 [2022-02-20 21:50:41,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:41,665 INFO L290 TraceCheckUtils]: 0: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,665 INFO L290 TraceCheckUtils]: 1: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,665 INFO L290 TraceCheckUtils]: 2: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,666 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2755#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,666 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 110 [2022-02-20 21:50:41,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:41,673 INFO L290 TraceCheckUtils]: 0: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,674 INFO L290 TraceCheckUtils]: 1: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,674 INFO L290 TraceCheckUtils]: 2: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,674 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2757#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,675 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 116 [2022-02-20 21:50:41,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:41,682 INFO L290 TraceCheckUtils]: 0: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,682 INFO L290 TraceCheckUtils]: 1: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,683 INFO L290 TraceCheckUtils]: 2: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,683 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2759#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,683 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 122 [2022-02-20 21:50:41,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:41,691 INFO L290 TraceCheckUtils]: 0: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,691 INFO L290 TraceCheckUtils]: 1: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,691 INFO L290 TraceCheckUtils]: 2: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,692 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2761#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,692 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 128 [2022-02-20 21:50:41,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:41,699 INFO L290 TraceCheckUtils]: 0: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,699 INFO L290 TraceCheckUtils]: 1: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,699 INFO L290 TraceCheckUtils]: 2: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,700 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2763#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,700 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 134 [2022-02-20 21:50:41,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:41,708 INFO L290 TraceCheckUtils]: 0: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,708 INFO L290 TraceCheckUtils]: 1: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,708 INFO L290 TraceCheckUtils]: 2: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,709 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2765#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,709 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 140 [2022-02-20 21:50:41,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:41,717 INFO L290 TraceCheckUtils]: 0: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,717 INFO L290 TraceCheckUtils]: 1: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,717 INFO L290 TraceCheckUtils]: 2: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,718 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2767#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,723 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 147 [2022-02-20 21:50:41,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:41,731 INFO L290 TraceCheckUtils]: 0: Hoare triple {39776#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr867 := 0; {39668#true} is VALID [2022-02-20 21:50:41,732 INFO L290 TraceCheckUtils]: 1: Hoare triple {39668#true} assume !(#t~loopctr867 % 18446744073709551616 < #amount % 18446744073709551616); {39668#true} is VALID [2022-02-20 21:50:41,732 INFO L290 TraceCheckUtils]: 2: Hoare triple {39668#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {39668#true} is VALID [2022-02-20 21:50:41,732 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2769#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,733 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 169 [2022-02-20 21:50:41,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:50:41,740 INFO L290 TraceCheckUtils]: 0: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,740 INFO L290 TraceCheckUtils]: 1: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,741 INFO L290 TraceCheckUtils]: 2: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,741 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2987#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,757 INFO L290 TraceCheckUtils]: 0: Hoare triple {39668#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(84, 2);call #Ultimate.allocInit(9, 3);call #Ultimate.allocInit(10, 4);call #Ultimate.allocInit(38, 5);call #Ultimate.allocInit(42, 6);call #Ultimate.allocInit(28, 7);call #Ultimate.allocInit(8, 8);call #Ultimate.allocInit(45, 9);call #Ultimate.allocInit(38, 10);call #Ultimate.allocInit(29, 11);call #Ultimate.allocInit(8, 12);call #Ultimate.allocInit(45, 13);call #Ultimate.allocInit(48, 14);call #Ultimate.allocInit(44, 15);call #Ultimate.allocInit(49, 16);call #Ultimate.allocInit(8, 17);call #Ultimate.allocInit(23, 18);call #Ultimate.allocInit(220, 19);call #Ultimate.allocInit(47, 20);call #Ultimate.allocInit(47, 21);call #Ultimate.allocInit(8, 22);call #Ultimate.allocInit(26, 23);call #Ultimate.allocInit(220, 24);call #Ultimate.allocInit(26, 25);call #Ultimate.allocInit(26, 26);call #Ultimate.allocInit(62, 27);call #Ultimate.allocInit(60, 28);call #Ultimate.allocInit(36, 29);call #Ultimate.allocInit(48, 30);call #Ultimate.allocInit(61, 31);call #Ultimate.allocInit(55, 32);call #Ultimate.allocInit(58, 33);call #Ultimate.allocInit(37, 34);call #Ultimate.allocInit(46, 35);call #Ultimate.allocInit(52, 36);call #Ultimate.allocInit(44, 37);call #Ultimate.allocInit(33, 38);call #Ultimate.allocInit(10, 39);call #Ultimate.allocInit(46, 40);call #Ultimate.allocInit(23, 41);call #Ultimate.allocInit(27, 42);call #Ultimate.allocInit(10, 43);call #Ultimate.allocInit(24, 44);call #Ultimate.allocInit(10, 45);call #Ultimate.allocInit(48, 46);call #Ultimate.allocInit(45, 47);call #Ultimate.allocInit(19, 48);call #Ultimate.allocInit(21, 49);call #Ultimate.allocInit(52, 50);call #Ultimate.allocInit(6, 51);call write~init~int(37, 51, 0, 1);call write~init~int(46, 51, 1, 1);call write~init~int(42, 51, 2, 1);call write~init~int(115, 51, 3, 1);call write~init~int(10, 51, 4, 1);call write~init~int(0, 51, 5, 1);call #Ultimate.allocInit(12, 52);call #Ultimate.allocInit(14, 53);call #Ultimate.allocInit(22, 54);call #Ultimate.allocInit(11, 55);call #Ultimate.allocInit(11, 56);call #Ultimate.allocInit(13, 57);call #Ultimate.allocInit(28, 58);call #Ultimate.allocInit(35, 59);call #Ultimate.allocInit(13, 60);call #Ultimate.allocInit(10, 61);call #Ultimate.allocInit(42, 62);call #Ultimate.allocInit(10, 63);call #Ultimate.allocInit(16, 64);call #Ultimate.allocInit(4, 65);call write~init~int(37, 65, 0, 1);call write~init~int(100, 65, 1, 1);call write~init~int(10, 65, 2, 1);call write~init~int(0, 65, 3, 1);call #Ultimate.allocInit(23, 66);call #Ultimate.allocInit(8, 67);call #Ultimate.allocInit(12, 68);call #Ultimate.allocInit(220, 69);call #Ultimate.allocInit(40, 70);call #Ultimate.allocInit(40, 71);call #Ultimate.allocInit(12, 72);call #Ultimate.allocInit(8, 73);call #Ultimate.allocInit(12, 74);call #Ultimate.allocInit(220, 75);call #Ultimate.allocInit(38, 76);call #Ultimate.allocInit(38, 77);call #Ultimate.allocInit(12, 78);call #Ultimate.allocInit(8, 79);call #Ultimate.allocInit(12, 80);call #Ultimate.allocInit(220, 81);call #Ultimate.allocInit(23, 82);call #Ultimate.allocInit(23, 83);call #Ultimate.allocInit(12, 84);call #Ultimate.allocInit(43, 85);call #Ultimate.allocInit(12, 86);call #Ultimate.allocInit(43, 87);call #Ultimate.allocInit(30, 88);call #Ultimate.allocInit(44, 89);call #Ultimate.allocInit(43, 90);call #Ultimate.allocInit(30, 91);call #Ultimate.allocInit(25, 92);call #Ultimate.allocInit(24, 93);call #Ultimate.allocInit(8, 94);call #Ultimate.allocInit(27, 95);call #Ultimate.allocInit(220, 96);call #Ultimate.allocInit(20, 97);call #Ultimate.allocInit(20, 98);call #Ultimate.allocInit(30, 99);call #Ultimate.allocInit(54, 100);call #Ultimate.allocInit(50, 101);call #Ultimate.allocInit(40, 102);call #Ultimate.allocInit(50, 103);call #Ultimate.allocInit(39, 104);call #Ultimate.allocInit(68, 105);call #Ultimate.allocInit(60, 106);call #Ultimate.allocInit(38, 107);call #Ultimate.allocInit(37, 108);call #Ultimate.allocInit(42, 109);call #Ultimate.allocInit(22, 110);call #Ultimate.allocInit(42, 111);call #Ultimate.allocInit(22, 112);call #Ultimate.allocInit(40, 113);call #Ultimate.allocInit(5, 114);call write~init~int(37, 114, 0, 1);call write~init~int(48, 114, 1, 1);call write~init~int(50, 114, 2, 1);call write~init~int(120, 114, 3, 1);call write~init~int(0, 114, 4, 1);call #Ultimate.allocInit(8, 115);call #Ultimate.allocInit(24, 116);call #Ultimate.allocInit(220, 117);call #Ultimate.allocInit(50, 118);call #Ultimate.allocInit(50, 119);call #Ultimate.allocInit(41, 120);call #Ultimate.allocInit(8, 121);call #Ultimate.allocInit(22, 122);call #Ultimate.allocInit(220, 123);call #Ultimate.allocInit(24, 124);call #Ultimate.allocInit(24, 125);call #Ultimate.allocInit(38, 126);call #Ultimate.allocInit(27, 127);call #Ultimate.allocInit(39, 128);call #Ultimate.allocInit(72, 129);call #Ultimate.allocInit(10, 130);call #Ultimate.allocInit(16, 131);call #Ultimate.allocInit(50, 132);call #Ultimate.allocInit(8, 133);call #Ultimate.allocInit(8, 134);~ldv_state_variable_8~0 := 0;~ldv_state_variable_10~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ims_pcu_attr_serial_number_group1~0.base, ~ims_pcu_attr_serial_number_group1~0.offset := 0, 0;~ldv_state_variable_2~0 := 0;~ims_pcu_attr_bl_version_group0~0.base, ~ims_pcu_attr_bl_version_group0~0.offset := 0, 0;~ims_pcu_attr_fw_version_group1~0.base, ~ims_pcu_attr_fw_version_group1~0.offset := 0, 0;~usb_counter~0 := 0;~ldv_state_variable_11~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ims_pcu_attr_reset_reason_group1~0.base, ~ims_pcu_attr_reset_reason_group1~0.offset := 0, 0;~ims_pcu_attr_date_of_manufacturing_group0~0.base, ~ims_pcu_attr_date_of_manufacturing_group0~0.offset := 0, 0;~ims_pcu_attr_reset_reason_group0~0.base, ~ims_pcu_attr_reset_reason_group0~0.offset := 0, 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_3~0 := 0;~ims_pcu_attr_date_of_manufacturing_group1~0.base, ~ims_pcu_attr_date_of_manufacturing_group1~0.offset := 0, 0;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := 0, 0;~ref_cnt~0 := 0;~ims_pcu_attr_part_number_group1~0.base, ~ims_pcu_attr_part_number_group1~0.offset := 0, 0;~ims_pcu_attr_fw_version_group0~0.base, ~ims_pcu_attr_fw_version_group0~0.offset := 0, 0;~ldv_state_variable_1~0 := 0;~ims_pcu_attr_part_number_group0~0.base, ~ims_pcu_attr_part_number_group0~0.offset := 0, 0;~ims_pcu_attr_serial_number_group0~0.base, ~ims_pcu_attr_serial_number_group0~0.offset := 0, 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;~ims_pcu_attr_bl_version_group1~0.base, ~ims_pcu_attr_bl_version_group1~0.offset := 0, 0;~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset := 135, 0;call #Ultimate.allocInit(14, 135);call write~init~int(0, ~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, 2);call write~init~int(540, ~#ims_pcu_keymap_1~0.base, 2 + ~#ims_pcu_keymap_1~0.offset, 2);call write~init~int(539, ~#ims_pcu_keymap_1~0.base, 4 + ~#ims_pcu_keymap_1~0.offset, 2);call write~init~int(542, ~#ims_pcu_keymap_1~0.base, 6 + ~#ims_pcu_keymap_1~0.offset, 2);call write~init~int(115, ~#ims_pcu_keymap_1~0.base, 8 + ~#ims_pcu_keymap_1~0.offset, 2);call write~init~int(114, ~#ims_pcu_keymap_1~0.base, 10 + ~#ims_pcu_keymap_1~0.offset, 2);call write~init~int(358, ~#ims_pcu_keymap_1~0.base, 12 + ~#ims_pcu_keymap_1~0.offset, 2);~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset := 136, 0;call #Ultimate.allocInit(14, 136);call write~init~int(0, ~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_2~0.base, 2 + ~#ims_pcu_keymap_2~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_2~0.base, 4 + ~#ims_pcu_keymap_2~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_2~0.base, 6 + ~#ims_pcu_keymap_2~0.offset, 2);call write~init~int(115, ~#ims_pcu_keymap_2~0.base, 8 + ~#ims_pcu_keymap_2~0.offset, 2);call write~init~int(114, ~#ims_pcu_keymap_2~0.base, 10 + ~#ims_pcu_keymap_2~0.offset, 2);call write~init~int(358, ~#ims_pcu_keymap_2~0.base, 12 + ~#ims_pcu_keymap_2~0.offset, 2);~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset := 137, 0;call #Ultimate.allocInit(38, 137);call write~init~int(0, ~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(172, ~#ims_pcu_keymap_3~0.base, 2 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(541, ~#ims_pcu_keymap_3~0.base, 4 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(542, ~#ims_pcu_keymap_3~0.base, 6 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(115, ~#ims_pcu_keymap_3~0.base, 8 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(114, ~#ims_pcu_keymap_3~0.base, 10 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(431, ~#ims_pcu_keymap_3~0.base, 12 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_3~0.base, 14 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_3~0.base, 16 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_3~0.base, 18 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_3~0.base, 20 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_3~0.base, 22 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_3~0.base, 24 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_3~0.base, 26 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_3~0.base, 28 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_3~0.base, 30 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_3~0.base, 32 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_3~0.base, 34 + ~#ims_pcu_keymap_3~0.offset, 2);call write~init~int(164, ~#ims_pcu_keymap_3~0.base, 36 + ~#ims_pcu_keymap_3~0.offset, 2);~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset := 138, 0;call #Ultimate.allocInit(38, 138);call write~init~int(0, ~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(540, ~#ims_pcu_keymap_4~0.base, 2 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(539, ~#ims_pcu_keymap_4~0.base, 4 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(542, ~#ims_pcu_keymap_4~0.base, 6 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(115, ~#ims_pcu_keymap_4~0.base, 8 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(114, ~#ims_pcu_keymap_4~0.base, 10 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(358, ~#ims_pcu_keymap_4~0.base, 12 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_4~0.base, 14 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_4~0.base, 16 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_4~0.base, 18 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_4~0.base, 20 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_4~0.base, 22 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_4~0.base, 24 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_4~0.base, 26 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_4~0.base, 28 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_4~0.base, 30 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_4~0.base, 32 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(0, ~#ims_pcu_keymap_4~0.base, 34 + ~#ims_pcu_keymap_4~0.offset, 2);call write~init~int(164, ~#ims_pcu_keymap_4~0.base, 36 + ~#ims_pcu_keymap_4~0.offset, 2);~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset := 139, 0;call #Ultimate.allocInit(8, 139);call write~init~int(0, ~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, 2);call write~init~int(540, ~#ims_pcu_keymap_5~0.base, 2 + ~#ims_pcu_keymap_5~0.offset, 2);call write~init~int(539, ~#ims_pcu_keymap_5~0.base, 4 + ~#ims_pcu_keymap_5~0.offset, 2);call write~init~int(542, ~#ims_pcu_keymap_5~0.base, 6 + ~#ims_pcu_keymap_5~0.offset, 2);~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset := 140, 0;call #Ultimate.allocInit(102, 140);call write~init~$Pointer$(0, 0, ~#ims_pcu_device_info~0.base, ~#ims_pcu_device_info~0.offset, 8);call write~init~int(0, ~#ims_pcu_device_info~0.base, 8 + ~#ims_pcu_device_info~0.offset, 8);call write~init~int(0, ~#ims_pcu_device_info~0.base, 16 + ~#ims_pcu_device_info~0.offset, 1);call write~init~$Pointer$(~#ims_pcu_keymap_1~0.base, ~#ims_pcu_keymap_1~0.offset, ~#ims_pcu_device_info~0.base, 17 + ~#ims_pcu_device_info~0.offset, 8);call write~init~int(7, ~#ims_pcu_device_info~0.base, 25 + ~#ims_pcu_device_info~0.offset, 8);call write~init~int(1, ~#ims_pcu_device_info~0.base, 33 + ~#ims_pcu_device_info~0.offset, 1);call write~init~$Pointer$(~#ims_pcu_keymap_2~0.base, ~#ims_pcu_keymap_2~0.offset, ~#ims_pcu_device_info~0.base, 34 + ~#ims_pcu_device_info~0.offset, 8);call write~init~int(7, ~#ims_pcu_device_info~0.base, 42 + ~#ims_pcu_device_info~0.offset, 8);call write~init~int(1, ~#ims_pcu_device_info~0.base, 50 + ~#ims_pcu_device_info~0.offset, 1);call write~init~$Pointer$(~#ims_pcu_keymap_3~0.base, ~#ims_pcu_keymap_3~0.offset, ~#ims_pcu_device_info~0.base, 51 + ~#ims_pcu_device_info~0.offset, 8);call write~init~int(19, ~#ims_pcu_device_info~0.base, 59 + ~#ims_pcu_device_info~0.offset, 8);call write~init~int(1, ~#ims_pcu_device_info~0.base, 67 + ~#ims_pcu_device_info~0.offset, 1);call write~init~$Pointer$(~#ims_pcu_keymap_4~0.base, ~#ims_pcu_keymap_4~0.offset, ~#ims_pcu_device_info~0.base, 68 + ~#ims_pcu_device_info~0.offset, 8);call write~init~int(19, ~#ims_pcu_device_info~0.base, 76 + ~#ims_pcu_device_info~0.offset, 8);call write~init~int(1, ~#ims_pcu_device_info~0.base, 84 + ~#ims_pcu_device_info~0.offset, 1);call write~init~$Pointer$(~#ims_pcu_keymap_5~0.base, ~#ims_pcu_keymap_5~0.offset, ~#ims_pcu_device_info~0.base, 85 + ~#ims_pcu_device_info~0.offset, 8);call write~init~int(4, ~#ims_pcu_device_info~0.base, 93 + ~#ims_pcu_device_info~0.offset, 8);call write~init~int(0, ~#ims_pcu_device_info~0.base, 101 + ~#ims_pcu_device_info~0.offset, 1);~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset := 141, 0;call #Ultimate.allocInit(55, 141);call write~init~$Pointer$(52, 0, ~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, 8);call write~init~int(420, ~#ims_pcu_attr_part_number~0.base, 8 + ~#ims_pcu_attr_part_number~0.offset, 2);call write~init~int(0, ~#ims_pcu_attr_part_number~0.base, 10 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~init~$Pointer$(0, 0, ~#ims_pcu_attr_part_number~0.base, 11 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~init~int(0, ~#ims_pcu_attr_part_number~0.base, 19 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_part_number~0.base, 20 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_part_number~0.base, 21 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_part_number~0.base, 22 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_part_number~0.base, 23 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_part_number~0.base, 24 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_part_number~0.base, 25 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_part_number~0.base, 26 + ~#ims_pcu_attr_part_number~0.offset, 1);call write~init~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_part_number~0.base, 27 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~init~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_part_number~0.base, 35 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~init~int(21, ~#ims_pcu_attr_part_number~0.base, 43 + ~#ims_pcu_attr_part_number~0.offset, 8);call write~init~int(15, ~#ims_pcu_attr_part_number~0.base, 51 + ~#ims_pcu_attr_part_number~0.offset, 4);~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset := 142, 0;call #Ultimate.allocInit(55, 142);call write~init~$Pointer$(53, 0, ~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, 8);call write~init~int(420, ~#ims_pcu_attr_serial_number~0.base, 8 + ~#ims_pcu_attr_serial_number~0.offset, 2);call write~init~int(0, ~#ims_pcu_attr_serial_number~0.base, 10 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~init~$Pointer$(0, 0, ~#ims_pcu_attr_serial_number~0.base, 11 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~init~int(0, ~#ims_pcu_attr_serial_number~0.base, 19 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_serial_number~0.base, 20 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_serial_number~0.base, 21 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_serial_number~0.base, 22 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_serial_number~0.base, 23 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_serial_number~0.base, 24 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_serial_number~0.base, 25 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_serial_number~0.base, 26 + ~#ims_pcu_attr_serial_number~0.offset, 1);call write~init~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_serial_number~0.base, 27 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~init~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_serial_number~0.base, 35 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~init~int(36, ~#ims_pcu_attr_serial_number~0.base, 43 + ~#ims_pcu_attr_serial_number~0.offset, 8);call write~init~int(8, ~#ims_pcu_attr_serial_number~0.base, 51 + ~#ims_pcu_attr_serial_number~0.offset, 4);~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset := 143, 0;call #Ultimate.allocInit(55, 143);call write~init~$Pointer$(54, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~init~int(420, ~#ims_pcu_attr_date_of_manufacturing~0.base, 8 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 2);call write~init~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 10 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~init~$Pointer$(0, 0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 11 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~init~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 19 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 20 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 21 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 22 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 23 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 24 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 25 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_date_of_manufacturing~0.base, 26 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 1);call write~init~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 27 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~init~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_date_of_manufacturing~0.base, 35 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~init~int(44, ~#ims_pcu_attr_date_of_manufacturing~0.base, 43 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 8);call write~init~int(8, ~#ims_pcu_attr_date_of_manufacturing~0.base, 51 + ~#ims_pcu_attr_date_of_manufacturing~0.offset, 4);~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset := 144, 0;call #Ultimate.allocInit(55, 144);call write~init~$Pointer$(55, 0, ~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, 8);call write~init~int(292, ~#ims_pcu_attr_fw_version~0.base, 8 + ~#ims_pcu_attr_fw_version~0.offset, 2);call write~init~int(0, ~#ims_pcu_attr_fw_version~0.base, 10 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~init~$Pointer$(0, 0, ~#ims_pcu_attr_fw_version~0.base, 11 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~init~int(0, ~#ims_pcu_attr_fw_version~0.base, 19 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_fw_version~0.base, 20 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_fw_version~0.base, 21 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_fw_version~0.base, 22 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_fw_version~0.base, 23 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_fw_version~0.base, 24 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_fw_version~0.base, 25 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_fw_version~0.base, 26 + ~#ims_pcu_attr_fw_version~0.offset, 1);call write~init~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_fw_version~0.base, 27 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~init~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_fw_version~0.base, 35 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~init~int(52, ~#ims_pcu_attr_fw_version~0.base, 43 + ~#ims_pcu_attr_fw_version~0.offset, 8);call write~init~int(10, ~#ims_pcu_attr_fw_version~0.base, 51 + ~#ims_pcu_attr_fw_version~0.offset, 4);~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset := 145, 0;call #Ultimate.allocInit(55, 145);call write~init~$Pointer$(56, 0, ~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, 8);call write~init~int(292, ~#ims_pcu_attr_bl_version~0.base, 8 + ~#ims_pcu_attr_bl_version~0.offset, 2);call write~init~int(0, ~#ims_pcu_attr_bl_version~0.base, 10 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~init~$Pointer$(0, 0, ~#ims_pcu_attr_bl_version~0.base, 11 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~init~int(0, ~#ims_pcu_attr_bl_version~0.base, 19 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_bl_version~0.base, 20 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_bl_version~0.base, 21 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_bl_version~0.base, 22 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_bl_version~0.base, 23 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_bl_version~0.base, 24 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_bl_version~0.base, 25 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_bl_version~0.base, 26 + ~#ims_pcu_attr_bl_version~0.offset, 1);call write~init~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_bl_version~0.base, 27 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~init~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_bl_version~0.base, 35 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~init~int(62, ~#ims_pcu_attr_bl_version~0.base, 43 + ~#ims_pcu_attr_bl_version~0.offset, 8);call write~init~int(10, ~#ims_pcu_attr_bl_version~0.base, 51 + ~#ims_pcu_attr_bl_version~0.offset, 4);~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset := 146, 0;call #Ultimate.allocInit(55, 146);call write~init~$Pointer$(57, 0, ~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~init~int(292, ~#ims_pcu_attr_reset_reason~0.base, 8 + ~#ims_pcu_attr_reset_reason~0.offset, 2);call write~init~int(0, ~#ims_pcu_attr_reset_reason~0.base, 10 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~init~$Pointer$(0, 0, ~#ims_pcu_attr_reset_reason~0.base, 11 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~init~int(0, ~#ims_pcu_attr_reset_reason~0.base, 19 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_reset_reason~0.base, 20 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_reset_reason~0.base, 21 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_reset_reason~0.base, 22 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_reset_reason~0.base, 23 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_reset_reason~0.base, 24 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_reset_reason~0.base, 25 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~init~int(0, ~#ims_pcu_attr_reset_reason~0.base, 26 + ~#ims_pcu_attr_reset_reason~0.offset, 1);call write~init~$Pointer$(#funAddr~ims_pcu_attribute_show.base, #funAddr~ims_pcu_attribute_show.offset, ~#ims_pcu_attr_reset_reason~0.base, 27 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~init~$Pointer$(#funAddr~ims_pcu_attribute_store.base, #funAddr~ims_pcu_attribute_store.offset, ~#ims_pcu_attr_reset_reason~0.base, 35 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~init~int(72, ~#ims_pcu_attr_reset_reason~0.base, 43 + ~#ims_pcu_attr_reset_reason~0.offset, 8);call write~init~int(3, ~#ims_pcu_attr_reset_reason~0.base, 51 + ~#ims_pcu_attr_reset_reason~0.offset, 4);~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset := 147, 0;call #Ultimate.allocInit(43, 147);call write~init~$Pointer$(60, 0, ~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, 8);call write~init~int(128, ~#dev_attr_reset_device~0.base, 8 + ~#dev_attr_reset_device~0.offset, 2);call write~init~int(0, ~#dev_attr_reset_device~0.base, 10 + ~#dev_attr_reset_device~0.offset, 1);call write~init~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 11 + ~#dev_attr_reset_device~0.offset, 8);call write~init~int(0, ~#dev_attr_reset_device~0.base, 19 + ~#dev_attr_reset_device~0.offset, 1);call write~init~int(0, ~#dev_attr_reset_device~0.base, 20 + ~#dev_attr_reset_device~0.offset, 1);call write~init~int(0, ~#dev_attr_reset_device~0.base, 21 + ~#dev_attr_reset_device~0.offset, 1);call write~init~int(0, ~#dev_attr_reset_device~0.base, 22 + ~#dev_attr_reset_device~0.offset, 1);call write~init~int(0, ~#dev_attr_reset_device~0.base, 23 + ~#dev_attr_reset_device~0.offset, 1);call write~init~int(0, ~#dev_attr_reset_device~0.base, 24 + ~#dev_attr_reset_device~0.offset, 1);call write~init~int(0, ~#dev_attr_reset_device~0.base, 25 + ~#dev_attr_reset_device~0.offset, 1);call write~init~int(0, ~#dev_attr_reset_device~0.base, 26 + ~#dev_attr_reset_device~0.offset, 1);call write~init~$Pointer$(0, 0, ~#dev_attr_reset_device~0.base, 27 + ~#dev_attr_reset_device~0.offset, 8);call write~init~$Pointer$(#funAddr~ims_pcu_reset_device.base, #funAddr~ims_pcu_reset_device.offset, ~#dev_attr_reset_device~0.base, 35 + ~#dev_attr_reset_device~0.offset, 8);~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset := 148, 0;call #Ultimate.allocInit(43, 148);call write~init~$Pointer$(64, 0, ~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, 8);call write~init~int(128, ~#dev_attr_update_firmware~0.base, 8 + ~#dev_attr_update_firmware~0.offset, 2);call write~init~int(0, ~#dev_attr_update_firmware~0.base, 10 + ~#dev_attr_update_firmware~0.offset, 1);call write~init~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 11 + ~#dev_attr_update_firmware~0.offset, 8);call write~init~int(0, ~#dev_attr_update_firmware~0.base, 19 + ~#dev_attr_update_firmware~0.offset, 1);call write~init~int(0, ~#dev_attr_update_firmware~0.base, 20 + ~#dev_attr_update_firmware~0.offset, 1);call write~init~int(0, ~#dev_attr_update_firmware~0.base, 21 + ~#dev_attr_update_firmware~0.offset, 1);call write~init~int(0, ~#dev_attr_update_firmware~0.base, 22 + ~#dev_attr_update_firmware~0.offset, 1);call write~init~int(0, ~#dev_attr_update_firmware~0.base, 23 + ~#dev_attr_update_firmware~0.offset, 1);call write~init~int(0, ~#dev_attr_update_firmware~0.base, 24 + ~#dev_attr_update_firmware~0.offset, 1);call write~init~int(0, ~#dev_attr_update_firmware~0.base, 25 + ~#dev_attr_update_firmware~0.offset, 1);call write~init~int(0, ~#dev_attr_update_firmware~0.base, 26 + ~#dev_attr_update_firmware~0.offset, 1);call write~init~$Pointer$(0, 0, ~#dev_attr_update_firmware~0.base, 27 + ~#dev_attr_update_firmware~0.offset, 8);call write~init~$Pointer$(#funAddr~ims_pcu_update_firmware_store.base, #funAddr~ims_pcu_update_firmware_store.offset, ~#dev_attr_update_firmware~0.base, 35 + ~#dev_attr_update_firmware~0.offset, 8);~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset := 149, 0;call #Ultimate.allocInit(43, 149);call write~init~$Pointer$(66, 0, ~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, 8);call write~init~int(292, ~#dev_attr_update_firmware_status~0.base, 8 + ~#dev_attr_update_firmware_status~0.offset, 2);call write~init~int(0, ~#dev_attr_update_firmware_status~0.base, 10 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~init~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 11 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~init~int(0, ~#dev_attr_update_firmware_status~0.base, 19 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~init~int(0, ~#dev_attr_update_firmware_status~0.base, 20 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~init~int(0, ~#dev_attr_update_firmware_status~0.base, 21 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~init~int(0, ~#dev_attr_update_firmware_status~0.base, 22 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~init~int(0, ~#dev_attr_update_firmware_status~0.base, 23 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~init~int(0, ~#dev_attr_update_firmware_status~0.base, 24 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~init~int(0, ~#dev_attr_update_firmware_status~0.base, 25 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~init~int(0, ~#dev_attr_update_firmware_status~0.base, 26 + ~#dev_attr_update_firmware_status~0.offset, 1);call write~init~$Pointer$(#funAddr~ims_pcu_update_firmware_status_show.base, #funAddr~ims_pcu_update_firmware_status_show.offset, ~#dev_attr_update_firmware_status~0.base, 27 + ~#dev_attr_update_firmware_status~0.offset, 8);call write~init~$Pointer$(0, 0, ~#dev_attr_update_firmware_status~0.base, 35 + ~#dev_attr_update_firmware_status~0.offset, 8);~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset := 150, 0;call #Ultimate.allocInit(80, 150);call write~init~$Pointer$(~#ims_pcu_attr_part_number~0.base, ~#ims_pcu_attr_part_number~0.offset, ~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, 8);call write~init~$Pointer$(~#ims_pcu_attr_serial_number~0.base, ~#ims_pcu_attr_serial_number~0.offset, ~#ims_pcu_attrs~0.base, 8 + ~#ims_pcu_attrs~0.offset, 8);call write~init~$Pointer$(~#ims_pcu_attr_date_of_manufacturing~0.base, ~#ims_pcu_attr_date_of_manufacturing~0.offset, ~#ims_pcu_attrs~0.base, 16 + ~#ims_pcu_attrs~0.offset, 8);call write~init~$Pointer$(~#ims_pcu_attr_fw_version~0.base, ~#ims_pcu_attr_fw_version~0.offset, ~#ims_pcu_attrs~0.base, 24 + ~#ims_pcu_attrs~0.offset, 8);call write~init~$Pointer$(~#ims_pcu_attr_bl_version~0.base, ~#ims_pcu_attr_bl_version~0.offset, ~#ims_pcu_attrs~0.base, 32 + ~#ims_pcu_attrs~0.offset, 8);call write~init~$Pointer$(~#ims_pcu_attr_reset_reason~0.base, ~#ims_pcu_attr_reset_reason~0.offset, ~#ims_pcu_attrs~0.base, 40 + ~#ims_pcu_attrs~0.offset, 8);call write~init~$Pointer$(~#dev_attr_reset_device~0.base, ~#dev_attr_reset_device~0.offset, ~#ims_pcu_attrs~0.base, 48 + ~#ims_pcu_attrs~0.offset, 8);call write~init~$Pointer$(~#dev_attr_update_firmware~0.base, ~#dev_attr_update_firmware~0.offset, ~#ims_pcu_attrs~0.base, 56 + ~#ims_pcu_attrs~0.offset, 8);call write~init~$Pointer$(~#dev_attr_update_firmware_status~0.base, ~#dev_attr_update_firmware_status~0.offset, ~#ims_pcu_attrs~0.base, 64 + ~#ims_pcu_attrs~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_attrs~0.base, 72 + ~#ims_pcu_attrs~0.offset, 8);~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset := 151, 0;call #Ultimate.allocInit(32, 151);call write~init~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, ~#ims_pcu_attr_group~0.offset, 8);call write~init~$Pointer$(#funAddr~ims_pcu_is_attr_visible.base, #funAddr~ims_pcu_is_attr_visible.offset, ~#ims_pcu_attr_group~0.base, 8 + ~#ims_pcu_attr_group~0.offset, 8);call write~init~$Pointer$(~#ims_pcu_attrs~0.base, ~#ims_pcu_attrs~0.offset, ~#ims_pcu_attr_group~0.base, 16 + ~#ims_pcu_attr_group~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_attr_group~0.base, 24 + ~#ims_pcu_attr_group~0.offset, 8);~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset := 152, 0;call #Ultimate.allocInit(75, 152);call write~init~int(899, ~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, 2);call write~init~int(1240, ~#ims_pcu_id_table~0.base, 2 + ~#ims_pcu_id_table~0.offset, 2);call write~init~int(130, ~#ims_pcu_id_table~0.base, 4 + ~#ims_pcu_id_table~0.offset, 2);call write~init~int(0, ~#ims_pcu_id_table~0.base, 6 + ~#ims_pcu_id_table~0.offset, 2);call write~init~int(0, ~#ims_pcu_id_table~0.base, 8 + ~#ims_pcu_id_table~0.offset, 2);call write~init~int(0, ~#ims_pcu_id_table~0.base, 10 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(0, ~#ims_pcu_id_table~0.base, 11 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(0, ~#ims_pcu_id_table~0.base, 12 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(2, ~#ims_pcu_id_table~0.base, 13 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(2, ~#ims_pcu_id_table~0.base, 14 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(1, ~#ims_pcu_id_table~0.base, 15 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(0, ~#ims_pcu_id_table~0.base, 16 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(0, ~#ims_pcu_id_table~0.base, 17 + ~#ims_pcu_id_table~0.offset, 8);call write~init~int(899, ~#ims_pcu_id_table~0.base, 25 + ~#ims_pcu_id_table~0.offset, 2);call write~init~int(1240, ~#ims_pcu_id_table~0.base, 27 + ~#ims_pcu_id_table~0.offset, 2);call write~init~int(131, ~#ims_pcu_id_table~0.base, 29 + ~#ims_pcu_id_table~0.offset, 2);call write~init~int(0, ~#ims_pcu_id_table~0.base, 31 + ~#ims_pcu_id_table~0.offset, 2);call write~init~int(0, ~#ims_pcu_id_table~0.base, 33 + ~#ims_pcu_id_table~0.offset, 2);call write~init~int(0, ~#ims_pcu_id_table~0.base, 35 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(0, ~#ims_pcu_id_table~0.base, 36 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(0, ~#ims_pcu_id_table~0.base, 37 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(2, ~#ims_pcu_id_table~0.base, 38 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(2, ~#ims_pcu_id_table~0.base, 39 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(1, ~#ims_pcu_id_table~0.base, 40 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(0, ~#ims_pcu_id_table~0.base, 41 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(1, ~#ims_pcu_id_table~0.base, 42 + ~#ims_pcu_id_table~0.offset, 8);call write~init~int(0, ~#ims_pcu_id_table~0.base, 50 + ~#ims_pcu_id_table~0.offset, 2);call write~init~int(0, ~#ims_pcu_id_table~0.base, 52 + ~#ims_pcu_id_table~0.offset, 2);call write~init~int(0, ~#ims_pcu_id_table~0.base, 54 + ~#ims_pcu_id_table~0.offset, 2);call write~init~int(0, ~#ims_pcu_id_table~0.base, 56 + ~#ims_pcu_id_table~0.offset, 2);call write~init~int(0, ~#ims_pcu_id_table~0.base, 58 + ~#ims_pcu_id_table~0.offset, 2);call write~init~int(0, ~#ims_pcu_id_table~0.base, 60 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(0, ~#ims_pcu_id_table~0.base, 61 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(0, ~#ims_pcu_id_table~0.base, 62 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(0, ~#ims_pcu_id_table~0.base, 63 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(0, ~#ims_pcu_id_table~0.base, 64 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(0, ~#ims_pcu_id_table~0.base, 65 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(0, ~#ims_pcu_id_table~0.base, 66 + ~#ims_pcu_id_table~0.offset, 1);call write~init~int(0, ~#ims_pcu_id_table~0.base, 67 + ~#ims_pcu_id_table~0.offset, 8);~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset := 153, 0;call #Ultimate.allocInit(285, 153);call write~init~$Pointer$(133, 0, ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~ims_pcu_probe.base, #funAddr~ims_pcu_probe.offset, ~#ims_pcu_driver~0.base, 8 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~ims_pcu_disconnect.base, #funAddr~ims_pcu_disconnect.offset, ~#ims_pcu_driver~0.base, 16 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 24 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~ims_pcu_suspend.base, #funAddr~ims_pcu_suspend.offset, ~#ims_pcu_driver~0.base, 32 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 40 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~ims_pcu_resume.base, #funAddr~ims_pcu_resume.offset, ~#ims_pcu_driver~0.base, 48 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 56 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 64 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(~#ims_pcu_id_table~0.base, ~#ims_pcu_id_table~0.offset, ~#ims_pcu_driver~0.base, 72 + ~#ims_pcu_driver~0.offset, 8);call write~init~int(0, ~#ims_pcu_driver~0.base, 80 + ~#ims_pcu_driver~0.offset, 4);call write~init~int(0, ~#ims_pcu_driver~0.base, 84 + ~#ims_pcu_driver~0.offset, 4);call write~init~int(0, ~#ims_pcu_driver~0.base, 88 + ~#ims_pcu_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 92 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 100 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 108 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 116 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 124 + ~#ims_pcu_driver~0.offset, 8);call write~init~int(0, ~#ims_pcu_driver~0.base, 132 + ~#ims_pcu_driver~0.offset, 4);call write~init~int(0, ~#ims_pcu_driver~0.base, 136 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 148 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 156 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 164 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 172 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 180 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 188 + ~#ims_pcu_driver~0.offset, 8);call write~init~int(0, ~#ims_pcu_driver~0.base, 196 + ~#ims_pcu_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 197 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 205 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 213 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 221 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 229 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 237 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 245 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 253 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 261 + ~#ims_pcu_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ims_pcu_driver~0.base, 269 + ~#ims_pcu_driver~0.offset, 8);call write~init~int(0, ~#ims_pcu_driver~0.base, 277 + ~#ims_pcu_driver~0.offset, 4);call write~init~int(0, ~#ims_pcu_driver~0.base, 281 + ~#ims_pcu_driver~0.offset, 1);call write~init~int(0, ~#ims_pcu_driver~0.base, 282 + ~#ims_pcu_driver~0.offset, 1);call write~init~int(0, ~#ims_pcu_driver~0.base, 283 + ~#ims_pcu_driver~0.offset, 1);call write~init~int(0, ~#ims_pcu_driver~0.base, 284 + ~#ims_pcu_driver~0.offset, 1);~ldv_retval_0~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_retval_2~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,759 INFO L290 TraceCheckUtils]: 1: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet742#1, main_#t~ret743#1.base, main_#t~ret743#1.offset, main_#t~ret744#1.base, main_#t~ret744#1.offset, main_#t~nondet745#1, main_#t~ret746#1.base, main_#t~ret746#1.offset, main_#t~ret747#1.base, main_#t~ret747#1.offset, main_#t~ret748#1.base, main_#t~ret748#1.offset, main_#t~ret749#1.base, main_#t~ret749#1.offset, main_#t~ret750#1.base, main_#t~ret750#1.offset, main_#t~ret751#1.base, main_#t~ret751#1.offset, main_#t~nondet752#1, main_#t~ret753#1.base, main_#t~ret753#1.offset, main_#t~ret754#1.base, main_#t~ret754#1.offset, main_#t~nondet755#1, main_#t~ret756#1.base, main_#t~ret756#1.offset, main_#t~ret757#1.base, main_#t~ret757#1.offset, main_#t~nondet758#1, main_#t~ret759#1.base, main_#t~ret759#1.offset, main_#t~ret760#1.base, main_#t~ret760#1.offset, main_#t~ret761#1.base, main_#t~ret761#1.offset, main_#t~nondet762#1, main_#t~ret763#1.base, main_#t~ret763#1.offset, main_#t~ret764#1.base, main_#t~ret764#1.offset, main_#t~ret765#1.base, main_#t~ret765#1.offset, main_#t~ret766#1.base, main_#t~ret766#1.offset, main_#t~nondet767#1, main_#t~ret768#1.base, main_#t~ret768#1.offset, main_#t~ret769#1.base, main_#t~ret769#1.offset, main_#t~nondet770#1, main_#t~ret771#1.base, main_#t~ret771#1.offset, main_#t~ret772#1.base, main_#t~ret772#1.offset, main_#t~ret773#1.base, main_#t~ret773#1.offset, main_#t~nondet774#1, main_#t~memset~res775#1.base, main_#t~memset~res775#1.offset, main_#t~nondet776#1, main_#t~switch777#1, main_#t~nondet778#1, main_#t~switch779#1, main_#t~ret780#1, main_#t~ret781#1, main_#t~nondet782#1, main_#t~switch783#1, main_#t~ret784#1, main_#t~ret785#1, main_#t~nondet786#1, main_#t~switch787#1, main_#t~ret788#1, main_#t~nondet789#1, main_#t~switch790#1, main_#t~ret791#1, main_#t~ret792#1, main_#t~nondet793#1, main_#t~switch794#1, main_#t~ret795#1, main_#t~ret796#1, main_#t~nondet797#1, main_#t~switch798#1, main_#t~ret799#1, main_#t~nondet800#1, main_#t~switch801#1, main_#t~ret802#1, main_#t~ret803#1, main_#t~nondet804#1, main_#t~switch805#1, main_#t~ret806#1, main_#t~ret807#1, main_#t~mem808#1, main_#t~ret809#1, main_#t~ret810#1, main_#t~nondet811#1, main_#t~switch812#1, main_#t~ret813#1, main_#t~nondet814#1, main_#t~switch815#1, main_#t~ret816#1, main_#t~nondet817#1, main_#t~switch818#1, main_#t~ret819#1, main_#t~ret820#1, main_#t~nondet821#1, main_#t~switch822#1, main_#t~ret823#1, main_~ldvarg1~0#1, main_~tmp~53#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp___0~25#1.base, main_~tmp___0~25#1.offset, main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset, main_~tmp___1~9#1.base, main_~tmp___1~9#1.offset, main_~ldvarg4~0#1, main_~tmp___2~5#1, main_~ldvarg3~0#1.base, main_~ldvarg3~0#1.offset, main_~tmp___3~3#1.base, main_~tmp___3~3#1.offset, main_~ldvarg5~0#1.base, main_~ldvarg5~0#1.offset, main_~tmp___4~1#1.base, main_~tmp___4~1#1.offset, main_~ldvarg8~0#1.base, main_~ldvarg8~0#1.offset, main_~tmp___5~1#1.base, main_~tmp___5~1#1.offset, main_~ldvarg7~0#1.base, main_~ldvarg7~0#1.offset, main_~tmp___6~1#1.base, main_~tmp___6~1#1.offset, main_~ldvarg6~0#1.base, main_~ldvarg6~0#1.offset, main_~tmp___7~1#1.base, main_~tmp___7~1#1.offset, main_~ldvarg11~0#1.base, main_~ldvarg11~0#1.offset, main_~tmp___8~1#1.base, main_~tmp___8~1#1.offset, main_~ldvarg10~0#1, main_~tmp___9~1#1, main_~ldvarg9~0#1.base, main_~ldvarg9~0#1.offset, main_~tmp___10~1#1.base, main_~tmp___10~1#1.offset, main_~ldvarg14~0#1.base, main_~ldvarg14~0#1.offset, main_~tmp___11~1#1.base, main_~tmp___11~1#1.offset, main_~ldvarg13~0#1, main_~tmp___12~1#1, main_~ldvarg12~0#1.base, main_~ldvarg12~0#1.offset, main_~tmp___13~1#1.base, main_~tmp___13~1#1.offset, main_~ldvarg17~0#1.base, main_~ldvarg17~0#1.offset, main_~tmp___14~0#1.base, main_~tmp___14~0#1.offset, main_~ldvarg16~0#1, main_~tmp___15~0#1, main_~ldvarg15~0#1.base, main_~ldvarg15~0#1.offset, main_~tmp___16~0#1.base, main_~tmp___16~0#1.offset, main_~ldvarg18~0#1.base, main_~ldvarg18~0#1.offset, main_~tmp___17~0#1.base, main_~tmp___17~0#1.offset, main_~ldvarg20~0#1.base, main_~ldvarg20~0#1.offset, main_~tmp___18~0#1.base, main_~tmp___18~0#1.offset, main_~ldvarg19~0#1, main_~tmp___19~0#1, main_~#ldvarg21~0#1.base, main_~#ldvarg21~0#1.offset, main_~ldvarg22~0#1.base, main_~ldvarg22~0#1.offset, main_~tmp___20~0#1.base, main_~tmp___20~0#1.offset, main_~ldvarg24~0#1.base, main_~ldvarg24~0#1.offset, main_~tmp___21~0#1.base, main_~tmp___21~0#1.offset, main_~ldvarg26~0#1.base, main_~ldvarg26~0#1.offset, main_~tmp___22~0#1.base, main_~tmp___22~0#1.offset, main_~ldvarg25~0#1.base, main_~ldvarg25~0#1.offset, main_~tmp___23~0#1.base, main_~tmp___23~0#1.offset, main_~ldvarg23~0#1, main_~tmp___24~0#1, main_~ldvarg27~0#1.base, main_~ldvarg27~0#1.offset, main_~tmp___25~0#1.base, main_~tmp___25~0#1.offset, main_~ldvarg29~0#1.base, main_~ldvarg29~0#1.offset, main_~tmp___26~0#1.base, main_~tmp___26~0#1.offset, main_~ldvarg28~0#1, main_~tmp___27~0#1, main_~ldvarg32~0#1.base, main_~ldvarg32~0#1.offset, main_~tmp___28~0#1.base, main_~tmp___28~0#1.offset, main_~ldvarg31~0#1.base, main_~ldvarg31~0#1.offset, main_~tmp___29~0#1.base, main_~tmp___29~0#1.offset, main_~ldvarg33~0#1.base, main_~ldvarg33~0#1.offset, main_~tmp___30~0#1.base, main_~tmp___30~0#1.offset, main_~ldvarg30~0#1, main_~tmp___31~0#1, main_~tmp___32~0#1, main_~tmp___33~0#1, main_~tmp___34~0#1, main_~tmp___35~0#1, main_~tmp___36~0#1, main_~tmp___37~0#1, main_~tmp___38~0#1, main_~tmp___39~0#1, main_~tmp___40~0#1, main_~tmp___41~0#1, main_~tmp___42~0#1, main_~tmp___43~0#1, main_~tmp___44~0#1;havoc main_~ldvarg1~0#1;havoc main_~tmp~53#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp___0~25#1.base, main_~tmp___0~25#1.offset;havoc main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset;havoc main_~tmp___1~9#1.base, main_~tmp___1~9#1.offset;havoc main_~ldvarg4~0#1;havoc main_~tmp___2~5#1;havoc main_~ldvarg3~0#1.base, main_~ldvarg3~0#1.offset;havoc main_~tmp___3~3#1.base, main_~tmp___3~3#1.offset;havoc main_~ldvarg5~0#1.base, main_~ldvarg5~0#1.offset;havoc main_~tmp___4~1#1.base, main_~tmp___4~1#1.offset;havoc main_~ldvarg8~0#1.base, main_~ldvarg8~0#1.offset;havoc main_~tmp___5~1#1.base, main_~tmp___5~1#1.offset;havoc main_~ldvarg7~0#1.base, main_~ldvarg7~0#1.offset;havoc main_~tmp___6~1#1.base, main_~tmp___6~1#1.offset;havoc main_~ldvarg6~0#1.base, main_~ldvarg6~0#1.offset;havoc main_~tmp___7~1#1.base, main_~tmp___7~1#1.offset;havoc main_~ldvarg11~0#1.base, main_~ldvarg11~0#1.offset;havoc main_~tmp___8~1#1.base, main_~tmp___8~1#1.offset;havoc main_~ldvarg10~0#1;havoc main_~tmp___9~1#1;havoc main_~ldvarg9~0#1.base, main_~ldvarg9~0#1.offset;havoc main_~tmp___10~1#1.base, main_~tmp___10~1#1.offset;havoc main_~ldvarg14~0#1.base, main_~ldvarg14~0#1.offset;havoc main_~tmp___11~1#1.base, main_~tmp___11~1#1.offset;havoc main_~ldvarg13~0#1;havoc main_~tmp___12~1#1;havoc main_~ldvarg12~0#1.base, main_~ldvarg12~0#1.offset;havoc main_~tmp___13~1#1.base, main_~tmp___13~1#1.offset;havoc main_~ldvarg17~0#1.base, main_~ldvarg17~0#1.offset;havoc main_~tmp___14~0#1.base, main_~tmp___14~0#1.offset;havoc main_~ldvarg16~0#1;havoc main_~tmp___15~0#1;havoc main_~ldvarg15~0#1.base, main_~ldvarg15~0#1.offset;havoc main_~tmp___16~0#1.base, main_~tmp___16~0#1.offset;havoc main_~ldvarg18~0#1.base, main_~ldvarg18~0#1.offset;havoc main_~tmp___17~0#1.base, main_~tmp___17~0#1.offset;havoc main_~ldvarg20~0#1.base, main_~ldvarg20~0#1.offset;havoc main_~tmp___18~0#1.base, main_~tmp___18~0#1.offset;havoc main_~ldvarg19~0#1;havoc main_~tmp___19~0#1;call main_~#ldvarg21~0#1.base, main_~#ldvarg21~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~ldvarg22~0#1.base, main_~ldvarg22~0#1.offset;havoc main_~tmp___20~0#1.base, main_~tmp___20~0#1.offset;havoc main_~ldvarg24~0#1.base, main_~ldvarg24~0#1.offset;havoc main_~tmp___21~0#1.base, main_~tmp___21~0#1.offset;havoc main_~ldvarg26~0#1.base, main_~ldvarg26~0#1.offset;havoc main_~tmp___22~0#1.base, main_~tmp___22~0#1.offset;havoc main_~ldvarg25~0#1.base, main_~ldvarg25~0#1.offset;havoc main_~tmp___23~0#1.base, main_~tmp___23~0#1.offset;havoc main_~ldvarg23~0#1;havoc main_~tmp___24~0#1;havoc main_~ldvarg27~0#1.base, main_~ldvarg27~0#1.offset;havoc main_~tmp___25~0#1.base, main_~tmp___25~0#1.offset;havoc main_~ldvarg29~0#1.base, main_~ldvarg29~0#1.offset;havoc main_~tmp___26~0#1.base, main_~tmp___26~0#1.offset;havoc main_~ldvarg28~0#1;havoc main_~tmp___27~0#1;havoc main_~ldvarg32~0#1.base, main_~ldvarg32~0#1.offset;havoc main_~tmp___28~0#1.base, main_~tmp___28~0#1.offset;havoc main_~ldvarg31~0#1.base, main_~ldvarg31~0#1.offset;havoc main_~tmp___29~0#1.base, main_~tmp___29~0#1.offset;havoc main_~ldvarg33~0#1.base, main_~ldvarg33~0#1.offset;havoc main_~tmp___30~0#1.base, main_~tmp___30~0#1.offset;havoc main_~ldvarg30~0#1;havoc main_~tmp___31~0#1;havoc main_~tmp___32~0#1;havoc main_~tmp___33~0#1;havoc main_~tmp___34~0#1;havoc main_~tmp___35~0#1;havoc main_~tmp___36~0#1;havoc main_~tmp___37~0#1;havoc main_~tmp___38~0#1;havoc main_~tmp___39~0#1;havoc main_~tmp___40~0#1;havoc main_~tmp___41~0#1;havoc main_~tmp___42~0#1;havoc main_~tmp___43~0#1;havoc main_~tmp___44~0#1;assume -2147483648 <= main_#t~nondet742#1 && main_#t~nondet742#1 <= 2147483647;main_~tmp~53#1 := main_#t~nondet742#1;havoc main_#t~nondet742#1;main_~ldvarg1~0#1 := main_~tmp~53#1; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,760 INFO L272 TraceCheckUtils]: 2: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} call main_#t~ret743#1.base, main_#t~ret743#1.offset := ldv_zalloc(1); {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:41,760 INFO L290 TraceCheckUtils]: 3: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,760 INFO L290 TraceCheckUtils]: 4: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,760 INFO L290 TraceCheckUtils]: 5: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,761 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2721#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,761 INFO L290 TraceCheckUtils]: 7: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} main_~tmp___0~25#1.base, main_~tmp___0~25#1.offset := main_#t~ret743#1.base, main_#t~ret743#1.offset;havoc main_#t~ret743#1.base, main_#t~ret743#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp___0~25#1.base, main_~tmp___0~25#1.offset; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,762 INFO L272 TraceCheckUtils]: 8: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} call main_#t~ret744#1.base, main_#t~ret744#1.offset := ldv_zalloc(1); {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:41,762 INFO L290 TraceCheckUtils]: 9: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,762 INFO L290 TraceCheckUtils]: 10: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,762 INFO L290 TraceCheckUtils]: 11: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,763 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2723#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,763 INFO L290 TraceCheckUtils]: 13: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} main_~tmp___1~9#1.base, main_~tmp___1~9#1.offset := main_#t~ret744#1.base, main_#t~ret744#1.offset;havoc main_#t~ret744#1.base, main_#t~ret744#1.offset;main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset := main_~tmp___1~9#1.base, main_~tmp___1~9#1.offset;assume -2147483648 <= main_#t~nondet745#1 && main_#t~nondet745#1 <= 2147483647;main_~tmp___2~5#1 := main_#t~nondet745#1;havoc main_#t~nondet745#1;main_~ldvarg4~0#1 := main_~tmp___2~5#1; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,764 INFO L272 TraceCheckUtils]: 14: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} call main_#t~ret746#1.base, main_#t~ret746#1.offset := ldv_zalloc(1); {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:41,764 INFO L290 TraceCheckUtils]: 15: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,764 INFO L290 TraceCheckUtils]: 16: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,765 INFO L290 TraceCheckUtils]: 17: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,765 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2725#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,766 INFO L290 TraceCheckUtils]: 19: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} main_~tmp___3~3#1.base, main_~tmp___3~3#1.offset := main_#t~ret746#1.base, main_#t~ret746#1.offset;havoc main_#t~ret746#1.base, main_#t~ret746#1.offset;main_~ldvarg3~0#1.base, main_~ldvarg3~0#1.offset := main_~tmp___3~3#1.base, main_~tmp___3~3#1.offset; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,766 INFO L272 TraceCheckUtils]: 20: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} call main_#t~ret747#1.base, main_#t~ret747#1.offset := ldv_zalloc(1); {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:41,766 INFO L290 TraceCheckUtils]: 21: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,767 INFO L290 TraceCheckUtils]: 22: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,767 INFO L290 TraceCheckUtils]: 23: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,767 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2727#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,768 INFO L290 TraceCheckUtils]: 25: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} main_~tmp___4~1#1.base, main_~tmp___4~1#1.offset := main_#t~ret747#1.base, main_#t~ret747#1.offset;havoc main_#t~ret747#1.base, main_#t~ret747#1.offset;main_~ldvarg5~0#1.base, main_~ldvarg5~0#1.offset := main_~tmp___4~1#1.base, main_~tmp___4~1#1.offset; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,768 INFO L272 TraceCheckUtils]: 26: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} call main_#t~ret748#1.base, main_#t~ret748#1.offset := ldv_zalloc(48); {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:41,769 INFO L290 TraceCheckUtils]: 27: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,769 INFO L290 TraceCheckUtils]: 28: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,769 INFO L290 TraceCheckUtils]: 29: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,769 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2729#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,770 INFO L290 TraceCheckUtils]: 31: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} main_~tmp___5~1#1.base, main_~tmp___5~1#1.offset := main_#t~ret748#1.base, main_#t~ret748#1.offset;havoc main_#t~ret748#1.base, main_#t~ret748#1.offset;main_~ldvarg8~0#1.base, main_~ldvarg8~0#1.offset := main_~tmp___5~1#1.base, main_~tmp___5~1#1.offset; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,770 INFO L272 TraceCheckUtils]: 32: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} call main_#t~ret749#1.base, main_#t~ret749#1.offset := ldv_zalloc(1); {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:41,770 INFO L290 TraceCheckUtils]: 33: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,771 INFO L290 TraceCheckUtils]: 34: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,771 INFO L290 TraceCheckUtils]: 35: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,771 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2731#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,772 INFO L290 TraceCheckUtils]: 37: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} main_~tmp___6~1#1.base, main_~tmp___6~1#1.offset := main_#t~ret749#1.base, main_#t~ret749#1.offset;havoc main_#t~ret749#1.base, main_#t~ret749#1.offset;main_~ldvarg7~0#1.base, main_~ldvarg7~0#1.offset := main_~tmp___6~1#1.base, main_~tmp___6~1#1.offset; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,772 INFO L272 TraceCheckUtils]: 38: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} call main_#t~ret750#1.base, main_#t~ret750#1.offset := ldv_zalloc(1376); {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:41,772 INFO L290 TraceCheckUtils]: 39: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,773 INFO L290 TraceCheckUtils]: 40: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,773 INFO L290 TraceCheckUtils]: 41: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,773 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2733#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,774 INFO L290 TraceCheckUtils]: 43: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} main_~tmp___7~1#1.base, main_~tmp___7~1#1.offset := main_#t~ret750#1.base, main_#t~ret750#1.offset;havoc main_#t~ret750#1.base, main_#t~ret750#1.offset;main_~ldvarg6~0#1.base, main_~ldvarg6~0#1.offset := main_~tmp___7~1#1.base, main_~tmp___7~1#1.offset; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,774 INFO L272 TraceCheckUtils]: 44: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} call main_#t~ret751#1.base, main_#t~ret751#1.offset := ldv_zalloc(1); {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:41,774 INFO L290 TraceCheckUtils]: 45: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,775 INFO L290 TraceCheckUtils]: 46: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,775 INFO L290 TraceCheckUtils]: 47: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,779 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2735#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,780 INFO L290 TraceCheckUtils]: 49: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} main_~tmp___8~1#1.base, main_~tmp___8~1#1.offset := main_#t~ret751#1.base, main_#t~ret751#1.offset;havoc main_#t~ret751#1.base, main_#t~ret751#1.offset;main_~ldvarg11~0#1.base, main_~ldvarg11~0#1.offset := main_~tmp___8~1#1.base, main_~tmp___8~1#1.offset;assume -2147483648 <= main_#t~nondet752#1 && main_#t~nondet752#1 <= 2147483647;main_~tmp___9~1#1 := main_#t~nondet752#1;havoc main_#t~nondet752#1;main_~ldvarg10~0#1 := main_~tmp___9~1#1; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,780 INFO L272 TraceCheckUtils]: 50: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} call main_#t~ret753#1.base, main_#t~ret753#1.offset := ldv_zalloc(1); {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:41,781 INFO L290 TraceCheckUtils]: 51: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,781 INFO L290 TraceCheckUtils]: 52: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,781 INFO L290 TraceCheckUtils]: 53: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,781 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2737#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,782 INFO L290 TraceCheckUtils]: 55: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} main_~tmp___10~1#1.base, main_~tmp___10~1#1.offset := main_#t~ret753#1.base, main_#t~ret753#1.offset;havoc main_#t~ret753#1.base, main_#t~ret753#1.offset;main_~ldvarg9~0#1.base, main_~ldvarg9~0#1.offset := main_~tmp___10~1#1.base, main_~tmp___10~1#1.offset; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,782 INFO L272 TraceCheckUtils]: 56: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} call main_#t~ret754#1.base, main_#t~ret754#1.offset := ldv_zalloc(1); {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:41,782 INFO L290 TraceCheckUtils]: 57: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,783 INFO L290 TraceCheckUtils]: 58: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,783 INFO L290 TraceCheckUtils]: 59: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,783 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2739#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,784 INFO L290 TraceCheckUtils]: 61: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} main_~tmp___11~1#1.base, main_~tmp___11~1#1.offset := main_#t~ret754#1.base, main_#t~ret754#1.offset;havoc main_#t~ret754#1.base, main_#t~ret754#1.offset;main_~ldvarg14~0#1.base, main_~ldvarg14~0#1.offset := main_~tmp___11~1#1.base, main_~tmp___11~1#1.offset;assume -2147483648 <= main_#t~nondet755#1 && main_#t~nondet755#1 <= 2147483647;main_~tmp___12~1#1 := main_#t~nondet755#1;havoc main_#t~nondet755#1;main_~ldvarg13~0#1 := main_~tmp___12~1#1; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,784 INFO L272 TraceCheckUtils]: 62: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} call main_#t~ret756#1.base, main_#t~ret756#1.offset := ldv_zalloc(1); {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:41,784 INFO L290 TraceCheckUtils]: 63: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,785 INFO L290 TraceCheckUtils]: 64: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,785 INFO L290 TraceCheckUtils]: 65: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,785 INFO L284 TraceCheckUtils]: 66: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2741#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,786 INFO L290 TraceCheckUtils]: 67: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} main_~tmp___13~1#1.base, main_~tmp___13~1#1.offset := main_#t~ret756#1.base, main_#t~ret756#1.offset;havoc main_#t~ret756#1.base, main_#t~ret756#1.offset;main_~ldvarg12~0#1.base, main_~ldvarg12~0#1.offset := main_~tmp___13~1#1.base, main_~tmp___13~1#1.offset; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,786 INFO L272 TraceCheckUtils]: 68: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} call main_#t~ret757#1.base, main_#t~ret757#1.offset := ldv_zalloc(32); {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:41,786 INFO L290 TraceCheckUtils]: 69: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,787 INFO L290 TraceCheckUtils]: 70: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,787 INFO L290 TraceCheckUtils]: 71: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,787 INFO L284 TraceCheckUtils]: 72: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2743#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,788 INFO L290 TraceCheckUtils]: 73: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} main_~tmp___14~0#1.base, main_~tmp___14~0#1.offset := main_#t~ret757#1.base, main_#t~ret757#1.offset;havoc main_#t~ret757#1.base, main_#t~ret757#1.offset;main_~ldvarg17~0#1.base, main_~ldvarg17~0#1.offset := main_~tmp___14~0#1.base, main_~tmp___14~0#1.offset;assume -2147483648 <= main_#t~nondet758#1 && main_#t~nondet758#1 <= 2147483647;main_~tmp___15~0#1 := main_#t~nondet758#1;havoc main_#t~nondet758#1;main_~ldvarg16~0#1 := main_~tmp___15~0#1; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,788 INFO L272 TraceCheckUtils]: 74: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} call main_#t~ret759#1.base, main_#t~ret759#1.offset := ldv_zalloc(296); {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:41,789 INFO L290 TraceCheckUtils]: 75: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,789 INFO L290 TraceCheckUtils]: 76: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,789 INFO L290 TraceCheckUtils]: 77: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,789 INFO L284 TraceCheckUtils]: 78: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2745#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,790 INFO L290 TraceCheckUtils]: 79: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} main_~tmp___16~0#1.base, main_~tmp___16~0#1.offset := main_#t~ret759#1.base, main_#t~ret759#1.offset;havoc main_#t~ret759#1.base, main_#t~ret759#1.offset;main_~ldvarg15~0#1.base, main_~ldvarg15~0#1.offset := main_~tmp___16~0#1.base, main_~tmp___16~0#1.offset; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,790 INFO L272 TraceCheckUtils]: 80: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} call main_#t~ret760#1.base, main_#t~ret760#1.offset := ldv_zalloc(1); {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:41,791 INFO L290 TraceCheckUtils]: 81: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,791 INFO L290 TraceCheckUtils]: 82: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,791 INFO L290 TraceCheckUtils]: 83: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,791 INFO L284 TraceCheckUtils]: 84: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2747#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,792 INFO L290 TraceCheckUtils]: 85: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} main_~tmp___17~0#1.base, main_~tmp___17~0#1.offset := main_#t~ret760#1.base, main_#t~ret760#1.offset;havoc main_#t~ret760#1.base, main_#t~ret760#1.offset;main_~ldvarg18~0#1.base, main_~ldvarg18~0#1.offset := main_~tmp___17~0#1.base, main_~tmp___17~0#1.offset; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,792 INFO L272 TraceCheckUtils]: 86: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} call main_#t~ret761#1.base, main_#t~ret761#1.offset := ldv_zalloc(1); {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:41,793 INFO L290 TraceCheckUtils]: 87: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,793 INFO L290 TraceCheckUtils]: 88: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,793 INFO L290 TraceCheckUtils]: 89: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,793 INFO L284 TraceCheckUtils]: 90: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2749#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,794 INFO L290 TraceCheckUtils]: 91: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} main_~tmp___18~0#1.base, main_~tmp___18~0#1.offset := main_#t~ret761#1.base, main_#t~ret761#1.offset;havoc main_#t~ret761#1.base, main_#t~ret761#1.offset;main_~ldvarg20~0#1.base, main_~ldvarg20~0#1.offset := main_~tmp___18~0#1.base, main_~tmp___18~0#1.offset;assume -2147483648 <= main_#t~nondet762#1 && main_#t~nondet762#1 <= 2147483647;main_~tmp___19~0#1 := main_#t~nondet762#1;havoc main_#t~nondet762#1;main_~ldvarg19~0#1 := main_~tmp___19~0#1; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,794 INFO L272 TraceCheckUtils]: 92: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} call main_#t~ret763#1.base, main_#t~ret763#1.offset := ldv_zalloc(32); {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:41,795 INFO L290 TraceCheckUtils]: 93: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,795 INFO L290 TraceCheckUtils]: 94: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,795 INFO L290 TraceCheckUtils]: 95: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,795 INFO L284 TraceCheckUtils]: 96: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2751#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,796 INFO L290 TraceCheckUtils]: 97: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} main_~tmp___20~0#1.base, main_~tmp___20~0#1.offset := main_#t~ret763#1.base, main_#t~ret763#1.offset;havoc main_#t~ret763#1.base, main_#t~ret763#1.offset;main_~ldvarg22~0#1.base, main_~ldvarg22~0#1.offset := main_~tmp___20~0#1.base, main_~tmp___20~0#1.offset; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,796 INFO L272 TraceCheckUtils]: 98: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} call main_#t~ret764#1.base, main_#t~ret764#1.offset := ldv_zalloc(1376); {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:41,796 INFO L290 TraceCheckUtils]: 99: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,797 INFO L290 TraceCheckUtils]: 100: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,797 INFO L290 TraceCheckUtils]: 101: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,797 INFO L284 TraceCheckUtils]: 102: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2753#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,798 INFO L290 TraceCheckUtils]: 103: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} main_~tmp___21~0#1.base, main_~tmp___21~0#1.offset := main_#t~ret764#1.base, main_#t~ret764#1.offset;havoc main_#t~ret764#1.base, main_#t~ret764#1.offset;main_~ldvarg24~0#1.base, main_~ldvarg24~0#1.offset := main_~tmp___21~0#1.base, main_~tmp___21~0#1.offset; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,798 INFO L272 TraceCheckUtils]: 104: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} call main_#t~ret765#1.base, main_#t~ret765#1.offset := ldv_zalloc(48); {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:41,798 INFO L290 TraceCheckUtils]: 105: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,799 INFO L290 TraceCheckUtils]: 106: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,799 INFO L290 TraceCheckUtils]: 107: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,799 INFO L284 TraceCheckUtils]: 108: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2755#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,800 INFO L290 TraceCheckUtils]: 109: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} main_~tmp___22~0#1.base, main_~tmp___22~0#1.offset := main_#t~ret765#1.base, main_#t~ret765#1.offset;havoc main_#t~ret765#1.base, main_#t~ret765#1.offset;main_~ldvarg26~0#1.base, main_~ldvarg26~0#1.offset := main_~tmp___22~0#1.base, main_~tmp___22~0#1.offset; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,803 INFO L272 TraceCheckUtils]: 110: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} call main_#t~ret766#1.base, main_#t~ret766#1.offset := ldv_zalloc(1); {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:41,804 INFO L290 TraceCheckUtils]: 111: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,804 INFO L290 TraceCheckUtils]: 112: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,804 INFO L290 TraceCheckUtils]: 113: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,804 INFO L284 TraceCheckUtils]: 114: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2757#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,805 INFO L290 TraceCheckUtils]: 115: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} main_~tmp___23~0#1.base, main_~tmp___23~0#1.offset := main_#t~ret766#1.base, main_#t~ret766#1.offset;havoc main_#t~ret766#1.base, main_#t~ret766#1.offset;main_~ldvarg25~0#1.base, main_~ldvarg25~0#1.offset := main_~tmp___23~0#1.base, main_~tmp___23~0#1.offset;assume -2147483648 <= main_#t~nondet767#1 && main_#t~nondet767#1 <= 2147483647;main_~tmp___24~0#1 := main_#t~nondet767#1;havoc main_#t~nondet767#1;main_~ldvarg23~0#1 := main_~tmp___24~0#1; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,805 INFO L272 TraceCheckUtils]: 116: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} call main_#t~ret768#1.base, main_#t~ret768#1.offset := ldv_zalloc(1); {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:41,806 INFO L290 TraceCheckUtils]: 117: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,806 INFO L290 TraceCheckUtils]: 118: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,806 INFO L290 TraceCheckUtils]: 119: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,806 INFO L284 TraceCheckUtils]: 120: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2759#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,807 INFO L290 TraceCheckUtils]: 121: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} main_~tmp___25~0#1.base, main_~tmp___25~0#1.offset := main_#t~ret768#1.base, main_#t~ret768#1.offset;havoc main_#t~ret768#1.base, main_#t~ret768#1.offset;main_~ldvarg27~0#1.base, main_~ldvarg27~0#1.offset := main_~tmp___25~0#1.base, main_~tmp___25~0#1.offset; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,807 INFO L272 TraceCheckUtils]: 122: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} call main_#t~ret769#1.base, main_#t~ret769#1.offset := ldv_zalloc(1); {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:41,810 INFO L290 TraceCheckUtils]: 123: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,811 INFO L290 TraceCheckUtils]: 124: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,811 INFO L290 TraceCheckUtils]: 125: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,811 INFO L284 TraceCheckUtils]: 126: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2761#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,812 INFO L290 TraceCheckUtils]: 127: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} main_~tmp___26~0#1.base, main_~tmp___26~0#1.offset := main_#t~ret769#1.base, main_#t~ret769#1.offset;havoc main_#t~ret769#1.base, main_#t~ret769#1.offset;main_~ldvarg29~0#1.base, main_~ldvarg29~0#1.offset := main_~tmp___26~0#1.base, main_~tmp___26~0#1.offset;assume -2147483648 <= main_#t~nondet770#1 && main_#t~nondet770#1 <= 2147483647;main_~tmp___27~0#1 := main_#t~nondet770#1;havoc main_#t~nondet770#1;main_~ldvarg28~0#1 := main_~tmp___27~0#1; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,812 INFO L272 TraceCheckUtils]: 128: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} call main_#t~ret771#1.base, main_#t~ret771#1.offset := ldv_zalloc(1); {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:41,813 INFO L290 TraceCheckUtils]: 129: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,813 INFO L290 TraceCheckUtils]: 130: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,813 INFO L290 TraceCheckUtils]: 131: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,813 INFO L284 TraceCheckUtils]: 132: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2763#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,814 INFO L290 TraceCheckUtils]: 133: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} main_~tmp___28~0#1.base, main_~tmp___28~0#1.offset := main_#t~ret771#1.base, main_#t~ret771#1.offset;havoc main_#t~ret771#1.base, main_#t~ret771#1.offset;main_~ldvarg32~0#1.base, main_~ldvarg32~0#1.offset := main_~tmp___28~0#1.base, main_~tmp___28~0#1.offset; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,814 INFO L272 TraceCheckUtils]: 134: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} call main_#t~ret772#1.base, main_#t~ret772#1.offset := ldv_zalloc(1376); {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:41,814 INFO L290 TraceCheckUtils]: 135: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,815 INFO L290 TraceCheckUtils]: 136: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,815 INFO L290 TraceCheckUtils]: 137: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,815 INFO L284 TraceCheckUtils]: 138: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2765#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,816 INFO L290 TraceCheckUtils]: 139: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} main_~tmp___29~0#1.base, main_~tmp___29~0#1.offset := main_#t~ret772#1.base, main_#t~ret772#1.offset;havoc main_#t~ret772#1.base, main_#t~ret772#1.offset;main_~ldvarg31~0#1.base, main_~ldvarg31~0#1.offset := main_~tmp___29~0#1.base, main_~tmp___29~0#1.offset; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,816 INFO L272 TraceCheckUtils]: 140: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} call main_#t~ret773#1.base, main_#t~ret773#1.offset := ldv_zalloc(48); {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:41,816 INFO L290 TraceCheckUtils]: 141: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,816 INFO L290 TraceCheckUtils]: 142: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,816 INFO L290 TraceCheckUtils]: 143: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,817 INFO L284 TraceCheckUtils]: 144: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2767#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,817 INFO L290 TraceCheckUtils]: 145: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} main_~tmp___30~0#1.base, main_~tmp___30~0#1.offset := main_#t~ret773#1.base, main_#t~ret773#1.offset;havoc main_#t~ret773#1.base, main_#t~ret773#1.offset;main_~ldvarg33~0#1.base, main_~ldvarg33~0#1.offset := main_~tmp___30~0#1.base, main_~tmp___30~0#1.offset;assume -2147483648 <= main_#t~nondet774#1 && main_#t~nondet774#1 <= 2147483647;main_~tmp___31~0#1 := main_#t~nondet774#1;havoc main_#t~nondet774#1;main_~ldvarg30~0#1 := main_~tmp___31~0#1;assume { :begin_inline_ldv_initialize } true; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,818 INFO L290 TraceCheckUtils]: 146: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume { :end_inline_ldv_initialize } true; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,818 INFO L272 TraceCheckUtils]: 147: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} call main_#t~memset~res775#1.base, main_#t~memset~res775#1.offset := #Ultimate.C_memset(main_~#ldvarg21~0#1.base, main_~#ldvarg21~0#1.offset, 0, 4); {39776#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 21:50:41,818 INFO L290 TraceCheckUtils]: 148: Hoare triple {39776#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr867 := 0; {39668#true} is VALID [2022-02-20 21:50:41,819 INFO L290 TraceCheckUtils]: 149: Hoare triple {39668#true} assume !(#t~loopctr867 % 18446744073709551616 < #amount % 18446744073709551616); {39668#true} is VALID [2022-02-20 21:50:41,819 INFO L290 TraceCheckUtils]: 150: Hoare triple {39668#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {39668#true} is VALID [2022-02-20 21:50:41,819 INFO L284 TraceCheckUtils]: 151: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2769#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,820 INFO L290 TraceCheckUtils]: 152: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} havoc main_#t~memset~res775#1.base, main_#t~memset~res775#1.offset;~ldv_state_variable_6~0 := 0;~ldv_state_variable_11~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_9~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_8~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_10~0 := 0;~ldv_state_variable_5~0 := 0; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,820 INFO L290 TraceCheckUtils]: 153: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume -2147483648 <= main_#t~nondet776#1 && main_#t~nondet776#1 <= 2147483647;main_~tmp___32~0#1 := main_#t~nondet776#1;havoc main_#t~nondet776#1;main_#t~switch777#1 := 0 == main_~tmp___32~0#1; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,821 INFO L290 TraceCheckUtils]: 154: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume !main_#t~switch777#1;main_#t~switch777#1 := main_#t~switch777#1 || 1 == main_~tmp___32~0#1; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,821 INFO L290 TraceCheckUtils]: 155: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume !main_#t~switch777#1;main_#t~switch777#1 := main_#t~switch777#1 || 2 == main_~tmp___32~0#1; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,821 INFO L290 TraceCheckUtils]: 156: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume !main_#t~switch777#1;main_#t~switch777#1 := main_#t~switch777#1 || 3 == main_~tmp___32~0#1; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,822 INFO L290 TraceCheckUtils]: 157: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume !main_#t~switch777#1;main_#t~switch777#1 := main_#t~switch777#1 || 4 == main_~tmp___32~0#1; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,822 INFO L290 TraceCheckUtils]: 158: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume !main_#t~switch777#1;main_#t~switch777#1 := main_#t~switch777#1 || 5 == main_~tmp___32~0#1; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,823 INFO L290 TraceCheckUtils]: 159: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume !main_#t~switch777#1;main_#t~switch777#1 := main_#t~switch777#1 || 6 == main_~tmp___32~0#1; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,823 INFO L290 TraceCheckUtils]: 160: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume !main_#t~switch777#1;main_#t~switch777#1 := main_#t~switch777#1 || 7 == main_~tmp___32~0#1; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,823 INFO L290 TraceCheckUtils]: 161: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume !main_#t~switch777#1;main_#t~switch777#1 := main_#t~switch777#1 || 8 == main_~tmp___32~0#1; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,824 INFO L290 TraceCheckUtils]: 162: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume !main_#t~switch777#1;main_#t~switch777#1 := main_#t~switch777#1 || 9 == main_~tmp___32~0#1; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,824 INFO L290 TraceCheckUtils]: 163: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume main_#t~switch777#1; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,825 INFO L290 TraceCheckUtils]: 164: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet814#1 && main_#t~nondet814#1 <= 2147483647;main_~tmp___42~0#1 := main_#t~nondet814#1;havoc main_#t~nondet814#1;main_#t~switch815#1 := 0 == main_~tmp___42~0#1; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,825 INFO L290 TraceCheckUtils]: 165: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume !main_#t~switch815#1;main_#t~switch815#1 := main_#t~switch815#1 || 1 == main_~tmp___42~0#1; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,825 INFO L290 TraceCheckUtils]: 166: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume main_#t~switch815#1; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,826 INFO L290 TraceCheckUtils]: 167: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_ims_pcu_driver_init } true;havoc ims_pcu_driver_init_#res#1;havoc ims_pcu_driver_init_#t~ret728#1, ims_pcu_driver_init_~tmp~45#1;havoc ims_pcu_driver_init_~tmp~45#1;assume { :begin_inline_ldv_usb_register_driver_24 } true;ldv_usb_register_driver_24_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_24_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_24_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_24_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_24_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_24_#in~ldv_func_arg3#1.offset := ~#ims_pcu_driver~0.base, ~#ims_pcu_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 134, 0;havoc ldv_usb_register_driver_24_#res#1;havoc ldv_usb_register_driver_24_#t~ret831#1, ldv_usb_register_driver_24_~ldv_func_arg1#1.base, ldv_usb_register_driver_24_~ldv_func_arg1#1.offset, ldv_usb_register_driver_24_~ldv_func_arg2#1.base, ldv_usb_register_driver_24_~ldv_func_arg2#1.offset, ldv_usb_register_driver_24_~ldv_func_arg3#1.base, ldv_usb_register_driver_24_~ldv_func_arg3#1.offset, ldv_usb_register_driver_24_~ldv_func_res~0#1, ldv_usb_register_driver_24_~tmp~61#1;ldv_usb_register_driver_24_~ldv_func_arg1#1.base, ldv_usb_register_driver_24_~ldv_func_arg1#1.offset := ldv_usb_register_driver_24_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_24_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_24_~ldv_func_arg2#1.base, ldv_usb_register_driver_24_~ldv_func_arg2#1.offset := ldv_usb_register_driver_24_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_24_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_24_~ldv_func_arg3#1.base, ldv_usb_register_driver_24_~ldv_func_arg3#1.offset := ldv_usb_register_driver_24_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_24_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_24_~ldv_func_res~0#1;havoc ldv_usb_register_driver_24_~tmp~61#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_24_~ldv_func_arg1#1.base, ldv_usb_register_driver_24_~ldv_func_arg1#1.offset, ldv_usb_register_driver_24_~ldv_func_arg2#1.base, ldv_usb_register_driver_24_~ldv_func_arg2#1.offset, ldv_usb_register_driver_24_~ldv_func_arg3#1.base, ldv_usb_register_driver_24_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet863#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet863#1 && usb_register_driver_#t~nondet863#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet863#1;havoc usb_register_driver_#t~nondet863#1; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,826 INFO L290 TraceCheckUtils]: 168: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} ldv_usb_register_driver_24_#t~ret831#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_24_#t~ret831#1 && ldv_usb_register_driver_24_#t~ret831#1 <= 2147483647;ldv_usb_register_driver_24_~tmp~61#1 := ldv_usb_register_driver_24_#t~ret831#1;havoc ldv_usb_register_driver_24_#t~ret831#1;ldv_usb_register_driver_24_~ldv_func_res~0#1 := ldv_usb_register_driver_24_~tmp~61#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret741#1.base, ldv_usb_driver_1_#t~ret741#1.offset, ldv_usb_driver_1_~tmp~52#1.base, ldv_usb_driver_1_~tmp~52#1.offset;havoc ldv_usb_driver_1_~tmp~52#1.base, ldv_usb_driver_1_~tmp~52#1.offset; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,827 INFO L272 TraceCheckUtils]: 169: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} call ldv_usb_driver_1_#t~ret741#1.base, ldv_usb_driver_1_#t~ret741#1.offset := ldv_zalloc(1520); {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:50:41,827 INFO L290 TraceCheckUtils]: 170: Hoare triple {39775#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~9#1.base, ~tmp~9#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet130#1 && #t~nondet130#1 <= 2147483647;~tmp___0~3#1 := #t~nondet130#1;havoc #t~nondet130#1; {39668#true} is VALID [2022-02-20 21:50:41,827 INFO L290 TraceCheckUtils]: 171: Hoare triple {39668#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {39668#true} is VALID [2022-02-20 21:50:41,827 INFO L290 TraceCheckUtils]: 172: Hoare triple {39668#true} assume true; {39668#true} is VALID [2022-02-20 21:50:41,828 INFO L284 TraceCheckUtils]: 173: Hoare quadruple {39668#true} {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #2987#return; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,828 INFO L290 TraceCheckUtils]: 174: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} ldv_usb_driver_1_~tmp~52#1.base, ldv_usb_driver_1_~tmp~52#1.offset := ldv_usb_driver_1_#t~ret741#1.base, ldv_usb_driver_1_#t~ret741#1.offset;havoc ldv_usb_driver_1_#t~ret741#1.base, ldv_usb_driver_1_#t~ret741#1.offset;~ims_pcu_driver_group1~0.base, ~ims_pcu_driver_group1~0.offset := ldv_usb_driver_1_~tmp~52#1.base, ldv_usb_driver_1_~tmp~52#1.offset; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,829 INFO L290 TraceCheckUtils]: 175: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_24_#res#1 := ldv_usb_register_driver_24_~ldv_func_res~0#1; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,829 INFO L290 TraceCheckUtils]: 176: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} ims_pcu_driver_init_#t~ret728#1 := ldv_usb_register_driver_24_#res#1;assume { :end_inline_ldv_usb_register_driver_24 } true;assume -2147483648 <= ims_pcu_driver_init_#t~ret728#1 && ims_pcu_driver_init_#t~ret728#1 <= 2147483647;ims_pcu_driver_init_~tmp~45#1 := ims_pcu_driver_init_#t~ret728#1;havoc ims_pcu_driver_init_#t~ret728#1;ims_pcu_driver_init_#res#1 := ims_pcu_driver_init_~tmp~45#1; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,829 INFO L290 TraceCheckUtils]: 177: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} main_#t~ret816#1 := ims_pcu_driver_init_#res#1;assume { :end_inline_ims_pcu_driver_init } true;assume -2147483648 <= main_#t~ret816#1 && main_#t~ret816#1 <= 2147483647;~ldv_retval_4~0 := main_#t~ret816#1;havoc main_#t~ret816#1; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,830 INFO L290 TraceCheckUtils]: 178: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume !(0 == ~ldv_retval_4~0); {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,830 INFO L290 TraceCheckUtils]: 179: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume 0 != ~ldv_retval_4~0;~ldv_state_variable_0~0 := 2; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,830 INFO L290 TraceCheckUtils]: 180: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume { :begin_inline_ldv_check_final_state } true; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,831 INFO L290 TraceCheckUtils]: 181: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume 0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616; {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:50:41,831 INFO L290 TraceCheckUtils]: 182: Hoare triple {39670#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume !(0 == (~usb_dev~0.base + ~usb_dev~0.offset) % 18446744073709551616); {39669#false} is VALID [2022-02-20 21:50:41,831 INFO L272 TraceCheckUtils]: 183: Hoare triple {39669#false} call ldv_error(); {39669#false} is VALID [2022-02-20 21:50:41,831 INFO L290 TraceCheckUtils]: 184: Hoare triple {39669#false} assume !false; {39669#false} is VALID [2022-02-20 21:50:41,832 INFO L134 CoverageAnalysis]: Checked inductivity of 1200 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2022-02-20 21:50:41,833 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:50:41,833 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1277123323] [2022-02-20 21:50:41,833 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1277123323] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:50:41,833 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:50:41,833 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-02-20 21:50:41,834 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1431428562] [2022-02-20 21:50:41,834 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:50:41,835 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 12.0) internal successors, (60), 3 states have internal predecessors, (60), 2 states have call successors, (27), 3 states have call predecessors, (27), 1 states have return successors, (26), 1 states have call predecessors, (26), 1 states have call successors, (26) Word has length 185 [2022-02-20 21:50:41,835 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:50:41,835 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 12.0) internal successors, (60), 3 states have internal predecessors, (60), 2 states have call successors, (27), 3 states have call predecessors, (27), 1 states have return successors, (26), 1 states have call predecessors, (26), 1 states have call successors, (26) [2022-02-20 21:50:41,934 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 113 edges. 113 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:50:41,935 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-02-20 21:50:41,935 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:50:41,936 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-02-20 21:50:41,936 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-02-20 21:50:41,936 INFO L87 Difference]: Start difference. First operand 4364 states and 6138 transitions. Second operand has 5 states, 5 states have (on average 12.0) internal successors, (60), 3 states have internal predecessors, (60), 2 states have call successors, (27), 3 states have call predecessors, (27), 1 states have return successors, (26), 1 states have call predecessors, (26), 1 states have call successors, (26)