./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/ldv-linux-3.12-rc1/linux-3.12-rc1.tar.xz-144_2a-drivers--media--usb--ttusb-dec--ttusb_dec.ko-entry_point.cil.out.i --full-output -ea --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 03d7b7b3 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -ea -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/ldv-linux-3.12-rc1/linux-3.12-rc1.tar.xz-144_2a-drivers--media--usb--ttusb-dec--ttusb_dec.ko-entry_point.cil.out.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 1848e360a16ec6531e7d7aea690ab68ac7295c6b0bdec191a41fa9ee0518b66d --- Real Ultimate output --- This is Ultimate 0.2.2-dev-03d7b7b [2022-02-20 21:50:52,596 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-02-20 21:50:52,598 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-02-20 21:50:52,633 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-02-20 21:50:52,633 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-02-20 21:50:52,636 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-02-20 21:50:52,637 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-02-20 21:50:52,639 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-02-20 21:50:52,641 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-02-20 21:50:52,644 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-02-20 21:50:52,645 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-02-20 21:50:52,646 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-02-20 21:50:52,646 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-02-20 21:50:52,648 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-02-20 21:50:52,649 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-02-20 21:50:52,651 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-02-20 21:50:52,652 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-02-20 21:50:52,653 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-02-20 21:50:52,654 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-02-20 21:50:52,658 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-02-20 21:50:52,659 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-02-20 21:50:52,660 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-02-20 21:50:52,662 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-02-20 21:50:52,662 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-02-20 21:50:52,667 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-02-20 21:50:52,667 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-02-20 21:50:52,668 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-02-20 21:50:52,669 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-02-20 21:50:52,669 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-02-20 21:50:52,670 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-02-20 21:50:52,670 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-02-20 21:50:52,671 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-02-20 21:50:52,672 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-02-20 21:50:52,673 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-02-20 21:50:52,674 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-02-20 21:50:52,674 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-02-20 21:50:52,674 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-02-20 21:50:52,675 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-02-20 21:50:52,675 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-02-20 21:50:52,675 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-02-20 21:50:52,676 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-02-20 21:50:52,677 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2022-02-20 21:50:52,702 INFO L113 SettingsManager]: Loading preferences was successful [2022-02-20 21:50:52,702 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-02-20 21:50:52,703 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-02-20 21:50:52,703 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-02-20 21:50:52,704 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-02-20 21:50:52,704 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-02-20 21:50:52,704 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-02-20 21:50:52,704 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-02-20 21:50:52,705 INFO L138 SettingsManager]: * Use SBE=true [2022-02-20 21:50:52,705 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-02-20 21:50:52,705 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-02-20 21:50:52,706 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-02-20 21:50:52,706 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-02-20 21:50:52,706 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-02-20 21:50:52,706 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-02-20 21:50:52,706 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-02-20 21:50:52,706 INFO L138 SettingsManager]: * Use constant arrays=true [2022-02-20 21:50:52,707 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-02-20 21:50:52,707 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-02-20 21:50:52,707 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-02-20 21:50:52,707 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-02-20 21:50:52,707 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-02-20 21:50:52,708 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-02-20 21:50:52,708 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-02-20 21:50:52,708 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-02-20 21:50:52,708 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-02-20 21:50:52,708 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-02-20 21:50:52,708 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2022-02-20 21:50:52,709 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2022-02-20 21:50:52,709 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-02-20 21:50:52,709 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 1848e360a16ec6531e7d7aea690ab68ac7295c6b0bdec191a41fa9ee0518b66d [2022-02-20 21:50:52,907 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-02-20 21:50:52,929 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-02-20 21:50:52,931 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-02-20 21:50:52,932 INFO L271 PluginConnector]: Initializing CDTParser... [2022-02-20 21:50:52,932 INFO L275 PluginConnector]: CDTParser initialized [2022-02-20 21:50:52,933 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/ldv-linux-3.12-rc1/linux-3.12-rc1.tar.xz-144_2a-drivers--media--usb--ttusb-dec--ttusb_dec.ko-entry_point.cil.out.i [2022-02-20 21:50:52,980 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/cdb219aa5/373b8582712c40599d693737506269c7/FLAG7ed2377a3 [2022-02-20 21:50:53,579 INFO L306 CDTParser]: Found 1 translation units. [2022-02-20 21:50:53,580 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.12-rc1/linux-3.12-rc1.tar.xz-144_2a-drivers--media--usb--ttusb-dec--ttusb_dec.ko-entry_point.cil.out.i [2022-02-20 21:50:53,613 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/cdb219aa5/373b8582712c40599d693737506269c7/FLAG7ed2377a3 [2022-02-20 21:50:53,754 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/cdb219aa5/373b8582712c40599d693737506269c7 [2022-02-20 21:50:53,756 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-02-20 21:50:53,757 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-02-20 21:50:53,759 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-02-20 21:50:53,759 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-02-20 21:50:53,761 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-02-20 21:50:53,762 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.02 09:50:53" (1/1) ... [2022-02-20 21:50:53,763 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2adceeba and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:50:53, skipping insertion in model container [2022-02-20 21:50:53,763 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.02 09:50:53" (1/1) ... [2022-02-20 21:50:53,767 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-02-20 21:50:53,836 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-02-20 21:50:54,637 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.12-rc1/linux-3.12-rc1.tar.xz-144_2a-drivers--media--usb--ttusb-dec--ttusb_dec.ko-entry_point.cil.out.i[196736,196749] [2022-02-20 21:50:55,175 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-20 21:50:55,199 INFO L203 MainTranslator]: Completed pre-run [2022-02-20 21:50:55,318 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.12-rc1/linux-3.12-rc1.tar.xz-144_2a-drivers--media--usb--ttusb-dec--ttusb_dec.ko-entry_point.cil.out.i[196736,196749] [2022-02-20 21:50:55,508 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-20 21:50:55,547 INFO L208 MainTranslator]: Completed translation [2022-02-20 21:50:55,547 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:50:55 WrapperNode [2022-02-20 21:50:55,548 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-02-20 21:50:55,549 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-02-20 21:50:55,549 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-02-20 21:50:55,549 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-02-20 21:50:55,554 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:50:55" (1/1) ... [2022-02-20 21:50:55,611 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:50:55" (1/1) ... [2022-02-20 21:50:55,725 INFO L137 Inliner]: procedures = 201, calls = 1494, calls flagged for inlining = 91, calls inlined = 86, statements flattened = 2632 [2022-02-20 21:50:55,725 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-02-20 21:50:55,726 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-02-20 21:50:55,726 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-02-20 21:50:55,726 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-02-20 21:50:55,732 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:50:55" (1/1) ... [2022-02-20 21:50:55,732 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:50:55" (1/1) ... [2022-02-20 21:50:55,749 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:50:55" (1/1) ... [2022-02-20 21:50:55,750 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:50:55" (1/1) ... [2022-02-20 21:50:55,813 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:50:55" (1/1) ... [2022-02-20 21:50:55,831 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:50:55" (1/1) ... [2022-02-20 21:50:55,849 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:50:55" (1/1) ... [2022-02-20 21:50:55,867 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-02-20 21:50:55,868 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-02-20 21:50:55,868 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-02-20 21:50:55,868 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-02-20 21:50:55,869 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:50:55" (1/1) ... [2022-02-20 21:50:55,874 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-02-20 21:50:55,880 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-20 21:50:55,904 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-02-20 21:50:55,908 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-02-20 21:50:55,930 INFO L130 BoogieDeclarations]: Found specification of procedure __fswab32 [2022-02-20 21:50:55,930 INFO L138 BoogieDeclarations]: Found implementation of procedure __fswab32 [2022-02-20 21:50:55,931 INFO L130 BoogieDeclarations]: Found specification of procedure ttusb_dec_free_iso_urbs [2022-02-20 21:50:55,931 INFO L138 BoogieDeclarations]: Found implementation of procedure ttusb_dec_free_iso_urbs [2022-02-20 21:50:55,931 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_set_intfdata_12 [2022-02-20 21:50:55,931 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_set_intfdata_12 [2022-02-20 21:50:55,931 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2022-02-20 21:50:55,931 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2022-02-20 21:50:55,931 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_stop [2022-02-20 21:50:55,931 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_stop [2022-02-20 21:50:55,931 INFO L130 BoogieDeclarations]: Found specification of procedure ttusb_dec_init_dvb [2022-02-20 21:50:55,932 INFO L138 BoogieDeclarations]: Found implementation of procedure ttusb_dec_init_dvb [2022-02-20 21:50:55,932 INFO L130 BoogieDeclarations]: Found specification of procedure usb_set_interface [2022-02-20 21:50:55,932 INFO L138 BoogieDeclarations]: Found implementation of procedure usb_set_interface [2022-02-20 21:50:55,932 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_submit_urb [2022-02-20 21:50:55,932 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_submit_urb [2022-02-20 21:50:55,932 INFO L130 BoogieDeclarations]: Found specification of procedure dvb_unregister_adapter [2022-02-20 21:50:55,932 INFO L138 BoogieDeclarations]: Found implementation of procedure dvb_unregister_adapter [2022-02-20 21:50:55,932 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2022-02-20 21:50:55,932 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2022-02-20 21:50:55,933 INFO L130 BoogieDeclarations]: Found specification of procedure ttusb_dec_start_sec_feed [2022-02-20 21:50:55,933 INFO L138 BoogieDeclarations]: Found implementation of procedure ttusb_dec_start_sec_feed [2022-02-20 21:50:55,933 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_alloc_urb [2022-02-20 21:50:55,933 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_alloc_urb [2022-02-20 21:50:55,933 INFO L130 BoogieDeclarations]: Found specification of procedure mutex_lock_interruptible_nested [2022-02-20 21:50:55,933 INFO L138 BoogieDeclarations]: Found implementation of procedure mutex_lock_interruptible_nested [2022-02-20 21:50:55,933 INFO L130 BoogieDeclarations]: Found specification of procedure ttusb_dec_start_iso_xfer [2022-02-20 21:50:55,933 INFO L138 BoogieDeclarations]: Found implementation of procedure ttusb_dec_start_iso_xfer [2022-02-20 21:50:55,934 INFO L130 BoogieDeclarations]: Found specification of procedure mutex_unlock [2022-02-20 21:50:55,934 INFO L138 BoogieDeclarations]: Found implementation of procedure mutex_unlock [2022-02-20 21:50:55,934 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_error [2022-02-20 21:50:55,934 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_error [2022-02-20 21:50:55,934 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2022-02-20 21:50:55,934 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2022-02-20 21:50:55,934 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2022-02-20 21:50:55,934 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2022-02-20 21:50:55,934 INFO L130 BoogieDeclarations]: Found specification of procedure dvb_dmx_release [2022-02-20 21:50:55,935 INFO L138 BoogieDeclarations]: Found implementation of procedure dvb_dmx_release [2022-02-20 21:50:55,935 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_stop___0 [2022-02-20 21:50:55,935 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_stop___0 [2022-02-20 21:50:55,935 INFO L130 BoogieDeclarations]: Found specification of procedure spinlock_check [2022-02-20 21:50:55,935 INFO L138 BoogieDeclarations]: Found implementation of procedure spinlock_check [2022-02-20 21:50:55,935 INFO L130 BoogieDeclarations]: Found specification of procedure ttusb_dec_process_urb [2022-02-20 21:50:55,935 INFO L138 BoogieDeclarations]: Found implementation of procedure ttusb_dec_process_urb [2022-02-20 21:50:55,935 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-02-20 21:50:55,935 INFO L130 BoogieDeclarations]: Found specification of procedure input_event [2022-02-20 21:50:55,936 INFO L138 BoogieDeclarations]: Found implementation of procedure input_event [2022-02-20 21:50:55,936 INFO L130 BoogieDeclarations]: Found specification of procedure INIT_LIST_HEAD [2022-02-20 21:50:55,936 INFO L138 BoogieDeclarations]: Found implementation of procedure INIT_LIST_HEAD [2022-02-20 21:50:55,936 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-02-20 21:50:55,936 INFO L130 BoogieDeclarations]: Found specification of procedure spin_unlock_irqrestore [2022-02-20 21:50:55,936 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_unlock_irqrestore [2022-02-20 21:50:55,936 INFO L130 BoogieDeclarations]: Found specification of procedure ttusb_dec_start_feed [2022-02-20 21:50:55,936 INFO L138 BoogieDeclarations]: Found implementation of procedure ttusb_dec_start_feed [2022-02-20 21:50:55,936 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-02-20 21:50:55,937 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2022-02-20 21:50:55,937 INFO L130 BoogieDeclarations]: Found specification of procedure ttusb_dec_probe [2022-02-20 21:50:55,937 INFO L138 BoogieDeclarations]: Found implementation of procedure ttusb_dec_probe [2022-02-20 21:50:55,937 INFO L130 BoogieDeclarations]: Found specification of procedure list_del [2022-02-20 21:50:55,937 INFO L138 BoogieDeclarations]: Found implementation of procedure list_del [2022-02-20 21:50:55,937 INFO L130 BoogieDeclarations]: Found specification of procedure __mutex_init [2022-02-20 21:50:55,937 INFO L138 BoogieDeclarations]: Found implementation of procedure __mutex_init [2022-02-20 21:50:55,937 INFO L130 BoogieDeclarations]: Found specification of procedure ttusb_dec_start_ts_feed [2022-02-20 21:50:55,938 INFO L138 BoogieDeclarations]: Found implementation of procedure ttusb_dec_start_ts_feed [2022-02-20 21:50:55,938 INFO L130 BoogieDeclarations]: Found specification of procedure kzalloc [2022-02-20 21:50:55,938 INFO L138 BoogieDeclarations]: Found implementation of procedure kzalloc [2022-02-20 21:50:55,938 INFO L130 BoogieDeclarations]: Found specification of procedure kmalloc [2022-02-20 21:50:55,938 INFO L138 BoogieDeclarations]: Found implementation of procedure kmalloc [2022-02-20 21:50:55,938 INFO L130 BoogieDeclarations]: Found specification of procedure __fswab16 [2022-02-20 21:50:55,938 INFO L138 BoogieDeclarations]: Found implementation of procedure __fswab16 [2022-02-20 21:50:55,938 INFO L130 BoogieDeclarations]: Found specification of procedure ttusb_dec_exit_dvb [2022-02-20 21:50:55,938 INFO L138 BoogieDeclarations]: Found implementation of procedure ttusb_dec_exit_dvb [2022-02-20 21:50:55,939 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_lock_irqsave [2022-02-20 21:50:55,939 INFO L138 BoogieDeclarations]: Found implementation of procedure _raw_spin_lock_irqsave [2022-02-20 21:50:55,939 INFO L130 BoogieDeclarations]: Found specification of procedure ttusb_dec_set_model [2022-02-20 21:50:55,939 INFO L138 BoogieDeclarations]: Found implementation of procedure ttusb_dec_set_model [2022-02-20 21:50:55,939 INFO L130 BoogieDeclarations]: Found specification of procedure release_firmware [2022-02-20 21:50:55,939 INFO L138 BoogieDeclarations]: Found implementation of procedure release_firmware [2022-02-20 21:50:55,939 INFO L130 BoogieDeclarations]: Found specification of procedure input_report_key [2022-02-20 21:50:55,939 INFO L138 BoogieDeclarations]: Found implementation of procedure input_report_key [2022-02-20 21:50:55,939 INFO L130 BoogieDeclarations]: Found specification of procedure ttusb_dec_stop_iso_xfer [2022-02-20 21:50:55,940 INFO L138 BoogieDeclarations]: Found implementation of procedure ttusb_dec_stop_iso_xfer [2022-02-20 21:50:55,940 INFO L130 BoogieDeclarations]: Found specification of procedure dvb_filter_pes2ts_init [2022-02-20 21:50:55,940 INFO L138 BoogieDeclarations]: Found implementation of procedure dvb_filter_pes2ts_init [2022-02-20 21:50:55,940 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~int [2022-02-20 21:50:55,940 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2022-02-20 21:50:55,940 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2022-02-20 21:50:55,940 INFO L130 BoogieDeclarations]: Found specification of procedure get_dma_ops [2022-02-20 21:50:55,940 INFO L138 BoogieDeclarations]: Found implementation of procedure get_dma_ops [2022-02-20 21:50:55,940 INFO L130 BoogieDeclarations]: Found specification of procedure __raw_spin_lock_init [2022-02-20 21:50:55,941 INFO L138 BoogieDeclarations]: Found implementation of procedure __raw_spin_lock_init [2022-02-20 21:50:55,941 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2022-02-20 21:50:55,941 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_submit_urb_3 [2022-02-20 21:50:55,941 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_submit_urb_3 [2022-02-20 21:50:55,941 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_submit_urb_4 [2022-02-20 21:50:55,941 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_submit_urb_4 [2022-02-20 21:50:55,941 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_submit_urb_2 [2022-02-20 21:50:55,941 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_submit_urb_2 [2022-02-20 21:50:55,941 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_submit_urb_7 [2022-02-20 21:50:55,942 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_submit_urb_7 [2022-02-20 21:50:55,942 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~int~X~$Pointer$~X~int~X~$Pointer$~X~int~TO~int [2022-02-20 21:50:55,942 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~int~X~$Pointer$~X~int~X~$Pointer$~X~int~TO~int [2022-02-20 21:50:55,942 INFO L130 BoogieDeclarations]: Found specification of procedure usb_bulk_msg [2022-02-20 21:50:55,942 INFO L138 BoogieDeclarations]: Found implementation of procedure usb_bulk_msg [2022-02-20 21:50:55,942 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-02-20 21:50:55,942 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2022-02-20 21:50:55,942 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2022-02-20 21:50:55,942 INFO L130 BoogieDeclarations]: Found specification of procedure __create_pipe [2022-02-20 21:50:55,943 INFO L138 BoogieDeclarations]: Found implementation of procedure __create_pipe [2022-02-20 21:50:55,943 INFO L130 BoogieDeclarations]: Found specification of procedure usb_kill_urb [2022-02-20 21:50:55,943 INFO L138 BoogieDeclarations]: Found implementation of procedure usb_kill_urb [2022-02-20 21:50:55,943 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2022-02-20 21:50:55,943 INFO L138 BoogieDeclarations]: Found implementation of procedure kfree [2022-02-20 21:50:55,943 INFO L130 BoogieDeclarations]: Found specification of procedure list_add_tail [2022-02-20 21:50:55,943 INFO L138 BoogieDeclarations]: Found implementation of procedure list_add_tail [2022-02-20 21:50:55,943 INFO L130 BoogieDeclarations]: Found specification of procedure ttusb_dec_send_command [2022-02-20 21:50:55,944 INFO L138 BoogieDeclarations]: Found implementation of procedure ttusb_dec_send_command [2022-02-20 21:50:55,944 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-02-20 21:50:55,944 INFO L130 BoogieDeclarations]: Found specification of procedure ttusb_dec_setup_urbs [2022-02-20 21:50:55,944 INFO L138 BoogieDeclarations]: Found implementation of procedure ttusb_dec_setup_urbs [2022-02-20 21:50:55,944 INFO L130 BoogieDeclarations]: Found specification of procedure input_sync [2022-02-20 21:50:55,944 INFO L138 BoogieDeclarations]: Found implementation of procedure input_sync [2022-02-20 21:50:55,944 INFO L130 BoogieDeclarations]: Found specification of procedure ldv__builtin_expect [2022-02-20 21:50:55,944 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv__builtin_expect [2022-02-20 21:50:55,944 INFO L130 BoogieDeclarations]: Found specification of procedure ttusb_dec_set_pids [2022-02-20 21:50:55,945 INFO L138 BoogieDeclarations]: Found implementation of procedure ttusb_dec_set_pids [2022-02-20 21:50:55,945 INFO L130 BoogieDeclarations]: Found specification of procedure ttusb_dec_exit_usb [2022-02-20 21:50:55,945 INFO L138 BoogieDeclarations]: Found implementation of procedure ttusb_dec_exit_usb [2022-02-20 21:50:55,945 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-02-20 21:50:55,945 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-02-20 21:50:55,945 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_undef_int [2022-02-20 21:50:55,945 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_undef_int [2022-02-20 21:50:55,945 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-02-20 21:50:55,945 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2022-02-20 21:50:55,946 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2022-02-20 21:50:55,946 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~int [2022-02-20 21:50:55,946 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~int [2022-02-20 21:50:55,946 INFO L130 BoogieDeclarations]: Found specification of procedure ttusb_init_rc [2022-02-20 21:50:55,946 INFO L138 BoogieDeclarations]: Found implementation of procedure ttusb_init_rc [2022-02-20 21:50:55,946 INFO L130 BoogieDeclarations]: Found specification of procedure dvb_dmxdev_release [2022-02-20 21:50:55,946 INFO L138 BoogieDeclarations]: Found implementation of procedure dvb_dmxdev_release [2022-02-20 21:50:55,946 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~$Pointer$~TO~int [2022-02-20 21:50:55,946 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~$Pointer$~TO~int [2022-02-20 21:50:55,947 INFO L130 BoogieDeclarations]: Found specification of procedure ttusb_dec_disconnect [2022-02-20 21:50:55,947 INFO L138 BoogieDeclarations]: Found implementation of procedure ttusb_dec_disconnect [2022-02-20 21:50:55,947 INFO L130 BoogieDeclarations]: Found specification of procedure ttusb_dec_handle_irq [2022-02-20 21:50:55,947 INFO L138 BoogieDeclarations]: Found implementation of procedure ttusb_dec_handle_irq [2022-02-20 21:50:55,947 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_free_urb [2022-02-20 21:50:55,947 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_free_urb [2022-02-20 21:50:55,947 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-02-20 21:50:55,947 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-02-20 21:50:55,947 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-02-20 21:50:56,451 INFO L234 CfgBuilder]: Building ICFG [2022-02-20 21:50:56,455 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-02-20 21:50:56,669 INFO L766 $ProcedureCfgBuilder]: dead code at ProgramPoint ldv_stopFINAL: assume true; [2022-02-20 21:51:01,326 INFO L766 $ProcedureCfgBuilder]: dead code at ProgramPoint ldv_stop___0FINAL: assume true; [2022-02-20 21:51:01,614 INFO L275 CfgBuilder]: Performing block encoding [2022-02-20 21:51:01,634 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-02-20 21:51:01,634 INFO L299 CfgBuilder]: Removed 0 assume(true) statements. [2022-02-20 21:51:01,637 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 09:51:01 BoogieIcfgContainer [2022-02-20 21:51:01,637 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-02-20 21:51:01,638 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-02-20 21:51:01,638 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-02-20 21:51:01,640 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-02-20 21:51:01,641 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 20.02 09:50:53" (1/3) ... [2022-02-20 21:51:01,641 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1cbd0155 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.02 09:51:01, skipping insertion in model container [2022-02-20 21:51:01,641 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:50:55" (2/3) ... [2022-02-20 21:51:01,642 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1cbd0155 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.02 09:51:01, skipping insertion in model container [2022-02-20 21:51:01,642 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 09:51:01" (3/3) ... [2022-02-20 21:51:01,643 INFO L111 eAbstractionObserver]: Analyzing ICFG linux-3.12-rc1.tar.xz-144_2a-drivers--media--usb--ttusb-dec--ttusb_dec.ko-entry_point.cil.out.i [2022-02-20 21:51:01,646 INFO L205 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-02-20 21:51:01,647 INFO L164 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-02-20 21:51:01,688 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-02-20 21:51:01,694 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2022-02-20 21:51:01,694 INFO L340 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-02-20 21:51:01,737 INFO L276 IsEmpty]: Start isEmpty. Operand has 1076 states, 777 states have (on average 1.3384813384813385) internal successors, (1040), 804 states have internal predecessors, (1040), 231 states have call successors, (231), 68 states have call predecessors, (231), 66 states have return successors, (225), 217 states have call predecessors, (225), 225 states have call successors, (225) [2022-02-20 21:51:01,745 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2022-02-20 21:51:01,745 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:51:01,746 INFO L514 BasicCegarLoop]: trace histogram [5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:51:01,746 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:51:01,750 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:51:01,750 INFO L85 PathProgramCache]: Analyzing trace with hash 303000669, now seen corresponding path program 1 times [2022-02-20 21:51:01,756 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:51:01,756 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1818039301] [2022-02-20 21:51:01,757 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:51:01,757 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:51:02,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:02,196 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 21:51:02,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:02,214 INFO L290 TraceCheckUtils]: 0: Hoare triple {1106#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet76#1 && #t~nondet76#1 <= 2147483647;~tmp___0~1#1 := #t~nondet76#1;havoc #t~nondet76#1; {1079#true} is VALID [2022-02-20 21:51:02,215 INFO L290 TraceCheckUtils]: 1: Hoare triple {1079#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {1079#true} is VALID [2022-02-20 21:51:02,215 INFO L290 TraceCheckUtils]: 2: Hoare triple {1079#true} assume true; {1079#true} is VALID [2022-02-20 21:51:02,215 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1079#true} {1079#true} #2744#return; {1079#true} is VALID [2022-02-20 21:51:02,216 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-02-20 21:51:02,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:02,229 INFO L290 TraceCheckUtils]: 0: Hoare triple {1106#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet76#1 && #t~nondet76#1 <= 2147483647;~tmp___0~1#1 := #t~nondet76#1;havoc #t~nondet76#1; {1079#true} is VALID [2022-02-20 21:51:02,229 INFO L290 TraceCheckUtils]: 1: Hoare triple {1079#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {1079#true} is VALID [2022-02-20 21:51:02,229 INFO L290 TraceCheckUtils]: 2: Hoare triple {1079#true} assume true; {1079#true} is VALID [2022-02-20 21:51:02,230 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1079#true} {1079#true} #2746#return; {1079#true} is VALID [2022-02-20 21:51:02,230 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2022-02-20 21:51:02,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:02,242 INFO L290 TraceCheckUtils]: 0: Hoare triple {1106#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet76#1 && #t~nondet76#1 <= 2147483647;~tmp___0~1#1 := #t~nondet76#1;havoc #t~nondet76#1; {1079#true} is VALID [2022-02-20 21:51:02,243 INFO L290 TraceCheckUtils]: 1: Hoare triple {1079#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {1079#true} is VALID [2022-02-20 21:51:02,243 INFO L290 TraceCheckUtils]: 2: Hoare triple {1079#true} assume true; {1079#true} is VALID [2022-02-20 21:51:02,243 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1079#true} {1079#true} #2748#return; {1079#true} is VALID [2022-02-20 21:51:02,243 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 20 [2022-02-20 21:51:02,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:02,255 INFO L290 TraceCheckUtils]: 0: Hoare triple {1106#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet76#1 && #t~nondet76#1 <= 2147483647;~tmp___0~1#1 := #t~nondet76#1;havoc #t~nondet76#1; {1079#true} is VALID [2022-02-20 21:51:02,256 INFO L290 TraceCheckUtils]: 1: Hoare triple {1079#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {1079#true} is VALID [2022-02-20 21:51:02,256 INFO L290 TraceCheckUtils]: 2: Hoare triple {1079#true} assume true; {1079#true} is VALID [2022-02-20 21:51:02,256 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1079#true} {1079#true} #2750#return; {1079#true} is VALID [2022-02-20 21:51:02,256 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-02-20 21:51:02,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:02,269 INFO L290 TraceCheckUtils]: 0: Hoare triple {1106#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet76#1 && #t~nondet76#1 <= 2147483647;~tmp___0~1#1 := #t~nondet76#1;havoc #t~nondet76#1; {1079#true} is VALID [2022-02-20 21:51:02,269 INFO L290 TraceCheckUtils]: 1: Hoare triple {1079#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {1079#true} is VALID [2022-02-20 21:51:02,269 INFO L290 TraceCheckUtils]: 2: Hoare triple {1079#true} assume true; {1079#true} is VALID [2022-02-20 21:51:02,270 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1079#true} {1079#true} #2752#return; {1079#true} is VALID [2022-02-20 21:51:02,276 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 33 [2022-02-20 21:51:02,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:02,289 INFO L290 TraceCheckUtils]: 0: Hoare triple {1107#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr867 := 0; {1079#true} is VALID [2022-02-20 21:51:02,289 INFO L290 TraceCheckUtils]: 1: Hoare triple {1079#true} assume !(#t~loopctr867 % 18446744073709551616 < #amount % 18446744073709551616); {1079#true} is VALID [2022-02-20 21:51:02,289 INFO L290 TraceCheckUtils]: 2: Hoare triple {1079#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1079#true} is VALID [2022-02-20 21:51:02,289 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1079#true} {1079#true} #2754#return; {1079#true} is VALID [2022-02-20 21:51:02,291 INFO L290 TraceCheckUtils]: 0: Hoare triple {1079#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(96, 2);call #Ultimate.allocInit(10, 3);call #Ultimate.allocInit(119, 4);call #Ultimate.allocInit(38, 5);call #Ultimate.allocInit(21, 6);call #Ultimate.allocInit(32, 7);call #Ultimate.allocInit(21, 8);call #Ultimate.allocInit(17, 9);call #Ultimate.allocInit(21, 10);call #Ultimate.allocInit(44, 11);call #Ultimate.allocInit(21, 12);call #Ultimate.allocInit(4, 13);call write~init~int(37, 13, 0, 1);call write~init~int(115, 13, 1, 1);call write~init~int(10, 13, 2, 1);call write~init~int(0, 13, 3, 1);call #Ultimate.allocInit(23, 14);call #Ultimate.allocInit(31, 15);call #Ultimate.allocInit(23, 16);call #Ultimate.allocInit(14, 17);call #Ultimate.allocInit(23, 18);call #Ultimate.allocInit(8, 19);call #Ultimate.allocInit(2, 20);call write~init~int(10, 20, 0, 1);call write~init~int(0, 20, 1, 1);call #Ultimate.allocInit(43, 21);call #Ultimate.allocInit(23, 22);call #Ultimate.allocInit(42, 23);call #Ultimate.allocInit(23, 24);call #Ultimate.allocInit(13, 25);call #Ultimate.allocInit(23, 26);call #Ultimate.allocInit(8, 27);call #Ultimate.allocInit(2, 28);call write~init~int(10, 28, 0, 1);call write~init~int(0, 28, 1, 1);call #Ultimate.allocInit(4, 29);call write~init~int(37, 29, 0, 1);call write~init~int(115, 29, 1, 1);call write~init~int(10, 29, 2, 1);call write~init~int(0, 29, 3, 1);call #Ultimate.allocInit(24, 30);call #Ultimate.allocInit(4, 31);call write~init~int(37, 31, 0, 1);call write~init~int(115, 31, 1, 1);call write~init~int(10, 31, 2, 1);call write~init~int(0, 31, 3, 1);call #Ultimate.allocInit(19, 32);call #Ultimate.allocInit(35, 33);call #Ultimate.allocInit(22, 34);call #Ultimate.allocInit(34, 35);call #Ultimate.allocInit(22, 36);call #Ultimate.allocInit(29, 37);call #Ultimate.allocInit(22, 38);call #Ultimate.allocInit(35, 39);call #Ultimate.allocInit(25, 40);call #Ultimate.allocInit(34, 41);call #Ultimate.allocInit(25, 42);call #Ultimate.allocInit(45, 43);call #Ultimate.allocInit(25, 44);call #Ultimate.allocInit(35, 45);call #Ultimate.allocInit(28, 46);call #Ultimate.allocInit(39, 47);call #Ultimate.allocInit(28, 48);call #Ultimate.allocInit(19, 49);call #Ultimate.allocInit(22, 50);call #Ultimate.allocInit(4, 51);call write~init~int(37, 51, 0, 1);call write~init~int(115, 51, 1, 1);call write~init~int(10, 51, 2, 1);call write~init~int(0, 51, 3, 1);call #Ultimate.allocInit(21, 52);call #Ultimate.allocInit(4, 53);call write~init~int(37, 53, 0, 1);call write~init~int(115, 53, 1, 1);call write~init~int(10, 53, 2, 1);call write~init~int(0, 53, 3, 1);call #Ultimate.allocInit(24, 54);call #Ultimate.allocInit(4, 55);call write~init~int(37, 55, 0, 1);call write~init~int(115, 55, 1, 1);call write~init~int(10, 55, 2, 1);call write~init~int(0, 55, 3, 1);call #Ultimate.allocInit(25, 56);call #Ultimate.allocInit(40, 57);call #Ultimate.allocInit(25, 58);call #Ultimate.allocInit(4, 59);call write~init~int(37, 59, 0, 1);call write~init~int(115, 59, 1, 1);call write~init~int(10, 59, 2, 1);call write~init~int(0, 59, 3, 1);call #Ultimate.allocInit(24, 60);call #Ultimate.allocInit(11, 61);call #Ultimate.allocInit(12, 62);call #Ultimate.allocInit(11, 63);call #Ultimate.allocInit(17, 64);call #Ultimate.allocInit(2, 65);call write~init~int(10, 65, 0, 1);call write~init~int(0, 65, 1, 1);call #Ultimate.allocInit(27, 66);call #Ultimate.allocInit(27, 67);call #Ultimate.allocInit(45, 68);call #Ultimate.allocInit(25, 69);call #Ultimate.allocInit(42, 70);call #Ultimate.allocInit(26, 71);call #Ultimate.allocInit(4, 72);call write~init~int(37, 72, 0, 1);call write~init~int(115, 72, 1, 1);call write~init~int(10, 72, 2, 1);call write~init~int(0, 72, 3, 1);call #Ultimate.allocInit(25, 73);call #Ultimate.allocInit(4, 74);call write~init~int(37, 74, 0, 1);call write~init~int(115, 74, 1, 1);call write~init~int(10, 74, 2, 1);call write~init~int(0, 74, 3, 1);call #Ultimate.allocInit(21, 75);call #Ultimate.allocInit(15, 76);call #Ultimate.allocInit(22, 77);call #Ultimate.allocInit(4, 78);call write~init~int(37, 78, 0, 1);call write~init~int(115, 78, 1, 1);call write~init~int(10, 78, 2, 1);call write~init~int(0, 78, 3, 1);call #Ultimate.allocInit(20, 79);call #Ultimate.allocInit(4, 80);call write~init~int(37, 80, 0, 1);call write~init~int(115, 80, 1, 1);call write~init~int(10, 80, 2, 1);call write~init~int(0, 80, 3, 1);call #Ultimate.allocInit(24, 81);call #Ultimate.allocInit(4, 82);call write~init~int(37, 82, 0, 1);call write~init~int(115, 82, 1, 1);call write~init~int(10, 82, 2, 1);call write~init~int(0, 82, 3, 1);call #Ultimate.allocInit(25, 83);call #Ultimate.allocInit(46, 84);call #Ultimate.allocInit(25, 85);call #Ultimate.allocInit(36, 86);call #Ultimate.allocInit(8, 87);call #Ultimate.allocInit(25, 88);call #Ultimate.allocInit(27, 89);call #Ultimate.allocInit(14, 90);call #Ultimate.allocInit(4, 91);call write~init~int(37, 91, 0, 1);call write~init~int(115, 91, 1, 1);call write~init~int(10, 91, 2, 1);call write~init~int(0, 91, 3, 1);call #Ultimate.allocInit(21, 92);call #Ultimate.allocInit(4, 93);call write~init~int(37, 93, 0, 1);call write~init~int(115, 93, 1, 1);call write~init~int(10, 93, 2, 1);call write~init~int(0, 93, 3, 1);call #Ultimate.allocInit(19, 94);call #Ultimate.allocInit(16, 95);call #Ultimate.allocInit(16, 96);call #Ultimate.allocInit(4, 97);call write~init~int(37, 97, 0, 1);call write~init~int(115, 97, 1, 1);call write~init~int(10, 97, 2, 1);call write~init~int(0, 97, 3, 1);call #Ultimate.allocInit(19, 98);call #Ultimate.allocInit(33, 99);call #Ultimate.allocInit(19, 100);call #Ultimate.allocInit(54, 101);call #Ultimate.allocInit(19, 102);call #Ultimate.allocInit(89, 103);call #Ultimate.allocInit(19, 104);call #Ultimate.allocInit(34, 105);call #Ultimate.allocInit(4, 106);call write~init~int(37, 106, 0, 1);call write~init~int(115, 106, 1, 1);call write~init~int(10, 106, 2, 1);call write~init~int(0, 106, 3, 1);call #Ultimate.allocInit(19, 107);call #Ultimate.allocInit(41, 108);call #Ultimate.allocInit(34, 109);call #Ultimate.allocInit(64, 110);call #Ultimate.allocInit(19, 111);call #Ultimate.allocInit(4, 112);call write~init~int(37, 112, 0, 1);call write~init~int(115, 112, 1, 1);call write~init~int(10, 112, 2, 1);call write~init~int(0, 112, 3, 1);call #Ultimate.allocInit(19, 113);call #Ultimate.allocInit(43, 114);call #Ultimate.allocInit(19, 115);call #Ultimate.allocInit(35, 116);call #Ultimate.allocInit(19, 117);call #Ultimate.allocInit(38, 118);call #Ultimate.allocInit(19, 119);call #Ultimate.allocInit(35, 120);call #Ultimate.allocInit(19, 121);call #Ultimate.allocInit(35, 122);call #Ultimate.allocInit(19, 123);call #Ultimate.allocInit(4, 124);call write~init~int(37, 124, 0, 1);call write~init~int(115, 124, 1, 1);call write~init~int(10, 124, 2, 1);call write~init~int(0, 124, 3, 1);call #Ultimate.allocInit(19, 125);call #Ultimate.allocInit(4, 126);call write~init~int(37, 126, 0, 1);call write~init~int(115, 126, 1, 1);call write~init~int(10, 126, 2, 1);call write~init~int(0, 126, 3, 1);call #Ultimate.allocInit(18, 127);call #Ultimate.allocInit(4, 128);call write~init~int(37, 128, 0, 1);call write~init~int(115, 128, 1, 1);call write~init~int(10, 128, 2, 1);call write~init~int(0, 128, 3, 1);call #Ultimate.allocInit(19, 129);call #Ultimate.allocInit(38, 130);call #Ultimate.allocInit(4, 131);call write~init~int(37, 131, 0, 1);call write~init~int(115, 131, 1, 1);call write~init~int(10, 131, 2, 1);call write~init~int(0, 131, 3, 1);call #Ultimate.allocInit(16, 132);call #Ultimate.allocInit(31, 133);call #Ultimate.allocInit(16, 134);call #Ultimate.allocInit(71, 135);call #Ultimate.allocInit(42, 136);call #Ultimate.allocInit(4, 137);call write~init~int(37, 137, 0, 1);call write~init~int(115, 137, 1, 1);call write~init~int(10, 137, 2, 1);call write~init~int(0, 137, 3, 1);call #Ultimate.allocInit(21, 138);call #Ultimate.allocInit(10, 139);call #Ultimate.allocInit(23, 140);call #Ultimate.allocInit(10, 141);call #Ultimate.allocInit(23, 142);call #Ultimate.allocInit(10, 143);call #Ultimate.allocInit(23, 144);call #Ultimate.allocInit(10, 145);call #Ultimate.allocInit(10, 146);~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_2~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~ttusb_dec_driver_group1~0.base, ~ttusb_dec_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~debug~0 := 0;~output_pva~0 := 0;~enable_rc~0 := 0;~#adapter_nr~0.base, ~#adapter_nr~0.offset := 147, 0;call #Ultimate.allocInit(16, 147);call write~init~int(-1, ~#adapter_nr~0.base, ~#adapter_nr~0.offset, 2);call write~init~int(-1, ~#adapter_nr~0.base, 2 + ~#adapter_nr~0.offset, 2);call write~init~int(-1, ~#adapter_nr~0.base, 4 + ~#adapter_nr~0.offset, 2);call write~init~int(-1, ~#adapter_nr~0.base, 6 + ~#adapter_nr~0.offset, 2);call write~init~int(-1, ~#adapter_nr~0.base, 8 + ~#adapter_nr~0.offset, 2);call write~init~int(-1, ~#adapter_nr~0.base, 10 + ~#adapter_nr~0.offset, 2);call write~init~int(-1, ~#adapter_nr~0.base, 12 + ~#adapter_nr~0.offset, 2);call write~init~int(-1, ~#adapter_nr~0.base, 14 + ~#adapter_nr~0.offset, 2);~#rc_keys~0.base, ~#rc_keys~0.offset := 148, 0;call #Ultimate.allocInit(52, 148);call write~init~int(116, ~#rc_keys~0.base, ~#rc_keys~0.offset, 2);call write~init~int(113, ~#rc_keys~0.base, 2 + ~#rc_keys~0.offset, 2);call write~init~int(2, ~#rc_keys~0.base, 4 + ~#rc_keys~0.offset, 2);call write~init~int(3, ~#rc_keys~0.base, 6 + ~#rc_keys~0.offset, 2);call write~init~int(4, ~#rc_keys~0.base, 8 + ~#rc_keys~0.offset, 2);call write~init~int(5, ~#rc_keys~0.base, 10 + ~#rc_keys~0.offset, 2);call write~init~int(6, ~#rc_keys~0.base, 12 + ~#rc_keys~0.offset, 2);call write~init~int(7, ~#rc_keys~0.base, 14 + ~#rc_keys~0.offset, 2);call write~init~int(8, ~#rc_keys~0.base, 16 + ~#rc_keys~0.offset, 2);call write~init~int(9, ~#rc_keys~0.base, 18 + ~#rc_keys~0.offset, 2);call write~init~int(10, ~#rc_keys~0.base, 20 + ~#rc_keys~0.offset, 2);call write~init~int(11, ~#rc_keys~0.base, 22 + ~#rc_keys~0.offset, 2);call write~init~int(402, ~#rc_keys~0.base, 24 + ~#rc_keys~0.offset, 2);call write~init~int(114, ~#rc_keys~0.base, 26 + ~#rc_keys~0.offset, 2);call write~init~int(352, ~#rc_keys~0.base, 28 + ~#rc_keys~0.offset, 2);call write~init~int(115, ~#rc_keys~0.base, 30 + ~#rc_keys~0.offset, 2);call write~init~int(403, ~#rc_keys~0.base, 32 + ~#rc_keys~0.offset, 2);call write~init~int(412, ~#rc_keys~0.base, 34 + ~#rc_keys~0.offset, 2);call write~init~int(1, ~#rc_keys~0.base, 36 + ~#rc_keys~0.offset, 2);call write~init~int(398, ~#rc_keys~0.base, 38 + ~#rc_keys~0.offset, 2);call write~init~int(399, ~#rc_keys~0.base, 40 + ~#rc_keys~0.offset, 2);call write~init~int(400, ~#rc_keys~0.base, 42 + ~#rc_keys~0.offset, 2);call write~init~int(401, ~#rc_keys~0.base, 44 + ~#rc_keys~0.offset, 2);call write~init~int(357, ~#rc_keys~0.base, 46 + ~#rc_keys~0.offset, 2);call write~init~int(50, ~#rc_keys~0.base, 48 + ~#rc_keys~0.offset, 2);call write~init~int(385, ~#rc_keys~0.base, 50 + ~#rc_keys~0.offset, 2);~#fe_config~0.base, ~#fe_config~0.offset := 149, 0;call #Ultimate.allocInit(8, 149);call write~init~$Pointer$(#funAddr~fe_send_command.base, #funAddr~fe_send_command.offset, ~#fe_config~0.base, ~#fe_config~0.offset, 8);~#ttusb_dec_table~0.base, ~#ttusb_dec_table~0.offset := 150, 0;call #Ultimate.allocInit(100, 150);call write~init~int(3, ~#ttusb_dec_table~0.base, ~#ttusb_dec_table~0.offset, 2);call write~init~int(2888, ~#ttusb_dec_table~0.base, 2 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(4102, ~#ttusb_dec_table~0.base, 4 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(0, ~#ttusb_dec_table~0.base, 6 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(0, ~#ttusb_dec_table~0.base, 8 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(0, ~#ttusb_dec_table~0.base, 10 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 11 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 12 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 13 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 14 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 15 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 16 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 17 + ~#ttusb_dec_table~0.offset, 8);call write~init~int(3, ~#ttusb_dec_table~0.base, 25 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(2888, ~#ttusb_dec_table~0.base, 27 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(4104, ~#ttusb_dec_table~0.base, 29 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(0, ~#ttusb_dec_table~0.base, 31 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(0, ~#ttusb_dec_table~0.base, 33 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(0, ~#ttusb_dec_table~0.base, 35 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 36 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 37 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 38 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 39 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 40 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 41 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 42 + ~#ttusb_dec_table~0.offset, 8);call write~init~int(3, ~#ttusb_dec_table~0.base, 50 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(2888, ~#ttusb_dec_table~0.base, 52 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(4105, ~#ttusb_dec_table~0.base, 54 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(0, ~#ttusb_dec_table~0.base, 56 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(0, ~#ttusb_dec_table~0.base, 58 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(0, ~#ttusb_dec_table~0.base, 60 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 61 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 62 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 63 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 64 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 65 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 66 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 67 + ~#ttusb_dec_table~0.offset, 8);call write~init~int(0, ~#ttusb_dec_table~0.base, 75 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(0, ~#ttusb_dec_table~0.base, 77 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(0, ~#ttusb_dec_table~0.base, 79 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(0, ~#ttusb_dec_table~0.base, 81 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(0, ~#ttusb_dec_table~0.base, 83 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(0, ~#ttusb_dec_table~0.base, 85 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 86 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 87 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 88 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 89 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 90 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 91 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 92 + ~#ttusb_dec_table~0.offset, 8);~#ttusb_dec_driver~0.base, ~#ttusb_dec_driver~0.offset := 151, 0;call #Ultimate.allocInit(285, 151);call write~init~$Pointer$(145, 0, ~#ttusb_dec_driver~0.base, ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~ttusb_dec_probe.base, #funAddr~ttusb_dec_probe.offset, ~#ttusb_dec_driver~0.base, 8 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~ttusb_dec_disconnect.base, #funAddr~ttusb_dec_disconnect.offset, ~#ttusb_dec_driver~0.base, 16 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 24 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 32 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 40 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 48 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 56 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 64 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(~#ttusb_dec_table~0.base, ~#ttusb_dec_table~0.offset, ~#ttusb_dec_driver~0.base, 72 + ~#ttusb_dec_driver~0.offset, 8);call write~init~int(0, ~#ttusb_dec_driver~0.base, 80 + ~#ttusb_dec_driver~0.offset, 4);call write~init~int(0, ~#ttusb_dec_driver~0.base, 84 + ~#ttusb_dec_driver~0.offset, 4);call write~init~int(0, ~#ttusb_dec_driver~0.base, 88 + ~#ttusb_dec_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 92 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 100 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 108 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 116 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 124 + ~#ttusb_dec_driver~0.offset, 8);call write~init~int(0, ~#ttusb_dec_driver~0.base, 132 + ~#ttusb_dec_driver~0.offset, 4);call write~init~int(0, ~#ttusb_dec_driver~0.base, 136 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 148 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 156 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 164 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 172 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 180 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 188 + ~#ttusb_dec_driver~0.offset, 8);call write~init~int(0, ~#ttusb_dec_driver~0.base, 196 + ~#ttusb_dec_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 197 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 205 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 213 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 221 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 229 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 237 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 245 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 253 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 261 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 269 + ~#ttusb_dec_driver~0.offset, 8);call write~init~int(0, ~#ttusb_dec_driver~0.base, 277 + ~#ttusb_dec_driver~0.offset, 4);call write~init~int(0, ~#ttusb_dec_driver~0.base, 281 + ~#ttusb_dec_driver~0.offset, 1);call write~init~int(0, ~#ttusb_dec_driver~0.base, 282 + ~#ttusb_dec_driver~0.offset, 1);call write~init~int(0, ~#ttusb_dec_driver~0.base, 283 + ~#ttusb_dec_driver~0.offset, 1);call write~init~int(0, ~#ttusb_dec_driver~0.base, 284 + ~#ttusb_dec_driver~0.offset, 1);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.bInterfaceNumber := 0;~__mod_usb_device_table~0.driver_info := 0;~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {1079#true} is VALID [2022-02-20 21:51:02,292 INFO L290 TraceCheckUtils]: 1: Hoare triple {1079#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret800#1.base, main_#t~ret800#1.offset, main_#t~ret801#1.base, main_#t~ret801#1.offset, main_#t~nondet802#1, main_#t~ret803#1.base, main_#t~ret803#1.offset, main_#t~ret804#1.base, main_#t~ret804#1.offset, main_#t~ret805#1.base, main_#t~ret805#1.offset, main_#t~memset~res806#1.base, main_#t~memset~res806#1.offset, main_#t~nondet807#1, main_#t~switch808#1, main_#t~nondet809#1, main_#t~switch810#1, main_#t~ret811#1, main_#t~nondet812#1, main_#t~switch813#1, main_#t~ret814#1, main_#t~nondet815#1, main_#t~switch816#1, main_#t~mem817#1, main_#t~ret818#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~37#1.base, main_~tmp~37#1.offset, main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset, main_~tmp___0~15#1.base, main_~tmp___0~15#1.offset, main_~ldvarg4~0#1, main_~tmp___1~10#1, main_~ldvarg3~0#1.base, main_~ldvarg3~0#1.offset, main_~tmp___2~7#1.base, main_~tmp___2~7#1.offset, main_~#ldvarg5~0#1.base, main_~#ldvarg5~0#1.offset, main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset, main_~tmp___3~3#1.base, main_~tmp___3~3#1.offset, main_~ldvarg6~0#1.base, main_~ldvarg6~0#1.offset, main_~tmp___4~2#1.base, main_~tmp___4~2#1.offset, main_~tmp___5~2#1, main_~tmp___6~1#1, main_~tmp___7~1#1, main_~tmp___8~0#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~37#1.base, main_~tmp~37#1.offset;havoc main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset;havoc main_~tmp___0~15#1.base, main_~tmp___0~15#1.offset;havoc main_~ldvarg4~0#1;havoc main_~tmp___1~10#1;havoc main_~ldvarg3~0#1.base, main_~ldvarg3~0#1.offset;havoc main_~tmp___2~7#1.base, main_~tmp___2~7#1.offset;call main_~#ldvarg5~0#1.base, main_~#ldvarg5~0#1.offset := #Ultimate.allocOnStack(1);havoc main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset;havoc main_~tmp___3~3#1.base, main_~tmp___3~3#1.offset;havoc main_~ldvarg6~0#1.base, main_~ldvarg6~0#1.offset;havoc main_~tmp___4~2#1.base, main_~tmp___4~2#1.offset;havoc main_~tmp___5~2#1;havoc main_~tmp___6~1#1;havoc main_~tmp___7~1#1;havoc main_~tmp___8~0#1; {1079#true} is VALID [2022-02-20 21:51:02,298 INFO L272 TraceCheckUtils]: 2: Hoare triple {1079#true} call main_#t~ret800#1.base, main_#t~ret800#1.offset := ldv_zalloc(32); {1106#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:02,299 INFO L290 TraceCheckUtils]: 3: Hoare triple {1106#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet76#1 && #t~nondet76#1 <= 2147483647;~tmp___0~1#1 := #t~nondet76#1;havoc #t~nondet76#1; {1079#true} is VALID [2022-02-20 21:51:02,299 INFO L290 TraceCheckUtils]: 4: Hoare triple {1079#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {1079#true} is VALID [2022-02-20 21:51:02,299 INFO L290 TraceCheckUtils]: 5: Hoare triple {1079#true} assume true; {1079#true} is VALID [2022-02-20 21:51:02,299 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {1079#true} {1079#true} #2744#return; {1079#true} is VALID [2022-02-20 21:51:02,300 INFO L290 TraceCheckUtils]: 7: Hoare triple {1079#true} main_~tmp~37#1.base, main_~tmp~37#1.offset := main_#t~ret800#1.base, main_#t~ret800#1.offset;havoc main_#t~ret800#1.base, main_#t~ret800#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~37#1.base, main_~tmp~37#1.offset; {1079#true} is VALID [2022-02-20 21:51:02,300 INFO L272 TraceCheckUtils]: 8: Hoare triple {1079#true} call main_#t~ret801#1.base, main_#t~ret801#1.offset := ldv_zalloc(1); {1106#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:02,300 INFO L290 TraceCheckUtils]: 9: Hoare triple {1106#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet76#1 && #t~nondet76#1 <= 2147483647;~tmp___0~1#1 := #t~nondet76#1;havoc #t~nondet76#1; {1079#true} is VALID [2022-02-20 21:51:02,301 INFO L290 TraceCheckUtils]: 10: Hoare triple {1079#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {1079#true} is VALID [2022-02-20 21:51:02,301 INFO L290 TraceCheckUtils]: 11: Hoare triple {1079#true} assume true; {1079#true} is VALID [2022-02-20 21:51:02,301 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {1079#true} {1079#true} #2746#return; {1079#true} is VALID [2022-02-20 21:51:02,301 INFO L290 TraceCheckUtils]: 13: Hoare triple {1079#true} main_~tmp___0~15#1.base, main_~tmp___0~15#1.offset := main_#t~ret801#1.base, main_#t~ret801#1.offset;havoc main_#t~ret801#1.base, main_#t~ret801#1.offset;main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset := main_~tmp___0~15#1.base, main_~tmp___0~15#1.offset;assume -2147483648 <= main_#t~nondet802#1 && main_#t~nondet802#1 <= 2147483647;main_~tmp___1~10#1 := main_#t~nondet802#1;havoc main_#t~nondet802#1;main_~ldvarg4~0#1 := main_~tmp___1~10#1; {1079#true} is VALID [2022-02-20 21:51:02,302 INFO L272 TraceCheckUtils]: 14: Hoare triple {1079#true} call main_#t~ret803#1.base, main_#t~ret803#1.offset := ldv_zalloc(1288); {1106#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:02,302 INFO L290 TraceCheckUtils]: 15: Hoare triple {1106#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet76#1 && #t~nondet76#1 <= 2147483647;~tmp___0~1#1 := #t~nondet76#1;havoc #t~nondet76#1; {1079#true} is VALID [2022-02-20 21:51:02,302 INFO L290 TraceCheckUtils]: 16: Hoare triple {1079#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {1079#true} is VALID [2022-02-20 21:51:02,302 INFO L290 TraceCheckUtils]: 17: Hoare triple {1079#true} assume true; {1079#true} is VALID [2022-02-20 21:51:02,302 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {1079#true} {1079#true} #2748#return; {1079#true} is VALID [2022-02-20 21:51:02,302 INFO L290 TraceCheckUtils]: 19: Hoare triple {1079#true} main_~tmp___2~7#1.base, main_~tmp___2~7#1.offset := main_#t~ret803#1.base, main_#t~ret803#1.offset;havoc main_#t~ret803#1.base, main_#t~ret803#1.offset;main_~ldvarg3~0#1.base, main_~ldvarg3~0#1.offset := main_~tmp___2~7#1.base, main_~tmp___2~7#1.offset; {1079#true} is VALID [2022-02-20 21:51:02,303 INFO L272 TraceCheckUtils]: 20: Hoare triple {1079#true} call main_#t~ret804#1.base, main_#t~ret804#1.offset := ldv_zalloc(1); {1106#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:02,303 INFO L290 TraceCheckUtils]: 21: Hoare triple {1106#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet76#1 && #t~nondet76#1 <= 2147483647;~tmp___0~1#1 := #t~nondet76#1;havoc #t~nondet76#1; {1079#true} is VALID [2022-02-20 21:51:02,304 INFO L290 TraceCheckUtils]: 22: Hoare triple {1079#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {1079#true} is VALID [2022-02-20 21:51:02,304 INFO L290 TraceCheckUtils]: 23: Hoare triple {1079#true} assume true; {1079#true} is VALID [2022-02-20 21:51:02,304 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {1079#true} {1079#true} #2750#return; {1079#true} is VALID [2022-02-20 21:51:02,304 INFO L290 TraceCheckUtils]: 25: Hoare triple {1079#true} main_~tmp___3~3#1.base, main_~tmp___3~3#1.offset := main_#t~ret804#1.base, main_#t~ret804#1.offset;havoc main_#t~ret804#1.base, main_#t~ret804#1.offset;main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset := main_~tmp___3~3#1.base, main_~tmp___3~3#1.offset; {1079#true} is VALID [2022-02-20 21:51:02,308 INFO L272 TraceCheckUtils]: 26: Hoare triple {1079#true} call main_#t~ret805#1.base, main_#t~ret805#1.offset := ldv_zalloc(4); {1106#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:02,309 INFO L290 TraceCheckUtils]: 27: Hoare triple {1106#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet76#1 && #t~nondet76#1 <= 2147483647;~tmp___0~1#1 := #t~nondet76#1;havoc #t~nondet76#1; {1079#true} is VALID [2022-02-20 21:51:02,309 INFO L290 TraceCheckUtils]: 28: Hoare triple {1079#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {1079#true} is VALID [2022-02-20 21:51:02,309 INFO L290 TraceCheckUtils]: 29: Hoare triple {1079#true} assume true; {1079#true} is VALID [2022-02-20 21:51:02,309 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {1079#true} {1079#true} #2752#return; {1079#true} is VALID [2022-02-20 21:51:02,309 INFO L290 TraceCheckUtils]: 31: Hoare triple {1079#true} main_~tmp___4~2#1.base, main_~tmp___4~2#1.offset := main_#t~ret805#1.base, main_#t~ret805#1.offset;havoc main_#t~ret805#1.base, main_#t~ret805#1.offset;main_~ldvarg6~0#1.base, main_~ldvarg6~0#1.offset := main_~tmp___4~2#1.base, main_~tmp___4~2#1.offset;assume { :begin_inline_ldv_initialize } true; {1079#true} is VALID [2022-02-20 21:51:02,310 INFO L290 TraceCheckUtils]: 32: Hoare triple {1079#true} assume { :end_inline_ldv_initialize } true; {1079#true} is VALID [2022-02-20 21:51:02,310 INFO L272 TraceCheckUtils]: 33: Hoare triple {1079#true} call main_#t~memset~res806#1.base, main_#t~memset~res806#1.offset := #Ultimate.C_memset(main_~#ldvarg5~0#1.base, main_~#ldvarg5~0#1.offset, 0, 1); {1107#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 21:51:02,310 INFO L290 TraceCheckUtils]: 34: Hoare triple {1107#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr867 := 0; {1079#true} is VALID [2022-02-20 21:51:02,311 INFO L290 TraceCheckUtils]: 35: Hoare triple {1079#true} assume !(#t~loopctr867 % 18446744073709551616 < #amount % 18446744073709551616); {1079#true} is VALID [2022-02-20 21:51:02,311 INFO L290 TraceCheckUtils]: 36: Hoare triple {1079#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1079#true} is VALID [2022-02-20 21:51:02,311 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {1079#true} {1079#true} #2754#return; {1079#true} is VALID [2022-02-20 21:51:02,312 INFO L290 TraceCheckUtils]: 38: Hoare triple {1079#true} havoc main_#t~memset~res806#1.base, main_#t~memset~res806#1.offset;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_2~0 := 0; {1105#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:51:02,312 INFO L290 TraceCheckUtils]: 39: Hoare triple {1105#(= ~ldv_state_variable_0~0 1)} assume -2147483648 <= main_#t~nondet807#1 && main_#t~nondet807#1 <= 2147483647;main_~tmp___5~2#1 := main_#t~nondet807#1;havoc main_#t~nondet807#1;main_#t~switch808#1 := 0 == main_~tmp___5~2#1; {1105#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:51:02,312 INFO L290 TraceCheckUtils]: 40: Hoare triple {1105#(= ~ldv_state_variable_0~0 1)} assume !main_#t~switch808#1;main_#t~switch808#1 := main_#t~switch808#1 || 1 == main_~tmp___5~2#1; {1105#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:51:02,313 INFO L290 TraceCheckUtils]: 41: Hoare triple {1105#(= ~ldv_state_variable_0~0 1)} assume main_#t~switch808#1; {1105#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:51:02,313 INFO L290 TraceCheckUtils]: 42: Hoare triple {1105#(= ~ldv_state_variable_0~0 1)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet812#1 && main_#t~nondet812#1 <= 2147483647;main_~tmp___7~1#1 := main_#t~nondet812#1;havoc main_#t~nondet812#1;main_#t~switch813#1 := 0 == main_~tmp___7~1#1; {1105#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:51:02,313 INFO L290 TraceCheckUtils]: 43: Hoare triple {1105#(= ~ldv_state_variable_0~0 1)} assume main_#t~switch813#1; {1105#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:51:02,314 INFO L290 TraceCheckUtils]: 44: Hoare triple {1105#(= ~ldv_state_variable_0~0 1)} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0;assume { :begin_inline_ttusb_dec_driver_exit } true;assume { :begin_inline_ldv_usb_deregister_16 } true;ldv_usb_deregister_16_#in~arg#1.base, ldv_usb_deregister_16_#in~arg#1.offset := ~#ttusb_dec_driver~0.base, ~#ttusb_dec_driver~0.offset;havoc ldv_usb_deregister_16_~arg#1.base, ldv_usb_deregister_16_~arg#1.offset;ldv_usb_deregister_16_~arg#1.base, ldv_usb_deregister_16_~arg#1.offset := ldv_usb_deregister_16_#in~arg#1.base, ldv_usb_deregister_16_#in~arg#1.offset;assume { :begin_inline_usb_deregister } true;usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset := ldv_usb_deregister_16_~arg#1.base, ldv_usb_deregister_16_~arg#1.offset;havoc usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset;usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset := usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset; {1080#false} is VALID [2022-02-20 21:51:02,314 INFO L290 TraceCheckUtils]: 45: Hoare triple {1080#false} assume { :end_inline_usb_deregister } true;~ldv_state_variable_1~0 := 0; {1080#false} is VALID [2022-02-20 21:51:02,314 INFO L290 TraceCheckUtils]: 46: Hoare triple {1080#false} assume { :end_inline_ldv_usb_deregister_16 } true; {1080#false} is VALID [2022-02-20 21:51:02,314 INFO L290 TraceCheckUtils]: 47: Hoare triple {1080#false} assume { :end_inline_ttusb_dec_driver_exit } true;~ldv_state_variable_0~0 := 2; {1080#false} is VALID [2022-02-20 21:51:02,314 INFO L290 TraceCheckUtils]: 48: Hoare triple {1080#false} assume { :begin_inline_ldv_check_final_state } true; {1080#false} is VALID [2022-02-20 21:51:02,315 INFO L290 TraceCheckUtils]: 49: Hoare triple {1080#false} assume !(0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616); {1080#false} is VALID [2022-02-20 21:51:02,315 INFO L272 TraceCheckUtils]: 50: Hoare triple {1080#false} call ldv_error(); {1080#false} is VALID [2022-02-20 21:51:02,315 INFO L290 TraceCheckUtils]: 51: Hoare triple {1080#false} assume !false; {1080#false} is VALID [2022-02-20 21:51:02,315 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-02-20 21:51:02,316 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:51:02,316 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1818039301] [2022-02-20 21:51:02,317 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1818039301] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:51:02,317 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:51:02,317 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-02-20 21:51:02,318 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [325848942] [2022-02-20 21:51:02,318 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:51:02,322 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 5.4) internal successors, (27), 3 states have internal predecessors, (27), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) Word has length 52 [2022-02-20 21:51:02,323 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:51:02,325 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 5.4) internal successors, (27), 3 states have internal predecessors, (27), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2022-02-20 21:51:02,385 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 40 edges. 40 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:51:02,385 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-02-20 21:51:02,386 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:51:02,398 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-02-20 21:51:02,399 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-02-20 21:51:02,408 INFO L87 Difference]: Start difference. First operand has 1076 states, 777 states have (on average 1.3384813384813385) internal successors, (1040), 804 states have internal predecessors, (1040), 231 states have call successors, (231), 68 states have call predecessors, (231), 66 states have return successors, (225), 217 states have call predecessors, (225), 225 states have call successors, (225) Second operand has 5 states, 5 states have (on average 5.4) internal successors, (27), 3 states have internal predecessors, (27), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2022-02-20 21:51:08,943 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-02-20 21:51:24,295 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:51:24,295 INFO L93 Difference]: Finished difference Result 3572 states and 5251 transitions. [2022-02-20 21:51:24,295 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-02-20 21:51:24,296 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 5.4) internal successors, (27), 3 states have internal predecessors, (27), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) Word has length 52 [2022-02-20 21:51:24,296 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:51:24,297 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 5.4) internal successors, (27), 3 states have internal predecessors, (27), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2022-02-20 21:51:24,463 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 5251 transitions. [2022-02-20 21:51:24,463 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 5.4) internal successors, (27), 3 states have internal predecessors, (27), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2022-02-20 21:51:24,596 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 5251 transitions. [2022-02-20 21:51:24,597 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 7 states and 5251 transitions. [2022-02-20 21:51:28,933 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 5251 edges. 5251 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:51:29,311 INFO L225 Difference]: With dead ends: 3572 [2022-02-20 21:51:29,312 INFO L226 Difference]: Without dead ends: 2475 [2022-02-20 21:51:29,321 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2022-02-20 21:51:29,323 INFO L933 BasicCegarLoop]: 1636 mSDtfsCounter, 2973 mSDsluCounter, 2360 mSDsCounter, 0 mSdLazyCounter, 1912 mSolverCounterSat, 1417 mSolverCounterUnsat, 1 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 9.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3136 SdHoareTripleChecker+Valid, 3996 SdHoareTripleChecker+Invalid, 3330 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 1417 IncrementalHoareTripleChecker+Valid, 1912 IncrementalHoareTripleChecker+Invalid, 1 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 9.2s IncrementalHoareTripleChecker+Time [2022-02-20 21:51:29,324 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [3136 Valid, 3996 Invalid, 3330 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [1417 Valid, 1912 Invalid, 1 Unknown, 0 Unchecked, 9.2s Time] [2022-02-20 21:51:29,338 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2475 states. [2022-02-20 21:51:29,426 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2475 to 2044. [2022-02-20 21:51:29,426 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:51:29,434 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2475 states. Second operand has 2044 states, 1490 states have (on average 1.3187919463087248) internal successors, (1965), 1524 states have internal predecessors, (1965), 424 states have call successors, (424), 130 states have call predecessors, (424), 129 states have return successors, (419), 403 states have call predecessors, (419), 419 states have call successors, (419) [2022-02-20 21:51:29,438 INFO L74 IsIncluded]: Start isIncluded. First operand 2475 states. Second operand has 2044 states, 1490 states have (on average 1.3187919463087248) internal successors, (1965), 1524 states have internal predecessors, (1965), 424 states have call successors, (424), 130 states have call predecessors, (424), 129 states have return successors, (419), 403 states have call predecessors, (419), 419 states have call successors, (419) [2022-02-20 21:51:29,443 INFO L87 Difference]: Start difference. First operand 2475 states. Second operand has 2044 states, 1490 states have (on average 1.3187919463087248) internal successors, (1965), 1524 states have internal predecessors, (1965), 424 states have call successors, (424), 130 states have call predecessors, (424), 129 states have return successors, (419), 403 states have call predecessors, (419), 419 states have call successors, (419) [2022-02-20 21:51:29,655 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:51:29,655 INFO L93 Difference]: Finished difference Result 2475 states and 3545 transitions. [2022-02-20 21:51:29,655 INFO L276 IsEmpty]: Start isEmpty. Operand 2475 states and 3545 transitions. [2022-02-20 21:51:29,735 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:51:29,736 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:51:29,741 INFO L74 IsIncluded]: Start isIncluded. First operand has 2044 states, 1490 states have (on average 1.3187919463087248) internal successors, (1965), 1524 states have internal predecessors, (1965), 424 states have call successors, (424), 130 states have call predecessors, (424), 129 states have return successors, (419), 403 states have call predecessors, (419), 419 states have call successors, (419) Second operand 2475 states. [2022-02-20 21:51:29,746 INFO L87 Difference]: Start difference. First operand has 2044 states, 1490 states have (on average 1.3187919463087248) internal successors, (1965), 1524 states have internal predecessors, (1965), 424 states have call successors, (424), 130 states have call predecessors, (424), 129 states have return successors, (419), 403 states have call predecessors, (419), 419 states have call successors, (419) Second operand 2475 states. [2022-02-20 21:51:29,947 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:51:29,948 INFO L93 Difference]: Finished difference Result 2475 states and 3545 transitions. [2022-02-20 21:51:29,948 INFO L276 IsEmpty]: Start isEmpty. Operand 2475 states and 3545 transitions. [2022-02-20 21:51:29,959 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:51:29,959 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:51:29,959 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:51:29,959 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:51:29,965 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2044 states, 1490 states have (on average 1.3187919463087248) internal successors, (1965), 1524 states have internal predecessors, (1965), 424 states have call successors, (424), 130 states have call predecessors, (424), 129 states have return successors, (419), 403 states have call predecessors, (419), 419 states have call successors, (419) [2022-02-20 21:51:30,159 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2044 states to 2044 states and 2808 transitions. [2022-02-20 21:51:30,161 INFO L78 Accepts]: Start accepts. Automaton has 2044 states and 2808 transitions. Word has length 52 [2022-02-20 21:51:30,161 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:51:30,162 INFO L470 AbstractCegarLoop]: Abstraction has 2044 states and 2808 transitions. [2022-02-20 21:51:30,162 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 5.4) internal successors, (27), 3 states have internal predecessors, (27), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2022-02-20 21:51:30,162 INFO L276 IsEmpty]: Start isEmpty. Operand 2044 states and 2808 transitions. [2022-02-20 21:51:30,165 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2022-02-20 21:51:30,165 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:51:30,166 INFO L514 BasicCegarLoop]: trace histogram [6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:51:30,166 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-02-20 21:51:30,166 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:51:30,167 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:51:30,167 INFO L85 PathProgramCache]: Analyzing trace with hash 2056314414, now seen corresponding path program 1 times [2022-02-20 21:51:30,168 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:51:30,168 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [115568477] [2022-02-20 21:51:30,168 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:51:30,168 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:51:30,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:30,312 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 21:51:30,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:30,333 INFO L290 TraceCheckUtils]: 0: Hoare triple {13864#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet76#1 && #t~nondet76#1 <= 2147483647;~tmp___0~1#1 := #t~nondet76#1;havoc #t~nondet76#1; {13833#true} is VALID [2022-02-20 21:51:30,333 INFO L290 TraceCheckUtils]: 1: Hoare triple {13833#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {13833#true} is VALID [2022-02-20 21:51:30,333 INFO L290 TraceCheckUtils]: 2: Hoare triple {13833#true} assume true; {13833#true} is VALID [2022-02-20 21:51:30,333 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13833#true} {13833#true} #2744#return; {13833#true} is VALID [2022-02-20 21:51:30,334 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-02-20 21:51:30,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:30,348 INFO L290 TraceCheckUtils]: 0: Hoare triple {13864#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet76#1 && #t~nondet76#1 <= 2147483647;~tmp___0~1#1 := #t~nondet76#1;havoc #t~nondet76#1; {13833#true} is VALID [2022-02-20 21:51:30,348 INFO L290 TraceCheckUtils]: 1: Hoare triple {13833#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {13833#true} is VALID [2022-02-20 21:51:30,348 INFO L290 TraceCheckUtils]: 2: Hoare triple {13833#true} assume true; {13833#true} is VALID [2022-02-20 21:51:30,348 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13833#true} {13833#true} #2746#return; {13833#true} is VALID [2022-02-20 21:51:30,349 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2022-02-20 21:51:30,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:30,359 INFO L290 TraceCheckUtils]: 0: Hoare triple {13864#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet76#1 && #t~nondet76#1 <= 2147483647;~tmp___0~1#1 := #t~nondet76#1;havoc #t~nondet76#1; {13833#true} is VALID [2022-02-20 21:51:30,359 INFO L290 TraceCheckUtils]: 1: Hoare triple {13833#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {13833#true} is VALID [2022-02-20 21:51:30,359 INFO L290 TraceCheckUtils]: 2: Hoare triple {13833#true} assume true; {13833#true} is VALID [2022-02-20 21:51:30,359 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13833#true} {13833#true} #2748#return; {13833#true} is VALID [2022-02-20 21:51:30,360 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 20 [2022-02-20 21:51:30,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:30,370 INFO L290 TraceCheckUtils]: 0: Hoare triple {13864#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet76#1 && #t~nondet76#1 <= 2147483647;~tmp___0~1#1 := #t~nondet76#1;havoc #t~nondet76#1; {13833#true} is VALID [2022-02-20 21:51:30,370 INFO L290 TraceCheckUtils]: 1: Hoare triple {13833#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {13833#true} is VALID [2022-02-20 21:51:30,370 INFO L290 TraceCheckUtils]: 2: Hoare triple {13833#true} assume true; {13833#true} is VALID [2022-02-20 21:51:30,370 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13833#true} {13833#true} #2750#return; {13833#true} is VALID [2022-02-20 21:51:30,371 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-02-20 21:51:30,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:30,382 INFO L290 TraceCheckUtils]: 0: Hoare triple {13864#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet76#1 && #t~nondet76#1 <= 2147483647;~tmp___0~1#1 := #t~nondet76#1;havoc #t~nondet76#1; {13833#true} is VALID [2022-02-20 21:51:30,382 INFO L290 TraceCheckUtils]: 1: Hoare triple {13833#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {13833#true} is VALID [2022-02-20 21:51:30,382 INFO L290 TraceCheckUtils]: 2: Hoare triple {13833#true} assume true; {13833#true} is VALID [2022-02-20 21:51:30,383 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13833#true} {13833#true} #2752#return; {13833#true} is VALID [2022-02-20 21:51:30,389 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 33 [2022-02-20 21:51:30,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:30,400 INFO L290 TraceCheckUtils]: 0: Hoare triple {13865#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr867 := 0; {13833#true} is VALID [2022-02-20 21:51:30,400 INFO L290 TraceCheckUtils]: 1: Hoare triple {13833#true} assume !(#t~loopctr867 % 18446744073709551616 < #amount % 18446744073709551616); {13833#true} is VALID [2022-02-20 21:51:30,400 INFO L290 TraceCheckUtils]: 2: Hoare triple {13833#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {13833#true} is VALID [2022-02-20 21:51:30,400 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13833#true} {13833#true} #2754#return; {13833#true} is VALID [2022-02-20 21:51:30,401 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 47 [2022-02-20 21:51:30,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:30,411 INFO L290 TraceCheckUtils]: 0: Hoare triple {13864#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet76#1 && #t~nondet76#1 <= 2147483647;~tmp___0~1#1 := #t~nondet76#1;havoc #t~nondet76#1; {13833#true} is VALID [2022-02-20 21:51:30,412 INFO L290 TraceCheckUtils]: 1: Hoare triple {13833#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {13833#true} is VALID [2022-02-20 21:51:30,412 INFO L290 TraceCheckUtils]: 2: Hoare triple {13833#true} assume true; {13833#true} is VALID [2022-02-20 21:51:30,412 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13833#true} {13833#true} #2762#return; {13833#true} is VALID [2022-02-20 21:51:30,412 INFO L290 TraceCheckUtils]: 0: Hoare triple {13833#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(96, 2);call #Ultimate.allocInit(10, 3);call #Ultimate.allocInit(119, 4);call #Ultimate.allocInit(38, 5);call #Ultimate.allocInit(21, 6);call #Ultimate.allocInit(32, 7);call #Ultimate.allocInit(21, 8);call #Ultimate.allocInit(17, 9);call #Ultimate.allocInit(21, 10);call #Ultimate.allocInit(44, 11);call #Ultimate.allocInit(21, 12);call #Ultimate.allocInit(4, 13);call write~init~int(37, 13, 0, 1);call write~init~int(115, 13, 1, 1);call write~init~int(10, 13, 2, 1);call write~init~int(0, 13, 3, 1);call #Ultimate.allocInit(23, 14);call #Ultimate.allocInit(31, 15);call #Ultimate.allocInit(23, 16);call #Ultimate.allocInit(14, 17);call #Ultimate.allocInit(23, 18);call #Ultimate.allocInit(8, 19);call #Ultimate.allocInit(2, 20);call write~init~int(10, 20, 0, 1);call write~init~int(0, 20, 1, 1);call #Ultimate.allocInit(43, 21);call #Ultimate.allocInit(23, 22);call #Ultimate.allocInit(42, 23);call #Ultimate.allocInit(23, 24);call #Ultimate.allocInit(13, 25);call #Ultimate.allocInit(23, 26);call #Ultimate.allocInit(8, 27);call #Ultimate.allocInit(2, 28);call write~init~int(10, 28, 0, 1);call write~init~int(0, 28, 1, 1);call #Ultimate.allocInit(4, 29);call write~init~int(37, 29, 0, 1);call write~init~int(115, 29, 1, 1);call write~init~int(10, 29, 2, 1);call write~init~int(0, 29, 3, 1);call #Ultimate.allocInit(24, 30);call #Ultimate.allocInit(4, 31);call write~init~int(37, 31, 0, 1);call write~init~int(115, 31, 1, 1);call write~init~int(10, 31, 2, 1);call write~init~int(0, 31, 3, 1);call #Ultimate.allocInit(19, 32);call #Ultimate.allocInit(35, 33);call #Ultimate.allocInit(22, 34);call #Ultimate.allocInit(34, 35);call #Ultimate.allocInit(22, 36);call #Ultimate.allocInit(29, 37);call #Ultimate.allocInit(22, 38);call #Ultimate.allocInit(35, 39);call #Ultimate.allocInit(25, 40);call #Ultimate.allocInit(34, 41);call #Ultimate.allocInit(25, 42);call #Ultimate.allocInit(45, 43);call #Ultimate.allocInit(25, 44);call #Ultimate.allocInit(35, 45);call #Ultimate.allocInit(28, 46);call #Ultimate.allocInit(39, 47);call #Ultimate.allocInit(28, 48);call #Ultimate.allocInit(19, 49);call #Ultimate.allocInit(22, 50);call #Ultimate.allocInit(4, 51);call write~init~int(37, 51, 0, 1);call write~init~int(115, 51, 1, 1);call write~init~int(10, 51, 2, 1);call write~init~int(0, 51, 3, 1);call #Ultimate.allocInit(21, 52);call #Ultimate.allocInit(4, 53);call write~init~int(37, 53, 0, 1);call write~init~int(115, 53, 1, 1);call write~init~int(10, 53, 2, 1);call write~init~int(0, 53, 3, 1);call #Ultimate.allocInit(24, 54);call #Ultimate.allocInit(4, 55);call write~init~int(37, 55, 0, 1);call write~init~int(115, 55, 1, 1);call write~init~int(10, 55, 2, 1);call write~init~int(0, 55, 3, 1);call #Ultimate.allocInit(25, 56);call #Ultimate.allocInit(40, 57);call #Ultimate.allocInit(25, 58);call #Ultimate.allocInit(4, 59);call write~init~int(37, 59, 0, 1);call write~init~int(115, 59, 1, 1);call write~init~int(10, 59, 2, 1);call write~init~int(0, 59, 3, 1);call #Ultimate.allocInit(24, 60);call #Ultimate.allocInit(11, 61);call #Ultimate.allocInit(12, 62);call #Ultimate.allocInit(11, 63);call #Ultimate.allocInit(17, 64);call #Ultimate.allocInit(2, 65);call write~init~int(10, 65, 0, 1);call write~init~int(0, 65, 1, 1);call #Ultimate.allocInit(27, 66);call #Ultimate.allocInit(27, 67);call #Ultimate.allocInit(45, 68);call #Ultimate.allocInit(25, 69);call #Ultimate.allocInit(42, 70);call #Ultimate.allocInit(26, 71);call #Ultimate.allocInit(4, 72);call write~init~int(37, 72, 0, 1);call write~init~int(115, 72, 1, 1);call write~init~int(10, 72, 2, 1);call write~init~int(0, 72, 3, 1);call #Ultimate.allocInit(25, 73);call #Ultimate.allocInit(4, 74);call write~init~int(37, 74, 0, 1);call write~init~int(115, 74, 1, 1);call write~init~int(10, 74, 2, 1);call write~init~int(0, 74, 3, 1);call #Ultimate.allocInit(21, 75);call #Ultimate.allocInit(15, 76);call #Ultimate.allocInit(22, 77);call #Ultimate.allocInit(4, 78);call write~init~int(37, 78, 0, 1);call write~init~int(115, 78, 1, 1);call write~init~int(10, 78, 2, 1);call write~init~int(0, 78, 3, 1);call #Ultimate.allocInit(20, 79);call #Ultimate.allocInit(4, 80);call write~init~int(37, 80, 0, 1);call write~init~int(115, 80, 1, 1);call write~init~int(10, 80, 2, 1);call write~init~int(0, 80, 3, 1);call #Ultimate.allocInit(24, 81);call #Ultimate.allocInit(4, 82);call write~init~int(37, 82, 0, 1);call write~init~int(115, 82, 1, 1);call write~init~int(10, 82, 2, 1);call write~init~int(0, 82, 3, 1);call #Ultimate.allocInit(25, 83);call #Ultimate.allocInit(46, 84);call #Ultimate.allocInit(25, 85);call #Ultimate.allocInit(36, 86);call #Ultimate.allocInit(8, 87);call #Ultimate.allocInit(25, 88);call #Ultimate.allocInit(27, 89);call #Ultimate.allocInit(14, 90);call #Ultimate.allocInit(4, 91);call write~init~int(37, 91, 0, 1);call write~init~int(115, 91, 1, 1);call write~init~int(10, 91, 2, 1);call write~init~int(0, 91, 3, 1);call #Ultimate.allocInit(21, 92);call #Ultimate.allocInit(4, 93);call write~init~int(37, 93, 0, 1);call write~init~int(115, 93, 1, 1);call write~init~int(10, 93, 2, 1);call write~init~int(0, 93, 3, 1);call #Ultimate.allocInit(19, 94);call #Ultimate.allocInit(16, 95);call #Ultimate.allocInit(16, 96);call #Ultimate.allocInit(4, 97);call write~init~int(37, 97, 0, 1);call write~init~int(115, 97, 1, 1);call write~init~int(10, 97, 2, 1);call write~init~int(0, 97, 3, 1);call #Ultimate.allocInit(19, 98);call #Ultimate.allocInit(33, 99);call #Ultimate.allocInit(19, 100);call #Ultimate.allocInit(54, 101);call #Ultimate.allocInit(19, 102);call #Ultimate.allocInit(89, 103);call #Ultimate.allocInit(19, 104);call #Ultimate.allocInit(34, 105);call #Ultimate.allocInit(4, 106);call write~init~int(37, 106, 0, 1);call write~init~int(115, 106, 1, 1);call write~init~int(10, 106, 2, 1);call write~init~int(0, 106, 3, 1);call #Ultimate.allocInit(19, 107);call #Ultimate.allocInit(41, 108);call #Ultimate.allocInit(34, 109);call #Ultimate.allocInit(64, 110);call #Ultimate.allocInit(19, 111);call #Ultimate.allocInit(4, 112);call write~init~int(37, 112, 0, 1);call write~init~int(115, 112, 1, 1);call write~init~int(10, 112, 2, 1);call write~init~int(0, 112, 3, 1);call #Ultimate.allocInit(19, 113);call #Ultimate.allocInit(43, 114);call #Ultimate.allocInit(19, 115);call #Ultimate.allocInit(35, 116);call #Ultimate.allocInit(19, 117);call #Ultimate.allocInit(38, 118);call #Ultimate.allocInit(19, 119);call #Ultimate.allocInit(35, 120);call #Ultimate.allocInit(19, 121);call #Ultimate.allocInit(35, 122);call #Ultimate.allocInit(19, 123);call #Ultimate.allocInit(4, 124);call write~init~int(37, 124, 0, 1);call write~init~int(115, 124, 1, 1);call write~init~int(10, 124, 2, 1);call write~init~int(0, 124, 3, 1);call #Ultimate.allocInit(19, 125);call #Ultimate.allocInit(4, 126);call write~init~int(37, 126, 0, 1);call write~init~int(115, 126, 1, 1);call write~init~int(10, 126, 2, 1);call write~init~int(0, 126, 3, 1);call #Ultimate.allocInit(18, 127);call #Ultimate.allocInit(4, 128);call write~init~int(37, 128, 0, 1);call write~init~int(115, 128, 1, 1);call write~init~int(10, 128, 2, 1);call write~init~int(0, 128, 3, 1);call #Ultimate.allocInit(19, 129);call #Ultimate.allocInit(38, 130);call #Ultimate.allocInit(4, 131);call write~init~int(37, 131, 0, 1);call write~init~int(115, 131, 1, 1);call write~init~int(10, 131, 2, 1);call write~init~int(0, 131, 3, 1);call #Ultimate.allocInit(16, 132);call #Ultimate.allocInit(31, 133);call #Ultimate.allocInit(16, 134);call #Ultimate.allocInit(71, 135);call #Ultimate.allocInit(42, 136);call #Ultimate.allocInit(4, 137);call write~init~int(37, 137, 0, 1);call write~init~int(115, 137, 1, 1);call write~init~int(10, 137, 2, 1);call write~init~int(0, 137, 3, 1);call #Ultimate.allocInit(21, 138);call #Ultimate.allocInit(10, 139);call #Ultimate.allocInit(23, 140);call #Ultimate.allocInit(10, 141);call #Ultimate.allocInit(23, 142);call #Ultimate.allocInit(10, 143);call #Ultimate.allocInit(23, 144);call #Ultimate.allocInit(10, 145);call #Ultimate.allocInit(10, 146);~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_2~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~ttusb_dec_driver_group1~0.base, ~ttusb_dec_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~debug~0 := 0;~output_pva~0 := 0;~enable_rc~0 := 0;~#adapter_nr~0.base, ~#adapter_nr~0.offset := 147, 0;call #Ultimate.allocInit(16, 147);call write~init~int(-1, ~#adapter_nr~0.base, ~#adapter_nr~0.offset, 2);call write~init~int(-1, ~#adapter_nr~0.base, 2 + ~#adapter_nr~0.offset, 2);call write~init~int(-1, ~#adapter_nr~0.base, 4 + ~#adapter_nr~0.offset, 2);call write~init~int(-1, ~#adapter_nr~0.base, 6 + ~#adapter_nr~0.offset, 2);call write~init~int(-1, ~#adapter_nr~0.base, 8 + ~#adapter_nr~0.offset, 2);call write~init~int(-1, ~#adapter_nr~0.base, 10 + ~#adapter_nr~0.offset, 2);call write~init~int(-1, ~#adapter_nr~0.base, 12 + ~#adapter_nr~0.offset, 2);call write~init~int(-1, ~#adapter_nr~0.base, 14 + ~#adapter_nr~0.offset, 2);~#rc_keys~0.base, ~#rc_keys~0.offset := 148, 0;call #Ultimate.allocInit(52, 148);call write~init~int(116, ~#rc_keys~0.base, ~#rc_keys~0.offset, 2);call write~init~int(113, ~#rc_keys~0.base, 2 + ~#rc_keys~0.offset, 2);call write~init~int(2, ~#rc_keys~0.base, 4 + ~#rc_keys~0.offset, 2);call write~init~int(3, ~#rc_keys~0.base, 6 + ~#rc_keys~0.offset, 2);call write~init~int(4, ~#rc_keys~0.base, 8 + ~#rc_keys~0.offset, 2);call write~init~int(5, ~#rc_keys~0.base, 10 + ~#rc_keys~0.offset, 2);call write~init~int(6, ~#rc_keys~0.base, 12 + ~#rc_keys~0.offset, 2);call write~init~int(7, ~#rc_keys~0.base, 14 + ~#rc_keys~0.offset, 2);call write~init~int(8, ~#rc_keys~0.base, 16 + ~#rc_keys~0.offset, 2);call write~init~int(9, ~#rc_keys~0.base, 18 + ~#rc_keys~0.offset, 2);call write~init~int(10, ~#rc_keys~0.base, 20 + ~#rc_keys~0.offset, 2);call write~init~int(11, ~#rc_keys~0.base, 22 + ~#rc_keys~0.offset, 2);call write~init~int(402, ~#rc_keys~0.base, 24 + ~#rc_keys~0.offset, 2);call write~init~int(114, ~#rc_keys~0.base, 26 + ~#rc_keys~0.offset, 2);call write~init~int(352, ~#rc_keys~0.base, 28 + ~#rc_keys~0.offset, 2);call write~init~int(115, ~#rc_keys~0.base, 30 + ~#rc_keys~0.offset, 2);call write~init~int(403, ~#rc_keys~0.base, 32 + ~#rc_keys~0.offset, 2);call write~init~int(412, ~#rc_keys~0.base, 34 + ~#rc_keys~0.offset, 2);call write~init~int(1, ~#rc_keys~0.base, 36 + ~#rc_keys~0.offset, 2);call write~init~int(398, ~#rc_keys~0.base, 38 + ~#rc_keys~0.offset, 2);call write~init~int(399, ~#rc_keys~0.base, 40 + ~#rc_keys~0.offset, 2);call write~init~int(400, ~#rc_keys~0.base, 42 + ~#rc_keys~0.offset, 2);call write~init~int(401, ~#rc_keys~0.base, 44 + ~#rc_keys~0.offset, 2);call write~init~int(357, ~#rc_keys~0.base, 46 + ~#rc_keys~0.offset, 2);call write~init~int(50, ~#rc_keys~0.base, 48 + ~#rc_keys~0.offset, 2);call write~init~int(385, ~#rc_keys~0.base, 50 + ~#rc_keys~0.offset, 2);~#fe_config~0.base, ~#fe_config~0.offset := 149, 0;call #Ultimate.allocInit(8, 149);call write~init~$Pointer$(#funAddr~fe_send_command.base, #funAddr~fe_send_command.offset, ~#fe_config~0.base, ~#fe_config~0.offset, 8);~#ttusb_dec_table~0.base, ~#ttusb_dec_table~0.offset := 150, 0;call #Ultimate.allocInit(100, 150);call write~init~int(3, ~#ttusb_dec_table~0.base, ~#ttusb_dec_table~0.offset, 2);call write~init~int(2888, ~#ttusb_dec_table~0.base, 2 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(4102, ~#ttusb_dec_table~0.base, 4 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(0, ~#ttusb_dec_table~0.base, 6 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(0, ~#ttusb_dec_table~0.base, 8 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(0, ~#ttusb_dec_table~0.base, 10 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 11 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 12 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 13 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 14 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 15 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 16 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 17 + ~#ttusb_dec_table~0.offset, 8);call write~init~int(3, ~#ttusb_dec_table~0.base, 25 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(2888, ~#ttusb_dec_table~0.base, 27 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(4104, ~#ttusb_dec_table~0.base, 29 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(0, ~#ttusb_dec_table~0.base, 31 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(0, ~#ttusb_dec_table~0.base, 33 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(0, ~#ttusb_dec_table~0.base, 35 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 36 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 37 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 38 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 39 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 40 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 41 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 42 + ~#ttusb_dec_table~0.offset, 8);call write~init~int(3, ~#ttusb_dec_table~0.base, 50 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(2888, ~#ttusb_dec_table~0.base, 52 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(4105, ~#ttusb_dec_table~0.base, 54 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(0, ~#ttusb_dec_table~0.base, 56 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(0, ~#ttusb_dec_table~0.base, 58 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(0, ~#ttusb_dec_table~0.base, 60 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 61 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 62 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 63 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 64 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 65 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 66 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 67 + ~#ttusb_dec_table~0.offset, 8);call write~init~int(0, ~#ttusb_dec_table~0.base, 75 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(0, ~#ttusb_dec_table~0.base, 77 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(0, ~#ttusb_dec_table~0.base, 79 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(0, ~#ttusb_dec_table~0.base, 81 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(0, ~#ttusb_dec_table~0.base, 83 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(0, ~#ttusb_dec_table~0.base, 85 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 86 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 87 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 88 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 89 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 90 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 91 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 92 + ~#ttusb_dec_table~0.offset, 8);~#ttusb_dec_driver~0.base, ~#ttusb_dec_driver~0.offset := 151, 0;call #Ultimate.allocInit(285, 151);call write~init~$Pointer$(145, 0, ~#ttusb_dec_driver~0.base, ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~ttusb_dec_probe.base, #funAddr~ttusb_dec_probe.offset, ~#ttusb_dec_driver~0.base, 8 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~ttusb_dec_disconnect.base, #funAddr~ttusb_dec_disconnect.offset, ~#ttusb_dec_driver~0.base, 16 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 24 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 32 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 40 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 48 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 56 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 64 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(~#ttusb_dec_table~0.base, ~#ttusb_dec_table~0.offset, ~#ttusb_dec_driver~0.base, 72 + ~#ttusb_dec_driver~0.offset, 8);call write~init~int(0, ~#ttusb_dec_driver~0.base, 80 + ~#ttusb_dec_driver~0.offset, 4);call write~init~int(0, ~#ttusb_dec_driver~0.base, 84 + ~#ttusb_dec_driver~0.offset, 4);call write~init~int(0, ~#ttusb_dec_driver~0.base, 88 + ~#ttusb_dec_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 92 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 100 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 108 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 116 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 124 + ~#ttusb_dec_driver~0.offset, 8);call write~init~int(0, ~#ttusb_dec_driver~0.base, 132 + ~#ttusb_dec_driver~0.offset, 4);call write~init~int(0, ~#ttusb_dec_driver~0.base, 136 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 148 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 156 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 164 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 172 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 180 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 188 + ~#ttusb_dec_driver~0.offset, 8);call write~init~int(0, ~#ttusb_dec_driver~0.base, 196 + ~#ttusb_dec_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 197 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 205 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 213 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 221 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 229 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 237 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 245 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 253 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 261 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 269 + ~#ttusb_dec_driver~0.offset, 8);call write~init~int(0, ~#ttusb_dec_driver~0.base, 277 + ~#ttusb_dec_driver~0.offset, 4);call write~init~int(0, ~#ttusb_dec_driver~0.base, 281 + ~#ttusb_dec_driver~0.offset, 1);call write~init~int(0, ~#ttusb_dec_driver~0.base, 282 + ~#ttusb_dec_driver~0.offset, 1);call write~init~int(0, ~#ttusb_dec_driver~0.base, 283 + ~#ttusb_dec_driver~0.offset, 1);call write~init~int(0, ~#ttusb_dec_driver~0.base, 284 + ~#ttusb_dec_driver~0.offset, 1);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.bInterfaceNumber := 0;~__mod_usb_device_table~0.driver_info := 0;~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {13833#true} is VALID [2022-02-20 21:51:30,413 INFO L290 TraceCheckUtils]: 1: Hoare triple {13833#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret800#1.base, main_#t~ret800#1.offset, main_#t~ret801#1.base, main_#t~ret801#1.offset, main_#t~nondet802#1, main_#t~ret803#1.base, main_#t~ret803#1.offset, main_#t~ret804#1.base, main_#t~ret804#1.offset, main_#t~ret805#1.base, main_#t~ret805#1.offset, main_#t~memset~res806#1.base, main_#t~memset~res806#1.offset, main_#t~nondet807#1, main_#t~switch808#1, main_#t~nondet809#1, main_#t~switch810#1, main_#t~ret811#1, main_#t~nondet812#1, main_#t~switch813#1, main_#t~ret814#1, main_#t~nondet815#1, main_#t~switch816#1, main_#t~mem817#1, main_#t~ret818#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~37#1.base, main_~tmp~37#1.offset, main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset, main_~tmp___0~15#1.base, main_~tmp___0~15#1.offset, main_~ldvarg4~0#1, main_~tmp___1~10#1, main_~ldvarg3~0#1.base, main_~ldvarg3~0#1.offset, main_~tmp___2~7#1.base, main_~tmp___2~7#1.offset, main_~#ldvarg5~0#1.base, main_~#ldvarg5~0#1.offset, main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset, main_~tmp___3~3#1.base, main_~tmp___3~3#1.offset, main_~ldvarg6~0#1.base, main_~ldvarg6~0#1.offset, main_~tmp___4~2#1.base, main_~tmp___4~2#1.offset, main_~tmp___5~2#1, main_~tmp___6~1#1, main_~tmp___7~1#1, main_~tmp___8~0#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~37#1.base, main_~tmp~37#1.offset;havoc main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset;havoc main_~tmp___0~15#1.base, main_~tmp___0~15#1.offset;havoc main_~ldvarg4~0#1;havoc main_~tmp___1~10#1;havoc main_~ldvarg3~0#1.base, main_~ldvarg3~0#1.offset;havoc main_~tmp___2~7#1.base, main_~tmp___2~7#1.offset;call main_~#ldvarg5~0#1.base, main_~#ldvarg5~0#1.offset := #Ultimate.allocOnStack(1);havoc main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset;havoc main_~tmp___3~3#1.base, main_~tmp___3~3#1.offset;havoc main_~ldvarg6~0#1.base, main_~ldvarg6~0#1.offset;havoc main_~tmp___4~2#1.base, main_~tmp___4~2#1.offset;havoc main_~tmp___5~2#1;havoc main_~tmp___6~1#1;havoc main_~tmp___7~1#1;havoc main_~tmp___8~0#1; {13833#true} is VALID [2022-02-20 21:51:30,413 INFO L272 TraceCheckUtils]: 2: Hoare triple {13833#true} call main_#t~ret800#1.base, main_#t~ret800#1.offset := ldv_zalloc(32); {13864#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:30,413 INFO L290 TraceCheckUtils]: 3: Hoare triple {13864#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet76#1 && #t~nondet76#1 <= 2147483647;~tmp___0~1#1 := #t~nondet76#1;havoc #t~nondet76#1; {13833#true} is VALID [2022-02-20 21:51:30,414 INFO L290 TraceCheckUtils]: 4: Hoare triple {13833#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {13833#true} is VALID [2022-02-20 21:51:30,414 INFO L290 TraceCheckUtils]: 5: Hoare triple {13833#true} assume true; {13833#true} is VALID [2022-02-20 21:51:30,414 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {13833#true} {13833#true} #2744#return; {13833#true} is VALID [2022-02-20 21:51:30,414 INFO L290 TraceCheckUtils]: 7: Hoare triple {13833#true} main_~tmp~37#1.base, main_~tmp~37#1.offset := main_#t~ret800#1.base, main_#t~ret800#1.offset;havoc main_#t~ret800#1.base, main_#t~ret800#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~37#1.base, main_~tmp~37#1.offset; {13833#true} is VALID [2022-02-20 21:51:30,415 INFO L272 TraceCheckUtils]: 8: Hoare triple {13833#true} call main_#t~ret801#1.base, main_#t~ret801#1.offset := ldv_zalloc(1); {13864#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:30,415 INFO L290 TraceCheckUtils]: 9: Hoare triple {13864#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet76#1 && #t~nondet76#1 <= 2147483647;~tmp___0~1#1 := #t~nondet76#1;havoc #t~nondet76#1; {13833#true} is VALID [2022-02-20 21:51:30,415 INFO L290 TraceCheckUtils]: 10: Hoare triple {13833#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {13833#true} is VALID [2022-02-20 21:51:30,415 INFO L290 TraceCheckUtils]: 11: Hoare triple {13833#true} assume true; {13833#true} is VALID [2022-02-20 21:51:30,415 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {13833#true} {13833#true} #2746#return; {13833#true} is VALID [2022-02-20 21:51:30,415 INFO L290 TraceCheckUtils]: 13: Hoare triple {13833#true} main_~tmp___0~15#1.base, main_~tmp___0~15#1.offset := main_#t~ret801#1.base, main_#t~ret801#1.offset;havoc main_#t~ret801#1.base, main_#t~ret801#1.offset;main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset := main_~tmp___0~15#1.base, main_~tmp___0~15#1.offset;assume -2147483648 <= main_#t~nondet802#1 && main_#t~nondet802#1 <= 2147483647;main_~tmp___1~10#1 := main_#t~nondet802#1;havoc main_#t~nondet802#1;main_~ldvarg4~0#1 := main_~tmp___1~10#1; {13833#true} is VALID [2022-02-20 21:51:30,416 INFO L272 TraceCheckUtils]: 14: Hoare triple {13833#true} call main_#t~ret803#1.base, main_#t~ret803#1.offset := ldv_zalloc(1288); {13864#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:30,416 INFO L290 TraceCheckUtils]: 15: Hoare triple {13864#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet76#1 && #t~nondet76#1 <= 2147483647;~tmp___0~1#1 := #t~nondet76#1;havoc #t~nondet76#1; {13833#true} is VALID [2022-02-20 21:51:30,416 INFO L290 TraceCheckUtils]: 16: Hoare triple {13833#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {13833#true} is VALID [2022-02-20 21:51:30,416 INFO L290 TraceCheckUtils]: 17: Hoare triple {13833#true} assume true; {13833#true} is VALID [2022-02-20 21:51:30,416 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {13833#true} {13833#true} #2748#return; {13833#true} is VALID [2022-02-20 21:51:30,417 INFO L290 TraceCheckUtils]: 19: Hoare triple {13833#true} main_~tmp___2~7#1.base, main_~tmp___2~7#1.offset := main_#t~ret803#1.base, main_#t~ret803#1.offset;havoc main_#t~ret803#1.base, main_#t~ret803#1.offset;main_~ldvarg3~0#1.base, main_~ldvarg3~0#1.offset := main_~tmp___2~7#1.base, main_~tmp___2~7#1.offset; {13833#true} is VALID [2022-02-20 21:51:30,417 INFO L272 TraceCheckUtils]: 20: Hoare triple {13833#true} call main_#t~ret804#1.base, main_#t~ret804#1.offset := ldv_zalloc(1); {13864#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:30,417 INFO L290 TraceCheckUtils]: 21: Hoare triple {13864#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet76#1 && #t~nondet76#1 <= 2147483647;~tmp___0~1#1 := #t~nondet76#1;havoc #t~nondet76#1; {13833#true} is VALID [2022-02-20 21:51:30,417 INFO L290 TraceCheckUtils]: 22: Hoare triple {13833#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {13833#true} is VALID [2022-02-20 21:51:30,417 INFO L290 TraceCheckUtils]: 23: Hoare triple {13833#true} assume true; {13833#true} is VALID [2022-02-20 21:51:30,418 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {13833#true} {13833#true} #2750#return; {13833#true} is VALID [2022-02-20 21:51:30,418 INFO L290 TraceCheckUtils]: 25: Hoare triple {13833#true} main_~tmp___3~3#1.base, main_~tmp___3~3#1.offset := main_#t~ret804#1.base, main_#t~ret804#1.offset;havoc main_#t~ret804#1.base, main_#t~ret804#1.offset;main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset := main_~tmp___3~3#1.base, main_~tmp___3~3#1.offset; {13833#true} is VALID [2022-02-20 21:51:30,418 INFO L272 TraceCheckUtils]: 26: Hoare triple {13833#true} call main_#t~ret805#1.base, main_#t~ret805#1.offset := ldv_zalloc(4); {13864#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:30,418 INFO L290 TraceCheckUtils]: 27: Hoare triple {13864#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet76#1 && #t~nondet76#1 <= 2147483647;~tmp___0~1#1 := #t~nondet76#1;havoc #t~nondet76#1; {13833#true} is VALID [2022-02-20 21:51:30,419 INFO L290 TraceCheckUtils]: 28: Hoare triple {13833#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {13833#true} is VALID [2022-02-20 21:51:30,419 INFO L290 TraceCheckUtils]: 29: Hoare triple {13833#true} assume true; {13833#true} is VALID [2022-02-20 21:51:30,419 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {13833#true} {13833#true} #2752#return; {13833#true} is VALID [2022-02-20 21:51:30,419 INFO L290 TraceCheckUtils]: 31: Hoare triple {13833#true} main_~tmp___4~2#1.base, main_~tmp___4~2#1.offset := main_#t~ret805#1.base, main_#t~ret805#1.offset;havoc main_#t~ret805#1.base, main_#t~ret805#1.offset;main_~ldvarg6~0#1.base, main_~ldvarg6~0#1.offset := main_~tmp___4~2#1.base, main_~tmp___4~2#1.offset;assume { :begin_inline_ldv_initialize } true; {13833#true} is VALID [2022-02-20 21:51:30,419 INFO L290 TraceCheckUtils]: 32: Hoare triple {13833#true} assume { :end_inline_ldv_initialize } true; {13833#true} is VALID [2022-02-20 21:51:30,420 INFO L272 TraceCheckUtils]: 33: Hoare triple {13833#true} call main_#t~memset~res806#1.base, main_#t~memset~res806#1.offset := #Ultimate.C_memset(main_~#ldvarg5~0#1.base, main_~#ldvarg5~0#1.offset, 0, 1); {13865#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 21:51:30,420 INFO L290 TraceCheckUtils]: 34: Hoare triple {13865#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr867 := 0; {13833#true} is VALID [2022-02-20 21:51:30,420 INFO L290 TraceCheckUtils]: 35: Hoare triple {13833#true} assume !(#t~loopctr867 % 18446744073709551616 < #amount % 18446744073709551616); {13833#true} is VALID [2022-02-20 21:51:30,420 INFO L290 TraceCheckUtils]: 36: Hoare triple {13833#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {13833#true} is VALID [2022-02-20 21:51:30,420 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {13833#true} {13833#true} #2754#return; {13833#true} is VALID [2022-02-20 21:51:30,421 INFO L290 TraceCheckUtils]: 38: Hoare triple {13833#true} havoc main_#t~memset~res806#1.base, main_#t~memset~res806#1.offset;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_2~0 := 0; {13833#true} is VALID [2022-02-20 21:51:30,421 INFO L290 TraceCheckUtils]: 39: Hoare triple {13833#true} assume -2147483648 <= main_#t~nondet807#1 && main_#t~nondet807#1 <= 2147483647;main_~tmp___5~2#1 := main_#t~nondet807#1;havoc main_#t~nondet807#1;main_#t~switch808#1 := 0 == main_~tmp___5~2#1; {13833#true} is VALID [2022-02-20 21:51:30,421 INFO L290 TraceCheckUtils]: 40: Hoare triple {13833#true} assume !main_#t~switch808#1;main_#t~switch808#1 := main_#t~switch808#1 || 1 == main_~tmp___5~2#1; {13833#true} is VALID [2022-02-20 21:51:30,421 INFO L290 TraceCheckUtils]: 41: Hoare triple {13833#true} assume main_#t~switch808#1; {13833#true} is VALID [2022-02-20 21:51:30,421 INFO L290 TraceCheckUtils]: 42: Hoare triple {13833#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet812#1 && main_#t~nondet812#1 <= 2147483647;main_~tmp___7~1#1 := main_#t~nondet812#1;havoc main_#t~nondet812#1;main_#t~switch813#1 := 0 == main_~tmp___7~1#1; {13833#true} is VALID [2022-02-20 21:51:30,421 INFO L290 TraceCheckUtils]: 43: Hoare triple {13833#true} assume !main_#t~switch813#1;main_#t~switch813#1 := main_#t~switch813#1 || 1 == main_~tmp___7~1#1; {13833#true} is VALID [2022-02-20 21:51:30,421 INFO L290 TraceCheckUtils]: 44: Hoare triple {13833#true} assume main_#t~switch813#1; {13833#true} is VALID [2022-02-20 21:51:30,422 INFO L290 TraceCheckUtils]: 45: Hoare triple {13833#true} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_ttusb_dec_driver_init } true;havoc ttusb_dec_driver_init_#res#1;havoc ttusb_dec_driver_init_#t~ret798#1, ttusb_dec_driver_init_~tmp~35#1;havoc ttusb_dec_driver_init_~tmp~35#1;assume { :begin_inline_ldv_usb_register_driver_15 } true;ldv_usb_register_driver_15_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_15_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_15_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_15_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_15_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_15_#in~ldv_func_arg3#1.offset := ~#ttusb_dec_driver~0.base, ~#ttusb_dec_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 146, 0;havoc ldv_usb_register_driver_15_#res#1;havoc ldv_usb_register_driver_15_#t~ret827#1, ldv_usb_register_driver_15_~ldv_func_arg1#1.base, ldv_usb_register_driver_15_~ldv_func_arg1#1.offset, ldv_usb_register_driver_15_~ldv_func_arg2#1.base, ldv_usb_register_driver_15_~ldv_func_arg2#1.offset, ldv_usb_register_driver_15_~ldv_func_arg3#1.base, ldv_usb_register_driver_15_~ldv_func_arg3#1.offset, ldv_usb_register_driver_15_~ldv_func_res~0#1, ldv_usb_register_driver_15_~tmp~46#1;ldv_usb_register_driver_15_~ldv_func_arg1#1.base, ldv_usb_register_driver_15_~ldv_func_arg1#1.offset := ldv_usb_register_driver_15_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_15_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_15_~ldv_func_arg2#1.base, ldv_usb_register_driver_15_~ldv_func_arg2#1.offset := ldv_usb_register_driver_15_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_15_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_15_~ldv_func_arg3#1.base, ldv_usb_register_driver_15_~ldv_func_arg3#1.offset := ldv_usb_register_driver_15_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_15_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_15_~ldv_func_res~0#1;havoc ldv_usb_register_driver_15_~tmp~46#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_15_~ldv_func_arg1#1.base, ldv_usb_register_driver_15_~ldv_func_arg1#1.offset, ldv_usb_register_driver_15_~ldv_func_arg2#1.base, ldv_usb_register_driver_15_~ldv_func_arg2#1.offset, ldv_usb_register_driver_15_~ldv_func_arg3#1.base, ldv_usb_register_driver_15_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet856#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet856#1 && usb_register_driver_#t~nondet856#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet856#1;havoc usb_register_driver_#t~nondet856#1; {13833#true} is VALID [2022-02-20 21:51:30,422 INFO L290 TraceCheckUtils]: 46: Hoare triple {13833#true} ldv_usb_register_driver_15_#t~ret827#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_15_#t~ret827#1 && ldv_usb_register_driver_15_#t~ret827#1 <= 2147483647;ldv_usb_register_driver_15_~tmp~46#1 := ldv_usb_register_driver_15_#t~ret827#1;havoc ldv_usb_register_driver_15_#t~ret827#1;ldv_usb_register_driver_15_~ldv_func_res~0#1 := ldv_usb_register_driver_15_~tmp~46#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret799#1.base, ldv_usb_driver_1_#t~ret799#1.offset, ldv_usb_driver_1_~tmp~36#1.base, ldv_usb_driver_1_~tmp~36#1.offset;havoc ldv_usb_driver_1_~tmp~36#1.base, ldv_usb_driver_1_~tmp~36#1.offset; {13833#true} is VALID [2022-02-20 21:51:30,422 INFO L272 TraceCheckUtils]: 47: Hoare triple {13833#true} call ldv_usb_driver_1_#t~ret799#1.base, ldv_usb_driver_1_#t~ret799#1.offset := ldv_zalloc(1520); {13864#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:30,422 INFO L290 TraceCheckUtils]: 48: Hoare triple {13864#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet76#1 && #t~nondet76#1 <= 2147483647;~tmp___0~1#1 := #t~nondet76#1;havoc #t~nondet76#1; {13833#true} is VALID [2022-02-20 21:51:30,423 INFO L290 TraceCheckUtils]: 49: Hoare triple {13833#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {13833#true} is VALID [2022-02-20 21:51:30,423 INFO L290 TraceCheckUtils]: 50: Hoare triple {13833#true} assume true; {13833#true} is VALID [2022-02-20 21:51:30,423 INFO L284 TraceCheckUtils]: 51: Hoare quadruple {13833#true} {13833#true} #2762#return; {13833#true} is VALID [2022-02-20 21:51:30,423 INFO L290 TraceCheckUtils]: 52: Hoare triple {13833#true} ldv_usb_driver_1_~tmp~36#1.base, ldv_usb_driver_1_~tmp~36#1.offset := ldv_usb_driver_1_#t~ret799#1.base, ldv_usb_driver_1_#t~ret799#1.offset;havoc ldv_usb_driver_1_#t~ret799#1.base, ldv_usb_driver_1_#t~ret799#1.offset;~ttusb_dec_driver_group1~0.base, ~ttusb_dec_driver_group1~0.offset := ldv_usb_driver_1_~tmp~36#1.base, ldv_usb_driver_1_~tmp~36#1.offset; {13833#true} is VALID [2022-02-20 21:51:30,423 INFO L290 TraceCheckUtils]: 53: Hoare triple {13833#true} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_15_#res#1 := ldv_usb_register_driver_15_~ldv_func_res~0#1; {13833#true} is VALID [2022-02-20 21:51:30,423 INFO L290 TraceCheckUtils]: 54: Hoare triple {13833#true} ttusb_dec_driver_init_#t~ret798#1 := ldv_usb_register_driver_15_#res#1;assume { :end_inline_ldv_usb_register_driver_15 } true;assume -2147483648 <= ttusb_dec_driver_init_#t~ret798#1 && ttusb_dec_driver_init_#t~ret798#1 <= 2147483647;ttusb_dec_driver_init_~tmp~35#1 := ttusb_dec_driver_init_#t~ret798#1;havoc ttusb_dec_driver_init_#t~ret798#1;ttusb_dec_driver_init_#res#1 := ttusb_dec_driver_init_~tmp~35#1; {13833#true} is VALID [2022-02-20 21:51:30,424 INFO L290 TraceCheckUtils]: 55: Hoare triple {13833#true} main_#t~ret814#1 := ttusb_dec_driver_init_#res#1;assume { :end_inline_ttusb_dec_driver_init } true;assume -2147483648 <= main_#t~ret814#1 && main_#t~ret814#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret814#1;havoc main_#t~ret814#1; {13833#true} is VALID [2022-02-20 21:51:30,424 INFO L290 TraceCheckUtils]: 56: Hoare triple {13833#true} assume 0 == ~ldv_retval_1~0;~ldv_state_variable_0~0 := 3;~ldv_state_variable_2~0 := 1; {13863#(= ~ldv_retval_1~0 0)} is VALID [2022-02-20 21:51:30,424 INFO L290 TraceCheckUtils]: 57: Hoare triple {13863#(= ~ldv_retval_1~0 0)} assume 0 != ~ldv_retval_1~0;~ldv_state_variable_0~0 := 2; {13834#false} is VALID [2022-02-20 21:51:30,424 INFO L290 TraceCheckUtils]: 58: Hoare triple {13834#false} assume { :begin_inline_ldv_check_final_state } true; {13834#false} is VALID [2022-02-20 21:51:30,424 INFO L290 TraceCheckUtils]: 59: Hoare triple {13834#false} assume !(0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616); {13834#false} is VALID [2022-02-20 21:51:30,425 INFO L272 TraceCheckUtils]: 60: Hoare triple {13834#false} call ldv_error(); {13834#false} is VALID [2022-02-20 21:51:30,425 INFO L290 TraceCheckUtils]: 61: Hoare triple {13834#false} assume !false; {13834#false} is VALID [2022-02-20 21:51:30,425 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2022-02-20 21:51:30,425 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:51:30,425 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [115568477] [2022-02-20 21:51:30,426 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [115568477] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:51:30,426 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:51:30,426 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-02-20 21:51:30,426 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [310761444] [2022-02-20 21:51:30,426 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:51:30,427 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 6.4) internal successors, (32), 3 states have internal predecessors, (32), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) Word has length 62 [2022-02-20 21:51:30,427 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:51:30,427 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 6.4) internal successors, (32), 3 states have internal predecessors, (32), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2022-02-20 21:51:30,475 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 47 edges. 47 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:51:30,476 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-02-20 21:51:30,476 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:51:30,476 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-02-20 21:51:30,476 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-02-20 21:51:30,477 INFO L87 Difference]: Start difference. First operand 2044 states and 2808 transitions. Second operand has 5 states, 5 states have (on average 6.4) internal successors, (32), 3 states have internal predecessors, (32), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2022-02-20 21:51:34,921 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-02-20 21:51:49,057 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:51:49,057 INFO L93 Difference]: Finished difference Result 3656 states and 5220 transitions. [2022-02-20 21:51:49,057 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-02-20 21:51:49,058 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 6.4) internal successors, (32), 3 states have internal predecessors, (32), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) Word has length 62 [2022-02-20 21:51:49,060 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:51:49,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 6.4) internal successors, (32), 3 states have internal predecessors, (32), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2022-02-20 21:51:49,113 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 3514 transitions. [2022-02-20 21:51:49,114 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 6.4) internal successors, (32), 3 states have internal predecessors, (32), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2022-02-20 21:51:49,168 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 3514 transitions. [2022-02-20 21:51:49,168 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 7 states and 3514 transitions. [2022-02-20 21:51:52,024 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 3514 edges. 3514 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:51:52,600 INFO L225 Difference]: With dead ends: 3656 [2022-02-20 21:51:52,600 INFO L226 Difference]: Without dead ends: 3643 [2022-02-20 21:51:52,602 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2022-02-20 21:51:52,604 INFO L933 BasicCegarLoop]: 1542 mSDtfsCounter, 3009 mSDsluCounter, 2211 mSDsCounter, 0 mSdLazyCounter, 1831 mSolverCounterSat, 1410 mSolverCounterUnsat, 1 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 8.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3174 SdHoareTripleChecker+Valid, 3753 SdHoareTripleChecker+Invalid, 3242 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1410 IncrementalHoareTripleChecker+Valid, 1831 IncrementalHoareTripleChecker+Invalid, 1 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 8.1s IncrementalHoareTripleChecker+Time [2022-02-20 21:51:52,604 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [3174 Valid, 3753 Invalid, 3242 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1410 Valid, 1831 Invalid, 1 Unknown, 0 Unchecked, 8.1s Time] [2022-02-20 21:51:52,607 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3643 states. [2022-02-20 21:51:52,684 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3643 to 2986. [2022-02-20 21:51:52,684 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:51:52,691 INFO L82 GeneralOperation]: Start isEquivalent. First operand 3643 states. Second operand has 2986 states, 2174 states have (on average 1.3164673413063477) internal successors, (2862), 2223 states have internal predecessors, (2862), 619 states have call successors, (619), 193 states have call predecessors, (619), 192 states have return successors, (614), 590 states have call predecessors, (614), 614 states have call successors, (614) [2022-02-20 21:51:52,708 INFO L74 IsIncluded]: Start isIncluded. First operand 3643 states. Second operand has 2986 states, 2174 states have (on average 1.3164673413063477) internal successors, (2862), 2223 states have internal predecessors, (2862), 619 states have call successors, (619), 193 states have call predecessors, (619), 192 states have return successors, (614), 590 states have call predecessors, (614), 614 states have call successors, (614) [2022-02-20 21:51:52,713 INFO L87 Difference]: Start difference. First operand 3643 states. Second operand has 2986 states, 2174 states have (on average 1.3164673413063477) internal successors, (2862), 2223 states have internal predecessors, (2862), 619 states have call successors, (619), 193 states have call predecessors, (619), 192 states have return successors, (614), 590 states have call predecessors, (614), 614 states have call successors, (614) [2022-02-20 21:51:53,170 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:51:53,171 INFO L93 Difference]: Finished difference Result 3643 states and 5203 transitions. [2022-02-20 21:51:53,171 INFO L276 IsEmpty]: Start isEmpty. Operand 3643 states and 5203 transitions. [2022-02-20 21:51:53,183 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:51:53,184 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:51:53,189 INFO L74 IsIncluded]: Start isIncluded. First operand has 2986 states, 2174 states have (on average 1.3164673413063477) internal successors, (2862), 2223 states have internal predecessors, (2862), 619 states have call successors, (619), 193 states have call predecessors, (619), 192 states have return successors, (614), 590 states have call predecessors, (614), 614 states have call successors, (614) Second operand 3643 states. [2022-02-20 21:51:53,193 INFO L87 Difference]: Start difference. First operand has 2986 states, 2174 states have (on average 1.3164673413063477) internal successors, (2862), 2223 states have internal predecessors, (2862), 619 states have call successors, (619), 193 states have call predecessors, (619), 192 states have return successors, (614), 590 states have call predecessors, (614), 614 states have call successors, (614) Second operand 3643 states. [2022-02-20 21:51:53,609 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:51:53,609 INFO L93 Difference]: Finished difference Result 3643 states and 5203 transitions. [2022-02-20 21:51:53,609 INFO L276 IsEmpty]: Start isEmpty. Operand 3643 states and 5203 transitions. [2022-02-20 21:51:53,622 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:51:53,622 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:51:53,622 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:51:53,622 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:51:53,627 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2986 states, 2174 states have (on average 1.3164673413063477) internal successors, (2862), 2223 states have internal predecessors, (2862), 619 states have call successors, (619), 193 states have call predecessors, (619), 192 states have return successors, (614), 590 states have call predecessors, (614), 614 states have call successors, (614) [2022-02-20 21:51:53,993 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2986 states to 2986 states and 4095 transitions. [2022-02-20 21:51:53,993 INFO L78 Accepts]: Start accepts. Automaton has 2986 states and 4095 transitions. Word has length 62 [2022-02-20 21:51:53,994 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:51:53,994 INFO L470 AbstractCegarLoop]: Abstraction has 2986 states and 4095 transitions. [2022-02-20 21:51:53,994 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 6.4) internal successors, (32), 3 states have internal predecessors, (32), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2022-02-20 21:51:53,994 INFO L276 IsEmpty]: Start isEmpty. Operand 2986 states and 4095 transitions. [2022-02-20 21:51:53,995 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2022-02-20 21:51:53,995 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:51:53,995 INFO L514 BasicCegarLoop]: trace histogram [6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:51:53,995 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-02-20 21:51:53,996 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:51:53,996 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:51:53,997 INFO L85 PathProgramCache]: Analyzing trace with hash 2113572716, now seen corresponding path program 1 times [2022-02-20 21:51:53,997 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:51:53,997 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [998602659] [2022-02-20 21:51:53,997 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:51:53,997 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:51:54,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:54,121 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 21:51:54,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:54,133 INFO L290 TraceCheckUtils]: 0: Hoare triple {30352#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet76#1 && #t~nondet76#1 <= 2147483647;~tmp___0~1#1 := #t~nondet76#1;havoc #t~nondet76#1; {30321#true} is VALID [2022-02-20 21:51:54,133 INFO L290 TraceCheckUtils]: 1: Hoare triple {30321#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {30321#true} is VALID [2022-02-20 21:51:54,133 INFO L290 TraceCheckUtils]: 2: Hoare triple {30321#true} assume true; {30321#true} is VALID [2022-02-20 21:51:54,134 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {30321#true} {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2744#return; {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:54,134 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-02-20 21:51:54,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:54,146 INFO L290 TraceCheckUtils]: 0: Hoare triple {30352#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet76#1 && #t~nondet76#1 <= 2147483647;~tmp___0~1#1 := #t~nondet76#1;havoc #t~nondet76#1; {30321#true} is VALID [2022-02-20 21:51:54,146 INFO L290 TraceCheckUtils]: 1: Hoare triple {30321#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {30321#true} is VALID [2022-02-20 21:51:54,146 INFO L290 TraceCheckUtils]: 2: Hoare triple {30321#true} assume true; {30321#true} is VALID [2022-02-20 21:51:54,147 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {30321#true} {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2746#return; {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:54,147 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2022-02-20 21:51:54,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:54,159 INFO L290 TraceCheckUtils]: 0: Hoare triple {30352#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet76#1 && #t~nondet76#1 <= 2147483647;~tmp___0~1#1 := #t~nondet76#1;havoc #t~nondet76#1; {30321#true} is VALID [2022-02-20 21:51:54,159 INFO L290 TraceCheckUtils]: 1: Hoare triple {30321#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {30321#true} is VALID [2022-02-20 21:51:54,159 INFO L290 TraceCheckUtils]: 2: Hoare triple {30321#true} assume true; {30321#true} is VALID [2022-02-20 21:51:54,160 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {30321#true} {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2748#return; {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:54,160 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 20 [2022-02-20 21:51:54,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:54,178 INFO L290 TraceCheckUtils]: 0: Hoare triple {30352#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet76#1 && #t~nondet76#1 <= 2147483647;~tmp___0~1#1 := #t~nondet76#1;havoc #t~nondet76#1; {30321#true} is VALID [2022-02-20 21:51:54,178 INFO L290 TraceCheckUtils]: 1: Hoare triple {30321#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {30321#true} is VALID [2022-02-20 21:51:54,178 INFO L290 TraceCheckUtils]: 2: Hoare triple {30321#true} assume true; {30321#true} is VALID [2022-02-20 21:51:54,180 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {30321#true} {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2750#return; {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:54,180 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-02-20 21:51:54,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:54,196 INFO L290 TraceCheckUtils]: 0: Hoare triple {30352#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet76#1 && #t~nondet76#1 <= 2147483647;~tmp___0~1#1 := #t~nondet76#1;havoc #t~nondet76#1; {30321#true} is VALID [2022-02-20 21:51:54,197 INFO L290 TraceCheckUtils]: 1: Hoare triple {30321#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {30321#true} is VALID [2022-02-20 21:51:54,199 INFO L290 TraceCheckUtils]: 2: Hoare triple {30321#true} assume true; {30321#true} is VALID [2022-02-20 21:51:54,200 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {30321#true} {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2752#return; {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:54,206 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 33 [2022-02-20 21:51:54,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:54,233 INFO L290 TraceCheckUtils]: 0: Hoare triple {30353#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr867 := 0; {30321#true} is VALID [2022-02-20 21:51:54,234 INFO L290 TraceCheckUtils]: 1: Hoare triple {30321#true} assume !(#t~loopctr867 % 18446744073709551616 < #amount % 18446744073709551616); {30321#true} is VALID [2022-02-20 21:51:54,234 INFO L290 TraceCheckUtils]: 2: Hoare triple {30321#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {30321#true} is VALID [2022-02-20 21:51:54,234 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {30321#true} {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2754#return; {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:54,235 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 47 [2022-02-20 21:51:54,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:54,250 INFO L290 TraceCheckUtils]: 0: Hoare triple {30352#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet76#1 && #t~nondet76#1 <= 2147483647;~tmp___0~1#1 := #t~nondet76#1;havoc #t~nondet76#1; {30321#true} is VALID [2022-02-20 21:51:54,251 INFO L290 TraceCheckUtils]: 1: Hoare triple {30321#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {30321#true} is VALID [2022-02-20 21:51:54,251 INFO L290 TraceCheckUtils]: 2: Hoare triple {30321#true} assume true; {30321#true} is VALID [2022-02-20 21:51:54,251 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {30321#true} {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2762#return; {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:54,260 INFO L290 TraceCheckUtils]: 0: Hoare triple {30321#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(96, 2);call #Ultimate.allocInit(10, 3);call #Ultimate.allocInit(119, 4);call #Ultimate.allocInit(38, 5);call #Ultimate.allocInit(21, 6);call #Ultimate.allocInit(32, 7);call #Ultimate.allocInit(21, 8);call #Ultimate.allocInit(17, 9);call #Ultimate.allocInit(21, 10);call #Ultimate.allocInit(44, 11);call #Ultimate.allocInit(21, 12);call #Ultimate.allocInit(4, 13);call write~init~int(37, 13, 0, 1);call write~init~int(115, 13, 1, 1);call write~init~int(10, 13, 2, 1);call write~init~int(0, 13, 3, 1);call #Ultimate.allocInit(23, 14);call #Ultimate.allocInit(31, 15);call #Ultimate.allocInit(23, 16);call #Ultimate.allocInit(14, 17);call #Ultimate.allocInit(23, 18);call #Ultimate.allocInit(8, 19);call #Ultimate.allocInit(2, 20);call write~init~int(10, 20, 0, 1);call write~init~int(0, 20, 1, 1);call #Ultimate.allocInit(43, 21);call #Ultimate.allocInit(23, 22);call #Ultimate.allocInit(42, 23);call #Ultimate.allocInit(23, 24);call #Ultimate.allocInit(13, 25);call #Ultimate.allocInit(23, 26);call #Ultimate.allocInit(8, 27);call #Ultimate.allocInit(2, 28);call write~init~int(10, 28, 0, 1);call write~init~int(0, 28, 1, 1);call #Ultimate.allocInit(4, 29);call write~init~int(37, 29, 0, 1);call write~init~int(115, 29, 1, 1);call write~init~int(10, 29, 2, 1);call write~init~int(0, 29, 3, 1);call #Ultimate.allocInit(24, 30);call #Ultimate.allocInit(4, 31);call write~init~int(37, 31, 0, 1);call write~init~int(115, 31, 1, 1);call write~init~int(10, 31, 2, 1);call write~init~int(0, 31, 3, 1);call #Ultimate.allocInit(19, 32);call #Ultimate.allocInit(35, 33);call #Ultimate.allocInit(22, 34);call #Ultimate.allocInit(34, 35);call #Ultimate.allocInit(22, 36);call #Ultimate.allocInit(29, 37);call #Ultimate.allocInit(22, 38);call #Ultimate.allocInit(35, 39);call #Ultimate.allocInit(25, 40);call #Ultimate.allocInit(34, 41);call #Ultimate.allocInit(25, 42);call #Ultimate.allocInit(45, 43);call #Ultimate.allocInit(25, 44);call #Ultimate.allocInit(35, 45);call #Ultimate.allocInit(28, 46);call #Ultimate.allocInit(39, 47);call #Ultimate.allocInit(28, 48);call #Ultimate.allocInit(19, 49);call #Ultimate.allocInit(22, 50);call #Ultimate.allocInit(4, 51);call write~init~int(37, 51, 0, 1);call write~init~int(115, 51, 1, 1);call write~init~int(10, 51, 2, 1);call write~init~int(0, 51, 3, 1);call #Ultimate.allocInit(21, 52);call #Ultimate.allocInit(4, 53);call write~init~int(37, 53, 0, 1);call write~init~int(115, 53, 1, 1);call write~init~int(10, 53, 2, 1);call write~init~int(0, 53, 3, 1);call #Ultimate.allocInit(24, 54);call #Ultimate.allocInit(4, 55);call write~init~int(37, 55, 0, 1);call write~init~int(115, 55, 1, 1);call write~init~int(10, 55, 2, 1);call write~init~int(0, 55, 3, 1);call #Ultimate.allocInit(25, 56);call #Ultimate.allocInit(40, 57);call #Ultimate.allocInit(25, 58);call #Ultimate.allocInit(4, 59);call write~init~int(37, 59, 0, 1);call write~init~int(115, 59, 1, 1);call write~init~int(10, 59, 2, 1);call write~init~int(0, 59, 3, 1);call #Ultimate.allocInit(24, 60);call #Ultimate.allocInit(11, 61);call #Ultimate.allocInit(12, 62);call #Ultimate.allocInit(11, 63);call #Ultimate.allocInit(17, 64);call #Ultimate.allocInit(2, 65);call write~init~int(10, 65, 0, 1);call write~init~int(0, 65, 1, 1);call #Ultimate.allocInit(27, 66);call #Ultimate.allocInit(27, 67);call #Ultimate.allocInit(45, 68);call #Ultimate.allocInit(25, 69);call #Ultimate.allocInit(42, 70);call #Ultimate.allocInit(26, 71);call #Ultimate.allocInit(4, 72);call write~init~int(37, 72, 0, 1);call write~init~int(115, 72, 1, 1);call write~init~int(10, 72, 2, 1);call write~init~int(0, 72, 3, 1);call #Ultimate.allocInit(25, 73);call #Ultimate.allocInit(4, 74);call write~init~int(37, 74, 0, 1);call write~init~int(115, 74, 1, 1);call write~init~int(10, 74, 2, 1);call write~init~int(0, 74, 3, 1);call #Ultimate.allocInit(21, 75);call #Ultimate.allocInit(15, 76);call #Ultimate.allocInit(22, 77);call #Ultimate.allocInit(4, 78);call write~init~int(37, 78, 0, 1);call write~init~int(115, 78, 1, 1);call write~init~int(10, 78, 2, 1);call write~init~int(0, 78, 3, 1);call #Ultimate.allocInit(20, 79);call #Ultimate.allocInit(4, 80);call write~init~int(37, 80, 0, 1);call write~init~int(115, 80, 1, 1);call write~init~int(10, 80, 2, 1);call write~init~int(0, 80, 3, 1);call #Ultimate.allocInit(24, 81);call #Ultimate.allocInit(4, 82);call write~init~int(37, 82, 0, 1);call write~init~int(115, 82, 1, 1);call write~init~int(10, 82, 2, 1);call write~init~int(0, 82, 3, 1);call #Ultimate.allocInit(25, 83);call #Ultimate.allocInit(46, 84);call #Ultimate.allocInit(25, 85);call #Ultimate.allocInit(36, 86);call #Ultimate.allocInit(8, 87);call #Ultimate.allocInit(25, 88);call #Ultimate.allocInit(27, 89);call #Ultimate.allocInit(14, 90);call #Ultimate.allocInit(4, 91);call write~init~int(37, 91, 0, 1);call write~init~int(115, 91, 1, 1);call write~init~int(10, 91, 2, 1);call write~init~int(0, 91, 3, 1);call #Ultimate.allocInit(21, 92);call #Ultimate.allocInit(4, 93);call write~init~int(37, 93, 0, 1);call write~init~int(115, 93, 1, 1);call write~init~int(10, 93, 2, 1);call write~init~int(0, 93, 3, 1);call #Ultimate.allocInit(19, 94);call #Ultimate.allocInit(16, 95);call #Ultimate.allocInit(16, 96);call #Ultimate.allocInit(4, 97);call write~init~int(37, 97, 0, 1);call write~init~int(115, 97, 1, 1);call write~init~int(10, 97, 2, 1);call write~init~int(0, 97, 3, 1);call #Ultimate.allocInit(19, 98);call #Ultimate.allocInit(33, 99);call #Ultimate.allocInit(19, 100);call #Ultimate.allocInit(54, 101);call #Ultimate.allocInit(19, 102);call #Ultimate.allocInit(89, 103);call #Ultimate.allocInit(19, 104);call #Ultimate.allocInit(34, 105);call #Ultimate.allocInit(4, 106);call write~init~int(37, 106, 0, 1);call write~init~int(115, 106, 1, 1);call write~init~int(10, 106, 2, 1);call write~init~int(0, 106, 3, 1);call #Ultimate.allocInit(19, 107);call #Ultimate.allocInit(41, 108);call #Ultimate.allocInit(34, 109);call #Ultimate.allocInit(64, 110);call #Ultimate.allocInit(19, 111);call #Ultimate.allocInit(4, 112);call write~init~int(37, 112, 0, 1);call write~init~int(115, 112, 1, 1);call write~init~int(10, 112, 2, 1);call write~init~int(0, 112, 3, 1);call #Ultimate.allocInit(19, 113);call #Ultimate.allocInit(43, 114);call #Ultimate.allocInit(19, 115);call #Ultimate.allocInit(35, 116);call #Ultimate.allocInit(19, 117);call #Ultimate.allocInit(38, 118);call #Ultimate.allocInit(19, 119);call #Ultimate.allocInit(35, 120);call #Ultimate.allocInit(19, 121);call #Ultimate.allocInit(35, 122);call #Ultimate.allocInit(19, 123);call #Ultimate.allocInit(4, 124);call write~init~int(37, 124, 0, 1);call write~init~int(115, 124, 1, 1);call write~init~int(10, 124, 2, 1);call write~init~int(0, 124, 3, 1);call #Ultimate.allocInit(19, 125);call #Ultimate.allocInit(4, 126);call write~init~int(37, 126, 0, 1);call write~init~int(115, 126, 1, 1);call write~init~int(10, 126, 2, 1);call write~init~int(0, 126, 3, 1);call #Ultimate.allocInit(18, 127);call #Ultimate.allocInit(4, 128);call write~init~int(37, 128, 0, 1);call write~init~int(115, 128, 1, 1);call write~init~int(10, 128, 2, 1);call write~init~int(0, 128, 3, 1);call #Ultimate.allocInit(19, 129);call #Ultimate.allocInit(38, 130);call #Ultimate.allocInit(4, 131);call write~init~int(37, 131, 0, 1);call write~init~int(115, 131, 1, 1);call write~init~int(10, 131, 2, 1);call write~init~int(0, 131, 3, 1);call #Ultimate.allocInit(16, 132);call #Ultimate.allocInit(31, 133);call #Ultimate.allocInit(16, 134);call #Ultimate.allocInit(71, 135);call #Ultimate.allocInit(42, 136);call #Ultimate.allocInit(4, 137);call write~init~int(37, 137, 0, 1);call write~init~int(115, 137, 1, 1);call write~init~int(10, 137, 2, 1);call write~init~int(0, 137, 3, 1);call #Ultimate.allocInit(21, 138);call #Ultimate.allocInit(10, 139);call #Ultimate.allocInit(23, 140);call #Ultimate.allocInit(10, 141);call #Ultimate.allocInit(23, 142);call #Ultimate.allocInit(10, 143);call #Ultimate.allocInit(23, 144);call #Ultimate.allocInit(10, 145);call #Ultimate.allocInit(10, 146);~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_2~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~ttusb_dec_driver_group1~0.base, ~ttusb_dec_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~debug~0 := 0;~output_pva~0 := 0;~enable_rc~0 := 0;~#adapter_nr~0.base, ~#adapter_nr~0.offset := 147, 0;call #Ultimate.allocInit(16, 147);call write~init~int(-1, ~#adapter_nr~0.base, ~#adapter_nr~0.offset, 2);call write~init~int(-1, ~#adapter_nr~0.base, 2 + ~#adapter_nr~0.offset, 2);call write~init~int(-1, ~#adapter_nr~0.base, 4 + ~#adapter_nr~0.offset, 2);call write~init~int(-1, ~#adapter_nr~0.base, 6 + ~#adapter_nr~0.offset, 2);call write~init~int(-1, ~#adapter_nr~0.base, 8 + ~#adapter_nr~0.offset, 2);call write~init~int(-1, ~#adapter_nr~0.base, 10 + ~#adapter_nr~0.offset, 2);call write~init~int(-1, ~#adapter_nr~0.base, 12 + ~#adapter_nr~0.offset, 2);call write~init~int(-1, ~#adapter_nr~0.base, 14 + ~#adapter_nr~0.offset, 2);~#rc_keys~0.base, ~#rc_keys~0.offset := 148, 0;call #Ultimate.allocInit(52, 148);call write~init~int(116, ~#rc_keys~0.base, ~#rc_keys~0.offset, 2);call write~init~int(113, ~#rc_keys~0.base, 2 + ~#rc_keys~0.offset, 2);call write~init~int(2, ~#rc_keys~0.base, 4 + ~#rc_keys~0.offset, 2);call write~init~int(3, ~#rc_keys~0.base, 6 + ~#rc_keys~0.offset, 2);call write~init~int(4, ~#rc_keys~0.base, 8 + ~#rc_keys~0.offset, 2);call write~init~int(5, ~#rc_keys~0.base, 10 + ~#rc_keys~0.offset, 2);call write~init~int(6, ~#rc_keys~0.base, 12 + ~#rc_keys~0.offset, 2);call write~init~int(7, ~#rc_keys~0.base, 14 + ~#rc_keys~0.offset, 2);call write~init~int(8, ~#rc_keys~0.base, 16 + ~#rc_keys~0.offset, 2);call write~init~int(9, ~#rc_keys~0.base, 18 + ~#rc_keys~0.offset, 2);call write~init~int(10, ~#rc_keys~0.base, 20 + ~#rc_keys~0.offset, 2);call write~init~int(11, ~#rc_keys~0.base, 22 + ~#rc_keys~0.offset, 2);call write~init~int(402, ~#rc_keys~0.base, 24 + ~#rc_keys~0.offset, 2);call write~init~int(114, ~#rc_keys~0.base, 26 + ~#rc_keys~0.offset, 2);call write~init~int(352, ~#rc_keys~0.base, 28 + ~#rc_keys~0.offset, 2);call write~init~int(115, ~#rc_keys~0.base, 30 + ~#rc_keys~0.offset, 2);call write~init~int(403, ~#rc_keys~0.base, 32 + ~#rc_keys~0.offset, 2);call write~init~int(412, ~#rc_keys~0.base, 34 + ~#rc_keys~0.offset, 2);call write~init~int(1, ~#rc_keys~0.base, 36 + ~#rc_keys~0.offset, 2);call write~init~int(398, ~#rc_keys~0.base, 38 + ~#rc_keys~0.offset, 2);call write~init~int(399, ~#rc_keys~0.base, 40 + ~#rc_keys~0.offset, 2);call write~init~int(400, ~#rc_keys~0.base, 42 + ~#rc_keys~0.offset, 2);call write~init~int(401, ~#rc_keys~0.base, 44 + ~#rc_keys~0.offset, 2);call write~init~int(357, ~#rc_keys~0.base, 46 + ~#rc_keys~0.offset, 2);call write~init~int(50, ~#rc_keys~0.base, 48 + ~#rc_keys~0.offset, 2);call write~init~int(385, ~#rc_keys~0.base, 50 + ~#rc_keys~0.offset, 2);~#fe_config~0.base, ~#fe_config~0.offset := 149, 0;call #Ultimate.allocInit(8, 149);call write~init~$Pointer$(#funAddr~fe_send_command.base, #funAddr~fe_send_command.offset, ~#fe_config~0.base, ~#fe_config~0.offset, 8);~#ttusb_dec_table~0.base, ~#ttusb_dec_table~0.offset := 150, 0;call #Ultimate.allocInit(100, 150);call write~init~int(3, ~#ttusb_dec_table~0.base, ~#ttusb_dec_table~0.offset, 2);call write~init~int(2888, ~#ttusb_dec_table~0.base, 2 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(4102, ~#ttusb_dec_table~0.base, 4 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(0, ~#ttusb_dec_table~0.base, 6 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(0, ~#ttusb_dec_table~0.base, 8 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(0, ~#ttusb_dec_table~0.base, 10 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 11 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 12 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 13 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 14 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 15 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 16 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 17 + ~#ttusb_dec_table~0.offset, 8);call write~init~int(3, ~#ttusb_dec_table~0.base, 25 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(2888, ~#ttusb_dec_table~0.base, 27 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(4104, ~#ttusb_dec_table~0.base, 29 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(0, ~#ttusb_dec_table~0.base, 31 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(0, ~#ttusb_dec_table~0.base, 33 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(0, ~#ttusb_dec_table~0.base, 35 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 36 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 37 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 38 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 39 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 40 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 41 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 42 + ~#ttusb_dec_table~0.offset, 8);call write~init~int(3, ~#ttusb_dec_table~0.base, 50 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(2888, ~#ttusb_dec_table~0.base, 52 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(4105, ~#ttusb_dec_table~0.base, 54 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(0, ~#ttusb_dec_table~0.base, 56 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(0, ~#ttusb_dec_table~0.base, 58 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(0, ~#ttusb_dec_table~0.base, 60 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 61 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 62 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 63 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 64 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 65 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 66 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 67 + ~#ttusb_dec_table~0.offset, 8);call write~init~int(0, ~#ttusb_dec_table~0.base, 75 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(0, ~#ttusb_dec_table~0.base, 77 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(0, ~#ttusb_dec_table~0.base, 79 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(0, ~#ttusb_dec_table~0.base, 81 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(0, ~#ttusb_dec_table~0.base, 83 + ~#ttusb_dec_table~0.offset, 2);call write~init~int(0, ~#ttusb_dec_table~0.base, 85 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 86 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 87 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 88 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 89 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 90 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 91 + ~#ttusb_dec_table~0.offset, 1);call write~init~int(0, ~#ttusb_dec_table~0.base, 92 + ~#ttusb_dec_table~0.offset, 8);~#ttusb_dec_driver~0.base, ~#ttusb_dec_driver~0.offset := 151, 0;call #Ultimate.allocInit(285, 151);call write~init~$Pointer$(145, 0, ~#ttusb_dec_driver~0.base, ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~ttusb_dec_probe.base, #funAddr~ttusb_dec_probe.offset, ~#ttusb_dec_driver~0.base, 8 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~ttusb_dec_disconnect.base, #funAddr~ttusb_dec_disconnect.offset, ~#ttusb_dec_driver~0.base, 16 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 24 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 32 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 40 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 48 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 56 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 64 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(~#ttusb_dec_table~0.base, ~#ttusb_dec_table~0.offset, ~#ttusb_dec_driver~0.base, 72 + ~#ttusb_dec_driver~0.offset, 8);call write~init~int(0, ~#ttusb_dec_driver~0.base, 80 + ~#ttusb_dec_driver~0.offset, 4);call write~init~int(0, ~#ttusb_dec_driver~0.base, 84 + ~#ttusb_dec_driver~0.offset, 4);call write~init~int(0, ~#ttusb_dec_driver~0.base, 88 + ~#ttusb_dec_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 92 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 100 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 108 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 116 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 124 + ~#ttusb_dec_driver~0.offset, 8);call write~init~int(0, ~#ttusb_dec_driver~0.base, 132 + ~#ttusb_dec_driver~0.offset, 4);call write~init~int(0, ~#ttusb_dec_driver~0.base, 136 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 148 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 156 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 164 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 172 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 180 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 188 + ~#ttusb_dec_driver~0.offset, 8);call write~init~int(0, ~#ttusb_dec_driver~0.base, 196 + ~#ttusb_dec_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 197 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 205 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 213 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 221 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 229 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 237 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 245 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 253 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 261 + ~#ttusb_dec_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ttusb_dec_driver~0.base, 269 + ~#ttusb_dec_driver~0.offset, 8);call write~init~int(0, ~#ttusb_dec_driver~0.base, 277 + ~#ttusb_dec_driver~0.offset, 4);call write~init~int(0, ~#ttusb_dec_driver~0.base, 281 + ~#ttusb_dec_driver~0.offset, 1);call write~init~int(0, ~#ttusb_dec_driver~0.base, 282 + ~#ttusb_dec_driver~0.offset, 1);call write~init~int(0, ~#ttusb_dec_driver~0.base, 283 + ~#ttusb_dec_driver~0.offset, 1);call write~init~int(0, ~#ttusb_dec_driver~0.base, 284 + ~#ttusb_dec_driver~0.offset, 1);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.bInterfaceNumber := 0;~__mod_usb_device_table~0.driver_info := 0;~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:54,262 INFO L290 TraceCheckUtils]: 1: Hoare triple {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret800#1.base, main_#t~ret800#1.offset, main_#t~ret801#1.base, main_#t~ret801#1.offset, main_#t~nondet802#1, main_#t~ret803#1.base, main_#t~ret803#1.offset, main_#t~ret804#1.base, main_#t~ret804#1.offset, main_#t~ret805#1.base, main_#t~ret805#1.offset, main_#t~memset~res806#1.base, main_#t~memset~res806#1.offset, main_#t~nondet807#1, main_#t~switch808#1, main_#t~nondet809#1, main_#t~switch810#1, main_#t~ret811#1, main_#t~nondet812#1, main_#t~switch813#1, main_#t~ret814#1, main_#t~nondet815#1, main_#t~switch816#1, main_#t~mem817#1, main_#t~ret818#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~37#1.base, main_~tmp~37#1.offset, main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset, main_~tmp___0~15#1.base, main_~tmp___0~15#1.offset, main_~ldvarg4~0#1, main_~tmp___1~10#1, main_~ldvarg3~0#1.base, main_~ldvarg3~0#1.offset, main_~tmp___2~7#1.base, main_~tmp___2~7#1.offset, main_~#ldvarg5~0#1.base, main_~#ldvarg5~0#1.offset, main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset, main_~tmp___3~3#1.base, main_~tmp___3~3#1.offset, main_~ldvarg6~0#1.base, main_~ldvarg6~0#1.offset, main_~tmp___4~2#1.base, main_~tmp___4~2#1.offset, main_~tmp___5~2#1, main_~tmp___6~1#1, main_~tmp___7~1#1, main_~tmp___8~0#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~37#1.base, main_~tmp~37#1.offset;havoc main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset;havoc main_~tmp___0~15#1.base, main_~tmp___0~15#1.offset;havoc main_~ldvarg4~0#1;havoc main_~tmp___1~10#1;havoc main_~ldvarg3~0#1.base, main_~ldvarg3~0#1.offset;havoc main_~tmp___2~7#1.base, main_~tmp___2~7#1.offset;call main_~#ldvarg5~0#1.base, main_~#ldvarg5~0#1.offset := #Ultimate.allocOnStack(1);havoc main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset;havoc main_~tmp___3~3#1.base, main_~tmp___3~3#1.offset;havoc main_~ldvarg6~0#1.base, main_~ldvarg6~0#1.offset;havoc main_~tmp___4~2#1.base, main_~tmp___4~2#1.offset;havoc main_~tmp___5~2#1;havoc main_~tmp___6~1#1;havoc main_~tmp___7~1#1;havoc main_~tmp___8~0#1; {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:54,262 INFO L272 TraceCheckUtils]: 2: Hoare triple {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} call main_#t~ret800#1.base, main_#t~ret800#1.offset := ldv_zalloc(32); {30352#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:54,263 INFO L290 TraceCheckUtils]: 3: Hoare triple {30352#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet76#1 && #t~nondet76#1 <= 2147483647;~tmp___0~1#1 := #t~nondet76#1;havoc #t~nondet76#1; {30321#true} is VALID [2022-02-20 21:51:54,263 INFO L290 TraceCheckUtils]: 4: Hoare triple {30321#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {30321#true} is VALID [2022-02-20 21:51:54,263 INFO L290 TraceCheckUtils]: 5: Hoare triple {30321#true} assume true; {30321#true} is VALID [2022-02-20 21:51:54,263 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {30321#true} {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2744#return; {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:54,264 INFO L290 TraceCheckUtils]: 7: Hoare triple {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} main_~tmp~37#1.base, main_~tmp~37#1.offset := main_#t~ret800#1.base, main_#t~ret800#1.offset;havoc main_#t~ret800#1.base, main_#t~ret800#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~37#1.base, main_~tmp~37#1.offset; {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:54,264 INFO L272 TraceCheckUtils]: 8: Hoare triple {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} call main_#t~ret801#1.base, main_#t~ret801#1.offset := ldv_zalloc(1); {30352#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:54,264 INFO L290 TraceCheckUtils]: 9: Hoare triple {30352#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet76#1 && #t~nondet76#1 <= 2147483647;~tmp___0~1#1 := #t~nondet76#1;havoc #t~nondet76#1; {30321#true} is VALID [2022-02-20 21:51:54,265 INFO L290 TraceCheckUtils]: 10: Hoare triple {30321#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {30321#true} is VALID [2022-02-20 21:51:54,265 INFO L290 TraceCheckUtils]: 11: Hoare triple {30321#true} assume true; {30321#true} is VALID [2022-02-20 21:51:54,265 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {30321#true} {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2746#return; {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:54,266 INFO L290 TraceCheckUtils]: 13: Hoare triple {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} main_~tmp___0~15#1.base, main_~tmp___0~15#1.offset := main_#t~ret801#1.base, main_#t~ret801#1.offset;havoc main_#t~ret801#1.base, main_#t~ret801#1.offset;main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset := main_~tmp___0~15#1.base, main_~tmp___0~15#1.offset;assume -2147483648 <= main_#t~nondet802#1 && main_#t~nondet802#1 <= 2147483647;main_~tmp___1~10#1 := main_#t~nondet802#1;havoc main_#t~nondet802#1;main_~ldvarg4~0#1 := main_~tmp___1~10#1; {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:54,266 INFO L272 TraceCheckUtils]: 14: Hoare triple {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} call main_#t~ret803#1.base, main_#t~ret803#1.offset := ldv_zalloc(1288); {30352#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:54,266 INFO L290 TraceCheckUtils]: 15: Hoare triple {30352#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet76#1 && #t~nondet76#1 <= 2147483647;~tmp___0~1#1 := #t~nondet76#1;havoc #t~nondet76#1; {30321#true} is VALID [2022-02-20 21:51:54,266 INFO L290 TraceCheckUtils]: 16: Hoare triple {30321#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {30321#true} is VALID [2022-02-20 21:51:54,266 INFO L290 TraceCheckUtils]: 17: Hoare triple {30321#true} assume true; {30321#true} is VALID [2022-02-20 21:51:54,267 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {30321#true} {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2748#return; {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:54,267 INFO L290 TraceCheckUtils]: 19: Hoare triple {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} main_~tmp___2~7#1.base, main_~tmp___2~7#1.offset := main_#t~ret803#1.base, main_#t~ret803#1.offset;havoc main_#t~ret803#1.base, main_#t~ret803#1.offset;main_~ldvarg3~0#1.base, main_~ldvarg3~0#1.offset := main_~tmp___2~7#1.base, main_~tmp___2~7#1.offset; {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:54,268 INFO L272 TraceCheckUtils]: 20: Hoare triple {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} call main_#t~ret804#1.base, main_#t~ret804#1.offset := ldv_zalloc(1); {30352#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:54,268 INFO L290 TraceCheckUtils]: 21: Hoare triple {30352#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet76#1 && #t~nondet76#1 <= 2147483647;~tmp___0~1#1 := #t~nondet76#1;havoc #t~nondet76#1; {30321#true} is VALID [2022-02-20 21:51:54,268 INFO L290 TraceCheckUtils]: 22: Hoare triple {30321#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {30321#true} is VALID [2022-02-20 21:51:54,268 INFO L290 TraceCheckUtils]: 23: Hoare triple {30321#true} assume true; {30321#true} is VALID [2022-02-20 21:51:54,269 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {30321#true} {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2750#return; {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:54,269 INFO L290 TraceCheckUtils]: 25: Hoare triple {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} main_~tmp___3~3#1.base, main_~tmp___3~3#1.offset := main_#t~ret804#1.base, main_#t~ret804#1.offset;havoc main_#t~ret804#1.base, main_#t~ret804#1.offset;main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset := main_~tmp___3~3#1.base, main_~tmp___3~3#1.offset; {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:54,270 INFO L272 TraceCheckUtils]: 26: Hoare triple {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} call main_#t~ret805#1.base, main_#t~ret805#1.offset := ldv_zalloc(4); {30352#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:54,270 INFO L290 TraceCheckUtils]: 27: Hoare triple {30352#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet76#1 && #t~nondet76#1 <= 2147483647;~tmp___0~1#1 := #t~nondet76#1;havoc #t~nondet76#1; {30321#true} is VALID [2022-02-20 21:51:54,270 INFO L290 TraceCheckUtils]: 28: Hoare triple {30321#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {30321#true} is VALID [2022-02-20 21:51:54,270 INFO L290 TraceCheckUtils]: 29: Hoare triple {30321#true} assume true; {30321#true} is VALID [2022-02-20 21:51:54,271 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {30321#true} {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2752#return; {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:54,271 INFO L290 TraceCheckUtils]: 31: Hoare triple {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} main_~tmp___4~2#1.base, main_~tmp___4~2#1.offset := main_#t~ret805#1.base, main_#t~ret805#1.offset;havoc main_#t~ret805#1.base, main_#t~ret805#1.offset;main_~ldvarg6~0#1.base, main_~ldvarg6~0#1.offset := main_~tmp___4~2#1.base, main_~tmp___4~2#1.offset;assume { :begin_inline_ldv_initialize } true; {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:54,271 INFO L290 TraceCheckUtils]: 32: Hoare triple {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume { :end_inline_ldv_initialize } true; {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:54,272 INFO L272 TraceCheckUtils]: 33: Hoare triple {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} call main_#t~memset~res806#1.base, main_#t~memset~res806#1.offset := #Ultimate.C_memset(main_~#ldvarg5~0#1.base, main_~#ldvarg5~0#1.offset, 0, 1); {30353#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 21:51:54,272 INFO L290 TraceCheckUtils]: 34: Hoare triple {30353#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr867 := 0; {30321#true} is VALID [2022-02-20 21:51:54,272 INFO L290 TraceCheckUtils]: 35: Hoare triple {30321#true} assume !(#t~loopctr867 % 18446744073709551616 < #amount % 18446744073709551616); {30321#true} is VALID [2022-02-20 21:51:54,273 INFO L290 TraceCheckUtils]: 36: Hoare triple {30321#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {30321#true} is VALID [2022-02-20 21:51:54,273 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {30321#true} {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2754#return; {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:54,274 INFO L290 TraceCheckUtils]: 38: Hoare triple {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} havoc main_#t~memset~res806#1.base, main_#t~memset~res806#1.offset;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_2~0 := 0; {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:54,274 INFO L290 TraceCheckUtils]: 39: Hoare triple {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume -2147483648 <= main_#t~nondet807#1 && main_#t~nondet807#1 <= 2147483647;main_~tmp___5~2#1 := main_#t~nondet807#1;havoc main_#t~nondet807#1;main_#t~switch808#1 := 0 == main_~tmp___5~2#1; {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:54,275 INFO L290 TraceCheckUtils]: 40: Hoare triple {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume !main_#t~switch808#1;main_#t~switch808#1 := main_#t~switch808#1 || 1 == main_~tmp___5~2#1; {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:54,275 INFO L290 TraceCheckUtils]: 41: Hoare triple {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume main_#t~switch808#1; {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:54,275 INFO L290 TraceCheckUtils]: 42: Hoare triple {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet812#1 && main_#t~nondet812#1 <= 2147483647;main_~tmp___7~1#1 := main_#t~nondet812#1;havoc main_#t~nondet812#1;main_#t~switch813#1 := 0 == main_~tmp___7~1#1; {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:54,276 INFO L290 TraceCheckUtils]: 43: Hoare triple {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume !main_#t~switch813#1;main_#t~switch813#1 := main_#t~switch813#1 || 1 == main_~tmp___7~1#1; {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:54,276 INFO L290 TraceCheckUtils]: 44: Hoare triple {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume main_#t~switch813#1; {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:54,277 INFO L290 TraceCheckUtils]: 45: Hoare triple {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_ttusb_dec_driver_init } true;havoc ttusb_dec_driver_init_#res#1;havoc ttusb_dec_driver_init_#t~ret798#1, ttusb_dec_driver_init_~tmp~35#1;havoc ttusb_dec_driver_init_~tmp~35#1;assume { :begin_inline_ldv_usb_register_driver_15 } true;ldv_usb_register_driver_15_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_15_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_15_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_15_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_15_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_15_#in~ldv_func_arg3#1.offset := ~#ttusb_dec_driver~0.base, ~#ttusb_dec_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 146, 0;havoc ldv_usb_register_driver_15_#res#1;havoc ldv_usb_register_driver_15_#t~ret827#1, ldv_usb_register_driver_15_~ldv_func_arg1#1.base, ldv_usb_register_driver_15_~ldv_func_arg1#1.offset, ldv_usb_register_driver_15_~ldv_func_arg2#1.base, ldv_usb_register_driver_15_~ldv_func_arg2#1.offset, ldv_usb_register_driver_15_~ldv_func_arg3#1.base, ldv_usb_register_driver_15_~ldv_func_arg3#1.offset, ldv_usb_register_driver_15_~ldv_func_res~0#1, ldv_usb_register_driver_15_~tmp~46#1;ldv_usb_register_driver_15_~ldv_func_arg1#1.base, ldv_usb_register_driver_15_~ldv_func_arg1#1.offset := ldv_usb_register_driver_15_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_15_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_15_~ldv_func_arg2#1.base, ldv_usb_register_driver_15_~ldv_func_arg2#1.offset := ldv_usb_register_driver_15_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_15_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_15_~ldv_func_arg3#1.base, ldv_usb_register_driver_15_~ldv_func_arg3#1.offset := ldv_usb_register_driver_15_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_15_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_15_~ldv_func_res~0#1;havoc ldv_usb_register_driver_15_~tmp~46#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_15_~ldv_func_arg1#1.base, ldv_usb_register_driver_15_~ldv_func_arg1#1.offset, ldv_usb_register_driver_15_~ldv_func_arg2#1.base, ldv_usb_register_driver_15_~ldv_func_arg2#1.offset, ldv_usb_register_driver_15_~ldv_func_arg3#1.base, ldv_usb_register_driver_15_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet856#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet856#1 && usb_register_driver_#t~nondet856#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet856#1;havoc usb_register_driver_#t~nondet856#1; {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:54,277 INFO L290 TraceCheckUtils]: 46: Hoare triple {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} ldv_usb_register_driver_15_#t~ret827#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_15_#t~ret827#1 && ldv_usb_register_driver_15_#t~ret827#1 <= 2147483647;ldv_usb_register_driver_15_~tmp~46#1 := ldv_usb_register_driver_15_#t~ret827#1;havoc ldv_usb_register_driver_15_#t~ret827#1;ldv_usb_register_driver_15_~ldv_func_res~0#1 := ldv_usb_register_driver_15_~tmp~46#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret799#1.base, ldv_usb_driver_1_#t~ret799#1.offset, ldv_usb_driver_1_~tmp~36#1.base, ldv_usb_driver_1_~tmp~36#1.offset;havoc ldv_usb_driver_1_~tmp~36#1.base, ldv_usb_driver_1_~tmp~36#1.offset; {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:54,278 INFO L272 TraceCheckUtils]: 47: Hoare triple {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} call ldv_usb_driver_1_#t~ret799#1.base, ldv_usb_driver_1_#t~ret799#1.offset := ldv_zalloc(1520); {30352#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:54,278 INFO L290 TraceCheckUtils]: 48: Hoare triple {30352#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet76#1 && #t~nondet76#1 <= 2147483647;~tmp___0~1#1 := #t~nondet76#1;havoc #t~nondet76#1; {30321#true} is VALID [2022-02-20 21:51:54,278 INFO L290 TraceCheckUtils]: 49: Hoare triple {30321#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {30321#true} is VALID [2022-02-20 21:51:54,278 INFO L290 TraceCheckUtils]: 50: Hoare triple {30321#true} assume true; {30321#true} is VALID [2022-02-20 21:51:54,279 INFO L284 TraceCheckUtils]: 51: Hoare quadruple {30321#true} {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #2762#return; {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:54,281 INFO L290 TraceCheckUtils]: 52: Hoare triple {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} ldv_usb_driver_1_~tmp~36#1.base, ldv_usb_driver_1_~tmp~36#1.offset := ldv_usb_driver_1_#t~ret799#1.base, ldv_usb_driver_1_#t~ret799#1.offset;havoc ldv_usb_driver_1_#t~ret799#1.base, ldv_usb_driver_1_#t~ret799#1.offset;~ttusb_dec_driver_group1~0.base, ~ttusb_dec_driver_group1~0.offset := ldv_usb_driver_1_~tmp~36#1.base, ldv_usb_driver_1_~tmp~36#1.offset; {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:54,283 INFO L290 TraceCheckUtils]: 53: Hoare triple {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_15_#res#1 := ldv_usb_register_driver_15_~ldv_func_res~0#1; {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:54,287 INFO L290 TraceCheckUtils]: 54: Hoare triple {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} ttusb_dec_driver_init_#t~ret798#1 := ldv_usb_register_driver_15_#res#1;assume { :end_inline_ldv_usb_register_driver_15 } true;assume -2147483648 <= ttusb_dec_driver_init_#t~ret798#1 && ttusb_dec_driver_init_#t~ret798#1 <= 2147483647;ttusb_dec_driver_init_~tmp~35#1 := ttusb_dec_driver_init_#t~ret798#1;havoc ttusb_dec_driver_init_#t~ret798#1;ttusb_dec_driver_init_#res#1 := ttusb_dec_driver_init_~tmp~35#1; {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:54,289 INFO L290 TraceCheckUtils]: 55: Hoare triple {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} main_#t~ret814#1 := ttusb_dec_driver_init_#res#1;assume { :end_inline_ttusb_dec_driver_init } true;assume -2147483648 <= main_#t~ret814#1 && main_#t~ret814#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret814#1;havoc main_#t~ret814#1; {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:54,289 INFO L290 TraceCheckUtils]: 56: Hoare triple {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume !(0 == ~ldv_retval_1~0); {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:54,289 INFO L290 TraceCheckUtils]: 57: Hoare triple {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume 0 != ~ldv_retval_1~0;~ldv_state_variable_0~0 := 2; {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:54,290 INFO L290 TraceCheckUtils]: 58: Hoare triple {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume { :begin_inline_ldv_check_final_state } true; {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:54,292 INFO L290 TraceCheckUtils]: 59: Hoare triple {30323#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume !(0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616); {30322#false} is VALID [2022-02-20 21:51:54,292 INFO L272 TraceCheckUtils]: 60: Hoare triple {30322#false} call ldv_error(); {30322#false} is VALID [2022-02-20 21:51:54,292 INFO L290 TraceCheckUtils]: 61: Hoare triple {30322#false} assume !false; {30322#false} is VALID [2022-02-20 21:51:54,292 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2022-02-20 21:51:54,293 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:51:54,294 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [998602659] [2022-02-20 21:51:54,294 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [998602659] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:51:54,295 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:51:54,295 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-02-20 21:51:54,295 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [397640060] [2022-02-20 21:51:54,295 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:51:54,295 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 6.4) internal successors, (32), 3 states have internal predecessors, (32), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) Word has length 62 [2022-02-20 21:51:54,296 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:51:54,296 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 6.4) internal successors, (32), 3 states have internal predecessors, (32), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2022-02-20 21:51:54,344 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 47 edges. 47 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:51:54,345 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-02-20 21:51:54,345 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:51:54,345 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-02-20 21:51:54,347 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-02-20 21:51:54,347 INFO L87 Difference]: Start difference. First operand 2986 states and 4095 transitions. Second operand has 5 states, 5 states have (on average 6.4) internal successors, (32), 3 states have internal predecessors, (32), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7)