./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/ldv-linux-3.12-rc1/linux-3.12-rc1.tar.xz-144_2a-drivers--net--usb--cdc_mbim.ko-entry_point.cil.out.i --full-output -ea --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 03d7b7b3 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -ea -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/ldv-linux-3.12-rc1/linux-3.12-rc1.tar.xz-144_2a-drivers--net--usb--cdc_mbim.ko-entry_point.cil.out.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash a9a20f3f691c8614da828fa262b8d39a0b290d1ce7d7bab1e11653a91cb5fcdd --- Real Ultimate output --- This is Ultimate 0.2.2-dev-03d7b7b [2022-02-20 21:51:24,824 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-02-20 21:51:24,825 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-02-20 21:51:24,849 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-02-20 21:51:24,850 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-02-20 21:51:24,850 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-02-20 21:51:24,851 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-02-20 21:51:24,852 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-02-20 21:51:24,853 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-02-20 21:51:24,854 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-02-20 21:51:24,855 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-02-20 21:51:24,855 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-02-20 21:51:24,856 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-02-20 21:51:24,856 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-02-20 21:51:24,857 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-02-20 21:51:24,858 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-02-20 21:51:24,858 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-02-20 21:51:24,859 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-02-20 21:51:24,860 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-02-20 21:51:24,861 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-02-20 21:51:24,862 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-02-20 21:51:24,863 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-02-20 21:51:24,864 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-02-20 21:51:24,865 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-02-20 21:51:24,866 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-02-20 21:51:24,867 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-02-20 21:51:24,867 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-02-20 21:51:24,868 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-02-20 21:51:24,868 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-02-20 21:51:24,869 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-02-20 21:51:24,869 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-02-20 21:51:24,869 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-02-20 21:51:24,870 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-02-20 21:51:24,871 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-02-20 21:51:24,871 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-02-20 21:51:24,871 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-02-20 21:51:24,872 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-02-20 21:51:24,872 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-02-20 21:51:24,872 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-02-20 21:51:24,873 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-02-20 21:51:24,873 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-02-20 21:51:24,874 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2022-02-20 21:51:24,889 INFO L113 SettingsManager]: Loading preferences was successful [2022-02-20 21:51:24,889 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-02-20 21:51:24,889 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-02-20 21:51:24,890 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-02-20 21:51:24,890 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-02-20 21:51:24,890 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-02-20 21:51:24,891 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-02-20 21:51:24,891 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-02-20 21:51:24,891 INFO L138 SettingsManager]: * Use SBE=true [2022-02-20 21:51:24,891 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-02-20 21:51:24,892 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-02-20 21:51:24,892 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-02-20 21:51:24,892 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-02-20 21:51:24,892 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-02-20 21:51:24,892 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-02-20 21:51:24,893 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-02-20 21:51:24,893 INFO L138 SettingsManager]: * Use constant arrays=true [2022-02-20 21:51:24,893 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-02-20 21:51:24,893 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-02-20 21:51:24,893 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-02-20 21:51:24,893 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-02-20 21:51:24,894 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-02-20 21:51:24,894 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-02-20 21:51:24,894 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-02-20 21:51:24,894 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-02-20 21:51:24,894 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-02-20 21:51:24,894 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-02-20 21:51:24,895 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2022-02-20 21:51:24,895 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2022-02-20 21:51:24,895 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-02-20 21:51:24,895 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> a9a20f3f691c8614da828fa262b8d39a0b290d1ce7d7bab1e11653a91cb5fcdd [2022-02-20 21:51:25,093 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-02-20 21:51:25,116 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-02-20 21:51:25,118 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-02-20 21:51:25,119 INFO L271 PluginConnector]: Initializing CDTParser... [2022-02-20 21:51:25,119 INFO L275 PluginConnector]: CDTParser initialized [2022-02-20 21:51:25,120 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/ldv-linux-3.12-rc1/linux-3.12-rc1.tar.xz-144_2a-drivers--net--usb--cdc_mbim.ko-entry_point.cil.out.i [2022-02-20 21:51:25,167 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/67ef59d60/93bf43769eb643cdbd96f845bac962fb/FLAG2d2e48f3b [2022-02-20 21:51:25,730 INFO L306 CDTParser]: Found 1 translation units. [2022-02-20 21:51:25,731 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.12-rc1/linux-3.12-rc1.tar.xz-144_2a-drivers--net--usb--cdc_mbim.ko-entry_point.cil.out.i [2022-02-20 21:51:25,760 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/67ef59d60/93bf43769eb643cdbd96f845bac962fb/FLAG2d2e48f3b [2022-02-20 21:51:26,142 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/67ef59d60/93bf43769eb643cdbd96f845bac962fb [2022-02-20 21:51:26,144 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-02-20 21:51:26,145 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-02-20 21:51:26,151 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-02-20 21:51:26,151 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-02-20 21:51:26,154 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-02-20 21:51:26,155 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.02 09:51:26" (1/1) ... [2022-02-20 21:51:26,156 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2fb77c79 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:51:26, skipping insertion in model container [2022-02-20 21:51:26,156 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.02 09:51:26" (1/1) ... [2022-02-20 21:51:26,161 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-02-20 21:51:26,235 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-02-20 21:51:26,698 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.12-rc1/linux-3.12-rc1.tar.xz-144_2a-drivers--net--usb--cdc_mbim.ko-entry_point.cil.out.i[161908,161921] [2022-02-20 21:51:26,903 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-20 21:51:26,929 INFO L203 MainTranslator]: Completed pre-run [2022-02-20 21:51:27,017 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.12-rc1/linux-3.12-rc1.tar.xz-144_2a-drivers--net--usb--cdc_mbim.ko-entry_point.cil.out.i[161908,161921] [2022-02-20 21:51:27,119 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-20 21:51:27,147 INFO L208 MainTranslator]: Completed translation [2022-02-20 21:51:27,147 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:51:27 WrapperNode [2022-02-20 21:51:27,148 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-02-20 21:51:27,149 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-02-20 21:51:27,150 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-02-20 21:51:27,150 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-02-20 21:51:27,154 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:51:27" (1/1) ... [2022-02-20 21:51:27,199 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:51:27" (1/1) ... [2022-02-20 21:51:27,257 INFO L137 Inliner]: procedures = 139, calls = 575, calls flagged for inlining = 59, calls inlined = 59, statements flattened = 1725 [2022-02-20 21:51:27,258 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-02-20 21:51:27,258 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-02-20 21:51:27,258 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-02-20 21:51:27,259 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-02-20 21:51:27,264 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:51:27" (1/1) ... [2022-02-20 21:51:27,265 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:51:27" (1/1) ... [2022-02-20 21:51:27,284 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:51:27" (1/1) ... [2022-02-20 21:51:27,285 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:51:27" (1/1) ... [2022-02-20 21:51:27,356 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:51:27" (1/1) ... [2022-02-20 21:51:27,365 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:51:27" (1/1) ... [2022-02-20 21:51:27,381 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:51:27" (1/1) ... [2022-02-20 21:51:27,396 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-02-20 21:51:27,407 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-02-20 21:51:27,408 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-02-20 21:51:27,408 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-02-20 21:51:27,409 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:51:27" (1/1) ... [2022-02-20 21:51:27,419 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-02-20 21:51:27,426 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-20 21:51:27,440 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-02-20 21:51:27,443 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-02-20 21:51:27,464 INFO L130 BoogieDeclarations]: Found specification of procedure usbnet_resume [2022-02-20 21:51:27,464 INFO L138 BoogieDeclarations]: Found implementation of procedure usbnet_resume [2022-02-20 21:51:27,465 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2022-02-20 21:51:27,465 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2022-02-20 21:51:27,465 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2022-02-20 21:51:27,465 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_stop [2022-02-20 21:51:27,465 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_stop [2022-02-20 21:51:27,465 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-02-20 21:51:27,465 INFO L130 BoogieDeclarations]: Found specification of procedure skb_headroom [2022-02-20 21:51:27,465 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_headroom [2022-02-20 21:51:27,466 INFO L130 BoogieDeclarations]: Found specification of procedure usbnet_disconnect [2022-02-20 21:51:27,466 INFO L138 BoogieDeclarations]: Found implementation of procedure usbnet_disconnect [2022-02-20 21:51:27,466 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2022-02-20 21:51:27,466 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2022-02-20 21:51:27,466 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2022-02-20 21:51:27,466 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2022-02-20 21:51:27,466 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~~pm_message_t~0~TO~int [2022-02-20 21:51:27,466 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~~pm_message_t~0~TO~int [2022-02-20 21:51:27,466 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-02-20 21:51:27,467 INFO L130 BoogieDeclarations]: Found specification of procedure cdc_mbim_suspend [2022-02-20 21:51:27,467 INFO L138 BoogieDeclarations]: Found implementation of procedure cdc_mbim_suspend [2022-02-20 21:51:27,467 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_error [2022-02-20 21:51:27,467 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_error [2022-02-20 21:51:27,467 INFO L130 BoogieDeclarations]: Found specification of procedure cdc_mbim_resume [2022-02-20 21:51:27,467 INFO L138 BoogieDeclarations]: Found implementation of procedure cdc_mbim_resume [2022-02-20 21:51:27,467 INFO L130 BoogieDeclarations]: Found specification of procedure ldv__builtin_expect [2022-02-20 21:51:27,467 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv__builtin_expect [2022-02-20 21:51:27,467 INFO L130 BoogieDeclarations]: Found specification of procedure atomic_read [2022-02-20 21:51:27,468 INFO L138 BoogieDeclarations]: Found implementation of procedure atomic_read [2022-02-20 21:51:27,468 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2022-02-20 21:51:27,468 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2022-02-20 21:51:27,468 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2022-02-20 21:51:27,468 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2022-02-20 21:51:27,468 INFO L130 BoogieDeclarations]: Found specification of procedure cdc_mbim_tx_fixup [2022-02-20 21:51:27,468 INFO L138 BoogieDeclarations]: Found implementation of procedure cdc_mbim_tx_fixup [2022-02-20 21:51:27,468 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-02-20 21:51:27,468 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_stop___0 [2022-02-20 21:51:27,469 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_stop___0 [2022-02-20 21:51:27,469 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_get_intfdata_4 [2022-02-20 21:51:27,469 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_get_intfdata_4 [2022-02-20 21:51:27,469 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-02-20 21:51:27,469 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_undef_int [2022-02-20 21:51:27,469 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_undef_int [2022-02-20 21:51:27,469 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-02-20 21:51:27,469 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-02-20 21:51:27,469 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2022-02-20 21:51:27,470 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2022-02-20 21:51:27,470 INFO L130 BoogieDeclarations]: Found specification of procedure cdc_mbim_bind [2022-02-20 21:51:27,470 INFO L138 BoogieDeclarations]: Found implementation of procedure cdc_mbim_bind [2022-02-20 21:51:27,470 INFO L130 BoogieDeclarations]: Found specification of procedure cdc_mbim_manage_power [2022-02-20 21:51:27,470 INFO L138 BoogieDeclarations]: Found implementation of procedure cdc_mbim_manage_power [2022-02-20 21:51:27,470 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~int [2022-02-20 21:51:27,470 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~int [2022-02-20 21:51:27,471 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-02-20 21:51:27,471 INFO L130 BoogieDeclarations]: Found specification of procedure __xadd_wrong_size [2022-02-20 21:51:27,471 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-02-20 21:51:27,471 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2022-02-20 21:51:27,472 INFO L130 BoogieDeclarations]: Found specification of procedure skb_put [2022-02-20 21:51:27,472 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_put [2022-02-20 21:51:27,473 INFO L130 BoogieDeclarations]: Found specification of procedure cdc_mbim_rx_fixup [2022-02-20 21:51:27,473 INFO L138 BoogieDeclarations]: Found implementation of procedure cdc_mbim_rx_fixup [2022-02-20 21:51:27,473 INFO L130 BoogieDeclarations]: Found specification of procedure __fswab16 [2022-02-20 21:51:27,473 INFO L138 BoogieDeclarations]: Found implementation of procedure __fswab16 [2022-02-20 21:51:27,473 INFO L130 BoogieDeclarations]: Found specification of procedure cdc_ncm_unbind [2022-02-20 21:51:27,474 INFO L138 BoogieDeclarations]: Found implementation of procedure cdc_ncm_unbind [2022-02-20 21:51:27,474 INFO L130 BoogieDeclarations]: Found specification of procedure cdc_mbim_unbind [2022-02-20 21:51:27,474 INFO L138 BoogieDeclarations]: Found implementation of procedure cdc_mbim_unbind [2022-02-20 21:51:27,474 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-02-20 21:51:27,474 INFO L130 BoogieDeclarations]: Found specification of procedure skb_reset_mac_header [2022-02-20 21:51:27,474 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_reset_mac_header [2022-02-20 21:51:27,474 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~int [2022-02-20 21:51:27,475 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2022-02-20 21:51:27,475 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2022-02-20 21:51:27,475 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-02-20 21:51:27,475 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-02-20 21:51:27,475 INFO L130 BoogieDeclarations]: Found specification of procedure eth_hdr [2022-02-20 21:51:27,475 INFO L138 BoogieDeclarations]: Found implementation of procedure eth_hdr [2022-02-20 21:51:27,475 INFO L130 BoogieDeclarations]: Found specification of procedure IS_ERR [2022-02-20 21:51:27,476 INFO L138 BoogieDeclarations]: Found implementation of procedure IS_ERR [2022-02-20 21:51:27,875 INFO L234 CfgBuilder]: Building ICFG [2022-02-20 21:51:27,877 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-02-20 21:51:28,698 INFO L766 $ProcedureCfgBuilder]: dead code at ProgramPoint ldv_stopFINAL: assume true; [2022-02-20 21:51:28,978 INFO L766 $ProcedureCfgBuilder]: dead code at ProgramPoint ldv_stop___0FINAL: assume true; [2022-02-20 21:51:29,232 INFO L275 CfgBuilder]: Performing block encoding [2022-02-20 21:51:29,244 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-02-20 21:51:29,244 INFO L299 CfgBuilder]: Removed 0 assume(true) statements. [2022-02-20 21:51:29,246 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 09:51:29 BoogieIcfgContainer [2022-02-20 21:51:29,246 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-02-20 21:51:29,247 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-02-20 21:51:29,247 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-02-20 21:51:29,253 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-02-20 21:51:29,253 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 20.02 09:51:26" (1/3) ... [2022-02-20 21:51:29,254 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@57b527a3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.02 09:51:29, skipping insertion in model container [2022-02-20 21:51:29,254 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:51:27" (2/3) ... [2022-02-20 21:51:29,254 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@57b527a3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.02 09:51:29, skipping insertion in model container [2022-02-20 21:51:29,254 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 09:51:29" (3/3) ... [2022-02-20 21:51:29,256 INFO L111 eAbstractionObserver]: Analyzing ICFG linux-3.12-rc1.tar.xz-144_2a-drivers--net--usb--cdc_mbim.ko-entry_point.cil.out.i [2022-02-20 21:51:29,259 INFO L205 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-02-20 21:51:29,259 INFO L164 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-02-20 21:51:29,293 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-02-20 21:51:29,297 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2022-02-20 21:51:29,297 INFO L340 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-02-20 21:51:29,318 INFO L276 IsEmpty]: Start isEmpty. Operand has 523 states, 398 states have (on average 1.407035175879397) internal successors, (560), 412 states have internal predecessors, (560), 94 states have call successors, (94), 31 states have call predecessors, (94), 29 states have return successors, (88), 88 states have call predecessors, (88), 88 states have call successors, (88) [2022-02-20 21:51:29,324 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2022-02-20 21:51:29,324 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:51:29,325 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:51:29,325 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:51:29,328 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:51:29,329 INFO L85 PathProgramCache]: Analyzing trace with hash 1589467643, now seen corresponding path program 1 times [2022-02-20 21:51:29,335 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:51:29,335 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [669183852] [2022-02-20 21:51:29,335 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:51:29,336 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:51:29,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:29,675 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 21:51:29,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:29,689 INFO L290 TraceCheckUtils]: 0: Hoare triple {545#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet28#1 && #t~nondet28#1 <= 2147483647;~tmp___0~1#1 := #t~nondet28#1;havoc #t~nondet28#1; {526#true} is VALID [2022-02-20 21:51:29,689 INFO L290 TraceCheckUtils]: 1: Hoare triple {526#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {526#true} is VALID [2022-02-20 21:51:29,689 INFO L290 TraceCheckUtils]: 2: Hoare triple {526#true} assume true; {526#true} is VALID [2022-02-20 21:51:29,690 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {526#true} {526#true} #1414#return; {526#true} is VALID [2022-02-20 21:51:29,695 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 9 [2022-02-20 21:51:29,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:29,704 INFO L290 TraceCheckUtils]: 0: Hoare triple {546#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {526#true} is VALID [2022-02-20 21:51:29,704 INFO L290 TraceCheckUtils]: 1: Hoare triple {526#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {526#true} is VALID [2022-02-20 21:51:29,705 INFO L290 TraceCheckUtils]: 2: Hoare triple {526#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {526#true} is VALID [2022-02-20 21:51:29,705 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {526#true} {526#true} #1416#return; {526#true} is VALID [2022-02-20 21:51:29,705 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 15 [2022-02-20 21:51:29,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:29,712 INFO L290 TraceCheckUtils]: 0: Hoare triple {546#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {526#true} is VALID [2022-02-20 21:51:29,713 INFO L290 TraceCheckUtils]: 1: Hoare triple {526#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {526#true} is VALID [2022-02-20 21:51:29,713 INFO L290 TraceCheckUtils]: 2: Hoare triple {526#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {526#true} is VALID [2022-02-20 21:51:29,713 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {526#true} {526#true} #1418#return; {526#true} is VALID [2022-02-20 21:51:29,713 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 21 [2022-02-20 21:51:29,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:29,720 INFO L290 TraceCheckUtils]: 0: Hoare triple {546#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {526#true} is VALID [2022-02-20 21:51:29,720 INFO L290 TraceCheckUtils]: 1: Hoare triple {526#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {526#true} is VALID [2022-02-20 21:51:29,721 INFO L290 TraceCheckUtils]: 2: Hoare triple {526#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {526#true} is VALID [2022-02-20 21:51:29,721 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {526#true} {526#true} #1420#return; {526#true} is VALID [2022-02-20 21:51:29,722 INFO L290 TraceCheckUtils]: 0: Hoare triple {526#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(82, 2);call #Ultimate.allocInit(9, 3);call #Ultimate.allocInit(22, 4);call #Ultimate.allocInit(219, 5);call #Ultimate.allocInit(24, 6);call #Ultimate.allocInit(24, 7);call #Ultimate.allocInit(22, 8);call #Ultimate.allocInit(24, 9);call #Ultimate.allocInit(9, 10);call #Ultimate.allocInit(18, 11);call #Ultimate.allocInit(219, 12);call #Ultimate.allocInit(36, 13);call #Ultimate.allocInit(36, 14);call #Ultimate.allocInit(9, 15);call #Ultimate.allocInit(18, 16);call #Ultimate.allocInit(219, 17);call #Ultimate.allocInit(67, 18);call #Ultimate.allocInit(67, 19);call #Ultimate.allocInit(9, 20);call #Ultimate.allocInit(9, 21);call #Ultimate.allocInit(9, 22);call #Ultimate.allocInit(9, 23);~LDV_IN_INTERRUPT~0 := 1;~cdc_mbim_info_zlp_group1~0.base, ~cdc_mbim_info_zlp_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0;~cdc_mbim_info_group0~0.base, ~cdc_mbim_info_group0~0.offset := 0, 0;~ref_cnt~0 := 0;~cdc_mbim_info_zlp_group2~0.base, ~cdc_mbim_info_zlp_group2~0.offset := 0, 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~cdc_mbim_info_group1~0.base, ~cdc_mbim_info_group1~0.offset := 0, 0;~cdc_mbim_info_zlp_group0~0.base, ~cdc_mbim_info_zlp_group0~0.offset := 0, 0;~cdc_mbim_info_group2~0.base, ~cdc_mbim_info_group2~0.offset := 0, 0;~cdc_mbim_driver_group1~0.base, ~cdc_mbim_driver_group1~0.offset := 0, 0;~#cdc_mbim_info~0.base, ~#cdc_mbim_info~0.offset := 24, 0;call #Ultimate.allocInit(124, 24);call write~init~$Pointer$(20, 0, ~#cdc_mbim_info~0.base, ~#cdc_mbim_info~0.offset, 8);call write~init~int(9232, ~#cdc_mbim_info~0.base, 8 + ~#cdc_mbim_info~0.offset, 4);call write~init~$Pointer$(#funAddr~cdc_mbim_bind.base, #funAddr~cdc_mbim_bind.offset, ~#cdc_mbim_info~0.base, 12 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_unbind.base, #funAddr~cdc_mbim_unbind.offset, ~#cdc_mbim_info~0.base, 20 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 28 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 36 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 44 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_manage_power.base, #funAddr~cdc_mbim_manage_power.offset, ~#cdc_mbim_info~0.base, 52 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 60 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 68 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_rx_fixup.base, #funAddr~cdc_mbim_rx_fixup.offset, ~#cdc_mbim_info~0.base, 76 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_tx_fixup.base, #funAddr~cdc_mbim_tx_fixup.offset, ~#cdc_mbim_info~0.base, 84 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 92 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 100 + ~#cdc_mbim_info~0.offset, 8);call write~init~int(0, ~#cdc_mbim_info~0.base, 108 + ~#cdc_mbim_info~0.offset, 4);call write~init~int(0, ~#cdc_mbim_info~0.base, 112 + ~#cdc_mbim_info~0.offset, 4);call write~init~int(0, ~#cdc_mbim_info~0.base, 116 + ~#cdc_mbim_info~0.offset, 8);~#cdc_mbim_info_zlp~0.base, ~#cdc_mbim_info_zlp~0.offset := 25, 0;call #Ultimate.allocInit(124, 25);call write~init~$Pointer$(21, 0, ~#cdc_mbim_info_zlp~0.base, ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~int(9744, ~#cdc_mbim_info_zlp~0.base, 8 + ~#cdc_mbim_info_zlp~0.offset, 4);call write~init~$Pointer$(#funAddr~cdc_mbim_bind.base, #funAddr~cdc_mbim_bind.offset, ~#cdc_mbim_info_zlp~0.base, 12 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_unbind.base, #funAddr~cdc_mbim_unbind.offset, ~#cdc_mbim_info_zlp~0.base, 20 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 28 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 36 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 44 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_manage_power.base, #funAddr~cdc_mbim_manage_power.offset, ~#cdc_mbim_info_zlp~0.base, 52 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 60 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 68 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_rx_fixup.base, #funAddr~cdc_mbim_rx_fixup.offset, ~#cdc_mbim_info_zlp~0.base, 76 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_tx_fixup.base, #funAddr~cdc_mbim_tx_fixup.offset, ~#cdc_mbim_info_zlp~0.base, 84 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 92 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 100 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~int(0, ~#cdc_mbim_info_zlp~0.base, 108 + ~#cdc_mbim_info_zlp~0.offset, 4);call write~init~int(0, ~#cdc_mbim_info_zlp~0.base, 112 + ~#cdc_mbim_info_zlp~0.offset, 4);call write~init~int(0, ~#cdc_mbim_info_zlp~0.base, 116 + ~#cdc_mbim_info_zlp~0.offset, 8);~#mbim_devs~0.base, ~#mbim_devs~0.offset := 26, 0;call #Ultimate.allocInit(125, 26);call write~init~int(896, ~#mbim_devs~0.base, ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 2 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 4 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 6 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 8 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 10 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 11 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 12 + ~#mbim_devs~0.offset, 1);call write~init~int(2, ~#mbim_devs~0.base, 13 + ~#mbim_devs~0.offset, 1);call write~init~int(13, ~#mbim_devs~0.base, 14 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 15 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 16 + ~#mbim_devs~0.offset, 1);call write~init~int(~#cdc_mbim_info~0.base + ~#cdc_mbim_info~0.offset, ~#mbim_devs~0.base, 17 + ~#mbim_devs~0.offset, 8);call write~init~int(899, ~#mbim_devs~0.base, 25 + ~#mbim_devs~0.offset, 2);call write~init~int(4505, ~#mbim_devs~0.base, 27 + ~#mbim_devs~0.offset, 2);call write~init~int(26786, ~#mbim_devs~0.base, 29 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 31 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 33 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 35 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 36 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 37 + ~#mbim_devs~0.offset, 1);call write~init~int(2, ~#mbim_devs~0.base, 38 + ~#mbim_devs~0.offset, 1);call write~init~int(14, ~#mbim_devs~0.base, 39 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 40 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 41 + ~#mbim_devs~0.offset, 1);call write~init~int(~#cdc_mbim_info_zlp~0.base + ~#cdc_mbim_info_zlp~0.offset, ~#mbim_devs~0.base, 42 + ~#mbim_devs~0.offset, 8);call write~init~int(899, ~#mbim_devs~0.base, 50 + ~#mbim_devs~0.offset, 2);call write~init~int(1008, ~#mbim_devs~0.base, 52 + ~#mbim_devs~0.offset, 2);call write~init~int(19229, ~#mbim_devs~0.base, 54 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 56 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 58 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 60 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 61 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 62 + ~#mbim_devs~0.offset, 1);call write~init~int(2, ~#mbim_devs~0.base, 63 + ~#mbim_devs~0.offset, 1);call write~init~int(14, ~#mbim_devs~0.base, 64 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 65 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 66 + ~#mbim_devs~0.offset, 1);call write~init~int(~#cdc_mbim_info_zlp~0.base + ~#cdc_mbim_info_zlp~0.offset, ~#mbim_devs~0.base, 67 + ~#mbim_devs~0.offset, 8);call write~init~int(896, ~#mbim_devs~0.base, 75 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 77 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 79 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 81 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 83 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 85 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 86 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 87 + ~#mbim_devs~0.offset, 1);call write~init~int(2, ~#mbim_devs~0.base, 88 + ~#mbim_devs~0.offset, 1);call write~init~int(14, ~#mbim_devs~0.base, 89 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 90 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 91 + ~#mbim_devs~0.offset, 1);call write~init~int(~#cdc_mbim_info~0.base + ~#cdc_mbim_info~0.offset, ~#mbim_devs~0.base, 92 + ~#mbim_devs~0.offset, 8);call write~init~int(0, ~#mbim_devs~0.base, 100 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 102 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 104 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 106 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 108 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 110 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 111 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 112 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 113 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 114 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 115 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 116 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 117 + ~#mbim_devs~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.bInterfaceNumber := 0;~__mod_usb_device_table~0.driver_info := 0;~#cdc_mbim_driver~0.base, ~#cdc_mbim_driver~0.offset := 27, 0;call #Ultimate.allocInit(285, 27);call write~init~$Pointer$(22, 0, ~#cdc_mbim_driver~0.base, ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usbnet_probe.base, #funAddr~usbnet_probe.offset, ~#cdc_mbim_driver~0.base, 8 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usbnet_disconnect.base, #funAddr~usbnet_disconnect.offset, ~#cdc_mbim_driver~0.base, 16 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 24 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_suspend.base, #funAddr~cdc_mbim_suspend.offset, ~#cdc_mbim_driver~0.base, 32 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_resume.base, #funAddr~cdc_mbim_resume.offset, ~#cdc_mbim_driver~0.base, 40 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_resume.base, #funAddr~cdc_mbim_resume.offset, ~#cdc_mbim_driver~0.base, 48 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 56 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 64 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(~#mbim_devs~0.base, ~#mbim_devs~0.offset, ~#cdc_mbim_driver~0.base, 72 + ~#cdc_mbim_driver~0.offset, 8);call write~init~int(0, ~#cdc_mbim_driver~0.base, 80 + ~#cdc_mbim_driver~0.offset, 4);call write~init~int(0, ~#cdc_mbim_driver~0.base, 84 + ~#cdc_mbim_driver~0.offset, 4);call write~init~int(0, ~#cdc_mbim_driver~0.base, 88 + ~#cdc_mbim_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 92 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 100 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 108 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 116 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 124 + ~#cdc_mbim_driver~0.offset, 8);call write~init~int(0, ~#cdc_mbim_driver~0.base, 132 + ~#cdc_mbim_driver~0.offset, 4);call write~init~int(0, ~#cdc_mbim_driver~0.base, 136 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 148 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 156 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 164 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 172 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 180 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 188 + ~#cdc_mbim_driver~0.offset, 8);call write~init~int(0, ~#cdc_mbim_driver~0.base, 196 + ~#cdc_mbim_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 197 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 205 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 213 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 221 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 229 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 237 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 245 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 253 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 261 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 269 + ~#cdc_mbim_driver~0.offset, 8);call write~init~int(0, ~#cdc_mbim_driver~0.base, 277 + ~#cdc_mbim_driver~0.offset, 4);call write~init~int(0, ~#cdc_mbim_driver~0.base, 281 + ~#cdc_mbim_driver~0.offset, 1);call write~init~int(1, ~#cdc_mbim_driver~0.base, 282 + ~#cdc_mbim_driver~0.offset, 1);call write~init~int(1, ~#cdc_mbim_driver~0.base, 283 + ~#cdc_mbim_driver~0.offset, 1);call write~init~int(0, ~#cdc_mbim_driver~0.base, 284 + ~#cdc_mbim_driver~0.offset, 1);~ldv_retval_2~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_5~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_6~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {526#true} is VALID [2022-02-20 21:51:29,723 INFO L290 TraceCheckUtils]: 1: Hoare triple {526#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret287#1.base, main_#t~ret287#1.offset, main_#t~nondet288#1, main_#t~nondet289#1, main_#t~memset~res290#1.base, main_#t~memset~res290#1.offset, main_#t~memset~res291#1.base, main_#t~memset~res291#1.offset, main_#t~memset~res292#1.base, main_#t~memset~res292#1.offset, main_#t~nondet293#1, main_#t~switch294#1, main_#t~nondet295#1, main_#t~switch296#1, main_#t~ret297#1, main_#t~ret298#1, main_#t~mem299#1, main_#t~ret300#1, main_#t~ret301#1, main_#t~nondet302#1, main_#t~switch303#1, main_#t~ret304#1, main_#t~nondet305#1, main_#t~switch306#1, main_#t~ret307#1, main_#t~ret308#1, main_#t~ret309#1, main_#t~mem310#1, main_#t~ret311#1.base, main_#t~ret311#1.offset, main_#t~mem312#1, main_#t~ret313#1.base, main_#t~ret313#1.offset, main_#t~ret314#1, main_#t~ret315#1, main_#t~nondet316#1, main_#t~switch317#1, main_#t~ret318#1, main_#t~ret319#1, main_#t~ret320#1, main_#t~mem321#1, main_#t~ret322#1.base, main_#t~ret322#1.offset, main_#t~mem323#1, main_#t~ret324#1.base, main_#t~ret324#1.offset, main_#t~ret325#1, main_#t~ret326#1, main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset, main_~tmp~27#1.base, main_~tmp~27#1.offset, main_~#ldvarg0~0#1.base, main_~#ldvarg0~0#1.offset, main_~#ldvarg3~0#1.base, main_~#ldvarg3~0#1.offset, main_~ldvarg2~0#1, main_~tmp___0~14#1, main_~ldvarg4~0#1, main_~tmp___1~9#1, main_~#ldvarg5~0#1.base, main_~#ldvarg5~0#1.offset, main_~tmp___2~3#1, main_~tmp___3~0#1, main_~tmp___4~1#1, main_~tmp___5~0#1, main_~tmp___6~0#1;havoc main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset;havoc main_~tmp~27#1.base, main_~tmp~27#1.offset;call main_~#ldvarg0~0#1.base, main_~#ldvarg0~0#1.offset := #Ultimate.allocOnStack(4);call main_~#ldvarg3~0#1.base, main_~#ldvarg3~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~ldvarg2~0#1;havoc main_~tmp___0~14#1;havoc main_~ldvarg4~0#1;havoc main_~tmp___1~9#1;call main_~#ldvarg5~0#1.base, main_~#ldvarg5~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~tmp___2~3#1;havoc main_~tmp___3~0#1;havoc main_~tmp___4~1#1;havoc main_~tmp___5~0#1;havoc main_~tmp___6~0#1; {526#true} is VALID [2022-02-20 21:51:29,723 INFO L272 TraceCheckUtils]: 2: Hoare triple {526#true} call main_#t~ret287#1.base, main_#t~ret287#1.offset := ldv_zalloc(32); {545#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:29,724 INFO L290 TraceCheckUtils]: 3: Hoare triple {545#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet28#1 && #t~nondet28#1 <= 2147483647;~tmp___0~1#1 := #t~nondet28#1;havoc #t~nondet28#1; {526#true} is VALID [2022-02-20 21:51:29,724 INFO L290 TraceCheckUtils]: 4: Hoare triple {526#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {526#true} is VALID [2022-02-20 21:51:29,724 INFO L290 TraceCheckUtils]: 5: Hoare triple {526#true} assume true; {526#true} is VALID [2022-02-20 21:51:29,724 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {526#true} {526#true} #1414#return; {526#true} is VALID [2022-02-20 21:51:29,724 INFO L290 TraceCheckUtils]: 7: Hoare triple {526#true} main_~tmp~27#1.base, main_~tmp~27#1.offset := main_#t~ret287#1.base, main_#t~ret287#1.offset;havoc main_#t~ret287#1.base, main_#t~ret287#1.offset;main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset := main_~tmp~27#1.base, main_~tmp~27#1.offset;assume -2147483648 <= main_#t~nondet288#1 && main_#t~nondet288#1 <= 2147483647;main_~tmp___0~14#1 := main_#t~nondet288#1;havoc main_#t~nondet288#1;main_~ldvarg2~0#1 := main_~tmp___0~14#1;assume -2147483648 <= main_#t~nondet289#1 && main_#t~nondet289#1 <= 2147483647;main_~tmp___1~9#1 := main_#t~nondet289#1;havoc main_#t~nondet289#1;main_~ldvarg4~0#1 := main_~tmp___1~9#1;assume { :begin_inline_ldv_initialize } true; {526#true} is VALID [2022-02-20 21:51:29,725 INFO L290 TraceCheckUtils]: 8: Hoare triple {526#true} assume { :end_inline_ldv_initialize } true; {526#true} is VALID [2022-02-20 21:51:29,725 INFO L272 TraceCheckUtils]: 9: Hoare triple {526#true} call main_#t~memset~res290#1.base, main_#t~memset~res290#1.offset := #Ultimate.C_memset(main_~#ldvarg0~0#1.base, main_~#ldvarg0~0#1.offset, 0, 4); {546#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 21:51:29,726 INFO L290 TraceCheckUtils]: 10: Hoare triple {546#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {526#true} is VALID [2022-02-20 21:51:29,726 INFO L290 TraceCheckUtils]: 11: Hoare triple {526#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {526#true} is VALID [2022-02-20 21:51:29,726 INFO L290 TraceCheckUtils]: 12: Hoare triple {526#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {526#true} is VALID [2022-02-20 21:51:29,726 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {526#true} {526#true} #1416#return; {526#true} is VALID [2022-02-20 21:51:29,726 INFO L290 TraceCheckUtils]: 14: Hoare triple {526#true} havoc main_#t~memset~res290#1.base, main_#t~memset~res290#1.offset; {526#true} is VALID [2022-02-20 21:51:29,727 INFO L272 TraceCheckUtils]: 15: Hoare triple {526#true} call main_#t~memset~res291#1.base, main_#t~memset~res291#1.offset := #Ultimate.C_memset(main_~#ldvarg3~0#1.base, main_~#ldvarg3~0#1.offset, 0, 4); {546#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 21:51:29,752 INFO L290 TraceCheckUtils]: 16: Hoare triple {546#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {526#true} is VALID [2022-02-20 21:51:29,753 INFO L290 TraceCheckUtils]: 17: Hoare triple {526#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {526#true} is VALID [2022-02-20 21:51:29,753 INFO L290 TraceCheckUtils]: 18: Hoare triple {526#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {526#true} is VALID [2022-02-20 21:51:29,753 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {526#true} {526#true} #1418#return; {526#true} is VALID [2022-02-20 21:51:29,753 INFO L290 TraceCheckUtils]: 20: Hoare triple {526#true} havoc main_#t~memset~res291#1.base, main_#t~memset~res291#1.offset; {526#true} is VALID [2022-02-20 21:51:29,755 INFO L272 TraceCheckUtils]: 21: Hoare triple {526#true} call main_#t~memset~res292#1.base, main_#t~memset~res292#1.offset := #Ultimate.C_memset(main_~#ldvarg5~0#1.base, main_~#ldvarg5~0#1.offset, 0, 4); {546#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 21:51:29,756 INFO L290 TraceCheckUtils]: 22: Hoare triple {546#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {526#true} is VALID [2022-02-20 21:51:29,756 INFO L290 TraceCheckUtils]: 23: Hoare triple {526#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {526#true} is VALID [2022-02-20 21:51:29,756 INFO L290 TraceCheckUtils]: 24: Hoare triple {526#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {526#true} is VALID [2022-02-20 21:51:29,756 INFO L284 TraceCheckUtils]: 25: Hoare quadruple {526#true} {526#true} #1420#return; {526#true} is VALID [2022-02-20 21:51:29,757 INFO L290 TraceCheckUtils]: 26: Hoare triple {526#true} havoc main_#t~memset~res292#1.base, main_#t~memset~res292#1.offset;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {544#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:51:29,757 INFO L290 TraceCheckUtils]: 27: Hoare triple {544#(= ~ldv_state_variable_0~0 1)} assume -2147483648 <= main_#t~nondet293#1 && main_#t~nondet293#1 <= 2147483647;main_~tmp___2~3#1 := main_#t~nondet293#1;havoc main_#t~nondet293#1;main_#t~switch294#1 := 0 == main_~tmp___2~3#1; {544#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:51:29,757 INFO L290 TraceCheckUtils]: 28: Hoare triple {544#(= ~ldv_state_variable_0~0 1)} assume !main_#t~switch294#1;main_#t~switch294#1 := main_#t~switch294#1 || 1 == main_~tmp___2~3#1; {544#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:51:29,758 INFO L290 TraceCheckUtils]: 29: Hoare triple {544#(= ~ldv_state_variable_0~0 1)} assume main_#t~switch294#1; {544#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:51:29,758 INFO L290 TraceCheckUtils]: 30: Hoare triple {544#(= ~ldv_state_variable_0~0 1)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet302#1 && main_#t~nondet302#1 <= 2147483647;main_~tmp___4~1#1 := main_#t~nondet302#1;havoc main_#t~nondet302#1;main_#t~switch303#1 := 0 == main_~tmp___4~1#1; {544#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:51:29,759 INFO L290 TraceCheckUtils]: 31: Hoare triple {544#(= ~ldv_state_variable_0~0 1)} assume main_#t~switch303#1; {544#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:51:29,761 INFO L290 TraceCheckUtils]: 32: Hoare triple {544#(= ~ldv_state_variable_0~0 1)} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0;assume { :begin_inline_cdc_mbim_driver_exit } true;assume { :begin_inline_ldv_usb_deregister_8 } true;ldv_usb_deregister_8_#in~arg#1.base, ldv_usb_deregister_8_#in~arg#1.offset := ~#cdc_mbim_driver~0.base, ~#cdc_mbim_driver~0.offset;havoc ldv_usb_deregister_8_~arg#1.base, ldv_usb_deregister_8_~arg#1.offset;ldv_usb_deregister_8_~arg#1.base, ldv_usb_deregister_8_~arg#1.offset := ldv_usb_deregister_8_#in~arg#1.base, ldv_usb_deregister_8_#in~arg#1.offset;assume { :begin_inline_usb_deregister } true;usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset := ldv_usb_deregister_8_~arg#1.base, ldv_usb_deregister_8_~arg#1.offset;havoc usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset;usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset := usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset; {527#false} is VALID [2022-02-20 21:51:29,761 INFO L290 TraceCheckUtils]: 33: Hoare triple {527#false} assume { :end_inline_usb_deregister } true;~ldv_state_variable_1~0 := 0; {527#false} is VALID [2022-02-20 21:51:29,762 INFO L290 TraceCheckUtils]: 34: Hoare triple {527#false} assume { :end_inline_ldv_usb_deregister_8 } true; {527#false} is VALID [2022-02-20 21:51:29,762 INFO L290 TraceCheckUtils]: 35: Hoare triple {527#false} assume { :end_inline_cdc_mbim_driver_exit } true;~ldv_state_variable_0~0 := 2; {527#false} is VALID [2022-02-20 21:51:29,762 INFO L290 TraceCheckUtils]: 36: Hoare triple {527#false} assume { :begin_inline_ldv_check_final_state } true; {527#false} is VALID [2022-02-20 21:51:29,762 INFO L290 TraceCheckUtils]: 37: Hoare triple {527#false} assume !(0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616); {527#false} is VALID [2022-02-20 21:51:29,762 INFO L272 TraceCheckUtils]: 38: Hoare triple {527#false} call ldv_error(); {527#false} is VALID [2022-02-20 21:51:29,763 INFO L290 TraceCheckUtils]: 39: Hoare triple {527#false} assume !false; {527#false} is VALID [2022-02-20 21:51:29,763 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-02-20 21:51:29,763 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:51:29,764 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [669183852] [2022-02-20 21:51:29,764 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [669183852] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:51:29,764 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:51:29,764 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-02-20 21:51:29,766 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [752628675] [2022-02-20 21:51:29,766 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:51:29,769 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 5.0) internal successors, (25), 3 states have internal predecessors, (25), 2 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 40 [2022-02-20 21:51:29,770 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:51:29,772 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 5.0) internal successors, (25), 3 states have internal predecessors, (25), 2 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 21:51:29,816 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:51:29,816 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-02-20 21:51:29,816 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:51:29,833 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-02-20 21:51:29,835 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-02-20 21:51:29,839 INFO L87 Difference]: Start difference. First operand has 523 states, 398 states have (on average 1.407035175879397) internal successors, (560), 412 states have internal predecessors, (560), 94 states have call successors, (94), 31 states have call predecessors, (94), 29 states have return successors, (88), 88 states have call predecessors, (88), 88 states have call successors, (88) Second operand has 5 states, 5 states have (on average 5.0) internal successors, (25), 3 states have internal predecessors, (25), 2 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 21:51:34,525 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:51:34,526 INFO L93 Difference]: Finished difference Result 1672 states and 2474 transitions. [2022-02-20 21:51:34,526 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-02-20 21:51:34,526 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 5.0) internal successors, (25), 3 states have internal predecessors, (25), 2 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 40 [2022-02-20 21:51:34,527 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:51:34,528 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 5.0) internal successors, (25), 3 states have internal predecessors, (25), 2 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 21:51:34,578 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 2474 transitions. [2022-02-20 21:51:34,579 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 5.0) internal successors, (25), 3 states have internal predecessors, (25), 2 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 21:51:34,613 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 2474 transitions. [2022-02-20 21:51:34,613 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 7 states and 2474 transitions. [2022-02-20 21:51:36,401 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2474 edges. 2474 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:51:36,539 INFO L225 Difference]: With dead ends: 1672 [2022-02-20 21:51:36,539 INFO L226 Difference]: Without dead ends: 1132 [2022-02-20 21:51:36,551 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2022-02-20 21:51:36,557 INFO L933 BasicCegarLoop]: 753 mSDtfsCounter, 1145 mSDsluCounter, 1434 mSDsCounter, 0 mSdLazyCounter, 654 mSolverCounterSat, 455 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1201 SdHoareTripleChecker+Valid, 2187 SdHoareTripleChecker+Invalid, 1109 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 455 IncrementalHoareTripleChecker+Valid, 654 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.4s IncrementalHoareTripleChecker+Time [2022-02-20 21:51:36,558 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1201 Valid, 2187 Invalid, 1109 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [455 Valid, 654 Invalid, 0 Unknown, 0 Unchecked, 1.4s Time] [2022-02-20 21:51:36,572 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1132 states. [2022-02-20 21:51:36,645 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1132 to 969. [2022-02-20 21:51:36,645 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:51:36,654 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1132 states. Second operand has 969 states, 753 states have (on average 1.3957503320053122) internal successors, (1051), 760 states have internal predecessors, (1051), 159 states have call successors, (159), 57 states have call predecessors, (159), 56 states have return successors, (153), 153 states have call predecessors, (153), 153 states have call successors, (153) [2022-02-20 21:51:36,659 INFO L74 IsIncluded]: Start isIncluded. First operand 1132 states. Second operand has 969 states, 753 states have (on average 1.3957503320053122) internal successors, (1051), 760 states have internal predecessors, (1051), 159 states have call successors, (159), 57 states have call predecessors, (159), 56 states have return successors, (153), 153 states have call predecessors, (153), 153 states have call successors, (153) [2022-02-20 21:51:36,660 INFO L87 Difference]: Start difference. First operand 1132 states. Second operand has 969 states, 753 states have (on average 1.3957503320053122) internal successors, (1051), 760 states have internal predecessors, (1051), 159 states have call successors, (159), 57 states have call predecessors, (159), 56 states have return successors, (153), 153 states have call predecessors, (153), 153 states have call successors, (153) [2022-02-20 21:51:36,723 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:51:36,723 INFO L93 Difference]: Finished difference Result 1132 states and 1632 transitions. [2022-02-20 21:51:36,723 INFO L276 IsEmpty]: Start isEmpty. Operand 1132 states and 1632 transitions. [2022-02-20 21:51:36,735 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:51:36,736 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:51:36,739 INFO L74 IsIncluded]: Start isIncluded. First operand has 969 states, 753 states have (on average 1.3957503320053122) internal successors, (1051), 760 states have internal predecessors, (1051), 159 states have call successors, (159), 57 states have call predecessors, (159), 56 states have return successors, (153), 153 states have call predecessors, (153), 153 states have call successors, (153) Second operand 1132 states. [2022-02-20 21:51:36,741 INFO L87 Difference]: Start difference. First operand has 969 states, 753 states have (on average 1.3957503320053122) internal successors, (1051), 760 states have internal predecessors, (1051), 159 states have call successors, (159), 57 states have call predecessors, (159), 56 states have return successors, (153), 153 states have call predecessors, (153), 153 states have call successors, (153) Second operand 1132 states. [2022-02-20 21:51:36,791 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:51:36,791 INFO L93 Difference]: Finished difference Result 1132 states and 1632 transitions. [2022-02-20 21:51:36,792 INFO L276 IsEmpty]: Start isEmpty. Operand 1132 states and 1632 transitions. [2022-02-20 21:51:36,795 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:51:36,795 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:51:36,795 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:51:36,795 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:51:36,798 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 969 states, 753 states have (on average 1.3957503320053122) internal successors, (1051), 760 states have internal predecessors, (1051), 159 states have call successors, (159), 57 states have call predecessors, (159), 56 states have return successors, (153), 153 states have call predecessors, (153), 153 states have call successors, (153) [2022-02-20 21:51:36,843 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 969 states to 969 states and 1363 transitions. [2022-02-20 21:51:36,845 INFO L78 Accepts]: Start accepts. Automaton has 969 states and 1363 transitions. Word has length 40 [2022-02-20 21:51:36,845 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:51:36,845 INFO L470 AbstractCegarLoop]: Abstraction has 969 states and 1363 transitions. [2022-02-20 21:51:36,846 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 5.0) internal successors, (25), 3 states have internal predecessors, (25), 2 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 21:51:36,846 INFO L276 IsEmpty]: Start isEmpty. Operand 969 states and 1363 transitions. [2022-02-20 21:51:36,847 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2022-02-20 21:51:36,848 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:51:36,848 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:51:36,848 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-02-20 21:51:36,848 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:51:36,849 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:51:36,849 INFO L85 PathProgramCache]: Analyzing trace with hash 1949626109, now seen corresponding path program 1 times [2022-02-20 21:51:36,849 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:51:36,849 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [549356154] [2022-02-20 21:51:36,849 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:51:36,849 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:51:36,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:37,018 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 21:51:37,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:37,027 INFO L290 TraceCheckUtils]: 0: Hoare triple {6490#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet28#1 && #t~nondet28#1 <= 2147483647;~tmp___0~1#1 := #t~nondet28#1;havoc #t~nondet28#1; {6467#true} is VALID [2022-02-20 21:51:37,028 INFO L290 TraceCheckUtils]: 1: Hoare triple {6467#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {6467#true} is VALID [2022-02-20 21:51:37,028 INFO L290 TraceCheckUtils]: 2: Hoare triple {6467#true} assume true; {6467#true} is VALID [2022-02-20 21:51:37,029 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6467#true} {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #1414#return; {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:37,034 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 9 [2022-02-20 21:51:37,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:37,050 INFO L290 TraceCheckUtils]: 0: Hoare triple {6491#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {6467#true} is VALID [2022-02-20 21:51:37,050 INFO L290 TraceCheckUtils]: 1: Hoare triple {6467#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {6467#true} is VALID [2022-02-20 21:51:37,050 INFO L290 TraceCheckUtils]: 2: Hoare triple {6467#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {6467#true} is VALID [2022-02-20 21:51:37,051 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6467#true} {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #1416#return; {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:37,051 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 15 [2022-02-20 21:51:37,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:37,060 INFO L290 TraceCheckUtils]: 0: Hoare triple {6491#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {6467#true} is VALID [2022-02-20 21:51:37,060 INFO L290 TraceCheckUtils]: 1: Hoare triple {6467#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {6467#true} is VALID [2022-02-20 21:51:37,060 INFO L290 TraceCheckUtils]: 2: Hoare triple {6467#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {6467#true} is VALID [2022-02-20 21:51:37,061 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6467#true} {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #1418#return; {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:37,061 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 21 [2022-02-20 21:51:37,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:37,069 INFO L290 TraceCheckUtils]: 0: Hoare triple {6491#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {6467#true} is VALID [2022-02-20 21:51:37,069 INFO L290 TraceCheckUtils]: 1: Hoare triple {6467#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {6467#true} is VALID [2022-02-20 21:51:37,069 INFO L290 TraceCheckUtils]: 2: Hoare triple {6467#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {6467#true} is VALID [2022-02-20 21:51:37,070 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6467#true} {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #1420#return; {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:37,070 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 35 [2022-02-20 21:51:37,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:37,081 INFO L290 TraceCheckUtils]: 0: Hoare triple {6490#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet28#1 && #t~nondet28#1 <= 2147483647;~tmp___0~1#1 := #t~nondet28#1;havoc #t~nondet28#1; {6467#true} is VALID [2022-02-20 21:51:37,082 INFO L290 TraceCheckUtils]: 1: Hoare triple {6467#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {6467#true} is VALID [2022-02-20 21:51:37,082 INFO L290 TraceCheckUtils]: 2: Hoare triple {6467#true} assume true; {6467#true} is VALID [2022-02-20 21:51:37,083 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6467#true} {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #1434#return; {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:37,089 INFO L290 TraceCheckUtils]: 0: Hoare triple {6467#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(82, 2);call #Ultimate.allocInit(9, 3);call #Ultimate.allocInit(22, 4);call #Ultimate.allocInit(219, 5);call #Ultimate.allocInit(24, 6);call #Ultimate.allocInit(24, 7);call #Ultimate.allocInit(22, 8);call #Ultimate.allocInit(24, 9);call #Ultimate.allocInit(9, 10);call #Ultimate.allocInit(18, 11);call #Ultimate.allocInit(219, 12);call #Ultimate.allocInit(36, 13);call #Ultimate.allocInit(36, 14);call #Ultimate.allocInit(9, 15);call #Ultimate.allocInit(18, 16);call #Ultimate.allocInit(219, 17);call #Ultimate.allocInit(67, 18);call #Ultimate.allocInit(67, 19);call #Ultimate.allocInit(9, 20);call #Ultimate.allocInit(9, 21);call #Ultimate.allocInit(9, 22);call #Ultimate.allocInit(9, 23);~LDV_IN_INTERRUPT~0 := 1;~cdc_mbim_info_zlp_group1~0.base, ~cdc_mbim_info_zlp_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0;~cdc_mbim_info_group0~0.base, ~cdc_mbim_info_group0~0.offset := 0, 0;~ref_cnt~0 := 0;~cdc_mbim_info_zlp_group2~0.base, ~cdc_mbim_info_zlp_group2~0.offset := 0, 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~cdc_mbim_info_group1~0.base, ~cdc_mbim_info_group1~0.offset := 0, 0;~cdc_mbim_info_zlp_group0~0.base, ~cdc_mbim_info_zlp_group0~0.offset := 0, 0;~cdc_mbim_info_group2~0.base, ~cdc_mbim_info_group2~0.offset := 0, 0;~cdc_mbim_driver_group1~0.base, ~cdc_mbim_driver_group1~0.offset := 0, 0;~#cdc_mbim_info~0.base, ~#cdc_mbim_info~0.offset := 24, 0;call #Ultimate.allocInit(124, 24);call write~init~$Pointer$(20, 0, ~#cdc_mbim_info~0.base, ~#cdc_mbim_info~0.offset, 8);call write~init~int(9232, ~#cdc_mbim_info~0.base, 8 + ~#cdc_mbim_info~0.offset, 4);call write~init~$Pointer$(#funAddr~cdc_mbim_bind.base, #funAddr~cdc_mbim_bind.offset, ~#cdc_mbim_info~0.base, 12 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_unbind.base, #funAddr~cdc_mbim_unbind.offset, ~#cdc_mbim_info~0.base, 20 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 28 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 36 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 44 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_manage_power.base, #funAddr~cdc_mbim_manage_power.offset, ~#cdc_mbim_info~0.base, 52 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 60 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 68 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_rx_fixup.base, #funAddr~cdc_mbim_rx_fixup.offset, ~#cdc_mbim_info~0.base, 76 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_tx_fixup.base, #funAddr~cdc_mbim_tx_fixup.offset, ~#cdc_mbim_info~0.base, 84 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 92 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 100 + ~#cdc_mbim_info~0.offset, 8);call write~init~int(0, ~#cdc_mbim_info~0.base, 108 + ~#cdc_mbim_info~0.offset, 4);call write~init~int(0, ~#cdc_mbim_info~0.base, 112 + ~#cdc_mbim_info~0.offset, 4);call write~init~int(0, ~#cdc_mbim_info~0.base, 116 + ~#cdc_mbim_info~0.offset, 8);~#cdc_mbim_info_zlp~0.base, ~#cdc_mbim_info_zlp~0.offset := 25, 0;call #Ultimate.allocInit(124, 25);call write~init~$Pointer$(21, 0, ~#cdc_mbim_info_zlp~0.base, ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~int(9744, ~#cdc_mbim_info_zlp~0.base, 8 + ~#cdc_mbim_info_zlp~0.offset, 4);call write~init~$Pointer$(#funAddr~cdc_mbim_bind.base, #funAddr~cdc_mbim_bind.offset, ~#cdc_mbim_info_zlp~0.base, 12 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_unbind.base, #funAddr~cdc_mbim_unbind.offset, ~#cdc_mbim_info_zlp~0.base, 20 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 28 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 36 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 44 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_manage_power.base, #funAddr~cdc_mbim_manage_power.offset, ~#cdc_mbim_info_zlp~0.base, 52 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 60 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 68 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_rx_fixup.base, #funAddr~cdc_mbim_rx_fixup.offset, ~#cdc_mbim_info_zlp~0.base, 76 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_tx_fixup.base, #funAddr~cdc_mbim_tx_fixup.offset, ~#cdc_mbim_info_zlp~0.base, 84 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 92 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 100 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~int(0, ~#cdc_mbim_info_zlp~0.base, 108 + ~#cdc_mbim_info_zlp~0.offset, 4);call write~init~int(0, ~#cdc_mbim_info_zlp~0.base, 112 + ~#cdc_mbim_info_zlp~0.offset, 4);call write~init~int(0, ~#cdc_mbim_info_zlp~0.base, 116 + ~#cdc_mbim_info_zlp~0.offset, 8);~#mbim_devs~0.base, ~#mbim_devs~0.offset := 26, 0;call #Ultimate.allocInit(125, 26);call write~init~int(896, ~#mbim_devs~0.base, ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 2 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 4 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 6 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 8 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 10 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 11 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 12 + ~#mbim_devs~0.offset, 1);call write~init~int(2, ~#mbim_devs~0.base, 13 + ~#mbim_devs~0.offset, 1);call write~init~int(13, ~#mbim_devs~0.base, 14 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 15 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 16 + ~#mbim_devs~0.offset, 1);call write~init~int(~#cdc_mbim_info~0.base + ~#cdc_mbim_info~0.offset, ~#mbim_devs~0.base, 17 + ~#mbim_devs~0.offset, 8);call write~init~int(899, ~#mbim_devs~0.base, 25 + ~#mbim_devs~0.offset, 2);call write~init~int(4505, ~#mbim_devs~0.base, 27 + ~#mbim_devs~0.offset, 2);call write~init~int(26786, ~#mbim_devs~0.base, 29 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 31 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 33 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 35 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 36 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 37 + ~#mbim_devs~0.offset, 1);call write~init~int(2, ~#mbim_devs~0.base, 38 + ~#mbim_devs~0.offset, 1);call write~init~int(14, ~#mbim_devs~0.base, 39 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 40 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 41 + ~#mbim_devs~0.offset, 1);call write~init~int(~#cdc_mbim_info_zlp~0.base + ~#cdc_mbim_info_zlp~0.offset, ~#mbim_devs~0.base, 42 + ~#mbim_devs~0.offset, 8);call write~init~int(899, ~#mbim_devs~0.base, 50 + ~#mbim_devs~0.offset, 2);call write~init~int(1008, ~#mbim_devs~0.base, 52 + ~#mbim_devs~0.offset, 2);call write~init~int(19229, ~#mbim_devs~0.base, 54 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 56 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 58 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 60 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 61 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 62 + ~#mbim_devs~0.offset, 1);call write~init~int(2, ~#mbim_devs~0.base, 63 + ~#mbim_devs~0.offset, 1);call write~init~int(14, ~#mbim_devs~0.base, 64 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 65 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 66 + ~#mbim_devs~0.offset, 1);call write~init~int(~#cdc_mbim_info_zlp~0.base + ~#cdc_mbim_info_zlp~0.offset, ~#mbim_devs~0.base, 67 + ~#mbim_devs~0.offset, 8);call write~init~int(896, ~#mbim_devs~0.base, 75 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 77 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 79 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 81 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 83 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 85 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 86 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 87 + ~#mbim_devs~0.offset, 1);call write~init~int(2, ~#mbim_devs~0.base, 88 + ~#mbim_devs~0.offset, 1);call write~init~int(14, ~#mbim_devs~0.base, 89 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 90 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 91 + ~#mbim_devs~0.offset, 1);call write~init~int(~#cdc_mbim_info~0.base + ~#cdc_mbim_info~0.offset, ~#mbim_devs~0.base, 92 + ~#mbim_devs~0.offset, 8);call write~init~int(0, ~#mbim_devs~0.base, 100 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 102 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 104 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 106 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 108 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 110 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 111 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 112 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 113 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 114 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 115 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 116 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 117 + ~#mbim_devs~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.bInterfaceNumber := 0;~__mod_usb_device_table~0.driver_info := 0;~#cdc_mbim_driver~0.base, ~#cdc_mbim_driver~0.offset := 27, 0;call #Ultimate.allocInit(285, 27);call write~init~$Pointer$(22, 0, ~#cdc_mbim_driver~0.base, ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usbnet_probe.base, #funAddr~usbnet_probe.offset, ~#cdc_mbim_driver~0.base, 8 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usbnet_disconnect.base, #funAddr~usbnet_disconnect.offset, ~#cdc_mbim_driver~0.base, 16 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 24 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_suspend.base, #funAddr~cdc_mbim_suspend.offset, ~#cdc_mbim_driver~0.base, 32 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_resume.base, #funAddr~cdc_mbim_resume.offset, ~#cdc_mbim_driver~0.base, 40 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_resume.base, #funAddr~cdc_mbim_resume.offset, ~#cdc_mbim_driver~0.base, 48 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 56 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 64 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(~#mbim_devs~0.base, ~#mbim_devs~0.offset, ~#cdc_mbim_driver~0.base, 72 + ~#cdc_mbim_driver~0.offset, 8);call write~init~int(0, ~#cdc_mbim_driver~0.base, 80 + ~#cdc_mbim_driver~0.offset, 4);call write~init~int(0, ~#cdc_mbim_driver~0.base, 84 + ~#cdc_mbim_driver~0.offset, 4);call write~init~int(0, ~#cdc_mbim_driver~0.base, 88 + ~#cdc_mbim_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 92 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 100 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 108 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 116 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 124 + ~#cdc_mbim_driver~0.offset, 8);call write~init~int(0, ~#cdc_mbim_driver~0.base, 132 + ~#cdc_mbim_driver~0.offset, 4);call write~init~int(0, ~#cdc_mbim_driver~0.base, 136 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 148 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 156 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 164 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 172 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 180 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 188 + ~#cdc_mbim_driver~0.offset, 8);call write~init~int(0, ~#cdc_mbim_driver~0.base, 196 + ~#cdc_mbim_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 197 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 205 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 213 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 221 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 229 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 237 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 245 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 253 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 261 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 269 + ~#cdc_mbim_driver~0.offset, 8);call write~init~int(0, ~#cdc_mbim_driver~0.base, 277 + ~#cdc_mbim_driver~0.offset, 4);call write~init~int(0, ~#cdc_mbim_driver~0.base, 281 + ~#cdc_mbim_driver~0.offset, 1);call write~init~int(1, ~#cdc_mbim_driver~0.base, 282 + ~#cdc_mbim_driver~0.offset, 1);call write~init~int(1, ~#cdc_mbim_driver~0.base, 283 + ~#cdc_mbim_driver~0.offset, 1);call write~init~int(0, ~#cdc_mbim_driver~0.base, 284 + ~#cdc_mbim_driver~0.offset, 1);~ldv_retval_2~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_5~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_6~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:37,090 INFO L290 TraceCheckUtils]: 1: Hoare triple {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret287#1.base, main_#t~ret287#1.offset, main_#t~nondet288#1, main_#t~nondet289#1, main_#t~memset~res290#1.base, main_#t~memset~res290#1.offset, main_#t~memset~res291#1.base, main_#t~memset~res291#1.offset, main_#t~memset~res292#1.base, main_#t~memset~res292#1.offset, main_#t~nondet293#1, main_#t~switch294#1, main_#t~nondet295#1, main_#t~switch296#1, main_#t~ret297#1, main_#t~ret298#1, main_#t~mem299#1, main_#t~ret300#1, main_#t~ret301#1, main_#t~nondet302#1, main_#t~switch303#1, main_#t~ret304#1, main_#t~nondet305#1, main_#t~switch306#1, main_#t~ret307#1, main_#t~ret308#1, main_#t~ret309#1, main_#t~mem310#1, main_#t~ret311#1.base, main_#t~ret311#1.offset, main_#t~mem312#1, main_#t~ret313#1.base, main_#t~ret313#1.offset, main_#t~ret314#1, main_#t~ret315#1, main_#t~nondet316#1, main_#t~switch317#1, main_#t~ret318#1, main_#t~ret319#1, main_#t~ret320#1, main_#t~mem321#1, main_#t~ret322#1.base, main_#t~ret322#1.offset, main_#t~mem323#1, main_#t~ret324#1.base, main_#t~ret324#1.offset, main_#t~ret325#1, main_#t~ret326#1, main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset, main_~tmp~27#1.base, main_~tmp~27#1.offset, main_~#ldvarg0~0#1.base, main_~#ldvarg0~0#1.offset, main_~#ldvarg3~0#1.base, main_~#ldvarg3~0#1.offset, main_~ldvarg2~0#1, main_~tmp___0~14#1, main_~ldvarg4~0#1, main_~tmp___1~9#1, main_~#ldvarg5~0#1.base, main_~#ldvarg5~0#1.offset, main_~tmp___2~3#1, main_~tmp___3~0#1, main_~tmp___4~1#1, main_~tmp___5~0#1, main_~tmp___6~0#1;havoc main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset;havoc main_~tmp~27#1.base, main_~tmp~27#1.offset;call main_~#ldvarg0~0#1.base, main_~#ldvarg0~0#1.offset := #Ultimate.allocOnStack(4);call main_~#ldvarg3~0#1.base, main_~#ldvarg3~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~ldvarg2~0#1;havoc main_~tmp___0~14#1;havoc main_~ldvarg4~0#1;havoc main_~tmp___1~9#1;call main_~#ldvarg5~0#1.base, main_~#ldvarg5~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~tmp___2~3#1;havoc main_~tmp___3~0#1;havoc main_~tmp___4~1#1;havoc main_~tmp___5~0#1;havoc main_~tmp___6~0#1; {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:37,090 INFO L272 TraceCheckUtils]: 2: Hoare triple {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} call main_#t~ret287#1.base, main_#t~ret287#1.offset := ldv_zalloc(32); {6490#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:37,090 INFO L290 TraceCheckUtils]: 3: Hoare triple {6490#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet28#1 && #t~nondet28#1 <= 2147483647;~tmp___0~1#1 := #t~nondet28#1;havoc #t~nondet28#1; {6467#true} is VALID [2022-02-20 21:51:37,091 INFO L290 TraceCheckUtils]: 4: Hoare triple {6467#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {6467#true} is VALID [2022-02-20 21:51:37,091 INFO L290 TraceCheckUtils]: 5: Hoare triple {6467#true} assume true; {6467#true} is VALID [2022-02-20 21:51:37,091 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {6467#true} {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #1414#return; {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:37,092 INFO L290 TraceCheckUtils]: 7: Hoare triple {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} main_~tmp~27#1.base, main_~tmp~27#1.offset := main_#t~ret287#1.base, main_#t~ret287#1.offset;havoc main_#t~ret287#1.base, main_#t~ret287#1.offset;main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset := main_~tmp~27#1.base, main_~tmp~27#1.offset;assume -2147483648 <= main_#t~nondet288#1 && main_#t~nondet288#1 <= 2147483647;main_~tmp___0~14#1 := main_#t~nondet288#1;havoc main_#t~nondet288#1;main_~ldvarg2~0#1 := main_~tmp___0~14#1;assume -2147483648 <= main_#t~nondet289#1 && main_#t~nondet289#1 <= 2147483647;main_~tmp___1~9#1 := main_#t~nondet289#1;havoc main_#t~nondet289#1;main_~ldvarg4~0#1 := main_~tmp___1~9#1;assume { :begin_inline_ldv_initialize } true; {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:37,092 INFO L290 TraceCheckUtils]: 8: Hoare triple {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume { :end_inline_ldv_initialize } true; {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:37,093 INFO L272 TraceCheckUtils]: 9: Hoare triple {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} call main_#t~memset~res290#1.base, main_#t~memset~res290#1.offset := #Ultimate.C_memset(main_~#ldvarg0~0#1.base, main_~#ldvarg0~0#1.offset, 0, 4); {6491#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 21:51:37,093 INFO L290 TraceCheckUtils]: 10: Hoare triple {6491#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {6467#true} is VALID [2022-02-20 21:51:37,094 INFO L290 TraceCheckUtils]: 11: Hoare triple {6467#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {6467#true} is VALID [2022-02-20 21:51:37,094 INFO L290 TraceCheckUtils]: 12: Hoare triple {6467#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {6467#true} is VALID [2022-02-20 21:51:37,094 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {6467#true} {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #1416#return; {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:37,095 INFO L290 TraceCheckUtils]: 14: Hoare triple {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} havoc main_#t~memset~res290#1.base, main_#t~memset~res290#1.offset; {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:37,096 INFO L272 TraceCheckUtils]: 15: Hoare triple {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} call main_#t~memset~res291#1.base, main_#t~memset~res291#1.offset := #Ultimate.C_memset(main_~#ldvarg3~0#1.base, main_~#ldvarg3~0#1.offset, 0, 4); {6491#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 21:51:37,096 INFO L290 TraceCheckUtils]: 16: Hoare triple {6491#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {6467#true} is VALID [2022-02-20 21:51:37,096 INFO L290 TraceCheckUtils]: 17: Hoare triple {6467#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {6467#true} is VALID [2022-02-20 21:51:37,097 INFO L290 TraceCheckUtils]: 18: Hoare triple {6467#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {6467#true} is VALID [2022-02-20 21:51:37,097 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {6467#true} {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #1418#return; {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:37,098 INFO L290 TraceCheckUtils]: 20: Hoare triple {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} havoc main_#t~memset~res291#1.base, main_#t~memset~res291#1.offset; {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:37,098 INFO L272 TraceCheckUtils]: 21: Hoare triple {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} call main_#t~memset~res292#1.base, main_#t~memset~res292#1.offset := #Ultimate.C_memset(main_~#ldvarg5~0#1.base, main_~#ldvarg5~0#1.offset, 0, 4); {6491#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 21:51:37,099 INFO L290 TraceCheckUtils]: 22: Hoare triple {6491#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {6467#true} is VALID [2022-02-20 21:51:37,099 INFO L290 TraceCheckUtils]: 23: Hoare triple {6467#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {6467#true} is VALID [2022-02-20 21:51:37,099 INFO L290 TraceCheckUtils]: 24: Hoare triple {6467#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {6467#true} is VALID [2022-02-20 21:51:37,101 INFO L284 TraceCheckUtils]: 25: Hoare quadruple {6467#true} {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #1420#return; {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:37,101 INFO L290 TraceCheckUtils]: 26: Hoare triple {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} havoc main_#t~memset~res292#1.base, main_#t~memset~res292#1.offset;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:37,102 INFO L290 TraceCheckUtils]: 27: Hoare triple {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume -2147483648 <= main_#t~nondet293#1 && main_#t~nondet293#1 <= 2147483647;main_~tmp___2~3#1 := main_#t~nondet293#1;havoc main_#t~nondet293#1;main_#t~switch294#1 := 0 == main_~tmp___2~3#1; {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:37,102 INFO L290 TraceCheckUtils]: 28: Hoare triple {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume !main_#t~switch294#1;main_#t~switch294#1 := main_#t~switch294#1 || 1 == main_~tmp___2~3#1; {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:37,103 INFO L290 TraceCheckUtils]: 29: Hoare triple {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume main_#t~switch294#1; {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:37,103 INFO L290 TraceCheckUtils]: 30: Hoare triple {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet302#1 && main_#t~nondet302#1 <= 2147483647;main_~tmp___4~1#1 := main_#t~nondet302#1;havoc main_#t~nondet302#1;main_#t~switch303#1 := 0 == main_~tmp___4~1#1; {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:37,104 INFO L290 TraceCheckUtils]: 31: Hoare triple {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume !main_#t~switch303#1;main_#t~switch303#1 := main_#t~switch303#1 || 1 == main_~tmp___4~1#1; {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:37,104 INFO L290 TraceCheckUtils]: 32: Hoare triple {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume main_#t~switch303#1; {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:37,106 INFO L290 TraceCheckUtils]: 33: Hoare triple {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_cdc_mbim_driver_init } true;havoc cdc_mbim_driver_init_#res#1;havoc cdc_mbim_driver_init_#t~ret279#1, cdc_mbim_driver_init_~tmp~23#1;havoc cdc_mbim_driver_init_~tmp~23#1;assume { :begin_inline_ldv_usb_register_driver_7 } true;ldv_usb_register_driver_7_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_7_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_7_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_7_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_7_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_7_#in~ldv_func_arg3#1.offset := ~#cdc_mbim_driver~0.base, ~#cdc_mbim_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 23, 0;havoc ldv_usb_register_driver_7_#res#1;havoc ldv_usb_register_driver_7_#t~ret329#1, ldv_usb_register_driver_7_~ldv_func_arg1#1.base, ldv_usb_register_driver_7_~ldv_func_arg1#1.offset, ldv_usb_register_driver_7_~ldv_func_arg2#1.base, ldv_usb_register_driver_7_~ldv_func_arg2#1.offset, ldv_usb_register_driver_7_~ldv_func_arg3#1.base, ldv_usb_register_driver_7_~ldv_func_arg3#1.offset, ldv_usb_register_driver_7_~ldv_func_res~0#1, ldv_usb_register_driver_7_~tmp~30#1;ldv_usb_register_driver_7_~ldv_func_arg1#1.base, ldv_usb_register_driver_7_~ldv_func_arg1#1.offset := ldv_usb_register_driver_7_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_7_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_7_~ldv_func_arg2#1.base, ldv_usb_register_driver_7_~ldv_func_arg2#1.offset := ldv_usb_register_driver_7_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_7_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_7_~ldv_func_arg3#1.base, ldv_usb_register_driver_7_~ldv_func_arg3#1.offset := ldv_usb_register_driver_7_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_7_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_7_~ldv_func_res~0#1;havoc ldv_usb_register_driver_7_~tmp~30#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_7_~ldv_func_arg1#1.base, ldv_usb_register_driver_7_~ldv_func_arg1#1.offset, ldv_usb_register_driver_7_~ldv_func_arg2#1.base, ldv_usb_register_driver_7_~ldv_func_arg2#1.offset, ldv_usb_register_driver_7_~ldv_func_arg3#1.base, ldv_usb_register_driver_7_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet357#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet357#1 && usb_register_driver_#t~nondet357#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet357#1;havoc usb_register_driver_#t~nondet357#1; {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:37,109 INFO L290 TraceCheckUtils]: 34: Hoare triple {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} ldv_usb_register_driver_7_#t~ret329#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_7_#t~ret329#1 && ldv_usb_register_driver_7_#t~ret329#1 <= 2147483647;ldv_usb_register_driver_7_~tmp~30#1 := ldv_usb_register_driver_7_#t~ret329#1;havoc ldv_usb_register_driver_7_#t~ret329#1;ldv_usb_register_driver_7_~ldv_func_res~0#1 := ldv_usb_register_driver_7_~tmp~30#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret286#1.base, ldv_usb_driver_1_#t~ret286#1.offset, ldv_usb_driver_1_~tmp~26#1.base, ldv_usb_driver_1_~tmp~26#1.offset;havoc ldv_usb_driver_1_~tmp~26#1.base, ldv_usb_driver_1_~tmp~26#1.offset; {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:37,110 INFO L272 TraceCheckUtils]: 35: Hoare triple {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} call ldv_usb_driver_1_#t~ret286#1.base, ldv_usb_driver_1_#t~ret286#1.offset := ldv_zalloc(1520); {6490#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:37,110 INFO L290 TraceCheckUtils]: 36: Hoare triple {6490#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet28#1 && #t~nondet28#1 <= 2147483647;~tmp___0~1#1 := #t~nondet28#1;havoc #t~nondet28#1; {6467#true} is VALID [2022-02-20 21:51:37,110 INFO L290 TraceCheckUtils]: 37: Hoare triple {6467#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {6467#true} is VALID [2022-02-20 21:51:37,111 INFO L290 TraceCheckUtils]: 38: Hoare triple {6467#true} assume true; {6467#true} is VALID [2022-02-20 21:51:37,119 INFO L284 TraceCheckUtils]: 39: Hoare quadruple {6467#true} {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #1434#return; {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:37,119 INFO L290 TraceCheckUtils]: 40: Hoare triple {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} ldv_usb_driver_1_~tmp~26#1.base, ldv_usb_driver_1_~tmp~26#1.offset := ldv_usb_driver_1_#t~ret286#1.base, ldv_usb_driver_1_#t~ret286#1.offset;havoc ldv_usb_driver_1_#t~ret286#1.base, ldv_usb_driver_1_#t~ret286#1.offset;~cdc_mbim_driver_group1~0.base, ~cdc_mbim_driver_group1~0.offset := ldv_usb_driver_1_~tmp~26#1.base, ldv_usb_driver_1_~tmp~26#1.offset; {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:37,120 INFO L290 TraceCheckUtils]: 41: Hoare triple {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_7_#res#1 := ldv_usb_register_driver_7_~ldv_func_res~0#1; {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:37,120 INFO L290 TraceCheckUtils]: 42: Hoare triple {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} cdc_mbim_driver_init_#t~ret279#1 := ldv_usb_register_driver_7_#res#1;assume { :end_inline_ldv_usb_register_driver_7 } true;assume -2147483648 <= cdc_mbim_driver_init_#t~ret279#1 && cdc_mbim_driver_init_#t~ret279#1 <= 2147483647;cdc_mbim_driver_init_~tmp~23#1 := cdc_mbim_driver_init_#t~ret279#1;havoc cdc_mbim_driver_init_#t~ret279#1;cdc_mbim_driver_init_#res#1 := cdc_mbim_driver_init_~tmp~23#1; {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:37,121 INFO L290 TraceCheckUtils]: 43: Hoare triple {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} main_#t~ret304#1 := cdc_mbim_driver_init_#res#1;assume { :end_inline_cdc_mbim_driver_init } true;assume -2147483648 <= main_#t~ret304#1 && main_#t~ret304#1 <= 2147483647;~ldv_retval_4~0 := main_#t~ret304#1;havoc main_#t~ret304#1; {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:37,121 INFO L290 TraceCheckUtils]: 44: Hoare triple {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume !(0 == ~ldv_retval_4~0); {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:37,121 INFO L290 TraceCheckUtils]: 45: Hoare triple {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume 0 != ~ldv_retval_4~0;~ldv_state_variable_0~0 := 2; {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:37,122 INFO L290 TraceCheckUtils]: 46: Hoare triple {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume { :begin_inline_ldv_check_final_state } true; {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:37,122 INFO L290 TraceCheckUtils]: 47: Hoare triple {6469#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume !(0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616); {6468#false} is VALID [2022-02-20 21:51:37,122 INFO L272 TraceCheckUtils]: 48: Hoare triple {6468#false} call ldv_error(); {6468#false} is VALID [2022-02-20 21:51:37,123 INFO L290 TraceCheckUtils]: 49: Hoare triple {6468#false} assume !false; {6468#false} is VALID [2022-02-20 21:51:37,123 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-02-20 21:51:37,123 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:51:37,123 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [549356154] [2022-02-20 21:51:37,124 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [549356154] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:51:37,124 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:51:37,124 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-02-20 21:51:37,124 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [155952502] [2022-02-20 21:51:37,124 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:51:37,125 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 6.0) internal successors, (30), 3 states have internal predecessors, (30), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 50 [2022-02-20 21:51:37,126 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:51:37,126 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 6.0) internal successors, (30), 3 states have internal predecessors, (30), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2022-02-20 21:51:37,165 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 41 edges. 41 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:51:37,165 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-02-20 21:51:37,165 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:51:37,166 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-02-20 21:51:37,166 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-02-20 21:51:37,166 INFO L87 Difference]: Start difference. First operand 969 states and 1363 transitions. Second operand has 5 states, 5 states have (on average 6.0) internal successors, (30), 3 states have internal predecessors, (30), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2022-02-20 21:51:39,934 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:51:39,934 INFO L93 Difference]: Finished difference Result 1131 states and 1631 transitions. [2022-02-20 21:51:39,934 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-02-20 21:51:39,935 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 6.0) internal successors, (30), 3 states have internal predecessors, (30), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 50 [2022-02-20 21:51:39,935 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:51:39,935 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 6.0) internal successors, (30), 3 states have internal predecessors, (30), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2022-02-20 21:51:39,943 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 855 transitions. [2022-02-20 21:51:39,943 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 6.0) internal successors, (30), 3 states have internal predecessors, (30), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2022-02-20 21:51:39,949 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 855 transitions. [2022-02-20 21:51:39,949 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 855 transitions. [2022-02-20 21:51:40,632 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 855 edges. 855 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:51:40,687 INFO L225 Difference]: With dead ends: 1131 [2022-02-20 21:51:40,688 INFO L226 Difference]: Without dead ends: 1128 [2022-02-20 21:51:40,688 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-02-20 21:51:40,693 INFO L933 BasicCegarLoop]: 653 mSDtfsCounter, 948 mSDsluCounter, 817 mSDsCounter, 0 mSdLazyCounter, 352 mSolverCounterSat, 261 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1000 SdHoareTripleChecker+Valid, 1470 SdHoareTripleChecker+Invalid, 613 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 261 IncrementalHoareTripleChecker+Valid, 352 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-02-20 21:51:40,694 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1000 Valid, 1470 Invalid, 613 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [261 Valid, 352 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2022-02-20 21:51:40,696 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1128 states. [2022-02-20 21:51:40,724 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1128 to 968. [2022-02-20 21:51:40,725 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:51:40,727 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1128 states. Second operand has 968 states, 753 states have (on average 1.3944223107569722) internal successors, (1050), 759 states have internal predecessors, (1050), 158 states have call successors, (158), 57 states have call predecessors, (158), 56 states have return successors, (153), 153 states have call predecessors, (153), 153 states have call successors, (153) [2022-02-20 21:51:40,728 INFO L74 IsIncluded]: Start isIncluded. First operand 1128 states. Second operand has 968 states, 753 states have (on average 1.3944223107569722) internal successors, (1050), 759 states have internal predecessors, (1050), 158 states have call successors, (158), 57 states have call predecessors, (158), 56 states have return successors, (153), 153 states have call predecessors, (153), 153 states have call successors, (153) [2022-02-20 21:51:40,730 INFO L87 Difference]: Start difference. First operand 1128 states. Second operand has 968 states, 753 states have (on average 1.3944223107569722) internal successors, (1050), 759 states have internal predecessors, (1050), 158 states have call successors, (158), 57 states have call predecessors, (158), 56 states have return successors, (153), 153 states have call predecessors, (153), 153 states have call successors, (153) [2022-02-20 21:51:40,772 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:51:40,772 INFO L93 Difference]: Finished difference Result 1128 states and 1628 transitions. [2022-02-20 21:51:40,773 INFO L276 IsEmpty]: Start isEmpty. Operand 1128 states and 1628 transitions. [2022-02-20 21:51:40,776 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:51:40,776 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:51:40,778 INFO L74 IsIncluded]: Start isIncluded. First operand has 968 states, 753 states have (on average 1.3944223107569722) internal successors, (1050), 759 states have internal predecessors, (1050), 158 states have call successors, (158), 57 states have call predecessors, (158), 56 states have return successors, (153), 153 states have call predecessors, (153), 153 states have call successors, (153) Second operand 1128 states. [2022-02-20 21:51:40,780 INFO L87 Difference]: Start difference. First operand has 968 states, 753 states have (on average 1.3944223107569722) internal successors, (1050), 759 states have internal predecessors, (1050), 158 states have call successors, (158), 57 states have call predecessors, (158), 56 states have return successors, (153), 153 states have call predecessors, (153), 153 states have call successors, (153) Second operand 1128 states. [2022-02-20 21:51:40,823 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:51:40,825 INFO L93 Difference]: Finished difference Result 1128 states and 1628 transitions. [2022-02-20 21:51:40,825 INFO L276 IsEmpty]: Start isEmpty. Operand 1128 states and 1628 transitions. [2022-02-20 21:51:40,830 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:51:40,830 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:51:40,830 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:51:40,830 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:51:40,832 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 968 states, 753 states have (on average 1.3944223107569722) internal successors, (1050), 759 states have internal predecessors, (1050), 158 states have call successors, (158), 57 states have call predecessors, (158), 56 states have return successors, (153), 153 states have call predecessors, (153), 153 states have call successors, (153) [2022-02-20 21:51:40,877 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 968 states to 968 states and 1361 transitions. [2022-02-20 21:51:40,878 INFO L78 Accepts]: Start accepts. Automaton has 968 states and 1361 transitions. Word has length 50 [2022-02-20 21:51:40,879 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:51:40,879 INFO L470 AbstractCegarLoop]: Abstraction has 968 states and 1361 transitions. [2022-02-20 21:51:40,880 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 6.0) internal successors, (30), 3 states have internal predecessors, (30), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2022-02-20 21:51:40,880 INFO L276 IsEmpty]: Start isEmpty. Operand 968 states and 1361 transitions. [2022-02-20 21:51:40,882 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2022-02-20 21:51:40,882 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:51:40,883 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:51:40,883 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-02-20 21:51:40,883 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:51:40,883 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:51:40,883 INFO L85 PathProgramCache]: Analyzing trace with hash 308647439, now seen corresponding path program 1 times [2022-02-20 21:51:40,883 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:51:40,884 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1610368284] [2022-02-20 21:51:40,884 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:51:40,884 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:51:40,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:40,989 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 21:51:40,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:40,999 INFO L290 TraceCheckUtils]: 0: Hoare triple {11657#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet28#1 && #t~nondet28#1 <= 2147483647;~tmp___0~1#1 := #t~nondet28#1;havoc #t~nondet28#1; {11634#true} is VALID [2022-02-20 21:51:40,999 INFO L290 TraceCheckUtils]: 1: Hoare triple {11634#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {11634#true} is VALID [2022-02-20 21:51:41,000 INFO L290 TraceCheckUtils]: 2: Hoare triple {11634#true} assume true; {11634#true} is VALID [2022-02-20 21:51:41,000 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11634#true} {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #1414#return; {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:41,005 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 9 [2022-02-20 21:51:41,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:41,015 INFO L290 TraceCheckUtils]: 0: Hoare triple {11658#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {11634#true} is VALID [2022-02-20 21:51:41,016 INFO L290 TraceCheckUtils]: 1: Hoare triple {11634#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {11634#true} is VALID [2022-02-20 21:51:41,016 INFO L290 TraceCheckUtils]: 2: Hoare triple {11634#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {11634#true} is VALID [2022-02-20 21:51:41,017 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11634#true} {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #1416#return; {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:41,017 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 15 [2022-02-20 21:51:41,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:41,026 INFO L290 TraceCheckUtils]: 0: Hoare triple {11658#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {11634#true} is VALID [2022-02-20 21:51:41,026 INFO L290 TraceCheckUtils]: 1: Hoare triple {11634#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {11634#true} is VALID [2022-02-20 21:51:41,026 INFO L290 TraceCheckUtils]: 2: Hoare triple {11634#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {11634#true} is VALID [2022-02-20 21:51:41,027 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11634#true} {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #1418#return; {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:41,027 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 21 [2022-02-20 21:51:41,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:41,036 INFO L290 TraceCheckUtils]: 0: Hoare triple {11658#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {11634#true} is VALID [2022-02-20 21:51:41,036 INFO L290 TraceCheckUtils]: 1: Hoare triple {11634#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {11634#true} is VALID [2022-02-20 21:51:41,036 INFO L290 TraceCheckUtils]: 2: Hoare triple {11634#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {11634#true} is VALID [2022-02-20 21:51:41,037 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11634#true} {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #1420#return; {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:41,038 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 35 [2022-02-20 21:51:41,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:41,047 INFO L290 TraceCheckUtils]: 0: Hoare triple {11657#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet28#1 && #t~nondet28#1 <= 2147483647;~tmp___0~1#1 := #t~nondet28#1;havoc #t~nondet28#1; {11634#true} is VALID [2022-02-20 21:51:41,048 INFO L290 TraceCheckUtils]: 1: Hoare triple {11634#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {11634#true} is VALID [2022-02-20 21:51:41,048 INFO L290 TraceCheckUtils]: 2: Hoare triple {11634#true} assume true; {11634#true} is VALID [2022-02-20 21:51:41,048 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11634#true} {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #1434#return; {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:41,054 INFO L290 TraceCheckUtils]: 0: Hoare triple {11634#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(82, 2);call #Ultimate.allocInit(9, 3);call #Ultimate.allocInit(22, 4);call #Ultimate.allocInit(219, 5);call #Ultimate.allocInit(24, 6);call #Ultimate.allocInit(24, 7);call #Ultimate.allocInit(22, 8);call #Ultimate.allocInit(24, 9);call #Ultimate.allocInit(9, 10);call #Ultimate.allocInit(18, 11);call #Ultimate.allocInit(219, 12);call #Ultimate.allocInit(36, 13);call #Ultimate.allocInit(36, 14);call #Ultimate.allocInit(9, 15);call #Ultimate.allocInit(18, 16);call #Ultimate.allocInit(219, 17);call #Ultimate.allocInit(67, 18);call #Ultimate.allocInit(67, 19);call #Ultimate.allocInit(9, 20);call #Ultimate.allocInit(9, 21);call #Ultimate.allocInit(9, 22);call #Ultimate.allocInit(9, 23);~LDV_IN_INTERRUPT~0 := 1;~cdc_mbim_info_zlp_group1~0.base, ~cdc_mbim_info_zlp_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0;~cdc_mbim_info_group0~0.base, ~cdc_mbim_info_group0~0.offset := 0, 0;~ref_cnt~0 := 0;~cdc_mbim_info_zlp_group2~0.base, ~cdc_mbim_info_zlp_group2~0.offset := 0, 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~cdc_mbim_info_group1~0.base, ~cdc_mbim_info_group1~0.offset := 0, 0;~cdc_mbim_info_zlp_group0~0.base, ~cdc_mbim_info_zlp_group0~0.offset := 0, 0;~cdc_mbim_info_group2~0.base, ~cdc_mbim_info_group2~0.offset := 0, 0;~cdc_mbim_driver_group1~0.base, ~cdc_mbim_driver_group1~0.offset := 0, 0;~#cdc_mbim_info~0.base, ~#cdc_mbim_info~0.offset := 24, 0;call #Ultimate.allocInit(124, 24);call write~init~$Pointer$(20, 0, ~#cdc_mbim_info~0.base, ~#cdc_mbim_info~0.offset, 8);call write~init~int(9232, ~#cdc_mbim_info~0.base, 8 + ~#cdc_mbim_info~0.offset, 4);call write~init~$Pointer$(#funAddr~cdc_mbim_bind.base, #funAddr~cdc_mbim_bind.offset, ~#cdc_mbim_info~0.base, 12 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_unbind.base, #funAddr~cdc_mbim_unbind.offset, ~#cdc_mbim_info~0.base, 20 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 28 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 36 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 44 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_manage_power.base, #funAddr~cdc_mbim_manage_power.offset, ~#cdc_mbim_info~0.base, 52 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 60 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 68 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_rx_fixup.base, #funAddr~cdc_mbim_rx_fixup.offset, ~#cdc_mbim_info~0.base, 76 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_tx_fixup.base, #funAddr~cdc_mbim_tx_fixup.offset, ~#cdc_mbim_info~0.base, 84 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 92 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 100 + ~#cdc_mbim_info~0.offset, 8);call write~init~int(0, ~#cdc_mbim_info~0.base, 108 + ~#cdc_mbim_info~0.offset, 4);call write~init~int(0, ~#cdc_mbim_info~0.base, 112 + ~#cdc_mbim_info~0.offset, 4);call write~init~int(0, ~#cdc_mbim_info~0.base, 116 + ~#cdc_mbim_info~0.offset, 8);~#cdc_mbim_info_zlp~0.base, ~#cdc_mbim_info_zlp~0.offset := 25, 0;call #Ultimate.allocInit(124, 25);call write~init~$Pointer$(21, 0, ~#cdc_mbim_info_zlp~0.base, ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~int(9744, ~#cdc_mbim_info_zlp~0.base, 8 + ~#cdc_mbim_info_zlp~0.offset, 4);call write~init~$Pointer$(#funAddr~cdc_mbim_bind.base, #funAddr~cdc_mbim_bind.offset, ~#cdc_mbim_info_zlp~0.base, 12 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_unbind.base, #funAddr~cdc_mbim_unbind.offset, ~#cdc_mbim_info_zlp~0.base, 20 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 28 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 36 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 44 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_manage_power.base, #funAddr~cdc_mbim_manage_power.offset, ~#cdc_mbim_info_zlp~0.base, 52 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 60 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 68 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_rx_fixup.base, #funAddr~cdc_mbim_rx_fixup.offset, ~#cdc_mbim_info_zlp~0.base, 76 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_tx_fixup.base, #funAddr~cdc_mbim_tx_fixup.offset, ~#cdc_mbim_info_zlp~0.base, 84 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 92 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 100 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~int(0, ~#cdc_mbim_info_zlp~0.base, 108 + ~#cdc_mbim_info_zlp~0.offset, 4);call write~init~int(0, ~#cdc_mbim_info_zlp~0.base, 112 + ~#cdc_mbim_info_zlp~0.offset, 4);call write~init~int(0, ~#cdc_mbim_info_zlp~0.base, 116 + ~#cdc_mbim_info_zlp~0.offset, 8);~#mbim_devs~0.base, ~#mbim_devs~0.offset := 26, 0;call #Ultimate.allocInit(125, 26);call write~init~int(896, ~#mbim_devs~0.base, ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 2 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 4 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 6 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 8 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 10 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 11 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 12 + ~#mbim_devs~0.offset, 1);call write~init~int(2, ~#mbim_devs~0.base, 13 + ~#mbim_devs~0.offset, 1);call write~init~int(13, ~#mbim_devs~0.base, 14 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 15 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 16 + ~#mbim_devs~0.offset, 1);call write~init~int(~#cdc_mbim_info~0.base + ~#cdc_mbim_info~0.offset, ~#mbim_devs~0.base, 17 + ~#mbim_devs~0.offset, 8);call write~init~int(899, ~#mbim_devs~0.base, 25 + ~#mbim_devs~0.offset, 2);call write~init~int(4505, ~#mbim_devs~0.base, 27 + ~#mbim_devs~0.offset, 2);call write~init~int(26786, ~#mbim_devs~0.base, 29 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 31 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 33 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 35 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 36 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 37 + ~#mbim_devs~0.offset, 1);call write~init~int(2, ~#mbim_devs~0.base, 38 + ~#mbim_devs~0.offset, 1);call write~init~int(14, ~#mbim_devs~0.base, 39 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 40 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 41 + ~#mbim_devs~0.offset, 1);call write~init~int(~#cdc_mbim_info_zlp~0.base + ~#cdc_mbim_info_zlp~0.offset, ~#mbim_devs~0.base, 42 + ~#mbim_devs~0.offset, 8);call write~init~int(899, ~#mbim_devs~0.base, 50 + ~#mbim_devs~0.offset, 2);call write~init~int(1008, ~#mbim_devs~0.base, 52 + ~#mbim_devs~0.offset, 2);call write~init~int(19229, ~#mbim_devs~0.base, 54 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 56 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 58 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 60 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 61 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 62 + ~#mbim_devs~0.offset, 1);call write~init~int(2, ~#mbim_devs~0.base, 63 + ~#mbim_devs~0.offset, 1);call write~init~int(14, ~#mbim_devs~0.base, 64 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 65 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 66 + ~#mbim_devs~0.offset, 1);call write~init~int(~#cdc_mbim_info_zlp~0.base + ~#cdc_mbim_info_zlp~0.offset, ~#mbim_devs~0.base, 67 + ~#mbim_devs~0.offset, 8);call write~init~int(896, ~#mbim_devs~0.base, 75 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 77 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 79 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 81 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 83 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 85 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 86 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 87 + ~#mbim_devs~0.offset, 1);call write~init~int(2, ~#mbim_devs~0.base, 88 + ~#mbim_devs~0.offset, 1);call write~init~int(14, ~#mbim_devs~0.base, 89 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 90 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 91 + ~#mbim_devs~0.offset, 1);call write~init~int(~#cdc_mbim_info~0.base + ~#cdc_mbim_info~0.offset, ~#mbim_devs~0.base, 92 + ~#mbim_devs~0.offset, 8);call write~init~int(0, ~#mbim_devs~0.base, 100 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 102 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 104 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 106 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 108 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 110 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 111 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 112 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 113 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 114 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 115 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 116 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 117 + ~#mbim_devs~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.bInterfaceNumber := 0;~__mod_usb_device_table~0.driver_info := 0;~#cdc_mbim_driver~0.base, ~#cdc_mbim_driver~0.offset := 27, 0;call #Ultimate.allocInit(285, 27);call write~init~$Pointer$(22, 0, ~#cdc_mbim_driver~0.base, ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usbnet_probe.base, #funAddr~usbnet_probe.offset, ~#cdc_mbim_driver~0.base, 8 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usbnet_disconnect.base, #funAddr~usbnet_disconnect.offset, ~#cdc_mbim_driver~0.base, 16 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 24 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_suspend.base, #funAddr~cdc_mbim_suspend.offset, ~#cdc_mbim_driver~0.base, 32 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_resume.base, #funAddr~cdc_mbim_resume.offset, ~#cdc_mbim_driver~0.base, 40 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_resume.base, #funAddr~cdc_mbim_resume.offset, ~#cdc_mbim_driver~0.base, 48 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 56 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 64 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(~#mbim_devs~0.base, ~#mbim_devs~0.offset, ~#cdc_mbim_driver~0.base, 72 + ~#cdc_mbim_driver~0.offset, 8);call write~init~int(0, ~#cdc_mbim_driver~0.base, 80 + ~#cdc_mbim_driver~0.offset, 4);call write~init~int(0, ~#cdc_mbim_driver~0.base, 84 + ~#cdc_mbim_driver~0.offset, 4);call write~init~int(0, ~#cdc_mbim_driver~0.base, 88 + ~#cdc_mbim_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 92 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 100 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 108 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 116 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 124 + ~#cdc_mbim_driver~0.offset, 8);call write~init~int(0, ~#cdc_mbim_driver~0.base, 132 + ~#cdc_mbim_driver~0.offset, 4);call write~init~int(0, ~#cdc_mbim_driver~0.base, 136 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 148 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 156 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 164 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 172 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 180 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 188 + ~#cdc_mbim_driver~0.offset, 8);call write~init~int(0, ~#cdc_mbim_driver~0.base, 196 + ~#cdc_mbim_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 197 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 205 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 213 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 221 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 229 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 237 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 245 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 253 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 261 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 269 + ~#cdc_mbim_driver~0.offset, 8);call write~init~int(0, ~#cdc_mbim_driver~0.base, 277 + ~#cdc_mbim_driver~0.offset, 4);call write~init~int(0, ~#cdc_mbim_driver~0.base, 281 + ~#cdc_mbim_driver~0.offset, 1);call write~init~int(1, ~#cdc_mbim_driver~0.base, 282 + ~#cdc_mbim_driver~0.offset, 1);call write~init~int(1, ~#cdc_mbim_driver~0.base, 283 + ~#cdc_mbim_driver~0.offset, 1);call write~init~int(0, ~#cdc_mbim_driver~0.base, 284 + ~#cdc_mbim_driver~0.offset, 1);~ldv_retval_2~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_5~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_6~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:41,055 INFO L290 TraceCheckUtils]: 1: Hoare triple {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret287#1.base, main_#t~ret287#1.offset, main_#t~nondet288#1, main_#t~nondet289#1, main_#t~memset~res290#1.base, main_#t~memset~res290#1.offset, main_#t~memset~res291#1.base, main_#t~memset~res291#1.offset, main_#t~memset~res292#1.base, main_#t~memset~res292#1.offset, main_#t~nondet293#1, main_#t~switch294#1, main_#t~nondet295#1, main_#t~switch296#1, main_#t~ret297#1, main_#t~ret298#1, main_#t~mem299#1, main_#t~ret300#1, main_#t~ret301#1, main_#t~nondet302#1, main_#t~switch303#1, main_#t~ret304#1, main_#t~nondet305#1, main_#t~switch306#1, main_#t~ret307#1, main_#t~ret308#1, main_#t~ret309#1, main_#t~mem310#1, main_#t~ret311#1.base, main_#t~ret311#1.offset, main_#t~mem312#1, main_#t~ret313#1.base, main_#t~ret313#1.offset, main_#t~ret314#1, main_#t~ret315#1, main_#t~nondet316#1, main_#t~switch317#1, main_#t~ret318#1, main_#t~ret319#1, main_#t~ret320#1, main_#t~mem321#1, main_#t~ret322#1.base, main_#t~ret322#1.offset, main_#t~mem323#1, main_#t~ret324#1.base, main_#t~ret324#1.offset, main_#t~ret325#1, main_#t~ret326#1, main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset, main_~tmp~27#1.base, main_~tmp~27#1.offset, main_~#ldvarg0~0#1.base, main_~#ldvarg0~0#1.offset, main_~#ldvarg3~0#1.base, main_~#ldvarg3~0#1.offset, main_~ldvarg2~0#1, main_~tmp___0~14#1, main_~ldvarg4~0#1, main_~tmp___1~9#1, main_~#ldvarg5~0#1.base, main_~#ldvarg5~0#1.offset, main_~tmp___2~3#1, main_~tmp___3~0#1, main_~tmp___4~1#1, main_~tmp___5~0#1, main_~tmp___6~0#1;havoc main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset;havoc main_~tmp~27#1.base, main_~tmp~27#1.offset;call main_~#ldvarg0~0#1.base, main_~#ldvarg0~0#1.offset := #Ultimate.allocOnStack(4);call main_~#ldvarg3~0#1.base, main_~#ldvarg3~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~ldvarg2~0#1;havoc main_~tmp___0~14#1;havoc main_~ldvarg4~0#1;havoc main_~tmp___1~9#1;call main_~#ldvarg5~0#1.base, main_~#ldvarg5~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~tmp___2~3#1;havoc main_~tmp___3~0#1;havoc main_~tmp___4~1#1;havoc main_~tmp___5~0#1;havoc main_~tmp___6~0#1; {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:41,055 INFO L272 TraceCheckUtils]: 2: Hoare triple {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} call main_#t~ret287#1.base, main_#t~ret287#1.offset := ldv_zalloc(32); {11657#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:41,055 INFO L290 TraceCheckUtils]: 3: Hoare triple {11657#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet28#1 && #t~nondet28#1 <= 2147483647;~tmp___0~1#1 := #t~nondet28#1;havoc #t~nondet28#1; {11634#true} is VALID [2022-02-20 21:51:41,056 INFO L290 TraceCheckUtils]: 4: Hoare triple {11634#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {11634#true} is VALID [2022-02-20 21:51:41,056 INFO L290 TraceCheckUtils]: 5: Hoare triple {11634#true} assume true; {11634#true} is VALID [2022-02-20 21:51:41,056 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {11634#true} {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #1414#return; {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:41,057 INFO L290 TraceCheckUtils]: 7: Hoare triple {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} main_~tmp~27#1.base, main_~tmp~27#1.offset := main_#t~ret287#1.base, main_#t~ret287#1.offset;havoc main_#t~ret287#1.base, main_#t~ret287#1.offset;main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset := main_~tmp~27#1.base, main_~tmp~27#1.offset;assume -2147483648 <= main_#t~nondet288#1 && main_#t~nondet288#1 <= 2147483647;main_~tmp___0~14#1 := main_#t~nondet288#1;havoc main_#t~nondet288#1;main_~ldvarg2~0#1 := main_~tmp___0~14#1;assume -2147483648 <= main_#t~nondet289#1 && main_#t~nondet289#1 <= 2147483647;main_~tmp___1~9#1 := main_#t~nondet289#1;havoc main_#t~nondet289#1;main_~ldvarg4~0#1 := main_~tmp___1~9#1;assume { :begin_inline_ldv_initialize } true; {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:41,057 INFO L290 TraceCheckUtils]: 8: Hoare triple {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume { :end_inline_ldv_initialize } true; {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:41,058 INFO L272 TraceCheckUtils]: 9: Hoare triple {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} call main_#t~memset~res290#1.base, main_#t~memset~res290#1.offset := #Ultimate.C_memset(main_~#ldvarg0~0#1.base, main_~#ldvarg0~0#1.offset, 0, 4); {11658#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 21:51:41,058 INFO L290 TraceCheckUtils]: 10: Hoare triple {11658#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {11634#true} is VALID [2022-02-20 21:51:41,058 INFO L290 TraceCheckUtils]: 11: Hoare triple {11634#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {11634#true} is VALID [2022-02-20 21:51:41,059 INFO L290 TraceCheckUtils]: 12: Hoare triple {11634#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {11634#true} is VALID [2022-02-20 21:51:41,059 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {11634#true} {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #1416#return; {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:41,060 INFO L290 TraceCheckUtils]: 14: Hoare triple {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} havoc main_#t~memset~res290#1.base, main_#t~memset~res290#1.offset; {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:41,060 INFO L272 TraceCheckUtils]: 15: Hoare triple {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} call main_#t~memset~res291#1.base, main_#t~memset~res291#1.offset := #Ultimate.C_memset(main_~#ldvarg3~0#1.base, main_~#ldvarg3~0#1.offset, 0, 4); {11658#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 21:51:41,061 INFO L290 TraceCheckUtils]: 16: Hoare triple {11658#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {11634#true} is VALID [2022-02-20 21:51:41,061 INFO L290 TraceCheckUtils]: 17: Hoare triple {11634#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {11634#true} is VALID [2022-02-20 21:51:41,061 INFO L290 TraceCheckUtils]: 18: Hoare triple {11634#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {11634#true} is VALID [2022-02-20 21:51:41,062 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {11634#true} {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #1418#return; {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:41,062 INFO L290 TraceCheckUtils]: 20: Hoare triple {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} havoc main_#t~memset~res291#1.base, main_#t~memset~res291#1.offset; {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:41,063 INFO L272 TraceCheckUtils]: 21: Hoare triple {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} call main_#t~memset~res292#1.base, main_#t~memset~res292#1.offset := #Ultimate.C_memset(main_~#ldvarg5~0#1.base, main_~#ldvarg5~0#1.offset, 0, 4); {11658#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 21:51:41,063 INFO L290 TraceCheckUtils]: 22: Hoare triple {11658#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {11634#true} is VALID [2022-02-20 21:51:41,063 INFO L290 TraceCheckUtils]: 23: Hoare triple {11634#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {11634#true} is VALID [2022-02-20 21:51:41,063 INFO L290 TraceCheckUtils]: 24: Hoare triple {11634#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {11634#true} is VALID [2022-02-20 21:51:41,064 INFO L284 TraceCheckUtils]: 25: Hoare quadruple {11634#true} {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #1420#return; {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:41,064 INFO L290 TraceCheckUtils]: 26: Hoare triple {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} havoc main_#t~memset~res292#1.base, main_#t~memset~res292#1.offset;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:41,065 INFO L290 TraceCheckUtils]: 27: Hoare triple {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume -2147483648 <= main_#t~nondet293#1 && main_#t~nondet293#1 <= 2147483647;main_~tmp___2~3#1 := main_#t~nondet293#1;havoc main_#t~nondet293#1;main_#t~switch294#1 := 0 == main_~tmp___2~3#1; {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:41,065 INFO L290 TraceCheckUtils]: 28: Hoare triple {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume !main_#t~switch294#1;main_#t~switch294#1 := main_#t~switch294#1 || 1 == main_~tmp___2~3#1; {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:41,066 INFO L290 TraceCheckUtils]: 29: Hoare triple {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume main_#t~switch294#1; {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:41,067 INFO L290 TraceCheckUtils]: 30: Hoare triple {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet302#1 && main_#t~nondet302#1 <= 2147483647;main_~tmp___4~1#1 := main_#t~nondet302#1;havoc main_#t~nondet302#1;main_#t~switch303#1 := 0 == main_~tmp___4~1#1; {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:41,067 INFO L290 TraceCheckUtils]: 31: Hoare triple {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume !main_#t~switch303#1;main_#t~switch303#1 := main_#t~switch303#1 || 1 == main_~tmp___4~1#1; {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:41,068 INFO L290 TraceCheckUtils]: 32: Hoare triple {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume main_#t~switch303#1; {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:41,068 INFO L290 TraceCheckUtils]: 33: Hoare triple {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_cdc_mbim_driver_init } true;havoc cdc_mbim_driver_init_#res#1;havoc cdc_mbim_driver_init_#t~ret279#1, cdc_mbim_driver_init_~tmp~23#1;havoc cdc_mbim_driver_init_~tmp~23#1;assume { :begin_inline_ldv_usb_register_driver_7 } true;ldv_usb_register_driver_7_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_7_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_7_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_7_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_7_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_7_#in~ldv_func_arg3#1.offset := ~#cdc_mbim_driver~0.base, ~#cdc_mbim_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 23, 0;havoc ldv_usb_register_driver_7_#res#1;havoc ldv_usb_register_driver_7_#t~ret329#1, ldv_usb_register_driver_7_~ldv_func_arg1#1.base, ldv_usb_register_driver_7_~ldv_func_arg1#1.offset, ldv_usb_register_driver_7_~ldv_func_arg2#1.base, ldv_usb_register_driver_7_~ldv_func_arg2#1.offset, ldv_usb_register_driver_7_~ldv_func_arg3#1.base, ldv_usb_register_driver_7_~ldv_func_arg3#1.offset, ldv_usb_register_driver_7_~ldv_func_res~0#1, ldv_usb_register_driver_7_~tmp~30#1;ldv_usb_register_driver_7_~ldv_func_arg1#1.base, ldv_usb_register_driver_7_~ldv_func_arg1#1.offset := ldv_usb_register_driver_7_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_7_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_7_~ldv_func_arg2#1.base, ldv_usb_register_driver_7_~ldv_func_arg2#1.offset := ldv_usb_register_driver_7_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_7_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_7_~ldv_func_arg3#1.base, ldv_usb_register_driver_7_~ldv_func_arg3#1.offset := ldv_usb_register_driver_7_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_7_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_7_~ldv_func_res~0#1;havoc ldv_usb_register_driver_7_~tmp~30#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_7_~ldv_func_arg1#1.base, ldv_usb_register_driver_7_~ldv_func_arg1#1.offset, ldv_usb_register_driver_7_~ldv_func_arg2#1.base, ldv_usb_register_driver_7_~ldv_func_arg2#1.offset, ldv_usb_register_driver_7_~ldv_func_arg3#1.base, ldv_usb_register_driver_7_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet357#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet357#1 && usb_register_driver_#t~nondet357#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet357#1;havoc usb_register_driver_#t~nondet357#1; {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:41,069 INFO L290 TraceCheckUtils]: 34: Hoare triple {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} ldv_usb_register_driver_7_#t~ret329#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_7_#t~ret329#1 && ldv_usb_register_driver_7_#t~ret329#1 <= 2147483647;ldv_usb_register_driver_7_~tmp~30#1 := ldv_usb_register_driver_7_#t~ret329#1;havoc ldv_usb_register_driver_7_#t~ret329#1;ldv_usb_register_driver_7_~ldv_func_res~0#1 := ldv_usb_register_driver_7_~tmp~30#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret286#1.base, ldv_usb_driver_1_#t~ret286#1.offset, ldv_usb_driver_1_~tmp~26#1.base, ldv_usb_driver_1_~tmp~26#1.offset;havoc ldv_usb_driver_1_~tmp~26#1.base, ldv_usb_driver_1_~tmp~26#1.offset; {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:41,069 INFO L272 TraceCheckUtils]: 35: Hoare triple {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} call ldv_usb_driver_1_#t~ret286#1.base, ldv_usb_driver_1_#t~ret286#1.offset := ldv_zalloc(1520); {11657#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:41,070 INFO L290 TraceCheckUtils]: 36: Hoare triple {11657#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet28#1 && #t~nondet28#1 <= 2147483647;~tmp___0~1#1 := #t~nondet28#1;havoc #t~nondet28#1; {11634#true} is VALID [2022-02-20 21:51:41,070 INFO L290 TraceCheckUtils]: 37: Hoare triple {11634#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {11634#true} is VALID [2022-02-20 21:51:41,070 INFO L290 TraceCheckUtils]: 38: Hoare triple {11634#true} assume true; {11634#true} is VALID [2022-02-20 21:51:41,070 INFO L284 TraceCheckUtils]: 39: Hoare quadruple {11634#true} {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #1434#return; {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:41,071 INFO L290 TraceCheckUtils]: 40: Hoare triple {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} ldv_usb_driver_1_~tmp~26#1.base, ldv_usb_driver_1_~tmp~26#1.offset := ldv_usb_driver_1_#t~ret286#1.base, ldv_usb_driver_1_#t~ret286#1.offset;havoc ldv_usb_driver_1_#t~ret286#1.base, ldv_usb_driver_1_#t~ret286#1.offset;~cdc_mbim_driver_group1~0.base, ~cdc_mbim_driver_group1~0.offset := ldv_usb_driver_1_~tmp~26#1.base, ldv_usb_driver_1_~tmp~26#1.offset; {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:41,071 INFO L290 TraceCheckUtils]: 41: Hoare triple {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_7_#res#1 := ldv_usb_register_driver_7_~ldv_func_res~0#1; {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:41,072 INFO L290 TraceCheckUtils]: 42: Hoare triple {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} cdc_mbim_driver_init_#t~ret279#1 := ldv_usb_register_driver_7_#res#1;assume { :end_inline_ldv_usb_register_driver_7 } true;assume -2147483648 <= cdc_mbim_driver_init_#t~ret279#1 && cdc_mbim_driver_init_#t~ret279#1 <= 2147483647;cdc_mbim_driver_init_~tmp~23#1 := cdc_mbim_driver_init_#t~ret279#1;havoc cdc_mbim_driver_init_#t~ret279#1;cdc_mbim_driver_init_#res#1 := cdc_mbim_driver_init_~tmp~23#1; {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:41,072 INFO L290 TraceCheckUtils]: 43: Hoare triple {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} main_#t~ret304#1 := cdc_mbim_driver_init_#res#1;assume { :end_inline_cdc_mbim_driver_init } true;assume -2147483648 <= main_#t~ret304#1 && main_#t~ret304#1 <= 2147483647;~ldv_retval_4~0 := main_#t~ret304#1;havoc main_#t~ret304#1; {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:41,072 INFO L290 TraceCheckUtils]: 44: Hoare triple {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume !(0 == ~ldv_retval_4~0); {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:41,073 INFO L290 TraceCheckUtils]: 45: Hoare triple {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume 0 != ~ldv_retval_4~0;~ldv_state_variable_0~0 := 2; {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:41,073 INFO L290 TraceCheckUtils]: 46: Hoare triple {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume { :begin_inline_ldv_check_final_state } true; {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:41,073 INFO L290 TraceCheckUtils]: 47: Hoare triple {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume 0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616; {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:41,074 INFO L290 TraceCheckUtils]: 48: Hoare triple {11636#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume !(0 == (~usb_dev~0.base + ~usb_dev~0.offset) % 18446744073709551616); {11635#false} is VALID [2022-02-20 21:51:41,074 INFO L272 TraceCheckUtils]: 49: Hoare triple {11635#false} call ldv_error(); {11635#false} is VALID [2022-02-20 21:51:41,074 INFO L290 TraceCheckUtils]: 50: Hoare triple {11635#false} assume !false; {11635#false} is VALID [2022-02-20 21:51:41,075 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-02-20 21:51:41,075 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:51:41,075 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1610368284] [2022-02-20 21:51:41,075 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1610368284] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:51:41,075 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:51:41,075 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-02-20 21:51:41,075 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1439730931] [2022-02-20 21:51:41,076 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:51:41,076 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 6.2) internal successors, (31), 3 states have internal predecessors, (31), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 51 [2022-02-20 21:51:41,076 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:51:41,077 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 6.2) internal successors, (31), 3 states have internal predecessors, (31), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2022-02-20 21:51:41,115 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 42 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:51:41,115 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-02-20 21:51:41,115 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:51:41,116 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-02-20 21:51:41,116 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-02-20 21:51:41,116 INFO L87 Difference]: Start difference. First operand 968 states and 1361 transitions. Second operand has 5 states, 5 states have (on average 6.2) internal successors, (31), 3 states have internal predecessors, (31), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2022-02-20 21:51:43,847 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:51:43,848 INFO L93 Difference]: Finished difference Result 1130 states and 1629 transitions. [2022-02-20 21:51:43,848 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-02-20 21:51:43,848 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 6.2) internal successors, (31), 3 states have internal predecessors, (31), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 51 [2022-02-20 21:51:43,848 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:51:43,849 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 6.2) internal successors, (31), 3 states have internal predecessors, (31), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2022-02-20 21:51:43,855 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 853 transitions. [2022-02-20 21:51:43,855 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 6.2) internal successors, (31), 3 states have internal predecessors, (31), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2022-02-20 21:51:43,861 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 853 transitions. [2022-02-20 21:51:43,861 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 853 transitions. [2022-02-20 21:51:44,514 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 853 edges. 853 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:51:44,573 INFO L225 Difference]: With dead ends: 1130 [2022-02-20 21:51:44,573 INFO L226 Difference]: Without dead ends: 1127 [2022-02-20 21:51:44,574 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-02-20 21:51:44,574 INFO L933 BasicCegarLoop]: 651 mSDtfsCounter, 945 mSDsluCounter, 815 mSDsCounter, 0 mSdLazyCounter, 352 mSolverCounterSat, 259 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 997 SdHoareTripleChecker+Valid, 1466 SdHoareTripleChecker+Invalid, 611 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 259 IncrementalHoareTripleChecker+Valid, 352 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-02-20 21:51:44,575 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [997 Valid, 1466 Invalid, 611 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [259 Valid, 352 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2022-02-20 21:51:44,576 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1127 states. [2022-02-20 21:51:44,600 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1127 to 967. [2022-02-20 21:51:44,600 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:51:44,602 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1127 states. Second operand has 967 states, 753 states have (on average 1.3930942895086322) internal successors, (1049), 758 states have internal predecessors, (1049), 157 states have call successors, (157), 57 states have call predecessors, (157), 56 states have return successors, (153), 153 states have call predecessors, (153), 153 states have call successors, (153) [2022-02-20 21:51:44,603 INFO L74 IsIncluded]: Start isIncluded. First operand 1127 states. Second operand has 967 states, 753 states have (on average 1.3930942895086322) internal successors, (1049), 758 states have internal predecessors, (1049), 157 states have call successors, (157), 57 states have call predecessors, (157), 56 states have return successors, (153), 153 states have call predecessors, (153), 153 states have call successors, (153) [2022-02-20 21:51:44,605 INFO L87 Difference]: Start difference. First operand 1127 states. Second operand has 967 states, 753 states have (on average 1.3930942895086322) internal successors, (1049), 758 states have internal predecessors, (1049), 157 states have call successors, (157), 57 states have call predecessors, (157), 56 states have return successors, (153), 153 states have call predecessors, (153), 153 states have call successors, (153) [2022-02-20 21:51:44,660 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:51:44,661 INFO L93 Difference]: Finished difference Result 1127 states and 1626 transitions. [2022-02-20 21:51:44,661 INFO L276 IsEmpty]: Start isEmpty. Operand 1127 states and 1626 transitions. [2022-02-20 21:51:44,666 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:51:44,666 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:51:44,668 INFO L74 IsIncluded]: Start isIncluded. First operand has 967 states, 753 states have (on average 1.3930942895086322) internal successors, (1049), 758 states have internal predecessors, (1049), 157 states have call successors, (157), 57 states have call predecessors, (157), 56 states have return successors, (153), 153 states have call predecessors, (153), 153 states have call successors, (153) Second operand 1127 states. [2022-02-20 21:51:44,670 INFO L87 Difference]: Start difference. First operand has 967 states, 753 states have (on average 1.3930942895086322) internal successors, (1049), 758 states have internal predecessors, (1049), 157 states have call successors, (157), 57 states have call predecessors, (157), 56 states have return successors, (153), 153 states have call predecessors, (153), 153 states have call successors, (153) Second operand 1127 states. [2022-02-20 21:51:44,711 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:51:44,711 INFO L93 Difference]: Finished difference Result 1127 states and 1626 transitions. [2022-02-20 21:51:44,711 INFO L276 IsEmpty]: Start isEmpty. Operand 1127 states and 1626 transitions. [2022-02-20 21:51:44,715 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:51:44,715 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:51:44,715 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:51:44,715 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:51:44,717 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 967 states, 753 states have (on average 1.3930942895086322) internal successors, (1049), 758 states have internal predecessors, (1049), 157 states have call successors, (157), 57 states have call predecessors, (157), 56 states have return successors, (153), 153 states have call predecessors, (153), 153 states have call successors, (153) [2022-02-20 21:51:44,759 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 967 states to 967 states and 1359 transitions. [2022-02-20 21:51:44,760 INFO L78 Accepts]: Start accepts. Automaton has 967 states and 1359 transitions. Word has length 51 [2022-02-20 21:51:44,761 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:51:44,761 INFO L470 AbstractCegarLoop]: Abstraction has 967 states and 1359 transitions. [2022-02-20 21:51:44,763 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 6.2) internal successors, (31), 3 states have internal predecessors, (31), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2022-02-20 21:51:44,763 INFO L276 IsEmpty]: Start isEmpty. Operand 967 states and 1359 transitions. [2022-02-20 21:51:44,764 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2022-02-20 21:51:44,764 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:51:44,765 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:51:44,765 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-02-20 21:51:44,765 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:51:44,766 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:51:44,766 INFO L85 PathProgramCache]: Analyzing trace with hash 977921088, now seen corresponding path program 1 times [2022-02-20 21:51:44,766 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:51:44,766 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1774535803] [2022-02-20 21:51:44,766 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:51:44,766 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:51:44,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:44,866 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 21:51:44,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:44,875 INFO L290 TraceCheckUtils]: 0: Hoare triple {16818#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet28#1 && #t~nondet28#1 <= 2147483647;~tmp___0~1#1 := #t~nondet28#1;havoc #t~nondet28#1; {16795#true} is VALID [2022-02-20 21:51:44,876 INFO L290 TraceCheckUtils]: 1: Hoare triple {16795#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {16795#true} is VALID [2022-02-20 21:51:44,876 INFO L290 TraceCheckUtils]: 2: Hoare triple {16795#true} assume true; {16795#true} is VALID [2022-02-20 21:51:44,876 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16795#true} {16797#(= ~dev_counter~0 0)} #1414#return; {16797#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:44,881 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 9 [2022-02-20 21:51:44,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:44,895 INFO L290 TraceCheckUtils]: 0: Hoare triple {16819#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {16795#true} is VALID [2022-02-20 21:51:44,895 INFO L290 TraceCheckUtils]: 1: Hoare triple {16795#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {16795#true} is VALID [2022-02-20 21:51:44,896 INFO L290 TraceCheckUtils]: 2: Hoare triple {16795#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {16795#true} is VALID [2022-02-20 21:51:44,896 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16795#true} {16797#(= ~dev_counter~0 0)} #1416#return; {16797#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:44,896 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 15 [2022-02-20 21:51:44,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:44,907 INFO L290 TraceCheckUtils]: 0: Hoare triple {16819#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {16795#true} is VALID [2022-02-20 21:51:44,908 INFO L290 TraceCheckUtils]: 1: Hoare triple {16795#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {16795#true} is VALID [2022-02-20 21:51:44,908 INFO L290 TraceCheckUtils]: 2: Hoare triple {16795#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {16795#true} is VALID [2022-02-20 21:51:44,909 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16795#true} {16797#(= ~dev_counter~0 0)} #1418#return; {16797#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:44,909 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 21 [2022-02-20 21:51:44,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:44,918 INFO L290 TraceCheckUtils]: 0: Hoare triple {16819#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {16795#true} is VALID [2022-02-20 21:51:44,919 INFO L290 TraceCheckUtils]: 1: Hoare triple {16795#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {16795#true} is VALID [2022-02-20 21:51:44,919 INFO L290 TraceCheckUtils]: 2: Hoare triple {16795#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {16795#true} is VALID [2022-02-20 21:51:44,919 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16795#true} {16797#(= ~dev_counter~0 0)} #1420#return; {16797#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:44,920 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 35 [2022-02-20 21:51:44,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:44,928 INFO L290 TraceCheckUtils]: 0: Hoare triple {16818#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet28#1 && #t~nondet28#1 <= 2147483647;~tmp___0~1#1 := #t~nondet28#1;havoc #t~nondet28#1; {16795#true} is VALID [2022-02-20 21:51:44,928 INFO L290 TraceCheckUtils]: 1: Hoare triple {16795#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {16795#true} is VALID [2022-02-20 21:51:44,928 INFO L290 TraceCheckUtils]: 2: Hoare triple {16795#true} assume true; {16795#true} is VALID [2022-02-20 21:51:44,929 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16795#true} {16797#(= ~dev_counter~0 0)} #1434#return; {16797#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:44,933 INFO L290 TraceCheckUtils]: 0: Hoare triple {16795#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(82, 2);call #Ultimate.allocInit(9, 3);call #Ultimate.allocInit(22, 4);call #Ultimate.allocInit(219, 5);call #Ultimate.allocInit(24, 6);call #Ultimate.allocInit(24, 7);call #Ultimate.allocInit(22, 8);call #Ultimate.allocInit(24, 9);call #Ultimate.allocInit(9, 10);call #Ultimate.allocInit(18, 11);call #Ultimate.allocInit(219, 12);call #Ultimate.allocInit(36, 13);call #Ultimate.allocInit(36, 14);call #Ultimate.allocInit(9, 15);call #Ultimate.allocInit(18, 16);call #Ultimate.allocInit(219, 17);call #Ultimate.allocInit(67, 18);call #Ultimate.allocInit(67, 19);call #Ultimate.allocInit(9, 20);call #Ultimate.allocInit(9, 21);call #Ultimate.allocInit(9, 22);call #Ultimate.allocInit(9, 23);~LDV_IN_INTERRUPT~0 := 1;~cdc_mbim_info_zlp_group1~0.base, ~cdc_mbim_info_zlp_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0;~cdc_mbim_info_group0~0.base, ~cdc_mbim_info_group0~0.offset := 0, 0;~ref_cnt~0 := 0;~cdc_mbim_info_zlp_group2~0.base, ~cdc_mbim_info_zlp_group2~0.offset := 0, 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~cdc_mbim_info_group1~0.base, ~cdc_mbim_info_group1~0.offset := 0, 0;~cdc_mbim_info_zlp_group0~0.base, ~cdc_mbim_info_zlp_group0~0.offset := 0, 0;~cdc_mbim_info_group2~0.base, ~cdc_mbim_info_group2~0.offset := 0, 0;~cdc_mbim_driver_group1~0.base, ~cdc_mbim_driver_group1~0.offset := 0, 0;~#cdc_mbim_info~0.base, ~#cdc_mbim_info~0.offset := 24, 0;call #Ultimate.allocInit(124, 24);call write~init~$Pointer$(20, 0, ~#cdc_mbim_info~0.base, ~#cdc_mbim_info~0.offset, 8);call write~init~int(9232, ~#cdc_mbim_info~0.base, 8 + ~#cdc_mbim_info~0.offset, 4);call write~init~$Pointer$(#funAddr~cdc_mbim_bind.base, #funAddr~cdc_mbim_bind.offset, ~#cdc_mbim_info~0.base, 12 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_unbind.base, #funAddr~cdc_mbim_unbind.offset, ~#cdc_mbim_info~0.base, 20 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 28 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 36 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 44 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_manage_power.base, #funAddr~cdc_mbim_manage_power.offset, ~#cdc_mbim_info~0.base, 52 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 60 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 68 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_rx_fixup.base, #funAddr~cdc_mbim_rx_fixup.offset, ~#cdc_mbim_info~0.base, 76 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_tx_fixup.base, #funAddr~cdc_mbim_tx_fixup.offset, ~#cdc_mbim_info~0.base, 84 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 92 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 100 + ~#cdc_mbim_info~0.offset, 8);call write~init~int(0, ~#cdc_mbim_info~0.base, 108 + ~#cdc_mbim_info~0.offset, 4);call write~init~int(0, ~#cdc_mbim_info~0.base, 112 + ~#cdc_mbim_info~0.offset, 4);call write~init~int(0, ~#cdc_mbim_info~0.base, 116 + ~#cdc_mbim_info~0.offset, 8);~#cdc_mbim_info_zlp~0.base, ~#cdc_mbim_info_zlp~0.offset := 25, 0;call #Ultimate.allocInit(124, 25);call write~init~$Pointer$(21, 0, ~#cdc_mbim_info_zlp~0.base, ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~int(9744, ~#cdc_mbim_info_zlp~0.base, 8 + ~#cdc_mbim_info_zlp~0.offset, 4);call write~init~$Pointer$(#funAddr~cdc_mbim_bind.base, #funAddr~cdc_mbim_bind.offset, ~#cdc_mbim_info_zlp~0.base, 12 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_unbind.base, #funAddr~cdc_mbim_unbind.offset, ~#cdc_mbim_info_zlp~0.base, 20 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 28 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 36 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 44 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_manage_power.base, #funAddr~cdc_mbim_manage_power.offset, ~#cdc_mbim_info_zlp~0.base, 52 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 60 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 68 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_rx_fixup.base, #funAddr~cdc_mbim_rx_fixup.offset, ~#cdc_mbim_info_zlp~0.base, 76 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_tx_fixup.base, #funAddr~cdc_mbim_tx_fixup.offset, ~#cdc_mbim_info_zlp~0.base, 84 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 92 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 100 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~int(0, ~#cdc_mbim_info_zlp~0.base, 108 + ~#cdc_mbim_info_zlp~0.offset, 4);call write~init~int(0, ~#cdc_mbim_info_zlp~0.base, 112 + ~#cdc_mbim_info_zlp~0.offset, 4);call write~init~int(0, ~#cdc_mbim_info_zlp~0.base, 116 + ~#cdc_mbim_info_zlp~0.offset, 8);~#mbim_devs~0.base, ~#mbim_devs~0.offset := 26, 0;call #Ultimate.allocInit(125, 26);call write~init~int(896, ~#mbim_devs~0.base, ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 2 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 4 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 6 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 8 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 10 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 11 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 12 + ~#mbim_devs~0.offset, 1);call write~init~int(2, ~#mbim_devs~0.base, 13 + ~#mbim_devs~0.offset, 1);call write~init~int(13, ~#mbim_devs~0.base, 14 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 15 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 16 + ~#mbim_devs~0.offset, 1);call write~init~int(~#cdc_mbim_info~0.base + ~#cdc_mbim_info~0.offset, ~#mbim_devs~0.base, 17 + ~#mbim_devs~0.offset, 8);call write~init~int(899, ~#mbim_devs~0.base, 25 + ~#mbim_devs~0.offset, 2);call write~init~int(4505, ~#mbim_devs~0.base, 27 + ~#mbim_devs~0.offset, 2);call write~init~int(26786, ~#mbim_devs~0.base, 29 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 31 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 33 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 35 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 36 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 37 + ~#mbim_devs~0.offset, 1);call write~init~int(2, ~#mbim_devs~0.base, 38 + ~#mbim_devs~0.offset, 1);call write~init~int(14, ~#mbim_devs~0.base, 39 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 40 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 41 + ~#mbim_devs~0.offset, 1);call write~init~int(~#cdc_mbim_info_zlp~0.base + ~#cdc_mbim_info_zlp~0.offset, ~#mbim_devs~0.base, 42 + ~#mbim_devs~0.offset, 8);call write~init~int(899, ~#mbim_devs~0.base, 50 + ~#mbim_devs~0.offset, 2);call write~init~int(1008, ~#mbim_devs~0.base, 52 + ~#mbim_devs~0.offset, 2);call write~init~int(19229, ~#mbim_devs~0.base, 54 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 56 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 58 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 60 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 61 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 62 + ~#mbim_devs~0.offset, 1);call write~init~int(2, ~#mbim_devs~0.base, 63 + ~#mbim_devs~0.offset, 1);call write~init~int(14, ~#mbim_devs~0.base, 64 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 65 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 66 + ~#mbim_devs~0.offset, 1);call write~init~int(~#cdc_mbim_info_zlp~0.base + ~#cdc_mbim_info_zlp~0.offset, ~#mbim_devs~0.base, 67 + ~#mbim_devs~0.offset, 8);call write~init~int(896, ~#mbim_devs~0.base, 75 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 77 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 79 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 81 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 83 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 85 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 86 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 87 + ~#mbim_devs~0.offset, 1);call write~init~int(2, ~#mbim_devs~0.base, 88 + ~#mbim_devs~0.offset, 1);call write~init~int(14, ~#mbim_devs~0.base, 89 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 90 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 91 + ~#mbim_devs~0.offset, 1);call write~init~int(~#cdc_mbim_info~0.base + ~#cdc_mbim_info~0.offset, ~#mbim_devs~0.base, 92 + ~#mbim_devs~0.offset, 8);call write~init~int(0, ~#mbim_devs~0.base, 100 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 102 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 104 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 106 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 108 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 110 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 111 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 112 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 113 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 114 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 115 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 116 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 117 + ~#mbim_devs~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.bInterfaceNumber := 0;~__mod_usb_device_table~0.driver_info := 0;~#cdc_mbim_driver~0.base, ~#cdc_mbim_driver~0.offset := 27, 0;call #Ultimate.allocInit(285, 27);call write~init~$Pointer$(22, 0, ~#cdc_mbim_driver~0.base, ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usbnet_probe.base, #funAddr~usbnet_probe.offset, ~#cdc_mbim_driver~0.base, 8 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usbnet_disconnect.base, #funAddr~usbnet_disconnect.offset, ~#cdc_mbim_driver~0.base, 16 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 24 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_suspend.base, #funAddr~cdc_mbim_suspend.offset, ~#cdc_mbim_driver~0.base, 32 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_resume.base, #funAddr~cdc_mbim_resume.offset, ~#cdc_mbim_driver~0.base, 40 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_resume.base, #funAddr~cdc_mbim_resume.offset, ~#cdc_mbim_driver~0.base, 48 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 56 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 64 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(~#mbim_devs~0.base, ~#mbim_devs~0.offset, ~#cdc_mbim_driver~0.base, 72 + ~#cdc_mbim_driver~0.offset, 8);call write~init~int(0, ~#cdc_mbim_driver~0.base, 80 + ~#cdc_mbim_driver~0.offset, 4);call write~init~int(0, ~#cdc_mbim_driver~0.base, 84 + ~#cdc_mbim_driver~0.offset, 4);call write~init~int(0, ~#cdc_mbim_driver~0.base, 88 + ~#cdc_mbim_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 92 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 100 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 108 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 116 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 124 + ~#cdc_mbim_driver~0.offset, 8);call write~init~int(0, ~#cdc_mbim_driver~0.base, 132 + ~#cdc_mbim_driver~0.offset, 4);call write~init~int(0, ~#cdc_mbim_driver~0.base, 136 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 148 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 156 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 164 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 172 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 180 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 188 + ~#cdc_mbim_driver~0.offset, 8);call write~init~int(0, ~#cdc_mbim_driver~0.base, 196 + ~#cdc_mbim_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 197 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 205 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 213 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 221 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 229 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 237 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 245 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 253 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 261 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 269 + ~#cdc_mbim_driver~0.offset, 8);call write~init~int(0, ~#cdc_mbim_driver~0.base, 277 + ~#cdc_mbim_driver~0.offset, 4);call write~init~int(0, ~#cdc_mbim_driver~0.base, 281 + ~#cdc_mbim_driver~0.offset, 1);call write~init~int(1, ~#cdc_mbim_driver~0.base, 282 + ~#cdc_mbim_driver~0.offset, 1);call write~init~int(1, ~#cdc_mbim_driver~0.base, 283 + ~#cdc_mbim_driver~0.offset, 1);call write~init~int(0, ~#cdc_mbim_driver~0.base, 284 + ~#cdc_mbim_driver~0.offset, 1);~ldv_retval_2~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_5~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_6~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {16797#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:44,934 INFO L290 TraceCheckUtils]: 1: Hoare triple {16797#(= ~dev_counter~0 0)} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret287#1.base, main_#t~ret287#1.offset, main_#t~nondet288#1, main_#t~nondet289#1, main_#t~memset~res290#1.base, main_#t~memset~res290#1.offset, main_#t~memset~res291#1.base, main_#t~memset~res291#1.offset, main_#t~memset~res292#1.base, main_#t~memset~res292#1.offset, main_#t~nondet293#1, main_#t~switch294#1, main_#t~nondet295#1, main_#t~switch296#1, main_#t~ret297#1, main_#t~ret298#1, main_#t~mem299#1, main_#t~ret300#1, main_#t~ret301#1, main_#t~nondet302#1, main_#t~switch303#1, main_#t~ret304#1, main_#t~nondet305#1, main_#t~switch306#1, main_#t~ret307#1, main_#t~ret308#1, main_#t~ret309#1, main_#t~mem310#1, main_#t~ret311#1.base, main_#t~ret311#1.offset, main_#t~mem312#1, main_#t~ret313#1.base, main_#t~ret313#1.offset, main_#t~ret314#1, main_#t~ret315#1, main_#t~nondet316#1, main_#t~switch317#1, main_#t~ret318#1, main_#t~ret319#1, main_#t~ret320#1, main_#t~mem321#1, main_#t~ret322#1.base, main_#t~ret322#1.offset, main_#t~mem323#1, main_#t~ret324#1.base, main_#t~ret324#1.offset, main_#t~ret325#1, main_#t~ret326#1, main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset, main_~tmp~27#1.base, main_~tmp~27#1.offset, main_~#ldvarg0~0#1.base, main_~#ldvarg0~0#1.offset, main_~#ldvarg3~0#1.base, main_~#ldvarg3~0#1.offset, main_~ldvarg2~0#1, main_~tmp___0~14#1, main_~ldvarg4~0#1, main_~tmp___1~9#1, main_~#ldvarg5~0#1.base, main_~#ldvarg5~0#1.offset, main_~tmp___2~3#1, main_~tmp___3~0#1, main_~tmp___4~1#1, main_~tmp___5~0#1, main_~tmp___6~0#1;havoc main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset;havoc main_~tmp~27#1.base, main_~tmp~27#1.offset;call main_~#ldvarg0~0#1.base, main_~#ldvarg0~0#1.offset := #Ultimate.allocOnStack(4);call main_~#ldvarg3~0#1.base, main_~#ldvarg3~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~ldvarg2~0#1;havoc main_~tmp___0~14#1;havoc main_~ldvarg4~0#1;havoc main_~tmp___1~9#1;call main_~#ldvarg5~0#1.base, main_~#ldvarg5~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~tmp___2~3#1;havoc main_~tmp___3~0#1;havoc main_~tmp___4~1#1;havoc main_~tmp___5~0#1;havoc main_~tmp___6~0#1; {16797#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:44,934 INFO L272 TraceCheckUtils]: 2: Hoare triple {16797#(= ~dev_counter~0 0)} call main_#t~ret287#1.base, main_#t~ret287#1.offset := ldv_zalloc(32); {16818#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:44,934 INFO L290 TraceCheckUtils]: 3: Hoare triple {16818#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet28#1 && #t~nondet28#1 <= 2147483647;~tmp___0~1#1 := #t~nondet28#1;havoc #t~nondet28#1; {16795#true} is VALID [2022-02-20 21:51:44,935 INFO L290 TraceCheckUtils]: 4: Hoare triple {16795#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {16795#true} is VALID [2022-02-20 21:51:44,935 INFO L290 TraceCheckUtils]: 5: Hoare triple {16795#true} assume true; {16795#true} is VALID [2022-02-20 21:51:44,939 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {16795#true} {16797#(= ~dev_counter~0 0)} #1414#return; {16797#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:44,940 INFO L290 TraceCheckUtils]: 7: Hoare triple {16797#(= ~dev_counter~0 0)} main_~tmp~27#1.base, main_~tmp~27#1.offset := main_#t~ret287#1.base, main_#t~ret287#1.offset;havoc main_#t~ret287#1.base, main_#t~ret287#1.offset;main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset := main_~tmp~27#1.base, main_~tmp~27#1.offset;assume -2147483648 <= main_#t~nondet288#1 && main_#t~nondet288#1 <= 2147483647;main_~tmp___0~14#1 := main_#t~nondet288#1;havoc main_#t~nondet288#1;main_~ldvarg2~0#1 := main_~tmp___0~14#1;assume -2147483648 <= main_#t~nondet289#1 && main_#t~nondet289#1 <= 2147483647;main_~tmp___1~9#1 := main_#t~nondet289#1;havoc main_#t~nondet289#1;main_~ldvarg4~0#1 := main_~tmp___1~9#1;assume { :begin_inline_ldv_initialize } true; {16797#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:44,940 INFO L290 TraceCheckUtils]: 8: Hoare triple {16797#(= ~dev_counter~0 0)} assume { :end_inline_ldv_initialize } true; {16797#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:44,941 INFO L272 TraceCheckUtils]: 9: Hoare triple {16797#(= ~dev_counter~0 0)} call main_#t~memset~res290#1.base, main_#t~memset~res290#1.offset := #Ultimate.C_memset(main_~#ldvarg0~0#1.base, main_~#ldvarg0~0#1.offset, 0, 4); {16819#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 21:51:44,941 INFO L290 TraceCheckUtils]: 10: Hoare triple {16819#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {16795#true} is VALID [2022-02-20 21:51:44,941 INFO L290 TraceCheckUtils]: 11: Hoare triple {16795#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {16795#true} is VALID [2022-02-20 21:51:44,941 INFO L290 TraceCheckUtils]: 12: Hoare triple {16795#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {16795#true} is VALID [2022-02-20 21:51:44,942 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {16795#true} {16797#(= ~dev_counter~0 0)} #1416#return; {16797#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:44,942 INFO L290 TraceCheckUtils]: 14: Hoare triple {16797#(= ~dev_counter~0 0)} havoc main_#t~memset~res290#1.base, main_#t~memset~res290#1.offset; {16797#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:44,943 INFO L272 TraceCheckUtils]: 15: Hoare triple {16797#(= ~dev_counter~0 0)} call main_#t~memset~res291#1.base, main_#t~memset~res291#1.offset := #Ultimate.C_memset(main_~#ldvarg3~0#1.base, main_~#ldvarg3~0#1.offset, 0, 4); {16819#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 21:51:44,943 INFO L290 TraceCheckUtils]: 16: Hoare triple {16819#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {16795#true} is VALID [2022-02-20 21:51:44,943 INFO L290 TraceCheckUtils]: 17: Hoare triple {16795#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {16795#true} is VALID [2022-02-20 21:51:44,943 INFO L290 TraceCheckUtils]: 18: Hoare triple {16795#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {16795#true} is VALID [2022-02-20 21:51:44,948 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {16795#true} {16797#(= ~dev_counter~0 0)} #1418#return; {16797#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:44,948 INFO L290 TraceCheckUtils]: 20: Hoare triple {16797#(= ~dev_counter~0 0)} havoc main_#t~memset~res291#1.base, main_#t~memset~res291#1.offset; {16797#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:44,949 INFO L272 TraceCheckUtils]: 21: Hoare triple {16797#(= ~dev_counter~0 0)} call main_#t~memset~res292#1.base, main_#t~memset~res292#1.offset := #Ultimate.C_memset(main_~#ldvarg5~0#1.base, main_~#ldvarg5~0#1.offset, 0, 4); {16819#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 21:51:44,950 INFO L290 TraceCheckUtils]: 22: Hoare triple {16819#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {16795#true} is VALID [2022-02-20 21:51:44,952 INFO L290 TraceCheckUtils]: 23: Hoare triple {16795#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {16795#true} is VALID [2022-02-20 21:51:44,952 INFO L290 TraceCheckUtils]: 24: Hoare triple {16795#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {16795#true} is VALID [2022-02-20 21:51:44,954 INFO L284 TraceCheckUtils]: 25: Hoare quadruple {16795#true} {16797#(= ~dev_counter~0 0)} #1420#return; {16797#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:44,954 INFO L290 TraceCheckUtils]: 26: Hoare triple {16797#(= ~dev_counter~0 0)} havoc main_#t~memset~res292#1.base, main_#t~memset~res292#1.offset;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {16797#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:44,955 INFO L290 TraceCheckUtils]: 27: Hoare triple {16797#(= ~dev_counter~0 0)} assume -2147483648 <= main_#t~nondet293#1 && main_#t~nondet293#1 <= 2147483647;main_~tmp___2~3#1 := main_#t~nondet293#1;havoc main_#t~nondet293#1;main_#t~switch294#1 := 0 == main_~tmp___2~3#1; {16797#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:44,955 INFO L290 TraceCheckUtils]: 28: Hoare triple {16797#(= ~dev_counter~0 0)} assume !main_#t~switch294#1;main_#t~switch294#1 := main_#t~switch294#1 || 1 == main_~tmp___2~3#1; {16797#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:44,956 INFO L290 TraceCheckUtils]: 29: Hoare triple {16797#(= ~dev_counter~0 0)} assume main_#t~switch294#1; {16797#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:44,956 INFO L290 TraceCheckUtils]: 30: Hoare triple {16797#(= ~dev_counter~0 0)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet302#1 && main_#t~nondet302#1 <= 2147483647;main_~tmp___4~1#1 := main_#t~nondet302#1;havoc main_#t~nondet302#1;main_#t~switch303#1 := 0 == main_~tmp___4~1#1; {16797#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:44,957 INFO L290 TraceCheckUtils]: 31: Hoare triple {16797#(= ~dev_counter~0 0)} assume !main_#t~switch303#1;main_#t~switch303#1 := main_#t~switch303#1 || 1 == main_~tmp___4~1#1; {16797#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:44,957 INFO L290 TraceCheckUtils]: 32: Hoare triple {16797#(= ~dev_counter~0 0)} assume main_#t~switch303#1; {16797#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:44,957 INFO L290 TraceCheckUtils]: 33: Hoare triple {16797#(= ~dev_counter~0 0)} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_cdc_mbim_driver_init } true;havoc cdc_mbim_driver_init_#res#1;havoc cdc_mbim_driver_init_#t~ret279#1, cdc_mbim_driver_init_~tmp~23#1;havoc cdc_mbim_driver_init_~tmp~23#1;assume { :begin_inline_ldv_usb_register_driver_7 } true;ldv_usb_register_driver_7_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_7_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_7_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_7_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_7_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_7_#in~ldv_func_arg3#1.offset := ~#cdc_mbim_driver~0.base, ~#cdc_mbim_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 23, 0;havoc ldv_usb_register_driver_7_#res#1;havoc ldv_usb_register_driver_7_#t~ret329#1, ldv_usb_register_driver_7_~ldv_func_arg1#1.base, ldv_usb_register_driver_7_~ldv_func_arg1#1.offset, ldv_usb_register_driver_7_~ldv_func_arg2#1.base, ldv_usb_register_driver_7_~ldv_func_arg2#1.offset, ldv_usb_register_driver_7_~ldv_func_arg3#1.base, ldv_usb_register_driver_7_~ldv_func_arg3#1.offset, ldv_usb_register_driver_7_~ldv_func_res~0#1, ldv_usb_register_driver_7_~tmp~30#1;ldv_usb_register_driver_7_~ldv_func_arg1#1.base, ldv_usb_register_driver_7_~ldv_func_arg1#1.offset := ldv_usb_register_driver_7_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_7_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_7_~ldv_func_arg2#1.base, ldv_usb_register_driver_7_~ldv_func_arg2#1.offset := ldv_usb_register_driver_7_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_7_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_7_~ldv_func_arg3#1.base, ldv_usb_register_driver_7_~ldv_func_arg3#1.offset := ldv_usb_register_driver_7_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_7_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_7_~ldv_func_res~0#1;havoc ldv_usb_register_driver_7_~tmp~30#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_7_~ldv_func_arg1#1.base, ldv_usb_register_driver_7_~ldv_func_arg1#1.offset, ldv_usb_register_driver_7_~ldv_func_arg2#1.base, ldv_usb_register_driver_7_~ldv_func_arg2#1.offset, ldv_usb_register_driver_7_~ldv_func_arg3#1.base, ldv_usb_register_driver_7_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet357#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet357#1 && usb_register_driver_#t~nondet357#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet357#1;havoc usb_register_driver_#t~nondet357#1; {16797#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:44,958 INFO L290 TraceCheckUtils]: 34: Hoare triple {16797#(= ~dev_counter~0 0)} ldv_usb_register_driver_7_#t~ret329#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_7_#t~ret329#1 && ldv_usb_register_driver_7_#t~ret329#1 <= 2147483647;ldv_usb_register_driver_7_~tmp~30#1 := ldv_usb_register_driver_7_#t~ret329#1;havoc ldv_usb_register_driver_7_#t~ret329#1;ldv_usb_register_driver_7_~ldv_func_res~0#1 := ldv_usb_register_driver_7_~tmp~30#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret286#1.base, ldv_usb_driver_1_#t~ret286#1.offset, ldv_usb_driver_1_~tmp~26#1.base, ldv_usb_driver_1_~tmp~26#1.offset;havoc ldv_usb_driver_1_~tmp~26#1.base, ldv_usb_driver_1_~tmp~26#1.offset; {16797#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:44,958 INFO L272 TraceCheckUtils]: 35: Hoare triple {16797#(= ~dev_counter~0 0)} call ldv_usb_driver_1_#t~ret286#1.base, ldv_usb_driver_1_#t~ret286#1.offset := ldv_zalloc(1520); {16818#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:44,959 INFO L290 TraceCheckUtils]: 36: Hoare triple {16818#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet28#1 && #t~nondet28#1 <= 2147483647;~tmp___0~1#1 := #t~nondet28#1;havoc #t~nondet28#1; {16795#true} is VALID [2022-02-20 21:51:44,959 INFO L290 TraceCheckUtils]: 37: Hoare triple {16795#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {16795#true} is VALID [2022-02-20 21:51:44,961 INFO L290 TraceCheckUtils]: 38: Hoare triple {16795#true} assume true; {16795#true} is VALID [2022-02-20 21:51:44,961 INFO L284 TraceCheckUtils]: 39: Hoare quadruple {16795#true} {16797#(= ~dev_counter~0 0)} #1434#return; {16797#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:44,962 INFO L290 TraceCheckUtils]: 40: Hoare triple {16797#(= ~dev_counter~0 0)} ldv_usb_driver_1_~tmp~26#1.base, ldv_usb_driver_1_~tmp~26#1.offset := ldv_usb_driver_1_#t~ret286#1.base, ldv_usb_driver_1_#t~ret286#1.offset;havoc ldv_usb_driver_1_#t~ret286#1.base, ldv_usb_driver_1_#t~ret286#1.offset;~cdc_mbim_driver_group1~0.base, ~cdc_mbim_driver_group1~0.offset := ldv_usb_driver_1_~tmp~26#1.base, ldv_usb_driver_1_~tmp~26#1.offset; {16797#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:44,962 INFO L290 TraceCheckUtils]: 41: Hoare triple {16797#(= ~dev_counter~0 0)} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_7_#res#1 := ldv_usb_register_driver_7_~ldv_func_res~0#1; {16797#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:44,962 INFO L290 TraceCheckUtils]: 42: Hoare triple {16797#(= ~dev_counter~0 0)} cdc_mbim_driver_init_#t~ret279#1 := ldv_usb_register_driver_7_#res#1;assume { :end_inline_ldv_usb_register_driver_7 } true;assume -2147483648 <= cdc_mbim_driver_init_#t~ret279#1 && cdc_mbim_driver_init_#t~ret279#1 <= 2147483647;cdc_mbim_driver_init_~tmp~23#1 := cdc_mbim_driver_init_#t~ret279#1;havoc cdc_mbim_driver_init_#t~ret279#1;cdc_mbim_driver_init_#res#1 := cdc_mbim_driver_init_~tmp~23#1; {16797#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:44,962 INFO L290 TraceCheckUtils]: 43: Hoare triple {16797#(= ~dev_counter~0 0)} main_#t~ret304#1 := cdc_mbim_driver_init_#res#1;assume { :end_inline_cdc_mbim_driver_init } true;assume -2147483648 <= main_#t~ret304#1 && main_#t~ret304#1 <= 2147483647;~ldv_retval_4~0 := main_#t~ret304#1;havoc main_#t~ret304#1; {16797#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:44,963 INFO L290 TraceCheckUtils]: 44: Hoare triple {16797#(= ~dev_counter~0 0)} assume !(0 == ~ldv_retval_4~0); {16797#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:44,963 INFO L290 TraceCheckUtils]: 45: Hoare triple {16797#(= ~dev_counter~0 0)} assume 0 != ~ldv_retval_4~0;~ldv_state_variable_0~0 := 2; {16797#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:44,963 INFO L290 TraceCheckUtils]: 46: Hoare triple {16797#(= ~dev_counter~0 0)} assume { :begin_inline_ldv_check_final_state } true; {16797#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:44,964 INFO L290 TraceCheckUtils]: 47: Hoare triple {16797#(= ~dev_counter~0 0)} assume 0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616; {16797#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:44,964 INFO L290 TraceCheckUtils]: 48: Hoare triple {16797#(= ~dev_counter~0 0)} assume 0 == (~usb_dev~0.base + ~usb_dev~0.offset) % 18446744073709551616; {16797#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:44,964 INFO L290 TraceCheckUtils]: 49: Hoare triple {16797#(= ~dev_counter~0 0)} assume !(0 == ~dev_counter~0); {16796#false} is VALID [2022-02-20 21:51:44,964 INFO L272 TraceCheckUtils]: 50: Hoare triple {16796#false} call ldv_error(); {16796#false} is VALID [2022-02-20 21:51:44,964 INFO L290 TraceCheckUtils]: 51: Hoare triple {16796#false} assume !false; {16796#false} is VALID [2022-02-20 21:51:44,965 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-02-20 21:51:44,965 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:51:44,966 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1774535803] [2022-02-20 21:51:44,966 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1774535803] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:51:44,966 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:51:44,966 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-02-20 21:51:44,966 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1319086934] [2022-02-20 21:51:44,966 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:51:44,967 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 6.4) internal successors, (32), 3 states have internal predecessors, (32), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 52 [2022-02-20 21:51:44,968 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:51:44,968 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 6.4) internal successors, (32), 3 states have internal predecessors, (32), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2022-02-20 21:51:45,001 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 43 edges. 43 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:51:45,001 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-02-20 21:51:45,002 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:51:45,002 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-02-20 21:51:45,003 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-02-20 21:51:45,003 INFO L87 Difference]: Start difference. First operand 967 states and 1359 transitions. Second operand has 5 states, 5 states have (on average 6.4) internal successors, (32), 3 states have internal predecessors, (32), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2022-02-20 21:51:47,466 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:51:47,466 INFO L93 Difference]: Finished difference Result 1129 states and 1627 transitions. [2022-02-20 21:51:47,467 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-02-20 21:51:47,467 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 6.4) internal successors, (32), 3 states have internal predecessors, (32), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 52 [2022-02-20 21:51:47,467 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:51:47,467 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 6.4) internal successors, (32), 3 states have internal predecessors, (32), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2022-02-20 21:51:47,473 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 851 transitions. [2022-02-20 21:51:47,474 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 6.4) internal successors, (32), 3 states have internal predecessors, (32), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2022-02-20 21:51:47,479 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 851 transitions. [2022-02-20 21:51:47,480 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 851 transitions. [2022-02-20 21:51:48,132 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 851 edges. 851 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:51:48,191 INFO L225 Difference]: With dead ends: 1129 [2022-02-20 21:51:48,191 INFO L226 Difference]: Without dead ends: 1126 [2022-02-20 21:51:48,192 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-02-20 21:51:48,192 INFO L933 BasicCegarLoop]: 649 mSDtfsCounter, 942 mSDsluCounter, 813 mSDsCounter, 0 mSdLazyCounter, 352 mSolverCounterSat, 257 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 994 SdHoareTripleChecker+Valid, 1462 SdHoareTripleChecker+Invalid, 609 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 257 IncrementalHoareTripleChecker+Valid, 352 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-02-20 21:51:48,193 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [994 Valid, 1462 Invalid, 609 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [257 Valid, 352 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2022-02-20 21:51:48,194 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1126 states. [2022-02-20 21:51:48,217 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1126 to 966. [2022-02-20 21:51:48,218 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:51:48,220 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1126 states. Second operand has 966 states, 753 states have (on average 1.3917662682602923) internal successors, (1048), 757 states have internal predecessors, (1048), 156 states have call successors, (156), 57 states have call predecessors, (156), 56 states have return successors, (153), 153 states have call predecessors, (153), 153 states have call successors, (153) [2022-02-20 21:51:48,221 INFO L74 IsIncluded]: Start isIncluded. First operand 1126 states. Second operand has 966 states, 753 states have (on average 1.3917662682602923) internal successors, (1048), 757 states have internal predecessors, (1048), 156 states have call successors, (156), 57 states have call predecessors, (156), 56 states have return successors, (153), 153 states have call predecessors, (153), 153 states have call successors, (153) [2022-02-20 21:51:48,223 INFO L87 Difference]: Start difference. First operand 1126 states. Second operand has 966 states, 753 states have (on average 1.3917662682602923) internal successors, (1048), 757 states have internal predecessors, (1048), 156 states have call successors, (156), 57 states have call predecessors, (156), 56 states have return successors, (153), 153 states have call predecessors, (153), 153 states have call successors, (153) [2022-02-20 21:51:48,261 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:51:48,262 INFO L93 Difference]: Finished difference Result 1126 states and 1624 transitions. [2022-02-20 21:51:48,262 INFO L276 IsEmpty]: Start isEmpty. Operand 1126 states and 1624 transitions. [2022-02-20 21:51:48,265 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:51:48,265 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:51:48,268 INFO L74 IsIncluded]: Start isIncluded. First operand has 966 states, 753 states have (on average 1.3917662682602923) internal successors, (1048), 757 states have internal predecessors, (1048), 156 states have call successors, (156), 57 states have call predecessors, (156), 56 states have return successors, (153), 153 states have call predecessors, (153), 153 states have call successors, (153) Second operand 1126 states. [2022-02-20 21:51:48,270 INFO L87 Difference]: Start difference. First operand has 966 states, 753 states have (on average 1.3917662682602923) internal successors, (1048), 757 states have internal predecessors, (1048), 156 states have call successors, (156), 57 states have call predecessors, (156), 56 states have return successors, (153), 153 states have call predecessors, (153), 153 states have call successors, (153) Second operand 1126 states. [2022-02-20 21:51:48,308 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:51:48,309 INFO L93 Difference]: Finished difference Result 1126 states and 1624 transitions. [2022-02-20 21:51:48,309 INFO L276 IsEmpty]: Start isEmpty. Operand 1126 states and 1624 transitions. [2022-02-20 21:51:48,312 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:51:48,313 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:51:48,313 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:51:48,313 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:51:48,315 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 966 states, 753 states have (on average 1.3917662682602923) internal successors, (1048), 757 states have internal predecessors, (1048), 156 states have call successors, (156), 57 states have call predecessors, (156), 56 states have return successors, (153), 153 states have call predecessors, (153), 153 states have call successors, (153) [2022-02-20 21:51:48,355 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 966 states to 966 states and 1357 transitions. [2022-02-20 21:51:48,356 INFO L78 Accepts]: Start accepts. Automaton has 966 states and 1357 transitions. Word has length 52 [2022-02-20 21:51:48,356 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:51:48,356 INFO L470 AbstractCegarLoop]: Abstraction has 966 states and 1357 transitions. [2022-02-20 21:51:48,356 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 6.4) internal successors, (32), 3 states have internal predecessors, (32), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2022-02-20 21:51:48,356 INFO L276 IsEmpty]: Start isEmpty. Operand 966 states and 1357 transitions. [2022-02-20 21:51:48,358 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2022-02-20 21:51:48,358 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:51:48,358 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:51:48,358 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-02-20 21:51:48,358 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:51:48,359 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:51:48,359 INFO L85 PathProgramCache]: Analyzing trace with hash 250572594, now seen corresponding path program 1 times [2022-02-20 21:51:48,359 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:51:48,359 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1686433338] [2022-02-20 21:51:48,359 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:51:48,359 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:51:48,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:48,457 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 21:51:48,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:48,464 INFO L290 TraceCheckUtils]: 0: Hoare triple {21973#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet28#1 && #t~nondet28#1 <= 2147483647;~tmp___0~1#1 := #t~nondet28#1;havoc #t~nondet28#1; {21950#true} is VALID [2022-02-20 21:51:48,465 INFO L290 TraceCheckUtils]: 1: Hoare triple {21950#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {21950#true} is VALID [2022-02-20 21:51:48,465 INFO L290 TraceCheckUtils]: 2: Hoare triple {21950#true} assume true; {21950#true} is VALID [2022-02-20 21:51:48,465 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {21950#true} {21952#(= ~INTERF_STATE~0 0)} #1414#return; {21952#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:48,470 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 9 [2022-02-20 21:51:48,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:48,481 INFO L290 TraceCheckUtils]: 0: Hoare triple {21974#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {21950#true} is VALID [2022-02-20 21:51:48,482 INFO L290 TraceCheckUtils]: 1: Hoare triple {21950#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {21950#true} is VALID [2022-02-20 21:51:48,482 INFO L290 TraceCheckUtils]: 2: Hoare triple {21950#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {21950#true} is VALID [2022-02-20 21:51:48,483 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {21950#true} {21952#(= ~INTERF_STATE~0 0)} #1416#return; {21952#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:48,483 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 15 [2022-02-20 21:51:48,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:48,489 INFO L290 TraceCheckUtils]: 0: Hoare triple {21974#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {21950#true} is VALID [2022-02-20 21:51:48,489 INFO L290 TraceCheckUtils]: 1: Hoare triple {21950#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {21950#true} is VALID [2022-02-20 21:51:48,489 INFO L290 TraceCheckUtils]: 2: Hoare triple {21950#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {21950#true} is VALID [2022-02-20 21:51:48,490 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {21950#true} {21952#(= ~INTERF_STATE~0 0)} #1418#return; {21952#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:48,490 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 21 [2022-02-20 21:51:48,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:48,496 INFO L290 TraceCheckUtils]: 0: Hoare triple {21974#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {21950#true} is VALID [2022-02-20 21:51:48,496 INFO L290 TraceCheckUtils]: 1: Hoare triple {21950#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {21950#true} is VALID [2022-02-20 21:51:48,497 INFO L290 TraceCheckUtils]: 2: Hoare triple {21950#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {21950#true} is VALID [2022-02-20 21:51:48,497 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {21950#true} {21952#(= ~INTERF_STATE~0 0)} #1420#return; {21952#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:48,498 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 35 [2022-02-20 21:51:48,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:48,505 INFO L290 TraceCheckUtils]: 0: Hoare triple {21973#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet28#1 && #t~nondet28#1 <= 2147483647;~tmp___0~1#1 := #t~nondet28#1;havoc #t~nondet28#1; {21950#true} is VALID [2022-02-20 21:51:48,505 INFO L290 TraceCheckUtils]: 1: Hoare triple {21950#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {21950#true} is VALID [2022-02-20 21:51:48,506 INFO L290 TraceCheckUtils]: 2: Hoare triple {21950#true} assume true; {21950#true} is VALID [2022-02-20 21:51:48,506 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {21950#true} {21952#(= ~INTERF_STATE~0 0)} #1434#return; {21952#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:48,506 INFO L290 TraceCheckUtils]: 0: Hoare triple {21950#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(82, 2);call #Ultimate.allocInit(9, 3);call #Ultimate.allocInit(22, 4);call #Ultimate.allocInit(219, 5);call #Ultimate.allocInit(24, 6);call #Ultimate.allocInit(24, 7);call #Ultimate.allocInit(22, 8);call #Ultimate.allocInit(24, 9);call #Ultimate.allocInit(9, 10);call #Ultimate.allocInit(18, 11);call #Ultimate.allocInit(219, 12);call #Ultimate.allocInit(36, 13);call #Ultimate.allocInit(36, 14);call #Ultimate.allocInit(9, 15);call #Ultimate.allocInit(18, 16);call #Ultimate.allocInit(219, 17);call #Ultimate.allocInit(67, 18);call #Ultimate.allocInit(67, 19);call #Ultimate.allocInit(9, 20);call #Ultimate.allocInit(9, 21);call #Ultimate.allocInit(9, 22);call #Ultimate.allocInit(9, 23);~LDV_IN_INTERRUPT~0 := 1;~cdc_mbim_info_zlp_group1~0.base, ~cdc_mbim_info_zlp_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0;~cdc_mbim_info_group0~0.base, ~cdc_mbim_info_group0~0.offset := 0, 0;~ref_cnt~0 := 0;~cdc_mbim_info_zlp_group2~0.base, ~cdc_mbim_info_zlp_group2~0.offset := 0, 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~cdc_mbim_info_group1~0.base, ~cdc_mbim_info_group1~0.offset := 0, 0;~cdc_mbim_info_zlp_group0~0.base, ~cdc_mbim_info_zlp_group0~0.offset := 0, 0;~cdc_mbim_info_group2~0.base, ~cdc_mbim_info_group2~0.offset := 0, 0;~cdc_mbim_driver_group1~0.base, ~cdc_mbim_driver_group1~0.offset := 0, 0;~#cdc_mbim_info~0.base, ~#cdc_mbim_info~0.offset := 24, 0;call #Ultimate.allocInit(124, 24);call write~init~$Pointer$(20, 0, ~#cdc_mbim_info~0.base, ~#cdc_mbim_info~0.offset, 8);call write~init~int(9232, ~#cdc_mbim_info~0.base, 8 + ~#cdc_mbim_info~0.offset, 4);call write~init~$Pointer$(#funAddr~cdc_mbim_bind.base, #funAddr~cdc_mbim_bind.offset, ~#cdc_mbim_info~0.base, 12 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_unbind.base, #funAddr~cdc_mbim_unbind.offset, ~#cdc_mbim_info~0.base, 20 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 28 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 36 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 44 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_manage_power.base, #funAddr~cdc_mbim_manage_power.offset, ~#cdc_mbim_info~0.base, 52 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 60 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 68 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_rx_fixup.base, #funAddr~cdc_mbim_rx_fixup.offset, ~#cdc_mbim_info~0.base, 76 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_tx_fixup.base, #funAddr~cdc_mbim_tx_fixup.offset, ~#cdc_mbim_info~0.base, 84 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 92 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 100 + ~#cdc_mbim_info~0.offset, 8);call write~init~int(0, ~#cdc_mbim_info~0.base, 108 + ~#cdc_mbim_info~0.offset, 4);call write~init~int(0, ~#cdc_mbim_info~0.base, 112 + ~#cdc_mbim_info~0.offset, 4);call write~init~int(0, ~#cdc_mbim_info~0.base, 116 + ~#cdc_mbim_info~0.offset, 8);~#cdc_mbim_info_zlp~0.base, ~#cdc_mbim_info_zlp~0.offset := 25, 0;call #Ultimate.allocInit(124, 25);call write~init~$Pointer$(21, 0, ~#cdc_mbim_info_zlp~0.base, ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~int(9744, ~#cdc_mbim_info_zlp~0.base, 8 + ~#cdc_mbim_info_zlp~0.offset, 4);call write~init~$Pointer$(#funAddr~cdc_mbim_bind.base, #funAddr~cdc_mbim_bind.offset, ~#cdc_mbim_info_zlp~0.base, 12 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_unbind.base, #funAddr~cdc_mbim_unbind.offset, ~#cdc_mbim_info_zlp~0.base, 20 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 28 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 36 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 44 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_manage_power.base, #funAddr~cdc_mbim_manage_power.offset, ~#cdc_mbim_info_zlp~0.base, 52 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 60 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 68 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_rx_fixup.base, #funAddr~cdc_mbim_rx_fixup.offset, ~#cdc_mbim_info_zlp~0.base, 76 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_tx_fixup.base, #funAddr~cdc_mbim_tx_fixup.offset, ~#cdc_mbim_info_zlp~0.base, 84 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 92 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 100 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~int(0, ~#cdc_mbim_info_zlp~0.base, 108 + ~#cdc_mbim_info_zlp~0.offset, 4);call write~init~int(0, ~#cdc_mbim_info_zlp~0.base, 112 + ~#cdc_mbim_info_zlp~0.offset, 4);call write~init~int(0, ~#cdc_mbim_info_zlp~0.base, 116 + ~#cdc_mbim_info_zlp~0.offset, 8);~#mbim_devs~0.base, ~#mbim_devs~0.offset := 26, 0;call #Ultimate.allocInit(125, 26);call write~init~int(896, ~#mbim_devs~0.base, ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 2 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 4 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 6 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 8 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 10 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 11 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 12 + ~#mbim_devs~0.offset, 1);call write~init~int(2, ~#mbim_devs~0.base, 13 + ~#mbim_devs~0.offset, 1);call write~init~int(13, ~#mbim_devs~0.base, 14 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 15 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 16 + ~#mbim_devs~0.offset, 1);call write~init~int(~#cdc_mbim_info~0.base + ~#cdc_mbim_info~0.offset, ~#mbim_devs~0.base, 17 + ~#mbim_devs~0.offset, 8);call write~init~int(899, ~#mbim_devs~0.base, 25 + ~#mbim_devs~0.offset, 2);call write~init~int(4505, ~#mbim_devs~0.base, 27 + ~#mbim_devs~0.offset, 2);call write~init~int(26786, ~#mbim_devs~0.base, 29 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 31 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 33 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 35 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 36 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 37 + ~#mbim_devs~0.offset, 1);call write~init~int(2, ~#mbim_devs~0.base, 38 + ~#mbim_devs~0.offset, 1);call write~init~int(14, ~#mbim_devs~0.base, 39 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 40 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 41 + ~#mbim_devs~0.offset, 1);call write~init~int(~#cdc_mbim_info_zlp~0.base + ~#cdc_mbim_info_zlp~0.offset, ~#mbim_devs~0.base, 42 + ~#mbim_devs~0.offset, 8);call write~init~int(899, ~#mbim_devs~0.base, 50 + ~#mbim_devs~0.offset, 2);call write~init~int(1008, ~#mbim_devs~0.base, 52 + ~#mbim_devs~0.offset, 2);call write~init~int(19229, ~#mbim_devs~0.base, 54 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 56 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 58 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 60 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 61 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 62 + ~#mbim_devs~0.offset, 1);call write~init~int(2, ~#mbim_devs~0.base, 63 + ~#mbim_devs~0.offset, 1);call write~init~int(14, ~#mbim_devs~0.base, 64 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 65 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 66 + ~#mbim_devs~0.offset, 1);call write~init~int(~#cdc_mbim_info_zlp~0.base + ~#cdc_mbim_info_zlp~0.offset, ~#mbim_devs~0.base, 67 + ~#mbim_devs~0.offset, 8);call write~init~int(896, ~#mbim_devs~0.base, 75 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 77 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 79 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 81 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 83 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 85 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 86 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 87 + ~#mbim_devs~0.offset, 1);call write~init~int(2, ~#mbim_devs~0.base, 88 + ~#mbim_devs~0.offset, 1);call write~init~int(14, ~#mbim_devs~0.base, 89 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 90 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 91 + ~#mbim_devs~0.offset, 1);call write~init~int(~#cdc_mbim_info~0.base + ~#cdc_mbim_info~0.offset, ~#mbim_devs~0.base, 92 + ~#mbim_devs~0.offset, 8);call write~init~int(0, ~#mbim_devs~0.base, 100 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 102 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 104 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 106 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 108 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 110 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 111 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 112 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 113 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 114 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 115 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 116 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 117 + ~#mbim_devs~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.bInterfaceNumber := 0;~__mod_usb_device_table~0.driver_info := 0;~#cdc_mbim_driver~0.base, ~#cdc_mbim_driver~0.offset := 27, 0;call #Ultimate.allocInit(285, 27);call write~init~$Pointer$(22, 0, ~#cdc_mbim_driver~0.base, ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usbnet_probe.base, #funAddr~usbnet_probe.offset, ~#cdc_mbim_driver~0.base, 8 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usbnet_disconnect.base, #funAddr~usbnet_disconnect.offset, ~#cdc_mbim_driver~0.base, 16 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 24 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_suspend.base, #funAddr~cdc_mbim_suspend.offset, ~#cdc_mbim_driver~0.base, 32 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_resume.base, #funAddr~cdc_mbim_resume.offset, ~#cdc_mbim_driver~0.base, 40 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_resume.base, #funAddr~cdc_mbim_resume.offset, ~#cdc_mbim_driver~0.base, 48 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 56 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 64 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(~#mbim_devs~0.base, ~#mbim_devs~0.offset, ~#cdc_mbim_driver~0.base, 72 + ~#cdc_mbim_driver~0.offset, 8);call write~init~int(0, ~#cdc_mbim_driver~0.base, 80 + ~#cdc_mbim_driver~0.offset, 4);call write~init~int(0, ~#cdc_mbim_driver~0.base, 84 + ~#cdc_mbim_driver~0.offset, 4);call write~init~int(0, ~#cdc_mbim_driver~0.base, 88 + ~#cdc_mbim_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 92 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 100 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 108 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 116 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 124 + ~#cdc_mbim_driver~0.offset, 8);call write~init~int(0, ~#cdc_mbim_driver~0.base, 132 + ~#cdc_mbim_driver~0.offset, 4);call write~init~int(0, ~#cdc_mbim_driver~0.base, 136 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 148 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 156 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 164 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 172 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 180 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 188 + ~#cdc_mbim_driver~0.offset, 8);call write~init~int(0, ~#cdc_mbim_driver~0.base, 196 + ~#cdc_mbim_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 197 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 205 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 213 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 221 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 229 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 237 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 245 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 253 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 261 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 269 + ~#cdc_mbim_driver~0.offset, 8);call write~init~int(0, ~#cdc_mbim_driver~0.base, 277 + ~#cdc_mbim_driver~0.offset, 4);call write~init~int(0, ~#cdc_mbim_driver~0.base, 281 + ~#cdc_mbim_driver~0.offset, 1);call write~init~int(1, ~#cdc_mbim_driver~0.base, 282 + ~#cdc_mbim_driver~0.offset, 1);call write~init~int(1, ~#cdc_mbim_driver~0.base, 283 + ~#cdc_mbim_driver~0.offset, 1);call write~init~int(0, ~#cdc_mbim_driver~0.base, 284 + ~#cdc_mbim_driver~0.offset, 1);~ldv_retval_2~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_5~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_6~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {21952#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:48,507 INFO L290 TraceCheckUtils]: 1: Hoare triple {21952#(= ~INTERF_STATE~0 0)} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret287#1.base, main_#t~ret287#1.offset, main_#t~nondet288#1, main_#t~nondet289#1, main_#t~memset~res290#1.base, main_#t~memset~res290#1.offset, main_#t~memset~res291#1.base, main_#t~memset~res291#1.offset, main_#t~memset~res292#1.base, main_#t~memset~res292#1.offset, main_#t~nondet293#1, main_#t~switch294#1, main_#t~nondet295#1, main_#t~switch296#1, main_#t~ret297#1, main_#t~ret298#1, main_#t~mem299#1, main_#t~ret300#1, main_#t~ret301#1, main_#t~nondet302#1, main_#t~switch303#1, main_#t~ret304#1, main_#t~nondet305#1, main_#t~switch306#1, main_#t~ret307#1, main_#t~ret308#1, main_#t~ret309#1, main_#t~mem310#1, main_#t~ret311#1.base, main_#t~ret311#1.offset, main_#t~mem312#1, main_#t~ret313#1.base, main_#t~ret313#1.offset, main_#t~ret314#1, main_#t~ret315#1, main_#t~nondet316#1, main_#t~switch317#1, main_#t~ret318#1, main_#t~ret319#1, main_#t~ret320#1, main_#t~mem321#1, main_#t~ret322#1.base, main_#t~ret322#1.offset, main_#t~mem323#1, main_#t~ret324#1.base, main_#t~ret324#1.offset, main_#t~ret325#1, main_#t~ret326#1, main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset, main_~tmp~27#1.base, main_~tmp~27#1.offset, main_~#ldvarg0~0#1.base, main_~#ldvarg0~0#1.offset, main_~#ldvarg3~0#1.base, main_~#ldvarg3~0#1.offset, main_~ldvarg2~0#1, main_~tmp___0~14#1, main_~ldvarg4~0#1, main_~tmp___1~9#1, main_~#ldvarg5~0#1.base, main_~#ldvarg5~0#1.offset, main_~tmp___2~3#1, main_~tmp___3~0#1, main_~tmp___4~1#1, main_~tmp___5~0#1, main_~tmp___6~0#1;havoc main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset;havoc main_~tmp~27#1.base, main_~tmp~27#1.offset;call main_~#ldvarg0~0#1.base, main_~#ldvarg0~0#1.offset := #Ultimate.allocOnStack(4);call main_~#ldvarg3~0#1.base, main_~#ldvarg3~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~ldvarg2~0#1;havoc main_~tmp___0~14#1;havoc main_~ldvarg4~0#1;havoc main_~tmp___1~9#1;call main_~#ldvarg5~0#1.base, main_~#ldvarg5~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~tmp___2~3#1;havoc main_~tmp___3~0#1;havoc main_~tmp___4~1#1;havoc main_~tmp___5~0#1;havoc main_~tmp___6~0#1; {21952#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:48,508 INFO L272 TraceCheckUtils]: 2: Hoare triple {21952#(= ~INTERF_STATE~0 0)} call main_#t~ret287#1.base, main_#t~ret287#1.offset := ldv_zalloc(32); {21973#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:48,508 INFO L290 TraceCheckUtils]: 3: Hoare triple {21973#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet28#1 && #t~nondet28#1 <= 2147483647;~tmp___0~1#1 := #t~nondet28#1;havoc #t~nondet28#1; {21950#true} is VALID [2022-02-20 21:51:48,508 INFO L290 TraceCheckUtils]: 4: Hoare triple {21950#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {21950#true} is VALID [2022-02-20 21:51:48,508 INFO L290 TraceCheckUtils]: 5: Hoare triple {21950#true} assume true; {21950#true} is VALID [2022-02-20 21:51:48,509 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {21950#true} {21952#(= ~INTERF_STATE~0 0)} #1414#return; {21952#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:48,509 INFO L290 TraceCheckUtils]: 7: Hoare triple {21952#(= ~INTERF_STATE~0 0)} main_~tmp~27#1.base, main_~tmp~27#1.offset := main_#t~ret287#1.base, main_#t~ret287#1.offset;havoc main_#t~ret287#1.base, main_#t~ret287#1.offset;main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset := main_~tmp~27#1.base, main_~tmp~27#1.offset;assume -2147483648 <= main_#t~nondet288#1 && main_#t~nondet288#1 <= 2147483647;main_~tmp___0~14#1 := main_#t~nondet288#1;havoc main_#t~nondet288#1;main_~ldvarg2~0#1 := main_~tmp___0~14#1;assume -2147483648 <= main_#t~nondet289#1 && main_#t~nondet289#1 <= 2147483647;main_~tmp___1~9#1 := main_#t~nondet289#1;havoc main_#t~nondet289#1;main_~ldvarg4~0#1 := main_~tmp___1~9#1;assume { :begin_inline_ldv_initialize } true; {21952#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:48,509 INFO L290 TraceCheckUtils]: 8: Hoare triple {21952#(= ~INTERF_STATE~0 0)} assume { :end_inline_ldv_initialize } true; {21952#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:48,510 INFO L272 TraceCheckUtils]: 9: Hoare triple {21952#(= ~INTERF_STATE~0 0)} call main_#t~memset~res290#1.base, main_#t~memset~res290#1.offset := #Ultimate.C_memset(main_~#ldvarg0~0#1.base, main_~#ldvarg0~0#1.offset, 0, 4); {21974#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 21:51:48,510 INFO L290 TraceCheckUtils]: 10: Hoare triple {21974#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {21950#true} is VALID [2022-02-20 21:51:48,511 INFO L290 TraceCheckUtils]: 11: Hoare triple {21950#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {21950#true} is VALID [2022-02-20 21:51:48,511 INFO L290 TraceCheckUtils]: 12: Hoare triple {21950#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {21950#true} is VALID [2022-02-20 21:51:48,512 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {21950#true} {21952#(= ~INTERF_STATE~0 0)} #1416#return; {21952#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:48,513 INFO L290 TraceCheckUtils]: 14: Hoare triple {21952#(= ~INTERF_STATE~0 0)} havoc main_#t~memset~res290#1.base, main_#t~memset~res290#1.offset; {21952#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:48,514 INFO L272 TraceCheckUtils]: 15: Hoare triple {21952#(= ~INTERF_STATE~0 0)} call main_#t~memset~res291#1.base, main_#t~memset~res291#1.offset := #Ultimate.C_memset(main_~#ldvarg3~0#1.base, main_~#ldvarg3~0#1.offset, 0, 4); {21974#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 21:51:48,514 INFO L290 TraceCheckUtils]: 16: Hoare triple {21974#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {21950#true} is VALID [2022-02-20 21:51:48,514 INFO L290 TraceCheckUtils]: 17: Hoare triple {21950#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {21950#true} is VALID [2022-02-20 21:51:48,514 INFO L290 TraceCheckUtils]: 18: Hoare triple {21950#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {21950#true} is VALID [2022-02-20 21:51:48,515 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {21950#true} {21952#(= ~INTERF_STATE~0 0)} #1418#return; {21952#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:48,515 INFO L290 TraceCheckUtils]: 20: Hoare triple {21952#(= ~INTERF_STATE~0 0)} havoc main_#t~memset~res291#1.base, main_#t~memset~res291#1.offset; {21952#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:48,516 INFO L272 TraceCheckUtils]: 21: Hoare triple {21952#(= ~INTERF_STATE~0 0)} call main_#t~memset~res292#1.base, main_#t~memset~res292#1.offset := #Ultimate.C_memset(main_~#ldvarg5~0#1.base, main_~#ldvarg5~0#1.offset, 0, 4); {21974#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 21:51:48,516 INFO L290 TraceCheckUtils]: 22: Hoare triple {21974#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {21950#true} is VALID [2022-02-20 21:51:48,516 INFO L290 TraceCheckUtils]: 23: Hoare triple {21950#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {21950#true} is VALID [2022-02-20 21:51:48,516 INFO L290 TraceCheckUtils]: 24: Hoare triple {21950#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {21950#true} is VALID [2022-02-20 21:51:48,517 INFO L284 TraceCheckUtils]: 25: Hoare quadruple {21950#true} {21952#(= ~INTERF_STATE~0 0)} #1420#return; {21952#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:48,517 INFO L290 TraceCheckUtils]: 26: Hoare triple {21952#(= ~INTERF_STATE~0 0)} havoc main_#t~memset~res292#1.base, main_#t~memset~res292#1.offset;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {21952#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:48,518 INFO L290 TraceCheckUtils]: 27: Hoare triple {21952#(= ~INTERF_STATE~0 0)} assume -2147483648 <= main_#t~nondet293#1 && main_#t~nondet293#1 <= 2147483647;main_~tmp___2~3#1 := main_#t~nondet293#1;havoc main_#t~nondet293#1;main_#t~switch294#1 := 0 == main_~tmp___2~3#1; {21952#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:48,518 INFO L290 TraceCheckUtils]: 28: Hoare triple {21952#(= ~INTERF_STATE~0 0)} assume !main_#t~switch294#1;main_#t~switch294#1 := main_#t~switch294#1 || 1 == main_~tmp___2~3#1; {21952#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:48,518 INFO L290 TraceCheckUtils]: 29: Hoare triple {21952#(= ~INTERF_STATE~0 0)} assume main_#t~switch294#1; {21952#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:48,518 INFO L290 TraceCheckUtils]: 30: Hoare triple {21952#(= ~INTERF_STATE~0 0)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet302#1 && main_#t~nondet302#1 <= 2147483647;main_~tmp___4~1#1 := main_#t~nondet302#1;havoc main_#t~nondet302#1;main_#t~switch303#1 := 0 == main_~tmp___4~1#1; {21952#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:48,519 INFO L290 TraceCheckUtils]: 31: Hoare triple {21952#(= ~INTERF_STATE~0 0)} assume !main_#t~switch303#1;main_#t~switch303#1 := main_#t~switch303#1 || 1 == main_~tmp___4~1#1; {21952#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:48,519 INFO L290 TraceCheckUtils]: 32: Hoare triple {21952#(= ~INTERF_STATE~0 0)} assume main_#t~switch303#1; {21952#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:48,520 INFO L290 TraceCheckUtils]: 33: Hoare triple {21952#(= ~INTERF_STATE~0 0)} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_cdc_mbim_driver_init } true;havoc cdc_mbim_driver_init_#res#1;havoc cdc_mbim_driver_init_#t~ret279#1, cdc_mbim_driver_init_~tmp~23#1;havoc cdc_mbim_driver_init_~tmp~23#1;assume { :begin_inline_ldv_usb_register_driver_7 } true;ldv_usb_register_driver_7_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_7_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_7_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_7_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_7_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_7_#in~ldv_func_arg3#1.offset := ~#cdc_mbim_driver~0.base, ~#cdc_mbim_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 23, 0;havoc ldv_usb_register_driver_7_#res#1;havoc ldv_usb_register_driver_7_#t~ret329#1, ldv_usb_register_driver_7_~ldv_func_arg1#1.base, ldv_usb_register_driver_7_~ldv_func_arg1#1.offset, ldv_usb_register_driver_7_~ldv_func_arg2#1.base, ldv_usb_register_driver_7_~ldv_func_arg2#1.offset, ldv_usb_register_driver_7_~ldv_func_arg3#1.base, ldv_usb_register_driver_7_~ldv_func_arg3#1.offset, ldv_usb_register_driver_7_~ldv_func_res~0#1, ldv_usb_register_driver_7_~tmp~30#1;ldv_usb_register_driver_7_~ldv_func_arg1#1.base, ldv_usb_register_driver_7_~ldv_func_arg1#1.offset := ldv_usb_register_driver_7_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_7_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_7_~ldv_func_arg2#1.base, ldv_usb_register_driver_7_~ldv_func_arg2#1.offset := ldv_usb_register_driver_7_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_7_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_7_~ldv_func_arg3#1.base, ldv_usb_register_driver_7_~ldv_func_arg3#1.offset := ldv_usb_register_driver_7_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_7_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_7_~ldv_func_res~0#1;havoc ldv_usb_register_driver_7_~tmp~30#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_7_~ldv_func_arg1#1.base, ldv_usb_register_driver_7_~ldv_func_arg1#1.offset, ldv_usb_register_driver_7_~ldv_func_arg2#1.base, ldv_usb_register_driver_7_~ldv_func_arg2#1.offset, ldv_usb_register_driver_7_~ldv_func_arg3#1.base, ldv_usb_register_driver_7_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet357#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet357#1 && usb_register_driver_#t~nondet357#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet357#1;havoc usb_register_driver_#t~nondet357#1; {21952#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:48,520 INFO L290 TraceCheckUtils]: 34: Hoare triple {21952#(= ~INTERF_STATE~0 0)} ldv_usb_register_driver_7_#t~ret329#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_7_#t~ret329#1 && ldv_usb_register_driver_7_#t~ret329#1 <= 2147483647;ldv_usb_register_driver_7_~tmp~30#1 := ldv_usb_register_driver_7_#t~ret329#1;havoc ldv_usb_register_driver_7_#t~ret329#1;ldv_usb_register_driver_7_~ldv_func_res~0#1 := ldv_usb_register_driver_7_~tmp~30#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret286#1.base, ldv_usb_driver_1_#t~ret286#1.offset, ldv_usb_driver_1_~tmp~26#1.base, ldv_usb_driver_1_~tmp~26#1.offset;havoc ldv_usb_driver_1_~tmp~26#1.base, ldv_usb_driver_1_~tmp~26#1.offset; {21952#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:48,521 INFO L272 TraceCheckUtils]: 35: Hoare triple {21952#(= ~INTERF_STATE~0 0)} call ldv_usb_driver_1_#t~ret286#1.base, ldv_usb_driver_1_#t~ret286#1.offset := ldv_zalloc(1520); {21973#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:48,521 INFO L290 TraceCheckUtils]: 36: Hoare triple {21973#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet28#1 && #t~nondet28#1 <= 2147483647;~tmp___0~1#1 := #t~nondet28#1;havoc #t~nondet28#1; {21950#true} is VALID [2022-02-20 21:51:48,525 INFO L290 TraceCheckUtils]: 37: Hoare triple {21950#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {21950#true} is VALID [2022-02-20 21:51:48,525 INFO L290 TraceCheckUtils]: 38: Hoare triple {21950#true} assume true; {21950#true} is VALID [2022-02-20 21:51:48,526 INFO L284 TraceCheckUtils]: 39: Hoare quadruple {21950#true} {21952#(= ~INTERF_STATE~0 0)} #1434#return; {21952#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:48,526 INFO L290 TraceCheckUtils]: 40: Hoare triple {21952#(= ~INTERF_STATE~0 0)} ldv_usb_driver_1_~tmp~26#1.base, ldv_usb_driver_1_~tmp~26#1.offset := ldv_usb_driver_1_#t~ret286#1.base, ldv_usb_driver_1_#t~ret286#1.offset;havoc ldv_usb_driver_1_#t~ret286#1.base, ldv_usb_driver_1_#t~ret286#1.offset;~cdc_mbim_driver_group1~0.base, ~cdc_mbim_driver_group1~0.offset := ldv_usb_driver_1_~tmp~26#1.base, ldv_usb_driver_1_~tmp~26#1.offset; {21952#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:48,527 INFO L290 TraceCheckUtils]: 41: Hoare triple {21952#(= ~INTERF_STATE~0 0)} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_7_#res#1 := ldv_usb_register_driver_7_~ldv_func_res~0#1; {21952#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:48,527 INFO L290 TraceCheckUtils]: 42: Hoare triple {21952#(= ~INTERF_STATE~0 0)} cdc_mbim_driver_init_#t~ret279#1 := ldv_usb_register_driver_7_#res#1;assume { :end_inline_ldv_usb_register_driver_7 } true;assume -2147483648 <= cdc_mbim_driver_init_#t~ret279#1 && cdc_mbim_driver_init_#t~ret279#1 <= 2147483647;cdc_mbim_driver_init_~tmp~23#1 := cdc_mbim_driver_init_#t~ret279#1;havoc cdc_mbim_driver_init_#t~ret279#1;cdc_mbim_driver_init_#res#1 := cdc_mbim_driver_init_~tmp~23#1; {21952#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:48,527 INFO L290 TraceCheckUtils]: 43: Hoare triple {21952#(= ~INTERF_STATE~0 0)} main_#t~ret304#1 := cdc_mbim_driver_init_#res#1;assume { :end_inline_cdc_mbim_driver_init } true;assume -2147483648 <= main_#t~ret304#1 && main_#t~ret304#1 <= 2147483647;~ldv_retval_4~0 := main_#t~ret304#1;havoc main_#t~ret304#1; {21952#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:48,528 INFO L290 TraceCheckUtils]: 44: Hoare triple {21952#(= ~INTERF_STATE~0 0)} assume !(0 == ~ldv_retval_4~0); {21952#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:48,528 INFO L290 TraceCheckUtils]: 45: Hoare triple {21952#(= ~INTERF_STATE~0 0)} assume 0 != ~ldv_retval_4~0;~ldv_state_variable_0~0 := 2; {21952#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:48,528 INFO L290 TraceCheckUtils]: 46: Hoare triple {21952#(= ~INTERF_STATE~0 0)} assume { :begin_inline_ldv_check_final_state } true; {21952#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:48,528 INFO L290 TraceCheckUtils]: 47: Hoare triple {21952#(= ~INTERF_STATE~0 0)} assume 0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616; {21952#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:48,529 INFO L290 TraceCheckUtils]: 48: Hoare triple {21952#(= ~INTERF_STATE~0 0)} assume 0 == (~usb_dev~0.base + ~usb_dev~0.offset) % 18446744073709551616; {21952#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:48,529 INFO L290 TraceCheckUtils]: 49: Hoare triple {21952#(= ~INTERF_STATE~0 0)} assume 0 == ~dev_counter~0; {21952#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:48,529 INFO L290 TraceCheckUtils]: 50: Hoare triple {21952#(= ~INTERF_STATE~0 0)} assume !(0 == ~INTERF_STATE~0); {21951#false} is VALID [2022-02-20 21:51:48,529 INFO L272 TraceCheckUtils]: 51: Hoare triple {21951#false} call ldv_error(); {21951#false} is VALID [2022-02-20 21:51:48,530 INFO L290 TraceCheckUtils]: 52: Hoare triple {21951#false} assume !false; {21951#false} is VALID [2022-02-20 21:51:48,530 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-02-20 21:51:48,530 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:51:48,530 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1686433338] [2022-02-20 21:51:48,530 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1686433338] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:51:48,530 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:51:48,531 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-02-20 21:51:48,531 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [582179051] [2022-02-20 21:51:48,531 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:51:48,531 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 53 [2022-02-20 21:51:48,531 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:51:48,532 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2022-02-20 21:51:48,567 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 44 edges. 44 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:51:48,567 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-02-20 21:51:48,567 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:51:48,568 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-02-20 21:51:48,568 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-02-20 21:51:48,568 INFO L87 Difference]: Start difference. First operand 966 states and 1357 transitions. Second operand has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2022-02-20 21:51:52,994 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:51:52,994 INFO L93 Difference]: Finished difference Result 3187 states and 4578 transitions. [2022-02-20 21:51:52,994 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-02-20 21:51:52,994 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 53 [2022-02-20 21:51:52,995 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:51:52,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2022-02-20 21:51:53,011 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 2373 transitions. [2022-02-20 21:51:53,011 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2022-02-20 21:51:53,027 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 2373 transitions. [2022-02-20 21:51:53,027 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 7 states and 2373 transitions. [2022-02-20 21:51:54,612 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2373 edges. 2373 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:51:54,826 INFO L225 Difference]: With dead ends: 3187 [2022-02-20 21:51:54,826 INFO L226 Difference]: Without dead ends: 2232 [2022-02-20 21:51:54,829 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2022-02-20 21:51:54,830 INFO L933 BasicCegarLoop]: 741 mSDtfsCounter, 1173 mSDsluCounter, 1424 mSDsCounter, 0 mSdLazyCounter, 648 mSolverCounterSat, 433 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1234 SdHoareTripleChecker+Valid, 2165 SdHoareTripleChecker+Invalid, 1081 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 433 IncrementalHoareTripleChecker+Valid, 648 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2022-02-20 21:51:54,830 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1234 Valid, 2165 Invalid, 1081 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [433 Valid, 648 Invalid, 0 Unknown, 0 Unchecked, 1.2s Time] [2022-02-20 21:51:54,831 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2232 states. [2022-02-20 21:51:54,876 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2232 to 1908. [2022-02-20 21:51:54,877 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:51:54,880 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2232 states. Second operand has 1908 states, 1490 states have (on average 1.393959731543624) internal successors, (2077), 1496 states have internal predecessors, (2077), 305 states have call successors, (305), 113 states have call predecessors, (305), 112 states have return successors, (310), 302 states have call predecessors, (310), 302 states have call successors, (310) [2022-02-20 21:51:54,883 INFO L74 IsIncluded]: Start isIncluded. First operand 2232 states. Second operand has 1908 states, 1490 states have (on average 1.393959731543624) internal successors, (2077), 1496 states have internal predecessors, (2077), 305 states have call successors, (305), 113 states have call predecessors, (305), 112 states have return successors, (310), 302 states have call predecessors, (310), 302 states have call successors, (310) [2022-02-20 21:51:54,885 INFO L87 Difference]: Start difference. First operand 2232 states. Second operand has 1908 states, 1490 states have (on average 1.393959731543624) internal successors, (2077), 1496 states have internal predecessors, (2077), 305 states have call successors, (305), 113 states have call predecessors, (305), 112 states have return successors, (310), 302 states have call predecessors, (310), 302 states have call successors, (310) [2022-02-20 21:51:55,017 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:51:55,018 INFO L93 Difference]: Finished difference Result 2232 states and 3225 transitions. [2022-02-20 21:51:55,018 INFO L276 IsEmpty]: Start isEmpty. Operand 2232 states and 3225 transitions. [2022-02-20 21:51:55,025 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:51:55,025 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:51:55,028 INFO L74 IsIncluded]: Start isIncluded. First operand has 1908 states, 1490 states have (on average 1.393959731543624) internal successors, (2077), 1496 states have internal predecessors, (2077), 305 states have call successors, (305), 113 states have call predecessors, (305), 112 states have return successors, (310), 302 states have call predecessors, (310), 302 states have call successors, (310) Second operand 2232 states. [2022-02-20 21:51:55,030 INFO L87 Difference]: Start difference. First operand has 1908 states, 1490 states have (on average 1.393959731543624) internal successors, (2077), 1496 states have internal predecessors, (2077), 305 states have call successors, (305), 113 states have call predecessors, (305), 112 states have return successors, (310), 302 states have call predecessors, (310), 302 states have call successors, (310) Second operand 2232 states. [2022-02-20 21:51:55,167 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:51:55,168 INFO L93 Difference]: Finished difference Result 2232 states and 3225 transitions. [2022-02-20 21:51:55,168 INFO L276 IsEmpty]: Start isEmpty. Operand 2232 states and 3225 transitions. [2022-02-20 21:51:55,175 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:51:55,175 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:51:55,175 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:51:55,175 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:51:55,178 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1908 states, 1490 states have (on average 1.393959731543624) internal successors, (2077), 1496 states have internal predecessors, (2077), 305 states have call successors, (305), 113 states have call predecessors, (305), 112 states have return successors, (310), 302 states have call predecessors, (310), 302 states have call successors, (310) [2022-02-20 21:51:55,333 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1908 states to 1908 states and 2692 transitions. [2022-02-20 21:51:55,334 INFO L78 Accepts]: Start accepts. Automaton has 1908 states and 2692 transitions. Word has length 53 [2022-02-20 21:51:55,334 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:51:55,334 INFO L470 AbstractCegarLoop]: Abstraction has 1908 states and 2692 transitions. [2022-02-20 21:51:55,334 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2022-02-20 21:51:55,335 INFO L276 IsEmpty]: Start isEmpty. Operand 1908 states and 2692 transitions. [2022-02-20 21:51:55,336 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2022-02-20 21:51:55,337 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:51:55,337 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:51:55,337 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2022-02-20 21:51:55,337 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:51:55,337 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:51:55,337 INFO L85 PathProgramCache]: Analyzing trace with hash -822389373, now seen corresponding path program 1 times [2022-02-20 21:51:55,338 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:51:55,338 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1818417014] [2022-02-20 21:51:55,338 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:51:55,338 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:51:55,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:55,402 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 21:51:55,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:55,408 INFO L290 TraceCheckUtils]: 0: Hoare triple {33446#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet28#1 && #t~nondet28#1 <= 2147483647;~tmp___0~1#1 := #t~nondet28#1;havoc #t~nondet28#1; {33423#true} is VALID [2022-02-20 21:51:55,409 INFO L290 TraceCheckUtils]: 1: Hoare triple {33423#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {33423#true} is VALID [2022-02-20 21:51:55,409 INFO L290 TraceCheckUtils]: 2: Hoare triple {33423#true} assume true; {33423#true} is VALID [2022-02-20 21:51:55,409 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {33423#true} {33425#(= ~SERIAL_STATE~0 0)} #1414#return; {33425#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:51:55,414 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 9 [2022-02-20 21:51:55,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:55,420 INFO L290 TraceCheckUtils]: 0: Hoare triple {33447#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {33423#true} is VALID [2022-02-20 21:51:55,420 INFO L290 TraceCheckUtils]: 1: Hoare triple {33423#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {33423#true} is VALID [2022-02-20 21:51:55,421 INFO L290 TraceCheckUtils]: 2: Hoare triple {33423#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {33423#true} is VALID [2022-02-20 21:51:55,421 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {33423#true} {33425#(= ~SERIAL_STATE~0 0)} #1416#return; {33425#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:51:55,421 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 15 [2022-02-20 21:51:55,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:55,437 INFO L290 TraceCheckUtils]: 0: Hoare triple {33447#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {33423#true} is VALID [2022-02-20 21:51:55,437 INFO L290 TraceCheckUtils]: 1: Hoare triple {33423#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {33423#true} is VALID [2022-02-20 21:51:55,437 INFO L290 TraceCheckUtils]: 2: Hoare triple {33423#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {33423#true} is VALID [2022-02-20 21:51:55,438 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {33423#true} {33425#(= ~SERIAL_STATE~0 0)} #1418#return; {33425#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:51:55,438 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 21 [2022-02-20 21:51:55,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:55,443 INFO L290 TraceCheckUtils]: 0: Hoare triple {33447#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {33423#true} is VALID [2022-02-20 21:51:55,443 INFO L290 TraceCheckUtils]: 1: Hoare triple {33423#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {33423#true} is VALID [2022-02-20 21:51:55,444 INFO L290 TraceCheckUtils]: 2: Hoare triple {33423#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {33423#true} is VALID [2022-02-20 21:51:55,444 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {33423#true} {33425#(= ~SERIAL_STATE~0 0)} #1420#return; {33425#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:51:55,445 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 35 [2022-02-20 21:51:55,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:55,452 INFO L290 TraceCheckUtils]: 0: Hoare triple {33446#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet28#1 && #t~nondet28#1 <= 2147483647;~tmp___0~1#1 := #t~nondet28#1;havoc #t~nondet28#1; {33423#true} is VALID [2022-02-20 21:51:55,452 INFO L290 TraceCheckUtils]: 1: Hoare triple {33423#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {33423#true} is VALID [2022-02-20 21:51:55,452 INFO L290 TraceCheckUtils]: 2: Hoare triple {33423#true} assume true; {33423#true} is VALID [2022-02-20 21:51:55,453 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {33423#true} {33425#(= ~SERIAL_STATE~0 0)} #1434#return; {33425#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:51:55,453 INFO L290 TraceCheckUtils]: 0: Hoare triple {33423#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(82, 2);call #Ultimate.allocInit(9, 3);call #Ultimate.allocInit(22, 4);call #Ultimate.allocInit(219, 5);call #Ultimate.allocInit(24, 6);call #Ultimate.allocInit(24, 7);call #Ultimate.allocInit(22, 8);call #Ultimate.allocInit(24, 9);call #Ultimate.allocInit(9, 10);call #Ultimate.allocInit(18, 11);call #Ultimate.allocInit(219, 12);call #Ultimate.allocInit(36, 13);call #Ultimate.allocInit(36, 14);call #Ultimate.allocInit(9, 15);call #Ultimate.allocInit(18, 16);call #Ultimate.allocInit(219, 17);call #Ultimate.allocInit(67, 18);call #Ultimate.allocInit(67, 19);call #Ultimate.allocInit(9, 20);call #Ultimate.allocInit(9, 21);call #Ultimate.allocInit(9, 22);call #Ultimate.allocInit(9, 23);~LDV_IN_INTERRUPT~0 := 1;~cdc_mbim_info_zlp_group1~0.base, ~cdc_mbim_info_zlp_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0;~cdc_mbim_info_group0~0.base, ~cdc_mbim_info_group0~0.offset := 0, 0;~ref_cnt~0 := 0;~cdc_mbim_info_zlp_group2~0.base, ~cdc_mbim_info_zlp_group2~0.offset := 0, 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~cdc_mbim_info_group1~0.base, ~cdc_mbim_info_group1~0.offset := 0, 0;~cdc_mbim_info_zlp_group0~0.base, ~cdc_mbim_info_zlp_group0~0.offset := 0, 0;~cdc_mbim_info_group2~0.base, ~cdc_mbim_info_group2~0.offset := 0, 0;~cdc_mbim_driver_group1~0.base, ~cdc_mbim_driver_group1~0.offset := 0, 0;~#cdc_mbim_info~0.base, ~#cdc_mbim_info~0.offset := 24, 0;call #Ultimate.allocInit(124, 24);call write~init~$Pointer$(20, 0, ~#cdc_mbim_info~0.base, ~#cdc_mbim_info~0.offset, 8);call write~init~int(9232, ~#cdc_mbim_info~0.base, 8 + ~#cdc_mbim_info~0.offset, 4);call write~init~$Pointer$(#funAddr~cdc_mbim_bind.base, #funAddr~cdc_mbim_bind.offset, ~#cdc_mbim_info~0.base, 12 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_unbind.base, #funAddr~cdc_mbim_unbind.offset, ~#cdc_mbim_info~0.base, 20 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 28 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 36 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 44 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_manage_power.base, #funAddr~cdc_mbim_manage_power.offset, ~#cdc_mbim_info~0.base, 52 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 60 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 68 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_rx_fixup.base, #funAddr~cdc_mbim_rx_fixup.offset, ~#cdc_mbim_info~0.base, 76 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_tx_fixup.base, #funAddr~cdc_mbim_tx_fixup.offset, ~#cdc_mbim_info~0.base, 84 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 92 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 100 + ~#cdc_mbim_info~0.offset, 8);call write~init~int(0, ~#cdc_mbim_info~0.base, 108 + ~#cdc_mbim_info~0.offset, 4);call write~init~int(0, ~#cdc_mbim_info~0.base, 112 + ~#cdc_mbim_info~0.offset, 4);call write~init~int(0, ~#cdc_mbim_info~0.base, 116 + ~#cdc_mbim_info~0.offset, 8);~#cdc_mbim_info_zlp~0.base, ~#cdc_mbim_info_zlp~0.offset := 25, 0;call #Ultimate.allocInit(124, 25);call write~init~$Pointer$(21, 0, ~#cdc_mbim_info_zlp~0.base, ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~int(9744, ~#cdc_mbim_info_zlp~0.base, 8 + ~#cdc_mbim_info_zlp~0.offset, 4);call write~init~$Pointer$(#funAddr~cdc_mbim_bind.base, #funAddr~cdc_mbim_bind.offset, ~#cdc_mbim_info_zlp~0.base, 12 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_unbind.base, #funAddr~cdc_mbim_unbind.offset, ~#cdc_mbim_info_zlp~0.base, 20 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 28 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 36 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 44 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_manage_power.base, #funAddr~cdc_mbim_manage_power.offset, ~#cdc_mbim_info_zlp~0.base, 52 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 60 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 68 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_rx_fixup.base, #funAddr~cdc_mbim_rx_fixup.offset, ~#cdc_mbim_info_zlp~0.base, 76 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_tx_fixup.base, #funAddr~cdc_mbim_tx_fixup.offset, ~#cdc_mbim_info_zlp~0.base, 84 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 92 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 100 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~int(0, ~#cdc_mbim_info_zlp~0.base, 108 + ~#cdc_mbim_info_zlp~0.offset, 4);call write~init~int(0, ~#cdc_mbim_info_zlp~0.base, 112 + ~#cdc_mbim_info_zlp~0.offset, 4);call write~init~int(0, ~#cdc_mbim_info_zlp~0.base, 116 + ~#cdc_mbim_info_zlp~0.offset, 8);~#mbim_devs~0.base, ~#mbim_devs~0.offset := 26, 0;call #Ultimate.allocInit(125, 26);call write~init~int(896, ~#mbim_devs~0.base, ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 2 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 4 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 6 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 8 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 10 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 11 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 12 + ~#mbim_devs~0.offset, 1);call write~init~int(2, ~#mbim_devs~0.base, 13 + ~#mbim_devs~0.offset, 1);call write~init~int(13, ~#mbim_devs~0.base, 14 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 15 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 16 + ~#mbim_devs~0.offset, 1);call write~init~int(~#cdc_mbim_info~0.base + ~#cdc_mbim_info~0.offset, ~#mbim_devs~0.base, 17 + ~#mbim_devs~0.offset, 8);call write~init~int(899, ~#mbim_devs~0.base, 25 + ~#mbim_devs~0.offset, 2);call write~init~int(4505, ~#mbim_devs~0.base, 27 + ~#mbim_devs~0.offset, 2);call write~init~int(26786, ~#mbim_devs~0.base, 29 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 31 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 33 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 35 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 36 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 37 + ~#mbim_devs~0.offset, 1);call write~init~int(2, ~#mbim_devs~0.base, 38 + ~#mbim_devs~0.offset, 1);call write~init~int(14, ~#mbim_devs~0.base, 39 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 40 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 41 + ~#mbim_devs~0.offset, 1);call write~init~int(~#cdc_mbim_info_zlp~0.base + ~#cdc_mbim_info_zlp~0.offset, ~#mbim_devs~0.base, 42 + ~#mbim_devs~0.offset, 8);call write~init~int(899, ~#mbim_devs~0.base, 50 + ~#mbim_devs~0.offset, 2);call write~init~int(1008, ~#mbim_devs~0.base, 52 + ~#mbim_devs~0.offset, 2);call write~init~int(19229, ~#mbim_devs~0.base, 54 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 56 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 58 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 60 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 61 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 62 + ~#mbim_devs~0.offset, 1);call write~init~int(2, ~#mbim_devs~0.base, 63 + ~#mbim_devs~0.offset, 1);call write~init~int(14, ~#mbim_devs~0.base, 64 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 65 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 66 + ~#mbim_devs~0.offset, 1);call write~init~int(~#cdc_mbim_info_zlp~0.base + ~#cdc_mbim_info_zlp~0.offset, ~#mbim_devs~0.base, 67 + ~#mbim_devs~0.offset, 8);call write~init~int(896, ~#mbim_devs~0.base, 75 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 77 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 79 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 81 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 83 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 85 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 86 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 87 + ~#mbim_devs~0.offset, 1);call write~init~int(2, ~#mbim_devs~0.base, 88 + ~#mbim_devs~0.offset, 1);call write~init~int(14, ~#mbim_devs~0.base, 89 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 90 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 91 + ~#mbim_devs~0.offset, 1);call write~init~int(~#cdc_mbim_info~0.base + ~#cdc_mbim_info~0.offset, ~#mbim_devs~0.base, 92 + ~#mbim_devs~0.offset, 8);call write~init~int(0, ~#mbim_devs~0.base, 100 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 102 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 104 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 106 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 108 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 110 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 111 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 112 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 113 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 114 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 115 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 116 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 117 + ~#mbim_devs~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.bInterfaceNumber := 0;~__mod_usb_device_table~0.driver_info := 0;~#cdc_mbim_driver~0.base, ~#cdc_mbim_driver~0.offset := 27, 0;call #Ultimate.allocInit(285, 27);call write~init~$Pointer$(22, 0, ~#cdc_mbim_driver~0.base, ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usbnet_probe.base, #funAddr~usbnet_probe.offset, ~#cdc_mbim_driver~0.base, 8 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usbnet_disconnect.base, #funAddr~usbnet_disconnect.offset, ~#cdc_mbim_driver~0.base, 16 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 24 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_suspend.base, #funAddr~cdc_mbim_suspend.offset, ~#cdc_mbim_driver~0.base, 32 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_resume.base, #funAddr~cdc_mbim_resume.offset, ~#cdc_mbim_driver~0.base, 40 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_resume.base, #funAddr~cdc_mbim_resume.offset, ~#cdc_mbim_driver~0.base, 48 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 56 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 64 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(~#mbim_devs~0.base, ~#mbim_devs~0.offset, ~#cdc_mbim_driver~0.base, 72 + ~#cdc_mbim_driver~0.offset, 8);call write~init~int(0, ~#cdc_mbim_driver~0.base, 80 + ~#cdc_mbim_driver~0.offset, 4);call write~init~int(0, ~#cdc_mbim_driver~0.base, 84 + ~#cdc_mbim_driver~0.offset, 4);call write~init~int(0, ~#cdc_mbim_driver~0.base, 88 + ~#cdc_mbim_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 92 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 100 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 108 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 116 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 124 + ~#cdc_mbim_driver~0.offset, 8);call write~init~int(0, ~#cdc_mbim_driver~0.base, 132 + ~#cdc_mbim_driver~0.offset, 4);call write~init~int(0, ~#cdc_mbim_driver~0.base, 136 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 148 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 156 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 164 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 172 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 180 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 188 + ~#cdc_mbim_driver~0.offset, 8);call write~init~int(0, ~#cdc_mbim_driver~0.base, 196 + ~#cdc_mbim_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 197 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 205 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 213 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 221 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 229 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 237 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 245 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 253 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 261 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 269 + ~#cdc_mbim_driver~0.offset, 8);call write~init~int(0, ~#cdc_mbim_driver~0.base, 277 + ~#cdc_mbim_driver~0.offset, 4);call write~init~int(0, ~#cdc_mbim_driver~0.base, 281 + ~#cdc_mbim_driver~0.offset, 1);call write~init~int(1, ~#cdc_mbim_driver~0.base, 282 + ~#cdc_mbim_driver~0.offset, 1);call write~init~int(1, ~#cdc_mbim_driver~0.base, 283 + ~#cdc_mbim_driver~0.offset, 1);call write~init~int(0, ~#cdc_mbim_driver~0.base, 284 + ~#cdc_mbim_driver~0.offset, 1);~ldv_retval_2~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_5~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_6~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {33425#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:51:55,454 INFO L290 TraceCheckUtils]: 1: Hoare triple {33425#(= ~SERIAL_STATE~0 0)} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret287#1.base, main_#t~ret287#1.offset, main_#t~nondet288#1, main_#t~nondet289#1, main_#t~memset~res290#1.base, main_#t~memset~res290#1.offset, main_#t~memset~res291#1.base, main_#t~memset~res291#1.offset, main_#t~memset~res292#1.base, main_#t~memset~res292#1.offset, main_#t~nondet293#1, main_#t~switch294#1, main_#t~nondet295#1, main_#t~switch296#1, main_#t~ret297#1, main_#t~ret298#1, main_#t~mem299#1, main_#t~ret300#1, main_#t~ret301#1, main_#t~nondet302#1, main_#t~switch303#1, main_#t~ret304#1, main_#t~nondet305#1, main_#t~switch306#1, main_#t~ret307#1, main_#t~ret308#1, main_#t~ret309#1, main_#t~mem310#1, main_#t~ret311#1.base, main_#t~ret311#1.offset, main_#t~mem312#1, main_#t~ret313#1.base, main_#t~ret313#1.offset, main_#t~ret314#1, main_#t~ret315#1, main_#t~nondet316#1, main_#t~switch317#1, main_#t~ret318#1, main_#t~ret319#1, main_#t~ret320#1, main_#t~mem321#1, main_#t~ret322#1.base, main_#t~ret322#1.offset, main_#t~mem323#1, main_#t~ret324#1.base, main_#t~ret324#1.offset, main_#t~ret325#1, main_#t~ret326#1, main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset, main_~tmp~27#1.base, main_~tmp~27#1.offset, main_~#ldvarg0~0#1.base, main_~#ldvarg0~0#1.offset, main_~#ldvarg3~0#1.base, main_~#ldvarg3~0#1.offset, main_~ldvarg2~0#1, main_~tmp___0~14#1, main_~ldvarg4~0#1, main_~tmp___1~9#1, main_~#ldvarg5~0#1.base, main_~#ldvarg5~0#1.offset, main_~tmp___2~3#1, main_~tmp___3~0#1, main_~tmp___4~1#1, main_~tmp___5~0#1, main_~tmp___6~0#1;havoc main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset;havoc main_~tmp~27#1.base, main_~tmp~27#1.offset;call main_~#ldvarg0~0#1.base, main_~#ldvarg0~0#1.offset := #Ultimate.allocOnStack(4);call main_~#ldvarg3~0#1.base, main_~#ldvarg3~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~ldvarg2~0#1;havoc main_~tmp___0~14#1;havoc main_~ldvarg4~0#1;havoc main_~tmp___1~9#1;call main_~#ldvarg5~0#1.base, main_~#ldvarg5~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~tmp___2~3#1;havoc main_~tmp___3~0#1;havoc main_~tmp___4~1#1;havoc main_~tmp___5~0#1;havoc main_~tmp___6~0#1; {33425#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:51:55,455 INFO L272 TraceCheckUtils]: 2: Hoare triple {33425#(= ~SERIAL_STATE~0 0)} call main_#t~ret287#1.base, main_#t~ret287#1.offset := ldv_zalloc(32); {33446#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:55,455 INFO L290 TraceCheckUtils]: 3: Hoare triple {33446#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet28#1 && #t~nondet28#1 <= 2147483647;~tmp___0~1#1 := #t~nondet28#1;havoc #t~nondet28#1; {33423#true} is VALID [2022-02-20 21:51:55,456 INFO L290 TraceCheckUtils]: 4: Hoare triple {33423#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {33423#true} is VALID [2022-02-20 21:51:55,457 INFO L290 TraceCheckUtils]: 5: Hoare triple {33423#true} assume true; {33423#true} is VALID [2022-02-20 21:51:55,458 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {33423#true} {33425#(= ~SERIAL_STATE~0 0)} #1414#return; {33425#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:51:55,459 INFO L290 TraceCheckUtils]: 7: Hoare triple {33425#(= ~SERIAL_STATE~0 0)} main_~tmp~27#1.base, main_~tmp~27#1.offset := main_#t~ret287#1.base, main_#t~ret287#1.offset;havoc main_#t~ret287#1.base, main_#t~ret287#1.offset;main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset := main_~tmp~27#1.base, main_~tmp~27#1.offset;assume -2147483648 <= main_#t~nondet288#1 && main_#t~nondet288#1 <= 2147483647;main_~tmp___0~14#1 := main_#t~nondet288#1;havoc main_#t~nondet288#1;main_~ldvarg2~0#1 := main_~tmp___0~14#1;assume -2147483648 <= main_#t~nondet289#1 && main_#t~nondet289#1 <= 2147483647;main_~tmp___1~9#1 := main_#t~nondet289#1;havoc main_#t~nondet289#1;main_~ldvarg4~0#1 := main_~tmp___1~9#1;assume { :begin_inline_ldv_initialize } true; {33425#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:51:55,459 INFO L290 TraceCheckUtils]: 8: Hoare triple {33425#(= ~SERIAL_STATE~0 0)} assume { :end_inline_ldv_initialize } true; {33425#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:51:55,460 INFO L272 TraceCheckUtils]: 9: Hoare triple {33425#(= ~SERIAL_STATE~0 0)} call main_#t~memset~res290#1.base, main_#t~memset~res290#1.offset := #Ultimate.C_memset(main_~#ldvarg0~0#1.base, main_~#ldvarg0~0#1.offset, 0, 4); {33447#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 21:51:55,460 INFO L290 TraceCheckUtils]: 10: Hoare triple {33447#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {33423#true} is VALID [2022-02-20 21:51:55,460 INFO L290 TraceCheckUtils]: 11: Hoare triple {33423#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {33423#true} is VALID [2022-02-20 21:51:55,460 INFO L290 TraceCheckUtils]: 12: Hoare triple {33423#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {33423#true} is VALID [2022-02-20 21:51:55,461 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {33423#true} {33425#(= ~SERIAL_STATE~0 0)} #1416#return; {33425#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:51:55,461 INFO L290 TraceCheckUtils]: 14: Hoare triple {33425#(= ~SERIAL_STATE~0 0)} havoc main_#t~memset~res290#1.base, main_#t~memset~res290#1.offset; {33425#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:51:55,462 INFO L272 TraceCheckUtils]: 15: Hoare triple {33425#(= ~SERIAL_STATE~0 0)} call main_#t~memset~res291#1.base, main_#t~memset~res291#1.offset := #Ultimate.C_memset(main_~#ldvarg3~0#1.base, main_~#ldvarg3~0#1.offset, 0, 4); {33447#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 21:51:55,462 INFO L290 TraceCheckUtils]: 16: Hoare triple {33447#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {33423#true} is VALID [2022-02-20 21:51:55,462 INFO L290 TraceCheckUtils]: 17: Hoare triple {33423#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {33423#true} is VALID [2022-02-20 21:51:55,462 INFO L290 TraceCheckUtils]: 18: Hoare triple {33423#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {33423#true} is VALID [2022-02-20 21:51:55,463 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {33423#true} {33425#(= ~SERIAL_STATE~0 0)} #1418#return; {33425#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:51:55,463 INFO L290 TraceCheckUtils]: 20: Hoare triple {33425#(= ~SERIAL_STATE~0 0)} havoc main_#t~memset~res291#1.base, main_#t~memset~res291#1.offset; {33425#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:51:55,464 INFO L272 TraceCheckUtils]: 21: Hoare triple {33425#(= ~SERIAL_STATE~0 0)} call main_#t~memset~res292#1.base, main_#t~memset~res292#1.offset := #Ultimate.C_memset(main_~#ldvarg5~0#1.base, main_~#ldvarg5~0#1.offset, 0, 4); {33447#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 21:51:55,464 INFO L290 TraceCheckUtils]: 22: Hoare triple {33447#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {33423#true} is VALID [2022-02-20 21:51:55,464 INFO L290 TraceCheckUtils]: 23: Hoare triple {33423#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {33423#true} is VALID [2022-02-20 21:51:55,464 INFO L290 TraceCheckUtils]: 24: Hoare triple {33423#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {33423#true} is VALID [2022-02-20 21:51:55,465 INFO L284 TraceCheckUtils]: 25: Hoare quadruple {33423#true} {33425#(= ~SERIAL_STATE~0 0)} #1420#return; {33425#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:51:55,465 INFO L290 TraceCheckUtils]: 26: Hoare triple {33425#(= ~SERIAL_STATE~0 0)} havoc main_#t~memset~res292#1.base, main_#t~memset~res292#1.offset;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {33425#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:51:55,465 INFO L290 TraceCheckUtils]: 27: Hoare triple {33425#(= ~SERIAL_STATE~0 0)} assume -2147483648 <= main_#t~nondet293#1 && main_#t~nondet293#1 <= 2147483647;main_~tmp___2~3#1 := main_#t~nondet293#1;havoc main_#t~nondet293#1;main_#t~switch294#1 := 0 == main_~tmp___2~3#1; {33425#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:51:55,466 INFO L290 TraceCheckUtils]: 28: Hoare triple {33425#(= ~SERIAL_STATE~0 0)} assume !main_#t~switch294#1;main_#t~switch294#1 := main_#t~switch294#1 || 1 == main_~tmp___2~3#1; {33425#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:51:55,466 INFO L290 TraceCheckUtils]: 29: Hoare triple {33425#(= ~SERIAL_STATE~0 0)} assume main_#t~switch294#1; {33425#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:51:55,466 INFO L290 TraceCheckUtils]: 30: Hoare triple {33425#(= ~SERIAL_STATE~0 0)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet302#1 && main_#t~nondet302#1 <= 2147483647;main_~tmp___4~1#1 := main_#t~nondet302#1;havoc main_#t~nondet302#1;main_#t~switch303#1 := 0 == main_~tmp___4~1#1; {33425#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:51:55,467 INFO L290 TraceCheckUtils]: 31: Hoare triple {33425#(= ~SERIAL_STATE~0 0)} assume !main_#t~switch303#1;main_#t~switch303#1 := main_#t~switch303#1 || 1 == main_~tmp___4~1#1; {33425#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:51:55,467 INFO L290 TraceCheckUtils]: 32: Hoare triple {33425#(= ~SERIAL_STATE~0 0)} assume main_#t~switch303#1; {33425#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:51:55,467 INFO L290 TraceCheckUtils]: 33: Hoare triple {33425#(= ~SERIAL_STATE~0 0)} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_cdc_mbim_driver_init } true;havoc cdc_mbim_driver_init_#res#1;havoc cdc_mbim_driver_init_#t~ret279#1, cdc_mbim_driver_init_~tmp~23#1;havoc cdc_mbim_driver_init_~tmp~23#1;assume { :begin_inline_ldv_usb_register_driver_7 } true;ldv_usb_register_driver_7_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_7_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_7_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_7_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_7_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_7_#in~ldv_func_arg3#1.offset := ~#cdc_mbim_driver~0.base, ~#cdc_mbim_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 23, 0;havoc ldv_usb_register_driver_7_#res#1;havoc ldv_usb_register_driver_7_#t~ret329#1, ldv_usb_register_driver_7_~ldv_func_arg1#1.base, ldv_usb_register_driver_7_~ldv_func_arg1#1.offset, ldv_usb_register_driver_7_~ldv_func_arg2#1.base, ldv_usb_register_driver_7_~ldv_func_arg2#1.offset, ldv_usb_register_driver_7_~ldv_func_arg3#1.base, ldv_usb_register_driver_7_~ldv_func_arg3#1.offset, ldv_usb_register_driver_7_~ldv_func_res~0#1, ldv_usb_register_driver_7_~tmp~30#1;ldv_usb_register_driver_7_~ldv_func_arg1#1.base, ldv_usb_register_driver_7_~ldv_func_arg1#1.offset := ldv_usb_register_driver_7_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_7_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_7_~ldv_func_arg2#1.base, ldv_usb_register_driver_7_~ldv_func_arg2#1.offset := ldv_usb_register_driver_7_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_7_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_7_~ldv_func_arg3#1.base, ldv_usb_register_driver_7_~ldv_func_arg3#1.offset := ldv_usb_register_driver_7_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_7_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_7_~ldv_func_res~0#1;havoc ldv_usb_register_driver_7_~tmp~30#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_7_~ldv_func_arg1#1.base, ldv_usb_register_driver_7_~ldv_func_arg1#1.offset, ldv_usb_register_driver_7_~ldv_func_arg2#1.base, ldv_usb_register_driver_7_~ldv_func_arg2#1.offset, ldv_usb_register_driver_7_~ldv_func_arg3#1.base, ldv_usb_register_driver_7_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet357#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet357#1 && usb_register_driver_#t~nondet357#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet357#1;havoc usb_register_driver_#t~nondet357#1; {33425#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:51:55,468 INFO L290 TraceCheckUtils]: 34: Hoare triple {33425#(= ~SERIAL_STATE~0 0)} ldv_usb_register_driver_7_#t~ret329#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_7_#t~ret329#1 && ldv_usb_register_driver_7_#t~ret329#1 <= 2147483647;ldv_usb_register_driver_7_~tmp~30#1 := ldv_usb_register_driver_7_#t~ret329#1;havoc ldv_usb_register_driver_7_#t~ret329#1;ldv_usb_register_driver_7_~ldv_func_res~0#1 := ldv_usb_register_driver_7_~tmp~30#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret286#1.base, ldv_usb_driver_1_#t~ret286#1.offset, ldv_usb_driver_1_~tmp~26#1.base, ldv_usb_driver_1_~tmp~26#1.offset;havoc ldv_usb_driver_1_~tmp~26#1.base, ldv_usb_driver_1_~tmp~26#1.offset; {33425#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:51:55,468 INFO L272 TraceCheckUtils]: 35: Hoare triple {33425#(= ~SERIAL_STATE~0 0)} call ldv_usb_driver_1_#t~ret286#1.base, ldv_usb_driver_1_#t~ret286#1.offset := ldv_zalloc(1520); {33446#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:55,468 INFO L290 TraceCheckUtils]: 36: Hoare triple {33446#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet28#1 && #t~nondet28#1 <= 2147483647;~tmp___0~1#1 := #t~nondet28#1;havoc #t~nondet28#1; {33423#true} is VALID [2022-02-20 21:51:55,468 INFO L290 TraceCheckUtils]: 37: Hoare triple {33423#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {33423#true} is VALID [2022-02-20 21:51:55,468 INFO L290 TraceCheckUtils]: 38: Hoare triple {33423#true} assume true; {33423#true} is VALID [2022-02-20 21:51:55,469 INFO L284 TraceCheckUtils]: 39: Hoare quadruple {33423#true} {33425#(= ~SERIAL_STATE~0 0)} #1434#return; {33425#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:51:55,469 INFO L290 TraceCheckUtils]: 40: Hoare triple {33425#(= ~SERIAL_STATE~0 0)} ldv_usb_driver_1_~tmp~26#1.base, ldv_usb_driver_1_~tmp~26#1.offset := ldv_usb_driver_1_#t~ret286#1.base, ldv_usb_driver_1_#t~ret286#1.offset;havoc ldv_usb_driver_1_#t~ret286#1.base, ldv_usb_driver_1_#t~ret286#1.offset;~cdc_mbim_driver_group1~0.base, ~cdc_mbim_driver_group1~0.offset := ldv_usb_driver_1_~tmp~26#1.base, ldv_usb_driver_1_~tmp~26#1.offset; {33425#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:51:55,469 INFO L290 TraceCheckUtils]: 41: Hoare triple {33425#(= ~SERIAL_STATE~0 0)} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_7_#res#1 := ldv_usb_register_driver_7_~ldv_func_res~0#1; {33425#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:51:55,470 INFO L290 TraceCheckUtils]: 42: Hoare triple {33425#(= ~SERIAL_STATE~0 0)} cdc_mbim_driver_init_#t~ret279#1 := ldv_usb_register_driver_7_#res#1;assume { :end_inline_ldv_usb_register_driver_7 } true;assume -2147483648 <= cdc_mbim_driver_init_#t~ret279#1 && cdc_mbim_driver_init_#t~ret279#1 <= 2147483647;cdc_mbim_driver_init_~tmp~23#1 := cdc_mbim_driver_init_#t~ret279#1;havoc cdc_mbim_driver_init_#t~ret279#1;cdc_mbim_driver_init_#res#1 := cdc_mbim_driver_init_~tmp~23#1; {33425#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:51:55,470 INFO L290 TraceCheckUtils]: 43: Hoare triple {33425#(= ~SERIAL_STATE~0 0)} main_#t~ret304#1 := cdc_mbim_driver_init_#res#1;assume { :end_inline_cdc_mbim_driver_init } true;assume -2147483648 <= main_#t~ret304#1 && main_#t~ret304#1 <= 2147483647;~ldv_retval_4~0 := main_#t~ret304#1;havoc main_#t~ret304#1; {33425#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:51:55,470 INFO L290 TraceCheckUtils]: 44: Hoare triple {33425#(= ~SERIAL_STATE~0 0)} assume !(0 == ~ldv_retval_4~0); {33425#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:51:55,471 INFO L290 TraceCheckUtils]: 45: Hoare triple {33425#(= ~SERIAL_STATE~0 0)} assume 0 != ~ldv_retval_4~0;~ldv_state_variable_0~0 := 2; {33425#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:51:55,471 INFO L290 TraceCheckUtils]: 46: Hoare triple {33425#(= ~SERIAL_STATE~0 0)} assume { :begin_inline_ldv_check_final_state } true; {33425#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:51:55,471 INFO L290 TraceCheckUtils]: 47: Hoare triple {33425#(= ~SERIAL_STATE~0 0)} assume 0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616; {33425#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:51:55,472 INFO L290 TraceCheckUtils]: 48: Hoare triple {33425#(= ~SERIAL_STATE~0 0)} assume 0 == (~usb_dev~0.base + ~usb_dev~0.offset) % 18446744073709551616; {33425#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:51:55,472 INFO L290 TraceCheckUtils]: 49: Hoare triple {33425#(= ~SERIAL_STATE~0 0)} assume 0 == ~dev_counter~0; {33425#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:51:55,472 INFO L290 TraceCheckUtils]: 50: Hoare triple {33425#(= ~SERIAL_STATE~0 0)} assume 0 == ~INTERF_STATE~0; {33425#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:51:55,472 INFO L290 TraceCheckUtils]: 51: Hoare triple {33425#(= ~SERIAL_STATE~0 0)} assume !(0 == ~SERIAL_STATE~0); {33424#false} is VALID [2022-02-20 21:51:55,472 INFO L272 TraceCheckUtils]: 52: Hoare triple {33424#false} call ldv_error(); {33424#false} is VALID [2022-02-20 21:51:55,473 INFO L290 TraceCheckUtils]: 53: Hoare triple {33424#false} assume !false; {33424#false} is VALID [2022-02-20 21:51:55,473 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-02-20 21:51:55,473 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:51:55,474 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1818417014] [2022-02-20 21:51:55,475 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1818417014] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:51:55,475 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:51:55,475 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-02-20 21:51:55,475 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1346233681] [2022-02-20 21:51:55,475 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:51:55,476 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 6.8) internal successors, (34), 3 states have internal predecessors, (34), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 54 [2022-02-20 21:51:55,476 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:51:55,476 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 6.8) internal successors, (34), 3 states have internal predecessors, (34), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2022-02-20 21:51:55,514 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 45 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:51:55,514 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-02-20 21:51:55,514 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:51:55,514 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-02-20 21:51:55,514 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-02-20 21:51:55,515 INFO L87 Difference]: Start difference. First operand 1908 states and 2692 transitions. Second operand has 5 states, 5 states have (on average 6.8) internal successors, (34), 3 states have internal predecessors, (34), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2022-02-20 21:51:58,151 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:51:58,151 INFO L93 Difference]: Finished difference Result 2230 states and 3223 transitions. [2022-02-20 21:51:58,151 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-02-20 21:51:58,152 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 6.8) internal successors, (34), 3 states have internal predecessors, (34), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 54 [2022-02-20 21:51:58,152 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:51:58,152 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 6.8) internal successors, (34), 3 states have internal predecessors, (34), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2022-02-20 21:51:58,157 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 849 transitions. [2022-02-20 21:51:58,158 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 6.8) internal successors, (34), 3 states have internal predecessors, (34), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2022-02-20 21:51:58,163 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 849 transitions. [2022-02-20 21:51:58,163 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 849 transitions. [2022-02-20 21:51:58,772 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 849 edges. 849 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:51:58,985 INFO L225 Difference]: With dead ends: 2230 [2022-02-20 21:51:58,985 INFO L226 Difference]: Without dead ends: 2218 [2022-02-20 21:51:58,986 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-02-20 21:51:58,986 INFO L933 BasicCegarLoop]: 648 mSDtfsCounter, 938 mSDsluCounter, 813 mSDsCounter, 0 mSdLazyCounter, 349 mSolverCounterSat, 255 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 990 SdHoareTripleChecker+Valid, 1461 SdHoareTripleChecker+Invalid, 604 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 255 IncrementalHoareTripleChecker+Valid, 349 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-02-20 21:51:58,987 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [990 Valid, 1461 Invalid, 604 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [255 Valid, 349 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2022-02-20 21:51:58,988 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2218 states. [2022-02-20 21:51:59,039 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2218 to 1898. [2022-02-20 21:51:59,039 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:51:59,042 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2218 states. Second operand has 1898 states, 1481 states have (on average 1.3936529372045916) internal successors, (2064), 1486 states have internal predecessors, (2064), 304 states have call successors, (304), 113 states have call predecessors, (304), 112 states have return successors, (310), 302 states have call predecessors, (310), 302 states have call successors, (310) [2022-02-20 21:51:59,044 INFO L74 IsIncluded]: Start isIncluded. First operand 2218 states. Second operand has 1898 states, 1481 states have (on average 1.3936529372045916) internal successors, (2064), 1486 states have internal predecessors, (2064), 304 states have call successors, (304), 113 states have call predecessors, (304), 112 states have return successors, (310), 302 states have call predecessors, (310), 302 states have call successors, (310) [2022-02-20 21:51:59,046 INFO L87 Difference]: Start difference. First operand 2218 states. Second operand has 1898 states, 1481 states have (on average 1.3936529372045916) internal successors, (2064), 1486 states have internal predecessors, (2064), 304 states have call successors, (304), 113 states have call predecessors, (304), 112 states have return successors, (310), 302 states have call predecessors, (310), 302 states have call successors, (310) [2022-02-20 21:51:59,178 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:51:59,179 INFO L93 Difference]: Finished difference Result 2218 states and 3208 transitions. [2022-02-20 21:51:59,179 INFO L276 IsEmpty]: Start isEmpty. Operand 2218 states and 3208 transitions. [2022-02-20 21:51:59,190 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:51:59,191 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:51:59,193 INFO L74 IsIncluded]: Start isIncluded. First operand has 1898 states, 1481 states have (on average 1.3936529372045916) internal successors, (2064), 1486 states have internal predecessors, (2064), 304 states have call successors, (304), 113 states have call predecessors, (304), 112 states have return successors, (310), 302 states have call predecessors, (310), 302 states have call successors, (310) Second operand 2218 states. [2022-02-20 21:51:59,195 INFO L87 Difference]: Start difference. First operand has 1898 states, 1481 states have (on average 1.3936529372045916) internal successors, (2064), 1486 states have internal predecessors, (2064), 304 states have call successors, (304), 113 states have call predecessors, (304), 112 states have return successors, (310), 302 states have call predecessors, (310), 302 states have call successors, (310) Second operand 2218 states. [2022-02-20 21:51:59,327 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:51:59,328 INFO L93 Difference]: Finished difference Result 2218 states and 3208 transitions. [2022-02-20 21:51:59,328 INFO L276 IsEmpty]: Start isEmpty. Operand 2218 states and 3208 transitions. [2022-02-20 21:51:59,334 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:51:59,334 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:51:59,334 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:51:59,335 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:51:59,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1898 states, 1481 states have (on average 1.3936529372045916) internal successors, (2064), 1486 states have internal predecessors, (2064), 304 states have call successors, (304), 113 states have call predecessors, (304), 112 states have return successors, (310), 302 states have call predecessors, (310), 302 states have call successors, (310) [2022-02-20 21:51:59,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1898 states to 1898 states and 2678 transitions. [2022-02-20 21:51:59,490 INFO L78 Accepts]: Start accepts. Automaton has 1898 states and 2678 transitions. Word has length 54 [2022-02-20 21:51:59,490 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:51:59,490 INFO L470 AbstractCegarLoop]: Abstraction has 1898 states and 2678 transitions. [2022-02-20 21:51:59,490 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 6.8) internal successors, (34), 3 states have internal predecessors, (34), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2022-02-20 21:51:59,490 INFO L276 IsEmpty]: Start isEmpty. Operand 1898 states and 2678 transitions. [2022-02-20 21:51:59,492 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-02-20 21:51:59,492 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:51:59,492 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:51:59,492 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2022-02-20 21:51:59,492 INFO L402 AbstractCegarLoop]: === Iteration 7 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:51:59,493 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:51:59,493 INFO L85 PathProgramCache]: Analyzing trace with hash 1986046453, now seen corresponding path program 1 times [2022-02-20 21:51:59,493 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:51:59,493 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [800982667] [2022-02-20 21:51:59,493 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:51:59,493 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:51:59,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:59,553 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 21:51:59,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:59,563 INFO L290 TraceCheckUtils]: 0: Hoare triple {43562#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet28#1 && #t~nondet28#1 <= 2147483647;~tmp___0~1#1 := #t~nondet28#1;havoc #t~nondet28#1; {43537#true} is VALID [2022-02-20 21:51:59,563 INFO L290 TraceCheckUtils]: 1: Hoare triple {43537#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {43537#true} is VALID [2022-02-20 21:51:59,564 INFO L290 TraceCheckUtils]: 2: Hoare triple {43537#true} assume true; {43537#true} is VALID [2022-02-20 21:51:59,564 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {43537#true} {43537#true} #1414#return; {43537#true} is VALID [2022-02-20 21:51:59,569 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 9 [2022-02-20 21:51:59,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:59,575 INFO L290 TraceCheckUtils]: 0: Hoare triple {43563#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {43537#true} is VALID [2022-02-20 21:51:59,575 INFO L290 TraceCheckUtils]: 1: Hoare triple {43537#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {43537#true} is VALID [2022-02-20 21:51:59,575 INFO L290 TraceCheckUtils]: 2: Hoare triple {43537#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {43537#true} is VALID [2022-02-20 21:51:59,575 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {43537#true} {43537#true} #1416#return; {43537#true} is VALID [2022-02-20 21:51:59,576 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 15 [2022-02-20 21:51:59,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:59,580 INFO L290 TraceCheckUtils]: 0: Hoare triple {43563#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {43537#true} is VALID [2022-02-20 21:51:59,581 INFO L290 TraceCheckUtils]: 1: Hoare triple {43537#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {43537#true} is VALID [2022-02-20 21:51:59,581 INFO L290 TraceCheckUtils]: 2: Hoare triple {43537#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {43537#true} is VALID [2022-02-20 21:51:59,581 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {43537#true} {43537#true} #1418#return; {43537#true} is VALID [2022-02-20 21:51:59,581 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 21 [2022-02-20 21:51:59,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:59,586 INFO L290 TraceCheckUtils]: 0: Hoare triple {43563#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {43537#true} is VALID [2022-02-20 21:51:59,586 INFO L290 TraceCheckUtils]: 1: Hoare triple {43537#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {43537#true} is VALID [2022-02-20 21:51:59,586 INFO L290 TraceCheckUtils]: 2: Hoare triple {43537#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {43537#true} is VALID [2022-02-20 21:51:59,586 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {43537#true} {43537#true} #1420#return; {43537#true} is VALID [2022-02-20 21:51:59,586 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 41 [2022-02-20 21:51:59,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:59,590 INFO L290 TraceCheckUtils]: 0: Hoare triple {43537#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {43537#true} is VALID [2022-02-20 21:51:59,590 INFO L290 TraceCheckUtils]: 1: Hoare triple {43537#true} assume true; {43537#true} is VALID [2022-02-20 21:51:59,591 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {43537#true} {43538#false} #1376#return; {43538#false} is VALID [2022-02-20 21:51:59,591 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 52 [2022-02-20 21:51:59,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:59,595 INFO L290 TraceCheckUtils]: 0: Hoare triple {43537#true} havoc ~tmp~3;assume -2147483648 <= #t~nondet31 && #t~nondet31 <= 2147483647;~tmp~3 := #t~nondet31;havoc #t~nondet31;#res := ~tmp~3; {43537#true} is VALID [2022-02-20 21:51:59,595 INFO L290 TraceCheckUtils]: 1: Hoare triple {43537#true} assume true; {43537#true} is VALID [2022-02-20 21:51:59,595 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {43537#true} {43538#false} #1380#return; {43538#false} is VALID [2022-02-20 21:51:59,596 INFO L290 TraceCheckUtils]: 0: Hoare triple {43537#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(82, 2);call #Ultimate.allocInit(9, 3);call #Ultimate.allocInit(22, 4);call #Ultimate.allocInit(219, 5);call #Ultimate.allocInit(24, 6);call #Ultimate.allocInit(24, 7);call #Ultimate.allocInit(22, 8);call #Ultimate.allocInit(24, 9);call #Ultimate.allocInit(9, 10);call #Ultimate.allocInit(18, 11);call #Ultimate.allocInit(219, 12);call #Ultimate.allocInit(36, 13);call #Ultimate.allocInit(36, 14);call #Ultimate.allocInit(9, 15);call #Ultimate.allocInit(18, 16);call #Ultimate.allocInit(219, 17);call #Ultimate.allocInit(67, 18);call #Ultimate.allocInit(67, 19);call #Ultimate.allocInit(9, 20);call #Ultimate.allocInit(9, 21);call #Ultimate.allocInit(9, 22);call #Ultimate.allocInit(9, 23);~LDV_IN_INTERRUPT~0 := 1;~cdc_mbim_info_zlp_group1~0.base, ~cdc_mbim_info_zlp_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0;~cdc_mbim_info_group0~0.base, ~cdc_mbim_info_group0~0.offset := 0, 0;~ref_cnt~0 := 0;~cdc_mbim_info_zlp_group2~0.base, ~cdc_mbim_info_zlp_group2~0.offset := 0, 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~cdc_mbim_info_group1~0.base, ~cdc_mbim_info_group1~0.offset := 0, 0;~cdc_mbim_info_zlp_group0~0.base, ~cdc_mbim_info_zlp_group0~0.offset := 0, 0;~cdc_mbim_info_group2~0.base, ~cdc_mbim_info_group2~0.offset := 0, 0;~cdc_mbim_driver_group1~0.base, ~cdc_mbim_driver_group1~0.offset := 0, 0;~#cdc_mbim_info~0.base, ~#cdc_mbim_info~0.offset := 24, 0;call #Ultimate.allocInit(124, 24);call write~init~$Pointer$(20, 0, ~#cdc_mbim_info~0.base, ~#cdc_mbim_info~0.offset, 8);call write~init~int(9232, ~#cdc_mbim_info~0.base, 8 + ~#cdc_mbim_info~0.offset, 4);call write~init~$Pointer$(#funAddr~cdc_mbim_bind.base, #funAddr~cdc_mbim_bind.offset, ~#cdc_mbim_info~0.base, 12 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_unbind.base, #funAddr~cdc_mbim_unbind.offset, ~#cdc_mbim_info~0.base, 20 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 28 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 36 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 44 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_manage_power.base, #funAddr~cdc_mbim_manage_power.offset, ~#cdc_mbim_info~0.base, 52 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 60 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 68 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_rx_fixup.base, #funAddr~cdc_mbim_rx_fixup.offset, ~#cdc_mbim_info~0.base, 76 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_tx_fixup.base, #funAddr~cdc_mbim_tx_fixup.offset, ~#cdc_mbim_info~0.base, 84 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 92 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 100 + ~#cdc_mbim_info~0.offset, 8);call write~init~int(0, ~#cdc_mbim_info~0.base, 108 + ~#cdc_mbim_info~0.offset, 4);call write~init~int(0, ~#cdc_mbim_info~0.base, 112 + ~#cdc_mbim_info~0.offset, 4);call write~init~int(0, ~#cdc_mbim_info~0.base, 116 + ~#cdc_mbim_info~0.offset, 8);~#cdc_mbim_info_zlp~0.base, ~#cdc_mbim_info_zlp~0.offset := 25, 0;call #Ultimate.allocInit(124, 25);call write~init~$Pointer$(21, 0, ~#cdc_mbim_info_zlp~0.base, ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~int(9744, ~#cdc_mbim_info_zlp~0.base, 8 + ~#cdc_mbim_info_zlp~0.offset, 4);call write~init~$Pointer$(#funAddr~cdc_mbim_bind.base, #funAddr~cdc_mbim_bind.offset, ~#cdc_mbim_info_zlp~0.base, 12 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_unbind.base, #funAddr~cdc_mbim_unbind.offset, ~#cdc_mbim_info_zlp~0.base, 20 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 28 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 36 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 44 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_manage_power.base, #funAddr~cdc_mbim_manage_power.offset, ~#cdc_mbim_info_zlp~0.base, 52 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 60 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 68 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_rx_fixup.base, #funAddr~cdc_mbim_rx_fixup.offset, ~#cdc_mbim_info_zlp~0.base, 76 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_tx_fixup.base, #funAddr~cdc_mbim_tx_fixup.offset, ~#cdc_mbim_info_zlp~0.base, 84 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 92 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 100 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~int(0, ~#cdc_mbim_info_zlp~0.base, 108 + ~#cdc_mbim_info_zlp~0.offset, 4);call write~init~int(0, ~#cdc_mbim_info_zlp~0.base, 112 + ~#cdc_mbim_info_zlp~0.offset, 4);call write~init~int(0, ~#cdc_mbim_info_zlp~0.base, 116 + ~#cdc_mbim_info_zlp~0.offset, 8);~#mbim_devs~0.base, ~#mbim_devs~0.offset := 26, 0;call #Ultimate.allocInit(125, 26);call write~init~int(896, ~#mbim_devs~0.base, ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 2 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 4 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 6 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 8 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 10 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 11 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 12 + ~#mbim_devs~0.offset, 1);call write~init~int(2, ~#mbim_devs~0.base, 13 + ~#mbim_devs~0.offset, 1);call write~init~int(13, ~#mbim_devs~0.base, 14 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 15 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 16 + ~#mbim_devs~0.offset, 1);call write~init~int(~#cdc_mbim_info~0.base + ~#cdc_mbim_info~0.offset, ~#mbim_devs~0.base, 17 + ~#mbim_devs~0.offset, 8);call write~init~int(899, ~#mbim_devs~0.base, 25 + ~#mbim_devs~0.offset, 2);call write~init~int(4505, ~#mbim_devs~0.base, 27 + ~#mbim_devs~0.offset, 2);call write~init~int(26786, ~#mbim_devs~0.base, 29 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 31 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 33 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 35 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 36 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 37 + ~#mbim_devs~0.offset, 1);call write~init~int(2, ~#mbim_devs~0.base, 38 + ~#mbim_devs~0.offset, 1);call write~init~int(14, ~#mbim_devs~0.base, 39 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 40 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 41 + ~#mbim_devs~0.offset, 1);call write~init~int(~#cdc_mbim_info_zlp~0.base + ~#cdc_mbim_info_zlp~0.offset, ~#mbim_devs~0.base, 42 + ~#mbim_devs~0.offset, 8);call write~init~int(899, ~#mbim_devs~0.base, 50 + ~#mbim_devs~0.offset, 2);call write~init~int(1008, ~#mbim_devs~0.base, 52 + ~#mbim_devs~0.offset, 2);call write~init~int(19229, ~#mbim_devs~0.base, 54 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 56 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 58 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 60 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 61 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 62 + ~#mbim_devs~0.offset, 1);call write~init~int(2, ~#mbim_devs~0.base, 63 + ~#mbim_devs~0.offset, 1);call write~init~int(14, ~#mbim_devs~0.base, 64 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 65 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 66 + ~#mbim_devs~0.offset, 1);call write~init~int(~#cdc_mbim_info_zlp~0.base + ~#cdc_mbim_info_zlp~0.offset, ~#mbim_devs~0.base, 67 + ~#mbim_devs~0.offset, 8);call write~init~int(896, ~#mbim_devs~0.base, 75 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 77 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 79 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 81 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 83 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 85 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 86 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 87 + ~#mbim_devs~0.offset, 1);call write~init~int(2, ~#mbim_devs~0.base, 88 + ~#mbim_devs~0.offset, 1);call write~init~int(14, ~#mbim_devs~0.base, 89 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 90 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 91 + ~#mbim_devs~0.offset, 1);call write~init~int(~#cdc_mbim_info~0.base + ~#cdc_mbim_info~0.offset, ~#mbim_devs~0.base, 92 + ~#mbim_devs~0.offset, 8);call write~init~int(0, ~#mbim_devs~0.base, 100 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 102 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 104 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 106 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 108 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 110 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 111 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 112 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 113 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 114 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 115 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 116 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 117 + ~#mbim_devs~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.bInterfaceNumber := 0;~__mod_usb_device_table~0.driver_info := 0;~#cdc_mbim_driver~0.base, ~#cdc_mbim_driver~0.offset := 27, 0;call #Ultimate.allocInit(285, 27);call write~init~$Pointer$(22, 0, ~#cdc_mbim_driver~0.base, ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usbnet_probe.base, #funAddr~usbnet_probe.offset, ~#cdc_mbim_driver~0.base, 8 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usbnet_disconnect.base, #funAddr~usbnet_disconnect.offset, ~#cdc_mbim_driver~0.base, 16 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 24 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_suspend.base, #funAddr~cdc_mbim_suspend.offset, ~#cdc_mbim_driver~0.base, 32 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_resume.base, #funAddr~cdc_mbim_resume.offset, ~#cdc_mbim_driver~0.base, 40 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_resume.base, #funAddr~cdc_mbim_resume.offset, ~#cdc_mbim_driver~0.base, 48 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 56 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 64 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(~#mbim_devs~0.base, ~#mbim_devs~0.offset, ~#cdc_mbim_driver~0.base, 72 + ~#cdc_mbim_driver~0.offset, 8);call write~init~int(0, ~#cdc_mbim_driver~0.base, 80 + ~#cdc_mbim_driver~0.offset, 4);call write~init~int(0, ~#cdc_mbim_driver~0.base, 84 + ~#cdc_mbim_driver~0.offset, 4);call write~init~int(0, ~#cdc_mbim_driver~0.base, 88 + ~#cdc_mbim_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 92 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 100 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 108 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 116 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 124 + ~#cdc_mbim_driver~0.offset, 8);call write~init~int(0, ~#cdc_mbim_driver~0.base, 132 + ~#cdc_mbim_driver~0.offset, 4);call write~init~int(0, ~#cdc_mbim_driver~0.base, 136 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 148 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 156 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 164 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 172 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 180 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 188 + ~#cdc_mbim_driver~0.offset, 8);call write~init~int(0, ~#cdc_mbim_driver~0.base, 196 + ~#cdc_mbim_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 197 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 205 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 213 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 221 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 229 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 237 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 245 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 253 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 261 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 269 + ~#cdc_mbim_driver~0.offset, 8);call write~init~int(0, ~#cdc_mbim_driver~0.base, 277 + ~#cdc_mbim_driver~0.offset, 4);call write~init~int(0, ~#cdc_mbim_driver~0.base, 281 + ~#cdc_mbim_driver~0.offset, 1);call write~init~int(1, ~#cdc_mbim_driver~0.base, 282 + ~#cdc_mbim_driver~0.offset, 1);call write~init~int(1, ~#cdc_mbim_driver~0.base, 283 + ~#cdc_mbim_driver~0.offset, 1);call write~init~int(0, ~#cdc_mbim_driver~0.base, 284 + ~#cdc_mbim_driver~0.offset, 1);~ldv_retval_2~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_5~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_6~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {43537#true} is VALID [2022-02-20 21:51:59,597 INFO L290 TraceCheckUtils]: 1: Hoare triple {43537#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret287#1.base, main_#t~ret287#1.offset, main_#t~nondet288#1, main_#t~nondet289#1, main_#t~memset~res290#1.base, main_#t~memset~res290#1.offset, main_#t~memset~res291#1.base, main_#t~memset~res291#1.offset, main_#t~memset~res292#1.base, main_#t~memset~res292#1.offset, main_#t~nondet293#1, main_#t~switch294#1, main_#t~nondet295#1, main_#t~switch296#1, main_#t~ret297#1, main_#t~ret298#1, main_#t~mem299#1, main_#t~ret300#1, main_#t~ret301#1, main_#t~nondet302#1, main_#t~switch303#1, main_#t~ret304#1, main_#t~nondet305#1, main_#t~switch306#1, main_#t~ret307#1, main_#t~ret308#1, main_#t~ret309#1, main_#t~mem310#1, main_#t~ret311#1.base, main_#t~ret311#1.offset, main_#t~mem312#1, main_#t~ret313#1.base, main_#t~ret313#1.offset, main_#t~ret314#1, main_#t~ret315#1, main_#t~nondet316#1, main_#t~switch317#1, main_#t~ret318#1, main_#t~ret319#1, main_#t~ret320#1, main_#t~mem321#1, main_#t~ret322#1.base, main_#t~ret322#1.offset, main_#t~mem323#1, main_#t~ret324#1.base, main_#t~ret324#1.offset, main_#t~ret325#1, main_#t~ret326#1, main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset, main_~tmp~27#1.base, main_~tmp~27#1.offset, main_~#ldvarg0~0#1.base, main_~#ldvarg0~0#1.offset, main_~#ldvarg3~0#1.base, main_~#ldvarg3~0#1.offset, main_~ldvarg2~0#1, main_~tmp___0~14#1, main_~ldvarg4~0#1, main_~tmp___1~9#1, main_~#ldvarg5~0#1.base, main_~#ldvarg5~0#1.offset, main_~tmp___2~3#1, main_~tmp___3~0#1, main_~tmp___4~1#1, main_~tmp___5~0#1, main_~tmp___6~0#1;havoc main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset;havoc main_~tmp~27#1.base, main_~tmp~27#1.offset;call main_~#ldvarg0~0#1.base, main_~#ldvarg0~0#1.offset := #Ultimate.allocOnStack(4);call main_~#ldvarg3~0#1.base, main_~#ldvarg3~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~ldvarg2~0#1;havoc main_~tmp___0~14#1;havoc main_~ldvarg4~0#1;havoc main_~tmp___1~9#1;call main_~#ldvarg5~0#1.base, main_~#ldvarg5~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~tmp___2~3#1;havoc main_~tmp___3~0#1;havoc main_~tmp___4~1#1;havoc main_~tmp___5~0#1;havoc main_~tmp___6~0#1; {43537#true} is VALID [2022-02-20 21:51:59,597 INFO L272 TraceCheckUtils]: 2: Hoare triple {43537#true} call main_#t~ret287#1.base, main_#t~ret287#1.offset := ldv_zalloc(32); {43562#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:59,597 INFO L290 TraceCheckUtils]: 3: Hoare triple {43562#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet28#1 && #t~nondet28#1 <= 2147483647;~tmp___0~1#1 := #t~nondet28#1;havoc #t~nondet28#1; {43537#true} is VALID [2022-02-20 21:51:59,597 INFO L290 TraceCheckUtils]: 4: Hoare triple {43537#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {43537#true} is VALID [2022-02-20 21:51:59,598 INFO L290 TraceCheckUtils]: 5: Hoare triple {43537#true} assume true; {43537#true} is VALID [2022-02-20 21:51:59,598 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {43537#true} {43537#true} #1414#return; {43537#true} is VALID [2022-02-20 21:51:59,598 INFO L290 TraceCheckUtils]: 7: Hoare triple {43537#true} main_~tmp~27#1.base, main_~tmp~27#1.offset := main_#t~ret287#1.base, main_#t~ret287#1.offset;havoc main_#t~ret287#1.base, main_#t~ret287#1.offset;main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset := main_~tmp~27#1.base, main_~tmp~27#1.offset;assume -2147483648 <= main_#t~nondet288#1 && main_#t~nondet288#1 <= 2147483647;main_~tmp___0~14#1 := main_#t~nondet288#1;havoc main_#t~nondet288#1;main_~ldvarg2~0#1 := main_~tmp___0~14#1;assume -2147483648 <= main_#t~nondet289#1 && main_#t~nondet289#1 <= 2147483647;main_~tmp___1~9#1 := main_#t~nondet289#1;havoc main_#t~nondet289#1;main_~ldvarg4~0#1 := main_~tmp___1~9#1;assume { :begin_inline_ldv_initialize } true; {43537#true} is VALID [2022-02-20 21:51:59,598 INFO L290 TraceCheckUtils]: 8: Hoare triple {43537#true} assume { :end_inline_ldv_initialize } true; {43537#true} is VALID [2022-02-20 21:51:59,598 INFO L272 TraceCheckUtils]: 9: Hoare triple {43537#true} call main_#t~memset~res290#1.base, main_#t~memset~res290#1.offset := #Ultimate.C_memset(main_~#ldvarg0~0#1.base, main_~#ldvarg0~0#1.offset, 0, 4); {43563#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 21:51:59,599 INFO L290 TraceCheckUtils]: 10: Hoare triple {43563#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {43537#true} is VALID [2022-02-20 21:51:59,599 INFO L290 TraceCheckUtils]: 11: Hoare triple {43537#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {43537#true} is VALID [2022-02-20 21:51:59,599 INFO L290 TraceCheckUtils]: 12: Hoare triple {43537#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {43537#true} is VALID [2022-02-20 21:51:59,599 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {43537#true} {43537#true} #1416#return; {43537#true} is VALID [2022-02-20 21:51:59,599 INFO L290 TraceCheckUtils]: 14: Hoare triple {43537#true} havoc main_#t~memset~res290#1.base, main_#t~memset~res290#1.offset; {43537#true} is VALID [2022-02-20 21:51:59,600 INFO L272 TraceCheckUtils]: 15: Hoare triple {43537#true} call main_#t~memset~res291#1.base, main_#t~memset~res291#1.offset := #Ultimate.C_memset(main_~#ldvarg3~0#1.base, main_~#ldvarg3~0#1.offset, 0, 4); {43563#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 21:51:59,600 INFO L290 TraceCheckUtils]: 16: Hoare triple {43563#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {43537#true} is VALID [2022-02-20 21:51:59,600 INFO L290 TraceCheckUtils]: 17: Hoare triple {43537#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {43537#true} is VALID [2022-02-20 21:51:59,600 INFO L290 TraceCheckUtils]: 18: Hoare triple {43537#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {43537#true} is VALID [2022-02-20 21:51:59,600 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {43537#true} {43537#true} #1418#return; {43537#true} is VALID [2022-02-20 21:51:59,600 INFO L290 TraceCheckUtils]: 20: Hoare triple {43537#true} havoc main_#t~memset~res291#1.base, main_#t~memset~res291#1.offset; {43537#true} is VALID [2022-02-20 21:51:59,601 INFO L272 TraceCheckUtils]: 21: Hoare triple {43537#true} call main_#t~memset~res292#1.base, main_#t~memset~res292#1.offset := #Ultimate.C_memset(main_~#ldvarg5~0#1.base, main_~#ldvarg5~0#1.offset, 0, 4); {43563#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 21:51:59,601 INFO L290 TraceCheckUtils]: 22: Hoare triple {43563#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {43537#true} is VALID [2022-02-20 21:51:59,601 INFO L290 TraceCheckUtils]: 23: Hoare triple {43537#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {43537#true} is VALID [2022-02-20 21:51:59,601 INFO L290 TraceCheckUtils]: 24: Hoare triple {43537#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {43537#true} is VALID [2022-02-20 21:51:59,601 INFO L284 TraceCheckUtils]: 25: Hoare quadruple {43537#true} {43537#true} #1420#return; {43537#true} is VALID [2022-02-20 21:51:59,602 INFO L290 TraceCheckUtils]: 26: Hoare triple {43537#true} havoc main_#t~memset~res292#1.base, main_#t~memset~res292#1.offset;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {43555#(= ~ldv_state_variable_2~0 0)} is VALID [2022-02-20 21:51:59,602 INFO L290 TraceCheckUtils]: 27: Hoare triple {43555#(= ~ldv_state_variable_2~0 0)} assume -2147483648 <= main_#t~nondet293#1 && main_#t~nondet293#1 <= 2147483647;main_~tmp___2~3#1 := main_#t~nondet293#1;havoc main_#t~nondet293#1;main_#t~switch294#1 := 0 == main_~tmp___2~3#1; {43555#(= ~ldv_state_variable_2~0 0)} is VALID [2022-02-20 21:51:59,602 INFO L290 TraceCheckUtils]: 28: Hoare triple {43555#(= ~ldv_state_variable_2~0 0)} assume !main_#t~switch294#1;main_#t~switch294#1 := main_#t~switch294#1 || 1 == main_~tmp___2~3#1; {43555#(= ~ldv_state_variable_2~0 0)} is VALID [2022-02-20 21:51:59,602 INFO L290 TraceCheckUtils]: 29: Hoare triple {43555#(= ~ldv_state_variable_2~0 0)} assume !main_#t~switch294#1;main_#t~switch294#1 := main_#t~switch294#1 || 2 == main_~tmp___2~3#1; {43555#(= ~ldv_state_variable_2~0 0)} is VALID [2022-02-20 21:51:59,603 INFO L290 TraceCheckUtils]: 30: Hoare triple {43555#(= ~ldv_state_variable_2~0 0)} assume !main_#t~switch294#1;main_#t~switch294#1 := main_#t~switch294#1 || 3 == main_~tmp___2~3#1; {43555#(= ~ldv_state_variable_2~0 0)} is VALID [2022-02-20 21:51:59,603 INFO L290 TraceCheckUtils]: 31: Hoare triple {43555#(= ~ldv_state_variable_2~0 0)} assume main_#t~switch294#1; {43555#(= ~ldv_state_variable_2~0 0)} is VALID [2022-02-20 21:51:59,604 INFO L290 TraceCheckUtils]: 32: Hoare triple {43555#(= ~ldv_state_variable_2~0 0)} assume 0 != ~ldv_state_variable_2~0;assume -2147483648 <= main_#t~nondet316#1 && main_#t~nondet316#1 <= 2147483647;main_~tmp___6~0#1 := main_#t~nondet316#1;havoc main_#t~nondet316#1;main_#t~switch317#1 := 0 == main_~tmp___6~0#1; {43538#false} is VALID [2022-02-20 21:51:59,604 INFO L290 TraceCheckUtils]: 33: Hoare triple {43538#false} assume !main_#t~switch317#1;main_#t~switch317#1 := main_#t~switch317#1 || 1 == main_~tmp___6~0#1; {43538#false} is VALID [2022-02-20 21:51:59,604 INFO L290 TraceCheckUtils]: 34: Hoare triple {43538#false} assume !main_#t~switch317#1;main_#t~switch317#1 := main_#t~switch317#1 || 2 == main_~tmp___6~0#1; {43538#false} is VALID [2022-02-20 21:51:59,604 INFO L290 TraceCheckUtils]: 35: Hoare triple {43538#false} assume !main_#t~switch317#1;main_#t~switch317#1 := main_#t~switch317#1 || 3 == main_~tmp___6~0#1; {43538#false} is VALID [2022-02-20 21:51:59,604 INFO L290 TraceCheckUtils]: 36: Hoare triple {43538#false} assume !main_#t~switch317#1;main_#t~switch317#1 := main_#t~switch317#1 || 4 == main_~tmp___6~0#1; {43538#false} is VALID [2022-02-20 21:51:59,604 INFO L290 TraceCheckUtils]: 37: Hoare triple {43538#false} assume main_#t~switch317#1; {43538#false} is VALID [2022-02-20 21:51:59,604 INFO L290 TraceCheckUtils]: 38: Hoare triple {43538#false} assume 1 == ~ldv_state_variable_2~0; {43538#false} is VALID [2022-02-20 21:51:59,605 INFO L272 TraceCheckUtils]: 39: Hoare triple {43538#false} call main_#t~ret325#1 := cdc_mbim_manage_power(~cdc_mbim_info_zlp_group0~0.base, ~cdc_mbim_info_zlp_group0~0.offset, main_~ldvarg4~0#1); {43538#false} is VALID [2022-02-20 21:51:59,605 INFO L290 TraceCheckUtils]: 40: Hoare triple {43538#false} ~dev#1.base, ~dev#1.offset := #in~dev#1.base, #in~dev#1.offset;~on#1 := #in~on#1;havoc ~info~0#1.base, ~info~0#1.offset;havoc ~rv~0#1;call ~#descriptor~0#1.base, ~#descriptor~0#1.offset := #Ultimate.allocOnStack(37);havoc ~tmp~15#1;havoc ~tmp___0~7#1;havoc ~tmp___1~3#1;havoc ~tmp___2~0#1;~info~0#1.base, ~info~0#1.offset := ~dev#1.base, 368 + ~dev#1.offset;~rv~0#1 := 0;call write~$Pointer$(3, 0, ~#descriptor~0#1.base, ~#descriptor~0#1.offset, 8);call write~$Pointer$(4, 0, ~#descriptor~0#1.base, 8 + ~#descriptor~0#1.offset, 8);call write~$Pointer$(5, 0, ~#descriptor~0#1.base, 16 + ~#descriptor~0#1.offset, 8);call write~$Pointer$(6, 0, ~#descriptor~0#1.base, 24 + ~#descriptor~0#1.offset, 8);call write~int(88, ~#descriptor~0#1.base, 32 + ~#descriptor~0#1.offset, 4);call write~int(0, ~#descriptor~0#1.base, 36 + ~#descriptor~0#1.offset, 1);call #t~mem122#1 := read~int(~#descriptor~0#1.base, 36 + ~#descriptor~0#1.offset, 1); {43538#false} is VALID [2022-02-20 21:51:59,605 INFO L272 TraceCheckUtils]: 41: Hoare triple {43538#false} call #t~ret123#1 := ldv__builtin_expect(#t~mem122#1 % 256, 0); {43537#true} is VALID [2022-02-20 21:51:59,605 INFO L290 TraceCheckUtils]: 42: Hoare triple {43537#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {43537#true} is VALID [2022-02-20 21:51:59,605 INFO L290 TraceCheckUtils]: 43: Hoare triple {43537#true} assume true; {43537#true} is VALID [2022-02-20 21:51:59,605 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {43537#true} {43538#false} #1376#return; {43538#false} is VALID [2022-02-20 21:51:59,605 INFO L290 TraceCheckUtils]: 45: Hoare triple {43538#false} assume -9223372036854775808 <= #t~ret123#1 && #t~ret123#1 <= 9223372036854775807;~tmp___0~7#1 := #t~ret123#1;havoc #t~mem122#1;havoc #t~ret123#1; {43538#false} is VALID [2022-02-20 21:51:59,605 INFO L290 TraceCheckUtils]: 46: Hoare triple {43538#false} assume !(0 != ~tmp___0~7#1); {43538#false} is VALID [2022-02-20 21:51:59,606 INFO L290 TraceCheckUtils]: 47: Hoare triple {43538#false} assume !(0 != ~on#1); {43538#false} is VALID [2022-02-20 21:51:59,606 INFO L290 TraceCheckUtils]: 48: Hoare triple {43538#false} assume 0 == ~on#1;assume { :begin_inline_atomic_dec_and_test } true;atomic_dec_and_test_#in~v#1.base, atomic_dec_and_test_#in~v#1.offset := ~info~0#1.base, 8 + ~info~0#1.offset;havoc atomic_dec_and_test_#res#1;havoc atomic_dec_and_test_~v#1.base, atomic_dec_and_test_~v#1.offset, atomic_dec_and_test_~c~0#1;atomic_dec_and_test_~v#1.base, atomic_dec_and_test_~v#1.offset := atomic_dec_and_test_#in~v#1.base, atomic_dec_and_test_#in~v#1.offset;havoc atomic_dec_and_test_~c~0#1;atomic_dec_and_test_#res#1 := (if 0 != atomic_dec_and_test_~c~0#1 % 256 % 4294967296 then 1 else 0); {43538#false} is VALID [2022-02-20 21:51:59,606 INFO L290 TraceCheckUtils]: 49: Hoare triple {43538#false} #t~ret128#1 := atomic_dec_and_test_#res#1;assume { :end_inline_atomic_dec_and_test } true;assume -2147483648 <= #t~ret128#1 && #t~ret128#1 <= 2147483647;~tmp___2~0#1 := #t~ret128#1;havoc #t~ret128#1; {43538#false} is VALID [2022-02-20 21:51:59,606 INFO L290 TraceCheckUtils]: 50: Hoare triple {43538#false} assume 0 != ~tmp___2~0#1; {43538#false} is VALID [2022-02-20 21:51:59,606 INFO L290 TraceCheckUtils]: 51: Hoare triple {43538#false} call #t~mem129#1.base, #t~mem129#1.offset := read~$Pointer$(~dev#1.base, 8 + ~dev#1.offset, 8);assume { :begin_inline_ldv_usb_autopm_get_interface_2 } true;ldv_usb_autopm_get_interface_2_#in~ldv_func_arg1#1.base, ldv_usb_autopm_get_interface_2_#in~ldv_func_arg1#1.offset := #t~mem129#1.base, #t~mem129#1.offset;havoc ldv_usb_autopm_get_interface_2_#res#1;havoc ldv_usb_autopm_get_interface_2_#t~ret327#1, ldv_usb_autopm_get_interface_2_~ldv_func_arg1#1.base, ldv_usb_autopm_get_interface_2_~ldv_func_arg1#1.offset, ldv_usb_autopm_get_interface_2_~tmp~28#1;ldv_usb_autopm_get_interface_2_~ldv_func_arg1#1.base, ldv_usb_autopm_get_interface_2_~ldv_func_arg1#1.offset := ldv_usb_autopm_get_interface_2_#in~ldv_func_arg1#1.base, ldv_usb_autopm_get_interface_2_#in~ldv_func_arg1#1.offset;havoc ldv_usb_autopm_get_interface_2_~tmp~28#1;assume { :begin_inline_ldv_get_interface } true;ldv_get_interface_#in~intf#1.base, ldv_get_interface_#in~intf#1.offset := ldv_usb_autopm_get_interface_2_~ldv_func_arg1#1.base, ldv_usb_autopm_get_interface_2_~ldv_func_arg1#1.offset;havoc ldv_get_interface_#res#1;havoc ldv_get_interface_#t~ret337#1, ldv_get_interface_~intf#1.base, ldv_get_interface_~intf#1.offset, ldv_get_interface_~res~1#1, ldv_get_interface_~tmp~35#1;ldv_get_interface_~intf#1.base, ldv_get_interface_~intf#1.offset := ldv_get_interface_#in~intf#1.base, ldv_get_interface_#in~intf#1.offset;havoc ldv_get_interface_~res~1#1;havoc ldv_get_interface_~tmp~35#1; {43538#false} is VALID [2022-02-20 21:51:59,606 INFO L272 TraceCheckUtils]: 52: Hoare triple {43538#false} call ldv_get_interface_#t~ret337#1 := ldv_undef_int(); {43537#true} is VALID [2022-02-20 21:51:59,607 INFO L290 TraceCheckUtils]: 53: Hoare triple {43537#true} havoc ~tmp~3;assume -2147483648 <= #t~nondet31 && #t~nondet31 <= 2147483647;~tmp~3 := #t~nondet31;havoc #t~nondet31;#res := ~tmp~3; {43537#true} is VALID [2022-02-20 21:51:59,607 INFO L290 TraceCheckUtils]: 54: Hoare triple {43537#true} assume true; {43537#true} is VALID [2022-02-20 21:51:59,607 INFO L284 TraceCheckUtils]: 55: Hoare quadruple {43537#true} {43538#false} #1380#return; {43538#false} is VALID [2022-02-20 21:51:59,607 INFO L290 TraceCheckUtils]: 56: Hoare triple {43538#false} assume -2147483648 <= ldv_get_interface_#t~ret337#1 && ldv_get_interface_#t~ret337#1 <= 2147483647;ldv_get_interface_~tmp~35#1 := ldv_get_interface_#t~ret337#1;havoc ldv_get_interface_#t~ret337#1;ldv_get_interface_~res~1#1 := ldv_get_interface_~tmp~35#1; {43538#false} is VALID [2022-02-20 21:51:59,607 INFO L290 TraceCheckUtils]: 57: Hoare triple {43538#false} assume ldv_get_interface_~res~1#1 <= 0; {43538#false} is VALID [2022-02-20 21:51:59,608 INFO L290 TraceCheckUtils]: 58: Hoare triple {43538#false} assume 0 == ldv_get_interface_~res~1#1;~INTERF_STATE~0 := 1 + ~INTERF_STATE~0; {43538#false} is VALID [2022-02-20 21:51:59,608 INFO L290 TraceCheckUtils]: 59: Hoare triple {43538#false} ldv_get_interface_#res#1 := ldv_get_interface_~res~1#1; {43538#false} is VALID [2022-02-20 21:51:59,608 INFO L290 TraceCheckUtils]: 60: Hoare triple {43538#false} ldv_usb_autopm_get_interface_2_#t~ret327#1 := ldv_get_interface_#res#1;assume { :end_inline_ldv_get_interface } true;assume -2147483648 <= ldv_usb_autopm_get_interface_2_#t~ret327#1 && ldv_usb_autopm_get_interface_2_#t~ret327#1 <= 2147483647;ldv_usb_autopm_get_interface_2_~tmp~28#1 := ldv_usb_autopm_get_interface_2_#t~ret327#1;havoc ldv_usb_autopm_get_interface_2_#t~ret327#1;ldv_usb_autopm_get_interface_2_#res#1 := ldv_usb_autopm_get_interface_2_~tmp~28#1; {43538#false} is VALID [2022-02-20 21:51:59,609 INFO L290 TraceCheckUtils]: 61: Hoare triple {43538#false} #t~ret130#1 := ldv_usb_autopm_get_interface_2_#res#1;assume { :end_inline_ldv_usb_autopm_get_interface_2 } true;assume -2147483648 <= #t~ret130#1 && #t~ret130#1 <= 2147483647;~rv~0#1 := #t~ret130#1;havoc #t~mem129#1.base, #t~mem129#1.offset;havoc #t~ret130#1; {43538#false} is VALID [2022-02-20 21:51:59,609 INFO L290 TraceCheckUtils]: 62: Hoare triple {43538#false} assume !(~rv~0#1 < 0);call #t~mem131#1.base, #t~mem131#1.offset := read~$Pointer$(~dev#1.base, 8 + ~dev#1.offset, 8);call write~int(~on#1 % 2, #t~mem131#1.base, 39 + #t~mem131#1.offset, 1);havoc #t~mem131#1.base, #t~mem131#1.offset;call #t~mem132#1.base, #t~mem132#1.offset := read~$Pointer$(~dev#1.base, 8 + ~dev#1.offset, 8);assume { :begin_inline_ldv_usb_autopm_put_interface_3 } true;ldv_usb_autopm_put_interface_3_#in~ldv_func_arg1#1.base, ldv_usb_autopm_put_interface_3_#in~ldv_func_arg1#1.offset := #t~mem132#1.base, #t~mem132#1.offset;havoc ldv_usb_autopm_put_interface_3_~ldv_func_arg1#1.base, ldv_usb_autopm_put_interface_3_~ldv_func_arg1#1.offset;ldv_usb_autopm_put_interface_3_~ldv_func_arg1#1.base, ldv_usb_autopm_put_interface_3_~ldv_func_arg1#1.offset := ldv_usb_autopm_put_interface_3_#in~ldv_func_arg1#1.base, ldv_usb_autopm_put_interface_3_#in~ldv_func_arg1#1.offset;assume { :begin_inline_ldv_put_interface } true; {43538#false} is VALID [2022-02-20 21:51:59,609 INFO L290 TraceCheckUtils]: 63: Hoare triple {43538#false} assume !(~INTERF_STATE~0 > 0); {43538#false} is VALID [2022-02-20 21:51:59,609 INFO L272 TraceCheckUtils]: 64: Hoare triple {43538#false} call ldv_error(); {43538#false} is VALID [2022-02-20 21:51:59,609 INFO L290 TraceCheckUtils]: 65: Hoare triple {43538#false} assume !false; {43538#false} is VALID [2022-02-20 21:51:59,609 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-02-20 21:51:59,610 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:51:59,610 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [800982667] [2022-02-20 21:51:59,610 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [800982667] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:51:59,610 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:51:59,610 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-02-20 21:51:59,610 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1721569525] [2022-02-20 21:51:59,610 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:51:59,611 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.2) internal successors, (46), 3 states have internal predecessors, (46), 2 states have call successors, (8), 4 states have call predecessors, (8), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 66 [2022-02-20 21:51:59,611 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:51:59,611 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 9.2) internal successors, (46), 3 states have internal predecessors, (46), 2 states have call successors, (8), 4 states have call predecessors, (8), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2022-02-20 21:51:59,653 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 60 edges. 60 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:51:59,653 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-02-20 21:51:59,654 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:51:59,654 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-02-20 21:51:59,654 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-02-20 21:51:59,654 INFO L87 Difference]: Start difference. First operand 1898 states and 2678 transitions. Second operand has 5 states, 5 states have (on average 9.2) internal successors, (46), 3 states have internal predecessors, (46), 2 states have call successors, (8), 4 states have call predecessors, (8), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2022-02-20 21:52:04,919 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:52:04,919 INFO L93 Difference]: Finished difference Result 6142 states and 8755 transitions. [2022-02-20 21:52:04,919 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-02-20 21:52:04,919 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.2) internal successors, (46), 3 states have internal predecessors, (46), 2 states have call successors, (8), 4 states have call predecessors, (8), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 66 [2022-02-20 21:52:04,920 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:52:04,920 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 9.2) internal successors, (46), 3 states have internal predecessors, (46), 2 states have call successors, (8), 4 states have call predecessors, (8), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2022-02-20 21:52:04,933 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 2278 transitions. [2022-02-20 21:52:04,934 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 9.2) internal successors, (46), 3 states have internal predecessors, (46), 2 states have call successors, (8), 4 states have call predecessors, (8), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2022-02-20 21:52:04,947 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 2278 transitions. [2022-02-20 21:52:04,948 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 7 states and 2278 transitions. [2022-02-20 21:52:06,456 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2278 edges. 2278 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:52:07,235 INFO L225 Difference]: With dead ends: 6142 [2022-02-20 21:52:07,235 INFO L226 Difference]: Without dead ends: 4255 [2022-02-20 21:52:07,240 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2022-02-20 21:52:07,241 INFO L933 BasicCegarLoop]: 705 mSDtfsCounter, 1124 mSDsluCounter, 1360 mSDsCounter, 0 mSdLazyCounter, 643 mSolverCounterSat, 418 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1181 SdHoareTripleChecker+Valid, 2065 SdHoareTripleChecker+Invalid, 1061 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 418 IncrementalHoareTripleChecker+Valid, 643 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2022-02-20 21:52:07,241 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1181 Valid, 2065 Invalid, 1061 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [418 Valid, 643 Invalid, 0 Unknown, 0 Unchecked, 1.2s Time] [2022-02-20 21:52:07,244 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4255 states. [2022-02-20 21:52:07,350 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4255 to 3604. [2022-02-20 21:52:07,351 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:52:07,356 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4255 states. Second operand has 3604 states, 2825 states have (on average 1.390796460176991) internal successors, (3929), 2834 states have internal predecessors, (3929), 555 states have call successors, (555), 224 states have call predecessors, (555), 223 states have return successors, (565), 553 states have call predecessors, (565), 553 states have call successors, (565) [2022-02-20 21:52:07,360 INFO L74 IsIncluded]: Start isIncluded. First operand 4255 states. Second operand has 3604 states, 2825 states have (on average 1.390796460176991) internal successors, (3929), 2834 states have internal predecessors, (3929), 555 states have call successors, (555), 224 states have call predecessors, (555), 223 states have return successors, (565), 553 states have call predecessors, (565), 553 states have call successors, (565) [2022-02-20 21:52:07,364 INFO L87 Difference]: Start difference. First operand 4255 states. Second operand has 3604 states, 2825 states have (on average 1.390796460176991) internal successors, (3929), 2834 states have internal predecessors, (3929), 555 states have call successors, (555), 224 states have call predecessors, (555), 223 states have return successors, (565), 553 states have call predecessors, (565), 553 states have call successors, (565) [2022-02-20 21:52:07,860 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:52:07,861 INFO L93 Difference]: Finished difference Result 4255 states and 6088 transitions. [2022-02-20 21:52:07,861 INFO L276 IsEmpty]: Start isEmpty. Operand 4255 states and 6088 transitions. [2022-02-20 21:52:07,872 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:52:07,872 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:52:07,877 INFO L74 IsIncluded]: Start isIncluded. First operand has 3604 states, 2825 states have (on average 1.390796460176991) internal successors, (3929), 2834 states have internal predecessors, (3929), 555 states have call successors, (555), 224 states have call predecessors, (555), 223 states have return successors, (565), 553 states have call predecessors, (565), 553 states have call successors, (565) Second operand 4255 states. [2022-02-20 21:52:07,881 INFO L87 Difference]: Start difference. First operand has 3604 states, 2825 states have (on average 1.390796460176991) internal successors, (3929), 2834 states have internal predecessors, (3929), 555 states have call successors, (555), 224 states have call predecessors, (555), 223 states have return successors, (565), 553 states have call predecessors, (565), 553 states have call successors, (565) Second operand 4255 states. [2022-02-20 21:52:08,414 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:52:08,414 INFO L93 Difference]: Finished difference Result 4255 states and 6088 transitions. [2022-02-20 21:52:08,415 INFO L276 IsEmpty]: Start isEmpty. Operand 4255 states and 6088 transitions. [2022-02-20 21:52:08,424 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:52:08,424 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:52:08,424 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:52:08,424 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:52:08,429 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3604 states, 2825 states have (on average 1.390796460176991) internal successors, (3929), 2834 states have internal predecessors, (3929), 555 states have call successors, (555), 224 states have call predecessors, (555), 223 states have return successors, (565), 553 states have call predecessors, (565), 553 states have call successors, (565) [2022-02-20 21:52:08,998 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3604 states to 3604 states and 5049 transitions. [2022-02-20 21:52:08,999 INFO L78 Accepts]: Start accepts. Automaton has 3604 states and 5049 transitions. Word has length 66 [2022-02-20 21:52:08,999 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:52:08,999 INFO L470 AbstractCegarLoop]: Abstraction has 3604 states and 5049 transitions. [2022-02-20 21:52:08,999 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 9.2) internal successors, (46), 3 states have internal predecessors, (46), 2 states have call successors, (8), 4 states have call predecessors, (8), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2022-02-20 21:52:08,999 INFO L276 IsEmpty]: Start isEmpty. Operand 3604 states and 5049 transitions. [2022-02-20 21:52:09,000 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2022-02-20 21:52:09,001 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:52:09,001 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:52:09,001 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2022-02-20 21:52:09,001 INFO L402 AbstractCegarLoop]: === Iteration 8 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:52:09,001 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:52:09,002 INFO L85 PathProgramCache]: Analyzing trace with hash -181003579, now seen corresponding path program 1 times [2022-02-20 21:52:09,002 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:52:09,002 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1362793443] [2022-02-20 21:52:09,002 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:52:09,003 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:52:09,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:09,071 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 21:52:09,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:09,077 INFO L290 TraceCheckUtils]: 0: Hoare triple {65455#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet28#1 && #t~nondet28#1 <= 2147483647;~tmp___0~1#1 := #t~nondet28#1;havoc #t~nondet28#1; {65430#true} is VALID [2022-02-20 21:52:09,077 INFO L290 TraceCheckUtils]: 1: Hoare triple {65430#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {65430#true} is VALID [2022-02-20 21:52:09,078 INFO L290 TraceCheckUtils]: 2: Hoare triple {65430#true} assume true; {65430#true} is VALID [2022-02-20 21:52:09,078 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {65430#true} {65430#true} #1414#return; {65430#true} is VALID [2022-02-20 21:52:09,082 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 9 [2022-02-20 21:52:09,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:09,088 INFO L290 TraceCheckUtils]: 0: Hoare triple {65456#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {65430#true} is VALID [2022-02-20 21:52:09,088 INFO L290 TraceCheckUtils]: 1: Hoare triple {65430#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {65430#true} is VALID [2022-02-20 21:52:09,088 INFO L290 TraceCheckUtils]: 2: Hoare triple {65430#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {65430#true} is VALID [2022-02-20 21:52:09,088 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {65430#true} {65430#true} #1416#return; {65430#true} is VALID [2022-02-20 21:52:09,089 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 15 [2022-02-20 21:52:09,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:09,095 INFO L290 TraceCheckUtils]: 0: Hoare triple {65456#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {65430#true} is VALID [2022-02-20 21:52:09,095 INFO L290 TraceCheckUtils]: 1: Hoare triple {65430#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {65430#true} is VALID [2022-02-20 21:52:09,095 INFO L290 TraceCheckUtils]: 2: Hoare triple {65430#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {65430#true} is VALID [2022-02-20 21:52:09,095 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {65430#true} {65430#true} #1418#return; {65430#true} is VALID [2022-02-20 21:52:09,095 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 21 [2022-02-20 21:52:09,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:09,102 INFO L290 TraceCheckUtils]: 0: Hoare triple {65456#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {65430#true} is VALID [2022-02-20 21:52:09,102 INFO L290 TraceCheckUtils]: 1: Hoare triple {65430#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {65430#true} is VALID [2022-02-20 21:52:09,102 INFO L290 TraceCheckUtils]: 2: Hoare triple {65430#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {65430#true} is VALID [2022-02-20 21:52:09,103 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {65430#true} {65430#true} #1420#return; {65430#true} is VALID [2022-02-20 21:52:09,103 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 40 [2022-02-20 21:52:09,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:09,107 INFO L290 TraceCheckUtils]: 0: Hoare triple {65430#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {65430#true} is VALID [2022-02-20 21:52:09,107 INFO L290 TraceCheckUtils]: 1: Hoare triple {65430#true} assume true; {65430#true} is VALID [2022-02-20 21:52:09,107 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {65430#true} {65431#false} #1376#return; {65431#false} is VALID [2022-02-20 21:52:09,108 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 51 [2022-02-20 21:52:09,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:09,115 INFO L290 TraceCheckUtils]: 0: Hoare triple {65430#true} havoc ~tmp~3;assume -2147483648 <= #t~nondet31 && #t~nondet31 <= 2147483647;~tmp~3 := #t~nondet31;havoc #t~nondet31;#res := ~tmp~3; {65430#true} is VALID [2022-02-20 21:52:09,115 INFO L290 TraceCheckUtils]: 1: Hoare triple {65430#true} assume true; {65430#true} is VALID [2022-02-20 21:52:09,116 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {65430#true} {65431#false} #1380#return; {65431#false} is VALID [2022-02-20 21:52:09,116 INFO L290 TraceCheckUtils]: 0: Hoare triple {65430#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(82, 2);call #Ultimate.allocInit(9, 3);call #Ultimate.allocInit(22, 4);call #Ultimate.allocInit(219, 5);call #Ultimate.allocInit(24, 6);call #Ultimate.allocInit(24, 7);call #Ultimate.allocInit(22, 8);call #Ultimate.allocInit(24, 9);call #Ultimate.allocInit(9, 10);call #Ultimate.allocInit(18, 11);call #Ultimate.allocInit(219, 12);call #Ultimate.allocInit(36, 13);call #Ultimate.allocInit(36, 14);call #Ultimate.allocInit(9, 15);call #Ultimate.allocInit(18, 16);call #Ultimate.allocInit(219, 17);call #Ultimate.allocInit(67, 18);call #Ultimate.allocInit(67, 19);call #Ultimate.allocInit(9, 20);call #Ultimate.allocInit(9, 21);call #Ultimate.allocInit(9, 22);call #Ultimate.allocInit(9, 23);~LDV_IN_INTERRUPT~0 := 1;~cdc_mbim_info_zlp_group1~0.base, ~cdc_mbim_info_zlp_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0;~cdc_mbim_info_group0~0.base, ~cdc_mbim_info_group0~0.offset := 0, 0;~ref_cnt~0 := 0;~cdc_mbim_info_zlp_group2~0.base, ~cdc_mbim_info_zlp_group2~0.offset := 0, 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~cdc_mbim_info_group1~0.base, ~cdc_mbim_info_group1~0.offset := 0, 0;~cdc_mbim_info_zlp_group0~0.base, ~cdc_mbim_info_zlp_group0~0.offset := 0, 0;~cdc_mbim_info_group2~0.base, ~cdc_mbim_info_group2~0.offset := 0, 0;~cdc_mbim_driver_group1~0.base, ~cdc_mbim_driver_group1~0.offset := 0, 0;~#cdc_mbim_info~0.base, ~#cdc_mbim_info~0.offset := 24, 0;call #Ultimate.allocInit(124, 24);call write~init~$Pointer$(20, 0, ~#cdc_mbim_info~0.base, ~#cdc_mbim_info~0.offset, 8);call write~init~int(9232, ~#cdc_mbim_info~0.base, 8 + ~#cdc_mbim_info~0.offset, 4);call write~init~$Pointer$(#funAddr~cdc_mbim_bind.base, #funAddr~cdc_mbim_bind.offset, ~#cdc_mbim_info~0.base, 12 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_unbind.base, #funAddr~cdc_mbim_unbind.offset, ~#cdc_mbim_info~0.base, 20 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 28 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 36 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 44 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_manage_power.base, #funAddr~cdc_mbim_manage_power.offset, ~#cdc_mbim_info~0.base, 52 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 60 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 68 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_rx_fixup.base, #funAddr~cdc_mbim_rx_fixup.offset, ~#cdc_mbim_info~0.base, 76 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_tx_fixup.base, #funAddr~cdc_mbim_tx_fixup.offset, ~#cdc_mbim_info~0.base, 84 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 92 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 100 + ~#cdc_mbim_info~0.offset, 8);call write~init~int(0, ~#cdc_mbim_info~0.base, 108 + ~#cdc_mbim_info~0.offset, 4);call write~init~int(0, ~#cdc_mbim_info~0.base, 112 + ~#cdc_mbim_info~0.offset, 4);call write~init~int(0, ~#cdc_mbim_info~0.base, 116 + ~#cdc_mbim_info~0.offset, 8);~#cdc_mbim_info_zlp~0.base, ~#cdc_mbim_info_zlp~0.offset := 25, 0;call #Ultimate.allocInit(124, 25);call write~init~$Pointer$(21, 0, ~#cdc_mbim_info_zlp~0.base, ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~int(9744, ~#cdc_mbim_info_zlp~0.base, 8 + ~#cdc_mbim_info_zlp~0.offset, 4);call write~init~$Pointer$(#funAddr~cdc_mbim_bind.base, #funAddr~cdc_mbim_bind.offset, ~#cdc_mbim_info_zlp~0.base, 12 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_unbind.base, #funAddr~cdc_mbim_unbind.offset, ~#cdc_mbim_info_zlp~0.base, 20 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 28 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 36 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 44 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_manage_power.base, #funAddr~cdc_mbim_manage_power.offset, ~#cdc_mbim_info_zlp~0.base, 52 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 60 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 68 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_rx_fixup.base, #funAddr~cdc_mbim_rx_fixup.offset, ~#cdc_mbim_info_zlp~0.base, 76 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_tx_fixup.base, #funAddr~cdc_mbim_tx_fixup.offset, ~#cdc_mbim_info_zlp~0.base, 84 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 92 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 100 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~int(0, ~#cdc_mbim_info_zlp~0.base, 108 + ~#cdc_mbim_info_zlp~0.offset, 4);call write~init~int(0, ~#cdc_mbim_info_zlp~0.base, 112 + ~#cdc_mbim_info_zlp~0.offset, 4);call write~init~int(0, ~#cdc_mbim_info_zlp~0.base, 116 + ~#cdc_mbim_info_zlp~0.offset, 8);~#mbim_devs~0.base, ~#mbim_devs~0.offset := 26, 0;call #Ultimate.allocInit(125, 26);call write~init~int(896, ~#mbim_devs~0.base, ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 2 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 4 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 6 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 8 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 10 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 11 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 12 + ~#mbim_devs~0.offset, 1);call write~init~int(2, ~#mbim_devs~0.base, 13 + ~#mbim_devs~0.offset, 1);call write~init~int(13, ~#mbim_devs~0.base, 14 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 15 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 16 + ~#mbim_devs~0.offset, 1);call write~init~int(~#cdc_mbim_info~0.base + ~#cdc_mbim_info~0.offset, ~#mbim_devs~0.base, 17 + ~#mbim_devs~0.offset, 8);call write~init~int(899, ~#mbim_devs~0.base, 25 + ~#mbim_devs~0.offset, 2);call write~init~int(4505, ~#mbim_devs~0.base, 27 + ~#mbim_devs~0.offset, 2);call write~init~int(26786, ~#mbim_devs~0.base, 29 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 31 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 33 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 35 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 36 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 37 + ~#mbim_devs~0.offset, 1);call write~init~int(2, ~#mbim_devs~0.base, 38 + ~#mbim_devs~0.offset, 1);call write~init~int(14, ~#mbim_devs~0.base, 39 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 40 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 41 + ~#mbim_devs~0.offset, 1);call write~init~int(~#cdc_mbim_info_zlp~0.base + ~#cdc_mbim_info_zlp~0.offset, ~#mbim_devs~0.base, 42 + ~#mbim_devs~0.offset, 8);call write~init~int(899, ~#mbim_devs~0.base, 50 + ~#mbim_devs~0.offset, 2);call write~init~int(1008, ~#mbim_devs~0.base, 52 + ~#mbim_devs~0.offset, 2);call write~init~int(19229, ~#mbim_devs~0.base, 54 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 56 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 58 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 60 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 61 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 62 + ~#mbim_devs~0.offset, 1);call write~init~int(2, ~#mbim_devs~0.base, 63 + ~#mbim_devs~0.offset, 1);call write~init~int(14, ~#mbim_devs~0.base, 64 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 65 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 66 + ~#mbim_devs~0.offset, 1);call write~init~int(~#cdc_mbim_info_zlp~0.base + ~#cdc_mbim_info_zlp~0.offset, ~#mbim_devs~0.base, 67 + ~#mbim_devs~0.offset, 8);call write~init~int(896, ~#mbim_devs~0.base, 75 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 77 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 79 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 81 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 83 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 85 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 86 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 87 + ~#mbim_devs~0.offset, 1);call write~init~int(2, ~#mbim_devs~0.base, 88 + ~#mbim_devs~0.offset, 1);call write~init~int(14, ~#mbim_devs~0.base, 89 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 90 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 91 + ~#mbim_devs~0.offset, 1);call write~init~int(~#cdc_mbim_info~0.base + ~#cdc_mbim_info~0.offset, ~#mbim_devs~0.base, 92 + ~#mbim_devs~0.offset, 8);call write~init~int(0, ~#mbim_devs~0.base, 100 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 102 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 104 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 106 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 108 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 110 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 111 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 112 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 113 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 114 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 115 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 116 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 117 + ~#mbim_devs~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.bInterfaceNumber := 0;~__mod_usb_device_table~0.driver_info := 0;~#cdc_mbim_driver~0.base, ~#cdc_mbim_driver~0.offset := 27, 0;call #Ultimate.allocInit(285, 27);call write~init~$Pointer$(22, 0, ~#cdc_mbim_driver~0.base, ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usbnet_probe.base, #funAddr~usbnet_probe.offset, ~#cdc_mbim_driver~0.base, 8 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usbnet_disconnect.base, #funAddr~usbnet_disconnect.offset, ~#cdc_mbim_driver~0.base, 16 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 24 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_suspend.base, #funAddr~cdc_mbim_suspend.offset, ~#cdc_mbim_driver~0.base, 32 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_resume.base, #funAddr~cdc_mbim_resume.offset, ~#cdc_mbim_driver~0.base, 40 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_resume.base, #funAddr~cdc_mbim_resume.offset, ~#cdc_mbim_driver~0.base, 48 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 56 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 64 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(~#mbim_devs~0.base, ~#mbim_devs~0.offset, ~#cdc_mbim_driver~0.base, 72 + ~#cdc_mbim_driver~0.offset, 8);call write~init~int(0, ~#cdc_mbim_driver~0.base, 80 + ~#cdc_mbim_driver~0.offset, 4);call write~init~int(0, ~#cdc_mbim_driver~0.base, 84 + ~#cdc_mbim_driver~0.offset, 4);call write~init~int(0, ~#cdc_mbim_driver~0.base, 88 + ~#cdc_mbim_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 92 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 100 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 108 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 116 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 124 + ~#cdc_mbim_driver~0.offset, 8);call write~init~int(0, ~#cdc_mbim_driver~0.base, 132 + ~#cdc_mbim_driver~0.offset, 4);call write~init~int(0, ~#cdc_mbim_driver~0.base, 136 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 148 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 156 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 164 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 172 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 180 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 188 + ~#cdc_mbim_driver~0.offset, 8);call write~init~int(0, ~#cdc_mbim_driver~0.base, 196 + ~#cdc_mbim_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 197 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 205 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 213 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 221 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 229 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 237 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 245 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 253 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 261 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 269 + ~#cdc_mbim_driver~0.offset, 8);call write~init~int(0, ~#cdc_mbim_driver~0.base, 277 + ~#cdc_mbim_driver~0.offset, 4);call write~init~int(0, ~#cdc_mbim_driver~0.base, 281 + ~#cdc_mbim_driver~0.offset, 1);call write~init~int(1, ~#cdc_mbim_driver~0.base, 282 + ~#cdc_mbim_driver~0.offset, 1);call write~init~int(1, ~#cdc_mbim_driver~0.base, 283 + ~#cdc_mbim_driver~0.offset, 1);call write~init~int(0, ~#cdc_mbim_driver~0.base, 284 + ~#cdc_mbim_driver~0.offset, 1);~ldv_retval_2~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_5~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_6~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {65430#true} is VALID [2022-02-20 21:52:09,116 INFO L290 TraceCheckUtils]: 1: Hoare triple {65430#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret287#1.base, main_#t~ret287#1.offset, main_#t~nondet288#1, main_#t~nondet289#1, main_#t~memset~res290#1.base, main_#t~memset~res290#1.offset, main_#t~memset~res291#1.base, main_#t~memset~res291#1.offset, main_#t~memset~res292#1.base, main_#t~memset~res292#1.offset, main_#t~nondet293#1, main_#t~switch294#1, main_#t~nondet295#1, main_#t~switch296#1, main_#t~ret297#1, main_#t~ret298#1, main_#t~mem299#1, main_#t~ret300#1, main_#t~ret301#1, main_#t~nondet302#1, main_#t~switch303#1, main_#t~ret304#1, main_#t~nondet305#1, main_#t~switch306#1, main_#t~ret307#1, main_#t~ret308#1, main_#t~ret309#1, main_#t~mem310#1, main_#t~ret311#1.base, main_#t~ret311#1.offset, main_#t~mem312#1, main_#t~ret313#1.base, main_#t~ret313#1.offset, main_#t~ret314#1, main_#t~ret315#1, main_#t~nondet316#1, main_#t~switch317#1, main_#t~ret318#1, main_#t~ret319#1, main_#t~ret320#1, main_#t~mem321#1, main_#t~ret322#1.base, main_#t~ret322#1.offset, main_#t~mem323#1, main_#t~ret324#1.base, main_#t~ret324#1.offset, main_#t~ret325#1, main_#t~ret326#1, main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset, main_~tmp~27#1.base, main_~tmp~27#1.offset, main_~#ldvarg0~0#1.base, main_~#ldvarg0~0#1.offset, main_~#ldvarg3~0#1.base, main_~#ldvarg3~0#1.offset, main_~ldvarg2~0#1, main_~tmp___0~14#1, main_~ldvarg4~0#1, main_~tmp___1~9#1, main_~#ldvarg5~0#1.base, main_~#ldvarg5~0#1.offset, main_~tmp___2~3#1, main_~tmp___3~0#1, main_~tmp___4~1#1, main_~tmp___5~0#1, main_~tmp___6~0#1;havoc main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset;havoc main_~tmp~27#1.base, main_~tmp~27#1.offset;call main_~#ldvarg0~0#1.base, main_~#ldvarg0~0#1.offset := #Ultimate.allocOnStack(4);call main_~#ldvarg3~0#1.base, main_~#ldvarg3~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~ldvarg2~0#1;havoc main_~tmp___0~14#1;havoc main_~ldvarg4~0#1;havoc main_~tmp___1~9#1;call main_~#ldvarg5~0#1.base, main_~#ldvarg5~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~tmp___2~3#1;havoc main_~tmp___3~0#1;havoc main_~tmp___4~1#1;havoc main_~tmp___5~0#1;havoc main_~tmp___6~0#1; {65430#true} is VALID [2022-02-20 21:52:09,117 INFO L272 TraceCheckUtils]: 2: Hoare triple {65430#true} call main_#t~ret287#1.base, main_#t~ret287#1.offset := ldv_zalloc(32); {65455#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:09,117 INFO L290 TraceCheckUtils]: 3: Hoare triple {65455#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet28#1 && #t~nondet28#1 <= 2147483647;~tmp___0~1#1 := #t~nondet28#1;havoc #t~nondet28#1; {65430#true} is VALID [2022-02-20 21:52:09,117 INFO L290 TraceCheckUtils]: 4: Hoare triple {65430#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {65430#true} is VALID [2022-02-20 21:52:09,117 INFO L290 TraceCheckUtils]: 5: Hoare triple {65430#true} assume true; {65430#true} is VALID [2022-02-20 21:52:09,117 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {65430#true} {65430#true} #1414#return; {65430#true} is VALID [2022-02-20 21:52:09,117 INFO L290 TraceCheckUtils]: 7: Hoare triple {65430#true} main_~tmp~27#1.base, main_~tmp~27#1.offset := main_#t~ret287#1.base, main_#t~ret287#1.offset;havoc main_#t~ret287#1.base, main_#t~ret287#1.offset;main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset := main_~tmp~27#1.base, main_~tmp~27#1.offset;assume -2147483648 <= main_#t~nondet288#1 && main_#t~nondet288#1 <= 2147483647;main_~tmp___0~14#1 := main_#t~nondet288#1;havoc main_#t~nondet288#1;main_~ldvarg2~0#1 := main_~tmp___0~14#1;assume -2147483648 <= main_#t~nondet289#1 && main_#t~nondet289#1 <= 2147483647;main_~tmp___1~9#1 := main_#t~nondet289#1;havoc main_#t~nondet289#1;main_~ldvarg4~0#1 := main_~tmp___1~9#1;assume { :begin_inline_ldv_initialize } true; {65430#true} is VALID [2022-02-20 21:52:09,117 INFO L290 TraceCheckUtils]: 8: Hoare triple {65430#true} assume { :end_inline_ldv_initialize } true; {65430#true} is VALID [2022-02-20 21:52:09,118 INFO L272 TraceCheckUtils]: 9: Hoare triple {65430#true} call main_#t~memset~res290#1.base, main_#t~memset~res290#1.offset := #Ultimate.C_memset(main_~#ldvarg0~0#1.base, main_~#ldvarg0~0#1.offset, 0, 4); {65456#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 21:52:09,118 INFO L290 TraceCheckUtils]: 10: Hoare triple {65456#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {65430#true} is VALID [2022-02-20 21:52:09,118 INFO L290 TraceCheckUtils]: 11: Hoare triple {65430#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {65430#true} is VALID [2022-02-20 21:52:09,118 INFO L290 TraceCheckUtils]: 12: Hoare triple {65430#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {65430#true} is VALID [2022-02-20 21:52:09,118 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {65430#true} {65430#true} #1416#return; {65430#true} is VALID [2022-02-20 21:52:09,119 INFO L290 TraceCheckUtils]: 14: Hoare triple {65430#true} havoc main_#t~memset~res290#1.base, main_#t~memset~res290#1.offset; {65430#true} is VALID [2022-02-20 21:52:09,119 INFO L272 TraceCheckUtils]: 15: Hoare triple {65430#true} call main_#t~memset~res291#1.base, main_#t~memset~res291#1.offset := #Ultimate.C_memset(main_~#ldvarg3~0#1.base, main_~#ldvarg3~0#1.offset, 0, 4); {65456#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 21:52:09,119 INFO L290 TraceCheckUtils]: 16: Hoare triple {65456#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {65430#true} is VALID [2022-02-20 21:52:09,119 INFO L290 TraceCheckUtils]: 17: Hoare triple {65430#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {65430#true} is VALID [2022-02-20 21:52:09,120 INFO L290 TraceCheckUtils]: 18: Hoare triple {65430#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {65430#true} is VALID [2022-02-20 21:52:09,120 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {65430#true} {65430#true} #1418#return; {65430#true} is VALID [2022-02-20 21:52:09,120 INFO L290 TraceCheckUtils]: 20: Hoare triple {65430#true} havoc main_#t~memset~res291#1.base, main_#t~memset~res291#1.offset; {65430#true} is VALID [2022-02-20 21:52:09,120 INFO L272 TraceCheckUtils]: 21: Hoare triple {65430#true} call main_#t~memset~res292#1.base, main_#t~memset~res292#1.offset := #Ultimate.C_memset(main_~#ldvarg5~0#1.base, main_~#ldvarg5~0#1.offset, 0, 4); {65456#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 21:52:09,120 INFO L290 TraceCheckUtils]: 22: Hoare triple {65456#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {65430#true} is VALID [2022-02-20 21:52:09,121 INFO L290 TraceCheckUtils]: 23: Hoare triple {65430#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {65430#true} is VALID [2022-02-20 21:52:09,121 INFO L290 TraceCheckUtils]: 24: Hoare triple {65430#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {65430#true} is VALID [2022-02-20 21:52:09,121 INFO L284 TraceCheckUtils]: 25: Hoare quadruple {65430#true} {65430#true} #1420#return; {65430#true} is VALID [2022-02-20 21:52:09,121 INFO L290 TraceCheckUtils]: 26: Hoare triple {65430#true} havoc main_#t~memset~res292#1.base, main_#t~memset~res292#1.offset;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {65448#(= ~ldv_state_variable_3~0 0)} is VALID [2022-02-20 21:52:09,121 INFO L290 TraceCheckUtils]: 27: Hoare triple {65448#(= ~ldv_state_variable_3~0 0)} assume -2147483648 <= main_#t~nondet293#1 && main_#t~nondet293#1 <= 2147483647;main_~tmp___2~3#1 := main_#t~nondet293#1;havoc main_#t~nondet293#1;main_#t~switch294#1 := 0 == main_~tmp___2~3#1; {65448#(= ~ldv_state_variable_3~0 0)} is VALID [2022-02-20 21:52:09,122 INFO L290 TraceCheckUtils]: 28: Hoare triple {65448#(= ~ldv_state_variable_3~0 0)} assume !main_#t~switch294#1;main_#t~switch294#1 := main_#t~switch294#1 || 1 == main_~tmp___2~3#1; {65448#(= ~ldv_state_variable_3~0 0)} is VALID [2022-02-20 21:52:09,122 INFO L290 TraceCheckUtils]: 29: Hoare triple {65448#(= ~ldv_state_variable_3~0 0)} assume !main_#t~switch294#1;main_#t~switch294#1 := main_#t~switch294#1 || 2 == main_~tmp___2~3#1; {65448#(= ~ldv_state_variable_3~0 0)} is VALID [2022-02-20 21:52:09,122 INFO L290 TraceCheckUtils]: 30: Hoare triple {65448#(= ~ldv_state_variable_3~0 0)} assume main_#t~switch294#1; {65448#(= ~ldv_state_variable_3~0 0)} is VALID [2022-02-20 21:52:09,122 INFO L290 TraceCheckUtils]: 31: Hoare triple {65448#(= ~ldv_state_variable_3~0 0)} assume 0 != ~ldv_state_variable_3~0;assume -2147483648 <= main_#t~nondet305#1 && main_#t~nondet305#1 <= 2147483647;main_~tmp___5~0#1 := main_#t~nondet305#1;havoc main_#t~nondet305#1;main_#t~switch306#1 := 0 == main_~tmp___5~0#1; {65431#false} is VALID [2022-02-20 21:52:09,123 INFO L290 TraceCheckUtils]: 32: Hoare triple {65431#false} assume !main_#t~switch306#1;main_#t~switch306#1 := main_#t~switch306#1 || 1 == main_~tmp___5~0#1; {65431#false} is VALID [2022-02-20 21:52:09,123 INFO L290 TraceCheckUtils]: 33: Hoare triple {65431#false} assume !main_#t~switch306#1;main_#t~switch306#1 := main_#t~switch306#1 || 2 == main_~tmp___5~0#1; {65431#false} is VALID [2022-02-20 21:52:09,123 INFO L290 TraceCheckUtils]: 34: Hoare triple {65431#false} assume !main_#t~switch306#1;main_#t~switch306#1 := main_#t~switch306#1 || 3 == main_~tmp___5~0#1; {65431#false} is VALID [2022-02-20 21:52:09,123 INFO L290 TraceCheckUtils]: 35: Hoare triple {65431#false} assume !main_#t~switch306#1;main_#t~switch306#1 := main_#t~switch306#1 || 4 == main_~tmp___5~0#1; {65431#false} is VALID [2022-02-20 21:52:09,123 INFO L290 TraceCheckUtils]: 36: Hoare triple {65431#false} assume main_#t~switch306#1; {65431#false} is VALID [2022-02-20 21:52:09,123 INFO L290 TraceCheckUtils]: 37: Hoare triple {65431#false} assume 1 == ~ldv_state_variable_3~0; {65431#false} is VALID [2022-02-20 21:52:09,123 INFO L272 TraceCheckUtils]: 38: Hoare triple {65431#false} call main_#t~ret314#1 := cdc_mbim_manage_power(~cdc_mbim_info_group0~0.base, ~cdc_mbim_info_group0~0.offset, main_~ldvarg2~0#1); {65431#false} is VALID [2022-02-20 21:52:09,123 INFO L290 TraceCheckUtils]: 39: Hoare triple {65431#false} ~dev#1.base, ~dev#1.offset := #in~dev#1.base, #in~dev#1.offset;~on#1 := #in~on#1;havoc ~info~0#1.base, ~info~0#1.offset;havoc ~rv~0#1;call ~#descriptor~0#1.base, ~#descriptor~0#1.offset := #Ultimate.allocOnStack(37);havoc ~tmp~15#1;havoc ~tmp___0~7#1;havoc ~tmp___1~3#1;havoc ~tmp___2~0#1;~info~0#1.base, ~info~0#1.offset := ~dev#1.base, 368 + ~dev#1.offset;~rv~0#1 := 0;call write~$Pointer$(3, 0, ~#descriptor~0#1.base, ~#descriptor~0#1.offset, 8);call write~$Pointer$(4, 0, ~#descriptor~0#1.base, 8 + ~#descriptor~0#1.offset, 8);call write~$Pointer$(5, 0, ~#descriptor~0#1.base, 16 + ~#descriptor~0#1.offset, 8);call write~$Pointer$(6, 0, ~#descriptor~0#1.base, 24 + ~#descriptor~0#1.offset, 8);call write~int(88, ~#descriptor~0#1.base, 32 + ~#descriptor~0#1.offset, 4);call write~int(0, ~#descriptor~0#1.base, 36 + ~#descriptor~0#1.offset, 1);call #t~mem122#1 := read~int(~#descriptor~0#1.base, 36 + ~#descriptor~0#1.offset, 1); {65431#false} is VALID [2022-02-20 21:52:09,124 INFO L272 TraceCheckUtils]: 40: Hoare triple {65431#false} call #t~ret123#1 := ldv__builtin_expect(#t~mem122#1 % 256, 0); {65430#true} is VALID [2022-02-20 21:52:09,124 INFO L290 TraceCheckUtils]: 41: Hoare triple {65430#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {65430#true} is VALID [2022-02-20 21:52:09,124 INFO L290 TraceCheckUtils]: 42: Hoare triple {65430#true} assume true; {65430#true} is VALID [2022-02-20 21:52:09,124 INFO L284 TraceCheckUtils]: 43: Hoare quadruple {65430#true} {65431#false} #1376#return; {65431#false} is VALID [2022-02-20 21:52:09,124 INFO L290 TraceCheckUtils]: 44: Hoare triple {65431#false} assume -9223372036854775808 <= #t~ret123#1 && #t~ret123#1 <= 9223372036854775807;~tmp___0~7#1 := #t~ret123#1;havoc #t~mem122#1;havoc #t~ret123#1; {65431#false} is VALID [2022-02-20 21:52:09,124 INFO L290 TraceCheckUtils]: 45: Hoare triple {65431#false} assume !(0 != ~tmp___0~7#1); {65431#false} is VALID [2022-02-20 21:52:09,124 INFO L290 TraceCheckUtils]: 46: Hoare triple {65431#false} assume !(0 != ~on#1); {65431#false} is VALID [2022-02-20 21:52:09,124 INFO L290 TraceCheckUtils]: 47: Hoare triple {65431#false} assume 0 == ~on#1;assume { :begin_inline_atomic_dec_and_test } true;atomic_dec_and_test_#in~v#1.base, atomic_dec_and_test_#in~v#1.offset := ~info~0#1.base, 8 + ~info~0#1.offset;havoc atomic_dec_and_test_#res#1;havoc atomic_dec_and_test_~v#1.base, atomic_dec_and_test_~v#1.offset, atomic_dec_and_test_~c~0#1;atomic_dec_and_test_~v#1.base, atomic_dec_and_test_~v#1.offset := atomic_dec_and_test_#in~v#1.base, atomic_dec_and_test_#in~v#1.offset;havoc atomic_dec_and_test_~c~0#1;atomic_dec_and_test_#res#1 := (if 0 != atomic_dec_and_test_~c~0#1 % 256 % 4294967296 then 1 else 0); {65431#false} is VALID [2022-02-20 21:52:09,124 INFO L290 TraceCheckUtils]: 48: Hoare triple {65431#false} #t~ret128#1 := atomic_dec_and_test_#res#1;assume { :end_inline_atomic_dec_and_test } true;assume -2147483648 <= #t~ret128#1 && #t~ret128#1 <= 2147483647;~tmp___2~0#1 := #t~ret128#1;havoc #t~ret128#1; {65431#false} is VALID [2022-02-20 21:52:09,125 INFO L290 TraceCheckUtils]: 49: Hoare triple {65431#false} assume 0 != ~tmp___2~0#1; {65431#false} is VALID [2022-02-20 21:52:09,125 INFO L290 TraceCheckUtils]: 50: Hoare triple {65431#false} call #t~mem129#1.base, #t~mem129#1.offset := read~$Pointer$(~dev#1.base, 8 + ~dev#1.offset, 8);assume { :begin_inline_ldv_usb_autopm_get_interface_2 } true;ldv_usb_autopm_get_interface_2_#in~ldv_func_arg1#1.base, ldv_usb_autopm_get_interface_2_#in~ldv_func_arg1#1.offset := #t~mem129#1.base, #t~mem129#1.offset;havoc ldv_usb_autopm_get_interface_2_#res#1;havoc ldv_usb_autopm_get_interface_2_#t~ret327#1, ldv_usb_autopm_get_interface_2_~ldv_func_arg1#1.base, ldv_usb_autopm_get_interface_2_~ldv_func_arg1#1.offset, ldv_usb_autopm_get_interface_2_~tmp~28#1;ldv_usb_autopm_get_interface_2_~ldv_func_arg1#1.base, ldv_usb_autopm_get_interface_2_~ldv_func_arg1#1.offset := ldv_usb_autopm_get_interface_2_#in~ldv_func_arg1#1.base, ldv_usb_autopm_get_interface_2_#in~ldv_func_arg1#1.offset;havoc ldv_usb_autopm_get_interface_2_~tmp~28#1;assume { :begin_inline_ldv_get_interface } true;ldv_get_interface_#in~intf#1.base, ldv_get_interface_#in~intf#1.offset := ldv_usb_autopm_get_interface_2_~ldv_func_arg1#1.base, ldv_usb_autopm_get_interface_2_~ldv_func_arg1#1.offset;havoc ldv_get_interface_#res#1;havoc ldv_get_interface_#t~ret337#1, ldv_get_interface_~intf#1.base, ldv_get_interface_~intf#1.offset, ldv_get_interface_~res~1#1, ldv_get_interface_~tmp~35#1;ldv_get_interface_~intf#1.base, ldv_get_interface_~intf#1.offset := ldv_get_interface_#in~intf#1.base, ldv_get_interface_#in~intf#1.offset;havoc ldv_get_interface_~res~1#1;havoc ldv_get_interface_~tmp~35#1; {65431#false} is VALID [2022-02-20 21:52:09,125 INFO L272 TraceCheckUtils]: 51: Hoare triple {65431#false} call ldv_get_interface_#t~ret337#1 := ldv_undef_int(); {65430#true} is VALID [2022-02-20 21:52:09,125 INFO L290 TraceCheckUtils]: 52: Hoare triple {65430#true} havoc ~tmp~3;assume -2147483648 <= #t~nondet31 && #t~nondet31 <= 2147483647;~tmp~3 := #t~nondet31;havoc #t~nondet31;#res := ~tmp~3; {65430#true} is VALID [2022-02-20 21:52:09,125 INFO L290 TraceCheckUtils]: 53: Hoare triple {65430#true} assume true; {65430#true} is VALID [2022-02-20 21:52:09,125 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {65430#true} {65431#false} #1380#return; {65431#false} is VALID [2022-02-20 21:52:09,125 INFO L290 TraceCheckUtils]: 55: Hoare triple {65431#false} assume -2147483648 <= ldv_get_interface_#t~ret337#1 && ldv_get_interface_#t~ret337#1 <= 2147483647;ldv_get_interface_~tmp~35#1 := ldv_get_interface_#t~ret337#1;havoc ldv_get_interface_#t~ret337#1;ldv_get_interface_~res~1#1 := ldv_get_interface_~tmp~35#1; {65431#false} is VALID [2022-02-20 21:52:09,125 INFO L290 TraceCheckUtils]: 56: Hoare triple {65431#false} assume ldv_get_interface_~res~1#1 <= 0; {65431#false} is VALID [2022-02-20 21:52:09,126 INFO L290 TraceCheckUtils]: 57: Hoare triple {65431#false} assume 0 == ldv_get_interface_~res~1#1;~INTERF_STATE~0 := 1 + ~INTERF_STATE~0; {65431#false} is VALID [2022-02-20 21:52:09,126 INFO L290 TraceCheckUtils]: 58: Hoare triple {65431#false} ldv_get_interface_#res#1 := ldv_get_interface_~res~1#1; {65431#false} is VALID [2022-02-20 21:52:09,126 INFO L290 TraceCheckUtils]: 59: Hoare triple {65431#false} ldv_usb_autopm_get_interface_2_#t~ret327#1 := ldv_get_interface_#res#1;assume { :end_inline_ldv_get_interface } true;assume -2147483648 <= ldv_usb_autopm_get_interface_2_#t~ret327#1 && ldv_usb_autopm_get_interface_2_#t~ret327#1 <= 2147483647;ldv_usb_autopm_get_interface_2_~tmp~28#1 := ldv_usb_autopm_get_interface_2_#t~ret327#1;havoc ldv_usb_autopm_get_interface_2_#t~ret327#1;ldv_usb_autopm_get_interface_2_#res#1 := ldv_usb_autopm_get_interface_2_~tmp~28#1; {65431#false} is VALID [2022-02-20 21:52:09,126 INFO L290 TraceCheckUtils]: 60: Hoare triple {65431#false} #t~ret130#1 := ldv_usb_autopm_get_interface_2_#res#1;assume { :end_inline_ldv_usb_autopm_get_interface_2 } true;assume -2147483648 <= #t~ret130#1 && #t~ret130#1 <= 2147483647;~rv~0#1 := #t~ret130#1;havoc #t~mem129#1.base, #t~mem129#1.offset;havoc #t~ret130#1; {65431#false} is VALID [2022-02-20 21:52:09,126 INFO L290 TraceCheckUtils]: 61: Hoare triple {65431#false} assume !(~rv~0#1 < 0);call #t~mem131#1.base, #t~mem131#1.offset := read~$Pointer$(~dev#1.base, 8 + ~dev#1.offset, 8);call write~int(~on#1 % 2, #t~mem131#1.base, 39 + #t~mem131#1.offset, 1);havoc #t~mem131#1.base, #t~mem131#1.offset;call #t~mem132#1.base, #t~mem132#1.offset := read~$Pointer$(~dev#1.base, 8 + ~dev#1.offset, 8);assume { :begin_inline_ldv_usb_autopm_put_interface_3 } true;ldv_usb_autopm_put_interface_3_#in~ldv_func_arg1#1.base, ldv_usb_autopm_put_interface_3_#in~ldv_func_arg1#1.offset := #t~mem132#1.base, #t~mem132#1.offset;havoc ldv_usb_autopm_put_interface_3_~ldv_func_arg1#1.base, ldv_usb_autopm_put_interface_3_~ldv_func_arg1#1.offset;ldv_usb_autopm_put_interface_3_~ldv_func_arg1#1.base, ldv_usb_autopm_put_interface_3_~ldv_func_arg1#1.offset := ldv_usb_autopm_put_interface_3_#in~ldv_func_arg1#1.base, ldv_usb_autopm_put_interface_3_#in~ldv_func_arg1#1.offset;assume { :begin_inline_ldv_put_interface } true; {65431#false} is VALID [2022-02-20 21:52:09,126 INFO L290 TraceCheckUtils]: 62: Hoare triple {65431#false} assume !(~INTERF_STATE~0 > 0); {65431#false} is VALID [2022-02-20 21:52:09,126 INFO L272 TraceCheckUtils]: 63: Hoare triple {65431#false} call ldv_error(); {65431#false} is VALID [2022-02-20 21:52:09,126 INFO L290 TraceCheckUtils]: 64: Hoare triple {65431#false} assume !false; {65431#false} is VALID [2022-02-20 21:52:09,127 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-02-20 21:52:09,127 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:52:09,127 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1362793443] [2022-02-20 21:52:09,127 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1362793443] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:52:09,127 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:52:09,127 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-02-20 21:52:09,127 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2017449088] [2022-02-20 21:52:09,128 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:52:09,128 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.0) internal successors, (45), 3 states have internal predecessors, (45), 2 states have call successors, (8), 4 states have call predecessors, (8), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 65 [2022-02-20 21:52:09,128 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:52:09,128 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 9.0) internal successors, (45), 3 states have internal predecessors, (45), 2 states have call successors, (8), 4 states have call predecessors, (8), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2022-02-20 21:52:09,193 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 59 edges. 59 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:52:09,194 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-02-20 21:52:09,194 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:52:09,194 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-02-20 21:52:09,194 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-02-20 21:52:09,195 INFO L87 Difference]: Start difference. First operand 3604 states and 5049 transitions. Second operand has 5 states, 5 states have (on average 9.0) internal successors, (45), 3 states have internal predecessors, (45), 2 states have call successors, (8), 4 states have call predecessors, (8), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2022-02-20 21:52:17,991 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:52:17,991 INFO L93 Difference]: Finished difference Result 10431 states and 14766 transitions. [2022-02-20 21:52:17,991 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-02-20 21:52:17,991 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.0) internal successors, (45), 3 states have internal predecessors, (45), 2 states have call successors, (8), 4 states have call predecessors, (8), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 65 [2022-02-20 21:52:17,991 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:52:17,991 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 9.0) internal successors, (45), 3 states have internal predecessors, (45), 2 states have call successors, (8), 4 states have call predecessors, (8), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2022-02-20 21:52:18,005 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 2291 transitions. [2022-02-20 21:52:18,006 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 9.0) internal successors, (45), 3 states have internal predecessors, (45), 2 states have call successors, (8), 4 states have call predecessors, (8), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2022-02-20 21:52:18,019 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 2291 transitions. [2022-02-20 21:52:18,020 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 7 states and 2291 transitions. [2022-02-20 21:52:19,527 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2291 edges. 2291 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:52:21,584 INFO L225 Difference]: With dead ends: 10431 [2022-02-20 21:52:21,584 INFO L226 Difference]: Without dead ends: 6848 [2022-02-20 21:52:21,592 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2022-02-20 21:52:21,593 INFO L933 BasicCegarLoop]: 1049 mSDtfsCounter, 962 mSDsluCounter, 1807 mSDsCounter, 0 mSdLazyCounter, 809 mSolverCounterSat, 320 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1022 SdHoareTripleChecker+Valid, 2856 SdHoareTripleChecker+Invalid, 1129 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 320 IncrementalHoareTripleChecker+Valid, 809 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.5s IncrementalHoareTripleChecker+Time [2022-02-20 21:52:21,593 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1022 Valid, 2856 Invalid, 1129 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [320 Valid, 809 Invalid, 0 Unknown, 0 Unchecked, 1.5s Time] [2022-02-20 21:52:21,597 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6848 states. [2022-02-20 21:52:21,768 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6848 to 5818. [2022-02-20 21:52:21,768 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:52:21,777 INFO L82 GeneralOperation]: Start isEquivalent. First operand 6848 states. Second operand has 5818 states, 4560 states have (on average 1.3888157894736841) internal successors, (6333), 4575 states have internal predecessors, (6333), 882 states have call successors, (882), 376 states have call predecessors, (882), 375 states have return successors, (896), 878 states have call predecessors, (896), 880 states have call successors, (896) [2022-02-20 21:52:21,785 INFO L74 IsIncluded]: Start isIncluded. First operand 6848 states. Second operand has 5818 states, 4560 states have (on average 1.3888157894736841) internal successors, (6333), 4575 states have internal predecessors, (6333), 882 states have call successors, (882), 376 states have call predecessors, (882), 375 states have return successors, (896), 878 states have call predecessors, (896), 880 states have call successors, (896) [2022-02-20 21:52:21,794 INFO L87 Difference]: Start difference. First operand 6848 states. Second operand has 5818 states, 4560 states have (on average 1.3888157894736841) internal successors, (6333), 4575 states have internal predecessors, (6333), 882 states have call successors, (882), 376 states have call predecessors, (882), 375 states have return successors, (896), 878 states have call predecessors, (896), 880 states have call successors, (896) [2022-02-20 21:52:23,143 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:52:23,143 INFO L93 Difference]: Finished difference Result 6848 states and 9737 transitions. [2022-02-20 21:52:23,143 INFO L276 IsEmpty]: Start isEmpty. Operand 6848 states and 9737 transitions. [2022-02-20 21:52:23,155 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:52:23,155 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:52:23,164 INFO L74 IsIncluded]: Start isIncluded. First operand has 5818 states, 4560 states have (on average 1.3888157894736841) internal successors, (6333), 4575 states have internal predecessors, (6333), 882 states have call successors, (882), 376 states have call predecessors, (882), 375 states have return successors, (896), 878 states have call predecessors, (896), 880 states have call successors, (896) Second operand 6848 states. [2022-02-20 21:52:23,173 INFO L87 Difference]: Start difference. First operand has 5818 states, 4560 states have (on average 1.3888157894736841) internal successors, (6333), 4575 states have internal predecessors, (6333), 882 states have call successors, (882), 376 states have call predecessors, (882), 375 states have return successors, (896), 878 states have call predecessors, (896), 880 states have call successors, (896) Second operand 6848 states. [2022-02-20 21:52:24,520 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:52:24,520 INFO L93 Difference]: Finished difference Result 6848 states and 9737 transitions. [2022-02-20 21:52:24,520 INFO L276 IsEmpty]: Start isEmpty. Operand 6848 states and 9737 transitions. [2022-02-20 21:52:24,534 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:52:24,535 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:52:24,535 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:52:24,535 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:52:24,542 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5818 states, 4560 states have (on average 1.3888157894736841) internal successors, (6333), 4575 states have internal predecessors, (6333), 882 states have call successors, (882), 376 states have call predecessors, (882), 375 states have return successors, (896), 878 states have call predecessors, (896), 880 states have call successors, (896) [2022-02-20 21:52:25,935 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5818 states to 5818 states and 8111 transitions. [2022-02-20 21:52:25,936 INFO L78 Accepts]: Start accepts. Automaton has 5818 states and 8111 transitions. Word has length 65 [2022-02-20 21:52:25,936 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:52:25,936 INFO L470 AbstractCegarLoop]: Abstraction has 5818 states and 8111 transitions. [2022-02-20 21:52:25,936 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 9.0) internal successors, (45), 3 states have internal predecessors, (45), 2 states have call successors, (8), 4 states have call predecessors, (8), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2022-02-20 21:52:25,936 INFO L276 IsEmpty]: Start isEmpty. Operand 5818 states and 8111 transitions. [2022-02-20 21:52:25,939 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 124 [2022-02-20 21:52:25,939 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:52:25,939 INFO L514 BasicCegarLoop]: trace histogram [8, 8, 8, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:52:25,940 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2022-02-20 21:52:25,940 INFO L402 AbstractCegarLoop]: === Iteration 9 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:52:25,940 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:52:25,940 INFO L85 PathProgramCache]: Analyzing trace with hash -1980858928, now seen corresponding path program 1 times [2022-02-20 21:52:25,940 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:52:25,940 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1294090864] [2022-02-20 21:52:25,941 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:52:25,941 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:52:25,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:26,030 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 21:52:26,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:26,036 INFO L290 TraceCheckUtils]: 0: Hoare triple {101394#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet28#1 && #t~nondet28#1 <= 2147483647;~tmp___0~1#1 := #t~nondet28#1;havoc #t~nondet28#1; {101341#true} is VALID [2022-02-20 21:52:26,037 INFO L290 TraceCheckUtils]: 1: Hoare triple {101341#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {101341#true} is VALID [2022-02-20 21:52:26,037 INFO L290 TraceCheckUtils]: 2: Hoare triple {101341#true} assume true; {101341#true} is VALID [2022-02-20 21:52:26,037 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {101341#true} {101341#true} #1414#return; {101341#true} is VALID [2022-02-20 21:52:26,042 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 9 [2022-02-20 21:52:26,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:26,048 INFO L290 TraceCheckUtils]: 0: Hoare triple {101395#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {101341#true} is VALID [2022-02-20 21:52:26,048 INFO L290 TraceCheckUtils]: 1: Hoare triple {101341#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {101341#true} is VALID [2022-02-20 21:52:26,049 INFO L290 TraceCheckUtils]: 2: Hoare triple {101341#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {101341#true} is VALID [2022-02-20 21:52:26,049 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {101341#true} {101341#true} #1416#return; {101341#true} is VALID [2022-02-20 21:52:26,049 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 15 [2022-02-20 21:52:26,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:26,054 INFO L290 TraceCheckUtils]: 0: Hoare triple {101395#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {101341#true} is VALID [2022-02-20 21:52:26,054 INFO L290 TraceCheckUtils]: 1: Hoare triple {101341#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {101341#true} is VALID [2022-02-20 21:52:26,055 INFO L290 TraceCheckUtils]: 2: Hoare triple {101341#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {101341#true} is VALID [2022-02-20 21:52:26,055 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {101341#true} {101341#true} #1418#return; {101341#true} is VALID [2022-02-20 21:52:26,055 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 21 [2022-02-20 21:52:26,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:26,059 INFO L290 TraceCheckUtils]: 0: Hoare triple {101395#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {101341#true} is VALID [2022-02-20 21:52:26,060 INFO L290 TraceCheckUtils]: 1: Hoare triple {101341#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {101341#true} is VALID [2022-02-20 21:52:26,060 INFO L290 TraceCheckUtils]: 2: Hoare triple {101341#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {101341#true} is VALID [2022-02-20 21:52:26,060 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {101341#true} {101341#true} #1420#return; {101341#true} is VALID [2022-02-20 21:52:26,060 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 35 [2022-02-20 21:52:26,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:26,065 INFO L290 TraceCheckUtils]: 0: Hoare triple {101394#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet28#1 && #t~nondet28#1 <= 2147483647;~tmp___0~1#1 := #t~nondet28#1;havoc #t~nondet28#1; {101341#true} is VALID [2022-02-20 21:52:26,066 INFO L290 TraceCheckUtils]: 1: Hoare triple {101341#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {101341#true} is VALID [2022-02-20 21:52:26,066 INFO L290 TraceCheckUtils]: 2: Hoare triple {101341#true} assume true; {101341#true} is VALID [2022-02-20 21:52:26,066 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {101341#true} {101341#true} #1434#return; {101341#true} is VALID [2022-02-20 21:52:26,066 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2022-02-20 21:52:26,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:26,072 INFO L290 TraceCheckUtils]: 0: Hoare triple {101394#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet28#1 && #t~nondet28#1 <= 2147483647;~tmp___0~1#1 := #t~nondet28#1;havoc #t~nondet28#1; {101341#true} is VALID [2022-02-20 21:52:26,072 INFO L290 TraceCheckUtils]: 1: Hoare triple {101341#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {101341#true} is VALID [2022-02-20 21:52:26,072 INFO L290 TraceCheckUtils]: 2: Hoare triple {101341#true} assume true; {101341#true} is VALID [2022-02-20 21:52:26,072 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {101341#true} {101341#true} #1436#return; {101341#true} is VALID [2022-02-20 21:52:26,073 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 51 [2022-02-20 21:52:26,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:26,078 INFO L290 TraceCheckUtils]: 0: Hoare triple {101394#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet28#1 && #t~nondet28#1 <= 2147483647;~tmp___0~1#1 := #t~nondet28#1;havoc #t~nondet28#1; {101341#true} is VALID [2022-02-20 21:52:26,078 INFO L290 TraceCheckUtils]: 1: Hoare triple {101341#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {101341#true} is VALID [2022-02-20 21:52:26,078 INFO L290 TraceCheckUtils]: 2: Hoare triple {101341#true} assume true; {101341#true} is VALID [2022-02-20 21:52:26,078 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {101341#true} {101341#true} #1438#return; {101341#true} is VALID [2022-02-20 21:52:26,078 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 57 [2022-02-20 21:52:26,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:26,084 INFO L290 TraceCheckUtils]: 0: Hoare triple {101394#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet28#1 && #t~nondet28#1 <= 2147483647;~tmp___0~1#1 := #t~nondet28#1;havoc #t~nondet28#1; {101341#true} is VALID [2022-02-20 21:52:26,084 INFO L290 TraceCheckUtils]: 1: Hoare triple {101341#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {101341#true} is VALID [2022-02-20 21:52:26,084 INFO L290 TraceCheckUtils]: 2: Hoare triple {101341#true} assume true; {101341#true} is VALID [2022-02-20 21:52:26,084 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {101341#true} {101341#true} #1440#return; {101341#true} is VALID [2022-02-20 21:52:26,084 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 64 [2022-02-20 21:52:26,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:26,091 INFO L290 TraceCheckUtils]: 0: Hoare triple {101394#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet28#1 && #t~nondet28#1 <= 2147483647;~tmp___0~1#1 := #t~nondet28#1;havoc #t~nondet28#1; {101341#true} is VALID [2022-02-20 21:52:26,091 INFO L290 TraceCheckUtils]: 1: Hoare triple {101341#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {101341#true} is VALID [2022-02-20 21:52:26,091 INFO L290 TraceCheckUtils]: 2: Hoare triple {101341#true} assume true; {101341#true} is VALID [2022-02-20 21:52:26,092 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {101341#true} {101375#(= ~ldv_state_variable_3~0 1)} #1442#return; {101375#(= ~ldv_state_variable_3~0 1)} is VALID [2022-02-20 21:52:26,092 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 70 [2022-02-20 21:52:26,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:26,098 INFO L290 TraceCheckUtils]: 0: Hoare triple {101394#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet28#1 && #t~nondet28#1 <= 2147483647;~tmp___0~1#1 := #t~nondet28#1;havoc #t~nondet28#1; {101341#true} is VALID [2022-02-20 21:52:26,098 INFO L290 TraceCheckUtils]: 1: Hoare triple {101341#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {101341#true} is VALID [2022-02-20 21:52:26,099 INFO L290 TraceCheckUtils]: 2: Hoare triple {101341#true} assume true; {101341#true} is VALID [2022-02-20 21:52:26,099 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {101341#true} {101375#(= ~ldv_state_variable_3~0 1)} #1444#return; {101375#(= ~ldv_state_variable_3~0 1)} is VALID [2022-02-20 21:52:26,099 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 76 [2022-02-20 21:52:26,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:26,106 INFO L290 TraceCheckUtils]: 0: Hoare triple {101394#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet28#1 && #t~nondet28#1 <= 2147483647;~tmp___0~1#1 := #t~nondet28#1;havoc #t~nondet28#1; {101341#true} is VALID [2022-02-20 21:52:26,106 INFO L290 TraceCheckUtils]: 1: Hoare triple {101341#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {101341#true} is VALID [2022-02-20 21:52:26,106 INFO L290 TraceCheckUtils]: 2: Hoare triple {101341#true} assume true; {101341#true} is VALID [2022-02-20 21:52:26,107 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {101341#true} {101375#(= ~ldv_state_variable_3~0 1)} #1446#return; {101375#(= ~ldv_state_variable_3~0 1)} is VALID [2022-02-20 21:52:26,107 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 98 [2022-02-20 21:52:26,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:26,112 INFO L290 TraceCheckUtils]: 0: Hoare triple {101341#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {101341#true} is VALID [2022-02-20 21:52:26,112 INFO L290 TraceCheckUtils]: 1: Hoare triple {101341#true} assume true; {101341#true} is VALID [2022-02-20 21:52:26,112 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {101341#true} {101342#false} #1376#return; {101342#false} is VALID [2022-02-20 21:52:26,112 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 109 [2022-02-20 21:52:26,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:26,128 INFO L290 TraceCheckUtils]: 0: Hoare triple {101341#true} havoc ~tmp~3;assume -2147483648 <= #t~nondet31 && #t~nondet31 <= 2147483647;~tmp~3 := #t~nondet31;havoc #t~nondet31;#res := ~tmp~3; {101341#true} is VALID [2022-02-20 21:52:26,129 INFO L290 TraceCheckUtils]: 1: Hoare triple {101341#true} assume true; {101341#true} is VALID [2022-02-20 21:52:26,129 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {101341#true} {101342#false} #1380#return; {101342#false} is VALID [2022-02-20 21:52:26,129 INFO L290 TraceCheckUtils]: 0: Hoare triple {101341#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(82, 2);call #Ultimate.allocInit(9, 3);call #Ultimate.allocInit(22, 4);call #Ultimate.allocInit(219, 5);call #Ultimate.allocInit(24, 6);call #Ultimate.allocInit(24, 7);call #Ultimate.allocInit(22, 8);call #Ultimate.allocInit(24, 9);call #Ultimate.allocInit(9, 10);call #Ultimate.allocInit(18, 11);call #Ultimate.allocInit(219, 12);call #Ultimate.allocInit(36, 13);call #Ultimate.allocInit(36, 14);call #Ultimate.allocInit(9, 15);call #Ultimate.allocInit(18, 16);call #Ultimate.allocInit(219, 17);call #Ultimate.allocInit(67, 18);call #Ultimate.allocInit(67, 19);call #Ultimate.allocInit(9, 20);call #Ultimate.allocInit(9, 21);call #Ultimate.allocInit(9, 22);call #Ultimate.allocInit(9, 23);~LDV_IN_INTERRUPT~0 := 1;~cdc_mbim_info_zlp_group1~0.base, ~cdc_mbim_info_zlp_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0;~cdc_mbim_info_group0~0.base, ~cdc_mbim_info_group0~0.offset := 0, 0;~ref_cnt~0 := 0;~cdc_mbim_info_zlp_group2~0.base, ~cdc_mbim_info_zlp_group2~0.offset := 0, 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~cdc_mbim_info_group1~0.base, ~cdc_mbim_info_group1~0.offset := 0, 0;~cdc_mbim_info_zlp_group0~0.base, ~cdc_mbim_info_zlp_group0~0.offset := 0, 0;~cdc_mbim_info_group2~0.base, ~cdc_mbim_info_group2~0.offset := 0, 0;~cdc_mbim_driver_group1~0.base, ~cdc_mbim_driver_group1~0.offset := 0, 0;~#cdc_mbim_info~0.base, ~#cdc_mbim_info~0.offset := 24, 0;call #Ultimate.allocInit(124, 24);call write~init~$Pointer$(20, 0, ~#cdc_mbim_info~0.base, ~#cdc_mbim_info~0.offset, 8);call write~init~int(9232, ~#cdc_mbim_info~0.base, 8 + ~#cdc_mbim_info~0.offset, 4);call write~init~$Pointer$(#funAddr~cdc_mbim_bind.base, #funAddr~cdc_mbim_bind.offset, ~#cdc_mbim_info~0.base, 12 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_unbind.base, #funAddr~cdc_mbim_unbind.offset, ~#cdc_mbim_info~0.base, 20 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 28 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 36 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 44 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_manage_power.base, #funAddr~cdc_mbim_manage_power.offset, ~#cdc_mbim_info~0.base, 52 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 60 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 68 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_rx_fixup.base, #funAddr~cdc_mbim_rx_fixup.offset, ~#cdc_mbim_info~0.base, 76 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_tx_fixup.base, #funAddr~cdc_mbim_tx_fixup.offset, ~#cdc_mbim_info~0.base, 84 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 92 + ~#cdc_mbim_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info~0.base, 100 + ~#cdc_mbim_info~0.offset, 8);call write~init~int(0, ~#cdc_mbim_info~0.base, 108 + ~#cdc_mbim_info~0.offset, 4);call write~init~int(0, ~#cdc_mbim_info~0.base, 112 + ~#cdc_mbim_info~0.offset, 4);call write~init~int(0, ~#cdc_mbim_info~0.base, 116 + ~#cdc_mbim_info~0.offset, 8);~#cdc_mbim_info_zlp~0.base, ~#cdc_mbim_info_zlp~0.offset := 25, 0;call #Ultimate.allocInit(124, 25);call write~init~$Pointer$(21, 0, ~#cdc_mbim_info_zlp~0.base, ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~int(9744, ~#cdc_mbim_info_zlp~0.base, 8 + ~#cdc_mbim_info_zlp~0.offset, 4);call write~init~$Pointer$(#funAddr~cdc_mbim_bind.base, #funAddr~cdc_mbim_bind.offset, ~#cdc_mbim_info_zlp~0.base, 12 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_unbind.base, #funAddr~cdc_mbim_unbind.offset, ~#cdc_mbim_info_zlp~0.base, 20 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 28 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 36 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 44 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_manage_power.base, #funAddr~cdc_mbim_manage_power.offset, ~#cdc_mbim_info_zlp~0.base, 52 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 60 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 68 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_rx_fixup.base, #funAddr~cdc_mbim_rx_fixup.offset, ~#cdc_mbim_info_zlp~0.base, 76 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_tx_fixup.base, #funAddr~cdc_mbim_tx_fixup.offset, ~#cdc_mbim_info_zlp~0.base, 84 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 92 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_info_zlp~0.base, 100 + ~#cdc_mbim_info_zlp~0.offset, 8);call write~init~int(0, ~#cdc_mbim_info_zlp~0.base, 108 + ~#cdc_mbim_info_zlp~0.offset, 4);call write~init~int(0, ~#cdc_mbim_info_zlp~0.base, 112 + ~#cdc_mbim_info_zlp~0.offset, 4);call write~init~int(0, ~#cdc_mbim_info_zlp~0.base, 116 + ~#cdc_mbim_info_zlp~0.offset, 8);~#mbim_devs~0.base, ~#mbim_devs~0.offset := 26, 0;call #Ultimate.allocInit(125, 26);call write~init~int(896, ~#mbim_devs~0.base, ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 2 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 4 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 6 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 8 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 10 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 11 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 12 + ~#mbim_devs~0.offset, 1);call write~init~int(2, ~#mbim_devs~0.base, 13 + ~#mbim_devs~0.offset, 1);call write~init~int(13, ~#mbim_devs~0.base, 14 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 15 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 16 + ~#mbim_devs~0.offset, 1);call write~init~int(~#cdc_mbim_info~0.base + ~#cdc_mbim_info~0.offset, ~#mbim_devs~0.base, 17 + ~#mbim_devs~0.offset, 8);call write~init~int(899, ~#mbim_devs~0.base, 25 + ~#mbim_devs~0.offset, 2);call write~init~int(4505, ~#mbim_devs~0.base, 27 + ~#mbim_devs~0.offset, 2);call write~init~int(26786, ~#mbim_devs~0.base, 29 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 31 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 33 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 35 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 36 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 37 + ~#mbim_devs~0.offset, 1);call write~init~int(2, ~#mbim_devs~0.base, 38 + ~#mbim_devs~0.offset, 1);call write~init~int(14, ~#mbim_devs~0.base, 39 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 40 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 41 + ~#mbim_devs~0.offset, 1);call write~init~int(~#cdc_mbim_info_zlp~0.base + ~#cdc_mbim_info_zlp~0.offset, ~#mbim_devs~0.base, 42 + ~#mbim_devs~0.offset, 8);call write~init~int(899, ~#mbim_devs~0.base, 50 + ~#mbim_devs~0.offset, 2);call write~init~int(1008, ~#mbim_devs~0.base, 52 + ~#mbim_devs~0.offset, 2);call write~init~int(19229, ~#mbim_devs~0.base, 54 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 56 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 58 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 60 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 61 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 62 + ~#mbim_devs~0.offset, 1);call write~init~int(2, ~#mbim_devs~0.base, 63 + ~#mbim_devs~0.offset, 1);call write~init~int(14, ~#mbim_devs~0.base, 64 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 65 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 66 + ~#mbim_devs~0.offset, 1);call write~init~int(~#cdc_mbim_info_zlp~0.base + ~#cdc_mbim_info_zlp~0.offset, ~#mbim_devs~0.base, 67 + ~#mbim_devs~0.offset, 8);call write~init~int(896, ~#mbim_devs~0.base, 75 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 77 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 79 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 81 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 83 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 85 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 86 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 87 + ~#mbim_devs~0.offset, 1);call write~init~int(2, ~#mbim_devs~0.base, 88 + ~#mbim_devs~0.offset, 1);call write~init~int(14, ~#mbim_devs~0.base, 89 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 90 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 91 + ~#mbim_devs~0.offset, 1);call write~init~int(~#cdc_mbim_info~0.base + ~#cdc_mbim_info~0.offset, ~#mbim_devs~0.base, 92 + ~#mbim_devs~0.offset, 8);call write~init~int(0, ~#mbim_devs~0.base, 100 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 102 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 104 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 106 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 108 + ~#mbim_devs~0.offset, 2);call write~init~int(0, ~#mbim_devs~0.base, 110 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 111 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 112 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 113 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 114 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 115 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 116 + ~#mbim_devs~0.offset, 1);call write~init~int(0, ~#mbim_devs~0.base, 117 + ~#mbim_devs~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.bInterfaceNumber := 0;~__mod_usb_device_table~0.driver_info := 0;~#cdc_mbim_driver~0.base, ~#cdc_mbim_driver~0.offset := 27, 0;call #Ultimate.allocInit(285, 27);call write~init~$Pointer$(22, 0, ~#cdc_mbim_driver~0.base, ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usbnet_probe.base, #funAddr~usbnet_probe.offset, ~#cdc_mbim_driver~0.base, 8 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usbnet_disconnect.base, #funAddr~usbnet_disconnect.offset, ~#cdc_mbim_driver~0.base, 16 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 24 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_suspend.base, #funAddr~cdc_mbim_suspend.offset, ~#cdc_mbim_driver~0.base, 32 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_resume.base, #funAddr~cdc_mbim_resume.offset, ~#cdc_mbim_driver~0.base, 40 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~cdc_mbim_resume.base, #funAddr~cdc_mbim_resume.offset, ~#cdc_mbim_driver~0.base, 48 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 56 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 64 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(~#mbim_devs~0.base, ~#mbim_devs~0.offset, ~#cdc_mbim_driver~0.base, 72 + ~#cdc_mbim_driver~0.offset, 8);call write~init~int(0, ~#cdc_mbim_driver~0.base, 80 + ~#cdc_mbim_driver~0.offset, 4);call write~init~int(0, ~#cdc_mbim_driver~0.base, 84 + ~#cdc_mbim_driver~0.offset, 4);call write~init~int(0, ~#cdc_mbim_driver~0.base, 88 + ~#cdc_mbim_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 92 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 100 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 108 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 116 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 124 + ~#cdc_mbim_driver~0.offset, 8);call write~init~int(0, ~#cdc_mbim_driver~0.base, 132 + ~#cdc_mbim_driver~0.offset, 4);call write~init~int(0, ~#cdc_mbim_driver~0.base, 136 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 148 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 156 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 164 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 172 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 180 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 188 + ~#cdc_mbim_driver~0.offset, 8);call write~init~int(0, ~#cdc_mbim_driver~0.base, 196 + ~#cdc_mbim_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 197 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 205 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 213 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 221 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 229 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 237 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 245 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 253 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 261 + ~#cdc_mbim_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cdc_mbim_driver~0.base, 269 + ~#cdc_mbim_driver~0.offset, 8);call write~init~int(0, ~#cdc_mbim_driver~0.base, 277 + ~#cdc_mbim_driver~0.offset, 4);call write~init~int(0, ~#cdc_mbim_driver~0.base, 281 + ~#cdc_mbim_driver~0.offset, 1);call write~init~int(1, ~#cdc_mbim_driver~0.base, 282 + ~#cdc_mbim_driver~0.offset, 1);call write~init~int(1, ~#cdc_mbim_driver~0.base, 283 + ~#cdc_mbim_driver~0.offset, 1);call write~init~int(0, ~#cdc_mbim_driver~0.base, 284 + ~#cdc_mbim_driver~0.offset, 1);~ldv_retval_2~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_5~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_6~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {101341#true} is VALID [2022-02-20 21:52:26,129 INFO L290 TraceCheckUtils]: 1: Hoare triple {101341#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret287#1.base, main_#t~ret287#1.offset, main_#t~nondet288#1, main_#t~nondet289#1, main_#t~memset~res290#1.base, main_#t~memset~res290#1.offset, main_#t~memset~res291#1.base, main_#t~memset~res291#1.offset, main_#t~memset~res292#1.base, main_#t~memset~res292#1.offset, main_#t~nondet293#1, main_#t~switch294#1, main_#t~nondet295#1, main_#t~switch296#1, main_#t~ret297#1, main_#t~ret298#1, main_#t~mem299#1, main_#t~ret300#1, main_#t~ret301#1, main_#t~nondet302#1, main_#t~switch303#1, main_#t~ret304#1, main_#t~nondet305#1, main_#t~switch306#1, main_#t~ret307#1, main_#t~ret308#1, main_#t~ret309#1, main_#t~mem310#1, main_#t~ret311#1.base, main_#t~ret311#1.offset, main_#t~mem312#1, main_#t~ret313#1.base, main_#t~ret313#1.offset, main_#t~ret314#1, main_#t~ret315#1, main_#t~nondet316#1, main_#t~switch317#1, main_#t~ret318#1, main_#t~ret319#1, main_#t~ret320#1, main_#t~mem321#1, main_#t~ret322#1.base, main_#t~ret322#1.offset, main_#t~mem323#1, main_#t~ret324#1.base, main_#t~ret324#1.offset, main_#t~ret325#1, main_#t~ret326#1, main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset, main_~tmp~27#1.base, main_~tmp~27#1.offset, main_~#ldvarg0~0#1.base, main_~#ldvarg0~0#1.offset, main_~#ldvarg3~0#1.base, main_~#ldvarg3~0#1.offset, main_~ldvarg2~0#1, main_~tmp___0~14#1, main_~ldvarg4~0#1, main_~tmp___1~9#1, main_~#ldvarg5~0#1.base, main_~#ldvarg5~0#1.offset, main_~tmp___2~3#1, main_~tmp___3~0#1, main_~tmp___4~1#1, main_~tmp___5~0#1, main_~tmp___6~0#1;havoc main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset;havoc main_~tmp~27#1.base, main_~tmp~27#1.offset;call main_~#ldvarg0~0#1.base, main_~#ldvarg0~0#1.offset := #Ultimate.allocOnStack(4);call main_~#ldvarg3~0#1.base, main_~#ldvarg3~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~ldvarg2~0#1;havoc main_~tmp___0~14#1;havoc main_~ldvarg4~0#1;havoc main_~tmp___1~9#1;call main_~#ldvarg5~0#1.base, main_~#ldvarg5~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~tmp___2~3#1;havoc main_~tmp___3~0#1;havoc main_~tmp___4~1#1;havoc main_~tmp___5~0#1;havoc main_~tmp___6~0#1; {101341#true} is VALID [2022-02-20 21:52:26,130 INFO L272 TraceCheckUtils]: 2: Hoare triple {101341#true} call main_#t~ret287#1.base, main_#t~ret287#1.offset := ldv_zalloc(32); {101394#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:26,130 INFO L290 TraceCheckUtils]: 3: Hoare triple {101394#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet28#1 && #t~nondet28#1 <= 2147483647;~tmp___0~1#1 := #t~nondet28#1;havoc #t~nondet28#1; {101341#true} is VALID [2022-02-20 21:52:26,130 INFO L290 TraceCheckUtils]: 4: Hoare triple {101341#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {101341#true} is VALID [2022-02-20 21:52:26,130 INFO L290 TraceCheckUtils]: 5: Hoare triple {101341#true} assume true; {101341#true} is VALID [2022-02-20 21:52:26,130 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {101341#true} {101341#true} #1414#return; {101341#true} is VALID [2022-02-20 21:52:26,130 INFO L290 TraceCheckUtils]: 7: Hoare triple {101341#true} main_~tmp~27#1.base, main_~tmp~27#1.offset := main_#t~ret287#1.base, main_#t~ret287#1.offset;havoc main_#t~ret287#1.base, main_#t~ret287#1.offset;main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset := main_~tmp~27#1.base, main_~tmp~27#1.offset;assume -2147483648 <= main_#t~nondet288#1 && main_#t~nondet288#1 <= 2147483647;main_~tmp___0~14#1 := main_#t~nondet288#1;havoc main_#t~nondet288#1;main_~ldvarg2~0#1 := main_~tmp___0~14#1;assume -2147483648 <= main_#t~nondet289#1 && main_#t~nondet289#1 <= 2147483647;main_~tmp___1~9#1 := main_#t~nondet289#1;havoc main_#t~nondet289#1;main_~ldvarg4~0#1 := main_~tmp___1~9#1;assume { :begin_inline_ldv_initialize } true; {101341#true} is VALID [2022-02-20 21:52:26,131 INFO L290 TraceCheckUtils]: 8: Hoare triple {101341#true} assume { :end_inline_ldv_initialize } true; {101341#true} is VALID [2022-02-20 21:52:26,131 INFO L272 TraceCheckUtils]: 9: Hoare triple {101341#true} call main_#t~memset~res290#1.base, main_#t~memset~res290#1.offset := #Ultimate.C_memset(main_~#ldvarg0~0#1.base, main_~#ldvarg0~0#1.offset, 0, 4); {101395#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 21:52:26,131 INFO L290 TraceCheckUtils]: 10: Hoare triple {101395#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {101341#true} is VALID [2022-02-20 21:52:26,131 INFO L290 TraceCheckUtils]: 11: Hoare triple {101341#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {101341#true} is VALID [2022-02-20 21:52:26,131 INFO L290 TraceCheckUtils]: 12: Hoare triple {101341#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {101341#true} is VALID [2022-02-20 21:52:26,132 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {101341#true} {101341#true} #1416#return; {101341#true} is VALID [2022-02-20 21:52:26,132 INFO L290 TraceCheckUtils]: 14: Hoare triple {101341#true} havoc main_#t~memset~res290#1.base, main_#t~memset~res290#1.offset; {101341#true} is VALID [2022-02-20 21:52:26,132 INFO L272 TraceCheckUtils]: 15: Hoare triple {101341#true} call main_#t~memset~res291#1.base, main_#t~memset~res291#1.offset := #Ultimate.C_memset(main_~#ldvarg3~0#1.base, main_~#ldvarg3~0#1.offset, 0, 4); {101395#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 21:52:26,132 INFO L290 TraceCheckUtils]: 16: Hoare triple {101395#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {101341#true} is VALID [2022-02-20 21:52:26,133 INFO L290 TraceCheckUtils]: 17: Hoare triple {101341#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {101341#true} is VALID [2022-02-20 21:52:26,133 INFO L290 TraceCheckUtils]: 18: Hoare triple {101341#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {101341#true} is VALID [2022-02-20 21:52:26,133 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {101341#true} {101341#true} #1418#return; {101341#true} is VALID [2022-02-20 21:52:26,134 INFO L290 TraceCheckUtils]: 20: Hoare triple {101341#true} havoc main_#t~memset~res291#1.base, main_#t~memset~res291#1.offset; {101341#true} is VALID [2022-02-20 21:52:26,134 INFO L272 TraceCheckUtils]: 21: Hoare triple {101341#true} call main_#t~memset~res292#1.base, main_#t~memset~res292#1.offset := #Ultimate.C_memset(main_~#ldvarg5~0#1.base, main_~#ldvarg5~0#1.offset, 0, 4); {101395#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 21:52:26,134 INFO L290 TraceCheckUtils]: 22: Hoare triple {101395#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr365 := 0; {101341#true} is VALID [2022-02-20 21:52:26,134 INFO L290 TraceCheckUtils]: 23: Hoare triple {101341#true} assume !(#t~loopctr365 % 18446744073709551616 < #amount % 18446744073709551616); {101341#true} is VALID [2022-02-20 21:52:26,134 INFO L290 TraceCheckUtils]: 24: Hoare triple {101341#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {101341#true} is VALID [2022-02-20 21:52:26,135 INFO L284 TraceCheckUtils]: 25: Hoare quadruple {101341#true} {101341#true} #1420#return; {101341#true} is VALID [2022-02-20 21:52:26,135 INFO L290 TraceCheckUtils]: 26: Hoare triple {101341#true} havoc main_#t~memset~res292#1.base, main_#t~memset~res292#1.offset;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {101341#true} is VALID [2022-02-20 21:52:26,135 INFO L290 TraceCheckUtils]: 27: Hoare triple {101341#true} assume -2147483648 <= main_#t~nondet293#1 && main_#t~nondet293#1 <= 2147483647;main_~tmp___2~3#1 := main_#t~nondet293#1;havoc main_#t~nondet293#1;main_#t~switch294#1 := 0 == main_~tmp___2~3#1; {101341#true} is VALID [2022-02-20 21:52:26,135 INFO L290 TraceCheckUtils]: 28: Hoare triple {101341#true} assume !main_#t~switch294#1;main_#t~switch294#1 := main_#t~switch294#1 || 1 == main_~tmp___2~3#1; {101341#true} is VALID [2022-02-20 21:52:26,135 INFO L290 TraceCheckUtils]: 29: Hoare triple {101341#true} assume main_#t~switch294#1; {101341#true} is VALID [2022-02-20 21:52:26,135 INFO L290 TraceCheckUtils]: 30: Hoare triple {101341#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet302#1 && main_#t~nondet302#1 <= 2147483647;main_~tmp___4~1#1 := main_#t~nondet302#1;havoc main_#t~nondet302#1;main_#t~switch303#1 := 0 == main_~tmp___4~1#1; {101341#true} is VALID [2022-02-20 21:52:26,135 INFO L290 TraceCheckUtils]: 31: Hoare triple {101341#true} assume !main_#t~switch303#1;main_#t~switch303#1 := main_#t~switch303#1 || 1 == main_~tmp___4~1#1; {101341#true} is VALID [2022-02-20 21:52:26,136 INFO L290 TraceCheckUtils]: 32: Hoare triple {101341#true} assume main_#t~switch303#1; {101341#true} is VALID [2022-02-20 21:52:26,136 INFO L290 TraceCheckUtils]: 33: Hoare triple {101341#true} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_cdc_mbim_driver_init } true;havoc cdc_mbim_driver_init_#res#1;havoc cdc_mbim_driver_init_#t~ret279#1, cdc_mbim_driver_init_~tmp~23#1;havoc cdc_mbim_driver_init_~tmp~23#1;assume { :begin_inline_ldv_usb_register_driver_7 } true;ldv_usb_register_driver_7_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_7_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_7_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_7_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_7_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_7_#in~ldv_func_arg3#1.offset := ~#cdc_mbim_driver~0.base, ~#cdc_mbim_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 23, 0;havoc ldv_usb_register_driver_7_#res#1;havoc ldv_usb_register_driver_7_#t~ret329#1, ldv_usb_register_driver_7_~ldv_func_arg1#1.base, ldv_usb_register_driver_7_~ldv_func_arg1#1.offset, ldv_usb_register_driver_7_~ldv_func_arg2#1.base, ldv_usb_register_driver_7_~ldv_func_arg2#1.offset, ldv_usb_register_driver_7_~ldv_func_arg3#1.base, ldv_usb_register_driver_7_~ldv_func_arg3#1.offset, ldv_usb_register_driver_7_~ldv_func_res~0#1, ldv_usb_register_driver_7_~tmp~30#1;ldv_usb_register_driver_7_~ldv_func_arg1#1.base, ldv_usb_register_driver_7_~ldv_func_arg1#1.offset := ldv_usb_register_driver_7_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_7_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_7_~ldv_func_arg2#1.base, ldv_usb_register_driver_7_~ldv_func_arg2#1.offset := ldv_usb_register_driver_7_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_7_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_7_~ldv_func_arg3#1.base, ldv_usb_register_driver_7_~ldv_func_arg3#1.offset := ldv_usb_register_driver_7_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_7_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_7_~ldv_func_res~0#1;havoc ldv_usb_register_driver_7_~tmp~30#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_7_~ldv_func_arg1#1.base, ldv_usb_register_driver_7_~ldv_func_arg1#1.offset, ldv_usb_register_driver_7_~ldv_func_arg2#1.base, ldv_usb_register_driver_7_~ldv_func_arg2#1.offset, ldv_usb_register_driver_7_~ldv_func_arg3#1.base, ldv_usb_register_driver_7_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet357#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet357#1 && usb_register_driver_#t~nondet357#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet357#1;havoc usb_register_driver_#t~nondet357#1; {101341#true} is VALID [2022-02-20 21:52:26,136 INFO L290 TraceCheckUtils]: 34: Hoare triple {101341#true} ldv_usb_register_driver_7_#t~ret329#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_7_#t~ret329#1 && ldv_usb_register_driver_7_#t~ret329#1 <= 2147483647;ldv_usb_register_driver_7_~tmp~30#1 := ldv_usb_register_driver_7_#t~ret329#1;havoc ldv_usb_register_driver_7_#t~ret329#1;ldv_usb_register_driver_7_~ldv_func_res~0#1 := ldv_usb_register_driver_7_~tmp~30#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret286#1.base, ldv_usb_driver_1_#t~ret286#1.offset, ldv_usb_driver_1_~tmp~26#1.base, ldv_usb_driver_1_~tmp~26#1.offset;havoc ldv_usb_driver_1_~tmp~26#1.base, ldv_usb_driver_1_~tmp~26#1.offset; {101341#true} is VALID [2022-02-20 21:52:26,136 INFO L272 TraceCheckUtils]: 35: Hoare triple {101341#true} call ldv_usb_driver_1_#t~ret286#1.base, ldv_usb_driver_1_#t~ret286#1.offset := ldv_zalloc(1520); {101394#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:26,137 INFO L290 TraceCheckUtils]: 36: Hoare triple {101394#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet28#1 && #t~nondet28#1 <= 2147483647;~tmp___0~1#1 := #t~nondet28#1;havoc #t~nondet28#1; {101341#true} is VALID [2022-02-20 21:52:26,137 INFO L290 TraceCheckUtils]: 37: Hoare triple {101341#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {101341#true} is VALID [2022-02-20 21:52:26,137 INFO L290 TraceCheckUtils]: 38: Hoare triple {101341#true} assume true; {101341#true} is VALID [2022-02-20 21:52:26,137 INFO L284 TraceCheckUtils]: 39: Hoare quadruple {101341#true} {101341#true} #1434#return; {101341#true} is VALID [2022-02-20 21:52:26,137 INFO L290 TraceCheckUtils]: 40: Hoare triple {101341#true} ldv_usb_driver_1_~tmp~26#1.base, ldv_usb_driver_1_~tmp~26#1.offset := ldv_usb_driver_1_#t~ret286#1.base, ldv_usb_driver_1_#t~ret286#1.offset;havoc ldv_usb_driver_1_#t~ret286#1.base, ldv_usb_driver_1_#t~ret286#1.offset;~cdc_mbim_driver_group1~0.base, ~cdc_mbim_driver_group1~0.offset := ldv_usb_driver_1_~tmp~26#1.base, ldv_usb_driver_1_~tmp~26#1.offset; {101341#true} is VALID [2022-02-20 21:52:26,137 INFO L290 TraceCheckUtils]: 41: Hoare triple {101341#true} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_7_#res#1 := ldv_usb_register_driver_7_~ldv_func_res~0#1; {101341#true} is VALID [2022-02-20 21:52:26,137 INFO L290 TraceCheckUtils]: 42: Hoare triple {101341#true} cdc_mbim_driver_init_#t~ret279#1 := ldv_usb_register_driver_7_#res#1;assume { :end_inline_ldv_usb_register_driver_7 } true;assume -2147483648 <= cdc_mbim_driver_init_#t~ret279#1 && cdc_mbim_driver_init_#t~ret279#1 <= 2147483647;cdc_mbim_driver_init_~tmp~23#1 := cdc_mbim_driver_init_#t~ret279#1;havoc cdc_mbim_driver_init_#t~ret279#1;cdc_mbim_driver_init_#res#1 := cdc_mbim_driver_init_~tmp~23#1; {101341#true} is VALID [2022-02-20 21:52:26,137 INFO L290 TraceCheckUtils]: 43: Hoare triple {101341#true} main_#t~ret304#1 := cdc_mbim_driver_init_#res#1;assume { :end_inline_cdc_mbim_driver_init } true;assume -2147483648 <= main_#t~ret304#1 && main_#t~ret304#1 <= 2147483647;~ldv_retval_4~0 := main_#t~ret304#1;havoc main_#t~ret304#1; {101341#true} is VALID [2022-02-20 21:52:26,138 INFO L290 TraceCheckUtils]: 44: Hoare triple {101341#true} assume 0 == ~ldv_retval_4~0;~ldv_state_variable_0~0 := 3;~ldv_state_variable_2~0 := 1;assume { :begin_inline_ldv_initialize_driver_info_2 } true;havoc ldv_initialize_driver_info_2_#t~ret280#1.base, ldv_initialize_driver_info_2_#t~ret280#1.offset, ldv_initialize_driver_info_2_#t~ret281#1.base, ldv_initialize_driver_info_2_#t~ret281#1.offset, ldv_initialize_driver_info_2_#t~ret282#1.base, ldv_initialize_driver_info_2_#t~ret282#1.offset, ldv_initialize_driver_info_2_~tmp~24#1.base, ldv_initialize_driver_info_2_~tmp~24#1.offset, ldv_initialize_driver_info_2_~tmp___0~12#1.base, ldv_initialize_driver_info_2_~tmp___0~12#1.offset, ldv_initialize_driver_info_2_~tmp___1~7#1.base, ldv_initialize_driver_info_2_~tmp___1~7#1.offset;havoc ldv_initialize_driver_info_2_~tmp~24#1.base, ldv_initialize_driver_info_2_~tmp~24#1.offset;havoc ldv_initialize_driver_info_2_~tmp___0~12#1.base, ldv_initialize_driver_info_2_~tmp___0~12#1.offset;havoc ldv_initialize_driver_info_2_~tmp___1~7#1.base, ldv_initialize_driver_info_2_~tmp___1~7#1.offset; {101341#true} is VALID [2022-02-20 21:52:26,138 INFO L272 TraceCheckUtils]: 45: Hoare triple {101341#true} call ldv_initialize_driver_info_2_#t~ret280#1.base, ldv_initialize_driver_info_2_#t~ret280#1.offset := ldv_zalloc(1384); {101394#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:26,138 INFO L290 TraceCheckUtils]: 46: Hoare triple {101394#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet28#1 && #t~nondet28#1 <= 2147483647;~tmp___0~1#1 := #t~nondet28#1;havoc #t~nondet28#1; {101341#true} is VALID [2022-02-20 21:52:26,138 INFO L290 TraceCheckUtils]: 47: Hoare triple {101341#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {101341#true} is VALID [2022-02-20 21:52:26,138 INFO L290 TraceCheckUtils]: 48: Hoare triple {101341#true} assume true; {101341#true} is VALID [2022-02-20 21:52:26,138 INFO L284 TraceCheckUtils]: 49: Hoare quadruple {101341#true} {101341#true} #1436#return; {101341#true} is VALID [2022-02-20 21:52:26,139 INFO L290 TraceCheckUtils]: 50: Hoare triple {101341#true} ldv_initialize_driver_info_2_~tmp~24#1.base, ldv_initialize_driver_info_2_~tmp~24#1.offset := ldv_initialize_driver_info_2_#t~ret280#1.base, ldv_initialize_driver_info_2_#t~ret280#1.offset;havoc ldv_initialize_driver_info_2_#t~ret280#1.base, ldv_initialize_driver_info_2_#t~ret280#1.offset;~cdc_mbim_info_zlp_group0~0.base, ~cdc_mbim_info_zlp_group0~0.offset := ldv_initialize_driver_info_2_~tmp~24#1.base, ldv_initialize_driver_info_2_~tmp~24#1.offset; {101341#true} is VALID [2022-02-20 21:52:26,139 INFO L272 TraceCheckUtils]: 51: Hoare triple {101341#true} call ldv_initialize_driver_info_2_#t~ret281#1.base, ldv_initialize_driver_info_2_#t~ret281#1.offset := ldv_zalloc(1520); {101394#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:26,139 INFO L290 TraceCheckUtils]: 52: Hoare triple {101394#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet28#1 && #t~nondet28#1 <= 2147483647;~tmp___0~1#1 := #t~nondet28#1;havoc #t~nondet28#1; {101341#true} is VALID [2022-02-20 21:52:26,139 INFO L290 TraceCheckUtils]: 53: Hoare triple {101341#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {101341#true} is VALID [2022-02-20 21:52:26,139 INFO L290 TraceCheckUtils]: 54: Hoare triple {101341#true} assume true; {101341#true} is VALID [2022-02-20 21:52:26,139 INFO L284 TraceCheckUtils]: 55: Hoare quadruple {101341#true} {101341#true} #1438#return; {101341#true} is VALID [2022-02-20 21:52:26,140 INFO L290 TraceCheckUtils]: 56: Hoare triple {101341#true} ldv_initialize_driver_info_2_~tmp___0~12#1.base, ldv_initialize_driver_info_2_~tmp___0~12#1.offset := ldv_initialize_driver_info_2_#t~ret281#1.base, ldv_initialize_driver_info_2_#t~ret281#1.offset;havoc ldv_initialize_driver_info_2_#t~ret281#1.base, ldv_initialize_driver_info_2_#t~ret281#1.offset;~cdc_mbim_info_zlp_group1~0.base, ~cdc_mbim_info_zlp_group1~0.offset := ldv_initialize_driver_info_2_~tmp___0~12#1.base, ldv_initialize_driver_info_2_~tmp___0~12#1.offset; {101341#true} is VALID [2022-02-20 21:52:26,151 INFO L272 TraceCheckUtils]: 57: Hoare triple {101341#true} call ldv_initialize_driver_info_2_#t~ret282#1.base, ldv_initialize_driver_info_2_#t~ret282#1.offset := ldv_zalloc(240); {101394#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:26,161 INFO L290 TraceCheckUtils]: 58: Hoare triple {101394#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet28#1 && #t~nondet28#1 <= 2147483647;~tmp___0~1#1 := #t~nondet28#1;havoc #t~nondet28#1; {101341#true} is VALID [2022-02-20 21:52:26,162 INFO L290 TraceCheckUtils]: 59: Hoare triple {101341#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {101341#true} is VALID [2022-02-20 21:52:26,162 INFO L290 TraceCheckUtils]: 60: Hoare triple {101341#true} assume true; {101341#true} is VALID [2022-02-20 21:52:26,162 INFO L284 TraceCheckUtils]: 61: Hoare quadruple {101341#true} {101341#true} #1440#return; {101341#true} is VALID [2022-02-20 21:52:26,162 INFO L290 TraceCheckUtils]: 62: Hoare triple {101341#true} ldv_initialize_driver_info_2_~tmp___1~7#1.base, ldv_initialize_driver_info_2_~tmp___1~7#1.offset := ldv_initialize_driver_info_2_#t~ret282#1.base, ldv_initialize_driver_info_2_#t~ret282#1.offset;havoc ldv_initialize_driver_info_2_#t~ret282#1.base, ldv_initialize_driver_info_2_#t~ret282#1.offset;~cdc_mbim_info_zlp_group2~0.base, ~cdc_mbim_info_zlp_group2~0.offset := ldv_initialize_driver_info_2_~tmp___1~7#1.base, ldv_initialize_driver_info_2_~tmp___1~7#1.offset; {101341#true} is VALID [2022-02-20 21:52:26,162 INFO L290 TraceCheckUtils]: 63: Hoare triple {101341#true} assume { :end_inline_ldv_initialize_driver_info_2 } true;~ldv_state_variable_3~0 := 1;assume { :begin_inline_ldv_initialize_driver_info_3 } true;havoc ldv_initialize_driver_info_3_#t~ret283#1.base, ldv_initialize_driver_info_3_#t~ret283#1.offset, ldv_initialize_driver_info_3_#t~ret284#1.base, ldv_initialize_driver_info_3_#t~ret284#1.offset, ldv_initialize_driver_info_3_#t~ret285#1.base, ldv_initialize_driver_info_3_#t~ret285#1.offset, ldv_initialize_driver_info_3_~tmp~25#1.base, ldv_initialize_driver_info_3_~tmp~25#1.offset, ldv_initialize_driver_info_3_~tmp___0~13#1.base, ldv_initialize_driver_info_3_~tmp___0~13#1.offset, ldv_initialize_driver_info_3_~tmp___1~8#1.base, ldv_initialize_driver_info_3_~tmp___1~8#1.offset;havoc ldv_initialize_driver_info_3_~tmp~25#1.base, ldv_initialize_driver_info_3_~tmp~25#1.offset;havoc ldv_initialize_driver_info_3_~tmp___0~13#1.base, ldv_initialize_driver_info_3_~tmp___0~13#1.offset;havoc ldv_initialize_driver_info_3_~tmp___1~8#1.base, ldv_initialize_driver_info_3_~tmp___1~8#1.offset; {101375#(= ~ldv_state_variable_3~0 1)} is VALID [2022-02-20 21:52:26,163 INFO L272 TraceCheckUtils]: 64: Hoare triple {101375#(= ~ldv_state_variable_3~0 1)} call ldv_initialize_driver_info_3_#t~ret283#1.base, ldv_initialize_driver_info_3_#t~ret283#1.offset := ldv_zalloc(1384); {101394#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:26,163 INFO L290 TraceCheckUtils]: 65: Hoare triple {101394#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet28#1 && #t~nondet28#1 <= 2147483647;~tmp___0~1#1 := #t~nondet28#1;havoc #t~nondet28#1; {101341#true} is VALID [2022-02-20 21:52:26,163 INFO L290 TraceCheckUtils]: 66: Hoare triple {101341#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {101341#true} is VALID [2022-02-20 21:52:26,163 INFO L290 TraceCheckUtils]: 67: Hoare triple {101341#true} assume true; {101341#true} is VALID [2022-02-20 21:52:26,164 INFO L284 TraceCheckUtils]: 68: Hoare quadruple {101341#true} {101375#(= ~ldv_state_variable_3~0 1)} #1442#return; {101375#(= ~ldv_state_variable_3~0 1)} is VALID [2022-02-20 21:52:26,164 INFO L290 TraceCheckUtils]: 69: Hoare triple {101375#(= ~ldv_state_variable_3~0 1)} ldv_initialize_driver_info_3_~tmp~25#1.base, ldv_initialize_driver_info_3_~tmp~25#1.offset := ldv_initialize_driver_info_3_#t~ret283#1.base, ldv_initialize_driver_info_3_#t~ret283#1.offset;havoc ldv_initialize_driver_info_3_#t~ret283#1.base, ldv_initialize_driver_info_3_#t~ret283#1.offset;~cdc_mbim_info_group0~0.base, ~cdc_mbim_info_group0~0.offset := ldv_initialize_driver_info_3_~tmp~25#1.base, ldv_initialize_driver_info_3_~tmp~25#1.offset; {101375#(= ~ldv_state_variable_3~0 1)} is VALID [2022-02-20 21:52:26,164 INFO L272 TraceCheckUtils]: 70: Hoare triple {101375#(= ~ldv_state_variable_3~0 1)} call ldv_initialize_driver_info_3_#t~ret284#1.base, ldv_initialize_driver_info_3_#t~ret284#1.offset := ldv_zalloc(1520); {101394#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:26,165 INFO L290 TraceCheckUtils]: 71: Hoare triple {101394#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet28#1 && #t~nondet28#1 <= 2147483647;~tmp___0~1#1 := #t~nondet28#1;havoc #t~nondet28#1; {101341#true} is VALID [2022-02-20 21:52:26,165 INFO L290 TraceCheckUtils]: 72: Hoare triple {101341#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {101341#true} is VALID [2022-02-20 21:52:26,165 INFO L290 TraceCheckUtils]: 73: Hoare triple {101341#true} assume true; {101341#true} is VALID [2022-02-20 21:52:26,165 INFO L284 TraceCheckUtils]: 74: Hoare quadruple {101341#true} {101375#(= ~ldv_state_variable_3~0 1)} #1444#return; {101375#(= ~ldv_state_variable_3~0 1)} is VALID [2022-02-20 21:52:26,166 INFO L290 TraceCheckUtils]: 75: Hoare triple {101375#(= ~ldv_state_variable_3~0 1)} ldv_initialize_driver_info_3_~tmp___0~13#1.base, ldv_initialize_driver_info_3_~tmp___0~13#1.offset := ldv_initialize_driver_info_3_#t~ret284#1.base, ldv_initialize_driver_info_3_#t~ret284#1.offset;havoc ldv_initialize_driver_info_3_#t~ret284#1.base, ldv_initialize_driver_info_3_#t~ret284#1.offset;~cdc_mbim_info_group1~0.base, ~cdc_mbim_info_group1~0.offset := ldv_initialize_driver_info_3_~tmp___0~13#1.base, ldv_initialize_driver_info_3_~tmp___0~13#1.offset; {101375#(= ~ldv_state_variable_3~0 1)} is VALID [2022-02-20 21:52:26,166 INFO L272 TraceCheckUtils]: 76: Hoare triple {101375#(= ~ldv_state_variable_3~0 1)} call ldv_initialize_driver_info_3_#t~ret285#1.base, ldv_initialize_driver_info_3_#t~ret285#1.offset := ldv_zalloc(240); {101394#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:26,166 INFO L290 TraceCheckUtils]: 77: Hoare triple {101394#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~2#1.base, ~tmp~2#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet28#1 && #t~nondet28#1 <= 2147483647;~tmp___0~1#1 := #t~nondet28#1;havoc #t~nondet28#1; {101341#true} is VALID [2022-02-20 21:52:26,166 INFO L290 TraceCheckUtils]: 78: Hoare triple {101341#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {101341#true} is VALID [2022-02-20 21:52:26,166 INFO L290 TraceCheckUtils]: 79: Hoare triple {101341#true} assume true; {101341#true} is VALID [2022-02-20 21:52:26,167 INFO L284 TraceCheckUtils]: 80: Hoare quadruple {101341#true} {101375#(= ~ldv_state_variable_3~0 1)} #1446#return; {101375#(= ~ldv_state_variable_3~0 1)} is VALID [2022-02-20 21:52:26,167 INFO L290 TraceCheckUtils]: 81: Hoare triple {101375#(= ~ldv_state_variable_3~0 1)} ldv_initialize_driver_info_3_~tmp___1~8#1.base, ldv_initialize_driver_info_3_~tmp___1~8#1.offset := ldv_initialize_driver_info_3_#t~ret285#1.base, ldv_initialize_driver_info_3_#t~ret285#1.offset;havoc ldv_initialize_driver_info_3_#t~ret285#1.base, ldv_initialize_driver_info_3_#t~ret285#1.offset;~cdc_mbim_info_group2~0.base, ~cdc_mbim_info_group2~0.offset := ldv_initialize_driver_info_3_~tmp___1~8#1.base, ldv_initialize_driver_info_3_~tmp___1~8#1.offset; {101375#(= ~ldv_state_variable_3~0 1)} is VALID [2022-02-20 21:52:26,167 INFO L290 TraceCheckUtils]: 82: Hoare triple {101375#(= ~ldv_state_variable_3~0 1)} assume { :end_inline_ldv_initialize_driver_info_3 } true; {101375#(= ~ldv_state_variable_3~0 1)} is VALID [2022-02-20 21:52:26,168 INFO L290 TraceCheckUtils]: 83: Hoare triple {101375#(= ~ldv_state_variable_3~0 1)} assume !(0 != ~ldv_retval_4~0); {101375#(= ~ldv_state_variable_3~0 1)} is VALID [2022-02-20 21:52:26,168 INFO L290 TraceCheckUtils]: 84: Hoare triple {101375#(= ~ldv_state_variable_3~0 1)} assume -2147483648 <= main_#t~nondet293#1 && main_#t~nondet293#1 <= 2147483647;main_~tmp___2~3#1 := main_#t~nondet293#1;havoc main_#t~nondet293#1;main_#t~switch294#1 := 0 == main_~tmp___2~3#1; {101375#(= ~ldv_state_variable_3~0 1)} is VALID [2022-02-20 21:52:26,168 INFO L290 TraceCheckUtils]: 85: Hoare triple {101375#(= ~ldv_state_variable_3~0 1)} assume !main_#t~switch294#1;main_#t~switch294#1 := main_#t~switch294#1 || 1 == main_~tmp___2~3#1; {101375#(= ~ldv_state_variable_3~0 1)} is VALID [2022-02-20 21:52:26,168 INFO L290 TraceCheckUtils]: 86: Hoare triple {101375#(= ~ldv_state_variable_3~0 1)} assume !main_#t~switch294#1;main_#t~switch294#1 := main_#t~switch294#1 || 2 == main_~tmp___2~3#1; {101375#(= ~ldv_state_variable_3~0 1)} is VALID [2022-02-20 21:52:26,169 INFO L290 TraceCheckUtils]: 87: Hoare triple {101375#(= ~ldv_state_variable_3~0 1)} assume main_#t~switch294#1; {101375#(= ~ldv_state_variable_3~0 1)} is VALID [2022-02-20 21:52:26,169 INFO L290 TraceCheckUtils]: 88: Hoare triple {101375#(= ~ldv_state_variable_3~0 1)} assume 0 != ~ldv_state_variable_3~0;assume -2147483648 <= main_#t~nondet305#1 && main_#t~nondet305#1 <= 2147483647;main_~tmp___5~0#1 := main_#t~nondet305#1;havoc main_#t~nondet305#1;main_#t~switch306#1 := 0 == main_~tmp___5~0#1; {101375#(= ~ldv_state_variable_3~0 1)} is VALID [2022-02-20 21:52:26,169 INFO L290 TraceCheckUtils]: 89: Hoare triple {101375#(= ~ldv_state_variable_3~0 1)} assume !main_#t~switch306#1;main_#t~switch306#1 := main_#t~switch306#1 || 1 == main_~tmp___5~0#1; {101375#(= ~ldv_state_variable_3~0 1)} is VALID [2022-02-20 21:52:26,169 INFO L290 TraceCheckUtils]: 90: Hoare triple {101375#(= ~ldv_state_variable_3~0 1)} assume !main_#t~switch306#1;main_#t~switch306#1 := main_#t~switch306#1 || 2 == main_~tmp___5~0#1; {101375#(= ~ldv_state_variable_3~0 1)} is VALID [2022-02-20 21:52:26,170 INFO L290 TraceCheckUtils]: 91: Hoare triple {101375#(= ~ldv_state_variable_3~0 1)} assume !main_#t~switch306#1;main_#t~switch306#1 := main_#t~switch306#1 || 3 == main_~tmp___5~0#1; {101375#(= ~ldv_state_variable_3~0 1)} is VALID [2022-02-20 21:52:26,170 INFO L290 TraceCheckUtils]: 92: Hoare triple {101375#(= ~ldv_state_variable_3~0 1)} assume !main_#t~switch306#1;main_#t~switch306#1 := main_#t~switch306#1 || 4 == main_~tmp___5~0#1; {101375#(= ~ldv_state_variable_3~0 1)} is VALID [2022-02-20 21:52:26,170 INFO L290 TraceCheckUtils]: 93: Hoare triple {101375#(= ~ldv_state_variable_3~0 1)} assume main_#t~switch306#1; {101375#(= ~ldv_state_variable_3~0 1)} is VALID [2022-02-20 21:52:26,171 INFO L290 TraceCheckUtils]: 94: Hoare triple {101375#(= ~ldv_state_variable_3~0 1)} assume !(1 == ~ldv_state_variable_3~0); {101342#false} is VALID [2022-02-20 21:52:26,171 INFO L290 TraceCheckUtils]: 95: Hoare triple {101342#false} assume 2 == ~ldv_state_variable_3~0; {101342#false} is VALID [2022-02-20 21:52:26,171 INFO L272 TraceCheckUtils]: 96: Hoare triple {101342#false} call main_#t~ret315#1 := cdc_mbim_manage_power(~cdc_mbim_info_group0~0.base, ~cdc_mbim_info_group0~0.offset, main_~ldvarg2~0#1); {101342#false} is VALID [2022-02-20 21:52:26,171 INFO L290 TraceCheckUtils]: 97: Hoare triple {101342#false} ~dev#1.base, ~dev#1.offset := #in~dev#1.base, #in~dev#1.offset;~on#1 := #in~on#1;havoc ~info~0#1.base, ~info~0#1.offset;havoc ~rv~0#1;call ~#descriptor~0#1.base, ~#descriptor~0#1.offset := #Ultimate.allocOnStack(37);havoc ~tmp~15#1;havoc ~tmp___0~7#1;havoc ~tmp___1~3#1;havoc ~tmp___2~0#1;~info~0#1.base, ~info~0#1.offset := ~dev#1.base, 368 + ~dev#1.offset;~rv~0#1 := 0;call write~$Pointer$(3, 0, ~#descriptor~0#1.base, ~#descriptor~0#1.offset, 8);call write~$Pointer$(4, 0, ~#descriptor~0#1.base, 8 + ~#descriptor~0#1.offset, 8);call write~$Pointer$(5, 0, ~#descriptor~0#1.base, 16 + ~#descriptor~0#1.offset, 8);call write~$Pointer$(6, 0, ~#descriptor~0#1.base, 24 + ~#descriptor~0#1.offset, 8);call write~int(88, ~#descriptor~0#1.base, 32 + ~#descriptor~0#1.offset, 4);call write~int(0, ~#descriptor~0#1.base, 36 + ~#descriptor~0#1.offset, 1);call #t~mem122#1 := read~int(~#descriptor~0#1.base, 36 + ~#descriptor~0#1.offset, 1); {101342#false} is VALID [2022-02-20 21:52:26,171 INFO L272 TraceCheckUtils]: 98: Hoare triple {101342#false} call #t~ret123#1 := ldv__builtin_expect(#t~mem122#1 % 256, 0); {101341#true} is VALID [2022-02-20 21:52:26,171 INFO L290 TraceCheckUtils]: 99: Hoare triple {101341#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {101341#true} is VALID [2022-02-20 21:52:26,171 INFO L290 TraceCheckUtils]: 100: Hoare triple {101341#true} assume true; {101341#true} is VALID [2022-02-20 21:52:26,171 INFO L284 TraceCheckUtils]: 101: Hoare quadruple {101341#true} {101342#false} #1376#return; {101342#false} is VALID [2022-02-20 21:52:26,172 INFO L290 TraceCheckUtils]: 102: Hoare triple {101342#false} assume -9223372036854775808 <= #t~ret123#1 && #t~ret123#1 <= 9223372036854775807;~tmp___0~7#1 := #t~ret123#1;havoc #t~mem122#1;havoc #t~ret123#1; {101342#false} is VALID [2022-02-20 21:52:26,172 INFO L290 TraceCheckUtils]: 103: Hoare triple {101342#false} assume !(0 != ~tmp___0~7#1); {101342#false} is VALID [2022-02-20 21:52:26,172 INFO L290 TraceCheckUtils]: 104: Hoare triple {101342#false} assume !(0 != ~on#1); {101342#false} is VALID [2022-02-20 21:52:26,172 INFO L290 TraceCheckUtils]: 105: Hoare triple {101342#false} assume 0 == ~on#1;assume { :begin_inline_atomic_dec_and_test } true;atomic_dec_and_test_#in~v#1.base, atomic_dec_and_test_#in~v#1.offset := ~info~0#1.base, 8 + ~info~0#1.offset;havoc atomic_dec_and_test_#res#1;havoc atomic_dec_and_test_~v#1.base, atomic_dec_and_test_~v#1.offset, atomic_dec_and_test_~c~0#1;atomic_dec_and_test_~v#1.base, atomic_dec_and_test_~v#1.offset := atomic_dec_and_test_#in~v#1.base, atomic_dec_and_test_#in~v#1.offset;havoc atomic_dec_and_test_~c~0#1;atomic_dec_and_test_#res#1 := (if 0 != atomic_dec_and_test_~c~0#1 % 256 % 4294967296 then 1 else 0); {101342#false} is VALID [2022-02-20 21:52:26,172 INFO L290 TraceCheckUtils]: 106: Hoare triple {101342#false} #t~ret128#1 := atomic_dec_and_test_#res#1;assume { :end_inline_atomic_dec_and_test } true;assume -2147483648 <= #t~ret128#1 && #t~ret128#1 <= 2147483647;~tmp___2~0#1 := #t~ret128#1;havoc #t~ret128#1; {101342#false} is VALID [2022-02-20 21:52:26,172 INFO L290 TraceCheckUtils]: 107: Hoare triple {101342#false} assume 0 != ~tmp___2~0#1; {101342#false} is VALID [2022-02-20 21:52:26,172 INFO L290 TraceCheckUtils]: 108: Hoare triple {101342#false} call #t~mem129#1.base, #t~mem129#1.offset := read~$Pointer$(~dev#1.base, 8 + ~dev#1.offset, 8);assume { :begin_inline_ldv_usb_autopm_get_interface_2 } true;ldv_usb_autopm_get_interface_2_#in~ldv_func_arg1#1.base, ldv_usb_autopm_get_interface_2_#in~ldv_func_arg1#1.offset := #t~mem129#1.base, #t~mem129#1.offset;havoc ldv_usb_autopm_get_interface_2_#res#1;havoc ldv_usb_autopm_get_interface_2_#t~ret327#1, ldv_usb_autopm_get_interface_2_~ldv_func_arg1#1.base, ldv_usb_autopm_get_interface_2_~ldv_func_arg1#1.offset, ldv_usb_autopm_get_interface_2_~tmp~28#1;ldv_usb_autopm_get_interface_2_~ldv_func_arg1#1.base, ldv_usb_autopm_get_interface_2_~ldv_func_arg1#1.offset := ldv_usb_autopm_get_interface_2_#in~ldv_func_arg1#1.base, ldv_usb_autopm_get_interface_2_#in~ldv_func_arg1#1.offset;havoc ldv_usb_autopm_get_interface_2_~tmp~28#1;assume { :begin_inline_ldv_get_interface } true;ldv_get_interface_#in~intf#1.base, ldv_get_interface_#in~intf#1.offset := ldv_usb_autopm_get_interface_2_~ldv_func_arg1#1.base, ldv_usb_autopm_get_interface_2_~ldv_func_arg1#1.offset;havoc ldv_get_interface_#res#1;havoc ldv_get_interface_#t~ret337#1, ldv_get_interface_~intf#1.base, ldv_get_interface_~intf#1.offset, ldv_get_interface_~res~1#1, ldv_get_interface_~tmp~35#1;ldv_get_interface_~intf#1.base, ldv_get_interface_~intf#1.offset := ldv_get_interface_#in~intf#1.base, ldv_get_interface_#in~intf#1.offset;havoc ldv_get_interface_~res~1#1;havoc ldv_get_interface_~tmp~35#1; {101342#false} is VALID [2022-02-20 21:52:26,172 INFO L272 TraceCheckUtils]: 109: Hoare triple {101342#false} call ldv_get_interface_#t~ret337#1 := ldv_undef_int(); {101341#true} is VALID [2022-02-20 21:52:26,172 INFO L290 TraceCheckUtils]: 110: Hoare triple {101341#true} havoc ~tmp~3;assume -2147483648 <= #t~nondet31 && #t~nondet31 <= 2147483647;~tmp~3 := #t~nondet31;havoc #t~nondet31;#res := ~tmp~3; {101341#true} is VALID [2022-02-20 21:52:26,173 INFO L290 TraceCheckUtils]: 111: Hoare triple {101341#true} assume true; {101341#true} is VALID [2022-02-20 21:52:26,173 INFO L284 TraceCheckUtils]: 112: Hoare quadruple {101341#true} {101342#false} #1380#return; {101342#false} is VALID [2022-02-20 21:52:26,173 INFO L290 TraceCheckUtils]: 113: Hoare triple {101342#false} assume -2147483648 <= ldv_get_interface_#t~ret337#1 && ldv_get_interface_#t~ret337#1 <= 2147483647;ldv_get_interface_~tmp~35#1 := ldv_get_interface_#t~ret337#1;havoc ldv_get_interface_#t~ret337#1;ldv_get_interface_~res~1#1 := ldv_get_interface_~tmp~35#1; {101342#false} is VALID [2022-02-20 21:52:26,173 INFO L290 TraceCheckUtils]: 114: Hoare triple {101342#false} assume ldv_get_interface_~res~1#1 <= 0; {101342#false} is VALID [2022-02-20 21:52:26,173 INFO L290 TraceCheckUtils]: 115: Hoare triple {101342#false} assume 0 == ldv_get_interface_~res~1#1;~INTERF_STATE~0 := 1 + ~INTERF_STATE~0; {101342#false} is VALID [2022-02-20 21:52:26,173 INFO L290 TraceCheckUtils]: 116: Hoare triple {101342#false} ldv_get_interface_#res#1 := ldv_get_interface_~res~1#1; {101342#false} is VALID [2022-02-20 21:52:26,173 INFO L290 TraceCheckUtils]: 117: Hoare triple {101342#false} ldv_usb_autopm_get_interface_2_#t~ret327#1 := ldv_get_interface_#res#1;assume { :end_inline_ldv_get_interface } true;assume -2147483648 <= ldv_usb_autopm_get_interface_2_#t~ret327#1 && ldv_usb_autopm_get_interface_2_#t~ret327#1 <= 2147483647;ldv_usb_autopm_get_interface_2_~tmp~28#1 := ldv_usb_autopm_get_interface_2_#t~ret327#1;havoc ldv_usb_autopm_get_interface_2_#t~ret327#1;ldv_usb_autopm_get_interface_2_#res#1 := ldv_usb_autopm_get_interface_2_~tmp~28#1; {101342#false} is VALID [2022-02-20 21:52:26,173 INFO L290 TraceCheckUtils]: 118: Hoare triple {101342#false} #t~ret130#1 := ldv_usb_autopm_get_interface_2_#res#1;assume { :end_inline_ldv_usb_autopm_get_interface_2 } true;assume -2147483648 <= #t~ret130#1 && #t~ret130#1 <= 2147483647;~rv~0#1 := #t~ret130#1;havoc #t~mem129#1.base, #t~mem129#1.offset;havoc #t~ret130#1; {101342#false} is VALID [2022-02-20 21:52:26,174 INFO L290 TraceCheckUtils]: 119: Hoare triple {101342#false} assume !(~rv~0#1 < 0);call #t~mem131#1.base, #t~mem131#1.offset := read~$Pointer$(~dev#1.base, 8 + ~dev#1.offset, 8);call write~int(~on#1 % 2, #t~mem131#1.base, 39 + #t~mem131#1.offset, 1);havoc #t~mem131#1.base, #t~mem131#1.offset;call #t~mem132#1.base, #t~mem132#1.offset := read~$Pointer$(~dev#1.base, 8 + ~dev#1.offset, 8);assume { :begin_inline_ldv_usb_autopm_put_interface_3 } true;ldv_usb_autopm_put_interface_3_#in~ldv_func_arg1#1.base, ldv_usb_autopm_put_interface_3_#in~ldv_func_arg1#1.offset := #t~mem132#1.base, #t~mem132#1.offset;havoc ldv_usb_autopm_put_interface_3_~ldv_func_arg1#1.base, ldv_usb_autopm_put_interface_3_~ldv_func_arg1#1.offset;ldv_usb_autopm_put_interface_3_~ldv_func_arg1#1.base, ldv_usb_autopm_put_interface_3_~ldv_func_arg1#1.offset := ldv_usb_autopm_put_interface_3_#in~ldv_func_arg1#1.base, ldv_usb_autopm_put_interface_3_#in~ldv_func_arg1#1.offset;assume { :begin_inline_ldv_put_interface } true; {101342#false} is VALID [2022-02-20 21:52:26,174 INFO L290 TraceCheckUtils]: 120: Hoare triple {101342#false} assume !(~INTERF_STATE~0 > 0); {101342#false} is VALID [2022-02-20 21:52:26,174 INFO L272 TraceCheckUtils]: 121: Hoare triple {101342#false} call ldv_error(); {101342#false} is VALID [2022-02-20 21:52:26,174 INFO L290 TraceCheckUtils]: 122: Hoare triple {101342#false} assume !false; {101342#false} is VALID [2022-02-20 21:52:26,174 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 124 trivial. 0 not checked. [2022-02-20 21:52:26,175 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:52:26,175 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1294090864] [2022-02-20 21:52:26,175 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1294090864] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:52:26,175 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:52:26,175 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-02-20 21:52:26,175 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1868852967] [2022-02-20 21:52:26,175 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:52:26,176 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 13.6) internal successors, (68), 3 states have internal predecessors, (68), 3 states have call successors, (15), 4 states have call predecessors, (15), 1 states have return successors, (13), 3 states have call predecessors, (13), 3 states have call successors, (13) Word has length 123 [2022-02-20 21:52:26,176 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:52:26,176 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 13.6) internal successors, (68), 3 states have internal predecessors, (68), 3 states have call successors, (15), 4 states have call predecessors, (15), 1 states have return successors, (13), 3 states have call predecessors, (13), 3 states have call successors, (13) [2022-02-20 21:52:26,243 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 96 edges. 96 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:52:26,243 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-02-20 21:52:26,243 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:52:26,244 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-02-20 21:52:26,244 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-02-20 21:52:26,244 INFO L87 Difference]: Start difference. First operand 5818 states and 8111 transitions. Second operand has 5 states, 5 states have (on average 13.6) internal successors, (68), 3 states have internal predecessors, (68), 3 states have call successors, (15), 4 states have call predecessors, (15), 1 states have return successors, (13), 3 states have call predecessors, (13), 3 states have call successors, (13)