./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/ldv-linux-3.12-rc1/linux-3.12-rc1.tar.xz-144_2a-drivers--net--usb--ipheth.ko-entry_point.cil.out.i --full-output -ea --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 03d7b7b3 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -ea -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/ldv-linux-3.12-rc1/linux-3.12-rc1.tar.xz-144_2a-drivers--net--usb--ipheth.ko-entry_point.cil.out.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 1a07d05bdda9164d6ceaf1185c6dc5dd43200f7171a99953930c3f9edfac2ac7 --- Real Ultimate output --- This is Ultimate 0.2.2-dev-03d7b7b [2022-02-20 21:51:32,298 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-02-20 21:51:32,300 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-02-20 21:51:32,340 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-02-20 21:51:32,340 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-02-20 21:51:32,345 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-02-20 21:51:32,347 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-02-20 21:51:32,349 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-02-20 21:51:32,351 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-02-20 21:51:32,351 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-02-20 21:51:32,352 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-02-20 21:51:32,353 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-02-20 21:51:32,353 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-02-20 21:51:32,354 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-02-20 21:51:32,354 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-02-20 21:51:32,355 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-02-20 21:51:32,356 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-02-20 21:51:32,356 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-02-20 21:51:32,357 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-02-20 21:51:32,359 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-02-20 21:51:32,360 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-02-20 21:51:32,361 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-02-20 21:51:32,361 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-02-20 21:51:32,362 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-02-20 21:51:32,364 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-02-20 21:51:32,364 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-02-20 21:51:32,365 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-02-20 21:51:32,365 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-02-20 21:51:32,365 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-02-20 21:51:32,366 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-02-20 21:51:32,367 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-02-20 21:51:32,368 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-02-20 21:51:32,369 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-02-20 21:51:32,370 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-02-20 21:51:32,371 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-02-20 21:51:32,371 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-02-20 21:51:32,372 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-02-20 21:51:32,372 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-02-20 21:51:32,372 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-02-20 21:51:32,373 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-02-20 21:51:32,373 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-02-20 21:51:32,374 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2022-02-20 21:51:32,401 INFO L113 SettingsManager]: Loading preferences was successful [2022-02-20 21:51:32,404 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-02-20 21:51:32,404 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-02-20 21:51:32,405 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-02-20 21:51:32,405 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-02-20 21:51:32,405 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-02-20 21:51:32,406 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-02-20 21:51:32,406 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-02-20 21:51:32,406 INFO L138 SettingsManager]: * Use SBE=true [2022-02-20 21:51:32,406 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-02-20 21:51:32,407 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-02-20 21:51:32,407 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-02-20 21:51:32,407 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-02-20 21:51:32,407 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-02-20 21:51:32,407 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-02-20 21:51:32,408 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-02-20 21:51:32,408 INFO L138 SettingsManager]: * Use constant arrays=true [2022-02-20 21:51:32,408 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-02-20 21:51:32,408 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-02-20 21:51:32,408 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-02-20 21:51:32,408 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-02-20 21:51:32,408 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-02-20 21:51:32,409 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-02-20 21:51:32,409 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-02-20 21:51:32,409 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-02-20 21:51:32,409 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-02-20 21:51:32,409 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-02-20 21:51:32,410 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2022-02-20 21:51:32,410 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2022-02-20 21:51:32,410 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-02-20 21:51:32,410 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 1a07d05bdda9164d6ceaf1185c6dc5dd43200f7171a99953930c3f9edfac2ac7 [2022-02-20 21:51:32,592 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-02-20 21:51:32,607 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-02-20 21:51:32,611 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-02-20 21:51:32,615 INFO L271 PluginConnector]: Initializing CDTParser... [2022-02-20 21:51:32,616 INFO L275 PluginConnector]: CDTParser initialized [2022-02-20 21:51:32,617 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/ldv-linux-3.12-rc1/linux-3.12-rc1.tar.xz-144_2a-drivers--net--usb--ipheth.ko-entry_point.cil.out.i [2022-02-20 21:51:32,674 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/64c53def3/c0833be92c304c05bdbec1c53c482667/FLAGb5bfa719d [2022-02-20 21:51:33,315 INFO L306 CDTParser]: Found 1 translation units. [2022-02-20 21:51:33,316 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.12-rc1/linux-3.12-rc1.tar.xz-144_2a-drivers--net--usb--ipheth.ko-entry_point.cil.out.i [2022-02-20 21:51:33,343 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/64c53def3/c0833be92c304c05bdbec1c53c482667/FLAGb5bfa719d [2022-02-20 21:51:33,478 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/64c53def3/c0833be92c304c05bdbec1c53c482667 [2022-02-20 21:51:33,480 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-02-20 21:51:33,481 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-02-20 21:51:33,490 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-02-20 21:51:33,490 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-02-20 21:51:33,493 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-02-20 21:51:33,494 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.02 09:51:33" (1/1) ... [2022-02-20 21:51:33,495 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@52d6d72c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:51:33, skipping insertion in model container [2022-02-20 21:51:33,496 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.02 09:51:33" (1/1) ... [2022-02-20 21:51:33,500 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-02-20 21:51:33,563 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-02-20 21:51:34,075 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.12-rc1/linux-3.12-rc1.tar.xz-144_2a-drivers--net--usb--ipheth.ko-entry_point.cil.out.i[159689,159702] [2022-02-20 21:51:34,309 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-20 21:51:34,339 INFO L203 MainTranslator]: Completed pre-run [2022-02-20 21:51:34,442 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.12-rc1/linux-3.12-rc1.tar.xz-144_2a-drivers--net--usb--ipheth.ko-entry_point.cil.out.i[159689,159702] [2022-02-20 21:51:34,529 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-20 21:51:34,589 INFO L208 MainTranslator]: Completed translation [2022-02-20 21:51:34,589 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:51:34 WrapperNode [2022-02-20 21:51:34,590 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-02-20 21:51:34,591 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-02-20 21:51:34,592 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-02-20 21:51:34,592 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-02-20 21:51:34,596 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:51:34" (1/1) ... [2022-02-20 21:51:34,634 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:51:34" (1/1) ... [2022-02-20 21:51:34,712 INFO L137 Inliner]: procedures = 165, calls = 691, calls flagged for inlining = 83, calls inlined = 83, statements flattened = 1770 [2022-02-20 21:51:34,713 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-02-20 21:51:34,714 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-02-20 21:51:34,714 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-02-20 21:51:34,714 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-02-20 21:51:34,720 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:51:34" (1/1) ... [2022-02-20 21:51:34,720 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:51:34" (1/1) ... [2022-02-20 21:51:34,742 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:51:34" (1/1) ... [2022-02-20 21:51:34,742 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:51:34" (1/1) ... [2022-02-20 21:51:34,821 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:51:34" (1/1) ... [2022-02-20 21:51:34,836 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:51:34" (1/1) ... [2022-02-20 21:51:34,847 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:51:34" (1/1) ... [2022-02-20 21:51:34,861 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-02-20 21:51:34,862 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-02-20 21:51:34,863 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-02-20 21:51:34,863 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-02-20 21:51:34,864 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:51:34" (1/1) ... [2022-02-20 21:51:34,870 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-02-20 21:51:34,877 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-20 21:51:34,890 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-02-20 21:51:34,892 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-02-20 21:51:34,930 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_set_intfdata_12 [2022-02-20 21:51:34,931 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_set_intfdata_12 [2022-02-20 21:51:34,931 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2022-02-20 21:51:34,931 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_fill_bulk_urb_8 [2022-02-20 21:51:34,931 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_fill_bulk_urb_8 [2022-02-20 21:51:34,931 INFO L130 BoogieDeclarations]: Found specification of procedure ipheth_rx_submit [2022-02-20 21:51:34,931 INFO L138 BoogieDeclarations]: Found implementation of procedure ipheth_rx_submit [2022-02-20 21:51:34,931 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_submit_urb_9 [2022-02-20 21:51:34,932 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_submit_urb_9 [2022-02-20 21:51:34,932 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2022-02-20 21:51:34,932 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2022-02-20 21:51:34,932 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_stop [2022-02-20 21:51:34,932 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_stop [2022-02-20 21:51:34,932 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-02-20 21:51:34,933 INFO L130 BoogieDeclarations]: Found specification of procedure netif_tx_start_queue [2022-02-20 21:51:34,933 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_tx_start_queue [2022-02-20 21:51:34,933 INFO L130 BoogieDeclarations]: Found specification of procedure usb_endpoint_xfer_bulk [2022-02-20 21:51:34,933 INFO L138 BoogieDeclarations]: Found implementation of procedure usb_endpoint_xfer_bulk [2022-02-20 21:51:34,933 INFO L130 BoogieDeclarations]: Found specification of procedure ipheth_rcvbulk_callback [2022-02-20 21:51:34,933 INFO L138 BoogieDeclarations]: Found implementation of procedure ipheth_rcvbulk_callback [2022-02-20 21:51:34,933 INFO L130 BoogieDeclarations]: Found specification of procedure free_netdev [2022-02-20 21:51:34,934 INFO L138 BoogieDeclarations]: Found implementation of procedure free_netdev [2022-02-20 21:51:34,934 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_submit_urb [2022-02-20 21:51:34,934 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_submit_urb [2022-02-20 21:51:34,934 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2022-02-20 21:51:34,934 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2022-02-20 21:51:34,934 INFO L130 BoogieDeclarations]: Found specification of procedure __create_pipe [2022-02-20 21:51:34,934 INFO L138 BoogieDeclarations]: Found implementation of procedure __create_pipe [2022-02-20 21:51:34,934 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2022-02-20 21:51:34,935 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2022-02-20 21:51:34,935 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_alloc_urb [2022-02-20 21:51:34,935 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_alloc_urb [2022-02-20 21:51:34,935 INFO L130 BoogieDeclarations]: Found specification of procedure usb_kill_urb [2022-02-20 21:51:34,935 INFO L138 BoogieDeclarations]: Found implementation of procedure usb_kill_urb [2022-02-20 21:51:34,935 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2022-02-20 21:51:34,935 INFO L138 BoogieDeclarations]: Found implementation of procedure kfree [2022-02-20 21:51:34,936 INFO L130 BoogieDeclarations]: Found specification of procedure ipheth_disconnect [2022-02-20 21:51:34,936 INFO L138 BoogieDeclarations]: Found implementation of procedure ipheth_disconnect [2022-02-20 21:51:34,936 INFO L130 BoogieDeclarations]: Found specification of procedure ipheth_tx_timeout [2022-02-20 21:51:34,936 INFO L138 BoogieDeclarations]: Found implementation of procedure ipheth_tx_timeout [2022-02-20 21:51:34,936 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-02-20 21:51:34,936 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_error [2022-02-20 21:51:34,937 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_error [2022-02-20 21:51:34,937 INFO L130 BoogieDeclarations]: Found specification of procedure ldv__builtin_expect [2022-02-20 21:51:34,937 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv__builtin_expect [2022-02-20 21:51:34,937 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2022-02-20 21:51:34,937 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2022-02-20 21:51:34,937 INFO L130 BoogieDeclarations]: Found specification of procedure ipheth_carrier_set [2022-02-20 21:51:34,938 INFO L138 BoogieDeclarations]: Found implementation of procedure ipheth_carrier_set [2022-02-20 21:51:34,938 INFO L130 BoogieDeclarations]: Found specification of procedure netif_stop_queue [2022-02-20 21:51:34,938 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_stop_queue [2022-02-20 21:51:34,938 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-02-20 21:51:34,938 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_stop___0 [2022-02-20 21:51:34,938 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_stop___0 [2022-02-20 21:51:34,938 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-02-20 21:51:34,938 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_undef_int [2022-02-20 21:51:34,939 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_undef_int [2022-02-20 21:51:34,939 INFO L130 BoogieDeclarations]: Found specification of procedure ipheth_free_urbs [2022-02-20 21:51:34,940 INFO L138 BoogieDeclarations]: Found implementation of procedure ipheth_free_urbs [2022-02-20 21:51:34,940 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-02-20 21:51:34,940 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-02-20 21:51:34,941 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2022-02-20 21:51:34,941 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2022-02-20 21:51:34,941 INFO L130 BoogieDeclarations]: Found specification of procedure usb_free_coherent [2022-02-20 21:51:34,941 INFO L138 BoogieDeclarations]: Found implementation of procedure usb_free_coherent [2022-02-20 21:51:34,941 INFO L130 BoogieDeclarations]: Found specification of procedure usb_alloc_coherent [2022-02-20 21:51:34,941 INFO L138 BoogieDeclarations]: Found implementation of procedure usb_alloc_coherent [2022-02-20 21:51:34,941 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-02-20 21:51:34,941 INFO L130 BoogieDeclarations]: Found specification of procedure usb_control_msg [2022-02-20 21:51:34,942 INFO L138 BoogieDeclarations]: Found implementation of procedure usb_control_msg [2022-02-20 21:51:34,942 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-02-20 21:51:34,942 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2022-02-20 21:51:34,942 INFO L130 BoogieDeclarations]: Found specification of procedure schedule_delayed_work [2022-02-20 21:51:34,943 INFO L138 BoogieDeclarations]: Found implementation of procedure schedule_delayed_work [2022-02-20 21:51:34,943 INFO L130 BoogieDeclarations]: Found specification of procedure netdev_priv [2022-02-20 21:51:34,943 INFO L138 BoogieDeclarations]: Found implementation of procedure netdev_priv [2022-02-20 21:51:34,943 INFO L130 BoogieDeclarations]: Found specification of procedure netdev_get_tx_queue [2022-02-20 21:51:34,943 INFO L138 BoogieDeclarations]: Found implementation of procedure netdev_get_tx_queue [2022-02-20 21:51:34,943 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_free_urb [2022-02-20 21:51:34,943 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_free_urb [2022-02-20 21:51:34,943 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-02-20 21:51:34,944 INFO L130 BoogieDeclarations]: Found specification of procedure round_jiffies_relative [2022-02-20 21:51:34,944 INFO L138 BoogieDeclarations]: Found implementation of procedure round_jiffies_relative [2022-02-20 21:51:34,944 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~int [2022-02-20 21:51:34,944 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2022-02-20 21:51:34,944 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2022-02-20 21:51:34,944 INFO L130 BoogieDeclarations]: Found specification of procedure dev_kfree_skb_irq [2022-02-20 21:51:34,944 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_kfree_skb_irq [2022-02-20 21:51:34,944 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-02-20 21:51:34,945 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-02-20 21:51:35,356 INFO L234 CfgBuilder]: Building ICFG [2022-02-20 21:51:35,357 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-02-20 21:51:35,573 INFO L766 $ProcedureCfgBuilder]: dead code at ProgramPoint ldv_stopFINAL: assume true; [2022-02-20 21:51:36,029 INFO L766 $ProcedureCfgBuilder]: dead code at ProgramPoint ldv_stop___0FINAL: assume true; [2022-02-20 21:51:36,648 INFO L275 CfgBuilder]: Performing block encoding [2022-02-20 21:51:36,658 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-02-20 21:51:36,658 INFO L299 CfgBuilder]: Removed 1 assume(true) statements. [2022-02-20 21:51:36,659 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 09:51:36 BoogieIcfgContainer [2022-02-20 21:51:36,659 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-02-20 21:51:36,661 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-02-20 21:51:36,661 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-02-20 21:51:36,663 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-02-20 21:51:36,663 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 20.02 09:51:33" (1/3) ... [2022-02-20 21:51:36,663 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@44df870b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.02 09:51:36, skipping insertion in model container [2022-02-20 21:51:36,664 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:51:34" (2/3) ... [2022-02-20 21:51:36,664 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@44df870b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.02 09:51:36, skipping insertion in model container [2022-02-20 21:51:36,664 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 09:51:36" (3/3) ... [2022-02-20 21:51:36,665 INFO L111 eAbstractionObserver]: Analyzing ICFG linux-3.12-rc1.tar.xz-144_2a-drivers--net--usb--ipheth.ko-entry_point.cil.out.i [2022-02-20 21:51:36,668 INFO L205 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-02-20 21:51:36,668 INFO L164 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-02-20 21:51:36,697 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-02-20 21:51:36,701 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2022-02-20 21:51:36,701 INFO L340 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-02-20 21:51:36,722 INFO L276 IsEmpty]: Start isEmpty. Operand has 527 states, 386 states have (on average 1.3031088082901554) internal successors, (503), 405 states have internal predecessors, (503), 104 states have call successors, (104), 37 states have call predecessors, (104), 35 states have return successors, (97), 94 states have call predecessors, (97), 97 states have call successors, (97) [2022-02-20 21:51:36,727 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2022-02-20 21:51:36,727 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:51:36,727 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:51:36,728 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:51:36,731 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:51:36,731 INFO L85 PathProgramCache]: Analyzing trace with hash -60987296, now seen corresponding path program 1 times [2022-02-20 21:51:36,739 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:51:36,740 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1020679946] [2022-02-20 21:51:36,740 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:51:36,741 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:51:36,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:37,015 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 21:51:37,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:37,030 INFO L290 TraceCheckUtils]: 0: Hoare triple {545#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {530#true} is VALID [2022-02-20 21:51:37,030 INFO L290 TraceCheckUtils]: 1: Hoare triple {530#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {530#true} is VALID [2022-02-20 21:51:37,030 INFO L290 TraceCheckUtils]: 2: Hoare triple {530#true} assume true; {530#true} is VALID [2022-02-20 21:51:37,030 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {530#true} {530#true} #1203#return; {530#true} is VALID [2022-02-20 21:51:37,031 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-02-20 21:51:37,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:37,040 INFO L290 TraceCheckUtils]: 0: Hoare triple {545#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {530#true} is VALID [2022-02-20 21:51:37,041 INFO L290 TraceCheckUtils]: 1: Hoare triple {530#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {530#true} is VALID [2022-02-20 21:51:37,041 INFO L290 TraceCheckUtils]: 2: Hoare triple {530#true} assume true; {530#true} is VALID [2022-02-20 21:51:37,041 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {530#true} {530#true} #1205#return; {530#true} is VALID [2022-02-20 21:51:37,041 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2022-02-20 21:51:37,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:37,050 INFO L290 TraceCheckUtils]: 0: Hoare triple {545#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {530#true} is VALID [2022-02-20 21:51:37,050 INFO L290 TraceCheckUtils]: 1: Hoare triple {530#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {530#true} is VALID [2022-02-20 21:51:37,050 INFO L290 TraceCheckUtils]: 2: Hoare triple {530#true} assume true; {530#true} is VALID [2022-02-20 21:51:37,050 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {530#true} {530#true} #1207#return; {530#true} is VALID [2022-02-20 21:51:37,052 INFO L290 TraceCheckUtils]: 0: Hoare triple {530#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(80, 2);call #Ultimate.allocInit(26, 3);call #Ultimate.allocInit(63, 4);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(24, 6);call #Ultimate.allocInit(28, 7);call #Ultimate.allocInit(24, 8);call #Ultimate.allocInit(20, 9);call #Ultimate.allocInit(24, 10);call #Ultimate.allocInit(25, 11);call #Ultimate.allocInit(19, 12);call #Ultimate.allocInit(25, 13);call #Ultimate.allocInit(19, 14);call #Ultimate.allocInit(45, 15);call #Ultimate.allocInit(19, 16);call #Ultimate.allocInit(24, 17);call #Ultimate.allocInit(17, 18);call #Ultimate.allocInit(217, 19);call #Ultimate.allocInit(29, 20);call #Ultimate.allocInit(10, 21);call #Ultimate.allocInit(24, 22);call #Ultimate.allocInit(10, 23);call #Ultimate.allocInit(16, 24);call #Ultimate.allocInit(18, 25);call #Ultimate.allocInit(6, 26);call write~init~int(101, 26, 0, 1);call write~init~int(116, 26, 1, 1);call write~init~int(104, 26, 2, 1);call write~init~int(37, 26, 3, 1);call write~init~int(100, 26, 4, 1);call write~init~int(0, 26, 5, 1);call #Ultimate.allocInit(45, 27);call #Ultimate.allocInit(26, 28);call #Ultimate.allocInit(30, 29);call #Ultimate.allocInit(31, 30);call #Ultimate.allocInit(27, 31);call #Ultimate.allocInit(30, 32);call #Ultimate.allocInit(43, 33);call #Ultimate.allocInit(44, 34);call #Ultimate.allocInit(7, 35);call write~init~int(105, 35, 0, 1);call write~init~int(112, 35, 1, 1);call write~init~int(104, 35, 2, 1);call write~init~int(101, 35, 3, 1);call write~init~int(116, 35, 4, 1);call write~init~int(104, 35, 5, 1);call write~init~int(0, 35, 6, 1);call #Ultimate.allocInit(7, 36);call write~init~int(105, 36, 0, 1);call write~init~int(112, 36, 1, 1);call write~init~int(104, 36, 2, 1);call write~init~int(101, 36, 3, 1);call write~init~int(116, 36, 4, 1);call write~init~int(104, 36, 5, 1);call write~init~int(0, 36, 6, 1);~ldv_state_variable_3~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_2~0 := 0;~ipheth_netdev_ops_group1~0.base, ~ipheth_netdev_ops_group1~0.offset := 0, 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~ipheth_driver_group1~0.base, ~ipheth_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#ipheth_table~0.base, ~#ipheth_table~0.offset := 37, 0;call #Ultimate.allocInit(250, 37);call write~init~int(899, ~#ipheth_table~0.base, ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 2 + ~#ipheth_table~0.offset, 2);call write~init~int(4752, ~#ipheth_table~0.base, 4 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 6 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 8 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 10 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 11 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 12 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 13 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 14 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 15 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 16 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 17 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 25 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 27 + ~#ipheth_table~0.offset, 2);call write~init~int(4754, ~#ipheth_table~0.base, 29 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 31 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 33 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 35 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 36 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 37 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 38 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 39 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 40 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 41 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 42 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 50 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 52 + ~#ipheth_table~0.offset, 2);call write~init~int(4756, ~#ipheth_table~0.base, 54 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 56 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 58 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 60 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 61 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 62 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 63 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 64 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 65 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 66 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 67 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 75 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 77 + ~#ipheth_table~0.offset, 2);call write~init~int(4759, ~#ipheth_table~0.base, 79 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 81 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 83 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 85 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 86 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 87 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 88 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 89 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 90 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 91 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 92 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 100 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 102 + ~#ipheth_table~0.offset, 2);call write~init~int(4762, ~#ipheth_table~0.base, 104 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 106 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 108 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 110 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 111 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 112 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 113 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 114 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 115 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 116 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 117 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 125 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 127 + ~#ipheth_table~0.offset, 2);call write~init~int(4779, ~#ipheth_table~0.base, 129 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 131 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 133 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 135 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 136 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 137 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 138 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 139 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 140 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 141 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 142 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 150 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 152 + ~#ipheth_table~0.offset, 2);call write~init~int(4764, ~#ipheth_table~0.base, 154 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 156 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 158 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 160 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 161 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 162 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 163 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 164 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 165 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 166 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 167 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 175 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 177 + ~#ipheth_table~0.offset, 2);call write~init~int(4768, ~#ipheth_table~0.base, 179 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 181 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 183 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 185 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 186 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 187 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 188 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 189 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 190 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 191 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 192 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 200 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 202 + ~#ipheth_table~0.offset, 2);call write~init~int(4776, ~#ipheth_table~0.base, 204 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 206 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 208 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 210 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 211 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 212 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 213 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 214 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 215 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 216 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 217 + ~#ipheth_table~0.offset, 8);call write~init~int(0, ~#ipheth_table~0.base, 225 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 227 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 229 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 231 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 233 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 235 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 236 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 237 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 238 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 239 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 240 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 241 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 242 + ~#ipheth_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.bInterfaceNumber := 0;~__mod_usb_device_table~0.driver_info := 0;~#ipheth_netdev_ops~0.base, ~#ipheth_netdev_ops~0.offset := 38, 0;call #Ultimate.allocInit(448, 38);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 8 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_open.base, #funAddr~ipheth_open.offset, ~#ipheth_netdev_ops~0.base, 16 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_close.base, #funAddr~ipheth_close.offset, ~#ipheth_netdev_ops~0.base, 24 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_tx.base, #funAddr~ipheth_tx.offset, ~#ipheth_netdev_ops~0.base, 32 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 40 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 48 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 56 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 64 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 72 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 80 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 88 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 96 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 104 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_tx_timeout.base, #funAddr~ipheth_tx_timeout.offset, ~#ipheth_netdev_ops~0.base, 112 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 120 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 128 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 136 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 144 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 152 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 160 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 168 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 176 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 184 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 192 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 200 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 208 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 216 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 224 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 232 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 240 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 248 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 256 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 264 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 272 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 280 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 288 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 296 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 304 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 312 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 320 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 328 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 336 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 344 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 352 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 360 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 368 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 376 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 384 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 392 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 400 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 408 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 416 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 424 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 432 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 440 + ~#ipheth_netdev_ops~0.offset, 8);~#ipheth_driver~0.base, ~#ipheth_driver~0.offset := 39, 0;call #Ultimate.allocInit(285, 39);call write~init~$Pointer$(35, 0, ~#ipheth_driver~0.base, ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_probe.base, #funAddr~ipheth_probe.offset, ~#ipheth_driver~0.base, 8 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_disconnect.base, #funAddr~ipheth_disconnect.offset, ~#ipheth_driver~0.base, 16 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 24 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 32 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 40 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 48 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 56 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 64 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(~#ipheth_table~0.base, ~#ipheth_table~0.offset, ~#ipheth_driver~0.base, 72 + ~#ipheth_driver~0.offset, 8);call write~init~int(0, ~#ipheth_driver~0.base, 80 + ~#ipheth_driver~0.offset, 4);call write~init~int(0, ~#ipheth_driver~0.base, 84 + ~#ipheth_driver~0.offset, 4);call write~init~int(0, ~#ipheth_driver~0.base, 88 + ~#ipheth_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 92 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 100 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 108 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 116 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 124 + ~#ipheth_driver~0.offset, 8);call write~init~int(0, ~#ipheth_driver~0.base, 132 + ~#ipheth_driver~0.offset, 4);call write~init~int(0, ~#ipheth_driver~0.base, 136 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 148 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 156 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 164 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 172 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 180 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 188 + ~#ipheth_driver~0.offset, 8);call write~init~int(0, ~#ipheth_driver~0.base, 196 + ~#ipheth_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 197 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 205 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 213 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 221 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 229 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 237 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 245 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 253 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 261 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 269 + ~#ipheth_driver~0.offset, 8);call write~init~int(0, ~#ipheth_driver~0.base, 277 + ~#ipheth_driver~0.offset, 4);call write~init~int(0, ~#ipheth_driver~0.base, 281 + ~#ipheth_driver~0.offset, 1);call write~init~int(0, ~#ipheth_driver~0.base, 282 + ~#ipheth_driver~0.offset, 1);call write~init~int(1, ~#ipheth_driver~0.base, 283 + ~#ipheth_driver~0.offset, 1);call write~init~int(0, ~#ipheth_driver~0.base, 284 + ~#ipheth_driver~0.offset, 1);~ldv_retval_2~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {530#true} is VALID [2022-02-20 21:51:37,052 INFO L290 TraceCheckUtils]: 1: Hoare triple {530#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret305#1.base, main_#t~ret305#1.offset, main_#t~ret306#1.base, main_#t~ret306#1.offset, main_#t~ret307#1.base, main_#t~ret307#1.offset, main_#t~nondet308#1, main_#t~switch309#1, main_#t~nondet310#1, main_#t~switch311#1, main_#t~ret312#1, main_#t~nondet313#1, main_#t~switch314#1, main_#t~ret315#1, main_#t~nondet316#1, main_#t~switch317#1, main_#t~ret318#1, main_#t~nondet319#1, main_#t~switch320#1, main_#t~ret321#1, main_#t~ret322#1, main_#t~ret323#1, main_#t~ret324#1, main_#t~ret325#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~31#1.base, main_~tmp~31#1.offset, main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset, main_~tmp___0~12#1.base, main_~tmp___0~12#1.offset, main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset, main_~tmp___1~4#1.base, main_~tmp___1~4#1.offset, main_~tmp___2~2#1, main_~tmp___3~1#1, main_~tmp___4~0#1, main_~tmp___5~0#1, main_~tmp___6~0#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~31#1.base, main_~tmp~31#1.offset;havoc main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset;havoc main_~tmp___0~12#1.base, main_~tmp___0~12#1.offset;havoc main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset;havoc main_~tmp___1~4#1.base, main_~tmp___1~4#1.offset;havoc main_~tmp___2~2#1;havoc main_~tmp___3~1#1;havoc main_~tmp___4~0#1;havoc main_~tmp___5~0#1;havoc main_~tmp___6~0#1; {530#true} is VALID [2022-02-20 21:51:37,073 INFO L272 TraceCheckUtils]: 2: Hoare triple {530#true} call main_#t~ret305#1.base, main_#t~ret305#1.offset := ldv_zalloc(32); {545#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:37,073 INFO L290 TraceCheckUtils]: 3: Hoare triple {545#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {530#true} is VALID [2022-02-20 21:51:37,074 INFO L290 TraceCheckUtils]: 4: Hoare triple {530#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {530#true} is VALID [2022-02-20 21:51:37,074 INFO L290 TraceCheckUtils]: 5: Hoare triple {530#true} assume true; {530#true} is VALID [2022-02-20 21:51:37,074 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {530#true} {530#true} #1203#return; {530#true} is VALID [2022-02-20 21:51:37,074 INFO L290 TraceCheckUtils]: 7: Hoare triple {530#true} main_~tmp~31#1.base, main_~tmp~31#1.offset := main_#t~ret305#1.base, main_#t~ret305#1.offset;havoc main_#t~ret305#1.base, main_#t~ret305#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~31#1.base, main_~tmp~31#1.offset; {530#true} is VALID [2022-02-20 21:51:37,075 INFO L272 TraceCheckUtils]: 8: Hoare triple {530#true} call main_#t~ret306#1.base, main_#t~ret306#1.offset := ldv_zalloc(3136); {545#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:37,075 INFO L290 TraceCheckUtils]: 9: Hoare triple {545#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {530#true} is VALID [2022-02-20 21:51:37,075 INFO L290 TraceCheckUtils]: 10: Hoare triple {530#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {530#true} is VALID [2022-02-20 21:51:37,076 INFO L290 TraceCheckUtils]: 11: Hoare triple {530#true} assume true; {530#true} is VALID [2022-02-20 21:51:37,076 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {530#true} {530#true} #1205#return; {530#true} is VALID [2022-02-20 21:51:37,076 INFO L290 TraceCheckUtils]: 13: Hoare triple {530#true} main_~tmp___0~12#1.base, main_~tmp___0~12#1.offset := main_#t~ret306#1.base, main_#t~ret306#1.offset;havoc main_#t~ret306#1.base, main_#t~ret306#1.offset;main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset := main_~tmp___0~12#1.base, main_~tmp___0~12#1.offset; {530#true} is VALID [2022-02-20 21:51:37,077 INFO L272 TraceCheckUtils]: 14: Hoare triple {530#true} call main_#t~ret307#1.base, main_#t~ret307#1.offset := ldv_zalloc(240); {545#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:37,077 INFO L290 TraceCheckUtils]: 15: Hoare triple {545#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {530#true} is VALID [2022-02-20 21:51:37,077 INFO L290 TraceCheckUtils]: 16: Hoare triple {530#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {530#true} is VALID [2022-02-20 21:51:37,077 INFO L290 TraceCheckUtils]: 17: Hoare triple {530#true} assume true; {530#true} is VALID [2022-02-20 21:51:37,089 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {530#true} {530#true} #1207#return; {530#true} is VALID [2022-02-20 21:51:37,090 INFO L290 TraceCheckUtils]: 19: Hoare triple {530#true} main_~tmp___1~4#1.base, main_~tmp___1~4#1.offset := main_#t~ret307#1.base, main_#t~ret307#1.offset;havoc main_#t~ret307#1.base, main_#t~ret307#1.offset;main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset := main_~tmp___1~4#1.base, main_~tmp___1~4#1.offset;assume { :begin_inline_ldv_initialize } true; {530#true} is VALID [2022-02-20 21:51:37,091 INFO L290 TraceCheckUtils]: 20: Hoare triple {530#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {544#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:51:37,092 INFO L290 TraceCheckUtils]: 21: Hoare triple {544#(= ~ldv_state_variable_0~0 1)} assume -2147483648 <= main_#t~nondet308#1 && main_#t~nondet308#1 <= 2147483647;main_~tmp___2~2#1 := main_#t~nondet308#1;havoc main_#t~nondet308#1;main_#t~switch309#1 := 0 == main_~tmp___2~2#1; {544#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:51:37,092 INFO L290 TraceCheckUtils]: 22: Hoare triple {544#(= ~ldv_state_variable_0~0 1)} assume !main_#t~switch309#1;main_#t~switch309#1 := main_#t~switch309#1 || 1 == main_~tmp___2~2#1; {544#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:51:37,093 INFO L290 TraceCheckUtils]: 23: Hoare triple {544#(= ~ldv_state_variable_0~0 1)} assume main_#t~switch309#1; {544#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:51:37,093 INFO L290 TraceCheckUtils]: 24: Hoare triple {544#(= ~ldv_state_variable_0~0 1)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet313#1 && main_#t~nondet313#1 <= 2147483647;main_~tmp___4~0#1 := main_#t~nondet313#1;havoc main_#t~nondet313#1;main_#t~switch314#1 := 0 == main_~tmp___4~0#1; {544#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:51:37,094 INFO L290 TraceCheckUtils]: 25: Hoare triple {544#(= ~ldv_state_variable_0~0 1)} assume main_#t~switch314#1; {544#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:51:37,094 INFO L290 TraceCheckUtils]: 26: Hoare triple {544#(= ~ldv_state_variable_0~0 1)} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0;assume { :begin_inline_ipheth_driver_exit } true;assume { :begin_inline_ldv_usb_deregister_20 } true;ldv_usb_deregister_20_#in~arg#1.base, ldv_usb_deregister_20_#in~arg#1.offset := ~#ipheth_driver~0.base, ~#ipheth_driver~0.offset;havoc ldv_usb_deregister_20_~arg#1.base, ldv_usb_deregister_20_~arg#1.offset;ldv_usb_deregister_20_~arg#1.base, ldv_usb_deregister_20_~arg#1.offset := ldv_usb_deregister_20_#in~arg#1.base, ldv_usb_deregister_20_#in~arg#1.offset;assume { :begin_inline_usb_deregister } true;usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset := ldv_usb_deregister_20_~arg#1.base, ldv_usb_deregister_20_~arg#1.offset;havoc usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset;usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset := usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset; {531#false} is VALID [2022-02-20 21:51:37,094 INFO L290 TraceCheckUtils]: 27: Hoare triple {531#false} assume { :end_inline_usb_deregister } true;~ldv_state_variable_1~0 := 0; {531#false} is VALID [2022-02-20 21:51:37,095 INFO L290 TraceCheckUtils]: 28: Hoare triple {531#false} assume { :end_inline_ldv_usb_deregister_20 } true; {531#false} is VALID [2022-02-20 21:51:37,095 INFO L290 TraceCheckUtils]: 29: Hoare triple {531#false} assume { :end_inline_ipheth_driver_exit } true;~ldv_state_variable_0~0 := 2; {531#false} is VALID [2022-02-20 21:51:37,095 INFO L290 TraceCheckUtils]: 30: Hoare triple {531#false} assume { :begin_inline_ldv_check_final_state } true; {531#false} is VALID [2022-02-20 21:51:37,095 INFO L290 TraceCheckUtils]: 31: Hoare triple {531#false} assume !(0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616); {531#false} is VALID [2022-02-20 21:51:37,096 INFO L272 TraceCheckUtils]: 32: Hoare triple {531#false} call ldv_error(); {531#false} is VALID [2022-02-20 21:51:37,096 INFO L290 TraceCheckUtils]: 33: Hoare triple {531#false} assume !false; {531#false} is VALID [2022-02-20 21:51:37,096 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-02-20 21:51:37,097 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:51:37,097 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1020679946] [2022-02-20 21:51:37,098 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1020679946] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:51:37,098 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:51:37,098 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-02-20 21:51:37,099 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1962996228] [2022-02-20 21:51:37,100 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:51:37,103 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 2 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 34 [2022-02-20 21:51:37,107 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:51:37,109 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 2 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-02-20 21:51:37,149 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:51:37,149 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-02-20 21:51:37,150 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:51:37,164 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-02-20 21:51:37,164 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-02-20 21:51:37,168 INFO L87 Difference]: Start difference. First operand has 527 states, 386 states have (on average 1.3031088082901554) internal successors, (503), 405 states have internal predecessors, (503), 104 states have call successors, (104), 37 states have call predecessors, (104), 35 states have return successors, (97), 94 states have call predecessors, (97), 97 states have call successors, (97) Second operand has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 2 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-02-20 21:51:40,397 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:51:40,397 INFO L93 Difference]: Finished difference Result 1626 states and 2252 transitions. [2022-02-20 21:51:40,398 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-02-20 21:51:40,398 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 2 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 34 [2022-02-20 21:51:40,398 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:51:40,399 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 2 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-02-20 21:51:40,460 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 2252 transitions. [2022-02-20 21:51:40,460 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 2 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-02-20 21:51:40,496 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 2252 transitions. [2022-02-20 21:51:40,496 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 2252 transitions. [2022-02-20 21:51:42,330 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2252 edges. 2252 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:51:42,498 INFO L225 Difference]: With dead ends: 1626 [2022-02-20 21:51:42,498 INFO L226 Difference]: Without dead ends: 1080 [2022-02-20 21:51:42,507 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-02-20 21:51:42,510 INFO L933 BasicCegarLoop]: 717 mSDtfsCounter, 965 mSDsluCounter, 748 mSDsCounter, 0 mSdLazyCounter, 528 mSolverCounterSat, 321 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1039 SdHoareTripleChecker+Valid, 1465 SdHoareTripleChecker+Invalid, 849 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 321 IncrementalHoareTripleChecker+Valid, 528 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2022-02-20 21:51:42,511 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1039 Valid, 1465 Invalid, 849 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [321 Valid, 528 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2022-02-20 21:51:42,525 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1080 states. [2022-02-20 21:51:42,606 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1080 to 992. [2022-02-20 21:51:42,607 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:51:42,617 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1080 states. Second operand has 992 states, 738 states have (on average 1.2764227642276422) internal successors, (942), 754 states have internal predecessors, (942), 185 states have call successors, (185), 69 states have call predecessors, (185), 68 states have return successors, (180), 174 states have call predecessors, (180), 180 states have call successors, (180) [2022-02-20 21:51:42,620 INFO L74 IsIncluded]: Start isIncluded. First operand 1080 states. Second operand has 992 states, 738 states have (on average 1.2764227642276422) internal successors, (942), 754 states have internal predecessors, (942), 185 states have call successors, (185), 69 states have call predecessors, (185), 68 states have return successors, (180), 174 states have call predecessors, (180), 180 states have call successors, (180) [2022-02-20 21:51:42,623 INFO L87 Difference]: Start difference. First operand 1080 states. Second operand has 992 states, 738 states have (on average 1.2764227642276422) internal successors, (942), 754 states have internal predecessors, (942), 185 states have call successors, (185), 69 states have call predecessors, (185), 68 states have return successors, (180), 174 states have call predecessors, (180), 180 states have call successors, (180) [2022-02-20 21:51:42,687 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:51:42,687 INFO L93 Difference]: Finished difference Result 1080 states and 1451 transitions. [2022-02-20 21:51:42,688 INFO L276 IsEmpty]: Start isEmpty. Operand 1080 states and 1451 transitions. [2022-02-20 21:51:42,699 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:51:42,699 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:51:42,701 INFO L74 IsIncluded]: Start isIncluded. First operand has 992 states, 738 states have (on average 1.2764227642276422) internal successors, (942), 754 states have internal predecessors, (942), 185 states have call successors, (185), 69 states have call predecessors, (185), 68 states have return successors, (180), 174 states have call predecessors, (180), 180 states have call successors, (180) Second operand 1080 states. [2022-02-20 21:51:42,704 INFO L87 Difference]: Start difference. First operand has 992 states, 738 states have (on average 1.2764227642276422) internal successors, (942), 754 states have internal predecessors, (942), 185 states have call successors, (185), 69 states have call predecessors, (185), 68 states have return successors, (180), 174 states have call predecessors, (180), 180 states have call successors, (180) Second operand 1080 states. [2022-02-20 21:51:42,751 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:51:42,752 INFO L93 Difference]: Finished difference Result 1080 states and 1451 transitions. [2022-02-20 21:51:42,752 INFO L276 IsEmpty]: Start isEmpty. Operand 1080 states and 1451 transitions. [2022-02-20 21:51:42,755 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:51:42,755 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:51:42,755 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:51:42,755 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:51:42,757 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 992 states, 738 states have (on average 1.2764227642276422) internal successors, (942), 754 states have internal predecessors, (942), 185 states have call successors, (185), 69 states have call predecessors, (185), 68 states have return successors, (180), 174 states have call predecessors, (180), 180 states have call successors, (180) [2022-02-20 21:51:42,807 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 992 states to 992 states and 1307 transitions. [2022-02-20 21:51:42,809 INFO L78 Accepts]: Start accepts. Automaton has 992 states and 1307 transitions. Word has length 34 [2022-02-20 21:51:42,810 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:51:42,810 INFO L470 AbstractCegarLoop]: Abstraction has 992 states and 1307 transitions. [2022-02-20 21:51:42,810 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 2 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-02-20 21:51:42,810 INFO L276 IsEmpty]: Start isEmpty. Operand 992 states and 1307 transitions. [2022-02-20 21:51:42,811 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2022-02-20 21:51:42,811 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:51:42,812 INFO L514 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:51:42,812 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-02-20 21:51:42,812 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:51:42,813 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:51:42,813 INFO L85 PathProgramCache]: Analyzing trace with hash -406405667, now seen corresponding path program 1 times [2022-02-20 21:51:42,814 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:51:42,814 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1180814610] [2022-02-20 21:51:42,814 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:51:42,815 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:51:42,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:42,930 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 21:51:42,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:42,947 INFO L290 TraceCheckUtils]: 0: Hoare triple {6476#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {6457#true} is VALID [2022-02-20 21:51:42,947 INFO L290 TraceCheckUtils]: 1: Hoare triple {6457#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {6457#true} is VALID [2022-02-20 21:51:42,949 INFO L290 TraceCheckUtils]: 2: Hoare triple {6457#true} assume true; {6457#true} is VALID [2022-02-20 21:51:42,950 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6457#true} {6457#true} #1203#return; {6457#true} is VALID [2022-02-20 21:51:42,950 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-02-20 21:51:42,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:42,964 INFO L290 TraceCheckUtils]: 0: Hoare triple {6476#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {6457#true} is VALID [2022-02-20 21:51:42,964 INFO L290 TraceCheckUtils]: 1: Hoare triple {6457#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {6457#true} is VALID [2022-02-20 21:51:42,964 INFO L290 TraceCheckUtils]: 2: Hoare triple {6457#true} assume true; {6457#true} is VALID [2022-02-20 21:51:42,964 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6457#true} {6457#true} #1205#return; {6457#true} is VALID [2022-02-20 21:51:42,965 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2022-02-20 21:51:42,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:42,974 INFO L290 TraceCheckUtils]: 0: Hoare triple {6476#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {6457#true} is VALID [2022-02-20 21:51:42,976 INFO L290 TraceCheckUtils]: 1: Hoare triple {6457#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {6457#true} is VALID [2022-02-20 21:51:42,976 INFO L290 TraceCheckUtils]: 2: Hoare triple {6457#true} assume true; {6457#true} is VALID [2022-02-20 21:51:42,977 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6457#true} {6457#true} #1207#return; {6457#true} is VALID [2022-02-20 21:51:42,977 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 29 [2022-02-20 21:51:42,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:43,004 INFO L290 TraceCheckUtils]: 0: Hoare triple {6476#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {6457#true} is VALID [2022-02-20 21:51:43,005 INFO L290 TraceCheckUtils]: 1: Hoare triple {6457#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {6457#true} is VALID [2022-02-20 21:51:43,005 INFO L290 TraceCheckUtils]: 2: Hoare triple {6457#true} assume true; {6457#true} is VALID [2022-02-20 21:51:43,005 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6457#true} {6457#true} #1261#return; {6457#true} is VALID [2022-02-20 21:51:43,005 INFO L290 TraceCheckUtils]: 0: Hoare triple {6457#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(80, 2);call #Ultimate.allocInit(26, 3);call #Ultimate.allocInit(63, 4);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(24, 6);call #Ultimate.allocInit(28, 7);call #Ultimate.allocInit(24, 8);call #Ultimate.allocInit(20, 9);call #Ultimate.allocInit(24, 10);call #Ultimate.allocInit(25, 11);call #Ultimate.allocInit(19, 12);call #Ultimate.allocInit(25, 13);call #Ultimate.allocInit(19, 14);call #Ultimate.allocInit(45, 15);call #Ultimate.allocInit(19, 16);call #Ultimate.allocInit(24, 17);call #Ultimate.allocInit(17, 18);call #Ultimate.allocInit(217, 19);call #Ultimate.allocInit(29, 20);call #Ultimate.allocInit(10, 21);call #Ultimate.allocInit(24, 22);call #Ultimate.allocInit(10, 23);call #Ultimate.allocInit(16, 24);call #Ultimate.allocInit(18, 25);call #Ultimate.allocInit(6, 26);call write~init~int(101, 26, 0, 1);call write~init~int(116, 26, 1, 1);call write~init~int(104, 26, 2, 1);call write~init~int(37, 26, 3, 1);call write~init~int(100, 26, 4, 1);call write~init~int(0, 26, 5, 1);call #Ultimate.allocInit(45, 27);call #Ultimate.allocInit(26, 28);call #Ultimate.allocInit(30, 29);call #Ultimate.allocInit(31, 30);call #Ultimate.allocInit(27, 31);call #Ultimate.allocInit(30, 32);call #Ultimate.allocInit(43, 33);call #Ultimate.allocInit(44, 34);call #Ultimate.allocInit(7, 35);call write~init~int(105, 35, 0, 1);call write~init~int(112, 35, 1, 1);call write~init~int(104, 35, 2, 1);call write~init~int(101, 35, 3, 1);call write~init~int(116, 35, 4, 1);call write~init~int(104, 35, 5, 1);call write~init~int(0, 35, 6, 1);call #Ultimate.allocInit(7, 36);call write~init~int(105, 36, 0, 1);call write~init~int(112, 36, 1, 1);call write~init~int(104, 36, 2, 1);call write~init~int(101, 36, 3, 1);call write~init~int(116, 36, 4, 1);call write~init~int(104, 36, 5, 1);call write~init~int(0, 36, 6, 1);~ldv_state_variable_3~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_2~0 := 0;~ipheth_netdev_ops_group1~0.base, ~ipheth_netdev_ops_group1~0.offset := 0, 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~ipheth_driver_group1~0.base, ~ipheth_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#ipheth_table~0.base, ~#ipheth_table~0.offset := 37, 0;call #Ultimate.allocInit(250, 37);call write~init~int(899, ~#ipheth_table~0.base, ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 2 + ~#ipheth_table~0.offset, 2);call write~init~int(4752, ~#ipheth_table~0.base, 4 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 6 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 8 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 10 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 11 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 12 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 13 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 14 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 15 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 16 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 17 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 25 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 27 + ~#ipheth_table~0.offset, 2);call write~init~int(4754, ~#ipheth_table~0.base, 29 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 31 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 33 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 35 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 36 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 37 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 38 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 39 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 40 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 41 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 42 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 50 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 52 + ~#ipheth_table~0.offset, 2);call write~init~int(4756, ~#ipheth_table~0.base, 54 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 56 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 58 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 60 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 61 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 62 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 63 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 64 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 65 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 66 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 67 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 75 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 77 + ~#ipheth_table~0.offset, 2);call write~init~int(4759, ~#ipheth_table~0.base, 79 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 81 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 83 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 85 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 86 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 87 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 88 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 89 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 90 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 91 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 92 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 100 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 102 + ~#ipheth_table~0.offset, 2);call write~init~int(4762, ~#ipheth_table~0.base, 104 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 106 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 108 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 110 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 111 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 112 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 113 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 114 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 115 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 116 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 117 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 125 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 127 + ~#ipheth_table~0.offset, 2);call write~init~int(4779, ~#ipheth_table~0.base, 129 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 131 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 133 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 135 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 136 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 137 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 138 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 139 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 140 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 141 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 142 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 150 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 152 + ~#ipheth_table~0.offset, 2);call write~init~int(4764, ~#ipheth_table~0.base, 154 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 156 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 158 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 160 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 161 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 162 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 163 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 164 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 165 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 166 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 167 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 175 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 177 + ~#ipheth_table~0.offset, 2);call write~init~int(4768, ~#ipheth_table~0.base, 179 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 181 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 183 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 185 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 186 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 187 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 188 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 189 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 190 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 191 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 192 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 200 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 202 + ~#ipheth_table~0.offset, 2);call write~init~int(4776, ~#ipheth_table~0.base, 204 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 206 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 208 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 210 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 211 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 212 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 213 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 214 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 215 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 216 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 217 + ~#ipheth_table~0.offset, 8);call write~init~int(0, ~#ipheth_table~0.base, 225 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 227 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 229 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 231 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 233 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 235 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 236 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 237 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 238 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 239 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 240 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 241 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 242 + ~#ipheth_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.bInterfaceNumber := 0;~__mod_usb_device_table~0.driver_info := 0;~#ipheth_netdev_ops~0.base, ~#ipheth_netdev_ops~0.offset := 38, 0;call #Ultimate.allocInit(448, 38);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 8 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_open.base, #funAddr~ipheth_open.offset, ~#ipheth_netdev_ops~0.base, 16 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_close.base, #funAddr~ipheth_close.offset, ~#ipheth_netdev_ops~0.base, 24 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_tx.base, #funAddr~ipheth_tx.offset, ~#ipheth_netdev_ops~0.base, 32 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 40 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 48 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 56 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 64 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 72 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 80 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 88 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 96 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 104 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_tx_timeout.base, #funAddr~ipheth_tx_timeout.offset, ~#ipheth_netdev_ops~0.base, 112 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 120 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 128 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 136 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 144 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 152 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 160 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 168 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 176 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 184 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 192 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 200 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 208 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 216 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 224 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 232 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 240 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 248 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 256 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 264 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 272 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 280 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 288 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 296 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 304 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 312 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 320 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 328 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 336 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 344 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 352 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 360 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 368 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 376 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 384 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 392 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 400 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 408 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 416 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 424 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 432 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 440 + ~#ipheth_netdev_ops~0.offset, 8);~#ipheth_driver~0.base, ~#ipheth_driver~0.offset := 39, 0;call #Ultimate.allocInit(285, 39);call write~init~$Pointer$(35, 0, ~#ipheth_driver~0.base, ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_probe.base, #funAddr~ipheth_probe.offset, ~#ipheth_driver~0.base, 8 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_disconnect.base, #funAddr~ipheth_disconnect.offset, ~#ipheth_driver~0.base, 16 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 24 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 32 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 40 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 48 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 56 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 64 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(~#ipheth_table~0.base, ~#ipheth_table~0.offset, ~#ipheth_driver~0.base, 72 + ~#ipheth_driver~0.offset, 8);call write~init~int(0, ~#ipheth_driver~0.base, 80 + ~#ipheth_driver~0.offset, 4);call write~init~int(0, ~#ipheth_driver~0.base, 84 + ~#ipheth_driver~0.offset, 4);call write~init~int(0, ~#ipheth_driver~0.base, 88 + ~#ipheth_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 92 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 100 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 108 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 116 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 124 + ~#ipheth_driver~0.offset, 8);call write~init~int(0, ~#ipheth_driver~0.base, 132 + ~#ipheth_driver~0.offset, 4);call write~init~int(0, ~#ipheth_driver~0.base, 136 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 148 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 156 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 164 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 172 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 180 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 188 + ~#ipheth_driver~0.offset, 8);call write~init~int(0, ~#ipheth_driver~0.base, 196 + ~#ipheth_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 197 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 205 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 213 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 221 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 229 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 237 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 245 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 253 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 261 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 269 + ~#ipheth_driver~0.offset, 8);call write~init~int(0, ~#ipheth_driver~0.base, 277 + ~#ipheth_driver~0.offset, 4);call write~init~int(0, ~#ipheth_driver~0.base, 281 + ~#ipheth_driver~0.offset, 1);call write~init~int(0, ~#ipheth_driver~0.base, 282 + ~#ipheth_driver~0.offset, 1);call write~init~int(1, ~#ipheth_driver~0.base, 283 + ~#ipheth_driver~0.offset, 1);call write~init~int(0, ~#ipheth_driver~0.base, 284 + ~#ipheth_driver~0.offset, 1);~ldv_retval_2~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {6457#true} is VALID [2022-02-20 21:51:43,006 INFO L290 TraceCheckUtils]: 1: Hoare triple {6457#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret305#1.base, main_#t~ret305#1.offset, main_#t~ret306#1.base, main_#t~ret306#1.offset, main_#t~ret307#1.base, main_#t~ret307#1.offset, main_#t~nondet308#1, main_#t~switch309#1, main_#t~nondet310#1, main_#t~switch311#1, main_#t~ret312#1, main_#t~nondet313#1, main_#t~switch314#1, main_#t~ret315#1, main_#t~nondet316#1, main_#t~switch317#1, main_#t~ret318#1, main_#t~nondet319#1, main_#t~switch320#1, main_#t~ret321#1, main_#t~ret322#1, main_#t~ret323#1, main_#t~ret324#1, main_#t~ret325#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~31#1.base, main_~tmp~31#1.offset, main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset, main_~tmp___0~12#1.base, main_~tmp___0~12#1.offset, main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset, main_~tmp___1~4#1.base, main_~tmp___1~4#1.offset, main_~tmp___2~2#1, main_~tmp___3~1#1, main_~tmp___4~0#1, main_~tmp___5~0#1, main_~tmp___6~0#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~31#1.base, main_~tmp~31#1.offset;havoc main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset;havoc main_~tmp___0~12#1.base, main_~tmp___0~12#1.offset;havoc main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset;havoc main_~tmp___1~4#1.base, main_~tmp___1~4#1.offset;havoc main_~tmp___2~2#1;havoc main_~tmp___3~1#1;havoc main_~tmp___4~0#1;havoc main_~tmp___5~0#1;havoc main_~tmp___6~0#1; {6457#true} is VALID [2022-02-20 21:51:43,006 INFO L272 TraceCheckUtils]: 2: Hoare triple {6457#true} call main_#t~ret305#1.base, main_#t~ret305#1.offset := ldv_zalloc(32); {6476#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:43,007 INFO L290 TraceCheckUtils]: 3: Hoare triple {6476#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {6457#true} is VALID [2022-02-20 21:51:43,007 INFO L290 TraceCheckUtils]: 4: Hoare triple {6457#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {6457#true} is VALID [2022-02-20 21:51:43,007 INFO L290 TraceCheckUtils]: 5: Hoare triple {6457#true} assume true; {6457#true} is VALID [2022-02-20 21:51:43,007 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {6457#true} {6457#true} #1203#return; {6457#true} is VALID [2022-02-20 21:51:43,007 INFO L290 TraceCheckUtils]: 7: Hoare triple {6457#true} main_~tmp~31#1.base, main_~tmp~31#1.offset := main_#t~ret305#1.base, main_#t~ret305#1.offset;havoc main_#t~ret305#1.base, main_#t~ret305#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~31#1.base, main_~tmp~31#1.offset; {6457#true} is VALID [2022-02-20 21:51:43,008 INFO L272 TraceCheckUtils]: 8: Hoare triple {6457#true} call main_#t~ret306#1.base, main_#t~ret306#1.offset := ldv_zalloc(3136); {6476#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:43,008 INFO L290 TraceCheckUtils]: 9: Hoare triple {6476#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {6457#true} is VALID [2022-02-20 21:51:43,008 INFO L290 TraceCheckUtils]: 10: Hoare triple {6457#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {6457#true} is VALID [2022-02-20 21:51:43,008 INFO L290 TraceCheckUtils]: 11: Hoare triple {6457#true} assume true; {6457#true} is VALID [2022-02-20 21:51:43,009 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {6457#true} {6457#true} #1205#return; {6457#true} is VALID [2022-02-20 21:51:43,009 INFO L290 TraceCheckUtils]: 13: Hoare triple {6457#true} main_~tmp___0~12#1.base, main_~tmp___0~12#1.offset := main_#t~ret306#1.base, main_#t~ret306#1.offset;havoc main_#t~ret306#1.base, main_#t~ret306#1.offset;main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset := main_~tmp___0~12#1.base, main_~tmp___0~12#1.offset; {6457#true} is VALID [2022-02-20 21:51:43,009 INFO L272 TraceCheckUtils]: 14: Hoare triple {6457#true} call main_#t~ret307#1.base, main_#t~ret307#1.offset := ldv_zalloc(240); {6476#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:43,010 INFO L290 TraceCheckUtils]: 15: Hoare triple {6476#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {6457#true} is VALID [2022-02-20 21:51:43,010 INFO L290 TraceCheckUtils]: 16: Hoare triple {6457#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {6457#true} is VALID [2022-02-20 21:51:43,010 INFO L290 TraceCheckUtils]: 17: Hoare triple {6457#true} assume true; {6457#true} is VALID [2022-02-20 21:51:43,010 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {6457#true} {6457#true} #1207#return; {6457#true} is VALID [2022-02-20 21:51:43,010 INFO L290 TraceCheckUtils]: 19: Hoare triple {6457#true} main_~tmp___1~4#1.base, main_~tmp___1~4#1.offset := main_#t~ret307#1.base, main_#t~ret307#1.offset;havoc main_#t~ret307#1.base, main_#t~ret307#1.offset;main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset := main_~tmp___1~4#1.base, main_~tmp___1~4#1.offset;assume { :begin_inline_ldv_initialize } true; {6457#true} is VALID [2022-02-20 21:51:43,010 INFO L290 TraceCheckUtils]: 20: Hoare triple {6457#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {6457#true} is VALID [2022-02-20 21:51:43,011 INFO L290 TraceCheckUtils]: 21: Hoare triple {6457#true} assume -2147483648 <= main_#t~nondet308#1 && main_#t~nondet308#1 <= 2147483647;main_~tmp___2~2#1 := main_#t~nondet308#1;havoc main_#t~nondet308#1;main_#t~switch309#1 := 0 == main_~tmp___2~2#1; {6457#true} is VALID [2022-02-20 21:51:43,011 INFO L290 TraceCheckUtils]: 22: Hoare triple {6457#true} assume !main_#t~switch309#1;main_#t~switch309#1 := main_#t~switch309#1 || 1 == main_~tmp___2~2#1; {6457#true} is VALID [2022-02-20 21:51:43,011 INFO L290 TraceCheckUtils]: 23: Hoare triple {6457#true} assume main_#t~switch309#1; {6457#true} is VALID [2022-02-20 21:51:43,011 INFO L290 TraceCheckUtils]: 24: Hoare triple {6457#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet313#1 && main_#t~nondet313#1 <= 2147483647;main_~tmp___4~0#1 := main_#t~nondet313#1;havoc main_#t~nondet313#1;main_#t~switch314#1 := 0 == main_~tmp___4~0#1; {6457#true} is VALID [2022-02-20 21:51:43,011 INFO L290 TraceCheckUtils]: 25: Hoare triple {6457#true} assume !main_#t~switch314#1;main_#t~switch314#1 := main_#t~switch314#1 || 1 == main_~tmp___4~0#1; {6457#true} is VALID [2022-02-20 21:51:43,012 INFO L290 TraceCheckUtils]: 26: Hoare triple {6457#true} assume main_#t~switch314#1; {6457#true} is VALID [2022-02-20 21:51:43,012 INFO L290 TraceCheckUtils]: 27: Hoare triple {6457#true} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_ipheth_driver_init } true;havoc ipheth_driver_init_#res#1;havoc ipheth_driver_init_#t~ret302#1, ipheth_driver_init_~tmp~28#1;havoc ipheth_driver_init_~tmp~28#1;assume { :begin_inline_ldv_usb_register_driver_19 } true;ldv_usb_register_driver_19_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_19_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_19_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg3#1.offset := ~#ipheth_driver~0.base, ~#ipheth_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 36, 0;havoc ldv_usb_register_driver_19_#res#1;havoc ldv_usb_register_driver_19_#t~ret333#1, ldv_usb_register_driver_19_~ldv_func_arg1#1.base, ldv_usb_register_driver_19_~ldv_func_arg1#1.offset, ldv_usb_register_driver_19_~ldv_func_arg2#1.base, ldv_usb_register_driver_19_~ldv_func_arg2#1.offset, ldv_usb_register_driver_19_~ldv_func_arg3#1.base, ldv_usb_register_driver_19_~ldv_func_arg3#1.offset, ldv_usb_register_driver_19_~ldv_func_res~1#1, ldv_usb_register_driver_19_~tmp~39#1;ldv_usb_register_driver_19_~ldv_func_arg1#1.base, ldv_usb_register_driver_19_~ldv_func_arg1#1.offset := ldv_usb_register_driver_19_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_19_~ldv_func_arg2#1.base, ldv_usb_register_driver_19_~ldv_func_arg2#1.offset := ldv_usb_register_driver_19_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_19_~ldv_func_arg3#1.base, ldv_usb_register_driver_19_~ldv_func_arg3#1.offset := ldv_usb_register_driver_19_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_19_~ldv_func_res~1#1;havoc ldv_usb_register_driver_19_~tmp~39#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_19_~ldv_func_arg1#1.base, ldv_usb_register_driver_19_~ldv_func_arg1#1.offset, ldv_usb_register_driver_19_~ldv_func_arg2#1.base, ldv_usb_register_driver_19_~ldv_func_arg2#1.offset, ldv_usb_register_driver_19_~ldv_func_arg3#1.base, ldv_usb_register_driver_19_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet365#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet365#1 && usb_register_driver_#t~nondet365#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet365#1;havoc usb_register_driver_#t~nondet365#1; {6457#true} is VALID [2022-02-20 21:51:43,012 INFO L290 TraceCheckUtils]: 28: Hoare triple {6457#true} ldv_usb_register_driver_19_#t~ret333#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_19_#t~ret333#1 && ldv_usb_register_driver_19_#t~ret333#1 <= 2147483647;ldv_usb_register_driver_19_~tmp~39#1 := ldv_usb_register_driver_19_#t~ret333#1;havoc ldv_usb_register_driver_19_#t~ret333#1;ldv_usb_register_driver_19_~ldv_func_res~1#1 := ldv_usb_register_driver_19_~tmp~39#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret303#1.base, ldv_usb_driver_1_#t~ret303#1.offset, ldv_usb_driver_1_~tmp~29#1.base, ldv_usb_driver_1_~tmp~29#1.offset;havoc ldv_usb_driver_1_~tmp~29#1.base, ldv_usb_driver_1_~tmp~29#1.offset; {6457#true} is VALID [2022-02-20 21:51:43,016 INFO L272 TraceCheckUtils]: 29: Hoare triple {6457#true} call ldv_usb_driver_1_#t~ret303#1.base, ldv_usb_driver_1_#t~ret303#1.offset := ldv_zalloc(1520); {6476#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:43,016 INFO L290 TraceCheckUtils]: 30: Hoare triple {6476#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {6457#true} is VALID [2022-02-20 21:51:43,016 INFO L290 TraceCheckUtils]: 31: Hoare triple {6457#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {6457#true} is VALID [2022-02-20 21:51:43,017 INFO L290 TraceCheckUtils]: 32: Hoare triple {6457#true} assume true; {6457#true} is VALID [2022-02-20 21:51:43,017 INFO L284 TraceCheckUtils]: 33: Hoare quadruple {6457#true} {6457#true} #1261#return; {6457#true} is VALID [2022-02-20 21:51:43,017 INFO L290 TraceCheckUtils]: 34: Hoare triple {6457#true} ldv_usb_driver_1_~tmp~29#1.base, ldv_usb_driver_1_~tmp~29#1.offset := ldv_usb_driver_1_#t~ret303#1.base, ldv_usb_driver_1_#t~ret303#1.offset;havoc ldv_usb_driver_1_#t~ret303#1.base, ldv_usb_driver_1_#t~ret303#1.offset;~ipheth_driver_group1~0.base, ~ipheth_driver_group1~0.offset := ldv_usb_driver_1_~tmp~29#1.base, ldv_usb_driver_1_~tmp~29#1.offset; {6457#true} is VALID [2022-02-20 21:51:43,017 INFO L290 TraceCheckUtils]: 35: Hoare triple {6457#true} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_19_#res#1 := ldv_usb_register_driver_19_~ldv_func_res~1#1; {6457#true} is VALID [2022-02-20 21:51:43,018 INFO L290 TraceCheckUtils]: 36: Hoare triple {6457#true} ipheth_driver_init_#t~ret302#1 := ldv_usb_register_driver_19_#res#1;assume { :end_inline_ldv_usb_register_driver_19 } true;assume -2147483648 <= ipheth_driver_init_#t~ret302#1 && ipheth_driver_init_#t~ret302#1 <= 2147483647;ipheth_driver_init_~tmp~28#1 := ipheth_driver_init_#t~ret302#1;havoc ipheth_driver_init_#t~ret302#1;ipheth_driver_init_#res#1 := ipheth_driver_init_~tmp~28#1; {6457#true} is VALID [2022-02-20 21:51:43,018 INFO L290 TraceCheckUtils]: 37: Hoare triple {6457#true} main_#t~ret315#1 := ipheth_driver_init_#res#1;assume { :end_inline_ipheth_driver_init } true;assume -2147483648 <= main_#t~ret315#1 && main_#t~ret315#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret315#1;havoc main_#t~ret315#1; {6457#true} is VALID [2022-02-20 21:51:43,027 INFO L290 TraceCheckUtils]: 38: Hoare triple {6457#true} assume 0 == ~ldv_retval_1~0;~ldv_state_variable_0~0 := 3; {6475#(= ~ldv_retval_1~0 0)} is VALID [2022-02-20 21:51:43,028 INFO L290 TraceCheckUtils]: 39: Hoare triple {6475#(= ~ldv_retval_1~0 0)} assume 0 != ~ldv_retval_1~0;~ldv_state_variable_0~0 := 2; {6458#false} is VALID [2022-02-20 21:51:43,028 INFO L290 TraceCheckUtils]: 40: Hoare triple {6458#false} assume { :begin_inline_ldv_check_final_state } true; {6458#false} is VALID [2022-02-20 21:51:43,028 INFO L290 TraceCheckUtils]: 41: Hoare triple {6458#false} assume !(0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616); {6458#false} is VALID [2022-02-20 21:51:43,028 INFO L272 TraceCheckUtils]: 42: Hoare triple {6458#false} call ldv_error(); {6458#false} is VALID [2022-02-20 21:51:43,028 INFO L290 TraceCheckUtils]: 43: Hoare triple {6458#false} assume !false; {6458#false} is VALID [2022-02-20 21:51:43,029 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-02-20 21:51:43,029 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:51:43,029 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1180814610] [2022-02-20 21:51:43,029 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1180814610] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:51:43,029 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:51:43,029 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-02-20 21:51:43,029 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1667675717] [2022-02-20 21:51:43,029 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:51:43,031 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 44 [2022-02-20 21:51:43,031 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:51:43,031 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 21:51:43,081 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 35 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:51:43,081 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-02-20 21:51:43,082 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:51:43,082 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-02-20 21:51:43,082 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-02-20 21:51:43,082 INFO L87 Difference]: Start difference. First operand 992 states and 1307 transitions. Second operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 21:51:44,954 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:51:44,954 INFO L93 Difference]: Finished difference Result 1106 states and 1483 transitions. [2022-02-20 21:51:44,955 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-02-20 21:51:44,955 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 44 [2022-02-20 21:51:44,956 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:51:44,956 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 21:51:44,964 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 783 transitions. [2022-02-20 21:51:44,965 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 21:51:44,972 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 783 transitions. [2022-02-20 21:51:44,973 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 783 transitions. [2022-02-20 21:51:45,569 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 783 edges. 783 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:51:45,625 INFO L225 Difference]: With dead ends: 1106 [2022-02-20 21:51:45,625 INFO L226 Difference]: Without dead ends: 1093 [2022-02-20 21:51:45,629 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-02-20 21:51:45,631 INFO L933 BasicCegarLoop]: 640 mSDtfsCounter, 800 mSDsluCounter, 292 mSDsCounter, 0 mSdLazyCounter, 197 mSolverCounterSat, 207 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 853 SdHoareTripleChecker+Valid, 932 SdHoareTripleChecker+Invalid, 404 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 207 IncrementalHoareTripleChecker+Valid, 197 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-02-20 21:51:45,631 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [853 Valid, 932 Invalid, 404 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [207 Valid, 197 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-02-20 21:51:45,634 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1093 states. [2022-02-20 21:51:45,666 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1093 to 992. [2022-02-20 21:51:45,666 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:51:45,668 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1093 states. Second operand has 992 states, 738 states have (on average 1.2750677506775068) internal successors, (941), 754 states have internal predecessors, (941), 185 states have call successors, (185), 69 states have call predecessors, (185), 68 states have return successors, (180), 174 states have call predecessors, (180), 180 states have call successors, (180) [2022-02-20 21:51:45,670 INFO L74 IsIncluded]: Start isIncluded. First operand 1093 states. Second operand has 992 states, 738 states have (on average 1.2750677506775068) internal successors, (941), 754 states have internal predecessors, (941), 185 states have call successors, (185), 69 states have call predecessors, (185), 68 states have return successors, (180), 174 states have call predecessors, (180), 180 states have call successors, (180) [2022-02-20 21:51:45,671 INFO L87 Difference]: Start difference. First operand 1093 states. Second operand has 992 states, 738 states have (on average 1.2750677506775068) internal successors, (941), 754 states have internal predecessors, (941), 185 states have call successors, (185), 69 states have call predecessors, (185), 68 states have return successors, (180), 174 states have call predecessors, (180), 180 states have call successors, (180) [2022-02-20 21:51:45,715 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:51:45,715 INFO L93 Difference]: Finished difference Result 1093 states and 1466 transitions. [2022-02-20 21:51:45,715 INFO L276 IsEmpty]: Start isEmpty. Operand 1093 states and 1466 transitions. [2022-02-20 21:51:45,720 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:51:45,720 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:51:45,722 INFO L74 IsIncluded]: Start isIncluded. First operand has 992 states, 738 states have (on average 1.2750677506775068) internal successors, (941), 754 states have internal predecessors, (941), 185 states have call successors, (185), 69 states have call predecessors, (185), 68 states have return successors, (180), 174 states have call predecessors, (180), 180 states have call successors, (180) Second operand 1093 states. [2022-02-20 21:51:45,724 INFO L87 Difference]: Start difference. First operand has 992 states, 738 states have (on average 1.2750677506775068) internal successors, (941), 754 states have internal predecessors, (941), 185 states have call successors, (185), 69 states have call predecessors, (185), 68 states have return successors, (180), 174 states have call predecessors, (180), 180 states have call successors, (180) Second operand 1093 states. [2022-02-20 21:51:45,767 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:51:45,767 INFO L93 Difference]: Finished difference Result 1093 states and 1466 transitions. [2022-02-20 21:51:45,767 INFO L276 IsEmpty]: Start isEmpty. Operand 1093 states and 1466 transitions. [2022-02-20 21:51:45,770 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:51:45,770 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:51:45,770 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:51:45,770 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:51:45,773 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 992 states, 738 states have (on average 1.2750677506775068) internal successors, (941), 754 states have internal predecessors, (941), 185 states have call successors, (185), 69 states have call predecessors, (185), 68 states have return successors, (180), 174 states have call predecessors, (180), 180 states have call successors, (180) [2022-02-20 21:51:45,820 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 992 states to 992 states and 1306 transitions. [2022-02-20 21:51:45,820 INFO L78 Accepts]: Start accepts. Automaton has 992 states and 1306 transitions. Word has length 44 [2022-02-20 21:51:45,820 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:51:45,821 INFO L470 AbstractCegarLoop]: Abstraction has 992 states and 1306 transitions. [2022-02-20 21:51:45,824 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 21:51:45,824 INFO L276 IsEmpty]: Start isEmpty. Operand 992 states and 1306 transitions. [2022-02-20 21:51:45,826 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2022-02-20 21:51:45,826 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:51:45,827 INFO L514 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:51:45,827 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-02-20 21:51:45,827 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:51:45,827 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:51:45,827 INFO L85 PathProgramCache]: Analyzing trace with hash -349147365, now seen corresponding path program 1 times [2022-02-20 21:51:45,828 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:51:45,828 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [916566414] [2022-02-20 21:51:45,828 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:51:45,828 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:51:45,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:45,958 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 21:51:45,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:45,969 INFO L290 TraceCheckUtils]: 0: Hoare triple {11673#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {11654#true} is VALID [2022-02-20 21:51:45,969 INFO L290 TraceCheckUtils]: 1: Hoare triple {11654#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {11654#true} is VALID [2022-02-20 21:51:45,969 INFO L290 TraceCheckUtils]: 2: Hoare triple {11654#true} assume true; {11654#true} is VALID [2022-02-20 21:51:45,970 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11654#true} {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #1203#return; {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:45,971 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-02-20 21:51:45,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:45,981 INFO L290 TraceCheckUtils]: 0: Hoare triple {11673#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {11654#true} is VALID [2022-02-20 21:51:45,981 INFO L290 TraceCheckUtils]: 1: Hoare triple {11654#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {11654#true} is VALID [2022-02-20 21:51:45,981 INFO L290 TraceCheckUtils]: 2: Hoare triple {11654#true} assume true; {11654#true} is VALID [2022-02-20 21:51:45,982 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11654#true} {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #1205#return; {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:45,982 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2022-02-20 21:51:45,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:45,992 INFO L290 TraceCheckUtils]: 0: Hoare triple {11673#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {11654#true} is VALID [2022-02-20 21:51:45,993 INFO L290 TraceCheckUtils]: 1: Hoare triple {11654#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {11654#true} is VALID [2022-02-20 21:51:45,993 INFO L290 TraceCheckUtils]: 2: Hoare triple {11654#true} assume true; {11654#true} is VALID [2022-02-20 21:51:45,994 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11654#true} {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #1207#return; {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:45,995 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 29 [2022-02-20 21:51:45,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:46,006 INFO L290 TraceCheckUtils]: 0: Hoare triple {11673#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {11654#true} is VALID [2022-02-20 21:51:46,014 INFO L290 TraceCheckUtils]: 1: Hoare triple {11654#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {11654#true} is VALID [2022-02-20 21:51:46,016 INFO L290 TraceCheckUtils]: 2: Hoare triple {11654#true} assume true; {11654#true} is VALID [2022-02-20 21:51:46,017 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11654#true} {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #1261#return; {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:46,062 INFO L290 TraceCheckUtils]: 0: Hoare triple {11654#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(80, 2);call #Ultimate.allocInit(26, 3);call #Ultimate.allocInit(63, 4);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(24, 6);call #Ultimate.allocInit(28, 7);call #Ultimate.allocInit(24, 8);call #Ultimate.allocInit(20, 9);call #Ultimate.allocInit(24, 10);call #Ultimate.allocInit(25, 11);call #Ultimate.allocInit(19, 12);call #Ultimate.allocInit(25, 13);call #Ultimate.allocInit(19, 14);call #Ultimate.allocInit(45, 15);call #Ultimate.allocInit(19, 16);call #Ultimate.allocInit(24, 17);call #Ultimate.allocInit(17, 18);call #Ultimate.allocInit(217, 19);call #Ultimate.allocInit(29, 20);call #Ultimate.allocInit(10, 21);call #Ultimate.allocInit(24, 22);call #Ultimate.allocInit(10, 23);call #Ultimate.allocInit(16, 24);call #Ultimate.allocInit(18, 25);call #Ultimate.allocInit(6, 26);call write~init~int(101, 26, 0, 1);call write~init~int(116, 26, 1, 1);call write~init~int(104, 26, 2, 1);call write~init~int(37, 26, 3, 1);call write~init~int(100, 26, 4, 1);call write~init~int(0, 26, 5, 1);call #Ultimate.allocInit(45, 27);call #Ultimate.allocInit(26, 28);call #Ultimate.allocInit(30, 29);call #Ultimate.allocInit(31, 30);call #Ultimate.allocInit(27, 31);call #Ultimate.allocInit(30, 32);call #Ultimate.allocInit(43, 33);call #Ultimate.allocInit(44, 34);call #Ultimate.allocInit(7, 35);call write~init~int(105, 35, 0, 1);call write~init~int(112, 35, 1, 1);call write~init~int(104, 35, 2, 1);call write~init~int(101, 35, 3, 1);call write~init~int(116, 35, 4, 1);call write~init~int(104, 35, 5, 1);call write~init~int(0, 35, 6, 1);call #Ultimate.allocInit(7, 36);call write~init~int(105, 36, 0, 1);call write~init~int(112, 36, 1, 1);call write~init~int(104, 36, 2, 1);call write~init~int(101, 36, 3, 1);call write~init~int(116, 36, 4, 1);call write~init~int(104, 36, 5, 1);call write~init~int(0, 36, 6, 1);~ldv_state_variable_3~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_2~0 := 0;~ipheth_netdev_ops_group1~0.base, ~ipheth_netdev_ops_group1~0.offset := 0, 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~ipheth_driver_group1~0.base, ~ipheth_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#ipheth_table~0.base, ~#ipheth_table~0.offset := 37, 0;call #Ultimate.allocInit(250, 37);call write~init~int(899, ~#ipheth_table~0.base, ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 2 + ~#ipheth_table~0.offset, 2);call write~init~int(4752, ~#ipheth_table~0.base, 4 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 6 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 8 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 10 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 11 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 12 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 13 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 14 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 15 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 16 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 17 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 25 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 27 + ~#ipheth_table~0.offset, 2);call write~init~int(4754, ~#ipheth_table~0.base, 29 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 31 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 33 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 35 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 36 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 37 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 38 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 39 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 40 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 41 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 42 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 50 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 52 + ~#ipheth_table~0.offset, 2);call write~init~int(4756, ~#ipheth_table~0.base, 54 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 56 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 58 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 60 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 61 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 62 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 63 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 64 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 65 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 66 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 67 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 75 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 77 + ~#ipheth_table~0.offset, 2);call write~init~int(4759, ~#ipheth_table~0.base, 79 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 81 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 83 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 85 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 86 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 87 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 88 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 89 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 90 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 91 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 92 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 100 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 102 + ~#ipheth_table~0.offset, 2);call write~init~int(4762, ~#ipheth_table~0.base, 104 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 106 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 108 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 110 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 111 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 112 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 113 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 114 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 115 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 116 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 117 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 125 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 127 + ~#ipheth_table~0.offset, 2);call write~init~int(4779, ~#ipheth_table~0.base, 129 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 131 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 133 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 135 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 136 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 137 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 138 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 139 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 140 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 141 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 142 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 150 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 152 + ~#ipheth_table~0.offset, 2);call write~init~int(4764, ~#ipheth_table~0.base, 154 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 156 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 158 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 160 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 161 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 162 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 163 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 164 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 165 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 166 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 167 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 175 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 177 + ~#ipheth_table~0.offset, 2);call write~init~int(4768, ~#ipheth_table~0.base, 179 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 181 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 183 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 185 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 186 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 187 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 188 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 189 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 190 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 191 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 192 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 200 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 202 + ~#ipheth_table~0.offset, 2);call write~init~int(4776, ~#ipheth_table~0.base, 204 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 206 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 208 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 210 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 211 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 212 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 213 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 214 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 215 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 216 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 217 + ~#ipheth_table~0.offset, 8);call write~init~int(0, ~#ipheth_table~0.base, 225 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 227 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 229 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 231 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 233 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 235 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 236 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 237 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 238 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 239 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 240 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 241 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 242 + ~#ipheth_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.bInterfaceNumber := 0;~__mod_usb_device_table~0.driver_info := 0;~#ipheth_netdev_ops~0.base, ~#ipheth_netdev_ops~0.offset := 38, 0;call #Ultimate.allocInit(448, 38);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 8 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_open.base, #funAddr~ipheth_open.offset, ~#ipheth_netdev_ops~0.base, 16 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_close.base, #funAddr~ipheth_close.offset, ~#ipheth_netdev_ops~0.base, 24 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_tx.base, #funAddr~ipheth_tx.offset, ~#ipheth_netdev_ops~0.base, 32 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 40 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 48 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 56 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 64 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 72 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 80 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 88 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 96 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 104 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_tx_timeout.base, #funAddr~ipheth_tx_timeout.offset, ~#ipheth_netdev_ops~0.base, 112 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 120 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 128 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 136 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 144 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 152 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 160 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 168 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 176 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 184 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 192 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 200 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 208 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 216 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 224 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 232 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 240 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 248 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 256 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 264 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 272 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 280 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 288 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 296 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 304 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 312 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 320 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 328 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 336 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 344 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 352 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 360 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 368 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 376 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 384 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 392 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 400 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 408 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 416 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 424 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 432 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 440 + ~#ipheth_netdev_ops~0.offset, 8);~#ipheth_driver~0.base, ~#ipheth_driver~0.offset := 39, 0;call #Ultimate.allocInit(285, 39);call write~init~$Pointer$(35, 0, ~#ipheth_driver~0.base, ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_probe.base, #funAddr~ipheth_probe.offset, ~#ipheth_driver~0.base, 8 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_disconnect.base, #funAddr~ipheth_disconnect.offset, ~#ipheth_driver~0.base, 16 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 24 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 32 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 40 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 48 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 56 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 64 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(~#ipheth_table~0.base, ~#ipheth_table~0.offset, ~#ipheth_driver~0.base, 72 + ~#ipheth_driver~0.offset, 8);call write~init~int(0, ~#ipheth_driver~0.base, 80 + ~#ipheth_driver~0.offset, 4);call write~init~int(0, ~#ipheth_driver~0.base, 84 + ~#ipheth_driver~0.offset, 4);call write~init~int(0, ~#ipheth_driver~0.base, 88 + ~#ipheth_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 92 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 100 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 108 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 116 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 124 + ~#ipheth_driver~0.offset, 8);call write~init~int(0, ~#ipheth_driver~0.base, 132 + ~#ipheth_driver~0.offset, 4);call write~init~int(0, ~#ipheth_driver~0.base, 136 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 148 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 156 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 164 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 172 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 180 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 188 + ~#ipheth_driver~0.offset, 8);call write~init~int(0, ~#ipheth_driver~0.base, 196 + ~#ipheth_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 197 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 205 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 213 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 221 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 229 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 237 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 245 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 253 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 261 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 269 + ~#ipheth_driver~0.offset, 8);call write~init~int(0, ~#ipheth_driver~0.base, 277 + ~#ipheth_driver~0.offset, 4);call write~init~int(0, ~#ipheth_driver~0.base, 281 + ~#ipheth_driver~0.offset, 1);call write~init~int(0, ~#ipheth_driver~0.base, 282 + ~#ipheth_driver~0.offset, 1);call write~init~int(1, ~#ipheth_driver~0.base, 283 + ~#ipheth_driver~0.offset, 1);call write~init~int(0, ~#ipheth_driver~0.base, 284 + ~#ipheth_driver~0.offset, 1);~ldv_retval_2~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:46,063 INFO L290 TraceCheckUtils]: 1: Hoare triple {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret305#1.base, main_#t~ret305#1.offset, main_#t~ret306#1.base, main_#t~ret306#1.offset, main_#t~ret307#1.base, main_#t~ret307#1.offset, main_#t~nondet308#1, main_#t~switch309#1, main_#t~nondet310#1, main_#t~switch311#1, main_#t~ret312#1, main_#t~nondet313#1, main_#t~switch314#1, main_#t~ret315#1, main_#t~nondet316#1, main_#t~switch317#1, main_#t~ret318#1, main_#t~nondet319#1, main_#t~switch320#1, main_#t~ret321#1, main_#t~ret322#1, main_#t~ret323#1, main_#t~ret324#1, main_#t~ret325#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~31#1.base, main_~tmp~31#1.offset, main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset, main_~tmp___0~12#1.base, main_~tmp___0~12#1.offset, main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset, main_~tmp___1~4#1.base, main_~tmp___1~4#1.offset, main_~tmp___2~2#1, main_~tmp___3~1#1, main_~tmp___4~0#1, main_~tmp___5~0#1, main_~tmp___6~0#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~31#1.base, main_~tmp~31#1.offset;havoc main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset;havoc main_~tmp___0~12#1.base, main_~tmp___0~12#1.offset;havoc main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset;havoc main_~tmp___1~4#1.base, main_~tmp___1~4#1.offset;havoc main_~tmp___2~2#1;havoc main_~tmp___3~1#1;havoc main_~tmp___4~0#1;havoc main_~tmp___5~0#1;havoc main_~tmp___6~0#1; {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:46,063 INFO L272 TraceCheckUtils]: 2: Hoare triple {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} call main_#t~ret305#1.base, main_#t~ret305#1.offset := ldv_zalloc(32); {11673#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:46,063 INFO L290 TraceCheckUtils]: 3: Hoare triple {11673#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {11654#true} is VALID [2022-02-20 21:51:46,064 INFO L290 TraceCheckUtils]: 4: Hoare triple {11654#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {11654#true} is VALID [2022-02-20 21:51:46,064 INFO L290 TraceCheckUtils]: 5: Hoare triple {11654#true} assume true; {11654#true} is VALID [2022-02-20 21:51:46,064 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {11654#true} {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #1203#return; {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:46,064 INFO L290 TraceCheckUtils]: 7: Hoare triple {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} main_~tmp~31#1.base, main_~tmp~31#1.offset := main_#t~ret305#1.base, main_#t~ret305#1.offset;havoc main_#t~ret305#1.base, main_#t~ret305#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~31#1.base, main_~tmp~31#1.offset; {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:46,065 INFO L272 TraceCheckUtils]: 8: Hoare triple {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} call main_#t~ret306#1.base, main_#t~ret306#1.offset := ldv_zalloc(3136); {11673#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:46,065 INFO L290 TraceCheckUtils]: 9: Hoare triple {11673#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {11654#true} is VALID [2022-02-20 21:51:46,065 INFO L290 TraceCheckUtils]: 10: Hoare triple {11654#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {11654#true} is VALID [2022-02-20 21:51:46,065 INFO L290 TraceCheckUtils]: 11: Hoare triple {11654#true} assume true; {11654#true} is VALID [2022-02-20 21:51:46,066 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {11654#true} {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #1205#return; {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:46,067 INFO L290 TraceCheckUtils]: 13: Hoare triple {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} main_~tmp___0~12#1.base, main_~tmp___0~12#1.offset := main_#t~ret306#1.base, main_#t~ret306#1.offset;havoc main_#t~ret306#1.base, main_#t~ret306#1.offset;main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset := main_~tmp___0~12#1.base, main_~tmp___0~12#1.offset; {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:46,067 INFO L272 TraceCheckUtils]: 14: Hoare triple {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} call main_#t~ret307#1.base, main_#t~ret307#1.offset := ldv_zalloc(240); {11673#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:46,067 INFO L290 TraceCheckUtils]: 15: Hoare triple {11673#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {11654#true} is VALID [2022-02-20 21:51:46,068 INFO L290 TraceCheckUtils]: 16: Hoare triple {11654#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {11654#true} is VALID [2022-02-20 21:51:46,068 INFO L290 TraceCheckUtils]: 17: Hoare triple {11654#true} assume true; {11654#true} is VALID [2022-02-20 21:51:46,068 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {11654#true} {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #1207#return; {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:46,068 INFO L290 TraceCheckUtils]: 19: Hoare triple {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} main_~tmp___1~4#1.base, main_~tmp___1~4#1.offset := main_#t~ret307#1.base, main_#t~ret307#1.offset;havoc main_#t~ret307#1.base, main_#t~ret307#1.offset;main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset := main_~tmp___1~4#1.base, main_~tmp___1~4#1.offset;assume { :begin_inline_ldv_initialize } true; {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:46,069 INFO L290 TraceCheckUtils]: 20: Hoare triple {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:46,069 INFO L290 TraceCheckUtils]: 21: Hoare triple {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume -2147483648 <= main_#t~nondet308#1 && main_#t~nondet308#1 <= 2147483647;main_~tmp___2~2#1 := main_#t~nondet308#1;havoc main_#t~nondet308#1;main_#t~switch309#1 := 0 == main_~tmp___2~2#1; {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:46,070 INFO L290 TraceCheckUtils]: 22: Hoare triple {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume !main_#t~switch309#1;main_#t~switch309#1 := main_#t~switch309#1 || 1 == main_~tmp___2~2#1; {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:46,070 INFO L290 TraceCheckUtils]: 23: Hoare triple {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume main_#t~switch309#1; {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:46,070 INFO L290 TraceCheckUtils]: 24: Hoare triple {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet313#1 && main_#t~nondet313#1 <= 2147483647;main_~tmp___4~0#1 := main_#t~nondet313#1;havoc main_#t~nondet313#1;main_#t~switch314#1 := 0 == main_~tmp___4~0#1; {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:46,071 INFO L290 TraceCheckUtils]: 25: Hoare triple {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume !main_#t~switch314#1;main_#t~switch314#1 := main_#t~switch314#1 || 1 == main_~tmp___4~0#1; {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:46,071 INFO L290 TraceCheckUtils]: 26: Hoare triple {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume main_#t~switch314#1; {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:46,072 INFO L290 TraceCheckUtils]: 27: Hoare triple {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_ipheth_driver_init } true;havoc ipheth_driver_init_#res#1;havoc ipheth_driver_init_#t~ret302#1, ipheth_driver_init_~tmp~28#1;havoc ipheth_driver_init_~tmp~28#1;assume { :begin_inline_ldv_usb_register_driver_19 } true;ldv_usb_register_driver_19_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_19_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_19_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg3#1.offset := ~#ipheth_driver~0.base, ~#ipheth_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 36, 0;havoc ldv_usb_register_driver_19_#res#1;havoc ldv_usb_register_driver_19_#t~ret333#1, ldv_usb_register_driver_19_~ldv_func_arg1#1.base, ldv_usb_register_driver_19_~ldv_func_arg1#1.offset, ldv_usb_register_driver_19_~ldv_func_arg2#1.base, ldv_usb_register_driver_19_~ldv_func_arg2#1.offset, ldv_usb_register_driver_19_~ldv_func_arg3#1.base, ldv_usb_register_driver_19_~ldv_func_arg3#1.offset, ldv_usb_register_driver_19_~ldv_func_res~1#1, ldv_usb_register_driver_19_~tmp~39#1;ldv_usb_register_driver_19_~ldv_func_arg1#1.base, ldv_usb_register_driver_19_~ldv_func_arg1#1.offset := ldv_usb_register_driver_19_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_19_~ldv_func_arg2#1.base, ldv_usb_register_driver_19_~ldv_func_arg2#1.offset := ldv_usb_register_driver_19_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_19_~ldv_func_arg3#1.base, ldv_usb_register_driver_19_~ldv_func_arg3#1.offset := ldv_usb_register_driver_19_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_19_~ldv_func_res~1#1;havoc ldv_usb_register_driver_19_~tmp~39#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_19_~ldv_func_arg1#1.base, ldv_usb_register_driver_19_~ldv_func_arg1#1.offset, ldv_usb_register_driver_19_~ldv_func_arg2#1.base, ldv_usb_register_driver_19_~ldv_func_arg2#1.offset, ldv_usb_register_driver_19_~ldv_func_arg3#1.base, ldv_usb_register_driver_19_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet365#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet365#1 && usb_register_driver_#t~nondet365#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet365#1;havoc usb_register_driver_#t~nondet365#1; {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:46,072 INFO L290 TraceCheckUtils]: 28: Hoare triple {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} ldv_usb_register_driver_19_#t~ret333#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_19_#t~ret333#1 && ldv_usb_register_driver_19_#t~ret333#1 <= 2147483647;ldv_usb_register_driver_19_~tmp~39#1 := ldv_usb_register_driver_19_#t~ret333#1;havoc ldv_usb_register_driver_19_#t~ret333#1;ldv_usb_register_driver_19_~ldv_func_res~1#1 := ldv_usb_register_driver_19_~tmp~39#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret303#1.base, ldv_usb_driver_1_#t~ret303#1.offset, ldv_usb_driver_1_~tmp~29#1.base, ldv_usb_driver_1_~tmp~29#1.offset;havoc ldv_usb_driver_1_~tmp~29#1.base, ldv_usb_driver_1_~tmp~29#1.offset; {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:46,073 INFO L272 TraceCheckUtils]: 29: Hoare triple {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} call ldv_usb_driver_1_#t~ret303#1.base, ldv_usb_driver_1_#t~ret303#1.offset := ldv_zalloc(1520); {11673#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:46,073 INFO L290 TraceCheckUtils]: 30: Hoare triple {11673#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {11654#true} is VALID [2022-02-20 21:51:46,073 INFO L290 TraceCheckUtils]: 31: Hoare triple {11654#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {11654#true} is VALID [2022-02-20 21:51:46,073 INFO L290 TraceCheckUtils]: 32: Hoare triple {11654#true} assume true; {11654#true} is VALID [2022-02-20 21:51:46,074 INFO L284 TraceCheckUtils]: 33: Hoare quadruple {11654#true} {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #1261#return; {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:46,074 INFO L290 TraceCheckUtils]: 34: Hoare triple {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} ldv_usb_driver_1_~tmp~29#1.base, ldv_usb_driver_1_~tmp~29#1.offset := ldv_usb_driver_1_#t~ret303#1.base, ldv_usb_driver_1_#t~ret303#1.offset;havoc ldv_usb_driver_1_#t~ret303#1.base, ldv_usb_driver_1_#t~ret303#1.offset;~ipheth_driver_group1~0.base, ~ipheth_driver_group1~0.offset := ldv_usb_driver_1_~tmp~29#1.base, ldv_usb_driver_1_~tmp~29#1.offset; {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:46,075 INFO L290 TraceCheckUtils]: 35: Hoare triple {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_19_#res#1 := ldv_usb_register_driver_19_~ldv_func_res~1#1; {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:46,075 INFO L290 TraceCheckUtils]: 36: Hoare triple {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} ipheth_driver_init_#t~ret302#1 := ldv_usb_register_driver_19_#res#1;assume { :end_inline_ldv_usb_register_driver_19 } true;assume -2147483648 <= ipheth_driver_init_#t~ret302#1 && ipheth_driver_init_#t~ret302#1 <= 2147483647;ipheth_driver_init_~tmp~28#1 := ipheth_driver_init_#t~ret302#1;havoc ipheth_driver_init_#t~ret302#1;ipheth_driver_init_#res#1 := ipheth_driver_init_~tmp~28#1; {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:46,076 INFO L290 TraceCheckUtils]: 37: Hoare triple {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} main_#t~ret315#1 := ipheth_driver_init_#res#1;assume { :end_inline_ipheth_driver_init } true;assume -2147483648 <= main_#t~ret315#1 && main_#t~ret315#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret315#1;havoc main_#t~ret315#1; {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:46,076 INFO L290 TraceCheckUtils]: 38: Hoare triple {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume !(0 == ~ldv_retval_1~0); {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:46,077 INFO L290 TraceCheckUtils]: 39: Hoare triple {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume 0 != ~ldv_retval_1~0;~ldv_state_variable_0~0 := 2; {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:46,077 INFO L290 TraceCheckUtils]: 40: Hoare triple {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume { :begin_inline_ldv_check_final_state } true; {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 21:51:46,077 INFO L290 TraceCheckUtils]: 41: Hoare triple {11656#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume !(0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616); {11655#false} is VALID [2022-02-20 21:51:46,077 INFO L272 TraceCheckUtils]: 42: Hoare triple {11655#false} call ldv_error(); {11655#false} is VALID [2022-02-20 21:51:46,078 INFO L290 TraceCheckUtils]: 43: Hoare triple {11655#false} assume !false; {11655#false} is VALID [2022-02-20 21:51:46,078 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-02-20 21:51:46,079 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:51:46,079 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [916566414] [2022-02-20 21:51:46,079 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [916566414] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:51:46,079 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:51:46,079 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-02-20 21:51:46,079 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2047343419] [2022-02-20 21:51:46,079 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:51:46,080 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 44 [2022-02-20 21:51:46,081 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:51:46,081 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 21:51:46,122 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 35 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:51:46,123 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-02-20 21:51:46,123 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:51:46,123 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-02-20 21:51:46,123 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-02-20 21:51:46,123 INFO L87 Difference]: Start difference. First operand 992 states and 1306 transitions. Second operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 21:51:48,917 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:51:48,917 INFO L93 Difference]: Finished difference Result 3133 states and 4280 transitions. [2022-02-20 21:51:48,917 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-02-20 21:51:48,918 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 44 [2022-02-20 21:51:48,918 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:51:48,918 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 21:51:48,946 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 2196 transitions. [2022-02-20 21:51:48,947 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 21:51:48,970 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 2196 transitions. [2022-02-20 21:51:48,970 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 2196 transitions. [2022-02-20 21:51:50,613 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2196 edges. 2196 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:51:50,826 INFO L225 Difference]: With dead ends: 3133 [2022-02-20 21:51:50,827 INFO L226 Difference]: Without dead ends: 2150 [2022-02-20 21:51:50,831 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-02-20 21:51:50,834 INFO L933 BasicCegarLoop]: 729 mSDtfsCounter, 969 mSDsluCounter, 743 mSDsCounter, 0 mSdLazyCounter, 535 mSolverCounterSat, 316 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1036 SdHoareTripleChecker+Valid, 1472 SdHoareTripleChecker+Invalid, 851 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 316 IncrementalHoareTripleChecker+Valid, 535 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-02-20 21:51:50,837 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1036 Valid, 1472 Invalid, 851 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [316 Valid, 535 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2022-02-20 21:51:50,839 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2150 states. [2022-02-20 21:51:50,883 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2150 to 2000. [2022-02-20 21:51:50,883 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:51:50,887 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2150 states. Second operand has 2000 states, 1487 states have (on average 1.2703429724277069) internal successors, (1889), 1519 states have internal predecessors, (1889), 366 states have call successors, (366), 137 states have call predecessors, (366), 146 states have return successors, (415), 355 states have call predecessors, (415), 361 states have call successors, (415) [2022-02-20 21:51:50,890 INFO L74 IsIncluded]: Start isIncluded. First operand 2150 states. Second operand has 2000 states, 1487 states have (on average 1.2703429724277069) internal successors, (1889), 1519 states have internal predecessors, (1889), 366 states have call successors, (366), 137 states have call predecessors, (366), 146 states have return successors, (415), 355 states have call predecessors, (415), 361 states have call successors, (415) [2022-02-20 21:51:50,924 INFO L87 Difference]: Start difference. First operand 2150 states. Second operand has 2000 states, 1487 states have (on average 1.2703429724277069) internal successors, (1889), 1519 states have internal predecessors, (1889), 366 states have call successors, (366), 137 states have call predecessors, (366), 146 states have return successors, (415), 355 states have call predecessors, (415), 361 states have call successors, (415) [2022-02-20 21:51:51,086 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:51:51,086 INFO L93 Difference]: Finished difference Result 2150 states and 2923 transitions. [2022-02-20 21:51:51,086 INFO L276 IsEmpty]: Start isEmpty. Operand 2150 states and 2923 transitions. [2022-02-20 21:51:51,093 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:51:51,093 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:51:51,109 INFO L74 IsIncluded]: Start isIncluded. First operand has 2000 states, 1487 states have (on average 1.2703429724277069) internal successors, (1889), 1519 states have internal predecessors, (1889), 366 states have call successors, (366), 137 states have call predecessors, (366), 146 states have return successors, (415), 355 states have call predecessors, (415), 361 states have call successors, (415) Second operand 2150 states. [2022-02-20 21:51:51,115 INFO L87 Difference]: Start difference. First operand has 2000 states, 1487 states have (on average 1.2703429724277069) internal successors, (1889), 1519 states have internal predecessors, (1889), 366 states have call successors, (366), 137 states have call predecessors, (366), 146 states have return successors, (415), 355 states have call predecessors, (415), 361 states have call successors, (415) Second operand 2150 states. [2022-02-20 21:51:51,274 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:51:51,274 INFO L93 Difference]: Finished difference Result 2150 states and 2923 transitions. [2022-02-20 21:51:51,274 INFO L276 IsEmpty]: Start isEmpty. Operand 2150 states and 2923 transitions. [2022-02-20 21:51:51,280 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:51:51,281 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:51:51,281 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:51:51,281 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:51:51,284 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2000 states, 1487 states have (on average 1.2703429724277069) internal successors, (1889), 1519 states have internal predecessors, (1889), 366 states have call successors, (366), 137 states have call predecessors, (366), 146 states have return successors, (415), 355 states have call predecessors, (415), 361 states have call successors, (415) [2022-02-20 21:51:51,480 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2000 states to 2000 states and 2670 transitions. [2022-02-20 21:51:51,481 INFO L78 Accepts]: Start accepts. Automaton has 2000 states and 2670 transitions. Word has length 44 [2022-02-20 21:51:51,481 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:51:51,481 INFO L470 AbstractCegarLoop]: Abstraction has 2000 states and 2670 transitions. [2022-02-20 21:51:51,482 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 21:51:51,482 INFO L276 IsEmpty]: Start isEmpty. Operand 2000 states and 2670 transitions. [2022-02-20 21:51:51,482 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2022-02-20 21:51:51,483 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:51:51,483 INFO L514 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:51:51,483 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-02-20 21:51:51,483 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:51:51,484 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:51:51,484 INFO L85 PathProgramCache]: Analyzing trace with hash 2061086592, now seen corresponding path program 1 times [2022-02-20 21:51:51,484 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:51:51,484 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [752927351] [2022-02-20 21:51:51,484 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:51:51,484 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:51:51,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:51,582 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 21:51:51,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:51,591 INFO L290 TraceCheckUtils]: 0: Hoare triple {23293#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {23274#true} is VALID [2022-02-20 21:51:51,592 INFO L290 TraceCheckUtils]: 1: Hoare triple {23274#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {23274#true} is VALID [2022-02-20 21:51:51,592 INFO L290 TraceCheckUtils]: 2: Hoare triple {23274#true} assume true; {23274#true} is VALID [2022-02-20 21:51:51,592 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {23274#true} {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #1203#return; {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:51,593 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-02-20 21:51:51,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:51,601 INFO L290 TraceCheckUtils]: 0: Hoare triple {23293#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {23274#true} is VALID [2022-02-20 21:51:51,601 INFO L290 TraceCheckUtils]: 1: Hoare triple {23274#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {23274#true} is VALID [2022-02-20 21:51:51,601 INFO L290 TraceCheckUtils]: 2: Hoare triple {23274#true} assume true; {23274#true} is VALID [2022-02-20 21:51:51,602 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {23274#true} {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #1205#return; {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:51,602 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2022-02-20 21:51:51,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:51,614 INFO L290 TraceCheckUtils]: 0: Hoare triple {23293#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {23274#true} is VALID [2022-02-20 21:51:51,615 INFO L290 TraceCheckUtils]: 1: Hoare triple {23274#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {23274#true} is VALID [2022-02-20 21:51:51,615 INFO L290 TraceCheckUtils]: 2: Hoare triple {23274#true} assume true; {23274#true} is VALID [2022-02-20 21:51:51,616 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {23274#true} {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #1207#return; {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:51,616 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 29 [2022-02-20 21:51:51,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:51,623 INFO L290 TraceCheckUtils]: 0: Hoare triple {23293#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {23274#true} is VALID [2022-02-20 21:51:51,624 INFO L290 TraceCheckUtils]: 1: Hoare triple {23274#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {23274#true} is VALID [2022-02-20 21:51:51,624 INFO L290 TraceCheckUtils]: 2: Hoare triple {23274#true} assume true; {23274#true} is VALID [2022-02-20 21:51:51,624 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {23274#true} {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #1261#return; {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:51,633 INFO L290 TraceCheckUtils]: 0: Hoare triple {23274#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(80, 2);call #Ultimate.allocInit(26, 3);call #Ultimate.allocInit(63, 4);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(24, 6);call #Ultimate.allocInit(28, 7);call #Ultimate.allocInit(24, 8);call #Ultimate.allocInit(20, 9);call #Ultimate.allocInit(24, 10);call #Ultimate.allocInit(25, 11);call #Ultimate.allocInit(19, 12);call #Ultimate.allocInit(25, 13);call #Ultimate.allocInit(19, 14);call #Ultimate.allocInit(45, 15);call #Ultimate.allocInit(19, 16);call #Ultimate.allocInit(24, 17);call #Ultimate.allocInit(17, 18);call #Ultimate.allocInit(217, 19);call #Ultimate.allocInit(29, 20);call #Ultimate.allocInit(10, 21);call #Ultimate.allocInit(24, 22);call #Ultimate.allocInit(10, 23);call #Ultimate.allocInit(16, 24);call #Ultimate.allocInit(18, 25);call #Ultimate.allocInit(6, 26);call write~init~int(101, 26, 0, 1);call write~init~int(116, 26, 1, 1);call write~init~int(104, 26, 2, 1);call write~init~int(37, 26, 3, 1);call write~init~int(100, 26, 4, 1);call write~init~int(0, 26, 5, 1);call #Ultimate.allocInit(45, 27);call #Ultimate.allocInit(26, 28);call #Ultimate.allocInit(30, 29);call #Ultimate.allocInit(31, 30);call #Ultimate.allocInit(27, 31);call #Ultimate.allocInit(30, 32);call #Ultimate.allocInit(43, 33);call #Ultimate.allocInit(44, 34);call #Ultimate.allocInit(7, 35);call write~init~int(105, 35, 0, 1);call write~init~int(112, 35, 1, 1);call write~init~int(104, 35, 2, 1);call write~init~int(101, 35, 3, 1);call write~init~int(116, 35, 4, 1);call write~init~int(104, 35, 5, 1);call write~init~int(0, 35, 6, 1);call #Ultimate.allocInit(7, 36);call write~init~int(105, 36, 0, 1);call write~init~int(112, 36, 1, 1);call write~init~int(104, 36, 2, 1);call write~init~int(101, 36, 3, 1);call write~init~int(116, 36, 4, 1);call write~init~int(104, 36, 5, 1);call write~init~int(0, 36, 6, 1);~ldv_state_variable_3~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_2~0 := 0;~ipheth_netdev_ops_group1~0.base, ~ipheth_netdev_ops_group1~0.offset := 0, 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~ipheth_driver_group1~0.base, ~ipheth_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#ipheth_table~0.base, ~#ipheth_table~0.offset := 37, 0;call #Ultimate.allocInit(250, 37);call write~init~int(899, ~#ipheth_table~0.base, ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 2 + ~#ipheth_table~0.offset, 2);call write~init~int(4752, ~#ipheth_table~0.base, 4 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 6 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 8 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 10 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 11 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 12 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 13 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 14 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 15 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 16 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 17 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 25 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 27 + ~#ipheth_table~0.offset, 2);call write~init~int(4754, ~#ipheth_table~0.base, 29 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 31 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 33 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 35 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 36 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 37 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 38 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 39 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 40 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 41 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 42 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 50 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 52 + ~#ipheth_table~0.offset, 2);call write~init~int(4756, ~#ipheth_table~0.base, 54 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 56 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 58 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 60 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 61 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 62 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 63 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 64 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 65 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 66 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 67 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 75 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 77 + ~#ipheth_table~0.offset, 2);call write~init~int(4759, ~#ipheth_table~0.base, 79 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 81 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 83 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 85 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 86 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 87 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 88 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 89 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 90 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 91 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 92 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 100 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 102 + ~#ipheth_table~0.offset, 2);call write~init~int(4762, ~#ipheth_table~0.base, 104 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 106 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 108 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 110 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 111 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 112 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 113 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 114 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 115 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 116 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 117 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 125 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 127 + ~#ipheth_table~0.offset, 2);call write~init~int(4779, ~#ipheth_table~0.base, 129 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 131 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 133 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 135 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 136 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 137 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 138 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 139 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 140 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 141 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 142 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 150 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 152 + ~#ipheth_table~0.offset, 2);call write~init~int(4764, ~#ipheth_table~0.base, 154 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 156 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 158 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 160 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 161 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 162 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 163 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 164 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 165 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 166 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 167 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 175 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 177 + ~#ipheth_table~0.offset, 2);call write~init~int(4768, ~#ipheth_table~0.base, 179 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 181 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 183 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 185 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 186 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 187 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 188 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 189 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 190 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 191 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 192 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 200 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 202 + ~#ipheth_table~0.offset, 2);call write~init~int(4776, ~#ipheth_table~0.base, 204 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 206 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 208 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 210 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 211 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 212 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 213 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 214 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 215 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 216 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 217 + ~#ipheth_table~0.offset, 8);call write~init~int(0, ~#ipheth_table~0.base, 225 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 227 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 229 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 231 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 233 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 235 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 236 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 237 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 238 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 239 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 240 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 241 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 242 + ~#ipheth_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.bInterfaceNumber := 0;~__mod_usb_device_table~0.driver_info := 0;~#ipheth_netdev_ops~0.base, ~#ipheth_netdev_ops~0.offset := 38, 0;call #Ultimate.allocInit(448, 38);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 8 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_open.base, #funAddr~ipheth_open.offset, ~#ipheth_netdev_ops~0.base, 16 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_close.base, #funAddr~ipheth_close.offset, ~#ipheth_netdev_ops~0.base, 24 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_tx.base, #funAddr~ipheth_tx.offset, ~#ipheth_netdev_ops~0.base, 32 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 40 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 48 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 56 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 64 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 72 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 80 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 88 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 96 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 104 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_tx_timeout.base, #funAddr~ipheth_tx_timeout.offset, ~#ipheth_netdev_ops~0.base, 112 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 120 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 128 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 136 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 144 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 152 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 160 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 168 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 176 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 184 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 192 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 200 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 208 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 216 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 224 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 232 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 240 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 248 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 256 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 264 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 272 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 280 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 288 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 296 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 304 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 312 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 320 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 328 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 336 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 344 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 352 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 360 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 368 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 376 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 384 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 392 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 400 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 408 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 416 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 424 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 432 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 440 + ~#ipheth_netdev_ops~0.offset, 8);~#ipheth_driver~0.base, ~#ipheth_driver~0.offset := 39, 0;call #Ultimate.allocInit(285, 39);call write~init~$Pointer$(35, 0, ~#ipheth_driver~0.base, ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_probe.base, #funAddr~ipheth_probe.offset, ~#ipheth_driver~0.base, 8 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_disconnect.base, #funAddr~ipheth_disconnect.offset, ~#ipheth_driver~0.base, 16 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 24 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 32 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 40 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 48 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 56 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 64 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(~#ipheth_table~0.base, ~#ipheth_table~0.offset, ~#ipheth_driver~0.base, 72 + ~#ipheth_driver~0.offset, 8);call write~init~int(0, ~#ipheth_driver~0.base, 80 + ~#ipheth_driver~0.offset, 4);call write~init~int(0, ~#ipheth_driver~0.base, 84 + ~#ipheth_driver~0.offset, 4);call write~init~int(0, ~#ipheth_driver~0.base, 88 + ~#ipheth_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 92 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 100 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 108 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 116 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 124 + ~#ipheth_driver~0.offset, 8);call write~init~int(0, ~#ipheth_driver~0.base, 132 + ~#ipheth_driver~0.offset, 4);call write~init~int(0, ~#ipheth_driver~0.base, 136 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 148 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 156 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 164 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 172 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 180 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 188 + ~#ipheth_driver~0.offset, 8);call write~init~int(0, ~#ipheth_driver~0.base, 196 + ~#ipheth_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 197 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 205 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 213 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 221 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 229 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 237 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 245 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 253 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 261 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 269 + ~#ipheth_driver~0.offset, 8);call write~init~int(0, ~#ipheth_driver~0.base, 277 + ~#ipheth_driver~0.offset, 4);call write~init~int(0, ~#ipheth_driver~0.base, 281 + ~#ipheth_driver~0.offset, 1);call write~init~int(0, ~#ipheth_driver~0.base, 282 + ~#ipheth_driver~0.offset, 1);call write~init~int(1, ~#ipheth_driver~0.base, 283 + ~#ipheth_driver~0.offset, 1);call write~init~int(0, ~#ipheth_driver~0.base, 284 + ~#ipheth_driver~0.offset, 1);~ldv_retval_2~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:51,634 INFO L290 TraceCheckUtils]: 1: Hoare triple {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret305#1.base, main_#t~ret305#1.offset, main_#t~ret306#1.base, main_#t~ret306#1.offset, main_#t~ret307#1.base, main_#t~ret307#1.offset, main_#t~nondet308#1, main_#t~switch309#1, main_#t~nondet310#1, main_#t~switch311#1, main_#t~ret312#1, main_#t~nondet313#1, main_#t~switch314#1, main_#t~ret315#1, main_#t~nondet316#1, main_#t~switch317#1, main_#t~ret318#1, main_#t~nondet319#1, main_#t~switch320#1, main_#t~ret321#1, main_#t~ret322#1, main_#t~ret323#1, main_#t~ret324#1, main_#t~ret325#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~31#1.base, main_~tmp~31#1.offset, main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset, main_~tmp___0~12#1.base, main_~tmp___0~12#1.offset, main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset, main_~tmp___1~4#1.base, main_~tmp___1~4#1.offset, main_~tmp___2~2#1, main_~tmp___3~1#1, main_~tmp___4~0#1, main_~tmp___5~0#1, main_~tmp___6~0#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~31#1.base, main_~tmp~31#1.offset;havoc main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset;havoc main_~tmp___0~12#1.base, main_~tmp___0~12#1.offset;havoc main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset;havoc main_~tmp___1~4#1.base, main_~tmp___1~4#1.offset;havoc main_~tmp___2~2#1;havoc main_~tmp___3~1#1;havoc main_~tmp___4~0#1;havoc main_~tmp___5~0#1;havoc main_~tmp___6~0#1; {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:51,635 INFO L272 TraceCheckUtils]: 2: Hoare triple {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} call main_#t~ret305#1.base, main_#t~ret305#1.offset := ldv_zalloc(32); {23293#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:51,635 INFO L290 TraceCheckUtils]: 3: Hoare triple {23293#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {23274#true} is VALID [2022-02-20 21:51:51,635 INFO L290 TraceCheckUtils]: 4: Hoare triple {23274#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {23274#true} is VALID [2022-02-20 21:51:51,635 INFO L290 TraceCheckUtils]: 5: Hoare triple {23274#true} assume true; {23274#true} is VALID [2022-02-20 21:51:51,636 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {23274#true} {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #1203#return; {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:51,636 INFO L290 TraceCheckUtils]: 7: Hoare triple {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} main_~tmp~31#1.base, main_~tmp~31#1.offset := main_#t~ret305#1.base, main_#t~ret305#1.offset;havoc main_#t~ret305#1.base, main_#t~ret305#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~31#1.base, main_~tmp~31#1.offset; {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:51,637 INFO L272 TraceCheckUtils]: 8: Hoare triple {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} call main_#t~ret306#1.base, main_#t~ret306#1.offset := ldv_zalloc(3136); {23293#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:51,637 INFO L290 TraceCheckUtils]: 9: Hoare triple {23293#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {23274#true} is VALID [2022-02-20 21:51:51,637 INFO L290 TraceCheckUtils]: 10: Hoare triple {23274#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {23274#true} is VALID [2022-02-20 21:51:51,637 INFO L290 TraceCheckUtils]: 11: Hoare triple {23274#true} assume true; {23274#true} is VALID [2022-02-20 21:51:51,638 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {23274#true} {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #1205#return; {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:51,638 INFO L290 TraceCheckUtils]: 13: Hoare triple {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} main_~tmp___0~12#1.base, main_~tmp___0~12#1.offset := main_#t~ret306#1.base, main_#t~ret306#1.offset;havoc main_#t~ret306#1.base, main_#t~ret306#1.offset;main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset := main_~tmp___0~12#1.base, main_~tmp___0~12#1.offset; {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:51,639 INFO L272 TraceCheckUtils]: 14: Hoare triple {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} call main_#t~ret307#1.base, main_#t~ret307#1.offset := ldv_zalloc(240); {23293#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:51,642 INFO L290 TraceCheckUtils]: 15: Hoare triple {23293#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {23274#true} is VALID [2022-02-20 21:51:51,642 INFO L290 TraceCheckUtils]: 16: Hoare triple {23274#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {23274#true} is VALID [2022-02-20 21:51:51,642 INFO L290 TraceCheckUtils]: 17: Hoare triple {23274#true} assume true; {23274#true} is VALID [2022-02-20 21:51:51,643 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {23274#true} {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #1207#return; {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:51,643 INFO L290 TraceCheckUtils]: 19: Hoare triple {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} main_~tmp___1~4#1.base, main_~tmp___1~4#1.offset := main_#t~ret307#1.base, main_#t~ret307#1.offset;havoc main_#t~ret307#1.base, main_#t~ret307#1.offset;main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset := main_~tmp___1~4#1.base, main_~tmp___1~4#1.offset;assume { :begin_inline_ldv_initialize } true; {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:51,644 INFO L290 TraceCheckUtils]: 20: Hoare triple {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:51,644 INFO L290 TraceCheckUtils]: 21: Hoare triple {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume -2147483648 <= main_#t~nondet308#1 && main_#t~nondet308#1 <= 2147483647;main_~tmp___2~2#1 := main_#t~nondet308#1;havoc main_#t~nondet308#1;main_#t~switch309#1 := 0 == main_~tmp___2~2#1; {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:51,645 INFO L290 TraceCheckUtils]: 22: Hoare triple {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume !main_#t~switch309#1;main_#t~switch309#1 := main_#t~switch309#1 || 1 == main_~tmp___2~2#1; {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:51,645 INFO L290 TraceCheckUtils]: 23: Hoare triple {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume main_#t~switch309#1; {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:51,645 INFO L290 TraceCheckUtils]: 24: Hoare triple {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet313#1 && main_#t~nondet313#1 <= 2147483647;main_~tmp___4~0#1 := main_#t~nondet313#1;havoc main_#t~nondet313#1;main_#t~switch314#1 := 0 == main_~tmp___4~0#1; {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:51,646 INFO L290 TraceCheckUtils]: 25: Hoare triple {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume !main_#t~switch314#1;main_#t~switch314#1 := main_#t~switch314#1 || 1 == main_~tmp___4~0#1; {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:51,646 INFO L290 TraceCheckUtils]: 26: Hoare triple {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume main_#t~switch314#1; {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:51,647 INFO L290 TraceCheckUtils]: 27: Hoare triple {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_ipheth_driver_init } true;havoc ipheth_driver_init_#res#1;havoc ipheth_driver_init_#t~ret302#1, ipheth_driver_init_~tmp~28#1;havoc ipheth_driver_init_~tmp~28#1;assume { :begin_inline_ldv_usb_register_driver_19 } true;ldv_usb_register_driver_19_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_19_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_19_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg3#1.offset := ~#ipheth_driver~0.base, ~#ipheth_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 36, 0;havoc ldv_usb_register_driver_19_#res#1;havoc ldv_usb_register_driver_19_#t~ret333#1, ldv_usb_register_driver_19_~ldv_func_arg1#1.base, ldv_usb_register_driver_19_~ldv_func_arg1#1.offset, ldv_usb_register_driver_19_~ldv_func_arg2#1.base, ldv_usb_register_driver_19_~ldv_func_arg2#1.offset, ldv_usb_register_driver_19_~ldv_func_arg3#1.base, ldv_usb_register_driver_19_~ldv_func_arg3#1.offset, ldv_usb_register_driver_19_~ldv_func_res~1#1, ldv_usb_register_driver_19_~tmp~39#1;ldv_usb_register_driver_19_~ldv_func_arg1#1.base, ldv_usb_register_driver_19_~ldv_func_arg1#1.offset := ldv_usb_register_driver_19_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_19_~ldv_func_arg2#1.base, ldv_usb_register_driver_19_~ldv_func_arg2#1.offset := ldv_usb_register_driver_19_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_19_~ldv_func_arg3#1.base, ldv_usb_register_driver_19_~ldv_func_arg3#1.offset := ldv_usb_register_driver_19_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_19_~ldv_func_res~1#1;havoc ldv_usb_register_driver_19_~tmp~39#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_19_~ldv_func_arg1#1.base, ldv_usb_register_driver_19_~ldv_func_arg1#1.offset, ldv_usb_register_driver_19_~ldv_func_arg2#1.base, ldv_usb_register_driver_19_~ldv_func_arg2#1.offset, ldv_usb_register_driver_19_~ldv_func_arg3#1.base, ldv_usb_register_driver_19_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet365#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet365#1 && usb_register_driver_#t~nondet365#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet365#1;havoc usb_register_driver_#t~nondet365#1; {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:51,647 INFO L290 TraceCheckUtils]: 28: Hoare triple {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} ldv_usb_register_driver_19_#t~ret333#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_19_#t~ret333#1 && ldv_usb_register_driver_19_#t~ret333#1 <= 2147483647;ldv_usb_register_driver_19_~tmp~39#1 := ldv_usb_register_driver_19_#t~ret333#1;havoc ldv_usb_register_driver_19_#t~ret333#1;ldv_usb_register_driver_19_~ldv_func_res~1#1 := ldv_usb_register_driver_19_~tmp~39#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret303#1.base, ldv_usb_driver_1_#t~ret303#1.offset, ldv_usb_driver_1_~tmp~29#1.base, ldv_usb_driver_1_~tmp~29#1.offset;havoc ldv_usb_driver_1_~tmp~29#1.base, ldv_usb_driver_1_~tmp~29#1.offset; {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:51,648 INFO L272 TraceCheckUtils]: 29: Hoare triple {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} call ldv_usb_driver_1_#t~ret303#1.base, ldv_usb_driver_1_#t~ret303#1.offset := ldv_zalloc(1520); {23293#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:51,648 INFO L290 TraceCheckUtils]: 30: Hoare triple {23293#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {23274#true} is VALID [2022-02-20 21:51:51,648 INFO L290 TraceCheckUtils]: 31: Hoare triple {23274#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {23274#true} is VALID [2022-02-20 21:51:51,649 INFO L290 TraceCheckUtils]: 32: Hoare triple {23274#true} assume true; {23274#true} is VALID [2022-02-20 21:51:51,649 INFO L284 TraceCheckUtils]: 33: Hoare quadruple {23274#true} {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #1261#return; {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:51,649 INFO L290 TraceCheckUtils]: 34: Hoare triple {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} ldv_usb_driver_1_~tmp~29#1.base, ldv_usb_driver_1_~tmp~29#1.offset := ldv_usb_driver_1_#t~ret303#1.base, ldv_usb_driver_1_#t~ret303#1.offset;havoc ldv_usb_driver_1_#t~ret303#1.base, ldv_usb_driver_1_#t~ret303#1.offset;~ipheth_driver_group1~0.base, ~ipheth_driver_group1~0.offset := ldv_usb_driver_1_~tmp~29#1.base, ldv_usb_driver_1_~tmp~29#1.offset; {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:51,650 INFO L290 TraceCheckUtils]: 35: Hoare triple {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_19_#res#1 := ldv_usb_register_driver_19_~ldv_func_res~1#1; {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:51,650 INFO L290 TraceCheckUtils]: 36: Hoare triple {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} ipheth_driver_init_#t~ret302#1 := ldv_usb_register_driver_19_#res#1;assume { :end_inline_ldv_usb_register_driver_19 } true;assume -2147483648 <= ipheth_driver_init_#t~ret302#1 && ipheth_driver_init_#t~ret302#1 <= 2147483647;ipheth_driver_init_~tmp~28#1 := ipheth_driver_init_#t~ret302#1;havoc ipheth_driver_init_#t~ret302#1;ipheth_driver_init_#res#1 := ipheth_driver_init_~tmp~28#1; {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:51,651 INFO L290 TraceCheckUtils]: 37: Hoare triple {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} main_#t~ret315#1 := ipheth_driver_init_#res#1;assume { :end_inline_ipheth_driver_init } true;assume -2147483648 <= main_#t~ret315#1 && main_#t~ret315#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret315#1;havoc main_#t~ret315#1; {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:51,651 INFO L290 TraceCheckUtils]: 38: Hoare triple {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume !(0 == ~ldv_retval_1~0); {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:51,651 INFO L290 TraceCheckUtils]: 39: Hoare triple {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume 0 != ~ldv_retval_1~0;~ldv_state_variable_0~0 := 2; {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:51,652 INFO L290 TraceCheckUtils]: 40: Hoare triple {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume { :begin_inline_ldv_check_final_state } true; {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:51,652 INFO L290 TraceCheckUtils]: 41: Hoare triple {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume 0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616; {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 21:51:51,653 INFO L290 TraceCheckUtils]: 42: Hoare triple {23276#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume !(0 == (~usb_dev~0.base + ~usb_dev~0.offset) % 18446744073709551616); {23275#false} is VALID [2022-02-20 21:51:51,653 INFO L272 TraceCheckUtils]: 43: Hoare triple {23275#false} call ldv_error(); {23275#false} is VALID [2022-02-20 21:51:51,653 INFO L290 TraceCheckUtils]: 44: Hoare triple {23275#false} assume !false; {23275#false} is VALID [2022-02-20 21:51:51,653 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-02-20 21:51:51,654 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:51:51,654 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [752927351] [2022-02-20 21:51:51,654 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [752927351] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:51:51,654 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:51:51,654 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-02-20 21:51:51,654 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [195386062] [2022-02-20 21:51:51,654 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:51:51,655 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 45 [2022-02-20 21:51:51,655 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:51:51,655 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 21:51:51,691 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:51:51,691 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-02-20 21:51:51,691 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:51:51,692 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-02-20 21:51:51,692 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-02-20 21:51:51,692 INFO L87 Difference]: Start difference. First operand 2000 states and 2670 transitions. Second operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 21:51:53,593 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:51:53,593 INFO L93 Difference]: Finished difference Result 2142 states and 2912 transitions. [2022-02-20 21:51:53,593 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-02-20 21:51:53,593 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 45 [2022-02-20 21:51:53,595 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:51:53,595 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 21:51:53,602 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 750 transitions. [2022-02-20 21:51:53,602 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 21:51:53,609 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 750 transitions. [2022-02-20 21:51:53,609 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states and 750 transitions. [2022-02-20 21:51:54,248 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 750 edges. 750 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:51:54,450 INFO L225 Difference]: With dead ends: 2142 [2022-02-20 21:51:54,450 INFO L226 Difference]: Without dead ends: 2139 [2022-02-20 21:51:54,451 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-02-20 21:51:54,452 INFO L933 BasicCegarLoop]: 622 mSDtfsCounter, 776 mSDsluCounter, 265 mSDsCounter, 0 mSdLazyCounter, 193 mSolverCounterSat, 204 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 826 SdHoareTripleChecker+Valid, 887 SdHoareTripleChecker+Invalid, 397 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 204 IncrementalHoareTripleChecker+Valid, 193 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-02-20 21:51:54,453 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [826 Valid, 887 Invalid, 397 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [204 Valid, 193 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-02-20 21:51:54,455 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2139 states. [2022-02-20 21:51:54,499 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2139 to 1999. [2022-02-20 21:51:54,499 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:51:54,502 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2139 states. Second operand has 1999 states, 1487 states have (on average 1.269670477471419) internal successors, (1888), 1518 states have internal predecessors, (1888), 365 states have call successors, (365), 137 states have call predecessors, (365), 146 states have return successors, (415), 355 states have call predecessors, (415), 361 states have call successors, (415) [2022-02-20 21:51:54,504 INFO L74 IsIncluded]: Start isIncluded. First operand 2139 states. Second operand has 1999 states, 1487 states have (on average 1.269670477471419) internal successors, (1888), 1518 states have internal predecessors, (1888), 365 states have call successors, (365), 137 states have call predecessors, (365), 146 states have return successors, (415), 355 states have call predecessors, (415), 361 states have call successors, (415) [2022-02-20 21:51:54,506 INFO L87 Difference]: Start difference. First operand 2139 states. Second operand has 1999 states, 1487 states have (on average 1.269670477471419) internal successors, (1888), 1518 states have internal predecessors, (1888), 365 states have call successors, (365), 137 states have call predecessors, (365), 146 states have return successors, (415), 355 states have call predecessors, (415), 361 states have call successors, (415) [2022-02-20 21:51:54,796 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:51:54,796 INFO L93 Difference]: Finished difference Result 2139 states and 2909 transitions. [2022-02-20 21:51:54,796 INFO L276 IsEmpty]: Start isEmpty. Operand 2139 states and 2909 transitions. [2022-02-20 21:51:54,822 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:51:54,822 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:51:54,825 INFO L74 IsIncluded]: Start isIncluded. First operand has 1999 states, 1487 states have (on average 1.269670477471419) internal successors, (1888), 1518 states have internal predecessors, (1888), 365 states have call successors, (365), 137 states have call predecessors, (365), 146 states have return successors, (415), 355 states have call predecessors, (415), 361 states have call successors, (415) Second operand 2139 states. [2022-02-20 21:51:54,827 INFO L87 Difference]: Start difference. First operand has 1999 states, 1487 states have (on average 1.269670477471419) internal successors, (1888), 1518 states have internal predecessors, (1888), 365 states have call successors, (365), 137 states have call predecessors, (365), 146 states have return successors, (415), 355 states have call predecessors, (415), 361 states have call successors, (415) Second operand 2139 states. [2022-02-20 21:51:55,060 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:51:55,061 INFO L93 Difference]: Finished difference Result 2139 states and 2909 transitions. [2022-02-20 21:51:55,061 INFO L276 IsEmpty]: Start isEmpty. Operand 2139 states and 2909 transitions. [2022-02-20 21:51:55,066 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:51:55,066 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:51:55,067 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:51:55,067 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:51:55,070 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1999 states, 1487 states have (on average 1.269670477471419) internal successors, (1888), 1518 states have internal predecessors, (1888), 365 states have call successors, (365), 137 states have call predecessors, (365), 146 states have return successors, (415), 355 states have call predecessors, (415), 361 states have call successors, (415) [2022-02-20 21:51:55,264 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1999 states to 1999 states and 2668 transitions. [2022-02-20 21:51:55,264 INFO L78 Accepts]: Start accepts. Automaton has 1999 states and 2668 transitions. Word has length 45 [2022-02-20 21:51:55,265 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:51:55,265 INFO L470 AbstractCegarLoop]: Abstraction has 1999 states and 2668 transitions. [2022-02-20 21:51:55,265 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 21:51:55,265 INFO L276 IsEmpty]: Start isEmpty. Operand 1999 states and 2668 transitions. [2022-02-20 21:51:55,266 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2022-02-20 21:51:55,266 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:51:55,266 INFO L514 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:51:55,266 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-02-20 21:51:55,266 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:51:55,267 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:51:55,267 INFO L85 PathProgramCache]: Analyzing trace with hash -531067202, now seen corresponding path program 1 times [2022-02-20 21:51:55,267 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:51:55,267 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1269980166] [2022-02-20 21:51:55,267 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:51:55,267 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:51:55,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:55,387 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 21:51:55,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:55,395 INFO L290 TraceCheckUtils]: 0: Hoare triple {33469#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {33450#true} is VALID [2022-02-20 21:51:55,395 INFO L290 TraceCheckUtils]: 1: Hoare triple {33450#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {33450#true} is VALID [2022-02-20 21:51:55,395 INFO L290 TraceCheckUtils]: 2: Hoare triple {33450#true} assume true; {33450#true} is VALID [2022-02-20 21:51:55,396 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {33450#true} {33452#(= ~dev_counter~0 0)} #1203#return; {33452#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:55,396 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-02-20 21:51:55,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:55,405 INFO L290 TraceCheckUtils]: 0: Hoare triple {33469#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {33450#true} is VALID [2022-02-20 21:51:55,405 INFO L290 TraceCheckUtils]: 1: Hoare triple {33450#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {33450#true} is VALID [2022-02-20 21:51:55,405 INFO L290 TraceCheckUtils]: 2: Hoare triple {33450#true} assume true; {33450#true} is VALID [2022-02-20 21:51:55,405 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {33450#true} {33452#(= ~dev_counter~0 0)} #1205#return; {33452#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:55,406 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2022-02-20 21:51:55,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:55,421 INFO L290 TraceCheckUtils]: 0: Hoare triple {33469#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {33450#true} is VALID [2022-02-20 21:51:55,421 INFO L290 TraceCheckUtils]: 1: Hoare triple {33450#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {33450#true} is VALID [2022-02-20 21:51:55,421 INFO L290 TraceCheckUtils]: 2: Hoare triple {33450#true} assume true; {33450#true} is VALID [2022-02-20 21:51:55,422 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {33450#true} {33452#(= ~dev_counter~0 0)} #1207#return; {33452#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:55,422 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 29 [2022-02-20 21:51:55,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:55,428 INFO L290 TraceCheckUtils]: 0: Hoare triple {33469#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {33450#true} is VALID [2022-02-20 21:51:55,428 INFO L290 TraceCheckUtils]: 1: Hoare triple {33450#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {33450#true} is VALID [2022-02-20 21:51:55,429 INFO L290 TraceCheckUtils]: 2: Hoare triple {33450#true} assume true; {33450#true} is VALID [2022-02-20 21:51:55,429 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {33450#true} {33452#(= ~dev_counter~0 0)} #1261#return; {33452#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:55,435 INFO L290 TraceCheckUtils]: 0: Hoare triple {33450#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(80, 2);call #Ultimate.allocInit(26, 3);call #Ultimate.allocInit(63, 4);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(24, 6);call #Ultimate.allocInit(28, 7);call #Ultimate.allocInit(24, 8);call #Ultimate.allocInit(20, 9);call #Ultimate.allocInit(24, 10);call #Ultimate.allocInit(25, 11);call #Ultimate.allocInit(19, 12);call #Ultimate.allocInit(25, 13);call #Ultimate.allocInit(19, 14);call #Ultimate.allocInit(45, 15);call #Ultimate.allocInit(19, 16);call #Ultimate.allocInit(24, 17);call #Ultimate.allocInit(17, 18);call #Ultimate.allocInit(217, 19);call #Ultimate.allocInit(29, 20);call #Ultimate.allocInit(10, 21);call #Ultimate.allocInit(24, 22);call #Ultimate.allocInit(10, 23);call #Ultimate.allocInit(16, 24);call #Ultimate.allocInit(18, 25);call #Ultimate.allocInit(6, 26);call write~init~int(101, 26, 0, 1);call write~init~int(116, 26, 1, 1);call write~init~int(104, 26, 2, 1);call write~init~int(37, 26, 3, 1);call write~init~int(100, 26, 4, 1);call write~init~int(0, 26, 5, 1);call #Ultimate.allocInit(45, 27);call #Ultimate.allocInit(26, 28);call #Ultimate.allocInit(30, 29);call #Ultimate.allocInit(31, 30);call #Ultimate.allocInit(27, 31);call #Ultimate.allocInit(30, 32);call #Ultimate.allocInit(43, 33);call #Ultimate.allocInit(44, 34);call #Ultimate.allocInit(7, 35);call write~init~int(105, 35, 0, 1);call write~init~int(112, 35, 1, 1);call write~init~int(104, 35, 2, 1);call write~init~int(101, 35, 3, 1);call write~init~int(116, 35, 4, 1);call write~init~int(104, 35, 5, 1);call write~init~int(0, 35, 6, 1);call #Ultimate.allocInit(7, 36);call write~init~int(105, 36, 0, 1);call write~init~int(112, 36, 1, 1);call write~init~int(104, 36, 2, 1);call write~init~int(101, 36, 3, 1);call write~init~int(116, 36, 4, 1);call write~init~int(104, 36, 5, 1);call write~init~int(0, 36, 6, 1);~ldv_state_variable_3~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_2~0 := 0;~ipheth_netdev_ops_group1~0.base, ~ipheth_netdev_ops_group1~0.offset := 0, 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~ipheth_driver_group1~0.base, ~ipheth_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#ipheth_table~0.base, ~#ipheth_table~0.offset := 37, 0;call #Ultimate.allocInit(250, 37);call write~init~int(899, ~#ipheth_table~0.base, ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 2 + ~#ipheth_table~0.offset, 2);call write~init~int(4752, ~#ipheth_table~0.base, 4 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 6 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 8 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 10 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 11 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 12 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 13 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 14 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 15 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 16 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 17 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 25 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 27 + ~#ipheth_table~0.offset, 2);call write~init~int(4754, ~#ipheth_table~0.base, 29 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 31 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 33 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 35 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 36 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 37 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 38 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 39 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 40 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 41 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 42 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 50 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 52 + ~#ipheth_table~0.offset, 2);call write~init~int(4756, ~#ipheth_table~0.base, 54 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 56 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 58 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 60 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 61 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 62 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 63 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 64 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 65 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 66 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 67 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 75 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 77 + ~#ipheth_table~0.offset, 2);call write~init~int(4759, ~#ipheth_table~0.base, 79 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 81 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 83 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 85 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 86 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 87 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 88 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 89 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 90 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 91 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 92 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 100 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 102 + ~#ipheth_table~0.offset, 2);call write~init~int(4762, ~#ipheth_table~0.base, 104 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 106 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 108 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 110 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 111 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 112 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 113 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 114 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 115 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 116 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 117 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 125 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 127 + ~#ipheth_table~0.offset, 2);call write~init~int(4779, ~#ipheth_table~0.base, 129 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 131 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 133 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 135 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 136 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 137 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 138 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 139 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 140 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 141 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 142 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 150 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 152 + ~#ipheth_table~0.offset, 2);call write~init~int(4764, ~#ipheth_table~0.base, 154 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 156 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 158 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 160 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 161 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 162 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 163 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 164 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 165 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 166 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 167 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 175 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 177 + ~#ipheth_table~0.offset, 2);call write~init~int(4768, ~#ipheth_table~0.base, 179 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 181 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 183 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 185 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 186 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 187 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 188 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 189 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 190 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 191 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 192 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 200 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 202 + ~#ipheth_table~0.offset, 2);call write~init~int(4776, ~#ipheth_table~0.base, 204 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 206 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 208 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 210 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 211 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 212 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 213 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 214 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 215 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 216 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 217 + ~#ipheth_table~0.offset, 8);call write~init~int(0, ~#ipheth_table~0.base, 225 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 227 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 229 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 231 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 233 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 235 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 236 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 237 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 238 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 239 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 240 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 241 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 242 + ~#ipheth_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.bInterfaceNumber := 0;~__mod_usb_device_table~0.driver_info := 0;~#ipheth_netdev_ops~0.base, ~#ipheth_netdev_ops~0.offset := 38, 0;call #Ultimate.allocInit(448, 38);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 8 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_open.base, #funAddr~ipheth_open.offset, ~#ipheth_netdev_ops~0.base, 16 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_close.base, #funAddr~ipheth_close.offset, ~#ipheth_netdev_ops~0.base, 24 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_tx.base, #funAddr~ipheth_tx.offset, ~#ipheth_netdev_ops~0.base, 32 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 40 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 48 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 56 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 64 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 72 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 80 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 88 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 96 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 104 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_tx_timeout.base, #funAddr~ipheth_tx_timeout.offset, ~#ipheth_netdev_ops~0.base, 112 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 120 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 128 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 136 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 144 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 152 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 160 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 168 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 176 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 184 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 192 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 200 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 208 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 216 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 224 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 232 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 240 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 248 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 256 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 264 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 272 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 280 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 288 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 296 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 304 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 312 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 320 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 328 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 336 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 344 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 352 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 360 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 368 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 376 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 384 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 392 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 400 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 408 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 416 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 424 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 432 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 440 + ~#ipheth_netdev_ops~0.offset, 8);~#ipheth_driver~0.base, ~#ipheth_driver~0.offset := 39, 0;call #Ultimate.allocInit(285, 39);call write~init~$Pointer$(35, 0, ~#ipheth_driver~0.base, ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_probe.base, #funAddr~ipheth_probe.offset, ~#ipheth_driver~0.base, 8 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_disconnect.base, #funAddr~ipheth_disconnect.offset, ~#ipheth_driver~0.base, 16 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 24 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 32 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 40 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 48 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 56 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 64 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(~#ipheth_table~0.base, ~#ipheth_table~0.offset, ~#ipheth_driver~0.base, 72 + ~#ipheth_driver~0.offset, 8);call write~init~int(0, ~#ipheth_driver~0.base, 80 + ~#ipheth_driver~0.offset, 4);call write~init~int(0, ~#ipheth_driver~0.base, 84 + ~#ipheth_driver~0.offset, 4);call write~init~int(0, ~#ipheth_driver~0.base, 88 + ~#ipheth_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 92 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 100 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 108 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 116 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 124 + ~#ipheth_driver~0.offset, 8);call write~init~int(0, ~#ipheth_driver~0.base, 132 + ~#ipheth_driver~0.offset, 4);call write~init~int(0, ~#ipheth_driver~0.base, 136 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 148 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 156 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 164 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 172 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 180 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 188 + ~#ipheth_driver~0.offset, 8);call write~init~int(0, ~#ipheth_driver~0.base, 196 + ~#ipheth_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 197 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 205 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 213 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 221 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 229 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 237 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 245 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 253 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 261 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 269 + ~#ipheth_driver~0.offset, 8);call write~init~int(0, ~#ipheth_driver~0.base, 277 + ~#ipheth_driver~0.offset, 4);call write~init~int(0, ~#ipheth_driver~0.base, 281 + ~#ipheth_driver~0.offset, 1);call write~init~int(0, ~#ipheth_driver~0.base, 282 + ~#ipheth_driver~0.offset, 1);call write~init~int(1, ~#ipheth_driver~0.base, 283 + ~#ipheth_driver~0.offset, 1);call write~init~int(0, ~#ipheth_driver~0.base, 284 + ~#ipheth_driver~0.offset, 1);~ldv_retval_2~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {33452#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:55,436 INFO L290 TraceCheckUtils]: 1: Hoare triple {33452#(= ~dev_counter~0 0)} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret305#1.base, main_#t~ret305#1.offset, main_#t~ret306#1.base, main_#t~ret306#1.offset, main_#t~ret307#1.base, main_#t~ret307#1.offset, main_#t~nondet308#1, main_#t~switch309#1, main_#t~nondet310#1, main_#t~switch311#1, main_#t~ret312#1, main_#t~nondet313#1, main_#t~switch314#1, main_#t~ret315#1, main_#t~nondet316#1, main_#t~switch317#1, main_#t~ret318#1, main_#t~nondet319#1, main_#t~switch320#1, main_#t~ret321#1, main_#t~ret322#1, main_#t~ret323#1, main_#t~ret324#1, main_#t~ret325#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~31#1.base, main_~tmp~31#1.offset, main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset, main_~tmp___0~12#1.base, main_~tmp___0~12#1.offset, main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset, main_~tmp___1~4#1.base, main_~tmp___1~4#1.offset, main_~tmp___2~2#1, main_~tmp___3~1#1, main_~tmp___4~0#1, main_~tmp___5~0#1, main_~tmp___6~0#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~31#1.base, main_~tmp~31#1.offset;havoc main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset;havoc main_~tmp___0~12#1.base, main_~tmp___0~12#1.offset;havoc main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset;havoc main_~tmp___1~4#1.base, main_~tmp___1~4#1.offset;havoc main_~tmp___2~2#1;havoc main_~tmp___3~1#1;havoc main_~tmp___4~0#1;havoc main_~tmp___5~0#1;havoc main_~tmp___6~0#1; {33452#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:55,437 INFO L272 TraceCheckUtils]: 2: Hoare triple {33452#(= ~dev_counter~0 0)} call main_#t~ret305#1.base, main_#t~ret305#1.offset := ldv_zalloc(32); {33469#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:55,440 INFO L290 TraceCheckUtils]: 3: Hoare triple {33469#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {33450#true} is VALID [2022-02-20 21:51:55,441 INFO L290 TraceCheckUtils]: 4: Hoare triple {33450#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {33450#true} is VALID [2022-02-20 21:51:55,445 INFO L290 TraceCheckUtils]: 5: Hoare triple {33450#true} assume true; {33450#true} is VALID [2022-02-20 21:51:55,446 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {33450#true} {33452#(= ~dev_counter~0 0)} #1203#return; {33452#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:55,447 INFO L290 TraceCheckUtils]: 7: Hoare triple {33452#(= ~dev_counter~0 0)} main_~tmp~31#1.base, main_~tmp~31#1.offset := main_#t~ret305#1.base, main_#t~ret305#1.offset;havoc main_#t~ret305#1.base, main_#t~ret305#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~31#1.base, main_~tmp~31#1.offset; {33452#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:55,447 INFO L272 TraceCheckUtils]: 8: Hoare triple {33452#(= ~dev_counter~0 0)} call main_#t~ret306#1.base, main_#t~ret306#1.offset := ldv_zalloc(3136); {33469#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:55,447 INFO L290 TraceCheckUtils]: 9: Hoare triple {33469#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {33450#true} is VALID [2022-02-20 21:51:55,448 INFO L290 TraceCheckUtils]: 10: Hoare triple {33450#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {33450#true} is VALID [2022-02-20 21:51:55,448 INFO L290 TraceCheckUtils]: 11: Hoare triple {33450#true} assume true; {33450#true} is VALID [2022-02-20 21:51:55,450 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {33450#true} {33452#(= ~dev_counter~0 0)} #1205#return; {33452#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:55,451 INFO L290 TraceCheckUtils]: 13: Hoare triple {33452#(= ~dev_counter~0 0)} main_~tmp___0~12#1.base, main_~tmp___0~12#1.offset := main_#t~ret306#1.base, main_#t~ret306#1.offset;havoc main_#t~ret306#1.base, main_#t~ret306#1.offset;main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset := main_~tmp___0~12#1.base, main_~tmp___0~12#1.offset; {33452#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:55,451 INFO L272 TraceCheckUtils]: 14: Hoare triple {33452#(= ~dev_counter~0 0)} call main_#t~ret307#1.base, main_#t~ret307#1.offset := ldv_zalloc(240); {33469#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:55,451 INFO L290 TraceCheckUtils]: 15: Hoare triple {33469#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {33450#true} is VALID [2022-02-20 21:51:55,451 INFO L290 TraceCheckUtils]: 16: Hoare triple {33450#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {33450#true} is VALID [2022-02-20 21:51:55,452 INFO L290 TraceCheckUtils]: 17: Hoare triple {33450#true} assume true; {33450#true} is VALID [2022-02-20 21:51:55,452 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {33450#true} {33452#(= ~dev_counter~0 0)} #1207#return; {33452#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:55,452 INFO L290 TraceCheckUtils]: 19: Hoare triple {33452#(= ~dev_counter~0 0)} main_~tmp___1~4#1.base, main_~tmp___1~4#1.offset := main_#t~ret307#1.base, main_#t~ret307#1.offset;havoc main_#t~ret307#1.base, main_#t~ret307#1.offset;main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset := main_~tmp___1~4#1.base, main_~tmp___1~4#1.offset;assume { :begin_inline_ldv_initialize } true; {33452#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:55,453 INFO L290 TraceCheckUtils]: 20: Hoare triple {33452#(= ~dev_counter~0 0)} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {33452#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:55,453 INFO L290 TraceCheckUtils]: 21: Hoare triple {33452#(= ~dev_counter~0 0)} assume -2147483648 <= main_#t~nondet308#1 && main_#t~nondet308#1 <= 2147483647;main_~tmp___2~2#1 := main_#t~nondet308#1;havoc main_#t~nondet308#1;main_#t~switch309#1 := 0 == main_~tmp___2~2#1; {33452#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:55,453 INFO L290 TraceCheckUtils]: 22: Hoare triple {33452#(= ~dev_counter~0 0)} assume !main_#t~switch309#1;main_#t~switch309#1 := main_#t~switch309#1 || 1 == main_~tmp___2~2#1; {33452#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:55,453 INFO L290 TraceCheckUtils]: 23: Hoare triple {33452#(= ~dev_counter~0 0)} assume main_#t~switch309#1; {33452#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:55,454 INFO L290 TraceCheckUtils]: 24: Hoare triple {33452#(= ~dev_counter~0 0)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet313#1 && main_#t~nondet313#1 <= 2147483647;main_~tmp___4~0#1 := main_#t~nondet313#1;havoc main_#t~nondet313#1;main_#t~switch314#1 := 0 == main_~tmp___4~0#1; {33452#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:55,454 INFO L290 TraceCheckUtils]: 25: Hoare triple {33452#(= ~dev_counter~0 0)} assume !main_#t~switch314#1;main_#t~switch314#1 := main_#t~switch314#1 || 1 == main_~tmp___4~0#1; {33452#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:55,454 INFO L290 TraceCheckUtils]: 26: Hoare triple {33452#(= ~dev_counter~0 0)} assume main_#t~switch314#1; {33452#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:55,455 INFO L290 TraceCheckUtils]: 27: Hoare triple {33452#(= ~dev_counter~0 0)} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_ipheth_driver_init } true;havoc ipheth_driver_init_#res#1;havoc ipheth_driver_init_#t~ret302#1, ipheth_driver_init_~tmp~28#1;havoc ipheth_driver_init_~tmp~28#1;assume { :begin_inline_ldv_usb_register_driver_19 } true;ldv_usb_register_driver_19_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_19_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_19_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg3#1.offset := ~#ipheth_driver~0.base, ~#ipheth_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 36, 0;havoc ldv_usb_register_driver_19_#res#1;havoc ldv_usb_register_driver_19_#t~ret333#1, ldv_usb_register_driver_19_~ldv_func_arg1#1.base, ldv_usb_register_driver_19_~ldv_func_arg1#1.offset, ldv_usb_register_driver_19_~ldv_func_arg2#1.base, ldv_usb_register_driver_19_~ldv_func_arg2#1.offset, ldv_usb_register_driver_19_~ldv_func_arg3#1.base, ldv_usb_register_driver_19_~ldv_func_arg3#1.offset, ldv_usb_register_driver_19_~ldv_func_res~1#1, ldv_usb_register_driver_19_~tmp~39#1;ldv_usb_register_driver_19_~ldv_func_arg1#1.base, ldv_usb_register_driver_19_~ldv_func_arg1#1.offset := ldv_usb_register_driver_19_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_19_~ldv_func_arg2#1.base, ldv_usb_register_driver_19_~ldv_func_arg2#1.offset := ldv_usb_register_driver_19_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_19_~ldv_func_arg3#1.base, ldv_usb_register_driver_19_~ldv_func_arg3#1.offset := ldv_usb_register_driver_19_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_19_~ldv_func_res~1#1;havoc ldv_usb_register_driver_19_~tmp~39#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_19_~ldv_func_arg1#1.base, ldv_usb_register_driver_19_~ldv_func_arg1#1.offset, ldv_usb_register_driver_19_~ldv_func_arg2#1.base, ldv_usb_register_driver_19_~ldv_func_arg2#1.offset, ldv_usb_register_driver_19_~ldv_func_arg3#1.base, ldv_usb_register_driver_19_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet365#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet365#1 && usb_register_driver_#t~nondet365#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet365#1;havoc usb_register_driver_#t~nondet365#1; {33452#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:55,455 INFO L290 TraceCheckUtils]: 28: Hoare triple {33452#(= ~dev_counter~0 0)} ldv_usb_register_driver_19_#t~ret333#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_19_#t~ret333#1 && ldv_usb_register_driver_19_#t~ret333#1 <= 2147483647;ldv_usb_register_driver_19_~tmp~39#1 := ldv_usb_register_driver_19_#t~ret333#1;havoc ldv_usb_register_driver_19_#t~ret333#1;ldv_usb_register_driver_19_~ldv_func_res~1#1 := ldv_usb_register_driver_19_~tmp~39#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret303#1.base, ldv_usb_driver_1_#t~ret303#1.offset, ldv_usb_driver_1_~tmp~29#1.base, ldv_usb_driver_1_~tmp~29#1.offset;havoc ldv_usb_driver_1_~tmp~29#1.base, ldv_usb_driver_1_~tmp~29#1.offset; {33452#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:55,456 INFO L272 TraceCheckUtils]: 29: Hoare triple {33452#(= ~dev_counter~0 0)} call ldv_usb_driver_1_#t~ret303#1.base, ldv_usb_driver_1_#t~ret303#1.offset := ldv_zalloc(1520); {33469#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:55,456 INFO L290 TraceCheckUtils]: 30: Hoare triple {33469#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {33450#true} is VALID [2022-02-20 21:51:55,456 INFO L290 TraceCheckUtils]: 31: Hoare triple {33450#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {33450#true} is VALID [2022-02-20 21:51:55,456 INFO L290 TraceCheckUtils]: 32: Hoare triple {33450#true} assume true; {33450#true} is VALID [2022-02-20 21:51:55,457 INFO L284 TraceCheckUtils]: 33: Hoare quadruple {33450#true} {33452#(= ~dev_counter~0 0)} #1261#return; {33452#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:55,457 INFO L290 TraceCheckUtils]: 34: Hoare triple {33452#(= ~dev_counter~0 0)} ldv_usb_driver_1_~tmp~29#1.base, ldv_usb_driver_1_~tmp~29#1.offset := ldv_usb_driver_1_#t~ret303#1.base, ldv_usb_driver_1_#t~ret303#1.offset;havoc ldv_usb_driver_1_#t~ret303#1.base, ldv_usb_driver_1_#t~ret303#1.offset;~ipheth_driver_group1~0.base, ~ipheth_driver_group1~0.offset := ldv_usb_driver_1_~tmp~29#1.base, ldv_usb_driver_1_~tmp~29#1.offset; {33452#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:55,457 INFO L290 TraceCheckUtils]: 35: Hoare triple {33452#(= ~dev_counter~0 0)} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_19_#res#1 := ldv_usb_register_driver_19_~ldv_func_res~1#1; {33452#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:55,457 INFO L290 TraceCheckUtils]: 36: Hoare triple {33452#(= ~dev_counter~0 0)} ipheth_driver_init_#t~ret302#1 := ldv_usb_register_driver_19_#res#1;assume { :end_inline_ldv_usb_register_driver_19 } true;assume -2147483648 <= ipheth_driver_init_#t~ret302#1 && ipheth_driver_init_#t~ret302#1 <= 2147483647;ipheth_driver_init_~tmp~28#1 := ipheth_driver_init_#t~ret302#1;havoc ipheth_driver_init_#t~ret302#1;ipheth_driver_init_#res#1 := ipheth_driver_init_~tmp~28#1; {33452#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:55,458 INFO L290 TraceCheckUtils]: 37: Hoare triple {33452#(= ~dev_counter~0 0)} main_#t~ret315#1 := ipheth_driver_init_#res#1;assume { :end_inline_ipheth_driver_init } true;assume -2147483648 <= main_#t~ret315#1 && main_#t~ret315#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret315#1;havoc main_#t~ret315#1; {33452#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:55,458 INFO L290 TraceCheckUtils]: 38: Hoare triple {33452#(= ~dev_counter~0 0)} assume !(0 == ~ldv_retval_1~0); {33452#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:55,458 INFO L290 TraceCheckUtils]: 39: Hoare triple {33452#(= ~dev_counter~0 0)} assume 0 != ~ldv_retval_1~0;~ldv_state_variable_0~0 := 2; {33452#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:55,459 INFO L290 TraceCheckUtils]: 40: Hoare triple {33452#(= ~dev_counter~0 0)} assume { :begin_inline_ldv_check_final_state } true; {33452#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:55,459 INFO L290 TraceCheckUtils]: 41: Hoare triple {33452#(= ~dev_counter~0 0)} assume 0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616; {33452#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:55,459 INFO L290 TraceCheckUtils]: 42: Hoare triple {33452#(= ~dev_counter~0 0)} assume 0 == (~usb_dev~0.base + ~usb_dev~0.offset) % 18446744073709551616; {33452#(= ~dev_counter~0 0)} is VALID [2022-02-20 21:51:55,460 INFO L290 TraceCheckUtils]: 43: Hoare triple {33452#(= ~dev_counter~0 0)} assume !(0 == ~dev_counter~0); {33451#false} is VALID [2022-02-20 21:51:55,460 INFO L272 TraceCheckUtils]: 44: Hoare triple {33451#false} call ldv_error(); {33451#false} is VALID [2022-02-20 21:51:55,460 INFO L290 TraceCheckUtils]: 45: Hoare triple {33451#false} assume !false; {33451#false} is VALID [2022-02-20 21:51:55,462 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-02-20 21:51:55,462 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:51:55,462 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1269980166] [2022-02-20 21:51:55,462 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1269980166] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:51:55,462 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:51:55,462 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-02-20 21:51:55,463 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [100923616] [2022-02-20 21:51:55,463 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:51:55,463 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 46 [2022-02-20 21:51:55,463 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:51:55,463 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 21:51:55,507 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 37 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:51:55,507 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-02-20 21:51:55,507 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:51:55,508 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-02-20 21:51:55,508 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-02-20 21:51:55,508 INFO L87 Difference]: Start difference. First operand 1999 states and 2668 transitions. Second operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 21:51:57,359 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:51:57,359 INFO L93 Difference]: Finished difference Result 2141 states and 2910 transitions. [2022-02-20 21:51:57,360 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-02-20 21:51:57,360 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 46 [2022-02-20 21:51:57,360 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:51:57,360 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 21:51:57,370 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 748 transitions. [2022-02-20 21:51:57,370 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 21:51:57,380 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 748 transitions. [2022-02-20 21:51:57,380 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states and 748 transitions. [2022-02-20 21:51:57,973 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 748 edges. 748 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:51:58,177 INFO L225 Difference]: With dead ends: 2141 [2022-02-20 21:51:58,177 INFO L226 Difference]: Without dead ends: 2138 [2022-02-20 21:51:58,178 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-02-20 21:51:58,179 INFO L933 BasicCegarLoop]: 621 mSDtfsCounter, 773 mSDsluCounter, 265 mSDsCounter, 0 mSdLazyCounter, 194 mSolverCounterSat, 202 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 822 SdHoareTripleChecker+Valid, 886 SdHoareTripleChecker+Invalid, 396 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 202 IncrementalHoareTripleChecker+Valid, 194 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-02-20 21:51:58,179 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [822 Valid, 886 Invalid, 396 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [202 Valid, 194 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-02-20 21:51:58,180 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2138 states. [2022-02-20 21:51:58,224 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2138 to 1998. [2022-02-20 21:51:58,224 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:51:58,227 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2138 states. Second operand has 1998 states, 1487 states have (on average 1.2689979825151312) internal successors, (1887), 1517 states have internal predecessors, (1887), 364 states have call successors, (364), 137 states have call predecessors, (364), 146 states have return successors, (415), 355 states have call predecessors, (415), 361 states have call successors, (415) [2022-02-20 21:51:58,229 INFO L74 IsIncluded]: Start isIncluded. First operand 2138 states. Second operand has 1998 states, 1487 states have (on average 1.2689979825151312) internal successors, (1887), 1517 states have internal predecessors, (1887), 364 states have call successors, (364), 137 states have call predecessors, (364), 146 states have return successors, (415), 355 states have call predecessors, (415), 361 states have call successors, (415) [2022-02-20 21:51:58,231 INFO L87 Difference]: Start difference. First operand 2138 states. Second operand has 1998 states, 1487 states have (on average 1.2689979825151312) internal successors, (1887), 1517 states have internal predecessors, (1887), 364 states have call successors, (364), 137 states have call predecessors, (364), 146 states have return successors, (415), 355 states have call predecessors, (415), 361 states have call successors, (415) [2022-02-20 21:51:58,368 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:51:58,368 INFO L93 Difference]: Finished difference Result 2138 states and 2907 transitions. [2022-02-20 21:51:58,368 INFO L276 IsEmpty]: Start isEmpty. Operand 2138 states and 2907 transitions. [2022-02-20 21:51:58,373 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:51:58,373 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:51:58,376 INFO L74 IsIncluded]: Start isIncluded. First operand has 1998 states, 1487 states have (on average 1.2689979825151312) internal successors, (1887), 1517 states have internal predecessors, (1887), 364 states have call successors, (364), 137 states have call predecessors, (364), 146 states have return successors, (415), 355 states have call predecessors, (415), 361 states have call successors, (415) Second operand 2138 states. [2022-02-20 21:51:58,378 INFO L87 Difference]: Start difference. First operand has 1998 states, 1487 states have (on average 1.2689979825151312) internal successors, (1887), 1517 states have internal predecessors, (1887), 364 states have call successors, (364), 137 states have call predecessors, (364), 146 states have return successors, (415), 355 states have call predecessors, (415), 361 states have call successors, (415) Second operand 2138 states. [2022-02-20 21:51:58,517 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:51:58,518 INFO L93 Difference]: Finished difference Result 2138 states and 2907 transitions. [2022-02-20 21:51:58,518 INFO L276 IsEmpty]: Start isEmpty. Operand 2138 states and 2907 transitions. [2022-02-20 21:51:58,523 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:51:58,523 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:51:58,524 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:51:58,524 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:51:58,527 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1998 states, 1487 states have (on average 1.2689979825151312) internal successors, (1887), 1517 states have internal predecessors, (1887), 364 states have call successors, (364), 137 states have call predecessors, (364), 146 states have return successors, (415), 355 states have call predecessors, (415), 361 states have call successors, (415) [2022-02-20 21:51:58,737 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1998 states to 1998 states and 2666 transitions. [2022-02-20 21:51:58,738 INFO L78 Accepts]: Start accepts. Automaton has 1998 states and 2666 transitions. Word has length 46 [2022-02-20 21:51:58,738 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:51:58,738 INFO L470 AbstractCegarLoop]: Abstraction has 1998 states and 2666 transitions. [2022-02-20 21:51:58,739 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 21:51:58,739 INFO L276 IsEmpty]: Start isEmpty. Operand 1998 states and 2666 transitions. [2022-02-20 21:51:58,740 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2022-02-20 21:51:58,740 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:51:58,740 INFO L514 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:51:58,740 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2022-02-20 21:51:58,741 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:51:58,742 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:51:58,742 INFO L85 PathProgramCache]: Analyzing trace with hash 716548675, now seen corresponding path program 1 times [2022-02-20 21:51:58,742 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:51:58,742 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1182319591] [2022-02-20 21:51:58,742 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:51:58,742 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:51:58,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:58,818 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 21:51:58,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:58,825 INFO L290 TraceCheckUtils]: 0: Hoare triple {43639#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {43620#true} is VALID [2022-02-20 21:51:58,826 INFO L290 TraceCheckUtils]: 1: Hoare triple {43620#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {43620#true} is VALID [2022-02-20 21:51:58,826 INFO L290 TraceCheckUtils]: 2: Hoare triple {43620#true} assume true; {43620#true} is VALID [2022-02-20 21:51:58,826 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {43620#true} {43622#(= ~INTERF_STATE~0 0)} #1203#return; {43622#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:58,826 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-02-20 21:51:58,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:58,831 INFO L290 TraceCheckUtils]: 0: Hoare triple {43639#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {43620#true} is VALID [2022-02-20 21:51:58,831 INFO L290 TraceCheckUtils]: 1: Hoare triple {43620#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {43620#true} is VALID [2022-02-20 21:51:58,832 INFO L290 TraceCheckUtils]: 2: Hoare triple {43620#true} assume true; {43620#true} is VALID [2022-02-20 21:51:58,832 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {43620#true} {43622#(= ~INTERF_STATE~0 0)} #1205#return; {43622#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:58,832 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2022-02-20 21:51:58,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:58,838 INFO L290 TraceCheckUtils]: 0: Hoare triple {43639#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {43620#true} is VALID [2022-02-20 21:51:58,838 INFO L290 TraceCheckUtils]: 1: Hoare triple {43620#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {43620#true} is VALID [2022-02-20 21:51:58,838 INFO L290 TraceCheckUtils]: 2: Hoare triple {43620#true} assume true; {43620#true} is VALID [2022-02-20 21:51:58,839 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {43620#true} {43622#(= ~INTERF_STATE~0 0)} #1207#return; {43622#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:58,839 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 29 [2022-02-20 21:51:58,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:51:58,844 INFO L290 TraceCheckUtils]: 0: Hoare triple {43639#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {43620#true} is VALID [2022-02-20 21:51:58,844 INFO L290 TraceCheckUtils]: 1: Hoare triple {43620#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {43620#true} is VALID [2022-02-20 21:51:58,845 INFO L290 TraceCheckUtils]: 2: Hoare triple {43620#true} assume true; {43620#true} is VALID [2022-02-20 21:51:58,846 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {43620#true} {43622#(= ~INTERF_STATE~0 0)} #1261#return; {43622#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:58,846 INFO L290 TraceCheckUtils]: 0: Hoare triple {43620#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(80, 2);call #Ultimate.allocInit(26, 3);call #Ultimate.allocInit(63, 4);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(24, 6);call #Ultimate.allocInit(28, 7);call #Ultimate.allocInit(24, 8);call #Ultimate.allocInit(20, 9);call #Ultimate.allocInit(24, 10);call #Ultimate.allocInit(25, 11);call #Ultimate.allocInit(19, 12);call #Ultimate.allocInit(25, 13);call #Ultimate.allocInit(19, 14);call #Ultimate.allocInit(45, 15);call #Ultimate.allocInit(19, 16);call #Ultimate.allocInit(24, 17);call #Ultimate.allocInit(17, 18);call #Ultimate.allocInit(217, 19);call #Ultimate.allocInit(29, 20);call #Ultimate.allocInit(10, 21);call #Ultimate.allocInit(24, 22);call #Ultimate.allocInit(10, 23);call #Ultimate.allocInit(16, 24);call #Ultimate.allocInit(18, 25);call #Ultimate.allocInit(6, 26);call write~init~int(101, 26, 0, 1);call write~init~int(116, 26, 1, 1);call write~init~int(104, 26, 2, 1);call write~init~int(37, 26, 3, 1);call write~init~int(100, 26, 4, 1);call write~init~int(0, 26, 5, 1);call #Ultimate.allocInit(45, 27);call #Ultimate.allocInit(26, 28);call #Ultimate.allocInit(30, 29);call #Ultimate.allocInit(31, 30);call #Ultimate.allocInit(27, 31);call #Ultimate.allocInit(30, 32);call #Ultimate.allocInit(43, 33);call #Ultimate.allocInit(44, 34);call #Ultimate.allocInit(7, 35);call write~init~int(105, 35, 0, 1);call write~init~int(112, 35, 1, 1);call write~init~int(104, 35, 2, 1);call write~init~int(101, 35, 3, 1);call write~init~int(116, 35, 4, 1);call write~init~int(104, 35, 5, 1);call write~init~int(0, 35, 6, 1);call #Ultimate.allocInit(7, 36);call write~init~int(105, 36, 0, 1);call write~init~int(112, 36, 1, 1);call write~init~int(104, 36, 2, 1);call write~init~int(101, 36, 3, 1);call write~init~int(116, 36, 4, 1);call write~init~int(104, 36, 5, 1);call write~init~int(0, 36, 6, 1);~ldv_state_variable_3~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_2~0 := 0;~ipheth_netdev_ops_group1~0.base, ~ipheth_netdev_ops_group1~0.offset := 0, 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~ipheth_driver_group1~0.base, ~ipheth_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#ipheth_table~0.base, ~#ipheth_table~0.offset := 37, 0;call #Ultimate.allocInit(250, 37);call write~init~int(899, ~#ipheth_table~0.base, ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 2 + ~#ipheth_table~0.offset, 2);call write~init~int(4752, ~#ipheth_table~0.base, 4 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 6 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 8 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 10 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 11 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 12 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 13 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 14 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 15 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 16 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 17 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 25 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 27 + ~#ipheth_table~0.offset, 2);call write~init~int(4754, ~#ipheth_table~0.base, 29 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 31 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 33 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 35 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 36 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 37 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 38 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 39 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 40 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 41 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 42 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 50 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 52 + ~#ipheth_table~0.offset, 2);call write~init~int(4756, ~#ipheth_table~0.base, 54 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 56 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 58 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 60 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 61 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 62 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 63 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 64 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 65 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 66 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 67 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 75 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 77 + ~#ipheth_table~0.offset, 2);call write~init~int(4759, ~#ipheth_table~0.base, 79 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 81 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 83 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 85 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 86 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 87 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 88 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 89 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 90 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 91 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 92 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 100 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 102 + ~#ipheth_table~0.offset, 2);call write~init~int(4762, ~#ipheth_table~0.base, 104 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 106 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 108 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 110 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 111 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 112 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 113 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 114 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 115 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 116 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 117 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 125 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 127 + ~#ipheth_table~0.offset, 2);call write~init~int(4779, ~#ipheth_table~0.base, 129 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 131 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 133 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 135 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 136 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 137 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 138 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 139 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 140 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 141 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 142 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 150 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 152 + ~#ipheth_table~0.offset, 2);call write~init~int(4764, ~#ipheth_table~0.base, 154 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 156 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 158 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 160 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 161 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 162 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 163 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 164 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 165 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 166 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 167 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 175 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 177 + ~#ipheth_table~0.offset, 2);call write~init~int(4768, ~#ipheth_table~0.base, 179 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 181 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 183 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 185 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 186 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 187 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 188 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 189 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 190 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 191 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 192 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 200 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 202 + ~#ipheth_table~0.offset, 2);call write~init~int(4776, ~#ipheth_table~0.base, 204 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 206 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 208 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 210 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 211 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 212 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 213 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 214 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 215 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 216 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 217 + ~#ipheth_table~0.offset, 8);call write~init~int(0, ~#ipheth_table~0.base, 225 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 227 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 229 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 231 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 233 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 235 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 236 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 237 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 238 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 239 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 240 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 241 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 242 + ~#ipheth_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.bInterfaceNumber := 0;~__mod_usb_device_table~0.driver_info := 0;~#ipheth_netdev_ops~0.base, ~#ipheth_netdev_ops~0.offset := 38, 0;call #Ultimate.allocInit(448, 38);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 8 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_open.base, #funAddr~ipheth_open.offset, ~#ipheth_netdev_ops~0.base, 16 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_close.base, #funAddr~ipheth_close.offset, ~#ipheth_netdev_ops~0.base, 24 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_tx.base, #funAddr~ipheth_tx.offset, ~#ipheth_netdev_ops~0.base, 32 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 40 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 48 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 56 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 64 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 72 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 80 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 88 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 96 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 104 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_tx_timeout.base, #funAddr~ipheth_tx_timeout.offset, ~#ipheth_netdev_ops~0.base, 112 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 120 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 128 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 136 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 144 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 152 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 160 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 168 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 176 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 184 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 192 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 200 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 208 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 216 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 224 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 232 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 240 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 248 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 256 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 264 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 272 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 280 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 288 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 296 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 304 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 312 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 320 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 328 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 336 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 344 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 352 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 360 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 368 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 376 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 384 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 392 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 400 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 408 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 416 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 424 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 432 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 440 + ~#ipheth_netdev_ops~0.offset, 8);~#ipheth_driver~0.base, ~#ipheth_driver~0.offset := 39, 0;call #Ultimate.allocInit(285, 39);call write~init~$Pointer$(35, 0, ~#ipheth_driver~0.base, ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_probe.base, #funAddr~ipheth_probe.offset, ~#ipheth_driver~0.base, 8 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_disconnect.base, #funAddr~ipheth_disconnect.offset, ~#ipheth_driver~0.base, 16 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 24 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 32 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 40 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 48 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 56 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 64 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(~#ipheth_table~0.base, ~#ipheth_table~0.offset, ~#ipheth_driver~0.base, 72 + ~#ipheth_driver~0.offset, 8);call write~init~int(0, ~#ipheth_driver~0.base, 80 + ~#ipheth_driver~0.offset, 4);call write~init~int(0, ~#ipheth_driver~0.base, 84 + ~#ipheth_driver~0.offset, 4);call write~init~int(0, ~#ipheth_driver~0.base, 88 + ~#ipheth_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 92 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 100 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 108 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 116 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 124 + ~#ipheth_driver~0.offset, 8);call write~init~int(0, ~#ipheth_driver~0.base, 132 + ~#ipheth_driver~0.offset, 4);call write~init~int(0, ~#ipheth_driver~0.base, 136 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 148 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 156 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 164 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 172 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 180 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 188 + ~#ipheth_driver~0.offset, 8);call write~init~int(0, ~#ipheth_driver~0.base, 196 + ~#ipheth_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 197 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 205 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 213 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 221 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 229 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 237 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 245 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 253 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 261 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 269 + ~#ipheth_driver~0.offset, 8);call write~init~int(0, ~#ipheth_driver~0.base, 277 + ~#ipheth_driver~0.offset, 4);call write~init~int(0, ~#ipheth_driver~0.base, 281 + ~#ipheth_driver~0.offset, 1);call write~init~int(0, ~#ipheth_driver~0.base, 282 + ~#ipheth_driver~0.offset, 1);call write~init~int(1, ~#ipheth_driver~0.base, 283 + ~#ipheth_driver~0.offset, 1);call write~init~int(0, ~#ipheth_driver~0.base, 284 + ~#ipheth_driver~0.offset, 1);~ldv_retval_2~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {43622#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:58,847 INFO L290 TraceCheckUtils]: 1: Hoare triple {43622#(= ~INTERF_STATE~0 0)} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret305#1.base, main_#t~ret305#1.offset, main_#t~ret306#1.base, main_#t~ret306#1.offset, main_#t~ret307#1.base, main_#t~ret307#1.offset, main_#t~nondet308#1, main_#t~switch309#1, main_#t~nondet310#1, main_#t~switch311#1, main_#t~ret312#1, main_#t~nondet313#1, main_#t~switch314#1, main_#t~ret315#1, main_#t~nondet316#1, main_#t~switch317#1, main_#t~ret318#1, main_#t~nondet319#1, main_#t~switch320#1, main_#t~ret321#1, main_#t~ret322#1, main_#t~ret323#1, main_#t~ret324#1, main_#t~ret325#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~31#1.base, main_~tmp~31#1.offset, main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset, main_~tmp___0~12#1.base, main_~tmp___0~12#1.offset, main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset, main_~tmp___1~4#1.base, main_~tmp___1~4#1.offset, main_~tmp___2~2#1, main_~tmp___3~1#1, main_~tmp___4~0#1, main_~tmp___5~0#1, main_~tmp___6~0#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~31#1.base, main_~tmp~31#1.offset;havoc main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset;havoc main_~tmp___0~12#1.base, main_~tmp___0~12#1.offset;havoc main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset;havoc main_~tmp___1~4#1.base, main_~tmp___1~4#1.offset;havoc main_~tmp___2~2#1;havoc main_~tmp___3~1#1;havoc main_~tmp___4~0#1;havoc main_~tmp___5~0#1;havoc main_~tmp___6~0#1; {43622#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:58,847 INFO L272 TraceCheckUtils]: 2: Hoare triple {43622#(= ~INTERF_STATE~0 0)} call main_#t~ret305#1.base, main_#t~ret305#1.offset := ldv_zalloc(32); {43639#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:58,847 INFO L290 TraceCheckUtils]: 3: Hoare triple {43639#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {43620#true} is VALID [2022-02-20 21:51:58,847 INFO L290 TraceCheckUtils]: 4: Hoare triple {43620#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {43620#true} is VALID [2022-02-20 21:51:58,848 INFO L290 TraceCheckUtils]: 5: Hoare triple {43620#true} assume true; {43620#true} is VALID [2022-02-20 21:51:58,848 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {43620#true} {43622#(= ~INTERF_STATE~0 0)} #1203#return; {43622#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:58,848 INFO L290 TraceCheckUtils]: 7: Hoare triple {43622#(= ~INTERF_STATE~0 0)} main_~tmp~31#1.base, main_~tmp~31#1.offset := main_#t~ret305#1.base, main_#t~ret305#1.offset;havoc main_#t~ret305#1.base, main_#t~ret305#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~31#1.base, main_~tmp~31#1.offset; {43622#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:58,849 INFO L272 TraceCheckUtils]: 8: Hoare triple {43622#(= ~INTERF_STATE~0 0)} call main_#t~ret306#1.base, main_#t~ret306#1.offset := ldv_zalloc(3136); {43639#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:58,849 INFO L290 TraceCheckUtils]: 9: Hoare triple {43639#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {43620#true} is VALID [2022-02-20 21:51:58,849 INFO L290 TraceCheckUtils]: 10: Hoare triple {43620#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {43620#true} is VALID [2022-02-20 21:51:58,849 INFO L290 TraceCheckUtils]: 11: Hoare triple {43620#true} assume true; {43620#true} is VALID [2022-02-20 21:51:58,850 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {43620#true} {43622#(= ~INTERF_STATE~0 0)} #1205#return; {43622#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:58,850 INFO L290 TraceCheckUtils]: 13: Hoare triple {43622#(= ~INTERF_STATE~0 0)} main_~tmp___0~12#1.base, main_~tmp___0~12#1.offset := main_#t~ret306#1.base, main_#t~ret306#1.offset;havoc main_#t~ret306#1.base, main_#t~ret306#1.offset;main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset := main_~tmp___0~12#1.base, main_~tmp___0~12#1.offset; {43622#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:58,850 INFO L272 TraceCheckUtils]: 14: Hoare triple {43622#(= ~INTERF_STATE~0 0)} call main_#t~ret307#1.base, main_#t~ret307#1.offset := ldv_zalloc(240); {43639#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:58,851 INFO L290 TraceCheckUtils]: 15: Hoare triple {43639#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {43620#true} is VALID [2022-02-20 21:51:58,851 INFO L290 TraceCheckUtils]: 16: Hoare triple {43620#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {43620#true} is VALID [2022-02-20 21:51:58,851 INFO L290 TraceCheckUtils]: 17: Hoare triple {43620#true} assume true; {43620#true} is VALID [2022-02-20 21:51:58,851 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {43620#true} {43622#(= ~INTERF_STATE~0 0)} #1207#return; {43622#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:58,852 INFO L290 TraceCheckUtils]: 19: Hoare triple {43622#(= ~INTERF_STATE~0 0)} main_~tmp___1~4#1.base, main_~tmp___1~4#1.offset := main_#t~ret307#1.base, main_#t~ret307#1.offset;havoc main_#t~ret307#1.base, main_#t~ret307#1.offset;main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset := main_~tmp___1~4#1.base, main_~tmp___1~4#1.offset;assume { :begin_inline_ldv_initialize } true; {43622#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:58,852 INFO L290 TraceCheckUtils]: 20: Hoare triple {43622#(= ~INTERF_STATE~0 0)} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {43622#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:58,852 INFO L290 TraceCheckUtils]: 21: Hoare triple {43622#(= ~INTERF_STATE~0 0)} assume -2147483648 <= main_#t~nondet308#1 && main_#t~nondet308#1 <= 2147483647;main_~tmp___2~2#1 := main_#t~nondet308#1;havoc main_#t~nondet308#1;main_#t~switch309#1 := 0 == main_~tmp___2~2#1; {43622#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:58,857 INFO L290 TraceCheckUtils]: 22: Hoare triple {43622#(= ~INTERF_STATE~0 0)} assume !main_#t~switch309#1;main_#t~switch309#1 := main_#t~switch309#1 || 1 == main_~tmp___2~2#1; {43622#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:58,857 INFO L290 TraceCheckUtils]: 23: Hoare triple {43622#(= ~INTERF_STATE~0 0)} assume main_#t~switch309#1; {43622#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:58,858 INFO L290 TraceCheckUtils]: 24: Hoare triple {43622#(= ~INTERF_STATE~0 0)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet313#1 && main_#t~nondet313#1 <= 2147483647;main_~tmp___4~0#1 := main_#t~nondet313#1;havoc main_#t~nondet313#1;main_#t~switch314#1 := 0 == main_~tmp___4~0#1; {43622#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:58,858 INFO L290 TraceCheckUtils]: 25: Hoare triple {43622#(= ~INTERF_STATE~0 0)} assume !main_#t~switch314#1;main_#t~switch314#1 := main_#t~switch314#1 || 1 == main_~tmp___4~0#1; {43622#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:58,858 INFO L290 TraceCheckUtils]: 26: Hoare triple {43622#(= ~INTERF_STATE~0 0)} assume main_#t~switch314#1; {43622#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:58,859 INFO L290 TraceCheckUtils]: 27: Hoare triple {43622#(= ~INTERF_STATE~0 0)} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_ipheth_driver_init } true;havoc ipheth_driver_init_#res#1;havoc ipheth_driver_init_#t~ret302#1, ipheth_driver_init_~tmp~28#1;havoc ipheth_driver_init_~tmp~28#1;assume { :begin_inline_ldv_usb_register_driver_19 } true;ldv_usb_register_driver_19_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_19_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_19_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg3#1.offset := ~#ipheth_driver~0.base, ~#ipheth_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 36, 0;havoc ldv_usb_register_driver_19_#res#1;havoc ldv_usb_register_driver_19_#t~ret333#1, ldv_usb_register_driver_19_~ldv_func_arg1#1.base, ldv_usb_register_driver_19_~ldv_func_arg1#1.offset, ldv_usb_register_driver_19_~ldv_func_arg2#1.base, ldv_usb_register_driver_19_~ldv_func_arg2#1.offset, ldv_usb_register_driver_19_~ldv_func_arg3#1.base, ldv_usb_register_driver_19_~ldv_func_arg3#1.offset, ldv_usb_register_driver_19_~ldv_func_res~1#1, ldv_usb_register_driver_19_~tmp~39#1;ldv_usb_register_driver_19_~ldv_func_arg1#1.base, ldv_usb_register_driver_19_~ldv_func_arg1#1.offset := ldv_usb_register_driver_19_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_19_~ldv_func_arg2#1.base, ldv_usb_register_driver_19_~ldv_func_arg2#1.offset := ldv_usb_register_driver_19_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_19_~ldv_func_arg3#1.base, ldv_usb_register_driver_19_~ldv_func_arg3#1.offset := ldv_usb_register_driver_19_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_19_~ldv_func_res~1#1;havoc ldv_usb_register_driver_19_~tmp~39#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_19_~ldv_func_arg1#1.base, ldv_usb_register_driver_19_~ldv_func_arg1#1.offset, ldv_usb_register_driver_19_~ldv_func_arg2#1.base, ldv_usb_register_driver_19_~ldv_func_arg2#1.offset, ldv_usb_register_driver_19_~ldv_func_arg3#1.base, ldv_usb_register_driver_19_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet365#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet365#1 && usb_register_driver_#t~nondet365#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet365#1;havoc usb_register_driver_#t~nondet365#1; {43622#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:58,859 INFO L290 TraceCheckUtils]: 28: Hoare triple {43622#(= ~INTERF_STATE~0 0)} ldv_usb_register_driver_19_#t~ret333#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_19_#t~ret333#1 && ldv_usb_register_driver_19_#t~ret333#1 <= 2147483647;ldv_usb_register_driver_19_~tmp~39#1 := ldv_usb_register_driver_19_#t~ret333#1;havoc ldv_usb_register_driver_19_#t~ret333#1;ldv_usb_register_driver_19_~ldv_func_res~1#1 := ldv_usb_register_driver_19_~tmp~39#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret303#1.base, ldv_usb_driver_1_#t~ret303#1.offset, ldv_usb_driver_1_~tmp~29#1.base, ldv_usb_driver_1_~tmp~29#1.offset;havoc ldv_usb_driver_1_~tmp~29#1.base, ldv_usb_driver_1_~tmp~29#1.offset; {43622#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:58,860 INFO L272 TraceCheckUtils]: 29: Hoare triple {43622#(= ~INTERF_STATE~0 0)} call ldv_usb_driver_1_#t~ret303#1.base, ldv_usb_driver_1_#t~ret303#1.offset := ldv_zalloc(1520); {43639#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:51:58,860 INFO L290 TraceCheckUtils]: 30: Hoare triple {43639#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {43620#true} is VALID [2022-02-20 21:51:58,860 INFO L290 TraceCheckUtils]: 31: Hoare triple {43620#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {43620#true} is VALID [2022-02-20 21:51:58,860 INFO L290 TraceCheckUtils]: 32: Hoare triple {43620#true} assume true; {43620#true} is VALID [2022-02-20 21:51:58,861 INFO L284 TraceCheckUtils]: 33: Hoare quadruple {43620#true} {43622#(= ~INTERF_STATE~0 0)} #1261#return; {43622#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:58,861 INFO L290 TraceCheckUtils]: 34: Hoare triple {43622#(= ~INTERF_STATE~0 0)} ldv_usb_driver_1_~tmp~29#1.base, ldv_usb_driver_1_~tmp~29#1.offset := ldv_usb_driver_1_#t~ret303#1.base, ldv_usb_driver_1_#t~ret303#1.offset;havoc ldv_usb_driver_1_#t~ret303#1.base, ldv_usb_driver_1_#t~ret303#1.offset;~ipheth_driver_group1~0.base, ~ipheth_driver_group1~0.offset := ldv_usb_driver_1_~tmp~29#1.base, ldv_usb_driver_1_~tmp~29#1.offset; {43622#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:58,861 INFO L290 TraceCheckUtils]: 35: Hoare triple {43622#(= ~INTERF_STATE~0 0)} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_19_#res#1 := ldv_usb_register_driver_19_~ldv_func_res~1#1; {43622#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:58,862 INFO L290 TraceCheckUtils]: 36: Hoare triple {43622#(= ~INTERF_STATE~0 0)} ipheth_driver_init_#t~ret302#1 := ldv_usb_register_driver_19_#res#1;assume { :end_inline_ldv_usb_register_driver_19 } true;assume -2147483648 <= ipheth_driver_init_#t~ret302#1 && ipheth_driver_init_#t~ret302#1 <= 2147483647;ipheth_driver_init_~tmp~28#1 := ipheth_driver_init_#t~ret302#1;havoc ipheth_driver_init_#t~ret302#1;ipheth_driver_init_#res#1 := ipheth_driver_init_~tmp~28#1; {43622#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:58,862 INFO L290 TraceCheckUtils]: 37: Hoare triple {43622#(= ~INTERF_STATE~0 0)} main_#t~ret315#1 := ipheth_driver_init_#res#1;assume { :end_inline_ipheth_driver_init } true;assume -2147483648 <= main_#t~ret315#1 && main_#t~ret315#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret315#1;havoc main_#t~ret315#1; {43622#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:58,862 INFO L290 TraceCheckUtils]: 38: Hoare triple {43622#(= ~INTERF_STATE~0 0)} assume !(0 == ~ldv_retval_1~0); {43622#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:58,863 INFO L290 TraceCheckUtils]: 39: Hoare triple {43622#(= ~INTERF_STATE~0 0)} assume 0 != ~ldv_retval_1~0;~ldv_state_variable_0~0 := 2; {43622#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:58,863 INFO L290 TraceCheckUtils]: 40: Hoare triple {43622#(= ~INTERF_STATE~0 0)} assume { :begin_inline_ldv_check_final_state } true; {43622#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:58,863 INFO L290 TraceCheckUtils]: 41: Hoare triple {43622#(= ~INTERF_STATE~0 0)} assume 0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616; {43622#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:58,864 INFO L290 TraceCheckUtils]: 42: Hoare triple {43622#(= ~INTERF_STATE~0 0)} assume 0 == (~usb_dev~0.base + ~usb_dev~0.offset) % 18446744073709551616; {43622#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:58,864 INFO L290 TraceCheckUtils]: 43: Hoare triple {43622#(= ~INTERF_STATE~0 0)} assume 0 == ~dev_counter~0; {43622#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 21:51:58,864 INFO L290 TraceCheckUtils]: 44: Hoare triple {43622#(= ~INTERF_STATE~0 0)} assume !(0 == ~INTERF_STATE~0); {43621#false} is VALID [2022-02-20 21:51:58,864 INFO L272 TraceCheckUtils]: 45: Hoare triple {43621#false} call ldv_error(); {43621#false} is VALID [2022-02-20 21:51:58,864 INFO L290 TraceCheckUtils]: 46: Hoare triple {43621#false} assume !false; {43621#false} is VALID [2022-02-20 21:51:58,865 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-02-20 21:51:58,865 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:51:58,865 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1182319591] [2022-02-20 21:51:58,865 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1182319591] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:51:58,865 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:51:58,865 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-02-20 21:51:58,865 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1362386541] [2022-02-20 21:51:58,866 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:51:58,867 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 47 [2022-02-20 21:51:58,867 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:51:58,867 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 21:51:58,907 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 38 edges. 38 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:51:58,907 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-02-20 21:51:58,907 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:51:58,907 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-02-20 21:51:58,907 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-02-20 21:51:58,908 INFO L87 Difference]: Start difference. First operand 1998 states and 2666 transitions. Second operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 21:52:00,698 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:52:00,698 INFO L93 Difference]: Finished difference Result 2140 states and 2908 transitions. [2022-02-20 21:52:00,698 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-02-20 21:52:00,698 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 47 [2022-02-20 21:52:00,699 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:52:00,699 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 21:52:00,741 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 746 transitions. [2022-02-20 21:52:00,741 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 21:52:00,748 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 746 transitions. [2022-02-20 21:52:00,748 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states and 746 transitions. [2022-02-20 21:52:01,375 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 746 edges. 746 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:52:01,577 INFO L225 Difference]: With dead ends: 2140 [2022-02-20 21:52:01,577 INFO L226 Difference]: Without dead ends: 2137 [2022-02-20 21:52:01,578 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-02-20 21:52:01,578 INFO L933 BasicCegarLoop]: 617 mSDtfsCounter, 771 mSDsluCounter, 263 mSDsCounter, 0 mSdLazyCounter, 193 mSolverCounterSat, 202 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 821 SdHoareTripleChecker+Valid, 880 SdHoareTripleChecker+Invalid, 395 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 202 IncrementalHoareTripleChecker+Valid, 193 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-02-20 21:52:01,579 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [821 Valid, 880 Invalid, 395 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [202 Valid, 193 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-02-20 21:52:01,580 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2137 states. [2022-02-20 21:52:01,628 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2137 to 1997. [2022-02-20 21:52:01,628 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:52:01,631 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2137 states. Second operand has 1997 states, 1487 states have (on average 1.2683254875588432) internal successors, (1886), 1516 states have internal predecessors, (1886), 363 states have call successors, (363), 137 states have call predecessors, (363), 146 states have return successors, (415), 355 states have call predecessors, (415), 361 states have call successors, (415) [2022-02-20 21:52:01,633 INFO L74 IsIncluded]: Start isIncluded. First operand 2137 states. Second operand has 1997 states, 1487 states have (on average 1.2683254875588432) internal successors, (1886), 1516 states have internal predecessors, (1886), 363 states have call successors, (363), 137 states have call predecessors, (363), 146 states have return successors, (415), 355 states have call predecessors, (415), 361 states have call successors, (415) [2022-02-20 21:52:01,635 INFO L87 Difference]: Start difference. First operand 2137 states. Second operand has 1997 states, 1487 states have (on average 1.2683254875588432) internal successors, (1886), 1516 states have internal predecessors, (1886), 363 states have call successors, (363), 137 states have call predecessors, (363), 146 states have return successors, (415), 355 states have call predecessors, (415), 361 states have call successors, (415) [2022-02-20 21:52:01,782 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:52:01,783 INFO L93 Difference]: Finished difference Result 2137 states and 2905 transitions. [2022-02-20 21:52:01,783 INFO L276 IsEmpty]: Start isEmpty. Operand 2137 states and 2905 transitions. [2022-02-20 21:52:01,788 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:52:01,788 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:52:01,791 INFO L74 IsIncluded]: Start isIncluded. First operand has 1997 states, 1487 states have (on average 1.2683254875588432) internal successors, (1886), 1516 states have internal predecessors, (1886), 363 states have call successors, (363), 137 states have call predecessors, (363), 146 states have return successors, (415), 355 states have call predecessors, (415), 361 states have call successors, (415) Second operand 2137 states. [2022-02-20 21:52:01,793 INFO L87 Difference]: Start difference. First operand has 1997 states, 1487 states have (on average 1.2683254875588432) internal successors, (1886), 1516 states have internal predecessors, (1886), 363 states have call successors, (363), 137 states have call predecessors, (363), 146 states have return successors, (415), 355 states have call predecessors, (415), 361 states have call successors, (415) Second operand 2137 states. [2022-02-20 21:52:01,930 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:52:01,930 INFO L93 Difference]: Finished difference Result 2137 states and 2905 transitions. [2022-02-20 21:52:01,931 INFO L276 IsEmpty]: Start isEmpty. Operand 2137 states and 2905 transitions. [2022-02-20 21:52:01,935 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:52:01,935 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:52:01,936 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:52:01,936 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:52:01,939 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1997 states, 1487 states have (on average 1.2683254875588432) internal successors, (1886), 1516 states have internal predecessors, (1886), 363 states have call successors, (363), 137 states have call predecessors, (363), 146 states have return successors, (415), 355 states have call predecessors, (415), 361 states have call successors, (415) [2022-02-20 21:52:02,141 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1997 states to 1997 states and 2664 transitions. [2022-02-20 21:52:02,143 INFO L78 Accepts]: Start accepts. Automaton has 1997 states and 2664 transitions. Word has length 47 [2022-02-20 21:52:02,143 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:52:02,143 INFO L470 AbstractCegarLoop]: Abstraction has 1997 states and 2664 transitions. [2022-02-20 21:52:02,143 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 21:52:02,143 INFO L276 IsEmpty]: Start isEmpty. Operand 1997 states and 2664 transitions. [2022-02-20 21:52:02,144 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2022-02-20 21:52:02,144 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:52:02,144 INFO L514 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:52:02,145 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2022-02-20 21:52:02,145 INFO L402 AbstractCegarLoop]: === Iteration 7 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:52:02,145 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:52:02,145 INFO L85 PathProgramCache]: Analyzing trace with hash 737940065, now seen corresponding path program 1 times [2022-02-20 21:52:02,145 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:52:02,146 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1091578686] [2022-02-20 21:52:02,146 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:52:02,146 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:52:02,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:02,231 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 21:52:02,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:02,239 INFO L290 TraceCheckUtils]: 0: Hoare triple {53803#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {53784#true} is VALID [2022-02-20 21:52:02,239 INFO L290 TraceCheckUtils]: 1: Hoare triple {53784#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {53784#true} is VALID [2022-02-20 21:52:02,239 INFO L290 TraceCheckUtils]: 2: Hoare triple {53784#true} assume true; {53784#true} is VALID [2022-02-20 21:52:02,240 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {53784#true} {53786#(= ~SERIAL_STATE~0 0)} #1203#return; {53786#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:52:02,240 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-02-20 21:52:02,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:02,248 INFO L290 TraceCheckUtils]: 0: Hoare triple {53803#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {53784#true} is VALID [2022-02-20 21:52:02,248 INFO L290 TraceCheckUtils]: 1: Hoare triple {53784#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {53784#true} is VALID [2022-02-20 21:52:02,248 INFO L290 TraceCheckUtils]: 2: Hoare triple {53784#true} assume true; {53784#true} is VALID [2022-02-20 21:52:02,249 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {53784#true} {53786#(= ~SERIAL_STATE~0 0)} #1205#return; {53786#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:52:02,249 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2022-02-20 21:52:02,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:02,256 INFO L290 TraceCheckUtils]: 0: Hoare triple {53803#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {53784#true} is VALID [2022-02-20 21:52:02,257 INFO L290 TraceCheckUtils]: 1: Hoare triple {53784#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {53784#true} is VALID [2022-02-20 21:52:02,257 INFO L290 TraceCheckUtils]: 2: Hoare triple {53784#true} assume true; {53784#true} is VALID [2022-02-20 21:52:02,257 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {53784#true} {53786#(= ~SERIAL_STATE~0 0)} #1207#return; {53786#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:52:02,258 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 29 [2022-02-20 21:52:02,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:02,265 INFO L290 TraceCheckUtils]: 0: Hoare triple {53803#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {53784#true} is VALID [2022-02-20 21:52:02,265 INFO L290 TraceCheckUtils]: 1: Hoare triple {53784#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {53784#true} is VALID [2022-02-20 21:52:02,265 INFO L290 TraceCheckUtils]: 2: Hoare triple {53784#true} assume true; {53784#true} is VALID [2022-02-20 21:52:02,266 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {53784#true} {53786#(= ~SERIAL_STATE~0 0)} #1261#return; {53786#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:52:02,266 INFO L290 TraceCheckUtils]: 0: Hoare triple {53784#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(80, 2);call #Ultimate.allocInit(26, 3);call #Ultimate.allocInit(63, 4);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(24, 6);call #Ultimate.allocInit(28, 7);call #Ultimate.allocInit(24, 8);call #Ultimate.allocInit(20, 9);call #Ultimate.allocInit(24, 10);call #Ultimate.allocInit(25, 11);call #Ultimate.allocInit(19, 12);call #Ultimate.allocInit(25, 13);call #Ultimate.allocInit(19, 14);call #Ultimate.allocInit(45, 15);call #Ultimate.allocInit(19, 16);call #Ultimate.allocInit(24, 17);call #Ultimate.allocInit(17, 18);call #Ultimate.allocInit(217, 19);call #Ultimate.allocInit(29, 20);call #Ultimate.allocInit(10, 21);call #Ultimate.allocInit(24, 22);call #Ultimate.allocInit(10, 23);call #Ultimate.allocInit(16, 24);call #Ultimate.allocInit(18, 25);call #Ultimate.allocInit(6, 26);call write~init~int(101, 26, 0, 1);call write~init~int(116, 26, 1, 1);call write~init~int(104, 26, 2, 1);call write~init~int(37, 26, 3, 1);call write~init~int(100, 26, 4, 1);call write~init~int(0, 26, 5, 1);call #Ultimate.allocInit(45, 27);call #Ultimate.allocInit(26, 28);call #Ultimate.allocInit(30, 29);call #Ultimate.allocInit(31, 30);call #Ultimate.allocInit(27, 31);call #Ultimate.allocInit(30, 32);call #Ultimate.allocInit(43, 33);call #Ultimate.allocInit(44, 34);call #Ultimate.allocInit(7, 35);call write~init~int(105, 35, 0, 1);call write~init~int(112, 35, 1, 1);call write~init~int(104, 35, 2, 1);call write~init~int(101, 35, 3, 1);call write~init~int(116, 35, 4, 1);call write~init~int(104, 35, 5, 1);call write~init~int(0, 35, 6, 1);call #Ultimate.allocInit(7, 36);call write~init~int(105, 36, 0, 1);call write~init~int(112, 36, 1, 1);call write~init~int(104, 36, 2, 1);call write~init~int(101, 36, 3, 1);call write~init~int(116, 36, 4, 1);call write~init~int(104, 36, 5, 1);call write~init~int(0, 36, 6, 1);~ldv_state_variable_3~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_2~0 := 0;~ipheth_netdev_ops_group1~0.base, ~ipheth_netdev_ops_group1~0.offset := 0, 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~ipheth_driver_group1~0.base, ~ipheth_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#ipheth_table~0.base, ~#ipheth_table~0.offset := 37, 0;call #Ultimate.allocInit(250, 37);call write~init~int(899, ~#ipheth_table~0.base, ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 2 + ~#ipheth_table~0.offset, 2);call write~init~int(4752, ~#ipheth_table~0.base, 4 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 6 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 8 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 10 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 11 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 12 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 13 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 14 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 15 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 16 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 17 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 25 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 27 + ~#ipheth_table~0.offset, 2);call write~init~int(4754, ~#ipheth_table~0.base, 29 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 31 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 33 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 35 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 36 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 37 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 38 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 39 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 40 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 41 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 42 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 50 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 52 + ~#ipheth_table~0.offset, 2);call write~init~int(4756, ~#ipheth_table~0.base, 54 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 56 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 58 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 60 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 61 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 62 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 63 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 64 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 65 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 66 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 67 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 75 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 77 + ~#ipheth_table~0.offset, 2);call write~init~int(4759, ~#ipheth_table~0.base, 79 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 81 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 83 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 85 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 86 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 87 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 88 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 89 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 90 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 91 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 92 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 100 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 102 + ~#ipheth_table~0.offset, 2);call write~init~int(4762, ~#ipheth_table~0.base, 104 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 106 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 108 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 110 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 111 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 112 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 113 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 114 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 115 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 116 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 117 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 125 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 127 + ~#ipheth_table~0.offset, 2);call write~init~int(4779, ~#ipheth_table~0.base, 129 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 131 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 133 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 135 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 136 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 137 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 138 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 139 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 140 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 141 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 142 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 150 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 152 + ~#ipheth_table~0.offset, 2);call write~init~int(4764, ~#ipheth_table~0.base, 154 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 156 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 158 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 160 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 161 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 162 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 163 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 164 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 165 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 166 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 167 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 175 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 177 + ~#ipheth_table~0.offset, 2);call write~init~int(4768, ~#ipheth_table~0.base, 179 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 181 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 183 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 185 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 186 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 187 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 188 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 189 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 190 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 191 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 192 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 200 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 202 + ~#ipheth_table~0.offset, 2);call write~init~int(4776, ~#ipheth_table~0.base, 204 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 206 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 208 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 210 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 211 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 212 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 213 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 214 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 215 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 216 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 217 + ~#ipheth_table~0.offset, 8);call write~init~int(0, ~#ipheth_table~0.base, 225 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 227 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 229 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 231 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 233 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 235 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 236 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 237 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 238 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 239 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 240 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 241 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 242 + ~#ipheth_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.bInterfaceNumber := 0;~__mod_usb_device_table~0.driver_info := 0;~#ipheth_netdev_ops~0.base, ~#ipheth_netdev_ops~0.offset := 38, 0;call #Ultimate.allocInit(448, 38);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 8 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_open.base, #funAddr~ipheth_open.offset, ~#ipheth_netdev_ops~0.base, 16 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_close.base, #funAddr~ipheth_close.offset, ~#ipheth_netdev_ops~0.base, 24 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_tx.base, #funAddr~ipheth_tx.offset, ~#ipheth_netdev_ops~0.base, 32 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 40 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 48 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 56 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 64 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 72 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 80 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 88 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 96 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 104 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_tx_timeout.base, #funAddr~ipheth_tx_timeout.offset, ~#ipheth_netdev_ops~0.base, 112 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 120 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 128 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 136 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 144 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 152 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 160 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 168 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 176 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 184 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 192 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 200 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 208 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 216 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 224 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 232 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 240 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 248 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 256 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 264 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 272 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 280 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 288 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 296 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 304 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 312 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 320 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 328 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 336 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 344 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 352 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 360 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 368 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 376 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 384 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 392 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 400 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 408 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 416 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 424 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 432 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 440 + ~#ipheth_netdev_ops~0.offset, 8);~#ipheth_driver~0.base, ~#ipheth_driver~0.offset := 39, 0;call #Ultimate.allocInit(285, 39);call write~init~$Pointer$(35, 0, ~#ipheth_driver~0.base, ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_probe.base, #funAddr~ipheth_probe.offset, ~#ipheth_driver~0.base, 8 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_disconnect.base, #funAddr~ipheth_disconnect.offset, ~#ipheth_driver~0.base, 16 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 24 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 32 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 40 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 48 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 56 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 64 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(~#ipheth_table~0.base, ~#ipheth_table~0.offset, ~#ipheth_driver~0.base, 72 + ~#ipheth_driver~0.offset, 8);call write~init~int(0, ~#ipheth_driver~0.base, 80 + ~#ipheth_driver~0.offset, 4);call write~init~int(0, ~#ipheth_driver~0.base, 84 + ~#ipheth_driver~0.offset, 4);call write~init~int(0, ~#ipheth_driver~0.base, 88 + ~#ipheth_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 92 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 100 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 108 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 116 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 124 + ~#ipheth_driver~0.offset, 8);call write~init~int(0, ~#ipheth_driver~0.base, 132 + ~#ipheth_driver~0.offset, 4);call write~init~int(0, ~#ipheth_driver~0.base, 136 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 148 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 156 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 164 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 172 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 180 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 188 + ~#ipheth_driver~0.offset, 8);call write~init~int(0, ~#ipheth_driver~0.base, 196 + ~#ipheth_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 197 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 205 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 213 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 221 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 229 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 237 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 245 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 253 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 261 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 269 + ~#ipheth_driver~0.offset, 8);call write~init~int(0, ~#ipheth_driver~0.base, 277 + ~#ipheth_driver~0.offset, 4);call write~init~int(0, ~#ipheth_driver~0.base, 281 + ~#ipheth_driver~0.offset, 1);call write~init~int(0, ~#ipheth_driver~0.base, 282 + ~#ipheth_driver~0.offset, 1);call write~init~int(1, ~#ipheth_driver~0.base, 283 + ~#ipheth_driver~0.offset, 1);call write~init~int(0, ~#ipheth_driver~0.base, 284 + ~#ipheth_driver~0.offset, 1);~ldv_retval_2~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {53786#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:52:02,267 INFO L290 TraceCheckUtils]: 1: Hoare triple {53786#(= ~SERIAL_STATE~0 0)} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret305#1.base, main_#t~ret305#1.offset, main_#t~ret306#1.base, main_#t~ret306#1.offset, main_#t~ret307#1.base, main_#t~ret307#1.offset, main_#t~nondet308#1, main_#t~switch309#1, main_#t~nondet310#1, main_#t~switch311#1, main_#t~ret312#1, main_#t~nondet313#1, main_#t~switch314#1, main_#t~ret315#1, main_#t~nondet316#1, main_#t~switch317#1, main_#t~ret318#1, main_#t~nondet319#1, main_#t~switch320#1, main_#t~ret321#1, main_#t~ret322#1, main_#t~ret323#1, main_#t~ret324#1, main_#t~ret325#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~31#1.base, main_~tmp~31#1.offset, main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset, main_~tmp___0~12#1.base, main_~tmp___0~12#1.offset, main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset, main_~tmp___1~4#1.base, main_~tmp___1~4#1.offset, main_~tmp___2~2#1, main_~tmp___3~1#1, main_~tmp___4~0#1, main_~tmp___5~0#1, main_~tmp___6~0#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~31#1.base, main_~tmp~31#1.offset;havoc main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset;havoc main_~tmp___0~12#1.base, main_~tmp___0~12#1.offset;havoc main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset;havoc main_~tmp___1~4#1.base, main_~tmp___1~4#1.offset;havoc main_~tmp___2~2#1;havoc main_~tmp___3~1#1;havoc main_~tmp___4~0#1;havoc main_~tmp___5~0#1;havoc main_~tmp___6~0#1; {53786#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:52:02,267 INFO L272 TraceCheckUtils]: 2: Hoare triple {53786#(= ~SERIAL_STATE~0 0)} call main_#t~ret305#1.base, main_#t~ret305#1.offset := ldv_zalloc(32); {53803#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:02,268 INFO L290 TraceCheckUtils]: 3: Hoare triple {53803#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {53784#true} is VALID [2022-02-20 21:52:02,268 INFO L290 TraceCheckUtils]: 4: Hoare triple {53784#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {53784#true} is VALID [2022-02-20 21:52:02,269 INFO L290 TraceCheckUtils]: 5: Hoare triple {53784#true} assume true; {53784#true} is VALID [2022-02-20 21:52:02,270 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {53784#true} {53786#(= ~SERIAL_STATE~0 0)} #1203#return; {53786#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:52:02,271 INFO L290 TraceCheckUtils]: 7: Hoare triple {53786#(= ~SERIAL_STATE~0 0)} main_~tmp~31#1.base, main_~tmp~31#1.offset := main_#t~ret305#1.base, main_#t~ret305#1.offset;havoc main_#t~ret305#1.base, main_#t~ret305#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~31#1.base, main_~tmp~31#1.offset; {53786#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:52:02,271 INFO L272 TraceCheckUtils]: 8: Hoare triple {53786#(= ~SERIAL_STATE~0 0)} call main_#t~ret306#1.base, main_#t~ret306#1.offset := ldv_zalloc(3136); {53803#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:02,271 INFO L290 TraceCheckUtils]: 9: Hoare triple {53803#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {53784#true} is VALID [2022-02-20 21:52:02,272 INFO L290 TraceCheckUtils]: 10: Hoare triple {53784#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {53784#true} is VALID [2022-02-20 21:52:02,272 INFO L290 TraceCheckUtils]: 11: Hoare triple {53784#true} assume true; {53784#true} is VALID [2022-02-20 21:52:02,272 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {53784#true} {53786#(= ~SERIAL_STATE~0 0)} #1205#return; {53786#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:52:02,273 INFO L290 TraceCheckUtils]: 13: Hoare triple {53786#(= ~SERIAL_STATE~0 0)} main_~tmp___0~12#1.base, main_~tmp___0~12#1.offset := main_#t~ret306#1.base, main_#t~ret306#1.offset;havoc main_#t~ret306#1.base, main_#t~ret306#1.offset;main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset := main_~tmp___0~12#1.base, main_~tmp___0~12#1.offset; {53786#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:52:02,273 INFO L272 TraceCheckUtils]: 14: Hoare triple {53786#(= ~SERIAL_STATE~0 0)} call main_#t~ret307#1.base, main_#t~ret307#1.offset := ldv_zalloc(240); {53803#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:02,273 INFO L290 TraceCheckUtils]: 15: Hoare triple {53803#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {53784#true} is VALID [2022-02-20 21:52:02,273 INFO L290 TraceCheckUtils]: 16: Hoare triple {53784#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {53784#true} is VALID [2022-02-20 21:52:02,273 INFO L290 TraceCheckUtils]: 17: Hoare triple {53784#true} assume true; {53784#true} is VALID [2022-02-20 21:52:02,274 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {53784#true} {53786#(= ~SERIAL_STATE~0 0)} #1207#return; {53786#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:52:02,274 INFO L290 TraceCheckUtils]: 19: Hoare triple {53786#(= ~SERIAL_STATE~0 0)} main_~tmp___1~4#1.base, main_~tmp___1~4#1.offset := main_#t~ret307#1.base, main_#t~ret307#1.offset;havoc main_#t~ret307#1.base, main_#t~ret307#1.offset;main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset := main_~tmp___1~4#1.base, main_~tmp___1~4#1.offset;assume { :begin_inline_ldv_initialize } true; {53786#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:52:02,274 INFO L290 TraceCheckUtils]: 20: Hoare triple {53786#(= ~SERIAL_STATE~0 0)} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {53786#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:52:02,275 INFO L290 TraceCheckUtils]: 21: Hoare triple {53786#(= ~SERIAL_STATE~0 0)} assume -2147483648 <= main_#t~nondet308#1 && main_#t~nondet308#1 <= 2147483647;main_~tmp___2~2#1 := main_#t~nondet308#1;havoc main_#t~nondet308#1;main_#t~switch309#1 := 0 == main_~tmp___2~2#1; {53786#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:52:02,275 INFO L290 TraceCheckUtils]: 22: Hoare triple {53786#(= ~SERIAL_STATE~0 0)} assume !main_#t~switch309#1;main_#t~switch309#1 := main_#t~switch309#1 || 1 == main_~tmp___2~2#1; {53786#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:52:02,275 INFO L290 TraceCheckUtils]: 23: Hoare triple {53786#(= ~SERIAL_STATE~0 0)} assume main_#t~switch309#1; {53786#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:52:02,276 INFO L290 TraceCheckUtils]: 24: Hoare triple {53786#(= ~SERIAL_STATE~0 0)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet313#1 && main_#t~nondet313#1 <= 2147483647;main_~tmp___4~0#1 := main_#t~nondet313#1;havoc main_#t~nondet313#1;main_#t~switch314#1 := 0 == main_~tmp___4~0#1; {53786#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:52:02,276 INFO L290 TraceCheckUtils]: 25: Hoare triple {53786#(= ~SERIAL_STATE~0 0)} assume !main_#t~switch314#1;main_#t~switch314#1 := main_#t~switch314#1 || 1 == main_~tmp___4~0#1; {53786#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:52:02,276 INFO L290 TraceCheckUtils]: 26: Hoare triple {53786#(= ~SERIAL_STATE~0 0)} assume main_#t~switch314#1; {53786#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:52:02,276 INFO L290 TraceCheckUtils]: 27: Hoare triple {53786#(= ~SERIAL_STATE~0 0)} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_ipheth_driver_init } true;havoc ipheth_driver_init_#res#1;havoc ipheth_driver_init_#t~ret302#1, ipheth_driver_init_~tmp~28#1;havoc ipheth_driver_init_~tmp~28#1;assume { :begin_inline_ldv_usb_register_driver_19 } true;ldv_usb_register_driver_19_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_19_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_19_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg3#1.offset := ~#ipheth_driver~0.base, ~#ipheth_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 36, 0;havoc ldv_usb_register_driver_19_#res#1;havoc ldv_usb_register_driver_19_#t~ret333#1, ldv_usb_register_driver_19_~ldv_func_arg1#1.base, ldv_usb_register_driver_19_~ldv_func_arg1#1.offset, ldv_usb_register_driver_19_~ldv_func_arg2#1.base, ldv_usb_register_driver_19_~ldv_func_arg2#1.offset, ldv_usb_register_driver_19_~ldv_func_arg3#1.base, ldv_usb_register_driver_19_~ldv_func_arg3#1.offset, ldv_usb_register_driver_19_~ldv_func_res~1#1, ldv_usb_register_driver_19_~tmp~39#1;ldv_usb_register_driver_19_~ldv_func_arg1#1.base, ldv_usb_register_driver_19_~ldv_func_arg1#1.offset := ldv_usb_register_driver_19_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_19_~ldv_func_arg2#1.base, ldv_usb_register_driver_19_~ldv_func_arg2#1.offset := ldv_usb_register_driver_19_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_19_~ldv_func_arg3#1.base, ldv_usb_register_driver_19_~ldv_func_arg3#1.offset := ldv_usb_register_driver_19_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_19_~ldv_func_res~1#1;havoc ldv_usb_register_driver_19_~tmp~39#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_19_~ldv_func_arg1#1.base, ldv_usb_register_driver_19_~ldv_func_arg1#1.offset, ldv_usb_register_driver_19_~ldv_func_arg2#1.base, ldv_usb_register_driver_19_~ldv_func_arg2#1.offset, ldv_usb_register_driver_19_~ldv_func_arg3#1.base, ldv_usb_register_driver_19_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet365#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet365#1 && usb_register_driver_#t~nondet365#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet365#1;havoc usb_register_driver_#t~nondet365#1; {53786#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:52:02,277 INFO L290 TraceCheckUtils]: 28: Hoare triple {53786#(= ~SERIAL_STATE~0 0)} ldv_usb_register_driver_19_#t~ret333#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_19_#t~ret333#1 && ldv_usb_register_driver_19_#t~ret333#1 <= 2147483647;ldv_usb_register_driver_19_~tmp~39#1 := ldv_usb_register_driver_19_#t~ret333#1;havoc ldv_usb_register_driver_19_#t~ret333#1;ldv_usb_register_driver_19_~ldv_func_res~1#1 := ldv_usb_register_driver_19_~tmp~39#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret303#1.base, ldv_usb_driver_1_#t~ret303#1.offset, ldv_usb_driver_1_~tmp~29#1.base, ldv_usb_driver_1_~tmp~29#1.offset;havoc ldv_usb_driver_1_~tmp~29#1.base, ldv_usb_driver_1_~tmp~29#1.offset; {53786#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:52:02,277 INFO L272 TraceCheckUtils]: 29: Hoare triple {53786#(= ~SERIAL_STATE~0 0)} call ldv_usb_driver_1_#t~ret303#1.base, ldv_usb_driver_1_#t~ret303#1.offset := ldv_zalloc(1520); {53803#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:02,277 INFO L290 TraceCheckUtils]: 30: Hoare triple {53803#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {53784#true} is VALID [2022-02-20 21:52:02,277 INFO L290 TraceCheckUtils]: 31: Hoare triple {53784#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {53784#true} is VALID [2022-02-20 21:52:02,278 INFO L290 TraceCheckUtils]: 32: Hoare triple {53784#true} assume true; {53784#true} is VALID [2022-02-20 21:52:02,278 INFO L284 TraceCheckUtils]: 33: Hoare quadruple {53784#true} {53786#(= ~SERIAL_STATE~0 0)} #1261#return; {53786#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:52:02,278 INFO L290 TraceCheckUtils]: 34: Hoare triple {53786#(= ~SERIAL_STATE~0 0)} ldv_usb_driver_1_~tmp~29#1.base, ldv_usb_driver_1_~tmp~29#1.offset := ldv_usb_driver_1_#t~ret303#1.base, ldv_usb_driver_1_#t~ret303#1.offset;havoc ldv_usb_driver_1_#t~ret303#1.base, ldv_usb_driver_1_#t~ret303#1.offset;~ipheth_driver_group1~0.base, ~ipheth_driver_group1~0.offset := ldv_usb_driver_1_~tmp~29#1.base, ldv_usb_driver_1_~tmp~29#1.offset; {53786#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:52:02,279 INFO L290 TraceCheckUtils]: 35: Hoare triple {53786#(= ~SERIAL_STATE~0 0)} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_19_#res#1 := ldv_usb_register_driver_19_~ldv_func_res~1#1; {53786#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:52:02,279 INFO L290 TraceCheckUtils]: 36: Hoare triple {53786#(= ~SERIAL_STATE~0 0)} ipheth_driver_init_#t~ret302#1 := ldv_usb_register_driver_19_#res#1;assume { :end_inline_ldv_usb_register_driver_19 } true;assume -2147483648 <= ipheth_driver_init_#t~ret302#1 && ipheth_driver_init_#t~ret302#1 <= 2147483647;ipheth_driver_init_~tmp~28#1 := ipheth_driver_init_#t~ret302#1;havoc ipheth_driver_init_#t~ret302#1;ipheth_driver_init_#res#1 := ipheth_driver_init_~tmp~28#1; {53786#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:52:02,279 INFO L290 TraceCheckUtils]: 37: Hoare triple {53786#(= ~SERIAL_STATE~0 0)} main_#t~ret315#1 := ipheth_driver_init_#res#1;assume { :end_inline_ipheth_driver_init } true;assume -2147483648 <= main_#t~ret315#1 && main_#t~ret315#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret315#1;havoc main_#t~ret315#1; {53786#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:52:02,280 INFO L290 TraceCheckUtils]: 38: Hoare triple {53786#(= ~SERIAL_STATE~0 0)} assume !(0 == ~ldv_retval_1~0); {53786#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:52:02,280 INFO L290 TraceCheckUtils]: 39: Hoare triple {53786#(= ~SERIAL_STATE~0 0)} assume 0 != ~ldv_retval_1~0;~ldv_state_variable_0~0 := 2; {53786#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:52:02,280 INFO L290 TraceCheckUtils]: 40: Hoare triple {53786#(= ~SERIAL_STATE~0 0)} assume { :begin_inline_ldv_check_final_state } true; {53786#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:52:02,280 INFO L290 TraceCheckUtils]: 41: Hoare triple {53786#(= ~SERIAL_STATE~0 0)} assume 0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616; {53786#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:52:02,281 INFO L290 TraceCheckUtils]: 42: Hoare triple {53786#(= ~SERIAL_STATE~0 0)} assume 0 == (~usb_dev~0.base + ~usb_dev~0.offset) % 18446744073709551616; {53786#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:52:02,281 INFO L290 TraceCheckUtils]: 43: Hoare triple {53786#(= ~SERIAL_STATE~0 0)} assume 0 == ~dev_counter~0; {53786#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:52:02,281 INFO L290 TraceCheckUtils]: 44: Hoare triple {53786#(= ~SERIAL_STATE~0 0)} assume 0 == ~INTERF_STATE~0; {53786#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 21:52:02,281 INFO L290 TraceCheckUtils]: 45: Hoare triple {53786#(= ~SERIAL_STATE~0 0)} assume !(0 == ~SERIAL_STATE~0); {53785#false} is VALID [2022-02-20 21:52:02,282 INFO L272 TraceCheckUtils]: 46: Hoare triple {53785#false} call ldv_error(); {53785#false} is VALID [2022-02-20 21:52:02,282 INFO L290 TraceCheckUtils]: 47: Hoare triple {53785#false} assume !false; {53785#false} is VALID [2022-02-20 21:52:02,282 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-02-20 21:52:02,282 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:52:02,282 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1091578686] [2022-02-20 21:52:02,282 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1091578686] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:52:02,282 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:52:02,283 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-02-20 21:52:02,283 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [464597214] [2022-02-20 21:52:02,283 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:52:02,283 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 48 [2022-02-20 21:52:02,283 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:52:02,284 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 21:52:02,322 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 39 edges. 39 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:52:02,322 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-02-20 21:52:02,323 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:52:02,323 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-02-20 21:52:02,323 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-02-20 21:52:02,323 INFO L87 Difference]: Start difference. First operand 1997 states and 2664 transitions. Second operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 21:52:04,136 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:52:04,136 INFO L93 Difference]: Finished difference Result 2139 states and 2906 transitions. [2022-02-20 21:52:04,136 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-02-20 21:52:04,137 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 48 [2022-02-20 21:52:04,138 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:52:04,138 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 21:52:04,144 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 744 transitions. [2022-02-20 21:52:04,145 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 21:52:04,151 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 744 transitions. [2022-02-20 21:52:04,151 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states and 744 transitions. [2022-02-20 21:52:04,743 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 744 edges. 744 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:52:04,945 INFO L225 Difference]: With dead ends: 2139 [2022-02-20 21:52:04,945 INFO L226 Difference]: Without dead ends: 2127 [2022-02-20 21:52:04,946 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-02-20 21:52:04,946 INFO L933 BasicCegarLoop]: 616 mSDtfsCounter, 768 mSDsluCounter, 263 mSDsCounter, 0 mSdLazyCounter, 191 mSolverCounterSat, 201 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 818 SdHoareTripleChecker+Valid, 879 SdHoareTripleChecker+Invalid, 392 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 201 IncrementalHoareTripleChecker+Valid, 191 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-02-20 21:52:04,947 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [818 Valid, 879 Invalid, 392 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [201 Valid, 191 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-02-20 21:52:04,948 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2127 states. [2022-02-20 21:52:04,997 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2127 to 1987. [2022-02-20 21:52:04,997 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:52:05,000 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2127 states. Second operand has 1987 states, 1478 states have (on average 1.2679296346414073) internal successors, (1874), 1506 states have internal predecessors, (1874), 362 states have call successors, (362), 137 states have call predecessors, (362), 146 states have return successors, (415), 355 states have call predecessors, (415), 361 states have call successors, (415) [2022-02-20 21:52:05,002 INFO L74 IsIncluded]: Start isIncluded. First operand 2127 states. Second operand has 1987 states, 1478 states have (on average 1.2679296346414073) internal successors, (1874), 1506 states have internal predecessors, (1874), 362 states have call successors, (362), 137 states have call predecessors, (362), 146 states have return successors, (415), 355 states have call predecessors, (415), 361 states have call successors, (415) [2022-02-20 21:52:05,004 INFO L87 Difference]: Start difference. First operand 2127 states. Second operand has 1987 states, 1478 states have (on average 1.2679296346414073) internal successors, (1874), 1506 states have internal predecessors, (1874), 362 states have call successors, (362), 137 states have call predecessors, (362), 146 states have return successors, (415), 355 states have call predecessors, (415), 361 states have call successors, (415) [2022-02-20 21:52:05,146 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:52:05,147 INFO L93 Difference]: Finished difference Result 2127 states and 2892 transitions. [2022-02-20 21:52:05,147 INFO L276 IsEmpty]: Start isEmpty. Operand 2127 states and 2892 transitions. [2022-02-20 21:52:05,151 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:52:05,152 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:52:05,155 INFO L74 IsIncluded]: Start isIncluded. First operand has 1987 states, 1478 states have (on average 1.2679296346414073) internal successors, (1874), 1506 states have internal predecessors, (1874), 362 states have call successors, (362), 137 states have call predecessors, (362), 146 states have return successors, (415), 355 states have call predecessors, (415), 361 states have call successors, (415) Second operand 2127 states. [2022-02-20 21:52:05,157 INFO L87 Difference]: Start difference. First operand has 1987 states, 1478 states have (on average 1.2679296346414073) internal successors, (1874), 1506 states have internal predecessors, (1874), 362 states have call successors, (362), 137 states have call predecessors, (362), 146 states have return successors, (415), 355 states have call predecessors, (415), 361 states have call successors, (415) Second operand 2127 states. [2022-02-20 21:52:05,292 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:52:05,293 INFO L93 Difference]: Finished difference Result 2127 states and 2892 transitions. [2022-02-20 21:52:05,293 INFO L276 IsEmpty]: Start isEmpty. Operand 2127 states and 2892 transitions. [2022-02-20 21:52:05,298 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:52:05,298 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:52:05,298 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:52:05,298 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:52:05,301 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1987 states, 1478 states have (on average 1.2679296346414073) internal successors, (1874), 1506 states have internal predecessors, (1874), 362 states have call successors, (362), 137 states have call predecessors, (362), 146 states have return successors, (415), 355 states have call predecessors, (415), 361 states have call successors, (415) [2022-02-20 21:52:05,486 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1987 states to 1987 states and 2651 transitions. [2022-02-20 21:52:05,486 INFO L78 Accepts]: Start accepts. Automaton has 1987 states and 2651 transitions. Word has length 48 [2022-02-20 21:52:05,487 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:52:05,487 INFO L470 AbstractCegarLoop]: Abstraction has 1987 states and 2651 transitions. [2022-02-20 21:52:05,487 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 21:52:05,487 INFO L276 IsEmpty]: Start isEmpty. Operand 1987 states and 2651 transitions. [2022-02-20 21:52:05,490 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 154 [2022-02-20 21:52:05,490 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:52:05,491 INFO L514 BasicCegarLoop]: trace histogram [5, 5, 5, 4, 4, 4, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:52:05,491 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2022-02-20 21:52:05,491 INFO L402 AbstractCegarLoop]: === Iteration 8 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:52:05,491 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:52:05,491 INFO L85 PathProgramCache]: Analyzing trace with hash -1153772682, now seen corresponding path program 1 times [2022-02-20 21:52:05,492 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:52:05,492 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1215959370] [2022-02-20 21:52:05,492 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:52:05,492 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:52:05,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:05,610 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 21:52:05,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:05,615 INFO L290 TraceCheckUtils]: 0: Hoare triple {63978#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {63911#true} is VALID [2022-02-20 21:52:05,615 INFO L290 TraceCheckUtils]: 1: Hoare triple {63911#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {63911#true} is VALID [2022-02-20 21:52:05,615 INFO L290 TraceCheckUtils]: 2: Hoare triple {63911#true} assume true; {63911#true} is VALID [2022-02-20 21:52:05,615 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {63911#true} {63911#true} #1203#return; {63911#true} is VALID [2022-02-20 21:52:05,616 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-02-20 21:52:05,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:05,620 INFO L290 TraceCheckUtils]: 0: Hoare triple {63978#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {63911#true} is VALID [2022-02-20 21:52:05,620 INFO L290 TraceCheckUtils]: 1: Hoare triple {63911#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {63911#true} is VALID [2022-02-20 21:52:05,620 INFO L290 TraceCheckUtils]: 2: Hoare triple {63911#true} assume true; {63911#true} is VALID [2022-02-20 21:52:05,621 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {63911#true} {63911#true} #1205#return; {63911#true} is VALID [2022-02-20 21:52:05,621 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2022-02-20 21:52:05,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:05,626 INFO L290 TraceCheckUtils]: 0: Hoare triple {63978#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {63911#true} is VALID [2022-02-20 21:52:05,626 INFO L290 TraceCheckUtils]: 1: Hoare triple {63911#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {63911#true} is VALID [2022-02-20 21:52:05,626 INFO L290 TraceCheckUtils]: 2: Hoare triple {63911#true} assume true; {63911#true} is VALID [2022-02-20 21:52:05,626 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {63911#true} {63911#true} #1207#return; {63911#true} is VALID [2022-02-20 21:52:05,630 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-02-20 21:52:05,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:05,636 INFO L290 TraceCheckUtils]: 0: Hoare triple {63979#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet79 && #t~nondet79 <= 2147483647;~tmp___0~2 := #t~nondet79;havoc #t~nondet79; {63911#true} is VALID [2022-02-20 21:52:05,636 INFO L290 TraceCheckUtils]: 1: Hoare triple {63911#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {63911#true} is VALID [2022-02-20 21:52:05,636 INFO L290 TraceCheckUtils]: 2: Hoare triple {63911#true} assume true; {63911#true} is VALID [2022-02-20 21:52:05,636 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {63911#true} {63912#false} #1209#return; {63912#false} is VALID [2022-02-20 21:52:05,636 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 36 [2022-02-20 21:52:05,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:05,642 INFO L290 TraceCheckUtils]: 0: Hoare triple {63979#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet79 && #t~nondet79 <= 2147483647;~tmp___0~2 := #t~nondet79;havoc #t~nondet79; {63911#true} is VALID [2022-02-20 21:52:05,642 INFO L290 TraceCheckUtils]: 1: Hoare triple {63911#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {63911#true} is VALID [2022-02-20 21:52:05,642 INFO L290 TraceCheckUtils]: 2: Hoare triple {63911#true} assume true; {63911#true} is VALID [2022-02-20 21:52:05,643 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {63911#true} {63912#false} #1213#return; {63912#false} is VALID [2022-02-20 21:52:05,643 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 47 [2022-02-20 21:52:05,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:05,647 INFO L290 TraceCheckUtils]: 0: Hoare triple {63911#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3136 + ~dev.offset; {63911#true} is VALID [2022-02-20 21:52:05,648 INFO L290 TraceCheckUtils]: 1: Hoare triple {63911#true} assume true; {63911#true} is VALID [2022-02-20 21:52:05,648 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {63911#true} {63912#false} #1215#return; {63912#false} is VALID [2022-02-20 21:52:05,648 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 52 [2022-02-20 21:52:05,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:05,652 INFO L290 TraceCheckUtils]: 0: Hoare triple {63979#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet79 && #t~nondet79 <= 2147483647;~tmp___0~2 := #t~nondet79;havoc #t~nondet79; {63911#true} is VALID [2022-02-20 21:52:05,653 INFO L290 TraceCheckUtils]: 1: Hoare triple {63911#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {63911#true} is VALID [2022-02-20 21:52:05,653 INFO L290 TraceCheckUtils]: 2: Hoare triple {63911#true} assume true; {63911#true} is VALID [2022-02-20 21:52:05,653 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {63911#true} {63912#false} #1217#return; {63912#false} is VALID [2022-02-20 21:52:05,653 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 64 [2022-02-20 21:52:05,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:05,660 INFO L290 TraceCheckUtils]: 0: Hoare triple {63979#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet79 && #t~nondet79 <= 2147483647;~tmp___0~2 := #t~nondet79;havoc #t~nondet79; {63911#true} is VALID [2022-02-20 21:52:05,660 INFO L290 TraceCheckUtils]: 1: Hoare triple {63911#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {63911#true} is VALID [2022-02-20 21:52:05,660 INFO L290 TraceCheckUtils]: 2: Hoare triple {63911#true} assume true; {63911#true} is VALID [2022-02-20 21:52:05,660 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {63911#true} {63912#false} #1223#return; {63912#false} is VALID [2022-02-20 21:52:05,660 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73 [2022-02-20 21:52:05,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:05,671 INFO L290 TraceCheckUtils]: 0: Hoare triple {63911#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;~endpoint := #in~endpoint;call #t~mem74 := read~int(~dev.base, ~dev.offset, 4);#res := (if (1 == 256 * #t~mem74 || 0 == 256 * #t~mem74) && 0 == 32768 * ~endpoint then 256 * #t~mem74 else (if 0 == 256 * #t~mem74 && (1 == 32768 * ~endpoint || 0 == 32768 * ~endpoint) then 32768 * ~endpoint else (if (1 == 256 * #t~mem74 && (1 == 32768 * ~endpoint || 0 == 32768 * ~endpoint)) || ((1 == 256 * #t~mem74 || 0 == 256 * #t~mem74) && 1 == 32768 * ~endpoint) then 1 else ~bitwiseOr(256 * #t~mem74, 32768 * ~endpoint))));havoc #t~mem74; {63911#true} is VALID [2022-02-20 21:52:05,671 INFO L290 TraceCheckUtils]: 1: Hoare triple {63911#true} assume true; {63911#true} is VALID [2022-02-20 21:52:05,671 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {63911#true} {63912#false} #1225#return; {63912#false} is VALID [2022-02-20 21:52:05,671 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 78 [2022-02-20 21:52:05,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:05,681 INFO L290 TraceCheckUtils]: 0: Hoare triple {63911#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1 := #in~arg1;~arg2 := #in~arg2;~arg3 := #in~arg3;~arg4 := #in~arg4;~arg5 := #in~arg5;~arg6.base, ~arg6.offset := #in~arg6.base, #in~arg6.offset;~arg7 := #in~arg7;~arg8 := #in~arg8;assume -2147483648 <= #t~nondet364 && #t~nondet364 <= 2147483647;#res := #t~nondet364;havoc #t~nondet364; {63911#true} is VALID [2022-02-20 21:52:05,681 INFO L290 TraceCheckUtils]: 1: Hoare triple {63911#true} assume true; {63911#true} is VALID [2022-02-20 21:52:05,681 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {63911#true} {63912#false} #1227#return; {63912#false} is VALID [2022-02-20 21:52:05,688 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 91 [2022-02-20 21:52:05,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:05,698 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 21:52:05,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:05,704 INFO L290 TraceCheckUtils]: 0: Hoare triple {63979#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet79 && #t~nondet79 <= 2147483647;~tmp___0~2 := #t~nondet79;havoc #t~nondet79; {63911#true} is VALID [2022-02-20 21:52:05,704 INFO L290 TraceCheckUtils]: 1: Hoare triple {63911#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {63911#true} is VALID [2022-02-20 21:52:05,704 INFO L290 TraceCheckUtils]: 2: Hoare triple {63911#true} assume true; {63911#true} is VALID [2022-02-20 21:52:05,704 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {63911#true} {63911#true} #1173#return; {63911#true} is VALID [2022-02-20 21:52:05,704 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 7 [2022-02-20 21:52:05,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:05,708 INFO L290 TraceCheckUtils]: 0: Hoare triple {63911#true} havoc ~tmp~6;assume -2147483648 <= #t~nondet83 && #t~nondet83 <= 2147483647;~tmp~6 := #t~nondet83;havoc #t~nondet83;#res := ~tmp~6; {63911#true} is VALID [2022-02-20 21:52:05,709 INFO L290 TraceCheckUtils]: 1: Hoare triple {63911#true} assume true; {63911#true} is VALID [2022-02-20 21:52:05,709 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {63911#true} {63911#true} #1175#return; {63911#true} is VALID [2022-02-20 21:52:05,709 INFO L290 TraceCheckUtils]: 0: Hoare triple {63980#(and (= |old(#length)| |#length|) (= ~usb_urb~0.base |old(~usb_urb~0.base)|) (= ~usb_urb~0.offset |old(~usb_urb~0.offset)|) (= |old(#valid)| |#valid|))} havoc ~value~0.base, ~value~0.offset;havoc ~tmp~40.base, ~tmp~40.offset;havoc ~tmp___0~13; {63911#true} is VALID [2022-02-20 21:52:05,709 INFO L272 TraceCheckUtils]: 1: Hoare triple {63911#true} call #t~ret334.base, #t~ret334.offset := ldv_malloc(184); {63979#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:05,710 INFO L290 TraceCheckUtils]: 2: Hoare triple {63979#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet79 && #t~nondet79 <= 2147483647;~tmp___0~2 := #t~nondet79;havoc #t~nondet79; {63911#true} is VALID [2022-02-20 21:52:05,710 INFO L290 TraceCheckUtils]: 3: Hoare triple {63911#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {63911#true} is VALID [2022-02-20 21:52:05,710 INFO L290 TraceCheckUtils]: 4: Hoare triple {63911#true} assume true; {63911#true} is VALID [2022-02-20 21:52:05,710 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {63911#true} {63911#true} #1173#return; {63911#true} is VALID [2022-02-20 21:52:05,710 INFO L290 TraceCheckUtils]: 6: Hoare triple {63911#true} ~tmp~40.base, ~tmp~40.offset := #t~ret334.base, #t~ret334.offset;havoc #t~ret334.base, #t~ret334.offset;~value~0.base, ~value~0.offset := ~tmp~40.base, ~tmp~40.offset; {63911#true} is VALID [2022-02-20 21:52:05,710 INFO L272 TraceCheckUtils]: 7: Hoare triple {63911#true} call #t~ret335 := ldv_undef_int(); {63911#true} is VALID [2022-02-20 21:52:05,710 INFO L290 TraceCheckUtils]: 8: Hoare triple {63911#true} havoc ~tmp~6;assume -2147483648 <= #t~nondet83 && #t~nondet83 <= 2147483647;~tmp~6 := #t~nondet83;havoc #t~nondet83;#res := ~tmp~6; {63911#true} is VALID [2022-02-20 21:52:05,710 INFO L290 TraceCheckUtils]: 9: Hoare triple {63911#true} assume true; {63911#true} is VALID [2022-02-20 21:52:05,711 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {63911#true} {63911#true} #1175#return; {63911#true} is VALID [2022-02-20 21:52:05,711 INFO L290 TraceCheckUtils]: 11: Hoare triple {63911#true} assume -2147483648 <= #t~ret335 && #t~ret335 <= 2147483647;~tmp___0~13 := #t~ret335;havoc #t~ret335; {63911#true} is VALID [2022-02-20 21:52:05,711 INFO L290 TraceCheckUtils]: 12: Hoare triple {63911#true} assume 0 != ~tmp___0~13; {63911#true} is VALID [2022-02-20 21:52:05,711 INFO L290 TraceCheckUtils]: 13: Hoare triple {63911#true} assume 0 != (~value~0.base + ~value~0.offset) % 18446744073709551616;~usb_urb~0.base, ~usb_urb~0.offset := ~value~0.base, ~value~0.offset; {63911#true} is VALID [2022-02-20 21:52:05,711 INFO L290 TraceCheckUtils]: 14: Hoare triple {63911#true} #res.base, #res.offset := ~usb_urb~0.base, ~usb_urb~0.offset; {63911#true} is VALID [2022-02-20 21:52:05,711 INFO L290 TraceCheckUtils]: 15: Hoare triple {63911#true} assume true; {63911#true} is VALID [2022-02-20 21:52:05,711 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {63911#true} {63912#false} #1233#return; {63912#false} is VALID [2022-02-20 21:52:05,715 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 116 [2022-02-20 21:52:05,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:05,722 INFO L290 TraceCheckUtils]: 0: Hoare triple {63988#(= |old(#valid)| |#valid|)} ~p.base, ~p.offset := #in~p.base, #in~p.offset;call ULTIMATE.dealloc(~p.base, ~p.offset); {63911#true} is VALID [2022-02-20 21:52:05,722 INFO L290 TraceCheckUtils]: 1: Hoare triple {63911#true} assume true; {63911#true} is VALID [2022-02-20 21:52:05,722 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {63911#true} {63912#false} #1253#return; {63912#false} is VALID [2022-02-20 21:52:05,722 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 122 [2022-02-20 21:52:05,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:05,737 INFO L290 TraceCheckUtils]: 0: Hoare triple {63911#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset; {63911#true} is VALID [2022-02-20 21:52:05,737 INFO L290 TraceCheckUtils]: 1: Hoare triple {63911#true} assume true; {63911#true} is VALID [2022-02-20 21:52:05,737 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {63911#true} {63912#false} #1255#return; {63912#false} is VALID [2022-02-20 21:52:05,737 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 138 [2022-02-20 21:52:05,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:05,745 INFO L290 TraceCheckUtils]: 0: Hoare triple {63978#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {63911#true} is VALID [2022-02-20 21:52:05,745 INFO L290 TraceCheckUtils]: 1: Hoare triple {63911#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {63911#true} is VALID [2022-02-20 21:52:05,745 INFO L290 TraceCheckUtils]: 2: Hoare triple {63911#true} assume true; {63911#true} is VALID [2022-02-20 21:52:05,745 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {63911#true} {63912#false} #1261#return; {63912#false} is VALID [2022-02-20 21:52:05,745 INFO L290 TraceCheckUtils]: 0: Hoare triple {63911#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(80, 2);call #Ultimate.allocInit(26, 3);call #Ultimate.allocInit(63, 4);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(24, 6);call #Ultimate.allocInit(28, 7);call #Ultimate.allocInit(24, 8);call #Ultimate.allocInit(20, 9);call #Ultimate.allocInit(24, 10);call #Ultimate.allocInit(25, 11);call #Ultimate.allocInit(19, 12);call #Ultimate.allocInit(25, 13);call #Ultimate.allocInit(19, 14);call #Ultimate.allocInit(45, 15);call #Ultimate.allocInit(19, 16);call #Ultimate.allocInit(24, 17);call #Ultimate.allocInit(17, 18);call #Ultimate.allocInit(217, 19);call #Ultimate.allocInit(29, 20);call #Ultimate.allocInit(10, 21);call #Ultimate.allocInit(24, 22);call #Ultimate.allocInit(10, 23);call #Ultimate.allocInit(16, 24);call #Ultimate.allocInit(18, 25);call #Ultimate.allocInit(6, 26);call write~init~int(101, 26, 0, 1);call write~init~int(116, 26, 1, 1);call write~init~int(104, 26, 2, 1);call write~init~int(37, 26, 3, 1);call write~init~int(100, 26, 4, 1);call write~init~int(0, 26, 5, 1);call #Ultimate.allocInit(45, 27);call #Ultimate.allocInit(26, 28);call #Ultimate.allocInit(30, 29);call #Ultimate.allocInit(31, 30);call #Ultimate.allocInit(27, 31);call #Ultimate.allocInit(30, 32);call #Ultimate.allocInit(43, 33);call #Ultimate.allocInit(44, 34);call #Ultimate.allocInit(7, 35);call write~init~int(105, 35, 0, 1);call write~init~int(112, 35, 1, 1);call write~init~int(104, 35, 2, 1);call write~init~int(101, 35, 3, 1);call write~init~int(116, 35, 4, 1);call write~init~int(104, 35, 5, 1);call write~init~int(0, 35, 6, 1);call #Ultimate.allocInit(7, 36);call write~init~int(105, 36, 0, 1);call write~init~int(112, 36, 1, 1);call write~init~int(104, 36, 2, 1);call write~init~int(101, 36, 3, 1);call write~init~int(116, 36, 4, 1);call write~init~int(104, 36, 5, 1);call write~init~int(0, 36, 6, 1);~ldv_state_variable_3~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_2~0 := 0;~ipheth_netdev_ops_group1~0.base, ~ipheth_netdev_ops_group1~0.offset := 0, 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~ipheth_driver_group1~0.base, ~ipheth_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#ipheth_table~0.base, ~#ipheth_table~0.offset := 37, 0;call #Ultimate.allocInit(250, 37);call write~init~int(899, ~#ipheth_table~0.base, ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 2 + ~#ipheth_table~0.offset, 2);call write~init~int(4752, ~#ipheth_table~0.base, 4 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 6 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 8 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 10 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 11 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 12 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 13 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 14 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 15 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 16 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 17 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 25 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 27 + ~#ipheth_table~0.offset, 2);call write~init~int(4754, ~#ipheth_table~0.base, 29 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 31 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 33 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 35 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 36 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 37 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 38 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 39 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 40 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 41 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 42 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 50 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 52 + ~#ipheth_table~0.offset, 2);call write~init~int(4756, ~#ipheth_table~0.base, 54 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 56 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 58 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 60 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 61 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 62 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 63 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 64 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 65 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 66 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 67 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 75 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 77 + ~#ipheth_table~0.offset, 2);call write~init~int(4759, ~#ipheth_table~0.base, 79 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 81 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 83 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 85 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 86 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 87 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 88 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 89 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 90 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 91 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 92 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 100 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 102 + ~#ipheth_table~0.offset, 2);call write~init~int(4762, ~#ipheth_table~0.base, 104 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 106 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 108 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 110 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 111 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 112 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 113 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 114 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 115 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 116 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 117 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 125 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 127 + ~#ipheth_table~0.offset, 2);call write~init~int(4779, ~#ipheth_table~0.base, 129 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 131 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 133 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 135 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 136 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 137 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 138 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 139 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 140 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 141 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 142 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 150 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 152 + ~#ipheth_table~0.offset, 2);call write~init~int(4764, ~#ipheth_table~0.base, 154 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 156 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 158 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 160 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 161 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 162 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 163 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 164 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 165 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 166 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 167 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 175 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 177 + ~#ipheth_table~0.offset, 2);call write~init~int(4768, ~#ipheth_table~0.base, 179 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 181 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 183 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 185 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 186 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 187 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 188 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 189 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 190 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 191 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 192 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 200 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 202 + ~#ipheth_table~0.offset, 2);call write~init~int(4776, ~#ipheth_table~0.base, 204 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 206 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 208 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 210 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 211 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 212 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 213 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 214 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 215 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 216 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 217 + ~#ipheth_table~0.offset, 8);call write~init~int(0, ~#ipheth_table~0.base, 225 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 227 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 229 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 231 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 233 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 235 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 236 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 237 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 238 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 239 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 240 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 241 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 242 + ~#ipheth_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.bInterfaceNumber := 0;~__mod_usb_device_table~0.driver_info := 0;~#ipheth_netdev_ops~0.base, ~#ipheth_netdev_ops~0.offset := 38, 0;call #Ultimate.allocInit(448, 38);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 8 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_open.base, #funAddr~ipheth_open.offset, ~#ipheth_netdev_ops~0.base, 16 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_close.base, #funAddr~ipheth_close.offset, ~#ipheth_netdev_ops~0.base, 24 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_tx.base, #funAddr~ipheth_tx.offset, ~#ipheth_netdev_ops~0.base, 32 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 40 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 48 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 56 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 64 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 72 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 80 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 88 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 96 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 104 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_tx_timeout.base, #funAddr~ipheth_tx_timeout.offset, ~#ipheth_netdev_ops~0.base, 112 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 120 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 128 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 136 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 144 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 152 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 160 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 168 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 176 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 184 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 192 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 200 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 208 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 216 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 224 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 232 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 240 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 248 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 256 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 264 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 272 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 280 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 288 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 296 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 304 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 312 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 320 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 328 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 336 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 344 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 352 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 360 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 368 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 376 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 384 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 392 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 400 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 408 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 416 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 424 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 432 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 440 + ~#ipheth_netdev_ops~0.offset, 8);~#ipheth_driver~0.base, ~#ipheth_driver~0.offset := 39, 0;call #Ultimate.allocInit(285, 39);call write~init~$Pointer$(35, 0, ~#ipheth_driver~0.base, ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_probe.base, #funAddr~ipheth_probe.offset, ~#ipheth_driver~0.base, 8 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_disconnect.base, #funAddr~ipheth_disconnect.offset, ~#ipheth_driver~0.base, 16 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 24 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 32 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 40 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 48 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 56 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 64 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(~#ipheth_table~0.base, ~#ipheth_table~0.offset, ~#ipheth_driver~0.base, 72 + ~#ipheth_driver~0.offset, 8);call write~init~int(0, ~#ipheth_driver~0.base, 80 + ~#ipheth_driver~0.offset, 4);call write~init~int(0, ~#ipheth_driver~0.base, 84 + ~#ipheth_driver~0.offset, 4);call write~init~int(0, ~#ipheth_driver~0.base, 88 + ~#ipheth_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 92 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 100 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 108 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 116 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 124 + ~#ipheth_driver~0.offset, 8);call write~init~int(0, ~#ipheth_driver~0.base, 132 + ~#ipheth_driver~0.offset, 4);call write~init~int(0, ~#ipheth_driver~0.base, 136 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 148 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 156 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 164 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 172 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 180 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 188 + ~#ipheth_driver~0.offset, 8);call write~init~int(0, ~#ipheth_driver~0.base, 196 + ~#ipheth_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 197 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 205 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 213 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 221 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 229 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 237 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 245 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 253 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 261 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 269 + ~#ipheth_driver~0.offset, 8);call write~init~int(0, ~#ipheth_driver~0.base, 277 + ~#ipheth_driver~0.offset, 4);call write~init~int(0, ~#ipheth_driver~0.base, 281 + ~#ipheth_driver~0.offset, 1);call write~init~int(0, ~#ipheth_driver~0.base, 282 + ~#ipheth_driver~0.offset, 1);call write~init~int(1, ~#ipheth_driver~0.base, 283 + ~#ipheth_driver~0.offset, 1);call write~init~int(0, ~#ipheth_driver~0.base, 284 + ~#ipheth_driver~0.offset, 1);~ldv_retval_2~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {63911#true} is VALID [2022-02-20 21:52:05,746 INFO L290 TraceCheckUtils]: 1: Hoare triple {63911#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret305#1.base, main_#t~ret305#1.offset, main_#t~ret306#1.base, main_#t~ret306#1.offset, main_#t~ret307#1.base, main_#t~ret307#1.offset, main_#t~nondet308#1, main_#t~switch309#1, main_#t~nondet310#1, main_#t~switch311#1, main_#t~ret312#1, main_#t~nondet313#1, main_#t~switch314#1, main_#t~ret315#1, main_#t~nondet316#1, main_#t~switch317#1, main_#t~ret318#1, main_#t~nondet319#1, main_#t~switch320#1, main_#t~ret321#1, main_#t~ret322#1, main_#t~ret323#1, main_#t~ret324#1, main_#t~ret325#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~31#1.base, main_~tmp~31#1.offset, main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset, main_~tmp___0~12#1.base, main_~tmp___0~12#1.offset, main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset, main_~tmp___1~4#1.base, main_~tmp___1~4#1.offset, main_~tmp___2~2#1, main_~tmp___3~1#1, main_~tmp___4~0#1, main_~tmp___5~0#1, main_~tmp___6~0#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~31#1.base, main_~tmp~31#1.offset;havoc main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset;havoc main_~tmp___0~12#1.base, main_~tmp___0~12#1.offset;havoc main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset;havoc main_~tmp___1~4#1.base, main_~tmp___1~4#1.offset;havoc main_~tmp___2~2#1;havoc main_~tmp___3~1#1;havoc main_~tmp___4~0#1;havoc main_~tmp___5~0#1;havoc main_~tmp___6~0#1; {63911#true} is VALID [2022-02-20 21:52:05,747 INFO L272 TraceCheckUtils]: 2: Hoare triple {63911#true} call main_#t~ret305#1.base, main_#t~ret305#1.offset := ldv_zalloc(32); {63978#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:05,747 INFO L290 TraceCheckUtils]: 3: Hoare triple {63978#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {63911#true} is VALID [2022-02-20 21:52:05,747 INFO L290 TraceCheckUtils]: 4: Hoare triple {63911#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {63911#true} is VALID [2022-02-20 21:52:05,747 INFO L290 TraceCheckUtils]: 5: Hoare triple {63911#true} assume true; {63911#true} is VALID [2022-02-20 21:52:05,747 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {63911#true} {63911#true} #1203#return; {63911#true} is VALID [2022-02-20 21:52:05,747 INFO L290 TraceCheckUtils]: 7: Hoare triple {63911#true} main_~tmp~31#1.base, main_~tmp~31#1.offset := main_#t~ret305#1.base, main_#t~ret305#1.offset;havoc main_#t~ret305#1.base, main_#t~ret305#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~31#1.base, main_~tmp~31#1.offset; {63911#true} is VALID [2022-02-20 21:52:05,748 INFO L272 TraceCheckUtils]: 8: Hoare triple {63911#true} call main_#t~ret306#1.base, main_#t~ret306#1.offset := ldv_zalloc(3136); {63978#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:05,748 INFO L290 TraceCheckUtils]: 9: Hoare triple {63978#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {63911#true} is VALID [2022-02-20 21:52:05,748 INFO L290 TraceCheckUtils]: 10: Hoare triple {63911#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {63911#true} is VALID [2022-02-20 21:52:05,748 INFO L290 TraceCheckUtils]: 11: Hoare triple {63911#true} assume true; {63911#true} is VALID [2022-02-20 21:52:05,748 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {63911#true} {63911#true} #1205#return; {63911#true} is VALID [2022-02-20 21:52:05,749 INFO L290 TraceCheckUtils]: 13: Hoare triple {63911#true} main_~tmp___0~12#1.base, main_~tmp___0~12#1.offset := main_#t~ret306#1.base, main_#t~ret306#1.offset;havoc main_#t~ret306#1.base, main_#t~ret306#1.offset;main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset := main_~tmp___0~12#1.base, main_~tmp___0~12#1.offset; {63911#true} is VALID [2022-02-20 21:52:05,749 INFO L272 TraceCheckUtils]: 14: Hoare triple {63911#true} call main_#t~ret307#1.base, main_#t~ret307#1.offset := ldv_zalloc(240); {63978#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:05,749 INFO L290 TraceCheckUtils]: 15: Hoare triple {63978#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {63911#true} is VALID [2022-02-20 21:52:05,749 INFO L290 TraceCheckUtils]: 16: Hoare triple {63911#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {63911#true} is VALID [2022-02-20 21:52:05,749 INFO L290 TraceCheckUtils]: 17: Hoare triple {63911#true} assume true; {63911#true} is VALID [2022-02-20 21:52:05,749 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {63911#true} {63911#true} #1207#return; {63911#true} is VALID [2022-02-20 21:52:05,750 INFO L290 TraceCheckUtils]: 19: Hoare triple {63911#true} main_~tmp___1~4#1.base, main_~tmp___1~4#1.offset := main_#t~ret307#1.base, main_#t~ret307#1.offset;havoc main_#t~ret307#1.base, main_#t~ret307#1.offset;main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset := main_~tmp___1~4#1.base, main_~tmp___1~4#1.offset;assume { :begin_inline_ldv_initialize } true; {63911#true} is VALID [2022-02-20 21:52:05,750 INFO L290 TraceCheckUtils]: 20: Hoare triple {63911#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {63925#(= ~ldv_state_variable_1~0 0)} is VALID [2022-02-20 21:52:05,750 INFO L290 TraceCheckUtils]: 21: Hoare triple {63925#(= ~ldv_state_variable_1~0 0)} assume -2147483648 <= main_#t~nondet308#1 && main_#t~nondet308#1 <= 2147483647;main_~tmp___2~2#1 := main_#t~nondet308#1;havoc main_#t~nondet308#1;main_#t~switch309#1 := 0 == main_~tmp___2~2#1; {63925#(= ~ldv_state_variable_1~0 0)} is VALID [2022-02-20 21:52:05,750 INFO L290 TraceCheckUtils]: 22: Hoare triple {63925#(= ~ldv_state_variable_1~0 0)} assume main_#t~switch309#1; {63925#(= ~ldv_state_variable_1~0 0)} is VALID [2022-02-20 21:52:05,751 INFO L290 TraceCheckUtils]: 23: Hoare triple {63925#(= ~ldv_state_variable_1~0 0)} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= main_#t~nondet310#1 && main_#t~nondet310#1 <= 2147483647;main_~tmp___3~1#1 := main_#t~nondet310#1;havoc main_#t~nondet310#1;main_#t~switch311#1 := 0 == main_~tmp___3~1#1; {63912#false} is VALID [2022-02-20 21:52:05,751 INFO L290 TraceCheckUtils]: 24: Hoare triple {63912#false} assume main_#t~switch311#1; {63912#false} is VALID [2022-02-20 21:52:05,751 INFO L290 TraceCheckUtils]: 25: Hoare triple {63912#false} assume 1 == ~ldv_state_variable_1~0;assume { :begin_inline_ipheth_probe } true;ipheth_probe_#in~intf#1.base, ipheth_probe_#in~intf#1.offset, ipheth_probe_#in~id#1.base, ipheth_probe_#in~id#1.offset := ~ipheth_driver_group1~0.base, ~ipheth_driver_group1~0.offset, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc ipheth_probe_#res#1;havoc ipheth_probe_#t~ret271#1.base, ipheth_probe_#t~ret271#1.offset, ipheth_probe_#t~ret272#1.base, ipheth_probe_#t~ret272#1.offset, ipheth_probe_#t~strcpy~res273#1.base, ipheth_probe_#t~strcpy~res273#1.offset, ipheth_probe_#t~ret274#1.base, ipheth_probe_#t~ret274#1.offset, ipheth_probe_#t~ret275#1.base, ipheth_probe_#t~ret275#1.offset, ipheth_probe_#t~nondet276#1, ipheth_probe_#t~mem277#1.base, ipheth_probe_#t~mem277#1.offset, ipheth_probe_#t~ret278#1, ipheth_probe_#t~mem279#1, ipheth_probe_#t~ret280#1, ipheth_probe_#t~mem281#1, ipheth_probe_#t~mem282#1, ipheth_probe_#t~mem283#1, ipheth_probe_#t~mem284#1, ipheth_probe_#t~short285#1, ipheth_probe_#t~nondet286#1, ipheth_probe_#t~ret287#1.base, ipheth_probe_#t~ret287#1.offset, ipheth_probe_#t~mem288#1.base, ipheth_probe_#t~mem288#1.offset, ipheth_probe_#t~ret289#1, ipheth_probe_#t~mem290#1, ipheth_probe_#t~ret291#1, ipheth_probe_#t~nondet292#1, ipheth_probe_#t~ret293#1, ipheth_probe_#t~nondet294#1, ipheth_probe_#t~nondet295#1, ipheth_probe_#t~mem296#1.base, ipheth_probe_#t~mem296#1.offset, ipheth_probe_~intf#1.base, ipheth_probe_~intf#1.offset, ipheth_probe_~id#1.base, ipheth_probe_~id#1.offset, ipheth_probe_~udev~5#1.base, ipheth_probe_~udev~5#1.offset, ipheth_probe_~tmp~26#1.base, ipheth_probe_~tmp~26#1.offset, ipheth_probe_~hintf~0#1.base, ipheth_probe_~hintf~0#1.offset, ipheth_probe_~endp~0#1.base, ipheth_probe_~endp~0#1.offset, ipheth_probe_~dev~8#1.base, ipheth_probe_~dev~8#1.offset, ipheth_probe_~netdev~0#1.base, ipheth_probe_~netdev~0#1.offset, ipheth_probe_~i~0#1, ipheth_probe_~retval~5#1, ipheth_probe_~tmp___0~11#1.base, ipheth_probe_~tmp___0~11#1.offset, ipheth_probe_~tmp___1~3#1, ipheth_probe_~tmp___2~1#1, ipheth_probe_~tmp___3~0#1.base, ipheth_probe_~tmp___3~0#1.offset, ipheth_probe_~#__key~0#1.base, ipheth_probe_~#__key~0#1.offset, ipheth_probe_~#__constr_expr_0~0#1.base, ipheth_probe_~#__constr_expr_0~0#1.offset, ipheth_probe_~#__key___0~0#1.base, ipheth_probe_~#__key___0~0#1.offset;ipheth_probe_~intf#1.base, ipheth_probe_~intf#1.offset := ipheth_probe_#in~intf#1.base, ipheth_probe_#in~intf#1.offset;ipheth_probe_~id#1.base, ipheth_probe_~id#1.offset := ipheth_probe_#in~id#1.base, ipheth_probe_#in~id#1.offset;havoc ipheth_probe_~udev~5#1.base, ipheth_probe_~udev~5#1.offset;havoc ipheth_probe_~tmp~26#1.base, ipheth_probe_~tmp~26#1.offset;havoc ipheth_probe_~hintf~0#1.base, ipheth_probe_~hintf~0#1.offset;havoc ipheth_probe_~endp~0#1.base, ipheth_probe_~endp~0#1.offset;havoc ipheth_probe_~dev~8#1.base, ipheth_probe_~dev~8#1.offset;havoc ipheth_probe_~netdev~0#1.base, ipheth_probe_~netdev~0#1.offset;havoc ipheth_probe_~i~0#1;havoc ipheth_probe_~retval~5#1;havoc ipheth_probe_~tmp___0~11#1.base, ipheth_probe_~tmp___0~11#1.offset;havoc ipheth_probe_~tmp___1~3#1;havoc ipheth_probe_~tmp___2~1#1;havoc ipheth_probe_~tmp___3~0#1.base, ipheth_probe_~tmp___3~0#1.offset;call ipheth_probe_~#__key~0#1.base, ipheth_probe_~#__key~0#1.offset := #Ultimate.allocOnStack(8);call ipheth_probe_~#__constr_expr_0~0#1.base, ipheth_probe_~#__constr_expr_0~0#1.offset := #Ultimate.allocOnStack(8);call ipheth_probe_~#__key___0~0#1.base, ipheth_probe_~#__key___0~0#1.offset := #Ultimate.allocOnStack(8);assume { :begin_inline_interface_to_usbdev } true;interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset := ipheth_probe_~intf#1.base, ipheth_probe_~intf#1.offset;havoc interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;havoc interface_to_usbdev_#t~ret326#1.base, interface_to_usbdev_#t~ret326#1.offset, interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset, interface_to_usbdev_~tmp~32#1.base, interface_to_usbdev_~tmp~32#1.offset;interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset := interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset;havoc interface_to_usbdev_~tmp~32#1.base, interface_to_usbdev_~tmp~32#1.offset;assume { :begin_inline_ldv_interface_to_usbdev } true;havoc ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;havoc ldv_interface_to_usbdev_#t~ret339#1.base, ldv_interface_to_usbdev_#t~ret339#1.offset, ldv_interface_to_usbdev_~result~0#1.base, ldv_interface_to_usbdev_~result~0#1.offset, ldv_interface_to_usbdev_~tmp~42#1.base, ldv_interface_to_usbdev_~tmp~42#1.offset;havoc ldv_interface_to_usbdev_~result~0#1.base, ldv_interface_to_usbdev_~result~0#1.offset;havoc ldv_interface_to_usbdev_~tmp~42#1.base, ldv_interface_to_usbdev_~tmp~42#1.offset; {63912#false} is VALID [2022-02-20 21:52:05,751 INFO L272 TraceCheckUtils]: 26: Hoare triple {63912#false} call ldv_interface_to_usbdev_#t~ret339#1.base, ldv_interface_to_usbdev_#t~ret339#1.offset := ldv_malloc(1889); {63979#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:05,751 INFO L290 TraceCheckUtils]: 27: Hoare triple {63979#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet79 && #t~nondet79 <= 2147483647;~tmp___0~2 := #t~nondet79;havoc #t~nondet79; {63911#true} is VALID [2022-02-20 21:52:05,752 INFO L290 TraceCheckUtils]: 28: Hoare triple {63911#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {63911#true} is VALID [2022-02-20 21:52:05,752 INFO L290 TraceCheckUtils]: 29: Hoare triple {63911#true} assume true; {63911#true} is VALID [2022-02-20 21:52:05,752 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {63911#true} {63912#false} #1209#return; {63912#false} is VALID [2022-02-20 21:52:05,752 INFO L290 TraceCheckUtils]: 31: Hoare triple {63912#false} ldv_interface_to_usbdev_~tmp~42#1.base, ldv_interface_to_usbdev_~tmp~42#1.offset := ldv_interface_to_usbdev_#t~ret339#1.base, ldv_interface_to_usbdev_#t~ret339#1.offset;havoc ldv_interface_to_usbdev_#t~ret339#1.base, ldv_interface_to_usbdev_#t~ret339#1.offset;ldv_interface_to_usbdev_~result~0#1.base, ldv_interface_to_usbdev_~result~0#1.offset := ldv_interface_to_usbdev_~tmp~42#1.base, ldv_interface_to_usbdev_~tmp~42#1.offset; {63912#false} is VALID [2022-02-20 21:52:05,752 INFO L290 TraceCheckUtils]: 32: Hoare triple {63912#false} assume 0 != (ldv_interface_to_usbdev_~result~0#1.base + ldv_interface_to_usbdev_~result~0#1.offset) % 18446744073709551616; {63912#false} is VALID [2022-02-20 21:52:05,752 INFO L290 TraceCheckUtils]: 33: Hoare triple {63912#false} ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset := ldv_interface_to_usbdev_~result~0#1.base, ldv_interface_to_usbdev_~result~0#1.offset; {63912#false} is VALID [2022-02-20 21:52:05,752 INFO L290 TraceCheckUtils]: 34: Hoare triple {63912#false} interface_to_usbdev_#t~ret326#1.base, interface_to_usbdev_#t~ret326#1.offset := ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;assume { :end_inline_ldv_interface_to_usbdev } true;interface_to_usbdev_~tmp~32#1.base, interface_to_usbdev_~tmp~32#1.offset := interface_to_usbdev_#t~ret326#1.base, interface_to_usbdev_#t~ret326#1.offset;havoc interface_to_usbdev_#t~ret326#1.base, interface_to_usbdev_#t~ret326#1.offset;interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset := interface_to_usbdev_~tmp~32#1.base, interface_to_usbdev_~tmp~32#1.offset; {63912#false} is VALID [2022-02-20 21:52:05,753 INFO L290 TraceCheckUtils]: 35: Hoare triple {63912#false} ipheth_probe_#t~ret271#1.base, ipheth_probe_#t~ret271#1.offset := interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;assume { :end_inline_interface_to_usbdev } true;ipheth_probe_~tmp~26#1.base, ipheth_probe_~tmp~26#1.offset := ipheth_probe_#t~ret271#1.base, ipheth_probe_#t~ret271#1.offset;havoc ipheth_probe_#t~ret271#1.base, ipheth_probe_#t~ret271#1.offset;ipheth_probe_~udev~5#1.base, ipheth_probe_~udev~5#1.offset := ipheth_probe_~tmp~26#1.base, ipheth_probe_~tmp~26#1.offset;assume { :begin_inline_alloc_etherdev_mqs } true;alloc_etherdev_mqs_#in~arg0#1, alloc_etherdev_mqs_#in~arg1#1, alloc_etherdev_mqs_#in~arg2#1 := 304, 1, 1;havoc alloc_etherdev_mqs_#res#1.base, alloc_etherdev_mqs_#res#1.offset;havoc alloc_etherdev_mqs_#t~ret347#1.base, alloc_etherdev_mqs_#t~ret347#1.offset, alloc_etherdev_mqs_~arg0#1, alloc_etherdev_mqs_~arg1#1, alloc_etherdev_mqs_~arg2#1;alloc_etherdev_mqs_~arg0#1 := alloc_etherdev_mqs_#in~arg0#1;alloc_etherdev_mqs_~arg1#1 := alloc_etherdev_mqs_#in~arg1#1;alloc_etherdev_mqs_~arg2#1 := alloc_etherdev_mqs_#in~arg2#1; {63912#false} is VALID [2022-02-20 21:52:05,753 INFO L272 TraceCheckUtils]: 36: Hoare triple {63912#false} call alloc_etherdev_mqs_#t~ret347#1.base, alloc_etherdev_mqs_#t~ret347#1.offset := ldv_malloc(2887); {63979#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:05,753 INFO L290 TraceCheckUtils]: 37: Hoare triple {63979#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet79 && #t~nondet79 <= 2147483647;~tmp___0~2 := #t~nondet79;havoc #t~nondet79; {63911#true} is VALID [2022-02-20 21:52:05,753 INFO L290 TraceCheckUtils]: 38: Hoare triple {63911#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {63911#true} is VALID [2022-02-20 21:52:05,753 INFO L290 TraceCheckUtils]: 39: Hoare triple {63911#true} assume true; {63911#true} is VALID [2022-02-20 21:52:05,753 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {63911#true} {63912#false} #1213#return; {63912#false} is VALID [2022-02-20 21:52:05,753 INFO L290 TraceCheckUtils]: 41: Hoare triple {63912#false} alloc_etherdev_mqs_#res#1.base, alloc_etherdev_mqs_#res#1.offset := alloc_etherdev_mqs_#t~ret347#1.base, alloc_etherdev_mqs_#t~ret347#1.offset;havoc alloc_etherdev_mqs_#t~ret347#1.base, alloc_etherdev_mqs_#t~ret347#1.offset; {63912#false} is VALID [2022-02-20 21:52:05,754 INFO L290 TraceCheckUtils]: 42: Hoare triple {63912#false} ipheth_probe_#t~ret272#1.base, ipheth_probe_#t~ret272#1.offset := alloc_etherdev_mqs_#res#1.base, alloc_etherdev_mqs_#res#1.offset;assume { :end_inline_alloc_etherdev_mqs } true;ipheth_probe_~netdev~0#1.base, ipheth_probe_~netdev~0#1.offset := ipheth_probe_#t~ret272#1.base, ipheth_probe_#t~ret272#1.offset;havoc ipheth_probe_#t~ret272#1.base, ipheth_probe_#t~ret272#1.offset; {63912#false} is VALID [2022-02-20 21:52:05,754 INFO L290 TraceCheckUtils]: 43: Hoare triple {63912#false} assume !(0 == (ipheth_probe_~netdev~0#1.base + ipheth_probe_~netdev~0#1.offset) % 18446744073709551616);call write~$Pointer$(~#ipheth_netdev_ops~0.base, ~#ipheth_netdev_ops~0.offset, ipheth_probe_~netdev~0#1.base, 420 + ipheth_probe_~netdev~0#1.offset, 8);call write~int(1250, ipheth_probe_~netdev~0#1.base, 930 + ipheth_probe_~netdev~0#1.offset, 4);assume { :begin_inline_#Ultimate.C_strcpy } true;#Ultimate.C_strcpy_dest#1.base, #Ultimate.C_strcpy_dest#1.offset, #Ultimate.C_strcpy_src#1.base, #Ultimate.C_strcpy_src#1.offset := ipheth_probe_~netdev~0#1.base, ipheth_probe_~netdev~0#1.offset, 26, 0;havoc #Ultimate.C_strcpy_#res#1.base, #Ultimate.C_strcpy_#res#1.offset;havoc #Ultimate.C_strcpy_#t~offset383#1, #Ultimate.C_strcpy_#t~mem384#1;#Ultimate.C_strcpy_#t~offset383#1 := 0; {63912#false} is VALID [2022-02-20 21:52:05,754 INFO L290 TraceCheckUtils]: 44: Hoare triple {63912#false} call #Ultimate.C_strcpy_#t~mem384#1 := read~int(#Ultimate.C_strcpy_src#1.base, #Ultimate.C_strcpy_src#1.offset + #Ultimate.C_strcpy_#t~offset383#1, 1);call write~unchecked~int(#Ultimate.C_strcpy_#t~mem384#1, #Ultimate.C_strcpy_dest#1.base, #Ultimate.C_strcpy_dest#1.offset + #Ultimate.C_strcpy_#t~offset383#1, 1); {63912#false} is VALID [2022-02-20 21:52:05,754 INFO L290 TraceCheckUtils]: 45: Hoare triple {63912#false} assume 0 == #Ultimate.C_strcpy_#t~mem384#1; {63912#false} is VALID [2022-02-20 21:52:05,754 INFO L290 TraceCheckUtils]: 46: Hoare triple {63912#false} assume #Ultimate.C_strcpy_#res#1.base == #Ultimate.C_strcpy_dest#1.base && #Ultimate.C_strcpy_#res#1.offset == #Ultimate.C_strcpy_dest#1.offset;ipheth_probe_#t~strcpy~res273#1.base, ipheth_probe_#t~strcpy~res273#1.offset := #Ultimate.C_strcpy_#res#1.base, #Ultimate.C_strcpy_#res#1.offset;assume { :end_inline_#Ultimate.C_strcpy } true;havoc ipheth_probe_#t~strcpy~res273#1.base, ipheth_probe_#t~strcpy~res273#1.offset; {63912#false} is VALID [2022-02-20 21:52:05,755 INFO L272 TraceCheckUtils]: 47: Hoare triple {63912#false} call ipheth_probe_#t~ret274#1.base, ipheth_probe_#t~ret274#1.offset := netdev_priv(ipheth_probe_~netdev~0#1.base, ipheth_probe_~netdev~0#1.offset); {63911#true} is VALID [2022-02-20 21:52:05,755 INFO L290 TraceCheckUtils]: 48: Hoare triple {63911#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3136 + ~dev.offset; {63911#true} is VALID [2022-02-20 21:52:05,755 INFO L290 TraceCheckUtils]: 49: Hoare triple {63911#true} assume true; {63911#true} is VALID [2022-02-20 21:52:05,755 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {63911#true} {63912#false} #1215#return; {63912#false} is VALID [2022-02-20 21:52:05,758 INFO L290 TraceCheckUtils]: 51: Hoare triple {63912#false} ipheth_probe_~tmp___0~11#1.base, ipheth_probe_~tmp___0~11#1.offset := ipheth_probe_#t~ret274#1.base, ipheth_probe_#t~ret274#1.offset;havoc ipheth_probe_#t~ret274#1.base, ipheth_probe_#t~ret274#1.offset;ipheth_probe_~dev~8#1.base, ipheth_probe_~dev~8#1.offset := ipheth_probe_~tmp___0~11#1.base, ipheth_probe_~tmp___0~11#1.offset;call write~$Pointer$(ipheth_probe_~udev~5#1.base, ipheth_probe_~udev~5#1.offset, ipheth_probe_~dev~8#1.base, ipheth_probe_~dev~8#1.offset, 8);call write~$Pointer$(ipheth_probe_~netdev~0#1.base, ipheth_probe_~netdev~0#1.offset, ipheth_probe_~dev~8#1.base, 16 + ipheth_probe_~dev~8#1.offset, 8);call write~$Pointer$(ipheth_probe_~intf#1.base, ipheth_probe_~intf#1.offset, ipheth_probe_~dev~8#1.base, 8 + ipheth_probe_~dev~8#1.offset, 8);assume { :begin_inline_usb_altnum_to_altsetting } true;usb_altnum_to_altsetting_#in~arg0#1.base, usb_altnum_to_altsetting_#in~arg0#1.offset, usb_altnum_to_altsetting_#in~arg1#1 := ipheth_probe_~intf#1.base, ipheth_probe_~intf#1.offset, 1;havoc usb_altnum_to_altsetting_#res#1.base, usb_altnum_to_altsetting_#res#1.offset;havoc usb_altnum_to_altsetting_#t~ret363#1.base, usb_altnum_to_altsetting_#t~ret363#1.offset, usb_altnum_to_altsetting_~arg0#1.base, usb_altnum_to_altsetting_~arg0#1.offset, usb_altnum_to_altsetting_~arg1#1;usb_altnum_to_altsetting_~arg0#1.base, usb_altnum_to_altsetting_~arg0#1.offset := usb_altnum_to_altsetting_#in~arg0#1.base, usb_altnum_to_altsetting_#in~arg0#1.offset;usb_altnum_to_altsetting_~arg1#1 := usb_altnum_to_altsetting_#in~arg1#1; {63912#false} is VALID [2022-02-20 21:52:05,759 INFO L272 TraceCheckUtils]: 52: Hoare triple {63912#false} call usb_altnum_to_altsetting_#t~ret363#1.base, usb_altnum_to_altsetting_#t~ret363#1.offset := ldv_malloc(37); {63979#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:05,759 INFO L290 TraceCheckUtils]: 53: Hoare triple {63979#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet79 && #t~nondet79 <= 2147483647;~tmp___0~2 := #t~nondet79;havoc #t~nondet79; {63911#true} is VALID [2022-02-20 21:52:05,759 INFO L290 TraceCheckUtils]: 54: Hoare triple {63911#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {63911#true} is VALID [2022-02-20 21:52:05,759 INFO L290 TraceCheckUtils]: 55: Hoare triple {63911#true} assume true; {63911#true} is VALID [2022-02-20 21:52:05,759 INFO L284 TraceCheckUtils]: 56: Hoare quadruple {63911#true} {63912#false} #1217#return; {63912#false} is VALID [2022-02-20 21:52:05,759 INFO L290 TraceCheckUtils]: 57: Hoare triple {63912#false} usb_altnum_to_altsetting_#res#1.base, usb_altnum_to_altsetting_#res#1.offset := usb_altnum_to_altsetting_#t~ret363#1.base, usb_altnum_to_altsetting_#t~ret363#1.offset;havoc usb_altnum_to_altsetting_#t~ret363#1.base, usb_altnum_to_altsetting_#t~ret363#1.offset; {63912#false} is VALID [2022-02-20 21:52:05,759 INFO L290 TraceCheckUtils]: 58: Hoare triple {63912#false} ipheth_probe_#t~ret275#1.base, ipheth_probe_#t~ret275#1.offset := usb_altnum_to_altsetting_#res#1.base, usb_altnum_to_altsetting_#res#1.offset;assume { :end_inline_usb_altnum_to_altsetting } true;ipheth_probe_~hintf~0#1.base, ipheth_probe_~hintf~0#1.offset := ipheth_probe_#t~ret275#1.base, ipheth_probe_#t~ret275#1.offset;havoc ipheth_probe_#t~ret275#1.base, ipheth_probe_#t~ret275#1.offset; {63912#false} is VALID [2022-02-20 21:52:05,760 INFO L290 TraceCheckUtils]: 59: Hoare triple {63912#false} assume !(0 == (ipheth_probe_~hintf~0#1.base + ipheth_probe_~hintf~0#1.offset) % 18446744073709551616);ipheth_probe_~i~0#1 := 0; {63912#false} is VALID [2022-02-20 21:52:05,760 INFO L290 TraceCheckUtils]: 60: Hoare triple {63912#false} call ipheth_probe_#t~mem282#1 := read~int(ipheth_probe_~hintf~0#1.base, 4 + ipheth_probe_~hintf~0#1.offset, 1); {63912#false} is VALID [2022-02-20 21:52:05,760 INFO L290 TraceCheckUtils]: 61: Hoare triple {63912#false} assume !(ipheth_probe_#t~mem282#1 % 256 > ipheth_probe_~i~0#1);havoc ipheth_probe_#t~mem282#1;call ipheth_probe_#t~mem283#1 := read~int(ipheth_probe_~dev~8#1.base, 72 + ipheth_probe_~dev~8#1.offset, 1);ipheth_probe_#t~short285#1 := 0 == ipheth_probe_#t~mem283#1 % 256 % 4294967296; {63912#false} is VALID [2022-02-20 21:52:05,761 INFO L290 TraceCheckUtils]: 62: Hoare triple {63912#false} assume ipheth_probe_#t~short285#1; {63912#false} is VALID [2022-02-20 21:52:05,761 INFO L290 TraceCheckUtils]: 63: Hoare triple {63912#false} assume !ipheth_probe_#t~short285#1;havoc ipheth_probe_#t~mem283#1;havoc ipheth_probe_#t~mem284#1;havoc ipheth_probe_#t~short285#1;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := 64, 208;havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret78#1.base, kmalloc_#t~ret78#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___2~0#1.base, kmalloc_~tmp___2~0#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___2~0#1.base, kmalloc_~tmp___2~0#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret77#1.base, __kmalloc_#t~ret77#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {63912#false} is VALID [2022-02-20 21:52:05,761 INFO L272 TraceCheckUtils]: 64: Hoare triple {63912#false} call __kmalloc_#t~ret77#1.base, __kmalloc_#t~ret77#1.offset := ldv_malloc(__kmalloc_~size#1); {63979#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:05,761 INFO L290 TraceCheckUtils]: 65: Hoare triple {63979#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet79 && #t~nondet79 <= 2147483647;~tmp___0~2 := #t~nondet79;havoc #t~nondet79; {63911#true} is VALID [2022-02-20 21:52:05,761 INFO L290 TraceCheckUtils]: 66: Hoare triple {63911#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {63911#true} is VALID [2022-02-20 21:52:05,761 INFO L290 TraceCheckUtils]: 67: Hoare triple {63911#true} assume true; {63911#true} is VALID [2022-02-20 21:52:05,761 INFO L284 TraceCheckUtils]: 68: Hoare quadruple {63911#true} {63912#false} #1223#return; {63912#false} is VALID [2022-02-20 21:52:05,761 INFO L290 TraceCheckUtils]: 69: Hoare triple {63912#false} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret77#1.base, __kmalloc_#t~ret77#1.offset;havoc __kmalloc_#t~ret77#1.base, __kmalloc_#t~ret77#1.offset; {63912#false} is VALID [2022-02-20 21:52:05,762 INFO L290 TraceCheckUtils]: 70: Hoare triple {63912#false} kmalloc_#t~ret78#1.base, kmalloc_#t~ret78#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___2~0#1.base, kmalloc_~tmp___2~0#1.offset := kmalloc_#t~ret78#1.base, kmalloc_#t~ret78#1.offset;havoc kmalloc_#t~ret78#1.base, kmalloc_#t~ret78#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___2~0#1.base, kmalloc_~tmp___2~0#1.offset; {63912#false} is VALID [2022-02-20 21:52:05,762 INFO L290 TraceCheckUtils]: 71: Hoare triple {63912#false} ipheth_probe_#t~ret287#1.base, ipheth_probe_#t~ret287#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;ipheth_probe_~tmp___3~0#1.base, ipheth_probe_~tmp___3~0#1.offset := ipheth_probe_#t~ret287#1.base, ipheth_probe_#t~ret287#1.offset;havoc ipheth_probe_#t~ret287#1.base, ipheth_probe_#t~ret287#1.offset;call write~$Pointer$(ipheth_probe_~tmp___3~0#1.base, ipheth_probe_~tmp___3~0#1.offset, ipheth_probe_~dev~8#1.base, 64 + ipheth_probe_~dev~8#1.offset, 8);call ipheth_probe_#t~mem288#1.base, ipheth_probe_#t~mem288#1.offset := read~$Pointer$(ipheth_probe_~dev~8#1.base, 64 + ipheth_probe_~dev~8#1.offset, 8); {63912#false} is VALID [2022-02-20 21:52:05,762 INFO L290 TraceCheckUtils]: 72: Hoare triple {63912#false} assume !(0 == (ipheth_probe_#t~mem288#1.base + ipheth_probe_#t~mem288#1.offset) % 18446744073709551616);havoc ipheth_probe_#t~mem288#1.base, ipheth_probe_#t~mem288#1.offset;assume { :begin_inline_ipheth_get_macaddr } true;ipheth_get_macaddr_#in~dev#1.base, ipheth_get_macaddr_#in~dev#1.offset := ipheth_probe_~dev~8#1.base, ipheth_probe_~dev~8#1.offset;havoc ipheth_get_macaddr_#res#1;havoc ipheth_get_macaddr_#t~mem185#1.base, ipheth_get_macaddr_#t~mem185#1.offset, ipheth_get_macaddr_#t~mem186#1.base, ipheth_get_macaddr_#t~mem186#1.offset, ipheth_get_macaddr_#t~ret187#1, ipheth_get_macaddr_#t~mem188#1.base, ipheth_get_macaddr_#t~mem188#1.offset, ipheth_get_macaddr_#t~ret189#1, ipheth_get_macaddr_#t~nondet190#1, ipheth_get_macaddr_#t~mem191#1.base, ipheth_get_macaddr_#t~mem191#1.offset, ipheth_get_macaddr_#t~nondet192#1, ipheth_get_macaddr_#t~mem193#1.base, ipheth_get_macaddr_#t~mem193#1.offset, ipheth_get_macaddr_#t~mem194#1.base, ipheth_get_macaddr_#t~mem194#1.offset, ipheth_get_macaddr_#t~mem195#1.base, ipheth_get_macaddr_#t~mem195#1.offset, ipheth_get_macaddr_#t~memcpy~res196#1.base, ipheth_get_macaddr_#t~memcpy~res196#1.offset, ipheth_get_macaddr_#t~mem197#1.base, ipheth_get_macaddr_#t~mem197#1.offset, ipheth_get_macaddr_#t~mem198#1.base, ipheth_get_macaddr_#t~mem198#1.offset, ipheth_get_macaddr_#t~memcpy~res199#1.base, ipheth_get_macaddr_#t~memcpy~res199#1.offset, ipheth_get_macaddr_~dev#1.base, ipheth_get_macaddr_~dev#1.offset, ipheth_get_macaddr_~udev~1#1.base, ipheth_get_macaddr_~udev~1#1.offset, ipheth_get_macaddr_~net~0#1.base, ipheth_get_macaddr_~net~0#1.offset, ipheth_get_macaddr_~retval~1#1, ipheth_get_macaddr_~tmp~19#1, ipheth_get_macaddr_~__len~1#1, ipheth_get_macaddr_~__ret~1#1.base, ipheth_get_macaddr_~__ret~1#1.offset;ipheth_get_macaddr_~dev#1.base, ipheth_get_macaddr_~dev#1.offset := ipheth_get_macaddr_#in~dev#1.base, ipheth_get_macaddr_#in~dev#1.offset;havoc ipheth_get_macaddr_~udev~1#1.base, ipheth_get_macaddr_~udev~1#1.offset;havoc ipheth_get_macaddr_~net~0#1.base, ipheth_get_macaddr_~net~0#1.offset;havoc ipheth_get_macaddr_~retval~1#1;havoc ipheth_get_macaddr_~tmp~19#1;havoc ipheth_get_macaddr_~__len~1#1;havoc ipheth_get_macaddr_~__ret~1#1.base, ipheth_get_macaddr_~__ret~1#1.offset;call ipheth_get_macaddr_#t~mem185#1.base, ipheth_get_macaddr_#t~mem185#1.offset := read~$Pointer$(ipheth_get_macaddr_~dev#1.base, ipheth_get_macaddr_~dev#1.offset, 8);ipheth_get_macaddr_~udev~1#1.base, ipheth_get_macaddr_~udev~1#1.offset := ipheth_get_macaddr_#t~mem185#1.base, ipheth_get_macaddr_#t~mem185#1.offset;havoc ipheth_get_macaddr_#t~mem185#1.base, ipheth_get_macaddr_#t~mem185#1.offset;call ipheth_get_macaddr_#t~mem186#1.base, ipheth_get_macaddr_#t~mem186#1.offset := read~$Pointer$(ipheth_get_macaddr_~dev#1.base, 16 + ipheth_get_macaddr_~dev#1.offset, 8);ipheth_get_macaddr_~net~0#1.base, ipheth_get_macaddr_~net~0#1.offset := ipheth_get_macaddr_#t~mem186#1.base, ipheth_get_macaddr_#t~mem186#1.offset;havoc ipheth_get_macaddr_#t~mem186#1.base, ipheth_get_macaddr_#t~mem186#1.offset; {63912#false} is VALID [2022-02-20 21:52:05,762 INFO L272 TraceCheckUtils]: 73: Hoare triple {63912#false} call ipheth_get_macaddr_#t~ret187#1 := __create_pipe(ipheth_get_macaddr_~udev~1#1.base, ipheth_get_macaddr_~udev~1#1.offset, 0); {63911#true} is VALID [2022-02-20 21:52:05,762 INFO L290 TraceCheckUtils]: 74: Hoare triple {63911#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;~endpoint := #in~endpoint;call #t~mem74 := read~int(~dev.base, ~dev.offset, 4);#res := (if (1 == 256 * #t~mem74 || 0 == 256 * #t~mem74) && 0 == 32768 * ~endpoint then 256 * #t~mem74 else (if 0 == 256 * #t~mem74 && (1 == 32768 * ~endpoint || 0 == 32768 * ~endpoint) then 32768 * ~endpoint else (if (1 == 256 * #t~mem74 && (1 == 32768 * ~endpoint || 0 == 32768 * ~endpoint)) || ((1 == 256 * #t~mem74 || 0 == 256 * #t~mem74) && 1 == 32768 * ~endpoint) then 1 else ~bitwiseOr(256 * #t~mem74, 32768 * ~endpoint))));havoc #t~mem74; {63911#true} is VALID [2022-02-20 21:52:05,762 INFO L290 TraceCheckUtils]: 75: Hoare triple {63911#true} assume true; {63911#true} is VALID [2022-02-20 21:52:05,762 INFO L284 TraceCheckUtils]: 76: Hoare quadruple {63911#true} {63912#false} #1225#return; {63912#false} is VALID [2022-02-20 21:52:05,762 INFO L290 TraceCheckUtils]: 77: Hoare triple {63912#false} ipheth_get_macaddr_~tmp~19#1 := ipheth_get_macaddr_#t~ret187#1;havoc ipheth_get_macaddr_#t~ret187#1;call ipheth_get_macaddr_#t~mem188#1.base, ipheth_get_macaddr_#t~mem188#1.offset := read~$Pointer$(ipheth_get_macaddr_~dev#1.base, 64 + ipheth_get_macaddr_~dev#1.offset, 8); {63912#false} is VALID [2022-02-20 21:52:05,763 INFO L272 TraceCheckUtils]: 78: Hoare triple {63912#false} call ipheth_get_macaddr_#t~ret189#1 := usb_control_msg(ipheth_get_macaddr_~udev~1#1.base, ipheth_get_macaddr_~udev~1#1.offset, ~bitwiseOr(ipheth_get_macaddr_~tmp~19#1, 2147483776), 0, 192, 0, 2, ipheth_get_macaddr_#t~mem188#1.base, ipheth_get_macaddr_#t~mem188#1.offset, 64, 1250); {63911#true} is VALID [2022-02-20 21:52:05,763 INFO L290 TraceCheckUtils]: 79: Hoare triple {63911#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1 := #in~arg1;~arg2 := #in~arg2;~arg3 := #in~arg3;~arg4 := #in~arg4;~arg5 := #in~arg5;~arg6.base, ~arg6.offset := #in~arg6.base, #in~arg6.offset;~arg7 := #in~arg7;~arg8 := #in~arg8;assume -2147483648 <= #t~nondet364 && #t~nondet364 <= 2147483647;#res := #t~nondet364;havoc #t~nondet364; {63911#true} is VALID [2022-02-20 21:52:05,763 INFO L290 TraceCheckUtils]: 80: Hoare triple {63911#true} assume true; {63911#true} is VALID [2022-02-20 21:52:05,763 INFO L284 TraceCheckUtils]: 81: Hoare quadruple {63911#true} {63912#false} #1227#return; {63912#false} is VALID [2022-02-20 21:52:05,763 INFO L290 TraceCheckUtils]: 82: Hoare triple {63912#false} assume -2147483648 <= ipheth_get_macaddr_#t~ret189#1 && ipheth_get_macaddr_#t~ret189#1 <= 2147483647;ipheth_get_macaddr_~retval~1#1 := ipheth_get_macaddr_#t~ret189#1;havoc ipheth_get_macaddr_#t~mem188#1.base, ipheth_get_macaddr_#t~mem188#1.offset;havoc ipheth_get_macaddr_#t~ret189#1; {63912#false} is VALID [2022-02-20 21:52:05,764 INFO L290 TraceCheckUtils]: 83: Hoare triple {63912#false} assume ipheth_get_macaddr_~retval~1#1 < 0;havoc ipheth_get_macaddr_#t~nondet190#1;call ipheth_get_macaddr_#t~mem191#1.base, ipheth_get_macaddr_#t~mem191#1.offset := read~$Pointer$(ipheth_get_macaddr_~dev#1.base, 8 + ipheth_get_macaddr_~dev#1.offset, 8);havoc ipheth_get_macaddr_#t~mem191#1.base, ipheth_get_macaddr_#t~mem191#1.offset; {63912#false} is VALID [2022-02-20 21:52:05,764 INFO L290 TraceCheckUtils]: 84: Hoare triple {63912#false} ipheth_get_macaddr_#res#1 := ipheth_get_macaddr_~retval~1#1; {63912#false} is VALID [2022-02-20 21:52:05,764 INFO L290 TraceCheckUtils]: 85: Hoare triple {63912#false} ipheth_probe_#t~ret289#1 := ipheth_get_macaddr_#res#1;assume { :end_inline_ipheth_get_macaddr } true;assume -2147483648 <= ipheth_probe_#t~ret289#1 && ipheth_probe_#t~ret289#1 <= 2147483647;ipheth_probe_~retval~5#1 := ipheth_probe_#t~ret289#1;havoc ipheth_probe_#t~ret289#1; {63912#false} is VALID [2022-02-20 21:52:05,764 INFO L290 TraceCheckUtils]: 86: Hoare triple {63912#false} assume !(0 != ipheth_probe_~retval~5#1);assume { :begin_inline___init_work } true;__init_work_#in~arg0#1.base, __init_work_#in~arg0#1.offset, __init_work_#in~arg1#1 := ipheth_probe_~dev~8#1.base, 74 + ipheth_probe_~dev~8#1.offset, 0;havoc __init_work_~arg0#1.base, __init_work_~arg0#1.offset, __init_work_~arg1#1;__init_work_~arg0#1.base, __init_work_~arg0#1.offset := __init_work_#in~arg0#1.base, __init_work_#in~arg0#1.offset;__init_work_~arg1#1 := __init_work_#in~arg1#1; {63912#false} is VALID [2022-02-20 21:52:05,764 INFO L290 TraceCheckUtils]: 87: Hoare triple {63912#false} assume { :end_inline___init_work } true;call write~int(137438953408, ipheth_probe_~#__constr_expr_0~0#1.base, ipheth_probe_~#__constr_expr_0~0#1.offset, 8);call ipheth_probe_#t~mem290#1 := read~int(ipheth_probe_~#__constr_expr_0~0#1.base, ipheth_probe_~#__constr_expr_0~0#1.offset, 8);call write~int(ipheth_probe_#t~mem290#1, ipheth_probe_~dev~8#1.base, 74 + ipheth_probe_~dev~8#1.offset, 8);havoc ipheth_probe_#t~mem290#1;assume { :begin_inline_lockdep_init_map } true;lockdep_init_map_#in~arg0#1.base, lockdep_init_map_#in~arg0#1.offset, lockdep_init_map_#in~arg1#1.base, lockdep_init_map_#in~arg1#1.offset, lockdep_init_map_#in~arg2#1.base, lockdep_init_map_#in~arg2#1.offset, lockdep_init_map_#in~arg3#1 := ipheth_probe_~dev~8#1.base, 106 + ipheth_probe_~dev~8#1.offset, 29, 0, ipheth_probe_~#__key~0#1.base, ipheth_probe_~#__key~0#1.offset, 0;havoc lockdep_init_map_~arg0#1.base, lockdep_init_map_~arg0#1.offset, lockdep_init_map_~arg1#1.base, lockdep_init_map_~arg1#1.offset, lockdep_init_map_~arg2#1.base, lockdep_init_map_~arg2#1.offset, lockdep_init_map_~arg3#1;lockdep_init_map_~arg0#1.base, lockdep_init_map_~arg0#1.offset := lockdep_init_map_#in~arg0#1.base, lockdep_init_map_#in~arg0#1.offset;lockdep_init_map_~arg1#1.base, lockdep_init_map_~arg1#1.offset := lockdep_init_map_#in~arg1#1.base, lockdep_init_map_#in~arg1#1.offset;lockdep_init_map_~arg2#1.base, lockdep_init_map_~arg2#1.offset := lockdep_init_map_#in~arg2#1.base, lockdep_init_map_#in~arg2#1.offset;lockdep_init_map_~arg3#1 := lockdep_init_map_#in~arg3#1; {63912#false} is VALID [2022-02-20 21:52:05,765 INFO L290 TraceCheckUtils]: 88: Hoare triple {63912#false} assume { :end_inline_lockdep_init_map } true;assume { :begin_inline_INIT_LIST_HEAD } true;INIT_LIST_HEAD_#in~list#1.base, INIT_LIST_HEAD_#in~list#1.offset := ipheth_probe_~dev~8#1.base, 82 + ipheth_probe_~dev~8#1.offset;havoc INIT_LIST_HEAD_~list#1.base, INIT_LIST_HEAD_~list#1.offset;INIT_LIST_HEAD_~list#1.base, INIT_LIST_HEAD_~list#1.offset := INIT_LIST_HEAD_#in~list#1.base, INIT_LIST_HEAD_#in~list#1.offset;call write~$Pointer$(INIT_LIST_HEAD_~list#1.base, INIT_LIST_HEAD_~list#1.offset, INIT_LIST_HEAD_~list#1.base, INIT_LIST_HEAD_~list#1.offset, 8);call write~$Pointer$(INIT_LIST_HEAD_~list#1.base, INIT_LIST_HEAD_~list#1.offset, INIT_LIST_HEAD_~list#1.base, 8 + INIT_LIST_HEAD_~list#1.offset, 8); {63912#false} is VALID [2022-02-20 21:52:05,765 INFO L290 TraceCheckUtils]: 89: Hoare triple {63912#false} assume { :end_inline_INIT_LIST_HEAD } true;call write~$Pointer$(#funAddr~ipheth_carrier_check_work.base, #funAddr~ipheth_carrier_check_work.offset, ipheth_probe_~dev~8#1.base, 98 + ipheth_probe_~dev~8#1.offset, 8);assume { :begin_inline_init_timer_key } true;init_timer_key_#in~arg0#1.base, init_timer_key_#in~arg0#1.offset, init_timer_key_#in~arg1#1, init_timer_key_#in~arg2#1.base, init_timer_key_#in~arg2#1.offset, init_timer_key_#in~arg3#1.base, init_timer_key_#in~arg3#1.offset := ipheth_probe_~dev~8#1.base, 150 + ipheth_probe_~dev~8#1.offset, 2, 30, 0, ipheth_probe_~#__key___0~0#1.base, ipheth_probe_~#__key___0~0#1.offset;havoc init_timer_key_~arg0#1.base, init_timer_key_~arg0#1.offset, init_timer_key_~arg1#1, init_timer_key_~arg2#1.base, init_timer_key_~arg2#1.offset, init_timer_key_~arg3#1.base, init_timer_key_~arg3#1.offset;init_timer_key_~arg0#1.base, init_timer_key_~arg0#1.offset := init_timer_key_#in~arg0#1.base, init_timer_key_#in~arg0#1.offset;init_timer_key_~arg1#1 := init_timer_key_#in~arg1#1;init_timer_key_~arg2#1.base, init_timer_key_~arg2#1.offset := init_timer_key_#in~arg2#1.base, init_timer_key_#in~arg2#1.offset;init_timer_key_~arg3#1.base, init_timer_key_~arg3#1.offset := init_timer_key_#in~arg3#1.base, init_timer_key_#in~arg3#1.offset; {63912#false} is VALID [2022-02-20 21:52:05,765 INFO L290 TraceCheckUtils]: 90: Hoare triple {63912#false} assume { :end_inline_init_timer_key } true;call write~$Pointer$(#funAddr~delayed_work_timer_fn.base, #funAddr~delayed_work_timer_fn.offset, ipheth_probe_~dev~8#1.base, 182 + ipheth_probe_~dev~8#1.offset, 8);call write~int(ipheth_probe_~dev~8#1.base + (74 + ipheth_probe_~dev~8#1.offset), ipheth_probe_~dev~8#1.base, 190 + ipheth_probe_~dev~8#1.offset, 8);assume { :begin_inline_ipheth_alloc_urbs } true;ipheth_alloc_urbs_#in~iphone#1.base, ipheth_alloc_urbs_#in~iphone#1.offset := ipheth_probe_~dev~8#1.base, ipheth_probe_~dev~8#1.offset;havoc ipheth_alloc_urbs_#res#1;havoc ipheth_alloc_urbs_#t~ret116#1.base, ipheth_alloc_urbs_#t~ret116#1.offset, ipheth_alloc_urbs_#t~ret117#1.base, ipheth_alloc_urbs_#t~ret117#1.offset, ipheth_alloc_urbs_#t~mem118#1.base, ipheth_alloc_urbs_#t~mem118#1.offset, ipheth_alloc_urbs_#t~ret119#1.base, ipheth_alloc_urbs_#t~ret119#1.offset, ipheth_alloc_urbs_#t~mem120#1.base, ipheth_alloc_urbs_#t~mem120#1.offset, ipheth_alloc_urbs_#t~ret121#1.base, ipheth_alloc_urbs_#t~ret121#1.offset, ipheth_alloc_urbs_#t~mem122#1.base, ipheth_alloc_urbs_#t~mem122#1.offset, ipheth_alloc_urbs_#t~mem123#1, ipheth_alloc_urbs_~iphone#1.base, ipheth_alloc_urbs_~iphone#1.offset, ipheth_alloc_urbs_~tx_urb~0#1.base, ipheth_alloc_urbs_~tx_urb~0#1.offset, ipheth_alloc_urbs_~rx_urb~0#1.base, ipheth_alloc_urbs_~rx_urb~0#1.offset, ipheth_alloc_urbs_~tx_buf~0#1.base, ipheth_alloc_urbs_~tx_buf~0#1.offset, ipheth_alloc_urbs_~rx_buf~0#1.base, ipheth_alloc_urbs_~rx_buf~0#1.offset, ipheth_alloc_urbs_~tmp~16#1.base, ipheth_alloc_urbs_~tmp~16#1.offset, ipheth_alloc_urbs_~tmp___0~6#1.base, ipheth_alloc_urbs_~tmp___0~6#1.offset;ipheth_alloc_urbs_~iphone#1.base, ipheth_alloc_urbs_~iphone#1.offset := ipheth_alloc_urbs_#in~iphone#1.base, ipheth_alloc_urbs_#in~iphone#1.offset;havoc ipheth_alloc_urbs_~tx_urb~0#1.base, ipheth_alloc_urbs_~tx_urb~0#1.offset;havoc ipheth_alloc_urbs_~rx_urb~0#1.base, ipheth_alloc_urbs_~rx_urb~0#1.offset;havoc ipheth_alloc_urbs_~tx_buf~0#1.base, ipheth_alloc_urbs_~tx_buf~0#1.offset;havoc ipheth_alloc_urbs_~rx_buf~0#1.base, ipheth_alloc_urbs_~rx_buf~0#1.offset;havoc ipheth_alloc_urbs_~tmp~16#1.base, ipheth_alloc_urbs_~tmp~16#1.offset;havoc ipheth_alloc_urbs_~tmp___0~6#1.base, ipheth_alloc_urbs_~tmp___0~6#1.offset;ipheth_alloc_urbs_~tx_urb~0#1.base, ipheth_alloc_urbs_~tx_urb~0#1.offset := 0, 0;ipheth_alloc_urbs_~rx_urb~0#1.base, ipheth_alloc_urbs_~rx_urb~0#1.offset := 0, 0;ipheth_alloc_urbs_~tx_buf~0#1.base, ipheth_alloc_urbs_~tx_buf~0#1.offset := 0, 0;ipheth_alloc_urbs_~rx_buf~0#1.base, ipheth_alloc_urbs_~rx_buf~0#1.offset := 0, 0;assume { :begin_inline_ldv_usb_alloc_urb_2 } true;ldv_usb_alloc_urb_2_#in~iso_packets#1, ldv_usb_alloc_urb_2_#in~mem_flags#1 := 0, 208;havoc ldv_usb_alloc_urb_2_#res#1.base, ldv_usb_alloc_urb_2_#res#1.offset;havoc ldv_usb_alloc_urb_2_#t~ret327#1.base, ldv_usb_alloc_urb_2_#t~ret327#1.offset, ldv_usb_alloc_urb_2_~iso_packets#1, ldv_usb_alloc_urb_2_~mem_flags#1, ldv_usb_alloc_urb_2_~tmp~33#1.base, ldv_usb_alloc_urb_2_~tmp~33#1.offset;ldv_usb_alloc_urb_2_~iso_packets#1 := ldv_usb_alloc_urb_2_#in~iso_packets#1;ldv_usb_alloc_urb_2_~mem_flags#1 := ldv_usb_alloc_urb_2_#in~mem_flags#1;havoc ldv_usb_alloc_urb_2_~tmp~33#1.base, ldv_usb_alloc_urb_2_~tmp~33#1.offset; {63912#false} is VALID [2022-02-20 21:52:05,765 INFO L272 TraceCheckUtils]: 91: Hoare triple {63912#false} call ldv_usb_alloc_urb_2_#t~ret327#1.base, ldv_usb_alloc_urb_2_#t~ret327#1.offset := ldv_alloc_urb(); {63980#(and (= |old(#length)| |#length|) (= ~usb_urb~0.base |old(~usb_urb~0.base)|) (= ~usb_urb~0.offset |old(~usb_urb~0.offset)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:05,765 INFO L290 TraceCheckUtils]: 92: Hoare triple {63980#(and (= |old(#length)| |#length|) (= ~usb_urb~0.base |old(~usb_urb~0.base)|) (= ~usb_urb~0.offset |old(~usb_urb~0.offset)|) (= |old(#valid)| |#valid|))} havoc ~value~0.base, ~value~0.offset;havoc ~tmp~40.base, ~tmp~40.offset;havoc ~tmp___0~13; {63911#true} is VALID [2022-02-20 21:52:05,766 INFO L272 TraceCheckUtils]: 93: Hoare triple {63911#true} call #t~ret334.base, #t~ret334.offset := ldv_malloc(184); {63979#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:05,766 INFO L290 TraceCheckUtils]: 94: Hoare triple {63979#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet79 && #t~nondet79 <= 2147483647;~tmp___0~2 := #t~nondet79;havoc #t~nondet79; {63911#true} is VALID [2022-02-20 21:52:05,766 INFO L290 TraceCheckUtils]: 95: Hoare triple {63911#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {63911#true} is VALID [2022-02-20 21:52:05,766 INFO L290 TraceCheckUtils]: 96: Hoare triple {63911#true} assume true; {63911#true} is VALID [2022-02-20 21:52:05,766 INFO L284 TraceCheckUtils]: 97: Hoare quadruple {63911#true} {63911#true} #1173#return; {63911#true} is VALID [2022-02-20 21:52:05,766 INFO L290 TraceCheckUtils]: 98: Hoare triple {63911#true} ~tmp~40.base, ~tmp~40.offset := #t~ret334.base, #t~ret334.offset;havoc #t~ret334.base, #t~ret334.offset;~value~0.base, ~value~0.offset := ~tmp~40.base, ~tmp~40.offset; {63911#true} is VALID [2022-02-20 21:52:05,766 INFO L272 TraceCheckUtils]: 99: Hoare triple {63911#true} call #t~ret335 := ldv_undef_int(); {63911#true} is VALID [2022-02-20 21:52:05,766 INFO L290 TraceCheckUtils]: 100: Hoare triple {63911#true} havoc ~tmp~6;assume -2147483648 <= #t~nondet83 && #t~nondet83 <= 2147483647;~tmp~6 := #t~nondet83;havoc #t~nondet83;#res := ~tmp~6; {63911#true} is VALID [2022-02-20 21:52:05,767 INFO L290 TraceCheckUtils]: 101: Hoare triple {63911#true} assume true; {63911#true} is VALID [2022-02-20 21:52:05,767 INFO L284 TraceCheckUtils]: 102: Hoare quadruple {63911#true} {63911#true} #1175#return; {63911#true} is VALID [2022-02-20 21:52:05,767 INFO L290 TraceCheckUtils]: 103: Hoare triple {63911#true} assume -2147483648 <= #t~ret335 && #t~ret335 <= 2147483647;~tmp___0~13 := #t~ret335;havoc #t~ret335; {63911#true} is VALID [2022-02-20 21:52:05,767 INFO L290 TraceCheckUtils]: 104: Hoare triple {63911#true} assume 0 != ~tmp___0~13; {63911#true} is VALID [2022-02-20 21:52:05,767 INFO L290 TraceCheckUtils]: 105: Hoare triple {63911#true} assume 0 != (~value~0.base + ~value~0.offset) % 18446744073709551616;~usb_urb~0.base, ~usb_urb~0.offset := ~value~0.base, ~value~0.offset; {63911#true} is VALID [2022-02-20 21:52:05,767 INFO L290 TraceCheckUtils]: 106: Hoare triple {63911#true} #res.base, #res.offset := ~usb_urb~0.base, ~usb_urb~0.offset; {63911#true} is VALID [2022-02-20 21:52:05,767 INFO L290 TraceCheckUtils]: 107: Hoare triple {63911#true} assume true; {63911#true} is VALID [2022-02-20 21:52:05,767 INFO L284 TraceCheckUtils]: 108: Hoare quadruple {63911#true} {63912#false} #1233#return; {63912#false} is VALID [2022-02-20 21:52:05,768 INFO L290 TraceCheckUtils]: 109: Hoare triple {63912#false} ldv_usb_alloc_urb_2_~tmp~33#1.base, ldv_usb_alloc_urb_2_~tmp~33#1.offset := ldv_usb_alloc_urb_2_#t~ret327#1.base, ldv_usb_alloc_urb_2_#t~ret327#1.offset;havoc ldv_usb_alloc_urb_2_#t~ret327#1.base, ldv_usb_alloc_urb_2_#t~ret327#1.offset;ldv_usb_alloc_urb_2_#res#1.base, ldv_usb_alloc_urb_2_#res#1.offset := ldv_usb_alloc_urb_2_~tmp~33#1.base, ldv_usb_alloc_urb_2_~tmp~33#1.offset; {63912#false} is VALID [2022-02-20 21:52:05,768 INFO L290 TraceCheckUtils]: 110: Hoare triple {63912#false} ipheth_alloc_urbs_#t~ret116#1.base, ipheth_alloc_urbs_#t~ret116#1.offset := ldv_usb_alloc_urb_2_#res#1.base, ldv_usb_alloc_urb_2_#res#1.offset;assume { :end_inline_ldv_usb_alloc_urb_2 } true;ipheth_alloc_urbs_~tx_urb~0#1.base, ipheth_alloc_urbs_~tx_urb~0#1.offset := ipheth_alloc_urbs_#t~ret116#1.base, ipheth_alloc_urbs_#t~ret116#1.offset;havoc ipheth_alloc_urbs_#t~ret116#1.base, ipheth_alloc_urbs_#t~ret116#1.offset; {63912#false} is VALID [2022-02-20 21:52:05,768 INFO L290 TraceCheckUtils]: 111: Hoare triple {63912#false} assume 0 == (ipheth_alloc_urbs_~tx_urb~0#1.base + ipheth_alloc_urbs_~tx_urb~0#1.offset) % 18446744073709551616; {63912#false} is VALID [2022-02-20 21:52:05,768 INFO L290 TraceCheckUtils]: 112: Hoare triple {63912#false} ipheth_alloc_urbs_#res#1 := -12; {63912#false} is VALID [2022-02-20 21:52:05,768 INFO L290 TraceCheckUtils]: 113: Hoare triple {63912#false} ipheth_probe_#t~ret291#1 := ipheth_alloc_urbs_#res#1;assume { :end_inline_ipheth_alloc_urbs } true;assume -2147483648 <= ipheth_probe_#t~ret291#1 && ipheth_probe_#t~ret291#1 <= 2147483647;ipheth_probe_~retval~5#1 := ipheth_probe_#t~ret291#1;havoc ipheth_probe_#t~ret291#1; {63912#false} is VALID [2022-02-20 21:52:05,768 INFO L290 TraceCheckUtils]: 114: Hoare triple {63912#false} assume 0 != ipheth_probe_~retval~5#1;havoc ipheth_probe_#t~nondet292#1; {63912#false} is VALID [2022-02-20 21:52:05,768 INFO L290 TraceCheckUtils]: 115: Hoare triple {63912#false} call ipheth_probe_#t~mem296#1.base, ipheth_probe_#t~mem296#1.offset := read~$Pointer$(ipheth_probe_~dev~8#1.base, 64 + ipheth_probe_~dev~8#1.offset, 8); {63912#false} is VALID [2022-02-20 21:52:05,768 INFO L272 TraceCheckUtils]: 116: Hoare triple {63912#false} call kfree(ipheth_probe_#t~mem296#1.base, ipheth_probe_#t~mem296#1.offset); {63988#(= |old(#valid)| |#valid|)} is VALID [2022-02-20 21:52:05,769 INFO L290 TraceCheckUtils]: 117: Hoare triple {63988#(= |old(#valid)| |#valid|)} ~p.base, ~p.offset := #in~p.base, #in~p.offset;call ULTIMATE.dealloc(~p.base, ~p.offset); {63911#true} is VALID [2022-02-20 21:52:05,769 INFO L290 TraceCheckUtils]: 118: Hoare triple {63911#true} assume true; {63911#true} is VALID [2022-02-20 21:52:05,769 INFO L284 TraceCheckUtils]: 119: Hoare quadruple {63911#true} {63912#false} #1253#return; {63912#false} is VALID [2022-02-20 21:52:05,769 INFO L290 TraceCheckUtils]: 120: Hoare triple {63912#false} havoc ipheth_probe_#t~mem296#1.base, ipheth_probe_#t~mem296#1.offset; {63912#false} is VALID [2022-02-20 21:52:05,769 INFO L290 TraceCheckUtils]: 121: Hoare triple {63912#false} assume { :begin_inline_ldv_free_netdev_14 } true;ldv_free_netdev_14_#in~dev#1.base, ldv_free_netdev_14_#in~dev#1.offset := ipheth_probe_~netdev~0#1.base, ipheth_probe_~netdev~0#1.offset;havoc ldv_free_netdev_14_~dev#1.base, ldv_free_netdev_14_~dev#1.offset;ldv_free_netdev_14_~dev#1.base, ldv_free_netdev_14_~dev#1.offset := ldv_free_netdev_14_#in~dev#1.base, ldv_free_netdev_14_#in~dev#1.offset; {63912#false} is VALID [2022-02-20 21:52:05,769 INFO L272 TraceCheckUtils]: 122: Hoare triple {63912#false} call free_netdev(ldv_free_netdev_14_~dev#1.base, ldv_free_netdev_14_~dev#1.offset); {63911#true} is VALID [2022-02-20 21:52:05,769 INFO L290 TraceCheckUtils]: 123: Hoare triple {63911#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset; {63911#true} is VALID [2022-02-20 21:52:05,769 INFO L290 TraceCheckUtils]: 124: Hoare triple {63911#true} assume true; {63911#true} is VALID [2022-02-20 21:52:05,769 INFO L284 TraceCheckUtils]: 125: Hoare quadruple {63911#true} {63912#false} #1255#return; {63912#false} is VALID [2022-02-20 21:52:05,770 INFO L290 TraceCheckUtils]: 126: Hoare triple {63912#false} ~ldv_state_variable_2~0 := 0; {63912#false} is VALID [2022-02-20 21:52:05,770 INFO L290 TraceCheckUtils]: 127: Hoare triple {63912#false} assume { :end_inline_ldv_free_netdev_14 } true;ipheth_probe_#res#1 := ipheth_probe_~retval~5#1;call ULTIMATE.dealloc(ipheth_probe_~#__key~0#1.base, ipheth_probe_~#__key~0#1.offset);havoc ipheth_probe_~#__key~0#1.base, ipheth_probe_~#__key~0#1.offset;call ULTIMATE.dealloc(ipheth_probe_~#__constr_expr_0~0#1.base, ipheth_probe_~#__constr_expr_0~0#1.offset);havoc ipheth_probe_~#__constr_expr_0~0#1.base, ipheth_probe_~#__constr_expr_0~0#1.offset;call ULTIMATE.dealloc(ipheth_probe_~#__key___0~0#1.base, ipheth_probe_~#__key___0~0#1.offset);havoc ipheth_probe_~#__key___0~0#1.base, ipheth_probe_~#__key___0~0#1.offset; {63912#false} is VALID [2022-02-20 21:52:05,770 INFO L290 TraceCheckUtils]: 128: Hoare triple {63912#false} main_#t~ret312#1 := ipheth_probe_#res#1;assume { :end_inline_ipheth_probe } true;assume -2147483648 <= main_#t~ret312#1 && main_#t~ret312#1 <= 2147483647;~ldv_retval_0~0 := main_#t~ret312#1;havoc main_#t~ret312#1; {63912#false} is VALID [2022-02-20 21:52:05,770 INFO L290 TraceCheckUtils]: 129: Hoare triple {63912#false} assume 0 == ~ldv_retval_0~0;~ldv_state_variable_1~0 := 2;~ref_cnt~0 := 1 + ~ref_cnt~0; {63912#false} is VALID [2022-02-20 21:52:05,770 INFO L290 TraceCheckUtils]: 130: Hoare triple {63912#false} assume -2147483648 <= main_#t~nondet308#1 && main_#t~nondet308#1 <= 2147483647;main_~tmp___2~2#1 := main_#t~nondet308#1;havoc main_#t~nondet308#1;main_#t~switch309#1 := 0 == main_~tmp___2~2#1; {63912#false} is VALID [2022-02-20 21:52:05,770 INFO L290 TraceCheckUtils]: 131: Hoare triple {63912#false} assume !main_#t~switch309#1;main_#t~switch309#1 := main_#t~switch309#1 || 1 == main_~tmp___2~2#1; {63912#false} is VALID [2022-02-20 21:52:05,771 INFO L290 TraceCheckUtils]: 132: Hoare triple {63912#false} assume main_#t~switch309#1; {63912#false} is VALID [2022-02-20 21:52:05,771 INFO L290 TraceCheckUtils]: 133: Hoare triple {63912#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet313#1 && main_#t~nondet313#1 <= 2147483647;main_~tmp___4~0#1 := main_#t~nondet313#1;havoc main_#t~nondet313#1;main_#t~switch314#1 := 0 == main_~tmp___4~0#1; {63912#false} is VALID [2022-02-20 21:52:05,771 INFO L290 TraceCheckUtils]: 134: Hoare triple {63912#false} assume !main_#t~switch314#1;main_#t~switch314#1 := main_#t~switch314#1 || 1 == main_~tmp___4~0#1; {63912#false} is VALID [2022-02-20 21:52:05,771 INFO L290 TraceCheckUtils]: 135: Hoare triple {63912#false} assume main_#t~switch314#1; {63912#false} is VALID [2022-02-20 21:52:05,771 INFO L290 TraceCheckUtils]: 136: Hoare triple {63912#false} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_ipheth_driver_init } true;havoc ipheth_driver_init_#res#1;havoc ipheth_driver_init_#t~ret302#1, ipheth_driver_init_~tmp~28#1;havoc ipheth_driver_init_~tmp~28#1;assume { :begin_inline_ldv_usb_register_driver_19 } true;ldv_usb_register_driver_19_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_19_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_19_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg3#1.offset := ~#ipheth_driver~0.base, ~#ipheth_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 36, 0;havoc ldv_usb_register_driver_19_#res#1;havoc ldv_usb_register_driver_19_#t~ret333#1, ldv_usb_register_driver_19_~ldv_func_arg1#1.base, ldv_usb_register_driver_19_~ldv_func_arg1#1.offset, ldv_usb_register_driver_19_~ldv_func_arg2#1.base, ldv_usb_register_driver_19_~ldv_func_arg2#1.offset, ldv_usb_register_driver_19_~ldv_func_arg3#1.base, ldv_usb_register_driver_19_~ldv_func_arg3#1.offset, ldv_usb_register_driver_19_~ldv_func_res~1#1, ldv_usb_register_driver_19_~tmp~39#1;ldv_usb_register_driver_19_~ldv_func_arg1#1.base, ldv_usb_register_driver_19_~ldv_func_arg1#1.offset := ldv_usb_register_driver_19_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_19_~ldv_func_arg2#1.base, ldv_usb_register_driver_19_~ldv_func_arg2#1.offset := ldv_usb_register_driver_19_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_19_~ldv_func_arg3#1.base, ldv_usb_register_driver_19_~ldv_func_arg3#1.offset := ldv_usb_register_driver_19_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_19_~ldv_func_res~1#1;havoc ldv_usb_register_driver_19_~tmp~39#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_19_~ldv_func_arg1#1.base, ldv_usb_register_driver_19_~ldv_func_arg1#1.offset, ldv_usb_register_driver_19_~ldv_func_arg2#1.base, ldv_usb_register_driver_19_~ldv_func_arg2#1.offset, ldv_usb_register_driver_19_~ldv_func_arg3#1.base, ldv_usb_register_driver_19_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet365#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet365#1 && usb_register_driver_#t~nondet365#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet365#1;havoc usb_register_driver_#t~nondet365#1; {63912#false} is VALID [2022-02-20 21:52:05,771 INFO L290 TraceCheckUtils]: 137: Hoare triple {63912#false} ldv_usb_register_driver_19_#t~ret333#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_19_#t~ret333#1 && ldv_usb_register_driver_19_#t~ret333#1 <= 2147483647;ldv_usb_register_driver_19_~tmp~39#1 := ldv_usb_register_driver_19_#t~ret333#1;havoc ldv_usb_register_driver_19_#t~ret333#1;ldv_usb_register_driver_19_~ldv_func_res~1#1 := ldv_usb_register_driver_19_~tmp~39#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret303#1.base, ldv_usb_driver_1_#t~ret303#1.offset, ldv_usb_driver_1_~tmp~29#1.base, ldv_usb_driver_1_~tmp~29#1.offset;havoc ldv_usb_driver_1_~tmp~29#1.base, ldv_usb_driver_1_~tmp~29#1.offset; {63912#false} is VALID [2022-02-20 21:52:05,771 INFO L272 TraceCheckUtils]: 138: Hoare triple {63912#false} call ldv_usb_driver_1_#t~ret303#1.base, ldv_usb_driver_1_#t~ret303#1.offset := ldv_zalloc(1520); {63978#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:05,772 INFO L290 TraceCheckUtils]: 139: Hoare triple {63978#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {63911#true} is VALID [2022-02-20 21:52:05,772 INFO L290 TraceCheckUtils]: 140: Hoare triple {63911#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {63911#true} is VALID [2022-02-20 21:52:05,772 INFO L290 TraceCheckUtils]: 141: Hoare triple {63911#true} assume true; {63911#true} is VALID [2022-02-20 21:52:05,772 INFO L284 TraceCheckUtils]: 142: Hoare quadruple {63911#true} {63912#false} #1261#return; {63912#false} is VALID [2022-02-20 21:52:05,772 INFO L290 TraceCheckUtils]: 143: Hoare triple {63912#false} ldv_usb_driver_1_~tmp~29#1.base, ldv_usb_driver_1_~tmp~29#1.offset := ldv_usb_driver_1_#t~ret303#1.base, ldv_usb_driver_1_#t~ret303#1.offset;havoc ldv_usb_driver_1_#t~ret303#1.base, ldv_usb_driver_1_#t~ret303#1.offset;~ipheth_driver_group1~0.base, ~ipheth_driver_group1~0.offset := ldv_usb_driver_1_~tmp~29#1.base, ldv_usb_driver_1_~tmp~29#1.offset; {63912#false} is VALID [2022-02-20 21:52:05,772 INFO L290 TraceCheckUtils]: 144: Hoare triple {63912#false} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_19_#res#1 := ldv_usb_register_driver_19_~ldv_func_res~1#1; {63912#false} is VALID [2022-02-20 21:52:05,772 INFO L290 TraceCheckUtils]: 145: Hoare triple {63912#false} ipheth_driver_init_#t~ret302#1 := ldv_usb_register_driver_19_#res#1;assume { :end_inline_ldv_usb_register_driver_19 } true;assume -2147483648 <= ipheth_driver_init_#t~ret302#1 && ipheth_driver_init_#t~ret302#1 <= 2147483647;ipheth_driver_init_~tmp~28#1 := ipheth_driver_init_#t~ret302#1;havoc ipheth_driver_init_#t~ret302#1;ipheth_driver_init_#res#1 := ipheth_driver_init_~tmp~28#1; {63912#false} is VALID [2022-02-20 21:52:05,772 INFO L290 TraceCheckUtils]: 146: Hoare triple {63912#false} main_#t~ret315#1 := ipheth_driver_init_#res#1;assume { :end_inline_ipheth_driver_init } true;assume -2147483648 <= main_#t~ret315#1 && main_#t~ret315#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret315#1;havoc main_#t~ret315#1; {63912#false} is VALID [2022-02-20 21:52:05,772 INFO L290 TraceCheckUtils]: 147: Hoare triple {63912#false} assume !(0 == ~ldv_retval_1~0); {63912#false} is VALID [2022-02-20 21:52:05,773 INFO L290 TraceCheckUtils]: 148: Hoare triple {63912#false} assume 0 != ~ldv_retval_1~0;~ldv_state_variable_0~0 := 2; {63912#false} is VALID [2022-02-20 21:52:05,773 INFO L290 TraceCheckUtils]: 149: Hoare triple {63912#false} assume { :begin_inline_ldv_check_final_state } true; {63912#false} is VALID [2022-02-20 21:52:05,773 INFO L290 TraceCheckUtils]: 150: Hoare triple {63912#false} assume !(0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616); {63912#false} is VALID [2022-02-20 21:52:05,773 INFO L272 TraceCheckUtils]: 151: Hoare triple {63912#false} call ldv_error(); {63912#false} is VALID [2022-02-20 21:52:05,773 INFO L290 TraceCheckUtils]: 152: Hoare triple {63912#false} assume !false; {63912#false} is VALID [2022-02-20 21:52:05,774 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2022-02-20 21:52:05,774 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:52:05,774 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1215959370] [2022-02-20 21:52:05,774 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1215959370] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:52:05,774 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:52:05,774 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-02-20 21:52:05,774 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1670310259] [2022-02-20 21:52:05,775 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:52:05,776 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 14.142857142857142) internal successors, (99), 3 states have internal predecessors, (99), 2 states have call successors, (17), 6 states have call predecessors, (17), 1 states have return successors, (16), 2 states have call predecessors, (16), 2 states have call successors, (16) Word has length 153 [2022-02-20 21:52:05,776 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:52:05,776 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 14.142857142857142) internal successors, (99), 3 states have internal predecessors, (99), 2 states have call successors, (17), 6 states have call predecessors, (17), 1 states have return successors, (16), 2 states have call predecessors, (16), 2 states have call successors, (16) [2022-02-20 21:52:05,884 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 132 edges. 132 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:52:05,884 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-02-20 21:52:05,885 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:52:05,885 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-02-20 21:52:05,885 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2022-02-20 21:52:05,885 INFO L87 Difference]: Start difference. First operand 1987 states and 2651 transitions. Second operand has 7 states, 7 states have (on average 14.142857142857142) internal successors, (99), 3 states have internal predecessors, (99), 2 states have call successors, (17), 6 states have call predecessors, (17), 1 states have return successors, (16), 2 states have call predecessors, (16), 2 states have call successors, (16) [2022-02-20 21:52:11,187 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:52:11,187 INFO L93 Difference]: Finished difference Result 5900 states and 7924 transitions. [2022-02-20 21:52:11,188 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-02-20 21:52:11,188 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 14.142857142857142) internal successors, (99), 3 states have internal predecessors, (99), 2 states have call successors, (17), 6 states have call predecessors, (17), 1 states have return successors, (16), 2 states have call predecessors, (16), 2 states have call successors, (16) Word has length 153 [2022-02-20 21:52:11,188 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:52:11,188 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 14.142857142857142) internal successors, (99), 3 states have internal predecessors, (99), 2 states have call successors, (17), 6 states have call predecessors, (17), 1 states have return successors, (16), 2 states have call predecessors, (16), 2 states have call successors, (16) [2022-02-20 21:52:11,204 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 2011 transitions. [2022-02-20 21:52:11,205 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 14.142857142857142) internal successors, (99), 3 states have internal predecessors, (99), 2 states have call successors, (17), 6 states have call predecessors, (17), 1 states have return successors, (16), 2 states have call predecessors, (16), 2 states have call successors, (16) [2022-02-20 21:52:11,220 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 2011 transitions. [2022-02-20 21:52:11,220 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 9 states and 2011 transitions. [2022-02-20 21:52:12,816 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2011 edges. 2011 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:52:13,553 INFO L225 Difference]: With dead ends: 5900 [2022-02-20 21:52:13,554 INFO L226 Difference]: Without dead ends: 3922 [2022-02-20 21:52:13,558 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 32 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=44, Invalid=66, Unknown=0, NotChecked=0, Total=110 [2022-02-20 21:52:13,559 INFO L933 BasicCegarLoop]: 697 mSDtfsCounter, 1540 mSDsluCounter, 755 mSDsCounter, 0 mSdLazyCounter, 561 mSolverCounterSat, 843 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1579 SdHoareTripleChecker+Valid, 1452 SdHoareTripleChecker+Invalid, 1404 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 843 IncrementalHoareTripleChecker+Valid, 561 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.3s IncrementalHoareTripleChecker+Time [2022-02-20 21:52:13,559 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1579 Valid, 1452 Invalid, 1404 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [843 Valid, 561 Invalid, 0 Unknown, 0 Unchecked, 1.3s Time] [2022-02-20 21:52:13,562 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3922 states. [2022-02-20 21:52:13,688 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3922 to 3516. [2022-02-20 21:52:13,688 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:52:13,695 INFO L82 GeneralOperation]: Start isEquivalent. First operand 3922 states. Second operand has 3516 states, 2593 states have (on average 1.261473197069032) internal successors, (3271), 2651 states have internal predecessors, (3271), 625 states have call successors, (625), 258 states have call predecessors, (625), 297 states have return successors, (774), 626 states have call predecessors, (774), 624 states have call successors, (774) [2022-02-20 21:52:13,703 INFO L74 IsIncluded]: Start isIncluded. First operand 3922 states. Second operand has 3516 states, 2593 states have (on average 1.261473197069032) internal successors, (3271), 2651 states have internal predecessors, (3271), 625 states have call successors, (625), 258 states have call predecessors, (625), 297 states have return successors, (774), 626 states have call predecessors, (774), 624 states have call successors, (774) [2022-02-20 21:52:13,708 INFO L87 Difference]: Start difference. First operand 3922 states. Second operand has 3516 states, 2593 states have (on average 1.261473197069032) internal successors, (3271), 2651 states have internal predecessors, (3271), 625 states have call successors, (625), 258 states have call predecessors, (625), 297 states have return successors, (774), 626 states have call predecessors, (774), 624 states have call successors, (774) [2022-02-20 21:52:14,160 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:52:14,161 INFO L93 Difference]: Finished difference Result 3922 states and 5281 transitions. [2022-02-20 21:52:14,161 INFO L276 IsEmpty]: Start isEmpty. Operand 3922 states and 5281 transitions. [2022-02-20 21:52:14,168 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:52:14,169 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:52:14,174 INFO L74 IsIncluded]: Start isIncluded. First operand has 3516 states, 2593 states have (on average 1.261473197069032) internal successors, (3271), 2651 states have internal predecessors, (3271), 625 states have call successors, (625), 258 states have call predecessors, (625), 297 states have return successors, (774), 626 states have call predecessors, (774), 624 states have call successors, (774) Second operand 3922 states. [2022-02-20 21:52:14,178 INFO L87 Difference]: Start difference. First operand has 3516 states, 2593 states have (on average 1.261473197069032) internal successors, (3271), 2651 states have internal predecessors, (3271), 625 states have call successors, (625), 258 states have call predecessors, (625), 297 states have return successors, (774), 626 states have call predecessors, (774), 624 states have call successors, (774) Second operand 3922 states. [2022-02-20 21:52:14,657 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:52:14,657 INFO L93 Difference]: Finished difference Result 3922 states and 5281 transitions. [2022-02-20 21:52:14,657 INFO L276 IsEmpty]: Start isEmpty. Operand 3922 states and 5281 transitions. [2022-02-20 21:52:14,665 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:52:14,665 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:52:14,665 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:52:14,665 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:52:14,671 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3516 states, 2593 states have (on average 1.261473197069032) internal successors, (3271), 2651 states have internal predecessors, (3271), 625 states have call successors, (625), 258 states have call predecessors, (625), 297 states have return successors, (774), 626 states have call predecessors, (774), 624 states have call successors, (774) [2022-02-20 21:52:15,304 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3516 states to 3516 states and 4670 transitions. [2022-02-20 21:52:15,304 INFO L78 Accepts]: Start accepts. Automaton has 3516 states and 4670 transitions. Word has length 153 [2022-02-20 21:52:15,305 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:52:15,305 INFO L470 AbstractCegarLoop]: Abstraction has 3516 states and 4670 transitions. [2022-02-20 21:52:15,305 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 14.142857142857142) internal successors, (99), 3 states have internal predecessors, (99), 2 states have call successors, (17), 6 states have call predecessors, (17), 1 states have return successors, (16), 2 states have call predecessors, (16), 2 states have call successors, (16) [2022-02-20 21:52:15,305 INFO L276 IsEmpty]: Start isEmpty. Operand 3516 states and 4670 transitions. [2022-02-20 21:52:15,309 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 163 [2022-02-20 21:52:15,309 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:52:15,309 INFO L514 BasicCegarLoop]: trace histogram [5, 5, 5, 4, 4, 4, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:52:15,309 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2022-02-20 21:52:15,310 INFO L402 AbstractCegarLoop]: === Iteration 9 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:52:15,310 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:52:15,310 INFO L85 PathProgramCache]: Analyzing trace with hash 425318257, now seen corresponding path program 1 times [2022-02-20 21:52:15,310 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:52:15,310 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1677283532] [2022-02-20 21:52:15,310 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:52:15,311 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:52:15,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:15,403 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 21:52:15,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:15,408 INFO L290 TraceCheckUtils]: 0: Hoare triple {85184#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {85117#true} is VALID [2022-02-20 21:52:15,408 INFO L290 TraceCheckUtils]: 1: Hoare triple {85117#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {85117#true} is VALID [2022-02-20 21:52:15,408 INFO L290 TraceCheckUtils]: 2: Hoare triple {85117#true} assume true; {85117#true} is VALID [2022-02-20 21:52:15,408 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {85117#true} {85117#true} #1203#return; {85117#true} is VALID [2022-02-20 21:52:15,408 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-02-20 21:52:15,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:15,413 INFO L290 TraceCheckUtils]: 0: Hoare triple {85184#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {85117#true} is VALID [2022-02-20 21:52:15,413 INFO L290 TraceCheckUtils]: 1: Hoare triple {85117#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {85117#true} is VALID [2022-02-20 21:52:15,413 INFO L290 TraceCheckUtils]: 2: Hoare triple {85117#true} assume true; {85117#true} is VALID [2022-02-20 21:52:15,413 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {85117#true} {85117#true} #1205#return; {85117#true} is VALID [2022-02-20 21:52:15,413 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2022-02-20 21:52:15,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:15,417 INFO L290 TraceCheckUtils]: 0: Hoare triple {85184#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {85117#true} is VALID [2022-02-20 21:52:15,418 INFO L290 TraceCheckUtils]: 1: Hoare triple {85117#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {85117#true} is VALID [2022-02-20 21:52:15,418 INFO L290 TraceCheckUtils]: 2: Hoare triple {85117#true} assume true; {85117#true} is VALID [2022-02-20 21:52:15,418 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {85117#true} {85117#true} #1207#return; {85117#true} is VALID [2022-02-20 21:52:15,418 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 29 [2022-02-20 21:52:15,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:15,422 INFO L290 TraceCheckUtils]: 0: Hoare triple {85184#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {85117#true} is VALID [2022-02-20 21:52:15,422 INFO L290 TraceCheckUtils]: 1: Hoare triple {85117#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {85117#true} is VALID [2022-02-20 21:52:15,423 INFO L290 TraceCheckUtils]: 2: Hoare triple {85117#true} assume true; {85117#true} is VALID [2022-02-20 21:52:15,423 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {85117#true} {85117#true} #1261#return; {85117#true} is VALID [2022-02-20 21:52:15,427 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2022-02-20 21:52:15,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:15,431 INFO L290 TraceCheckUtils]: 0: Hoare triple {85185#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet79 && #t~nondet79 <= 2147483647;~tmp___0~2 := #t~nondet79;havoc #t~nondet79; {85117#true} is VALID [2022-02-20 21:52:15,432 INFO L290 TraceCheckUtils]: 1: Hoare triple {85117#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {85117#true} is VALID [2022-02-20 21:52:15,432 INFO L290 TraceCheckUtils]: 2: Hoare triple {85117#true} assume true; {85117#true} is VALID [2022-02-20 21:52:15,432 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {85117#true} {85117#true} #1209#return; {85117#true} is VALID [2022-02-20 21:52:15,432 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 55 [2022-02-20 21:52:15,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:15,436 INFO L290 TraceCheckUtils]: 0: Hoare triple {85185#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet79 && #t~nondet79 <= 2147483647;~tmp___0~2 := #t~nondet79;havoc #t~nondet79; {85117#true} is VALID [2022-02-20 21:52:15,436 INFO L290 TraceCheckUtils]: 1: Hoare triple {85117#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {85117#true} is VALID [2022-02-20 21:52:15,436 INFO L290 TraceCheckUtils]: 2: Hoare triple {85117#true} assume true; {85117#true} is VALID [2022-02-20 21:52:15,437 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {85117#true} {85117#true} #1213#return; {85117#true} is VALID [2022-02-20 21:52:15,437 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 66 [2022-02-20 21:52:15,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:15,440 INFO L290 TraceCheckUtils]: 0: Hoare triple {85117#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3136 + ~dev.offset; {85117#true} is VALID [2022-02-20 21:52:15,440 INFO L290 TraceCheckUtils]: 1: Hoare triple {85117#true} assume true; {85117#true} is VALID [2022-02-20 21:52:15,440 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {85117#true} {85117#true} #1215#return; {85117#true} is VALID [2022-02-20 21:52:15,441 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71 [2022-02-20 21:52:15,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:15,445 INFO L290 TraceCheckUtils]: 0: Hoare triple {85185#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet79 && #t~nondet79 <= 2147483647;~tmp___0~2 := #t~nondet79;havoc #t~nondet79; {85117#true} is VALID [2022-02-20 21:52:15,445 INFO L290 TraceCheckUtils]: 1: Hoare triple {85117#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {85117#true} is VALID [2022-02-20 21:52:15,445 INFO L290 TraceCheckUtils]: 2: Hoare triple {85117#true} assume true; {85117#true} is VALID [2022-02-20 21:52:15,445 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {85117#true} {85117#true} #1217#return; {85117#true} is VALID [2022-02-20 21:52:15,445 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 83 [2022-02-20 21:52:15,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:15,451 INFO L290 TraceCheckUtils]: 0: Hoare triple {85185#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet79 && #t~nondet79 <= 2147483647;~tmp___0~2 := #t~nondet79;havoc #t~nondet79; {85117#true} is VALID [2022-02-20 21:52:15,451 INFO L290 TraceCheckUtils]: 1: Hoare triple {85117#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {85117#true} is VALID [2022-02-20 21:52:15,451 INFO L290 TraceCheckUtils]: 2: Hoare triple {85117#true} assume true; {85117#true} is VALID [2022-02-20 21:52:15,451 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {85117#true} {85118#false} #1223#return; {85118#false} is VALID [2022-02-20 21:52:15,451 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 92 [2022-02-20 21:52:15,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:15,456 INFO L290 TraceCheckUtils]: 0: Hoare triple {85117#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;~endpoint := #in~endpoint;call #t~mem74 := read~int(~dev.base, ~dev.offset, 4);#res := (if (1 == 256 * #t~mem74 || 0 == 256 * #t~mem74) && 0 == 32768 * ~endpoint then 256 * #t~mem74 else (if 0 == 256 * #t~mem74 && (1 == 32768 * ~endpoint || 0 == 32768 * ~endpoint) then 32768 * ~endpoint else (if (1 == 256 * #t~mem74 && (1 == 32768 * ~endpoint || 0 == 32768 * ~endpoint)) || ((1 == 256 * #t~mem74 || 0 == 256 * #t~mem74) && 1 == 32768 * ~endpoint) then 1 else ~bitwiseOr(256 * #t~mem74, 32768 * ~endpoint))));havoc #t~mem74; {85117#true} is VALID [2022-02-20 21:52:15,456 INFO L290 TraceCheckUtils]: 1: Hoare triple {85117#true} assume true; {85117#true} is VALID [2022-02-20 21:52:15,456 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {85117#true} {85118#false} #1225#return; {85118#false} is VALID [2022-02-20 21:52:15,456 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 97 [2022-02-20 21:52:15,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:15,462 INFO L290 TraceCheckUtils]: 0: Hoare triple {85117#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1 := #in~arg1;~arg2 := #in~arg2;~arg3 := #in~arg3;~arg4 := #in~arg4;~arg5 := #in~arg5;~arg6.base, ~arg6.offset := #in~arg6.base, #in~arg6.offset;~arg7 := #in~arg7;~arg8 := #in~arg8;assume -2147483648 <= #t~nondet364 && #t~nondet364 <= 2147483647;#res := #t~nondet364;havoc #t~nondet364; {85117#true} is VALID [2022-02-20 21:52:15,462 INFO L290 TraceCheckUtils]: 1: Hoare triple {85117#true} assume true; {85117#true} is VALID [2022-02-20 21:52:15,462 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {85117#true} {85118#false} #1227#return; {85118#false} is VALID [2022-02-20 21:52:15,468 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 110 [2022-02-20 21:52:15,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:15,476 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 21:52:15,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:15,480 INFO L290 TraceCheckUtils]: 0: Hoare triple {85185#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet79 && #t~nondet79 <= 2147483647;~tmp___0~2 := #t~nondet79;havoc #t~nondet79; {85117#true} is VALID [2022-02-20 21:52:15,480 INFO L290 TraceCheckUtils]: 1: Hoare triple {85117#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {85117#true} is VALID [2022-02-20 21:52:15,480 INFO L290 TraceCheckUtils]: 2: Hoare triple {85117#true} assume true; {85117#true} is VALID [2022-02-20 21:52:15,480 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {85117#true} {85117#true} #1173#return; {85117#true} is VALID [2022-02-20 21:52:15,480 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 7 [2022-02-20 21:52:15,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:15,484 INFO L290 TraceCheckUtils]: 0: Hoare triple {85117#true} havoc ~tmp~6;assume -2147483648 <= #t~nondet83 && #t~nondet83 <= 2147483647;~tmp~6 := #t~nondet83;havoc #t~nondet83;#res := ~tmp~6; {85117#true} is VALID [2022-02-20 21:52:15,484 INFO L290 TraceCheckUtils]: 1: Hoare triple {85117#true} assume true; {85117#true} is VALID [2022-02-20 21:52:15,484 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {85117#true} {85117#true} #1175#return; {85117#true} is VALID [2022-02-20 21:52:15,484 INFO L290 TraceCheckUtils]: 0: Hoare triple {85186#(and (= |old(#length)| |#length|) (= ~usb_urb~0.base |old(~usb_urb~0.base)|) (= ~usb_urb~0.offset |old(~usb_urb~0.offset)|) (= |old(#valid)| |#valid|))} havoc ~value~0.base, ~value~0.offset;havoc ~tmp~40.base, ~tmp~40.offset;havoc ~tmp___0~13; {85117#true} is VALID [2022-02-20 21:52:15,485 INFO L272 TraceCheckUtils]: 1: Hoare triple {85117#true} call #t~ret334.base, #t~ret334.offset := ldv_malloc(184); {85185#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:15,485 INFO L290 TraceCheckUtils]: 2: Hoare triple {85185#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet79 && #t~nondet79 <= 2147483647;~tmp___0~2 := #t~nondet79;havoc #t~nondet79; {85117#true} is VALID [2022-02-20 21:52:15,485 INFO L290 TraceCheckUtils]: 3: Hoare triple {85117#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {85117#true} is VALID [2022-02-20 21:52:15,485 INFO L290 TraceCheckUtils]: 4: Hoare triple {85117#true} assume true; {85117#true} is VALID [2022-02-20 21:52:15,485 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {85117#true} {85117#true} #1173#return; {85117#true} is VALID [2022-02-20 21:52:15,485 INFO L290 TraceCheckUtils]: 6: Hoare triple {85117#true} ~tmp~40.base, ~tmp~40.offset := #t~ret334.base, #t~ret334.offset;havoc #t~ret334.base, #t~ret334.offset;~value~0.base, ~value~0.offset := ~tmp~40.base, ~tmp~40.offset; {85117#true} is VALID [2022-02-20 21:52:15,486 INFO L272 TraceCheckUtils]: 7: Hoare triple {85117#true} call #t~ret335 := ldv_undef_int(); {85117#true} is VALID [2022-02-20 21:52:15,486 INFO L290 TraceCheckUtils]: 8: Hoare triple {85117#true} havoc ~tmp~6;assume -2147483648 <= #t~nondet83 && #t~nondet83 <= 2147483647;~tmp~6 := #t~nondet83;havoc #t~nondet83;#res := ~tmp~6; {85117#true} is VALID [2022-02-20 21:52:15,486 INFO L290 TraceCheckUtils]: 9: Hoare triple {85117#true} assume true; {85117#true} is VALID [2022-02-20 21:52:15,486 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {85117#true} {85117#true} #1175#return; {85117#true} is VALID [2022-02-20 21:52:15,486 INFO L290 TraceCheckUtils]: 11: Hoare triple {85117#true} assume -2147483648 <= #t~ret335 && #t~ret335 <= 2147483647;~tmp___0~13 := #t~ret335;havoc #t~ret335; {85117#true} is VALID [2022-02-20 21:52:15,486 INFO L290 TraceCheckUtils]: 12: Hoare triple {85117#true} assume 0 != ~tmp___0~13; {85117#true} is VALID [2022-02-20 21:52:15,486 INFO L290 TraceCheckUtils]: 13: Hoare triple {85117#true} assume 0 != (~value~0.base + ~value~0.offset) % 18446744073709551616;~usb_urb~0.base, ~usb_urb~0.offset := ~value~0.base, ~value~0.offset; {85117#true} is VALID [2022-02-20 21:52:15,486 INFO L290 TraceCheckUtils]: 14: Hoare triple {85117#true} #res.base, #res.offset := ~usb_urb~0.base, ~usb_urb~0.offset; {85117#true} is VALID [2022-02-20 21:52:15,487 INFO L290 TraceCheckUtils]: 15: Hoare triple {85117#true} assume true; {85117#true} is VALID [2022-02-20 21:52:15,487 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {85117#true} {85118#false} #1233#return; {85118#false} is VALID [2022-02-20 21:52:15,490 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 135 [2022-02-20 21:52:15,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:15,494 INFO L290 TraceCheckUtils]: 0: Hoare triple {85194#(= |old(#valid)| |#valid|)} ~p.base, ~p.offset := #in~p.base, #in~p.offset;call ULTIMATE.dealloc(~p.base, ~p.offset); {85117#true} is VALID [2022-02-20 21:52:15,494 INFO L290 TraceCheckUtils]: 1: Hoare triple {85117#true} assume true; {85117#true} is VALID [2022-02-20 21:52:15,494 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {85117#true} {85118#false} #1253#return; {85118#false} is VALID [2022-02-20 21:52:15,495 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 141 [2022-02-20 21:52:15,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:15,498 INFO L290 TraceCheckUtils]: 0: Hoare triple {85117#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset; {85117#true} is VALID [2022-02-20 21:52:15,498 INFO L290 TraceCheckUtils]: 1: Hoare triple {85117#true} assume true; {85117#true} is VALID [2022-02-20 21:52:15,498 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {85117#true} {85118#false} #1255#return; {85118#false} is VALID [2022-02-20 21:52:15,498 INFO L290 TraceCheckUtils]: 0: Hoare triple {85117#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(80, 2);call #Ultimate.allocInit(26, 3);call #Ultimate.allocInit(63, 4);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(24, 6);call #Ultimate.allocInit(28, 7);call #Ultimate.allocInit(24, 8);call #Ultimate.allocInit(20, 9);call #Ultimate.allocInit(24, 10);call #Ultimate.allocInit(25, 11);call #Ultimate.allocInit(19, 12);call #Ultimate.allocInit(25, 13);call #Ultimate.allocInit(19, 14);call #Ultimate.allocInit(45, 15);call #Ultimate.allocInit(19, 16);call #Ultimate.allocInit(24, 17);call #Ultimate.allocInit(17, 18);call #Ultimate.allocInit(217, 19);call #Ultimate.allocInit(29, 20);call #Ultimate.allocInit(10, 21);call #Ultimate.allocInit(24, 22);call #Ultimate.allocInit(10, 23);call #Ultimate.allocInit(16, 24);call #Ultimate.allocInit(18, 25);call #Ultimate.allocInit(6, 26);call write~init~int(101, 26, 0, 1);call write~init~int(116, 26, 1, 1);call write~init~int(104, 26, 2, 1);call write~init~int(37, 26, 3, 1);call write~init~int(100, 26, 4, 1);call write~init~int(0, 26, 5, 1);call #Ultimate.allocInit(45, 27);call #Ultimate.allocInit(26, 28);call #Ultimate.allocInit(30, 29);call #Ultimate.allocInit(31, 30);call #Ultimate.allocInit(27, 31);call #Ultimate.allocInit(30, 32);call #Ultimate.allocInit(43, 33);call #Ultimate.allocInit(44, 34);call #Ultimate.allocInit(7, 35);call write~init~int(105, 35, 0, 1);call write~init~int(112, 35, 1, 1);call write~init~int(104, 35, 2, 1);call write~init~int(101, 35, 3, 1);call write~init~int(116, 35, 4, 1);call write~init~int(104, 35, 5, 1);call write~init~int(0, 35, 6, 1);call #Ultimate.allocInit(7, 36);call write~init~int(105, 36, 0, 1);call write~init~int(112, 36, 1, 1);call write~init~int(104, 36, 2, 1);call write~init~int(101, 36, 3, 1);call write~init~int(116, 36, 4, 1);call write~init~int(104, 36, 5, 1);call write~init~int(0, 36, 6, 1);~ldv_state_variable_3~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_2~0 := 0;~ipheth_netdev_ops_group1~0.base, ~ipheth_netdev_ops_group1~0.offset := 0, 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~ipheth_driver_group1~0.base, ~ipheth_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#ipheth_table~0.base, ~#ipheth_table~0.offset := 37, 0;call #Ultimate.allocInit(250, 37);call write~init~int(899, ~#ipheth_table~0.base, ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 2 + ~#ipheth_table~0.offset, 2);call write~init~int(4752, ~#ipheth_table~0.base, 4 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 6 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 8 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 10 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 11 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 12 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 13 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 14 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 15 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 16 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 17 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 25 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 27 + ~#ipheth_table~0.offset, 2);call write~init~int(4754, ~#ipheth_table~0.base, 29 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 31 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 33 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 35 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 36 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 37 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 38 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 39 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 40 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 41 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 42 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 50 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 52 + ~#ipheth_table~0.offset, 2);call write~init~int(4756, ~#ipheth_table~0.base, 54 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 56 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 58 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 60 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 61 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 62 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 63 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 64 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 65 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 66 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 67 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 75 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 77 + ~#ipheth_table~0.offset, 2);call write~init~int(4759, ~#ipheth_table~0.base, 79 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 81 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 83 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 85 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 86 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 87 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 88 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 89 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 90 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 91 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 92 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 100 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 102 + ~#ipheth_table~0.offset, 2);call write~init~int(4762, ~#ipheth_table~0.base, 104 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 106 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 108 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 110 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 111 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 112 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 113 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 114 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 115 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 116 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 117 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 125 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 127 + ~#ipheth_table~0.offset, 2);call write~init~int(4779, ~#ipheth_table~0.base, 129 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 131 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 133 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 135 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 136 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 137 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 138 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 139 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 140 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 141 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 142 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 150 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 152 + ~#ipheth_table~0.offset, 2);call write~init~int(4764, ~#ipheth_table~0.base, 154 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 156 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 158 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 160 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 161 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 162 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 163 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 164 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 165 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 166 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 167 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 175 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 177 + ~#ipheth_table~0.offset, 2);call write~init~int(4768, ~#ipheth_table~0.base, 179 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 181 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 183 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 185 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 186 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 187 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 188 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 189 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 190 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 191 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 192 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 200 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 202 + ~#ipheth_table~0.offset, 2);call write~init~int(4776, ~#ipheth_table~0.base, 204 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 206 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 208 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 210 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 211 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 212 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 213 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 214 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 215 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 216 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 217 + ~#ipheth_table~0.offset, 8);call write~init~int(0, ~#ipheth_table~0.base, 225 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 227 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 229 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 231 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 233 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 235 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 236 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 237 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 238 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 239 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 240 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 241 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 242 + ~#ipheth_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.bInterfaceNumber := 0;~__mod_usb_device_table~0.driver_info := 0;~#ipheth_netdev_ops~0.base, ~#ipheth_netdev_ops~0.offset := 38, 0;call #Ultimate.allocInit(448, 38);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 8 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_open.base, #funAddr~ipheth_open.offset, ~#ipheth_netdev_ops~0.base, 16 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_close.base, #funAddr~ipheth_close.offset, ~#ipheth_netdev_ops~0.base, 24 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_tx.base, #funAddr~ipheth_tx.offset, ~#ipheth_netdev_ops~0.base, 32 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 40 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 48 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 56 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 64 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 72 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 80 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 88 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 96 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 104 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_tx_timeout.base, #funAddr~ipheth_tx_timeout.offset, ~#ipheth_netdev_ops~0.base, 112 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 120 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 128 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 136 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 144 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 152 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 160 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 168 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 176 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 184 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 192 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 200 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 208 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 216 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 224 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 232 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 240 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 248 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 256 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 264 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 272 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 280 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 288 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 296 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 304 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 312 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 320 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 328 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 336 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 344 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 352 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 360 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 368 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 376 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 384 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 392 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 400 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 408 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 416 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 424 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 432 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 440 + ~#ipheth_netdev_ops~0.offset, 8);~#ipheth_driver~0.base, ~#ipheth_driver~0.offset := 39, 0;call #Ultimate.allocInit(285, 39);call write~init~$Pointer$(35, 0, ~#ipheth_driver~0.base, ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_probe.base, #funAddr~ipheth_probe.offset, ~#ipheth_driver~0.base, 8 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_disconnect.base, #funAddr~ipheth_disconnect.offset, ~#ipheth_driver~0.base, 16 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 24 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 32 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 40 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 48 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 56 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 64 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(~#ipheth_table~0.base, ~#ipheth_table~0.offset, ~#ipheth_driver~0.base, 72 + ~#ipheth_driver~0.offset, 8);call write~init~int(0, ~#ipheth_driver~0.base, 80 + ~#ipheth_driver~0.offset, 4);call write~init~int(0, ~#ipheth_driver~0.base, 84 + ~#ipheth_driver~0.offset, 4);call write~init~int(0, ~#ipheth_driver~0.base, 88 + ~#ipheth_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 92 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 100 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 108 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 116 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 124 + ~#ipheth_driver~0.offset, 8);call write~init~int(0, ~#ipheth_driver~0.base, 132 + ~#ipheth_driver~0.offset, 4);call write~init~int(0, ~#ipheth_driver~0.base, 136 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 148 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 156 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 164 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 172 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 180 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 188 + ~#ipheth_driver~0.offset, 8);call write~init~int(0, ~#ipheth_driver~0.base, 196 + ~#ipheth_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 197 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 205 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 213 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 221 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 229 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 237 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 245 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 253 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 261 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 269 + ~#ipheth_driver~0.offset, 8);call write~init~int(0, ~#ipheth_driver~0.base, 277 + ~#ipheth_driver~0.offset, 4);call write~init~int(0, ~#ipheth_driver~0.base, 281 + ~#ipheth_driver~0.offset, 1);call write~init~int(0, ~#ipheth_driver~0.base, 282 + ~#ipheth_driver~0.offset, 1);call write~init~int(1, ~#ipheth_driver~0.base, 283 + ~#ipheth_driver~0.offset, 1);call write~init~int(0, ~#ipheth_driver~0.base, 284 + ~#ipheth_driver~0.offset, 1);~ldv_retval_2~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {85117#true} is VALID [2022-02-20 21:52:15,499 INFO L290 TraceCheckUtils]: 1: Hoare triple {85117#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret305#1.base, main_#t~ret305#1.offset, main_#t~ret306#1.base, main_#t~ret306#1.offset, main_#t~ret307#1.base, main_#t~ret307#1.offset, main_#t~nondet308#1, main_#t~switch309#1, main_#t~nondet310#1, main_#t~switch311#1, main_#t~ret312#1, main_#t~nondet313#1, main_#t~switch314#1, main_#t~ret315#1, main_#t~nondet316#1, main_#t~switch317#1, main_#t~ret318#1, main_#t~nondet319#1, main_#t~switch320#1, main_#t~ret321#1, main_#t~ret322#1, main_#t~ret323#1, main_#t~ret324#1, main_#t~ret325#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~31#1.base, main_~tmp~31#1.offset, main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset, main_~tmp___0~12#1.base, main_~tmp___0~12#1.offset, main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset, main_~tmp___1~4#1.base, main_~tmp___1~4#1.offset, main_~tmp___2~2#1, main_~tmp___3~1#1, main_~tmp___4~0#1, main_~tmp___5~0#1, main_~tmp___6~0#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~31#1.base, main_~tmp~31#1.offset;havoc main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset;havoc main_~tmp___0~12#1.base, main_~tmp___0~12#1.offset;havoc main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset;havoc main_~tmp___1~4#1.base, main_~tmp___1~4#1.offset;havoc main_~tmp___2~2#1;havoc main_~tmp___3~1#1;havoc main_~tmp___4~0#1;havoc main_~tmp___5~0#1;havoc main_~tmp___6~0#1; {85117#true} is VALID [2022-02-20 21:52:15,499 INFO L272 TraceCheckUtils]: 2: Hoare triple {85117#true} call main_#t~ret305#1.base, main_#t~ret305#1.offset := ldv_zalloc(32); {85184#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:15,499 INFO L290 TraceCheckUtils]: 3: Hoare triple {85184#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {85117#true} is VALID [2022-02-20 21:52:15,500 INFO L290 TraceCheckUtils]: 4: Hoare triple {85117#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {85117#true} is VALID [2022-02-20 21:52:15,500 INFO L290 TraceCheckUtils]: 5: Hoare triple {85117#true} assume true; {85117#true} is VALID [2022-02-20 21:52:15,500 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {85117#true} {85117#true} #1203#return; {85117#true} is VALID [2022-02-20 21:52:15,500 INFO L290 TraceCheckUtils]: 7: Hoare triple {85117#true} main_~tmp~31#1.base, main_~tmp~31#1.offset := main_#t~ret305#1.base, main_#t~ret305#1.offset;havoc main_#t~ret305#1.base, main_#t~ret305#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~31#1.base, main_~tmp~31#1.offset; {85117#true} is VALID [2022-02-20 21:52:15,500 INFO L272 TraceCheckUtils]: 8: Hoare triple {85117#true} call main_#t~ret306#1.base, main_#t~ret306#1.offset := ldv_zalloc(3136); {85184#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:15,501 INFO L290 TraceCheckUtils]: 9: Hoare triple {85184#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {85117#true} is VALID [2022-02-20 21:52:15,501 INFO L290 TraceCheckUtils]: 10: Hoare triple {85117#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {85117#true} is VALID [2022-02-20 21:52:15,501 INFO L290 TraceCheckUtils]: 11: Hoare triple {85117#true} assume true; {85117#true} is VALID [2022-02-20 21:52:15,501 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {85117#true} {85117#true} #1205#return; {85117#true} is VALID [2022-02-20 21:52:15,501 INFO L290 TraceCheckUtils]: 13: Hoare triple {85117#true} main_~tmp___0~12#1.base, main_~tmp___0~12#1.offset := main_#t~ret306#1.base, main_#t~ret306#1.offset;havoc main_#t~ret306#1.base, main_#t~ret306#1.offset;main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset := main_~tmp___0~12#1.base, main_~tmp___0~12#1.offset; {85117#true} is VALID [2022-02-20 21:52:15,502 INFO L272 TraceCheckUtils]: 14: Hoare triple {85117#true} call main_#t~ret307#1.base, main_#t~ret307#1.offset := ldv_zalloc(240); {85184#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:15,502 INFO L290 TraceCheckUtils]: 15: Hoare triple {85184#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {85117#true} is VALID [2022-02-20 21:52:15,502 INFO L290 TraceCheckUtils]: 16: Hoare triple {85117#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {85117#true} is VALID [2022-02-20 21:52:15,502 INFO L290 TraceCheckUtils]: 17: Hoare triple {85117#true} assume true; {85117#true} is VALID [2022-02-20 21:52:15,502 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {85117#true} {85117#true} #1207#return; {85117#true} is VALID [2022-02-20 21:52:15,502 INFO L290 TraceCheckUtils]: 19: Hoare triple {85117#true} main_~tmp___1~4#1.base, main_~tmp___1~4#1.offset := main_#t~ret307#1.base, main_#t~ret307#1.offset;havoc main_#t~ret307#1.base, main_#t~ret307#1.offset;main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset := main_~tmp___1~4#1.base, main_~tmp___1~4#1.offset;assume { :begin_inline_ldv_initialize } true; {85117#true} is VALID [2022-02-20 21:52:15,502 INFO L290 TraceCheckUtils]: 20: Hoare triple {85117#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {85117#true} is VALID [2022-02-20 21:52:15,502 INFO L290 TraceCheckUtils]: 21: Hoare triple {85117#true} assume -2147483648 <= main_#t~nondet308#1 && main_#t~nondet308#1 <= 2147483647;main_~tmp___2~2#1 := main_#t~nondet308#1;havoc main_#t~nondet308#1;main_#t~switch309#1 := 0 == main_~tmp___2~2#1; {85117#true} is VALID [2022-02-20 21:52:15,503 INFO L290 TraceCheckUtils]: 22: Hoare triple {85117#true} assume !main_#t~switch309#1;main_#t~switch309#1 := main_#t~switch309#1 || 1 == main_~tmp___2~2#1; {85117#true} is VALID [2022-02-20 21:52:15,503 INFO L290 TraceCheckUtils]: 23: Hoare triple {85117#true} assume main_#t~switch309#1; {85117#true} is VALID [2022-02-20 21:52:15,503 INFO L290 TraceCheckUtils]: 24: Hoare triple {85117#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet313#1 && main_#t~nondet313#1 <= 2147483647;main_~tmp___4~0#1 := main_#t~nondet313#1;havoc main_#t~nondet313#1;main_#t~switch314#1 := 0 == main_~tmp___4~0#1; {85117#true} is VALID [2022-02-20 21:52:15,503 INFO L290 TraceCheckUtils]: 25: Hoare triple {85117#true} assume !main_#t~switch314#1;main_#t~switch314#1 := main_#t~switch314#1 || 1 == main_~tmp___4~0#1; {85117#true} is VALID [2022-02-20 21:52:15,503 INFO L290 TraceCheckUtils]: 26: Hoare triple {85117#true} assume main_#t~switch314#1; {85117#true} is VALID [2022-02-20 21:52:15,503 INFO L290 TraceCheckUtils]: 27: Hoare triple {85117#true} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_ipheth_driver_init } true;havoc ipheth_driver_init_#res#1;havoc ipheth_driver_init_#t~ret302#1, ipheth_driver_init_~tmp~28#1;havoc ipheth_driver_init_~tmp~28#1;assume { :begin_inline_ldv_usb_register_driver_19 } true;ldv_usb_register_driver_19_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_19_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_19_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg3#1.offset := ~#ipheth_driver~0.base, ~#ipheth_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 36, 0;havoc ldv_usb_register_driver_19_#res#1;havoc ldv_usb_register_driver_19_#t~ret333#1, ldv_usb_register_driver_19_~ldv_func_arg1#1.base, ldv_usb_register_driver_19_~ldv_func_arg1#1.offset, ldv_usb_register_driver_19_~ldv_func_arg2#1.base, ldv_usb_register_driver_19_~ldv_func_arg2#1.offset, ldv_usb_register_driver_19_~ldv_func_arg3#1.base, ldv_usb_register_driver_19_~ldv_func_arg3#1.offset, ldv_usb_register_driver_19_~ldv_func_res~1#1, ldv_usb_register_driver_19_~tmp~39#1;ldv_usb_register_driver_19_~ldv_func_arg1#1.base, ldv_usb_register_driver_19_~ldv_func_arg1#1.offset := ldv_usb_register_driver_19_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_19_~ldv_func_arg2#1.base, ldv_usb_register_driver_19_~ldv_func_arg2#1.offset := ldv_usb_register_driver_19_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_19_~ldv_func_arg3#1.base, ldv_usb_register_driver_19_~ldv_func_arg3#1.offset := ldv_usb_register_driver_19_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_19_~ldv_func_res~1#1;havoc ldv_usb_register_driver_19_~tmp~39#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_19_~ldv_func_arg1#1.base, ldv_usb_register_driver_19_~ldv_func_arg1#1.offset, ldv_usb_register_driver_19_~ldv_func_arg2#1.base, ldv_usb_register_driver_19_~ldv_func_arg2#1.offset, ldv_usb_register_driver_19_~ldv_func_arg3#1.base, ldv_usb_register_driver_19_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet365#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet365#1 && usb_register_driver_#t~nondet365#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet365#1;havoc usb_register_driver_#t~nondet365#1; {85117#true} is VALID [2022-02-20 21:52:15,503 INFO L290 TraceCheckUtils]: 28: Hoare triple {85117#true} ldv_usb_register_driver_19_#t~ret333#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_19_#t~ret333#1 && ldv_usb_register_driver_19_#t~ret333#1 <= 2147483647;ldv_usb_register_driver_19_~tmp~39#1 := ldv_usb_register_driver_19_#t~ret333#1;havoc ldv_usb_register_driver_19_#t~ret333#1;ldv_usb_register_driver_19_~ldv_func_res~1#1 := ldv_usb_register_driver_19_~tmp~39#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret303#1.base, ldv_usb_driver_1_#t~ret303#1.offset, ldv_usb_driver_1_~tmp~29#1.base, ldv_usb_driver_1_~tmp~29#1.offset;havoc ldv_usb_driver_1_~tmp~29#1.base, ldv_usb_driver_1_~tmp~29#1.offset; {85117#true} is VALID [2022-02-20 21:52:15,504 INFO L272 TraceCheckUtils]: 29: Hoare triple {85117#true} call ldv_usb_driver_1_#t~ret303#1.base, ldv_usb_driver_1_#t~ret303#1.offset := ldv_zalloc(1520); {85184#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:15,504 INFO L290 TraceCheckUtils]: 30: Hoare triple {85184#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {85117#true} is VALID [2022-02-20 21:52:15,504 INFO L290 TraceCheckUtils]: 31: Hoare triple {85117#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {85117#true} is VALID [2022-02-20 21:52:15,504 INFO L290 TraceCheckUtils]: 32: Hoare triple {85117#true} assume true; {85117#true} is VALID [2022-02-20 21:52:15,504 INFO L284 TraceCheckUtils]: 33: Hoare quadruple {85117#true} {85117#true} #1261#return; {85117#true} is VALID [2022-02-20 21:52:15,504 INFO L290 TraceCheckUtils]: 34: Hoare triple {85117#true} ldv_usb_driver_1_~tmp~29#1.base, ldv_usb_driver_1_~tmp~29#1.offset := ldv_usb_driver_1_#t~ret303#1.base, ldv_usb_driver_1_#t~ret303#1.offset;havoc ldv_usb_driver_1_#t~ret303#1.base, ldv_usb_driver_1_#t~ret303#1.offset;~ipheth_driver_group1~0.base, ~ipheth_driver_group1~0.offset := ldv_usb_driver_1_~tmp~29#1.base, ldv_usb_driver_1_~tmp~29#1.offset; {85117#true} is VALID [2022-02-20 21:52:15,505 INFO L290 TraceCheckUtils]: 35: Hoare triple {85117#true} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_19_#res#1 := ldv_usb_register_driver_19_~ldv_func_res~1#1; {85117#true} is VALID [2022-02-20 21:52:15,505 INFO L290 TraceCheckUtils]: 36: Hoare triple {85117#true} ipheth_driver_init_#t~ret302#1 := ldv_usb_register_driver_19_#res#1;assume { :end_inline_ldv_usb_register_driver_19 } true;assume -2147483648 <= ipheth_driver_init_#t~ret302#1 && ipheth_driver_init_#t~ret302#1 <= 2147483647;ipheth_driver_init_~tmp~28#1 := ipheth_driver_init_#t~ret302#1;havoc ipheth_driver_init_#t~ret302#1;ipheth_driver_init_#res#1 := ipheth_driver_init_~tmp~28#1; {85117#true} is VALID [2022-02-20 21:52:15,505 INFO L290 TraceCheckUtils]: 37: Hoare triple {85117#true} main_#t~ret315#1 := ipheth_driver_init_#res#1;assume { :end_inline_ipheth_driver_init } true;assume -2147483648 <= main_#t~ret315#1 && main_#t~ret315#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret315#1;havoc main_#t~ret315#1; {85117#true} is VALID [2022-02-20 21:52:15,505 INFO L290 TraceCheckUtils]: 38: Hoare triple {85117#true} assume 0 == ~ldv_retval_1~0;~ldv_state_variable_0~0 := 3; {85117#true} is VALID [2022-02-20 21:52:15,505 INFO L290 TraceCheckUtils]: 39: Hoare triple {85117#true} assume !(0 != ~ldv_retval_1~0); {85117#true} is VALID [2022-02-20 21:52:15,505 INFO L290 TraceCheckUtils]: 40: Hoare triple {85117#true} assume -2147483648 <= main_#t~nondet308#1 && main_#t~nondet308#1 <= 2147483647;main_~tmp___2~2#1 := main_#t~nondet308#1;havoc main_#t~nondet308#1;main_#t~switch309#1 := 0 == main_~tmp___2~2#1; {85117#true} is VALID [2022-02-20 21:52:15,505 INFO L290 TraceCheckUtils]: 41: Hoare triple {85117#true} assume main_#t~switch309#1; {85117#true} is VALID [2022-02-20 21:52:15,505 INFO L290 TraceCheckUtils]: 42: Hoare triple {85117#true} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= main_#t~nondet310#1 && main_#t~nondet310#1 <= 2147483647;main_~tmp___3~1#1 := main_#t~nondet310#1;havoc main_#t~nondet310#1;main_#t~switch311#1 := 0 == main_~tmp___3~1#1; {85117#true} is VALID [2022-02-20 21:52:15,506 INFO L290 TraceCheckUtils]: 43: Hoare triple {85117#true} assume main_#t~switch311#1; {85117#true} is VALID [2022-02-20 21:52:15,506 INFO L290 TraceCheckUtils]: 44: Hoare triple {85117#true} assume 1 == ~ldv_state_variable_1~0;assume { :begin_inline_ipheth_probe } true;ipheth_probe_#in~intf#1.base, ipheth_probe_#in~intf#1.offset, ipheth_probe_#in~id#1.base, ipheth_probe_#in~id#1.offset := ~ipheth_driver_group1~0.base, ~ipheth_driver_group1~0.offset, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc ipheth_probe_#res#1;havoc ipheth_probe_#t~ret271#1.base, ipheth_probe_#t~ret271#1.offset, ipheth_probe_#t~ret272#1.base, ipheth_probe_#t~ret272#1.offset, ipheth_probe_#t~strcpy~res273#1.base, ipheth_probe_#t~strcpy~res273#1.offset, ipheth_probe_#t~ret274#1.base, ipheth_probe_#t~ret274#1.offset, ipheth_probe_#t~ret275#1.base, ipheth_probe_#t~ret275#1.offset, ipheth_probe_#t~nondet276#1, ipheth_probe_#t~mem277#1.base, ipheth_probe_#t~mem277#1.offset, ipheth_probe_#t~ret278#1, ipheth_probe_#t~mem279#1, ipheth_probe_#t~ret280#1, ipheth_probe_#t~mem281#1, ipheth_probe_#t~mem282#1, ipheth_probe_#t~mem283#1, ipheth_probe_#t~mem284#1, ipheth_probe_#t~short285#1, ipheth_probe_#t~nondet286#1, ipheth_probe_#t~ret287#1.base, ipheth_probe_#t~ret287#1.offset, ipheth_probe_#t~mem288#1.base, ipheth_probe_#t~mem288#1.offset, ipheth_probe_#t~ret289#1, ipheth_probe_#t~mem290#1, ipheth_probe_#t~ret291#1, ipheth_probe_#t~nondet292#1, ipheth_probe_#t~ret293#1, ipheth_probe_#t~nondet294#1, ipheth_probe_#t~nondet295#1, ipheth_probe_#t~mem296#1.base, ipheth_probe_#t~mem296#1.offset, ipheth_probe_~intf#1.base, ipheth_probe_~intf#1.offset, ipheth_probe_~id#1.base, ipheth_probe_~id#1.offset, ipheth_probe_~udev~5#1.base, ipheth_probe_~udev~5#1.offset, ipheth_probe_~tmp~26#1.base, ipheth_probe_~tmp~26#1.offset, ipheth_probe_~hintf~0#1.base, ipheth_probe_~hintf~0#1.offset, ipheth_probe_~endp~0#1.base, ipheth_probe_~endp~0#1.offset, ipheth_probe_~dev~8#1.base, ipheth_probe_~dev~8#1.offset, ipheth_probe_~netdev~0#1.base, ipheth_probe_~netdev~0#1.offset, ipheth_probe_~i~0#1, ipheth_probe_~retval~5#1, ipheth_probe_~tmp___0~11#1.base, ipheth_probe_~tmp___0~11#1.offset, ipheth_probe_~tmp___1~3#1, ipheth_probe_~tmp___2~1#1, ipheth_probe_~tmp___3~0#1.base, ipheth_probe_~tmp___3~0#1.offset, ipheth_probe_~#__key~0#1.base, ipheth_probe_~#__key~0#1.offset, ipheth_probe_~#__constr_expr_0~0#1.base, ipheth_probe_~#__constr_expr_0~0#1.offset, ipheth_probe_~#__key___0~0#1.base, ipheth_probe_~#__key___0~0#1.offset;ipheth_probe_~intf#1.base, ipheth_probe_~intf#1.offset := ipheth_probe_#in~intf#1.base, ipheth_probe_#in~intf#1.offset;ipheth_probe_~id#1.base, ipheth_probe_~id#1.offset := ipheth_probe_#in~id#1.base, ipheth_probe_#in~id#1.offset;havoc ipheth_probe_~udev~5#1.base, ipheth_probe_~udev~5#1.offset;havoc ipheth_probe_~tmp~26#1.base, ipheth_probe_~tmp~26#1.offset;havoc ipheth_probe_~hintf~0#1.base, ipheth_probe_~hintf~0#1.offset;havoc ipheth_probe_~endp~0#1.base, ipheth_probe_~endp~0#1.offset;havoc ipheth_probe_~dev~8#1.base, ipheth_probe_~dev~8#1.offset;havoc ipheth_probe_~netdev~0#1.base, ipheth_probe_~netdev~0#1.offset;havoc ipheth_probe_~i~0#1;havoc ipheth_probe_~retval~5#1;havoc ipheth_probe_~tmp___0~11#1.base, ipheth_probe_~tmp___0~11#1.offset;havoc ipheth_probe_~tmp___1~3#1;havoc ipheth_probe_~tmp___2~1#1;havoc ipheth_probe_~tmp___3~0#1.base, ipheth_probe_~tmp___3~0#1.offset;call ipheth_probe_~#__key~0#1.base, ipheth_probe_~#__key~0#1.offset := #Ultimate.allocOnStack(8);call ipheth_probe_~#__constr_expr_0~0#1.base, ipheth_probe_~#__constr_expr_0~0#1.offset := #Ultimate.allocOnStack(8);call ipheth_probe_~#__key___0~0#1.base, ipheth_probe_~#__key___0~0#1.offset := #Ultimate.allocOnStack(8);assume { :begin_inline_interface_to_usbdev } true;interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset := ipheth_probe_~intf#1.base, ipheth_probe_~intf#1.offset;havoc interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;havoc interface_to_usbdev_#t~ret326#1.base, interface_to_usbdev_#t~ret326#1.offset, interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset, interface_to_usbdev_~tmp~32#1.base, interface_to_usbdev_~tmp~32#1.offset;interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset := interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset;havoc interface_to_usbdev_~tmp~32#1.base, interface_to_usbdev_~tmp~32#1.offset;assume { :begin_inline_ldv_interface_to_usbdev } true;havoc ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;havoc ldv_interface_to_usbdev_#t~ret339#1.base, ldv_interface_to_usbdev_#t~ret339#1.offset, ldv_interface_to_usbdev_~result~0#1.base, ldv_interface_to_usbdev_~result~0#1.offset, ldv_interface_to_usbdev_~tmp~42#1.base, ldv_interface_to_usbdev_~tmp~42#1.offset;havoc ldv_interface_to_usbdev_~result~0#1.base, ldv_interface_to_usbdev_~result~0#1.offset;havoc ldv_interface_to_usbdev_~tmp~42#1.base, ldv_interface_to_usbdev_~tmp~42#1.offset; {85117#true} is VALID [2022-02-20 21:52:15,506 INFO L272 TraceCheckUtils]: 45: Hoare triple {85117#true} call ldv_interface_to_usbdev_#t~ret339#1.base, ldv_interface_to_usbdev_#t~ret339#1.offset := ldv_malloc(1889); {85185#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:15,506 INFO L290 TraceCheckUtils]: 46: Hoare triple {85185#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet79 && #t~nondet79 <= 2147483647;~tmp___0~2 := #t~nondet79;havoc #t~nondet79; {85117#true} is VALID [2022-02-20 21:52:15,506 INFO L290 TraceCheckUtils]: 47: Hoare triple {85117#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {85117#true} is VALID [2022-02-20 21:52:15,506 INFO L290 TraceCheckUtils]: 48: Hoare triple {85117#true} assume true; {85117#true} is VALID [2022-02-20 21:52:15,507 INFO L284 TraceCheckUtils]: 49: Hoare quadruple {85117#true} {85117#true} #1209#return; {85117#true} is VALID [2022-02-20 21:52:15,507 INFO L290 TraceCheckUtils]: 50: Hoare triple {85117#true} ldv_interface_to_usbdev_~tmp~42#1.base, ldv_interface_to_usbdev_~tmp~42#1.offset := ldv_interface_to_usbdev_#t~ret339#1.base, ldv_interface_to_usbdev_#t~ret339#1.offset;havoc ldv_interface_to_usbdev_#t~ret339#1.base, ldv_interface_to_usbdev_#t~ret339#1.offset;ldv_interface_to_usbdev_~result~0#1.base, ldv_interface_to_usbdev_~result~0#1.offset := ldv_interface_to_usbdev_~tmp~42#1.base, ldv_interface_to_usbdev_~tmp~42#1.offset; {85117#true} is VALID [2022-02-20 21:52:15,507 INFO L290 TraceCheckUtils]: 51: Hoare triple {85117#true} assume 0 != (ldv_interface_to_usbdev_~result~0#1.base + ldv_interface_to_usbdev_~result~0#1.offset) % 18446744073709551616; {85117#true} is VALID [2022-02-20 21:52:15,507 INFO L290 TraceCheckUtils]: 52: Hoare triple {85117#true} ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset := ldv_interface_to_usbdev_~result~0#1.base, ldv_interface_to_usbdev_~result~0#1.offset; {85117#true} is VALID [2022-02-20 21:52:15,507 INFO L290 TraceCheckUtils]: 53: Hoare triple {85117#true} interface_to_usbdev_#t~ret326#1.base, interface_to_usbdev_#t~ret326#1.offset := ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;assume { :end_inline_ldv_interface_to_usbdev } true;interface_to_usbdev_~tmp~32#1.base, interface_to_usbdev_~tmp~32#1.offset := interface_to_usbdev_#t~ret326#1.base, interface_to_usbdev_#t~ret326#1.offset;havoc interface_to_usbdev_#t~ret326#1.base, interface_to_usbdev_#t~ret326#1.offset;interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset := interface_to_usbdev_~tmp~32#1.base, interface_to_usbdev_~tmp~32#1.offset; {85117#true} is VALID [2022-02-20 21:52:15,507 INFO L290 TraceCheckUtils]: 54: Hoare triple {85117#true} ipheth_probe_#t~ret271#1.base, ipheth_probe_#t~ret271#1.offset := interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;assume { :end_inline_interface_to_usbdev } true;ipheth_probe_~tmp~26#1.base, ipheth_probe_~tmp~26#1.offset := ipheth_probe_#t~ret271#1.base, ipheth_probe_#t~ret271#1.offset;havoc ipheth_probe_#t~ret271#1.base, ipheth_probe_#t~ret271#1.offset;ipheth_probe_~udev~5#1.base, ipheth_probe_~udev~5#1.offset := ipheth_probe_~tmp~26#1.base, ipheth_probe_~tmp~26#1.offset;assume { :begin_inline_alloc_etherdev_mqs } true;alloc_etherdev_mqs_#in~arg0#1, alloc_etherdev_mqs_#in~arg1#1, alloc_etherdev_mqs_#in~arg2#1 := 304, 1, 1;havoc alloc_etherdev_mqs_#res#1.base, alloc_etherdev_mqs_#res#1.offset;havoc alloc_etherdev_mqs_#t~ret347#1.base, alloc_etherdev_mqs_#t~ret347#1.offset, alloc_etherdev_mqs_~arg0#1, alloc_etherdev_mqs_~arg1#1, alloc_etherdev_mqs_~arg2#1;alloc_etherdev_mqs_~arg0#1 := alloc_etherdev_mqs_#in~arg0#1;alloc_etherdev_mqs_~arg1#1 := alloc_etherdev_mqs_#in~arg1#1;alloc_etherdev_mqs_~arg2#1 := alloc_etherdev_mqs_#in~arg2#1; {85117#true} is VALID [2022-02-20 21:52:15,508 INFO L272 TraceCheckUtils]: 55: Hoare triple {85117#true} call alloc_etherdev_mqs_#t~ret347#1.base, alloc_etherdev_mqs_#t~ret347#1.offset := ldv_malloc(2887); {85185#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:15,508 INFO L290 TraceCheckUtils]: 56: Hoare triple {85185#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet79 && #t~nondet79 <= 2147483647;~tmp___0~2 := #t~nondet79;havoc #t~nondet79; {85117#true} is VALID [2022-02-20 21:52:15,508 INFO L290 TraceCheckUtils]: 57: Hoare triple {85117#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {85117#true} is VALID [2022-02-20 21:52:15,508 INFO L290 TraceCheckUtils]: 58: Hoare triple {85117#true} assume true; {85117#true} is VALID [2022-02-20 21:52:15,508 INFO L284 TraceCheckUtils]: 59: Hoare quadruple {85117#true} {85117#true} #1213#return; {85117#true} is VALID [2022-02-20 21:52:15,508 INFO L290 TraceCheckUtils]: 60: Hoare triple {85117#true} alloc_etherdev_mqs_#res#1.base, alloc_etherdev_mqs_#res#1.offset := alloc_etherdev_mqs_#t~ret347#1.base, alloc_etherdev_mqs_#t~ret347#1.offset;havoc alloc_etherdev_mqs_#t~ret347#1.base, alloc_etherdev_mqs_#t~ret347#1.offset; {85117#true} is VALID [2022-02-20 21:52:15,508 INFO L290 TraceCheckUtils]: 61: Hoare triple {85117#true} ipheth_probe_#t~ret272#1.base, ipheth_probe_#t~ret272#1.offset := alloc_etherdev_mqs_#res#1.base, alloc_etherdev_mqs_#res#1.offset;assume { :end_inline_alloc_etherdev_mqs } true;ipheth_probe_~netdev~0#1.base, ipheth_probe_~netdev~0#1.offset := ipheth_probe_#t~ret272#1.base, ipheth_probe_#t~ret272#1.offset;havoc ipheth_probe_#t~ret272#1.base, ipheth_probe_#t~ret272#1.offset; {85117#true} is VALID [2022-02-20 21:52:15,509 INFO L290 TraceCheckUtils]: 62: Hoare triple {85117#true} assume !(0 == (ipheth_probe_~netdev~0#1.base + ipheth_probe_~netdev~0#1.offset) % 18446744073709551616);call write~$Pointer$(~#ipheth_netdev_ops~0.base, ~#ipheth_netdev_ops~0.offset, ipheth_probe_~netdev~0#1.base, 420 + ipheth_probe_~netdev~0#1.offset, 8);call write~int(1250, ipheth_probe_~netdev~0#1.base, 930 + ipheth_probe_~netdev~0#1.offset, 4);assume { :begin_inline_#Ultimate.C_strcpy } true;#Ultimate.C_strcpy_dest#1.base, #Ultimate.C_strcpy_dest#1.offset, #Ultimate.C_strcpy_src#1.base, #Ultimate.C_strcpy_src#1.offset := ipheth_probe_~netdev~0#1.base, ipheth_probe_~netdev~0#1.offset, 26, 0;havoc #Ultimate.C_strcpy_#res#1.base, #Ultimate.C_strcpy_#res#1.offset;havoc #Ultimate.C_strcpy_#t~offset383#1, #Ultimate.C_strcpy_#t~mem384#1;#Ultimate.C_strcpy_#t~offset383#1 := 0; {85117#true} is VALID [2022-02-20 21:52:15,509 INFO L290 TraceCheckUtils]: 63: Hoare triple {85117#true} call #Ultimate.C_strcpy_#t~mem384#1 := read~int(#Ultimate.C_strcpy_src#1.base, #Ultimate.C_strcpy_src#1.offset + #Ultimate.C_strcpy_#t~offset383#1, 1);call write~unchecked~int(#Ultimate.C_strcpy_#t~mem384#1, #Ultimate.C_strcpy_dest#1.base, #Ultimate.C_strcpy_dest#1.offset + #Ultimate.C_strcpy_#t~offset383#1, 1); {85117#true} is VALID [2022-02-20 21:52:15,509 INFO L290 TraceCheckUtils]: 64: Hoare triple {85117#true} assume 0 == #Ultimate.C_strcpy_#t~mem384#1; {85117#true} is VALID [2022-02-20 21:52:15,509 INFO L290 TraceCheckUtils]: 65: Hoare triple {85117#true} assume #Ultimate.C_strcpy_#res#1.base == #Ultimate.C_strcpy_dest#1.base && #Ultimate.C_strcpy_#res#1.offset == #Ultimate.C_strcpy_dest#1.offset;ipheth_probe_#t~strcpy~res273#1.base, ipheth_probe_#t~strcpy~res273#1.offset := #Ultimate.C_strcpy_#res#1.base, #Ultimate.C_strcpy_#res#1.offset;assume { :end_inline_#Ultimate.C_strcpy } true;havoc ipheth_probe_#t~strcpy~res273#1.base, ipheth_probe_#t~strcpy~res273#1.offset; {85117#true} is VALID [2022-02-20 21:52:15,509 INFO L272 TraceCheckUtils]: 66: Hoare triple {85117#true} call ipheth_probe_#t~ret274#1.base, ipheth_probe_#t~ret274#1.offset := netdev_priv(ipheth_probe_~netdev~0#1.base, ipheth_probe_~netdev~0#1.offset); {85117#true} is VALID [2022-02-20 21:52:15,509 INFO L290 TraceCheckUtils]: 67: Hoare triple {85117#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3136 + ~dev.offset; {85117#true} is VALID [2022-02-20 21:52:15,509 INFO L290 TraceCheckUtils]: 68: Hoare triple {85117#true} assume true; {85117#true} is VALID [2022-02-20 21:52:15,509 INFO L284 TraceCheckUtils]: 69: Hoare quadruple {85117#true} {85117#true} #1215#return; {85117#true} is VALID [2022-02-20 21:52:15,509 INFO L290 TraceCheckUtils]: 70: Hoare triple {85117#true} ipheth_probe_~tmp___0~11#1.base, ipheth_probe_~tmp___0~11#1.offset := ipheth_probe_#t~ret274#1.base, ipheth_probe_#t~ret274#1.offset;havoc ipheth_probe_#t~ret274#1.base, ipheth_probe_#t~ret274#1.offset;ipheth_probe_~dev~8#1.base, ipheth_probe_~dev~8#1.offset := ipheth_probe_~tmp___0~11#1.base, ipheth_probe_~tmp___0~11#1.offset;call write~$Pointer$(ipheth_probe_~udev~5#1.base, ipheth_probe_~udev~5#1.offset, ipheth_probe_~dev~8#1.base, ipheth_probe_~dev~8#1.offset, 8);call write~$Pointer$(ipheth_probe_~netdev~0#1.base, ipheth_probe_~netdev~0#1.offset, ipheth_probe_~dev~8#1.base, 16 + ipheth_probe_~dev~8#1.offset, 8);call write~$Pointer$(ipheth_probe_~intf#1.base, ipheth_probe_~intf#1.offset, ipheth_probe_~dev~8#1.base, 8 + ipheth_probe_~dev~8#1.offset, 8);assume { :begin_inline_usb_altnum_to_altsetting } true;usb_altnum_to_altsetting_#in~arg0#1.base, usb_altnum_to_altsetting_#in~arg0#1.offset, usb_altnum_to_altsetting_#in~arg1#1 := ipheth_probe_~intf#1.base, ipheth_probe_~intf#1.offset, 1;havoc usb_altnum_to_altsetting_#res#1.base, usb_altnum_to_altsetting_#res#1.offset;havoc usb_altnum_to_altsetting_#t~ret363#1.base, usb_altnum_to_altsetting_#t~ret363#1.offset, usb_altnum_to_altsetting_~arg0#1.base, usb_altnum_to_altsetting_~arg0#1.offset, usb_altnum_to_altsetting_~arg1#1;usb_altnum_to_altsetting_~arg0#1.base, usb_altnum_to_altsetting_~arg0#1.offset := usb_altnum_to_altsetting_#in~arg0#1.base, usb_altnum_to_altsetting_#in~arg0#1.offset;usb_altnum_to_altsetting_~arg1#1 := usb_altnum_to_altsetting_#in~arg1#1; {85117#true} is VALID [2022-02-20 21:52:15,510 INFO L272 TraceCheckUtils]: 71: Hoare triple {85117#true} call usb_altnum_to_altsetting_#t~ret363#1.base, usb_altnum_to_altsetting_#t~ret363#1.offset := ldv_malloc(37); {85185#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:15,510 INFO L290 TraceCheckUtils]: 72: Hoare triple {85185#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet79 && #t~nondet79 <= 2147483647;~tmp___0~2 := #t~nondet79;havoc #t~nondet79; {85117#true} is VALID [2022-02-20 21:52:15,510 INFO L290 TraceCheckUtils]: 73: Hoare triple {85117#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {85117#true} is VALID [2022-02-20 21:52:15,510 INFO L290 TraceCheckUtils]: 74: Hoare triple {85117#true} assume true; {85117#true} is VALID [2022-02-20 21:52:15,510 INFO L284 TraceCheckUtils]: 75: Hoare quadruple {85117#true} {85117#true} #1217#return; {85117#true} is VALID [2022-02-20 21:52:15,511 INFO L290 TraceCheckUtils]: 76: Hoare triple {85117#true} usb_altnum_to_altsetting_#res#1.base, usb_altnum_to_altsetting_#res#1.offset := usb_altnum_to_altsetting_#t~ret363#1.base, usb_altnum_to_altsetting_#t~ret363#1.offset;havoc usb_altnum_to_altsetting_#t~ret363#1.base, usb_altnum_to_altsetting_#t~ret363#1.offset; {85117#true} is VALID [2022-02-20 21:52:15,511 INFO L290 TraceCheckUtils]: 77: Hoare triple {85117#true} ipheth_probe_#t~ret275#1.base, ipheth_probe_#t~ret275#1.offset := usb_altnum_to_altsetting_#res#1.base, usb_altnum_to_altsetting_#res#1.offset;assume { :end_inline_usb_altnum_to_altsetting } true;ipheth_probe_~hintf~0#1.base, ipheth_probe_~hintf~0#1.offset := ipheth_probe_#t~ret275#1.base, ipheth_probe_#t~ret275#1.offset;havoc ipheth_probe_#t~ret275#1.base, ipheth_probe_#t~ret275#1.offset; {85117#true} is VALID [2022-02-20 21:52:15,511 INFO L290 TraceCheckUtils]: 78: Hoare triple {85117#true} assume !(0 == (ipheth_probe_~hintf~0#1.base + ipheth_probe_~hintf~0#1.offset) % 18446744073709551616);ipheth_probe_~i~0#1 := 0; {85117#true} is VALID [2022-02-20 21:52:15,511 INFO L290 TraceCheckUtils]: 79: Hoare triple {85117#true} call ipheth_probe_#t~mem282#1 := read~int(ipheth_probe_~hintf~0#1.base, 4 + ipheth_probe_~hintf~0#1.offset, 1); {85117#true} is VALID [2022-02-20 21:52:15,511 INFO L290 TraceCheckUtils]: 80: Hoare triple {85117#true} assume !(ipheth_probe_#t~mem282#1 % 256 > ipheth_probe_~i~0#1);havoc ipheth_probe_#t~mem282#1;call ipheth_probe_#t~mem283#1 := read~int(ipheth_probe_~dev~8#1.base, 72 + ipheth_probe_~dev~8#1.offset, 1);ipheth_probe_#t~short285#1 := 0 == ipheth_probe_#t~mem283#1 % 256 % 4294967296; {85117#true} is VALID [2022-02-20 21:52:15,511 INFO L290 TraceCheckUtils]: 81: Hoare triple {85117#true} assume ipheth_probe_#t~short285#1; {85150#|ULTIMATE.start_ipheth_probe_#t~short285#1|} is VALID [2022-02-20 21:52:15,512 INFO L290 TraceCheckUtils]: 82: Hoare triple {85150#|ULTIMATE.start_ipheth_probe_#t~short285#1|} assume !ipheth_probe_#t~short285#1;havoc ipheth_probe_#t~mem283#1;havoc ipheth_probe_#t~mem284#1;havoc ipheth_probe_#t~short285#1;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := 64, 208;havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret78#1.base, kmalloc_#t~ret78#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___2~0#1.base, kmalloc_~tmp___2~0#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___2~0#1.base, kmalloc_~tmp___2~0#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret77#1.base, __kmalloc_#t~ret77#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {85118#false} is VALID [2022-02-20 21:52:15,512 INFO L272 TraceCheckUtils]: 83: Hoare triple {85118#false} call __kmalloc_#t~ret77#1.base, __kmalloc_#t~ret77#1.offset := ldv_malloc(__kmalloc_~size#1); {85185#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:15,512 INFO L290 TraceCheckUtils]: 84: Hoare triple {85185#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet79 && #t~nondet79 <= 2147483647;~tmp___0~2 := #t~nondet79;havoc #t~nondet79; {85117#true} is VALID [2022-02-20 21:52:15,512 INFO L290 TraceCheckUtils]: 85: Hoare triple {85117#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {85117#true} is VALID [2022-02-20 21:52:15,512 INFO L290 TraceCheckUtils]: 86: Hoare triple {85117#true} assume true; {85117#true} is VALID [2022-02-20 21:52:15,512 INFO L284 TraceCheckUtils]: 87: Hoare quadruple {85117#true} {85118#false} #1223#return; {85118#false} is VALID [2022-02-20 21:52:15,512 INFO L290 TraceCheckUtils]: 88: Hoare triple {85118#false} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret77#1.base, __kmalloc_#t~ret77#1.offset;havoc __kmalloc_#t~ret77#1.base, __kmalloc_#t~ret77#1.offset; {85118#false} is VALID [2022-02-20 21:52:15,513 INFO L290 TraceCheckUtils]: 89: Hoare triple {85118#false} kmalloc_#t~ret78#1.base, kmalloc_#t~ret78#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___2~0#1.base, kmalloc_~tmp___2~0#1.offset := kmalloc_#t~ret78#1.base, kmalloc_#t~ret78#1.offset;havoc kmalloc_#t~ret78#1.base, kmalloc_#t~ret78#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___2~0#1.base, kmalloc_~tmp___2~0#1.offset; {85118#false} is VALID [2022-02-20 21:52:15,513 INFO L290 TraceCheckUtils]: 90: Hoare triple {85118#false} ipheth_probe_#t~ret287#1.base, ipheth_probe_#t~ret287#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;ipheth_probe_~tmp___3~0#1.base, ipheth_probe_~tmp___3~0#1.offset := ipheth_probe_#t~ret287#1.base, ipheth_probe_#t~ret287#1.offset;havoc ipheth_probe_#t~ret287#1.base, ipheth_probe_#t~ret287#1.offset;call write~$Pointer$(ipheth_probe_~tmp___3~0#1.base, ipheth_probe_~tmp___3~0#1.offset, ipheth_probe_~dev~8#1.base, 64 + ipheth_probe_~dev~8#1.offset, 8);call ipheth_probe_#t~mem288#1.base, ipheth_probe_#t~mem288#1.offset := read~$Pointer$(ipheth_probe_~dev~8#1.base, 64 + ipheth_probe_~dev~8#1.offset, 8); {85118#false} is VALID [2022-02-20 21:52:15,513 INFO L290 TraceCheckUtils]: 91: Hoare triple {85118#false} assume !(0 == (ipheth_probe_#t~mem288#1.base + ipheth_probe_#t~mem288#1.offset) % 18446744073709551616);havoc ipheth_probe_#t~mem288#1.base, ipheth_probe_#t~mem288#1.offset;assume { :begin_inline_ipheth_get_macaddr } true;ipheth_get_macaddr_#in~dev#1.base, ipheth_get_macaddr_#in~dev#1.offset := ipheth_probe_~dev~8#1.base, ipheth_probe_~dev~8#1.offset;havoc ipheth_get_macaddr_#res#1;havoc ipheth_get_macaddr_#t~mem185#1.base, ipheth_get_macaddr_#t~mem185#1.offset, ipheth_get_macaddr_#t~mem186#1.base, ipheth_get_macaddr_#t~mem186#1.offset, ipheth_get_macaddr_#t~ret187#1, ipheth_get_macaddr_#t~mem188#1.base, ipheth_get_macaddr_#t~mem188#1.offset, ipheth_get_macaddr_#t~ret189#1, ipheth_get_macaddr_#t~nondet190#1, ipheth_get_macaddr_#t~mem191#1.base, ipheth_get_macaddr_#t~mem191#1.offset, ipheth_get_macaddr_#t~nondet192#1, ipheth_get_macaddr_#t~mem193#1.base, ipheth_get_macaddr_#t~mem193#1.offset, ipheth_get_macaddr_#t~mem194#1.base, ipheth_get_macaddr_#t~mem194#1.offset, ipheth_get_macaddr_#t~mem195#1.base, ipheth_get_macaddr_#t~mem195#1.offset, ipheth_get_macaddr_#t~memcpy~res196#1.base, ipheth_get_macaddr_#t~memcpy~res196#1.offset, ipheth_get_macaddr_#t~mem197#1.base, ipheth_get_macaddr_#t~mem197#1.offset, ipheth_get_macaddr_#t~mem198#1.base, ipheth_get_macaddr_#t~mem198#1.offset, ipheth_get_macaddr_#t~memcpy~res199#1.base, ipheth_get_macaddr_#t~memcpy~res199#1.offset, ipheth_get_macaddr_~dev#1.base, ipheth_get_macaddr_~dev#1.offset, ipheth_get_macaddr_~udev~1#1.base, ipheth_get_macaddr_~udev~1#1.offset, ipheth_get_macaddr_~net~0#1.base, ipheth_get_macaddr_~net~0#1.offset, ipheth_get_macaddr_~retval~1#1, ipheth_get_macaddr_~tmp~19#1, ipheth_get_macaddr_~__len~1#1, ipheth_get_macaddr_~__ret~1#1.base, ipheth_get_macaddr_~__ret~1#1.offset;ipheth_get_macaddr_~dev#1.base, ipheth_get_macaddr_~dev#1.offset := ipheth_get_macaddr_#in~dev#1.base, ipheth_get_macaddr_#in~dev#1.offset;havoc ipheth_get_macaddr_~udev~1#1.base, ipheth_get_macaddr_~udev~1#1.offset;havoc ipheth_get_macaddr_~net~0#1.base, ipheth_get_macaddr_~net~0#1.offset;havoc ipheth_get_macaddr_~retval~1#1;havoc ipheth_get_macaddr_~tmp~19#1;havoc ipheth_get_macaddr_~__len~1#1;havoc ipheth_get_macaddr_~__ret~1#1.base, ipheth_get_macaddr_~__ret~1#1.offset;call ipheth_get_macaddr_#t~mem185#1.base, ipheth_get_macaddr_#t~mem185#1.offset := read~$Pointer$(ipheth_get_macaddr_~dev#1.base, ipheth_get_macaddr_~dev#1.offset, 8);ipheth_get_macaddr_~udev~1#1.base, ipheth_get_macaddr_~udev~1#1.offset := ipheth_get_macaddr_#t~mem185#1.base, ipheth_get_macaddr_#t~mem185#1.offset;havoc ipheth_get_macaddr_#t~mem185#1.base, ipheth_get_macaddr_#t~mem185#1.offset;call ipheth_get_macaddr_#t~mem186#1.base, ipheth_get_macaddr_#t~mem186#1.offset := read~$Pointer$(ipheth_get_macaddr_~dev#1.base, 16 + ipheth_get_macaddr_~dev#1.offset, 8);ipheth_get_macaddr_~net~0#1.base, ipheth_get_macaddr_~net~0#1.offset := ipheth_get_macaddr_#t~mem186#1.base, ipheth_get_macaddr_#t~mem186#1.offset;havoc ipheth_get_macaddr_#t~mem186#1.base, ipheth_get_macaddr_#t~mem186#1.offset; {85118#false} is VALID [2022-02-20 21:52:15,513 INFO L272 TraceCheckUtils]: 92: Hoare triple {85118#false} call ipheth_get_macaddr_#t~ret187#1 := __create_pipe(ipheth_get_macaddr_~udev~1#1.base, ipheth_get_macaddr_~udev~1#1.offset, 0); {85117#true} is VALID [2022-02-20 21:52:15,513 INFO L290 TraceCheckUtils]: 93: Hoare triple {85117#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;~endpoint := #in~endpoint;call #t~mem74 := read~int(~dev.base, ~dev.offset, 4);#res := (if (1 == 256 * #t~mem74 || 0 == 256 * #t~mem74) && 0 == 32768 * ~endpoint then 256 * #t~mem74 else (if 0 == 256 * #t~mem74 && (1 == 32768 * ~endpoint || 0 == 32768 * ~endpoint) then 32768 * ~endpoint else (if (1 == 256 * #t~mem74 && (1 == 32768 * ~endpoint || 0 == 32768 * ~endpoint)) || ((1 == 256 * #t~mem74 || 0 == 256 * #t~mem74) && 1 == 32768 * ~endpoint) then 1 else ~bitwiseOr(256 * #t~mem74, 32768 * ~endpoint))));havoc #t~mem74; {85117#true} is VALID [2022-02-20 21:52:15,513 INFO L290 TraceCheckUtils]: 94: Hoare triple {85117#true} assume true; {85117#true} is VALID [2022-02-20 21:52:15,513 INFO L284 TraceCheckUtils]: 95: Hoare quadruple {85117#true} {85118#false} #1225#return; {85118#false} is VALID [2022-02-20 21:52:15,513 INFO L290 TraceCheckUtils]: 96: Hoare triple {85118#false} ipheth_get_macaddr_~tmp~19#1 := ipheth_get_macaddr_#t~ret187#1;havoc ipheth_get_macaddr_#t~ret187#1;call ipheth_get_macaddr_#t~mem188#1.base, ipheth_get_macaddr_#t~mem188#1.offset := read~$Pointer$(ipheth_get_macaddr_~dev#1.base, 64 + ipheth_get_macaddr_~dev#1.offset, 8); {85118#false} is VALID [2022-02-20 21:52:15,514 INFO L272 TraceCheckUtils]: 97: Hoare triple {85118#false} call ipheth_get_macaddr_#t~ret189#1 := usb_control_msg(ipheth_get_macaddr_~udev~1#1.base, ipheth_get_macaddr_~udev~1#1.offset, ~bitwiseOr(ipheth_get_macaddr_~tmp~19#1, 2147483776), 0, 192, 0, 2, ipheth_get_macaddr_#t~mem188#1.base, ipheth_get_macaddr_#t~mem188#1.offset, 64, 1250); {85117#true} is VALID [2022-02-20 21:52:15,514 INFO L290 TraceCheckUtils]: 98: Hoare triple {85117#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1 := #in~arg1;~arg2 := #in~arg2;~arg3 := #in~arg3;~arg4 := #in~arg4;~arg5 := #in~arg5;~arg6.base, ~arg6.offset := #in~arg6.base, #in~arg6.offset;~arg7 := #in~arg7;~arg8 := #in~arg8;assume -2147483648 <= #t~nondet364 && #t~nondet364 <= 2147483647;#res := #t~nondet364;havoc #t~nondet364; {85117#true} is VALID [2022-02-20 21:52:15,514 INFO L290 TraceCheckUtils]: 99: Hoare triple {85117#true} assume true; {85117#true} is VALID [2022-02-20 21:52:15,514 INFO L284 TraceCheckUtils]: 100: Hoare quadruple {85117#true} {85118#false} #1227#return; {85118#false} is VALID [2022-02-20 21:52:15,514 INFO L290 TraceCheckUtils]: 101: Hoare triple {85118#false} assume -2147483648 <= ipheth_get_macaddr_#t~ret189#1 && ipheth_get_macaddr_#t~ret189#1 <= 2147483647;ipheth_get_macaddr_~retval~1#1 := ipheth_get_macaddr_#t~ret189#1;havoc ipheth_get_macaddr_#t~mem188#1.base, ipheth_get_macaddr_#t~mem188#1.offset;havoc ipheth_get_macaddr_#t~ret189#1; {85118#false} is VALID [2022-02-20 21:52:15,514 INFO L290 TraceCheckUtils]: 102: Hoare triple {85118#false} assume ipheth_get_macaddr_~retval~1#1 < 0;havoc ipheth_get_macaddr_#t~nondet190#1;call ipheth_get_macaddr_#t~mem191#1.base, ipheth_get_macaddr_#t~mem191#1.offset := read~$Pointer$(ipheth_get_macaddr_~dev#1.base, 8 + ipheth_get_macaddr_~dev#1.offset, 8);havoc ipheth_get_macaddr_#t~mem191#1.base, ipheth_get_macaddr_#t~mem191#1.offset; {85118#false} is VALID [2022-02-20 21:52:15,514 INFO L290 TraceCheckUtils]: 103: Hoare triple {85118#false} ipheth_get_macaddr_#res#1 := ipheth_get_macaddr_~retval~1#1; {85118#false} is VALID [2022-02-20 21:52:15,514 INFO L290 TraceCheckUtils]: 104: Hoare triple {85118#false} ipheth_probe_#t~ret289#1 := ipheth_get_macaddr_#res#1;assume { :end_inline_ipheth_get_macaddr } true;assume -2147483648 <= ipheth_probe_#t~ret289#1 && ipheth_probe_#t~ret289#1 <= 2147483647;ipheth_probe_~retval~5#1 := ipheth_probe_#t~ret289#1;havoc ipheth_probe_#t~ret289#1; {85118#false} is VALID [2022-02-20 21:52:15,514 INFO L290 TraceCheckUtils]: 105: Hoare triple {85118#false} assume !(0 != ipheth_probe_~retval~5#1);assume { :begin_inline___init_work } true;__init_work_#in~arg0#1.base, __init_work_#in~arg0#1.offset, __init_work_#in~arg1#1 := ipheth_probe_~dev~8#1.base, 74 + ipheth_probe_~dev~8#1.offset, 0;havoc __init_work_~arg0#1.base, __init_work_~arg0#1.offset, __init_work_~arg1#1;__init_work_~arg0#1.base, __init_work_~arg0#1.offset := __init_work_#in~arg0#1.base, __init_work_#in~arg0#1.offset;__init_work_~arg1#1 := __init_work_#in~arg1#1; {85118#false} is VALID [2022-02-20 21:52:15,515 INFO L290 TraceCheckUtils]: 106: Hoare triple {85118#false} assume { :end_inline___init_work } true;call write~int(137438953408, ipheth_probe_~#__constr_expr_0~0#1.base, ipheth_probe_~#__constr_expr_0~0#1.offset, 8);call ipheth_probe_#t~mem290#1 := read~int(ipheth_probe_~#__constr_expr_0~0#1.base, ipheth_probe_~#__constr_expr_0~0#1.offset, 8);call write~int(ipheth_probe_#t~mem290#1, ipheth_probe_~dev~8#1.base, 74 + ipheth_probe_~dev~8#1.offset, 8);havoc ipheth_probe_#t~mem290#1;assume { :begin_inline_lockdep_init_map } true;lockdep_init_map_#in~arg0#1.base, lockdep_init_map_#in~arg0#1.offset, lockdep_init_map_#in~arg1#1.base, lockdep_init_map_#in~arg1#1.offset, lockdep_init_map_#in~arg2#1.base, lockdep_init_map_#in~arg2#1.offset, lockdep_init_map_#in~arg3#1 := ipheth_probe_~dev~8#1.base, 106 + ipheth_probe_~dev~8#1.offset, 29, 0, ipheth_probe_~#__key~0#1.base, ipheth_probe_~#__key~0#1.offset, 0;havoc lockdep_init_map_~arg0#1.base, lockdep_init_map_~arg0#1.offset, lockdep_init_map_~arg1#1.base, lockdep_init_map_~arg1#1.offset, lockdep_init_map_~arg2#1.base, lockdep_init_map_~arg2#1.offset, lockdep_init_map_~arg3#1;lockdep_init_map_~arg0#1.base, lockdep_init_map_~arg0#1.offset := lockdep_init_map_#in~arg0#1.base, lockdep_init_map_#in~arg0#1.offset;lockdep_init_map_~arg1#1.base, lockdep_init_map_~arg1#1.offset := lockdep_init_map_#in~arg1#1.base, lockdep_init_map_#in~arg1#1.offset;lockdep_init_map_~arg2#1.base, lockdep_init_map_~arg2#1.offset := lockdep_init_map_#in~arg2#1.base, lockdep_init_map_#in~arg2#1.offset;lockdep_init_map_~arg3#1 := lockdep_init_map_#in~arg3#1; {85118#false} is VALID [2022-02-20 21:52:15,515 INFO L290 TraceCheckUtils]: 107: Hoare triple {85118#false} assume { :end_inline_lockdep_init_map } true;assume { :begin_inline_INIT_LIST_HEAD } true;INIT_LIST_HEAD_#in~list#1.base, INIT_LIST_HEAD_#in~list#1.offset := ipheth_probe_~dev~8#1.base, 82 + ipheth_probe_~dev~8#1.offset;havoc INIT_LIST_HEAD_~list#1.base, INIT_LIST_HEAD_~list#1.offset;INIT_LIST_HEAD_~list#1.base, INIT_LIST_HEAD_~list#1.offset := INIT_LIST_HEAD_#in~list#1.base, INIT_LIST_HEAD_#in~list#1.offset;call write~$Pointer$(INIT_LIST_HEAD_~list#1.base, INIT_LIST_HEAD_~list#1.offset, INIT_LIST_HEAD_~list#1.base, INIT_LIST_HEAD_~list#1.offset, 8);call write~$Pointer$(INIT_LIST_HEAD_~list#1.base, INIT_LIST_HEAD_~list#1.offset, INIT_LIST_HEAD_~list#1.base, 8 + INIT_LIST_HEAD_~list#1.offset, 8); {85118#false} is VALID [2022-02-20 21:52:15,515 INFO L290 TraceCheckUtils]: 108: Hoare triple {85118#false} assume { :end_inline_INIT_LIST_HEAD } true;call write~$Pointer$(#funAddr~ipheth_carrier_check_work.base, #funAddr~ipheth_carrier_check_work.offset, ipheth_probe_~dev~8#1.base, 98 + ipheth_probe_~dev~8#1.offset, 8);assume { :begin_inline_init_timer_key } true;init_timer_key_#in~arg0#1.base, init_timer_key_#in~arg0#1.offset, init_timer_key_#in~arg1#1, init_timer_key_#in~arg2#1.base, init_timer_key_#in~arg2#1.offset, init_timer_key_#in~arg3#1.base, init_timer_key_#in~arg3#1.offset := ipheth_probe_~dev~8#1.base, 150 + ipheth_probe_~dev~8#1.offset, 2, 30, 0, ipheth_probe_~#__key___0~0#1.base, ipheth_probe_~#__key___0~0#1.offset;havoc init_timer_key_~arg0#1.base, init_timer_key_~arg0#1.offset, init_timer_key_~arg1#1, init_timer_key_~arg2#1.base, init_timer_key_~arg2#1.offset, init_timer_key_~arg3#1.base, init_timer_key_~arg3#1.offset;init_timer_key_~arg0#1.base, init_timer_key_~arg0#1.offset := init_timer_key_#in~arg0#1.base, init_timer_key_#in~arg0#1.offset;init_timer_key_~arg1#1 := init_timer_key_#in~arg1#1;init_timer_key_~arg2#1.base, init_timer_key_~arg2#1.offset := init_timer_key_#in~arg2#1.base, init_timer_key_#in~arg2#1.offset;init_timer_key_~arg3#1.base, init_timer_key_~arg3#1.offset := init_timer_key_#in~arg3#1.base, init_timer_key_#in~arg3#1.offset; {85118#false} is VALID [2022-02-20 21:52:15,515 INFO L290 TraceCheckUtils]: 109: Hoare triple {85118#false} assume { :end_inline_init_timer_key } true;call write~$Pointer$(#funAddr~delayed_work_timer_fn.base, #funAddr~delayed_work_timer_fn.offset, ipheth_probe_~dev~8#1.base, 182 + ipheth_probe_~dev~8#1.offset, 8);call write~int(ipheth_probe_~dev~8#1.base + (74 + ipheth_probe_~dev~8#1.offset), ipheth_probe_~dev~8#1.base, 190 + ipheth_probe_~dev~8#1.offset, 8);assume { :begin_inline_ipheth_alloc_urbs } true;ipheth_alloc_urbs_#in~iphone#1.base, ipheth_alloc_urbs_#in~iphone#1.offset := ipheth_probe_~dev~8#1.base, ipheth_probe_~dev~8#1.offset;havoc ipheth_alloc_urbs_#res#1;havoc ipheth_alloc_urbs_#t~ret116#1.base, ipheth_alloc_urbs_#t~ret116#1.offset, ipheth_alloc_urbs_#t~ret117#1.base, ipheth_alloc_urbs_#t~ret117#1.offset, ipheth_alloc_urbs_#t~mem118#1.base, ipheth_alloc_urbs_#t~mem118#1.offset, ipheth_alloc_urbs_#t~ret119#1.base, ipheth_alloc_urbs_#t~ret119#1.offset, ipheth_alloc_urbs_#t~mem120#1.base, ipheth_alloc_urbs_#t~mem120#1.offset, ipheth_alloc_urbs_#t~ret121#1.base, ipheth_alloc_urbs_#t~ret121#1.offset, ipheth_alloc_urbs_#t~mem122#1.base, ipheth_alloc_urbs_#t~mem122#1.offset, ipheth_alloc_urbs_#t~mem123#1, ipheth_alloc_urbs_~iphone#1.base, ipheth_alloc_urbs_~iphone#1.offset, ipheth_alloc_urbs_~tx_urb~0#1.base, ipheth_alloc_urbs_~tx_urb~0#1.offset, ipheth_alloc_urbs_~rx_urb~0#1.base, ipheth_alloc_urbs_~rx_urb~0#1.offset, ipheth_alloc_urbs_~tx_buf~0#1.base, ipheth_alloc_urbs_~tx_buf~0#1.offset, ipheth_alloc_urbs_~rx_buf~0#1.base, ipheth_alloc_urbs_~rx_buf~0#1.offset, ipheth_alloc_urbs_~tmp~16#1.base, ipheth_alloc_urbs_~tmp~16#1.offset, ipheth_alloc_urbs_~tmp___0~6#1.base, ipheth_alloc_urbs_~tmp___0~6#1.offset;ipheth_alloc_urbs_~iphone#1.base, ipheth_alloc_urbs_~iphone#1.offset := ipheth_alloc_urbs_#in~iphone#1.base, ipheth_alloc_urbs_#in~iphone#1.offset;havoc ipheth_alloc_urbs_~tx_urb~0#1.base, ipheth_alloc_urbs_~tx_urb~0#1.offset;havoc ipheth_alloc_urbs_~rx_urb~0#1.base, ipheth_alloc_urbs_~rx_urb~0#1.offset;havoc ipheth_alloc_urbs_~tx_buf~0#1.base, ipheth_alloc_urbs_~tx_buf~0#1.offset;havoc ipheth_alloc_urbs_~rx_buf~0#1.base, ipheth_alloc_urbs_~rx_buf~0#1.offset;havoc ipheth_alloc_urbs_~tmp~16#1.base, ipheth_alloc_urbs_~tmp~16#1.offset;havoc ipheth_alloc_urbs_~tmp___0~6#1.base, ipheth_alloc_urbs_~tmp___0~6#1.offset;ipheth_alloc_urbs_~tx_urb~0#1.base, ipheth_alloc_urbs_~tx_urb~0#1.offset := 0, 0;ipheth_alloc_urbs_~rx_urb~0#1.base, ipheth_alloc_urbs_~rx_urb~0#1.offset := 0, 0;ipheth_alloc_urbs_~tx_buf~0#1.base, ipheth_alloc_urbs_~tx_buf~0#1.offset := 0, 0;ipheth_alloc_urbs_~rx_buf~0#1.base, ipheth_alloc_urbs_~rx_buf~0#1.offset := 0, 0;assume { :begin_inline_ldv_usb_alloc_urb_2 } true;ldv_usb_alloc_urb_2_#in~iso_packets#1, ldv_usb_alloc_urb_2_#in~mem_flags#1 := 0, 208;havoc ldv_usb_alloc_urb_2_#res#1.base, ldv_usb_alloc_urb_2_#res#1.offset;havoc ldv_usb_alloc_urb_2_#t~ret327#1.base, ldv_usb_alloc_urb_2_#t~ret327#1.offset, ldv_usb_alloc_urb_2_~iso_packets#1, ldv_usb_alloc_urb_2_~mem_flags#1, ldv_usb_alloc_urb_2_~tmp~33#1.base, ldv_usb_alloc_urb_2_~tmp~33#1.offset;ldv_usb_alloc_urb_2_~iso_packets#1 := ldv_usb_alloc_urb_2_#in~iso_packets#1;ldv_usb_alloc_urb_2_~mem_flags#1 := ldv_usb_alloc_urb_2_#in~mem_flags#1;havoc ldv_usb_alloc_urb_2_~tmp~33#1.base, ldv_usb_alloc_urb_2_~tmp~33#1.offset; {85118#false} is VALID [2022-02-20 21:52:15,515 INFO L272 TraceCheckUtils]: 110: Hoare triple {85118#false} call ldv_usb_alloc_urb_2_#t~ret327#1.base, ldv_usb_alloc_urb_2_#t~ret327#1.offset := ldv_alloc_urb(); {85186#(and (= |old(#length)| |#length|) (= ~usb_urb~0.base |old(~usb_urb~0.base)|) (= ~usb_urb~0.offset |old(~usb_urb~0.offset)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:15,515 INFO L290 TraceCheckUtils]: 111: Hoare triple {85186#(and (= |old(#length)| |#length|) (= ~usb_urb~0.base |old(~usb_urb~0.base)|) (= ~usb_urb~0.offset |old(~usb_urb~0.offset)|) (= |old(#valid)| |#valid|))} havoc ~value~0.base, ~value~0.offset;havoc ~tmp~40.base, ~tmp~40.offset;havoc ~tmp___0~13; {85117#true} is VALID [2022-02-20 21:52:15,516 INFO L272 TraceCheckUtils]: 112: Hoare triple {85117#true} call #t~ret334.base, #t~ret334.offset := ldv_malloc(184); {85185#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:15,516 INFO L290 TraceCheckUtils]: 113: Hoare triple {85185#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet79 && #t~nondet79 <= 2147483647;~tmp___0~2 := #t~nondet79;havoc #t~nondet79; {85117#true} is VALID [2022-02-20 21:52:15,516 INFO L290 TraceCheckUtils]: 114: Hoare triple {85117#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {85117#true} is VALID [2022-02-20 21:52:15,516 INFO L290 TraceCheckUtils]: 115: Hoare triple {85117#true} assume true; {85117#true} is VALID [2022-02-20 21:52:15,516 INFO L284 TraceCheckUtils]: 116: Hoare quadruple {85117#true} {85117#true} #1173#return; {85117#true} is VALID [2022-02-20 21:52:15,516 INFO L290 TraceCheckUtils]: 117: Hoare triple {85117#true} ~tmp~40.base, ~tmp~40.offset := #t~ret334.base, #t~ret334.offset;havoc #t~ret334.base, #t~ret334.offset;~value~0.base, ~value~0.offset := ~tmp~40.base, ~tmp~40.offset; {85117#true} is VALID [2022-02-20 21:52:15,517 INFO L272 TraceCheckUtils]: 118: Hoare triple {85117#true} call #t~ret335 := ldv_undef_int(); {85117#true} is VALID [2022-02-20 21:52:15,517 INFO L290 TraceCheckUtils]: 119: Hoare triple {85117#true} havoc ~tmp~6;assume -2147483648 <= #t~nondet83 && #t~nondet83 <= 2147483647;~tmp~6 := #t~nondet83;havoc #t~nondet83;#res := ~tmp~6; {85117#true} is VALID [2022-02-20 21:52:15,517 INFO L290 TraceCheckUtils]: 120: Hoare triple {85117#true} assume true; {85117#true} is VALID [2022-02-20 21:52:15,517 INFO L284 TraceCheckUtils]: 121: Hoare quadruple {85117#true} {85117#true} #1175#return; {85117#true} is VALID [2022-02-20 21:52:15,517 INFO L290 TraceCheckUtils]: 122: Hoare triple {85117#true} assume -2147483648 <= #t~ret335 && #t~ret335 <= 2147483647;~tmp___0~13 := #t~ret335;havoc #t~ret335; {85117#true} is VALID [2022-02-20 21:52:15,517 INFO L290 TraceCheckUtils]: 123: Hoare triple {85117#true} assume 0 != ~tmp___0~13; {85117#true} is VALID [2022-02-20 21:52:15,517 INFO L290 TraceCheckUtils]: 124: Hoare triple {85117#true} assume 0 != (~value~0.base + ~value~0.offset) % 18446744073709551616;~usb_urb~0.base, ~usb_urb~0.offset := ~value~0.base, ~value~0.offset; {85117#true} is VALID [2022-02-20 21:52:15,517 INFO L290 TraceCheckUtils]: 125: Hoare triple {85117#true} #res.base, #res.offset := ~usb_urb~0.base, ~usb_urb~0.offset; {85117#true} is VALID [2022-02-20 21:52:15,517 INFO L290 TraceCheckUtils]: 126: Hoare triple {85117#true} assume true; {85117#true} is VALID [2022-02-20 21:52:15,518 INFO L284 TraceCheckUtils]: 127: Hoare quadruple {85117#true} {85118#false} #1233#return; {85118#false} is VALID [2022-02-20 21:52:15,518 INFO L290 TraceCheckUtils]: 128: Hoare triple {85118#false} ldv_usb_alloc_urb_2_~tmp~33#1.base, ldv_usb_alloc_urb_2_~tmp~33#1.offset := ldv_usb_alloc_urb_2_#t~ret327#1.base, ldv_usb_alloc_urb_2_#t~ret327#1.offset;havoc ldv_usb_alloc_urb_2_#t~ret327#1.base, ldv_usb_alloc_urb_2_#t~ret327#1.offset;ldv_usb_alloc_urb_2_#res#1.base, ldv_usb_alloc_urb_2_#res#1.offset := ldv_usb_alloc_urb_2_~tmp~33#1.base, ldv_usb_alloc_urb_2_~tmp~33#1.offset; {85118#false} is VALID [2022-02-20 21:52:15,518 INFO L290 TraceCheckUtils]: 129: Hoare triple {85118#false} ipheth_alloc_urbs_#t~ret116#1.base, ipheth_alloc_urbs_#t~ret116#1.offset := ldv_usb_alloc_urb_2_#res#1.base, ldv_usb_alloc_urb_2_#res#1.offset;assume { :end_inline_ldv_usb_alloc_urb_2 } true;ipheth_alloc_urbs_~tx_urb~0#1.base, ipheth_alloc_urbs_~tx_urb~0#1.offset := ipheth_alloc_urbs_#t~ret116#1.base, ipheth_alloc_urbs_#t~ret116#1.offset;havoc ipheth_alloc_urbs_#t~ret116#1.base, ipheth_alloc_urbs_#t~ret116#1.offset; {85118#false} is VALID [2022-02-20 21:52:15,518 INFO L290 TraceCheckUtils]: 130: Hoare triple {85118#false} assume 0 == (ipheth_alloc_urbs_~tx_urb~0#1.base + ipheth_alloc_urbs_~tx_urb~0#1.offset) % 18446744073709551616; {85118#false} is VALID [2022-02-20 21:52:15,518 INFO L290 TraceCheckUtils]: 131: Hoare triple {85118#false} ipheth_alloc_urbs_#res#1 := -12; {85118#false} is VALID [2022-02-20 21:52:15,518 INFO L290 TraceCheckUtils]: 132: Hoare triple {85118#false} ipheth_probe_#t~ret291#1 := ipheth_alloc_urbs_#res#1;assume { :end_inline_ipheth_alloc_urbs } true;assume -2147483648 <= ipheth_probe_#t~ret291#1 && ipheth_probe_#t~ret291#1 <= 2147483647;ipheth_probe_~retval~5#1 := ipheth_probe_#t~ret291#1;havoc ipheth_probe_#t~ret291#1; {85118#false} is VALID [2022-02-20 21:52:15,518 INFO L290 TraceCheckUtils]: 133: Hoare triple {85118#false} assume 0 != ipheth_probe_~retval~5#1;havoc ipheth_probe_#t~nondet292#1; {85118#false} is VALID [2022-02-20 21:52:15,518 INFO L290 TraceCheckUtils]: 134: Hoare triple {85118#false} call ipheth_probe_#t~mem296#1.base, ipheth_probe_#t~mem296#1.offset := read~$Pointer$(ipheth_probe_~dev~8#1.base, 64 + ipheth_probe_~dev~8#1.offset, 8); {85118#false} is VALID [2022-02-20 21:52:15,519 INFO L272 TraceCheckUtils]: 135: Hoare triple {85118#false} call kfree(ipheth_probe_#t~mem296#1.base, ipheth_probe_#t~mem296#1.offset); {85194#(= |old(#valid)| |#valid|)} is VALID [2022-02-20 21:52:15,519 INFO L290 TraceCheckUtils]: 136: Hoare triple {85194#(= |old(#valid)| |#valid|)} ~p.base, ~p.offset := #in~p.base, #in~p.offset;call ULTIMATE.dealloc(~p.base, ~p.offset); {85117#true} is VALID [2022-02-20 21:52:15,519 INFO L290 TraceCheckUtils]: 137: Hoare triple {85117#true} assume true; {85117#true} is VALID [2022-02-20 21:52:15,519 INFO L284 TraceCheckUtils]: 138: Hoare quadruple {85117#true} {85118#false} #1253#return; {85118#false} is VALID [2022-02-20 21:52:15,519 INFO L290 TraceCheckUtils]: 139: Hoare triple {85118#false} havoc ipheth_probe_#t~mem296#1.base, ipheth_probe_#t~mem296#1.offset; {85118#false} is VALID [2022-02-20 21:52:15,519 INFO L290 TraceCheckUtils]: 140: Hoare triple {85118#false} assume { :begin_inline_ldv_free_netdev_14 } true;ldv_free_netdev_14_#in~dev#1.base, ldv_free_netdev_14_#in~dev#1.offset := ipheth_probe_~netdev~0#1.base, ipheth_probe_~netdev~0#1.offset;havoc ldv_free_netdev_14_~dev#1.base, ldv_free_netdev_14_~dev#1.offset;ldv_free_netdev_14_~dev#1.base, ldv_free_netdev_14_~dev#1.offset := ldv_free_netdev_14_#in~dev#1.base, ldv_free_netdev_14_#in~dev#1.offset; {85118#false} is VALID [2022-02-20 21:52:15,519 INFO L272 TraceCheckUtils]: 141: Hoare triple {85118#false} call free_netdev(ldv_free_netdev_14_~dev#1.base, ldv_free_netdev_14_~dev#1.offset); {85117#true} is VALID [2022-02-20 21:52:15,519 INFO L290 TraceCheckUtils]: 142: Hoare triple {85117#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset; {85117#true} is VALID [2022-02-20 21:52:15,519 INFO L290 TraceCheckUtils]: 143: Hoare triple {85117#true} assume true; {85117#true} is VALID [2022-02-20 21:52:15,520 INFO L284 TraceCheckUtils]: 144: Hoare quadruple {85117#true} {85118#false} #1255#return; {85118#false} is VALID [2022-02-20 21:52:15,520 INFO L290 TraceCheckUtils]: 145: Hoare triple {85118#false} ~ldv_state_variable_2~0 := 0; {85118#false} is VALID [2022-02-20 21:52:15,520 INFO L290 TraceCheckUtils]: 146: Hoare triple {85118#false} assume { :end_inline_ldv_free_netdev_14 } true;ipheth_probe_#res#1 := ipheth_probe_~retval~5#1;call ULTIMATE.dealloc(ipheth_probe_~#__key~0#1.base, ipheth_probe_~#__key~0#1.offset);havoc ipheth_probe_~#__key~0#1.base, ipheth_probe_~#__key~0#1.offset;call ULTIMATE.dealloc(ipheth_probe_~#__constr_expr_0~0#1.base, ipheth_probe_~#__constr_expr_0~0#1.offset);havoc ipheth_probe_~#__constr_expr_0~0#1.base, ipheth_probe_~#__constr_expr_0~0#1.offset;call ULTIMATE.dealloc(ipheth_probe_~#__key___0~0#1.base, ipheth_probe_~#__key___0~0#1.offset);havoc ipheth_probe_~#__key___0~0#1.base, ipheth_probe_~#__key___0~0#1.offset; {85118#false} is VALID [2022-02-20 21:52:15,520 INFO L290 TraceCheckUtils]: 147: Hoare triple {85118#false} main_#t~ret312#1 := ipheth_probe_#res#1;assume { :end_inline_ipheth_probe } true;assume -2147483648 <= main_#t~ret312#1 && main_#t~ret312#1 <= 2147483647;~ldv_retval_0~0 := main_#t~ret312#1;havoc main_#t~ret312#1; {85118#false} is VALID [2022-02-20 21:52:15,520 INFO L290 TraceCheckUtils]: 148: Hoare triple {85118#false} assume 0 == ~ldv_retval_0~0;~ldv_state_variable_1~0 := 2;~ref_cnt~0 := 1 + ~ref_cnt~0; {85118#false} is VALID [2022-02-20 21:52:15,520 INFO L290 TraceCheckUtils]: 149: Hoare triple {85118#false} assume -2147483648 <= main_#t~nondet308#1 && main_#t~nondet308#1 <= 2147483647;main_~tmp___2~2#1 := main_#t~nondet308#1;havoc main_#t~nondet308#1;main_#t~switch309#1 := 0 == main_~tmp___2~2#1; {85118#false} is VALID [2022-02-20 21:52:15,520 INFO L290 TraceCheckUtils]: 150: Hoare triple {85118#false} assume !main_#t~switch309#1;main_#t~switch309#1 := main_#t~switch309#1 || 1 == main_~tmp___2~2#1; {85118#false} is VALID [2022-02-20 21:52:15,520 INFO L290 TraceCheckUtils]: 151: Hoare triple {85118#false} assume main_#t~switch309#1; {85118#false} is VALID [2022-02-20 21:52:15,521 INFO L290 TraceCheckUtils]: 152: Hoare triple {85118#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet313#1 && main_#t~nondet313#1 <= 2147483647;main_~tmp___4~0#1 := main_#t~nondet313#1;havoc main_#t~nondet313#1;main_#t~switch314#1 := 0 == main_~tmp___4~0#1; {85118#false} is VALID [2022-02-20 21:52:15,521 INFO L290 TraceCheckUtils]: 153: Hoare triple {85118#false} assume main_#t~switch314#1; {85118#false} is VALID [2022-02-20 21:52:15,521 INFO L290 TraceCheckUtils]: 154: Hoare triple {85118#false} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0;assume { :begin_inline_ipheth_driver_exit } true;assume { :begin_inline_ldv_usb_deregister_20 } true;ldv_usb_deregister_20_#in~arg#1.base, ldv_usb_deregister_20_#in~arg#1.offset := ~#ipheth_driver~0.base, ~#ipheth_driver~0.offset;havoc ldv_usb_deregister_20_~arg#1.base, ldv_usb_deregister_20_~arg#1.offset;ldv_usb_deregister_20_~arg#1.base, ldv_usb_deregister_20_~arg#1.offset := ldv_usb_deregister_20_#in~arg#1.base, ldv_usb_deregister_20_#in~arg#1.offset;assume { :begin_inline_usb_deregister } true;usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset := ldv_usb_deregister_20_~arg#1.base, ldv_usb_deregister_20_~arg#1.offset;havoc usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset;usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset := usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset; {85118#false} is VALID [2022-02-20 21:52:15,521 INFO L290 TraceCheckUtils]: 155: Hoare triple {85118#false} assume { :end_inline_usb_deregister } true;~ldv_state_variable_1~0 := 0; {85118#false} is VALID [2022-02-20 21:52:15,521 INFO L290 TraceCheckUtils]: 156: Hoare triple {85118#false} assume { :end_inline_ldv_usb_deregister_20 } true; {85118#false} is VALID [2022-02-20 21:52:15,521 INFO L290 TraceCheckUtils]: 157: Hoare triple {85118#false} assume { :end_inline_ipheth_driver_exit } true;~ldv_state_variable_0~0 := 2; {85118#false} is VALID [2022-02-20 21:52:15,521 INFO L290 TraceCheckUtils]: 158: Hoare triple {85118#false} assume { :begin_inline_ldv_check_final_state } true; {85118#false} is VALID [2022-02-20 21:52:15,521 INFO L290 TraceCheckUtils]: 159: Hoare triple {85118#false} assume !(0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616); {85118#false} is VALID [2022-02-20 21:52:15,522 INFO L272 TraceCheckUtils]: 160: Hoare triple {85118#false} call ldv_error(); {85118#false} is VALID [2022-02-20 21:52:15,522 INFO L290 TraceCheckUtils]: 161: Hoare triple {85118#false} assume !false; {85118#false} is VALID [2022-02-20 21:52:15,522 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2022-02-20 21:52:15,522 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:52:15,522 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1677283532] [2022-02-20 21:52:15,522 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1677283532] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:52:15,523 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:52:15,523 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-02-20 21:52:15,523 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [295795876] [2022-02-20 21:52:15,523 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:52:15,523 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 15.285714285714286) internal successors, (107), 3 states have internal predecessors, (107), 2 states have call successors, (17), 6 states have call predecessors, (17), 1 states have return successors, (16), 2 states have call predecessors, (16), 2 states have call successors, (16) Word has length 162 [2022-02-20 21:52:15,524 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:52:15,524 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 15.285714285714286) internal successors, (107), 3 states have internal predecessors, (107), 2 states have call successors, (17), 6 states have call predecessors, (17), 1 states have return successors, (16), 2 states have call predecessors, (16), 2 states have call successors, (16) [2022-02-20 21:52:15,629 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 140 edges. 140 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:52:15,630 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-02-20 21:52:15,630 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:52:15,630 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-02-20 21:52:15,630 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2022-02-20 21:52:15,631 INFO L87 Difference]: Start difference. First operand 3516 states and 4670 transitions. Second operand has 7 states, 7 states have (on average 15.285714285714286) internal successors, (107), 3 states have internal predecessors, (107), 2 states have call successors, (17), 6 states have call predecessors, (17), 1 states have return successors, (16), 2 states have call predecessors, (16), 2 states have call successors, (16) [2022-02-20 21:52:21,594 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:52:21,595 INFO L93 Difference]: Finished difference Result 7416 states and 9930 transitions. [2022-02-20 21:52:21,595 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-02-20 21:52:21,595 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 15.285714285714286) internal successors, (107), 3 states have internal predecessors, (107), 2 states have call successors, (17), 6 states have call predecessors, (17), 1 states have return successors, (16), 2 states have call predecessors, (16), 2 states have call successors, (16) Word has length 162 [2022-02-20 21:52:21,596 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:52:21,596 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 15.285714285714286) internal successors, (107), 3 states have internal predecessors, (107), 2 states have call successors, (17), 6 states have call predecessors, (17), 1 states have return successors, (16), 2 states have call predecessors, (16), 2 states have call successors, (16) [2022-02-20 21:52:21,608 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 1458 transitions. [2022-02-20 21:52:21,608 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 15.285714285714286) internal successors, (107), 3 states have internal predecessors, (107), 2 states have call successors, (17), 6 states have call predecessors, (17), 1 states have return successors, (16), 2 states have call predecessors, (16), 2 states have call successors, (16) [2022-02-20 21:52:21,620 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 1458 transitions. [2022-02-20 21:52:21,620 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states and 1458 transitions. [2022-02-20 21:52:22,773 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 1458 edges. 1458 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:52:23,519 INFO L225 Difference]: With dead ends: 7416 [2022-02-20 21:52:23,520 INFO L226 Difference]: Without dead ends: 3916 [2022-02-20 21:52:23,526 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2022-02-20 21:52:23,527 INFO L933 BasicCegarLoop]: 617 mSDtfsCounter, 640 mSDsluCounter, 1062 mSDsCounter, 0 mSdLazyCounter, 537 mSolverCounterSat, 444 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 643 SdHoareTripleChecker+Valid, 1679 SdHoareTripleChecker+Invalid, 981 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 444 IncrementalHoareTripleChecker+Valid, 537 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2022-02-20 21:52:23,527 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [643 Valid, 1679 Invalid, 981 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [444 Valid, 537 Invalid, 0 Unknown, 0 Unchecked, 1.2s Time] [2022-02-20 21:52:23,529 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3916 states. [2022-02-20 21:52:23,641 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3916 to 3520. [2022-02-20 21:52:23,642 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:52:23,647 INFO L82 GeneralOperation]: Start isEquivalent. First operand 3916 states. Second operand has 3520 states, 2597 states have (on average 1.261070465922218) internal successors, (3275), 2655 states have internal predecessors, (3275), 625 states have call successors, (625), 258 states have call predecessors, (625), 297 states have return successors, (774), 626 states have call predecessors, (774), 624 states have call successors, (774) [2022-02-20 21:52:23,652 INFO L74 IsIncluded]: Start isIncluded. First operand 3916 states. Second operand has 3520 states, 2597 states have (on average 1.261070465922218) internal successors, (3275), 2655 states have internal predecessors, (3275), 625 states have call successors, (625), 258 states have call predecessors, (625), 297 states have return successors, (774), 626 states have call predecessors, (774), 624 states have call successors, (774) [2022-02-20 21:52:23,658 INFO L87 Difference]: Start difference. First operand 3916 states. Second operand has 3520 states, 2597 states have (on average 1.261070465922218) internal successors, (3275), 2655 states have internal predecessors, (3275), 625 states have call successors, (625), 258 states have call predecessors, (625), 297 states have return successors, (774), 626 states have call predecessors, (774), 624 states have call successors, (774) [2022-02-20 21:52:24,150 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:52:24,150 INFO L93 Difference]: Finished difference Result 3916 states and 5276 transitions. [2022-02-20 21:52:24,151 INFO L276 IsEmpty]: Start isEmpty. Operand 3916 states and 5276 transitions. [2022-02-20 21:52:24,156 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:52:24,156 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:52:24,161 INFO L74 IsIncluded]: Start isIncluded. First operand has 3520 states, 2597 states have (on average 1.261070465922218) internal successors, (3275), 2655 states have internal predecessors, (3275), 625 states have call successors, (625), 258 states have call predecessors, (625), 297 states have return successors, (774), 626 states have call predecessors, (774), 624 states have call successors, (774) Second operand 3916 states. [2022-02-20 21:52:24,165 INFO L87 Difference]: Start difference. First operand has 3520 states, 2597 states have (on average 1.261070465922218) internal successors, (3275), 2655 states have internal predecessors, (3275), 625 states have call successors, (625), 258 states have call predecessors, (625), 297 states have return successors, (774), 626 states have call predecessors, (774), 624 states have call successors, (774) Second operand 3916 states. [2022-02-20 21:52:24,674 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:52:24,675 INFO L93 Difference]: Finished difference Result 3916 states and 5276 transitions. [2022-02-20 21:52:24,675 INFO L276 IsEmpty]: Start isEmpty. Operand 3916 states and 5276 transitions. [2022-02-20 21:52:24,681 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:52:24,681 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:52:24,682 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:52:24,682 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:52:24,687 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3520 states, 2597 states have (on average 1.261070465922218) internal successors, (3275), 2655 states have internal predecessors, (3275), 625 states have call successors, (625), 258 states have call predecessors, (625), 297 states have return successors, (774), 626 states have call predecessors, (774), 624 states have call successors, (774) [2022-02-20 21:52:25,301 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3520 states to 3520 states and 4674 transitions. [2022-02-20 21:52:25,302 INFO L78 Accepts]: Start accepts. Automaton has 3520 states and 4674 transitions. Word has length 162 [2022-02-20 21:52:25,303 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:52:25,303 INFO L470 AbstractCegarLoop]: Abstraction has 3520 states and 4674 transitions. [2022-02-20 21:52:25,303 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 15.285714285714286) internal successors, (107), 3 states have internal predecessors, (107), 2 states have call successors, (17), 6 states have call predecessors, (17), 1 states have return successors, (16), 2 states have call predecessors, (16), 2 states have call successors, (16) [2022-02-20 21:52:25,303 INFO L276 IsEmpty]: Start isEmpty. Operand 3520 states and 4674 transitions. [2022-02-20 21:52:25,308 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 163 [2022-02-20 21:52:25,308 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:52:25,308 INFO L514 BasicCegarLoop]: trace histogram [5, 5, 5, 4, 4, 4, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:52:25,308 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2022-02-20 21:52:25,308 INFO L402 AbstractCegarLoop]: === Iteration 10 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:52:25,309 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:52:25,309 INFO L85 PathProgramCache]: Analyzing trace with hash -632519821, now seen corresponding path program 1 times [2022-02-20 21:52:25,309 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:52:25,309 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1869788899] [2022-02-20 21:52:25,310 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:52:25,310 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:52:25,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:25,490 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 21:52:25,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:25,498 INFO L290 TraceCheckUtils]: 0: Hoare triple {108496#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {108428#true} is VALID [2022-02-20 21:52:25,498 INFO L290 TraceCheckUtils]: 1: Hoare triple {108428#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {108428#true} is VALID [2022-02-20 21:52:25,498 INFO L290 TraceCheckUtils]: 2: Hoare triple {108428#true} assume true; {108428#true} is VALID [2022-02-20 21:52:25,498 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {108428#true} {108428#true} #1203#return; {108428#true} is VALID [2022-02-20 21:52:25,499 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-02-20 21:52:25,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:25,503 INFO L290 TraceCheckUtils]: 0: Hoare triple {108496#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {108428#true} is VALID [2022-02-20 21:52:25,504 INFO L290 TraceCheckUtils]: 1: Hoare triple {108428#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {108428#true} is VALID [2022-02-20 21:52:25,504 INFO L290 TraceCheckUtils]: 2: Hoare triple {108428#true} assume true; {108428#true} is VALID [2022-02-20 21:52:25,504 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {108428#true} {108428#true} #1205#return; {108428#true} is VALID [2022-02-20 21:52:25,505 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2022-02-20 21:52:25,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:25,510 INFO L290 TraceCheckUtils]: 0: Hoare triple {108496#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {108428#true} is VALID [2022-02-20 21:52:25,510 INFO L290 TraceCheckUtils]: 1: Hoare triple {108428#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {108428#true} is VALID [2022-02-20 21:52:25,511 INFO L290 TraceCheckUtils]: 2: Hoare triple {108428#true} assume true; {108428#true} is VALID [2022-02-20 21:52:25,511 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {108428#true} {108428#true} #1207#return; {108428#true} is VALID [2022-02-20 21:52:25,511 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 29 [2022-02-20 21:52:25,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:25,518 INFO L290 TraceCheckUtils]: 0: Hoare triple {108496#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {108428#true} is VALID [2022-02-20 21:52:25,518 INFO L290 TraceCheckUtils]: 1: Hoare triple {108428#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {108428#true} is VALID [2022-02-20 21:52:25,518 INFO L290 TraceCheckUtils]: 2: Hoare triple {108428#true} assume true; {108428#true} is VALID [2022-02-20 21:52:25,518 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {108428#true} {108442#(= ~ref_cnt~0 0)} #1261#return; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,523 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2022-02-20 21:52:25,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:25,530 INFO L290 TraceCheckUtils]: 0: Hoare triple {108497#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet79 && #t~nondet79 <= 2147483647;~tmp___0~2 := #t~nondet79;havoc #t~nondet79; {108428#true} is VALID [2022-02-20 21:52:25,530 INFO L290 TraceCheckUtils]: 1: Hoare triple {108428#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {108428#true} is VALID [2022-02-20 21:52:25,530 INFO L290 TraceCheckUtils]: 2: Hoare triple {108428#true} assume true; {108428#true} is VALID [2022-02-20 21:52:25,530 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {108428#true} {108442#(= ~ref_cnt~0 0)} #1209#return; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,530 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 55 [2022-02-20 21:52:25,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:25,537 INFO L290 TraceCheckUtils]: 0: Hoare triple {108497#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet79 && #t~nondet79 <= 2147483647;~tmp___0~2 := #t~nondet79;havoc #t~nondet79; {108428#true} is VALID [2022-02-20 21:52:25,538 INFO L290 TraceCheckUtils]: 1: Hoare triple {108428#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {108428#true} is VALID [2022-02-20 21:52:25,538 INFO L290 TraceCheckUtils]: 2: Hoare triple {108428#true} assume true; {108428#true} is VALID [2022-02-20 21:52:25,538 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {108428#true} {108442#(= ~ref_cnt~0 0)} #1213#return; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,538 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 66 [2022-02-20 21:52:25,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:25,543 INFO L290 TraceCheckUtils]: 0: Hoare triple {108428#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3136 + ~dev.offset; {108428#true} is VALID [2022-02-20 21:52:25,543 INFO L290 TraceCheckUtils]: 1: Hoare triple {108428#true} assume true; {108428#true} is VALID [2022-02-20 21:52:25,544 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {108428#true} {108442#(= ~ref_cnt~0 0)} #1215#return; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,544 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71 [2022-02-20 21:52:25,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:25,550 INFO L290 TraceCheckUtils]: 0: Hoare triple {108497#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet79 && #t~nondet79 <= 2147483647;~tmp___0~2 := #t~nondet79;havoc #t~nondet79; {108428#true} is VALID [2022-02-20 21:52:25,550 INFO L290 TraceCheckUtils]: 1: Hoare triple {108428#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {108428#true} is VALID [2022-02-20 21:52:25,550 INFO L290 TraceCheckUtils]: 2: Hoare triple {108428#true} assume true; {108428#true} is VALID [2022-02-20 21:52:25,551 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {108428#true} {108442#(= ~ref_cnt~0 0)} #1217#return; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,551 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 83 [2022-02-20 21:52:25,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:25,557 INFO L290 TraceCheckUtils]: 0: Hoare triple {108497#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet79 && #t~nondet79 <= 2147483647;~tmp___0~2 := #t~nondet79;havoc #t~nondet79; {108428#true} is VALID [2022-02-20 21:52:25,558 INFO L290 TraceCheckUtils]: 1: Hoare triple {108428#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {108428#true} is VALID [2022-02-20 21:52:25,558 INFO L290 TraceCheckUtils]: 2: Hoare triple {108428#true} assume true; {108428#true} is VALID [2022-02-20 21:52:25,558 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {108428#true} {108442#(= ~ref_cnt~0 0)} #1223#return; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,558 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 92 [2022-02-20 21:52:25,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:25,566 INFO L290 TraceCheckUtils]: 0: Hoare triple {108428#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;~endpoint := #in~endpoint;call #t~mem74 := read~int(~dev.base, ~dev.offset, 4);#res := (if (1 == 256 * #t~mem74 || 0 == 256 * #t~mem74) && 0 == 32768 * ~endpoint then 256 * #t~mem74 else (if 0 == 256 * #t~mem74 && (1 == 32768 * ~endpoint || 0 == 32768 * ~endpoint) then 32768 * ~endpoint else (if (1 == 256 * #t~mem74 && (1 == 32768 * ~endpoint || 0 == 32768 * ~endpoint)) || ((1 == 256 * #t~mem74 || 0 == 256 * #t~mem74) && 1 == 32768 * ~endpoint) then 1 else ~bitwiseOr(256 * #t~mem74, 32768 * ~endpoint))));havoc #t~mem74; {108428#true} is VALID [2022-02-20 21:52:25,566 INFO L290 TraceCheckUtils]: 1: Hoare triple {108428#true} assume true; {108428#true} is VALID [2022-02-20 21:52:25,567 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {108428#true} {108442#(= ~ref_cnt~0 0)} #1225#return; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,568 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 97 [2022-02-20 21:52:25,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:25,573 INFO L290 TraceCheckUtils]: 0: Hoare triple {108428#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1 := #in~arg1;~arg2 := #in~arg2;~arg3 := #in~arg3;~arg4 := #in~arg4;~arg5 := #in~arg5;~arg6.base, ~arg6.offset := #in~arg6.base, #in~arg6.offset;~arg7 := #in~arg7;~arg8 := #in~arg8;assume -2147483648 <= #t~nondet364 && #t~nondet364 <= 2147483647;#res := #t~nondet364;havoc #t~nondet364; {108428#true} is VALID [2022-02-20 21:52:25,573 INFO L290 TraceCheckUtils]: 1: Hoare triple {108428#true} assume true; {108428#true} is VALID [2022-02-20 21:52:25,574 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {108428#true} {108442#(= ~ref_cnt~0 0)} #1227#return; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,581 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 110 [2022-02-20 21:52:25,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:25,590 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 21:52:25,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:25,594 INFO L290 TraceCheckUtils]: 0: Hoare triple {108497#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet79 && #t~nondet79 <= 2147483647;~tmp___0~2 := #t~nondet79;havoc #t~nondet79; {108428#true} is VALID [2022-02-20 21:52:25,594 INFO L290 TraceCheckUtils]: 1: Hoare triple {108428#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {108428#true} is VALID [2022-02-20 21:52:25,594 INFO L290 TraceCheckUtils]: 2: Hoare triple {108428#true} assume true; {108428#true} is VALID [2022-02-20 21:52:25,594 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {108428#true} {108428#true} #1173#return; {108428#true} is VALID [2022-02-20 21:52:25,595 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 7 [2022-02-20 21:52:25,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:25,599 INFO L290 TraceCheckUtils]: 0: Hoare triple {108428#true} havoc ~tmp~6;assume -2147483648 <= #t~nondet83 && #t~nondet83 <= 2147483647;~tmp~6 := #t~nondet83;havoc #t~nondet83;#res := ~tmp~6; {108428#true} is VALID [2022-02-20 21:52:25,599 INFO L290 TraceCheckUtils]: 1: Hoare triple {108428#true} assume true; {108428#true} is VALID [2022-02-20 21:52:25,599 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {108428#true} {108428#true} #1175#return; {108428#true} is VALID [2022-02-20 21:52:25,599 INFO L290 TraceCheckUtils]: 0: Hoare triple {108498#(and (= |old(#length)| |#length|) (= ~usb_urb~0.base |old(~usb_urb~0.base)|) (= ~usb_urb~0.offset |old(~usb_urb~0.offset)|) (= |old(#valid)| |#valid|))} havoc ~value~0.base, ~value~0.offset;havoc ~tmp~40.base, ~tmp~40.offset;havoc ~tmp___0~13; {108428#true} is VALID [2022-02-20 21:52:25,599 INFO L272 TraceCheckUtils]: 1: Hoare triple {108428#true} call #t~ret334.base, #t~ret334.offset := ldv_malloc(184); {108497#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:25,599 INFO L290 TraceCheckUtils]: 2: Hoare triple {108497#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet79 && #t~nondet79 <= 2147483647;~tmp___0~2 := #t~nondet79;havoc #t~nondet79; {108428#true} is VALID [2022-02-20 21:52:25,599 INFO L290 TraceCheckUtils]: 3: Hoare triple {108428#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {108428#true} is VALID [2022-02-20 21:52:25,600 INFO L290 TraceCheckUtils]: 4: Hoare triple {108428#true} assume true; {108428#true} is VALID [2022-02-20 21:52:25,600 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {108428#true} {108428#true} #1173#return; {108428#true} is VALID [2022-02-20 21:52:25,600 INFO L290 TraceCheckUtils]: 6: Hoare triple {108428#true} ~tmp~40.base, ~tmp~40.offset := #t~ret334.base, #t~ret334.offset;havoc #t~ret334.base, #t~ret334.offset;~value~0.base, ~value~0.offset := ~tmp~40.base, ~tmp~40.offset; {108428#true} is VALID [2022-02-20 21:52:25,600 INFO L272 TraceCheckUtils]: 7: Hoare triple {108428#true} call #t~ret335 := ldv_undef_int(); {108428#true} is VALID [2022-02-20 21:52:25,600 INFO L290 TraceCheckUtils]: 8: Hoare triple {108428#true} havoc ~tmp~6;assume -2147483648 <= #t~nondet83 && #t~nondet83 <= 2147483647;~tmp~6 := #t~nondet83;havoc #t~nondet83;#res := ~tmp~6; {108428#true} is VALID [2022-02-20 21:52:25,600 INFO L290 TraceCheckUtils]: 9: Hoare triple {108428#true} assume true; {108428#true} is VALID [2022-02-20 21:52:25,600 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {108428#true} {108428#true} #1175#return; {108428#true} is VALID [2022-02-20 21:52:25,600 INFO L290 TraceCheckUtils]: 11: Hoare triple {108428#true} assume -2147483648 <= #t~ret335 && #t~ret335 <= 2147483647;~tmp___0~13 := #t~ret335;havoc #t~ret335; {108428#true} is VALID [2022-02-20 21:52:25,600 INFO L290 TraceCheckUtils]: 12: Hoare triple {108428#true} assume 0 != ~tmp___0~13; {108428#true} is VALID [2022-02-20 21:52:25,600 INFO L290 TraceCheckUtils]: 13: Hoare triple {108428#true} assume 0 != (~value~0.base + ~value~0.offset) % 18446744073709551616;~usb_urb~0.base, ~usb_urb~0.offset := ~value~0.base, ~value~0.offset; {108428#true} is VALID [2022-02-20 21:52:25,600 INFO L290 TraceCheckUtils]: 14: Hoare triple {108428#true} #res.base, #res.offset := ~usb_urb~0.base, ~usb_urb~0.offset; {108428#true} is VALID [2022-02-20 21:52:25,600 INFO L290 TraceCheckUtils]: 15: Hoare triple {108428#true} assume true; {108428#true} is VALID [2022-02-20 21:52:25,601 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {108428#true} {108442#(= ~ref_cnt~0 0)} #1233#return; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,606 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 135 [2022-02-20 21:52:25,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:25,611 INFO L290 TraceCheckUtils]: 0: Hoare triple {108506#(= |old(#valid)| |#valid|)} ~p.base, ~p.offset := #in~p.base, #in~p.offset;call ULTIMATE.dealloc(~p.base, ~p.offset); {108428#true} is VALID [2022-02-20 21:52:25,611 INFO L290 TraceCheckUtils]: 1: Hoare triple {108428#true} assume true; {108428#true} is VALID [2022-02-20 21:52:25,612 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {108428#true} {108442#(= ~ref_cnt~0 0)} #1253#return; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,612 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 141 [2022-02-20 21:52:25,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:25,616 INFO L290 TraceCheckUtils]: 0: Hoare triple {108428#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset; {108428#true} is VALID [2022-02-20 21:52:25,616 INFO L290 TraceCheckUtils]: 1: Hoare triple {108428#true} assume true; {108428#true} is VALID [2022-02-20 21:52:25,616 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {108428#true} {108442#(= ~ref_cnt~0 0)} #1255#return; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,616 INFO L290 TraceCheckUtils]: 0: Hoare triple {108428#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(80, 2);call #Ultimate.allocInit(26, 3);call #Ultimate.allocInit(63, 4);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(24, 6);call #Ultimate.allocInit(28, 7);call #Ultimate.allocInit(24, 8);call #Ultimate.allocInit(20, 9);call #Ultimate.allocInit(24, 10);call #Ultimate.allocInit(25, 11);call #Ultimate.allocInit(19, 12);call #Ultimate.allocInit(25, 13);call #Ultimate.allocInit(19, 14);call #Ultimate.allocInit(45, 15);call #Ultimate.allocInit(19, 16);call #Ultimate.allocInit(24, 17);call #Ultimate.allocInit(17, 18);call #Ultimate.allocInit(217, 19);call #Ultimate.allocInit(29, 20);call #Ultimate.allocInit(10, 21);call #Ultimate.allocInit(24, 22);call #Ultimate.allocInit(10, 23);call #Ultimate.allocInit(16, 24);call #Ultimate.allocInit(18, 25);call #Ultimate.allocInit(6, 26);call write~init~int(101, 26, 0, 1);call write~init~int(116, 26, 1, 1);call write~init~int(104, 26, 2, 1);call write~init~int(37, 26, 3, 1);call write~init~int(100, 26, 4, 1);call write~init~int(0, 26, 5, 1);call #Ultimate.allocInit(45, 27);call #Ultimate.allocInit(26, 28);call #Ultimate.allocInit(30, 29);call #Ultimate.allocInit(31, 30);call #Ultimate.allocInit(27, 31);call #Ultimate.allocInit(30, 32);call #Ultimate.allocInit(43, 33);call #Ultimate.allocInit(44, 34);call #Ultimate.allocInit(7, 35);call write~init~int(105, 35, 0, 1);call write~init~int(112, 35, 1, 1);call write~init~int(104, 35, 2, 1);call write~init~int(101, 35, 3, 1);call write~init~int(116, 35, 4, 1);call write~init~int(104, 35, 5, 1);call write~init~int(0, 35, 6, 1);call #Ultimate.allocInit(7, 36);call write~init~int(105, 36, 0, 1);call write~init~int(112, 36, 1, 1);call write~init~int(104, 36, 2, 1);call write~init~int(101, 36, 3, 1);call write~init~int(116, 36, 4, 1);call write~init~int(104, 36, 5, 1);call write~init~int(0, 36, 6, 1);~ldv_state_variable_3~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_2~0 := 0;~ipheth_netdev_ops_group1~0.base, ~ipheth_netdev_ops_group1~0.offset := 0, 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~ipheth_driver_group1~0.base, ~ipheth_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#ipheth_table~0.base, ~#ipheth_table~0.offset := 37, 0;call #Ultimate.allocInit(250, 37);call write~init~int(899, ~#ipheth_table~0.base, ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 2 + ~#ipheth_table~0.offset, 2);call write~init~int(4752, ~#ipheth_table~0.base, 4 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 6 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 8 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 10 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 11 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 12 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 13 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 14 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 15 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 16 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 17 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 25 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 27 + ~#ipheth_table~0.offset, 2);call write~init~int(4754, ~#ipheth_table~0.base, 29 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 31 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 33 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 35 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 36 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 37 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 38 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 39 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 40 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 41 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 42 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 50 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 52 + ~#ipheth_table~0.offset, 2);call write~init~int(4756, ~#ipheth_table~0.base, 54 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 56 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 58 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 60 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 61 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 62 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 63 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 64 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 65 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 66 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 67 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 75 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 77 + ~#ipheth_table~0.offset, 2);call write~init~int(4759, ~#ipheth_table~0.base, 79 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 81 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 83 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 85 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 86 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 87 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 88 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 89 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 90 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 91 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 92 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 100 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 102 + ~#ipheth_table~0.offset, 2);call write~init~int(4762, ~#ipheth_table~0.base, 104 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 106 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 108 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 110 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 111 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 112 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 113 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 114 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 115 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 116 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 117 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 125 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 127 + ~#ipheth_table~0.offset, 2);call write~init~int(4779, ~#ipheth_table~0.base, 129 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 131 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 133 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 135 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 136 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 137 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 138 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 139 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 140 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 141 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 142 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 150 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 152 + ~#ipheth_table~0.offset, 2);call write~init~int(4764, ~#ipheth_table~0.base, 154 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 156 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 158 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 160 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 161 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 162 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 163 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 164 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 165 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 166 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 167 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 175 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 177 + ~#ipheth_table~0.offset, 2);call write~init~int(4768, ~#ipheth_table~0.base, 179 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 181 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 183 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 185 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 186 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 187 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 188 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 189 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 190 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 191 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 192 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 200 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 202 + ~#ipheth_table~0.offset, 2);call write~init~int(4776, ~#ipheth_table~0.base, 204 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 206 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 208 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 210 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 211 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 212 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 213 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 214 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 215 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 216 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 217 + ~#ipheth_table~0.offset, 8);call write~init~int(0, ~#ipheth_table~0.base, 225 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 227 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 229 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 231 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 233 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 235 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 236 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 237 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 238 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 239 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 240 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 241 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 242 + ~#ipheth_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.bInterfaceNumber := 0;~__mod_usb_device_table~0.driver_info := 0;~#ipheth_netdev_ops~0.base, ~#ipheth_netdev_ops~0.offset := 38, 0;call #Ultimate.allocInit(448, 38);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 8 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_open.base, #funAddr~ipheth_open.offset, ~#ipheth_netdev_ops~0.base, 16 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_close.base, #funAddr~ipheth_close.offset, ~#ipheth_netdev_ops~0.base, 24 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_tx.base, #funAddr~ipheth_tx.offset, ~#ipheth_netdev_ops~0.base, 32 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 40 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 48 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 56 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 64 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 72 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 80 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 88 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 96 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 104 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_tx_timeout.base, #funAddr~ipheth_tx_timeout.offset, ~#ipheth_netdev_ops~0.base, 112 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 120 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 128 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 136 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 144 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 152 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 160 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 168 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 176 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 184 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 192 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 200 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 208 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 216 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 224 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 232 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 240 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 248 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 256 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 264 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 272 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 280 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 288 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 296 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 304 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 312 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 320 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 328 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 336 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 344 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 352 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 360 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 368 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 376 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 384 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 392 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 400 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 408 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 416 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 424 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 432 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 440 + ~#ipheth_netdev_ops~0.offset, 8);~#ipheth_driver~0.base, ~#ipheth_driver~0.offset := 39, 0;call #Ultimate.allocInit(285, 39);call write~init~$Pointer$(35, 0, ~#ipheth_driver~0.base, ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_probe.base, #funAddr~ipheth_probe.offset, ~#ipheth_driver~0.base, 8 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_disconnect.base, #funAddr~ipheth_disconnect.offset, ~#ipheth_driver~0.base, 16 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 24 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 32 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 40 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 48 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 56 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 64 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(~#ipheth_table~0.base, ~#ipheth_table~0.offset, ~#ipheth_driver~0.base, 72 + ~#ipheth_driver~0.offset, 8);call write~init~int(0, ~#ipheth_driver~0.base, 80 + ~#ipheth_driver~0.offset, 4);call write~init~int(0, ~#ipheth_driver~0.base, 84 + ~#ipheth_driver~0.offset, 4);call write~init~int(0, ~#ipheth_driver~0.base, 88 + ~#ipheth_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 92 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 100 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 108 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 116 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 124 + ~#ipheth_driver~0.offset, 8);call write~init~int(0, ~#ipheth_driver~0.base, 132 + ~#ipheth_driver~0.offset, 4);call write~init~int(0, ~#ipheth_driver~0.base, 136 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 148 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 156 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 164 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 172 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 180 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 188 + ~#ipheth_driver~0.offset, 8);call write~init~int(0, ~#ipheth_driver~0.base, 196 + ~#ipheth_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 197 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 205 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 213 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 221 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 229 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 237 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 245 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 253 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 261 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 269 + ~#ipheth_driver~0.offset, 8);call write~init~int(0, ~#ipheth_driver~0.base, 277 + ~#ipheth_driver~0.offset, 4);call write~init~int(0, ~#ipheth_driver~0.base, 281 + ~#ipheth_driver~0.offset, 1);call write~init~int(0, ~#ipheth_driver~0.base, 282 + ~#ipheth_driver~0.offset, 1);call write~init~int(1, ~#ipheth_driver~0.base, 283 + ~#ipheth_driver~0.offset, 1);call write~init~int(0, ~#ipheth_driver~0.base, 284 + ~#ipheth_driver~0.offset, 1);~ldv_retval_2~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {108428#true} is VALID [2022-02-20 21:52:25,617 INFO L290 TraceCheckUtils]: 1: Hoare triple {108428#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret305#1.base, main_#t~ret305#1.offset, main_#t~ret306#1.base, main_#t~ret306#1.offset, main_#t~ret307#1.base, main_#t~ret307#1.offset, main_#t~nondet308#1, main_#t~switch309#1, main_#t~nondet310#1, main_#t~switch311#1, main_#t~ret312#1, main_#t~nondet313#1, main_#t~switch314#1, main_#t~ret315#1, main_#t~nondet316#1, main_#t~switch317#1, main_#t~ret318#1, main_#t~nondet319#1, main_#t~switch320#1, main_#t~ret321#1, main_#t~ret322#1, main_#t~ret323#1, main_#t~ret324#1, main_#t~ret325#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~31#1.base, main_~tmp~31#1.offset, main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset, main_~tmp___0~12#1.base, main_~tmp___0~12#1.offset, main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset, main_~tmp___1~4#1.base, main_~tmp___1~4#1.offset, main_~tmp___2~2#1, main_~tmp___3~1#1, main_~tmp___4~0#1, main_~tmp___5~0#1, main_~tmp___6~0#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~31#1.base, main_~tmp~31#1.offset;havoc main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset;havoc main_~tmp___0~12#1.base, main_~tmp___0~12#1.offset;havoc main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset;havoc main_~tmp___1~4#1.base, main_~tmp___1~4#1.offset;havoc main_~tmp___2~2#1;havoc main_~tmp___3~1#1;havoc main_~tmp___4~0#1;havoc main_~tmp___5~0#1;havoc main_~tmp___6~0#1; {108428#true} is VALID [2022-02-20 21:52:25,617 INFO L272 TraceCheckUtils]: 2: Hoare triple {108428#true} call main_#t~ret305#1.base, main_#t~ret305#1.offset := ldv_zalloc(32); {108496#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:25,617 INFO L290 TraceCheckUtils]: 3: Hoare triple {108496#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {108428#true} is VALID [2022-02-20 21:52:25,617 INFO L290 TraceCheckUtils]: 4: Hoare triple {108428#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {108428#true} is VALID [2022-02-20 21:52:25,617 INFO L290 TraceCheckUtils]: 5: Hoare triple {108428#true} assume true; {108428#true} is VALID [2022-02-20 21:52:25,617 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {108428#true} {108428#true} #1203#return; {108428#true} is VALID [2022-02-20 21:52:25,617 INFO L290 TraceCheckUtils]: 7: Hoare triple {108428#true} main_~tmp~31#1.base, main_~tmp~31#1.offset := main_#t~ret305#1.base, main_#t~ret305#1.offset;havoc main_#t~ret305#1.base, main_#t~ret305#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~31#1.base, main_~tmp~31#1.offset; {108428#true} is VALID [2022-02-20 21:52:25,618 INFO L272 TraceCheckUtils]: 8: Hoare triple {108428#true} call main_#t~ret306#1.base, main_#t~ret306#1.offset := ldv_zalloc(3136); {108496#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:25,618 INFO L290 TraceCheckUtils]: 9: Hoare triple {108496#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {108428#true} is VALID [2022-02-20 21:52:25,618 INFO L290 TraceCheckUtils]: 10: Hoare triple {108428#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {108428#true} is VALID [2022-02-20 21:52:25,618 INFO L290 TraceCheckUtils]: 11: Hoare triple {108428#true} assume true; {108428#true} is VALID [2022-02-20 21:52:25,618 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {108428#true} {108428#true} #1205#return; {108428#true} is VALID [2022-02-20 21:52:25,618 INFO L290 TraceCheckUtils]: 13: Hoare triple {108428#true} main_~tmp___0~12#1.base, main_~tmp___0~12#1.offset := main_#t~ret306#1.base, main_#t~ret306#1.offset;havoc main_#t~ret306#1.base, main_#t~ret306#1.offset;main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset := main_~tmp___0~12#1.base, main_~tmp___0~12#1.offset; {108428#true} is VALID [2022-02-20 21:52:25,618 INFO L272 TraceCheckUtils]: 14: Hoare triple {108428#true} call main_#t~ret307#1.base, main_#t~ret307#1.offset := ldv_zalloc(240); {108496#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:25,619 INFO L290 TraceCheckUtils]: 15: Hoare triple {108496#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {108428#true} is VALID [2022-02-20 21:52:25,619 INFO L290 TraceCheckUtils]: 16: Hoare triple {108428#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {108428#true} is VALID [2022-02-20 21:52:25,619 INFO L290 TraceCheckUtils]: 17: Hoare triple {108428#true} assume true; {108428#true} is VALID [2022-02-20 21:52:25,619 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {108428#true} {108428#true} #1207#return; {108428#true} is VALID [2022-02-20 21:52:25,619 INFO L290 TraceCheckUtils]: 19: Hoare triple {108428#true} main_~tmp___1~4#1.base, main_~tmp___1~4#1.offset := main_#t~ret307#1.base, main_#t~ret307#1.offset;havoc main_#t~ret307#1.base, main_#t~ret307#1.offset;main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset := main_~tmp___1~4#1.base, main_~tmp___1~4#1.offset;assume { :begin_inline_ldv_initialize } true; {108428#true} is VALID [2022-02-20 21:52:25,619 INFO L290 TraceCheckUtils]: 20: Hoare triple {108428#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,619 INFO L290 TraceCheckUtils]: 21: Hoare triple {108442#(= ~ref_cnt~0 0)} assume -2147483648 <= main_#t~nondet308#1 && main_#t~nondet308#1 <= 2147483647;main_~tmp___2~2#1 := main_#t~nondet308#1;havoc main_#t~nondet308#1;main_#t~switch309#1 := 0 == main_~tmp___2~2#1; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,620 INFO L290 TraceCheckUtils]: 22: Hoare triple {108442#(= ~ref_cnt~0 0)} assume !main_#t~switch309#1;main_#t~switch309#1 := main_#t~switch309#1 || 1 == main_~tmp___2~2#1; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,620 INFO L290 TraceCheckUtils]: 23: Hoare triple {108442#(= ~ref_cnt~0 0)} assume main_#t~switch309#1; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,620 INFO L290 TraceCheckUtils]: 24: Hoare triple {108442#(= ~ref_cnt~0 0)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet313#1 && main_#t~nondet313#1 <= 2147483647;main_~tmp___4~0#1 := main_#t~nondet313#1;havoc main_#t~nondet313#1;main_#t~switch314#1 := 0 == main_~tmp___4~0#1; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,620 INFO L290 TraceCheckUtils]: 25: Hoare triple {108442#(= ~ref_cnt~0 0)} assume !main_#t~switch314#1;main_#t~switch314#1 := main_#t~switch314#1 || 1 == main_~tmp___4~0#1; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,621 INFO L290 TraceCheckUtils]: 26: Hoare triple {108442#(= ~ref_cnt~0 0)} assume main_#t~switch314#1; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,621 INFO L290 TraceCheckUtils]: 27: Hoare triple {108442#(= ~ref_cnt~0 0)} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_ipheth_driver_init } true;havoc ipheth_driver_init_#res#1;havoc ipheth_driver_init_#t~ret302#1, ipheth_driver_init_~tmp~28#1;havoc ipheth_driver_init_~tmp~28#1;assume { :begin_inline_ldv_usb_register_driver_19 } true;ldv_usb_register_driver_19_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_19_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_19_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg3#1.offset := ~#ipheth_driver~0.base, ~#ipheth_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 36, 0;havoc ldv_usb_register_driver_19_#res#1;havoc ldv_usb_register_driver_19_#t~ret333#1, ldv_usb_register_driver_19_~ldv_func_arg1#1.base, ldv_usb_register_driver_19_~ldv_func_arg1#1.offset, ldv_usb_register_driver_19_~ldv_func_arg2#1.base, ldv_usb_register_driver_19_~ldv_func_arg2#1.offset, ldv_usb_register_driver_19_~ldv_func_arg3#1.base, ldv_usb_register_driver_19_~ldv_func_arg3#1.offset, ldv_usb_register_driver_19_~ldv_func_res~1#1, ldv_usb_register_driver_19_~tmp~39#1;ldv_usb_register_driver_19_~ldv_func_arg1#1.base, ldv_usb_register_driver_19_~ldv_func_arg1#1.offset := ldv_usb_register_driver_19_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_19_~ldv_func_arg2#1.base, ldv_usb_register_driver_19_~ldv_func_arg2#1.offset := ldv_usb_register_driver_19_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_19_~ldv_func_arg3#1.base, ldv_usb_register_driver_19_~ldv_func_arg3#1.offset := ldv_usb_register_driver_19_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_19_~ldv_func_res~1#1;havoc ldv_usb_register_driver_19_~tmp~39#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_19_~ldv_func_arg1#1.base, ldv_usb_register_driver_19_~ldv_func_arg1#1.offset, ldv_usb_register_driver_19_~ldv_func_arg2#1.base, ldv_usb_register_driver_19_~ldv_func_arg2#1.offset, ldv_usb_register_driver_19_~ldv_func_arg3#1.base, ldv_usb_register_driver_19_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet365#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet365#1 && usb_register_driver_#t~nondet365#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet365#1;havoc usb_register_driver_#t~nondet365#1; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,621 INFO L290 TraceCheckUtils]: 28: Hoare triple {108442#(= ~ref_cnt~0 0)} ldv_usb_register_driver_19_#t~ret333#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_19_#t~ret333#1 && ldv_usb_register_driver_19_#t~ret333#1 <= 2147483647;ldv_usb_register_driver_19_~tmp~39#1 := ldv_usb_register_driver_19_#t~ret333#1;havoc ldv_usb_register_driver_19_#t~ret333#1;ldv_usb_register_driver_19_~ldv_func_res~1#1 := ldv_usb_register_driver_19_~tmp~39#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret303#1.base, ldv_usb_driver_1_#t~ret303#1.offset, ldv_usb_driver_1_~tmp~29#1.base, ldv_usb_driver_1_~tmp~29#1.offset;havoc ldv_usb_driver_1_~tmp~29#1.base, ldv_usb_driver_1_~tmp~29#1.offset; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,622 INFO L272 TraceCheckUtils]: 29: Hoare triple {108442#(= ~ref_cnt~0 0)} call ldv_usb_driver_1_#t~ret303#1.base, ldv_usb_driver_1_#t~ret303#1.offset := ldv_zalloc(1520); {108496#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:25,622 INFO L290 TraceCheckUtils]: 30: Hoare triple {108496#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {108428#true} is VALID [2022-02-20 21:52:25,622 INFO L290 TraceCheckUtils]: 31: Hoare triple {108428#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {108428#true} is VALID [2022-02-20 21:52:25,622 INFO L290 TraceCheckUtils]: 32: Hoare triple {108428#true} assume true; {108428#true} is VALID [2022-02-20 21:52:25,622 INFO L284 TraceCheckUtils]: 33: Hoare quadruple {108428#true} {108442#(= ~ref_cnt~0 0)} #1261#return; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,622 INFO L290 TraceCheckUtils]: 34: Hoare triple {108442#(= ~ref_cnt~0 0)} ldv_usb_driver_1_~tmp~29#1.base, ldv_usb_driver_1_~tmp~29#1.offset := ldv_usb_driver_1_#t~ret303#1.base, ldv_usb_driver_1_#t~ret303#1.offset;havoc ldv_usb_driver_1_#t~ret303#1.base, ldv_usb_driver_1_#t~ret303#1.offset;~ipheth_driver_group1~0.base, ~ipheth_driver_group1~0.offset := ldv_usb_driver_1_~tmp~29#1.base, ldv_usb_driver_1_~tmp~29#1.offset; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,623 INFO L290 TraceCheckUtils]: 35: Hoare triple {108442#(= ~ref_cnt~0 0)} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_19_#res#1 := ldv_usb_register_driver_19_~ldv_func_res~1#1; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,623 INFO L290 TraceCheckUtils]: 36: Hoare triple {108442#(= ~ref_cnt~0 0)} ipheth_driver_init_#t~ret302#1 := ldv_usb_register_driver_19_#res#1;assume { :end_inline_ldv_usb_register_driver_19 } true;assume -2147483648 <= ipheth_driver_init_#t~ret302#1 && ipheth_driver_init_#t~ret302#1 <= 2147483647;ipheth_driver_init_~tmp~28#1 := ipheth_driver_init_#t~ret302#1;havoc ipheth_driver_init_#t~ret302#1;ipheth_driver_init_#res#1 := ipheth_driver_init_~tmp~28#1; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,623 INFO L290 TraceCheckUtils]: 37: Hoare triple {108442#(= ~ref_cnt~0 0)} main_#t~ret315#1 := ipheth_driver_init_#res#1;assume { :end_inline_ipheth_driver_init } true;assume -2147483648 <= main_#t~ret315#1 && main_#t~ret315#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret315#1;havoc main_#t~ret315#1; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,623 INFO L290 TraceCheckUtils]: 38: Hoare triple {108442#(= ~ref_cnt~0 0)} assume 0 == ~ldv_retval_1~0;~ldv_state_variable_0~0 := 3; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,624 INFO L290 TraceCheckUtils]: 39: Hoare triple {108442#(= ~ref_cnt~0 0)} assume !(0 != ~ldv_retval_1~0); {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,624 INFO L290 TraceCheckUtils]: 40: Hoare triple {108442#(= ~ref_cnt~0 0)} assume -2147483648 <= main_#t~nondet308#1 && main_#t~nondet308#1 <= 2147483647;main_~tmp___2~2#1 := main_#t~nondet308#1;havoc main_#t~nondet308#1;main_#t~switch309#1 := 0 == main_~tmp___2~2#1; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,624 INFO L290 TraceCheckUtils]: 41: Hoare triple {108442#(= ~ref_cnt~0 0)} assume main_#t~switch309#1; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,624 INFO L290 TraceCheckUtils]: 42: Hoare triple {108442#(= ~ref_cnt~0 0)} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= main_#t~nondet310#1 && main_#t~nondet310#1 <= 2147483647;main_~tmp___3~1#1 := main_#t~nondet310#1;havoc main_#t~nondet310#1;main_#t~switch311#1 := 0 == main_~tmp___3~1#1; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,625 INFO L290 TraceCheckUtils]: 43: Hoare triple {108442#(= ~ref_cnt~0 0)} assume main_#t~switch311#1; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,625 INFO L290 TraceCheckUtils]: 44: Hoare triple {108442#(= ~ref_cnt~0 0)} assume 1 == ~ldv_state_variable_1~0;assume { :begin_inline_ipheth_probe } true;ipheth_probe_#in~intf#1.base, ipheth_probe_#in~intf#1.offset, ipheth_probe_#in~id#1.base, ipheth_probe_#in~id#1.offset := ~ipheth_driver_group1~0.base, ~ipheth_driver_group1~0.offset, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc ipheth_probe_#res#1;havoc ipheth_probe_#t~ret271#1.base, ipheth_probe_#t~ret271#1.offset, ipheth_probe_#t~ret272#1.base, ipheth_probe_#t~ret272#1.offset, ipheth_probe_#t~strcpy~res273#1.base, ipheth_probe_#t~strcpy~res273#1.offset, ipheth_probe_#t~ret274#1.base, ipheth_probe_#t~ret274#1.offset, ipheth_probe_#t~ret275#1.base, ipheth_probe_#t~ret275#1.offset, ipheth_probe_#t~nondet276#1, ipheth_probe_#t~mem277#1.base, ipheth_probe_#t~mem277#1.offset, ipheth_probe_#t~ret278#1, ipheth_probe_#t~mem279#1, ipheth_probe_#t~ret280#1, ipheth_probe_#t~mem281#1, ipheth_probe_#t~mem282#1, ipheth_probe_#t~mem283#1, ipheth_probe_#t~mem284#1, ipheth_probe_#t~short285#1, ipheth_probe_#t~nondet286#1, ipheth_probe_#t~ret287#1.base, ipheth_probe_#t~ret287#1.offset, ipheth_probe_#t~mem288#1.base, ipheth_probe_#t~mem288#1.offset, ipheth_probe_#t~ret289#1, ipheth_probe_#t~mem290#1, ipheth_probe_#t~ret291#1, ipheth_probe_#t~nondet292#1, ipheth_probe_#t~ret293#1, ipheth_probe_#t~nondet294#1, ipheth_probe_#t~nondet295#1, ipheth_probe_#t~mem296#1.base, ipheth_probe_#t~mem296#1.offset, ipheth_probe_~intf#1.base, ipheth_probe_~intf#1.offset, ipheth_probe_~id#1.base, ipheth_probe_~id#1.offset, ipheth_probe_~udev~5#1.base, ipheth_probe_~udev~5#1.offset, ipheth_probe_~tmp~26#1.base, ipheth_probe_~tmp~26#1.offset, ipheth_probe_~hintf~0#1.base, ipheth_probe_~hintf~0#1.offset, ipheth_probe_~endp~0#1.base, ipheth_probe_~endp~0#1.offset, ipheth_probe_~dev~8#1.base, ipheth_probe_~dev~8#1.offset, ipheth_probe_~netdev~0#1.base, ipheth_probe_~netdev~0#1.offset, ipheth_probe_~i~0#1, ipheth_probe_~retval~5#1, ipheth_probe_~tmp___0~11#1.base, ipheth_probe_~tmp___0~11#1.offset, ipheth_probe_~tmp___1~3#1, ipheth_probe_~tmp___2~1#1, ipheth_probe_~tmp___3~0#1.base, ipheth_probe_~tmp___3~0#1.offset, ipheth_probe_~#__key~0#1.base, ipheth_probe_~#__key~0#1.offset, ipheth_probe_~#__constr_expr_0~0#1.base, ipheth_probe_~#__constr_expr_0~0#1.offset, ipheth_probe_~#__key___0~0#1.base, ipheth_probe_~#__key___0~0#1.offset;ipheth_probe_~intf#1.base, ipheth_probe_~intf#1.offset := ipheth_probe_#in~intf#1.base, ipheth_probe_#in~intf#1.offset;ipheth_probe_~id#1.base, ipheth_probe_~id#1.offset := ipheth_probe_#in~id#1.base, ipheth_probe_#in~id#1.offset;havoc ipheth_probe_~udev~5#1.base, ipheth_probe_~udev~5#1.offset;havoc ipheth_probe_~tmp~26#1.base, ipheth_probe_~tmp~26#1.offset;havoc ipheth_probe_~hintf~0#1.base, ipheth_probe_~hintf~0#1.offset;havoc ipheth_probe_~endp~0#1.base, ipheth_probe_~endp~0#1.offset;havoc ipheth_probe_~dev~8#1.base, ipheth_probe_~dev~8#1.offset;havoc ipheth_probe_~netdev~0#1.base, ipheth_probe_~netdev~0#1.offset;havoc ipheth_probe_~i~0#1;havoc ipheth_probe_~retval~5#1;havoc ipheth_probe_~tmp___0~11#1.base, ipheth_probe_~tmp___0~11#1.offset;havoc ipheth_probe_~tmp___1~3#1;havoc ipheth_probe_~tmp___2~1#1;havoc ipheth_probe_~tmp___3~0#1.base, ipheth_probe_~tmp___3~0#1.offset;call ipheth_probe_~#__key~0#1.base, ipheth_probe_~#__key~0#1.offset := #Ultimate.allocOnStack(8);call ipheth_probe_~#__constr_expr_0~0#1.base, ipheth_probe_~#__constr_expr_0~0#1.offset := #Ultimate.allocOnStack(8);call ipheth_probe_~#__key___0~0#1.base, ipheth_probe_~#__key___0~0#1.offset := #Ultimate.allocOnStack(8);assume { :begin_inline_interface_to_usbdev } true;interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset := ipheth_probe_~intf#1.base, ipheth_probe_~intf#1.offset;havoc interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;havoc interface_to_usbdev_#t~ret326#1.base, interface_to_usbdev_#t~ret326#1.offset, interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset, interface_to_usbdev_~tmp~32#1.base, interface_to_usbdev_~tmp~32#1.offset;interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset := interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset;havoc interface_to_usbdev_~tmp~32#1.base, interface_to_usbdev_~tmp~32#1.offset;assume { :begin_inline_ldv_interface_to_usbdev } true;havoc ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;havoc ldv_interface_to_usbdev_#t~ret339#1.base, ldv_interface_to_usbdev_#t~ret339#1.offset, ldv_interface_to_usbdev_~result~0#1.base, ldv_interface_to_usbdev_~result~0#1.offset, ldv_interface_to_usbdev_~tmp~42#1.base, ldv_interface_to_usbdev_~tmp~42#1.offset;havoc ldv_interface_to_usbdev_~result~0#1.base, ldv_interface_to_usbdev_~result~0#1.offset;havoc ldv_interface_to_usbdev_~tmp~42#1.base, ldv_interface_to_usbdev_~tmp~42#1.offset; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,668 INFO L272 TraceCheckUtils]: 45: Hoare triple {108442#(= ~ref_cnt~0 0)} call ldv_interface_to_usbdev_#t~ret339#1.base, ldv_interface_to_usbdev_#t~ret339#1.offset := ldv_malloc(1889); {108497#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:25,668 INFO L290 TraceCheckUtils]: 46: Hoare triple {108497#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet79 && #t~nondet79 <= 2147483647;~tmp___0~2 := #t~nondet79;havoc #t~nondet79; {108428#true} is VALID [2022-02-20 21:52:25,668 INFO L290 TraceCheckUtils]: 47: Hoare triple {108428#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {108428#true} is VALID [2022-02-20 21:52:25,669 INFO L290 TraceCheckUtils]: 48: Hoare triple {108428#true} assume true; {108428#true} is VALID [2022-02-20 21:52:25,669 INFO L284 TraceCheckUtils]: 49: Hoare quadruple {108428#true} {108442#(= ~ref_cnt~0 0)} #1209#return; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,669 INFO L290 TraceCheckUtils]: 50: Hoare triple {108442#(= ~ref_cnt~0 0)} ldv_interface_to_usbdev_~tmp~42#1.base, ldv_interface_to_usbdev_~tmp~42#1.offset := ldv_interface_to_usbdev_#t~ret339#1.base, ldv_interface_to_usbdev_#t~ret339#1.offset;havoc ldv_interface_to_usbdev_#t~ret339#1.base, ldv_interface_to_usbdev_#t~ret339#1.offset;ldv_interface_to_usbdev_~result~0#1.base, ldv_interface_to_usbdev_~result~0#1.offset := ldv_interface_to_usbdev_~tmp~42#1.base, ldv_interface_to_usbdev_~tmp~42#1.offset; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,670 INFO L290 TraceCheckUtils]: 51: Hoare triple {108442#(= ~ref_cnt~0 0)} assume 0 != (ldv_interface_to_usbdev_~result~0#1.base + ldv_interface_to_usbdev_~result~0#1.offset) % 18446744073709551616; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,670 INFO L290 TraceCheckUtils]: 52: Hoare triple {108442#(= ~ref_cnt~0 0)} ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset := ldv_interface_to_usbdev_~result~0#1.base, ldv_interface_to_usbdev_~result~0#1.offset; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,670 INFO L290 TraceCheckUtils]: 53: Hoare triple {108442#(= ~ref_cnt~0 0)} interface_to_usbdev_#t~ret326#1.base, interface_to_usbdev_#t~ret326#1.offset := ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;assume { :end_inline_ldv_interface_to_usbdev } true;interface_to_usbdev_~tmp~32#1.base, interface_to_usbdev_~tmp~32#1.offset := interface_to_usbdev_#t~ret326#1.base, interface_to_usbdev_#t~ret326#1.offset;havoc interface_to_usbdev_#t~ret326#1.base, interface_to_usbdev_#t~ret326#1.offset;interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset := interface_to_usbdev_~tmp~32#1.base, interface_to_usbdev_~tmp~32#1.offset; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,670 INFO L290 TraceCheckUtils]: 54: Hoare triple {108442#(= ~ref_cnt~0 0)} ipheth_probe_#t~ret271#1.base, ipheth_probe_#t~ret271#1.offset := interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;assume { :end_inline_interface_to_usbdev } true;ipheth_probe_~tmp~26#1.base, ipheth_probe_~tmp~26#1.offset := ipheth_probe_#t~ret271#1.base, ipheth_probe_#t~ret271#1.offset;havoc ipheth_probe_#t~ret271#1.base, ipheth_probe_#t~ret271#1.offset;ipheth_probe_~udev~5#1.base, ipheth_probe_~udev~5#1.offset := ipheth_probe_~tmp~26#1.base, ipheth_probe_~tmp~26#1.offset;assume { :begin_inline_alloc_etherdev_mqs } true;alloc_etherdev_mqs_#in~arg0#1, alloc_etherdev_mqs_#in~arg1#1, alloc_etherdev_mqs_#in~arg2#1 := 304, 1, 1;havoc alloc_etherdev_mqs_#res#1.base, alloc_etherdev_mqs_#res#1.offset;havoc alloc_etherdev_mqs_#t~ret347#1.base, alloc_etherdev_mqs_#t~ret347#1.offset, alloc_etherdev_mqs_~arg0#1, alloc_etherdev_mqs_~arg1#1, alloc_etherdev_mqs_~arg2#1;alloc_etherdev_mqs_~arg0#1 := alloc_etherdev_mqs_#in~arg0#1;alloc_etherdev_mqs_~arg1#1 := alloc_etherdev_mqs_#in~arg1#1;alloc_etherdev_mqs_~arg2#1 := alloc_etherdev_mqs_#in~arg2#1; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,671 INFO L272 TraceCheckUtils]: 55: Hoare triple {108442#(= ~ref_cnt~0 0)} call alloc_etherdev_mqs_#t~ret347#1.base, alloc_etherdev_mqs_#t~ret347#1.offset := ldv_malloc(2887); {108497#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:25,671 INFO L290 TraceCheckUtils]: 56: Hoare triple {108497#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet79 && #t~nondet79 <= 2147483647;~tmp___0~2 := #t~nondet79;havoc #t~nondet79; {108428#true} is VALID [2022-02-20 21:52:25,671 INFO L290 TraceCheckUtils]: 57: Hoare triple {108428#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {108428#true} is VALID [2022-02-20 21:52:25,671 INFO L290 TraceCheckUtils]: 58: Hoare triple {108428#true} assume true; {108428#true} is VALID [2022-02-20 21:52:25,672 INFO L284 TraceCheckUtils]: 59: Hoare quadruple {108428#true} {108442#(= ~ref_cnt~0 0)} #1213#return; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,672 INFO L290 TraceCheckUtils]: 60: Hoare triple {108442#(= ~ref_cnt~0 0)} alloc_etherdev_mqs_#res#1.base, alloc_etherdev_mqs_#res#1.offset := alloc_etherdev_mqs_#t~ret347#1.base, alloc_etherdev_mqs_#t~ret347#1.offset;havoc alloc_etherdev_mqs_#t~ret347#1.base, alloc_etherdev_mqs_#t~ret347#1.offset; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,672 INFO L290 TraceCheckUtils]: 61: Hoare triple {108442#(= ~ref_cnt~0 0)} ipheth_probe_#t~ret272#1.base, ipheth_probe_#t~ret272#1.offset := alloc_etherdev_mqs_#res#1.base, alloc_etherdev_mqs_#res#1.offset;assume { :end_inline_alloc_etherdev_mqs } true;ipheth_probe_~netdev~0#1.base, ipheth_probe_~netdev~0#1.offset := ipheth_probe_#t~ret272#1.base, ipheth_probe_#t~ret272#1.offset;havoc ipheth_probe_#t~ret272#1.base, ipheth_probe_#t~ret272#1.offset; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,672 INFO L290 TraceCheckUtils]: 62: Hoare triple {108442#(= ~ref_cnt~0 0)} assume !(0 == (ipheth_probe_~netdev~0#1.base + ipheth_probe_~netdev~0#1.offset) % 18446744073709551616);call write~$Pointer$(~#ipheth_netdev_ops~0.base, ~#ipheth_netdev_ops~0.offset, ipheth_probe_~netdev~0#1.base, 420 + ipheth_probe_~netdev~0#1.offset, 8);call write~int(1250, ipheth_probe_~netdev~0#1.base, 930 + ipheth_probe_~netdev~0#1.offset, 4);assume { :begin_inline_#Ultimate.C_strcpy } true;#Ultimate.C_strcpy_dest#1.base, #Ultimate.C_strcpy_dest#1.offset, #Ultimate.C_strcpy_src#1.base, #Ultimate.C_strcpy_src#1.offset := ipheth_probe_~netdev~0#1.base, ipheth_probe_~netdev~0#1.offset, 26, 0;havoc #Ultimate.C_strcpy_#res#1.base, #Ultimate.C_strcpy_#res#1.offset;havoc #Ultimate.C_strcpy_#t~offset383#1, #Ultimate.C_strcpy_#t~mem384#1;#Ultimate.C_strcpy_#t~offset383#1 := 0; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,673 INFO L290 TraceCheckUtils]: 63: Hoare triple {108442#(= ~ref_cnt~0 0)} call #Ultimate.C_strcpy_#t~mem384#1 := read~int(#Ultimate.C_strcpy_src#1.base, #Ultimate.C_strcpy_src#1.offset + #Ultimate.C_strcpy_#t~offset383#1, 1);call write~unchecked~int(#Ultimate.C_strcpy_#t~mem384#1, #Ultimate.C_strcpy_dest#1.base, #Ultimate.C_strcpy_dest#1.offset + #Ultimate.C_strcpy_#t~offset383#1, 1); {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,673 INFO L290 TraceCheckUtils]: 64: Hoare triple {108442#(= ~ref_cnt~0 0)} assume 0 == #Ultimate.C_strcpy_#t~mem384#1; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,673 INFO L290 TraceCheckUtils]: 65: Hoare triple {108442#(= ~ref_cnt~0 0)} assume #Ultimate.C_strcpy_#res#1.base == #Ultimate.C_strcpy_dest#1.base && #Ultimate.C_strcpy_#res#1.offset == #Ultimate.C_strcpy_dest#1.offset;ipheth_probe_#t~strcpy~res273#1.base, ipheth_probe_#t~strcpy~res273#1.offset := #Ultimate.C_strcpy_#res#1.base, #Ultimate.C_strcpy_#res#1.offset;assume { :end_inline_#Ultimate.C_strcpy } true;havoc ipheth_probe_#t~strcpy~res273#1.base, ipheth_probe_#t~strcpy~res273#1.offset; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,673 INFO L272 TraceCheckUtils]: 66: Hoare triple {108442#(= ~ref_cnt~0 0)} call ipheth_probe_#t~ret274#1.base, ipheth_probe_#t~ret274#1.offset := netdev_priv(ipheth_probe_~netdev~0#1.base, ipheth_probe_~netdev~0#1.offset); {108428#true} is VALID [2022-02-20 21:52:25,673 INFO L290 TraceCheckUtils]: 67: Hoare triple {108428#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3136 + ~dev.offset; {108428#true} is VALID [2022-02-20 21:52:25,673 INFO L290 TraceCheckUtils]: 68: Hoare triple {108428#true} assume true; {108428#true} is VALID [2022-02-20 21:52:25,674 INFO L284 TraceCheckUtils]: 69: Hoare quadruple {108428#true} {108442#(= ~ref_cnt~0 0)} #1215#return; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,674 INFO L290 TraceCheckUtils]: 70: Hoare triple {108442#(= ~ref_cnt~0 0)} ipheth_probe_~tmp___0~11#1.base, ipheth_probe_~tmp___0~11#1.offset := ipheth_probe_#t~ret274#1.base, ipheth_probe_#t~ret274#1.offset;havoc ipheth_probe_#t~ret274#1.base, ipheth_probe_#t~ret274#1.offset;ipheth_probe_~dev~8#1.base, ipheth_probe_~dev~8#1.offset := ipheth_probe_~tmp___0~11#1.base, ipheth_probe_~tmp___0~11#1.offset;call write~$Pointer$(ipheth_probe_~udev~5#1.base, ipheth_probe_~udev~5#1.offset, ipheth_probe_~dev~8#1.base, ipheth_probe_~dev~8#1.offset, 8);call write~$Pointer$(ipheth_probe_~netdev~0#1.base, ipheth_probe_~netdev~0#1.offset, ipheth_probe_~dev~8#1.base, 16 + ipheth_probe_~dev~8#1.offset, 8);call write~$Pointer$(ipheth_probe_~intf#1.base, ipheth_probe_~intf#1.offset, ipheth_probe_~dev~8#1.base, 8 + ipheth_probe_~dev~8#1.offset, 8);assume { :begin_inline_usb_altnum_to_altsetting } true;usb_altnum_to_altsetting_#in~arg0#1.base, usb_altnum_to_altsetting_#in~arg0#1.offset, usb_altnum_to_altsetting_#in~arg1#1 := ipheth_probe_~intf#1.base, ipheth_probe_~intf#1.offset, 1;havoc usb_altnum_to_altsetting_#res#1.base, usb_altnum_to_altsetting_#res#1.offset;havoc usb_altnum_to_altsetting_#t~ret363#1.base, usb_altnum_to_altsetting_#t~ret363#1.offset, usb_altnum_to_altsetting_~arg0#1.base, usb_altnum_to_altsetting_~arg0#1.offset, usb_altnum_to_altsetting_~arg1#1;usb_altnum_to_altsetting_~arg0#1.base, usb_altnum_to_altsetting_~arg0#1.offset := usb_altnum_to_altsetting_#in~arg0#1.base, usb_altnum_to_altsetting_#in~arg0#1.offset;usb_altnum_to_altsetting_~arg1#1 := usb_altnum_to_altsetting_#in~arg1#1; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,675 INFO L272 TraceCheckUtils]: 71: Hoare triple {108442#(= ~ref_cnt~0 0)} call usb_altnum_to_altsetting_#t~ret363#1.base, usb_altnum_to_altsetting_#t~ret363#1.offset := ldv_malloc(37); {108497#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:25,675 INFO L290 TraceCheckUtils]: 72: Hoare triple {108497#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet79 && #t~nondet79 <= 2147483647;~tmp___0~2 := #t~nondet79;havoc #t~nondet79; {108428#true} is VALID [2022-02-20 21:52:25,675 INFO L290 TraceCheckUtils]: 73: Hoare triple {108428#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {108428#true} is VALID [2022-02-20 21:52:25,675 INFO L290 TraceCheckUtils]: 74: Hoare triple {108428#true} assume true; {108428#true} is VALID [2022-02-20 21:52:25,675 INFO L284 TraceCheckUtils]: 75: Hoare quadruple {108428#true} {108442#(= ~ref_cnt~0 0)} #1217#return; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,676 INFO L290 TraceCheckUtils]: 76: Hoare triple {108442#(= ~ref_cnt~0 0)} usb_altnum_to_altsetting_#res#1.base, usb_altnum_to_altsetting_#res#1.offset := usb_altnum_to_altsetting_#t~ret363#1.base, usb_altnum_to_altsetting_#t~ret363#1.offset;havoc usb_altnum_to_altsetting_#t~ret363#1.base, usb_altnum_to_altsetting_#t~ret363#1.offset; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,676 INFO L290 TraceCheckUtils]: 77: Hoare triple {108442#(= ~ref_cnt~0 0)} ipheth_probe_#t~ret275#1.base, ipheth_probe_#t~ret275#1.offset := usb_altnum_to_altsetting_#res#1.base, usb_altnum_to_altsetting_#res#1.offset;assume { :end_inline_usb_altnum_to_altsetting } true;ipheth_probe_~hintf~0#1.base, ipheth_probe_~hintf~0#1.offset := ipheth_probe_#t~ret275#1.base, ipheth_probe_#t~ret275#1.offset;havoc ipheth_probe_#t~ret275#1.base, ipheth_probe_#t~ret275#1.offset; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,676 INFO L290 TraceCheckUtils]: 78: Hoare triple {108442#(= ~ref_cnt~0 0)} assume !(0 == (ipheth_probe_~hintf~0#1.base + ipheth_probe_~hintf~0#1.offset) % 18446744073709551616);ipheth_probe_~i~0#1 := 0; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,676 INFO L290 TraceCheckUtils]: 79: Hoare triple {108442#(= ~ref_cnt~0 0)} call ipheth_probe_#t~mem282#1 := read~int(ipheth_probe_~hintf~0#1.base, 4 + ipheth_probe_~hintf~0#1.offset, 1); {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,677 INFO L290 TraceCheckUtils]: 80: Hoare triple {108442#(= ~ref_cnt~0 0)} assume !(ipheth_probe_#t~mem282#1 % 256 > ipheth_probe_~i~0#1);havoc ipheth_probe_#t~mem282#1;call ipheth_probe_#t~mem283#1 := read~int(ipheth_probe_~dev~8#1.base, 72 + ipheth_probe_~dev~8#1.offset, 1);ipheth_probe_#t~short285#1 := 0 == ipheth_probe_#t~mem283#1 % 256 % 4294967296; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,677 INFO L290 TraceCheckUtils]: 81: Hoare triple {108442#(= ~ref_cnt~0 0)} assume !ipheth_probe_#t~short285#1;call ipheth_probe_#t~mem284#1 := read~int(ipheth_probe_~dev~8#1.base, 73 + ipheth_probe_~dev~8#1.offset, 1);ipheth_probe_#t~short285#1 := 0 == ipheth_probe_#t~mem284#1 % 256 % 4294967296; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,677 INFO L290 TraceCheckUtils]: 82: Hoare triple {108442#(= ~ref_cnt~0 0)} assume !ipheth_probe_#t~short285#1;havoc ipheth_probe_#t~mem283#1;havoc ipheth_probe_#t~mem284#1;havoc ipheth_probe_#t~short285#1;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := 64, 208;havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret78#1.base, kmalloc_#t~ret78#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___2~0#1.base, kmalloc_~tmp___2~0#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___2~0#1.base, kmalloc_~tmp___2~0#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret77#1.base, __kmalloc_#t~ret77#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,678 INFO L272 TraceCheckUtils]: 83: Hoare triple {108442#(= ~ref_cnt~0 0)} call __kmalloc_#t~ret77#1.base, __kmalloc_#t~ret77#1.offset := ldv_malloc(__kmalloc_~size#1); {108497#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:25,678 INFO L290 TraceCheckUtils]: 84: Hoare triple {108497#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet79 && #t~nondet79 <= 2147483647;~tmp___0~2 := #t~nondet79;havoc #t~nondet79; {108428#true} is VALID [2022-02-20 21:52:25,678 INFO L290 TraceCheckUtils]: 85: Hoare triple {108428#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {108428#true} is VALID [2022-02-20 21:52:25,678 INFO L290 TraceCheckUtils]: 86: Hoare triple {108428#true} assume true; {108428#true} is VALID [2022-02-20 21:52:25,678 INFO L284 TraceCheckUtils]: 87: Hoare quadruple {108428#true} {108442#(= ~ref_cnt~0 0)} #1223#return; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,678 INFO L290 TraceCheckUtils]: 88: Hoare triple {108442#(= ~ref_cnt~0 0)} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret77#1.base, __kmalloc_#t~ret77#1.offset;havoc __kmalloc_#t~ret77#1.base, __kmalloc_#t~ret77#1.offset; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,679 INFO L290 TraceCheckUtils]: 89: Hoare triple {108442#(= ~ref_cnt~0 0)} kmalloc_#t~ret78#1.base, kmalloc_#t~ret78#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___2~0#1.base, kmalloc_~tmp___2~0#1.offset := kmalloc_#t~ret78#1.base, kmalloc_#t~ret78#1.offset;havoc kmalloc_#t~ret78#1.base, kmalloc_#t~ret78#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___2~0#1.base, kmalloc_~tmp___2~0#1.offset; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,679 INFO L290 TraceCheckUtils]: 90: Hoare triple {108442#(= ~ref_cnt~0 0)} ipheth_probe_#t~ret287#1.base, ipheth_probe_#t~ret287#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;ipheth_probe_~tmp___3~0#1.base, ipheth_probe_~tmp___3~0#1.offset := ipheth_probe_#t~ret287#1.base, ipheth_probe_#t~ret287#1.offset;havoc ipheth_probe_#t~ret287#1.base, ipheth_probe_#t~ret287#1.offset;call write~$Pointer$(ipheth_probe_~tmp___3~0#1.base, ipheth_probe_~tmp___3~0#1.offset, ipheth_probe_~dev~8#1.base, 64 + ipheth_probe_~dev~8#1.offset, 8);call ipheth_probe_#t~mem288#1.base, ipheth_probe_#t~mem288#1.offset := read~$Pointer$(ipheth_probe_~dev~8#1.base, 64 + ipheth_probe_~dev~8#1.offset, 8); {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,679 INFO L290 TraceCheckUtils]: 91: Hoare triple {108442#(= ~ref_cnt~0 0)} assume !(0 == (ipheth_probe_#t~mem288#1.base + ipheth_probe_#t~mem288#1.offset) % 18446744073709551616);havoc ipheth_probe_#t~mem288#1.base, ipheth_probe_#t~mem288#1.offset;assume { :begin_inline_ipheth_get_macaddr } true;ipheth_get_macaddr_#in~dev#1.base, ipheth_get_macaddr_#in~dev#1.offset := ipheth_probe_~dev~8#1.base, ipheth_probe_~dev~8#1.offset;havoc ipheth_get_macaddr_#res#1;havoc ipheth_get_macaddr_#t~mem185#1.base, ipheth_get_macaddr_#t~mem185#1.offset, ipheth_get_macaddr_#t~mem186#1.base, ipheth_get_macaddr_#t~mem186#1.offset, ipheth_get_macaddr_#t~ret187#1, ipheth_get_macaddr_#t~mem188#1.base, ipheth_get_macaddr_#t~mem188#1.offset, ipheth_get_macaddr_#t~ret189#1, ipheth_get_macaddr_#t~nondet190#1, ipheth_get_macaddr_#t~mem191#1.base, ipheth_get_macaddr_#t~mem191#1.offset, ipheth_get_macaddr_#t~nondet192#1, ipheth_get_macaddr_#t~mem193#1.base, ipheth_get_macaddr_#t~mem193#1.offset, ipheth_get_macaddr_#t~mem194#1.base, ipheth_get_macaddr_#t~mem194#1.offset, ipheth_get_macaddr_#t~mem195#1.base, ipheth_get_macaddr_#t~mem195#1.offset, ipheth_get_macaddr_#t~memcpy~res196#1.base, ipheth_get_macaddr_#t~memcpy~res196#1.offset, ipheth_get_macaddr_#t~mem197#1.base, ipheth_get_macaddr_#t~mem197#1.offset, ipheth_get_macaddr_#t~mem198#1.base, ipheth_get_macaddr_#t~mem198#1.offset, ipheth_get_macaddr_#t~memcpy~res199#1.base, ipheth_get_macaddr_#t~memcpy~res199#1.offset, ipheth_get_macaddr_~dev#1.base, ipheth_get_macaddr_~dev#1.offset, ipheth_get_macaddr_~udev~1#1.base, ipheth_get_macaddr_~udev~1#1.offset, ipheth_get_macaddr_~net~0#1.base, ipheth_get_macaddr_~net~0#1.offset, ipheth_get_macaddr_~retval~1#1, ipheth_get_macaddr_~tmp~19#1, ipheth_get_macaddr_~__len~1#1, ipheth_get_macaddr_~__ret~1#1.base, ipheth_get_macaddr_~__ret~1#1.offset;ipheth_get_macaddr_~dev#1.base, ipheth_get_macaddr_~dev#1.offset := ipheth_get_macaddr_#in~dev#1.base, ipheth_get_macaddr_#in~dev#1.offset;havoc ipheth_get_macaddr_~udev~1#1.base, ipheth_get_macaddr_~udev~1#1.offset;havoc ipheth_get_macaddr_~net~0#1.base, ipheth_get_macaddr_~net~0#1.offset;havoc ipheth_get_macaddr_~retval~1#1;havoc ipheth_get_macaddr_~tmp~19#1;havoc ipheth_get_macaddr_~__len~1#1;havoc ipheth_get_macaddr_~__ret~1#1.base, ipheth_get_macaddr_~__ret~1#1.offset;call ipheth_get_macaddr_#t~mem185#1.base, ipheth_get_macaddr_#t~mem185#1.offset := read~$Pointer$(ipheth_get_macaddr_~dev#1.base, ipheth_get_macaddr_~dev#1.offset, 8);ipheth_get_macaddr_~udev~1#1.base, ipheth_get_macaddr_~udev~1#1.offset := ipheth_get_macaddr_#t~mem185#1.base, ipheth_get_macaddr_#t~mem185#1.offset;havoc ipheth_get_macaddr_#t~mem185#1.base, ipheth_get_macaddr_#t~mem185#1.offset;call ipheth_get_macaddr_#t~mem186#1.base, ipheth_get_macaddr_#t~mem186#1.offset := read~$Pointer$(ipheth_get_macaddr_~dev#1.base, 16 + ipheth_get_macaddr_~dev#1.offset, 8);ipheth_get_macaddr_~net~0#1.base, ipheth_get_macaddr_~net~0#1.offset := ipheth_get_macaddr_#t~mem186#1.base, ipheth_get_macaddr_#t~mem186#1.offset;havoc ipheth_get_macaddr_#t~mem186#1.base, ipheth_get_macaddr_#t~mem186#1.offset; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,679 INFO L272 TraceCheckUtils]: 92: Hoare triple {108442#(= ~ref_cnt~0 0)} call ipheth_get_macaddr_#t~ret187#1 := __create_pipe(ipheth_get_macaddr_~udev~1#1.base, ipheth_get_macaddr_~udev~1#1.offset, 0); {108428#true} is VALID [2022-02-20 21:52:25,679 INFO L290 TraceCheckUtils]: 93: Hoare triple {108428#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;~endpoint := #in~endpoint;call #t~mem74 := read~int(~dev.base, ~dev.offset, 4);#res := (if (1 == 256 * #t~mem74 || 0 == 256 * #t~mem74) && 0 == 32768 * ~endpoint then 256 * #t~mem74 else (if 0 == 256 * #t~mem74 && (1 == 32768 * ~endpoint || 0 == 32768 * ~endpoint) then 32768 * ~endpoint else (if (1 == 256 * #t~mem74 && (1 == 32768 * ~endpoint || 0 == 32768 * ~endpoint)) || ((1 == 256 * #t~mem74 || 0 == 256 * #t~mem74) && 1 == 32768 * ~endpoint) then 1 else ~bitwiseOr(256 * #t~mem74, 32768 * ~endpoint))));havoc #t~mem74; {108428#true} is VALID [2022-02-20 21:52:25,679 INFO L290 TraceCheckUtils]: 94: Hoare triple {108428#true} assume true; {108428#true} is VALID [2022-02-20 21:52:25,680 INFO L284 TraceCheckUtils]: 95: Hoare quadruple {108428#true} {108442#(= ~ref_cnt~0 0)} #1225#return; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,680 INFO L290 TraceCheckUtils]: 96: Hoare triple {108442#(= ~ref_cnt~0 0)} ipheth_get_macaddr_~tmp~19#1 := ipheth_get_macaddr_#t~ret187#1;havoc ipheth_get_macaddr_#t~ret187#1;call ipheth_get_macaddr_#t~mem188#1.base, ipheth_get_macaddr_#t~mem188#1.offset := read~$Pointer$(ipheth_get_macaddr_~dev#1.base, 64 + ipheth_get_macaddr_~dev#1.offset, 8); {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,680 INFO L272 TraceCheckUtils]: 97: Hoare triple {108442#(= ~ref_cnt~0 0)} call ipheth_get_macaddr_#t~ret189#1 := usb_control_msg(ipheth_get_macaddr_~udev~1#1.base, ipheth_get_macaddr_~udev~1#1.offset, ~bitwiseOr(ipheth_get_macaddr_~tmp~19#1, 2147483776), 0, 192, 0, 2, ipheth_get_macaddr_#t~mem188#1.base, ipheth_get_macaddr_#t~mem188#1.offset, 64, 1250); {108428#true} is VALID [2022-02-20 21:52:25,680 INFO L290 TraceCheckUtils]: 98: Hoare triple {108428#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1 := #in~arg1;~arg2 := #in~arg2;~arg3 := #in~arg3;~arg4 := #in~arg4;~arg5 := #in~arg5;~arg6.base, ~arg6.offset := #in~arg6.base, #in~arg6.offset;~arg7 := #in~arg7;~arg8 := #in~arg8;assume -2147483648 <= #t~nondet364 && #t~nondet364 <= 2147483647;#res := #t~nondet364;havoc #t~nondet364; {108428#true} is VALID [2022-02-20 21:52:25,680 INFO L290 TraceCheckUtils]: 99: Hoare triple {108428#true} assume true; {108428#true} is VALID [2022-02-20 21:52:25,681 INFO L284 TraceCheckUtils]: 100: Hoare quadruple {108428#true} {108442#(= ~ref_cnt~0 0)} #1227#return; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,682 INFO L290 TraceCheckUtils]: 101: Hoare triple {108442#(= ~ref_cnt~0 0)} assume -2147483648 <= ipheth_get_macaddr_#t~ret189#1 && ipheth_get_macaddr_#t~ret189#1 <= 2147483647;ipheth_get_macaddr_~retval~1#1 := ipheth_get_macaddr_#t~ret189#1;havoc ipheth_get_macaddr_#t~mem188#1.base, ipheth_get_macaddr_#t~mem188#1.offset;havoc ipheth_get_macaddr_#t~ret189#1; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,682 INFO L290 TraceCheckUtils]: 102: Hoare triple {108442#(= ~ref_cnt~0 0)} assume ipheth_get_macaddr_~retval~1#1 < 0;havoc ipheth_get_macaddr_#t~nondet190#1;call ipheth_get_macaddr_#t~mem191#1.base, ipheth_get_macaddr_#t~mem191#1.offset := read~$Pointer$(ipheth_get_macaddr_~dev#1.base, 8 + ipheth_get_macaddr_~dev#1.offset, 8);havoc ipheth_get_macaddr_#t~mem191#1.base, ipheth_get_macaddr_#t~mem191#1.offset; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,682 INFO L290 TraceCheckUtils]: 103: Hoare triple {108442#(= ~ref_cnt~0 0)} ipheth_get_macaddr_#res#1 := ipheth_get_macaddr_~retval~1#1; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,682 INFO L290 TraceCheckUtils]: 104: Hoare triple {108442#(= ~ref_cnt~0 0)} ipheth_probe_#t~ret289#1 := ipheth_get_macaddr_#res#1;assume { :end_inline_ipheth_get_macaddr } true;assume -2147483648 <= ipheth_probe_#t~ret289#1 && ipheth_probe_#t~ret289#1 <= 2147483647;ipheth_probe_~retval~5#1 := ipheth_probe_#t~ret289#1;havoc ipheth_probe_#t~ret289#1; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,682 INFO L290 TraceCheckUtils]: 105: Hoare triple {108442#(= ~ref_cnt~0 0)} assume !(0 != ipheth_probe_~retval~5#1);assume { :begin_inline___init_work } true;__init_work_#in~arg0#1.base, __init_work_#in~arg0#1.offset, __init_work_#in~arg1#1 := ipheth_probe_~dev~8#1.base, 74 + ipheth_probe_~dev~8#1.offset, 0;havoc __init_work_~arg0#1.base, __init_work_~arg0#1.offset, __init_work_~arg1#1;__init_work_~arg0#1.base, __init_work_~arg0#1.offset := __init_work_#in~arg0#1.base, __init_work_#in~arg0#1.offset;__init_work_~arg1#1 := __init_work_#in~arg1#1; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,683 INFO L290 TraceCheckUtils]: 106: Hoare triple {108442#(= ~ref_cnt~0 0)} assume { :end_inline___init_work } true;call write~int(137438953408, ipheth_probe_~#__constr_expr_0~0#1.base, ipheth_probe_~#__constr_expr_0~0#1.offset, 8);call ipheth_probe_#t~mem290#1 := read~int(ipheth_probe_~#__constr_expr_0~0#1.base, ipheth_probe_~#__constr_expr_0~0#1.offset, 8);call write~int(ipheth_probe_#t~mem290#1, ipheth_probe_~dev~8#1.base, 74 + ipheth_probe_~dev~8#1.offset, 8);havoc ipheth_probe_#t~mem290#1;assume { :begin_inline_lockdep_init_map } true;lockdep_init_map_#in~arg0#1.base, lockdep_init_map_#in~arg0#1.offset, lockdep_init_map_#in~arg1#1.base, lockdep_init_map_#in~arg1#1.offset, lockdep_init_map_#in~arg2#1.base, lockdep_init_map_#in~arg2#1.offset, lockdep_init_map_#in~arg3#1 := ipheth_probe_~dev~8#1.base, 106 + ipheth_probe_~dev~8#1.offset, 29, 0, ipheth_probe_~#__key~0#1.base, ipheth_probe_~#__key~0#1.offset, 0;havoc lockdep_init_map_~arg0#1.base, lockdep_init_map_~arg0#1.offset, lockdep_init_map_~arg1#1.base, lockdep_init_map_~arg1#1.offset, lockdep_init_map_~arg2#1.base, lockdep_init_map_~arg2#1.offset, lockdep_init_map_~arg3#1;lockdep_init_map_~arg0#1.base, lockdep_init_map_~arg0#1.offset := lockdep_init_map_#in~arg0#1.base, lockdep_init_map_#in~arg0#1.offset;lockdep_init_map_~arg1#1.base, lockdep_init_map_~arg1#1.offset := lockdep_init_map_#in~arg1#1.base, lockdep_init_map_#in~arg1#1.offset;lockdep_init_map_~arg2#1.base, lockdep_init_map_~arg2#1.offset := lockdep_init_map_#in~arg2#1.base, lockdep_init_map_#in~arg2#1.offset;lockdep_init_map_~arg3#1 := lockdep_init_map_#in~arg3#1; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,683 INFO L290 TraceCheckUtils]: 107: Hoare triple {108442#(= ~ref_cnt~0 0)} assume { :end_inline_lockdep_init_map } true;assume { :begin_inline_INIT_LIST_HEAD } true;INIT_LIST_HEAD_#in~list#1.base, INIT_LIST_HEAD_#in~list#1.offset := ipheth_probe_~dev~8#1.base, 82 + ipheth_probe_~dev~8#1.offset;havoc INIT_LIST_HEAD_~list#1.base, INIT_LIST_HEAD_~list#1.offset;INIT_LIST_HEAD_~list#1.base, INIT_LIST_HEAD_~list#1.offset := INIT_LIST_HEAD_#in~list#1.base, INIT_LIST_HEAD_#in~list#1.offset;call write~$Pointer$(INIT_LIST_HEAD_~list#1.base, INIT_LIST_HEAD_~list#1.offset, INIT_LIST_HEAD_~list#1.base, INIT_LIST_HEAD_~list#1.offset, 8);call write~$Pointer$(INIT_LIST_HEAD_~list#1.base, INIT_LIST_HEAD_~list#1.offset, INIT_LIST_HEAD_~list#1.base, 8 + INIT_LIST_HEAD_~list#1.offset, 8); {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,683 INFO L290 TraceCheckUtils]: 108: Hoare triple {108442#(= ~ref_cnt~0 0)} assume { :end_inline_INIT_LIST_HEAD } true;call write~$Pointer$(#funAddr~ipheth_carrier_check_work.base, #funAddr~ipheth_carrier_check_work.offset, ipheth_probe_~dev~8#1.base, 98 + ipheth_probe_~dev~8#1.offset, 8);assume { :begin_inline_init_timer_key } true;init_timer_key_#in~arg0#1.base, init_timer_key_#in~arg0#1.offset, init_timer_key_#in~arg1#1, init_timer_key_#in~arg2#1.base, init_timer_key_#in~arg2#1.offset, init_timer_key_#in~arg3#1.base, init_timer_key_#in~arg3#1.offset := ipheth_probe_~dev~8#1.base, 150 + ipheth_probe_~dev~8#1.offset, 2, 30, 0, ipheth_probe_~#__key___0~0#1.base, ipheth_probe_~#__key___0~0#1.offset;havoc init_timer_key_~arg0#1.base, init_timer_key_~arg0#1.offset, init_timer_key_~arg1#1, init_timer_key_~arg2#1.base, init_timer_key_~arg2#1.offset, init_timer_key_~arg3#1.base, init_timer_key_~arg3#1.offset;init_timer_key_~arg0#1.base, init_timer_key_~arg0#1.offset := init_timer_key_#in~arg0#1.base, init_timer_key_#in~arg0#1.offset;init_timer_key_~arg1#1 := init_timer_key_#in~arg1#1;init_timer_key_~arg2#1.base, init_timer_key_~arg2#1.offset := init_timer_key_#in~arg2#1.base, init_timer_key_#in~arg2#1.offset;init_timer_key_~arg3#1.base, init_timer_key_~arg3#1.offset := init_timer_key_#in~arg3#1.base, init_timer_key_#in~arg3#1.offset; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,684 INFO L290 TraceCheckUtils]: 109: Hoare triple {108442#(= ~ref_cnt~0 0)} assume { :end_inline_init_timer_key } true;call write~$Pointer$(#funAddr~delayed_work_timer_fn.base, #funAddr~delayed_work_timer_fn.offset, ipheth_probe_~dev~8#1.base, 182 + ipheth_probe_~dev~8#1.offset, 8);call write~int(ipheth_probe_~dev~8#1.base + (74 + ipheth_probe_~dev~8#1.offset), ipheth_probe_~dev~8#1.base, 190 + ipheth_probe_~dev~8#1.offset, 8);assume { :begin_inline_ipheth_alloc_urbs } true;ipheth_alloc_urbs_#in~iphone#1.base, ipheth_alloc_urbs_#in~iphone#1.offset := ipheth_probe_~dev~8#1.base, ipheth_probe_~dev~8#1.offset;havoc ipheth_alloc_urbs_#res#1;havoc ipheth_alloc_urbs_#t~ret116#1.base, ipheth_alloc_urbs_#t~ret116#1.offset, ipheth_alloc_urbs_#t~ret117#1.base, ipheth_alloc_urbs_#t~ret117#1.offset, ipheth_alloc_urbs_#t~mem118#1.base, ipheth_alloc_urbs_#t~mem118#1.offset, ipheth_alloc_urbs_#t~ret119#1.base, ipheth_alloc_urbs_#t~ret119#1.offset, ipheth_alloc_urbs_#t~mem120#1.base, ipheth_alloc_urbs_#t~mem120#1.offset, ipheth_alloc_urbs_#t~ret121#1.base, ipheth_alloc_urbs_#t~ret121#1.offset, ipheth_alloc_urbs_#t~mem122#1.base, ipheth_alloc_urbs_#t~mem122#1.offset, ipheth_alloc_urbs_#t~mem123#1, ipheth_alloc_urbs_~iphone#1.base, ipheth_alloc_urbs_~iphone#1.offset, ipheth_alloc_urbs_~tx_urb~0#1.base, ipheth_alloc_urbs_~tx_urb~0#1.offset, ipheth_alloc_urbs_~rx_urb~0#1.base, ipheth_alloc_urbs_~rx_urb~0#1.offset, ipheth_alloc_urbs_~tx_buf~0#1.base, ipheth_alloc_urbs_~tx_buf~0#1.offset, ipheth_alloc_urbs_~rx_buf~0#1.base, ipheth_alloc_urbs_~rx_buf~0#1.offset, ipheth_alloc_urbs_~tmp~16#1.base, ipheth_alloc_urbs_~tmp~16#1.offset, ipheth_alloc_urbs_~tmp___0~6#1.base, ipheth_alloc_urbs_~tmp___0~6#1.offset;ipheth_alloc_urbs_~iphone#1.base, ipheth_alloc_urbs_~iphone#1.offset := ipheth_alloc_urbs_#in~iphone#1.base, ipheth_alloc_urbs_#in~iphone#1.offset;havoc ipheth_alloc_urbs_~tx_urb~0#1.base, ipheth_alloc_urbs_~tx_urb~0#1.offset;havoc ipheth_alloc_urbs_~rx_urb~0#1.base, ipheth_alloc_urbs_~rx_urb~0#1.offset;havoc ipheth_alloc_urbs_~tx_buf~0#1.base, ipheth_alloc_urbs_~tx_buf~0#1.offset;havoc ipheth_alloc_urbs_~rx_buf~0#1.base, ipheth_alloc_urbs_~rx_buf~0#1.offset;havoc ipheth_alloc_urbs_~tmp~16#1.base, ipheth_alloc_urbs_~tmp~16#1.offset;havoc ipheth_alloc_urbs_~tmp___0~6#1.base, ipheth_alloc_urbs_~tmp___0~6#1.offset;ipheth_alloc_urbs_~tx_urb~0#1.base, ipheth_alloc_urbs_~tx_urb~0#1.offset := 0, 0;ipheth_alloc_urbs_~rx_urb~0#1.base, ipheth_alloc_urbs_~rx_urb~0#1.offset := 0, 0;ipheth_alloc_urbs_~tx_buf~0#1.base, ipheth_alloc_urbs_~tx_buf~0#1.offset := 0, 0;ipheth_alloc_urbs_~rx_buf~0#1.base, ipheth_alloc_urbs_~rx_buf~0#1.offset := 0, 0;assume { :begin_inline_ldv_usb_alloc_urb_2 } true;ldv_usb_alloc_urb_2_#in~iso_packets#1, ldv_usb_alloc_urb_2_#in~mem_flags#1 := 0, 208;havoc ldv_usb_alloc_urb_2_#res#1.base, ldv_usb_alloc_urb_2_#res#1.offset;havoc ldv_usb_alloc_urb_2_#t~ret327#1.base, ldv_usb_alloc_urb_2_#t~ret327#1.offset, ldv_usb_alloc_urb_2_~iso_packets#1, ldv_usb_alloc_urb_2_~mem_flags#1, ldv_usb_alloc_urb_2_~tmp~33#1.base, ldv_usb_alloc_urb_2_~tmp~33#1.offset;ldv_usb_alloc_urb_2_~iso_packets#1 := ldv_usb_alloc_urb_2_#in~iso_packets#1;ldv_usb_alloc_urb_2_~mem_flags#1 := ldv_usb_alloc_urb_2_#in~mem_flags#1;havoc ldv_usb_alloc_urb_2_~tmp~33#1.base, ldv_usb_alloc_urb_2_~tmp~33#1.offset; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,684 INFO L272 TraceCheckUtils]: 110: Hoare triple {108442#(= ~ref_cnt~0 0)} call ldv_usb_alloc_urb_2_#t~ret327#1.base, ldv_usb_alloc_urb_2_#t~ret327#1.offset := ldv_alloc_urb(); {108498#(and (= |old(#length)| |#length|) (= ~usb_urb~0.base |old(~usb_urb~0.base)|) (= ~usb_urb~0.offset |old(~usb_urb~0.offset)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:25,684 INFO L290 TraceCheckUtils]: 111: Hoare triple {108498#(and (= |old(#length)| |#length|) (= ~usb_urb~0.base |old(~usb_urb~0.base)|) (= ~usb_urb~0.offset |old(~usb_urb~0.offset)|) (= |old(#valid)| |#valid|))} havoc ~value~0.base, ~value~0.offset;havoc ~tmp~40.base, ~tmp~40.offset;havoc ~tmp___0~13; {108428#true} is VALID [2022-02-20 21:52:25,684 INFO L272 TraceCheckUtils]: 112: Hoare triple {108428#true} call #t~ret334.base, #t~ret334.offset := ldv_malloc(184); {108497#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:52:25,685 INFO L290 TraceCheckUtils]: 113: Hoare triple {108497#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet79 && #t~nondet79 <= 2147483647;~tmp___0~2 := #t~nondet79;havoc #t~nondet79; {108428#true} is VALID [2022-02-20 21:52:25,685 INFO L290 TraceCheckUtils]: 114: Hoare triple {108428#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {108428#true} is VALID [2022-02-20 21:52:25,685 INFO L290 TraceCheckUtils]: 115: Hoare triple {108428#true} assume true; {108428#true} is VALID [2022-02-20 21:52:25,685 INFO L284 TraceCheckUtils]: 116: Hoare quadruple {108428#true} {108428#true} #1173#return; {108428#true} is VALID [2022-02-20 21:52:25,685 INFO L290 TraceCheckUtils]: 117: Hoare triple {108428#true} ~tmp~40.base, ~tmp~40.offset := #t~ret334.base, #t~ret334.offset;havoc #t~ret334.base, #t~ret334.offset;~value~0.base, ~value~0.offset := ~tmp~40.base, ~tmp~40.offset; {108428#true} is VALID [2022-02-20 21:52:25,685 INFO L272 TraceCheckUtils]: 118: Hoare triple {108428#true} call #t~ret335 := ldv_undef_int(); {108428#true} is VALID [2022-02-20 21:52:25,685 INFO L290 TraceCheckUtils]: 119: Hoare triple {108428#true} havoc ~tmp~6;assume -2147483648 <= #t~nondet83 && #t~nondet83 <= 2147483647;~tmp~6 := #t~nondet83;havoc #t~nondet83;#res := ~tmp~6; {108428#true} is VALID [2022-02-20 21:52:25,685 INFO L290 TraceCheckUtils]: 120: Hoare triple {108428#true} assume true; {108428#true} is VALID [2022-02-20 21:52:25,685 INFO L284 TraceCheckUtils]: 121: Hoare quadruple {108428#true} {108428#true} #1175#return; {108428#true} is VALID [2022-02-20 21:52:25,685 INFO L290 TraceCheckUtils]: 122: Hoare triple {108428#true} assume -2147483648 <= #t~ret335 && #t~ret335 <= 2147483647;~tmp___0~13 := #t~ret335;havoc #t~ret335; {108428#true} is VALID [2022-02-20 21:52:25,685 INFO L290 TraceCheckUtils]: 123: Hoare triple {108428#true} assume 0 != ~tmp___0~13; {108428#true} is VALID [2022-02-20 21:52:25,685 INFO L290 TraceCheckUtils]: 124: Hoare triple {108428#true} assume 0 != (~value~0.base + ~value~0.offset) % 18446744073709551616;~usb_urb~0.base, ~usb_urb~0.offset := ~value~0.base, ~value~0.offset; {108428#true} is VALID [2022-02-20 21:52:25,685 INFO L290 TraceCheckUtils]: 125: Hoare triple {108428#true} #res.base, #res.offset := ~usb_urb~0.base, ~usb_urb~0.offset; {108428#true} is VALID [2022-02-20 21:52:25,685 INFO L290 TraceCheckUtils]: 126: Hoare triple {108428#true} assume true; {108428#true} is VALID [2022-02-20 21:52:25,686 INFO L284 TraceCheckUtils]: 127: Hoare quadruple {108428#true} {108442#(= ~ref_cnt~0 0)} #1233#return; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,686 INFO L290 TraceCheckUtils]: 128: Hoare triple {108442#(= ~ref_cnt~0 0)} ldv_usb_alloc_urb_2_~tmp~33#1.base, ldv_usb_alloc_urb_2_~tmp~33#1.offset := ldv_usb_alloc_urb_2_#t~ret327#1.base, ldv_usb_alloc_urb_2_#t~ret327#1.offset;havoc ldv_usb_alloc_urb_2_#t~ret327#1.base, ldv_usb_alloc_urb_2_#t~ret327#1.offset;ldv_usb_alloc_urb_2_#res#1.base, ldv_usb_alloc_urb_2_#res#1.offset := ldv_usb_alloc_urb_2_~tmp~33#1.base, ldv_usb_alloc_urb_2_~tmp~33#1.offset; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,686 INFO L290 TraceCheckUtils]: 129: Hoare triple {108442#(= ~ref_cnt~0 0)} ipheth_alloc_urbs_#t~ret116#1.base, ipheth_alloc_urbs_#t~ret116#1.offset := ldv_usb_alloc_urb_2_#res#1.base, ldv_usb_alloc_urb_2_#res#1.offset;assume { :end_inline_ldv_usb_alloc_urb_2 } true;ipheth_alloc_urbs_~tx_urb~0#1.base, ipheth_alloc_urbs_~tx_urb~0#1.offset := ipheth_alloc_urbs_#t~ret116#1.base, ipheth_alloc_urbs_#t~ret116#1.offset;havoc ipheth_alloc_urbs_#t~ret116#1.base, ipheth_alloc_urbs_#t~ret116#1.offset; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,686 INFO L290 TraceCheckUtils]: 130: Hoare triple {108442#(= ~ref_cnt~0 0)} assume 0 == (ipheth_alloc_urbs_~tx_urb~0#1.base + ipheth_alloc_urbs_~tx_urb~0#1.offset) % 18446744073709551616; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,687 INFO L290 TraceCheckUtils]: 131: Hoare triple {108442#(= ~ref_cnt~0 0)} ipheth_alloc_urbs_#res#1 := -12; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,687 INFO L290 TraceCheckUtils]: 132: Hoare triple {108442#(= ~ref_cnt~0 0)} ipheth_probe_#t~ret291#1 := ipheth_alloc_urbs_#res#1;assume { :end_inline_ipheth_alloc_urbs } true;assume -2147483648 <= ipheth_probe_#t~ret291#1 && ipheth_probe_#t~ret291#1 <= 2147483647;ipheth_probe_~retval~5#1 := ipheth_probe_#t~ret291#1;havoc ipheth_probe_#t~ret291#1; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,687 INFO L290 TraceCheckUtils]: 133: Hoare triple {108442#(= ~ref_cnt~0 0)} assume 0 != ipheth_probe_~retval~5#1;havoc ipheth_probe_#t~nondet292#1; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,687 INFO L290 TraceCheckUtils]: 134: Hoare triple {108442#(= ~ref_cnt~0 0)} call ipheth_probe_#t~mem296#1.base, ipheth_probe_#t~mem296#1.offset := read~$Pointer$(ipheth_probe_~dev~8#1.base, 64 + ipheth_probe_~dev~8#1.offset, 8); {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,688 INFO L272 TraceCheckUtils]: 135: Hoare triple {108442#(= ~ref_cnt~0 0)} call kfree(ipheth_probe_#t~mem296#1.base, ipheth_probe_#t~mem296#1.offset); {108506#(= |old(#valid)| |#valid|)} is VALID [2022-02-20 21:52:25,688 INFO L290 TraceCheckUtils]: 136: Hoare triple {108506#(= |old(#valid)| |#valid|)} ~p.base, ~p.offset := #in~p.base, #in~p.offset;call ULTIMATE.dealloc(~p.base, ~p.offset); {108428#true} is VALID [2022-02-20 21:52:25,688 INFO L290 TraceCheckUtils]: 137: Hoare triple {108428#true} assume true; {108428#true} is VALID [2022-02-20 21:52:25,689 INFO L284 TraceCheckUtils]: 138: Hoare quadruple {108428#true} {108442#(= ~ref_cnt~0 0)} #1253#return; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,689 INFO L290 TraceCheckUtils]: 139: Hoare triple {108442#(= ~ref_cnt~0 0)} havoc ipheth_probe_#t~mem296#1.base, ipheth_probe_#t~mem296#1.offset; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,689 INFO L290 TraceCheckUtils]: 140: Hoare triple {108442#(= ~ref_cnt~0 0)} assume { :begin_inline_ldv_free_netdev_14 } true;ldv_free_netdev_14_#in~dev#1.base, ldv_free_netdev_14_#in~dev#1.offset := ipheth_probe_~netdev~0#1.base, ipheth_probe_~netdev~0#1.offset;havoc ldv_free_netdev_14_~dev#1.base, ldv_free_netdev_14_~dev#1.offset;ldv_free_netdev_14_~dev#1.base, ldv_free_netdev_14_~dev#1.offset := ldv_free_netdev_14_#in~dev#1.base, ldv_free_netdev_14_#in~dev#1.offset; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,689 INFO L272 TraceCheckUtils]: 141: Hoare triple {108442#(= ~ref_cnt~0 0)} call free_netdev(ldv_free_netdev_14_~dev#1.base, ldv_free_netdev_14_~dev#1.offset); {108428#true} is VALID [2022-02-20 21:52:25,689 INFO L290 TraceCheckUtils]: 142: Hoare triple {108428#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset; {108428#true} is VALID [2022-02-20 21:52:25,689 INFO L290 TraceCheckUtils]: 143: Hoare triple {108428#true} assume true; {108428#true} is VALID [2022-02-20 21:52:25,690 INFO L284 TraceCheckUtils]: 144: Hoare quadruple {108428#true} {108442#(= ~ref_cnt~0 0)} #1255#return; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,690 INFO L290 TraceCheckUtils]: 145: Hoare triple {108442#(= ~ref_cnt~0 0)} ~ldv_state_variable_2~0 := 0; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,690 INFO L290 TraceCheckUtils]: 146: Hoare triple {108442#(= ~ref_cnt~0 0)} assume { :end_inline_ldv_free_netdev_14 } true;ipheth_probe_#res#1 := ipheth_probe_~retval~5#1;call ULTIMATE.dealloc(ipheth_probe_~#__key~0#1.base, ipheth_probe_~#__key~0#1.offset);havoc ipheth_probe_~#__key~0#1.base, ipheth_probe_~#__key~0#1.offset;call ULTIMATE.dealloc(ipheth_probe_~#__constr_expr_0~0#1.base, ipheth_probe_~#__constr_expr_0~0#1.offset);havoc ipheth_probe_~#__constr_expr_0~0#1.base, ipheth_probe_~#__constr_expr_0~0#1.offset;call ULTIMATE.dealloc(ipheth_probe_~#__key___0~0#1.base, ipheth_probe_~#__key___0~0#1.offset);havoc ipheth_probe_~#__key___0~0#1.base, ipheth_probe_~#__key___0~0#1.offset; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,691 INFO L290 TraceCheckUtils]: 147: Hoare triple {108442#(= ~ref_cnt~0 0)} main_#t~ret312#1 := ipheth_probe_#res#1;assume { :end_inline_ipheth_probe } true;assume -2147483648 <= main_#t~ret312#1 && main_#t~ret312#1 <= 2147483647;~ldv_retval_0~0 := main_#t~ret312#1;havoc main_#t~ret312#1; {108442#(= ~ref_cnt~0 0)} is VALID [2022-02-20 21:52:25,691 INFO L290 TraceCheckUtils]: 148: Hoare triple {108442#(= ~ref_cnt~0 0)} assume 0 == ~ldv_retval_0~0;~ldv_state_variable_1~0 := 2;~ref_cnt~0 := 1 + ~ref_cnt~0; {108495#(<= 1 ~ref_cnt~0)} is VALID [2022-02-20 21:52:25,691 INFO L290 TraceCheckUtils]: 149: Hoare triple {108495#(<= 1 ~ref_cnt~0)} assume -2147483648 <= main_#t~nondet308#1 && main_#t~nondet308#1 <= 2147483647;main_~tmp___2~2#1 := main_#t~nondet308#1;havoc main_#t~nondet308#1;main_#t~switch309#1 := 0 == main_~tmp___2~2#1; {108495#(<= 1 ~ref_cnt~0)} is VALID [2022-02-20 21:52:25,692 INFO L290 TraceCheckUtils]: 150: Hoare triple {108495#(<= 1 ~ref_cnt~0)} assume !main_#t~switch309#1;main_#t~switch309#1 := main_#t~switch309#1 || 1 == main_~tmp___2~2#1; {108495#(<= 1 ~ref_cnt~0)} is VALID [2022-02-20 21:52:25,692 INFO L290 TraceCheckUtils]: 151: Hoare triple {108495#(<= 1 ~ref_cnt~0)} assume main_#t~switch309#1; {108495#(<= 1 ~ref_cnt~0)} is VALID [2022-02-20 21:52:25,692 INFO L290 TraceCheckUtils]: 152: Hoare triple {108495#(<= 1 ~ref_cnt~0)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet313#1 && main_#t~nondet313#1 <= 2147483647;main_~tmp___4~0#1 := main_#t~nondet313#1;havoc main_#t~nondet313#1;main_#t~switch314#1 := 0 == main_~tmp___4~0#1; {108495#(<= 1 ~ref_cnt~0)} is VALID [2022-02-20 21:52:25,692 INFO L290 TraceCheckUtils]: 153: Hoare triple {108495#(<= 1 ~ref_cnt~0)} assume main_#t~switch314#1; {108495#(<= 1 ~ref_cnt~0)} is VALID [2022-02-20 21:52:25,693 INFO L290 TraceCheckUtils]: 154: Hoare triple {108495#(<= 1 ~ref_cnt~0)} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0;assume { :begin_inline_ipheth_driver_exit } true;assume { :begin_inline_ldv_usb_deregister_20 } true;ldv_usb_deregister_20_#in~arg#1.base, ldv_usb_deregister_20_#in~arg#1.offset := ~#ipheth_driver~0.base, ~#ipheth_driver~0.offset;havoc ldv_usb_deregister_20_~arg#1.base, ldv_usb_deregister_20_~arg#1.offset;ldv_usb_deregister_20_~arg#1.base, ldv_usb_deregister_20_~arg#1.offset := ldv_usb_deregister_20_#in~arg#1.base, ldv_usb_deregister_20_#in~arg#1.offset;assume { :begin_inline_usb_deregister } true;usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset := ldv_usb_deregister_20_~arg#1.base, ldv_usb_deregister_20_~arg#1.offset;havoc usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset;usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset := usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset; {108429#false} is VALID [2022-02-20 21:52:25,693 INFO L290 TraceCheckUtils]: 155: Hoare triple {108429#false} assume { :end_inline_usb_deregister } true;~ldv_state_variable_1~0 := 0; {108429#false} is VALID [2022-02-20 21:52:25,693 INFO L290 TraceCheckUtils]: 156: Hoare triple {108429#false} assume { :end_inline_ldv_usb_deregister_20 } true; {108429#false} is VALID [2022-02-20 21:52:25,693 INFO L290 TraceCheckUtils]: 157: Hoare triple {108429#false} assume { :end_inline_ipheth_driver_exit } true;~ldv_state_variable_0~0 := 2; {108429#false} is VALID [2022-02-20 21:52:25,693 INFO L290 TraceCheckUtils]: 158: Hoare triple {108429#false} assume { :begin_inline_ldv_check_final_state } true; {108429#false} is VALID [2022-02-20 21:52:25,693 INFO L290 TraceCheckUtils]: 159: Hoare triple {108429#false} assume !(0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616); {108429#false} is VALID [2022-02-20 21:52:25,693 INFO L272 TraceCheckUtils]: 160: Hoare triple {108429#false} call ldv_error(); {108429#false} is VALID [2022-02-20 21:52:25,693 INFO L290 TraceCheckUtils]: 161: Hoare triple {108429#false} assume !false; {108429#false} is VALID [2022-02-20 21:52:25,694 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2022-02-20 21:52:25,694 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:52:25,694 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1869788899] [2022-02-20 21:52:25,694 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1869788899] provided 0 perfect and 1 imperfect interpolant sequences [2022-02-20 21:52:25,694 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [319339944] [2022-02-20 21:52:25,694 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:52:25,694 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-20 21:52:25,695 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-20 21:52:25,696 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-02-20 21:52:25,697 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-02-20 21:52:26,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:26,169 INFO L263 TraceCheckSpWp]: Trace formula consists of 2070 conjuncts, 4 conjunts are in the unsatisfiable core [2022-02-20 21:52:26,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:52:26,268 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-02-20 21:52:26,685 INFO L290 TraceCheckUtils]: 0: Hoare triple {108428#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(80, 2);call #Ultimate.allocInit(26, 3);call #Ultimate.allocInit(63, 4);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(24, 6);call #Ultimate.allocInit(28, 7);call #Ultimate.allocInit(24, 8);call #Ultimate.allocInit(20, 9);call #Ultimate.allocInit(24, 10);call #Ultimate.allocInit(25, 11);call #Ultimate.allocInit(19, 12);call #Ultimate.allocInit(25, 13);call #Ultimate.allocInit(19, 14);call #Ultimate.allocInit(45, 15);call #Ultimate.allocInit(19, 16);call #Ultimate.allocInit(24, 17);call #Ultimate.allocInit(17, 18);call #Ultimate.allocInit(217, 19);call #Ultimate.allocInit(29, 20);call #Ultimate.allocInit(10, 21);call #Ultimate.allocInit(24, 22);call #Ultimate.allocInit(10, 23);call #Ultimate.allocInit(16, 24);call #Ultimate.allocInit(18, 25);call #Ultimate.allocInit(6, 26);call write~init~int(101, 26, 0, 1);call write~init~int(116, 26, 1, 1);call write~init~int(104, 26, 2, 1);call write~init~int(37, 26, 3, 1);call write~init~int(100, 26, 4, 1);call write~init~int(0, 26, 5, 1);call #Ultimate.allocInit(45, 27);call #Ultimate.allocInit(26, 28);call #Ultimate.allocInit(30, 29);call #Ultimate.allocInit(31, 30);call #Ultimate.allocInit(27, 31);call #Ultimate.allocInit(30, 32);call #Ultimate.allocInit(43, 33);call #Ultimate.allocInit(44, 34);call #Ultimate.allocInit(7, 35);call write~init~int(105, 35, 0, 1);call write~init~int(112, 35, 1, 1);call write~init~int(104, 35, 2, 1);call write~init~int(101, 35, 3, 1);call write~init~int(116, 35, 4, 1);call write~init~int(104, 35, 5, 1);call write~init~int(0, 35, 6, 1);call #Ultimate.allocInit(7, 36);call write~init~int(105, 36, 0, 1);call write~init~int(112, 36, 1, 1);call write~init~int(104, 36, 2, 1);call write~init~int(101, 36, 3, 1);call write~init~int(116, 36, 4, 1);call write~init~int(104, 36, 5, 1);call write~init~int(0, 36, 6, 1);~ldv_state_variable_3~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_2~0 := 0;~ipheth_netdev_ops_group1~0.base, ~ipheth_netdev_ops_group1~0.offset := 0, 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~ipheth_driver_group1~0.base, ~ipheth_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#ipheth_table~0.base, ~#ipheth_table~0.offset := 37, 0;call #Ultimate.allocInit(250, 37);call write~init~int(899, ~#ipheth_table~0.base, ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 2 + ~#ipheth_table~0.offset, 2);call write~init~int(4752, ~#ipheth_table~0.base, 4 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 6 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 8 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 10 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 11 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 12 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 13 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 14 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 15 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 16 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 17 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 25 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 27 + ~#ipheth_table~0.offset, 2);call write~init~int(4754, ~#ipheth_table~0.base, 29 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 31 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 33 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 35 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 36 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 37 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 38 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 39 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 40 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 41 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 42 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 50 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 52 + ~#ipheth_table~0.offset, 2);call write~init~int(4756, ~#ipheth_table~0.base, 54 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 56 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 58 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 60 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 61 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 62 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 63 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 64 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 65 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 66 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 67 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 75 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 77 + ~#ipheth_table~0.offset, 2);call write~init~int(4759, ~#ipheth_table~0.base, 79 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 81 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 83 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 85 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 86 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 87 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 88 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 89 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 90 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 91 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 92 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 100 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 102 + ~#ipheth_table~0.offset, 2);call write~init~int(4762, ~#ipheth_table~0.base, 104 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 106 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 108 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 110 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 111 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 112 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 113 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 114 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 115 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 116 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 117 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 125 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 127 + ~#ipheth_table~0.offset, 2);call write~init~int(4779, ~#ipheth_table~0.base, 129 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 131 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 133 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 135 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 136 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 137 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 138 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 139 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 140 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 141 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 142 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 150 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 152 + ~#ipheth_table~0.offset, 2);call write~init~int(4764, ~#ipheth_table~0.base, 154 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 156 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 158 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 160 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 161 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 162 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 163 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 164 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 165 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 166 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 167 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 175 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 177 + ~#ipheth_table~0.offset, 2);call write~init~int(4768, ~#ipheth_table~0.base, 179 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 181 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 183 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 185 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 186 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 187 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 188 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 189 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 190 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 191 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 192 + ~#ipheth_table~0.offset, 8);call write~init~int(899, ~#ipheth_table~0.base, 200 + ~#ipheth_table~0.offset, 2);call write~init~int(1452, ~#ipheth_table~0.base, 202 + ~#ipheth_table~0.offset, 2);call write~init~int(4776, ~#ipheth_table~0.base, 204 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 206 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 208 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 210 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 211 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 212 + ~#ipheth_table~0.offset, 1);call write~init~int(255, ~#ipheth_table~0.base, 213 + ~#ipheth_table~0.offset, 1);call write~init~int(253, ~#ipheth_table~0.base, 214 + ~#ipheth_table~0.offset, 1);call write~init~int(1, ~#ipheth_table~0.base, 215 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 216 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 217 + ~#ipheth_table~0.offset, 8);call write~init~int(0, ~#ipheth_table~0.base, 225 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 227 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 229 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 231 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 233 + ~#ipheth_table~0.offset, 2);call write~init~int(0, ~#ipheth_table~0.base, 235 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 236 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 237 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 238 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 239 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 240 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 241 + ~#ipheth_table~0.offset, 1);call write~init~int(0, ~#ipheth_table~0.base, 242 + ~#ipheth_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.bInterfaceNumber := 0;~__mod_usb_device_table~0.driver_info := 0;~#ipheth_netdev_ops~0.base, ~#ipheth_netdev_ops~0.offset := 38, 0;call #Ultimate.allocInit(448, 38);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 8 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_open.base, #funAddr~ipheth_open.offset, ~#ipheth_netdev_ops~0.base, 16 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_close.base, #funAddr~ipheth_close.offset, ~#ipheth_netdev_ops~0.base, 24 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_tx.base, #funAddr~ipheth_tx.offset, ~#ipheth_netdev_ops~0.base, 32 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 40 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 48 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 56 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 64 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 72 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 80 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 88 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 96 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 104 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_tx_timeout.base, #funAddr~ipheth_tx_timeout.offset, ~#ipheth_netdev_ops~0.base, 112 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 120 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 128 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 136 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 144 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 152 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 160 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 168 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 176 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 184 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 192 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 200 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 208 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 216 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 224 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 232 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 240 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 248 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 256 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 264 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 272 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 280 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 288 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 296 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 304 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 312 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 320 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 328 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 336 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 344 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 352 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 360 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 368 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 376 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 384 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 392 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 400 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 408 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 416 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 424 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 432 + ~#ipheth_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_netdev_ops~0.base, 440 + ~#ipheth_netdev_ops~0.offset, 8);~#ipheth_driver~0.base, ~#ipheth_driver~0.offset := 39, 0;call #Ultimate.allocInit(285, 39);call write~init~$Pointer$(35, 0, ~#ipheth_driver~0.base, ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_probe.base, #funAddr~ipheth_probe.offset, ~#ipheth_driver~0.base, 8 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~ipheth_disconnect.base, #funAddr~ipheth_disconnect.offset, ~#ipheth_driver~0.base, 16 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 24 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 32 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 40 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 48 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 56 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 64 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(~#ipheth_table~0.base, ~#ipheth_table~0.offset, ~#ipheth_driver~0.base, 72 + ~#ipheth_driver~0.offset, 8);call write~init~int(0, ~#ipheth_driver~0.base, 80 + ~#ipheth_driver~0.offset, 4);call write~init~int(0, ~#ipheth_driver~0.base, 84 + ~#ipheth_driver~0.offset, 4);call write~init~int(0, ~#ipheth_driver~0.base, 88 + ~#ipheth_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 92 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 100 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 108 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 116 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 124 + ~#ipheth_driver~0.offset, 8);call write~init~int(0, ~#ipheth_driver~0.base, 132 + ~#ipheth_driver~0.offset, 4);call write~init~int(0, ~#ipheth_driver~0.base, 136 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 148 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 156 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 164 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 172 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 180 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 188 + ~#ipheth_driver~0.offset, 8);call write~init~int(0, ~#ipheth_driver~0.base, 196 + ~#ipheth_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 197 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 205 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 213 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 221 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 229 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 237 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 245 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 253 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 261 + ~#ipheth_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ipheth_driver~0.base, 269 + ~#ipheth_driver~0.offset, 8);call write~init~int(0, ~#ipheth_driver~0.base, 277 + ~#ipheth_driver~0.offset, 4);call write~init~int(0, ~#ipheth_driver~0.base, 281 + ~#ipheth_driver~0.offset, 1);call write~init~int(0, ~#ipheth_driver~0.base, 282 + ~#ipheth_driver~0.offset, 1);call write~init~int(1, ~#ipheth_driver~0.base, 283 + ~#ipheth_driver~0.offset, 1);call write~init~int(0, ~#ipheth_driver~0.base, 284 + ~#ipheth_driver~0.offset, 1);~ldv_retval_2~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {108428#true} is VALID [2022-02-20 21:52:26,686 INFO L290 TraceCheckUtils]: 1: Hoare triple {108428#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret305#1.base, main_#t~ret305#1.offset, main_#t~ret306#1.base, main_#t~ret306#1.offset, main_#t~ret307#1.base, main_#t~ret307#1.offset, main_#t~nondet308#1, main_#t~switch309#1, main_#t~nondet310#1, main_#t~switch311#1, main_#t~ret312#1, main_#t~nondet313#1, main_#t~switch314#1, main_#t~ret315#1, main_#t~nondet316#1, main_#t~switch317#1, main_#t~ret318#1, main_#t~nondet319#1, main_#t~switch320#1, main_#t~ret321#1, main_#t~ret322#1, main_#t~ret323#1, main_#t~ret324#1, main_#t~ret325#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~31#1.base, main_~tmp~31#1.offset, main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset, main_~tmp___0~12#1.base, main_~tmp___0~12#1.offset, main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset, main_~tmp___1~4#1.base, main_~tmp___1~4#1.offset, main_~tmp___2~2#1, main_~tmp___3~1#1, main_~tmp___4~0#1, main_~tmp___5~0#1, main_~tmp___6~0#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~31#1.base, main_~tmp~31#1.offset;havoc main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset;havoc main_~tmp___0~12#1.base, main_~tmp___0~12#1.offset;havoc main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset;havoc main_~tmp___1~4#1.base, main_~tmp___1~4#1.offset;havoc main_~tmp___2~2#1;havoc main_~tmp___3~1#1;havoc main_~tmp___4~0#1;havoc main_~tmp___5~0#1;havoc main_~tmp___6~0#1; {108428#true} is VALID [2022-02-20 21:52:26,686 INFO L272 TraceCheckUtils]: 2: Hoare triple {108428#true} call main_#t~ret305#1.base, main_#t~ret305#1.offset := ldv_zalloc(32); {108428#true} is VALID [2022-02-20 21:52:26,686 INFO L290 TraceCheckUtils]: 3: Hoare triple {108428#true} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {108428#true} is VALID [2022-02-20 21:52:26,686 INFO L290 TraceCheckUtils]: 4: Hoare triple {108428#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {108428#true} is VALID [2022-02-20 21:52:26,686 INFO L290 TraceCheckUtils]: 5: Hoare triple {108428#true} assume true; {108428#true} is VALID [2022-02-20 21:52:26,686 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {108428#true} {108428#true} #1203#return; {108428#true} is VALID [2022-02-20 21:52:26,686 INFO L290 TraceCheckUtils]: 7: Hoare triple {108428#true} main_~tmp~31#1.base, main_~tmp~31#1.offset := main_#t~ret305#1.base, main_#t~ret305#1.offset;havoc main_#t~ret305#1.base, main_#t~ret305#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~31#1.base, main_~tmp~31#1.offset; {108428#true} is VALID [2022-02-20 21:52:26,686 INFO L272 TraceCheckUtils]: 8: Hoare triple {108428#true} call main_#t~ret306#1.base, main_#t~ret306#1.offset := ldv_zalloc(3136); {108428#true} is VALID [2022-02-20 21:52:26,686 INFO L290 TraceCheckUtils]: 9: Hoare triple {108428#true} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {108428#true} is VALID [2022-02-20 21:52:26,687 INFO L290 TraceCheckUtils]: 10: Hoare triple {108428#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {108428#true} is VALID [2022-02-20 21:52:26,687 INFO L290 TraceCheckUtils]: 11: Hoare triple {108428#true} assume true; {108428#true} is VALID [2022-02-20 21:52:26,687 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {108428#true} {108428#true} #1205#return; {108428#true} is VALID [2022-02-20 21:52:26,687 INFO L290 TraceCheckUtils]: 13: Hoare triple {108428#true} main_~tmp___0~12#1.base, main_~tmp___0~12#1.offset := main_#t~ret306#1.base, main_#t~ret306#1.offset;havoc main_#t~ret306#1.base, main_#t~ret306#1.offset;main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset := main_~tmp___0~12#1.base, main_~tmp___0~12#1.offset; {108428#true} is VALID [2022-02-20 21:52:26,687 INFO L272 TraceCheckUtils]: 14: Hoare triple {108428#true} call main_#t~ret307#1.base, main_#t~ret307#1.offset := ldv_zalloc(240); {108428#true} is VALID [2022-02-20 21:52:26,687 INFO L290 TraceCheckUtils]: 15: Hoare triple {108428#true} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {108428#true} is VALID [2022-02-20 21:52:26,687 INFO L290 TraceCheckUtils]: 16: Hoare triple {108428#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {108428#true} is VALID [2022-02-20 21:52:26,687 INFO L290 TraceCheckUtils]: 17: Hoare triple {108428#true} assume true; {108428#true} is VALID [2022-02-20 21:52:26,688 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {108428#true} {108428#true} #1207#return; {108428#true} is VALID [2022-02-20 21:52:26,688 INFO L290 TraceCheckUtils]: 19: Hoare triple {108428#true} main_~tmp___1~4#1.base, main_~tmp___1~4#1.offset := main_#t~ret307#1.base, main_#t~ret307#1.offset;havoc main_#t~ret307#1.base, main_#t~ret307#1.offset;main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset := main_~tmp___1~4#1.base, main_~tmp___1~4#1.offset;assume { :begin_inline_ldv_initialize } true; {108428#true} is VALID [2022-02-20 21:52:26,688 INFO L290 TraceCheckUtils]: 20: Hoare triple {108428#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {108428#true} is VALID [2022-02-20 21:52:26,688 INFO L290 TraceCheckUtils]: 21: Hoare triple {108428#true} assume -2147483648 <= main_#t~nondet308#1 && main_#t~nondet308#1 <= 2147483647;main_~tmp___2~2#1 := main_#t~nondet308#1;havoc main_#t~nondet308#1;main_#t~switch309#1 := 0 == main_~tmp___2~2#1; {108428#true} is VALID [2022-02-20 21:52:26,688 INFO L290 TraceCheckUtils]: 22: Hoare triple {108428#true} assume !main_#t~switch309#1;main_#t~switch309#1 := main_#t~switch309#1 || 1 == main_~tmp___2~2#1; {108428#true} is VALID [2022-02-20 21:52:26,688 INFO L290 TraceCheckUtils]: 23: Hoare triple {108428#true} assume main_#t~switch309#1; {108428#true} is VALID [2022-02-20 21:52:26,688 INFO L290 TraceCheckUtils]: 24: Hoare triple {108428#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet313#1 && main_#t~nondet313#1 <= 2147483647;main_~tmp___4~0#1 := main_#t~nondet313#1;havoc main_#t~nondet313#1;main_#t~switch314#1 := 0 == main_~tmp___4~0#1; {108428#true} is VALID [2022-02-20 21:52:26,688 INFO L290 TraceCheckUtils]: 25: Hoare triple {108428#true} assume !main_#t~switch314#1;main_#t~switch314#1 := main_#t~switch314#1 || 1 == main_~tmp___4~0#1; {108428#true} is VALID [2022-02-20 21:52:26,689 INFO L290 TraceCheckUtils]: 26: Hoare triple {108428#true} assume main_#t~switch314#1; {108428#true} is VALID [2022-02-20 21:52:26,689 INFO L290 TraceCheckUtils]: 27: Hoare triple {108428#true} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_ipheth_driver_init } true;havoc ipheth_driver_init_#res#1;havoc ipheth_driver_init_#t~ret302#1, ipheth_driver_init_~tmp~28#1;havoc ipheth_driver_init_~tmp~28#1;assume { :begin_inline_ldv_usb_register_driver_19 } true;ldv_usb_register_driver_19_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_19_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_19_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg3#1.offset := ~#ipheth_driver~0.base, ~#ipheth_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 36, 0;havoc ldv_usb_register_driver_19_#res#1;havoc ldv_usb_register_driver_19_#t~ret333#1, ldv_usb_register_driver_19_~ldv_func_arg1#1.base, ldv_usb_register_driver_19_~ldv_func_arg1#1.offset, ldv_usb_register_driver_19_~ldv_func_arg2#1.base, ldv_usb_register_driver_19_~ldv_func_arg2#1.offset, ldv_usb_register_driver_19_~ldv_func_arg3#1.base, ldv_usb_register_driver_19_~ldv_func_arg3#1.offset, ldv_usb_register_driver_19_~ldv_func_res~1#1, ldv_usb_register_driver_19_~tmp~39#1;ldv_usb_register_driver_19_~ldv_func_arg1#1.base, ldv_usb_register_driver_19_~ldv_func_arg1#1.offset := ldv_usb_register_driver_19_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_19_~ldv_func_arg2#1.base, ldv_usb_register_driver_19_~ldv_func_arg2#1.offset := ldv_usb_register_driver_19_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_19_~ldv_func_arg3#1.base, ldv_usb_register_driver_19_~ldv_func_arg3#1.offset := ldv_usb_register_driver_19_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_19_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_19_~ldv_func_res~1#1;havoc ldv_usb_register_driver_19_~tmp~39#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_19_~ldv_func_arg1#1.base, ldv_usb_register_driver_19_~ldv_func_arg1#1.offset, ldv_usb_register_driver_19_~ldv_func_arg2#1.base, ldv_usb_register_driver_19_~ldv_func_arg2#1.offset, ldv_usb_register_driver_19_~ldv_func_arg3#1.base, ldv_usb_register_driver_19_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet365#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet365#1 && usb_register_driver_#t~nondet365#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet365#1;havoc usb_register_driver_#t~nondet365#1; {108428#true} is VALID [2022-02-20 21:52:26,689 INFO L290 TraceCheckUtils]: 28: Hoare triple {108428#true} ldv_usb_register_driver_19_#t~ret333#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_19_#t~ret333#1 && ldv_usb_register_driver_19_#t~ret333#1 <= 2147483647;ldv_usb_register_driver_19_~tmp~39#1 := ldv_usb_register_driver_19_#t~ret333#1;havoc ldv_usb_register_driver_19_#t~ret333#1;ldv_usb_register_driver_19_~ldv_func_res~1#1 := ldv_usb_register_driver_19_~tmp~39#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret303#1.base, ldv_usb_driver_1_#t~ret303#1.offset, ldv_usb_driver_1_~tmp~29#1.base, ldv_usb_driver_1_~tmp~29#1.offset;havoc ldv_usb_driver_1_~tmp~29#1.base, ldv_usb_driver_1_~tmp~29#1.offset; {108428#true} is VALID [2022-02-20 21:52:26,689 INFO L272 TraceCheckUtils]: 29: Hoare triple {108428#true} call ldv_usb_driver_1_#t~ret303#1.base, ldv_usb_driver_1_#t~ret303#1.offset := ldv_zalloc(1520); {108428#true} is VALID [2022-02-20 21:52:26,689 INFO L290 TraceCheckUtils]: 30: Hoare triple {108428#true} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet81#1 && #t~nondet81#1 <= 2147483647;~tmp___0~3#1 := #t~nondet81#1;havoc #t~nondet81#1; {108428#true} is VALID [2022-02-20 21:52:26,689 INFO L290 TraceCheckUtils]: 31: Hoare triple {108428#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {108428#true} is VALID [2022-02-20 21:52:26,689 INFO L290 TraceCheckUtils]: 32: Hoare triple {108428#true} assume true; {108428#true} is VALID [2022-02-20 21:52:26,689 INFO L284 TraceCheckUtils]: 33: Hoare quadruple {108428#true} {108428#true} #1261#return; {108428#true} is VALID [2022-02-20 21:52:26,690 INFO L290 TraceCheckUtils]: 34: Hoare triple {108428#true} ldv_usb_driver_1_~tmp~29#1.base, ldv_usb_driver_1_~tmp~29#1.offset := ldv_usb_driver_1_#t~ret303#1.base, ldv_usb_driver_1_#t~ret303#1.offset;havoc ldv_usb_driver_1_#t~ret303#1.base, ldv_usb_driver_1_#t~ret303#1.offset;~ipheth_driver_group1~0.base, ~ipheth_driver_group1~0.offset := ldv_usb_driver_1_~tmp~29#1.base, ldv_usb_driver_1_~tmp~29#1.offset; {108428#true} is VALID [2022-02-20 21:52:26,690 INFO L290 TraceCheckUtils]: 35: Hoare triple {108428#true} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_19_#res#1 := ldv_usb_register_driver_19_~ldv_func_res~1#1; {108428#true} is VALID [2022-02-20 21:52:26,690 INFO L290 TraceCheckUtils]: 36: Hoare triple {108428#true} ipheth_driver_init_#t~ret302#1 := ldv_usb_register_driver_19_#res#1;assume { :end_inline_ldv_usb_register_driver_19 } true;assume -2147483648 <= ipheth_driver_init_#t~ret302#1 && ipheth_driver_init_#t~ret302#1 <= 2147483647;ipheth_driver_init_~tmp~28#1 := ipheth_driver_init_#t~ret302#1;havoc ipheth_driver_init_#t~ret302#1;ipheth_driver_init_#res#1 := ipheth_driver_init_~tmp~28#1; {108428#true} is VALID [2022-02-20 21:52:26,690 INFO L290 TraceCheckUtils]: 37: Hoare triple {108428#true} main_#t~ret315#1 := ipheth_driver_init_#res#1;assume { :end_inline_ipheth_driver_init } true;assume -2147483648 <= main_#t~ret315#1 && main_#t~ret315#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret315#1;havoc main_#t~ret315#1; {108428#true} is VALID [2022-02-20 21:52:26,690 INFO L290 TraceCheckUtils]: 38: Hoare triple {108428#true} assume 0 == ~ldv_retval_1~0;~ldv_state_variable_0~0 := 3; {108428#true} is VALID [2022-02-20 21:52:26,691 INFO L290 TraceCheckUtils]: 39: Hoare triple {108428#true} assume !(0 != ~ldv_retval_1~0); {108428#true} is VALID [2022-02-20 21:52:26,691 INFO L290 TraceCheckUtils]: 40: Hoare triple {108428#true} assume -2147483648 <= main_#t~nondet308#1 && main_#t~nondet308#1 <= 2147483647;main_~tmp___2~2#1 := main_#t~nondet308#1;havoc main_#t~nondet308#1;main_#t~switch309#1 := 0 == main_~tmp___2~2#1; {108428#true} is VALID [2022-02-20 21:52:26,691 INFO L290 TraceCheckUtils]: 41: Hoare triple {108428#true} assume main_#t~switch309#1; {108428#true} is VALID [2022-02-20 21:52:26,691 INFO L290 TraceCheckUtils]: 42: Hoare triple {108428#true} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= main_#t~nondet310#1 && main_#t~nondet310#1 <= 2147483647;main_~tmp___3~1#1 := main_#t~nondet310#1;havoc main_#t~nondet310#1;main_#t~switch311#1 := 0 == main_~tmp___3~1#1; {108428#true} is VALID [2022-02-20 21:52:26,691 INFO L290 TraceCheckUtils]: 43: Hoare triple {108428#true} assume main_#t~switch311#1; {108428#true} is VALID [2022-02-20 21:52:26,691 INFO L290 TraceCheckUtils]: 44: Hoare triple {108428#true} assume 1 == ~ldv_state_variable_1~0;assume { :begin_inline_ipheth_probe } true;ipheth_probe_#in~intf#1.base, ipheth_probe_#in~intf#1.offset, ipheth_probe_#in~id#1.base, ipheth_probe_#in~id#1.offset := ~ipheth_driver_group1~0.base, ~ipheth_driver_group1~0.offset, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc ipheth_probe_#res#1;havoc ipheth_probe_#t~ret271#1.base, ipheth_probe_#t~ret271#1.offset, ipheth_probe_#t~ret272#1.base, ipheth_probe_#t~ret272#1.offset, ipheth_probe_#t~strcpy~res273#1.base, ipheth_probe_#t~strcpy~res273#1.offset, ipheth_probe_#t~ret274#1.base, ipheth_probe_#t~ret274#1.offset, ipheth_probe_#t~ret275#1.base, ipheth_probe_#t~ret275#1.offset, ipheth_probe_#t~nondet276#1, ipheth_probe_#t~mem277#1.base, ipheth_probe_#t~mem277#1.offset, ipheth_probe_#t~ret278#1, ipheth_probe_#t~mem279#1, ipheth_probe_#t~ret280#1, ipheth_probe_#t~mem281#1, ipheth_probe_#t~mem282#1, ipheth_probe_#t~mem283#1, ipheth_probe_#t~mem284#1, ipheth_probe_#t~short285#1, ipheth_probe_#t~nondet286#1, ipheth_probe_#t~ret287#1.base, ipheth_probe_#t~ret287#1.offset, ipheth_probe_#t~mem288#1.base, ipheth_probe_#t~mem288#1.offset, ipheth_probe_#t~ret289#1, ipheth_probe_#t~mem290#1, ipheth_probe_#t~ret291#1, ipheth_probe_#t~nondet292#1, ipheth_probe_#t~ret293#1, ipheth_probe_#t~nondet294#1, ipheth_probe_#t~nondet295#1, ipheth_probe_#t~mem296#1.base, ipheth_probe_#t~mem296#1.offset, ipheth_probe_~intf#1.base, ipheth_probe_~intf#1.offset, ipheth_probe_~id#1.base, ipheth_probe_~id#1.offset, ipheth_probe_~udev~5#1.base, ipheth_probe_~udev~5#1.offset, ipheth_probe_~tmp~26#1.base, ipheth_probe_~tmp~26#1.offset, ipheth_probe_~hintf~0#1.base, ipheth_probe_~hintf~0#1.offset, ipheth_probe_~endp~0#1.base, ipheth_probe_~endp~0#1.offset, ipheth_probe_~dev~8#1.base, ipheth_probe_~dev~8#1.offset, ipheth_probe_~netdev~0#1.base, ipheth_probe_~netdev~0#1.offset, ipheth_probe_~i~0#1, ipheth_probe_~retval~5#1, ipheth_probe_~tmp___0~11#1.base, ipheth_probe_~tmp___0~11#1.offset, ipheth_probe_~tmp___1~3#1, ipheth_probe_~tmp___2~1#1, ipheth_probe_~tmp___3~0#1.base, ipheth_probe_~tmp___3~0#1.offset, ipheth_probe_~#__key~0#1.base, ipheth_probe_~#__key~0#1.offset, ipheth_probe_~#__constr_expr_0~0#1.base, ipheth_probe_~#__constr_expr_0~0#1.offset, ipheth_probe_~#__key___0~0#1.base, ipheth_probe_~#__key___0~0#1.offset;ipheth_probe_~intf#1.base, ipheth_probe_~intf#1.offset := ipheth_probe_#in~intf#1.base, ipheth_probe_#in~intf#1.offset;ipheth_probe_~id#1.base, ipheth_probe_~id#1.offset := ipheth_probe_#in~id#1.base, ipheth_probe_#in~id#1.offset;havoc ipheth_probe_~udev~5#1.base, ipheth_probe_~udev~5#1.offset;havoc ipheth_probe_~tmp~26#1.base, ipheth_probe_~tmp~26#1.offset;havoc ipheth_probe_~hintf~0#1.base, ipheth_probe_~hintf~0#1.offset;havoc ipheth_probe_~endp~0#1.base, ipheth_probe_~endp~0#1.offset;havoc ipheth_probe_~dev~8#1.base, ipheth_probe_~dev~8#1.offset;havoc ipheth_probe_~netdev~0#1.base, ipheth_probe_~netdev~0#1.offset;havoc ipheth_probe_~i~0#1;havoc ipheth_probe_~retval~5#1;havoc ipheth_probe_~tmp___0~11#1.base, ipheth_probe_~tmp___0~11#1.offset;havoc ipheth_probe_~tmp___1~3#1;havoc ipheth_probe_~tmp___2~1#1;havoc ipheth_probe_~tmp___3~0#1.base, ipheth_probe_~tmp___3~0#1.offset;call ipheth_probe_~#__key~0#1.base, ipheth_probe_~#__key~0#1.offset := #Ultimate.allocOnStack(8);call ipheth_probe_~#__constr_expr_0~0#1.base, ipheth_probe_~#__constr_expr_0~0#1.offset := #Ultimate.allocOnStack(8);call ipheth_probe_~#__key___0~0#1.base, ipheth_probe_~#__key___0~0#1.offset := #Ultimate.allocOnStack(8);assume { :begin_inline_interface_to_usbdev } true;interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset := ipheth_probe_~intf#1.base, ipheth_probe_~intf#1.offset;havoc interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;havoc interface_to_usbdev_#t~ret326#1.base, interface_to_usbdev_#t~ret326#1.offset, interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset, interface_to_usbdev_~tmp~32#1.base, interface_to_usbdev_~tmp~32#1.offset;interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset := interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset;havoc interface_to_usbdev_~tmp~32#1.base, interface_to_usbdev_~tmp~32#1.offset;assume { :begin_inline_ldv_interface_to_usbdev } true;havoc ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;havoc ldv_interface_to_usbdev_#t~ret339#1.base, ldv_interface_to_usbdev_#t~ret339#1.offset, ldv_interface_to_usbdev_~result~0#1.base, ldv_interface_to_usbdev_~result~0#1.offset, ldv_interface_to_usbdev_~tmp~42#1.base, ldv_interface_to_usbdev_~tmp~42#1.offset;havoc ldv_interface_to_usbdev_~result~0#1.base, ldv_interface_to_usbdev_~result~0#1.offset;havoc ldv_interface_to_usbdev_~tmp~42#1.base, ldv_interface_to_usbdev_~tmp~42#1.offset; {108428#true} is VALID [2022-02-20 21:52:26,691 INFO L272 TraceCheckUtils]: 45: Hoare triple {108428#true} call ldv_interface_to_usbdev_#t~ret339#1.base, ldv_interface_to_usbdev_#t~ret339#1.offset := ldv_malloc(1889); {108428#true} is VALID [2022-02-20 21:52:26,691 INFO L290 TraceCheckUtils]: 46: Hoare triple {108428#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet79 && #t~nondet79 <= 2147483647;~tmp___0~2 := #t~nondet79;havoc #t~nondet79; {108428#true} is VALID [2022-02-20 21:52:26,692 INFO L290 TraceCheckUtils]: 47: Hoare triple {108428#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {108428#true} is VALID [2022-02-20 21:52:26,692 INFO L290 TraceCheckUtils]: 48: Hoare triple {108428#true} assume true; {108428#true} is VALID [2022-02-20 21:52:26,692 INFO L284 TraceCheckUtils]: 49: Hoare quadruple {108428#true} {108428#true} #1209#return; {108428#true} is VALID [2022-02-20 21:52:26,692 INFO L290 TraceCheckUtils]: 50: Hoare triple {108428#true} ldv_interface_to_usbdev_~tmp~42#1.base, ldv_interface_to_usbdev_~tmp~42#1.offset := ldv_interface_to_usbdev_#t~ret339#1.base, ldv_interface_to_usbdev_#t~ret339#1.offset;havoc ldv_interface_to_usbdev_#t~ret339#1.base, ldv_interface_to_usbdev_#t~ret339#1.offset;ldv_interface_to_usbdev_~result~0#1.base, ldv_interface_to_usbdev_~result~0#1.offset := ldv_interface_to_usbdev_~tmp~42#1.base, ldv_interface_to_usbdev_~tmp~42#1.offset; {108428#true} is VALID [2022-02-20 21:52:26,692 INFO L290 TraceCheckUtils]: 51: Hoare triple {108428#true} assume 0 != (ldv_interface_to_usbdev_~result~0#1.base + ldv_interface_to_usbdev_~result~0#1.offset) % 18446744073709551616; {108428#true} is VALID [2022-02-20 21:52:26,692 INFO L290 TraceCheckUtils]: 52: Hoare triple {108428#true} ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset := ldv_interface_to_usbdev_~result~0#1.base, ldv_interface_to_usbdev_~result~0#1.offset; {108428#true} is VALID [2022-02-20 21:52:26,692 INFO L290 TraceCheckUtils]: 53: Hoare triple {108428#true} interface_to_usbdev_#t~ret326#1.base, interface_to_usbdev_#t~ret326#1.offset := ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;assume { :end_inline_ldv_interface_to_usbdev } true;interface_to_usbdev_~tmp~32#1.base, interface_to_usbdev_~tmp~32#1.offset := interface_to_usbdev_#t~ret326#1.base, interface_to_usbdev_#t~ret326#1.offset;havoc interface_to_usbdev_#t~ret326#1.base, interface_to_usbdev_#t~ret326#1.offset;interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset := interface_to_usbdev_~tmp~32#1.base, interface_to_usbdev_~tmp~32#1.offset; {108428#true} is VALID [2022-02-20 21:52:26,692 INFO L290 TraceCheckUtils]: 54: Hoare triple {108428#true} ipheth_probe_#t~ret271#1.base, ipheth_probe_#t~ret271#1.offset := interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;assume { :end_inline_interface_to_usbdev } true;ipheth_probe_~tmp~26#1.base, ipheth_probe_~tmp~26#1.offset := ipheth_probe_#t~ret271#1.base, ipheth_probe_#t~ret271#1.offset;havoc ipheth_probe_#t~ret271#1.base, ipheth_probe_#t~ret271#1.offset;ipheth_probe_~udev~5#1.base, ipheth_probe_~udev~5#1.offset := ipheth_probe_~tmp~26#1.base, ipheth_probe_~tmp~26#1.offset;assume { :begin_inline_alloc_etherdev_mqs } true;alloc_etherdev_mqs_#in~arg0#1, alloc_etherdev_mqs_#in~arg1#1, alloc_etherdev_mqs_#in~arg2#1 := 304, 1, 1;havoc alloc_etherdev_mqs_#res#1.base, alloc_etherdev_mqs_#res#1.offset;havoc alloc_etherdev_mqs_#t~ret347#1.base, alloc_etherdev_mqs_#t~ret347#1.offset, alloc_etherdev_mqs_~arg0#1, alloc_etherdev_mqs_~arg1#1, alloc_etherdev_mqs_~arg2#1;alloc_etherdev_mqs_~arg0#1 := alloc_etherdev_mqs_#in~arg0#1;alloc_etherdev_mqs_~arg1#1 := alloc_etherdev_mqs_#in~arg1#1;alloc_etherdev_mqs_~arg2#1 := alloc_etherdev_mqs_#in~arg2#1; {108428#true} is VALID [2022-02-20 21:52:26,693 INFO L272 TraceCheckUtils]: 55: Hoare triple {108428#true} call alloc_etherdev_mqs_#t~ret347#1.base, alloc_etherdev_mqs_#t~ret347#1.offset := ldv_malloc(2887); {108428#true} is VALID [2022-02-20 21:52:26,693 INFO L290 TraceCheckUtils]: 56: Hoare triple {108428#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet79 && #t~nondet79 <= 2147483647;~tmp___0~2 := #t~nondet79;havoc #t~nondet79; {108428#true} is VALID [2022-02-20 21:52:26,693 INFO L290 TraceCheckUtils]: 57: Hoare triple {108428#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {108428#true} is VALID [2022-02-20 21:52:26,693 INFO L290 TraceCheckUtils]: 58: Hoare triple {108428#true} assume true; {108428#true} is VALID [2022-02-20 21:52:26,693 INFO L284 TraceCheckUtils]: 59: Hoare quadruple {108428#true} {108428#true} #1213#return; {108428#true} is VALID [2022-02-20 21:52:26,693 INFO L290 TraceCheckUtils]: 60: Hoare triple {108428#true} alloc_etherdev_mqs_#res#1.base, alloc_etherdev_mqs_#res#1.offset := alloc_etherdev_mqs_#t~ret347#1.base, alloc_etherdev_mqs_#t~ret347#1.offset;havoc alloc_etherdev_mqs_#t~ret347#1.base, alloc_etherdev_mqs_#t~ret347#1.offset; {108428#true} is VALID [2022-02-20 21:52:26,693 INFO L290 TraceCheckUtils]: 61: Hoare triple {108428#true} ipheth_probe_#t~ret272#1.base, ipheth_probe_#t~ret272#1.offset := alloc_etherdev_mqs_#res#1.base, alloc_etherdev_mqs_#res#1.offset;assume { :end_inline_alloc_etherdev_mqs } true;ipheth_probe_~netdev~0#1.base, ipheth_probe_~netdev~0#1.offset := ipheth_probe_#t~ret272#1.base, ipheth_probe_#t~ret272#1.offset;havoc ipheth_probe_#t~ret272#1.base, ipheth_probe_#t~ret272#1.offset; {108428#true} is VALID [2022-02-20 21:52:26,693 INFO L290 TraceCheckUtils]: 62: Hoare triple {108428#true} assume !(0 == (ipheth_probe_~netdev~0#1.base + ipheth_probe_~netdev~0#1.offset) % 18446744073709551616);call write~$Pointer$(~#ipheth_netdev_ops~0.base, ~#ipheth_netdev_ops~0.offset, ipheth_probe_~netdev~0#1.base, 420 + ipheth_probe_~netdev~0#1.offset, 8);call write~int(1250, ipheth_probe_~netdev~0#1.base, 930 + ipheth_probe_~netdev~0#1.offset, 4);assume { :begin_inline_#Ultimate.C_strcpy } true;#Ultimate.C_strcpy_dest#1.base, #Ultimate.C_strcpy_dest#1.offset, #Ultimate.C_strcpy_src#1.base, #Ultimate.C_strcpy_src#1.offset := ipheth_probe_~netdev~0#1.base, ipheth_probe_~netdev~0#1.offset, 26, 0;havoc #Ultimate.C_strcpy_#res#1.base, #Ultimate.C_strcpy_#res#1.offset;havoc #Ultimate.C_strcpy_#t~offset383#1, #Ultimate.C_strcpy_#t~mem384#1;#Ultimate.C_strcpy_#t~offset383#1 := 0; {108428#true} is VALID [2022-02-20 21:52:26,694 INFO L290 TraceCheckUtils]: 63: Hoare triple {108428#true} call #Ultimate.C_strcpy_#t~mem384#1 := read~int(#Ultimate.C_strcpy_src#1.base, #Ultimate.C_strcpy_src#1.offset + #Ultimate.C_strcpy_#t~offset383#1, 1);call write~unchecked~int(#Ultimate.C_strcpy_#t~mem384#1, #Ultimate.C_strcpy_dest#1.base, #Ultimate.C_strcpy_dest#1.offset + #Ultimate.C_strcpy_#t~offset383#1, 1); {108428#true} is VALID [2022-02-20 21:52:26,694 INFO L290 TraceCheckUtils]: 64: Hoare triple {108428#true} assume 0 == #Ultimate.C_strcpy_#t~mem384#1; {108428#true} is VALID [2022-02-20 21:52:26,694 INFO L290 TraceCheckUtils]: 65: Hoare triple {108428#true} assume #Ultimate.C_strcpy_#res#1.base == #Ultimate.C_strcpy_dest#1.base && #Ultimate.C_strcpy_#res#1.offset == #Ultimate.C_strcpy_dest#1.offset;ipheth_probe_#t~strcpy~res273#1.base, ipheth_probe_#t~strcpy~res273#1.offset := #Ultimate.C_strcpy_#res#1.base, #Ultimate.C_strcpy_#res#1.offset;assume { :end_inline_#Ultimate.C_strcpy } true;havoc ipheth_probe_#t~strcpy~res273#1.base, ipheth_probe_#t~strcpy~res273#1.offset; {108428#true} is VALID [2022-02-20 21:52:26,694 INFO L272 TraceCheckUtils]: 66: Hoare triple {108428#true} call ipheth_probe_#t~ret274#1.base, ipheth_probe_#t~ret274#1.offset := netdev_priv(ipheth_probe_~netdev~0#1.base, ipheth_probe_~netdev~0#1.offset); {108428#true} is VALID [2022-02-20 21:52:26,694 INFO L290 TraceCheckUtils]: 67: Hoare triple {108428#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3136 + ~dev.offset; {108428#true} is VALID [2022-02-20 21:52:26,694 INFO L290 TraceCheckUtils]: 68: Hoare triple {108428#true} assume true; {108428#true} is VALID [2022-02-20 21:52:26,694 INFO L284 TraceCheckUtils]: 69: Hoare quadruple {108428#true} {108428#true} #1215#return; {108428#true} is VALID [2022-02-20 21:52:26,694 INFO L290 TraceCheckUtils]: 70: Hoare triple {108428#true} ipheth_probe_~tmp___0~11#1.base, ipheth_probe_~tmp___0~11#1.offset := ipheth_probe_#t~ret274#1.base, ipheth_probe_#t~ret274#1.offset;havoc ipheth_probe_#t~ret274#1.base, ipheth_probe_#t~ret274#1.offset;ipheth_probe_~dev~8#1.base, ipheth_probe_~dev~8#1.offset := ipheth_probe_~tmp___0~11#1.base, ipheth_probe_~tmp___0~11#1.offset;call write~$Pointer$(ipheth_probe_~udev~5#1.base, ipheth_probe_~udev~5#1.offset, ipheth_probe_~dev~8#1.base, ipheth_probe_~dev~8#1.offset, 8);call write~$Pointer$(ipheth_probe_~netdev~0#1.base, ipheth_probe_~netdev~0#1.offset, ipheth_probe_~dev~8#1.base, 16 + ipheth_probe_~dev~8#1.offset, 8);call write~$Pointer$(ipheth_probe_~intf#1.base, ipheth_probe_~intf#1.offset, ipheth_probe_~dev~8#1.base, 8 + ipheth_probe_~dev~8#1.offset, 8);assume { :begin_inline_usb_altnum_to_altsetting } true;usb_altnum_to_altsetting_#in~arg0#1.base, usb_altnum_to_altsetting_#in~arg0#1.offset, usb_altnum_to_altsetting_#in~arg1#1 := ipheth_probe_~intf#1.base, ipheth_probe_~intf#1.offset, 1;havoc usb_altnum_to_altsetting_#res#1.base, usb_altnum_to_altsetting_#res#1.offset;havoc usb_altnum_to_altsetting_#t~ret363#1.base, usb_altnum_to_altsetting_#t~ret363#1.offset, usb_altnum_to_altsetting_~arg0#1.base, usb_altnum_to_altsetting_~arg0#1.offset, usb_altnum_to_altsetting_~arg1#1;usb_altnum_to_altsetting_~arg0#1.base, usb_altnum_to_altsetting_~arg0#1.offset := usb_altnum_to_altsetting_#in~arg0#1.base, usb_altnum_to_altsetting_#in~arg0#1.offset;usb_altnum_to_altsetting_~arg1#1 := usb_altnum_to_altsetting_#in~arg1#1; {108428#true} is VALID [2022-02-20 21:52:26,695 INFO L272 TraceCheckUtils]: 71: Hoare triple {108428#true} call usb_altnum_to_altsetting_#t~ret363#1.base, usb_altnum_to_altsetting_#t~ret363#1.offset := ldv_malloc(37); {108428#true} is VALID [2022-02-20 21:52:26,695 INFO L290 TraceCheckUtils]: 72: Hoare triple {108428#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet79 && #t~nondet79 <= 2147483647;~tmp___0~2 := #t~nondet79;havoc #t~nondet79; {108428#true} is VALID [2022-02-20 21:52:26,695 INFO L290 TraceCheckUtils]: 73: Hoare triple {108428#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {108428#true} is VALID [2022-02-20 21:52:26,695 INFO L290 TraceCheckUtils]: 74: Hoare triple {108428#true} assume true; {108428#true} is VALID [2022-02-20 21:52:26,695 INFO L284 TraceCheckUtils]: 75: Hoare quadruple {108428#true} {108428#true} #1217#return; {108428#true} is VALID [2022-02-20 21:52:26,695 INFO L290 TraceCheckUtils]: 76: Hoare triple {108428#true} usb_altnum_to_altsetting_#res#1.base, usb_altnum_to_altsetting_#res#1.offset := usb_altnum_to_altsetting_#t~ret363#1.base, usb_altnum_to_altsetting_#t~ret363#1.offset;havoc usb_altnum_to_altsetting_#t~ret363#1.base, usb_altnum_to_altsetting_#t~ret363#1.offset; {108428#true} is VALID [2022-02-20 21:52:26,695 INFO L290 TraceCheckUtils]: 77: Hoare triple {108428#true} ipheth_probe_#t~ret275#1.base, ipheth_probe_#t~ret275#1.offset := usb_altnum_to_altsetting_#res#1.base, usb_altnum_to_altsetting_#res#1.offset;assume { :end_inline_usb_altnum_to_altsetting } true;ipheth_probe_~hintf~0#1.base, ipheth_probe_~hintf~0#1.offset := ipheth_probe_#t~ret275#1.base, ipheth_probe_#t~ret275#1.offset;havoc ipheth_probe_#t~ret275#1.base, ipheth_probe_#t~ret275#1.offset; {108428#true} is VALID [2022-02-20 21:52:26,695 INFO L290 TraceCheckUtils]: 78: Hoare triple {108428#true} assume !(0 == (ipheth_probe_~hintf~0#1.base + ipheth_probe_~hintf~0#1.offset) % 18446744073709551616);ipheth_probe_~i~0#1 := 0; {108428#true} is VALID [2022-02-20 21:52:26,696 INFO L290 TraceCheckUtils]: 79: Hoare triple {108428#true} call ipheth_probe_#t~mem282#1 := read~int(ipheth_probe_~hintf~0#1.base, 4 + ipheth_probe_~hintf~0#1.offset, 1); {108428#true} is VALID [2022-02-20 21:52:26,696 INFO L290 TraceCheckUtils]: 80: Hoare triple {108428#true} assume !(ipheth_probe_#t~mem282#1 % 256 > ipheth_probe_~i~0#1);havoc ipheth_probe_#t~mem282#1;call ipheth_probe_#t~mem283#1 := read~int(ipheth_probe_~dev~8#1.base, 72 + ipheth_probe_~dev~8#1.offset, 1);ipheth_probe_#t~short285#1 := 0 == ipheth_probe_#t~mem283#1 % 256 % 4294967296; {108428#true} is VALID [2022-02-20 21:52:26,696 INFO L290 TraceCheckUtils]: 81: Hoare triple {108428#true} assume !ipheth_probe_#t~short285#1;call ipheth_probe_#t~mem284#1 := read~int(ipheth_probe_~dev~8#1.base, 73 + ipheth_probe_~dev~8#1.offset, 1);ipheth_probe_#t~short285#1 := 0 == ipheth_probe_#t~mem284#1 % 256 % 4294967296; {108428#true} is VALID [2022-02-20 21:52:26,696 INFO L290 TraceCheckUtils]: 82: Hoare triple {108428#true} assume !ipheth_probe_#t~short285#1;havoc ipheth_probe_#t~mem283#1;havoc ipheth_probe_#t~mem284#1;havoc ipheth_probe_#t~short285#1;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := 64, 208;havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret78#1.base, kmalloc_#t~ret78#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___2~0#1.base, kmalloc_~tmp___2~0#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___2~0#1.base, kmalloc_~tmp___2~0#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret77#1.base, __kmalloc_#t~ret77#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {108428#true} is VALID [2022-02-20 21:52:26,696 INFO L272 TraceCheckUtils]: 83: Hoare triple {108428#true} call __kmalloc_#t~ret77#1.base, __kmalloc_#t~ret77#1.offset := ldv_malloc(__kmalloc_~size#1); {108428#true} is VALID [2022-02-20 21:52:26,696 INFO L290 TraceCheckUtils]: 84: Hoare triple {108428#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet79 && #t~nondet79 <= 2147483647;~tmp___0~2 := #t~nondet79;havoc #t~nondet79; {108428#true} is VALID [2022-02-20 21:52:26,696 INFO L290 TraceCheckUtils]: 85: Hoare triple {108428#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {108428#true} is VALID [2022-02-20 21:52:26,696 INFO L290 TraceCheckUtils]: 86: Hoare triple {108428#true} assume true; {108428#true} is VALID [2022-02-20 21:52:26,697 INFO L284 TraceCheckUtils]: 87: Hoare quadruple {108428#true} {108428#true} #1223#return; {108428#true} is VALID [2022-02-20 21:52:26,700 INFO L290 TraceCheckUtils]: 88: Hoare triple {108428#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret77#1.base, __kmalloc_#t~ret77#1.offset;havoc __kmalloc_#t~ret77#1.base, __kmalloc_#t~ret77#1.offset; {108428#true} is VALID [2022-02-20 21:52:26,700 INFO L290 TraceCheckUtils]: 89: Hoare triple {108428#true} kmalloc_#t~ret78#1.base, kmalloc_#t~ret78#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___2~0#1.base, kmalloc_~tmp___2~0#1.offset := kmalloc_#t~ret78#1.base, kmalloc_#t~ret78#1.offset;havoc kmalloc_#t~ret78#1.base, kmalloc_#t~ret78#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___2~0#1.base, kmalloc_~tmp___2~0#1.offset; {108428#true} is VALID [2022-02-20 21:52:26,700 INFO L290 TraceCheckUtils]: 90: Hoare triple {108428#true} ipheth_probe_#t~ret287#1.base, ipheth_probe_#t~ret287#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;ipheth_probe_~tmp___3~0#1.base, ipheth_probe_~tmp___3~0#1.offset := ipheth_probe_#t~ret287#1.base, ipheth_probe_#t~ret287#1.offset;havoc ipheth_probe_#t~ret287#1.base, ipheth_probe_#t~ret287#1.offset;call write~$Pointer$(ipheth_probe_~tmp___3~0#1.base, ipheth_probe_~tmp___3~0#1.offset, ipheth_probe_~dev~8#1.base, 64 + ipheth_probe_~dev~8#1.offset, 8);call ipheth_probe_#t~mem288#1.base, ipheth_probe_#t~mem288#1.offset := read~$Pointer$(ipheth_probe_~dev~8#1.base, 64 + ipheth_probe_~dev~8#1.offset, 8); {108428#true} is VALID [2022-02-20 21:52:26,700 INFO L290 TraceCheckUtils]: 91: Hoare triple {108428#true} assume !(0 == (ipheth_probe_#t~mem288#1.base + ipheth_probe_#t~mem288#1.offset) % 18446744073709551616);havoc ipheth_probe_#t~mem288#1.base, ipheth_probe_#t~mem288#1.offset;assume { :begin_inline_ipheth_get_macaddr } true;ipheth_get_macaddr_#in~dev#1.base, ipheth_get_macaddr_#in~dev#1.offset := ipheth_probe_~dev~8#1.base, ipheth_probe_~dev~8#1.offset;havoc ipheth_get_macaddr_#res#1;havoc ipheth_get_macaddr_#t~mem185#1.base, ipheth_get_macaddr_#t~mem185#1.offset, ipheth_get_macaddr_#t~mem186#1.base, ipheth_get_macaddr_#t~mem186#1.offset, ipheth_get_macaddr_#t~ret187#1, ipheth_get_macaddr_#t~mem188#1.base, ipheth_get_macaddr_#t~mem188#1.offset, ipheth_get_macaddr_#t~ret189#1, ipheth_get_macaddr_#t~nondet190#1, ipheth_get_macaddr_#t~mem191#1.base, ipheth_get_macaddr_#t~mem191#1.offset, ipheth_get_macaddr_#t~nondet192#1, ipheth_get_macaddr_#t~mem193#1.base, ipheth_get_macaddr_#t~mem193#1.offset, ipheth_get_macaddr_#t~mem194#1.base, ipheth_get_macaddr_#t~mem194#1.offset, ipheth_get_macaddr_#t~mem195#1.base, ipheth_get_macaddr_#t~mem195#1.offset, ipheth_get_macaddr_#t~memcpy~res196#1.base, ipheth_get_macaddr_#t~memcpy~res196#1.offset, ipheth_get_macaddr_#t~mem197#1.base, ipheth_get_macaddr_#t~mem197#1.offset, ipheth_get_macaddr_#t~mem198#1.base, ipheth_get_macaddr_#t~mem198#1.offset, ipheth_get_macaddr_#t~memcpy~res199#1.base, ipheth_get_macaddr_#t~memcpy~res199#1.offset, ipheth_get_macaddr_~dev#1.base, ipheth_get_macaddr_~dev#1.offset, ipheth_get_macaddr_~udev~1#1.base, ipheth_get_macaddr_~udev~1#1.offset, ipheth_get_macaddr_~net~0#1.base, ipheth_get_macaddr_~net~0#1.offset, ipheth_get_macaddr_~retval~1#1, ipheth_get_macaddr_~tmp~19#1, ipheth_get_macaddr_~__len~1#1, ipheth_get_macaddr_~__ret~1#1.base, ipheth_get_macaddr_~__ret~1#1.offset;ipheth_get_macaddr_~dev#1.base, ipheth_get_macaddr_~dev#1.offset := ipheth_get_macaddr_#in~dev#1.base, ipheth_get_macaddr_#in~dev#1.offset;havoc ipheth_get_macaddr_~udev~1#1.base, ipheth_get_macaddr_~udev~1#1.offset;havoc ipheth_get_macaddr_~net~0#1.base, ipheth_get_macaddr_~net~0#1.offset;havoc ipheth_get_macaddr_~retval~1#1;havoc ipheth_get_macaddr_~tmp~19#1;havoc ipheth_get_macaddr_~__len~1#1;havoc ipheth_get_macaddr_~__ret~1#1.base, ipheth_get_macaddr_~__ret~1#1.offset;call ipheth_get_macaddr_#t~mem185#1.base, ipheth_get_macaddr_#t~mem185#1.offset := read~$Pointer$(ipheth_get_macaddr_~dev#1.base, ipheth_get_macaddr_~dev#1.offset, 8);ipheth_get_macaddr_~udev~1#1.base, ipheth_get_macaddr_~udev~1#1.offset := ipheth_get_macaddr_#t~mem185#1.base, ipheth_get_macaddr_#t~mem185#1.offset;havoc ipheth_get_macaddr_#t~mem185#1.base, ipheth_get_macaddr_#t~mem185#1.offset;call ipheth_get_macaddr_#t~mem186#1.base, ipheth_get_macaddr_#t~mem186#1.offset := read~$Pointer$(ipheth_get_macaddr_~dev#1.base, 16 + ipheth_get_macaddr_~dev#1.offset, 8);ipheth_get_macaddr_~net~0#1.base, ipheth_get_macaddr_~net~0#1.offset := ipheth_get_macaddr_#t~mem186#1.base, ipheth_get_macaddr_#t~mem186#1.offset;havoc ipheth_get_macaddr_#t~mem186#1.base, ipheth_get_macaddr_#t~mem186#1.offset; {108428#true} is VALID [2022-02-20 21:52:26,700 INFO L272 TraceCheckUtils]: 92: Hoare triple {108428#true} call ipheth_get_macaddr_#t~ret187#1 := __create_pipe(ipheth_get_macaddr_~udev~1#1.base, ipheth_get_macaddr_~udev~1#1.offset, 0); {108428#true} is VALID [2022-02-20 21:52:26,701 INFO L290 TraceCheckUtils]: 93: Hoare triple {108428#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;~endpoint := #in~endpoint;call #t~mem74 := read~int(~dev.base, ~dev.offset, 4);#res := (if (1 == 256 * #t~mem74 || 0 == 256 * #t~mem74) && 0 == 32768 * ~endpoint then 256 * #t~mem74 else (if 0 == 256 * #t~mem74 && (1 == 32768 * ~endpoint || 0 == 32768 * ~endpoint) then 32768 * ~endpoint else (if (1 == 256 * #t~mem74 && (1 == 32768 * ~endpoint || 0 == 32768 * ~endpoint)) || ((1 == 256 * #t~mem74 || 0 == 256 * #t~mem74) && 1 == 32768 * ~endpoint) then 1 else ~bitwiseOr(256 * #t~mem74, 32768 * ~endpoint))));havoc #t~mem74; {108428#true} is VALID [2022-02-20 21:52:26,701 INFO L290 TraceCheckUtils]: 94: Hoare triple {108428#true} assume true; {108428#true} is VALID [2022-02-20 21:52:26,701 INFO L284 TraceCheckUtils]: 95: Hoare quadruple {108428#true} {108428#true} #1225#return; {108428#true} is VALID [2022-02-20 21:52:26,701 INFO L290 TraceCheckUtils]: 96: Hoare triple {108428#true} ipheth_get_macaddr_~tmp~19#1 := ipheth_get_macaddr_#t~ret187#1;havoc ipheth_get_macaddr_#t~ret187#1;call ipheth_get_macaddr_#t~mem188#1.base, ipheth_get_macaddr_#t~mem188#1.offset := read~$Pointer$(ipheth_get_macaddr_~dev#1.base, 64 + ipheth_get_macaddr_~dev#1.offset, 8); {108428#true} is VALID [2022-02-20 21:52:26,701 INFO L272 TraceCheckUtils]: 97: Hoare triple {108428#true} call ipheth_get_macaddr_#t~ret189#1 := usb_control_msg(ipheth_get_macaddr_~udev~1#1.base, ipheth_get_macaddr_~udev~1#1.offset, ~bitwiseOr(ipheth_get_macaddr_~tmp~19#1, 2147483776), 0, 192, 0, 2, ipheth_get_macaddr_#t~mem188#1.base, ipheth_get_macaddr_#t~mem188#1.offset, 64, 1250); {108428#true} is VALID [2022-02-20 21:52:26,701 INFO L290 TraceCheckUtils]: 98: Hoare triple {108428#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1 := #in~arg1;~arg2 := #in~arg2;~arg3 := #in~arg3;~arg4 := #in~arg4;~arg5 := #in~arg5;~arg6.base, ~arg6.offset := #in~arg6.base, #in~arg6.offset;~arg7 := #in~arg7;~arg8 := #in~arg8;assume -2147483648 <= #t~nondet364 && #t~nondet364 <= 2147483647;#res := #t~nondet364;havoc #t~nondet364; {108428#true} is VALID [2022-02-20 21:52:26,701 INFO L290 TraceCheckUtils]: 99: Hoare triple {108428#true} assume true; {108428#true} is VALID [2022-02-20 21:52:26,701 INFO L284 TraceCheckUtils]: 100: Hoare quadruple {108428#true} {108428#true} #1227#return; {108428#true} is VALID [2022-02-20 21:52:26,702 INFO L290 TraceCheckUtils]: 101: Hoare triple {108428#true} assume -2147483648 <= ipheth_get_macaddr_#t~ret189#1 && ipheth_get_macaddr_#t~ret189#1 <= 2147483647;ipheth_get_macaddr_~retval~1#1 := ipheth_get_macaddr_#t~ret189#1;havoc ipheth_get_macaddr_#t~mem188#1.base, ipheth_get_macaddr_#t~mem188#1.offset;havoc ipheth_get_macaddr_#t~ret189#1; {108428#true} is VALID [2022-02-20 21:52:26,702 INFO L290 TraceCheckUtils]: 102: Hoare triple {108428#true} assume ipheth_get_macaddr_~retval~1#1 < 0;havoc ipheth_get_macaddr_#t~nondet190#1;call ipheth_get_macaddr_#t~mem191#1.base, ipheth_get_macaddr_#t~mem191#1.offset := read~$Pointer$(ipheth_get_macaddr_~dev#1.base, 8 + ipheth_get_macaddr_~dev#1.offset, 8);havoc ipheth_get_macaddr_#t~mem191#1.base, ipheth_get_macaddr_#t~mem191#1.offset; {108816#(< |ULTIMATE.start_ipheth_get_macaddr_~retval~1#1| 0)} is VALID [2022-02-20 21:52:26,702 INFO L290 TraceCheckUtils]: 103: Hoare triple {108816#(< |ULTIMATE.start_ipheth_get_macaddr_~retval~1#1| 0)} ipheth_get_macaddr_#res#1 := ipheth_get_macaddr_~retval~1#1; {108820#(< |ULTIMATE.start_ipheth_get_macaddr_#res#1| 0)} is VALID [2022-02-20 21:52:26,703 INFO L290 TraceCheckUtils]: 104: Hoare triple {108820#(< |ULTIMATE.start_ipheth_get_macaddr_#res#1| 0)} ipheth_probe_#t~ret289#1 := ipheth_get_macaddr_#res#1;assume { :end_inline_ipheth_get_macaddr } true;assume -2147483648 <= ipheth_probe_#t~ret289#1 && ipheth_probe_#t~ret289#1 <= 2147483647;ipheth_probe_~retval~5#1 := ipheth_probe_#t~ret289#1;havoc ipheth_probe_#t~ret289#1; {108824#(< |ULTIMATE.start_ipheth_probe_~retval~5#1| 0)} is VALID [2022-02-20 21:52:26,703 INFO L290 TraceCheckUtils]: 105: Hoare triple {108824#(< |ULTIMATE.start_ipheth_probe_~retval~5#1| 0)} assume !(0 != ipheth_probe_~retval~5#1);assume { :begin_inline___init_work } true;__init_work_#in~arg0#1.base, __init_work_#in~arg0#1.offset, __init_work_#in~arg1#1 := ipheth_probe_~dev~8#1.base, 74 + ipheth_probe_~dev~8#1.offset, 0;havoc __init_work_~arg0#1.base, __init_work_~arg0#1.offset, __init_work_~arg1#1;__init_work_~arg0#1.base, __init_work_~arg0#1.offset := __init_work_#in~arg0#1.base, __init_work_#in~arg0#1.offset;__init_work_~arg1#1 := __init_work_#in~arg1#1; {108429#false} is VALID [2022-02-20 21:52:26,703 INFO L290 TraceCheckUtils]: 106: Hoare triple {108429#false} assume { :end_inline___init_work } true;call write~int(137438953408, ipheth_probe_~#__constr_expr_0~0#1.base, ipheth_probe_~#__constr_expr_0~0#1.offset, 8);call ipheth_probe_#t~mem290#1 := read~int(ipheth_probe_~#__constr_expr_0~0#1.base, ipheth_probe_~#__constr_expr_0~0#1.offset, 8);call write~int(ipheth_probe_#t~mem290#1, ipheth_probe_~dev~8#1.base, 74 + ipheth_probe_~dev~8#1.offset, 8);havoc ipheth_probe_#t~mem290#1;assume { :begin_inline_lockdep_init_map } true;lockdep_init_map_#in~arg0#1.base, lockdep_init_map_#in~arg0#1.offset, lockdep_init_map_#in~arg1#1.base, lockdep_init_map_#in~arg1#1.offset, lockdep_init_map_#in~arg2#1.base, lockdep_init_map_#in~arg2#1.offset, lockdep_init_map_#in~arg3#1 := ipheth_probe_~dev~8#1.base, 106 + ipheth_probe_~dev~8#1.offset, 29, 0, ipheth_probe_~#__key~0#1.base, ipheth_probe_~#__key~0#1.offset, 0;havoc lockdep_init_map_~arg0#1.base, lockdep_init_map_~arg0#1.offset, lockdep_init_map_~arg1#1.base, lockdep_init_map_~arg1#1.offset, lockdep_init_map_~arg2#1.base, lockdep_init_map_~arg2#1.offset, lockdep_init_map_~arg3#1;lockdep_init_map_~arg0#1.base, lockdep_init_map_~arg0#1.offset := lockdep_init_map_#in~arg0#1.base, lockdep_init_map_#in~arg0#1.offset;lockdep_init_map_~arg1#1.base, lockdep_init_map_~arg1#1.offset := lockdep_init_map_#in~arg1#1.base, lockdep_init_map_#in~arg1#1.offset;lockdep_init_map_~arg2#1.base, lockdep_init_map_~arg2#1.offset := lockdep_init_map_#in~arg2#1.base, lockdep_init_map_#in~arg2#1.offset;lockdep_init_map_~arg3#1 := lockdep_init_map_#in~arg3#1; {108429#false} is VALID [2022-02-20 21:52:26,704 INFO L290 TraceCheckUtils]: 107: Hoare triple {108429#false} assume { :end_inline_lockdep_init_map } true;assume { :begin_inline_INIT_LIST_HEAD } true;INIT_LIST_HEAD_#in~list#1.base, INIT_LIST_HEAD_#in~list#1.offset := ipheth_probe_~dev~8#1.base, 82 + ipheth_probe_~dev~8#1.offset;havoc INIT_LIST_HEAD_~list#1.base, INIT_LIST_HEAD_~list#1.offset;INIT_LIST_HEAD_~list#1.base, INIT_LIST_HEAD_~list#1.offset := INIT_LIST_HEAD_#in~list#1.base, INIT_LIST_HEAD_#in~list#1.offset;call write~$Pointer$(INIT_LIST_HEAD_~list#1.base, INIT_LIST_HEAD_~list#1.offset, INIT_LIST_HEAD_~list#1.base, INIT_LIST_HEAD_~list#1.offset, 8);call write~$Pointer$(INIT_LIST_HEAD_~list#1.base, INIT_LIST_HEAD_~list#1.offset, INIT_LIST_HEAD_~list#1.base, 8 + INIT_LIST_HEAD_~list#1.offset, 8); {108429#false} is VALID [2022-02-20 21:52:26,704 INFO L290 TraceCheckUtils]: 108: Hoare triple {108429#false} assume { :end_inline_INIT_LIST_HEAD } true;call write~$Pointer$(#funAddr~ipheth_carrier_check_work.base, #funAddr~ipheth_carrier_check_work.offset, ipheth_probe_~dev~8#1.base, 98 + ipheth_probe_~dev~8#1.offset, 8);assume { :begin_inline_init_timer_key } true;init_timer_key_#in~arg0#1.base, init_timer_key_#in~arg0#1.offset, init_timer_key_#in~arg1#1, init_timer_key_#in~arg2#1.base, init_timer_key_#in~arg2#1.offset, init_timer_key_#in~arg3#1.base, init_timer_key_#in~arg3#1.offset := ipheth_probe_~dev~8#1.base, 150 + ipheth_probe_~dev~8#1.offset, 2, 30, 0, ipheth_probe_~#__key___0~0#1.base, ipheth_probe_~#__key___0~0#1.offset;havoc init_timer_key_~arg0#1.base, init_timer_key_~arg0#1.offset, init_timer_key_~arg1#1, init_timer_key_~arg2#1.base, init_timer_key_~arg2#1.offset, init_timer_key_~arg3#1.base, init_timer_key_~arg3#1.offset;init_timer_key_~arg0#1.base, init_timer_key_~arg0#1.offset := init_timer_key_#in~arg0#1.base, init_timer_key_#in~arg0#1.offset;init_timer_key_~arg1#1 := init_timer_key_#in~arg1#1;init_timer_key_~arg2#1.base, init_timer_key_~arg2#1.offset := init_timer_key_#in~arg2#1.base, init_timer_key_#in~arg2#1.offset;init_timer_key_~arg3#1.base, init_timer_key_~arg3#1.offset := init_timer_key_#in~arg3#1.base, init_timer_key_#in~arg3#1.offset; {108429#false} is VALID [2022-02-20 21:52:26,704 INFO L290 TraceCheckUtils]: 109: Hoare triple {108429#false} assume { :end_inline_init_timer_key } true;call write~$Pointer$(#funAddr~delayed_work_timer_fn.base, #funAddr~delayed_work_timer_fn.offset, ipheth_probe_~dev~8#1.base, 182 + ipheth_probe_~dev~8#1.offset, 8);call write~int(ipheth_probe_~dev~8#1.base + (74 + ipheth_probe_~dev~8#1.offset), ipheth_probe_~dev~8#1.base, 190 + ipheth_probe_~dev~8#1.offset, 8);assume { :begin_inline_ipheth_alloc_urbs } true;ipheth_alloc_urbs_#in~iphone#1.base, ipheth_alloc_urbs_#in~iphone#1.offset := ipheth_probe_~dev~8#1.base, ipheth_probe_~dev~8#1.offset;havoc ipheth_alloc_urbs_#res#1;havoc ipheth_alloc_urbs_#t~ret116#1.base, ipheth_alloc_urbs_#t~ret116#1.offset, ipheth_alloc_urbs_#t~ret117#1.base, ipheth_alloc_urbs_#t~ret117#1.offset, ipheth_alloc_urbs_#t~mem118#1.base, ipheth_alloc_urbs_#t~mem118#1.offset, ipheth_alloc_urbs_#t~ret119#1.base, ipheth_alloc_urbs_#t~ret119#1.offset, ipheth_alloc_urbs_#t~mem120#1.base, ipheth_alloc_urbs_#t~mem120#1.offset, ipheth_alloc_urbs_#t~ret121#1.base, ipheth_alloc_urbs_#t~ret121#1.offset, ipheth_alloc_urbs_#t~mem122#1.base, ipheth_alloc_urbs_#t~mem122#1.offset, ipheth_alloc_urbs_#t~mem123#1, ipheth_alloc_urbs_~iphone#1.base, ipheth_alloc_urbs_~iphone#1.offset, ipheth_alloc_urbs_~tx_urb~0#1.base, ipheth_alloc_urbs_~tx_urb~0#1.offset, ipheth_alloc_urbs_~rx_urb~0#1.base, ipheth_alloc_urbs_~rx_urb~0#1.offset, ipheth_alloc_urbs_~tx_buf~0#1.base, ipheth_alloc_urbs_~tx_buf~0#1.offset, ipheth_alloc_urbs_~rx_buf~0#1.base, ipheth_alloc_urbs_~rx_buf~0#1.offset, ipheth_alloc_urbs_~tmp~16#1.base, ipheth_alloc_urbs_~tmp~16#1.offset, ipheth_alloc_urbs_~tmp___0~6#1.base, ipheth_alloc_urbs_~tmp___0~6#1.offset;ipheth_alloc_urbs_~iphone#1.base, ipheth_alloc_urbs_~iphone#1.offset := ipheth_alloc_urbs_#in~iphone#1.base, ipheth_alloc_urbs_#in~iphone#1.offset;havoc ipheth_alloc_urbs_~tx_urb~0#1.base, ipheth_alloc_urbs_~tx_urb~0#1.offset;havoc ipheth_alloc_urbs_~rx_urb~0#1.base, ipheth_alloc_urbs_~rx_urb~0#1.offset;havoc ipheth_alloc_urbs_~tx_buf~0#1.base, ipheth_alloc_urbs_~tx_buf~0#1.offset;havoc ipheth_alloc_urbs_~rx_buf~0#1.base, ipheth_alloc_urbs_~rx_buf~0#1.offset;havoc ipheth_alloc_urbs_~tmp~16#1.base, ipheth_alloc_urbs_~tmp~16#1.offset;havoc ipheth_alloc_urbs_~tmp___0~6#1.base, ipheth_alloc_urbs_~tmp___0~6#1.offset;ipheth_alloc_urbs_~tx_urb~0#1.base, ipheth_alloc_urbs_~tx_urb~0#1.offset := 0, 0;ipheth_alloc_urbs_~rx_urb~0#1.base, ipheth_alloc_urbs_~rx_urb~0#1.offset := 0, 0;ipheth_alloc_urbs_~tx_buf~0#1.base, ipheth_alloc_urbs_~tx_buf~0#1.offset := 0, 0;ipheth_alloc_urbs_~rx_buf~0#1.base, ipheth_alloc_urbs_~rx_buf~0#1.offset := 0, 0;assume { :begin_inline_ldv_usb_alloc_urb_2 } true;ldv_usb_alloc_urb_2_#in~iso_packets#1, ldv_usb_alloc_urb_2_#in~mem_flags#1 := 0, 208;havoc ldv_usb_alloc_urb_2_#res#1.base, ldv_usb_alloc_urb_2_#res#1.offset;havoc ldv_usb_alloc_urb_2_#t~ret327#1.base, ldv_usb_alloc_urb_2_#t~ret327#1.offset, ldv_usb_alloc_urb_2_~iso_packets#1, ldv_usb_alloc_urb_2_~mem_flags#1, ldv_usb_alloc_urb_2_~tmp~33#1.base, ldv_usb_alloc_urb_2_~tmp~33#1.offset;ldv_usb_alloc_urb_2_~iso_packets#1 := ldv_usb_alloc_urb_2_#in~iso_packets#1;ldv_usb_alloc_urb_2_~mem_flags#1 := ldv_usb_alloc_urb_2_#in~mem_flags#1;havoc ldv_usb_alloc_urb_2_~tmp~33#1.base, ldv_usb_alloc_urb_2_~tmp~33#1.offset; {108429#false} is VALID [2022-02-20 21:52:26,704 INFO L272 TraceCheckUtils]: 110: Hoare triple {108429#false} call ldv_usb_alloc_urb_2_#t~ret327#1.base, ldv_usb_alloc_urb_2_#t~ret327#1.offset := ldv_alloc_urb(); {108429#false} is VALID [2022-02-20 21:52:26,704 INFO L290 TraceCheckUtils]: 111: Hoare triple {108429#false} havoc ~value~0.base, ~value~0.offset;havoc ~tmp~40.base, ~tmp~40.offset;havoc ~tmp___0~13; {108429#false} is VALID [2022-02-20 21:52:26,704 INFO L272 TraceCheckUtils]: 112: Hoare triple {108429#false} call #t~ret334.base, #t~ret334.offset := ldv_malloc(184); {108429#false} is VALID [2022-02-20 21:52:26,704 INFO L290 TraceCheckUtils]: 113: Hoare triple {108429#false} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet79 && #t~nondet79 <= 2147483647;~tmp___0~2 := #t~nondet79;havoc #t~nondet79; {108429#false} is VALID [2022-02-20 21:52:26,704 INFO L290 TraceCheckUtils]: 114: Hoare triple {108429#false} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {108429#false} is VALID [2022-02-20 21:52:26,705 INFO L290 TraceCheckUtils]: 115: Hoare triple {108429#false} assume true; {108429#false} is VALID [2022-02-20 21:52:26,705 INFO L284 TraceCheckUtils]: 116: Hoare quadruple {108429#false} {108429#false} #1173#return; {108429#false} is VALID [2022-02-20 21:52:26,705 INFO L290 TraceCheckUtils]: 117: Hoare triple {108429#false} ~tmp~40.base, ~tmp~40.offset := #t~ret334.base, #t~ret334.offset;havoc #t~ret334.base, #t~ret334.offset;~value~0.base, ~value~0.offset := ~tmp~40.base, ~tmp~40.offset; {108429#false} is VALID [2022-02-20 21:52:26,705 INFO L272 TraceCheckUtils]: 118: Hoare triple {108429#false} call #t~ret335 := ldv_undef_int(); {108429#false} is VALID [2022-02-20 21:52:26,705 INFO L290 TraceCheckUtils]: 119: Hoare triple {108429#false} havoc ~tmp~6;assume -2147483648 <= #t~nondet83 && #t~nondet83 <= 2147483647;~tmp~6 := #t~nondet83;havoc #t~nondet83;#res := ~tmp~6; {108429#false} is VALID [2022-02-20 21:52:26,705 INFO L290 TraceCheckUtils]: 120: Hoare triple {108429#false} assume true; {108429#false} is VALID [2022-02-20 21:52:26,705 INFO L284 TraceCheckUtils]: 121: Hoare quadruple {108429#false} {108429#false} #1175#return; {108429#false} is VALID [2022-02-20 21:52:26,705 INFO L290 TraceCheckUtils]: 122: Hoare triple {108429#false} assume -2147483648 <= #t~ret335 && #t~ret335 <= 2147483647;~tmp___0~13 := #t~ret335;havoc #t~ret335; {108429#false} is VALID [2022-02-20 21:52:26,706 INFO L290 TraceCheckUtils]: 123: Hoare triple {108429#false} assume 0 != ~tmp___0~13; {108429#false} is VALID [2022-02-20 21:52:26,706 INFO L290 TraceCheckUtils]: 124: Hoare triple {108429#false} assume 0 != (~value~0.base + ~value~0.offset) % 18446744073709551616;~usb_urb~0.base, ~usb_urb~0.offset := ~value~0.base, ~value~0.offset; {108429#false} is VALID [2022-02-20 21:52:26,706 INFO L290 TraceCheckUtils]: 125: Hoare triple {108429#false} #res.base, #res.offset := ~usb_urb~0.base, ~usb_urb~0.offset; {108429#false} is VALID [2022-02-20 21:52:26,706 INFO L290 TraceCheckUtils]: 126: Hoare triple {108429#false} assume true; {108429#false} is VALID [2022-02-20 21:52:26,706 INFO L284 TraceCheckUtils]: 127: Hoare quadruple {108429#false} {108429#false} #1233#return; {108429#false} is VALID [2022-02-20 21:52:26,706 INFO L290 TraceCheckUtils]: 128: Hoare triple {108429#false} ldv_usb_alloc_urb_2_~tmp~33#1.base, ldv_usb_alloc_urb_2_~tmp~33#1.offset := ldv_usb_alloc_urb_2_#t~ret327#1.base, ldv_usb_alloc_urb_2_#t~ret327#1.offset;havoc ldv_usb_alloc_urb_2_#t~ret327#1.base, ldv_usb_alloc_urb_2_#t~ret327#1.offset;ldv_usb_alloc_urb_2_#res#1.base, ldv_usb_alloc_urb_2_#res#1.offset := ldv_usb_alloc_urb_2_~tmp~33#1.base, ldv_usb_alloc_urb_2_~tmp~33#1.offset; {108429#false} is VALID [2022-02-20 21:52:26,706 INFO L290 TraceCheckUtils]: 129: Hoare triple {108429#false} ipheth_alloc_urbs_#t~ret116#1.base, ipheth_alloc_urbs_#t~ret116#1.offset := ldv_usb_alloc_urb_2_#res#1.base, ldv_usb_alloc_urb_2_#res#1.offset;assume { :end_inline_ldv_usb_alloc_urb_2 } true;ipheth_alloc_urbs_~tx_urb~0#1.base, ipheth_alloc_urbs_~tx_urb~0#1.offset := ipheth_alloc_urbs_#t~ret116#1.base, ipheth_alloc_urbs_#t~ret116#1.offset;havoc ipheth_alloc_urbs_#t~ret116#1.base, ipheth_alloc_urbs_#t~ret116#1.offset; {108429#false} is VALID [2022-02-20 21:52:26,706 INFO L290 TraceCheckUtils]: 130: Hoare triple {108429#false} assume 0 == (ipheth_alloc_urbs_~tx_urb~0#1.base + ipheth_alloc_urbs_~tx_urb~0#1.offset) % 18446744073709551616; {108429#false} is VALID [2022-02-20 21:52:26,707 INFO L290 TraceCheckUtils]: 131: Hoare triple {108429#false} ipheth_alloc_urbs_#res#1 := -12; {108429#false} is VALID [2022-02-20 21:52:26,707 INFO L290 TraceCheckUtils]: 132: Hoare triple {108429#false} ipheth_probe_#t~ret291#1 := ipheth_alloc_urbs_#res#1;assume { :end_inline_ipheth_alloc_urbs } true;assume -2147483648 <= ipheth_probe_#t~ret291#1 && ipheth_probe_#t~ret291#1 <= 2147483647;ipheth_probe_~retval~5#1 := ipheth_probe_#t~ret291#1;havoc ipheth_probe_#t~ret291#1; {108429#false} is VALID [2022-02-20 21:52:26,707 INFO L290 TraceCheckUtils]: 133: Hoare triple {108429#false} assume 0 != ipheth_probe_~retval~5#1;havoc ipheth_probe_#t~nondet292#1; {108429#false} is VALID [2022-02-20 21:52:26,707 INFO L290 TraceCheckUtils]: 134: Hoare triple {108429#false} call ipheth_probe_#t~mem296#1.base, ipheth_probe_#t~mem296#1.offset := read~$Pointer$(ipheth_probe_~dev~8#1.base, 64 + ipheth_probe_~dev~8#1.offset, 8); {108429#false} is VALID [2022-02-20 21:52:26,707 INFO L272 TraceCheckUtils]: 135: Hoare triple {108429#false} call kfree(ipheth_probe_#t~mem296#1.base, ipheth_probe_#t~mem296#1.offset); {108429#false} is VALID [2022-02-20 21:52:26,707 INFO L290 TraceCheckUtils]: 136: Hoare triple {108429#false} ~p.base, ~p.offset := #in~p.base, #in~p.offset;call ULTIMATE.dealloc(~p.base, ~p.offset); {108429#false} is VALID [2022-02-20 21:52:26,707 INFO L290 TraceCheckUtils]: 137: Hoare triple {108429#false} assume true; {108429#false} is VALID [2022-02-20 21:52:26,707 INFO L284 TraceCheckUtils]: 138: Hoare quadruple {108429#false} {108429#false} #1253#return; {108429#false} is VALID [2022-02-20 21:52:26,707 INFO L290 TraceCheckUtils]: 139: Hoare triple {108429#false} havoc ipheth_probe_#t~mem296#1.base, ipheth_probe_#t~mem296#1.offset; {108429#false} is VALID [2022-02-20 21:52:26,708 INFO L290 TraceCheckUtils]: 140: Hoare triple {108429#false} assume { :begin_inline_ldv_free_netdev_14 } true;ldv_free_netdev_14_#in~dev#1.base, ldv_free_netdev_14_#in~dev#1.offset := ipheth_probe_~netdev~0#1.base, ipheth_probe_~netdev~0#1.offset;havoc ldv_free_netdev_14_~dev#1.base, ldv_free_netdev_14_~dev#1.offset;ldv_free_netdev_14_~dev#1.base, ldv_free_netdev_14_~dev#1.offset := ldv_free_netdev_14_#in~dev#1.base, ldv_free_netdev_14_#in~dev#1.offset; {108429#false} is VALID [2022-02-20 21:52:26,708 INFO L272 TraceCheckUtils]: 141: Hoare triple {108429#false} call free_netdev(ldv_free_netdev_14_~dev#1.base, ldv_free_netdev_14_~dev#1.offset); {108429#false} is VALID [2022-02-20 21:52:26,708 INFO L290 TraceCheckUtils]: 142: Hoare triple {108429#false} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset; {108429#false} is VALID [2022-02-20 21:52:26,708 INFO L290 TraceCheckUtils]: 143: Hoare triple {108429#false} assume true; {108429#false} is VALID [2022-02-20 21:52:26,708 INFO L284 TraceCheckUtils]: 144: Hoare quadruple {108429#false} {108429#false} #1255#return; {108429#false} is VALID [2022-02-20 21:52:26,708 INFO L290 TraceCheckUtils]: 145: Hoare triple {108429#false} ~ldv_state_variable_2~0 := 0; {108429#false} is VALID [2022-02-20 21:52:26,708 INFO L290 TraceCheckUtils]: 146: Hoare triple {108429#false} assume { :end_inline_ldv_free_netdev_14 } true;ipheth_probe_#res#1 := ipheth_probe_~retval~5#1;call ULTIMATE.dealloc(ipheth_probe_~#__key~0#1.base, ipheth_probe_~#__key~0#1.offset);havoc ipheth_probe_~#__key~0#1.base, ipheth_probe_~#__key~0#1.offset;call ULTIMATE.dealloc(ipheth_probe_~#__constr_expr_0~0#1.base, ipheth_probe_~#__constr_expr_0~0#1.offset);havoc ipheth_probe_~#__constr_expr_0~0#1.base, ipheth_probe_~#__constr_expr_0~0#1.offset;call ULTIMATE.dealloc(ipheth_probe_~#__key___0~0#1.base, ipheth_probe_~#__key___0~0#1.offset);havoc ipheth_probe_~#__key___0~0#1.base, ipheth_probe_~#__key___0~0#1.offset; {108429#false} is VALID [2022-02-20 21:52:26,708 INFO L290 TraceCheckUtils]: 147: Hoare triple {108429#false} main_#t~ret312#1 := ipheth_probe_#res#1;assume { :end_inline_ipheth_probe } true;assume -2147483648 <= main_#t~ret312#1 && main_#t~ret312#1 <= 2147483647;~ldv_retval_0~0 := main_#t~ret312#1;havoc main_#t~ret312#1; {108429#false} is VALID [2022-02-20 21:52:26,709 INFO L290 TraceCheckUtils]: 148: Hoare triple {108429#false} assume 0 == ~ldv_retval_0~0;~ldv_state_variable_1~0 := 2;~ref_cnt~0 := 1 + ~ref_cnt~0; {108429#false} is VALID [2022-02-20 21:52:26,709 INFO L290 TraceCheckUtils]: 149: Hoare triple {108429#false} assume -2147483648 <= main_#t~nondet308#1 && main_#t~nondet308#1 <= 2147483647;main_~tmp___2~2#1 := main_#t~nondet308#1;havoc main_#t~nondet308#1;main_#t~switch309#1 := 0 == main_~tmp___2~2#1; {108429#false} is VALID [2022-02-20 21:52:26,709 INFO L290 TraceCheckUtils]: 150: Hoare triple {108429#false} assume !main_#t~switch309#1;main_#t~switch309#1 := main_#t~switch309#1 || 1 == main_~tmp___2~2#1; {108429#false} is VALID [2022-02-20 21:52:26,709 INFO L290 TraceCheckUtils]: 151: Hoare triple {108429#false} assume main_#t~switch309#1; {108429#false} is VALID [2022-02-20 21:52:26,709 INFO L290 TraceCheckUtils]: 152: Hoare triple {108429#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet313#1 && main_#t~nondet313#1 <= 2147483647;main_~tmp___4~0#1 := main_#t~nondet313#1;havoc main_#t~nondet313#1;main_#t~switch314#1 := 0 == main_~tmp___4~0#1; {108429#false} is VALID [2022-02-20 21:52:26,709 INFO L290 TraceCheckUtils]: 153: Hoare triple {108429#false} assume main_#t~switch314#1; {108429#false} is VALID [2022-02-20 21:52:26,709 INFO L290 TraceCheckUtils]: 154: Hoare triple {108429#false} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0;assume { :begin_inline_ipheth_driver_exit } true;assume { :begin_inline_ldv_usb_deregister_20 } true;ldv_usb_deregister_20_#in~arg#1.base, ldv_usb_deregister_20_#in~arg#1.offset := ~#ipheth_driver~0.base, ~#ipheth_driver~0.offset;havoc ldv_usb_deregister_20_~arg#1.base, ldv_usb_deregister_20_~arg#1.offset;ldv_usb_deregister_20_~arg#1.base, ldv_usb_deregister_20_~arg#1.offset := ldv_usb_deregister_20_#in~arg#1.base, ldv_usb_deregister_20_#in~arg#1.offset;assume { :begin_inline_usb_deregister } true;usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset := ldv_usb_deregister_20_~arg#1.base, ldv_usb_deregister_20_~arg#1.offset;havoc usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset;usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset := usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset; {108429#false} is VALID [2022-02-20 21:52:26,709 INFO L290 TraceCheckUtils]: 155: Hoare triple {108429#false} assume { :end_inline_usb_deregister } true;~ldv_state_variable_1~0 := 0; {108429#false} is VALID [2022-02-20 21:52:26,710 INFO L290 TraceCheckUtils]: 156: Hoare triple {108429#false} assume { :end_inline_ldv_usb_deregister_20 } true; {108429#false} is VALID [2022-02-20 21:52:26,710 INFO L290 TraceCheckUtils]: 157: Hoare triple {108429#false} assume { :end_inline_ipheth_driver_exit } true;~ldv_state_variable_0~0 := 2; {108429#false} is VALID [2022-02-20 21:52:26,710 INFO L290 TraceCheckUtils]: 158: Hoare triple {108429#false} assume { :begin_inline_ldv_check_final_state } true; {108429#false} is VALID [2022-02-20 21:52:26,710 INFO L290 TraceCheckUtils]: 159: Hoare triple {108429#false} assume !(0 == (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616); {108429#false} is VALID [2022-02-20 21:52:26,710 INFO L272 TraceCheckUtils]: 160: Hoare triple {108429#false} call ldv_error(); {108429#false} is VALID [2022-02-20 21:52:26,710 INFO L290 TraceCheckUtils]: 161: Hoare triple {108429#false} assume !false; {108429#false} is VALID [2022-02-20 21:52:26,711 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 23 proven. 0 refuted. 0 times theorem prover too weak. 50 trivial. 0 not checked. [2022-02-20 21:52:26,711 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-02-20 21:52:26,711 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [319339944] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:52:26,711 INFO L191 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-02-20 21:52:26,711 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [8] total 11 [2022-02-20 21:52:26,711 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1630264201] [2022-02-20 21:52:26,711 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:52:26,712 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 22.0) internal successors, (110), 5 states have internal predecessors, (110), 2 states have call successors, (17), 2 states have call predecessors, (17), 2 states have return successors, (16), 2 states have call predecessors, (16), 2 states have call successors, (16) Word has length 162 [2022-02-20 21:52:26,712 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:52:26,712 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 22.0) internal successors, (110), 5 states have internal predecessors, (110), 2 states have call successors, (17), 2 states have call predecessors, (17), 2 states have return successors, (16), 2 states have call predecessors, (16), 2 states have call successors, (16) [2022-02-20 21:52:26,830 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 143 edges. 143 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:52:26,830 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-02-20 21:52:26,830 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:52:26,831 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-02-20 21:52:26,831 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=86, Unknown=0, NotChecked=0, Total=110 [2022-02-20 21:52:26,831 INFO L87 Difference]: Start difference. First operand 3520 states and 4674 transitions. Second operand has 5 states, 5 states have (on average 22.0) internal successors, (110), 5 states have internal predecessors, (110), 2 states have call successors, (17), 2 states have call predecessors, (17), 2 states have return successors, (16), 2 states have call predecessors, (16), 2 states have call successors, (16)