./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/ldv-linux-3.14/linux-3.14_complex_emg_linux-alloc-spinlock_drivers-net-ethernet-3com-typhoon.cil.i --full-output -ea --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 03d7b7b3 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -ea -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/ldv-linux-3.14/linux-3.14_complex_emg_linux-alloc-spinlock_drivers-net-ethernet-3com-typhoon.cil.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash a82ce6420bb3a33f545de9c61d1c9b088648b3b20e86d3c3faffeeee8d72c08d --- Real Ultimate output --- This is Ultimate 0.2.2-dev-03d7b7b [2022-02-20 22:36:36,829 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-02-20 22:36:36,832 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-02-20 22:36:36,874 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-02-20 22:36:36,875 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-02-20 22:36:36,878 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-02-20 22:36:36,879 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-02-20 22:36:36,881 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-02-20 22:36:36,882 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-02-20 22:36:36,886 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-02-20 22:36:36,886 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-02-20 22:36:36,888 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-02-20 22:36:36,889 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-02-20 22:36:36,891 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-02-20 22:36:36,892 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-02-20 22:36:36,895 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-02-20 22:36:36,896 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-02-20 22:36:36,896 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-02-20 22:36:36,898 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-02-20 22:36:36,904 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-02-20 22:36:36,905 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-02-20 22:36:36,906 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-02-20 22:36:36,908 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-02-20 22:36:36,908 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-02-20 22:36:36,914 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-02-20 22:36:36,915 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-02-20 22:36:36,915 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-02-20 22:36:36,916 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-02-20 22:36:36,917 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-02-20 22:36:36,917 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-02-20 22:36:36,918 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-02-20 22:36:36,919 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-02-20 22:36:36,920 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-02-20 22:36:36,921 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-02-20 22:36:36,922 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-02-20 22:36:36,922 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-02-20 22:36:36,923 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-02-20 22:36:36,923 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-02-20 22:36:36,923 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-02-20 22:36:36,924 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-02-20 22:36:36,925 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-02-20 22:36:36,926 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2022-02-20 22:36:36,955 INFO L113 SettingsManager]: Loading preferences was successful [2022-02-20 22:36:36,955 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-02-20 22:36:36,956 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-02-20 22:36:36,956 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-02-20 22:36:36,957 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-02-20 22:36:36,957 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-02-20 22:36:36,958 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-02-20 22:36:36,958 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-02-20 22:36:36,958 INFO L138 SettingsManager]: * Use SBE=true [2022-02-20 22:36:36,958 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-02-20 22:36:36,959 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-02-20 22:36:36,959 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-02-20 22:36:36,960 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-02-20 22:36:36,960 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-02-20 22:36:36,960 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-02-20 22:36:36,960 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-02-20 22:36:36,960 INFO L138 SettingsManager]: * Use constant arrays=true [2022-02-20 22:36:36,961 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-02-20 22:36:36,961 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-02-20 22:36:36,961 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-02-20 22:36:36,961 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-02-20 22:36:36,961 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-02-20 22:36:36,962 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-02-20 22:36:36,962 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-02-20 22:36:36,962 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-02-20 22:36:36,962 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-02-20 22:36:36,962 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-02-20 22:36:36,964 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2022-02-20 22:36:36,964 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2022-02-20 22:36:36,964 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-02-20 22:36:36,964 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> a82ce6420bb3a33f545de9c61d1c9b088648b3b20e86d3c3faffeeee8d72c08d [2022-02-20 22:36:37,204 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-02-20 22:36:37,231 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-02-20 22:36:37,234 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-02-20 22:36:37,236 INFO L271 PluginConnector]: Initializing CDTParser... [2022-02-20 22:36:37,237 INFO L275 PluginConnector]: CDTParser initialized [2022-02-20 22:36:37,238 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/ldv-linux-3.14/linux-3.14_complex_emg_linux-alloc-spinlock_drivers-net-ethernet-3com-typhoon.cil.i [2022-02-20 22:36:37,304 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f0a05ab7d/286731f9ad1a4cbb964525ea1ac133ad/FLAG1cf1f10c6 [2022-02-20 22:36:38,022 INFO L306 CDTParser]: Found 1 translation units. [2022-02-20 22:36:38,023 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.14/linux-3.14_complex_emg_linux-alloc-spinlock_drivers-net-ethernet-3com-typhoon.cil.i [2022-02-20 22:36:38,076 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f0a05ab7d/286731f9ad1a4cbb964525ea1ac133ad/FLAG1cf1f10c6 [2022-02-20 22:36:38,562 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f0a05ab7d/286731f9ad1a4cbb964525ea1ac133ad [2022-02-20 22:36:38,564 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-02-20 22:36:38,567 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-02-20 22:36:38,568 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-02-20 22:36:38,568 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-02-20 22:36:38,571 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-02-20 22:36:38,572 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.02 10:36:38" (1/1) ... [2022-02-20 22:36:38,573 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@55296a4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:36:38, skipping insertion in model container [2022-02-20 22:36:38,573 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.02 10:36:38" (1/1) ... [2022-02-20 22:36:38,580 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-02-20 22:36:38,720 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-02-20 22:36:41,738 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.14/linux-3.14_complex_emg_linux-alloc-spinlock_drivers-net-ethernet-3com-typhoon.cil.i[342349,342362] [2022-02-20 22:36:41,741 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.14/linux-3.14_complex_emg_linux-alloc-spinlock_drivers-net-ethernet-3com-typhoon.cil.i[342494,342507] [2022-02-20 22:36:41,776 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-20 22:36:41,830 INFO L203 MainTranslator]: Completed pre-run [2022-02-20 22:36:42,180 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.14/linux-3.14_complex_emg_linux-alloc-spinlock_drivers-net-ethernet-3com-typhoon.cil.i[342349,342362] [2022-02-20 22:36:42,181 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.14/linux-3.14_complex_emg_linux-alloc-spinlock_drivers-net-ethernet-3com-typhoon.cil.i[342494,342507] [2022-02-20 22:36:42,188 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-20 22:36:42,385 INFO L208 MainTranslator]: Completed translation [2022-02-20 22:36:42,385 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:36:42 WrapperNode [2022-02-20 22:36:42,386 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-02-20 22:36:42,387 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-02-20 22:36:42,387 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-02-20 22:36:42,387 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-02-20 22:36:42,393 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:36:42" (1/1) ... [2022-02-20 22:36:42,572 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:36:42" (1/1) ... [2022-02-20 22:36:42,872 INFO L137 Inliner]: procedures = 455, calls = 2192, calls flagged for inlining = 223, calls inlined = 189, statements flattened = 5139 [2022-02-20 22:36:42,873 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-02-20 22:36:42,874 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-02-20 22:36:42,874 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-02-20 22:36:42,874 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-02-20 22:36:42,882 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:36:42" (1/1) ... [2022-02-20 22:36:42,882 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:36:42" (1/1) ... [2022-02-20 22:36:42,911 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:36:42" (1/1) ... [2022-02-20 22:36:42,912 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:36:42" (1/1) ... [2022-02-20 22:36:43,045 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:36:42" (1/1) ... [2022-02-20 22:36:43,065 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:36:42" (1/1) ... [2022-02-20 22:36:43,085 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:36:42" (1/1) ... [2022-02-20 22:36:43,114 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-02-20 22:36:43,117 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-02-20 22:36:43,117 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-02-20 22:36:43,117 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-02-20 22:36:43,119 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:36:42" (1/1) ... [2022-02-20 22:36:43,125 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-02-20 22:36:43,134 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-20 22:36:43,152 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-02-20 22:36:43,175 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-02-20 22:36:43,189 INFO L130 BoogieDeclarations]: Found specification of procedure pci_release_regions [2022-02-20 22:36:43,190 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_release_regions [2022-02-20 22:36:43,190 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.meminit [2022-02-20 22:36:43,190 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.meminit [2022-02-20 22:36:43,190 INFO L130 BoogieDeclarations]: Found specification of procedure netdev_alloc_skb [2022-02-20 22:36:43,190 INFO L138 BoogieDeclarations]: Found implementation of procedure netdev_alloc_skb [2022-02-20 22:36:43,190 INFO L130 BoogieDeclarations]: Found specification of procedure netif_wake_queue [2022-02-20 22:36:43,190 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_wake_queue [2022-02-20 22:36:43,191 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2022-02-20 22:36:43,191 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2022-02-20 22:36:43,191 INFO L130 BoogieDeclarations]: Found specification of procedure free_irq [2022-02-20 22:36:43,191 INFO L138 BoogieDeclarations]: Found implementation of procedure free_irq [2022-02-20 22:36:43,191 INFO L130 BoogieDeclarations]: Found specification of procedure typhoon_wakeup [2022-02-20 22:36:43,191 INFO L138 BoogieDeclarations]: Found implementation of procedure typhoon_wakeup [2022-02-20 22:36:43,191 INFO L130 BoogieDeclarations]: Found specification of procedure typhoon_wait_status [2022-02-20 22:36:43,192 INFO L138 BoogieDeclarations]: Found implementation of procedure typhoon_wait_status [2022-02-20 22:36:43,192 INFO L130 BoogieDeclarations]: Found specification of procedure typhoon_set_rx_mode [2022-02-20 22:36:43,192 INFO L138 BoogieDeclarations]: Found implementation of procedure typhoon_set_rx_mode [2022-02-20 22:36:43,192 INFO L130 BoogieDeclarations]: Found specification of procedure valid_dma_direction [2022-02-20 22:36:43,192 INFO L138 BoogieDeclarations]: Found implementation of procedure valid_dma_direction [2022-02-20 22:36:43,192 INFO L130 BoogieDeclarations]: Found specification of procedure clear_bit [2022-02-20 22:36:43,192 INFO L138 BoogieDeclarations]: Found implementation of procedure clear_bit [2022-02-20 22:36:43,193 INFO L130 BoogieDeclarations]: Found specification of procedure ioread32 [2022-02-20 22:36:43,193 INFO L138 BoogieDeclarations]: Found implementation of procedure ioread32 [2022-02-20 22:36:43,193 INFO L130 BoogieDeclarations]: Found specification of procedure pci_name [2022-02-20 22:36:43,193 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_name [2022-02-20 22:36:43,193 INFO L130 BoogieDeclarations]: Found specification of procedure memcmp [2022-02-20 22:36:43,193 INFO L130 BoogieDeclarations]: Found specification of procedure pci_get_drvdata [2022-02-20 22:36:43,193 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_get_drvdata [2022-02-20 22:36:43,194 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_xmalloc [2022-02-20 22:36:43,194 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_xmalloc [2022-02-20 22:36:43,194 INFO L130 BoogieDeclarations]: Found specification of procedure strlcpy [2022-02-20 22:36:43,194 INFO L138 BoogieDeclarations]: Found implementation of procedure strlcpy [2022-02-20 22:36:43,194 INFO L130 BoogieDeclarations]: Found specification of procedure iowrite32 [2022-02-20 22:36:43,194 INFO L138 BoogieDeclarations]: Found implementation of procedure iowrite32 [2022-02-20 22:36:43,194 INFO L130 BoogieDeclarations]: Found specification of procedure skb_end_pointer [2022-02-20 22:36:43,195 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_end_pointer [2022-02-20 22:36:43,195 INFO L130 BoogieDeclarations]: Found specification of procedure eth_validate_addr [2022-02-20 22:36:43,195 INFO L138 BoogieDeclarations]: Found implementation of procedure eth_validate_addr [2022-02-20 22:36:43,195 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_is_err [2022-02-20 22:36:43,195 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_is_err [2022-02-20 22:36:43,195 INFO L130 BoogieDeclarations]: Found specification of procedure pci_unmap_single [2022-02-20 22:36:43,195 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_unmap_single [2022-02-20 22:36:43,196 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-02-20 22:36:43,196 INFO L130 BoogieDeclarations]: Found specification of procedure typhoon_clean_tx [2022-02-20 22:36:43,196 INFO L138 BoogieDeclarations]: Found implementation of procedure typhoon_clean_tx [2022-02-20 22:36:43,196 INFO L130 BoogieDeclarations]: Found specification of procedure typhoon_stop_runtime [2022-02-20 22:36:43,196 INFO L138 BoogieDeclarations]: Found implementation of procedure typhoon_stop_runtime [2022-02-20 22:36:43,196 INFO L130 BoogieDeclarations]: Found specification of procedure netdev_get_tx_queue [2022-02-20 22:36:43,196 INFO L138 BoogieDeclarations]: Found implementation of procedure netdev_get_tx_queue [2022-02-20 22:36:43,197 INFO L130 BoogieDeclarations]: Found specification of procedure typhoon_resume [2022-02-20 22:36:43,197 INFO L138 BoogieDeclarations]: Found implementation of procedure typhoon_resume [2022-02-20 22:36:43,197 INFO L130 BoogieDeclarations]: Found specification of procedure typhoon_inc_rxfree_index [2022-02-20 22:36:43,197 INFO L138 BoogieDeclarations]: Found implementation of procedure typhoon_inc_rxfree_index [2022-02-20 22:36:43,197 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~int [2022-02-20 22:36:43,197 INFO L130 BoogieDeclarations]: Found specification of procedure typhoon_remove_one [2022-02-20 22:36:43,197 INFO L138 BoogieDeclarations]: Found implementation of procedure typhoon_remove_one [2022-02-20 22:36:43,198 INFO L130 BoogieDeclarations]: Found specification of procedure get_dma_ops [2022-02-20 22:36:43,198 INFO L138 BoogieDeclarations]: Found implementation of procedure get_dma_ops [2022-02-20 22:36:43,198 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2022-02-20 22:36:43,198 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_assume [2022-02-20 22:36:43,198 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_assume [2022-02-20 22:36:43,198 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-02-20 22:36:43,198 INFO L130 BoogieDeclarations]: Found specification of procedure __phys_addr [2022-02-20 22:36:43,199 INFO L138 BoogieDeclarations]: Found implementation of procedure __phys_addr [2022-02-20 22:36:43,199 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2022-02-20 22:36:43,199 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2022-02-20 22:36:43,199 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_set_drvdata [2022-02-20 22:36:43,199 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_set_drvdata [2022-02-20 22:36:43,199 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_filter_err_code [2022-02-20 22:36:43,199 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_filter_err_code [2022-02-20 22:36:43,199 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_alloc_flags [2022-02-20 22:36:43,200 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_check_alloc_flags [2022-02-20 22:36:43,200 INFO L130 BoogieDeclarations]: Found specification of procedure pci_iomap [2022-02-20 22:36:43,200 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_iomap [2022-02-20 22:36:43,200 INFO L130 BoogieDeclarations]: Found specification of procedure pci_free_consistent [2022-02-20 22:36:43,200 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_free_consistent [2022-02-20 22:36:43,200 INFO L130 BoogieDeclarations]: Found specification of procedure pci_disable_device [2022-02-20 22:36:43,200 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_disable_device [2022-02-20 22:36:43,201 INFO L130 BoogieDeclarations]: Found specification of procedure typhoon_close [2022-02-20 22:36:43,201 INFO L138 BoogieDeclarations]: Found implementation of procedure typhoon_close [2022-02-20 22:36:43,201 INFO L130 BoogieDeclarations]: Found specification of procedure typhoon_tx_timeout [2022-02-20 22:36:43,201 INFO L138 BoogieDeclarations]: Found implementation of procedure typhoon_tx_timeout [2022-02-20 22:36:43,201 INFO L130 BoogieDeclarations]: Found specification of procedure typhoon_alloc_rx_skb [2022-02-20 22:36:43,201 INFO L138 BoogieDeclarations]: Found implementation of procedure typhoon_alloc_rx_skb [2022-02-20 22:36:43,201 INFO L130 BoogieDeclarations]: Found specification of procedure typhoon_issue_command [2022-02-20 22:36:43,201 INFO L138 BoogieDeclarations]: Found implementation of procedure typhoon_issue_command [2022-02-20 22:36:43,202 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-02-20 22:36:43,202 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_switch_1 [2022-02-20 22:36:43,202 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_switch_1 [2022-02-20 22:36:43,202 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_switch_0 [2022-02-20 22:36:43,202 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_switch_0 [2022-02-20 22:36:43,202 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-02-20 22:36:43,202 INFO L130 BoogieDeclarations]: Found specification of procedure typhoon_process_response [2022-02-20 22:36:43,203 INFO L138 BoogieDeclarations]: Found implementation of procedure typhoon_process_response [2022-02-20 22:36:43,203 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_undef_int [2022-02-20 22:36:43,203 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_undef_int [2022-02-20 22:36:43,203 INFO L130 BoogieDeclarations]: Found specification of procedure __const_udelay [2022-02-20 22:36:43,203 INFO L138 BoogieDeclarations]: Found implementation of procedure __const_udelay [2022-02-20 22:36:43,203 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-02-20 22:36:43,203 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2022-02-20 22:36:43,204 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2022-02-20 22:36:43,204 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_exclusive_spin_is_locked [2022-02-20 22:36:43,204 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_exclusive_spin_is_locked [2022-02-20 22:36:43,204 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_assert [2022-02-20 22:36:43,204 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_assert [2022-02-20 22:36:43,204 INFO L130 BoogieDeclarations]: Found specification of procedure skb_is_gso [2022-02-20 22:36:43,204 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_is_gso [2022-02-20 22:36:43,204 INFO L130 BoogieDeclarations]: Found specification of procedure typhoon_num_free_tx [2022-02-20 22:36:43,205 INFO L138 BoogieDeclarations]: Found implementation of procedure typhoon_num_free_tx [2022-02-20 22:36:43,205 INFO L130 BoogieDeclarations]: Found specification of procedure napi_disable [2022-02-20 22:36:43,205 INFO L138 BoogieDeclarations]: Found implementation of procedure napi_disable [2022-02-20 22:36:43,205 INFO L130 BoogieDeclarations]: Found specification of procedure typhoon_reset [2022-02-20 22:36:43,205 INFO L138 BoogieDeclarations]: Found implementation of procedure typhoon_reset [2022-02-20 22:36:43,205 INFO L130 BoogieDeclarations]: Found specification of procedure warn_slowpath_null [2022-02-20 22:36:43,205 INFO L138 BoogieDeclarations]: Found implementation of procedure warn_slowpath_null [2022-02-20 22:36:43,206 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_free_netdev [2022-02-20 22:36:43,206 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_free_netdev [2022-02-20 22:36:43,206 INFO L130 BoogieDeclarations]: Found specification of procedure typhoon_inc_cmd_index [2022-02-20 22:36:43,206 INFO L138 BoogieDeclarations]: Found implementation of procedure typhoon_inc_cmd_index [2022-02-20 22:36:43,206 INFO L130 BoogieDeclarations]: Found specification of procedure set_bit [2022-02-20 22:36:43,206 INFO L138 BoogieDeclarations]: Found implementation of procedure set_bit [2022-02-20 22:36:43,206 INFO L130 BoogieDeclarations]: Found specification of procedure typhoon_fill_free_ring [2022-02-20 22:36:43,207 INFO L138 BoogieDeclarations]: Found implementation of procedure typhoon_fill_free_ring [2022-02-20 22:36:43,207 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-02-20 22:36:43,207 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-02-20 22:36:43,207 INFO L130 BoogieDeclarations]: Found specification of procedure __fswab32 [2022-02-20 22:36:43,207 INFO L138 BoogieDeclarations]: Found implementation of procedure __fswab32 [2022-02-20 22:36:43,207 INFO L130 BoogieDeclarations]: Found specification of procedure msleep [2022-02-20 22:36:43,207 INFO L138 BoogieDeclarations]: Found implementation of procedure msleep [2022-02-20 22:36:43,207 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2022-02-20 22:36:43,208 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2022-02-20 22:36:43,208 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_stop [2022-02-20 22:36:43,208 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_stop [2022-02-20 22:36:43,208 INFO L130 BoogieDeclarations]: Found specification of procedure netif_carrier_off [2022-02-20 22:36:43,208 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_carrier_off [2022-02-20 22:36:43,208 INFO L130 BoogieDeclarations]: Found specification of procedure pci_map_single [2022-02-20 22:36:43,208 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_map_single [2022-02-20 22:36:43,209 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2022-02-20 22:36:43,209 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2022-02-20 22:36:43,209 INFO L130 BoogieDeclarations]: Found specification of procedure netif_stop_queue [2022-02-20 22:36:43,209 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_stop_queue [2022-02-20 22:36:43,209 INFO L130 BoogieDeclarations]: Found specification of procedure pci_alloc_consistent [2022-02-20 22:36:43,209 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_alloc_consistent [2022-02-20 22:36:43,209 INFO L130 BoogieDeclarations]: Found specification of procedure typhoon_wait_interrupt [2022-02-20 22:36:43,209 INFO L138 BoogieDeclarations]: Found implementation of procedure typhoon_wait_interrupt [2022-02-20 22:36:43,210 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-02-20 22:36:43,210 INFO L130 BoogieDeclarations]: Found specification of procedure netif_running [2022-02-20 22:36:43,210 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_running [2022-02-20 22:36:43,210 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-02-20 22:36:43,210 INFO L130 BoogieDeclarations]: Found specification of procedure pci_clear_mwi [2022-02-20 22:36:43,210 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_clear_mwi [2022-02-20 22:36:43,210 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2022-02-20 22:36:43,210 INFO L130 BoogieDeclarations]: Found specification of procedure typhoon_boot_3XP [2022-02-20 22:36:43,211 INFO L138 BoogieDeclarations]: Found implementation of procedure typhoon_boot_3XP [2022-02-20 22:36:43,211 INFO L130 BoogieDeclarations]: Found specification of procedure __fswab16 [2022-02-20 22:36:43,211 INFO L138 BoogieDeclarations]: Found implementation of procedure __fswab16 [2022-02-20 22:36:43,211 INFO L130 BoogieDeclarations]: Found specification of procedure netdev_priv [2022-02-20 22:36:43,211 INFO L138 BoogieDeclarations]: Found implementation of procedure netdev_priv [2022-02-20 22:36:43,211 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_filter_positive_int [2022-02-20 22:36:43,211 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_filter_positive_int [2022-02-20 22:36:43,212 INFO L130 BoogieDeclarations]: Found specification of procedure release_firmware [2022-02-20 22:36:43,212 INFO L138 BoogieDeclarations]: Found implementation of procedure release_firmware [2022-02-20 22:36:43,212 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_free_irq [2022-02-20 22:36:43,212 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_free_irq [2022-02-20 22:36:43,212 INFO L130 BoogieDeclarations]: Found specification of procedure pci_restore_state [2022-02-20 22:36:43,212 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_restore_state [2022-02-20 22:36:43,212 INFO L130 BoogieDeclarations]: Found specification of procedure netif_tx_start_queue [2022-02-20 22:36:43,212 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_tx_start_queue [2022-02-20 22:36:43,213 INFO L130 BoogieDeclarations]: Found specification of procedure free_netdev [2022-02-20 22:36:43,213 INFO L138 BoogieDeclarations]: Found implementation of procedure free_netdev [2022-02-20 22:36:43,213 INFO L130 BoogieDeclarations]: Found specification of procedure typhoon_free_rx_rings [2022-02-20 22:36:43,213 INFO L138 BoogieDeclarations]: Found implementation of procedure typhoon_free_rx_rings [2022-02-20 22:36:43,213 INFO L130 BoogieDeclarations]: Found specification of procedure constant_test_bit [2022-02-20 22:36:43,213 INFO L138 BoogieDeclarations]: Found implementation of procedure constant_test_bit [2022-02-20 22:36:43,213 INFO L130 BoogieDeclarations]: Found specification of procedure typhoon_do_get_stats [2022-02-20 22:36:43,213 INFO L138 BoogieDeclarations]: Found implementation of procedure typhoon_do_get_stats [2022-02-20 22:36:43,214 INFO L130 BoogieDeclarations]: Found specification of procedure typhoon_num_free [2022-02-20 22:36:43,214 INFO L138 BoogieDeclarations]: Found implementation of procedure typhoon_num_free [2022-02-20 22:36:43,214 INFO L130 BoogieDeclarations]: Found specification of procedure typhoon_sleep [2022-02-20 22:36:43,214 INFO L138 BoogieDeclarations]: Found implementation of procedure typhoon_sleep [2022-02-20 22:36:43,214 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-02-20 22:36:43,214 INFO L130 BoogieDeclarations]: Found specification of procedure ldv__builtin_expect [2022-02-20 22:36:43,214 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv__builtin_expect [2022-02-20 22:36:43,214 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_spin_unlock_84 [2022-02-20 22:36:43,215 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_spin_unlock_84 [2022-02-20 22:36:43,215 INFO L130 BoogieDeclarations]: Found specification of procedure typhoon_init_rings [2022-02-20 22:36:43,215 INFO L138 BoogieDeclarations]: Found implementation of procedure typhoon_init_rings [2022-02-20 22:36:43,215 INFO L130 BoogieDeclarations]: Found specification of procedure test_and_set_bit [2022-02-20 22:36:43,215 INFO L138 BoogieDeclarations]: Found implementation of procedure test_and_set_bit [2022-02-20 22:36:43,215 INFO L130 BoogieDeclarations]: Found specification of procedure typhoon_open [2022-02-20 22:36:43,215 INFO L138 BoogieDeclarations]: Found implementation of procedure typhoon_open [2022-02-20 22:36:43,216 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_free [2022-02-20 22:36:43,216 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_free [2022-02-20 22:36:43,216 INFO L130 BoogieDeclarations]: Found specification of procedure typhoon_start_runtime [2022-02-20 22:36:43,216 INFO L138 BoogieDeclarations]: Found implementation of procedure typhoon_start_runtime [2022-02-20 22:36:43,216 INFO L130 BoogieDeclarations]: Found specification of procedure pci_iounmap [2022-02-20 22:36:43,216 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_iounmap [2022-02-20 22:36:43,216 INFO L130 BoogieDeclarations]: Found specification of procedure pci_set_power_state [2022-02-20 22:36:43,216 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_set_power_state [2022-02-20 22:36:43,217 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-02-20 22:36:43,217 INFO L130 BoogieDeclarations]: Found specification of procedure typhoon_inc_index [2022-02-20 22:36:43,217 INFO L138 BoogieDeclarations]: Found implementation of procedure typhoon_inc_index [2022-02-20 22:36:43,217 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_final_state [2022-02-20 22:36:43,217 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_check_final_state [2022-02-20 22:36:44,042 INFO L234 CfgBuilder]: Building ICFG [2022-02-20 22:36:44,045 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-02-20 22:36:44,190 INFO L766 $ProcedureCfgBuilder]: dead code at ProgramPoint ldv_stopFINAL: assume true; [2022-02-20 22:36:50,788 INFO L766 $ProcedureCfgBuilder]: dead code at ProgramPoint ULTIMATE.startFINAL: assume true; [2022-02-20 22:36:50,887 INFO L275 CfgBuilder]: Performing block encoding [2022-02-20 22:36:50,913 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-02-20 22:36:50,914 INFO L299 CfgBuilder]: Removed 0 assume(true) statements. [2022-02-20 22:36:50,917 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 10:36:50 BoogieIcfgContainer [2022-02-20 22:36:50,917 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-02-20 22:36:50,919 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-02-20 22:36:50,919 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-02-20 22:36:50,922 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-02-20 22:36:50,922 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 20.02 10:36:38" (1/3) ... [2022-02-20 22:36:50,923 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@33bfcc11 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.02 10:36:50, skipping insertion in model container [2022-02-20 22:36:50,923 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:36:42" (2/3) ... [2022-02-20 22:36:50,923 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@33bfcc11 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.02 10:36:50, skipping insertion in model container [2022-02-20 22:36:50,924 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 10:36:50" (3/3) ... [2022-02-20 22:36:50,927 INFO L111 eAbstractionObserver]: Analyzing ICFG linux-3.14_complex_emg_linux-alloc-spinlock_drivers-net-ethernet-3com-typhoon.cil.i [2022-02-20 22:36:50,934 INFO L205 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-02-20 22:36:50,934 INFO L164 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-02-20 22:36:50,985 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-02-20 22:36:50,999 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2022-02-20 22:36:51,000 INFO L340 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-02-20 22:36:51,063 INFO L276 IsEmpty]: Start isEmpty. Operand has 1767 states, 1201 states have (on average 1.2905911740216487) internal successors, (1550), 1223 states have internal predecessors, (1550), 472 states have call successors, (472), 94 states have call predecessors, (472), 93 states have return successors, (467), 461 states have call predecessors, (467), 467 states have call successors, (467) [2022-02-20 22:36:51,100 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 201 [2022-02-20 22:36:51,100 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:36:51,101 INFO L514 BasicCegarLoop]: trace histogram [9, 9, 8, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:36:51,102 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ldv_check_alloc_flagsErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_check_alloc_flagsErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:36:51,106 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:36:51,107 INFO L85 PathProgramCache]: Analyzing trace with hash 78632928, now seen corresponding path program 1 times [2022-02-20 22:36:51,115 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:36:51,115 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1559669489] [2022-02-20 22:36:51,116 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:36:51,116 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:36:51,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:51,875 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-02-20 22:36:51,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:51,888 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:36:51,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:51,901 INFO L290 TraceCheckUtils]: 0: Hoare triple {1770#true} havoc ~tmp~111;assume -2147483648 <= #t~nondet1123 && #t~nondet1123 <= 2147483647;~tmp~111 := #t~nondet1123;havoc #t~nondet1123;#res := ~tmp~111; {1770#true} is VALID [2022-02-20 22:36:51,902 INFO L290 TraceCheckUtils]: 1: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:51,905 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1770#true} {1770#true} #3492#return; {1770#true} is VALID [2022-02-20 22:36:51,907 INFO L290 TraceCheckUtils]: 0: Hoare triple {1903#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~1.base, ~res~1.offset;havoc ~tmp~106.base, ~tmp~106.offset;havoc ~tmp___0~48;havoc ~tmp___1~25; {1770#true} is VALID [2022-02-20 22:36:51,907 INFO L272 TraceCheckUtils]: 1: Hoare triple {1770#true} call #t~ret1112 := ldv_undef_int(); {1770#true} is VALID [2022-02-20 22:36:51,908 INFO L290 TraceCheckUtils]: 2: Hoare triple {1770#true} havoc ~tmp~111;assume -2147483648 <= #t~nondet1123 && #t~nondet1123 <= 2147483647;~tmp~111 := #t~nondet1123;havoc #t~nondet1123;#res := ~tmp~111; {1770#true} is VALID [2022-02-20 22:36:51,908 INFO L290 TraceCheckUtils]: 3: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:51,909 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {1770#true} {1770#true} #3492#return; {1770#true} is VALID [2022-02-20 22:36:51,909 INFO L290 TraceCheckUtils]: 5: Hoare triple {1770#true} assume -2147483648 <= #t~ret1112 && #t~ret1112 <= 2147483647;~tmp___1~25 := #t~ret1112;havoc #t~ret1112; {1770#true} is VALID [2022-02-20 22:36:51,909 INFO L290 TraceCheckUtils]: 6: Hoare triple {1770#true} assume !(0 != ~tmp___1~25);#res.base, #res.offset := 0, 0; {1770#true} is VALID [2022-02-20 22:36:51,909 INFO L290 TraceCheckUtils]: 7: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:51,914 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {1770#true} {1770#true} #4040#return; {1770#true} is VALID [2022-02-20 22:36:51,916 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2022-02-20 22:36:51,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:51,927 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:36:51,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:51,942 INFO L290 TraceCheckUtils]: 0: Hoare triple {1770#true} havoc ~tmp~111;assume -2147483648 <= #t~nondet1123 && #t~nondet1123 <= 2147483647;~tmp~111 := #t~nondet1123;havoc #t~nondet1123;#res := ~tmp~111; {1770#true} is VALID [2022-02-20 22:36:51,942 INFO L290 TraceCheckUtils]: 1: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:51,942 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1770#true} {1770#true} #3492#return; {1770#true} is VALID [2022-02-20 22:36:51,943 INFO L290 TraceCheckUtils]: 0: Hoare triple {1903#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~1.base, ~res~1.offset;havoc ~tmp~106.base, ~tmp~106.offset;havoc ~tmp___0~48;havoc ~tmp___1~25; {1770#true} is VALID [2022-02-20 22:36:51,943 INFO L272 TraceCheckUtils]: 1: Hoare triple {1770#true} call #t~ret1112 := ldv_undef_int(); {1770#true} is VALID [2022-02-20 22:36:51,943 INFO L290 TraceCheckUtils]: 2: Hoare triple {1770#true} havoc ~tmp~111;assume -2147483648 <= #t~nondet1123 && #t~nondet1123 <= 2147483647;~tmp~111 := #t~nondet1123;havoc #t~nondet1123;#res := ~tmp~111; {1770#true} is VALID [2022-02-20 22:36:51,943 INFO L290 TraceCheckUtils]: 3: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:51,944 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {1770#true} {1770#true} #3492#return; {1770#true} is VALID [2022-02-20 22:36:51,944 INFO L290 TraceCheckUtils]: 5: Hoare triple {1770#true} assume -2147483648 <= #t~ret1112 && #t~ret1112 <= 2147483647;~tmp___1~25 := #t~ret1112;havoc #t~ret1112; {1770#true} is VALID [2022-02-20 22:36:51,944 INFO L290 TraceCheckUtils]: 6: Hoare triple {1770#true} assume !(0 != ~tmp___1~25);#res.base, #res.offset := 0, 0; {1770#true} is VALID [2022-02-20 22:36:51,944 INFO L290 TraceCheckUtils]: 7: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:51,944 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {1770#true} {1770#true} #4042#return; {1770#true} is VALID [2022-02-20 22:36:51,945 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 25 [2022-02-20 22:36:51,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:51,956 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:36:51,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:51,968 INFO L290 TraceCheckUtils]: 0: Hoare triple {1770#true} havoc ~tmp~111;assume -2147483648 <= #t~nondet1123 && #t~nondet1123 <= 2147483647;~tmp~111 := #t~nondet1123;havoc #t~nondet1123;#res := ~tmp~111; {1770#true} is VALID [2022-02-20 22:36:51,968 INFO L290 TraceCheckUtils]: 1: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:51,968 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1770#true} {1770#true} #3492#return; {1770#true} is VALID [2022-02-20 22:36:51,969 INFO L290 TraceCheckUtils]: 0: Hoare triple {1903#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~1.base, ~res~1.offset;havoc ~tmp~106.base, ~tmp~106.offset;havoc ~tmp___0~48;havoc ~tmp___1~25; {1770#true} is VALID [2022-02-20 22:36:51,969 INFO L272 TraceCheckUtils]: 1: Hoare triple {1770#true} call #t~ret1112 := ldv_undef_int(); {1770#true} is VALID [2022-02-20 22:36:51,969 INFO L290 TraceCheckUtils]: 2: Hoare triple {1770#true} havoc ~tmp~111;assume -2147483648 <= #t~nondet1123 && #t~nondet1123 <= 2147483647;~tmp~111 := #t~nondet1123;havoc #t~nondet1123;#res := ~tmp~111; {1770#true} is VALID [2022-02-20 22:36:51,969 INFO L290 TraceCheckUtils]: 3: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:51,970 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {1770#true} {1770#true} #3492#return; {1770#true} is VALID [2022-02-20 22:36:51,970 INFO L290 TraceCheckUtils]: 5: Hoare triple {1770#true} assume -2147483648 <= #t~ret1112 && #t~ret1112 <= 2147483647;~tmp___1~25 := #t~ret1112;havoc #t~ret1112; {1770#true} is VALID [2022-02-20 22:36:51,970 INFO L290 TraceCheckUtils]: 6: Hoare triple {1770#true} assume !(0 != ~tmp___1~25);#res.base, #res.offset := 0, 0; {1770#true} is VALID [2022-02-20 22:36:51,970 INFO L290 TraceCheckUtils]: 7: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:51,970 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {1770#true} {1770#true} #4044#return; {1770#true} is VALID [2022-02-20 22:36:51,971 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 36 [2022-02-20 22:36:51,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:51,982 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:36:51,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:51,992 INFO L290 TraceCheckUtils]: 0: Hoare triple {1770#true} havoc ~tmp~111;assume -2147483648 <= #t~nondet1123 && #t~nondet1123 <= 2147483647;~tmp~111 := #t~nondet1123;havoc #t~nondet1123;#res := ~tmp~111; {1770#true} is VALID [2022-02-20 22:36:51,993 INFO L290 TraceCheckUtils]: 1: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:51,993 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1770#true} {1770#true} #3492#return; {1770#true} is VALID [2022-02-20 22:36:51,993 INFO L290 TraceCheckUtils]: 0: Hoare triple {1903#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~1.base, ~res~1.offset;havoc ~tmp~106.base, ~tmp~106.offset;havoc ~tmp___0~48;havoc ~tmp___1~25; {1770#true} is VALID [2022-02-20 22:36:51,993 INFO L272 TraceCheckUtils]: 1: Hoare triple {1770#true} call #t~ret1112 := ldv_undef_int(); {1770#true} is VALID [2022-02-20 22:36:51,994 INFO L290 TraceCheckUtils]: 2: Hoare triple {1770#true} havoc ~tmp~111;assume -2147483648 <= #t~nondet1123 && #t~nondet1123 <= 2147483647;~tmp~111 := #t~nondet1123;havoc #t~nondet1123;#res := ~tmp~111; {1770#true} is VALID [2022-02-20 22:36:51,994 INFO L290 TraceCheckUtils]: 3: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:51,994 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {1770#true} {1770#true} #3492#return; {1770#true} is VALID [2022-02-20 22:36:51,994 INFO L290 TraceCheckUtils]: 5: Hoare triple {1770#true} assume -2147483648 <= #t~ret1112 && #t~ret1112 <= 2147483647;~tmp___1~25 := #t~ret1112;havoc #t~ret1112; {1770#true} is VALID [2022-02-20 22:36:51,995 INFO L290 TraceCheckUtils]: 6: Hoare triple {1770#true} assume !(0 != ~tmp___1~25);#res.base, #res.offset := 0, 0; {1770#true} is VALID [2022-02-20 22:36:51,995 INFO L290 TraceCheckUtils]: 7: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:51,995 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {1770#true} {1770#true} #4046#return; {1770#true} is VALID [2022-02-20 22:36:51,995 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 47 [2022-02-20 22:36:51,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:52,006 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:36:52,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:52,014 INFO L290 TraceCheckUtils]: 0: Hoare triple {1770#true} havoc ~tmp~111;assume -2147483648 <= #t~nondet1123 && #t~nondet1123 <= 2147483647;~tmp~111 := #t~nondet1123;havoc #t~nondet1123;#res := ~tmp~111; {1770#true} is VALID [2022-02-20 22:36:52,015 INFO L290 TraceCheckUtils]: 1: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,015 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1770#true} {1770#true} #3492#return; {1770#true} is VALID [2022-02-20 22:36:52,015 INFO L290 TraceCheckUtils]: 0: Hoare triple {1903#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~1.base, ~res~1.offset;havoc ~tmp~106.base, ~tmp~106.offset;havoc ~tmp___0~48;havoc ~tmp___1~25; {1770#true} is VALID [2022-02-20 22:36:52,016 INFO L272 TraceCheckUtils]: 1: Hoare triple {1770#true} call #t~ret1112 := ldv_undef_int(); {1770#true} is VALID [2022-02-20 22:36:52,016 INFO L290 TraceCheckUtils]: 2: Hoare triple {1770#true} havoc ~tmp~111;assume -2147483648 <= #t~nondet1123 && #t~nondet1123 <= 2147483647;~tmp~111 := #t~nondet1123;havoc #t~nondet1123;#res := ~tmp~111; {1770#true} is VALID [2022-02-20 22:36:52,016 INFO L290 TraceCheckUtils]: 3: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,016 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {1770#true} {1770#true} #3492#return; {1770#true} is VALID [2022-02-20 22:36:52,017 INFO L290 TraceCheckUtils]: 5: Hoare triple {1770#true} assume -2147483648 <= #t~ret1112 && #t~ret1112 <= 2147483647;~tmp___1~25 := #t~ret1112;havoc #t~ret1112; {1770#true} is VALID [2022-02-20 22:36:52,017 INFO L290 TraceCheckUtils]: 6: Hoare triple {1770#true} assume !(0 != ~tmp___1~25);#res.base, #res.offset := 0, 0; {1770#true} is VALID [2022-02-20 22:36:52,017 INFO L290 TraceCheckUtils]: 7: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,017 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {1770#true} {1770#true} #4048#return; {1770#true} is VALID [2022-02-20 22:36:52,018 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 58 [2022-02-20 22:36:52,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:52,029 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:36:52,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:52,037 INFO L290 TraceCheckUtils]: 0: Hoare triple {1770#true} havoc ~tmp~111;assume -2147483648 <= #t~nondet1123 && #t~nondet1123 <= 2147483647;~tmp~111 := #t~nondet1123;havoc #t~nondet1123;#res := ~tmp~111; {1770#true} is VALID [2022-02-20 22:36:52,037 INFO L290 TraceCheckUtils]: 1: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,037 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1770#true} {1770#true} #3492#return; {1770#true} is VALID [2022-02-20 22:36:52,037 INFO L290 TraceCheckUtils]: 0: Hoare triple {1903#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~1.base, ~res~1.offset;havoc ~tmp~106.base, ~tmp~106.offset;havoc ~tmp___0~48;havoc ~tmp___1~25; {1770#true} is VALID [2022-02-20 22:36:52,038 INFO L272 TraceCheckUtils]: 1: Hoare triple {1770#true} call #t~ret1112 := ldv_undef_int(); {1770#true} is VALID [2022-02-20 22:36:52,038 INFO L290 TraceCheckUtils]: 2: Hoare triple {1770#true} havoc ~tmp~111;assume -2147483648 <= #t~nondet1123 && #t~nondet1123 <= 2147483647;~tmp~111 := #t~nondet1123;havoc #t~nondet1123;#res := ~tmp~111; {1770#true} is VALID [2022-02-20 22:36:52,038 INFO L290 TraceCheckUtils]: 3: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,038 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {1770#true} {1770#true} #3492#return; {1770#true} is VALID [2022-02-20 22:36:52,039 INFO L290 TraceCheckUtils]: 5: Hoare triple {1770#true} assume -2147483648 <= #t~ret1112 && #t~ret1112 <= 2147483647;~tmp___1~25 := #t~ret1112;havoc #t~ret1112; {1770#true} is VALID [2022-02-20 22:36:52,039 INFO L290 TraceCheckUtils]: 6: Hoare triple {1770#true} assume !(0 != ~tmp___1~25);#res.base, #res.offset := 0, 0; {1770#true} is VALID [2022-02-20 22:36:52,039 INFO L290 TraceCheckUtils]: 7: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,039 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {1770#true} {1770#true} #4050#return; {1770#true} is VALID [2022-02-20 22:36:52,040 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 69 [2022-02-20 22:36:52,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:52,051 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:36:52,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:52,060 INFO L290 TraceCheckUtils]: 0: Hoare triple {1770#true} havoc ~tmp~111;assume -2147483648 <= #t~nondet1123 && #t~nondet1123 <= 2147483647;~tmp~111 := #t~nondet1123;havoc #t~nondet1123;#res := ~tmp~111; {1770#true} is VALID [2022-02-20 22:36:52,060 INFO L290 TraceCheckUtils]: 1: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,060 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1770#true} {1770#true} #3492#return; {1770#true} is VALID [2022-02-20 22:36:52,061 INFO L290 TraceCheckUtils]: 0: Hoare triple {1903#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~1.base, ~res~1.offset;havoc ~tmp~106.base, ~tmp~106.offset;havoc ~tmp___0~48;havoc ~tmp___1~25; {1770#true} is VALID [2022-02-20 22:36:52,061 INFO L272 TraceCheckUtils]: 1: Hoare triple {1770#true} call #t~ret1112 := ldv_undef_int(); {1770#true} is VALID [2022-02-20 22:36:52,061 INFO L290 TraceCheckUtils]: 2: Hoare triple {1770#true} havoc ~tmp~111;assume -2147483648 <= #t~nondet1123 && #t~nondet1123 <= 2147483647;~tmp~111 := #t~nondet1123;havoc #t~nondet1123;#res := ~tmp~111; {1770#true} is VALID [2022-02-20 22:36:52,061 INFO L290 TraceCheckUtils]: 3: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,062 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {1770#true} {1770#true} #3492#return; {1770#true} is VALID [2022-02-20 22:36:52,062 INFO L290 TraceCheckUtils]: 5: Hoare triple {1770#true} assume -2147483648 <= #t~ret1112 && #t~ret1112 <= 2147483647;~tmp___1~25 := #t~ret1112;havoc #t~ret1112; {1770#true} is VALID [2022-02-20 22:36:52,062 INFO L290 TraceCheckUtils]: 6: Hoare triple {1770#true} assume !(0 != ~tmp___1~25);#res.base, #res.offset := 0, 0; {1770#true} is VALID [2022-02-20 22:36:52,062 INFO L290 TraceCheckUtils]: 7: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,062 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {1770#true} {1770#true} #4052#return; {1770#true} is VALID [2022-02-20 22:36:52,063 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 80 [2022-02-20 22:36:52,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:52,074 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:36:52,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:52,082 INFO L290 TraceCheckUtils]: 0: Hoare triple {1770#true} havoc ~tmp~111;assume -2147483648 <= #t~nondet1123 && #t~nondet1123 <= 2147483647;~tmp~111 := #t~nondet1123;havoc #t~nondet1123;#res := ~tmp~111; {1770#true} is VALID [2022-02-20 22:36:52,083 INFO L290 TraceCheckUtils]: 1: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,083 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1770#true} {1770#true} #3492#return; {1770#true} is VALID [2022-02-20 22:36:52,083 INFO L290 TraceCheckUtils]: 0: Hoare triple {1903#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~1.base, ~res~1.offset;havoc ~tmp~106.base, ~tmp~106.offset;havoc ~tmp___0~48;havoc ~tmp___1~25; {1770#true} is VALID [2022-02-20 22:36:52,083 INFO L272 TraceCheckUtils]: 1: Hoare triple {1770#true} call #t~ret1112 := ldv_undef_int(); {1770#true} is VALID [2022-02-20 22:36:52,084 INFO L290 TraceCheckUtils]: 2: Hoare triple {1770#true} havoc ~tmp~111;assume -2147483648 <= #t~nondet1123 && #t~nondet1123 <= 2147483647;~tmp~111 := #t~nondet1123;havoc #t~nondet1123;#res := ~tmp~111; {1770#true} is VALID [2022-02-20 22:36:52,084 INFO L290 TraceCheckUtils]: 3: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,084 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {1770#true} {1770#true} #3492#return; {1770#true} is VALID [2022-02-20 22:36:52,084 INFO L290 TraceCheckUtils]: 5: Hoare triple {1770#true} assume -2147483648 <= #t~ret1112 && #t~ret1112 <= 2147483647;~tmp___1~25 := #t~ret1112;havoc #t~ret1112; {1770#true} is VALID [2022-02-20 22:36:52,084 INFO L290 TraceCheckUtils]: 6: Hoare triple {1770#true} assume !(0 != ~tmp___1~25);#res.base, #res.offset := 0, 0; {1770#true} is VALID [2022-02-20 22:36:52,085 INFO L290 TraceCheckUtils]: 7: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,085 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {1770#true} {1770#true} #4054#return; {1770#true} is VALID [2022-02-20 22:36:52,085 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 93 [2022-02-20 22:36:52,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:52,096 INFO L290 TraceCheckUtils]: 0: Hoare triple {1770#true} havoc ~tmp~111;assume -2147483648 <= #t~nondet1123 && #t~nondet1123 <= 2147483647;~tmp~111 := #t~nondet1123;havoc #t~nondet1123;#res := ~tmp~111; {1770#true} is VALID [2022-02-20 22:36:52,097 INFO L290 TraceCheckUtils]: 1: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,097 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1770#true} {1844#(= 20 ~ldv_statevar_2~0)} #4056#return; {1844#(= 20 ~ldv_statevar_2~0)} is VALID [2022-02-20 22:36:52,098 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 114 [2022-02-20 22:36:52,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:52,110 INFO L290 TraceCheckUtils]: 0: Hoare triple {1770#true} ~pdev#1.base, ~pdev#1.offset := #in~pdev#1.base, #in~pdev#1.offset;havoc ~tmp~31#1.base, ~tmp~31#1.offset;assume { :begin_inline_ldv_dev_get_drvdata_81 } true;ldv_dev_get_drvdata_81_#in~dev#1.base, ldv_dev_get_drvdata_81_#in~dev#1.offset := ~pdev#1.base, 179 + ~pdev#1.offset;havoc ldv_dev_get_drvdata_81_#res#1.base, ldv_dev_get_drvdata_81_#res#1.offset;havoc ldv_dev_get_drvdata_81_#t~ret1078#1.base, ldv_dev_get_drvdata_81_#t~ret1078#1.offset, ldv_dev_get_drvdata_81_~dev#1.base, ldv_dev_get_drvdata_81_~dev#1.offset, ldv_dev_get_drvdata_81_~tmp~91#1.base, ldv_dev_get_drvdata_81_~tmp~91#1.offset;ldv_dev_get_drvdata_81_~dev#1.base, ldv_dev_get_drvdata_81_~dev#1.offset := ldv_dev_get_drvdata_81_#in~dev#1.base, ldv_dev_get_drvdata_81_#in~dev#1.offset;havoc ldv_dev_get_drvdata_81_~tmp~91#1.base, ldv_dev_get_drvdata_81_~tmp~91#1.offset;assume { :begin_inline_ldv_dev_get_drvdata } true;ldv_dev_get_drvdata_#in~dev#1.base, ldv_dev_get_drvdata_#in~dev#1.offset := ldv_dev_get_drvdata_81_~dev#1.base, ldv_dev_get_drvdata_81_~dev#1.offset;havoc ldv_dev_get_drvdata_#res#1.base, ldv_dev_get_drvdata_#res#1.offset;havoc ldv_dev_get_drvdata_#t~mem1092#1.base, ldv_dev_get_drvdata_#t~mem1092#1.offset, ldv_dev_get_drvdata_#t~short1093#1, ldv_dev_get_drvdata_#t~mem1094#1.base, ldv_dev_get_drvdata_#t~mem1094#1.offset, ldv_dev_get_drvdata_#t~mem1095#1.base, ldv_dev_get_drvdata_#t~mem1095#1.offset, ldv_dev_get_drvdata_~dev#1.base, ldv_dev_get_drvdata_~dev#1.offset;ldv_dev_get_drvdata_~dev#1.base, ldv_dev_get_drvdata_~dev#1.offset := ldv_dev_get_drvdata_#in~dev#1.base, ldv_dev_get_drvdata_#in~dev#1.offset;ldv_dev_get_drvdata_#t~short1093#1 := 0 != (ldv_dev_get_drvdata_~dev#1.base + ldv_dev_get_drvdata_~dev#1.offset) % 18446744073709551616; {1770#true} is VALID [2022-02-20 22:36:52,110 INFO L290 TraceCheckUtils]: 1: Hoare triple {1770#true} assume ldv_dev_get_drvdata_#t~short1093#1;call ldv_dev_get_drvdata_#t~mem1092#1.base, ldv_dev_get_drvdata_#t~mem1092#1.offset := read~$Pointer$(ldv_dev_get_drvdata_~dev#1.base, 8 + ldv_dev_get_drvdata_~dev#1.offset, 8);ldv_dev_get_drvdata_#t~short1093#1 := 0 != (ldv_dev_get_drvdata_#t~mem1092#1.base + ldv_dev_get_drvdata_#t~mem1092#1.offset) % 18446744073709551616; {1770#true} is VALID [2022-02-20 22:36:52,110 INFO L290 TraceCheckUtils]: 2: Hoare triple {1770#true} assume ldv_dev_get_drvdata_#t~short1093#1;havoc ldv_dev_get_drvdata_#t~mem1092#1.base, ldv_dev_get_drvdata_#t~mem1092#1.offset;havoc ldv_dev_get_drvdata_#t~short1093#1;call ldv_dev_get_drvdata_#t~mem1094#1.base, ldv_dev_get_drvdata_#t~mem1094#1.offset := read~$Pointer$(ldv_dev_get_drvdata_~dev#1.base, 8 + ldv_dev_get_drvdata_~dev#1.offset, 8);call ldv_dev_get_drvdata_#t~mem1095#1.base, ldv_dev_get_drvdata_#t~mem1095#1.offset := read~$Pointer$(ldv_dev_get_drvdata_#t~mem1094#1.base, ldv_dev_get_drvdata_#t~mem1094#1.offset, 8);ldv_dev_get_drvdata_#res#1.base, ldv_dev_get_drvdata_#res#1.offset := ldv_dev_get_drvdata_#t~mem1095#1.base, ldv_dev_get_drvdata_#t~mem1095#1.offset;havoc ldv_dev_get_drvdata_#t~mem1094#1.base, ldv_dev_get_drvdata_#t~mem1094#1.offset;havoc ldv_dev_get_drvdata_#t~mem1095#1.base, ldv_dev_get_drvdata_#t~mem1095#1.offset; {1770#true} is VALID [2022-02-20 22:36:52,111 INFO L290 TraceCheckUtils]: 3: Hoare triple {1770#true} ldv_dev_get_drvdata_81_#t~ret1078#1.base, ldv_dev_get_drvdata_81_#t~ret1078#1.offset := ldv_dev_get_drvdata_#res#1.base, ldv_dev_get_drvdata_#res#1.offset;assume { :end_inline_ldv_dev_get_drvdata } true;ldv_dev_get_drvdata_81_~tmp~91#1.base, ldv_dev_get_drvdata_81_~tmp~91#1.offset := ldv_dev_get_drvdata_81_#t~ret1078#1.base, ldv_dev_get_drvdata_81_#t~ret1078#1.offset;havoc ldv_dev_get_drvdata_81_#t~ret1078#1.base, ldv_dev_get_drvdata_81_#t~ret1078#1.offset;ldv_dev_get_drvdata_81_#res#1.base, ldv_dev_get_drvdata_81_#res#1.offset := ldv_dev_get_drvdata_81_~tmp~91#1.base, ldv_dev_get_drvdata_81_~tmp~91#1.offset; {1770#true} is VALID [2022-02-20 22:36:52,111 INFO L290 TraceCheckUtils]: 4: Hoare triple {1770#true} #t~ret266#1.base, #t~ret266#1.offset := ldv_dev_get_drvdata_81_#res#1.base, ldv_dev_get_drvdata_81_#res#1.offset;assume { :end_inline_ldv_dev_get_drvdata_81 } true;~tmp~31#1.base, ~tmp~31#1.offset := #t~ret266#1.base, #t~ret266#1.offset;havoc #t~ret266#1.base, #t~ret266#1.offset;#res#1.base, #res#1.offset := ~tmp~31#1.base, ~tmp~31#1.offset; {1770#true} is VALID [2022-02-20 22:36:52,111 INFO L290 TraceCheckUtils]: 5: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,111 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {1770#true} {1771#false} #3998#return; {1771#false} is VALID [2022-02-20 22:36:52,112 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 123 [2022-02-20 22:36:52,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:52,119 INFO L290 TraceCheckUtils]: 0: Hoare triple {1770#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3200 + ~dev.offset; {1770#true} is VALID [2022-02-20 22:36:52,120 INFO L290 TraceCheckUtils]: 1: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,120 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1770#true} {1771#false} #4000#return; {1771#false} is VALID [2022-02-20 22:36:52,120 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 128 [2022-02-20 22:36:52,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:52,151 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:36:52,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:52,171 INFO L290 TraceCheckUtils]: 0: Hoare triple {1770#true} ~nr := #in~nr;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;call #t~mem0 := read~int(~addr.base, ~addr.offset + 8 * (if ~nr / 64 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~nr / 64 % 18446744073709551616 % 18446744073709551616 else ~nr / 64 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), 8);#res := (if (if #t~mem0 < 0 && (31 == (if 0 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 0 else (if 1 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 1 else ~bitwiseAnd((if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296), 63))) || 63 == (if 0 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 0 else (if 1 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 1 else ~bitwiseAnd((if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296), 63)))) then 1 else (if #t~mem0 >= 0 && (31 == (if 0 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 0 else (if 1 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 1 else ~bitwiseAnd((if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296), 63))) || 63 == (if 0 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 0 else (if 1 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 1 else ~bitwiseAnd((if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296), 63)))) then 0 else ~shiftRight(#t~mem0, (if 0 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 0 else (if 1 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 1 else ~bitwiseAnd((if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296), 63)))))) % 18446744073709551616 % 4294967296 <= 2147483647 then (if #t~mem0 < 0 && (31 == (if 0 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 0 else (if 1 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 1 else ~bitwiseAnd((if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296), 63))) || 63 == (if 0 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 0 else (if 1 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 1 else ~bitwiseAnd((if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296), 63)))) then 1 else (if #t~mem0 >= 0 && (31 == (if 0 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 0 else (if 1 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 1 else ~bitwiseAnd((if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296), 63))) || 63 == (if 0 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 0 else (if 1 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 1 else ~bitwiseAnd((if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296), 63)))) then 0 else ~shiftRight(#t~mem0, (if 0 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 0 else (if 1 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 1 else ~bitwiseAnd((if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296), 63)))))) % 18446744073709551616 % 4294967296 else (if #t~mem0 < 0 && (31 == (if 0 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 0 else (if 1 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 1 else ~bitwiseAnd((if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296), 63))) || 63 == (if 0 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 0 else (if 1 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 1 else ~bitwiseAnd((if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296), 63)))) then 1 else (if #t~mem0 >= 0 && (31 == (if 0 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 0 else (if 1 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 1 else ~bitwiseAnd((if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296), 63))) || 63 == (if 0 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 0 else (if 1 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 1 else ~bitwiseAnd((if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296), 63)))) then 0 else ~shiftRight(#t~mem0, (if 0 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 0 else (if 1 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 1 else ~bitwiseAnd((if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296), 63)))))) % 18446744073709551616 % 4294967296 - 4294967296);havoc #t~mem0; {1770#true} is VALID [2022-02-20 22:36:52,172 INFO L290 TraceCheckUtils]: 1: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,172 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1770#true} {1770#true} #3718#return; {1770#true} is VALID [2022-02-20 22:36:52,172 INFO L290 TraceCheckUtils]: 0: Hoare triple {1770#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;havoc ~tmp~26; {1770#true} is VALID [2022-02-20 22:36:52,173 INFO L272 TraceCheckUtils]: 1: Hoare triple {1770#true} call #t~ret216 := constant_test_bit(0, ~dev.base, 68 + ~dev.offset); {1770#true} is VALID [2022-02-20 22:36:52,173 INFO L290 TraceCheckUtils]: 2: Hoare triple {1770#true} ~nr := #in~nr;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;call #t~mem0 := read~int(~addr.base, ~addr.offset + 8 * (if ~nr / 64 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~nr / 64 % 18446744073709551616 % 18446744073709551616 else ~nr / 64 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), 8);#res := (if (if #t~mem0 < 0 && (31 == (if 0 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 0 else (if 1 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 1 else ~bitwiseAnd((if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296), 63))) || 63 == (if 0 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 0 else (if 1 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 1 else ~bitwiseAnd((if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296), 63)))) then 1 else (if #t~mem0 >= 0 && (31 == (if 0 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 0 else (if 1 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 1 else ~bitwiseAnd((if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296), 63))) || 63 == (if 0 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 0 else (if 1 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 1 else ~bitwiseAnd((if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296), 63)))) then 0 else ~shiftRight(#t~mem0, (if 0 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 0 else (if 1 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 1 else ~bitwiseAnd((if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296), 63)))))) % 18446744073709551616 % 4294967296 <= 2147483647 then (if #t~mem0 < 0 && (31 == (if 0 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 0 else (if 1 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 1 else ~bitwiseAnd((if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296), 63))) || 63 == (if 0 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 0 else (if 1 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 1 else ~bitwiseAnd((if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296), 63)))) then 1 else (if #t~mem0 >= 0 && (31 == (if 0 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 0 else (if 1 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 1 else ~bitwiseAnd((if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296), 63))) || 63 == (if 0 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 0 else (if 1 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 1 else ~bitwiseAnd((if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296), 63)))) then 0 else ~shiftRight(#t~mem0, (if 0 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 0 else (if 1 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 1 else ~bitwiseAnd((if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296), 63)))))) % 18446744073709551616 % 4294967296 else (if #t~mem0 < 0 && (31 == (if 0 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 0 else (if 1 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 1 else ~bitwiseAnd((if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296), 63))) || 63 == (if 0 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 0 else (if 1 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 1 else ~bitwiseAnd((if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296), 63)))) then 1 else (if #t~mem0 >= 0 && (31 == (if 0 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 0 else (if 1 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 1 else ~bitwiseAnd((if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296), 63))) || 63 == (if 0 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 0 else (if 1 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 1 else ~bitwiseAnd((if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296), 63)))) then 0 else ~shiftRight(#t~mem0, (if 0 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 0 else (if 1 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 1 else ~bitwiseAnd((if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296), 63)))))) % 18446744073709551616 % 4294967296 - 4294967296);havoc #t~mem0; {1770#true} is VALID [2022-02-20 22:36:52,173 INFO L290 TraceCheckUtils]: 3: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,173 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {1770#true} {1770#true} #3718#return; {1770#true} is VALID [2022-02-20 22:36:52,174 INFO L290 TraceCheckUtils]: 5: Hoare triple {1770#true} assume -2147483648 <= #t~ret216 && #t~ret216 <= 2147483647;~tmp~26 := #t~ret216;havoc #t~ret216;#res := (if 0 == (if 0 != ~tmp~26 then 1 else 0) then 0 else 1); {1770#true} is VALID [2022-02-20 22:36:52,174 INFO L290 TraceCheckUtils]: 6: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,174 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {1770#true} {1771#false} #4002#return; {1771#false} is VALID [2022-02-20 22:36:52,174 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 140 [2022-02-20 22:36:52,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:52,190 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:36:52,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:52,197 INFO L290 TraceCheckUtils]: 0: Hoare triple {1770#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1 := #in~arg1;assume -2147483648 <= #t~nondet1218 && #t~nondet1218 <= 2147483647;#res := #t~nondet1218;havoc #t~nondet1218; {1770#true} is VALID [2022-02-20 22:36:52,198 INFO L290 TraceCheckUtils]: 1: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,198 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1770#true} {1770#true} #3528#return; {1770#true} is VALID [2022-02-20 22:36:52,198 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:36:52,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:52,205 INFO L290 TraceCheckUtils]: 0: Hoare triple {1770#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset; {1770#true} is VALID [2022-02-20 22:36:52,206 INFO L290 TraceCheckUtils]: 1: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,206 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1770#true} {1770#true} #3530#return; {1770#true} is VALID [2022-02-20 22:36:52,206 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-02-20 22:36:52,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:52,213 INFO L290 TraceCheckUtils]: 0: Hoare triple {1770#true} ~arg0 := #in~arg0;~arg1.base, ~arg1.offset := #in~arg1.base, #in~arg1.offset; {1770#true} is VALID [2022-02-20 22:36:52,213 INFO L290 TraceCheckUtils]: 1: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,214 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1770#true} {1770#true} #3532#return; {1770#true} is VALID [2022-02-20 22:36:52,214 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2022-02-20 22:36:52,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:52,222 INFO L290 TraceCheckUtils]: 0: Hoare triple {1770#true} ~ioaddr.base, ~ioaddr.offset := #in~ioaddr.base, #in~ioaddr.offset;~wait_value := #in~wait_value;havoc ~i~1;havoc ~err~1;havoc ~tmp~36;~err~1 := 0;~i~1 := 0; {1770#true} is VALID [2022-02-20 22:36:52,222 INFO L290 TraceCheckUtils]: 1: Hoare triple {1770#true} assume !(~i~1 <= 9999);~err~1 := -110; {1770#true} is VALID [2022-02-20 22:36:52,222 INFO L290 TraceCheckUtils]: 2: Hoare triple {1770#true} #res := ~err~1; {1770#true} is VALID [2022-02-20 22:36:52,223 INFO L290 TraceCheckUtils]: 3: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,223 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {1770#true} {1770#true} #3534#return; {1770#true} is VALID [2022-02-20 22:36:52,223 INFO L290 TraceCheckUtils]: 0: Hoare triple {1770#true} ~tp.base, ~tp.offset := #in~tp.base, #in~tp.offset;~wait_type := #in~wait_type;havoc ~pdev~2.base, ~pdev~2.offset;havoc ~ioaddr~4.base, ~ioaddr~4.offset;havoc ~tmp~62;havoc ~tmp___0~28;call #t~mem769.base, #t~mem769.offset := read~$Pointer$(~tp.base, 72 + ~tp.offset, 8);~pdev~2.base, ~pdev~2.offset := #t~mem769.base, #t~mem769.offset;havoc #t~mem769.base, #t~mem769.offset;call #t~mem770.base, #t~mem770.offset := read~$Pointer$(~tp.base, 40 + ~tp.offset, 8);~ioaddr~4.base, ~ioaddr~4.offset := #t~mem770.base, #t~mem770.offset;havoc #t~mem770.base, #t~mem770.offset; {1770#true} is VALID [2022-02-20 22:36:52,223 INFO L272 TraceCheckUtils]: 1: Hoare triple {1770#true} call #t~ret771 := pci_set_power_state(~pdev~2.base, ~pdev~2.offset, 0); {1770#true} is VALID [2022-02-20 22:36:52,224 INFO L290 TraceCheckUtils]: 2: Hoare triple {1770#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1 := #in~arg1;assume -2147483648 <= #t~nondet1218 && #t~nondet1218 <= 2147483647;#res := #t~nondet1218;havoc #t~nondet1218; {1770#true} is VALID [2022-02-20 22:36:52,224 INFO L290 TraceCheckUtils]: 3: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,224 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {1770#true} {1770#true} #3528#return; {1770#true} is VALID [2022-02-20 22:36:52,224 INFO L290 TraceCheckUtils]: 5: Hoare triple {1770#true} assume -2147483648 <= #t~ret771 && #t~ret771 <= 2147483647;havoc #t~ret771; {1770#true} is VALID [2022-02-20 22:36:52,224 INFO L272 TraceCheckUtils]: 6: Hoare triple {1770#true} call pci_restore_state(~pdev~2.base, ~pdev~2.offset); {1770#true} is VALID [2022-02-20 22:36:52,225 INFO L290 TraceCheckUtils]: 7: Hoare triple {1770#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset; {1770#true} is VALID [2022-02-20 22:36:52,225 INFO L290 TraceCheckUtils]: 8: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,225 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {1770#true} {1770#true} #3530#return; {1770#true} is VALID [2022-02-20 22:36:52,225 INFO L272 TraceCheckUtils]: 10: Hoare triple {1770#true} call iowrite32(250, ~ioaddr~4.base, 48 + ~ioaddr~4.offset); {1770#true} is VALID [2022-02-20 22:36:52,225 INFO L290 TraceCheckUtils]: 11: Hoare triple {1770#true} ~arg0 := #in~arg0;~arg1.base, ~arg1.offset := #in~arg1.base, #in~arg1.offset; {1770#true} is VALID [2022-02-20 22:36:52,226 INFO L290 TraceCheckUtils]: 12: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,226 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {1770#true} {1770#true} #3532#return; {1770#true} is VALID [2022-02-20 22:36:52,226 INFO L272 TraceCheckUtils]: 14: Hoare triple {1770#true} call #t~ret772 := typhoon_wait_status(~ioaddr~4.base, ~ioaddr~4.offset, 13); {1770#true} is VALID [2022-02-20 22:36:52,226 INFO L290 TraceCheckUtils]: 15: Hoare triple {1770#true} ~ioaddr.base, ~ioaddr.offset := #in~ioaddr.base, #in~ioaddr.offset;~wait_value := #in~wait_value;havoc ~i~1;havoc ~err~1;havoc ~tmp~36;~err~1 := 0;~i~1 := 0; {1770#true} is VALID [2022-02-20 22:36:52,226 INFO L290 TraceCheckUtils]: 16: Hoare triple {1770#true} assume !(~i~1 <= 9999);~err~1 := -110; {1770#true} is VALID [2022-02-20 22:36:52,227 INFO L290 TraceCheckUtils]: 17: Hoare triple {1770#true} #res := ~err~1; {1770#true} is VALID [2022-02-20 22:36:52,227 INFO L290 TraceCheckUtils]: 18: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,227 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {1770#true} {1770#true} #3534#return; {1770#true} is VALID [2022-02-20 22:36:52,227 INFO L290 TraceCheckUtils]: 20: Hoare triple {1770#true} assume -2147483648 <= #t~ret772 && #t~ret772 <= 2147483647;~tmp___0~28 := #t~ret772;havoc #t~ret772;#t~short774 := ~tmp___0~28 < 0; {1770#true} is VALID [2022-02-20 22:36:52,227 INFO L290 TraceCheckUtils]: 21: Hoare triple {1770#true} assume #t~short774; {1770#true} is VALID [2022-02-20 22:36:52,228 INFO L290 TraceCheckUtils]: 22: Hoare triple {1770#true} assume !#t~short774;havoc #t~mem773;havoc #t~short774;#res := 0; {1770#true} is VALID [2022-02-20 22:36:52,228 INFO L290 TraceCheckUtils]: 23: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,228 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {1770#true} {1771#false} #4004#return; {1771#false} is VALID [2022-02-20 22:36:52,237 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 170 [2022-02-20 22:36:52,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:52,265 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:36:52,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:52,279 INFO L290 TraceCheckUtils]: 0: Hoare triple {1945#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr1235 := 0; {1770#true} is VALID [2022-02-20 22:36:52,280 INFO L290 TraceCheckUtils]: 1: Hoare triple {1770#true} assume !(#t~loopctr1235 % 18446744073709551616 < #amount % 18446744073709551616); {1770#true} is VALID [2022-02-20 22:36:52,280 INFO L290 TraceCheckUtils]: 2: Hoare triple {1770#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1770#true} is VALID [2022-02-20 22:36:52,280 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1770#true} {1770#true} #3626#return; {1770#true} is VALID [2022-02-20 22:36:52,282 INFO L290 TraceCheckUtils]: 0: Hoare triple {1945#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} ~tp.base, ~tp.offset := #in~tp.base, #in~tp.offset;call #t~mem573.base, #t~mem573.offset := read~$Pointer$(~tp.base, 48 + ~tp.offset, 8); {1770#true} is VALID [2022-02-20 22:36:52,283 INFO L272 TraceCheckUtils]: 1: Hoare triple {1770#true} call #t~memset~res574.base, #t~memset~res574.offset := #Ultimate.C_memset(#t~mem573.base, #t~mem573.offset, 0, 44); {1945#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:36:52,283 INFO L290 TraceCheckUtils]: 2: Hoare triple {1945#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr1235 := 0; {1770#true} is VALID [2022-02-20 22:36:52,283 INFO L290 TraceCheckUtils]: 3: Hoare triple {1770#true} assume !(#t~loopctr1235 % 18446744073709551616 < #amount % 18446744073709551616); {1770#true} is VALID [2022-02-20 22:36:52,283 INFO L290 TraceCheckUtils]: 4: Hoare triple {1770#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1770#true} is VALID [2022-02-20 22:36:52,284 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {1770#true} {1770#true} #3626#return; {1770#true} is VALID [2022-02-20 22:36:52,284 INFO L290 TraceCheckUtils]: 6: Hoare triple {1770#true} havoc #t~mem573.base, #t~mem573.offset;havoc #t~memset~res574.base, #t~memset~res574.offset;call write~int(0, ~tp.base, 8 + ~tp.offset, 4);call write~int(0, ~tp.base, 2812 + ~tp.offset, 4);call write~int(0, ~tp.base, 68 + ~tp.offset, 4);call write~int(0, ~tp.base, 268 + ~tp.offset, 4);call write~int(0, ~tp.base, 280 + ~tp.offset, 4);call write~int(0, ~tp.base, 2392 + ~tp.offset, 4);call write~int(0, ~tp.base, 2404 + ~tp.offset, 4);call write~int(0, ~tp.base, 12 + ~tp.offset, 4);call write~int(0, ~tp.base, 2816 + ~tp.offset, 4); {1770#true} is VALID [2022-02-20 22:36:52,284 INFO L290 TraceCheckUtils]: 7: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,285 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {1770#true} {1771#false} #3774#return; {1771#false} is VALID [2022-02-20 22:36:52,285 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 193 [2022-02-20 22:36:52,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:52,292 INFO L290 TraceCheckUtils]: 0: Hoare triple {1770#true} assume 2 == ~ldv_spin__xmit_lock_of_netdev_queue~0;#res := 1; {1770#true} is VALID [2022-02-20 22:36:52,293 INFO L290 TraceCheckUtils]: 1: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,293 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1770#true} {1771#false} #3514#return; {1771#false} is VALID [2022-02-20 22:36:52,295 INFO L290 TraceCheckUtils]: 0: Hoare triple {1770#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(190, 1);call #Ultimate.allocInit(26, 2);call #Ultimate.allocInit(26, 3);call #Ultimate.allocInit(63, 4);call #Ultimate.allocInit(24, 5);call #Ultimate.allocInit(28, 6);call #Ultimate.allocInit(28, 7);call #Ultimate.allocInit(24, 8);call #Ultimate.allocInit(27, 9);call #Ultimate.allocInit(27, 10);call #Ultimate.allocInit(28, 11);call #Ultimate.allocInit(26, 12);call #Ultimate.allocInit(28, 13);call #Ultimate.allocInit(28, 14);call #Ultimate.allocInit(35, 15);call #Ultimate.allocInit(35, 16);call #Ultimate.allocInit(29, 17);call #Ultimate.allocInit(63, 18);call #Ultimate.allocInit(58, 19);call #Ultimate.allocInit(21, 20);call #Ultimate.allocInit(12, 21);call #Ultimate.allocInit(16, 22);call #Ultimate.allocInit(15, 23);call #Ultimate.allocInit(8, 24);call #Ultimate.allocInit(28, 25);call #Ultimate.allocInit(17, 26);call #Ultimate.allocInit(30, 27);call #Ultimate.allocInit(17, 28);call #Ultimate.allocInit(8, 29);call #Ultimate.allocInit(24, 30);call #Ultimate.allocInit(25, 31);call #Ultimate.allocInit(20, 32);call #Ultimate.allocInit(23, 33);call #Ultimate.allocInit(23, 34);call #Ultimate.allocInit(29, 35);call #Ultimate.allocInit(29, 36);call #Ultimate.allocInit(34, 37);call #Ultimate.allocInit(20, 38);call #Ultimate.allocInit(35, 39);call #Ultimate.allocInit(31, 40);call #Ultimate.allocInit(41, 41);call #Ultimate.allocInit(35, 42);call #Ultimate.allocInit(28, 43);call #Ultimate.allocInit(17, 44);call #Ultimate.allocInit(43, 45);call #Ultimate.allocInit(35, 46);call #Ultimate.allocInit(21, 47);call #Ultimate.allocInit(31, 48);call #Ultimate.allocInit(39, 49);call #Ultimate.allocInit(25, 50);call #Ultimate.allocInit(33, 51);call #Ultimate.allocInit(28, 52);call #Ultimate.allocInit(24, 53);call #Ultimate.allocInit(28, 54);call #Ultimate.allocInit(29, 55);call #Ultimate.allocInit(39, 56);call #Ultimate.allocInit(45, 57);call #Ultimate.allocInit(43, 58);call #Ultimate.allocInit(24, 59);call #Ultimate.allocInit(28, 60);call #Ultimate.allocInit(38, 61);call #Ultimate.allocInit(36, 62);call #Ultimate.allocInit(29, 63);call #Ultimate.allocInit(38, 64);call #Ultimate.allocInit(31, 65);call #Ultimate.allocInit(24, 66);call #Ultimate.allocInit(18, 67);call #Ultimate.allocInit(28, 68);call #Ultimate.allocInit(42, 69);call #Ultimate.allocInit(37, 70);call #Ultimate.allocInit(44, 71);call #Ultimate.allocInit(39, 72);call #Ultimate.allocInit(8, 73);call #Ultimate.allocInit(26, 74);call #Ultimate.allocInit(33, 75);call #Ultimate.allocInit(30, 76);call #Ultimate.allocInit(20, 77);call #Ultimate.allocInit(28, 78);call #Ultimate.allocInit(24, 79);call #Ultimate.allocInit(50, 80);call #Ultimate.allocInit(34, 81);call #Ultimate.allocInit(28, 82);call #Ultimate.allocInit(26, 83);call #Ultimate.allocInit(22, 84);call #Ultimate.allocInit(5, 85);call write~init~int(77, 85, 0, 1);call write~init~int(77, 85, 1, 1);call write~init~int(73, 85, 2, 1);call write~init~int(79, 85, 3, 1);call write~init~int(0, 85, 4, 1);call #Ultimate.allocInit(3, 86);call write~init~int(73, 86, 0, 1);call write~init~int(79, 86, 1, 1);call write~init~int(0, 86, 2, 1);call #Ultimate.allocInit(46, 87);call #Ultimate.allocInit(52, 88);call #Ultimate.allocInit(39, 89);call #Ultimate.allocInit(17, 90);call #Ultimate.allocInit(8, 91);call #Ultimate.allocInit(8, 92);call #Ultimate.allocInit(1, 93);call write~init~int(0, 93, 0, 1);call #Ultimate.allocInit(54, 94);call #Ultimate.allocInit(56, 95);call #Ultimate.allocInit(58, 96);call #Ultimate.allocInit(58, 97);call #Ultimate.allocInit(58, 98);call #Ultimate.allocInit(54, 99);call #Ultimate.allocInit(56, 100);call #Ultimate.allocInit(58, 101);call #Ultimate.allocInit(58, 102);call #Ultimate.allocInit(58, 103);call #Ultimate.allocInit(54, 104);call #Ultimate.allocInit(56, 105);call #Ultimate.allocInit(58, 106);call #Ultimate.allocInit(58, 107);call #Ultimate.allocInit(58, 108);call #Ultimate.allocInit(54, 109);call #Ultimate.allocInit(56, 110);call #Ultimate.allocInit(58, 111);call #Ultimate.allocInit(58, 112);call #Ultimate.allocInit(58, 113);call #Ultimate.allocInit(54, 114);call #Ultimate.allocInit(56, 115);call #Ultimate.allocInit(58, 116);call #Ultimate.allocInit(58, 117);call #Ultimate.allocInit(58, 118);call #Ultimate.allocInit(54, 119);call #Ultimate.allocInit(56, 120);call #Ultimate.allocInit(58, 121);call #Ultimate.allocInit(58, 122);call #Ultimate.allocInit(58, 123);call #Ultimate.allocInit(54, 124);call #Ultimate.allocInit(56, 125);call #Ultimate.allocInit(58, 126);call #Ultimate.allocInit(58, 127);call #Ultimate.allocInit(58, 128);call #Ultimate.allocInit(54, 129);call #Ultimate.allocInit(56, 130);call #Ultimate.allocInit(58, 131);call #Ultimate.allocInit(58, 132);call #Ultimate.allocInit(58, 133);call #Ultimate.allocInit(54, 134);call #Ultimate.allocInit(56, 135);call #Ultimate.allocInit(58, 136);call #Ultimate.allocInit(58, 137);call #Ultimate.allocInit(58, 138);call #Ultimate.allocInit(54, 139);call #Ultimate.allocInit(56, 140);call #Ultimate.allocInit(58, 141);call #Ultimate.allocInit(58, 142);call #Ultimate.allocInit(58, 143);call #Ultimate.allocInit(54, 144);call #Ultimate.allocInit(56, 145);call #Ultimate.allocInit(58, 146);call #Ultimate.allocInit(58, 147);call #Ultimate.allocInit(58, 148);call #Ultimate.allocInit(54, 149);call #Ultimate.allocInit(56, 150);call #Ultimate.allocInit(58, 151);call #Ultimate.allocInit(58, 152);call #Ultimate.allocInit(58, 153);call #Ultimate.allocInit(57, 154);call #Ultimate.allocInit(57, 155);call #Ultimate.allocInit(57, 156);call #Ultimate.allocInit(57, 157);call #Ultimate.allocInit(57, 158);call #Ultimate.allocInit(57, 159);call #Ultimate.allocInit(57, 160);call #Ultimate.allocInit(57, 161);call #Ultimate.allocInit(57, 162);call #Ultimate.allocInit(57, 163);call #Ultimate.allocInit(57, 164);call #Ultimate.allocInit(57, 165);call #Ultimate.allocInit(2, 166);call write~init~int(48, 166, 0, 1);call write~init~int(0, 166, 1, 1);call #Ultimate.allocInit(84, 167);~rx_copybreak~0 := 200;~use_mmio~0 := 2;~#typhoon_card_info~0.base, ~#typhoon_card_info~0.offset := 168, 0;call #Ultimate.allocInit(156, 168);call write~init~$Pointer$(5, 0, ~#typhoon_card_info~0.base, ~#typhoon_card_info~0.offset, 8);call write~init~int(0, ~#typhoon_card_info~0.base, 8 + ~#typhoon_card_info~0.offset, 4);call write~init~$Pointer$(6, 0, ~#typhoon_card_info~0.base, 12 + ~#typhoon_card_info~0.offset, 8);call write~init~int(1, ~#typhoon_card_info~0.base, 20 + ~#typhoon_card_info~0.offset, 4);call write~init~$Pointer$(7, 0, ~#typhoon_card_info~0.base, 24 + ~#typhoon_card_info~0.offset, 8);call write~init~int(3, ~#typhoon_card_info~0.base, 32 + ~#typhoon_card_info~0.offset, 4);call write~init~$Pointer$(8, 0, ~#typhoon_card_info~0.base, 36 + ~#typhoon_card_info~0.offset, 8);call write~init~int(0, ~#typhoon_card_info~0.base, 44 + ~#typhoon_card_info~0.offset, 4);call write~init~$Pointer$(9, 0, ~#typhoon_card_info~0.base, 48 + ~#typhoon_card_info~0.offset, 8);call write~init~int(1, ~#typhoon_card_info~0.base, 56 + ~#typhoon_card_info~0.offset, 4);call write~init~$Pointer$(10, 0, ~#typhoon_card_info~0.base, 60 + ~#typhoon_card_info~0.offset, 8);call write~init~int(3, ~#typhoon_card_info~0.base, 68 + ~#typhoon_card_info~0.offset, 4);call write~init~$Pointer$(11, 0, ~#typhoon_card_info~0.base, 72 + ~#typhoon_card_info~0.offset, 8);call write~init~int(4, ~#typhoon_card_info~0.base, 80 + ~#typhoon_card_info~0.offset, 4);call write~init~$Pointer$(12, 0, ~#typhoon_card_info~0.base, 84 + ~#typhoon_card_info~0.offset, 8);call write~init~int(4, ~#typhoon_card_info~0.base, 92 + ~#typhoon_card_info~0.offset, 4);call write~init~$Pointer$(13, 0, ~#typhoon_card_info~0.base, 96 + ~#typhoon_card_info~0.offset, 8);call write~init~int(9, ~#typhoon_card_info~0.base, 104 + ~#typhoon_card_info~0.offset, 4);call write~init~$Pointer$(14, 0, ~#typhoon_card_info~0.base, 108 + ~#typhoon_card_info~0.offset, 8);call write~init~int(11, ~#typhoon_card_info~0.base, 116 + ~#typhoon_card_info~0.offset, 4);call write~init~$Pointer$(15, 0, ~#typhoon_card_info~0.base, 120 + ~#typhoon_card_info~0.offset, 8);call write~init~int(9, ~#typhoon_card_info~0.base, 128 + ~#typhoon_card_info~0.offset, 4);call write~init~$Pointer$(16, 0, ~#typhoon_card_info~0.base, 132 + ~#typhoon_card_info~0.offset, 8);call write~init~int(11, ~#typhoon_card_info~0.base, 140 + ~#typhoon_card_info~0.offset, 4);call write~init~$Pointer$(17, 0, ~#typhoon_card_info~0.base, 144 + ~#typhoon_card_info~0.offset, 8);call write~init~int(12, ~#typhoon_card_info~0.base, 152 + ~#typhoon_card_info~0.offset, 4);~#typhoon_pci_tbl~0.base, ~#typhoon_pci_tbl~0.offset := 169, 0;call #Ultimate.allocInit(448, 169);call write~init~int(4279, ~#typhoon_pci_tbl~0.base, ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(39168, ~#typhoon_pci_tbl~0.base, 4 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#typhoon_pci_tbl~0.base, 8 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#typhoon_pci_tbl~0.base, 12 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(0, ~#typhoon_pci_tbl~0.base, 16 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(0, ~#typhoon_pci_tbl~0.base, 20 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(0, ~#typhoon_pci_tbl~0.base, 24 + ~#typhoon_pci_tbl~0.offset, 8);call write~init~int(4279, ~#typhoon_pci_tbl~0.base, 32 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(39170, ~#typhoon_pci_tbl~0.base, 36 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#typhoon_pci_tbl~0.base, 40 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#typhoon_pci_tbl~0.base, 44 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(0, ~#typhoon_pci_tbl~0.base, 48 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(0, ~#typhoon_pci_tbl~0.base, 52 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(1, ~#typhoon_pci_tbl~0.base, 56 + ~#typhoon_pci_tbl~0.offset, 8);call write~init~int(4279, ~#typhoon_pci_tbl~0.base, 64 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(39171, ~#typhoon_pci_tbl~0.base, 68 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#typhoon_pci_tbl~0.base, 72 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#typhoon_pci_tbl~0.base, 76 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(0, ~#typhoon_pci_tbl~0.base, 80 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(0, ~#typhoon_pci_tbl~0.base, 84 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(2, ~#typhoon_pci_tbl~0.base, 88 + ~#typhoon_pci_tbl~0.offset, 8);call write~init~int(4279, ~#typhoon_pci_tbl~0.base, 96 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(39172, ~#typhoon_pci_tbl~0.base, 100 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#typhoon_pci_tbl~0.base, 104 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(4096, ~#typhoon_pci_tbl~0.base, 108 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(0, ~#typhoon_pci_tbl~0.base, 112 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(0, ~#typhoon_pci_tbl~0.base, 116 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(6, ~#typhoon_pci_tbl~0.base, 120 + ~#typhoon_pci_tbl~0.offset, 8);call write~init~int(4279, ~#typhoon_pci_tbl~0.base, 128 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(39172, ~#typhoon_pci_tbl~0.base, 132 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#typhoon_pci_tbl~0.base, 136 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(4354, ~#typhoon_pci_tbl~0.base, 140 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(0, ~#typhoon_pci_tbl~0.base, 144 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(0, ~#typhoon_pci_tbl~0.base, 148 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(12, ~#typhoon_pci_tbl~0.base, 152 + ~#typhoon_pci_tbl~0.offset, 8);call write~init~int(4279, ~#typhoon_pci_tbl~0.base, 160 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(39172, ~#typhoon_pci_tbl~0.base, 164 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#typhoon_pci_tbl~0.base, 168 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(8192, ~#typhoon_pci_tbl~0.base, 172 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(0, ~#typhoon_pci_tbl~0.base, 176 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(0, ~#typhoon_pci_tbl~0.base, 180 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(7, ~#typhoon_pci_tbl~0.base, 184 + ~#typhoon_pci_tbl~0.offset, 8);call write~init~int(4279, ~#typhoon_pci_tbl~0.base, 192 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(39173, ~#typhoon_pci_tbl~0.base, 196 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#typhoon_pci_tbl~0.base, 200 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(4353, ~#typhoon_pci_tbl~0.base, 204 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(0, ~#typhoon_pci_tbl~0.base, 208 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(0, ~#typhoon_pci_tbl~0.base, 212 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(8, ~#typhoon_pci_tbl~0.base, 216 + ~#typhoon_pci_tbl~0.offset, 8);call write~init~int(4279, ~#typhoon_pci_tbl~0.base, 224 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(39173, ~#typhoon_pci_tbl~0.base, 228 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#typhoon_pci_tbl~0.base, 232 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(4354, ~#typhoon_pci_tbl~0.base, 236 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(0, ~#typhoon_pci_tbl~0.base, 240 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(0, ~#typhoon_pci_tbl~0.base, 244 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(9, ~#typhoon_pci_tbl~0.base, 248 + ~#typhoon_pci_tbl~0.offset, 8);call write~init~int(4279, ~#typhoon_pci_tbl~0.base, 256 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(39173, ~#typhoon_pci_tbl~0.base, 260 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#typhoon_pci_tbl~0.base, 264 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(8449, ~#typhoon_pci_tbl~0.base, 268 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(0, ~#typhoon_pci_tbl~0.base, 272 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(0, ~#typhoon_pci_tbl~0.base, 276 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(10, ~#typhoon_pci_tbl~0.base, 280 + ~#typhoon_pci_tbl~0.offset, 8);call write~init~int(4279, ~#typhoon_pci_tbl~0.base, 288 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(39173, ~#typhoon_pci_tbl~0.base, 292 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#typhoon_pci_tbl~0.base, 296 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(8450, ~#typhoon_pci_tbl~0.base, 300 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(0, ~#typhoon_pci_tbl~0.base, 304 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(0, ~#typhoon_pci_tbl~0.base, 308 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(11, ~#typhoon_pci_tbl~0.base, 312 + ~#typhoon_pci_tbl~0.offset, 8);call write~init~int(4279, ~#typhoon_pci_tbl~0.base, 320 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(39176, ~#typhoon_pci_tbl~0.base, 324 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#typhoon_pci_tbl~0.base, 328 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#typhoon_pci_tbl~0.base, 332 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(0, ~#typhoon_pci_tbl~0.base, 336 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(0, ~#typhoon_pci_tbl~0.base, 340 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(4, ~#typhoon_pci_tbl~0.base, 344 + ~#typhoon_pci_tbl~0.offset, 8);call write~init~int(4279, ~#typhoon_pci_tbl~0.base, 352 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(39177, ~#typhoon_pci_tbl~0.base, 356 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#typhoon_pci_tbl~0.base, 360 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#typhoon_pci_tbl~0.base, 364 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(0, ~#typhoon_pci_tbl~0.base, 368 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(0, ~#typhoon_pci_tbl~0.base, 372 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(5, ~#typhoon_pci_tbl~0.base, 376 + ~#typhoon_pci_tbl~0.offset, 8);call write~init~int(4279, ~#typhoon_pci_tbl~0.base, 384 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(39178, ~#typhoon_pci_tbl~0.base, 388 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#typhoon_pci_tbl~0.base, 392 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#typhoon_pci_tbl~0.base, 396 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(0, ~#typhoon_pci_tbl~0.base, 400 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(0, ~#typhoon_pci_tbl~0.base, 404 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(3, ~#typhoon_pci_tbl~0.base, 408 + ~#typhoon_pci_tbl~0.offset, 8);call write~init~int(0, ~#typhoon_pci_tbl~0.base, 416 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(0, ~#typhoon_pci_tbl~0.base, 420 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(0, ~#typhoon_pci_tbl~0.base, 424 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(0, ~#typhoon_pci_tbl~0.base, 428 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(0, ~#typhoon_pci_tbl~0.base, 432 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(0, ~#typhoon_pci_tbl~0.base, 436 + ~#typhoon_pci_tbl~0.offset, 4);call write~init~int(0, ~#typhoon_pci_tbl~0.base, 440 + ~#typhoon_pci_tbl~0.offset, 8);~__mod_pci_device_table~0.vendor := 0;~__mod_pci_device_table~0.device := 0;~__mod_pci_device_table~0.subvendor := 0;~__mod_pci_device_table~0.subdevice := 0;~__mod_pci_device_table~0.class := 0;~__mod_pci_device_table~0.class_mask := 0;~__mod_pci_device_table~0.driver_data := 0;~#typhoon_ethtool_ops~0.base, ~#typhoon_ethtool_ops~0.offset := 170, 0;call #Ultimate.allocInit(368, 170);call write~init~$Pointer$(#funAddr~typhoon_get_settings.base, #funAddr~typhoon_get_settings.offset, ~#typhoon_ethtool_ops~0.base, ~#typhoon_ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~typhoon_set_settings.base, #funAddr~typhoon_set_settings.offset, ~#typhoon_ethtool_ops~0.base, 8 + ~#typhoon_ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~typhoon_get_drvinfo.base, #funAddr~typhoon_get_drvinfo.offset, ~#typhoon_ethtool_ops~0.base, 16 + ~#typhoon_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_ethtool_ops~0.base, 24 + ~#typhoon_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_ethtool_ops~0.base, 32 + ~#typhoon_ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~typhoon_get_wol.base, #funAddr~typhoon_get_wol.offset, ~#typhoon_ethtool_ops~0.base, 40 + ~#typhoon_ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~typhoon_set_wol.base, #funAddr~typhoon_set_wol.offset, ~#typhoon_ethtool_ops~0.base, 48 + ~#typhoon_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_ethtool_ops~0.base, 56 + ~#typhoon_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_ethtool_ops~0.base, 64 + ~#typhoon_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_ethtool_ops~0.base, 72 + ~#typhoon_ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ethtool_op_get_link.base, #funAddr~ethtool_op_get_link.offset, ~#typhoon_ethtool_ops~0.base, 80 + ~#typhoon_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_ethtool_ops~0.base, 88 + ~#typhoon_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_ethtool_ops~0.base, 96 + ~#typhoon_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_ethtool_ops~0.base, 104 + ~#typhoon_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_ethtool_ops~0.base, 112 + ~#typhoon_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_ethtool_ops~0.base, 120 + ~#typhoon_ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~typhoon_get_ringparam.base, #funAddr~typhoon_get_ringparam.offset, ~#typhoon_ethtool_ops~0.base, 128 + ~#typhoon_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_ethtool_ops~0.base, 136 + ~#typhoon_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_ethtool_ops~0.base, 144 + ~#typhoon_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_ethtool_ops~0.base, 152 + ~#typhoon_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_ethtool_ops~0.base, 160 + ~#typhoon_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_ethtool_ops~0.base, 168 + ~#typhoon_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_ethtool_ops~0.base, 176 + ~#typhoon_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_ethtool_ops~0.base, 184 + ~#typhoon_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_ethtool_ops~0.base, 192 + ~#typhoon_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_ethtool_ops~0.base, 200 + ~#typhoon_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_ethtool_ops~0.base, 208 + ~#typhoon_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_ethtool_ops~0.base, 216 + ~#typhoon_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_ethtool_ops~0.base, 224 + ~#typhoon_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_ethtool_ops~0.base, 232 + ~#typhoon_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_ethtool_ops~0.base, 240 + ~#typhoon_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_ethtool_ops~0.base, 248 + ~#typhoon_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_ethtool_ops~0.base, 256 + ~#typhoon_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_ethtool_ops~0.base, 264 + ~#typhoon_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_ethtool_ops~0.base, 272 + ~#typhoon_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_ethtool_ops~0.base, 280 + ~#typhoon_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_ethtool_ops~0.base, 288 + ~#typhoon_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_ethtool_ops~0.base, 296 + ~#typhoon_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_ethtool_ops~0.base, 304 + ~#typhoon_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_ethtool_ops~0.base, 312 + ~#typhoon_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_ethtool_ops~0.base, 320 + ~#typhoon_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_ethtool_ops~0.base, 328 + ~#typhoon_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_ethtool_ops~0.base, 336 + ~#typhoon_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_ethtool_ops~0.base, 344 + ~#typhoon_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_ethtool_ops~0.base, 352 + ~#typhoon_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_ethtool_ops~0.base, 360 + ~#typhoon_ethtool_ops~0.offset, 8);~#typhoon_fw~0.base, ~#typhoon_fw~0.offset := 171, 0;call #Ultimate.allocInit(8, 171);call write~init~$Pointer$(0, 0, ~#typhoon_fw~0.base, ~#typhoon_fw~0.offset, 8);~#typhoon_netdev_ops~0.base, ~#typhoon_netdev_ops~0.offset := 172, 0;call #Ultimate.allocInit(472, 172);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 8 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~typhoon_open.base, #funAddr~typhoon_open.offset, ~#typhoon_netdev_ops~0.base, 16 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~typhoon_close.base, #funAddr~typhoon_close.offset, ~#typhoon_netdev_ops~0.base, 24 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~typhoon_start_tx.base, #funAddr~typhoon_start_tx.offset, ~#typhoon_netdev_ops~0.base, 32 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 40 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 48 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~typhoon_set_rx_mode.base, #funAddr~typhoon_set_rx_mode.offset, ~#typhoon_netdev_ops~0.base, 56 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_mac_addr.base, #funAddr~eth_mac_addr.offset, ~#typhoon_netdev_ops~0.base, 64 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_validate_addr.base, #funAddr~eth_validate_addr.offset, ~#typhoon_netdev_ops~0.base, 72 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 80 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 88 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_change_mtu.base, #funAddr~eth_change_mtu.offset, ~#typhoon_netdev_ops~0.base, 96 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 104 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~typhoon_tx_timeout.base, #funAddr~typhoon_tx_timeout.offset, ~#typhoon_netdev_ops~0.base, 112 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 120 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~typhoon_get_stats.base, #funAddr~typhoon_get_stats.offset, ~#typhoon_netdev_ops~0.base, 128 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 136 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 144 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 152 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 160 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 168 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 176 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 184 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 192 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 200 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 208 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 216 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 224 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 232 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 240 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 248 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 256 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 264 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 272 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 280 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 288 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 296 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 304 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 312 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 320 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 328 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 336 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 344 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 352 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 360 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 368 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 376 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 384 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 392 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 400 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 408 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 416 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 424 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 432 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 440 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 448 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 456 + ~#typhoon_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_netdev_ops~0.base, 464 + ~#typhoon_netdev_ops~0.offset, 8);~#typhoon_driver~0.base, ~#typhoon_driver~0.offset := 173, 0;call #Ultimate.allocInit(301, 173);call write~init~$Pointer$(0, 0, ~#typhoon_driver~0.base, ~#typhoon_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_driver~0.base, 8 + ~#typhoon_driver~0.offset, 8);call write~init~$Pointer$(91, 0, ~#typhoon_driver~0.base, 16 + ~#typhoon_driver~0.offset, 8);call write~init~$Pointer$(~#typhoon_pci_tbl~0.base, ~#typhoon_pci_tbl~0.offset, ~#typhoon_driver~0.base, 24 + ~#typhoon_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~typhoon_init_one.base, #funAddr~typhoon_init_one.offset, ~#typhoon_driver~0.base, 32 + ~#typhoon_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~typhoon_remove_one.base, #funAddr~typhoon_remove_one.offset, ~#typhoon_driver~0.base, 40 + ~#typhoon_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~typhoon_suspend.base, #funAddr~typhoon_suspend.offset, ~#typhoon_driver~0.base, 48 + ~#typhoon_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_driver~0.base, 56 + ~#typhoon_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_driver~0.base, 64 + ~#typhoon_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~typhoon_resume.base, #funAddr~typhoon_resume.offset, ~#typhoon_driver~0.base, 72 + ~#typhoon_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_driver~0.base, 80 + ~#typhoon_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_driver~0.base, 88 + ~#typhoon_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_driver~0.base, 96 + ~#typhoon_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_driver~0.base, 104 + ~#typhoon_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_driver~0.base, 112 + ~#typhoon_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_driver~0.base, 120 + ~#typhoon_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_driver~0.base, 128 + ~#typhoon_driver~0.offset, 8);call write~init~int(0, ~#typhoon_driver~0.base, 136 + ~#typhoon_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#typhoon_driver~0.base, 137 + ~#typhoon_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_driver~0.base, 145 + ~#typhoon_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_driver~0.base, 153 + ~#typhoon_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_driver~0.base, 161 + ~#typhoon_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_driver~0.base, 169 + ~#typhoon_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_driver~0.base, 177 + ~#typhoon_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_driver~0.base, 185 + ~#typhoon_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_driver~0.base, 193 + ~#typhoon_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_driver~0.base, 201 + ~#typhoon_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_driver~0.base, 209 + ~#typhoon_driver~0.offset, 8);call write~init~int(0, ~#typhoon_driver~0.base, 217 + ~#typhoon_driver~0.offset, 4);call write~init~int(0, ~#typhoon_driver~0.base, 221 + ~#typhoon_driver~0.offset, 4);call write~init~int(0, ~#typhoon_driver~0.base, 225 + ~#typhoon_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#typhoon_driver~0.base, 229 + ~#typhoon_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_driver~0.base, 237 + ~#typhoon_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_driver~0.base, 245 + ~#typhoon_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_driver~0.base, 253 + ~#typhoon_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_driver~0.base, 261 + ~#typhoon_driver~0.offset, 8);call write~init~int(0, ~#typhoon_driver~0.base, 269 + ~#typhoon_driver~0.offset, 4);call write~init~int(0, ~#typhoon_driver~0.base, 273 + ~#typhoon_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_driver~0.base, 285 + ~#typhoon_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#typhoon_driver~0.base, 293 + ~#typhoon_driver~0.offset, 8);~ldv_0_data_data~0.base, ~ldv_0_data_data~0.offset := 0, 0;~ldv_0_line_line~0 := 0;~ldv_0_ret_val_default~0 := 0;~ldv_0_thread_thread~0.base, ~ldv_0_thread_thread~0.offset := 0, 0;~ldv_11_ret_default~0 := 0;~ldv_1_container_net_device~0.base, ~ldv_1_container_net_device~0.offset := 0, 0;~ldv_1_container_struct_ethtool_cmd_ptr~0.base, ~ldv_1_container_struct_ethtool_cmd_ptr~0.offset := 0, 0;~ldv_1_container_struct_ethtool_drvinfo_ptr~0.base, ~ldv_1_container_struct_ethtool_drvinfo_ptr~0.offset := 0, 0;~ldv_1_container_struct_ethtool_ringparam_ptr~0.base, ~ldv_1_container_struct_ethtool_ringparam_ptr~0.offset := 0, 0;~ldv_1_container_struct_ethtool_wolinfo_ptr~0.base, ~ldv_1_container_struct_ethtool_wolinfo_ptr~0.offset := 0, 0;~ldv_1_container_struct_sk_buff_ptr~0.base, ~ldv_1_container_struct_sk_buff_ptr~0.offset := 0, 0;~ldv_1_ldv_param_11_1_default~0 := 0;~ldv_2_container_pci_driver~0.base, ~ldv_2_container_pci_driver~0.offset := 0, 0;~ldv_2_resource_dev~0.base, ~ldv_2_resource_dev~0.offset := 0, 0;~#ldv_2_resource_pm_message~0.base, ~#ldv_2_resource_pm_message~0.offset := 174, 0;call #Ultimate.allocInit(4, 174);call write~init~int(0, ~#ldv_2_resource_pm_message~0.base, ~#ldv_2_resource_pm_message~0.offset, 4);~ldv_2_resource_struct_pci_device_id_ptr~0.base, ~ldv_2_resource_struct_pci_device_id_ptr~0.offset := 0, 0;~ldv_2_ret_default~0 := 0;~ldv_statevar_0~0 := 0;~ldv_statevar_1~0 := 0;~ldv_statevar_11~0 := 0;~ldv_statevar_2~0 := 0;~ldv_0_callback_handler~0.base, ~ldv_0_callback_handler~0.offset := #funAddr~typhoon_interrupt.base, #funAddr~typhoon_interrupt.offset;~ldv_11_exit_typhoon_cleanup_default~0.base, ~ldv_11_exit_typhoon_cleanup_default~0.offset := #funAddr~typhoon_cleanup.base, #funAddr~typhoon_cleanup.offset;~ldv_11_init_typhoon_init_default~0.base, ~ldv_11_init_typhoon_init_default~0.offset := #funAddr~typhoon_init.base, #funAddr~typhoon_init.offset;~ldv_1_callback_get_drvinfo~0.base, ~ldv_1_callback_get_drvinfo~0.offset := #funAddr~typhoon_get_drvinfo.base, #funAddr~typhoon_get_drvinfo.offset;~ldv_1_callback_get_link~0.base, ~ldv_1_callback_get_link~0.offset := #funAddr~ethtool_op_get_link.base, #funAddr~ethtool_op_get_link.offset;~ldv_1_callback_get_ringparam~0.base, ~ldv_1_callback_get_ringparam~0.offset := #funAddr~typhoon_get_ringparam.base, #funAddr~typhoon_get_ringparam.offset;~ldv_1_callback_get_settings~0.base, ~ldv_1_callback_get_settings~0.offset := #funAddr~typhoon_get_settings.base, #funAddr~typhoon_get_settings.offset;~ldv_1_callback_get_wol~0.base, ~ldv_1_callback_get_wol~0.offset := #funAddr~typhoon_get_wol.base, #funAddr~typhoon_get_wol.offset;~ldv_1_callback_ndo_change_mtu~0.base, ~ldv_1_callback_ndo_change_mtu~0.offset := #funAddr~eth_change_mtu.base, #funAddr~eth_change_mtu.offset;~ldv_1_callback_ndo_get_stats~0.base, ~ldv_1_callback_ndo_get_stats~0.offset := #funAddr~typhoon_get_stats.base, #funAddr~typhoon_get_stats.offset;~ldv_1_callback_ndo_set_mac_address~0.base, ~ldv_1_callback_ndo_set_mac_address~0.offset := #funAddr~eth_mac_addr.base, #funAddr~eth_mac_addr.offset;~ldv_1_callback_ndo_set_rx_mode~0.base, ~ldv_1_callback_ndo_set_rx_mode~0.offset := #funAddr~typhoon_set_rx_mode.base, #funAddr~typhoon_set_rx_mode.offset;~ldv_1_callback_ndo_start_xmit~0.base, ~ldv_1_callback_ndo_start_xmit~0.offset := #funAddr~typhoon_start_tx.base, #funAddr~typhoon_start_tx.offset;~ldv_1_callback_ndo_tx_timeout~0.base, ~ldv_1_callback_ndo_tx_timeout~0.offset := #funAddr~typhoon_tx_timeout.base, #funAddr~typhoon_tx_timeout.offset;~ldv_1_callback_ndo_validate_addr~0.base, ~ldv_1_callback_ndo_validate_addr~0.offset := #funAddr~eth_validate_addr.base, #funAddr~eth_validate_addr.offset;~ldv_1_callback_set_settings~0.base, ~ldv_1_callback_set_settings~0.offset := #funAddr~typhoon_set_settings.base, #funAddr~typhoon_set_settings.offset;~ldv_1_callback_set_wol~0.base, ~ldv_1_callback_set_wol~0.offset := #funAddr~typhoon_set_wol.base, #funAddr~typhoon_set_wol.offset;~ldv_spin__xmit_lock_of_netdev_queue~0 := 1;~ldv_spin_addr_list_lock_of_net_device~0 := 1;~ldv_spin_alloc_lock_of_task_struct~0 := 1;~ldv_spin_command_lock_of_typhoon~0 := 1;~ldv_spin_i_lock_of_inode~0 := 1;~ldv_spin_lock~0 := 1;~ldv_spin_lock_of_NOT_ARG_SIGN~0 := 1;~ldv_spin_lru_lock_of_netns_frags~0 := 1;~ldv_spin_node_size_lock_of_pglist_data~0 := 1;~ldv_spin_ptl~0 := 1;~ldv_spin_siglock_of_sighand_struct~0 := 1;~ldv_spin_tx_global_lock_of_net_device~0 := 1; {1770#true} is VALID [2022-02-20 22:36:52,296 INFO L290 TraceCheckUtils]: 1: Hoare triple {1770#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret1017#1, main_~tmp~78#1;havoc main_~tmp~78#1;assume { :begin_inline_ldv_initialize } true; {1770#true} is VALID [2022-02-20 22:36:52,296 INFO L290 TraceCheckUtils]: 2: Hoare triple {1770#true} assume { :end_inline_ldv_initialize } true;assume { :begin_inline_ldv_initialize_external_data } true;assume { :begin_inline_ldv_allocate_external_0 } true;havoc ldv_allocate_external_0_#t~ret997#1.base, ldv_allocate_external_0_#t~ret997#1.offset, ldv_allocate_external_0_#t~ret998#1.base, ldv_allocate_external_0_#t~ret998#1.offset, ldv_allocate_external_0_#t~ret999#1.base, ldv_allocate_external_0_#t~ret999#1.offset, ldv_allocate_external_0_#t~ret1000#1.base, ldv_allocate_external_0_#t~ret1000#1.offset, ldv_allocate_external_0_#t~ret1001#1.base, ldv_allocate_external_0_#t~ret1001#1.offset, ldv_allocate_external_0_#t~ret1002#1.base, ldv_allocate_external_0_#t~ret1002#1.offset, ldv_allocate_external_0_#t~ret1003#1.base, ldv_allocate_external_0_#t~ret1003#1.offset, ldv_allocate_external_0_#t~ret1004#1.base, ldv_allocate_external_0_#t~ret1004#1.offset; {1770#true} is VALID [2022-02-20 22:36:52,297 INFO L272 TraceCheckUtils]: 3: Hoare triple {1770#true} call ldv_allocate_external_0_#t~ret997#1.base, ldv_allocate_external_0_#t~ret997#1.offset := ldv_malloc(0); {1903#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:36:52,297 INFO L290 TraceCheckUtils]: 4: Hoare triple {1903#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~1.base, ~res~1.offset;havoc ~tmp~106.base, ~tmp~106.offset;havoc ~tmp___0~48;havoc ~tmp___1~25; {1770#true} is VALID [2022-02-20 22:36:52,298 INFO L272 TraceCheckUtils]: 5: Hoare triple {1770#true} call #t~ret1112 := ldv_undef_int(); {1770#true} is VALID [2022-02-20 22:36:52,298 INFO L290 TraceCheckUtils]: 6: Hoare triple {1770#true} havoc ~tmp~111;assume -2147483648 <= #t~nondet1123 && #t~nondet1123 <= 2147483647;~tmp~111 := #t~nondet1123;havoc #t~nondet1123;#res := ~tmp~111; {1770#true} is VALID [2022-02-20 22:36:52,298 INFO L290 TraceCheckUtils]: 7: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,298 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {1770#true} {1770#true} #3492#return; {1770#true} is VALID [2022-02-20 22:36:52,298 INFO L290 TraceCheckUtils]: 9: Hoare triple {1770#true} assume -2147483648 <= #t~ret1112 && #t~ret1112 <= 2147483647;~tmp___1~25 := #t~ret1112;havoc #t~ret1112; {1770#true} is VALID [2022-02-20 22:36:52,299 INFO L290 TraceCheckUtils]: 10: Hoare triple {1770#true} assume !(0 != ~tmp___1~25);#res.base, #res.offset := 0, 0; {1770#true} is VALID [2022-02-20 22:36:52,299 INFO L290 TraceCheckUtils]: 11: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,299 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {1770#true} {1770#true} #4040#return; {1770#true} is VALID [2022-02-20 22:36:52,299 INFO L290 TraceCheckUtils]: 13: Hoare triple {1770#true} ~ldv_0_data_data~0.base, ~ldv_0_data_data~0.offset := ldv_allocate_external_0_#t~ret997#1.base, ldv_allocate_external_0_#t~ret997#1.offset;havoc ldv_allocate_external_0_#t~ret997#1.base, ldv_allocate_external_0_#t~ret997#1.offset;~ldv_0_thread_thread~0.base, ~ldv_0_thread_thread~0.offset := 0, 0; {1770#true} is VALID [2022-02-20 22:36:52,300 INFO L272 TraceCheckUtils]: 14: Hoare triple {1770#true} call ldv_allocate_external_0_#t~ret998#1.base, ldv_allocate_external_0_#t~ret998#1.offset := ldv_malloc(3027); {1903#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:36:52,300 INFO L290 TraceCheckUtils]: 15: Hoare triple {1903#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~1.base, ~res~1.offset;havoc ~tmp~106.base, ~tmp~106.offset;havoc ~tmp___0~48;havoc ~tmp___1~25; {1770#true} is VALID [2022-02-20 22:36:52,300 INFO L272 TraceCheckUtils]: 16: Hoare triple {1770#true} call #t~ret1112 := ldv_undef_int(); {1770#true} is VALID [2022-02-20 22:36:52,300 INFO L290 TraceCheckUtils]: 17: Hoare triple {1770#true} havoc ~tmp~111;assume -2147483648 <= #t~nondet1123 && #t~nondet1123 <= 2147483647;~tmp~111 := #t~nondet1123;havoc #t~nondet1123;#res := ~tmp~111; {1770#true} is VALID [2022-02-20 22:36:52,301 INFO L290 TraceCheckUtils]: 18: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,301 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {1770#true} {1770#true} #3492#return; {1770#true} is VALID [2022-02-20 22:36:52,301 INFO L290 TraceCheckUtils]: 20: Hoare triple {1770#true} assume -2147483648 <= #t~ret1112 && #t~ret1112 <= 2147483647;~tmp___1~25 := #t~ret1112;havoc #t~ret1112; {1770#true} is VALID [2022-02-20 22:36:52,301 INFO L290 TraceCheckUtils]: 21: Hoare triple {1770#true} assume !(0 != ~tmp___1~25);#res.base, #res.offset := 0, 0; {1770#true} is VALID [2022-02-20 22:36:52,301 INFO L290 TraceCheckUtils]: 22: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,302 INFO L284 TraceCheckUtils]: 23: Hoare quadruple {1770#true} {1770#true} #4042#return; {1770#true} is VALID [2022-02-20 22:36:52,302 INFO L290 TraceCheckUtils]: 24: Hoare triple {1770#true} ~ldv_1_container_net_device~0.base, ~ldv_1_container_net_device~0.offset := ldv_allocate_external_0_#t~ret998#1.base, ldv_allocate_external_0_#t~ret998#1.offset;havoc ldv_allocate_external_0_#t~ret998#1.base, ldv_allocate_external_0_#t~ret998#1.offset; {1770#true} is VALID [2022-02-20 22:36:52,303 INFO L272 TraceCheckUtils]: 25: Hoare triple {1770#true} call ldv_allocate_external_0_#t~ret999#1.base, ldv_allocate_external_0_#t~ret999#1.offset := ldv_malloc(44); {1903#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:36:52,303 INFO L290 TraceCheckUtils]: 26: Hoare triple {1903#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~1.base, ~res~1.offset;havoc ~tmp~106.base, ~tmp~106.offset;havoc ~tmp___0~48;havoc ~tmp___1~25; {1770#true} is VALID [2022-02-20 22:36:52,303 INFO L272 TraceCheckUtils]: 27: Hoare triple {1770#true} call #t~ret1112 := ldv_undef_int(); {1770#true} is VALID [2022-02-20 22:36:52,303 INFO L290 TraceCheckUtils]: 28: Hoare triple {1770#true} havoc ~tmp~111;assume -2147483648 <= #t~nondet1123 && #t~nondet1123 <= 2147483647;~tmp~111 := #t~nondet1123;havoc #t~nondet1123;#res := ~tmp~111; {1770#true} is VALID [2022-02-20 22:36:52,303 INFO L290 TraceCheckUtils]: 29: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,303 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {1770#true} {1770#true} #3492#return; {1770#true} is VALID [2022-02-20 22:36:52,304 INFO L290 TraceCheckUtils]: 31: Hoare triple {1770#true} assume -2147483648 <= #t~ret1112 && #t~ret1112 <= 2147483647;~tmp___1~25 := #t~ret1112;havoc #t~ret1112; {1770#true} is VALID [2022-02-20 22:36:52,304 INFO L290 TraceCheckUtils]: 32: Hoare triple {1770#true} assume !(0 != ~tmp___1~25);#res.base, #res.offset := 0, 0; {1770#true} is VALID [2022-02-20 22:36:52,304 INFO L290 TraceCheckUtils]: 33: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,304 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {1770#true} {1770#true} #4044#return; {1770#true} is VALID [2022-02-20 22:36:52,304 INFO L290 TraceCheckUtils]: 35: Hoare triple {1770#true} ~ldv_1_container_struct_ethtool_cmd_ptr~0.base, ~ldv_1_container_struct_ethtool_cmd_ptr~0.offset := ldv_allocate_external_0_#t~ret999#1.base, ldv_allocate_external_0_#t~ret999#1.offset;havoc ldv_allocate_external_0_#t~ret999#1.base, ldv_allocate_external_0_#t~ret999#1.offset; {1770#true} is VALID [2022-02-20 22:36:52,305 INFO L272 TraceCheckUtils]: 36: Hoare triple {1770#true} call ldv_allocate_external_0_#t~ret1000#1.base, ldv_allocate_external_0_#t~ret1000#1.offset := ldv_malloc(196); {1903#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:36:52,305 INFO L290 TraceCheckUtils]: 37: Hoare triple {1903#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~1.base, ~res~1.offset;havoc ~tmp~106.base, ~tmp~106.offset;havoc ~tmp___0~48;havoc ~tmp___1~25; {1770#true} is VALID [2022-02-20 22:36:52,305 INFO L272 TraceCheckUtils]: 38: Hoare triple {1770#true} call #t~ret1112 := ldv_undef_int(); {1770#true} is VALID [2022-02-20 22:36:52,306 INFO L290 TraceCheckUtils]: 39: Hoare triple {1770#true} havoc ~tmp~111;assume -2147483648 <= #t~nondet1123 && #t~nondet1123 <= 2147483647;~tmp~111 := #t~nondet1123;havoc #t~nondet1123;#res := ~tmp~111; {1770#true} is VALID [2022-02-20 22:36:52,306 INFO L290 TraceCheckUtils]: 40: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,306 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {1770#true} {1770#true} #3492#return; {1770#true} is VALID [2022-02-20 22:36:52,306 INFO L290 TraceCheckUtils]: 42: Hoare triple {1770#true} assume -2147483648 <= #t~ret1112 && #t~ret1112 <= 2147483647;~tmp___1~25 := #t~ret1112;havoc #t~ret1112; {1770#true} is VALID [2022-02-20 22:36:52,306 INFO L290 TraceCheckUtils]: 43: Hoare triple {1770#true} assume !(0 != ~tmp___1~25);#res.base, #res.offset := 0, 0; {1770#true} is VALID [2022-02-20 22:36:52,307 INFO L290 TraceCheckUtils]: 44: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,307 INFO L284 TraceCheckUtils]: 45: Hoare quadruple {1770#true} {1770#true} #4046#return; {1770#true} is VALID [2022-02-20 22:36:52,307 INFO L290 TraceCheckUtils]: 46: Hoare triple {1770#true} ~ldv_1_container_struct_ethtool_drvinfo_ptr~0.base, ~ldv_1_container_struct_ethtool_drvinfo_ptr~0.offset := ldv_allocate_external_0_#t~ret1000#1.base, ldv_allocate_external_0_#t~ret1000#1.offset;havoc ldv_allocate_external_0_#t~ret1000#1.base, ldv_allocate_external_0_#t~ret1000#1.offset; {1770#true} is VALID [2022-02-20 22:36:52,308 INFO L272 TraceCheckUtils]: 47: Hoare triple {1770#true} call ldv_allocate_external_0_#t~ret1001#1.base, ldv_allocate_external_0_#t~ret1001#1.offset := ldv_malloc(36); {1903#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:36:52,308 INFO L290 TraceCheckUtils]: 48: Hoare triple {1903#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~1.base, ~res~1.offset;havoc ~tmp~106.base, ~tmp~106.offset;havoc ~tmp___0~48;havoc ~tmp___1~25; {1770#true} is VALID [2022-02-20 22:36:52,308 INFO L272 TraceCheckUtils]: 49: Hoare triple {1770#true} call #t~ret1112 := ldv_undef_int(); {1770#true} is VALID [2022-02-20 22:36:52,308 INFO L290 TraceCheckUtils]: 50: Hoare triple {1770#true} havoc ~tmp~111;assume -2147483648 <= #t~nondet1123 && #t~nondet1123 <= 2147483647;~tmp~111 := #t~nondet1123;havoc #t~nondet1123;#res := ~tmp~111; {1770#true} is VALID [2022-02-20 22:36:52,308 INFO L290 TraceCheckUtils]: 51: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,309 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {1770#true} {1770#true} #3492#return; {1770#true} is VALID [2022-02-20 22:36:52,309 INFO L290 TraceCheckUtils]: 53: Hoare triple {1770#true} assume -2147483648 <= #t~ret1112 && #t~ret1112 <= 2147483647;~tmp___1~25 := #t~ret1112;havoc #t~ret1112; {1770#true} is VALID [2022-02-20 22:36:52,309 INFO L290 TraceCheckUtils]: 54: Hoare triple {1770#true} assume !(0 != ~tmp___1~25);#res.base, #res.offset := 0, 0; {1770#true} is VALID [2022-02-20 22:36:52,309 INFO L290 TraceCheckUtils]: 55: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,309 INFO L284 TraceCheckUtils]: 56: Hoare quadruple {1770#true} {1770#true} #4048#return; {1770#true} is VALID [2022-02-20 22:36:52,309 INFO L290 TraceCheckUtils]: 57: Hoare triple {1770#true} ~ldv_1_container_struct_ethtool_ringparam_ptr~0.base, ~ldv_1_container_struct_ethtool_ringparam_ptr~0.offset := ldv_allocate_external_0_#t~ret1001#1.base, ldv_allocate_external_0_#t~ret1001#1.offset;havoc ldv_allocate_external_0_#t~ret1001#1.base, ldv_allocate_external_0_#t~ret1001#1.offset; {1770#true} is VALID [2022-02-20 22:36:52,310 INFO L272 TraceCheckUtils]: 58: Hoare triple {1770#true} call ldv_allocate_external_0_#t~ret1002#1.base, ldv_allocate_external_0_#t~ret1002#1.offset := ldv_malloc(18); {1903#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:36:52,310 INFO L290 TraceCheckUtils]: 59: Hoare triple {1903#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~1.base, ~res~1.offset;havoc ~tmp~106.base, ~tmp~106.offset;havoc ~tmp___0~48;havoc ~tmp___1~25; {1770#true} is VALID [2022-02-20 22:36:52,310 INFO L272 TraceCheckUtils]: 60: Hoare triple {1770#true} call #t~ret1112 := ldv_undef_int(); {1770#true} is VALID [2022-02-20 22:36:52,311 INFO L290 TraceCheckUtils]: 61: Hoare triple {1770#true} havoc ~tmp~111;assume -2147483648 <= #t~nondet1123 && #t~nondet1123 <= 2147483647;~tmp~111 := #t~nondet1123;havoc #t~nondet1123;#res := ~tmp~111; {1770#true} is VALID [2022-02-20 22:36:52,311 INFO L290 TraceCheckUtils]: 62: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,311 INFO L284 TraceCheckUtils]: 63: Hoare quadruple {1770#true} {1770#true} #3492#return; {1770#true} is VALID [2022-02-20 22:36:52,311 INFO L290 TraceCheckUtils]: 64: Hoare triple {1770#true} assume -2147483648 <= #t~ret1112 && #t~ret1112 <= 2147483647;~tmp___1~25 := #t~ret1112;havoc #t~ret1112; {1770#true} is VALID [2022-02-20 22:36:52,311 INFO L290 TraceCheckUtils]: 65: Hoare triple {1770#true} assume !(0 != ~tmp___1~25);#res.base, #res.offset := 0, 0; {1770#true} is VALID [2022-02-20 22:36:52,312 INFO L290 TraceCheckUtils]: 66: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,312 INFO L284 TraceCheckUtils]: 67: Hoare quadruple {1770#true} {1770#true} #4050#return; {1770#true} is VALID [2022-02-20 22:36:52,312 INFO L290 TraceCheckUtils]: 68: Hoare triple {1770#true} ~ldv_1_container_struct_ethtool_wolinfo_ptr~0.base, ~ldv_1_container_struct_ethtool_wolinfo_ptr~0.offset := ldv_allocate_external_0_#t~ret1002#1.base, ldv_allocate_external_0_#t~ret1002#1.offset;havoc ldv_allocate_external_0_#t~ret1002#1.base, ldv_allocate_external_0_#t~ret1002#1.offset; {1770#true} is VALID [2022-02-20 22:36:52,313 INFO L272 TraceCheckUtils]: 69: Hoare triple {1770#true} call ldv_allocate_external_0_#t~ret1003#1.base, ldv_allocate_external_0_#t~ret1003#1.offset := ldv_malloc(245); {1903#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:36:52,313 INFO L290 TraceCheckUtils]: 70: Hoare triple {1903#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~1.base, ~res~1.offset;havoc ~tmp~106.base, ~tmp~106.offset;havoc ~tmp___0~48;havoc ~tmp___1~25; {1770#true} is VALID [2022-02-20 22:36:52,313 INFO L272 TraceCheckUtils]: 71: Hoare triple {1770#true} call #t~ret1112 := ldv_undef_int(); {1770#true} is VALID [2022-02-20 22:36:52,313 INFO L290 TraceCheckUtils]: 72: Hoare triple {1770#true} havoc ~tmp~111;assume -2147483648 <= #t~nondet1123 && #t~nondet1123 <= 2147483647;~tmp~111 := #t~nondet1123;havoc #t~nondet1123;#res := ~tmp~111; {1770#true} is VALID [2022-02-20 22:36:52,313 INFO L290 TraceCheckUtils]: 73: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,314 INFO L284 TraceCheckUtils]: 74: Hoare quadruple {1770#true} {1770#true} #3492#return; {1770#true} is VALID [2022-02-20 22:36:52,314 INFO L290 TraceCheckUtils]: 75: Hoare triple {1770#true} assume -2147483648 <= #t~ret1112 && #t~ret1112 <= 2147483647;~tmp___1~25 := #t~ret1112;havoc #t~ret1112; {1770#true} is VALID [2022-02-20 22:36:52,314 INFO L290 TraceCheckUtils]: 76: Hoare triple {1770#true} assume !(0 != ~tmp___1~25);#res.base, #res.offset := 0, 0; {1770#true} is VALID [2022-02-20 22:36:52,314 INFO L290 TraceCheckUtils]: 77: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,314 INFO L284 TraceCheckUtils]: 78: Hoare quadruple {1770#true} {1770#true} #4052#return; {1770#true} is VALID [2022-02-20 22:36:52,315 INFO L290 TraceCheckUtils]: 79: Hoare triple {1770#true} ~ldv_1_container_struct_sk_buff_ptr~0.base, ~ldv_1_container_struct_sk_buff_ptr~0.offset := ldv_allocate_external_0_#t~ret1003#1.base, ldv_allocate_external_0_#t~ret1003#1.offset;havoc ldv_allocate_external_0_#t~ret1003#1.base, ldv_allocate_external_0_#t~ret1003#1.offset; {1770#true} is VALID [2022-02-20 22:36:52,315 INFO L272 TraceCheckUtils]: 80: Hoare triple {1770#true} call ldv_allocate_external_0_#t~ret1004#1.base, ldv_allocate_external_0_#t~ret1004#1.offset := ldv_malloc(3018); {1903#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:36:52,315 INFO L290 TraceCheckUtils]: 81: Hoare triple {1903#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~1.base, ~res~1.offset;havoc ~tmp~106.base, ~tmp~106.offset;havoc ~tmp___0~48;havoc ~tmp___1~25; {1770#true} is VALID [2022-02-20 22:36:52,316 INFO L272 TraceCheckUtils]: 82: Hoare triple {1770#true} call #t~ret1112 := ldv_undef_int(); {1770#true} is VALID [2022-02-20 22:36:52,316 INFO L290 TraceCheckUtils]: 83: Hoare triple {1770#true} havoc ~tmp~111;assume -2147483648 <= #t~nondet1123 && #t~nondet1123 <= 2147483647;~tmp~111 := #t~nondet1123;havoc #t~nondet1123;#res := ~tmp~111; {1770#true} is VALID [2022-02-20 22:36:52,316 INFO L290 TraceCheckUtils]: 84: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,316 INFO L284 TraceCheckUtils]: 85: Hoare quadruple {1770#true} {1770#true} #3492#return; {1770#true} is VALID [2022-02-20 22:36:52,316 INFO L290 TraceCheckUtils]: 86: Hoare triple {1770#true} assume -2147483648 <= #t~ret1112 && #t~ret1112 <= 2147483647;~tmp___1~25 := #t~ret1112;havoc #t~ret1112; {1770#true} is VALID [2022-02-20 22:36:52,316 INFO L290 TraceCheckUtils]: 87: Hoare triple {1770#true} assume !(0 != ~tmp___1~25);#res.base, #res.offset := 0, 0; {1770#true} is VALID [2022-02-20 22:36:52,317 INFO L290 TraceCheckUtils]: 88: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,317 INFO L284 TraceCheckUtils]: 89: Hoare quadruple {1770#true} {1770#true} #4054#return; {1770#true} is VALID [2022-02-20 22:36:52,317 INFO L290 TraceCheckUtils]: 90: Hoare triple {1770#true} ~ldv_2_resource_dev~0.base, ~ldv_2_resource_dev~0.offset := ldv_allocate_external_0_#t~ret1004#1.base, ldv_allocate_external_0_#t~ret1004#1.offset;havoc ldv_allocate_external_0_#t~ret1004#1.base, ldv_allocate_external_0_#t~ret1004#1.offset; {1770#true} is VALID [2022-02-20 22:36:52,317 INFO L290 TraceCheckUtils]: 91: Hoare triple {1770#true} assume { :end_inline_ldv_allocate_external_0 } true; {1770#true} is VALID [2022-02-20 22:36:52,318 INFO L290 TraceCheckUtils]: 92: Hoare triple {1770#true} assume { :end_inline_ldv_initialize_external_data } true;~ldv_statevar_11~0 := 7;~ldv_statevar_0~0 := 6;~ldv_statevar_1~0 := 5;~ldv_2_ret_default~0 := 1;~ldv_statevar_2~0 := 20; {1844#(= 20 ~ldv_statevar_2~0)} is VALID [2022-02-20 22:36:52,318 INFO L272 TraceCheckUtils]: 93: Hoare triple {1844#(= 20 ~ldv_statevar_2~0)} call main_#t~ret1017#1 := ldv_undef_int(); {1770#true} is VALID [2022-02-20 22:36:52,318 INFO L290 TraceCheckUtils]: 94: Hoare triple {1770#true} havoc ~tmp~111;assume -2147483648 <= #t~nondet1123 && #t~nondet1123 <= 2147483647;~tmp~111 := #t~nondet1123;havoc #t~nondet1123;#res := ~tmp~111; {1770#true} is VALID [2022-02-20 22:36:52,319 INFO L290 TraceCheckUtils]: 95: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,319 INFO L284 TraceCheckUtils]: 96: Hoare quadruple {1770#true} {1844#(= 20 ~ldv_statevar_2~0)} #4056#return; {1844#(= 20 ~ldv_statevar_2~0)} is VALID [2022-02-20 22:36:52,320 INFO L290 TraceCheckUtils]: 97: Hoare triple {1844#(= 20 ~ldv_statevar_2~0)} assume -2147483648 <= main_#t~ret1017#1 && main_#t~ret1017#1 <= 2147483647;main_~tmp~78#1 := main_#t~ret1017#1;havoc main_#t~ret1017#1; {1844#(= 20 ~ldv_statevar_2~0)} is VALID [2022-02-20 22:36:52,320 INFO L290 TraceCheckUtils]: 98: Hoare triple {1844#(= 20 ~ldv_statevar_2~0)} assume !(0 == main_~tmp~78#1); {1844#(= 20 ~ldv_statevar_2~0)} is VALID [2022-02-20 22:36:52,320 INFO L290 TraceCheckUtils]: 99: Hoare triple {1844#(= 20 ~ldv_statevar_2~0)} assume !(1 == main_~tmp~78#1); {1844#(= 20 ~ldv_statevar_2~0)} is VALID [2022-02-20 22:36:52,321 INFO L290 TraceCheckUtils]: 100: Hoare triple {1844#(= 20 ~ldv_statevar_2~0)} assume !(2 == main_~tmp~78#1); {1844#(= 20 ~ldv_statevar_2~0)} is VALID [2022-02-20 22:36:52,321 INFO L290 TraceCheckUtils]: 101: Hoare triple {1844#(= 20 ~ldv_statevar_2~0)} assume 3 == main_~tmp~78#1; {1844#(= 20 ~ldv_statevar_2~0)} is VALID [2022-02-20 22:36:52,322 INFO L290 TraceCheckUtils]: 102: Hoare triple {1844#(= 20 ~ldv_statevar_2~0)} assume { :begin_inline_ldv_pci_pci_instance_2 } true;ldv_pci_pci_instance_2_#in~arg0#1.base, ldv_pci_pci_instance_2_#in~arg0#1.offset := 0, 0;havoc ldv_pci_pci_instance_2_#t~ret1037#1, ldv_pci_pci_instance_2_#t~mem1038#1.base, ldv_pci_pci_instance_2_#t~mem1038#1.offset, ldv_pci_pci_instance_2_#t~mem1039#1.base, ldv_pci_pci_instance_2_#t~mem1039#1.offset, ldv_pci_pci_instance_2_#t~mem1040#1.base, ldv_pci_pci_instance_2_#t~mem1040#1.offset, ldv_pci_pci_instance_2_#t~ret1041#1, ldv_pci_pci_instance_2_#t~mem1042#1.base, ldv_pci_pci_instance_2_#t~mem1042#1.offset, ldv_pci_pci_instance_2_#t~mem1043#1.base, ldv_pci_pci_instance_2_#t~mem1043#1.offset, ldv_pci_pci_instance_2_#t~mem1044#1.base, ldv_pci_pci_instance_2_#t~mem1044#1.offset, ldv_pci_pci_instance_2_#t~mem1045#1.base, ldv_pci_pci_instance_2_#t~mem1045#1.offset, ldv_pci_pci_instance_2_#t~mem1046#1.base, ldv_pci_pci_instance_2_#t~mem1046#1.offset, ldv_pci_pci_instance_2_#t~mem1047#1, ldv_pci_pci_instance_2_#t~ret1048#1, ldv_pci_pci_instance_2_#t~ret1049#1, ldv_pci_pci_instance_2_#t~mem1050#1.base, ldv_pci_pci_instance_2_#t~mem1050#1.offset, ldv_pci_pci_instance_2_#t~mem1051#1, ldv_pci_pci_instance_2_#t~ret1052#1, ldv_pci_pci_instance_2_#t~ret1053#1, ldv_pci_pci_instance_2_#t~ret1054#1, ldv_pci_pci_instance_2_#t~ret1055#1, ldv_pci_pci_instance_2_#t~ret1056#1, ldv_pci_pci_instance_2_#t~mem1057#1.base, ldv_pci_pci_instance_2_#t~mem1057#1.offset, ldv_pci_pci_instance_2_#t~ret1058#1, ldv_pci_pci_instance_2_#t~ret1059#1, ldv_pci_pci_instance_2_#t~ret1060#1, ldv_pci_pci_instance_2_#t~ret1061#1.base, ldv_pci_pci_instance_2_#t~ret1061#1.offset, ldv_pci_pci_instance_2_#t~ret1062#1.base, ldv_pci_pci_instance_2_#t~ret1062#1.offset, ldv_pci_pci_instance_2_#t~ret1063#1, ldv_pci_pci_instance_2_~arg0#1.base, ldv_pci_pci_instance_2_~arg0#1.offset, ldv_pci_pci_instance_2_~tmp~84#1, ldv_pci_pci_instance_2_~tmp___0~40#1, ldv_pci_pci_instance_2_~tmp___1~24#1, ldv_pci_pci_instance_2_~tmp___2~11#1.base, ldv_pci_pci_instance_2_~tmp___2~11#1.offset, ldv_pci_pci_instance_2_~tmp___3~8#1.base, ldv_pci_pci_instance_2_~tmp___3~8#1.offset, ldv_pci_pci_instance_2_~tmp___4~5#1;ldv_pci_pci_instance_2_~arg0#1.base, ldv_pci_pci_instance_2_~arg0#1.offset := ldv_pci_pci_instance_2_#in~arg0#1.base, ldv_pci_pci_instance_2_#in~arg0#1.offset;havoc ldv_pci_pci_instance_2_~tmp~84#1;havoc ldv_pci_pci_instance_2_~tmp___0~40#1;havoc ldv_pci_pci_instance_2_~tmp___1~24#1;havoc ldv_pci_pci_instance_2_~tmp___2~11#1.base, ldv_pci_pci_instance_2_~tmp___2~11#1.offset;havoc ldv_pci_pci_instance_2_~tmp___3~8#1.base, ldv_pci_pci_instance_2_~tmp___3~8#1.offset;havoc ldv_pci_pci_instance_2_~tmp___4~5#1; {1844#(= 20 ~ldv_statevar_2~0)} is VALID [2022-02-20 22:36:52,322 INFO L290 TraceCheckUtils]: 103: Hoare triple {1844#(= 20 ~ldv_statevar_2~0)} assume !(1 == ~ldv_statevar_2~0); {1844#(= 20 ~ldv_statevar_2~0)} is VALID [2022-02-20 22:36:52,322 INFO L290 TraceCheckUtils]: 104: Hoare triple {1844#(= 20 ~ldv_statevar_2~0)} assume !(2 == ~ldv_statevar_2~0); {1844#(= 20 ~ldv_statevar_2~0)} is VALID [2022-02-20 22:36:52,323 INFO L290 TraceCheckUtils]: 105: Hoare triple {1844#(= 20 ~ldv_statevar_2~0)} assume !(3 == ~ldv_statevar_2~0); {1844#(= 20 ~ldv_statevar_2~0)} is VALID [2022-02-20 22:36:52,323 INFO L290 TraceCheckUtils]: 106: Hoare triple {1844#(= 20 ~ldv_statevar_2~0)} assume !(4 == ~ldv_statevar_2~0); {1844#(= 20 ~ldv_statevar_2~0)} is VALID [2022-02-20 22:36:52,324 INFO L290 TraceCheckUtils]: 107: Hoare triple {1844#(= 20 ~ldv_statevar_2~0)} assume !(5 == ~ldv_statevar_2~0); {1844#(= 20 ~ldv_statevar_2~0)} is VALID [2022-02-20 22:36:52,324 INFO L290 TraceCheckUtils]: 108: Hoare triple {1844#(= 20 ~ldv_statevar_2~0)} assume 6 == ~ldv_statevar_2~0; {1771#false} is VALID [2022-02-20 22:36:52,324 INFO L290 TraceCheckUtils]: 109: Hoare triple {1771#false} call ldv_pci_pci_instance_2_#t~mem1043#1.base, ldv_pci_pci_instance_2_#t~mem1043#1.offset := read~$Pointer$(~ldv_2_container_pci_driver~0.base, 64 + ~ldv_2_container_pci_driver~0.offset, 8); {1771#false} is VALID [2022-02-20 22:36:52,325 INFO L290 TraceCheckUtils]: 110: Hoare triple {1771#false} assume 0 != (ldv_pci_pci_instance_2_#t~mem1043#1.base + ldv_pci_pci_instance_2_#t~mem1043#1.offset) % 18446744073709551616;havoc ldv_pci_pci_instance_2_#t~mem1043#1.base, ldv_pci_pci_instance_2_#t~mem1043#1.offset;call ldv_pci_pci_instance_2_#t~mem1044#1.base, ldv_pci_pci_instance_2_#t~mem1044#1.offset := read~$Pointer$(~ldv_2_container_pci_driver~0.base, 64 + ~ldv_2_container_pci_driver~0.offset, 8);assume { :begin_inline_ldv_pci_instance_resume_early_2_6 } true;ldv_pci_instance_resume_early_2_6_#in~arg0#1.base, ldv_pci_instance_resume_early_2_6_#in~arg0#1.offset, ldv_pci_instance_resume_early_2_6_#in~arg1#1.base, ldv_pci_instance_resume_early_2_6_#in~arg1#1.offset := ldv_pci_pci_instance_2_#t~mem1044#1.base, ldv_pci_pci_instance_2_#t~mem1044#1.offset, ~ldv_2_resource_dev~0.base, ~ldv_2_resource_dev~0.offset;havoc ldv_pci_instance_resume_early_2_6_#t~ret1029#1, ldv_pci_instance_resume_early_2_6_~arg0#1.base, ldv_pci_instance_resume_early_2_6_~arg0#1.offset, ldv_pci_instance_resume_early_2_6_~arg1#1.base, ldv_pci_instance_resume_early_2_6_~arg1#1.offset;ldv_pci_instance_resume_early_2_6_~arg0#1.base, ldv_pci_instance_resume_early_2_6_~arg0#1.offset := ldv_pci_instance_resume_early_2_6_#in~arg0#1.base, ldv_pci_instance_resume_early_2_6_#in~arg0#1.offset;ldv_pci_instance_resume_early_2_6_~arg1#1.base, ldv_pci_instance_resume_early_2_6_~arg1#1.offset := ldv_pci_instance_resume_early_2_6_#in~arg1#1.base, ldv_pci_instance_resume_early_2_6_#in~arg1#1.offset;assume { :begin_inline_##fun~$Pointer$~TO~int } true;##fun~$Pointer$~TO~int_#in~1028#1.base, ##fun~$Pointer$~TO~int_#in~1028#1.offset, ##fun~$Pointer$~TO~int_#in~#fp#1.base, ##fun~$Pointer$~TO~int_#in~#fp#1.offset := ldv_pci_instance_resume_early_2_6_~arg1#1.base, ldv_pci_instance_resume_early_2_6_~arg1#1.offset, ldv_pci_instance_resume_early_2_6_~arg0#1.base, ldv_pci_instance_resume_early_2_6_~arg0#1.offset;havoc ##fun~$Pointer$~TO~int_#res#1;havoc ##fun~$Pointer$~TO~int_#~1028#1.base, ##fun~$Pointer$~TO~int_#~1028#1.offset, ##fun~$Pointer$~TO~int_#t~funptrres1230#1, ##fun~$Pointer$~TO~int_#t~ret1231#1, ##fun~$Pointer$~TO~int_#t~ret1232#1, ##fun~$Pointer$~TO~int_#t~ret1233#1, ##fun~$Pointer$~TO~int_#t~ret1234#1;##fun~$Pointer$~TO~int_#~1028#1.base, ##fun~$Pointer$~TO~int_#~1028#1.offset := ##fun~$Pointer$~TO~int_#in~1028#1.base, ##fun~$Pointer$~TO~int_#in~1028#1.offset; {1771#false} is VALID [2022-02-20 22:36:52,325 INFO L290 TraceCheckUtils]: 111: Hoare triple {1771#false} assume ##fun~$Pointer$~TO~int_#in~#fp#1.base == #funAddr~typhoon_resume.base && ##fun~$Pointer$~TO~int_#in~#fp#1.offset == #funAddr~typhoon_resume.offset; {1771#false} is VALID [2022-02-20 22:36:52,325 INFO L272 TraceCheckUtils]: 112: Hoare triple {1771#false} call ##fun~$Pointer$~TO~int_#t~ret1234#1 := typhoon_resume(##fun~$Pointer$~TO~int_#~1028#1.base, ##fun~$Pointer$~TO~int_#~1028#1.offset); {1771#false} is VALID [2022-02-20 22:36:52,325 INFO L290 TraceCheckUtils]: 113: Hoare triple {1771#false} ~pdev#1.base, ~pdev#1.offset := #in~pdev#1.base, #in~pdev#1.offset;havoc ~dev~2#1.base, ~dev~2#1.offset;havoc ~tmp~68#1.base, ~tmp~68#1.offset;havoc ~tp~13#1.base, ~tp~13#1.offset;havoc ~tmp___0~34#1.base, ~tmp___0~34#1.offset;havoc ~tmp___1~20#1;havoc ~tmp___2~8#1;havoc ~tmp___3~5#1;havoc ~tmp___4~2#1; {1771#false} is VALID [2022-02-20 22:36:52,325 INFO L272 TraceCheckUtils]: 114: Hoare triple {1771#false} call #t~ret870#1.base, #t~ret870#1.offset := pci_get_drvdata(~pdev#1.base, ~pdev#1.offset); {1770#true} is VALID [2022-02-20 22:36:52,326 INFO L290 TraceCheckUtils]: 115: Hoare triple {1770#true} ~pdev#1.base, ~pdev#1.offset := #in~pdev#1.base, #in~pdev#1.offset;havoc ~tmp~31#1.base, ~tmp~31#1.offset;assume { :begin_inline_ldv_dev_get_drvdata_81 } true;ldv_dev_get_drvdata_81_#in~dev#1.base, ldv_dev_get_drvdata_81_#in~dev#1.offset := ~pdev#1.base, 179 + ~pdev#1.offset;havoc ldv_dev_get_drvdata_81_#res#1.base, ldv_dev_get_drvdata_81_#res#1.offset;havoc ldv_dev_get_drvdata_81_#t~ret1078#1.base, ldv_dev_get_drvdata_81_#t~ret1078#1.offset, ldv_dev_get_drvdata_81_~dev#1.base, ldv_dev_get_drvdata_81_~dev#1.offset, ldv_dev_get_drvdata_81_~tmp~91#1.base, ldv_dev_get_drvdata_81_~tmp~91#1.offset;ldv_dev_get_drvdata_81_~dev#1.base, ldv_dev_get_drvdata_81_~dev#1.offset := ldv_dev_get_drvdata_81_#in~dev#1.base, ldv_dev_get_drvdata_81_#in~dev#1.offset;havoc ldv_dev_get_drvdata_81_~tmp~91#1.base, ldv_dev_get_drvdata_81_~tmp~91#1.offset;assume { :begin_inline_ldv_dev_get_drvdata } true;ldv_dev_get_drvdata_#in~dev#1.base, ldv_dev_get_drvdata_#in~dev#1.offset := ldv_dev_get_drvdata_81_~dev#1.base, ldv_dev_get_drvdata_81_~dev#1.offset;havoc ldv_dev_get_drvdata_#res#1.base, ldv_dev_get_drvdata_#res#1.offset;havoc ldv_dev_get_drvdata_#t~mem1092#1.base, ldv_dev_get_drvdata_#t~mem1092#1.offset, ldv_dev_get_drvdata_#t~short1093#1, ldv_dev_get_drvdata_#t~mem1094#1.base, ldv_dev_get_drvdata_#t~mem1094#1.offset, ldv_dev_get_drvdata_#t~mem1095#1.base, ldv_dev_get_drvdata_#t~mem1095#1.offset, ldv_dev_get_drvdata_~dev#1.base, ldv_dev_get_drvdata_~dev#1.offset;ldv_dev_get_drvdata_~dev#1.base, ldv_dev_get_drvdata_~dev#1.offset := ldv_dev_get_drvdata_#in~dev#1.base, ldv_dev_get_drvdata_#in~dev#1.offset;ldv_dev_get_drvdata_#t~short1093#1 := 0 != (ldv_dev_get_drvdata_~dev#1.base + ldv_dev_get_drvdata_~dev#1.offset) % 18446744073709551616; {1770#true} is VALID [2022-02-20 22:36:52,326 INFO L290 TraceCheckUtils]: 116: Hoare triple {1770#true} assume ldv_dev_get_drvdata_#t~short1093#1;call ldv_dev_get_drvdata_#t~mem1092#1.base, ldv_dev_get_drvdata_#t~mem1092#1.offset := read~$Pointer$(ldv_dev_get_drvdata_~dev#1.base, 8 + ldv_dev_get_drvdata_~dev#1.offset, 8);ldv_dev_get_drvdata_#t~short1093#1 := 0 != (ldv_dev_get_drvdata_#t~mem1092#1.base + ldv_dev_get_drvdata_#t~mem1092#1.offset) % 18446744073709551616; {1770#true} is VALID [2022-02-20 22:36:52,326 INFO L290 TraceCheckUtils]: 117: Hoare triple {1770#true} assume ldv_dev_get_drvdata_#t~short1093#1;havoc ldv_dev_get_drvdata_#t~mem1092#1.base, ldv_dev_get_drvdata_#t~mem1092#1.offset;havoc ldv_dev_get_drvdata_#t~short1093#1;call ldv_dev_get_drvdata_#t~mem1094#1.base, ldv_dev_get_drvdata_#t~mem1094#1.offset := read~$Pointer$(ldv_dev_get_drvdata_~dev#1.base, 8 + ldv_dev_get_drvdata_~dev#1.offset, 8);call ldv_dev_get_drvdata_#t~mem1095#1.base, ldv_dev_get_drvdata_#t~mem1095#1.offset := read~$Pointer$(ldv_dev_get_drvdata_#t~mem1094#1.base, ldv_dev_get_drvdata_#t~mem1094#1.offset, 8);ldv_dev_get_drvdata_#res#1.base, ldv_dev_get_drvdata_#res#1.offset := ldv_dev_get_drvdata_#t~mem1095#1.base, ldv_dev_get_drvdata_#t~mem1095#1.offset;havoc ldv_dev_get_drvdata_#t~mem1094#1.base, ldv_dev_get_drvdata_#t~mem1094#1.offset;havoc ldv_dev_get_drvdata_#t~mem1095#1.base, ldv_dev_get_drvdata_#t~mem1095#1.offset; {1770#true} is VALID [2022-02-20 22:36:52,326 INFO L290 TraceCheckUtils]: 118: Hoare triple {1770#true} ldv_dev_get_drvdata_81_#t~ret1078#1.base, ldv_dev_get_drvdata_81_#t~ret1078#1.offset := ldv_dev_get_drvdata_#res#1.base, ldv_dev_get_drvdata_#res#1.offset;assume { :end_inline_ldv_dev_get_drvdata } true;ldv_dev_get_drvdata_81_~tmp~91#1.base, ldv_dev_get_drvdata_81_~tmp~91#1.offset := ldv_dev_get_drvdata_81_#t~ret1078#1.base, ldv_dev_get_drvdata_81_#t~ret1078#1.offset;havoc ldv_dev_get_drvdata_81_#t~ret1078#1.base, ldv_dev_get_drvdata_81_#t~ret1078#1.offset;ldv_dev_get_drvdata_81_#res#1.base, ldv_dev_get_drvdata_81_#res#1.offset := ldv_dev_get_drvdata_81_~tmp~91#1.base, ldv_dev_get_drvdata_81_~tmp~91#1.offset; {1770#true} is VALID [2022-02-20 22:36:52,326 INFO L290 TraceCheckUtils]: 119: Hoare triple {1770#true} #t~ret266#1.base, #t~ret266#1.offset := ldv_dev_get_drvdata_81_#res#1.base, ldv_dev_get_drvdata_81_#res#1.offset;assume { :end_inline_ldv_dev_get_drvdata_81 } true;~tmp~31#1.base, ~tmp~31#1.offset := #t~ret266#1.base, #t~ret266#1.offset;havoc #t~ret266#1.base, #t~ret266#1.offset;#res#1.base, #res#1.offset := ~tmp~31#1.base, ~tmp~31#1.offset; {1770#true} is VALID [2022-02-20 22:36:52,327 INFO L290 TraceCheckUtils]: 120: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,327 INFO L284 TraceCheckUtils]: 121: Hoare quadruple {1770#true} {1771#false} #3998#return; {1771#false} is VALID [2022-02-20 22:36:52,327 INFO L290 TraceCheckUtils]: 122: Hoare triple {1771#false} ~tmp~68#1.base, ~tmp~68#1.offset := #t~ret870#1.base, #t~ret870#1.offset;havoc #t~ret870#1.base, #t~ret870#1.offset;~dev~2#1.base, ~dev~2#1.offset := ~tmp~68#1.base, ~tmp~68#1.offset; {1771#false} is VALID [2022-02-20 22:36:52,327 INFO L272 TraceCheckUtils]: 123: Hoare triple {1771#false} call #t~ret871#1.base, #t~ret871#1.offset := netdev_priv(~dev~2#1.base, ~dev~2#1.offset); {1770#true} is VALID [2022-02-20 22:36:52,327 INFO L290 TraceCheckUtils]: 124: Hoare triple {1770#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3200 + ~dev.offset; {1770#true} is VALID [2022-02-20 22:36:52,328 INFO L290 TraceCheckUtils]: 125: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,328 INFO L284 TraceCheckUtils]: 126: Hoare quadruple {1770#true} {1771#false} #4000#return; {1771#false} is VALID [2022-02-20 22:36:52,328 INFO L290 TraceCheckUtils]: 127: Hoare triple {1771#false} ~tmp___0~34#1.base, ~tmp___0~34#1.offset := #t~ret871#1.base, #t~ret871#1.offset;havoc #t~ret871#1.base, #t~ret871#1.offset;~tp~13#1.base, ~tp~13#1.offset := ~tmp___0~34#1.base, ~tmp___0~34#1.offset; {1771#false} is VALID [2022-02-20 22:36:52,328 INFO L272 TraceCheckUtils]: 128: Hoare triple {1771#false} call #t~ret872#1 := netif_running(~dev~2#1.base, ~dev~2#1.offset); {1770#true} is VALID [2022-02-20 22:36:52,328 INFO L290 TraceCheckUtils]: 129: Hoare triple {1770#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;havoc ~tmp~26; {1770#true} is VALID [2022-02-20 22:36:52,328 INFO L272 TraceCheckUtils]: 130: Hoare triple {1770#true} call #t~ret216 := constant_test_bit(0, ~dev.base, 68 + ~dev.offset); {1770#true} is VALID [2022-02-20 22:36:52,329 INFO L290 TraceCheckUtils]: 131: Hoare triple {1770#true} ~nr := #in~nr;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;call #t~mem0 := read~int(~addr.base, ~addr.offset + 8 * (if ~nr / 64 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~nr / 64 % 18446744073709551616 % 18446744073709551616 else ~nr / 64 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), 8);#res := (if (if #t~mem0 < 0 && (31 == (if 0 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 0 else (if 1 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 1 else ~bitwiseAnd((if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296), 63))) || 63 == (if 0 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 0 else (if 1 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 1 else ~bitwiseAnd((if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296), 63)))) then 1 else (if #t~mem0 >= 0 && (31 == (if 0 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 0 else (if 1 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 1 else ~bitwiseAnd((if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296), 63))) || 63 == (if 0 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 0 else (if 1 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 1 else ~bitwiseAnd((if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296), 63)))) then 0 else ~shiftRight(#t~mem0, (if 0 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 0 else (if 1 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 1 else ~bitwiseAnd((if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296), 63)))))) % 18446744073709551616 % 4294967296 <= 2147483647 then (if #t~mem0 < 0 && (31 == (if 0 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 0 else (if 1 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 1 else ~bitwiseAnd((if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296), 63))) || 63 == (if 0 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 0 else (if 1 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 1 else ~bitwiseAnd((if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296), 63)))) then 1 else (if #t~mem0 >= 0 && (31 == (if 0 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 0 else (if 1 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 1 else ~bitwiseAnd((if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296), 63))) || 63 == (if 0 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 0 else (if 1 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 1 else ~bitwiseAnd((if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296), 63)))) then 0 else ~shiftRight(#t~mem0, (if 0 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 0 else (if 1 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 1 else ~bitwiseAnd((if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296), 63)))))) % 18446744073709551616 % 4294967296 else (if #t~mem0 < 0 && (31 == (if 0 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 0 else (if 1 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 1 else ~bitwiseAnd((if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296), 63))) || 63 == (if 0 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 0 else (if 1 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 1 else ~bitwiseAnd((if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296), 63)))) then 1 else (if #t~mem0 >= 0 && (31 == (if 0 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 0 else (if 1 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 1 else ~bitwiseAnd((if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296), 63))) || 63 == (if 0 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 0 else (if 1 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 1 else ~bitwiseAnd((if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296), 63)))) then 0 else ~shiftRight(#t~mem0, (if 0 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 0 else (if 1 == (if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296) then 1 else ~bitwiseAnd((if ~nr % 4294967296 <= 2147483647 then ~nr % 4294967296 else ~nr % 4294967296 - 4294967296), 63)))))) % 18446744073709551616 % 4294967296 - 4294967296);havoc #t~mem0; {1770#true} is VALID [2022-02-20 22:36:52,329 INFO L290 TraceCheckUtils]: 132: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,329 INFO L284 TraceCheckUtils]: 133: Hoare quadruple {1770#true} {1770#true} #3718#return; {1770#true} is VALID [2022-02-20 22:36:52,329 INFO L290 TraceCheckUtils]: 134: Hoare triple {1770#true} assume -2147483648 <= #t~ret216 && #t~ret216 <= 2147483647;~tmp~26 := #t~ret216;havoc #t~ret216;#res := (if 0 == (if 0 != ~tmp~26 then 1 else 0) then 0 else 1); {1770#true} is VALID [2022-02-20 22:36:52,330 INFO L290 TraceCheckUtils]: 135: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,330 INFO L284 TraceCheckUtils]: 136: Hoare quadruple {1770#true} {1771#false} #4002#return; {1771#false} is VALID [2022-02-20 22:36:52,330 INFO L290 TraceCheckUtils]: 137: Hoare triple {1771#false} ~tmp___1~20#1 := #t~ret872#1;havoc #t~ret872#1; {1771#false} is VALID [2022-02-20 22:36:52,330 INFO L290 TraceCheckUtils]: 138: Hoare triple {1771#false} assume !(0 != ~tmp___1~20#1 % 256);~tmp___2~8#1 := 1; {1771#false} is VALID [2022-02-20 22:36:52,330 INFO L290 TraceCheckUtils]: 139: Hoare triple {1771#false} assume !(0 != ~tmp___2~8#1); {1771#false} is VALID [2022-02-20 22:36:52,331 INFO L272 TraceCheckUtils]: 140: Hoare triple {1771#false} call #t~ret873#1 := typhoon_wakeup(~tp~13#1.base, ~tp~13#1.offset, 1); {1770#true} is VALID [2022-02-20 22:36:52,331 INFO L290 TraceCheckUtils]: 141: Hoare triple {1770#true} ~tp.base, ~tp.offset := #in~tp.base, #in~tp.offset;~wait_type := #in~wait_type;havoc ~pdev~2.base, ~pdev~2.offset;havoc ~ioaddr~4.base, ~ioaddr~4.offset;havoc ~tmp~62;havoc ~tmp___0~28;call #t~mem769.base, #t~mem769.offset := read~$Pointer$(~tp.base, 72 + ~tp.offset, 8);~pdev~2.base, ~pdev~2.offset := #t~mem769.base, #t~mem769.offset;havoc #t~mem769.base, #t~mem769.offset;call #t~mem770.base, #t~mem770.offset := read~$Pointer$(~tp.base, 40 + ~tp.offset, 8);~ioaddr~4.base, ~ioaddr~4.offset := #t~mem770.base, #t~mem770.offset;havoc #t~mem770.base, #t~mem770.offset; {1770#true} is VALID [2022-02-20 22:36:52,331 INFO L272 TraceCheckUtils]: 142: Hoare triple {1770#true} call #t~ret771 := pci_set_power_state(~pdev~2.base, ~pdev~2.offset, 0); {1770#true} is VALID [2022-02-20 22:36:52,331 INFO L290 TraceCheckUtils]: 143: Hoare triple {1770#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1 := #in~arg1;assume -2147483648 <= #t~nondet1218 && #t~nondet1218 <= 2147483647;#res := #t~nondet1218;havoc #t~nondet1218; {1770#true} is VALID [2022-02-20 22:36:52,331 INFO L290 TraceCheckUtils]: 144: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,331 INFO L284 TraceCheckUtils]: 145: Hoare quadruple {1770#true} {1770#true} #3528#return; {1770#true} is VALID [2022-02-20 22:36:52,332 INFO L290 TraceCheckUtils]: 146: Hoare triple {1770#true} assume -2147483648 <= #t~ret771 && #t~ret771 <= 2147483647;havoc #t~ret771; {1770#true} is VALID [2022-02-20 22:36:52,332 INFO L272 TraceCheckUtils]: 147: Hoare triple {1770#true} call pci_restore_state(~pdev~2.base, ~pdev~2.offset); {1770#true} is VALID [2022-02-20 22:36:52,332 INFO L290 TraceCheckUtils]: 148: Hoare triple {1770#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset; {1770#true} is VALID [2022-02-20 22:36:52,332 INFO L290 TraceCheckUtils]: 149: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,332 INFO L284 TraceCheckUtils]: 150: Hoare quadruple {1770#true} {1770#true} #3530#return; {1770#true} is VALID [2022-02-20 22:36:52,333 INFO L272 TraceCheckUtils]: 151: Hoare triple {1770#true} call iowrite32(250, ~ioaddr~4.base, 48 + ~ioaddr~4.offset); {1770#true} is VALID [2022-02-20 22:36:52,333 INFO L290 TraceCheckUtils]: 152: Hoare triple {1770#true} ~arg0 := #in~arg0;~arg1.base, ~arg1.offset := #in~arg1.base, #in~arg1.offset; {1770#true} is VALID [2022-02-20 22:36:52,333 INFO L290 TraceCheckUtils]: 153: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,333 INFO L284 TraceCheckUtils]: 154: Hoare quadruple {1770#true} {1770#true} #3532#return; {1770#true} is VALID [2022-02-20 22:36:52,333 INFO L272 TraceCheckUtils]: 155: Hoare triple {1770#true} call #t~ret772 := typhoon_wait_status(~ioaddr~4.base, ~ioaddr~4.offset, 13); {1770#true} is VALID [2022-02-20 22:36:52,333 INFO L290 TraceCheckUtils]: 156: Hoare triple {1770#true} ~ioaddr.base, ~ioaddr.offset := #in~ioaddr.base, #in~ioaddr.offset;~wait_value := #in~wait_value;havoc ~i~1;havoc ~err~1;havoc ~tmp~36;~err~1 := 0;~i~1 := 0; {1770#true} is VALID [2022-02-20 22:36:52,334 INFO L290 TraceCheckUtils]: 157: Hoare triple {1770#true} assume !(~i~1 <= 9999);~err~1 := -110; {1770#true} is VALID [2022-02-20 22:36:52,334 INFO L290 TraceCheckUtils]: 158: Hoare triple {1770#true} #res := ~err~1; {1770#true} is VALID [2022-02-20 22:36:52,334 INFO L290 TraceCheckUtils]: 159: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,334 INFO L284 TraceCheckUtils]: 160: Hoare quadruple {1770#true} {1770#true} #3534#return; {1770#true} is VALID [2022-02-20 22:36:52,334 INFO L290 TraceCheckUtils]: 161: Hoare triple {1770#true} assume -2147483648 <= #t~ret772 && #t~ret772 <= 2147483647;~tmp___0~28 := #t~ret772;havoc #t~ret772;#t~short774 := ~tmp___0~28 < 0; {1770#true} is VALID [2022-02-20 22:36:52,335 INFO L290 TraceCheckUtils]: 162: Hoare triple {1770#true} assume #t~short774; {1770#true} is VALID [2022-02-20 22:36:52,335 INFO L290 TraceCheckUtils]: 163: Hoare triple {1770#true} assume !#t~short774;havoc #t~mem773;havoc #t~short774;#res := 0; {1770#true} is VALID [2022-02-20 22:36:52,335 INFO L290 TraceCheckUtils]: 164: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,335 INFO L284 TraceCheckUtils]: 165: Hoare quadruple {1770#true} {1771#false} #4004#return; {1771#false} is VALID [2022-02-20 22:36:52,335 INFO L290 TraceCheckUtils]: 166: Hoare triple {1771#false} assume -2147483648 <= #t~ret873#1 && #t~ret873#1 <= 2147483647;~tmp___3~5#1 := #t~ret873#1;havoc #t~ret873#1; {1771#false} is VALID [2022-02-20 22:36:52,335 INFO L290 TraceCheckUtils]: 167: Hoare triple {1771#false} assume !(~tmp___3~5#1 < 0); {1771#false} is VALID [2022-02-20 22:36:52,336 INFO L272 TraceCheckUtils]: 168: Hoare triple {1771#false} call #t~ret875#1 := typhoon_start_runtime(~tp~13#1.base, ~tp~13#1.offset); {1771#false} is VALID [2022-02-20 22:36:52,336 INFO L290 TraceCheckUtils]: 169: Hoare triple {1771#false} ~tp#1.base, ~tp#1.offset := #in~tp#1.base, #in~tp#1.offset;havoc ~dev~1#1.base, ~dev~1#1.offset;havoc ~ioaddr~5#1.base, ~ioaddr~5#1.offset;call ~#xp_cmd~5#1.base, ~#xp_cmd~5#1.offset := #Ultimate.allocOnStack(16);havoc ~err~9#1;havoc ~tmp~63#1;havoc ~_ptr~6#1.base, ~_ptr~6#1.offset;havoc ~_ptr___0~2#1.base, ~_ptr___0~2#1.offset;havoc ~tmp___0~29#1;havoc ~tmp___1~16#1;havoc ~_ptr___1~0#1.base, ~_ptr___1~0#1.offset;havoc ~_ptr___2~0#1.base, ~_ptr___2~0#1.offset;havoc ~_ptr___3~0#1.base, ~_ptr___3~0#1.offset;havoc ~_ptr___4~0#1.base, ~_ptr___4~0#1.offset;havoc ~_ptr___5~0#1.base, ~_ptr___5~0#1.offset;havoc ~_ptr___6~0#1.base, ~_ptr___6~0#1.offset;havoc ~tmp___2~6#1;call #t~mem776#1.base, #t~mem776#1.offset := read~$Pointer$(~tp#1.base, 80 + ~tp#1.offset, 8);~dev~1#1.base, ~dev~1#1.offset := #t~mem776#1.base, #t~mem776#1.offset;havoc #t~mem776#1.base, #t~mem776#1.offset;call #t~mem777#1.base, #t~mem777#1.offset := read~$Pointer$(~tp#1.base, 40 + ~tp#1.offset, 8);~ioaddr~5#1.base, ~ioaddr~5#1.offset := #t~mem777#1.base, #t~mem777#1.offset;havoc #t~mem777#1.base, #t~mem777#1.offset; {1771#false} is VALID [2022-02-20 22:36:52,336 INFO L272 TraceCheckUtils]: 170: Hoare triple {1771#false} call typhoon_init_rings(~tp#1.base, ~tp#1.offset); {1945#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:36:52,336 INFO L290 TraceCheckUtils]: 171: Hoare triple {1945#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} ~tp.base, ~tp.offset := #in~tp.base, #in~tp.offset;call #t~mem573.base, #t~mem573.offset := read~$Pointer$(~tp.base, 48 + ~tp.offset, 8); {1770#true} is VALID [2022-02-20 22:36:52,338 INFO L272 TraceCheckUtils]: 172: Hoare triple {1770#true} call #t~memset~res574.base, #t~memset~res574.offset := #Ultimate.C_memset(#t~mem573.base, #t~mem573.offset, 0, 44); {1945#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:36:52,338 INFO L290 TraceCheckUtils]: 173: Hoare triple {1945#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr1235 := 0; {1770#true} is VALID [2022-02-20 22:36:52,338 INFO L290 TraceCheckUtils]: 174: Hoare triple {1770#true} assume !(#t~loopctr1235 % 18446744073709551616 < #amount % 18446744073709551616); {1770#true} is VALID [2022-02-20 22:36:52,338 INFO L290 TraceCheckUtils]: 175: Hoare triple {1770#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1770#true} is VALID [2022-02-20 22:36:52,338 INFO L284 TraceCheckUtils]: 176: Hoare quadruple {1770#true} {1770#true} #3626#return; {1770#true} is VALID [2022-02-20 22:36:52,339 INFO L290 TraceCheckUtils]: 177: Hoare triple {1770#true} havoc #t~mem573.base, #t~mem573.offset;havoc #t~memset~res574.base, #t~memset~res574.offset;call write~int(0, ~tp.base, 8 + ~tp.offset, 4);call write~int(0, ~tp.base, 2812 + ~tp.offset, 4);call write~int(0, ~tp.base, 68 + ~tp.offset, 4);call write~int(0, ~tp.base, 268 + ~tp.offset, 4);call write~int(0, ~tp.base, 280 + ~tp.offset, 4);call write~int(0, ~tp.base, 2392 + ~tp.offset, 4);call write~int(0, ~tp.base, 2404 + ~tp.offset, 4);call write~int(0, ~tp.base, 12 + ~tp.offset, 4);call write~int(0, ~tp.base, 2816 + ~tp.offset, 4); {1770#true} is VALID [2022-02-20 22:36:52,339 INFO L290 TraceCheckUtils]: 178: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,339 INFO L284 TraceCheckUtils]: 179: Hoare quadruple {1770#true} {1771#false} #3774#return; {1771#false} is VALID [2022-02-20 22:36:52,339 INFO L272 TraceCheckUtils]: 180: Hoare triple {1771#false} call typhoon_fill_free_ring(~tp#1.base, ~tp#1.offset); {1771#false} is VALID [2022-02-20 22:36:52,339 INFO L290 TraceCheckUtils]: 181: Hoare triple {1771#false} ~tp.base, ~tp.offset := #in~tp.base, #in~tp.offset;havoc ~i~6;havoc ~rxb~3.base, ~rxb~3.offset;havoc ~tmp~58;~i~6 := 0; {1771#false} is VALID [2022-02-20 22:36:52,339 INFO L290 TraceCheckUtils]: 182: Hoare triple {1771#false} assume ~i~6 % 4294967296 <= 126; {1771#false} is VALID [2022-02-20 22:36:52,340 INFO L290 TraceCheckUtils]: 183: Hoare triple {1771#false} ~rxb~3.base, ~rxb~3.offset := ~tp.base, 284 + ~tp.offset + 16 * (if ~i~6 % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~i~6 % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~i~6 % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);call #t~mem720.base, #t~mem720.offset := read~$Pointer$(~rxb~3.base, ~rxb~3.offset, 8); {1771#false} is VALID [2022-02-20 22:36:52,340 INFO L290 TraceCheckUtils]: 184: Hoare triple {1771#false} assume !(0 != (#t~mem720.base + #t~mem720.offset) % 18446744073709551616);havoc #t~mem720.base, #t~mem720.offset; {1771#false} is VALID [2022-02-20 22:36:52,340 INFO L272 TraceCheckUtils]: 185: Hoare triple {1771#false} call #t~ret721 := typhoon_alloc_rx_skb(~tp.base, ~tp.offset, ~i~6); {1771#false} is VALID [2022-02-20 22:36:52,340 INFO L290 TraceCheckUtils]: 186: Hoare triple {1771#false} ~tp.base, ~tp.offset := #in~tp.base, #in~tp.offset;~idx := #in~idx;havoc ~indexes~3.base, ~indexes~3.offset;havoc ~rxb~1.base, ~rxb~1.offset;havoc ~ring~3.base, ~ring~3.offset;havoc ~r~1.base, ~r~1.offset;havoc ~skb~1.base, ~skb~1.offset;havoc ~dma_addr~0;call #t~mem676.base, #t~mem676.offset := read~$Pointer$(~tp.base, 48 + ~tp.offset, 8);~indexes~3.base, ~indexes~3.offset := #t~mem676.base, #t~mem676.offset;havoc #t~mem676.base, #t~mem676.offset;~rxb~1.base, ~rxb~1.offset := ~tp.base, 284 + ~tp.offset + 16 * (if ~idx % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~idx % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~idx % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);~ring~3.base, ~ring~3.offset := ~tp.base, 272 + ~tp.offset;call write~$Pointer$(0, 0, ~rxb~1.base, ~rxb~1.offset, 8);call #t~mem677 := read~int(~ring~3.base, 8 + ~ring~3.offset, 4);call #t~mem678 := read~int(~indexes~3.base, 28 + ~indexes~3.offset, 4); {1771#false} is VALID [2022-02-20 22:36:52,341 INFO L290 TraceCheckUtils]: 187: Hoare triple {1771#false} assume !((if 0 == 16 + #t~mem677 % 4294967296 then 0 else (if 1 == 16 + #t~mem677 % 4294967296 then 1 else ~bitwiseAnd(16 + #t~mem677 % 4294967296, 2047))) % 18446744073709551616 == #t~mem678 % 4294967296 % 18446744073709551616);havoc #t~mem677;havoc #t~mem678;call #t~mem679.base, #t~mem679.offset := read~$Pointer$(~tp.base, 80 + ~tp.offset, 8); {1771#false} is VALID [2022-02-20 22:36:52,341 INFO L272 TraceCheckUtils]: 188: Hoare triple {1771#false} call #t~ret680.base, #t~ret680.offset := netdev_alloc_skb(#t~mem679.base, #t~mem679.offset, 1536); {1771#false} is VALID [2022-02-20 22:36:52,341 INFO L290 TraceCheckUtils]: 189: Hoare triple {1771#false} ~dev#1.base, ~dev#1.offset := #in~dev#1.base, #in~dev#1.offset;~length#1 := #in~length#1;havoc ~tmp~12#1.base, ~tmp~12#1.offset;assume { :begin_inline_ldv___netdev_alloc_skb_57 } true;ldv___netdev_alloc_skb_57_#in~ldv_func_arg1#1.base, ldv___netdev_alloc_skb_57_#in~ldv_func_arg1#1.offset, ldv___netdev_alloc_skb_57_#in~ldv_func_arg2#1, ldv___netdev_alloc_skb_57_#in~flags#1 := ~dev#1.base, ~dev#1.offset, ~length#1, 32;havoc ldv___netdev_alloc_skb_57_#res#1.base, ldv___netdev_alloc_skb_57_#res#1.offset;havoc ldv___netdev_alloc_skb_57_#t~ret1077#1.base, ldv___netdev_alloc_skb_57_#t~ret1077#1.offset, ldv___netdev_alloc_skb_57_~ldv_func_arg1#1.base, ldv___netdev_alloc_skb_57_~ldv_func_arg1#1.offset, ldv___netdev_alloc_skb_57_~ldv_func_arg2#1, ldv___netdev_alloc_skb_57_~flags#1, ldv___netdev_alloc_skb_57_~tmp~90#1.base, ldv___netdev_alloc_skb_57_~tmp~90#1.offset;ldv___netdev_alloc_skb_57_~ldv_func_arg1#1.base, ldv___netdev_alloc_skb_57_~ldv_func_arg1#1.offset := ldv___netdev_alloc_skb_57_#in~ldv_func_arg1#1.base, ldv___netdev_alloc_skb_57_#in~ldv_func_arg1#1.offset;ldv___netdev_alloc_skb_57_~ldv_func_arg2#1 := ldv___netdev_alloc_skb_57_#in~ldv_func_arg2#1;ldv___netdev_alloc_skb_57_~flags#1 := ldv___netdev_alloc_skb_57_#in~flags#1;havoc ldv___netdev_alloc_skb_57_~tmp~90#1.base, ldv___netdev_alloc_skb_57_~tmp~90#1.offset; {1771#false} is VALID [2022-02-20 22:36:52,341 INFO L272 TraceCheckUtils]: 190: Hoare triple {1771#false} call ldv_check_alloc_flags(ldv___netdev_alloc_skb_57_~flags#1); {1771#false} is VALID [2022-02-20 22:36:52,341 INFO L290 TraceCheckUtils]: 191: Hoare triple {1771#false} ~flags#1 := #in~flags#1;havoc ~tmp~98#1; {1771#false} is VALID [2022-02-20 22:36:52,342 INFO L290 TraceCheckUtils]: 192: Hoare triple {1771#false} assume 32 != ~flags#1 % 4294967296 && 0 != ~flags#1 % 4294967296; {1771#false} is VALID [2022-02-20 22:36:52,342 INFO L272 TraceCheckUtils]: 193: Hoare triple {1771#false} call #t~ret1090#1 := ldv_exclusive_spin_is_locked(); {1770#true} is VALID [2022-02-20 22:36:52,342 INFO L290 TraceCheckUtils]: 194: Hoare triple {1770#true} assume 2 == ~ldv_spin__xmit_lock_of_netdev_queue~0;#res := 1; {1770#true} is VALID [2022-02-20 22:36:52,342 INFO L290 TraceCheckUtils]: 195: Hoare triple {1770#true} assume true; {1770#true} is VALID [2022-02-20 22:36:52,342 INFO L284 TraceCheckUtils]: 196: Hoare quadruple {1770#true} {1771#false} #3514#return; {1771#false} is VALID [2022-02-20 22:36:52,343 INFO L290 TraceCheckUtils]: 197: Hoare triple {1771#false} assume -2147483648 <= #t~ret1090#1 && #t~ret1090#1 <= 2147483647;~tmp~98#1 := #t~ret1090#1;havoc #t~ret1090#1;assume { :begin_inline_ldv_assert_linux_alloc_spinlock__wrong_flags } true;ldv_assert_linux_alloc_spinlock__wrong_flags_#in~expr#1 := (if 0 == ~tmp~98#1 then 1 else 0);havoc ldv_assert_linux_alloc_spinlock__wrong_flags_~expr#1;ldv_assert_linux_alloc_spinlock__wrong_flags_~expr#1 := ldv_assert_linux_alloc_spinlock__wrong_flags_#in~expr#1; {1771#false} is VALID [2022-02-20 22:36:52,343 INFO L290 TraceCheckUtils]: 198: Hoare triple {1771#false} assume 0 == ldv_assert_linux_alloc_spinlock__wrong_flags_~expr#1; {1771#false} is VALID [2022-02-20 22:36:52,343 INFO L290 TraceCheckUtils]: 199: Hoare triple {1771#false} assume !false; {1771#false} is VALID [2022-02-20 22:36:52,344 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 276 trivial. 0 not checked. [2022-02-20 22:36:52,344 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:36:52,345 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1559669489] [2022-02-20 22:36:52,345 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1559669489] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:36:52,345 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 22:36:52,346 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-02-20 22:36:52,347 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1734626457] [2022-02-20 22:36:52,348 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:36:52,352 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 18.4) internal successors, (92), 3 states have internal predecessors, (92), 3 states have call successors, (28), 4 states have call predecessors, (28), 1 states have return successors, (22), 3 states have call predecessors, (22), 3 states have call successors, (22) Word has length 200 [2022-02-20 22:36:52,355 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:36:52,358 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 18.4) internal successors, (92), 3 states have internal predecessors, (92), 3 states have call successors, (28), 4 states have call predecessors, (28), 1 states have return successors, (22), 3 states have call predecessors, (22), 3 states have call successors, (22) [2022-02-20 22:36:52,515 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 142 edges. 142 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:36:52,515 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-02-20 22:36:52,516 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:36:52,537 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-02-20 22:36:52,538 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-02-20 22:36:52,552 INFO L87 Difference]: Start difference. First operand has 1767 states, 1201 states have (on average 1.2905911740216487) internal successors, (1550), 1223 states have internal predecessors, (1550), 472 states have call successors, (472), 94 states have call predecessors, (472), 93 states have return successors, (467), 461 states have call predecessors, (467), 467 states have call successors, (467) Second operand has 5 states, 5 states have (on average 18.4) internal successors, (92), 3 states have internal predecessors, (92), 3 states have call successors, (28), 4 states have call predecessors, (28), 1 states have return successors, (22), 3 states have call predecessors, (22), 3 states have call successors, (22) [2022-02-20 22:37:02,673 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-02-20 22:37:04,776 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-02-20 22:37:16,369 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=true, quantifiers [] [2022-02-20 22:37:37,961 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers []