./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/ldv-linux-3.14/linux-3.14_complex_emg_linux-alloc-spinlock_drivers-net-ethernet-alteon-acenic.cil.i --full-output -ea --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 03d7b7b3 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -ea -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/ldv-linux-3.14/linux-3.14_complex_emg_linux-alloc-spinlock_drivers-net-ethernet-alteon-acenic.cil.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash c26285c798d9eae93470e6619d316c691c81cc1a0579ebf111c5d2cbbd8c7126 --- Real Ultimate output --- This is Ultimate 0.2.2-dev-03d7b7b [2022-02-20 22:36:36,718 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-02-20 22:36:36,720 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-02-20 22:36:36,751 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-02-20 22:36:36,751 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-02-20 22:36:36,754 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-02-20 22:36:36,755 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-02-20 22:36:36,757 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-02-20 22:36:36,758 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-02-20 22:36:36,762 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-02-20 22:36:36,762 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-02-20 22:36:36,763 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-02-20 22:36:36,763 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-02-20 22:36:36,765 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-02-20 22:36:36,766 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-02-20 22:36:36,767 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-02-20 22:36:36,768 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-02-20 22:36:36,768 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-02-20 22:36:36,771 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-02-20 22:36:36,775 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-02-20 22:36:36,776 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-02-20 22:36:36,777 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-02-20 22:36:36,778 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-02-20 22:36:36,779 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-02-20 22:36:36,783 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-02-20 22:36:36,783 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-02-20 22:36:36,784 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-02-20 22:36:36,785 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-02-20 22:36:36,785 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-02-20 22:36:36,786 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-02-20 22:36:36,786 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-02-20 22:36:36,786 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-02-20 22:36:36,787 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-02-20 22:36:36,788 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-02-20 22:36:36,789 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-02-20 22:36:36,789 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-02-20 22:36:36,790 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-02-20 22:36:36,790 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-02-20 22:36:36,790 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-02-20 22:36:36,791 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-02-20 22:36:36,791 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-02-20 22:36:36,792 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2022-02-20 22:36:36,817 INFO L113 SettingsManager]: Loading preferences was successful [2022-02-20 22:36:36,817 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-02-20 22:36:36,818 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-02-20 22:36:36,818 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-02-20 22:36:36,818 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-02-20 22:36:36,819 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-02-20 22:36:36,819 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-02-20 22:36:36,819 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-02-20 22:36:36,819 INFO L138 SettingsManager]: * Use SBE=true [2022-02-20 22:36:36,819 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-02-20 22:36:36,820 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-02-20 22:36:36,820 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-02-20 22:36:36,820 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-02-20 22:36:36,820 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-02-20 22:36:36,821 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-02-20 22:36:36,821 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-02-20 22:36:36,821 INFO L138 SettingsManager]: * Use constant arrays=true [2022-02-20 22:36:36,821 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-02-20 22:36:36,821 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-02-20 22:36:36,821 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-02-20 22:36:36,821 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-02-20 22:36:36,821 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-02-20 22:36:36,822 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-02-20 22:36:36,822 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-02-20 22:36:36,822 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-02-20 22:36:36,822 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-02-20 22:36:36,822 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-02-20 22:36:36,823 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2022-02-20 22:36:36,823 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2022-02-20 22:36:36,823 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-02-20 22:36:36,824 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> c26285c798d9eae93470e6619d316c691c81cc1a0579ebf111c5d2cbbd8c7126 [2022-02-20 22:36:37,001 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-02-20 22:36:37,028 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-02-20 22:36:37,030 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-02-20 22:36:37,031 INFO L271 PluginConnector]: Initializing CDTParser... [2022-02-20 22:36:37,032 INFO L275 PluginConnector]: CDTParser initialized [2022-02-20 22:36:37,033 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/ldv-linux-3.14/linux-3.14_complex_emg_linux-alloc-spinlock_drivers-net-ethernet-alteon-acenic.cil.i [2022-02-20 22:36:37,107 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/b89dd8fe5/549068ce04df4443a490beaba41b3289/FLAG2c09b1599 [2022-02-20 22:36:37,786 INFO L306 CDTParser]: Found 1 translation units. [2022-02-20 22:36:37,787 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.14/linux-3.14_complex_emg_linux-alloc-spinlock_drivers-net-ethernet-alteon-acenic.cil.i [2022-02-20 22:36:37,833 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/b89dd8fe5/549068ce04df4443a490beaba41b3289/FLAG2c09b1599 [2022-02-20 22:36:37,878 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/b89dd8fe5/549068ce04df4443a490beaba41b3289 [2022-02-20 22:36:37,880 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-02-20 22:36:37,882 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-02-20 22:36:37,884 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-02-20 22:36:37,884 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-02-20 22:36:37,886 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-02-20 22:36:37,887 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.02 10:36:37" (1/1) ... [2022-02-20 22:36:37,888 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@60eba6cd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:36:37, skipping insertion in model container [2022-02-20 22:36:37,888 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.02 10:36:37" (1/1) ... [2022-02-20 22:36:37,893 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-02-20 22:36:38,000 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-02-20 22:36:40,432 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.14/linux-3.14_complex_emg_linux-alloc-spinlock_drivers-net-ethernet-alteon-acenic.cil.i[373388,373401] [2022-02-20 22:36:40,435 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.14/linux-3.14_complex_emg_linux-alloc-spinlock_drivers-net-ethernet-alteon-acenic.cil.i[373533,373546] [2022-02-20 22:36:40,453 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-20 22:36:40,503 INFO L203 MainTranslator]: Completed pre-run [2022-02-20 22:36:40,812 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.14/linux-3.14_complex_emg_linux-alloc-spinlock_drivers-net-ethernet-alteon-acenic.cil.i[373388,373401] [2022-02-20 22:36:40,813 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.14/linux-3.14_complex_emg_linux-alloc-spinlock_drivers-net-ethernet-alteon-acenic.cil.i[373533,373546] [2022-02-20 22:36:40,817 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-20 22:36:40,922 INFO L208 MainTranslator]: Completed translation [2022-02-20 22:36:40,923 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:36:40 WrapperNode [2022-02-20 22:36:40,923 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-02-20 22:36:40,924 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-02-20 22:36:40,924 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-02-20 22:36:40,924 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-02-20 22:36:40,929 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:36:40" (1/1) ... [2022-02-20 22:36:41,009 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:36:40" (1/1) ... [2022-02-20 22:36:41,217 INFO L137 Inliner]: procedures = 424, calls = 2434, calls flagged for inlining = 186, calls inlined = 170, statements flattened = 6192 [2022-02-20 22:36:41,218 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-02-20 22:36:41,219 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-02-20 22:36:41,219 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-02-20 22:36:41,219 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-02-20 22:36:41,225 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:36:40" (1/1) ... [2022-02-20 22:36:41,225 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:36:40" (1/1) ... [2022-02-20 22:36:41,275 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:36:40" (1/1) ... [2022-02-20 22:36:41,276 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:36:40" (1/1) ... [2022-02-20 22:36:41,402 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:36:40" (1/1) ... [2022-02-20 22:36:41,427 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:36:40" (1/1) ... [2022-02-20 22:36:41,454 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:36:40" (1/1) ... [2022-02-20 22:36:41,489 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-02-20 22:36:41,491 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-02-20 22:36:41,491 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-02-20 22:36:41,491 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-02-20 22:36:41,492 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:36:40" (1/1) ... [2022-02-20 22:36:41,497 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-02-20 22:36:41,504 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-20 22:36:41,514 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-02-20 22:36:41,570 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-02-20 22:36:41,611 INFO L130 BoogieDeclarations]: Found specification of procedure atomic_set [2022-02-20 22:36:41,611 INFO L138 BoogieDeclarations]: Found implementation of procedure atomic_set [2022-02-20 22:36:41,611 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.meminit [2022-02-20 22:36:41,611 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.meminit [2022-02-20 22:36:41,611 INFO L130 BoogieDeclarations]: Found specification of procedure pci_unmap_page [2022-02-20 22:36:41,611 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_unmap_page [2022-02-20 22:36:41,612 INFO L130 BoogieDeclarations]: Found specification of procedure netif_wake_queue [2022-02-20 22:36:41,612 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_wake_queue [2022-02-20 22:36:41,612 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2022-02-20 22:36:41,612 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2022-02-20 22:36:41,612 INFO L130 BoogieDeclarations]: Found specification of procedure arch_local_irq_restore [2022-02-20 22:36:41,612 INFO L138 BoogieDeclarations]: Found implementation of procedure arch_local_irq_restore [2022-02-20 22:36:41,612 INFO L130 BoogieDeclarations]: Found specification of procedure dma_map_page [2022-02-20 22:36:41,612 INFO L138 BoogieDeclarations]: Found implementation of procedure dma_map_page [2022-02-20 22:36:41,612 INFO L130 BoogieDeclarations]: Found specification of procedure valid_dma_direction [2022-02-20 22:36:41,612 INFO L138 BoogieDeclarations]: Found implementation of procedure valid_dma_direction [2022-02-20 22:36:41,612 INFO L130 BoogieDeclarations]: Found specification of procedure eeprom_start [2022-02-20 22:36:41,612 INFO L138 BoogieDeclarations]: Found implementation of procedure eeprom_start [2022-02-20 22:36:41,612 INFO L130 BoogieDeclarations]: Found specification of procedure clear_bit [2022-02-20 22:36:41,612 INFO L138 BoogieDeclarations]: Found implementation of procedure clear_bit [2022-02-20 22:36:41,612 INFO L130 BoogieDeclarations]: Found specification of procedure pci_name [2022-02-20 22:36:41,612 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_name [2022-02-20 22:36:41,612 INFO L130 BoogieDeclarations]: Found specification of procedure ace_load_jumbo_rx_ring [2022-02-20 22:36:41,612 INFO L138 BoogieDeclarations]: Found implementation of procedure ace_load_jumbo_rx_ring [2022-02-20 22:36:41,613 INFO L130 BoogieDeclarations]: Found specification of procedure ace_load_std_rx_ring [2022-02-20 22:36:41,613 INFO L138 BoogieDeclarations]: Found implementation of procedure ace_load_std_rx_ring [2022-02-20 22:36:41,613 INFO L130 BoogieDeclarations]: Found specification of procedure pci_map_page [2022-02-20 22:36:41,613 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_map_page [2022-02-20 22:36:41,613 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_xmalloc [2022-02-20 22:36:41,613 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_xmalloc [2022-02-20 22:36:41,613 INFO L130 BoogieDeclarations]: Found specification of procedure strlcpy [2022-02-20 22:36:41,613 INFO L138 BoogieDeclarations]: Found implementation of procedure strlcpy [2022-02-20 22:36:41,613 INFO L130 BoogieDeclarations]: Found specification of procedure skb_end_pointer [2022-02-20 22:36:41,613 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_end_pointer [2022-02-20 22:36:41,613 INFO L130 BoogieDeclarations]: Found specification of procedure eth_validate_addr [2022-02-20 22:36:41,613 INFO L138 BoogieDeclarations]: Found implementation of procedure eth_validate_addr [2022-02-20 22:36:41,613 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_is_err [2022-02-20 22:36:41,613 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_is_err [2022-02-20 22:36:41,613 INFO L130 BoogieDeclarations]: Found specification of procedure arch_irqs_disabled_flags [2022-02-20 22:36:41,613 INFO L138 BoogieDeclarations]: Found implementation of procedure arch_irqs_disabled_flags [2022-02-20 22:36:41,613 INFO L130 BoogieDeclarations]: Found specification of procedure ace_set_multicast_list [2022-02-20 22:36:41,613 INFO L138 BoogieDeclarations]: Found implementation of procedure ace_set_multicast_list [2022-02-20 22:36:41,613 INFO L130 BoogieDeclarations]: Found specification of procedure ace_set_txprd [2022-02-20 22:36:41,614 INFO L138 BoogieDeclarations]: Found implementation of procedure ace_set_txprd [2022-02-20 22:36:41,614 INFO L130 BoogieDeclarations]: Found specification of procedure eeprom_check_ack [2022-02-20 22:36:41,614 INFO L138 BoogieDeclarations]: Found implementation of procedure eeprom_check_ack [2022-02-20 22:36:41,614 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-02-20 22:36:41,614 INFO L130 BoogieDeclarations]: Found specification of procedure atomic_add [2022-02-20 22:36:41,614 INFO L138 BoogieDeclarations]: Found implementation of procedure atomic_add [2022-02-20 22:36:41,614 INFO L130 BoogieDeclarations]: Found specification of procedure pci_write_config_word [2022-02-20 22:36:41,614 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_write_config_word [2022-02-20 22:36:41,614 INFO L130 BoogieDeclarations]: Found specification of procedure ace_set_rxtx_parms [2022-02-20 22:36:41,614 INFO L138 BoogieDeclarations]: Found implementation of procedure ace_set_rxtx_parms [2022-02-20 22:36:41,614 INFO L130 BoogieDeclarations]: Found specification of procedure netdev_get_tx_queue [2022-02-20 22:36:41,614 INFO L138 BoogieDeclarations]: Found implementation of procedure netdev_get_tx_queue [2022-02-20 22:36:41,614 INFO L130 BoogieDeclarations]: Found specification of procedure read_eeprom_byte [2022-02-20 22:36:41,614 INFO L138 BoogieDeclarations]: Found implementation of procedure read_eeprom_byte [2022-02-20 22:36:41,614 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~int [2022-02-20 22:36:41,614 INFO L130 BoogieDeclarations]: Found specification of procedure get_dma_ops [2022-02-20 22:36:41,614 INFO L138 BoogieDeclarations]: Found implementation of procedure get_dma_ops [2022-02-20 22:36:41,614 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2022-02-20 22:36:41,615 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_assume [2022-02-20 22:36:41,615 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_assume [2022-02-20 22:36:41,615 INFO L130 BoogieDeclarations]: Found specification of procedure tx_space [2022-02-20 22:36:41,615 INFO L138 BoogieDeclarations]: Found implementation of procedure tx_space [2022-02-20 22:36:41,615 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-02-20 22:36:41,615 INFO L130 BoogieDeclarations]: Found specification of procedure __phys_addr [2022-02-20 22:36:41,615 INFO L138 BoogieDeclarations]: Found implementation of procedure __phys_addr [2022-02-20 22:36:41,615 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_after_alloc [2022-02-20 22:36:41,615 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_after_alloc [2022-02-20 22:36:41,615 INFO L130 BoogieDeclarations]: Found specification of procedure set_aceaddr [2022-02-20 22:36:41,615 INFO L138 BoogieDeclarations]: Found implementation of procedure set_aceaddr [2022-02-20 22:36:41,615 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_set_drvdata [2022-02-20 22:36:41,615 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_set_drvdata [2022-02-20 22:36:41,615 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_filter_err_code [2022-02-20 22:36:41,615 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_filter_err_code [2022-02-20 22:36:41,615 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_alloc_flags [2022-02-20 22:36:41,615 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_check_alloc_flags [2022-02-20 22:36:41,615 INFO L130 BoogieDeclarations]: Found specification of procedure pci_set_dma_mask [2022-02-20 22:36:41,615 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_set_dma_mask [2022-02-20 22:36:41,616 INFO L130 BoogieDeclarations]: Found specification of procedure pci_free_consistent [2022-02-20 22:36:41,616 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_free_consistent [2022-02-20 22:36:41,616 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-02-20 22:36:41,616 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_switch_1 [2022-02-20 22:36:41,616 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_switch_1 [2022-02-20 22:36:41,616 INFO L130 BoogieDeclarations]: Found specification of procedure arch_local_irq_save [2022-02-20 22:36:41,616 INFO L138 BoogieDeclarations]: Found implementation of procedure arch_local_irq_save [2022-02-20 22:36:41,616 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_switch_0 [2022-02-20 22:36:41,616 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_switch_0 [2022-02-20 22:36:41,616 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-02-20 22:36:41,616 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_undef_int [2022-02-20 22:36:41,616 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_undef_int [2022-02-20 22:36:41,616 INFO L130 BoogieDeclarations]: Found specification of procedure __const_udelay [2022-02-20 22:36:41,616 INFO L138 BoogieDeclarations]: Found implementation of procedure __const_udelay [2022-02-20 22:36:41,616 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-02-20 22:36:41,616 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2022-02-20 22:36:41,616 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2022-02-20 22:36:41,616 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~int [2022-02-20 22:36:41,616 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~int [2022-02-20 22:36:41,617 INFO L130 BoogieDeclarations]: Found specification of procedure eeprom_prep [2022-02-20 22:36:41,617 INFO L138 BoogieDeclarations]: Found implementation of procedure eeprom_prep [2022-02-20 22:36:41,617 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_exclusive_spin_is_locked [2022-02-20 22:36:41,617 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_exclusive_spin_is_locked [2022-02-20 22:36:41,617 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_assert [2022-02-20 22:36:41,617 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_assert [2022-02-20 22:36:41,617 INFO L130 BoogieDeclarations]: Found specification of procedure ace_issue_cmd [2022-02-20 22:36:41,617 INFO L138 BoogieDeclarations]: Found implementation of procedure ace_issue_cmd [2022-02-20 22:36:41,617 INFO L130 BoogieDeclarations]: Found specification of procedure warn_slowpath_null [2022-02-20 22:36:41,617 INFO L138 BoogieDeclarations]: Found implementation of procedure warn_slowpath_null [2022-02-20 22:36:41,617 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_free_netdev [2022-02-20 22:36:41,617 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_free_netdev [2022-02-20 22:36:41,617 INFO L130 BoogieDeclarations]: Found specification of procedure skb_frag_size [2022-02-20 22:36:41,617 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_frag_size [2022-02-20 22:36:41,617 INFO L130 BoogieDeclarations]: Found specification of procedure writel [2022-02-20 22:36:41,617 INFO L138 BoogieDeclarations]: Found implementation of procedure writel [2022-02-20 22:36:41,617 INFO L130 BoogieDeclarations]: Found specification of procedure arch_local_save_flags [2022-02-20 22:36:41,618 INFO L138 BoogieDeclarations]: Found implementation of procedure arch_local_save_flags [2022-02-20 22:36:41,618 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-02-20 22:36:41,618 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-02-20 22:36:41,618 INFO L130 BoogieDeclarations]: Found specification of procedure __fswab32 [2022-02-20 22:36:41,618 INFO L138 BoogieDeclarations]: Found implementation of procedure __fswab32 [2022-02-20 22:36:41,618 INFO L130 BoogieDeclarations]: Found specification of procedure ace_load_mini_rx_ring [2022-02-20 22:36:41,618 INFO L138 BoogieDeclarations]: Found implementation of procedure ace_load_mini_rx_ring [2022-02-20 22:36:41,618 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2022-02-20 22:36:41,618 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2022-02-20 22:36:41,618 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_stop [2022-02-20 22:36:41,618 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_stop [2022-02-20 22:36:41,618 INFO L130 BoogieDeclarations]: Found specification of procedure pci_read_config_byte [2022-02-20 22:36:41,618 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_read_config_byte [2022-02-20 22:36:41,618 INFO L130 BoogieDeclarations]: Found specification of procedure trace_hardirqs_on [2022-02-20 22:36:41,618 INFO L138 BoogieDeclarations]: Found implementation of procedure trace_hardirqs_on [2022-02-20 22:36:41,618 INFO L130 BoogieDeclarations]: Found specification of procedure ethtool_cmd_speed_set [2022-02-20 22:36:41,618 INFO L138 BoogieDeclarations]: Found implementation of procedure ethtool_cmd_speed_set [2022-02-20 22:36:41,618 INFO L130 BoogieDeclarations]: Found specification of procedure atomic_sub [2022-02-20 22:36:41,618 INFO L138 BoogieDeclarations]: Found implementation of procedure atomic_sub [2022-02-20 22:36:41,618 INFO L130 BoogieDeclarations]: Found specification of procedure atomic_read [2022-02-20 22:36:41,618 INFO L138 BoogieDeclarations]: Found implementation of procedure atomic_read [2022-02-20 22:36:41,619 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2022-02-20 22:36:41,619 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2022-02-20 22:36:41,619 INFO L130 BoogieDeclarations]: Found specification of procedure netif_stop_queue [2022-02-20 22:36:41,619 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_stop_queue [2022-02-20 22:36:41,619 INFO L130 BoogieDeclarations]: Found specification of procedure netdev_alloc_skb_ip_align [2022-02-20 22:36:41,619 INFO L138 BoogieDeclarations]: Found implementation of procedure netdev_alloc_skb_ip_align [2022-02-20 22:36:41,619 INFO L130 BoogieDeclarations]: Found specification of procedure pci_alloc_consistent [2022-02-20 22:36:41,619 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_alloc_consistent [2022-02-20 22:36:41,619 INFO L130 BoogieDeclarations]: Found specification of procedure acenic_remove_one [2022-02-20 22:36:41,619 INFO L138 BoogieDeclarations]: Found implementation of procedure acenic_remove_one [2022-02-20 22:36:41,621 INFO L130 BoogieDeclarations]: Found specification of procedure consume_skb [2022-02-20 22:36:41,621 INFO L138 BoogieDeclarations]: Found implementation of procedure consume_skb [2022-02-20 22:36:41,621 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-02-20 22:36:41,621 INFO L130 BoogieDeclarations]: Found specification of procedure ace_init_cleanup [2022-02-20 22:36:41,621 INFO L138 BoogieDeclarations]: Found implementation of procedure ace_init_cleanup [2022-02-20 22:36:41,621 INFO L130 BoogieDeclarations]: Found specification of procedure trace_hardirqs_off [2022-02-20 22:36:41,621 INFO L138 BoogieDeclarations]: Found implementation of procedure trace_hardirqs_off [2022-02-20 22:36:41,621 INFO L130 BoogieDeclarations]: Found specification of procedure netif_running [2022-02-20 22:36:41,621 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_running [2022-02-20 22:36:41,621 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-02-20 22:36:41,621 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2022-02-20 22:36:41,621 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~~structbegin~int~structend~~TO~int [2022-02-20 22:36:41,621 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~~structbegin~int~structend~~TO~int [2022-02-20 22:36:41,621 INFO L130 BoogieDeclarations]: Found specification of procedure pci_write_config_byte [2022-02-20 22:36:41,621 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_write_config_byte [2022-02-20 22:36:41,621 INFO L130 BoogieDeclarations]: Found specification of procedure netdev_priv [2022-02-20 22:36:41,621 INFO L138 BoogieDeclarations]: Found implementation of procedure netdev_priv [2022-02-20 22:36:41,621 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_filter_positive_int [2022-02-20 22:36:41,621 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_filter_positive_int [2022-02-20 22:36:41,621 INFO L130 BoogieDeclarations]: Found specification of procedure netif_tx_start_queue [2022-02-20 22:36:41,622 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_tx_start_queue [2022-02-20 22:36:41,622 INFO L130 BoogieDeclarations]: Found specification of procedure free_netdev [2022-02-20 22:36:41,622 INFO L138 BoogieDeclarations]: Found implementation of procedure free_netdev [2022-02-20 22:36:41,622 INFO L130 BoogieDeclarations]: Found specification of procedure synchronize_irq [2022-02-20 22:36:41,622 INFO L138 BoogieDeclarations]: Found implementation of procedure synchronize_irq [2022-02-20 22:36:41,622 INFO L130 BoogieDeclarations]: Found specification of procedure constant_test_bit [2022-02-20 22:36:41,622 INFO L138 BoogieDeclarations]: Found implementation of procedure constant_test_bit [2022-02-20 22:36:41,622 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2022-02-20 22:36:41,622 INFO L138 BoogieDeclarations]: Found implementation of procedure kfree [2022-02-20 22:36:41,622 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-02-20 22:36:41,622 INFO L130 BoogieDeclarations]: Found specification of procedure ldv__builtin_expect [2022-02-20 22:36:41,622 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv__builtin_expect [2022-02-20 22:36:41,622 INFO L130 BoogieDeclarations]: Found specification of procedure test_and_set_bit [2022-02-20 22:36:41,622 INFO L138 BoogieDeclarations]: Found implementation of procedure test_and_set_bit [2022-02-20 22:36:41,622 INFO L130 BoogieDeclarations]: Found specification of procedure ace_open [2022-02-20 22:36:41,622 INFO L138 BoogieDeclarations]: Found implementation of procedure ace_open [2022-02-20 22:36:41,623 INFO L130 BoogieDeclarations]: Found specification of procedure ace_close [2022-02-20 22:36:41,623 INFO L138 BoogieDeclarations]: Found implementation of procedure ace_close [2022-02-20 22:36:41,623 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_free [2022-02-20 22:36:41,623 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_free [2022-02-20 22:36:41,623 INFO L130 BoogieDeclarations]: Found specification of procedure prefetchw [2022-02-20 22:36:41,623 INFO L138 BoogieDeclarations]: Found implementation of procedure prefetchw [2022-02-20 22:36:41,623 INFO L130 BoogieDeclarations]: Found specification of procedure ace_map_tx_skb [2022-02-20 22:36:41,623 INFO L138 BoogieDeclarations]: Found implementation of procedure ace_map_tx_skb [2022-02-20 22:36:41,623 INFO L130 BoogieDeclarations]: Found specification of procedure ace_load_tx_bd [2022-02-20 22:36:41,623 INFO L138 BoogieDeclarations]: Found implementation of procedure ace_load_tx_bd [2022-02-20 22:36:41,624 INFO L130 BoogieDeclarations]: Found specification of procedure ethtool_cmd_speed [2022-02-20 22:36:41,624 INFO L138 BoogieDeclarations]: Found implementation of procedure ethtool_cmd_speed [2022-02-20 22:36:41,624 INFO L130 BoogieDeclarations]: Found specification of procedure ace_watchdog [2022-02-20 22:36:41,624 INFO L138 BoogieDeclarations]: Found implementation of procedure ace_watchdog [2022-02-20 22:36:41,624 INFO L130 BoogieDeclarations]: Found specification of procedure readl [2022-02-20 22:36:41,624 INFO L138 BoogieDeclarations]: Found implementation of procedure readl [2022-02-20 22:36:41,624 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-02-20 22:36:41,624 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_final_state [2022-02-20 22:36:41,624 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_check_final_state [2022-02-20 22:36:41,624 INFO L130 BoogieDeclarations]: Found specification of procedure cpu_relax [2022-02-20 22:36:41,624 INFO L138 BoogieDeclarations]: Found implementation of procedure cpu_relax [2022-02-20 22:36:42,299 INFO L234 CfgBuilder]: Building ICFG [2022-02-20 22:36:42,301 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-02-20 22:36:42,442 INFO L766 $ProcedureCfgBuilder]: dead code at ProgramPoint ldv_stopFINAL: assume true; [2022-02-20 22:36:46,030 INFO L766 $ProcedureCfgBuilder]: dead code at ProgramPoint ULTIMATE.startFINAL: assume true; [2022-02-20 22:36:46,089 INFO L275 CfgBuilder]: Performing block encoding [2022-02-20 22:36:46,104 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-02-20 22:36:46,104 INFO L299 CfgBuilder]: Removed 1 assume(true) statements. [2022-02-20 22:36:46,107 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 10:36:46 BoogieIcfgContainer [2022-02-20 22:36:46,107 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-02-20 22:36:46,108 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-02-20 22:36:46,108 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-02-20 22:36:46,110 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-02-20 22:36:46,111 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 20.02 10:36:37" (1/3) ... [2022-02-20 22:36:46,111 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1988c084 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.02 10:36:46, skipping insertion in model container [2022-02-20 22:36:46,111 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:36:40" (2/3) ... [2022-02-20 22:36:46,111 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1988c084 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.02 10:36:46, skipping insertion in model container [2022-02-20 22:36:46,112 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 10:36:46" (3/3) ... [2022-02-20 22:36:46,112 INFO L111 eAbstractionObserver]: Analyzing ICFG linux-3.14_complex_emg_linux-alloc-spinlock_drivers-net-ethernet-alteon-acenic.cil.i [2022-02-20 22:36:46,116 INFO L205 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-02-20 22:36:46,116 INFO L164 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-02-20 22:36:46,152 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-02-20 22:36:46,156 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2022-02-20 22:36:46,157 INFO L340 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-02-20 22:36:46,208 INFO L276 IsEmpty]: Start isEmpty. Operand has 2307 states, 1613 states have (on average 1.4153750774953502) internal successors, (2283), 1675 states have internal predecessors, (2283), 600 states have call successors, (600), 94 states have call predecessors, (600), 93 states have return successors, (595), 580 states have call predecessors, (595), 595 states have call successors, (595) [2022-02-20 22:36:46,227 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2022-02-20 22:36:46,228 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:36:46,228 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 6, 6, 6, 6, 6, 6, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:36:46,229 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ldv_check_alloc_flagsErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_check_alloc_flagsErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:36:46,232 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:36:46,233 INFO L85 PathProgramCache]: Analyzing trace with hash 1437914872, now seen corresponding path program 1 times [2022-02-20 22:36:46,239 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:36:46,240 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [641413833] [2022-02-20 22:36:46,240 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:36:46,240 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:36:46,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:46,721 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-02-20 22:36:46,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:46,731 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:36:46,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:46,743 INFO L290 TraceCheckUtils]: 0: Hoare triple {2310#true} havoc ~tmp~106;assume -2147483648 <= #t~nondet1164 && #t~nondet1164 <= 2147483647;~tmp~106 := #t~nondet1164;havoc #t~nondet1164;#res := ~tmp~106; {2310#true} is VALID [2022-02-20 22:36:46,744 INFO L290 TraceCheckUtils]: 1: Hoare triple {2310#true} assume true; {2310#true} is VALID [2022-02-20 22:36:46,744 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2310#true} {2310#true} #5505#return; {2310#true} is VALID [2022-02-20 22:36:46,745 INFO L290 TraceCheckUtils]: 0: Hoare triple {2385#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~2.base, ~res~2.offset;havoc ~tmp~101.base, ~tmp~101.offset;havoc ~tmp___0~42;havoc ~tmp___1~18; {2310#true} is VALID [2022-02-20 22:36:46,745 INFO L272 TraceCheckUtils]: 1: Hoare triple {2310#true} call #t~ret1153 := ldv_undef_int(); {2310#true} is VALID [2022-02-20 22:36:46,745 INFO L290 TraceCheckUtils]: 2: Hoare triple {2310#true} havoc ~tmp~106;assume -2147483648 <= #t~nondet1164 && #t~nondet1164 <= 2147483647;~tmp~106 := #t~nondet1164;havoc #t~nondet1164;#res := ~tmp~106; {2310#true} is VALID [2022-02-20 22:36:46,745 INFO L290 TraceCheckUtils]: 3: Hoare triple {2310#true} assume true; {2310#true} is VALID [2022-02-20 22:36:46,746 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {2310#true} {2310#true} #5505#return; {2310#true} is VALID [2022-02-20 22:36:46,746 INFO L290 TraceCheckUtils]: 5: Hoare triple {2310#true} assume -2147483648 <= #t~ret1153 && #t~ret1153 <= 2147483647;~tmp___1~18 := #t~ret1153;havoc #t~ret1153; {2310#true} is VALID [2022-02-20 22:36:46,746 INFO L290 TraceCheckUtils]: 6: Hoare triple {2310#true} assume !(0 != ~tmp___1~18);#res.base, #res.offset := 0, 0; {2310#true} is VALID [2022-02-20 22:36:46,746 INFO L290 TraceCheckUtils]: 7: Hoare triple {2310#true} assume true; {2310#true} is VALID [2022-02-20 22:36:46,746 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {2310#true} {2310#true} #6075#return; {2310#true} is VALID [2022-02-20 22:36:46,747 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2022-02-20 22:36:46,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:46,763 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:36:46,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:46,770 INFO L290 TraceCheckUtils]: 0: Hoare triple {2310#true} havoc ~tmp~106;assume -2147483648 <= #t~nondet1164 && #t~nondet1164 <= 2147483647;~tmp~106 := #t~nondet1164;havoc #t~nondet1164;#res := ~tmp~106; {2310#true} is VALID [2022-02-20 22:36:46,771 INFO L290 TraceCheckUtils]: 1: Hoare triple {2310#true} assume true; {2310#true} is VALID [2022-02-20 22:36:46,771 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2310#true} {2310#true} #5505#return; {2310#true} is VALID [2022-02-20 22:36:46,771 INFO L290 TraceCheckUtils]: 0: Hoare triple {2385#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~2.base, ~res~2.offset;havoc ~tmp~101.base, ~tmp~101.offset;havoc ~tmp___0~42;havoc ~tmp___1~18; {2310#true} is VALID [2022-02-20 22:36:46,771 INFO L272 TraceCheckUtils]: 1: Hoare triple {2310#true} call #t~ret1153 := ldv_undef_int(); {2310#true} is VALID [2022-02-20 22:36:46,772 INFO L290 TraceCheckUtils]: 2: Hoare triple {2310#true} havoc ~tmp~106;assume -2147483648 <= #t~nondet1164 && #t~nondet1164 <= 2147483647;~tmp~106 := #t~nondet1164;havoc #t~nondet1164;#res := ~tmp~106; {2310#true} is VALID [2022-02-20 22:36:46,772 INFO L290 TraceCheckUtils]: 3: Hoare triple {2310#true} assume true; {2310#true} is VALID [2022-02-20 22:36:46,772 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {2310#true} {2310#true} #5505#return; {2310#true} is VALID [2022-02-20 22:36:46,772 INFO L290 TraceCheckUtils]: 5: Hoare triple {2310#true} assume -2147483648 <= #t~ret1153 && #t~ret1153 <= 2147483647;~tmp___1~18 := #t~ret1153;havoc #t~ret1153; {2310#true} is VALID [2022-02-20 22:36:46,773 INFO L290 TraceCheckUtils]: 6: Hoare triple {2310#true} assume !(0 != ~tmp___1~18);#res.base, #res.offset := 0, 0; {2310#true} is VALID [2022-02-20 22:36:46,773 INFO L290 TraceCheckUtils]: 7: Hoare triple {2310#true} assume true; {2310#true} is VALID [2022-02-20 22:36:46,774 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {2310#true} {2310#true} #6077#return; {2310#true} is VALID [2022-02-20 22:36:46,774 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 25 [2022-02-20 22:36:46,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:46,787 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:36:46,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:46,796 INFO L290 TraceCheckUtils]: 0: Hoare triple {2310#true} havoc ~tmp~106;assume -2147483648 <= #t~nondet1164 && #t~nondet1164 <= 2147483647;~tmp~106 := #t~nondet1164;havoc #t~nondet1164;#res := ~tmp~106; {2310#true} is VALID [2022-02-20 22:36:46,796 INFO L290 TraceCheckUtils]: 1: Hoare triple {2310#true} assume true; {2310#true} is VALID [2022-02-20 22:36:46,796 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2310#true} {2310#true} #5505#return; {2310#true} is VALID [2022-02-20 22:36:46,797 INFO L290 TraceCheckUtils]: 0: Hoare triple {2385#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~2.base, ~res~2.offset;havoc ~tmp~101.base, ~tmp~101.offset;havoc ~tmp___0~42;havoc ~tmp___1~18; {2310#true} is VALID [2022-02-20 22:36:46,797 INFO L272 TraceCheckUtils]: 1: Hoare triple {2310#true} call #t~ret1153 := ldv_undef_int(); {2310#true} is VALID [2022-02-20 22:36:46,797 INFO L290 TraceCheckUtils]: 2: Hoare triple {2310#true} havoc ~tmp~106;assume -2147483648 <= #t~nondet1164 && #t~nondet1164 <= 2147483647;~tmp~106 := #t~nondet1164;havoc #t~nondet1164;#res := ~tmp~106; {2310#true} is VALID [2022-02-20 22:36:46,797 INFO L290 TraceCheckUtils]: 3: Hoare triple {2310#true} assume true; {2310#true} is VALID [2022-02-20 22:36:46,797 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {2310#true} {2310#true} #5505#return; {2310#true} is VALID [2022-02-20 22:36:46,798 INFO L290 TraceCheckUtils]: 5: Hoare triple {2310#true} assume -2147483648 <= #t~ret1153 && #t~ret1153 <= 2147483647;~tmp___1~18 := #t~ret1153;havoc #t~ret1153; {2310#true} is VALID [2022-02-20 22:36:46,798 INFO L290 TraceCheckUtils]: 6: Hoare triple {2310#true} assume !(0 != ~tmp___1~18);#res.base, #res.offset := 0, 0; {2310#true} is VALID [2022-02-20 22:36:46,798 INFO L290 TraceCheckUtils]: 7: Hoare triple {2310#true} assume true; {2310#true} is VALID [2022-02-20 22:36:46,798 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {2310#true} {2310#true} #6079#return; {2310#true} is VALID [2022-02-20 22:36:46,798 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 36 [2022-02-20 22:36:46,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:46,815 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:36:46,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:46,821 INFO L290 TraceCheckUtils]: 0: Hoare triple {2310#true} havoc ~tmp~106;assume -2147483648 <= #t~nondet1164 && #t~nondet1164 <= 2147483647;~tmp~106 := #t~nondet1164;havoc #t~nondet1164;#res := ~tmp~106; {2310#true} is VALID [2022-02-20 22:36:46,822 INFO L290 TraceCheckUtils]: 1: Hoare triple {2310#true} assume true; {2310#true} is VALID [2022-02-20 22:36:46,822 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2310#true} {2310#true} #5505#return; {2310#true} is VALID [2022-02-20 22:36:46,822 INFO L290 TraceCheckUtils]: 0: Hoare triple {2385#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~2.base, ~res~2.offset;havoc ~tmp~101.base, ~tmp~101.offset;havoc ~tmp___0~42;havoc ~tmp___1~18; {2310#true} is VALID [2022-02-20 22:36:46,822 INFO L272 TraceCheckUtils]: 1: Hoare triple {2310#true} call #t~ret1153 := ldv_undef_int(); {2310#true} is VALID [2022-02-20 22:36:46,822 INFO L290 TraceCheckUtils]: 2: Hoare triple {2310#true} havoc ~tmp~106;assume -2147483648 <= #t~nondet1164 && #t~nondet1164 <= 2147483647;~tmp~106 := #t~nondet1164;havoc #t~nondet1164;#res := ~tmp~106; {2310#true} is VALID [2022-02-20 22:36:46,823 INFO L290 TraceCheckUtils]: 3: Hoare triple {2310#true} assume true; {2310#true} is VALID [2022-02-20 22:36:46,823 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {2310#true} {2310#true} #5505#return; {2310#true} is VALID [2022-02-20 22:36:46,823 INFO L290 TraceCheckUtils]: 5: Hoare triple {2310#true} assume -2147483648 <= #t~ret1153 && #t~ret1153 <= 2147483647;~tmp___1~18 := #t~ret1153;havoc #t~ret1153; {2310#true} is VALID [2022-02-20 22:36:46,823 INFO L290 TraceCheckUtils]: 6: Hoare triple {2310#true} assume !(0 != ~tmp___1~18);#res.base, #res.offset := 0, 0; {2310#true} is VALID [2022-02-20 22:36:46,823 INFO L290 TraceCheckUtils]: 7: Hoare triple {2310#true} assume true; {2310#true} is VALID [2022-02-20 22:36:46,826 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {2310#true} {2310#true} #6081#return; {2310#true} is VALID [2022-02-20 22:36:46,826 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 47 [2022-02-20 22:36:46,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:46,838 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:36:46,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:46,848 INFO L290 TraceCheckUtils]: 0: Hoare triple {2310#true} havoc ~tmp~106;assume -2147483648 <= #t~nondet1164 && #t~nondet1164 <= 2147483647;~tmp~106 := #t~nondet1164;havoc #t~nondet1164;#res := ~tmp~106; {2310#true} is VALID [2022-02-20 22:36:46,848 INFO L290 TraceCheckUtils]: 1: Hoare triple {2310#true} assume true; {2310#true} is VALID [2022-02-20 22:36:46,849 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2310#true} {2310#true} #5505#return; {2310#true} is VALID [2022-02-20 22:36:46,849 INFO L290 TraceCheckUtils]: 0: Hoare triple {2385#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~2.base, ~res~2.offset;havoc ~tmp~101.base, ~tmp~101.offset;havoc ~tmp___0~42;havoc ~tmp___1~18; {2310#true} is VALID [2022-02-20 22:36:46,850 INFO L272 TraceCheckUtils]: 1: Hoare triple {2310#true} call #t~ret1153 := ldv_undef_int(); {2310#true} is VALID [2022-02-20 22:36:46,851 INFO L290 TraceCheckUtils]: 2: Hoare triple {2310#true} havoc ~tmp~106;assume -2147483648 <= #t~nondet1164 && #t~nondet1164 <= 2147483647;~tmp~106 := #t~nondet1164;havoc #t~nondet1164;#res := ~tmp~106; {2310#true} is VALID [2022-02-20 22:36:46,851 INFO L290 TraceCheckUtils]: 3: Hoare triple {2310#true} assume true; {2310#true} is VALID [2022-02-20 22:36:46,851 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {2310#true} {2310#true} #5505#return; {2310#true} is VALID [2022-02-20 22:36:46,851 INFO L290 TraceCheckUtils]: 5: Hoare triple {2310#true} assume -2147483648 <= #t~ret1153 && #t~ret1153 <= 2147483647;~tmp___1~18 := #t~ret1153;havoc #t~ret1153; {2310#true} is VALID [2022-02-20 22:36:46,852 INFO L290 TraceCheckUtils]: 6: Hoare triple {2310#true} assume !(0 != ~tmp___1~18);#res.base, #res.offset := 0, 0; {2310#true} is VALID [2022-02-20 22:36:46,852 INFO L290 TraceCheckUtils]: 7: Hoare triple {2310#true} assume true; {2310#true} is VALID [2022-02-20 22:36:46,852 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {2310#true} {2310#true} #6083#return; {2310#true} is VALID [2022-02-20 22:36:46,852 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 58 [2022-02-20 22:36:46,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:46,864 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:36:46,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:46,870 INFO L290 TraceCheckUtils]: 0: Hoare triple {2310#true} havoc ~tmp~106;assume -2147483648 <= #t~nondet1164 && #t~nondet1164 <= 2147483647;~tmp~106 := #t~nondet1164;havoc #t~nondet1164;#res := ~tmp~106; {2310#true} is VALID [2022-02-20 22:36:46,870 INFO L290 TraceCheckUtils]: 1: Hoare triple {2310#true} assume true; {2310#true} is VALID [2022-02-20 22:36:46,871 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2310#true} {2310#true} #5505#return; {2310#true} is VALID [2022-02-20 22:36:46,871 INFO L290 TraceCheckUtils]: 0: Hoare triple {2385#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~2.base, ~res~2.offset;havoc ~tmp~101.base, ~tmp~101.offset;havoc ~tmp___0~42;havoc ~tmp___1~18; {2310#true} is VALID [2022-02-20 22:36:46,872 INFO L272 TraceCheckUtils]: 1: Hoare triple {2310#true} call #t~ret1153 := ldv_undef_int(); {2310#true} is VALID [2022-02-20 22:36:46,872 INFO L290 TraceCheckUtils]: 2: Hoare triple {2310#true} havoc ~tmp~106;assume -2147483648 <= #t~nondet1164 && #t~nondet1164 <= 2147483647;~tmp~106 := #t~nondet1164;havoc #t~nondet1164;#res := ~tmp~106; {2310#true} is VALID [2022-02-20 22:36:46,873 INFO L290 TraceCheckUtils]: 3: Hoare triple {2310#true} assume true; {2310#true} is VALID [2022-02-20 22:36:46,873 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {2310#true} {2310#true} #5505#return; {2310#true} is VALID [2022-02-20 22:36:46,873 INFO L290 TraceCheckUtils]: 5: Hoare triple {2310#true} assume -2147483648 <= #t~ret1153 && #t~ret1153 <= 2147483647;~tmp___1~18 := #t~ret1153;havoc #t~ret1153; {2310#true} is VALID [2022-02-20 22:36:46,873 INFO L290 TraceCheckUtils]: 6: Hoare triple {2310#true} assume !(0 != ~tmp___1~18);#res.base, #res.offset := 0, 0; {2310#true} is VALID [2022-02-20 22:36:46,873 INFO L290 TraceCheckUtils]: 7: Hoare triple {2310#true} assume true; {2310#true} is VALID [2022-02-20 22:36:46,873 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {2310#true} {2310#true} #6085#return; {2310#true} is VALID [2022-02-20 22:36:46,874 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71 [2022-02-20 22:36:46,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:46,883 INFO L290 TraceCheckUtils]: 0: Hoare triple {2310#true} havoc ~tmp~106;assume -2147483648 <= #t~nondet1164 && #t~nondet1164 <= 2147483647;~tmp~106 := #t~nondet1164;havoc #t~nondet1164;#res := ~tmp~106; {2310#true} is VALID [2022-02-20 22:36:46,884 INFO L290 TraceCheckUtils]: 1: Hoare triple {2310#true} assume true; {2310#true} is VALID [2022-02-20 22:36:46,884 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2310#true} {2366#(= 5 ~ldv_statevar_1~0)} #6087#return; {2366#(= 5 ~ldv_statevar_1~0)} is VALID [2022-02-20 22:36:46,885 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 88 [2022-02-20 22:36:46,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:46,900 INFO L290 TraceCheckUtils]: 0: Hoare triple {2310#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3200 + ~dev.offset; {2310#true} is VALID [2022-02-20 22:36:46,900 INFO L290 TraceCheckUtils]: 1: Hoare triple {2310#true} assume true; {2310#true} is VALID [2022-02-20 22:36:46,900 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2310#true} {2311#false} #6227#return; {2311#false} is VALID [2022-02-20 22:36:46,900 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 94 [2022-02-20 22:36:46,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:46,912 INFO L290 TraceCheckUtils]: 0: Hoare triple {2310#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {2310#true} is VALID [2022-02-20 22:36:46,913 INFO L290 TraceCheckUtils]: 1: Hoare triple {2310#true} assume true; {2310#true} is VALID [2022-02-20 22:36:46,913 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2310#true} {2311#false} #6229#return; {2311#false} is VALID [2022-02-20 22:36:46,913 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 101 [2022-02-20 22:36:46,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:46,921 INFO L290 TraceCheckUtils]: 0: Hoare triple {2310#true} ~nr := #in~nr;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;#res := 0; {2310#true} is VALID [2022-02-20 22:36:46,922 INFO L290 TraceCheckUtils]: 1: Hoare triple {2310#true} assume true; {2310#true} is VALID [2022-02-20 22:36:46,922 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2310#true} {2311#false} #6231#return; {2311#false} is VALID [2022-02-20 22:36:46,922 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 109 [2022-02-20 22:36:46,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:46,934 INFO L290 TraceCheckUtils]: 0: Hoare triple {2310#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3200 + ~dev.offset; {2310#true} is VALID [2022-02-20 22:36:46,934 INFO L290 TraceCheckUtils]: 1: Hoare triple {2310#true} assume true; {2310#true} is VALID [2022-02-20 22:36:46,935 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2310#true} {2311#false} #5585#return; {2311#false} is VALID [2022-02-20 22:36:46,935 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 120 [2022-02-20 22:36:46,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:36:46,941 INFO L290 TraceCheckUtils]: 0: Hoare triple {2310#true} assume 2 == ~ldv_spin__xmit_lock_of_netdev_queue~0;#res := 1; {2310#true} is VALID [2022-02-20 22:36:46,941 INFO L290 TraceCheckUtils]: 1: Hoare triple {2310#true} assume true; {2310#true} is VALID [2022-02-20 22:36:46,941 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2310#true} {2311#false} #5523#return; {2311#false} is VALID [2022-02-20 22:36:46,984 INFO L290 TraceCheckUtils]: 0: Hoare triple {2310#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(190, 1);call #Ultimate.allocInit(26, 2);call #Ultimate.allocInit(63, 3);call #Ultimate.allocInit(75, 4);call #Ultimate.allocInit(63, 5);call #Ultimate.allocInit(24, 6);call #Ultimate.allocInit(20, 7);call #Ultimate.allocInit(17, 8);call #Ultimate.allocInit(20, 9);call #Ultimate.allocInit(25, 10);call #Ultimate.allocInit(17, 11);call #Ultimate.allocInit(21, 12);call #Ultimate.allocInit(30, 13);call #Ultimate.allocInit(8, 14);call #Ultimate.allocInit(61, 15);call #Ultimate.allocInit(37, 16);call #Ultimate.allocInit(7, 17);call write~init~int(97, 17, 0, 1);call write~init~int(99, 17, 1, 1);call write~init~int(101, 17, 2, 1);call write~init~int(110, 17, 3, 1);call write~init~int(105, 17, 4, 1);call write~init~int(99, 17, 5, 1);call write~init~int(0, 17, 6, 1);call #Ultimate.allocInit(44, 18);call #Ultimate.allocInit(44, 19);call #Ultimate.allocInit(10, 20);call #Ultimate.allocInit(63, 21);call #Ultimate.allocInit(14, 22);call #Ultimate.allocInit(18, 23);call #Ultimate.allocInit(59, 24);call #Ultimate.allocInit(46, 25);call #Ultimate.allocInit(77, 26);call #Ultimate.allocInit(72, 27);call #Ultimate.allocInit(7, 28);call write~init~int(97, 28, 0, 1);call write~init~int(99, 28, 1, 1);call write~init~int(101, 28, 2, 1);call write~init~int(110, 28, 3, 1);call write~init~int(105, 28, 4, 1);call write~init~int(99, 28, 5, 1);call write~init~int(0, 28, 6, 1);call #Ultimate.allocInit(31, 29);call #Ultimate.allocInit(7, 30);call write~init~int(97, 30, 0, 1);call write~init~int(99, 30, 1, 1);call write~init~int(101, 30, 2, 1);call write~init~int(110, 30, 3, 1);call write~init~int(105, 30, 4, 1);call write~init~int(99, 30, 5, 1);call write~init~int(0, 30, 6, 1);call #Ultimate.allocInit(62, 31);call #Ultimate.allocInit(31, 32);call #Ultimate.allocInit(57, 33);call #Ultimate.allocInit(41, 34);call #Ultimate.allocInit(31, 35);call #Ultimate.allocInit(28, 36);call #Ultimate.allocInit(44, 37);call #Ultimate.allocInit(49, 38);call #Ultimate.allocInit(33, 39);call #Ultimate.allocInit(43, 40);call #Ultimate.allocInit(57, 41);call #Ultimate.allocInit(53, 42);call #Ultimate.allocInit(54, 43);call #Ultimate.allocInit(30, 44);call #Ultimate.allocInit(54, 45);call #Ultimate.allocInit(5, 46);call write~init~int(70, 46, 0, 1);call write~init~int(117, 46, 1, 1);call write~init~int(108, 46, 2, 1);call write~init~int(108, 46, 3, 1);call write~init~int(0, 46, 4, 1);call #Ultimate.allocInit(5, 47);call write~init~int(72, 47, 0, 1);call write~init~int(97, 47, 1, 1);call write~init~int(108, 47, 2, 1);call write~init~int(102, 47, 3, 1);call write~init~int(0, 47, 4, 1);call #Ultimate.allocInit(4, 48);call write~init~int(84, 48, 0, 1);call write~init~int(88, 48, 1, 1);call write~init~int(32, 48, 2, 1);call write~init~int(0, 48, 3, 1);call #Ultimate.allocInit(1, 49);call write~init~int(0, 49, 0, 1);call #Ultimate.allocInit(3, 50);call write~init~int(82, 50, 0, 1);call write~init~int(88, 50, 1, 1);call write~init~int(0, 50, 2, 1);call #Ultimate.allocInit(1, 51);call write~init~int(0, 51, 0, 1);call #Ultimate.allocInit(24, 52);call #Ultimate.allocInit(26, 53);call #Ultimate.allocInit(38, 54);call #Ultimate.allocInit(28, 55);call #Ultimate.allocInit(34, 56);call #Ultimate.allocInit(23, 57);call #Ultimate.allocInit(25, 58);call #Ultimate.allocInit(25, 59);call #Ultimate.allocInit(29, 60);call #Ultimate.allocInit(50, 61);call #Ultimate.allocInit(28, 62);call #Ultimate.allocInit(31, 63);call #Ultimate.allocInit(35, 64);call #Ultimate.allocInit(31, 65);call #Ultimate.allocInit(7, 66);call write~init~int(97, 66, 0, 1);call write~init~int(99, 66, 1, 1);call write~init~int(101, 66, 2, 1);call write~init~int(110, 66, 3, 1);call write~init~int(105, 66, 4, 1);call write~init~int(99, 66, 5, 1);call write~init~int(0, 66, 6, 1);call #Ultimate.allocInit(9, 67);call #Ultimate.allocInit(15, 68);call #Ultimate.allocInit(60, 69);call #Ultimate.allocInit(35, 70);call #Ultimate.allocInit(38, 71);call #Ultimate.allocInit(38, 72);call #Ultimate.allocInit(28, 73);call #Ultimate.allocInit(35, 74);call #Ultimate.allocInit(35, 75);call #Ultimate.allocInit(32, 76);call #Ultimate.allocInit(41, 77);call #Ultimate.allocInit(7, 78);call write~init~int(97, 78, 0, 1);call write~init~int(99, 78, 1, 1);call write~init~int(101, 78, 2, 1);call write~init~int(110, 78, 3, 1);call write~init~int(105, 78, 4, 1);call write~init~int(99, 78, 5, 1);call write~init~int(0, 78, 6, 1);call #Ultimate.allocInit(1, 79);call write~init~int(0, 79, 0, 1);call #Ultimate.allocInit(54, 80);call #Ultimate.allocInit(56, 81);call #Ultimate.allocInit(58, 82);call #Ultimate.allocInit(58, 83);call #Ultimate.allocInit(58, 84);call #Ultimate.allocInit(54, 85);call #Ultimate.allocInit(56, 86);call #Ultimate.allocInit(58, 87);call #Ultimate.allocInit(58, 88);call #Ultimate.allocInit(58, 89);call #Ultimate.allocInit(54, 90);call #Ultimate.allocInit(56, 91);call #Ultimate.allocInit(58, 92);call #Ultimate.allocInit(58, 93);call #Ultimate.allocInit(58, 94);call #Ultimate.allocInit(54, 95);call #Ultimate.allocInit(56, 96);call #Ultimate.allocInit(58, 97);call #Ultimate.allocInit(58, 98);call #Ultimate.allocInit(58, 99);call #Ultimate.allocInit(54, 100);call #Ultimate.allocInit(56, 101);call #Ultimate.allocInit(58, 102);call #Ultimate.allocInit(58, 103);call #Ultimate.allocInit(58, 104);call #Ultimate.allocInit(54, 105);call #Ultimate.allocInit(56, 106);call #Ultimate.allocInit(58, 107);call #Ultimate.allocInit(58, 108);call #Ultimate.allocInit(58, 109);call #Ultimate.allocInit(54, 110);call #Ultimate.allocInit(56, 111);call #Ultimate.allocInit(58, 112);call #Ultimate.allocInit(58, 113);call #Ultimate.allocInit(58, 114);call #Ultimate.allocInit(54, 115);call #Ultimate.allocInit(56, 116);call #Ultimate.allocInit(58, 117);call #Ultimate.allocInit(58, 118);call #Ultimate.allocInit(58, 119);call #Ultimate.allocInit(54, 120);call #Ultimate.allocInit(56, 121);call #Ultimate.allocInit(58, 122);call #Ultimate.allocInit(58, 123);call #Ultimate.allocInit(58, 124);call #Ultimate.allocInit(54, 125);call #Ultimate.allocInit(56, 126);call #Ultimate.allocInit(58, 127);call #Ultimate.allocInit(58, 128);call #Ultimate.allocInit(58, 129);call #Ultimate.allocInit(54, 130);call #Ultimate.allocInit(56, 131);call #Ultimate.allocInit(58, 132);call #Ultimate.allocInit(58, 133);call #Ultimate.allocInit(58, 134);call #Ultimate.allocInit(54, 135);call #Ultimate.allocInit(56, 136);call #Ultimate.allocInit(58, 137);call #Ultimate.allocInit(58, 138);call #Ultimate.allocInit(58, 139);call #Ultimate.allocInit(54, 140);call #Ultimate.allocInit(56, 141);call #Ultimate.allocInit(58, 142);call #Ultimate.allocInit(58, 143);call #Ultimate.allocInit(58, 144);call #Ultimate.allocInit(54, 145);call #Ultimate.allocInit(56, 146);call #Ultimate.allocInit(58, 147);call #Ultimate.allocInit(58, 148);call #Ultimate.allocInit(58, 149);call #Ultimate.allocInit(57, 150);call #Ultimate.allocInit(57, 151);call #Ultimate.allocInit(57, 152);call #Ultimate.allocInit(57, 153);call #Ultimate.allocInit(57, 154);call #Ultimate.allocInit(57, 155);call #Ultimate.allocInit(57, 156);call #Ultimate.allocInit(57, 157);call #Ultimate.allocInit(57, 158);call #Ultimate.allocInit(57, 159);call #Ultimate.allocInit(57, 160);call #Ultimate.allocInit(57, 161);call #Ultimate.allocInit(57, 162);call #Ultimate.allocInit(57, 163);call #Ultimate.allocInit(2, 164);call write~init~int(48, 164, 0, 1);call write~init~int(0, 164, 1, 1);call #Ultimate.allocInit(85, 165);~#acenic_pci_tbl~0.base, ~#acenic_pci_tbl~0.offset := 166, 0;call #Ultimate.allocInit(288, 166);call write~init~int(4782, ~#acenic_pci_tbl~0.base, ~#acenic_pci_tbl~0.offset, 4);call write~init~int(1, ~#acenic_pci_tbl~0.base, 4 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#acenic_pci_tbl~0.base, 8 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#acenic_pci_tbl~0.base, 12 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(131072, ~#acenic_pci_tbl~0.base, 16 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(16776960, ~#acenic_pci_tbl~0.base, 20 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(0, ~#acenic_pci_tbl~0.base, 24 + ~#acenic_pci_tbl~0.offset, 8);call write~init~int(4782, ~#acenic_pci_tbl~0.base, 32 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(2, ~#acenic_pci_tbl~0.base, 36 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#acenic_pci_tbl~0.base, 40 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#acenic_pci_tbl~0.base, 44 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(131072, ~#acenic_pci_tbl~0.base, 48 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(16776960, ~#acenic_pci_tbl~0.base, 52 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(0, ~#acenic_pci_tbl~0.base, 56 + ~#acenic_pci_tbl~0.offset, 8);call write~init~int(4279, ~#acenic_pci_tbl~0.base, 64 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(1, ~#acenic_pci_tbl~0.base, 68 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#acenic_pci_tbl~0.base, 72 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#acenic_pci_tbl~0.base, 76 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(131072, ~#acenic_pci_tbl~0.base, 80 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(16776960, ~#acenic_pci_tbl~0.base, 84 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(0, ~#acenic_pci_tbl~0.base, 88 + ~#acenic_pci_tbl~0.offset, 8);call write~init~int(4997, ~#acenic_pci_tbl~0.base, 96 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(25098, ~#acenic_pci_tbl~0.base, 100 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#acenic_pci_tbl~0.base, 104 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#acenic_pci_tbl~0.base, 108 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(131072, ~#acenic_pci_tbl~0.base, 112 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(16776960, ~#acenic_pci_tbl~0.base, 116 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(0, ~#acenic_pci_tbl~0.base, 120 + ~#acenic_pci_tbl~0.offset, 8);call write~init~int(4997, ~#acenic_pci_tbl~0.base, 128 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(25354, ~#acenic_pci_tbl~0.base, 132 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#acenic_pci_tbl~0.base, 136 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#acenic_pci_tbl~0.base, 140 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(131072, ~#acenic_pci_tbl~0.base, 144 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(16776960, ~#acenic_pci_tbl~0.base, 148 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(0, ~#acenic_pci_tbl~0.base, 152 + ~#acenic_pci_tbl~0.offset, 8);call write~init~int(4113, ~#acenic_pci_tbl~0.base, 160 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(26, ~#acenic_pci_tbl~0.base, 164 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#acenic_pci_tbl~0.base, 168 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#acenic_pci_tbl~0.base, 172 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(131072, ~#acenic_pci_tbl~0.base, 176 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(16776960, ~#acenic_pci_tbl~0.base, 180 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(0, ~#acenic_pci_tbl~0.base, 184 + ~#acenic_pci_tbl~0.offset, 8);call write~init~int(4782, ~#acenic_pci_tbl~0.base, 192 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(250, ~#acenic_pci_tbl~0.base, 196 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#acenic_pci_tbl~0.base, 200 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#acenic_pci_tbl~0.base, 204 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(131072, ~#acenic_pci_tbl~0.base, 208 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(16776960, ~#acenic_pci_tbl~0.base, 212 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(0, ~#acenic_pci_tbl~0.base, 216 + ~#acenic_pci_tbl~0.offset, 8);call write~init~int(4265, ~#acenic_pci_tbl~0.base, 224 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(9, ~#acenic_pci_tbl~0.base, 228 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#acenic_pci_tbl~0.base, 232 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#acenic_pci_tbl~0.base, 236 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(131072, ~#acenic_pci_tbl~0.base, 240 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(16776960, ~#acenic_pci_tbl~0.base, 244 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(0, ~#acenic_pci_tbl~0.base, 248 + ~#acenic_pci_tbl~0.offset, 8);call write~init~int(0, ~#acenic_pci_tbl~0.base, 256 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(0, ~#acenic_pci_tbl~0.base, 260 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(0, ~#acenic_pci_tbl~0.base, 264 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(0, ~#acenic_pci_tbl~0.base, 268 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(0, ~#acenic_pci_tbl~0.base, 272 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(0, ~#acenic_pci_tbl~0.base, 276 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(0, ~#acenic_pci_tbl~0.base, 280 + ~#acenic_pci_tbl~0.offset, 8);~__mod_pci_device_table~0.vendor := 0;~__mod_pci_device_table~0.device := 0;~__mod_pci_device_table~0.subvendor := 0;~__mod_pci_device_table~0.subdevice := 0;~__mod_pci_device_table~0.class := 0;~__mod_pci_device_table~0.class_mask := 0;~__mod_pci_device_table~0.driver_data := 0;~#link_state~0.base, ~#link_state~0.offset := 167, 0;call #Ultimate.allocInit(32, 167);call write~init~int(0, ~#link_state~0.base, ~#link_state~0.offset, 4);call write~init~int(0, ~#link_state~0.base, 4 + ~#link_state~0.offset, 4);call write~init~int(0, ~#link_state~0.base, 8 + ~#link_state~0.offset, 4);call write~init~int(0, ~#link_state~0.base, 12 + ~#link_state~0.offset, 4);call write~init~int(0, ~#link_state~0.base, 16 + ~#link_state~0.offset, 4);call write~init~int(0, ~#link_state~0.base, 20 + ~#link_state~0.offset, 4);call write~init~int(0, ~#link_state~0.base, 24 + ~#link_state~0.offset, 4);call write~init~int(0, ~#link_state~0.base, 28 + ~#link_state~0.offset, 4);~#trace~0.base, ~#trace~0.offset := 168, 0;call #Ultimate.allocInit(32, 168);call write~init~int(0, ~#trace~0.base, ~#trace~0.offset, 4);call write~init~int(0, ~#trace~0.base, 4 + ~#trace~0.offset, 4);call write~init~int(0, ~#trace~0.base, 8 + ~#trace~0.offset, 4);call write~init~int(0, ~#trace~0.base, 12 + ~#trace~0.offset, 4);call write~init~int(0, ~#trace~0.base, 16 + ~#trace~0.offset, 4);call write~init~int(0, ~#trace~0.base, 20 + ~#trace~0.offset, 4);call write~init~int(0, ~#trace~0.base, 24 + ~#trace~0.offset, 4);call write~init~int(0, ~#trace~0.base, 28 + ~#trace~0.offset, 4);~#tx_coal_tick~0.base, ~#tx_coal_tick~0.offset := 169, 0;call #Ultimate.allocInit(32, 169);call write~init~int(0, ~#tx_coal_tick~0.base, ~#tx_coal_tick~0.offset, 4);call write~init~int(0, ~#tx_coal_tick~0.base, 4 + ~#tx_coal_tick~0.offset, 4);call write~init~int(0, ~#tx_coal_tick~0.base, 8 + ~#tx_coal_tick~0.offset, 4);call write~init~int(0, ~#tx_coal_tick~0.base, 12 + ~#tx_coal_tick~0.offset, 4);call write~init~int(0, ~#tx_coal_tick~0.base, 16 + ~#tx_coal_tick~0.offset, 4);call write~init~int(0, ~#tx_coal_tick~0.base, 20 + ~#tx_coal_tick~0.offset, 4);call write~init~int(0, ~#tx_coal_tick~0.base, 24 + ~#tx_coal_tick~0.offset, 4);call write~init~int(0, ~#tx_coal_tick~0.base, 28 + ~#tx_coal_tick~0.offset, 4);~#rx_coal_tick~0.base, ~#rx_coal_tick~0.offset := 170, 0;call #Ultimate.allocInit(32, 170);call write~init~int(0, ~#rx_coal_tick~0.base, ~#rx_coal_tick~0.offset, 4);call write~init~int(0, ~#rx_coal_tick~0.base, 4 + ~#rx_coal_tick~0.offset, 4);call write~init~int(0, ~#rx_coal_tick~0.base, 8 + ~#rx_coal_tick~0.offset, 4);call write~init~int(0, ~#rx_coal_tick~0.base, 12 + ~#rx_coal_tick~0.offset, 4);call write~init~int(0, ~#rx_coal_tick~0.base, 16 + ~#rx_coal_tick~0.offset, 4);call write~init~int(0, ~#rx_coal_tick~0.base, 20 + ~#rx_coal_tick~0.offset, 4);call write~init~int(0, ~#rx_coal_tick~0.base, 24 + ~#rx_coal_tick~0.offset, 4);call write~init~int(0, ~#rx_coal_tick~0.base, 28 + ~#rx_coal_tick~0.offset, 4);~#max_tx_desc~0.base, ~#max_tx_desc~0.offset := 171, 0;call #Ultimate.allocInit(32, 171);call write~init~int(0, ~#max_tx_desc~0.base, ~#max_tx_desc~0.offset, 4);call write~init~int(0, ~#max_tx_desc~0.base, 4 + ~#max_tx_desc~0.offset, 4);call write~init~int(0, ~#max_tx_desc~0.base, 8 + ~#max_tx_desc~0.offset, 4);call write~init~int(0, ~#max_tx_desc~0.base, 12 + ~#max_tx_desc~0.offset, 4);call write~init~int(0, ~#max_tx_desc~0.base, 16 + ~#max_tx_desc~0.offset, 4);call write~init~int(0, ~#max_tx_desc~0.base, 20 + ~#max_tx_desc~0.offset, 4);call write~init~int(0, ~#max_tx_desc~0.base, 24 + ~#max_tx_desc~0.offset, 4);call write~init~int(0, ~#max_tx_desc~0.base, 28 + ~#max_tx_desc~0.offset, 4);~#max_rx_desc~0.base, ~#max_rx_desc~0.offset := 172, 0;call #Ultimate.allocInit(32, 172);call write~init~int(0, ~#max_rx_desc~0.base, ~#max_rx_desc~0.offset, 4);call write~init~int(0, ~#max_rx_desc~0.base, 4 + ~#max_rx_desc~0.offset, 4);call write~init~int(0, ~#max_rx_desc~0.base, 8 + ~#max_rx_desc~0.offset, 4);call write~init~int(0, ~#max_rx_desc~0.base, 12 + ~#max_rx_desc~0.offset, 4);call write~init~int(0, ~#max_rx_desc~0.base, 16 + ~#max_rx_desc~0.offset, 4);call write~init~int(0, ~#max_rx_desc~0.base, 20 + ~#max_rx_desc~0.offset, 4);call write~init~int(0, ~#max_rx_desc~0.base, 24 + ~#max_rx_desc~0.offset, 4);call write~init~int(0, ~#max_rx_desc~0.base, 28 + ~#max_rx_desc~0.offset, 4);~#tx_ratio~0.base, ~#tx_ratio~0.offset := 173, 0;call #Ultimate.allocInit(32, 173);call write~init~int(0, ~#tx_ratio~0.base, ~#tx_ratio~0.offset, 4);call write~init~int(0, ~#tx_ratio~0.base, 4 + ~#tx_ratio~0.offset, 4);call write~init~int(0, ~#tx_ratio~0.base, 8 + ~#tx_ratio~0.offset, 4);call write~init~int(0, ~#tx_ratio~0.base, 12 + ~#tx_ratio~0.offset, 4);call write~init~int(0, ~#tx_ratio~0.base, 16 + ~#tx_ratio~0.offset, 4);call write~init~int(0, ~#tx_ratio~0.base, 20 + ~#tx_ratio~0.offset, 4);call write~init~int(0, ~#tx_ratio~0.base, 24 + ~#tx_ratio~0.offset, 4);call write~init~int(0, ~#tx_ratio~0.base, 28 + ~#tx_ratio~0.offset, 4);~#dis_pci_mem_inval~0.base, ~#dis_pci_mem_inval~0.offset := 174, 0;call #Ultimate.allocInit(32, 174);call write~init~int(1, ~#dis_pci_mem_inval~0.base, ~#dis_pci_mem_inval~0.offset, 4);call write~init~int(1, ~#dis_pci_mem_inval~0.base, 4 + ~#dis_pci_mem_inval~0.offset, 4);call write~init~int(1, ~#dis_pci_mem_inval~0.base, 8 + ~#dis_pci_mem_inval~0.offset, 4);call write~init~int(1, ~#dis_pci_mem_inval~0.base, 12 + ~#dis_pci_mem_inval~0.offset, 4);call write~init~int(1, ~#dis_pci_mem_inval~0.base, 16 + ~#dis_pci_mem_inval~0.offset, 4);call write~init~int(1, ~#dis_pci_mem_inval~0.base, 20 + ~#dis_pci_mem_inval~0.offset, 4);call write~init~int(1, ~#dis_pci_mem_inval~0.base, 24 + ~#dis_pci_mem_inval~0.offset, 4);call write~init~int(1, ~#dis_pci_mem_inval~0.base, 28 + ~#dis_pci_mem_inval~0.offset, 4);~#version~0.base, ~#version~0.offset := 175, 0;call #Ultimate.allocInit(137, 175);call write~init~int(97, ~#version~0.base, ~#version~0.offset, 1);call write~init~int(99, ~#version~0.base, 1 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 2 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 3 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 4 + ~#version~0.offset, 1);call write~init~int(99, ~#version~0.base, 5 + ~#version~0.offset, 1);call write~init~int(46, ~#version~0.base, 6 + ~#version~0.offset, 1);call write~init~int(99, ~#version~0.base, 7 + ~#version~0.offset, 1);call write~init~int(58, ~#version~0.base, 8 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 9 + ~#version~0.offset, 1);call write~init~int(118, ~#version~0.base, 10 + ~#version~0.offset, 1);call write~init~int(48, ~#version~0.base, 11 + ~#version~0.offset, 1);call write~init~int(46, ~#version~0.base, 12 + ~#version~0.offset, 1);call write~init~int(57, ~#version~0.base, 13 + ~#version~0.offset, 1);call write~init~int(50, ~#version~0.base, 14 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 15 + ~#version~0.offset, 1);call write~init~int(48, ~#version~0.base, 16 + ~#version~0.offset, 1);call write~init~int(56, ~#version~0.base, 17 + ~#version~0.offset, 1);call write~init~int(47, ~#version~0.base, 18 + ~#version~0.offset, 1);call write~init~int(48, ~#version~0.base, 19 + ~#version~0.offset, 1);call write~init~int(53, ~#version~0.base, 20 + ~#version~0.offset, 1);call write~init~int(47, ~#version~0.base, 21 + ~#version~0.offset, 1);call write~init~int(50, ~#version~0.base, 22 + ~#version~0.offset, 1);call write~init~int(48, ~#version~0.base, 23 + ~#version~0.offset, 1);call write~init~int(48, ~#version~0.base, 24 + ~#version~0.offset, 1);call write~init~int(50, ~#version~0.base, 25 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 26 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 27 + ~#version~0.offset, 1);call write~init~int(74, ~#version~0.base, 28 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 29 + ~#version~0.offset, 1);call write~init~int(115, ~#version~0.base, 30 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 31 + ~#version~0.offset, 1);call write~init~int(83, ~#version~0.base, 32 + ~#version~0.offset, 1);call write~init~int(111, ~#version~0.base, 33 + ~#version~0.offset, 1);call write~init~int(114, ~#version~0.base, 34 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 35 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 36 + ~#version~0.offset, 1);call write~init~int(115, ~#version~0.base, 37 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 38 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 39 + ~#version~0.offset, 1);call write~init~int(44, ~#version~0.base, 40 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 41 + ~#version~0.offset, 1);call write~init~int(108, ~#version~0.base, 42 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 43 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 44 + ~#version~0.offset, 1);call write~init~int(117, ~#version~0.base, 45 + ~#version~0.offset, 1);call write~init~int(120, ~#version~0.base, 46 + ~#version~0.offset, 1);call write~init~int(45, ~#version~0.base, 47 + ~#version~0.offset, 1);call write~init~int(97, ~#version~0.base, 48 + ~#version~0.offset, 1);call write~init~int(99, ~#version~0.base, 49 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 50 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 51 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 52 + ~#version~0.offset, 1);call write~init~int(99, ~#version~0.base, 53 + ~#version~0.offset, 1);call write~init~int(64, ~#version~0.base, 54 + ~#version~0.offset, 1);call write~init~int(83, ~#version~0.base, 55 + ~#version~0.offset, 1);call write~init~int(117, ~#version~0.base, 56 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 57 + ~#version~0.offset, 1);call write~init~int(83, ~#version~0.base, 58 + ~#version~0.offset, 1);call write~init~int(73, ~#version~0.base, 59 + ~#version~0.offset, 1);call write~init~int(84, ~#version~0.base, 60 + ~#version~0.offset, 1);call write~init~int(69, ~#version~0.base, 61 + ~#version~0.offset, 1);call write~init~int(46, ~#version~0.base, 62 + ~#version~0.offset, 1);call write~init~int(100, ~#version~0.base, 63 + ~#version~0.offset, 1);call write~init~int(107, ~#version~0.base, 64 + ~#version~0.offset, 1);call write~init~int(10, ~#version~0.base, 65 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 66 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 67 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 68 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 69 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 70 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 71 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 72 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 73 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 74 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 75 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 76 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 77 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 78 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 79 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 80 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 81 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 82 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 83 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 84 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 85 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 86 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 87 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 88 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 89 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 90 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 91 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 92 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 93 + ~#version~0.offset, 1);call write~init~int(104, ~#version~0.base, 94 + ~#version~0.offset, 1);call write~init~int(116, ~#version~0.base, 95 + ~#version~0.offset, 1);call write~init~int(116, ~#version~0.base, 96 + ~#version~0.offset, 1);call write~init~int(112, ~#version~0.base, 97 + ~#version~0.offset, 1);call write~init~int(58, ~#version~0.base, 98 + ~#version~0.offset, 1);call write~init~int(47, ~#version~0.base, 99 + ~#version~0.offset, 1);call write~init~int(47, ~#version~0.base, 100 + ~#version~0.offset, 1);call write~init~int(104, ~#version~0.base, 101 + ~#version~0.offset, 1);call write~init~int(111, ~#version~0.base, 102 + ~#version~0.offset, 1);call write~init~int(109, ~#version~0.base, 103 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 104 + ~#version~0.offset, 1);call write~init~int(46, ~#version~0.base, 105 + ~#version~0.offset, 1);call write~init~int(99, ~#version~0.base, 106 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 107 + ~#version~0.offset, 1);call write~init~int(114, ~#version~0.base, 108 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 109 + ~#version~0.offset, 1);call write~init~int(46, ~#version~0.base, 110 + ~#version~0.offset, 1);call write~init~int(99, ~#version~0.base, 111 + ~#version~0.offset, 1);call write~init~int(104, ~#version~0.base, 112 + ~#version~0.offset, 1);call write~init~int(47, ~#version~0.base, 113 + ~#version~0.offset, 1);call write~init~int(126, ~#version~0.base, 114 + ~#version~0.offset, 1);call write~init~int(106, ~#version~0.base, 115 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 116 + ~#version~0.offset, 1);call write~init~int(115, ~#version~0.base, 117 + ~#version~0.offset, 1);call write~init~int(47, ~#version~0.base, 118 + ~#version~0.offset, 1);call write~init~int(103, ~#version~0.base, 119 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 120 + ~#version~0.offset, 1);call write~init~int(103, ~#version~0.base, 121 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 122 + ~#version~0.offset, 1);call write~init~int(47, ~#version~0.base, 123 + ~#version~0.offset, 1);call write~init~int(97, ~#version~0.base, 124 + ~#version~0.offset, 1);call write~init~int(99, ~#version~0.base, 125 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 126 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 127 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 128 + ~#version~0.offset, 1);call write~init~int(99, ~#version~0.base, 129 + ~#version~0.offset, 1);call write~init~int(46, ~#version~0.base, 130 + ~#version~0.offset, 1);call write~init~int(104, ~#version~0.base, 131 + ~#version~0.offset, 1);call write~init~int(116, ~#version~0.base, 132 + ~#version~0.offset, 1);call write~init~int(109, ~#version~0.base, 133 + ~#version~0.offset, 1);call write~init~int(108, ~#version~0.base, 134 + ~#version~0.offset, 1);call write~init~int(10, ~#version~0.base, 135 + ~#version~0.offset, 1);call write~init~int(0, ~#version~0.base, 136 + ~#version~0.offset, 1);~#ace_ethtool_ops~0.base, ~#ace_ethtool_ops~0.offset := 176, 0;call #Ultimate.allocInit(368, 176);call write~init~$Pointer$(#funAddr~ace_get_settings.base, #funAddr~ace_get_settings.offset, ~#ace_ethtool_ops~0.base, ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ace_set_settings.base, #funAddr~ace_set_settings.offset, ~#ace_ethtool_ops~0.base, 8 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ace_get_drvinfo.base, #funAddr~ace_get_drvinfo.offset, ~#ace_ethtool_ops~0.base, 16 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 24 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 32 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 40 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 48 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 56 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 64 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 72 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 80 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 88 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 96 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 104 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 112 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 120 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 128 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 136 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 144 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 152 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 160 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 168 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 176 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 184 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 192 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 200 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 208 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 216 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 224 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 232 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 240 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 248 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 256 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 264 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 272 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 280 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 288 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 296 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 304 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 312 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 320 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 328 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 336 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 344 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 352 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 360 + ~#ace_ethtool_ops~0.offset, 8);~#ace_netdev_ops~0.base, ~#ace_netdev_ops~0.offset := 177, 0;call #Ultimate.allocInit(472, 177);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 8 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ace_open.base, #funAddr~ace_open.offset, ~#ace_netdev_ops~0.base, 16 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ace_close.base, #funAddr~ace_close.offset, ~#ace_netdev_ops~0.base, 24 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ace_start_xmit.base, #funAddr~ace_start_xmit.offset, ~#ace_netdev_ops~0.base, 32 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 40 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 48 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ace_set_multicast_list.base, #funAddr~ace_set_multicast_list.offset, ~#ace_netdev_ops~0.base, 56 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ace_set_mac_addr.base, #funAddr~ace_set_mac_addr.offset, ~#ace_netdev_ops~0.base, 64 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_validate_addr.base, #funAddr~eth_validate_addr.offset, ~#ace_netdev_ops~0.base, 72 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 80 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 88 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ace_change_mtu.base, #funAddr~ace_change_mtu.offset, ~#ace_netdev_ops~0.base, 96 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 104 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ace_watchdog.base, #funAddr~ace_watchdog.offset, ~#ace_netdev_ops~0.base, 112 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 120 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ace_get_stats.base, #funAddr~ace_get_stats.offset, ~#ace_netdev_ops~0.base, 128 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 136 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 144 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 152 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 160 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 168 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 176 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 184 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 192 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 200 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 208 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 216 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 224 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 232 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 240 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 248 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 256 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 264 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 272 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 280 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 288 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 296 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 304 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 312 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 320 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 328 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 336 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 344 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 352 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 360 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 368 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 376 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 384 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 392 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 400 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 408 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 416 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 424 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 432 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 440 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 448 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 456 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 464 + ~#ace_netdev_ops~0.offset, 8);~#acenic_pci_driver~0.base, ~#acenic_pci_driver~0.offset := 178, 0;call #Ultimate.allocInit(301, 178);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 8 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(17, 0, ~#acenic_pci_driver~0.base, 16 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(~#acenic_pci_tbl~0.base, ~#acenic_pci_tbl~0.offset, ~#acenic_pci_driver~0.base, 24 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~acenic_probe_one.base, #funAddr~acenic_probe_one.offset, ~#acenic_pci_driver~0.base, 32 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~acenic_remove_one.base, #funAddr~acenic_remove_one.offset, ~#acenic_pci_driver~0.base, 40 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 48 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 56 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 64 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 72 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 80 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 88 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 96 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 104 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 112 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 120 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 128 + ~#acenic_pci_driver~0.offset, 8);call write~init~int(0, ~#acenic_pci_driver~0.base, 136 + ~#acenic_pci_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 137 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 145 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 153 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 161 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 169 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 177 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 185 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 193 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 201 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 209 + ~#acenic_pci_driver~0.offset, 8);call write~init~int(0, ~#acenic_pci_driver~0.base, 217 + ~#acenic_pci_driver~0.offset, 4);call write~init~int(0, ~#acenic_pci_driver~0.base, 221 + ~#acenic_pci_driver~0.offset, 4);call write~init~int(0, ~#acenic_pci_driver~0.base, 225 + ~#acenic_pci_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 229 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 237 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 245 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 253 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 261 + ~#acenic_pci_driver~0.offset, 8);call write~init~int(0, ~#acenic_pci_driver~0.base, 269 + ~#acenic_pci_driver~0.offset, 4);call write~init~int(0, ~#acenic_pci_driver~0.base, 273 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 285 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 293 + ~#acenic_pci_driver~0.offset, 8);~ldv_0_data_data~0.base, ~ldv_0_data_data~0.offset := 0, 0;~ldv_0_line_line~0 := 0;~ldv_0_ret_val_default~0 := 0;~ldv_0_thread_thread~0.base, ~ldv_0_thread_thread~0.offset := 0, 0;~ldv_11_ret_default~0 := 0;~ldv_1_container_net_device~0.base, ~ldv_1_container_net_device~0.offset := 0, 0;~ldv_1_container_struct_ethtool_cmd_ptr~0.base, ~ldv_1_container_struct_ethtool_cmd_ptr~0.offset := 0, 0;~ldv_1_container_struct_ethtool_drvinfo_ptr~0.base, ~ldv_1_container_struct_ethtool_drvinfo_ptr~0.offset := 0, 0;~ldv_1_container_struct_sk_buff_ptr~0.base, ~ldv_1_container_struct_sk_buff_ptr~0.offset := 0, 0;~ldv_1_ldv_param_8_1_default~0 := 0;~ldv_2_container_pci_driver~0.base, ~ldv_2_container_pci_driver~0.offset := 0, 0;~ldv_2_resource_dev~0.base, ~ldv_2_resource_dev~0.offset := 0, 0;~#ldv_2_resource_pm_message~0.base, ~#ldv_2_resource_pm_message~0.offset := 179, 0;call #Ultimate.allocInit(4, 179);call write~init~int(0, ~#ldv_2_resource_pm_message~0.base, ~#ldv_2_resource_pm_message~0.offset, 4);~ldv_2_resource_struct_pci_device_id_ptr~0.base, ~ldv_2_resource_struct_pci_device_id_ptr~0.offset := 0, 0;~ldv_2_ret_default~0 := 0;~ldv_statevar_0~0 := 0;~ldv_statevar_1~0 := 0;~ldv_statevar_11~0 := 0;~ldv_statevar_2~0 := 0;~ldv_0_callback_handler~0.base, ~ldv_0_callback_handler~0.offset := #funAddr~ace_interrupt.base, #funAddr~ace_interrupt.offset;~ldv_11_exit_acenic_pci_driver_exit_default~0.base, ~ldv_11_exit_acenic_pci_driver_exit_default~0.offset := #funAddr~acenic_pci_driver_exit.base, #funAddr~acenic_pci_driver_exit.offset;~ldv_11_init_acenic_pci_driver_init_default~0.base, ~ldv_11_init_acenic_pci_driver_init_default~0.offset := #funAddr~acenic_pci_driver_init.base, #funAddr~acenic_pci_driver_init.offset;~ldv_1_callback_get_drvinfo~0.base, ~ldv_1_callback_get_drvinfo~0.offset := #funAddr~ace_get_drvinfo.base, #funAddr~ace_get_drvinfo.offset;~ldv_1_callback_get_settings~0.base, ~ldv_1_callback_get_settings~0.offset := #funAddr~ace_get_settings.base, #funAddr~ace_get_settings.offset;~ldv_1_callback_ndo_change_mtu~0.base, ~ldv_1_callback_ndo_change_mtu~0.offset := #funAddr~ace_change_mtu.base, #funAddr~ace_change_mtu.offset;~ldv_1_callback_ndo_get_stats~0.base, ~ldv_1_callback_ndo_get_stats~0.offset := #funAddr~ace_get_stats.base, #funAddr~ace_get_stats.offset;~ldv_1_callback_ndo_set_mac_address~0.base, ~ldv_1_callback_ndo_set_mac_address~0.offset := #funAddr~ace_set_mac_addr.base, #funAddr~ace_set_mac_addr.offset;~ldv_1_callback_ndo_set_rx_mode~0.base, ~ldv_1_callback_ndo_set_rx_mode~0.offset := #funAddr~ace_set_multicast_list.base, #funAddr~ace_set_multicast_list.offset;~ldv_1_callback_ndo_start_xmit~0.base, ~ldv_1_callback_ndo_start_xmit~0.offset := #funAddr~ace_start_xmit.base, #funAddr~ace_start_xmit.offset;~ldv_1_callback_ndo_tx_timeout~0.base, ~ldv_1_callback_ndo_tx_timeout~0.offset := #funAddr~ace_watchdog.base, #funAddr~ace_watchdog.offset;~ldv_1_callback_ndo_validate_addr~0.base, ~ldv_1_callback_ndo_validate_addr~0.offset := #funAddr~eth_validate_addr.base, #funAddr~eth_validate_addr.offset;~ldv_1_callback_set_settings~0.base, ~ldv_1_callback_set_settings~0.offset := #funAddr~ace_set_settings.base, #funAddr~ace_set_settings.offset;~ldv_spin__xmit_lock_of_netdev_queue~0 := 1;~ldv_spin_addr_list_lock_of_net_device~0 := 1;~ldv_spin_alloc_lock_of_task_struct~0 := 1;~ldv_spin_i_lock_of_inode~0 := 1;~ldv_spin_lock~0 := 1;~ldv_spin_lock_of_NOT_ARG_SIGN~0 := 1;~ldv_spin_lock_of_res_counter~0 := 1;~ldv_spin_lru_lock_of_netns_frags~0 := 1;~ldv_spin_node_size_lock_of_pglist_data~0 := 1;~ldv_spin_ptl~0 := 1;~ldv_spin_siglock_of_sighand_struct~0 := 1;~ldv_spin_sk_dst_lock_of_sock~0 := 1;~ldv_spin_slock_of_NOT_ARG_SIGN~0 := 1;~ldv_spin_tx_global_lock_of_net_device~0 := 1; {2310#true} is VALID [2022-02-20 22:36:46,985 INFO L290 TraceCheckUtils]: 1: Hoare triple {2310#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret1055#1, main_~tmp~74#1;havoc main_~tmp~74#1;assume { :begin_inline_ldv_initialize } true; {2310#true} is VALID [2022-02-20 22:36:46,985 INFO L290 TraceCheckUtils]: 2: Hoare triple {2310#true} assume { :end_inline_ldv_initialize } true;assume { :begin_inline_ldv_initialize_external_data } true;assume { :begin_inline_ldv_allocate_external_0 } true;havoc ldv_allocate_external_0_#t~ret1039#1.base, ldv_allocate_external_0_#t~ret1039#1.offset, ldv_allocate_external_0_#t~ret1040#1.base, ldv_allocate_external_0_#t~ret1040#1.offset, ldv_allocate_external_0_#t~ret1041#1.base, ldv_allocate_external_0_#t~ret1041#1.offset, ldv_allocate_external_0_#t~ret1042#1.base, ldv_allocate_external_0_#t~ret1042#1.offset, ldv_allocate_external_0_#t~ret1043#1.base, ldv_allocate_external_0_#t~ret1043#1.offset, ldv_allocate_external_0_#t~ret1044#1.base, ldv_allocate_external_0_#t~ret1044#1.offset; {2310#true} is VALID [2022-02-20 22:36:46,996 INFO L272 TraceCheckUtils]: 3: Hoare triple {2310#true} call ldv_allocate_external_0_#t~ret1039#1.base, ldv_allocate_external_0_#t~ret1039#1.offset := ldv_malloc(0); {2385#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:36:46,996 INFO L290 TraceCheckUtils]: 4: Hoare triple {2385#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~2.base, ~res~2.offset;havoc ~tmp~101.base, ~tmp~101.offset;havoc ~tmp___0~42;havoc ~tmp___1~18; {2310#true} is VALID [2022-02-20 22:36:46,996 INFO L272 TraceCheckUtils]: 5: Hoare triple {2310#true} call #t~ret1153 := ldv_undef_int(); {2310#true} is VALID [2022-02-20 22:36:46,996 INFO L290 TraceCheckUtils]: 6: Hoare triple {2310#true} havoc ~tmp~106;assume -2147483648 <= #t~nondet1164 && #t~nondet1164 <= 2147483647;~tmp~106 := #t~nondet1164;havoc #t~nondet1164;#res := ~tmp~106; {2310#true} is VALID [2022-02-20 22:36:46,997 INFO L290 TraceCheckUtils]: 7: Hoare triple {2310#true} assume true; {2310#true} is VALID [2022-02-20 22:36:46,997 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {2310#true} {2310#true} #5505#return; {2310#true} is VALID [2022-02-20 22:36:46,997 INFO L290 TraceCheckUtils]: 9: Hoare triple {2310#true} assume -2147483648 <= #t~ret1153 && #t~ret1153 <= 2147483647;~tmp___1~18 := #t~ret1153;havoc #t~ret1153; {2310#true} is VALID [2022-02-20 22:36:46,997 INFO L290 TraceCheckUtils]: 10: Hoare triple {2310#true} assume !(0 != ~tmp___1~18);#res.base, #res.offset := 0, 0; {2310#true} is VALID [2022-02-20 22:36:46,997 INFO L290 TraceCheckUtils]: 11: Hoare triple {2310#true} assume true; {2310#true} is VALID [2022-02-20 22:36:46,997 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {2310#true} {2310#true} #6075#return; {2310#true} is VALID [2022-02-20 22:36:46,997 INFO L290 TraceCheckUtils]: 13: Hoare triple {2310#true} ~ldv_0_data_data~0.base, ~ldv_0_data_data~0.offset := ldv_allocate_external_0_#t~ret1039#1.base, ldv_allocate_external_0_#t~ret1039#1.offset;havoc ldv_allocate_external_0_#t~ret1039#1.base, ldv_allocate_external_0_#t~ret1039#1.offset;~ldv_0_thread_thread~0.base, ~ldv_0_thread_thread~0.offset := 0, 0; {2310#true} is VALID [2022-02-20 22:36:47,002 INFO L272 TraceCheckUtils]: 14: Hoare triple {2310#true} call ldv_allocate_external_0_#t~ret1040#1.base, ldv_allocate_external_0_#t~ret1040#1.offset := ldv_malloc(3027); {2385#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:36:47,002 INFO L290 TraceCheckUtils]: 15: Hoare triple {2385#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~2.base, ~res~2.offset;havoc ~tmp~101.base, ~tmp~101.offset;havoc ~tmp___0~42;havoc ~tmp___1~18; {2310#true} is VALID [2022-02-20 22:36:47,002 INFO L272 TraceCheckUtils]: 16: Hoare triple {2310#true} call #t~ret1153 := ldv_undef_int(); {2310#true} is VALID [2022-02-20 22:36:47,003 INFO L290 TraceCheckUtils]: 17: Hoare triple {2310#true} havoc ~tmp~106;assume -2147483648 <= #t~nondet1164 && #t~nondet1164 <= 2147483647;~tmp~106 := #t~nondet1164;havoc #t~nondet1164;#res := ~tmp~106; {2310#true} is VALID [2022-02-20 22:36:47,003 INFO L290 TraceCheckUtils]: 18: Hoare triple {2310#true} assume true; {2310#true} is VALID [2022-02-20 22:36:47,003 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {2310#true} {2310#true} #5505#return; {2310#true} is VALID [2022-02-20 22:36:47,003 INFO L290 TraceCheckUtils]: 20: Hoare triple {2310#true} assume -2147483648 <= #t~ret1153 && #t~ret1153 <= 2147483647;~tmp___1~18 := #t~ret1153;havoc #t~ret1153; {2310#true} is VALID [2022-02-20 22:36:47,003 INFO L290 TraceCheckUtils]: 21: Hoare triple {2310#true} assume !(0 != ~tmp___1~18);#res.base, #res.offset := 0, 0; {2310#true} is VALID [2022-02-20 22:36:47,003 INFO L290 TraceCheckUtils]: 22: Hoare triple {2310#true} assume true; {2310#true} is VALID [2022-02-20 22:36:47,003 INFO L284 TraceCheckUtils]: 23: Hoare quadruple {2310#true} {2310#true} #6077#return; {2310#true} is VALID [2022-02-20 22:36:47,003 INFO L290 TraceCheckUtils]: 24: Hoare triple {2310#true} ~ldv_1_container_net_device~0.base, ~ldv_1_container_net_device~0.offset := ldv_allocate_external_0_#t~ret1040#1.base, ldv_allocate_external_0_#t~ret1040#1.offset;havoc ldv_allocate_external_0_#t~ret1040#1.base, ldv_allocate_external_0_#t~ret1040#1.offset; {2310#true} is VALID [2022-02-20 22:36:47,006 INFO L272 TraceCheckUtils]: 25: Hoare triple {2310#true} call ldv_allocate_external_0_#t~ret1041#1.base, ldv_allocate_external_0_#t~ret1041#1.offset := ldv_malloc(44); {2385#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:36:47,007 INFO L290 TraceCheckUtils]: 26: Hoare triple {2385#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~2.base, ~res~2.offset;havoc ~tmp~101.base, ~tmp~101.offset;havoc ~tmp___0~42;havoc ~tmp___1~18; {2310#true} is VALID [2022-02-20 22:36:47,007 INFO L272 TraceCheckUtils]: 27: Hoare triple {2310#true} call #t~ret1153 := ldv_undef_int(); {2310#true} is VALID [2022-02-20 22:36:47,007 INFO L290 TraceCheckUtils]: 28: Hoare triple {2310#true} havoc ~tmp~106;assume -2147483648 <= #t~nondet1164 && #t~nondet1164 <= 2147483647;~tmp~106 := #t~nondet1164;havoc #t~nondet1164;#res := ~tmp~106; {2310#true} is VALID [2022-02-20 22:36:47,007 INFO L290 TraceCheckUtils]: 29: Hoare triple {2310#true} assume true; {2310#true} is VALID [2022-02-20 22:36:47,007 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {2310#true} {2310#true} #5505#return; {2310#true} is VALID [2022-02-20 22:36:47,007 INFO L290 TraceCheckUtils]: 31: Hoare triple {2310#true} assume -2147483648 <= #t~ret1153 && #t~ret1153 <= 2147483647;~tmp___1~18 := #t~ret1153;havoc #t~ret1153; {2310#true} is VALID [2022-02-20 22:36:47,008 INFO L290 TraceCheckUtils]: 32: Hoare triple {2310#true} assume !(0 != ~tmp___1~18);#res.base, #res.offset := 0, 0; {2310#true} is VALID [2022-02-20 22:36:47,008 INFO L290 TraceCheckUtils]: 33: Hoare triple {2310#true} assume true; {2310#true} is VALID [2022-02-20 22:36:47,008 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {2310#true} {2310#true} #6079#return; {2310#true} is VALID [2022-02-20 22:36:47,008 INFO L290 TraceCheckUtils]: 35: Hoare triple {2310#true} ~ldv_1_container_struct_ethtool_cmd_ptr~0.base, ~ldv_1_container_struct_ethtool_cmd_ptr~0.offset := ldv_allocate_external_0_#t~ret1041#1.base, ldv_allocate_external_0_#t~ret1041#1.offset;havoc ldv_allocate_external_0_#t~ret1041#1.base, ldv_allocate_external_0_#t~ret1041#1.offset; {2310#true} is VALID [2022-02-20 22:36:47,017 INFO L272 TraceCheckUtils]: 36: Hoare triple {2310#true} call ldv_allocate_external_0_#t~ret1042#1.base, ldv_allocate_external_0_#t~ret1042#1.offset := ldv_malloc(196); {2385#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:36:47,017 INFO L290 TraceCheckUtils]: 37: Hoare triple {2385#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~2.base, ~res~2.offset;havoc ~tmp~101.base, ~tmp~101.offset;havoc ~tmp___0~42;havoc ~tmp___1~18; {2310#true} is VALID [2022-02-20 22:36:47,017 INFO L272 TraceCheckUtils]: 38: Hoare triple {2310#true} call #t~ret1153 := ldv_undef_int(); {2310#true} is VALID [2022-02-20 22:36:47,017 INFO L290 TraceCheckUtils]: 39: Hoare triple {2310#true} havoc ~tmp~106;assume -2147483648 <= #t~nondet1164 && #t~nondet1164 <= 2147483647;~tmp~106 := #t~nondet1164;havoc #t~nondet1164;#res := ~tmp~106; {2310#true} is VALID [2022-02-20 22:36:47,017 INFO L290 TraceCheckUtils]: 40: Hoare triple {2310#true} assume true; {2310#true} is VALID [2022-02-20 22:36:47,017 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {2310#true} {2310#true} #5505#return; {2310#true} is VALID [2022-02-20 22:36:47,017 INFO L290 TraceCheckUtils]: 42: Hoare triple {2310#true} assume -2147483648 <= #t~ret1153 && #t~ret1153 <= 2147483647;~tmp___1~18 := #t~ret1153;havoc #t~ret1153; {2310#true} is VALID [2022-02-20 22:36:47,017 INFO L290 TraceCheckUtils]: 43: Hoare triple {2310#true} assume !(0 != ~tmp___1~18);#res.base, #res.offset := 0, 0; {2310#true} is VALID [2022-02-20 22:36:47,017 INFO L290 TraceCheckUtils]: 44: Hoare triple {2310#true} assume true; {2310#true} is VALID [2022-02-20 22:36:47,018 INFO L284 TraceCheckUtils]: 45: Hoare quadruple {2310#true} {2310#true} #6081#return; {2310#true} is VALID [2022-02-20 22:36:47,018 INFO L290 TraceCheckUtils]: 46: Hoare triple {2310#true} ~ldv_1_container_struct_ethtool_drvinfo_ptr~0.base, ~ldv_1_container_struct_ethtool_drvinfo_ptr~0.offset := ldv_allocate_external_0_#t~ret1042#1.base, ldv_allocate_external_0_#t~ret1042#1.offset;havoc ldv_allocate_external_0_#t~ret1042#1.base, ldv_allocate_external_0_#t~ret1042#1.offset; {2310#true} is VALID [2022-02-20 22:36:47,019 INFO L272 TraceCheckUtils]: 47: Hoare triple {2310#true} call ldv_allocate_external_0_#t~ret1043#1.base, ldv_allocate_external_0_#t~ret1043#1.offset := ldv_malloc(245); {2385#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:36:47,019 INFO L290 TraceCheckUtils]: 48: Hoare triple {2385#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~2.base, ~res~2.offset;havoc ~tmp~101.base, ~tmp~101.offset;havoc ~tmp___0~42;havoc ~tmp___1~18; {2310#true} is VALID [2022-02-20 22:36:47,019 INFO L272 TraceCheckUtils]: 49: Hoare triple {2310#true} call #t~ret1153 := ldv_undef_int(); {2310#true} is VALID [2022-02-20 22:36:47,019 INFO L290 TraceCheckUtils]: 50: Hoare triple {2310#true} havoc ~tmp~106;assume -2147483648 <= #t~nondet1164 && #t~nondet1164 <= 2147483647;~tmp~106 := #t~nondet1164;havoc #t~nondet1164;#res := ~tmp~106; {2310#true} is VALID [2022-02-20 22:36:47,019 INFO L290 TraceCheckUtils]: 51: Hoare triple {2310#true} assume true; {2310#true} is VALID [2022-02-20 22:36:47,019 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {2310#true} {2310#true} #5505#return; {2310#true} is VALID [2022-02-20 22:36:47,019 INFO L290 TraceCheckUtils]: 53: Hoare triple {2310#true} assume -2147483648 <= #t~ret1153 && #t~ret1153 <= 2147483647;~tmp___1~18 := #t~ret1153;havoc #t~ret1153; {2310#true} is VALID [2022-02-20 22:36:47,019 INFO L290 TraceCheckUtils]: 54: Hoare triple {2310#true} assume !(0 != ~tmp___1~18);#res.base, #res.offset := 0, 0; {2310#true} is VALID [2022-02-20 22:36:47,019 INFO L290 TraceCheckUtils]: 55: Hoare triple {2310#true} assume true; {2310#true} is VALID [2022-02-20 22:36:47,019 INFO L284 TraceCheckUtils]: 56: Hoare quadruple {2310#true} {2310#true} #6083#return; {2310#true} is VALID [2022-02-20 22:36:47,020 INFO L290 TraceCheckUtils]: 57: Hoare triple {2310#true} ~ldv_1_container_struct_sk_buff_ptr~0.base, ~ldv_1_container_struct_sk_buff_ptr~0.offset := ldv_allocate_external_0_#t~ret1043#1.base, ldv_allocate_external_0_#t~ret1043#1.offset;havoc ldv_allocate_external_0_#t~ret1043#1.base, ldv_allocate_external_0_#t~ret1043#1.offset; {2310#true} is VALID [2022-02-20 22:36:47,020 INFO L272 TraceCheckUtils]: 58: Hoare triple {2310#true} call ldv_allocate_external_0_#t~ret1044#1.base, ldv_allocate_external_0_#t~ret1044#1.offset := ldv_malloc(3018); {2385#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:36:47,020 INFO L290 TraceCheckUtils]: 59: Hoare triple {2385#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~2.base, ~res~2.offset;havoc ~tmp~101.base, ~tmp~101.offset;havoc ~tmp___0~42;havoc ~tmp___1~18; {2310#true} is VALID [2022-02-20 22:36:47,021 INFO L272 TraceCheckUtils]: 60: Hoare triple {2310#true} call #t~ret1153 := ldv_undef_int(); {2310#true} is VALID [2022-02-20 22:36:47,021 INFO L290 TraceCheckUtils]: 61: Hoare triple {2310#true} havoc ~tmp~106;assume -2147483648 <= #t~nondet1164 && #t~nondet1164 <= 2147483647;~tmp~106 := #t~nondet1164;havoc #t~nondet1164;#res := ~tmp~106; {2310#true} is VALID [2022-02-20 22:36:47,021 INFO L290 TraceCheckUtils]: 62: Hoare triple {2310#true} assume true; {2310#true} is VALID [2022-02-20 22:36:47,021 INFO L284 TraceCheckUtils]: 63: Hoare quadruple {2310#true} {2310#true} #5505#return; {2310#true} is VALID [2022-02-20 22:36:47,021 INFO L290 TraceCheckUtils]: 64: Hoare triple {2310#true} assume -2147483648 <= #t~ret1153 && #t~ret1153 <= 2147483647;~tmp___1~18 := #t~ret1153;havoc #t~ret1153; {2310#true} is VALID [2022-02-20 22:36:47,021 INFO L290 TraceCheckUtils]: 65: Hoare triple {2310#true} assume !(0 != ~tmp___1~18);#res.base, #res.offset := 0, 0; {2310#true} is VALID [2022-02-20 22:36:47,021 INFO L290 TraceCheckUtils]: 66: Hoare triple {2310#true} assume true; {2310#true} is VALID [2022-02-20 22:36:47,022 INFO L284 TraceCheckUtils]: 67: Hoare quadruple {2310#true} {2310#true} #6085#return; {2310#true} is VALID [2022-02-20 22:36:47,022 INFO L290 TraceCheckUtils]: 68: Hoare triple {2310#true} ~ldv_2_resource_dev~0.base, ~ldv_2_resource_dev~0.offset := ldv_allocate_external_0_#t~ret1044#1.base, ldv_allocate_external_0_#t~ret1044#1.offset;havoc ldv_allocate_external_0_#t~ret1044#1.base, ldv_allocate_external_0_#t~ret1044#1.offset; {2310#true} is VALID [2022-02-20 22:36:47,022 INFO L290 TraceCheckUtils]: 69: Hoare triple {2310#true} assume { :end_inline_ldv_allocate_external_0 } true; {2310#true} is VALID [2022-02-20 22:36:47,022 INFO L290 TraceCheckUtils]: 70: Hoare triple {2310#true} assume { :end_inline_ldv_initialize_external_data } true;~ldv_statevar_11~0 := 7;~ldv_statevar_0~0 := 6;~ldv_statevar_1~0 := 5;~ldv_2_ret_default~0 := 1;~ldv_statevar_2~0 := 20; {2366#(= 5 ~ldv_statevar_1~0)} is VALID [2022-02-20 22:36:47,023 INFO L272 TraceCheckUtils]: 71: Hoare triple {2366#(= 5 ~ldv_statevar_1~0)} call main_#t~ret1055#1 := ldv_undef_int(); {2310#true} is VALID [2022-02-20 22:36:47,023 INFO L290 TraceCheckUtils]: 72: Hoare triple {2310#true} havoc ~tmp~106;assume -2147483648 <= #t~nondet1164 && #t~nondet1164 <= 2147483647;~tmp~106 := #t~nondet1164;havoc #t~nondet1164;#res := ~tmp~106; {2310#true} is VALID [2022-02-20 22:36:47,023 INFO L290 TraceCheckUtils]: 73: Hoare triple {2310#true} assume true; {2310#true} is VALID [2022-02-20 22:36:47,023 INFO L284 TraceCheckUtils]: 74: Hoare quadruple {2310#true} {2366#(= 5 ~ldv_statevar_1~0)} #6087#return; {2366#(= 5 ~ldv_statevar_1~0)} is VALID [2022-02-20 22:36:47,024 INFO L290 TraceCheckUtils]: 75: Hoare triple {2366#(= 5 ~ldv_statevar_1~0)} assume -2147483648 <= main_#t~ret1055#1 && main_#t~ret1055#1 <= 2147483647;main_~tmp~74#1 := main_#t~ret1055#1;havoc main_#t~ret1055#1; {2366#(= 5 ~ldv_statevar_1~0)} is VALID [2022-02-20 22:36:47,024 INFO L290 TraceCheckUtils]: 76: Hoare triple {2366#(= 5 ~ldv_statevar_1~0)} assume !(0 == main_~tmp~74#1); {2366#(= 5 ~ldv_statevar_1~0)} is VALID [2022-02-20 22:36:47,024 INFO L290 TraceCheckUtils]: 77: Hoare triple {2366#(= 5 ~ldv_statevar_1~0)} assume !(1 == main_~tmp~74#1); {2366#(= 5 ~ldv_statevar_1~0)} is VALID [2022-02-20 22:36:47,025 INFO L290 TraceCheckUtils]: 78: Hoare triple {2366#(= 5 ~ldv_statevar_1~0)} assume 2 == main_~tmp~74#1; {2366#(= 5 ~ldv_statevar_1~0)} is VALID [2022-02-20 22:36:47,025 INFO L290 TraceCheckUtils]: 79: Hoare triple {2366#(= 5 ~ldv_statevar_1~0)} assume { :begin_inline_ldv_net_dummy_resourceless_instance_1 } true;ldv_net_dummy_resourceless_instance_1_#in~arg0#1.base, ldv_net_dummy_resourceless_instance_1_#in~arg0#1.offset := 0, 0;havoc ldv_net_dummy_resourceless_instance_1_#t~ret1062#1, ldv_net_dummy_resourceless_instance_1_#t~ret1063#1, ldv_net_dummy_resourceless_instance_1_~arg0#1.base, ldv_net_dummy_resourceless_instance_1_~arg0#1.offset;ldv_net_dummy_resourceless_instance_1_~arg0#1.base, ldv_net_dummy_resourceless_instance_1_~arg0#1.offset := ldv_net_dummy_resourceless_instance_1_#in~arg0#1.base, ldv_net_dummy_resourceless_instance_1_#in~arg0#1.offset; {2366#(= 5 ~ldv_statevar_1~0)} is VALID [2022-02-20 22:36:47,025 INFO L290 TraceCheckUtils]: 80: Hoare triple {2366#(= 5 ~ldv_statevar_1~0)} assume !(1 == ~ldv_statevar_1~0); {2366#(= 5 ~ldv_statevar_1~0)} is VALID [2022-02-20 22:36:47,026 INFO L290 TraceCheckUtils]: 81: Hoare triple {2366#(= 5 ~ldv_statevar_1~0)} assume !(2 == ~ldv_statevar_1~0); {2366#(= 5 ~ldv_statevar_1~0)} is VALID [2022-02-20 22:36:47,026 INFO L290 TraceCheckUtils]: 82: Hoare triple {2366#(= 5 ~ldv_statevar_1~0)} assume !(3 == ~ldv_statevar_1~0); {2366#(= 5 ~ldv_statevar_1~0)} is VALID [2022-02-20 22:36:47,026 INFO L290 TraceCheckUtils]: 83: Hoare triple {2366#(= 5 ~ldv_statevar_1~0)} assume !(4 == ~ldv_statevar_1~0); {2366#(= 5 ~ldv_statevar_1~0)} is VALID [2022-02-20 22:36:47,027 INFO L290 TraceCheckUtils]: 84: Hoare triple {2366#(= 5 ~ldv_statevar_1~0)} assume !(5 == ~ldv_statevar_1~0); {2311#false} is VALID [2022-02-20 22:36:47,027 INFO L290 TraceCheckUtils]: 85: Hoare triple {2311#false} assume !(7 == ~ldv_statevar_1~0); {2311#false} is VALID [2022-02-20 22:36:47,027 INFO L290 TraceCheckUtils]: 86: Hoare triple {2311#false} assume 9 == ~ldv_statevar_1~0; {2311#false} is VALID [2022-02-20 22:36:47,027 INFO L290 TraceCheckUtils]: 87: Hoare triple {2311#false} assume { :begin_inline_ldv_dummy_resourceless_instance_callback_1_8 } true;ldv_dummy_resourceless_instance_callback_1_8_#in~arg0#1.base, ldv_dummy_resourceless_instance_callback_1_8_#in~arg0#1.offset, ldv_dummy_resourceless_instance_callback_1_8_#in~arg1#1.base, ldv_dummy_resourceless_instance_callback_1_8_#in~arg1#1.offset, ldv_dummy_resourceless_instance_callback_1_8_#in~arg2#1 := ~ldv_1_callback_ndo_change_mtu~0.base, ~ldv_1_callback_ndo_change_mtu~0.offset, ~ldv_1_container_net_device~0.base, ~ldv_1_container_net_device~0.offset, ~ldv_1_ldv_param_8_1_default~0;havoc ldv_dummy_resourceless_instance_callback_1_8_#t~ret1051#1, ldv_dummy_resourceless_instance_callback_1_8_~arg0#1.base, ldv_dummy_resourceless_instance_callback_1_8_~arg0#1.offset, ldv_dummy_resourceless_instance_callback_1_8_~arg1#1.base, ldv_dummy_resourceless_instance_callback_1_8_~arg1#1.offset, ldv_dummy_resourceless_instance_callback_1_8_~arg2#1;ldv_dummy_resourceless_instance_callback_1_8_~arg0#1.base, ldv_dummy_resourceless_instance_callback_1_8_~arg0#1.offset := ldv_dummy_resourceless_instance_callback_1_8_#in~arg0#1.base, ldv_dummy_resourceless_instance_callback_1_8_#in~arg0#1.offset;ldv_dummy_resourceless_instance_callback_1_8_~arg1#1.base, ldv_dummy_resourceless_instance_callback_1_8_~arg1#1.offset := ldv_dummy_resourceless_instance_callback_1_8_#in~arg1#1.base, ldv_dummy_resourceless_instance_callback_1_8_#in~arg1#1.offset;ldv_dummy_resourceless_instance_callback_1_8_~arg2#1 := ldv_dummy_resourceless_instance_callback_1_8_#in~arg2#1;assume { :begin_inline_ace_change_mtu } true;ace_change_mtu_#in~dev#1.base, ace_change_mtu_#in~dev#1.offset, ace_change_mtu_#in~new_mtu#1 := ldv_dummy_resourceless_instance_callback_1_8_~arg1#1.base, ldv_dummy_resourceless_instance_callback_1_8_~arg1#1.offset, ldv_dummy_resourceless_instance_callback_1_8_~arg2#1;havoc ace_change_mtu_#res#1;havoc ace_change_mtu_#t~ret841#1.base, ace_change_mtu_#t~ret841#1.offset, ace_change_mtu_#t~mem842#1.base, ace_change_mtu_#t~mem842#1.offset, ace_change_mtu_#t~mem843#1, ace_change_mtu_#t~nondet844#1, ace_change_mtu_#t~ret845#1, ace_change_mtu_#t~ret846#1, ace_change_mtu_#t~mem847#1, ace_change_mtu_#t~mem848#1, ace_change_mtu_~dev#1.base, ace_change_mtu_~dev#1.offset, ace_change_mtu_~new_mtu#1, ace_change_mtu_~ap~21#1.base, ace_change_mtu_~ap~21#1.offset, ace_change_mtu_~tmp~58#1.base, ace_change_mtu_~tmp~58#1.offset, ace_change_mtu_~regs~13#1.base, ace_change_mtu_~regs~13#1.offset, ace_change_mtu_~tmp___0~26#1, ace_change_mtu_~tmp___1~12#1, ace_change_mtu_~#cmd~2#1.base, ace_change_mtu_~#cmd~2#1.offset;ace_change_mtu_~dev#1.base, ace_change_mtu_~dev#1.offset := ace_change_mtu_#in~dev#1.base, ace_change_mtu_#in~dev#1.offset;ace_change_mtu_~new_mtu#1 := ace_change_mtu_#in~new_mtu#1;havoc ace_change_mtu_~ap~21#1.base, ace_change_mtu_~ap~21#1.offset;havoc ace_change_mtu_~tmp~58#1.base, ace_change_mtu_~tmp~58#1.offset;havoc ace_change_mtu_~regs~13#1.base, ace_change_mtu_~regs~13#1.offset;havoc ace_change_mtu_~tmp___0~26#1;havoc ace_change_mtu_~tmp___1~12#1;call ace_change_mtu_~#cmd~2#1.base, ace_change_mtu_~#cmd~2#1.offset := #Ultimate.allocOnStack(12); {2311#false} is VALID [2022-02-20 22:36:47,027 INFO L272 TraceCheckUtils]: 88: Hoare triple {2311#false} call ace_change_mtu_#t~ret841#1.base, ace_change_mtu_#t~ret841#1.offset := netdev_priv(ace_change_mtu_~dev#1.base, ace_change_mtu_~dev#1.offset); {2310#true} is VALID [2022-02-20 22:36:47,027 INFO L290 TraceCheckUtils]: 89: Hoare triple {2310#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3200 + ~dev.offset; {2310#true} is VALID [2022-02-20 22:36:47,028 INFO L290 TraceCheckUtils]: 90: Hoare triple {2310#true} assume true; {2310#true} is VALID [2022-02-20 22:36:47,028 INFO L284 TraceCheckUtils]: 91: Hoare quadruple {2310#true} {2311#false} #6227#return; {2311#false} is VALID [2022-02-20 22:36:47,028 INFO L290 TraceCheckUtils]: 92: Hoare triple {2311#false} ace_change_mtu_~tmp~58#1.base, ace_change_mtu_~tmp~58#1.offset := ace_change_mtu_#t~ret841#1.base, ace_change_mtu_#t~ret841#1.offset;havoc ace_change_mtu_#t~ret841#1.base, ace_change_mtu_#t~ret841#1.offset;ace_change_mtu_~ap~21#1.base, ace_change_mtu_~ap~21#1.offset := ace_change_mtu_~tmp~58#1.base, ace_change_mtu_~tmp~58#1.offset;call ace_change_mtu_#t~mem842#1.base, ace_change_mtu_#t~mem842#1.offset := read~$Pointer$(ace_change_mtu_~ap~21#1.base, 8 + ace_change_mtu_~ap~21#1.offset, 8);ace_change_mtu_~regs~13#1.base, ace_change_mtu_~regs~13#1.offset := ace_change_mtu_#t~mem842#1.base, ace_change_mtu_#t~mem842#1.offset;havoc ace_change_mtu_#t~mem842#1.base, ace_change_mtu_#t~mem842#1.offset; {2311#false} is VALID [2022-02-20 22:36:47,028 INFO L290 TraceCheckUtils]: 93: Hoare triple {2311#false} assume !(ace_change_mtu_~new_mtu#1 > 9000); {2311#false} is VALID [2022-02-20 22:36:47,028 INFO L272 TraceCheckUtils]: 94: Hoare triple {2311#false} call writel(18 + ace_change_mtu_~new_mtu#1, ace_change_mtu_~regs~13#1.base, 1632 + ace_change_mtu_~regs~13#1.offset); {2310#true} is VALID [2022-02-20 22:36:47,028 INFO L290 TraceCheckUtils]: 95: Hoare triple {2310#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {2310#true} is VALID [2022-02-20 22:36:47,029 INFO L290 TraceCheckUtils]: 96: Hoare triple {2310#true} assume true; {2310#true} is VALID [2022-02-20 22:36:47,029 INFO L284 TraceCheckUtils]: 97: Hoare quadruple {2310#true} {2311#false} #6229#return; {2311#false} is VALID [2022-02-20 22:36:47,029 INFO L290 TraceCheckUtils]: 98: Hoare triple {2311#false} call write~int(ace_change_mtu_~new_mtu#1, ace_change_mtu_~dev#1.base, 516 + ace_change_mtu_~dev#1.offset, 4); {2311#false} is VALID [2022-02-20 22:36:47,029 INFO L290 TraceCheckUtils]: 99: Hoare triple {2311#false} assume ace_change_mtu_~new_mtu#1 > 1500;call ace_change_mtu_#t~mem843#1 := read~int(ace_change_mtu_~ap~21#1.base, 156 + ace_change_mtu_~ap~21#1.offset, 4); {2311#false} is VALID [2022-02-20 22:36:47,029 INFO L290 TraceCheckUtils]: 100: Hoare triple {2311#false} assume 0 == ace_change_mtu_#t~mem843#1;havoc ace_change_mtu_#t~mem843#1;havoc ace_change_mtu_#t~nondet844#1;call write~int(1, ace_change_mtu_~ap~21#1.base, 156 + ace_change_mtu_~ap~21#1.offset, 4); {2311#false} is VALID [2022-02-20 22:36:47,029 INFO L272 TraceCheckUtils]: 101: Hoare triple {2311#false} call ace_change_mtu_#t~ret845#1 := test_and_set_bit(0, ace_change_mtu_~ap~21#1.base, 84 + ace_change_mtu_~ap~21#1.offset); {2310#true} is VALID [2022-02-20 22:36:47,029 INFO L290 TraceCheckUtils]: 102: Hoare triple {2310#true} ~nr := #in~nr;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;#res := 0; {2310#true} is VALID [2022-02-20 22:36:47,030 INFO L290 TraceCheckUtils]: 103: Hoare triple {2310#true} assume true; {2310#true} is VALID [2022-02-20 22:36:47,030 INFO L284 TraceCheckUtils]: 104: Hoare quadruple {2310#true} {2311#false} #6231#return; {2311#false} is VALID [2022-02-20 22:36:47,030 INFO L290 TraceCheckUtils]: 105: Hoare triple {2311#false} assume -2147483648 <= ace_change_mtu_#t~ret845#1 && ace_change_mtu_#t~ret845#1 <= 2147483647;ace_change_mtu_~tmp___0~26#1 := ace_change_mtu_#t~ret845#1;havoc ace_change_mtu_#t~ret845#1; {2311#false} is VALID [2022-02-20 22:36:47,030 INFO L290 TraceCheckUtils]: 106: Hoare triple {2311#false} assume 0 == ace_change_mtu_~tmp___0~26#1; {2311#false} is VALID [2022-02-20 22:36:47,030 INFO L272 TraceCheckUtils]: 107: Hoare triple {2311#false} call ace_load_jumbo_rx_ring(ace_change_mtu_~dev#1.base, ace_change_mtu_~dev#1.offset, 48); {2311#false} is VALID [2022-02-20 22:36:47,030 INFO L290 TraceCheckUtils]: 108: Hoare triple {2311#false} ~dev#1.base, ~dev#1.offset := #in~dev#1.base, #in~dev#1.offset;~nr_bufs#1 := #in~nr_bufs#1;havoc ~ap~13#1.base, ~ap~13#1.offset;havoc ~tmp~49#1.base, ~tmp~49#1.offset;havoc ~regs~8#1.base, ~regs~8#1.offset;havoc ~i~4#1;havoc ~idx~3#1;havoc ~skb~4#1.base, ~skb~4#1.offset;havoc ~rd~2#1.base, ~rd~2#1.offset;havoc ~mapping~3#1;havoc ~tmp___0~18#1;havoc ~tmp___1~9#1; {2311#false} is VALID [2022-02-20 22:36:47,031 INFO L272 TraceCheckUtils]: 109: Hoare triple {2311#false} call #t~ret614#1.base, #t~ret614#1.offset := netdev_priv(~dev#1.base, ~dev#1.offset); {2310#true} is VALID [2022-02-20 22:36:47,031 INFO L290 TraceCheckUtils]: 110: Hoare triple {2310#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3200 + ~dev.offset; {2310#true} is VALID [2022-02-20 22:36:47,031 INFO L290 TraceCheckUtils]: 111: Hoare triple {2310#true} assume true; {2310#true} is VALID [2022-02-20 22:36:47,031 INFO L284 TraceCheckUtils]: 112: Hoare quadruple {2310#true} {2311#false} #5585#return; {2311#false} is VALID [2022-02-20 22:36:47,036 INFO L290 TraceCheckUtils]: 113: Hoare triple {2311#false} ~tmp~49#1.base, ~tmp~49#1.offset := #t~ret614#1.base, #t~ret614#1.offset;havoc #t~ret614#1.base, #t~ret614#1.offset;~ap~13#1.base, ~ap~13#1.offset := ~tmp~49#1.base, ~tmp~49#1.offset;call #t~mem615#1.base, #t~mem615#1.offset := read~$Pointer$(~ap~13#1.base, 8 + ~ap~13#1.offset, 8);~regs~8#1.base, ~regs~8#1.offset := #t~mem615#1.base, #t~mem615#1.offset;havoc #t~mem615#1.base, #t~mem615#1.offset;call #t~mem616#1 := read~int(~ap~13#1.base, 112 + ~ap~13#1.offset, 4);~idx~3#1 := (if #t~mem616#1 % 4294967296 % 65536 <= 32767 then #t~mem616#1 % 4294967296 % 65536 else #t~mem616#1 % 4294967296 % 65536 - 65536);havoc #t~mem616#1;~i~4#1 := 0; {2311#false} is VALID [2022-02-20 22:36:47,036 INFO L290 TraceCheckUtils]: 114: Hoare triple {2311#false} assume ~i~4#1 < ~nr_bufs#1; {2311#false} is VALID [2022-02-20 22:36:47,036 INFO L272 TraceCheckUtils]: 115: Hoare triple {2311#false} call #t~ret617#1.base, #t~ret617#1.offset := netdev_alloc_skb_ip_align(~dev#1.base, ~dev#1.offset, 9018); {2311#false} is VALID [2022-02-20 22:36:47,037 INFO L290 TraceCheckUtils]: 116: Hoare triple {2311#false} ~dev#1.base, ~dev#1.offset := #in~dev#1.base, #in~dev#1.offset;~length#1 := #in~length#1;havoc ~tmp~15#1.base, ~tmp~15#1.offset;assume { :begin_inline___netdev_alloc_skb_ip_align } true;__netdev_alloc_skb_ip_align_#in~dev#1.base, __netdev_alloc_skb_ip_align_#in~dev#1.offset, __netdev_alloc_skb_ip_align_#in~length#1, __netdev_alloc_skb_ip_align_#in~gfp#1 := ~dev#1.base, ~dev#1.offset, ~length#1, 32;havoc __netdev_alloc_skb_ip_align_#res#1.base, __netdev_alloc_skb_ip_align_#res#1.offset;havoc __netdev_alloc_skb_ip_align_#t~ret134#1.base, __netdev_alloc_skb_ip_align_#t~ret134#1.offset, __netdev_alloc_skb_ip_align_~dev#1.base, __netdev_alloc_skb_ip_align_~dev#1.offset, __netdev_alloc_skb_ip_align_~length#1, __netdev_alloc_skb_ip_align_~gfp#1, __netdev_alloc_skb_ip_align_~skb~0#1.base, __netdev_alloc_skb_ip_align_~skb~0#1.offset, __netdev_alloc_skb_ip_align_~tmp~14#1.base, __netdev_alloc_skb_ip_align_~tmp~14#1.offset;__netdev_alloc_skb_ip_align_~dev#1.base, __netdev_alloc_skb_ip_align_~dev#1.offset := __netdev_alloc_skb_ip_align_#in~dev#1.base, __netdev_alloc_skb_ip_align_#in~dev#1.offset;__netdev_alloc_skb_ip_align_~length#1 := __netdev_alloc_skb_ip_align_#in~length#1;__netdev_alloc_skb_ip_align_~gfp#1 := __netdev_alloc_skb_ip_align_#in~gfp#1;havoc __netdev_alloc_skb_ip_align_~skb~0#1.base, __netdev_alloc_skb_ip_align_~skb~0#1.offset;havoc __netdev_alloc_skb_ip_align_~tmp~14#1.base, __netdev_alloc_skb_ip_align_~tmp~14#1.offset;assume { :begin_inline_ldv___netdev_alloc_skb_59 } true;ldv___netdev_alloc_skb_59_#in~ldv_func_arg1#1.base, ldv___netdev_alloc_skb_59_#in~ldv_func_arg1#1.offset, ldv___netdev_alloc_skb_59_#in~ldv_func_arg2#1, ldv___netdev_alloc_skb_59_#in~flags#1 := __netdev_alloc_skb_ip_align_~dev#1.base, __netdev_alloc_skb_ip_align_~dev#1.offset, __netdev_alloc_skb_ip_align_~length#1, __netdev_alloc_skb_ip_align_~gfp#1;havoc ldv___netdev_alloc_skb_59_#res#1.base, ldv___netdev_alloc_skb_59_#res#1.offset;havoc ldv___netdev_alloc_skb_59_#t~ret1121#1.base, ldv___netdev_alloc_skb_59_#t~ret1121#1.offset, ldv___netdev_alloc_skb_59_~ldv_func_arg1#1.base, ldv___netdev_alloc_skb_59_~ldv_func_arg1#1.offset, ldv___netdev_alloc_skb_59_~ldv_func_arg2#1, ldv___netdev_alloc_skb_59_~flags#1, ldv___netdev_alloc_skb_59_~tmp~86#1.base, ldv___netdev_alloc_skb_59_~tmp~86#1.offset;ldv___netdev_alloc_skb_59_~ldv_func_arg1#1.base, ldv___netdev_alloc_skb_59_~ldv_func_arg1#1.offset := ldv___netdev_alloc_skb_59_#in~ldv_func_arg1#1.base, ldv___netdev_alloc_skb_59_#in~ldv_func_arg1#1.offset;ldv___netdev_alloc_skb_59_~ldv_func_arg2#1 := ldv___netdev_alloc_skb_59_#in~ldv_func_arg2#1;ldv___netdev_alloc_skb_59_~flags#1 := ldv___netdev_alloc_skb_59_#in~flags#1;havoc ldv___netdev_alloc_skb_59_~tmp~86#1.base, ldv___netdev_alloc_skb_59_~tmp~86#1.offset; {2311#false} is VALID [2022-02-20 22:36:47,037 INFO L272 TraceCheckUtils]: 117: Hoare triple {2311#false} call ldv_check_alloc_flags(ldv___netdev_alloc_skb_59_~flags#1); {2311#false} is VALID [2022-02-20 22:36:47,037 INFO L290 TraceCheckUtils]: 118: Hoare triple {2311#false} ~flags#1 := #in~flags#1;havoc ~tmp~93#1; {2311#false} is VALID [2022-02-20 22:36:47,037 INFO L290 TraceCheckUtils]: 119: Hoare triple {2311#false} assume 32 != ~flags#1 % 4294967296 && 0 != ~flags#1 % 4294967296; {2311#false} is VALID [2022-02-20 22:36:47,037 INFO L272 TraceCheckUtils]: 120: Hoare triple {2311#false} call #t~ret1132#1 := ldv_exclusive_spin_is_locked(); {2310#true} is VALID [2022-02-20 22:36:47,037 INFO L290 TraceCheckUtils]: 121: Hoare triple {2310#true} assume 2 == ~ldv_spin__xmit_lock_of_netdev_queue~0;#res := 1; {2310#true} is VALID [2022-02-20 22:36:47,037 INFO L290 TraceCheckUtils]: 122: Hoare triple {2310#true} assume true; {2310#true} is VALID [2022-02-20 22:36:47,037 INFO L284 TraceCheckUtils]: 123: Hoare quadruple {2310#true} {2311#false} #5523#return; {2311#false} is VALID [2022-02-20 22:36:47,037 INFO L290 TraceCheckUtils]: 124: Hoare triple {2311#false} assume -2147483648 <= #t~ret1132#1 && #t~ret1132#1 <= 2147483647;~tmp~93#1 := #t~ret1132#1;havoc #t~ret1132#1;assume { :begin_inline_ldv_assert_linux_alloc_spinlock__wrong_flags } true;ldv_assert_linux_alloc_spinlock__wrong_flags_#in~expr#1 := (if 0 == ~tmp~93#1 then 1 else 0);havoc ldv_assert_linux_alloc_spinlock__wrong_flags_~expr#1;ldv_assert_linux_alloc_spinlock__wrong_flags_~expr#1 := ldv_assert_linux_alloc_spinlock__wrong_flags_#in~expr#1; {2311#false} is VALID [2022-02-20 22:36:47,037 INFO L290 TraceCheckUtils]: 125: Hoare triple {2311#false} assume 0 == ldv_assert_linux_alloc_spinlock__wrong_flags_~expr#1; {2311#false} is VALID [2022-02-20 22:36:47,037 INFO L290 TraceCheckUtils]: 126: Hoare triple {2311#false} assume !false; {2311#false} is VALID [2022-02-20 22:36:47,038 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 156 trivial. 0 not checked. [2022-02-20 22:36:47,038 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:36:47,039 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [641413833] [2022-02-20 22:36:47,039 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [641413833] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:36:47,039 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 22:36:47,039 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-02-20 22:36:47,040 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [609182293] [2022-02-20 22:36:47,041 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:36:47,047 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 13.5) internal successors, (54), 3 states have internal predecessors, (54), 3 states have call successors, (16), 3 states have call predecessors, (16), 1 states have return successors, (13), 3 states have call predecessors, (13), 3 states have call successors, (13) Word has length 127 [2022-02-20 22:36:47,049 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:36:47,052 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 13.5) internal successors, (54), 3 states have internal predecessors, (54), 3 states have call successors, (16), 3 states have call predecessors, (16), 1 states have return successors, (13), 3 states have call predecessors, (13), 3 states have call successors, (13) [2022-02-20 22:36:47,163 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 83 edges. 83 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:36:47,163 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-02-20 22:36:47,163 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:36:47,183 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-02-20 22:36:47,184 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-02-20 22:36:47,196 INFO L87 Difference]: Start difference. First operand has 2307 states, 1613 states have (on average 1.4153750774953502) internal successors, (2283), 1675 states have internal predecessors, (2283), 600 states have call successors, (600), 94 states have call predecessors, (600), 93 states have return successors, (595), 580 states have call predecessors, (595), 595 states have call successors, (595) Second operand has 4 states, 4 states have (on average 13.5) internal successors, (54), 3 states have internal predecessors, (54), 3 states have call successors, (16), 3 states have call predecessors, (16), 1 states have return successors, (13), 3 states have call predecessors, (13), 3 states have call successors, (13) [2022-02-20 22:37:06,867 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:37:06,867 INFO L93 Difference]: Finished difference Result 6554 states and 10080 transitions. [2022-02-20 22:37:06,868 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-02-20 22:37:06,869 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 13.5) internal successors, (54), 3 states have internal predecessors, (54), 3 states have call successors, (16), 3 states have call predecessors, (16), 1 states have return successors, (13), 3 states have call predecessors, (13), 3 states have call successors, (13) Word has length 127 [2022-02-20 22:37:06,869 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 22:37:06,870 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 13.5) internal successors, (54), 3 states have internal predecessors, (54), 3 states have call successors, (16), 3 states have call predecessors, (16), 1 states have return successors, (13), 3 states have call predecessors, (13), 3 states have call successors, (13) [2022-02-20 22:37:07,378 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 10080 transitions. [2022-02-20 22:37:07,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 13.5) internal successors, (54), 3 states have internal predecessors, (54), 3 states have call successors, (16), 3 states have call predecessors, (16), 1 states have return successors, (13), 3 states have call predecessors, (13), 3 states have call successors, (13) [2022-02-20 22:37:07,851 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 10080 transitions. [2022-02-20 22:37:07,851 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 10080 transitions. [2022-02-20 22:37:15,040 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 10080 edges. 10080 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:37:15,932 INFO L225 Difference]: With dead ends: 6554 [2022-02-20 22:37:15,932 INFO L226 Difference]: Without dead ends: 4187 [2022-02-20 22:37:15,954 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 38 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-02-20 22:37:15,957 INFO L933 BasicCegarLoop]: 3410 mSDtfsCounter, 3386 mSDsluCounter, 3095 mSDsCounter, 0 mSdLazyCounter, 2642 mSolverCounterSat, 1801 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 4.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3896 SdHoareTripleChecker+Valid, 6505 SdHoareTripleChecker+Invalid, 4443 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 1801 IncrementalHoareTripleChecker+Valid, 2642 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.8s IncrementalHoareTripleChecker+Time [2022-02-20 22:37:15,958 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [3896 Valid, 6505 Invalid, 4443 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [1801 Valid, 2642 Invalid, 0 Unknown, 0 Unchecked, 4.8s Time] [2022-02-20 22:37:15,977 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4187 states. [2022-02-20 22:37:16,219 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4187 to 4049. [2022-02-20 22:37:16,219 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 22:37:16,238 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4187 states. Second operand has 4049 states, 2823 states have (on average 1.2883457314913214) internal successors, (3637), 2930 states have internal predecessors, (3637), 1051 states have call successors, (1051), 174 states have call predecessors, (1051), 174 states have return successors, (1053), 1023 states have call predecessors, (1053), 1051 states have call successors, (1053) [2022-02-20 22:37:16,252 INFO L74 IsIncluded]: Start isIncluded. First operand 4187 states. Second operand has 4049 states, 2823 states have (on average 1.2883457314913214) internal successors, (3637), 2930 states have internal predecessors, (3637), 1051 states have call successors, (1051), 174 states have call predecessors, (1051), 174 states have return successors, (1053), 1023 states have call predecessors, (1053), 1051 states have call successors, (1053) [2022-02-20 22:37:16,263 INFO L87 Difference]: Start difference. First operand 4187 states. Second operand has 4049 states, 2823 states have (on average 1.2883457314913214) internal successors, (3637), 2930 states have internal predecessors, (3637), 1051 states have call successors, (1051), 174 states have call predecessors, (1051), 174 states have return successors, (1053), 1023 states have call predecessors, (1053), 1051 states have call successors, (1053) [2022-02-20 22:37:16,830 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:37:16,831 INFO L93 Difference]: Finished difference Result 4187 states and 5971 transitions. [2022-02-20 22:37:16,831 INFO L276 IsEmpty]: Start isEmpty. Operand 4187 states and 5971 transitions. [2022-02-20 22:37:16,853 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:37:16,853 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:37:16,876 INFO L74 IsIncluded]: Start isIncluded. First operand has 4049 states, 2823 states have (on average 1.2883457314913214) internal successors, (3637), 2930 states have internal predecessors, (3637), 1051 states have call successors, (1051), 174 states have call predecessors, (1051), 174 states have return successors, (1053), 1023 states have call predecessors, (1053), 1051 states have call successors, (1053) Second operand 4187 states. [2022-02-20 22:37:16,887 INFO L87 Difference]: Start difference. First operand has 4049 states, 2823 states have (on average 1.2883457314913214) internal successors, (3637), 2930 states have internal predecessors, (3637), 1051 states have call successors, (1051), 174 states have call predecessors, (1051), 174 states have return successors, (1053), 1023 states have call predecessors, (1053), 1051 states have call successors, (1053) Second operand 4187 states. [2022-02-20 22:37:17,443 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:37:17,443 INFO L93 Difference]: Finished difference Result 4187 states and 5971 transitions. [2022-02-20 22:37:17,444 INFO L276 IsEmpty]: Start isEmpty. Operand 4187 states and 5971 transitions. [2022-02-20 22:37:17,462 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:37:17,463 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:37:17,463 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 22:37:17,463 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 22:37:17,472 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4049 states, 2823 states have (on average 1.2883457314913214) internal successors, (3637), 2930 states have internal predecessors, (3637), 1051 states have call successors, (1051), 174 states have call predecessors, (1051), 174 states have return successors, (1053), 1023 states have call predecessors, (1053), 1051 states have call successors, (1053) [2022-02-20 22:37:18,210 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4049 states to 4049 states and 5741 transitions. [2022-02-20 22:37:18,213 INFO L78 Accepts]: Start accepts. Automaton has 4049 states and 5741 transitions. Word has length 127 [2022-02-20 22:37:18,215 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 22:37:18,215 INFO L470 AbstractCegarLoop]: Abstraction has 4049 states and 5741 transitions. [2022-02-20 22:37:18,216 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 13.5) internal successors, (54), 3 states have internal predecessors, (54), 3 states have call successors, (16), 3 states have call predecessors, (16), 1 states have return successors, (13), 3 states have call predecessors, (13), 3 states have call successors, (13) [2022-02-20 22:37:18,216 INFO L276 IsEmpty]: Start isEmpty. Operand 4049 states and 5741 transitions. [2022-02-20 22:37:18,225 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 173 [2022-02-20 22:37:18,225 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:37:18,225 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 6, 6, 6, 6, 6, 6, 5, 5, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:37:18,226 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-02-20 22:37:18,226 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ldv_check_alloc_flagsErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_check_alloc_flagsErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:37:18,226 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:37:18,226 INFO L85 PathProgramCache]: Analyzing trace with hash -1586781016, now seen corresponding path program 1 times [2022-02-20 22:37:18,227 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:37:18,227 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1938295448] [2022-02-20 22:37:18,227 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:37:18,227 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:37:18,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:37:18,457 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-02-20 22:37:18,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:37:18,466 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:37:18,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:37:18,473 INFO L290 TraceCheckUtils]: 0: Hoare triple {25932#true} havoc ~tmp~106;assume -2147483648 <= #t~nondet1164 && #t~nondet1164 <= 2147483647;~tmp~106 := #t~nondet1164;havoc #t~nondet1164;#res := ~tmp~106; {25932#true} is VALID [2022-02-20 22:37:18,473 INFO L290 TraceCheckUtils]: 1: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,473 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {25932#true} {25932#true} #5505#return; {25932#true} is VALID [2022-02-20 22:37:18,474 INFO L290 TraceCheckUtils]: 0: Hoare triple {26043#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~2.base, ~res~2.offset;havoc ~tmp~101.base, ~tmp~101.offset;havoc ~tmp___0~42;havoc ~tmp___1~18; {25932#true} is VALID [2022-02-20 22:37:18,474 INFO L272 TraceCheckUtils]: 1: Hoare triple {25932#true} call #t~ret1153 := ldv_undef_int(); {25932#true} is VALID [2022-02-20 22:37:18,474 INFO L290 TraceCheckUtils]: 2: Hoare triple {25932#true} havoc ~tmp~106;assume -2147483648 <= #t~nondet1164 && #t~nondet1164 <= 2147483647;~tmp~106 := #t~nondet1164;havoc #t~nondet1164;#res := ~tmp~106; {25932#true} is VALID [2022-02-20 22:37:18,474 INFO L290 TraceCheckUtils]: 3: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,474 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {25932#true} {25932#true} #5505#return; {25932#true} is VALID [2022-02-20 22:37:18,475 INFO L290 TraceCheckUtils]: 5: Hoare triple {25932#true} assume -2147483648 <= #t~ret1153 && #t~ret1153 <= 2147483647;~tmp___1~18 := #t~ret1153;havoc #t~ret1153; {25932#true} is VALID [2022-02-20 22:37:18,475 INFO L290 TraceCheckUtils]: 6: Hoare triple {25932#true} assume !(0 != ~tmp___1~18);#res.base, #res.offset := 0, 0; {25932#true} is VALID [2022-02-20 22:37:18,475 INFO L290 TraceCheckUtils]: 7: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,475 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {25932#true} {25932#true} #6075#return; {25932#true} is VALID [2022-02-20 22:37:18,476 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2022-02-20 22:37:18,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:37:18,497 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:37:18,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:37:18,504 INFO L290 TraceCheckUtils]: 0: Hoare triple {25932#true} havoc ~tmp~106;assume -2147483648 <= #t~nondet1164 && #t~nondet1164 <= 2147483647;~tmp~106 := #t~nondet1164;havoc #t~nondet1164;#res := ~tmp~106; {25932#true} is VALID [2022-02-20 22:37:18,505 INFO L290 TraceCheckUtils]: 1: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,505 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {25932#true} {25932#true} #5505#return; {25932#true} is VALID [2022-02-20 22:37:18,505 INFO L290 TraceCheckUtils]: 0: Hoare triple {26043#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~2.base, ~res~2.offset;havoc ~tmp~101.base, ~tmp~101.offset;havoc ~tmp___0~42;havoc ~tmp___1~18; {25932#true} is VALID [2022-02-20 22:37:18,505 INFO L272 TraceCheckUtils]: 1: Hoare triple {25932#true} call #t~ret1153 := ldv_undef_int(); {25932#true} is VALID [2022-02-20 22:37:18,505 INFO L290 TraceCheckUtils]: 2: Hoare triple {25932#true} havoc ~tmp~106;assume -2147483648 <= #t~nondet1164 && #t~nondet1164 <= 2147483647;~tmp~106 := #t~nondet1164;havoc #t~nondet1164;#res := ~tmp~106; {25932#true} is VALID [2022-02-20 22:37:18,506 INFO L290 TraceCheckUtils]: 3: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,506 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {25932#true} {25932#true} #5505#return; {25932#true} is VALID [2022-02-20 22:37:18,506 INFO L290 TraceCheckUtils]: 5: Hoare triple {25932#true} assume -2147483648 <= #t~ret1153 && #t~ret1153 <= 2147483647;~tmp___1~18 := #t~ret1153;havoc #t~ret1153; {25932#true} is VALID [2022-02-20 22:37:18,506 INFO L290 TraceCheckUtils]: 6: Hoare triple {25932#true} assume !(0 != ~tmp___1~18);#res.base, #res.offset := 0, 0; {25932#true} is VALID [2022-02-20 22:37:18,510 INFO L290 TraceCheckUtils]: 7: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,511 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {25932#true} {25932#true} #6077#return; {25932#true} is VALID [2022-02-20 22:37:18,511 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 25 [2022-02-20 22:37:18,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:37:18,520 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:37:18,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:37:18,526 INFO L290 TraceCheckUtils]: 0: Hoare triple {25932#true} havoc ~tmp~106;assume -2147483648 <= #t~nondet1164 && #t~nondet1164 <= 2147483647;~tmp~106 := #t~nondet1164;havoc #t~nondet1164;#res := ~tmp~106; {25932#true} is VALID [2022-02-20 22:37:18,528 INFO L290 TraceCheckUtils]: 1: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,530 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {25932#true} {25932#true} #5505#return; {25932#true} is VALID [2022-02-20 22:37:18,532 INFO L290 TraceCheckUtils]: 0: Hoare triple {26043#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~2.base, ~res~2.offset;havoc ~tmp~101.base, ~tmp~101.offset;havoc ~tmp___0~42;havoc ~tmp___1~18; {25932#true} is VALID [2022-02-20 22:37:18,532 INFO L272 TraceCheckUtils]: 1: Hoare triple {25932#true} call #t~ret1153 := ldv_undef_int(); {25932#true} is VALID [2022-02-20 22:37:18,532 INFO L290 TraceCheckUtils]: 2: Hoare triple {25932#true} havoc ~tmp~106;assume -2147483648 <= #t~nondet1164 && #t~nondet1164 <= 2147483647;~tmp~106 := #t~nondet1164;havoc #t~nondet1164;#res := ~tmp~106; {25932#true} is VALID [2022-02-20 22:37:18,532 INFO L290 TraceCheckUtils]: 3: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,535 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {25932#true} {25932#true} #5505#return; {25932#true} is VALID [2022-02-20 22:37:18,536 INFO L290 TraceCheckUtils]: 5: Hoare triple {25932#true} assume -2147483648 <= #t~ret1153 && #t~ret1153 <= 2147483647;~tmp___1~18 := #t~ret1153;havoc #t~ret1153; {25932#true} is VALID [2022-02-20 22:37:18,536 INFO L290 TraceCheckUtils]: 6: Hoare triple {25932#true} assume !(0 != ~tmp___1~18);#res.base, #res.offset := 0, 0; {25932#true} is VALID [2022-02-20 22:37:18,536 INFO L290 TraceCheckUtils]: 7: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,537 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {25932#true} {25932#true} #6079#return; {25932#true} is VALID [2022-02-20 22:37:18,537 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 36 [2022-02-20 22:37:18,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:37:18,546 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:37:18,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:37:18,555 INFO L290 TraceCheckUtils]: 0: Hoare triple {25932#true} havoc ~tmp~106;assume -2147483648 <= #t~nondet1164 && #t~nondet1164 <= 2147483647;~tmp~106 := #t~nondet1164;havoc #t~nondet1164;#res := ~tmp~106; {25932#true} is VALID [2022-02-20 22:37:18,556 INFO L290 TraceCheckUtils]: 1: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,558 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {25932#true} {25932#true} #5505#return; {25932#true} is VALID [2022-02-20 22:37:18,558 INFO L290 TraceCheckUtils]: 0: Hoare triple {26043#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~2.base, ~res~2.offset;havoc ~tmp~101.base, ~tmp~101.offset;havoc ~tmp___0~42;havoc ~tmp___1~18; {25932#true} is VALID [2022-02-20 22:37:18,558 INFO L272 TraceCheckUtils]: 1: Hoare triple {25932#true} call #t~ret1153 := ldv_undef_int(); {25932#true} is VALID [2022-02-20 22:37:18,558 INFO L290 TraceCheckUtils]: 2: Hoare triple {25932#true} havoc ~tmp~106;assume -2147483648 <= #t~nondet1164 && #t~nondet1164 <= 2147483647;~tmp~106 := #t~nondet1164;havoc #t~nondet1164;#res := ~tmp~106; {25932#true} is VALID [2022-02-20 22:37:18,558 INFO L290 TraceCheckUtils]: 3: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,559 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {25932#true} {25932#true} #5505#return; {25932#true} is VALID [2022-02-20 22:37:18,559 INFO L290 TraceCheckUtils]: 5: Hoare triple {25932#true} assume -2147483648 <= #t~ret1153 && #t~ret1153 <= 2147483647;~tmp___1~18 := #t~ret1153;havoc #t~ret1153; {25932#true} is VALID [2022-02-20 22:37:18,559 INFO L290 TraceCheckUtils]: 6: Hoare triple {25932#true} assume !(0 != ~tmp___1~18);#res.base, #res.offset := 0, 0; {25932#true} is VALID [2022-02-20 22:37:18,559 INFO L290 TraceCheckUtils]: 7: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,559 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {25932#true} {25932#true} #6081#return; {25932#true} is VALID [2022-02-20 22:37:18,559 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 47 [2022-02-20 22:37:18,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:37:18,573 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:37:18,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:37:18,578 INFO L290 TraceCheckUtils]: 0: Hoare triple {25932#true} havoc ~tmp~106;assume -2147483648 <= #t~nondet1164 && #t~nondet1164 <= 2147483647;~tmp~106 := #t~nondet1164;havoc #t~nondet1164;#res := ~tmp~106; {25932#true} is VALID [2022-02-20 22:37:18,579 INFO L290 TraceCheckUtils]: 1: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,579 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {25932#true} {25932#true} #5505#return; {25932#true} is VALID [2022-02-20 22:37:18,579 INFO L290 TraceCheckUtils]: 0: Hoare triple {26043#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~2.base, ~res~2.offset;havoc ~tmp~101.base, ~tmp~101.offset;havoc ~tmp___0~42;havoc ~tmp___1~18; {25932#true} is VALID [2022-02-20 22:37:18,579 INFO L272 TraceCheckUtils]: 1: Hoare triple {25932#true} call #t~ret1153 := ldv_undef_int(); {25932#true} is VALID [2022-02-20 22:37:18,579 INFO L290 TraceCheckUtils]: 2: Hoare triple {25932#true} havoc ~tmp~106;assume -2147483648 <= #t~nondet1164 && #t~nondet1164 <= 2147483647;~tmp~106 := #t~nondet1164;havoc #t~nondet1164;#res := ~tmp~106; {25932#true} is VALID [2022-02-20 22:37:18,579 INFO L290 TraceCheckUtils]: 3: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,580 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {25932#true} {25932#true} #5505#return; {25932#true} is VALID [2022-02-20 22:37:18,580 INFO L290 TraceCheckUtils]: 5: Hoare triple {25932#true} assume -2147483648 <= #t~ret1153 && #t~ret1153 <= 2147483647;~tmp___1~18 := #t~ret1153;havoc #t~ret1153; {25932#true} is VALID [2022-02-20 22:37:18,580 INFO L290 TraceCheckUtils]: 6: Hoare triple {25932#true} assume !(0 != ~tmp___1~18);#res.base, #res.offset := 0, 0; {25932#true} is VALID [2022-02-20 22:37:18,580 INFO L290 TraceCheckUtils]: 7: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,581 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {25932#true} {25932#true} #6083#return; {25932#true} is VALID [2022-02-20 22:37:18,581 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 58 [2022-02-20 22:37:18,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:37:18,590 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:37:18,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:37:18,597 INFO L290 TraceCheckUtils]: 0: Hoare triple {25932#true} havoc ~tmp~106;assume -2147483648 <= #t~nondet1164 && #t~nondet1164 <= 2147483647;~tmp~106 := #t~nondet1164;havoc #t~nondet1164;#res := ~tmp~106; {25932#true} is VALID [2022-02-20 22:37:18,597 INFO L290 TraceCheckUtils]: 1: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,597 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {25932#true} {25932#true} #5505#return; {25932#true} is VALID [2022-02-20 22:37:18,597 INFO L290 TraceCheckUtils]: 0: Hoare triple {26043#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~2.base, ~res~2.offset;havoc ~tmp~101.base, ~tmp~101.offset;havoc ~tmp___0~42;havoc ~tmp___1~18; {25932#true} is VALID [2022-02-20 22:37:18,598 INFO L272 TraceCheckUtils]: 1: Hoare triple {25932#true} call #t~ret1153 := ldv_undef_int(); {25932#true} is VALID [2022-02-20 22:37:18,598 INFO L290 TraceCheckUtils]: 2: Hoare triple {25932#true} havoc ~tmp~106;assume -2147483648 <= #t~nondet1164 && #t~nondet1164 <= 2147483647;~tmp~106 := #t~nondet1164;havoc #t~nondet1164;#res := ~tmp~106; {25932#true} is VALID [2022-02-20 22:37:18,598 INFO L290 TraceCheckUtils]: 3: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,598 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {25932#true} {25932#true} #5505#return; {25932#true} is VALID [2022-02-20 22:37:18,598 INFO L290 TraceCheckUtils]: 5: Hoare triple {25932#true} assume -2147483648 <= #t~ret1153 && #t~ret1153 <= 2147483647;~tmp___1~18 := #t~ret1153;havoc #t~ret1153; {25932#true} is VALID [2022-02-20 22:37:18,598 INFO L290 TraceCheckUtils]: 6: Hoare triple {25932#true} assume !(0 != ~tmp___1~18);#res.base, #res.offset := 0, 0; {25932#true} is VALID [2022-02-20 22:37:18,598 INFO L290 TraceCheckUtils]: 7: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,599 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {25932#true} {25932#true} #6085#return; {25932#true} is VALID [2022-02-20 22:37:18,600 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71 [2022-02-20 22:37:18,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:37:18,610 INFO L290 TraceCheckUtils]: 0: Hoare triple {25932#true} havoc ~tmp~106;assume -2147483648 <= #t~nondet1164 && #t~nondet1164 <= 2147483647;~tmp~106 := #t~nondet1164;havoc #t~nondet1164;#res := ~tmp~106; {25932#true} is VALID [2022-02-20 22:37:18,610 INFO L290 TraceCheckUtils]: 1: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,611 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {25932#true} {25988#(= 20 ~ldv_statevar_2~0)} #6087#return; {25988#(= 20 ~ldv_statevar_2~0)} is VALID [2022-02-20 22:37:18,611 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 94 [2022-02-20 22:37:18,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:37:18,623 INFO L290 TraceCheckUtils]: 0: Hoare triple {25932#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3200 + ~dev.offset; {25932#true} is VALID [2022-02-20 22:37:18,623 INFO L290 TraceCheckUtils]: 1: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,623 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {25932#true} {25933#false} #5743#return; {25933#false} is VALID [2022-02-20 22:37:18,623 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 100 [2022-02-20 22:37:18,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:37:18,629 INFO L290 TraceCheckUtils]: 0: Hoare triple {25932#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {25932#true} is VALID [2022-02-20 22:37:18,629 INFO L290 TraceCheckUtils]: 1: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,629 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {25932#true} {25933#false} #5745#return; {25933#false} is VALID [2022-02-20 22:37:18,632 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 105 [2022-02-20 22:37:18,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:37:18,642 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:37:18,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:37:18,647 INFO L290 TraceCheckUtils]: 0: Hoare triple {25932#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {25932#true} is VALID [2022-02-20 22:37:18,647 INFO L290 TraceCheckUtils]: 1: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,647 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {25932#true} {25932#true} #5845#return; {25932#true} is VALID [2022-02-20 22:37:18,647 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:37:18,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:37:18,653 INFO L290 TraceCheckUtils]: 0: Hoare triple {25932#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {25932#true} is VALID [2022-02-20 22:37:18,654 INFO L290 TraceCheckUtils]: 1: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,654 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {25932#true} {25932#true} #5847#return; {25932#true} is VALID [2022-02-20 22:37:18,654 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 12 [2022-02-20 22:37:18,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:37:18,660 INFO L290 TraceCheckUtils]: 0: Hoare triple {25932#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {25932#true} is VALID [2022-02-20 22:37:18,660 INFO L290 TraceCheckUtils]: 1: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,660 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {25932#true} {25932#true} #5849#return; {25932#true} is VALID [2022-02-20 22:37:18,661 INFO L290 TraceCheckUtils]: 0: Hoare triple {26062#(= |old(abs_7808)| abs_7808)} ~regs.base, ~regs.offset := #in~regs.base, #in~regs.offset;~cmd.base, ~cmd.offset := #in~cmd.base, #in~cmd.offset;havoc ~idx~0; {25932#true} is VALID [2022-02-20 22:37:18,661 INFO L272 TraceCheckUtils]: 1: Hoare triple {25932#true} call #t~ret386 := readl(~regs.base, 1292 + ~regs.offset); {25932#true} is VALID [2022-02-20 22:37:18,661 INFO L290 TraceCheckUtils]: 2: Hoare triple {25932#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {25932#true} is VALID [2022-02-20 22:37:18,661 INFO L290 TraceCheckUtils]: 3: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,661 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {25932#true} {25932#true} #5845#return; {25932#true} is VALID [2022-02-20 22:37:18,661 INFO L290 TraceCheckUtils]: 5: Hoare triple {25932#true} ~idx~0 := #t~ret386;havoc #t~ret386;call #t~mem387 := read~int(~cmd.base, ~cmd.offset, 4); {25932#true} is VALID [2022-02-20 22:37:18,661 INFO L272 TraceCheckUtils]: 6: Hoare triple {25932#true} call writel(#t~mem387, ~regs.base, 1792 + ~regs.offset + (if ~idx~0 % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~idx~0 % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~idx~0 % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616)); {25932#true} is VALID [2022-02-20 22:37:18,662 INFO L290 TraceCheckUtils]: 7: Hoare triple {25932#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {25932#true} is VALID [2022-02-20 22:37:18,662 INFO L290 TraceCheckUtils]: 8: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,662 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {25932#true} {25932#true} #5847#return; {25932#true} is VALID [2022-02-20 22:37:18,662 INFO L290 TraceCheckUtils]: 10: Hoare triple {25932#true} havoc #t~mem387; {25932#true} is VALID [2022-02-20 22:37:18,662 INFO L290 TraceCheckUtils]: 11: Hoare triple {25932#true} assume 0 == 1 + ~idx~0;~idx~0 := 0; {25932#true} is VALID [2022-02-20 22:37:18,662 INFO L272 TraceCheckUtils]: 12: Hoare triple {25932#true} call writel(~idx~0, ~regs.base, 1292 + ~regs.offset); {25932#true} is VALID [2022-02-20 22:37:18,662 INFO L290 TraceCheckUtils]: 13: Hoare triple {25932#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {25932#true} is VALID [2022-02-20 22:37:18,666 INFO L290 TraceCheckUtils]: 14: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,667 INFO L284 TraceCheckUtils]: 15: Hoare quadruple {25932#true} {25932#true} #5849#return; {25932#true} is VALID [2022-02-20 22:37:18,667 INFO L290 TraceCheckUtils]: 16: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,667 INFO L284 TraceCheckUtils]: 17: Hoare quadruple {25932#true} {25933#false} #5747#return; {25933#false} is VALID [2022-02-20 22:37:18,667 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 125 [2022-02-20 22:37:18,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:37:18,677 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:37:18,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:37:18,682 INFO L290 TraceCheckUtils]: 0: Hoare triple {25932#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {25932#true} is VALID [2022-02-20 22:37:18,682 INFO L290 TraceCheckUtils]: 1: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,682 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {25932#true} {25932#true} #5845#return; {25932#true} is VALID [2022-02-20 22:37:18,682 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:37:18,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:37:18,688 INFO L290 TraceCheckUtils]: 0: Hoare triple {25932#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {25932#true} is VALID [2022-02-20 22:37:18,688 INFO L290 TraceCheckUtils]: 1: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,688 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {25932#true} {25932#true} #5847#return; {25932#true} is VALID [2022-02-20 22:37:18,689 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 12 [2022-02-20 22:37:18,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:37:18,693 INFO L290 TraceCheckUtils]: 0: Hoare triple {25932#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {25932#true} is VALID [2022-02-20 22:37:18,693 INFO L290 TraceCheckUtils]: 1: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,694 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {25932#true} {25932#true} #5849#return; {25932#true} is VALID [2022-02-20 22:37:18,694 INFO L290 TraceCheckUtils]: 0: Hoare triple {26062#(= |old(abs_7808)| abs_7808)} ~regs.base, ~regs.offset := #in~regs.base, #in~regs.offset;~cmd.base, ~cmd.offset := #in~cmd.base, #in~cmd.offset;havoc ~idx~0; {25932#true} is VALID [2022-02-20 22:37:18,694 INFO L272 TraceCheckUtils]: 1: Hoare triple {25932#true} call #t~ret386 := readl(~regs.base, 1292 + ~regs.offset); {25932#true} is VALID [2022-02-20 22:37:18,694 INFO L290 TraceCheckUtils]: 2: Hoare triple {25932#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {25932#true} is VALID [2022-02-20 22:37:18,694 INFO L290 TraceCheckUtils]: 3: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,694 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {25932#true} {25932#true} #5845#return; {25932#true} is VALID [2022-02-20 22:37:18,694 INFO L290 TraceCheckUtils]: 5: Hoare triple {25932#true} ~idx~0 := #t~ret386;havoc #t~ret386;call #t~mem387 := read~int(~cmd.base, ~cmd.offset, 4); {25932#true} is VALID [2022-02-20 22:37:18,695 INFO L272 TraceCheckUtils]: 6: Hoare triple {25932#true} call writel(#t~mem387, ~regs.base, 1792 + ~regs.offset + (if ~idx~0 % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~idx~0 % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~idx~0 % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616)); {25932#true} is VALID [2022-02-20 22:37:18,695 INFO L290 TraceCheckUtils]: 7: Hoare triple {25932#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {25932#true} is VALID [2022-02-20 22:37:18,695 INFO L290 TraceCheckUtils]: 8: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,695 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {25932#true} {25932#true} #5847#return; {25932#true} is VALID [2022-02-20 22:37:18,695 INFO L290 TraceCheckUtils]: 10: Hoare triple {25932#true} havoc #t~mem387; {25932#true} is VALID [2022-02-20 22:37:18,695 INFO L290 TraceCheckUtils]: 11: Hoare triple {25932#true} assume 0 == 1 + ~idx~0;~idx~0 := 0; {25932#true} is VALID [2022-02-20 22:37:18,695 INFO L272 TraceCheckUtils]: 12: Hoare triple {25932#true} call writel(~idx~0, ~regs.base, 1292 + ~regs.offset); {25932#true} is VALID [2022-02-20 22:37:18,696 INFO L290 TraceCheckUtils]: 13: Hoare triple {25932#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {25932#true} is VALID [2022-02-20 22:37:18,696 INFO L290 TraceCheckUtils]: 14: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,696 INFO L284 TraceCheckUtils]: 15: Hoare quadruple {25932#true} {25932#true} #5849#return; {25932#true} is VALID [2022-02-20 22:37:18,696 INFO L290 TraceCheckUtils]: 16: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,696 INFO L284 TraceCheckUtils]: 17: Hoare quadruple {25932#true} {25933#false} #5749#return; {25933#false} is VALID [2022-02-20 22:37:18,696 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 146 [2022-02-20 22:37:18,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:37:18,702 INFO L290 TraceCheckUtils]: 0: Hoare triple {25932#true} ~nr := #in~nr;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;#res := 0; {25932#true} is VALID [2022-02-20 22:37:18,702 INFO L290 TraceCheckUtils]: 1: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,702 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {25932#true} {25933#false} #5751#return; {25933#false} is VALID [2022-02-20 22:37:18,702 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 154 [2022-02-20 22:37:18,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:37:18,708 INFO L290 TraceCheckUtils]: 0: Hoare triple {25932#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3200 + ~dev.offset; {25932#true} is VALID [2022-02-20 22:37:18,709 INFO L290 TraceCheckUtils]: 1: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,709 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {25932#true} {25933#false} #5585#return; {25933#false} is VALID [2022-02-20 22:37:18,709 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 165 [2022-02-20 22:37:18,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:37:18,714 INFO L290 TraceCheckUtils]: 0: Hoare triple {25932#true} assume 2 == ~ldv_spin__xmit_lock_of_netdev_queue~0;#res := 1; {25932#true} is VALID [2022-02-20 22:37:18,714 INFO L290 TraceCheckUtils]: 1: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,714 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {25932#true} {25933#false} #5523#return; {25933#false} is VALID [2022-02-20 22:37:18,716 INFO L290 TraceCheckUtils]: 0: Hoare triple {25932#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(190, 1);call #Ultimate.allocInit(26, 2);call #Ultimate.allocInit(63, 3);call #Ultimate.allocInit(75, 4);call #Ultimate.allocInit(63, 5);call #Ultimate.allocInit(24, 6);call #Ultimate.allocInit(20, 7);call #Ultimate.allocInit(17, 8);call #Ultimate.allocInit(20, 9);call #Ultimate.allocInit(25, 10);call #Ultimate.allocInit(17, 11);call #Ultimate.allocInit(21, 12);call #Ultimate.allocInit(30, 13);call #Ultimate.allocInit(8, 14);call #Ultimate.allocInit(61, 15);call #Ultimate.allocInit(37, 16);call #Ultimate.allocInit(7, 17);call write~init~int(97, 17, 0, 1);call write~init~int(99, 17, 1, 1);call write~init~int(101, 17, 2, 1);call write~init~int(110, 17, 3, 1);call write~init~int(105, 17, 4, 1);call write~init~int(99, 17, 5, 1);call write~init~int(0, 17, 6, 1);call #Ultimate.allocInit(44, 18);call #Ultimate.allocInit(44, 19);call #Ultimate.allocInit(10, 20);call #Ultimate.allocInit(63, 21);call #Ultimate.allocInit(14, 22);call #Ultimate.allocInit(18, 23);call #Ultimate.allocInit(59, 24);call #Ultimate.allocInit(46, 25);call #Ultimate.allocInit(77, 26);call #Ultimate.allocInit(72, 27);call #Ultimate.allocInit(7, 28);call write~init~int(97, 28, 0, 1);call write~init~int(99, 28, 1, 1);call write~init~int(101, 28, 2, 1);call write~init~int(110, 28, 3, 1);call write~init~int(105, 28, 4, 1);call write~init~int(99, 28, 5, 1);call write~init~int(0, 28, 6, 1);call #Ultimate.allocInit(31, 29);call #Ultimate.allocInit(7, 30);call write~init~int(97, 30, 0, 1);call write~init~int(99, 30, 1, 1);call write~init~int(101, 30, 2, 1);call write~init~int(110, 30, 3, 1);call write~init~int(105, 30, 4, 1);call write~init~int(99, 30, 5, 1);call write~init~int(0, 30, 6, 1);call #Ultimate.allocInit(62, 31);call #Ultimate.allocInit(31, 32);call #Ultimate.allocInit(57, 33);call #Ultimate.allocInit(41, 34);call #Ultimate.allocInit(31, 35);call #Ultimate.allocInit(28, 36);call #Ultimate.allocInit(44, 37);call #Ultimate.allocInit(49, 38);call #Ultimate.allocInit(33, 39);call #Ultimate.allocInit(43, 40);call #Ultimate.allocInit(57, 41);call #Ultimate.allocInit(53, 42);call #Ultimate.allocInit(54, 43);call #Ultimate.allocInit(30, 44);call #Ultimate.allocInit(54, 45);call #Ultimate.allocInit(5, 46);call write~init~int(70, 46, 0, 1);call write~init~int(117, 46, 1, 1);call write~init~int(108, 46, 2, 1);call write~init~int(108, 46, 3, 1);call write~init~int(0, 46, 4, 1);call #Ultimate.allocInit(5, 47);call write~init~int(72, 47, 0, 1);call write~init~int(97, 47, 1, 1);call write~init~int(108, 47, 2, 1);call write~init~int(102, 47, 3, 1);call write~init~int(0, 47, 4, 1);call #Ultimate.allocInit(4, 48);call write~init~int(84, 48, 0, 1);call write~init~int(88, 48, 1, 1);call write~init~int(32, 48, 2, 1);call write~init~int(0, 48, 3, 1);call #Ultimate.allocInit(1, 49);call write~init~int(0, 49, 0, 1);call #Ultimate.allocInit(3, 50);call write~init~int(82, 50, 0, 1);call write~init~int(88, 50, 1, 1);call write~init~int(0, 50, 2, 1);call #Ultimate.allocInit(1, 51);call write~init~int(0, 51, 0, 1);call #Ultimate.allocInit(24, 52);call #Ultimate.allocInit(26, 53);call #Ultimate.allocInit(38, 54);call #Ultimate.allocInit(28, 55);call #Ultimate.allocInit(34, 56);call #Ultimate.allocInit(23, 57);call #Ultimate.allocInit(25, 58);call #Ultimate.allocInit(25, 59);call #Ultimate.allocInit(29, 60);call #Ultimate.allocInit(50, 61);call #Ultimate.allocInit(28, 62);call #Ultimate.allocInit(31, 63);call #Ultimate.allocInit(35, 64);call #Ultimate.allocInit(31, 65);call #Ultimate.allocInit(7, 66);call write~init~int(97, 66, 0, 1);call write~init~int(99, 66, 1, 1);call write~init~int(101, 66, 2, 1);call write~init~int(110, 66, 3, 1);call write~init~int(105, 66, 4, 1);call write~init~int(99, 66, 5, 1);call write~init~int(0, 66, 6, 1);call #Ultimate.allocInit(9, 67);call #Ultimate.allocInit(15, 68);call #Ultimate.allocInit(60, 69);call #Ultimate.allocInit(35, 70);call #Ultimate.allocInit(38, 71);call #Ultimate.allocInit(38, 72);call #Ultimate.allocInit(28, 73);call #Ultimate.allocInit(35, 74);call #Ultimate.allocInit(35, 75);call #Ultimate.allocInit(32, 76);call #Ultimate.allocInit(41, 77);call #Ultimate.allocInit(7, 78);call write~init~int(97, 78, 0, 1);call write~init~int(99, 78, 1, 1);call write~init~int(101, 78, 2, 1);call write~init~int(110, 78, 3, 1);call write~init~int(105, 78, 4, 1);call write~init~int(99, 78, 5, 1);call write~init~int(0, 78, 6, 1);call #Ultimate.allocInit(1, 79);call write~init~int(0, 79, 0, 1);call #Ultimate.allocInit(54, 80);call #Ultimate.allocInit(56, 81);call #Ultimate.allocInit(58, 82);call #Ultimate.allocInit(58, 83);call #Ultimate.allocInit(58, 84);call #Ultimate.allocInit(54, 85);call #Ultimate.allocInit(56, 86);call #Ultimate.allocInit(58, 87);call #Ultimate.allocInit(58, 88);call #Ultimate.allocInit(58, 89);call #Ultimate.allocInit(54, 90);call #Ultimate.allocInit(56, 91);call #Ultimate.allocInit(58, 92);call #Ultimate.allocInit(58, 93);call #Ultimate.allocInit(58, 94);call #Ultimate.allocInit(54, 95);call #Ultimate.allocInit(56, 96);call #Ultimate.allocInit(58, 97);call #Ultimate.allocInit(58, 98);call #Ultimate.allocInit(58, 99);call #Ultimate.allocInit(54, 100);call #Ultimate.allocInit(56, 101);call #Ultimate.allocInit(58, 102);call #Ultimate.allocInit(58, 103);call #Ultimate.allocInit(58, 104);call #Ultimate.allocInit(54, 105);call #Ultimate.allocInit(56, 106);call #Ultimate.allocInit(58, 107);call #Ultimate.allocInit(58, 108);call #Ultimate.allocInit(58, 109);call #Ultimate.allocInit(54, 110);call #Ultimate.allocInit(56, 111);call #Ultimate.allocInit(58, 112);call #Ultimate.allocInit(58, 113);call #Ultimate.allocInit(58, 114);call #Ultimate.allocInit(54, 115);call #Ultimate.allocInit(56, 116);call #Ultimate.allocInit(58, 117);call #Ultimate.allocInit(58, 118);call #Ultimate.allocInit(58, 119);call #Ultimate.allocInit(54, 120);call #Ultimate.allocInit(56, 121);call #Ultimate.allocInit(58, 122);call #Ultimate.allocInit(58, 123);call #Ultimate.allocInit(58, 124);call #Ultimate.allocInit(54, 125);call #Ultimate.allocInit(56, 126);call #Ultimate.allocInit(58, 127);call #Ultimate.allocInit(58, 128);call #Ultimate.allocInit(58, 129);call #Ultimate.allocInit(54, 130);call #Ultimate.allocInit(56, 131);call #Ultimate.allocInit(58, 132);call #Ultimate.allocInit(58, 133);call #Ultimate.allocInit(58, 134);call #Ultimate.allocInit(54, 135);call #Ultimate.allocInit(56, 136);call #Ultimate.allocInit(58, 137);call #Ultimate.allocInit(58, 138);call #Ultimate.allocInit(58, 139);call #Ultimate.allocInit(54, 140);call #Ultimate.allocInit(56, 141);call #Ultimate.allocInit(58, 142);call #Ultimate.allocInit(58, 143);call #Ultimate.allocInit(58, 144);call #Ultimate.allocInit(54, 145);call #Ultimate.allocInit(56, 146);call #Ultimate.allocInit(58, 147);call #Ultimate.allocInit(58, 148);call #Ultimate.allocInit(58, 149);call #Ultimate.allocInit(57, 150);call #Ultimate.allocInit(57, 151);call #Ultimate.allocInit(57, 152);call #Ultimate.allocInit(57, 153);call #Ultimate.allocInit(57, 154);call #Ultimate.allocInit(57, 155);call #Ultimate.allocInit(57, 156);call #Ultimate.allocInit(57, 157);call #Ultimate.allocInit(57, 158);call #Ultimate.allocInit(57, 159);call #Ultimate.allocInit(57, 160);call #Ultimate.allocInit(57, 161);call #Ultimate.allocInit(57, 162);call #Ultimate.allocInit(57, 163);call #Ultimate.allocInit(2, 164);call write~init~int(48, 164, 0, 1);call write~init~int(0, 164, 1, 1);call #Ultimate.allocInit(85, 165);~#acenic_pci_tbl~0.base, ~#acenic_pci_tbl~0.offset := 166, 0;call #Ultimate.allocInit(288, 166);call write~init~int(4782, ~#acenic_pci_tbl~0.base, ~#acenic_pci_tbl~0.offset, 4);call write~init~int(1, ~#acenic_pci_tbl~0.base, 4 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#acenic_pci_tbl~0.base, 8 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#acenic_pci_tbl~0.base, 12 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(131072, ~#acenic_pci_tbl~0.base, 16 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(16776960, ~#acenic_pci_tbl~0.base, 20 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(0, ~#acenic_pci_tbl~0.base, 24 + ~#acenic_pci_tbl~0.offset, 8);call write~init~int(4782, ~#acenic_pci_tbl~0.base, 32 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(2, ~#acenic_pci_tbl~0.base, 36 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#acenic_pci_tbl~0.base, 40 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#acenic_pci_tbl~0.base, 44 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(131072, ~#acenic_pci_tbl~0.base, 48 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(16776960, ~#acenic_pci_tbl~0.base, 52 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(0, ~#acenic_pci_tbl~0.base, 56 + ~#acenic_pci_tbl~0.offset, 8);call write~init~int(4279, ~#acenic_pci_tbl~0.base, 64 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(1, ~#acenic_pci_tbl~0.base, 68 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#acenic_pci_tbl~0.base, 72 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#acenic_pci_tbl~0.base, 76 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(131072, ~#acenic_pci_tbl~0.base, 80 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(16776960, ~#acenic_pci_tbl~0.base, 84 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(0, ~#acenic_pci_tbl~0.base, 88 + ~#acenic_pci_tbl~0.offset, 8);call write~init~int(4997, ~#acenic_pci_tbl~0.base, 96 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(25098, ~#acenic_pci_tbl~0.base, 100 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#acenic_pci_tbl~0.base, 104 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#acenic_pci_tbl~0.base, 108 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(131072, ~#acenic_pci_tbl~0.base, 112 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(16776960, ~#acenic_pci_tbl~0.base, 116 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(0, ~#acenic_pci_tbl~0.base, 120 + ~#acenic_pci_tbl~0.offset, 8);call write~init~int(4997, ~#acenic_pci_tbl~0.base, 128 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(25354, ~#acenic_pci_tbl~0.base, 132 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#acenic_pci_tbl~0.base, 136 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#acenic_pci_tbl~0.base, 140 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(131072, ~#acenic_pci_tbl~0.base, 144 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(16776960, ~#acenic_pci_tbl~0.base, 148 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(0, ~#acenic_pci_tbl~0.base, 152 + ~#acenic_pci_tbl~0.offset, 8);call write~init~int(4113, ~#acenic_pci_tbl~0.base, 160 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(26, ~#acenic_pci_tbl~0.base, 164 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#acenic_pci_tbl~0.base, 168 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#acenic_pci_tbl~0.base, 172 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(131072, ~#acenic_pci_tbl~0.base, 176 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(16776960, ~#acenic_pci_tbl~0.base, 180 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(0, ~#acenic_pci_tbl~0.base, 184 + ~#acenic_pci_tbl~0.offset, 8);call write~init~int(4782, ~#acenic_pci_tbl~0.base, 192 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(250, ~#acenic_pci_tbl~0.base, 196 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#acenic_pci_tbl~0.base, 200 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#acenic_pci_tbl~0.base, 204 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(131072, ~#acenic_pci_tbl~0.base, 208 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(16776960, ~#acenic_pci_tbl~0.base, 212 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(0, ~#acenic_pci_tbl~0.base, 216 + ~#acenic_pci_tbl~0.offset, 8);call write~init~int(4265, ~#acenic_pci_tbl~0.base, 224 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(9, ~#acenic_pci_tbl~0.base, 228 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#acenic_pci_tbl~0.base, 232 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#acenic_pci_tbl~0.base, 236 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(131072, ~#acenic_pci_tbl~0.base, 240 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(16776960, ~#acenic_pci_tbl~0.base, 244 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(0, ~#acenic_pci_tbl~0.base, 248 + ~#acenic_pci_tbl~0.offset, 8);call write~init~int(0, ~#acenic_pci_tbl~0.base, 256 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(0, ~#acenic_pci_tbl~0.base, 260 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(0, ~#acenic_pci_tbl~0.base, 264 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(0, ~#acenic_pci_tbl~0.base, 268 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(0, ~#acenic_pci_tbl~0.base, 272 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(0, ~#acenic_pci_tbl~0.base, 276 + ~#acenic_pci_tbl~0.offset, 4);call write~init~int(0, ~#acenic_pci_tbl~0.base, 280 + ~#acenic_pci_tbl~0.offset, 8);~__mod_pci_device_table~0.vendor := 0;~__mod_pci_device_table~0.device := 0;~__mod_pci_device_table~0.subvendor := 0;~__mod_pci_device_table~0.subdevice := 0;~__mod_pci_device_table~0.class := 0;~__mod_pci_device_table~0.class_mask := 0;~__mod_pci_device_table~0.driver_data := 0;~#link_state~0.base, ~#link_state~0.offset := 167, 0;call #Ultimate.allocInit(32, 167);call write~init~int(0, ~#link_state~0.base, ~#link_state~0.offset, 4);call write~init~int(0, ~#link_state~0.base, 4 + ~#link_state~0.offset, 4);call write~init~int(0, ~#link_state~0.base, 8 + ~#link_state~0.offset, 4);call write~init~int(0, ~#link_state~0.base, 12 + ~#link_state~0.offset, 4);call write~init~int(0, ~#link_state~0.base, 16 + ~#link_state~0.offset, 4);call write~init~int(0, ~#link_state~0.base, 20 + ~#link_state~0.offset, 4);call write~init~int(0, ~#link_state~0.base, 24 + ~#link_state~0.offset, 4);call write~init~int(0, ~#link_state~0.base, 28 + ~#link_state~0.offset, 4);~#trace~0.base, ~#trace~0.offset := 168, 0;call #Ultimate.allocInit(32, 168);call write~init~int(0, ~#trace~0.base, ~#trace~0.offset, 4);call write~init~int(0, ~#trace~0.base, 4 + ~#trace~0.offset, 4);call write~init~int(0, ~#trace~0.base, 8 + ~#trace~0.offset, 4);call write~init~int(0, ~#trace~0.base, 12 + ~#trace~0.offset, 4);call write~init~int(0, ~#trace~0.base, 16 + ~#trace~0.offset, 4);call write~init~int(0, ~#trace~0.base, 20 + ~#trace~0.offset, 4);call write~init~int(0, ~#trace~0.base, 24 + ~#trace~0.offset, 4);call write~init~int(0, ~#trace~0.base, 28 + ~#trace~0.offset, 4);~#tx_coal_tick~0.base, ~#tx_coal_tick~0.offset := 169, 0;call #Ultimate.allocInit(32, 169);call write~init~int(0, ~#tx_coal_tick~0.base, ~#tx_coal_tick~0.offset, 4);call write~init~int(0, ~#tx_coal_tick~0.base, 4 + ~#tx_coal_tick~0.offset, 4);call write~init~int(0, ~#tx_coal_tick~0.base, 8 + ~#tx_coal_tick~0.offset, 4);call write~init~int(0, ~#tx_coal_tick~0.base, 12 + ~#tx_coal_tick~0.offset, 4);call write~init~int(0, ~#tx_coal_tick~0.base, 16 + ~#tx_coal_tick~0.offset, 4);call write~init~int(0, ~#tx_coal_tick~0.base, 20 + ~#tx_coal_tick~0.offset, 4);call write~init~int(0, ~#tx_coal_tick~0.base, 24 + ~#tx_coal_tick~0.offset, 4);call write~init~int(0, ~#tx_coal_tick~0.base, 28 + ~#tx_coal_tick~0.offset, 4);~#rx_coal_tick~0.base, ~#rx_coal_tick~0.offset := 170, 0;call #Ultimate.allocInit(32, 170);call write~init~int(0, ~#rx_coal_tick~0.base, ~#rx_coal_tick~0.offset, 4);call write~init~int(0, ~#rx_coal_tick~0.base, 4 + ~#rx_coal_tick~0.offset, 4);call write~init~int(0, ~#rx_coal_tick~0.base, 8 + ~#rx_coal_tick~0.offset, 4);call write~init~int(0, ~#rx_coal_tick~0.base, 12 + ~#rx_coal_tick~0.offset, 4);call write~init~int(0, ~#rx_coal_tick~0.base, 16 + ~#rx_coal_tick~0.offset, 4);call write~init~int(0, ~#rx_coal_tick~0.base, 20 + ~#rx_coal_tick~0.offset, 4);call write~init~int(0, ~#rx_coal_tick~0.base, 24 + ~#rx_coal_tick~0.offset, 4);call write~init~int(0, ~#rx_coal_tick~0.base, 28 + ~#rx_coal_tick~0.offset, 4);~#max_tx_desc~0.base, ~#max_tx_desc~0.offset := 171, 0;call #Ultimate.allocInit(32, 171);call write~init~int(0, ~#max_tx_desc~0.base, ~#max_tx_desc~0.offset, 4);call write~init~int(0, ~#max_tx_desc~0.base, 4 + ~#max_tx_desc~0.offset, 4);call write~init~int(0, ~#max_tx_desc~0.base, 8 + ~#max_tx_desc~0.offset, 4);call write~init~int(0, ~#max_tx_desc~0.base, 12 + ~#max_tx_desc~0.offset, 4);call write~init~int(0, ~#max_tx_desc~0.base, 16 + ~#max_tx_desc~0.offset, 4);call write~init~int(0, ~#max_tx_desc~0.base, 20 + ~#max_tx_desc~0.offset, 4);call write~init~int(0, ~#max_tx_desc~0.base, 24 + ~#max_tx_desc~0.offset, 4);call write~init~int(0, ~#max_tx_desc~0.base, 28 + ~#max_tx_desc~0.offset, 4);~#max_rx_desc~0.base, ~#max_rx_desc~0.offset := 172, 0;call #Ultimate.allocInit(32, 172);call write~init~int(0, ~#max_rx_desc~0.base, ~#max_rx_desc~0.offset, 4);call write~init~int(0, ~#max_rx_desc~0.base, 4 + ~#max_rx_desc~0.offset, 4);call write~init~int(0, ~#max_rx_desc~0.base, 8 + ~#max_rx_desc~0.offset, 4);call write~init~int(0, ~#max_rx_desc~0.base, 12 + ~#max_rx_desc~0.offset, 4);call write~init~int(0, ~#max_rx_desc~0.base, 16 + ~#max_rx_desc~0.offset, 4);call write~init~int(0, ~#max_rx_desc~0.base, 20 + ~#max_rx_desc~0.offset, 4);call write~init~int(0, ~#max_rx_desc~0.base, 24 + ~#max_rx_desc~0.offset, 4);call write~init~int(0, ~#max_rx_desc~0.base, 28 + ~#max_rx_desc~0.offset, 4);~#tx_ratio~0.base, ~#tx_ratio~0.offset := 173, 0;call #Ultimate.allocInit(32, 173);call write~init~int(0, ~#tx_ratio~0.base, ~#tx_ratio~0.offset, 4);call write~init~int(0, ~#tx_ratio~0.base, 4 + ~#tx_ratio~0.offset, 4);call write~init~int(0, ~#tx_ratio~0.base, 8 + ~#tx_ratio~0.offset, 4);call write~init~int(0, ~#tx_ratio~0.base, 12 + ~#tx_ratio~0.offset, 4);call write~init~int(0, ~#tx_ratio~0.base, 16 + ~#tx_ratio~0.offset, 4);call write~init~int(0, ~#tx_ratio~0.base, 20 + ~#tx_ratio~0.offset, 4);call write~init~int(0, ~#tx_ratio~0.base, 24 + ~#tx_ratio~0.offset, 4);call write~init~int(0, ~#tx_ratio~0.base, 28 + ~#tx_ratio~0.offset, 4);~#dis_pci_mem_inval~0.base, ~#dis_pci_mem_inval~0.offset := 174, 0;call #Ultimate.allocInit(32, 174);call write~init~int(1, ~#dis_pci_mem_inval~0.base, ~#dis_pci_mem_inval~0.offset, 4);call write~init~int(1, ~#dis_pci_mem_inval~0.base, 4 + ~#dis_pci_mem_inval~0.offset, 4);call write~init~int(1, ~#dis_pci_mem_inval~0.base, 8 + ~#dis_pci_mem_inval~0.offset, 4);call write~init~int(1, ~#dis_pci_mem_inval~0.base, 12 + ~#dis_pci_mem_inval~0.offset, 4);call write~init~int(1, ~#dis_pci_mem_inval~0.base, 16 + ~#dis_pci_mem_inval~0.offset, 4);call write~init~int(1, ~#dis_pci_mem_inval~0.base, 20 + ~#dis_pci_mem_inval~0.offset, 4);call write~init~int(1, ~#dis_pci_mem_inval~0.base, 24 + ~#dis_pci_mem_inval~0.offset, 4);call write~init~int(1, ~#dis_pci_mem_inval~0.base, 28 + ~#dis_pci_mem_inval~0.offset, 4);~#version~0.base, ~#version~0.offset := 175, 0;call #Ultimate.allocInit(137, 175);call write~init~int(97, ~#version~0.base, ~#version~0.offset, 1);call write~init~int(99, ~#version~0.base, 1 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 2 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 3 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 4 + ~#version~0.offset, 1);call write~init~int(99, ~#version~0.base, 5 + ~#version~0.offset, 1);call write~init~int(46, ~#version~0.base, 6 + ~#version~0.offset, 1);call write~init~int(99, ~#version~0.base, 7 + ~#version~0.offset, 1);call write~init~int(58, ~#version~0.base, 8 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 9 + ~#version~0.offset, 1);call write~init~int(118, ~#version~0.base, 10 + ~#version~0.offset, 1);call write~init~int(48, ~#version~0.base, 11 + ~#version~0.offset, 1);call write~init~int(46, ~#version~0.base, 12 + ~#version~0.offset, 1);call write~init~int(57, ~#version~0.base, 13 + ~#version~0.offset, 1);call write~init~int(50, ~#version~0.base, 14 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 15 + ~#version~0.offset, 1);call write~init~int(48, ~#version~0.base, 16 + ~#version~0.offset, 1);call write~init~int(56, ~#version~0.base, 17 + ~#version~0.offset, 1);call write~init~int(47, ~#version~0.base, 18 + ~#version~0.offset, 1);call write~init~int(48, ~#version~0.base, 19 + ~#version~0.offset, 1);call write~init~int(53, ~#version~0.base, 20 + ~#version~0.offset, 1);call write~init~int(47, ~#version~0.base, 21 + ~#version~0.offset, 1);call write~init~int(50, ~#version~0.base, 22 + ~#version~0.offset, 1);call write~init~int(48, ~#version~0.base, 23 + ~#version~0.offset, 1);call write~init~int(48, ~#version~0.base, 24 + ~#version~0.offset, 1);call write~init~int(50, ~#version~0.base, 25 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 26 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 27 + ~#version~0.offset, 1);call write~init~int(74, ~#version~0.base, 28 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 29 + ~#version~0.offset, 1);call write~init~int(115, ~#version~0.base, 30 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 31 + ~#version~0.offset, 1);call write~init~int(83, ~#version~0.base, 32 + ~#version~0.offset, 1);call write~init~int(111, ~#version~0.base, 33 + ~#version~0.offset, 1);call write~init~int(114, ~#version~0.base, 34 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 35 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 36 + ~#version~0.offset, 1);call write~init~int(115, ~#version~0.base, 37 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 38 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 39 + ~#version~0.offset, 1);call write~init~int(44, ~#version~0.base, 40 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 41 + ~#version~0.offset, 1);call write~init~int(108, ~#version~0.base, 42 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 43 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 44 + ~#version~0.offset, 1);call write~init~int(117, ~#version~0.base, 45 + ~#version~0.offset, 1);call write~init~int(120, ~#version~0.base, 46 + ~#version~0.offset, 1);call write~init~int(45, ~#version~0.base, 47 + ~#version~0.offset, 1);call write~init~int(97, ~#version~0.base, 48 + ~#version~0.offset, 1);call write~init~int(99, ~#version~0.base, 49 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 50 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 51 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 52 + ~#version~0.offset, 1);call write~init~int(99, ~#version~0.base, 53 + ~#version~0.offset, 1);call write~init~int(64, ~#version~0.base, 54 + ~#version~0.offset, 1);call write~init~int(83, ~#version~0.base, 55 + ~#version~0.offset, 1);call write~init~int(117, ~#version~0.base, 56 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 57 + ~#version~0.offset, 1);call write~init~int(83, ~#version~0.base, 58 + ~#version~0.offset, 1);call write~init~int(73, ~#version~0.base, 59 + ~#version~0.offset, 1);call write~init~int(84, ~#version~0.base, 60 + ~#version~0.offset, 1);call write~init~int(69, ~#version~0.base, 61 + ~#version~0.offset, 1);call write~init~int(46, ~#version~0.base, 62 + ~#version~0.offset, 1);call write~init~int(100, ~#version~0.base, 63 + ~#version~0.offset, 1);call write~init~int(107, ~#version~0.base, 64 + ~#version~0.offset, 1);call write~init~int(10, ~#version~0.base, 65 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 66 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 67 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 68 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 69 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 70 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 71 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 72 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 73 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 74 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 75 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 76 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 77 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 78 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 79 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 80 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 81 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 82 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 83 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 84 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 85 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 86 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 87 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 88 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 89 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 90 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 91 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 92 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 93 + ~#version~0.offset, 1);call write~init~int(104, ~#version~0.base, 94 + ~#version~0.offset, 1);call write~init~int(116, ~#version~0.base, 95 + ~#version~0.offset, 1);call write~init~int(116, ~#version~0.base, 96 + ~#version~0.offset, 1);call write~init~int(112, ~#version~0.base, 97 + ~#version~0.offset, 1);call write~init~int(58, ~#version~0.base, 98 + ~#version~0.offset, 1);call write~init~int(47, ~#version~0.base, 99 + ~#version~0.offset, 1);call write~init~int(47, ~#version~0.base, 100 + ~#version~0.offset, 1);call write~init~int(104, ~#version~0.base, 101 + ~#version~0.offset, 1);call write~init~int(111, ~#version~0.base, 102 + ~#version~0.offset, 1);call write~init~int(109, ~#version~0.base, 103 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 104 + ~#version~0.offset, 1);call write~init~int(46, ~#version~0.base, 105 + ~#version~0.offset, 1);call write~init~int(99, ~#version~0.base, 106 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 107 + ~#version~0.offset, 1);call write~init~int(114, ~#version~0.base, 108 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 109 + ~#version~0.offset, 1);call write~init~int(46, ~#version~0.base, 110 + ~#version~0.offset, 1);call write~init~int(99, ~#version~0.base, 111 + ~#version~0.offset, 1);call write~init~int(104, ~#version~0.base, 112 + ~#version~0.offset, 1);call write~init~int(47, ~#version~0.base, 113 + ~#version~0.offset, 1);call write~init~int(126, ~#version~0.base, 114 + ~#version~0.offset, 1);call write~init~int(106, ~#version~0.base, 115 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 116 + ~#version~0.offset, 1);call write~init~int(115, ~#version~0.base, 117 + ~#version~0.offset, 1);call write~init~int(47, ~#version~0.base, 118 + ~#version~0.offset, 1);call write~init~int(103, ~#version~0.base, 119 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 120 + ~#version~0.offset, 1);call write~init~int(103, ~#version~0.base, 121 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 122 + ~#version~0.offset, 1);call write~init~int(47, ~#version~0.base, 123 + ~#version~0.offset, 1);call write~init~int(97, ~#version~0.base, 124 + ~#version~0.offset, 1);call write~init~int(99, ~#version~0.base, 125 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 126 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 127 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 128 + ~#version~0.offset, 1);call write~init~int(99, ~#version~0.base, 129 + ~#version~0.offset, 1);call write~init~int(46, ~#version~0.base, 130 + ~#version~0.offset, 1);call write~init~int(104, ~#version~0.base, 131 + ~#version~0.offset, 1);call write~init~int(116, ~#version~0.base, 132 + ~#version~0.offset, 1);call write~init~int(109, ~#version~0.base, 133 + ~#version~0.offset, 1);call write~init~int(108, ~#version~0.base, 134 + ~#version~0.offset, 1);call write~init~int(10, ~#version~0.base, 135 + ~#version~0.offset, 1);call write~init~int(0, ~#version~0.base, 136 + ~#version~0.offset, 1);~#ace_ethtool_ops~0.base, ~#ace_ethtool_ops~0.offset := 176, 0;call #Ultimate.allocInit(368, 176);call write~init~$Pointer$(#funAddr~ace_get_settings.base, #funAddr~ace_get_settings.offset, ~#ace_ethtool_ops~0.base, ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ace_set_settings.base, #funAddr~ace_set_settings.offset, ~#ace_ethtool_ops~0.base, 8 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ace_get_drvinfo.base, #funAddr~ace_get_drvinfo.offset, ~#ace_ethtool_ops~0.base, 16 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 24 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 32 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 40 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 48 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 56 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 64 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 72 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 80 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 88 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 96 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 104 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 112 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 120 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 128 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 136 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 144 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 152 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 160 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 168 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 176 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 184 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 192 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 200 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 208 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 216 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 224 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 232 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 240 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 248 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 256 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 264 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 272 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 280 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 288 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 296 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 304 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 312 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 320 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 328 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 336 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 344 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 352 + ~#ace_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_ethtool_ops~0.base, 360 + ~#ace_ethtool_ops~0.offset, 8);~#ace_netdev_ops~0.base, ~#ace_netdev_ops~0.offset := 177, 0;call #Ultimate.allocInit(472, 177);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 8 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ace_open.base, #funAddr~ace_open.offset, ~#ace_netdev_ops~0.base, 16 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ace_close.base, #funAddr~ace_close.offset, ~#ace_netdev_ops~0.base, 24 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ace_start_xmit.base, #funAddr~ace_start_xmit.offset, ~#ace_netdev_ops~0.base, 32 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 40 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 48 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ace_set_multicast_list.base, #funAddr~ace_set_multicast_list.offset, ~#ace_netdev_ops~0.base, 56 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ace_set_mac_addr.base, #funAddr~ace_set_mac_addr.offset, ~#ace_netdev_ops~0.base, 64 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_validate_addr.base, #funAddr~eth_validate_addr.offset, ~#ace_netdev_ops~0.base, 72 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 80 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 88 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ace_change_mtu.base, #funAddr~ace_change_mtu.offset, ~#ace_netdev_ops~0.base, 96 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 104 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ace_watchdog.base, #funAddr~ace_watchdog.offset, ~#ace_netdev_ops~0.base, 112 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 120 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~ace_get_stats.base, #funAddr~ace_get_stats.offset, ~#ace_netdev_ops~0.base, 128 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 136 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 144 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 152 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 160 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 168 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 176 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 184 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 192 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 200 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 208 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 216 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 224 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 232 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 240 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 248 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 256 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 264 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 272 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 280 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 288 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 296 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 304 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 312 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 320 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 328 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 336 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 344 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 352 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 360 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 368 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 376 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 384 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 392 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 400 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 408 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 416 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 424 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 432 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 440 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 448 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 456 + ~#ace_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ace_netdev_ops~0.base, 464 + ~#ace_netdev_ops~0.offset, 8);~#acenic_pci_driver~0.base, ~#acenic_pci_driver~0.offset := 178, 0;call #Ultimate.allocInit(301, 178);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 8 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(17, 0, ~#acenic_pci_driver~0.base, 16 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(~#acenic_pci_tbl~0.base, ~#acenic_pci_tbl~0.offset, ~#acenic_pci_driver~0.base, 24 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~acenic_probe_one.base, #funAddr~acenic_probe_one.offset, ~#acenic_pci_driver~0.base, 32 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~acenic_remove_one.base, #funAddr~acenic_remove_one.offset, ~#acenic_pci_driver~0.base, 40 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 48 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 56 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 64 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 72 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 80 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 88 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 96 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 104 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 112 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 120 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 128 + ~#acenic_pci_driver~0.offset, 8);call write~init~int(0, ~#acenic_pci_driver~0.base, 136 + ~#acenic_pci_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 137 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 145 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 153 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 161 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 169 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 177 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 185 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 193 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 201 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 209 + ~#acenic_pci_driver~0.offset, 8);call write~init~int(0, ~#acenic_pci_driver~0.base, 217 + ~#acenic_pci_driver~0.offset, 4);call write~init~int(0, ~#acenic_pci_driver~0.base, 221 + ~#acenic_pci_driver~0.offset, 4);call write~init~int(0, ~#acenic_pci_driver~0.base, 225 + ~#acenic_pci_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 229 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 237 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 245 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 253 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 261 + ~#acenic_pci_driver~0.offset, 8);call write~init~int(0, ~#acenic_pci_driver~0.base, 269 + ~#acenic_pci_driver~0.offset, 4);call write~init~int(0, ~#acenic_pci_driver~0.base, 273 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 285 + ~#acenic_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#acenic_pci_driver~0.base, 293 + ~#acenic_pci_driver~0.offset, 8);~ldv_0_data_data~0.base, ~ldv_0_data_data~0.offset := 0, 0;~ldv_0_line_line~0 := 0;~ldv_0_ret_val_default~0 := 0;~ldv_0_thread_thread~0.base, ~ldv_0_thread_thread~0.offset := 0, 0;~ldv_11_ret_default~0 := 0;~ldv_1_container_net_device~0.base, ~ldv_1_container_net_device~0.offset := 0, 0;~ldv_1_container_struct_ethtool_cmd_ptr~0.base, ~ldv_1_container_struct_ethtool_cmd_ptr~0.offset := 0, 0;~ldv_1_container_struct_ethtool_drvinfo_ptr~0.base, ~ldv_1_container_struct_ethtool_drvinfo_ptr~0.offset := 0, 0;~ldv_1_container_struct_sk_buff_ptr~0.base, ~ldv_1_container_struct_sk_buff_ptr~0.offset := 0, 0;~ldv_1_ldv_param_8_1_default~0 := 0;~ldv_2_container_pci_driver~0.base, ~ldv_2_container_pci_driver~0.offset := 0, 0;~ldv_2_resource_dev~0.base, ~ldv_2_resource_dev~0.offset := 0, 0;~#ldv_2_resource_pm_message~0.base, ~#ldv_2_resource_pm_message~0.offset := 179, 0;call #Ultimate.allocInit(4, 179);call write~init~int(0, ~#ldv_2_resource_pm_message~0.base, ~#ldv_2_resource_pm_message~0.offset, 4);~ldv_2_resource_struct_pci_device_id_ptr~0.base, ~ldv_2_resource_struct_pci_device_id_ptr~0.offset := 0, 0;~ldv_2_ret_default~0 := 0;~ldv_statevar_0~0 := 0;~ldv_statevar_1~0 := 0;~ldv_statevar_11~0 := 0;~ldv_statevar_2~0 := 0;~ldv_0_callback_handler~0.base, ~ldv_0_callback_handler~0.offset := #funAddr~ace_interrupt.base, #funAddr~ace_interrupt.offset;~ldv_11_exit_acenic_pci_driver_exit_default~0.base, ~ldv_11_exit_acenic_pci_driver_exit_default~0.offset := #funAddr~acenic_pci_driver_exit.base, #funAddr~acenic_pci_driver_exit.offset;~ldv_11_init_acenic_pci_driver_init_default~0.base, ~ldv_11_init_acenic_pci_driver_init_default~0.offset := #funAddr~acenic_pci_driver_init.base, #funAddr~acenic_pci_driver_init.offset;~ldv_1_callback_get_drvinfo~0.base, ~ldv_1_callback_get_drvinfo~0.offset := #funAddr~ace_get_drvinfo.base, #funAddr~ace_get_drvinfo.offset;~ldv_1_callback_get_settings~0.base, ~ldv_1_callback_get_settings~0.offset := #funAddr~ace_get_settings.base, #funAddr~ace_get_settings.offset;~ldv_1_callback_ndo_change_mtu~0.base, ~ldv_1_callback_ndo_change_mtu~0.offset := #funAddr~ace_change_mtu.base, #funAddr~ace_change_mtu.offset;~ldv_1_callback_ndo_get_stats~0.base, ~ldv_1_callback_ndo_get_stats~0.offset := #funAddr~ace_get_stats.base, #funAddr~ace_get_stats.offset;~ldv_1_callback_ndo_set_mac_address~0.base, ~ldv_1_callback_ndo_set_mac_address~0.offset := #funAddr~ace_set_mac_addr.base, #funAddr~ace_set_mac_addr.offset;~ldv_1_callback_ndo_set_rx_mode~0.base, ~ldv_1_callback_ndo_set_rx_mode~0.offset := #funAddr~ace_set_multicast_list.base, #funAddr~ace_set_multicast_list.offset;~ldv_1_callback_ndo_start_xmit~0.base, ~ldv_1_callback_ndo_start_xmit~0.offset := #funAddr~ace_start_xmit.base, #funAddr~ace_start_xmit.offset;~ldv_1_callback_ndo_tx_timeout~0.base, ~ldv_1_callback_ndo_tx_timeout~0.offset := #funAddr~ace_watchdog.base, #funAddr~ace_watchdog.offset;~ldv_1_callback_ndo_validate_addr~0.base, ~ldv_1_callback_ndo_validate_addr~0.offset := #funAddr~eth_validate_addr.base, #funAddr~eth_validate_addr.offset;~ldv_1_callback_set_settings~0.base, ~ldv_1_callback_set_settings~0.offset := #funAddr~ace_set_settings.base, #funAddr~ace_set_settings.offset;~ldv_spin__xmit_lock_of_netdev_queue~0 := 1;~ldv_spin_addr_list_lock_of_net_device~0 := 1;~ldv_spin_alloc_lock_of_task_struct~0 := 1;~ldv_spin_i_lock_of_inode~0 := 1;~ldv_spin_lock~0 := 1;~ldv_spin_lock_of_NOT_ARG_SIGN~0 := 1;~ldv_spin_lock_of_res_counter~0 := 1;~ldv_spin_lru_lock_of_netns_frags~0 := 1;~ldv_spin_node_size_lock_of_pglist_data~0 := 1;~ldv_spin_ptl~0 := 1;~ldv_spin_siglock_of_sighand_struct~0 := 1;~ldv_spin_sk_dst_lock_of_sock~0 := 1;~ldv_spin_slock_of_NOT_ARG_SIGN~0 := 1;~ldv_spin_tx_global_lock_of_net_device~0 := 1; {25932#true} is VALID [2022-02-20 22:37:18,717 INFO L290 TraceCheckUtils]: 1: Hoare triple {25932#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret1055#1, main_~tmp~74#1;havoc main_~tmp~74#1;assume { :begin_inline_ldv_initialize } true; {25932#true} is VALID [2022-02-20 22:37:18,717 INFO L290 TraceCheckUtils]: 2: Hoare triple {25932#true} assume { :end_inline_ldv_initialize } true;assume { :begin_inline_ldv_initialize_external_data } true;assume { :begin_inline_ldv_allocate_external_0 } true;havoc ldv_allocate_external_0_#t~ret1039#1.base, ldv_allocate_external_0_#t~ret1039#1.offset, ldv_allocate_external_0_#t~ret1040#1.base, ldv_allocate_external_0_#t~ret1040#1.offset, ldv_allocate_external_0_#t~ret1041#1.base, ldv_allocate_external_0_#t~ret1041#1.offset, ldv_allocate_external_0_#t~ret1042#1.base, ldv_allocate_external_0_#t~ret1042#1.offset, ldv_allocate_external_0_#t~ret1043#1.base, ldv_allocate_external_0_#t~ret1043#1.offset, ldv_allocate_external_0_#t~ret1044#1.base, ldv_allocate_external_0_#t~ret1044#1.offset; {25932#true} is VALID [2022-02-20 22:37:18,717 INFO L272 TraceCheckUtils]: 3: Hoare triple {25932#true} call ldv_allocate_external_0_#t~ret1039#1.base, ldv_allocate_external_0_#t~ret1039#1.offset := ldv_malloc(0); {26043#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:37:18,718 INFO L290 TraceCheckUtils]: 4: Hoare triple {26043#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~2.base, ~res~2.offset;havoc ~tmp~101.base, ~tmp~101.offset;havoc ~tmp___0~42;havoc ~tmp___1~18; {25932#true} is VALID [2022-02-20 22:37:18,718 INFO L272 TraceCheckUtils]: 5: Hoare triple {25932#true} call #t~ret1153 := ldv_undef_int(); {25932#true} is VALID [2022-02-20 22:37:18,719 INFO L290 TraceCheckUtils]: 6: Hoare triple {25932#true} havoc ~tmp~106;assume -2147483648 <= #t~nondet1164 && #t~nondet1164 <= 2147483647;~tmp~106 := #t~nondet1164;havoc #t~nondet1164;#res := ~tmp~106; {25932#true} is VALID [2022-02-20 22:37:18,719 INFO L290 TraceCheckUtils]: 7: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,719 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {25932#true} {25932#true} #5505#return; {25932#true} is VALID [2022-02-20 22:37:18,721 INFO L290 TraceCheckUtils]: 9: Hoare triple {25932#true} assume -2147483648 <= #t~ret1153 && #t~ret1153 <= 2147483647;~tmp___1~18 := #t~ret1153;havoc #t~ret1153; {25932#true} is VALID [2022-02-20 22:37:18,721 INFO L290 TraceCheckUtils]: 10: Hoare triple {25932#true} assume !(0 != ~tmp___1~18);#res.base, #res.offset := 0, 0; {25932#true} is VALID [2022-02-20 22:37:18,721 INFO L290 TraceCheckUtils]: 11: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,721 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {25932#true} {25932#true} #6075#return; {25932#true} is VALID [2022-02-20 22:37:18,721 INFO L290 TraceCheckUtils]: 13: Hoare triple {25932#true} ~ldv_0_data_data~0.base, ~ldv_0_data_data~0.offset := ldv_allocate_external_0_#t~ret1039#1.base, ldv_allocate_external_0_#t~ret1039#1.offset;havoc ldv_allocate_external_0_#t~ret1039#1.base, ldv_allocate_external_0_#t~ret1039#1.offset;~ldv_0_thread_thread~0.base, ~ldv_0_thread_thread~0.offset := 0, 0; {25932#true} is VALID [2022-02-20 22:37:18,722 INFO L272 TraceCheckUtils]: 14: Hoare triple {25932#true} call ldv_allocate_external_0_#t~ret1040#1.base, ldv_allocate_external_0_#t~ret1040#1.offset := ldv_malloc(3027); {26043#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:37:18,722 INFO L290 TraceCheckUtils]: 15: Hoare triple {26043#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~2.base, ~res~2.offset;havoc ~tmp~101.base, ~tmp~101.offset;havoc ~tmp___0~42;havoc ~tmp___1~18; {25932#true} is VALID [2022-02-20 22:37:18,722 INFO L272 TraceCheckUtils]: 16: Hoare triple {25932#true} call #t~ret1153 := ldv_undef_int(); {25932#true} is VALID [2022-02-20 22:37:18,722 INFO L290 TraceCheckUtils]: 17: Hoare triple {25932#true} havoc ~tmp~106;assume -2147483648 <= #t~nondet1164 && #t~nondet1164 <= 2147483647;~tmp~106 := #t~nondet1164;havoc #t~nondet1164;#res := ~tmp~106; {25932#true} is VALID [2022-02-20 22:37:18,723 INFO L290 TraceCheckUtils]: 18: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,723 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {25932#true} {25932#true} #5505#return; {25932#true} is VALID [2022-02-20 22:37:18,723 INFO L290 TraceCheckUtils]: 20: Hoare triple {25932#true} assume -2147483648 <= #t~ret1153 && #t~ret1153 <= 2147483647;~tmp___1~18 := #t~ret1153;havoc #t~ret1153; {25932#true} is VALID [2022-02-20 22:37:18,723 INFO L290 TraceCheckUtils]: 21: Hoare triple {25932#true} assume !(0 != ~tmp___1~18);#res.base, #res.offset := 0, 0; {25932#true} is VALID [2022-02-20 22:37:18,723 INFO L290 TraceCheckUtils]: 22: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,723 INFO L284 TraceCheckUtils]: 23: Hoare quadruple {25932#true} {25932#true} #6077#return; {25932#true} is VALID [2022-02-20 22:37:18,723 INFO L290 TraceCheckUtils]: 24: Hoare triple {25932#true} ~ldv_1_container_net_device~0.base, ~ldv_1_container_net_device~0.offset := ldv_allocate_external_0_#t~ret1040#1.base, ldv_allocate_external_0_#t~ret1040#1.offset;havoc ldv_allocate_external_0_#t~ret1040#1.base, ldv_allocate_external_0_#t~ret1040#1.offset; {25932#true} is VALID [2022-02-20 22:37:18,724 INFO L272 TraceCheckUtils]: 25: Hoare triple {25932#true} call ldv_allocate_external_0_#t~ret1041#1.base, ldv_allocate_external_0_#t~ret1041#1.offset := ldv_malloc(44); {26043#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:37:18,724 INFO L290 TraceCheckUtils]: 26: Hoare triple {26043#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~2.base, ~res~2.offset;havoc ~tmp~101.base, ~tmp~101.offset;havoc ~tmp___0~42;havoc ~tmp___1~18; {25932#true} is VALID [2022-02-20 22:37:18,724 INFO L272 TraceCheckUtils]: 27: Hoare triple {25932#true} call #t~ret1153 := ldv_undef_int(); {25932#true} is VALID [2022-02-20 22:37:18,724 INFO L290 TraceCheckUtils]: 28: Hoare triple {25932#true} havoc ~tmp~106;assume -2147483648 <= #t~nondet1164 && #t~nondet1164 <= 2147483647;~tmp~106 := #t~nondet1164;havoc #t~nondet1164;#res := ~tmp~106; {25932#true} is VALID [2022-02-20 22:37:18,724 INFO L290 TraceCheckUtils]: 29: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,724 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {25932#true} {25932#true} #5505#return; {25932#true} is VALID [2022-02-20 22:37:18,725 INFO L290 TraceCheckUtils]: 31: Hoare triple {25932#true} assume -2147483648 <= #t~ret1153 && #t~ret1153 <= 2147483647;~tmp___1~18 := #t~ret1153;havoc #t~ret1153; {25932#true} is VALID [2022-02-20 22:37:18,725 INFO L290 TraceCheckUtils]: 32: Hoare triple {25932#true} assume !(0 != ~tmp___1~18);#res.base, #res.offset := 0, 0; {25932#true} is VALID [2022-02-20 22:37:18,725 INFO L290 TraceCheckUtils]: 33: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,725 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {25932#true} {25932#true} #6079#return; {25932#true} is VALID [2022-02-20 22:37:18,725 INFO L290 TraceCheckUtils]: 35: Hoare triple {25932#true} ~ldv_1_container_struct_ethtool_cmd_ptr~0.base, ~ldv_1_container_struct_ethtool_cmd_ptr~0.offset := ldv_allocate_external_0_#t~ret1041#1.base, ldv_allocate_external_0_#t~ret1041#1.offset;havoc ldv_allocate_external_0_#t~ret1041#1.base, ldv_allocate_external_0_#t~ret1041#1.offset; {25932#true} is VALID [2022-02-20 22:37:18,726 INFO L272 TraceCheckUtils]: 36: Hoare triple {25932#true} call ldv_allocate_external_0_#t~ret1042#1.base, ldv_allocate_external_0_#t~ret1042#1.offset := ldv_malloc(196); {26043#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:37:18,726 INFO L290 TraceCheckUtils]: 37: Hoare triple {26043#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~2.base, ~res~2.offset;havoc ~tmp~101.base, ~tmp~101.offset;havoc ~tmp___0~42;havoc ~tmp___1~18; {25932#true} is VALID [2022-02-20 22:37:18,726 INFO L272 TraceCheckUtils]: 38: Hoare triple {25932#true} call #t~ret1153 := ldv_undef_int(); {25932#true} is VALID [2022-02-20 22:37:18,726 INFO L290 TraceCheckUtils]: 39: Hoare triple {25932#true} havoc ~tmp~106;assume -2147483648 <= #t~nondet1164 && #t~nondet1164 <= 2147483647;~tmp~106 := #t~nondet1164;havoc #t~nondet1164;#res := ~tmp~106; {25932#true} is VALID [2022-02-20 22:37:18,726 INFO L290 TraceCheckUtils]: 40: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,726 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {25932#true} {25932#true} #5505#return; {25932#true} is VALID [2022-02-20 22:37:18,726 INFO L290 TraceCheckUtils]: 42: Hoare triple {25932#true} assume -2147483648 <= #t~ret1153 && #t~ret1153 <= 2147483647;~tmp___1~18 := #t~ret1153;havoc #t~ret1153; {25932#true} is VALID [2022-02-20 22:37:18,726 INFO L290 TraceCheckUtils]: 43: Hoare triple {25932#true} assume !(0 != ~tmp___1~18);#res.base, #res.offset := 0, 0; {25932#true} is VALID [2022-02-20 22:37:18,727 INFO L290 TraceCheckUtils]: 44: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,727 INFO L284 TraceCheckUtils]: 45: Hoare quadruple {25932#true} {25932#true} #6081#return; {25932#true} is VALID [2022-02-20 22:37:18,727 INFO L290 TraceCheckUtils]: 46: Hoare triple {25932#true} ~ldv_1_container_struct_ethtool_drvinfo_ptr~0.base, ~ldv_1_container_struct_ethtool_drvinfo_ptr~0.offset := ldv_allocate_external_0_#t~ret1042#1.base, ldv_allocate_external_0_#t~ret1042#1.offset;havoc ldv_allocate_external_0_#t~ret1042#1.base, ldv_allocate_external_0_#t~ret1042#1.offset; {25932#true} is VALID [2022-02-20 22:37:18,727 INFO L272 TraceCheckUtils]: 47: Hoare triple {25932#true} call ldv_allocate_external_0_#t~ret1043#1.base, ldv_allocate_external_0_#t~ret1043#1.offset := ldv_malloc(245); {26043#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:37:18,727 INFO L290 TraceCheckUtils]: 48: Hoare triple {26043#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~2.base, ~res~2.offset;havoc ~tmp~101.base, ~tmp~101.offset;havoc ~tmp___0~42;havoc ~tmp___1~18; {25932#true} is VALID [2022-02-20 22:37:18,728 INFO L272 TraceCheckUtils]: 49: Hoare triple {25932#true} call #t~ret1153 := ldv_undef_int(); {25932#true} is VALID [2022-02-20 22:37:18,728 INFO L290 TraceCheckUtils]: 50: Hoare triple {25932#true} havoc ~tmp~106;assume -2147483648 <= #t~nondet1164 && #t~nondet1164 <= 2147483647;~tmp~106 := #t~nondet1164;havoc #t~nondet1164;#res := ~tmp~106; {25932#true} is VALID [2022-02-20 22:37:18,728 INFO L290 TraceCheckUtils]: 51: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,728 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {25932#true} {25932#true} #5505#return; {25932#true} is VALID [2022-02-20 22:37:18,728 INFO L290 TraceCheckUtils]: 53: Hoare triple {25932#true} assume -2147483648 <= #t~ret1153 && #t~ret1153 <= 2147483647;~tmp___1~18 := #t~ret1153;havoc #t~ret1153; {25932#true} is VALID [2022-02-20 22:37:18,728 INFO L290 TraceCheckUtils]: 54: Hoare triple {25932#true} assume !(0 != ~tmp___1~18);#res.base, #res.offset := 0, 0; {25932#true} is VALID [2022-02-20 22:37:18,728 INFO L290 TraceCheckUtils]: 55: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,729 INFO L284 TraceCheckUtils]: 56: Hoare quadruple {25932#true} {25932#true} #6083#return; {25932#true} is VALID [2022-02-20 22:37:18,729 INFO L290 TraceCheckUtils]: 57: Hoare triple {25932#true} ~ldv_1_container_struct_sk_buff_ptr~0.base, ~ldv_1_container_struct_sk_buff_ptr~0.offset := ldv_allocate_external_0_#t~ret1043#1.base, ldv_allocate_external_0_#t~ret1043#1.offset;havoc ldv_allocate_external_0_#t~ret1043#1.base, ldv_allocate_external_0_#t~ret1043#1.offset; {25932#true} is VALID [2022-02-20 22:37:18,729 INFO L272 TraceCheckUtils]: 58: Hoare triple {25932#true} call ldv_allocate_external_0_#t~ret1044#1.base, ldv_allocate_external_0_#t~ret1044#1.offset := ldv_malloc(3018); {26043#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:37:18,729 INFO L290 TraceCheckUtils]: 59: Hoare triple {26043#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~2.base, ~res~2.offset;havoc ~tmp~101.base, ~tmp~101.offset;havoc ~tmp___0~42;havoc ~tmp___1~18; {25932#true} is VALID [2022-02-20 22:37:18,729 INFO L272 TraceCheckUtils]: 60: Hoare triple {25932#true} call #t~ret1153 := ldv_undef_int(); {25932#true} is VALID [2022-02-20 22:37:18,730 INFO L290 TraceCheckUtils]: 61: Hoare triple {25932#true} havoc ~tmp~106;assume -2147483648 <= #t~nondet1164 && #t~nondet1164 <= 2147483647;~tmp~106 := #t~nondet1164;havoc #t~nondet1164;#res := ~tmp~106; {25932#true} is VALID [2022-02-20 22:37:18,730 INFO L290 TraceCheckUtils]: 62: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,730 INFO L284 TraceCheckUtils]: 63: Hoare quadruple {25932#true} {25932#true} #5505#return; {25932#true} is VALID [2022-02-20 22:37:18,730 INFO L290 TraceCheckUtils]: 64: Hoare triple {25932#true} assume -2147483648 <= #t~ret1153 && #t~ret1153 <= 2147483647;~tmp___1~18 := #t~ret1153;havoc #t~ret1153; {25932#true} is VALID [2022-02-20 22:37:18,730 INFO L290 TraceCheckUtils]: 65: Hoare triple {25932#true} assume !(0 != ~tmp___1~18);#res.base, #res.offset := 0, 0; {25932#true} is VALID [2022-02-20 22:37:18,730 INFO L290 TraceCheckUtils]: 66: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,730 INFO L284 TraceCheckUtils]: 67: Hoare quadruple {25932#true} {25932#true} #6085#return; {25932#true} is VALID [2022-02-20 22:37:18,730 INFO L290 TraceCheckUtils]: 68: Hoare triple {25932#true} ~ldv_2_resource_dev~0.base, ~ldv_2_resource_dev~0.offset := ldv_allocate_external_0_#t~ret1044#1.base, ldv_allocate_external_0_#t~ret1044#1.offset;havoc ldv_allocate_external_0_#t~ret1044#1.base, ldv_allocate_external_0_#t~ret1044#1.offset; {25932#true} is VALID [2022-02-20 22:37:18,731 INFO L290 TraceCheckUtils]: 69: Hoare triple {25932#true} assume { :end_inline_ldv_allocate_external_0 } true; {25932#true} is VALID [2022-02-20 22:37:18,731 INFO L290 TraceCheckUtils]: 70: Hoare triple {25932#true} assume { :end_inline_ldv_initialize_external_data } true;~ldv_statevar_11~0 := 7;~ldv_statevar_0~0 := 6;~ldv_statevar_1~0 := 5;~ldv_2_ret_default~0 := 1;~ldv_statevar_2~0 := 20; {25988#(= 20 ~ldv_statevar_2~0)} is VALID [2022-02-20 22:37:18,731 INFO L272 TraceCheckUtils]: 71: Hoare triple {25988#(= 20 ~ldv_statevar_2~0)} call main_#t~ret1055#1 := ldv_undef_int(); {25932#true} is VALID [2022-02-20 22:37:18,731 INFO L290 TraceCheckUtils]: 72: Hoare triple {25932#true} havoc ~tmp~106;assume -2147483648 <= #t~nondet1164 && #t~nondet1164 <= 2147483647;~tmp~106 := #t~nondet1164;havoc #t~nondet1164;#res := ~tmp~106; {25932#true} is VALID [2022-02-20 22:37:18,731 INFO L290 TraceCheckUtils]: 73: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,732 INFO L284 TraceCheckUtils]: 74: Hoare quadruple {25932#true} {25988#(= 20 ~ldv_statevar_2~0)} #6087#return; {25988#(= 20 ~ldv_statevar_2~0)} is VALID [2022-02-20 22:37:18,732 INFO L290 TraceCheckUtils]: 75: Hoare triple {25988#(= 20 ~ldv_statevar_2~0)} assume -2147483648 <= main_#t~ret1055#1 && main_#t~ret1055#1 <= 2147483647;main_~tmp~74#1 := main_#t~ret1055#1;havoc main_#t~ret1055#1; {25988#(= 20 ~ldv_statevar_2~0)} is VALID [2022-02-20 22:37:18,732 INFO L290 TraceCheckUtils]: 76: Hoare triple {25988#(= 20 ~ldv_statevar_2~0)} assume !(0 == main_~tmp~74#1); {25988#(= 20 ~ldv_statevar_2~0)} is VALID [2022-02-20 22:37:18,733 INFO L290 TraceCheckUtils]: 77: Hoare triple {25988#(= 20 ~ldv_statevar_2~0)} assume !(1 == main_~tmp~74#1); {25988#(= 20 ~ldv_statevar_2~0)} is VALID [2022-02-20 22:37:18,733 INFO L290 TraceCheckUtils]: 78: Hoare triple {25988#(= 20 ~ldv_statevar_2~0)} assume !(2 == main_~tmp~74#1); {25988#(= 20 ~ldv_statevar_2~0)} is VALID [2022-02-20 22:37:18,733 INFO L290 TraceCheckUtils]: 79: Hoare triple {25988#(= 20 ~ldv_statevar_2~0)} assume 3 == main_~tmp~74#1; {25988#(= 20 ~ldv_statevar_2~0)} is VALID [2022-02-20 22:37:18,734 INFO L290 TraceCheckUtils]: 80: Hoare triple {25988#(= 20 ~ldv_statevar_2~0)} assume { :begin_inline_ldv_pci_pci_instance_2 } true;ldv_pci_pci_instance_2_#in~arg0#1.base, ldv_pci_pci_instance_2_#in~arg0#1.offset := 0, 0;havoc ldv_pci_pci_instance_2_#t~ret1078#1, ldv_pci_pci_instance_2_#t~mem1079#1.base, ldv_pci_pci_instance_2_#t~mem1079#1.offset, ldv_pci_pci_instance_2_#t~mem1080#1.base, ldv_pci_pci_instance_2_#t~mem1080#1.offset, ldv_pci_pci_instance_2_#t~mem1081#1.base, ldv_pci_pci_instance_2_#t~mem1081#1.offset, ldv_pci_pci_instance_2_#t~ret1082#1, ldv_pci_pci_instance_2_#t~mem1083#1.base, ldv_pci_pci_instance_2_#t~mem1083#1.offset, ldv_pci_pci_instance_2_#t~mem1084#1.base, ldv_pci_pci_instance_2_#t~mem1084#1.offset, ldv_pci_pci_instance_2_#t~mem1085#1.base, ldv_pci_pci_instance_2_#t~mem1085#1.offset, ldv_pci_pci_instance_2_#t~mem1086#1.base, ldv_pci_pci_instance_2_#t~mem1086#1.offset, ldv_pci_pci_instance_2_#t~mem1087#1.base, ldv_pci_pci_instance_2_#t~mem1087#1.offset, ldv_pci_pci_instance_2_#t~mem1088#1.base, ldv_pci_pci_instance_2_#t~mem1088#1.offset, ldv_pci_pci_instance_2_#t~mem1089#1, ldv_pci_pci_instance_2_#t~ret1090#1, ldv_pci_pci_instance_2_#t~ret1091#1, ldv_pci_pci_instance_2_#t~mem1092#1.base, ldv_pci_pci_instance_2_#t~mem1092#1.offset, ldv_pci_pci_instance_2_#t~mem1093#1.base, ldv_pci_pci_instance_2_#t~mem1093#1.offset, ldv_pci_pci_instance_2_#t~mem1094#1, ldv_pci_pci_instance_2_#t~ret1095#1, ldv_pci_pci_instance_2_#t~ret1096#1, ldv_pci_pci_instance_2_#t~ret1097#1, ldv_pci_pci_instance_2_#t~ret1098#1, ldv_pci_pci_instance_2_#t~ret1099#1, ldv_pci_pci_instance_2_#t~mem1100#1.base, ldv_pci_pci_instance_2_#t~mem1100#1.offset, ldv_pci_pci_instance_2_#t~ret1101#1, ldv_pci_pci_instance_2_#t~ret1102#1, ldv_pci_pci_instance_2_#t~ret1103#1, ldv_pci_pci_instance_2_#t~ret1104#1.base, ldv_pci_pci_instance_2_#t~ret1104#1.offset, ldv_pci_pci_instance_2_#t~ret1105#1.base, ldv_pci_pci_instance_2_#t~ret1105#1.offset, ldv_pci_pci_instance_2_#t~ret1106#1, ldv_pci_pci_instance_2_~arg0#1.base, ldv_pci_pci_instance_2_~arg0#1.offset, ldv_pci_pci_instance_2_~tmp~80#1, ldv_pci_pci_instance_2_~tmp___0~35#1, ldv_pci_pci_instance_2_~tmp___1~17#1, ldv_pci_pci_instance_2_~tmp___2~11#1.base, ldv_pci_pci_instance_2_~tmp___2~11#1.offset, ldv_pci_pci_instance_2_~tmp___3~6#1.base, ldv_pci_pci_instance_2_~tmp___3~6#1.offset, ldv_pci_pci_instance_2_~tmp___4~6#1;ldv_pci_pci_instance_2_~arg0#1.base, ldv_pci_pci_instance_2_~arg0#1.offset := ldv_pci_pci_instance_2_#in~arg0#1.base, ldv_pci_pci_instance_2_#in~arg0#1.offset;havoc ldv_pci_pci_instance_2_~tmp~80#1;havoc ldv_pci_pci_instance_2_~tmp___0~35#1;havoc ldv_pci_pci_instance_2_~tmp___1~17#1;havoc ldv_pci_pci_instance_2_~tmp___2~11#1.base, ldv_pci_pci_instance_2_~tmp___2~11#1.offset;havoc ldv_pci_pci_instance_2_~tmp___3~6#1.base, ldv_pci_pci_instance_2_~tmp___3~6#1.offset;havoc ldv_pci_pci_instance_2_~tmp___4~6#1; {25988#(= 20 ~ldv_statevar_2~0)} is VALID [2022-02-20 22:37:18,734 INFO L290 TraceCheckUtils]: 81: Hoare triple {25988#(= 20 ~ldv_statevar_2~0)} assume !(1 == ~ldv_statevar_2~0); {25988#(= 20 ~ldv_statevar_2~0)} is VALID [2022-02-20 22:37:18,735 INFO L290 TraceCheckUtils]: 82: Hoare triple {25988#(= 20 ~ldv_statevar_2~0)} assume !(2 == ~ldv_statevar_2~0); {25988#(= 20 ~ldv_statevar_2~0)} is VALID [2022-02-20 22:37:18,735 INFO L290 TraceCheckUtils]: 83: Hoare triple {25988#(= 20 ~ldv_statevar_2~0)} assume !(3 == ~ldv_statevar_2~0); {25988#(= 20 ~ldv_statevar_2~0)} is VALID [2022-02-20 22:37:18,735 INFO L290 TraceCheckUtils]: 84: Hoare triple {25988#(= 20 ~ldv_statevar_2~0)} assume !(4 == ~ldv_statevar_2~0); {25988#(= 20 ~ldv_statevar_2~0)} is VALID [2022-02-20 22:37:18,736 INFO L290 TraceCheckUtils]: 85: Hoare triple {25988#(= 20 ~ldv_statevar_2~0)} assume 5 == ~ldv_statevar_2~0; {25933#false} is VALID [2022-02-20 22:37:18,736 INFO L290 TraceCheckUtils]: 86: Hoare triple {25933#false} call ldv_pci_pci_instance_2_#t~mem1083#1.base, ldv_pci_pci_instance_2_#t~mem1083#1.offset := read~$Pointer$(~ldv_2_container_pci_driver~0.base, 72 + ~ldv_2_container_pci_driver~0.offset, 8); {25933#false} is VALID [2022-02-20 22:37:18,736 INFO L290 TraceCheckUtils]: 87: Hoare triple {25933#false} assume 0 != (ldv_pci_pci_instance_2_#t~mem1083#1.base + ldv_pci_pci_instance_2_#t~mem1083#1.offset) % 18446744073709551616;havoc ldv_pci_pci_instance_2_#t~mem1083#1.base, ldv_pci_pci_instance_2_#t~mem1083#1.offset;call ldv_pci_pci_instance_2_#t~mem1084#1.base, ldv_pci_pci_instance_2_#t~mem1084#1.offset := read~$Pointer$(~ldv_2_container_pci_driver~0.base, 72 + ~ldv_2_container_pci_driver~0.offset, 8);assume { :begin_inline_ldv_pci_instance_resume_2_5 } true;ldv_pci_instance_resume_2_5_#in~arg0#1.base, ldv_pci_instance_resume_2_5_#in~arg0#1.offset, ldv_pci_instance_resume_2_5_#in~arg1#1.base, ldv_pci_instance_resume_2_5_#in~arg1#1.offset := ldv_pci_pci_instance_2_#t~mem1084#1.base, ldv_pci_pci_instance_2_#t~mem1084#1.offset, ~ldv_2_resource_dev~0.base, ~ldv_2_resource_dev~0.offset;havoc ldv_pci_instance_resume_2_5_#t~ret1066#1, ldv_pci_instance_resume_2_5_~arg0#1.base, ldv_pci_instance_resume_2_5_~arg0#1.offset, ldv_pci_instance_resume_2_5_~arg1#1.base, ldv_pci_instance_resume_2_5_~arg1#1.offset;ldv_pci_instance_resume_2_5_~arg0#1.base, ldv_pci_instance_resume_2_5_~arg0#1.offset := ldv_pci_instance_resume_2_5_#in~arg0#1.base, ldv_pci_instance_resume_2_5_#in~arg0#1.offset;ldv_pci_instance_resume_2_5_~arg1#1.base, ldv_pci_instance_resume_2_5_~arg1#1.offset := ldv_pci_instance_resume_2_5_#in~arg1#1.base, ldv_pci_instance_resume_2_5_#in~arg1#1.offset; {25933#false} is VALID [2022-02-20 22:37:18,736 INFO L272 TraceCheckUtils]: 88: Hoare triple {25933#false} call ldv_pci_instance_resume_2_5_#t~ret1066#1 := ##fun~$Pointer$~TO~int(ldv_pci_instance_resume_2_5_~arg1#1.base, ldv_pci_instance_resume_2_5_~arg1#1.offset, ldv_pci_instance_resume_2_5_~arg0#1.base, ldv_pci_instance_resume_2_5_~arg0#1.offset); {25933#false} is VALID [2022-02-20 22:37:18,736 INFO L290 TraceCheckUtils]: 89: Hoare triple {25933#false} #~1067.base, #~1067.offset := #in~1067.base, #in~1067.offset; {25933#false} is VALID [2022-02-20 22:37:18,736 INFO L290 TraceCheckUtils]: 90: Hoare triple {25933#false} assume !(#in~#fp.base == #funAddr~eth_validate_addr.base && #in~#fp.offset == #funAddr~eth_validate_addr.offset); {25933#false} is VALID [2022-02-20 22:37:18,736 INFO L290 TraceCheckUtils]: 91: Hoare triple {25933#false} assume !(#in~#fp.base == #funAddr~ace_close.base && #in~#fp.offset == #funAddr~ace_close.offset); {25933#false} is VALID [2022-02-20 22:37:18,737 INFO L272 TraceCheckUtils]: 92: Hoare triple {25933#false} call #t~ret1269 := ace_open(#~1067.base, #~1067.offset); {25933#false} is VALID [2022-02-20 22:37:18,737 INFO L290 TraceCheckUtils]: 93: Hoare triple {25933#false} ~dev#1.base, ~dev#1.offset := #in~dev#1.base, #in~dev#1.offset;havoc ~ap~18#1.base, ~ap~18#1.offset;havoc ~tmp~54#1.base, ~tmp~54#1.offset;havoc ~regs~10#1.base, ~regs~10#1.offset;call ~#cmd~0#1.base, ~#cmd~0#1.offset := #Ultimate.allocOnStack(12);havoc ~tmp___0~23#1; {25933#false} is VALID [2022-02-20 22:37:18,737 INFO L272 TraceCheckUtils]: 94: Hoare triple {25933#false} call #t~ret753#1.base, #t~ret753#1.offset := netdev_priv(~dev#1.base, ~dev#1.offset); {25932#true} is VALID [2022-02-20 22:37:18,737 INFO L290 TraceCheckUtils]: 95: Hoare triple {25932#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3200 + ~dev.offset; {25932#true} is VALID [2022-02-20 22:37:18,737 INFO L290 TraceCheckUtils]: 96: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,737 INFO L284 TraceCheckUtils]: 97: Hoare quadruple {25932#true} {25933#false} #5743#return; {25933#false} is VALID [2022-02-20 22:37:18,737 INFO L290 TraceCheckUtils]: 98: Hoare triple {25933#false} ~tmp~54#1.base, ~tmp~54#1.offset := #t~ret753#1.base, #t~ret753#1.offset;havoc #t~ret753#1.base, #t~ret753#1.offset;~ap~18#1.base, ~ap~18#1.offset := ~tmp~54#1.base, ~tmp~54#1.offset;call #t~mem754#1.base, #t~mem754#1.offset := read~$Pointer$(~ap~18#1.base, 8 + ~ap~18#1.offset, 8);~regs~10#1.base, ~regs~10#1.offset := #t~mem754#1.base, #t~mem754#1.offset;havoc #t~mem754#1.base, #t~mem754#1.offset;call #t~mem755#1 := read~int(~ap~18#1.base, 300 + ~ap~18#1.offset, 4); {25933#false} is VALID [2022-02-20 22:37:18,737 INFO L290 TraceCheckUtils]: 99: Hoare triple {25933#false} assume !(0 == #t~mem755#1);havoc #t~mem755#1;call #t~mem757#1 := read~int(~dev#1.base, 516 + ~dev#1.offset, 4); {25933#false} is VALID [2022-02-20 22:37:18,738 INFO L272 TraceCheckUtils]: 100: Hoare triple {25933#false} call writel(18 + #t~mem757#1, ~regs~10#1.base, 1632 + ~regs~10#1.offset); {25932#true} is VALID [2022-02-20 22:37:18,738 INFO L290 TraceCheckUtils]: 101: Hoare triple {25932#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {25932#true} is VALID [2022-02-20 22:37:18,738 INFO L290 TraceCheckUtils]: 102: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,738 INFO L284 TraceCheckUtils]: 103: Hoare quadruple {25932#true} {25933#false} #5745#return; {25933#false} is VALID [2022-02-20 22:37:18,738 INFO L290 TraceCheckUtils]: 104: Hoare triple {25933#false} havoc #t~mem757#1;call write~int(15, ~#cmd~0#1.base, 8 + ~#cmd~0#1.offset, 4);call write~int(0, ~#cmd~0#1.base, 4 + ~#cmd~0#1.offset, 4);call write~int(0, ~#cmd~0#1.base, ~#cmd~0#1.offset, 4); {25933#false} is VALID [2022-02-20 22:37:18,738 INFO L272 TraceCheckUtils]: 105: Hoare triple {25933#false} call ace_issue_cmd(~regs~10#1.base, ~regs~10#1.offset, ~#cmd~0#1.base, ~#cmd~0#1.offset); {26062#(= |old(abs_7808)| abs_7808)} is VALID [2022-02-20 22:37:18,738 INFO L290 TraceCheckUtils]: 106: Hoare triple {26062#(= |old(abs_7808)| abs_7808)} ~regs.base, ~regs.offset := #in~regs.base, #in~regs.offset;~cmd.base, ~cmd.offset := #in~cmd.base, #in~cmd.offset;havoc ~idx~0; {25932#true} is VALID [2022-02-20 22:37:18,739 INFO L272 TraceCheckUtils]: 107: Hoare triple {25932#true} call #t~ret386 := readl(~regs.base, 1292 + ~regs.offset); {25932#true} is VALID [2022-02-20 22:37:18,739 INFO L290 TraceCheckUtils]: 108: Hoare triple {25932#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {25932#true} is VALID [2022-02-20 22:37:18,739 INFO L290 TraceCheckUtils]: 109: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,739 INFO L284 TraceCheckUtils]: 110: Hoare quadruple {25932#true} {25932#true} #5845#return; {25932#true} is VALID [2022-02-20 22:37:18,739 INFO L290 TraceCheckUtils]: 111: Hoare triple {25932#true} ~idx~0 := #t~ret386;havoc #t~ret386;call #t~mem387 := read~int(~cmd.base, ~cmd.offset, 4); {25932#true} is VALID [2022-02-20 22:37:18,739 INFO L272 TraceCheckUtils]: 112: Hoare triple {25932#true} call writel(#t~mem387, ~regs.base, 1792 + ~regs.offset + (if ~idx~0 % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~idx~0 % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~idx~0 % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616)); {25932#true} is VALID [2022-02-20 22:37:18,739 INFO L290 TraceCheckUtils]: 113: Hoare triple {25932#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {25932#true} is VALID [2022-02-20 22:37:18,739 INFO L290 TraceCheckUtils]: 114: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,740 INFO L284 TraceCheckUtils]: 115: Hoare quadruple {25932#true} {25932#true} #5847#return; {25932#true} is VALID [2022-02-20 22:37:18,740 INFO L290 TraceCheckUtils]: 116: Hoare triple {25932#true} havoc #t~mem387; {25932#true} is VALID [2022-02-20 22:37:18,740 INFO L290 TraceCheckUtils]: 117: Hoare triple {25932#true} assume 0 == 1 + ~idx~0;~idx~0 := 0; {25932#true} is VALID [2022-02-20 22:37:18,740 INFO L272 TraceCheckUtils]: 118: Hoare triple {25932#true} call writel(~idx~0, ~regs.base, 1292 + ~regs.offset); {25932#true} is VALID [2022-02-20 22:37:18,740 INFO L290 TraceCheckUtils]: 119: Hoare triple {25932#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {25932#true} is VALID [2022-02-20 22:37:18,740 INFO L290 TraceCheckUtils]: 120: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,740 INFO L284 TraceCheckUtils]: 121: Hoare quadruple {25932#true} {25932#true} #5849#return; {25932#true} is VALID [2022-02-20 22:37:18,740 INFO L290 TraceCheckUtils]: 122: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,741 INFO L284 TraceCheckUtils]: 123: Hoare quadruple {25932#true} {25933#false} #5747#return; {25933#false} is VALID [2022-02-20 22:37:18,741 INFO L290 TraceCheckUtils]: 124: Hoare triple {25933#false} call write~int(1, ~#cmd~0#1.base, 8 + ~#cmd~0#1.offset, 4);call write~int(1, ~#cmd~0#1.base, 4 + ~#cmd~0#1.offset, 4);call write~int(0, ~#cmd~0#1.base, ~#cmd~0#1.offset, 4); {25933#false} is VALID [2022-02-20 22:37:18,741 INFO L272 TraceCheckUtils]: 125: Hoare triple {25933#false} call ace_issue_cmd(~regs~10#1.base, ~regs~10#1.offset, ~#cmd~0#1.base, ~#cmd~0#1.offset); {26062#(= |old(abs_7808)| abs_7808)} is VALID [2022-02-20 22:37:18,741 INFO L290 TraceCheckUtils]: 126: Hoare triple {26062#(= |old(abs_7808)| abs_7808)} ~regs.base, ~regs.offset := #in~regs.base, #in~regs.offset;~cmd.base, ~cmd.offset := #in~cmd.base, #in~cmd.offset;havoc ~idx~0; {25932#true} is VALID [2022-02-20 22:37:18,741 INFO L272 TraceCheckUtils]: 127: Hoare triple {25932#true} call #t~ret386 := readl(~regs.base, 1292 + ~regs.offset); {25932#true} is VALID [2022-02-20 22:37:18,741 INFO L290 TraceCheckUtils]: 128: Hoare triple {25932#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {25932#true} is VALID [2022-02-20 22:37:18,741 INFO L290 TraceCheckUtils]: 129: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,741 INFO L284 TraceCheckUtils]: 130: Hoare quadruple {25932#true} {25932#true} #5845#return; {25932#true} is VALID [2022-02-20 22:37:18,742 INFO L290 TraceCheckUtils]: 131: Hoare triple {25932#true} ~idx~0 := #t~ret386;havoc #t~ret386;call #t~mem387 := read~int(~cmd.base, ~cmd.offset, 4); {25932#true} is VALID [2022-02-20 22:37:18,742 INFO L272 TraceCheckUtils]: 132: Hoare triple {25932#true} call writel(#t~mem387, ~regs.base, 1792 + ~regs.offset + (if ~idx~0 % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~idx~0 % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~idx~0 % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616)); {25932#true} is VALID [2022-02-20 22:37:18,742 INFO L290 TraceCheckUtils]: 133: Hoare triple {25932#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {25932#true} is VALID [2022-02-20 22:37:18,742 INFO L290 TraceCheckUtils]: 134: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,742 INFO L284 TraceCheckUtils]: 135: Hoare quadruple {25932#true} {25932#true} #5847#return; {25932#true} is VALID [2022-02-20 22:37:18,742 INFO L290 TraceCheckUtils]: 136: Hoare triple {25932#true} havoc #t~mem387; {25932#true} is VALID [2022-02-20 22:37:18,742 INFO L290 TraceCheckUtils]: 137: Hoare triple {25932#true} assume 0 == 1 + ~idx~0;~idx~0 := 0; {25932#true} is VALID [2022-02-20 22:37:18,743 INFO L272 TraceCheckUtils]: 138: Hoare triple {25932#true} call writel(~idx~0, ~regs.base, 1292 + ~regs.offset); {25932#true} is VALID [2022-02-20 22:37:18,743 INFO L290 TraceCheckUtils]: 139: Hoare triple {25932#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {25932#true} is VALID [2022-02-20 22:37:18,743 INFO L290 TraceCheckUtils]: 140: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,743 INFO L284 TraceCheckUtils]: 141: Hoare quadruple {25932#true} {25932#true} #5849#return; {25932#true} is VALID [2022-02-20 22:37:18,743 INFO L290 TraceCheckUtils]: 142: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,743 INFO L284 TraceCheckUtils]: 143: Hoare quadruple {25932#true} {25933#false} #5749#return; {25933#false} is VALID [2022-02-20 22:37:18,743 INFO L290 TraceCheckUtils]: 144: Hoare triple {25933#false} call #t~mem758#1 := read~int(~ap~18#1.base, 156 + ~ap~18#1.offset, 4); {25933#false} is VALID [2022-02-20 22:37:18,743 INFO L290 TraceCheckUtils]: 145: Hoare triple {25933#false} assume 0 != #t~mem758#1;havoc #t~mem758#1; {25933#false} is VALID [2022-02-20 22:37:18,744 INFO L272 TraceCheckUtils]: 146: Hoare triple {25933#false} call #t~ret759#1 := test_and_set_bit(0, ~ap~18#1.base, 84 + ~ap~18#1.offset); {25932#true} is VALID [2022-02-20 22:37:18,744 INFO L290 TraceCheckUtils]: 147: Hoare triple {25932#true} ~nr := #in~nr;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;#res := 0; {25932#true} is VALID [2022-02-20 22:37:18,744 INFO L290 TraceCheckUtils]: 148: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,744 INFO L284 TraceCheckUtils]: 149: Hoare quadruple {25932#true} {25933#false} #5751#return; {25933#false} is VALID [2022-02-20 22:37:18,744 INFO L290 TraceCheckUtils]: 150: Hoare triple {25933#false} assume -2147483648 <= #t~ret759#1 && #t~ret759#1 <= 2147483647;~tmp___0~23#1 := #t~ret759#1;havoc #t~ret759#1; {25933#false} is VALID [2022-02-20 22:37:18,744 INFO L290 TraceCheckUtils]: 151: Hoare triple {25933#false} assume 0 == ~tmp___0~23#1; {25933#false} is VALID [2022-02-20 22:37:18,744 INFO L272 TraceCheckUtils]: 152: Hoare triple {25933#false} call ace_load_jumbo_rx_ring(~dev#1.base, ~dev#1.offset, 48); {25933#false} is VALID [2022-02-20 22:37:18,744 INFO L290 TraceCheckUtils]: 153: Hoare triple {25933#false} ~dev#1.base, ~dev#1.offset := #in~dev#1.base, #in~dev#1.offset;~nr_bufs#1 := #in~nr_bufs#1;havoc ~ap~13#1.base, ~ap~13#1.offset;havoc ~tmp~49#1.base, ~tmp~49#1.offset;havoc ~regs~8#1.base, ~regs~8#1.offset;havoc ~i~4#1;havoc ~idx~3#1;havoc ~skb~4#1.base, ~skb~4#1.offset;havoc ~rd~2#1.base, ~rd~2#1.offset;havoc ~mapping~3#1;havoc ~tmp___0~18#1;havoc ~tmp___1~9#1; {25933#false} is VALID [2022-02-20 22:37:18,745 INFO L272 TraceCheckUtils]: 154: Hoare triple {25933#false} call #t~ret614#1.base, #t~ret614#1.offset := netdev_priv(~dev#1.base, ~dev#1.offset); {25932#true} is VALID [2022-02-20 22:37:18,745 INFO L290 TraceCheckUtils]: 155: Hoare triple {25932#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3200 + ~dev.offset; {25932#true} is VALID [2022-02-20 22:37:18,745 INFO L290 TraceCheckUtils]: 156: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,745 INFO L284 TraceCheckUtils]: 157: Hoare quadruple {25932#true} {25933#false} #5585#return; {25933#false} is VALID [2022-02-20 22:37:18,745 INFO L290 TraceCheckUtils]: 158: Hoare triple {25933#false} ~tmp~49#1.base, ~tmp~49#1.offset := #t~ret614#1.base, #t~ret614#1.offset;havoc #t~ret614#1.base, #t~ret614#1.offset;~ap~13#1.base, ~ap~13#1.offset := ~tmp~49#1.base, ~tmp~49#1.offset;call #t~mem615#1.base, #t~mem615#1.offset := read~$Pointer$(~ap~13#1.base, 8 + ~ap~13#1.offset, 8);~regs~8#1.base, ~regs~8#1.offset := #t~mem615#1.base, #t~mem615#1.offset;havoc #t~mem615#1.base, #t~mem615#1.offset;call #t~mem616#1 := read~int(~ap~13#1.base, 112 + ~ap~13#1.offset, 4);~idx~3#1 := (if #t~mem616#1 % 4294967296 % 65536 <= 32767 then #t~mem616#1 % 4294967296 % 65536 else #t~mem616#1 % 4294967296 % 65536 - 65536);havoc #t~mem616#1;~i~4#1 := 0; {25933#false} is VALID [2022-02-20 22:37:18,745 INFO L290 TraceCheckUtils]: 159: Hoare triple {25933#false} assume ~i~4#1 < ~nr_bufs#1; {25933#false} is VALID [2022-02-20 22:37:18,745 INFO L272 TraceCheckUtils]: 160: Hoare triple {25933#false} call #t~ret617#1.base, #t~ret617#1.offset := netdev_alloc_skb_ip_align(~dev#1.base, ~dev#1.offset, 9018); {25933#false} is VALID [2022-02-20 22:37:18,746 INFO L290 TraceCheckUtils]: 161: Hoare triple {25933#false} ~dev#1.base, ~dev#1.offset := #in~dev#1.base, #in~dev#1.offset;~length#1 := #in~length#1;havoc ~tmp~15#1.base, ~tmp~15#1.offset;assume { :begin_inline___netdev_alloc_skb_ip_align } true;__netdev_alloc_skb_ip_align_#in~dev#1.base, __netdev_alloc_skb_ip_align_#in~dev#1.offset, __netdev_alloc_skb_ip_align_#in~length#1, __netdev_alloc_skb_ip_align_#in~gfp#1 := ~dev#1.base, ~dev#1.offset, ~length#1, 32;havoc __netdev_alloc_skb_ip_align_#res#1.base, __netdev_alloc_skb_ip_align_#res#1.offset;havoc __netdev_alloc_skb_ip_align_#t~ret134#1.base, __netdev_alloc_skb_ip_align_#t~ret134#1.offset, __netdev_alloc_skb_ip_align_~dev#1.base, __netdev_alloc_skb_ip_align_~dev#1.offset, __netdev_alloc_skb_ip_align_~length#1, __netdev_alloc_skb_ip_align_~gfp#1, __netdev_alloc_skb_ip_align_~skb~0#1.base, __netdev_alloc_skb_ip_align_~skb~0#1.offset, __netdev_alloc_skb_ip_align_~tmp~14#1.base, __netdev_alloc_skb_ip_align_~tmp~14#1.offset;__netdev_alloc_skb_ip_align_~dev#1.base, __netdev_alloc_skb_ip_align_~dev#1.offset := __netdev_alloc_skb_ip_align_#in~dev#1.base, __netdev_alloc_skb_ip_align_#in~dev#1.offset;__netdev_alloc_skb_ip_align_~length#1 := __netdev_alloc_skb_ip_align_#in~length#1;__netdev_alloc_skb_ip_align_~gfp#1 := __netdev_alloc_skb_ip_align_#in~gfp#1;havoc __netdev_alloc_skb_ip_align_~skb~0#1.base, __netdev_alloc_skb_ip_align_~skb~0#1.offset;havoc __netdev_alloc_skb_ip_align_~tmp~14#1.base, __netdev_alloc_skb_ip_align_~tmp~14#1.offset;assume { :begin_inline_ldv___netdev_alloc_skb_59 } true;ldv___netdev_alloc_skb_59_#in~ldv_func_arg1#1.base, ldv___netdev_alloc_skb_59_#in~ldv_func_arg1#1.offset, ldv___netdev_alloc_skb_59_#in~ldv_func_arg2#1, ldv___netdev_alloc_skb_59_#in~flags#1 := __netdev_alloc_skb_ip_align_~dev#1.base, __netdev_alloc_skb_ip_align_~dev#1.offset, __netdev_alloc_skb_ip_align_~length#1, __netdev_alloc_skb_ip_align_~gfp#1;havoc ldv___netdev_alloc_skb_59_#res#1.base, ldv___netdev_alloc_skb_59_#res#1.offset;havoc ldv___netdev_alloc_skb_59_#t~ret1121#1.base, ldv___netdev_alloc_skb_59_#t~ret1121#1.offset, ldv___netdev_alloc_skb_59_~ldv_func_arg1#1.base, ldv___netdev_alloc_skb_59_~ldv_func_arg1#1.offset, ldv___netdev_alloc_skb_59_~ldv_func_arg2#1, ldv___netdev_alloc_skb_59_~flags#1, ldv___netdev_alloc_skb_59_~tmp~86#1.base, ldv___netdev_alloc_skb_59_~tmp~86#1.offset;ldv___netdev_alloc_skb_59_~ldv_func_arg1#1.base, ldv___netdev_alloc_skb_59_~ldv_func_arg1#1.offset := ldv___netdev_alloc_skb_59_#in~ldv_func_arg1#1.base, ldv___netdev_alloc_skb_59_#in~ldv_func_arg1#1.offset;ldv___netdev_alloc_skb_59_~ldv_func_arg2#1 := ldv___netdev_alloc_skb_59_#in~ldv_func_arg2#1;ldv___netdev_alloc_skb_59_~flags#1 := ldv___netdev_alloc_skb_59_#in~flags#1;havoc ldv___netdev_alloc_skb_59_~tmp~86#1.base, ldv___netdev_alloc_skb_59_~tmp~86#1.offset; {25933#false} is VALID [2022-02-20 22:37:18,746 INFO L272 TraceCheckUtils]: 162: Hoare triple {25933#false} call ldv_check_alloc_flags(ldv___netdev_alloc_skb_59_~flags#1); {25933#false} is VALID [2022-02-20 22:37:18,746 INFO L290 TraceCheckUtils]: 163: Hoare triple {25933#false} ~flags#1 := #in~flags#1;havoc ~tmp~93#1; {25933#false} is VALID [2022-02-20 22:37:18,746 INFO L290 TraceCheckUtils]: 164: Hoare triple {25933#false} assume 32 != ~flags#1 % 4294967296 && 0 != ~flags#1 % 4294967296; {25933#false} is VALID [2022-02-20 22:37:18,746 INFO L272 TraceCheckUtils]: 165: Hoare triple {25933#false} call #t~ret1132#1 := ldv_exclusive_spin_is_locked(); {25932#true} is VALID [2022-02-20 22:37:18,746 INFO L290 TraceCheckUtils]: 166: Hoare triple {25932#true} assume 2 == ~ldv_spin__xmit_lock_of_netdev_queue~0;#res := 1; {25932#true} is VALID [2022-02-20 22:37:18,746 INFO L290 TraceCheckUtils]: 167: Hoare triple {25932#true} assume true; {25932#true} is VALID [2022-02-20 22:37:18,746 INFO L284 TraceCheckUtils]: 168: Hoare quadruple {25932#true} {25933#false} #5523#return; {25933#false} is VALID [2022-02-20 22:37:18,747 INFO L290 TraceCheckUtils]: 169: Hoare triple {25933#false} assume -2147483648 <= #t~ret1132#1 && #t~ret1132#1 <= 2147483647;~tmp~93#1 := #t~ret1132#1;havoc #t~ret1132#1;assume { :begin_inline_ldv_assert_linux_alloc_spinlock__wrong_flags } true;ldv_assert_linux_alloc_spinlock__wrong_flags_#in~expr#1 := (if 0 == ~tmp~93#1 then 1 else 0);havoc ldv_assert_linux_alloc_spinlock__wrong_flags_~expr#1;ldv_assert_linux_alloc_spinlock__wrong_flags_~expr#1 := ldv_assert_linux_alloc_spinlock__wrong_flags_#in~expr#1; {25933#false} is VALID [2022-02-20 22:37:18,747 INFO L290 TraceCheckUtils]: 170: Hoare triple {25933#false} assume 0 == ldv_assert_linux_alloc_spinlock__wrong_flags_~expr#1; {25933#false} is VALID [2022-02-20 22:37:18,747 INFO L290 TraceCheckUtils]: 171: Hoare triple {25933#false} assume !false; {25933#false} is VALID [2022-02-20 22:37:18,748 INFO L134 CoverageAnalysis]: Checked inductivity of 198 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 198 trivial. 0 not checked. [2022-02-20 22:37:18,748 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:37:18,748 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1938295448] [2022-02-20 22:37:18,748 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1938295448] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:37:18,748 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 22:37:18,749 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-02-20 22:37:18,749 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1581836757] [2022-02-20 22:37:18,749 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:37:18,751 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 13.2) internal successors, (66), 3 states have internal predecessors, (66), 3 states have call successors, (23), 4 states have call predecessors, (23), 1 states have return successors, (18), 3 states have call predecessors, (18), 3 states have call successors, (18) Word has length 172 [2022-02-20 22:37:18,752 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:37:18,752 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 13.2) internal successors, (66), 3 states have internal predecessors, (66), 3 states have call successors, (23), 4 states have call predecessors, (23), 1 states have return successors, (18), 3 states have call predecessors, (18), 3 states have call successors, (18) [2022-02-20 22:37:18,840 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 107 edges. 107 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:37:18,840 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-02-20 22:37:18,840 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:37:18,840 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-02-20 22:37:18,841 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-02-20 22:37:18,841 INFO L87 Difference]: Start difference. First operand 4049 states and 5741 transitions. Second operand has 5 states, 5 states have (on average 13.2) internal successors, (66), 3 states have internal predecessors, (66), 3 states have call successors, (23), 4 states have call predecessors, (23), 1 states have return successors, (18), 3 states have call predecessors, (18), 3 states have call successors, (18)