./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/ldv-linux-3.14/linux-3.14_complex_emg_linux-kernel-locking-spinlock_drivers-net-irda-via-ircc.cil.i --full-output -ea --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 03d7b7b3 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -ea -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/ldv-linux-3.14/linux-3.14_complex_emg_linux-kernel-locking-spinlock_drivers-net-irda-via-ircc.cil.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 67e7778ced54570c612880d3f2f5d48e6e2d3dc55afd632628e45d31cdc74c58 --- Real Ultimate output --- This is Ultimate 0.2.2-dev-03d7b7b [2022-02-20 22:48:38,632 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-02-20 22:48:38,634 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-02-20 22:48:38,685 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-02-20 22:48:38,685 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-02-20 22:48:38,686 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-02-20 22:48:38,687 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-02-20 22:48:38,688 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-02-20 22:48:38,689 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-02-20 22:48:38,690 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-02-20 22:48:38,690 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-02-20 22:48:38,691 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-02-20 22:48:38,691 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-02-20 22:48:38,692 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-02-20 22:48:38,693 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-02-20 22:48:38,693 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-02-20 22:48:38,694 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-02-20 22:48:38,695 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-02-20 22:48:38,696 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-02-20 22:48:38,697 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-02-20 22:48:38,698 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-02-20 22:48:38,706 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-02-20 22:48:38,708 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-02-20 22:48:38,709 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-02-20 22:48:38,714 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-02-20 22:48:38,714 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-02-20 22:48:38,715 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-02-20 22:48:38,716 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-02-20 22:48:38,716 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-02-20 22:48:38,717 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-02-20 22:48:38,717 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-02-20 22:48:38,718 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-02-20 22:48:38,719 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-02-20 22:48:38,719 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-02-20 22:48:38,720 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-02-20 22:48:38,720 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-02-20 22:48:38,721 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-02-20 22:48:38,721 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-02-20 22:48:38,721 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-02-20 22:48:38,722 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-02-20 22:48:38,722 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-02-20 22:48:38,723 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2022-02-20 22:48:38,750 INFO L113 SettingsManager]: Loading preferences was successful [2022-02-20 22:48:38,750 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-02-20 22:48:38,751 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-02-20 22:48:38,751 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-02-20 22:48:38,751 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-02-20 22:48:38,752 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-02-20 22:48:38,752 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-02-20 22:48:38,752 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-02-20 22:48:38,752 INFO L138 SettingsManager]: * Use SBE=true [2022-02-20 22:48:38,752 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-02-20 22:48:38,753 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-02-20 22:48:38,753 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-02-20 22:48:38,753 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-02-20 22:48:38,754 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-02-20 22:48:38,754 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-02-20 22:48:38,754 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-02-20 22:48:38,754 INFO L138 SettingsManager]: * Use constant arrays=true [2022-02-20 22:48:38,754 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-02-20 22:48:38,754 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-02-20 22:48:38,755 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-02-20 22:48:38,755 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-02-20 22:48:38,755 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-02-20 22:48:38,755 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-02-20 22:48:38,755 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-02-20 22:48:38,755 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-02-20 22:48:38,756 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-02-20 22:48:38,756 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-02-20 22:48:38,756 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2022-02-20 22:48:38,756 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2022-02-20 22:48:38,756 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-02-20 22:48:38,756 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 67e7778ced54570c612880d3f2f5d48e6e2d3dc55afd632628e45d31cdc74c58 [2022-02-20 22:48:38,956 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-02-20 22:48:38,970 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-02-20 22:48:38,972 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-02-20 22:48:38,972 INFO L271 PluginConnector]: Initializing CDTParser... [2022-02-20 22:48:38,973 INFO L275 PluginConnector]: CDTParser initialized [2022-02-20 22:48:38,974 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/ldv-linux-3.14/linux-3.14_complex_emg_linux-kernel-locking-spinlock_drivers-net-irda-via-ircc.cil.i [2022-02-20 22:48:39,047 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/89d9cb75d/f684de65c61648de81ec743eec6a5480/FLAG6f6b6df76 [2022-02-20 22:48:39,683 INFO L306 CDTParser]: Found 1 translation units. [2022-02-20 22:48:39,684 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.14/linux-3.14_complex_emg_linux-kernel-locking-spinlock_drivers-net-irda-via-ircc.cil.i [2022-02-20 22:48:39,723 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/89d9cb75d/f684de65c61648de81ec743eec6a5480/FLAG6f6b6df76 [2022-02-20 22:48:40,015 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/89d9cb75d/f684de65c61648de81ec743eec6a5480 [2022-02-20 22:48:40,017 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-02-20 22:48:40,018 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-02-20 22:48:40,019 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-02-20 22:48:40,019 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-02-20 22:48:40,022 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-02-20 22:48:40,023 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.02 10:48:40" (1/1) ... [2022-02-20 22:48:40,024 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3f80b037 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:48:40, skipping insertion in model container [2022-02-20 22:48:40,024 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.02 10:48:40" (1/1) ... [2022-02-20 22:48:40,029 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-02-20 22:48:40,123 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-02-20 22:48:41,854 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.14/linux-3.14_complex_emg_linux-kernel-locking-spinlock_drivers-net-irda-via-ircc.cil.i[329615,329628] [2022-02-20 22:48:41,856 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.14/linux-3.14_complex_emg_linux-kernel-locking-spinlock_drivers-net-irda-via-ircc.cil.i[329784,329797] [2022-02-20 22:48:41,856 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.14/linux-3.14_complex_emg_linux-kernel-locking-spinlock_drivers-net-irda-via-ircc.cil.i[329951,329964] [2022-02-20 22:48:41,857 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.14/linux-3.14_complex_emg_linux-kernel-locking-spinlock_drivers-net-irda-via-ircc.cil.i[330119,330132] [2022-02-20 22:48:41,873 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-20 22:48:41,906 INFO L203 MainTranslator]: Completed pre-run [2022-02-20 22:48:42,168 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.14/linux-3.14_complex_emg_linux-kernel-locking-spinlock_drivers-net-irda-via-ircc.cil.i[329615,329628] [2022-02-20 22:48:42,169 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.14/linux-3.14_complex_emg_linux-kernel-locking-spinlock_drivers-net-irda-via-ircc.cil.i[329784,329797] [2022-02-20 22:48:42,169 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.14/linux-3.14_complex_emg_linux-kernel-locking-spinlock_drivers-net-irda-via-ircc.cil.i[329951,329964] [2022-02-20 22:48:42,170 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.14/linux-3.14_complex_emg_linux-kernel-locking-spinlock_drivers-net-irda-via-ircc.cil.i[330119,330132] [2022-02-20 22:48:42,175 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-20 22:48:42,268 INFO L208 MainTranslator]: Completed translation [2022-02-20 22:48:42,269 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:48:42 WrapperNode [2022-02-20 22:48:42,269 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-02-20 22:48:42,270 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-02-20 22:48:42,270 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-02-20 22:48:42,270 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-02-20 22:48:42,275 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:48:42" (1/1) ... [2022-02-20 22:48:42,352 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:48:42" (1/1) ... [2022-02-20 22:48:42,522 INFO L137 Inliner]: procedures = 395, calls = 2038, calls flagged for inlining = 159, calls inlined = 138, statements flattened = 4403 [2022-02-20 22:48:42,522 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-02-20 22:48:42,523 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-02-20 22:48:42,523 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-02-20 22:48:42,523 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-02-20 22:48:42,529 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:48:42" (1/1) ... [2022-02-20 22:48:42,529 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:48:42" (1/1) ... [2022-02-20 22:48:42,547 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:48:42" (1/1) ... [2022-02-20 22:48:42,547 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:48:42" (1/1) ... [2022-02-20 22:48:42,648 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:48:42" (1/1) ... [2022-02-20 22:48:42,659 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:48:42" (1/1) ... [2022-02-20 22:48:42,675 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:48:42" (1/1) ... [2022-02-20 22:48:42,692 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-02-20 22:48:42,693 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-02-20 22:48:42,693 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-02-20 22:48:42,694 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-02-20 22:48:42,694 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:48:42" (1/1) ... [2022-02-20 22:48:42,699 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-02-20 22:48:42,706 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-20 22:48:42,719 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-02-20 22:48:42,777 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-02-20 22:48:42,791 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.meminit [2022-02-20 22:48:42,792 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.meminit [2022-02-20 22:48:42,792 INFO L130 BoogieDeclarations]: Found specification of procedure RxCurCount [2022-02-20 22:48:42,792 INFO L138 BoogieDeclarations]: Found implementation of procedure RxCurCount [2022-02-20 22:48:42,792 INFO L130 BoogieDeclarations]: Found specification of procedure irda_setup_dma [2022-02-20 22:48:42,792 INFO L138 BoogieDeclarations]: Found implementation of procedure irda_setup_dma [2022-02-20 22:48:42,792 INFO L130 BoogieDeclarations]: Found specification of procedure netif_wake_queue [2022-02-20 22:48:42,792 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_wake_queue [2022-02-20 22:48:42,793 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2022-02-20 22:48:42,793 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2022-02-20 22:48:42,793 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_spin_unlock_irqrestore_73 [2022-02-20 22:48:42,793 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_spin_unlock_irqrestore_73 [2022-02-20 22:48:42,793 INFO L130 BoogieDeclarations]: Found specification of procedure free_irq [2022-02-20 22:48:42,793 INFO L138 BoogieDeclarations]: Found implementation of procedure free_irq [2022-02-20 22:48:42,793 INFO L130 BoogieDeclarations]: Found specification of procedure CheckRegBit [2022-02-20 22:48:42,793 INFO L138 BoogieDeclarations]: Found implementation of procedure CheckRegBit [2022-02-20 22:48:42,793 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_assert_linux_kernel_locking_spinlock__one_thread_double_lock [2022-02-20 22:48:42,794 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_assert_linux_kernel_locking_spinlock__one_thread_double_lock [2022-02-20 22:48:42,794 INFO L130 BoogieDeclarations]: Found specification of procedure via_remove_one [2022-02-20 22:48:42,794 INFO L138 BoogieDeclarations]: Found implementation of procedure via_remove_one [2022-02-20 22:48:42,794 INFO L130 BoogieDeclarations]: Found specification of procedure via_ircc_change_speed [2022-02-20 22:48:42,794 INFO L138 BoogieDeclarations]: Found implementation of procedure via_ircc_change_speed [2022-02-20 22:48:42,794 INFO L130 BoogieDeclarations]: Found specification of procedure dma_zalloc_coherent [2022-02-20 22:48:42,794 INFO L138 BoogieDeclarations]: Found implementation of procedure dma_zalloc_coherent [2022-02-20 22:48:42,794 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_xmalloc [2022-02-20 22:48:42,794 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_xmalloc [2022-02-20 22:48:42,794 INFO L130 BoogieDeclarations]: Found specification of procedure SetPulseWidth [2022-02-20 22:48:42,795 INFO L138 BoogieDeclarations]: Found implementation of procedure SetPulseWidth [2022-02-20 22:48:42,795 INFO L130 BoogieDeclarations]: Found specification of procedure Tdelay [2022-02-20 22:48:42,795 INFO L138 BoogieDeclarations]: Found implementation of procedure Tdelay [2022-02-20 22:48:42,795 INFO L130 BoogieDeclarations]: Found specification of procedure netif_rx [2022-02-20 22:48:42,795 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_rx [2022-02-20 22:48:42,795 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_is_err [2022-02-20 22:48:42,795 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_is_err [2022-02-20 22:48:42,795 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-02-20 22:48:42,796 INFO L130 BoogieDeclarations]: Found specification of procedure ClkTx [2022-02-20 22:48:42,796 INFO L138 BoogieDeclarations]: Found implementation of procedure ClkTx [2022-02-20 22:48:42,796 INFO L130 BoogieDeclarations]: Found specification of procedure WriteLPCReg [2022-02-20 22:48:42,796 INFO L138 BoogieDeclarations]: Found implementation of procedure WriteLPCReg [2022-02-20 22:48:42,796 INFO L130 BoogieDeclarations]: Found specification of procedure capable [2022-02-20 22:48:42,796 INFO L138 BoogieDeclarations]: Found implementation of procedure capable [2022-02-20 22:48:42,796 INFO L130 BoogieDeclarations]: Found specification of procedure CommonInit [2022-02-20 22:48:42,796 INFO L138 BoogieDeclarations]: Found implementation of procedure CommonInit [2022-02-20 22:48:42,796 INFO L130 BoogieDeclarations]: Found specification of procedure netdev_get_tx_queue [2022-02-20 22:48:42,797 INFO L138 BoogieDeclarations]: Found implementation of procedure netdev_get_tx_queue [2022-02-20 22:48:42,797 INFO L130 BoogieDeclarations]: Found specification of procedure via_ircc_change_dongle_speed [2022-02-20 22:48:42,797 INFO L138 BoogieDeclarations]: Found implementation of procedure via_ircc_change_dongle_speed [2022-02-20 22:48:42,797 INFO L130 BoogieDeclarations]: Found specification of procedure ReadLPCReg [2022-02-20 22:48:42,797 INFO L138 BoogieDeclarations]: Found implementation of procedure ReadLPCReg [2022-02-20 22:48:42,797 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~int [2022-02-20 22:48:42,797 INFO L130 BoogieDeclarations]: Found specification of procedure free_dma [2022-02-20 22:48:42,797 INFO L138 BoogieDeclarations]: Found implementation of procedure free_dma [2022-02-20 22:48:42,797 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_spin_lock_lock_of_via_ircc_cb [2022-02-20 22:48:42,798 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_spin_lock_lock_of_via_ircc_cb [2022-02-20 22:48:42,798 INFO L130 BoogieDeclarations]: Found specification of procedure via_ircc_dma_receive [2022-02-20 22:48:42,798 INFO L138 BoogieDeclarations]: Found implementation of procedure via_ircc_dma_receive [2022-02-20 22:48:42,798 INFO L130 BoogieDeclarations]: Found specification of procedure get_dma_ops [2022-02-20 22:48:42,798 INFO L138 BoogieDeclarations]: Found implementation of procedure get_dma_ops [2022-02-20 22:48:42,798 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2022-02-20 22:48:42,798 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_assume [2022-02-20 22:48:42,798 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_assume [2022-02-20 22:48:42,798 INFO L130 BoogieDeclarations]: Found specification of procedure via_ircc_net_close [2022-02-20 22:48:42,799 INFO L138 BoogieDeclarations]: Found implementation of procedure via_ircc_net_close [2022-02-20 22:48:42,799 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-02-20 22:48:42,799 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2022-02-20 22:48:42,799 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2022-02-20 22:48:42,799 INFO L130 BoogieDeclarations]: Found specification of procedure CkRxRecv [2022-02-20 22:48:42,799 INFO L138 BoogieDeclarations]: Found implementation of procedure CkRxRecv [2022-02-20 22:48:42,799 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_set_drvdata [2022-02-20 22:48:42,799 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_set_drvdata [2022-02-20 22:48:42,799 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_filter_err_code [2022-02-20 22:48:42,800 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_filter_err_code [2022-02-20 22:48:42,800 INFO L130 BoogieDeclarations]: Found specification of procedure irda_get_next_speed [2022-02-20 22:48:42,800 INFO L138 BoogieDeclarations]: Found implementation of procedure irda_get_next_speed [2022-02-20 22:48:42,800 INFO L130 BoogieDeclarations]: Found specification of procedure ReadReg [2022-02-20 22:48:42,800 INFO L138 BoogieDeclarations]: Found implementation of procedure ReadReg [2022-02-20 22:48:42,800 INFO L130 BoogieDeclarations]: Found specification of procedure via_ircc_open [2022-02-20 22:48:42,800 INFO L138 BoogieDeclarations]: Found implementation of procedure via_ircc_open [2022-02-20 22:48:42,800 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_assert_linux_kernel_locking_spinlock__one_thread_locked_at_exit [2022-02-20 22:48:42,800 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_assert_linux_kernel_locking_spinlock__one_thread_locked_at_exit [2022-02-20 22:48:42,801 INFO L130 BoogieDeclarations]: Found specification of procedure WriteRegBit [2022-02-20 22:48:42,801 INFO L138 BoogieDeclarations]: Found implementation of procedure WriteRegBit [2022-02-20 22:48:42,801 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-02-20 22:48:42,801 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_switch_0 [2022-02-20 22:48:42,801 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_switch_0 [2022-02-20 22:48:42,801 INFO L130 BoogieDeclarations]: Found specification of procedure Wr_Indx [2022-02-20 22:48:42,801 INFO L138 BoogieDeclarations]: Found implementation of procedure Wr_Indx [2022-02-20 22:48:42,801 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-02-20 22:48:42,801 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_undef_int [2022-02-20 22:48:42,802 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_undef_int [2022-02-20 22:48:42,802 INFO L130 BoogieDeclarations]: Found specification of procedure __const_udelay [2022-02-20 22:48:42,802 INFO L138 BoogieDeclarations]: Found implementation of procedure __const_udelay [2022-02-20 22:48:42,802 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-02-20 22:48:42,802 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2022-02-20 22:48:42,802 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2022-02-20 22:48:42,802 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~int [2022-02-20 22:48:42,802 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~int [2022-02-20 22:48:42,802 INFO L130 BoogieDeclarations]: Found specification of procedure WriteReg [2022-02-20 22:48:42,803 INFO L138 BoogieDeclarations]: Found implementation of procedure WriteReg [2022-02-20 22:48:42,803 INFO L130 BoogieDeclarations]: Found specification of procedure __ldv_spin_lock [2022-02-20 22:48:42,803 INFO L138 BoogieDeclarations]: Found implementation of procedure __ldv_spin_lock [2022-02-20 22:48:42,803 INFO L130 BoogieDeclarations]: Found specification of procedure warn_slowpath_null [2022-02-20 22:48:42,803 INFO L138 BoogieDeclarations]: Found implementation of procedure warn_slowpath_null [2022-02-20 22:48:42,803 INFO L130 BoogieDeclarations]: Found specification of procedure SetBaudRate [2022-02-20 22:48:42,803 INFO L138 BoogieDeclarations]: Found implementation of procedure SetBaudRate [2022-02-20 22:48:42,803 INFO L130 BoogieDeclarations]: Found specification of procedure Wr_Byte [2022-02-20 22:48:42,803 INFO L138 BoogieDeclarations]: Found implementation of procedure Wr_Byte [2022-02-20 22:48:42,804 INFO L130 BoogieDeclarations]: Found specification of procedure skb_put [2022-02-20 22:48:42,804 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_put [2022-02-20 22:48:42,804 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_free_netdev [2022-02-20 22:48:42,804 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_free_netdev [2022-02-20 22:48:42,804 INFO L130 BoogieDeclarations]: Found specification of procedure via_ircc_net_open [2022-02-20 22:48:42,804 INFO L138 BoogieDeclarations]: Found implementation of procedure via_ircc_net_open [2022-02-20 22:48:42,804 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-02-20 22:48:42,804 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-02-20 22:48:42,804 INFO L130 BoogieDeclarations]: Found specification of procedure ResetChip [2022-02-20 22:48:42,805 INFO L138 BoogieDeclarations]: Found implementation of procedure ResetChip [2022-02-20 22:48:42,805 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2022-02-20 22:48:42,805 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2022-02-20 22:48:42,805 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_stop [2022-02-20 22:48:42,805 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_stop [2022-02-20 22:48:42,805 INFO L130 BoogieDeclarations]: Found specification of procedure irda_device_txqueue_empty [2022-02-20 22:48:42,805 INFO L138 BoogieDeclarations]: Found implementation of procedure irda_device_txqueue_empty [2022-02-20 22:48:42,805 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_assert_linux_kernel_locking_spinlock__one_thread_double_unlock [2022-02-20 22:48:42,806 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_assert_linux_kernel_locking_spinlock__one_thread_double_unlock [2022-02-20 22:48:42,806 INFO L130 BoogieDeclarations]: Found specification of procedure pci_read_config_byte [2022-02-20 22:48:42,806 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_read_config_byte [2022-02-20 22:48:42,806 INFO L130 BoogieDeclarations]: Found specification of procedure Sdelay [2022-02-20 22:48:42,806 INFO L138 BoogieDeclarations]: Found implementation of procedure Sdelay [2022-02-20 22:48:42,806 INFO L130 BoogieDeclarations]: Found specification of procedure SetSIR [2022-02-20 22:48:42,806 INFO L138 BoogieDeclarations]: Found implementation of procedure SetSIR [2022-02-20 22:48:42,806 INFO L130 BoogieDeclarations]: Found specification of procedure netif_stop_queue [2022-02-20 22:48:42,806 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_stop_queue [2022-02-20 22:48:42,807 INFO L130 BoogieDeclarations]: Found specification of procedure SetMaxRxPacketSize [2022-02-20 22:48:42,807 INFO L138 BoogieDeclarations]: Found implementation of procedure SetMaxRxPacketSize [2022-02-20 22:48:42,807 INFO L130 BoogieDeclarations]: Found specification of procedure GetRecvByte [2022-02-20 22:48:42,807 INFO L138 BoogieDeclarations]: Found implementation of procedure GetRecvByte [2022-02-20 22:48:42,807 INFO L130 BoogieDeclarations]: Found specification of procedure consume_skb [2022-02-20 22:48:42,807 INFO L138 BoogieDeclarations]: Found implementation of procedure consume_skb [2022-02-20 22:48:42,807 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-02-20 22:48:42,807 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-02-20 22:48:42,807 INFO L130 BoogieDeclarations]: Found specification of procedure hwreset [2022-02-20 22:48:42,808 INFO L138 BoogieDeclarations]: Found implementation of procedure hwreset [2022-02-20 22:48:42,808 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2022-02-20 22:48:42,808 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~~structbegin~int~structend~~TO~int [2022-02-20 22:48:42,808 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~~structbegin~int~structend~~TO~int [2022-02-20 22:48:42,808 INFO L130 BoogieDeclarations]: Found specification of procedure pci_write_config_byte [2022-02-20 22:48:42,808 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_write_config_byte [2022-02-20 22:48:42,808 INFO L130 BoogieDeclarations]: Found specification of procedure netdev_priv [2022-02-20 22:48:42,808 INFO L138 BoogieDeclarations]: Found implementation of procedure netdev_priv [2022-02-20 22:48:42,808 INFO L130 BoogieDeclarations]: Found specification of procedure outb [2022-02-20 22:48:42,808 INFO L138 BoogieDeclarations]: Found implementation of procedure outb [2022-02-20 22:48:42,809 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_filter_positive_int [2022-02-20 22:48:42,809 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_filter_positive_int [2022-02-20 22:48:42,809 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_free_irq [2022-02-20 22:48:42,809 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_free_irq [2022-02-20 22:48:42,809 INFO L130 BoogieDeclarations]: Found specification of procedure via_ircc_dma_xmit [2022-02-20 22:48:42,809 INFO L138 BoogieDeclarations]: Found implementation of procedure via_ircc_dma_xmit [2022-02-20 22:48:42,809 INFO L130 BoogieDeclarations]: Found specification of procedure skb_reserve [2022-02-20 22:48:42,809 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_reserve [2022-02-20 22:48:42,809 INFO L130 BoogieDeclarations]: Found specification of procedure dma_free_attrs [2022-02-20 22:48:42,809 INFO L138 BoogieDeclarations]: Found implementation of procedure dma_free_attrs [2022-02-20 22:48:42,810 INFO L130 BoogieDeclarations]: Found specification of procedure netif_tx_start_queue [2022-02-20 22:48:42,810 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_tx_start_queue [2022-02-20 22:48:42,810 INFO L130 BoogieDeclarations]: Found specification of procedure free_netdev [2022-02-20 22:48:42,810 INFO L138 BoogieDeclarations]: Found implementation of procedure free_netdev [2022-02-20 22:48:42,810 INFO L130 BoogieDeclarations]: Found specification of procedure __release_region [2022-02-20 22:48:42,810 INFO L138 BoogieDeclarations]: Found implementation of procedure __release_region [2022-02-20 22:48:42,810 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-02-20 22:48:42,810 INFO L130 BoogieDeclarations]: Found specification of procedure net_ratelimit [2022-02-20 22:48:42,810 INFO L138 BoogieDeclarations]: Found implementation of procedure net_ratelimit [2022-02-20 22:48:42,810 INFO L130 BoogieDeclarations]: Found specification of procedure SetSendByte [2022-02-20 22:48:42,811 INFO L138 BoogieDeclarations]: Found implementation of procedure SetSendByte [2022-02-20 22:48:42,811 INFO L130 BoogieDeclarations]: Found specification of procedure dev_alloc_skb [2022-02-20 22:48:42,811 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_alloc_skb [2022-02-20 22:48:42,811 INFO L130 BoogieDeclarations]: Found specification of procedure ldv__builtin_expect [2022-02-20 22:48:42,811 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv__builtin_expect [2022-02-20 22:48:42,811 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_spin_unlock_lock_of_via_ircc_cb [2022-02-20 22:48:42,811 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_spin_unlock_lock_of_via_ircc_cb [2022-02-20 22:48:42,811 INFO L130 BoogieDeclarations]: Found specification of procedure SetSendPreambleCount [2022-02-20 22:48:42,811 INFO L138 BoogieDeclarations]: Found implementation of procedure SetSendPreambleCount [2022-02-20 22:48:42,812 INFO L130 BoogieDeclarations]: Found specification of procedure InitCard [2022-02-20 22:48:42,812 INFO L138 BoogieDeclarations]: Found implementation of procedure InitCard [2022-02-20 22:48:42,812 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_free [2022-02-20 22:48:42,812 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_free [2022-02-20 22:48:42,812 INFO L130 BoogieDeclarations]: Found specification of procedure SetTimer [2022-02-20 22:48:42,812 INFO L138 BoogieDeclarations]: Found implementation of procedure SetTimer [2022-02-20 22:48:42,812 INFO L130 BoogieDeclarations]: Found specification of procedure ActClk [2022-02-20 22:48:42,812 INFO L138 BoogieDeclarations]: Found implementation of procedure ActClk [2022-02-20 22:48:42,812 INFO L130 BoogieDeclarations]: Found specification of procedure request_dma [2022-02-20 22:48:42,813 INFO L138 BoogieDeclarations]: Found implementation of procedure request_dma [2022-02-20 22:48:42,813 INFO L130 BoogieDeclarations]: Found specification of procedure inb [2022-02-20 22:48:42,813 INFO L138 BoogieDeclarations]: Found implementation of procedure inb [2022-02-20 22:48:42,813 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-02-20 22:48:42,813 INFO L130 BoogieDeclarations]: Found specification of procedure skb_reset_mac_header [2022-02-20 22:48:42,813 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_reset_mac_header [2022-02-20 22:48:42,813 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_final_state [2022-02-20 22:48:42,813 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_check_final_state [2022-02-20 22:48:42,813 INFO L130 BoogieDeclarations]: Found specification of procedure skb_copy_to_linear_data [2022-02-20 22:48:42,813 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_copy_to_linear_data [2022-02-20 22:48:43,445 INFO L234 CfgBuilder]: Building ICFG [2022-02-20 22:48:43,448 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-02-20 22:48:43,677 INFO L766 $ProcedureCfgBuilder]: dead code at ProgramPoint ldv_stopFINAL: assume true; [2022-02-20 22:48:46,359 INFO L766 $ProcedureCfgBuilder]: dead code at ProgramPoint ULTIMATE.startFINAL: assume true; [2022-02-20 22:48:46,668 INFO L275 CfgBuilder]: Performing block encoding [2022-02-20 22:48:46,701 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-02-20 22:48:46,702 INFO L299 CfgBuilder]: Removed 0 assume(true) statements. [2022-02-20 22:48:46,704 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 10:48:46 BoogieIcfgContainer [2022-02-20 22:48:46,704 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-02-20 22:48:46,706 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-02-20 22:48:46,706 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-02-20 22:48:46,708 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-02-20 22:48:46,713 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 20.02 10:48:40" (1/3) ... [2022-02-20 22:48:46,714 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6c9605f6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.02 10:48:46, skipping insertion in model container [2022-02-20 22:48:46,714 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:48:42" (2/3) ... [2022-02-20 22:48:46,714 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6c9605f6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.02 10:48:46, skipping insertion in model container [2022-02-20 22:48:46,714 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 10:48:46" (3/3) ... [2022-02-20 22:48:46,715 INFO L111 eAbstractionObserver]: Analyzing ICFG linux-3.14_complex_emg_linux-kernel-locking-spinlock_drivers-net-irda-via-ircc.cil.i [2022-02-20 22:48:46,719 INFO L205 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-02-20 22:48:46,719 INFO L164 ceAbstractionStarter]: Applying trace abstraction to program that has 3 error locations. [2022-02-20 22:48:46,764 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-02-20 22:48:46,769 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2022-02-20 22:48:46,769 INFO L340 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2022-02-20 22:48:46,815 INFO L276 IsEmpty]: Start isEmpty. Operand has 1999 states, 1251 states have (on average 1.3069544364508394) internal successors, (1635), 1277 states have internal predecessors, (1635), 654 states have call successors, (654), 92 states have call predecessors, (654), 91 states have return successors, (650), 638 states have call predecessors, (650), 650 states have call successors, (650) [2022-02-20 22:48:46,823 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2022-02-20 22:48:46,823 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:48:46,824 INFO L514 BasicCegarLoop]: trace histogram [6, 6, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:48:46,824 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ldv_assert_linux_kernel_locking_spinlock__one_thread_locked_at_exitErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_assert_linux_kernel_locking_spinlock__one_thread_double_unlockErr0ASSERT_VIOLATIONERROR_FUNCTION, ldv_assert_linux_kernel_locking_spinlock__one_thread_double_lockErr0ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-02-20 22:48:46,828 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:48:46,828 INFO L85 PathProgramCache]: Analyzing trace with hash -1658643117, now seen corresponding path program 1 times [2022-02-20 22:48:46,834 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:48:46,835 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [410938280] [2022-02-20 22:48:46,835 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:48:46,836 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:48:47,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:48:47,238 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-02-20 22:48:47,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:48:47,250 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:48:47,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:48:47,261 INFO L290 TraceCheckUtils]: 0: Hoare triple {2002#true} havoc ~tmp~78;assume -2147483648 <= #t~nondet944 && #t~nondet944 <= 2147483647;~tmp~78 := #t~nondet944;havoc #t~nondet944;#res := ~tmp~78; {2002#true} is VALID [2022-02-20 22:48:47,261 INFO L290 TraceCheckUtils]: 1: Hoare triple {2002#true} assume true; {2002#true} is VALID [2022-02-20 22:48:47,262 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2002#true} {2002#true} #3959#return; {2002#true} is VALID [2022-02-20 22:48:47,262 INFO L290 TraceCheckUtils]: 0: Hoare triple {2057#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~1.base, ~res~1.offset;havoc ~tmp~73.base, ~tmp~73.offset;havoc ~tmp___0~24;havoc ~tmp___1~15; {2002#true} is VALID [2022-02-20 22:48:47,263 INFO L272 TraceCheckUtils]: 1: Hoare triple {2002#true} call #t~ret933 := ldv_undef_int(); {2002#true} is VALID [2022-02-20 22:48:47,263 INFO L290 TraceCheckUtils]: 2: Hoare triple {2002#true} havoc ~tmp~78;assume -2147483648 <= #t~nondet944 && #t~nondet944 <= 2147483647;~tmp~78 := #t~nondet944;havoc #t~nondet944;#res := ~tmp~78; {2002#true} is VALID [2022-02-20 22:48:47,263 INFO L290 TraceCheckUtils]: 3: Hoare triple {2002#true} assume true; {2002#true} is VALID [2022-02-20 22:48:47,263 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {2002#true} {2002#true} #3959#return; {2002#true} is VALID [2022-02-20 22:48:47,263 INFO L290 TraceCheckUtils]: 5: Hoare triple {2002#true} assume -2147483648 <= #t~ret933 && #t~ret933 <= 2147483647;~tmp___1~15 := #t~ret933;havoc #t~ret933; {2002#true} is VALID [2022-02-20 22:48:47,264 INFO L290 TraceCheckUtils]: 6: Hoare triple {2002#true} assume !(0 != ~tmp___1~15);#res.base, #res.offset := 0, 0; {2002#true} is VALID [2022-02-20 22:48:47,264 INFO L290 TraceCheckUtils]: 7: Hoare triple {2002#true} assume true; {2002#true} is VALID [2022-02-20 22:48:47,264 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {2002#true} {2002#true} #4745#return; {2002#true} is VALID [2022-02-20 22:48:47,264 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2022-02-20 22:48:47,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:48:47,274 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:48:47,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:48:47,280 INFO L290 TraceCheckUtils]: 0: Hoare triple {2002#true} havoc ~tmp~78;assume -2147483648 <= #t~nondet944 && #t~nondet944 <= 2147483647;~tmp~78 := #t~nondet944;havoc #t~nondet944;#res := ~tmp~78; {2002#true} is VALID [2022-02-20 22:48:47,280 INFO L290 TraceCheckUtils]: 1: Hoare triple {2002#true} assume true; {2002#true} is VALID [2022-02-20 22:48:47,281 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2002#true} {2002#true} #3959#return; {2002#true} is VALID [2022-02-20 22:48:47,281 INFO L290 TraceCheckUtils]: 0: Hoare triple {2057#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~1.base, ~res~1.offset;havoc ~tmp~73.base, ~tmp~73.offset;havoc ~tmp___0~24;havoc ~tmp___1~15; {2002#true} is VALID [2022-02-20 22:48:47,281 INFO L272 TraceCheckUtils]: 1: Hoare triple {2002#true} call #t~ret933 := ldv_undef_int(); {2002#true} is VALID [2022-02-20 22:48:47,281 INFO L290 TraceCheckUtils]: 2: Hoare triple {2002#true} havoc ~tmp~78;assume -2147483648 <= #t~nondet944 && #t~nondet944 <= 2147483647;~tmp~78 := #t~nondet944;havoc #t~nondet944;#res := ~tmp~78; {2002#true} is VALID [2022-02-20 22:48:47,281 INFO L290 TraceCheckUtils]: 3: Hoare triple {2002#true} assume true; {2002#true} is VALID [2022-02-20 22:48:47,282 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {2002#true} {2002#true} #3959#return; {2002#true} is VALID [2022-02-20 22:48:47,282 INFO L290 TraceCheckUtils]: 5: Hoare triple {2002#true} assume -2147483648 <= #t~ret933 && #t~ret933 <= 2147483647;~tmp___1~15 := #t~ret933;havoc #t~ret933; {2002#true} is VALID [2022-02-20 22:48:47,282 INFO L290 TraceCheckUtils]: 6: Hoare triple {2002#true} assume !(0 != ~tmp___1~15);#res.base, #res.offset := 0, 0; {2002#true} is VALID [2022-02-20 22:48:47,282 INFO L290 TraceCheckUtils]: 7: Hoare triple {2002#true} assume true; {2002#true} is VALID [2022-02-20 22:48:47,282 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {2002#true} {2002#true} #4747#return; {2002#true} is VALID [2022-02-20 22:48:47,283 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 25 [2022-02-20 22:48:47,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:48:47,292 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:48:47,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:48:47,298 INFO L290 TraceCheckUtils]: 0: Hoare triple {2002#true} havoc ~tmp~78;assume -2147483648 <= #t~nondet944 && #t~nondet944 <= 2147483647;~tmp~78 := #t~nondet944;havoc #t~nondet944;#res := ~tmp~78; {2002#true} is VALID [2022-02-20 22:48:47,298 INFO L290 TraceCheckUtils]: 1: Hoare triple {2002#true} assume true; {2002#true} is VALID [2022-02-20 22:48:47,298 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2002#true} {2002#true} #3959#return; {2002#true} is VALID [2022-02-20 22:48:47,299 INFO L290 TraceCheckUtils]: 0: Hoare triple {2057#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~1.base, ~res~1.offset;havoc ~tmp~73.base, ~tmp~73.offset;havoc ~tmp___0~24;havoc ~tmp___1~15; {2002#true} is VALID [2022-02-20 22:48:47,299 INFO L272 TraceCheckUtils]: 1: Hoare triple {2002#true} call #t~ret933 := ldv_undef_int(); {2002#true} is VALID [2022-02-20 22:48:47,299 INFO L290 TraceCheckUtils]: 2: Hoare triple {2002#true} havoc ~tmp~78;assume -2147483648 <= #t~nondet944 && #t~nondet944 <= 2147483647;~tmp~78 := #t~nondet944;havoc #t~nondet944;#res := ~tmp~78; {2002#true} is VALID [2022-02-20 22:48:47,299 INFO L290 TraceCheckUtils]: 3: Hoare triple {2002#true} assume true; {2002#true} is VALID [2022-02-20 22:48:47,299 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {2002#true} {2002#true} #3959#return; {2002#true} is VALID [2022-02-20 22:48:47,299 INFO L290 TraceCheckUtils]: 5: Hoare triple {2002#true} assume -2147483648 <= #t~ret933 && #t~ret933 <= 2147483647;~tmp___1~15 := #t~ret933;havoc #t~ret933; {2002#true} is VALID [2022-02-20 22:48:47,300 INFO L290 TraceCheckUtils]: 6: Hoare triple {2002#true} assume !(0 != ~tmp___1~15);#res.base, #res.offset := 0, 0; {2002#true} is VALID [2022-02-20 22:48:47,300 INFO L290 TraceCheckUtils]: 7: Hoare triple {2002#true} assume true; {2002#true} is VALID [2022-02-20 22:48:47,300 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {2002#true} {2002#true} #4749#return; {2002#true} is VALID [2022-02-20 22:48:47,300 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 36 [2022-02-20 22:48:47,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:48:47,310 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:48:47,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:48:47,316 INFO L290 TraceCheckUtils]: 0: Hoare triple {2002#true} havoc ~tmp~78;assume -2147483648 <= #t~nondet944 && #t~nondet944 <= 2147483647;~tmp~78 := #t~nondet944;havoc #t~nondet944;#res := ~tmp~78; {2002#true} is VALID [2022-02-20 22:48:47,317 INFO L290 TraceCheckUtils]: 1: Hoare triple {2002#true} assume true; {2002#true} is VALID [2022-02-20 22:48:47,317 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2002#true} {2002#true} #3959#return; {2002#true} is VALID [2022-02-20 22:48:47,317 INFO L290 TraceCheckUtils]: 0: Hoare triple {2057#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~1.base, ~res~1.offset;havoc ~tmp~73.base, ~tmp~73.offset;havoc ~tmp___0~24;havoc ~tmp___1~15; {2002#true} is VALID [2022-02-20 22:48:47,317 INFO L272 TraceCheckUtils]: 1: Hoare triple {2002#true} call #t~ret933 := ldv_undef_int(); {2002#true} is VALID [2022-02-20 22:48:47,318 INFO L290 TraceCheckUtils]: 2: Hoare triple {2002#true} havoc ~tmp~78;assume -2147483648 <= #t~nondet944 && #t~nondet944 <= 2147483647;~tmp~78 := #t~nondet944;havoc #t~nondet944;#res := ~tmp~78; {2002#true} is VALID [2022-02-20 22:48:47,318 INFO L290 TraceCheckUtils]: 3: Hoare triple {2002#true} assume true; {2002#true} is VALID [2022-02-20 22:48:47,318 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {2002#true} {2002#true} #3959#return; {2002#true} is VALID [2022-02-20 22:48:47,318 INFO L290 TraceCheckUtils]: 5: Hoare triple {2002#true} assume -2147483648 <= #t~ret933 && #t~ret933 <= 2147483647;~tmp___1~15 := #t~ret933;havoc #t~ret933; {2002#true} is VALID [2022-02-20 22:48:47,318 INFO L290 TraceCheckUtils]: 6: Hoare triple {2002#true} assume !(0 != ~tmp___1~15);#res.base, #res.offset := 0, 0; {2002#true} is VALID [2022-02-20 22:48:47,318 INFO L290 TraceCheckUtils]: 7: Hoare triple {2002#true} assume true; {2002#true} is VALID [2022-02-20 22:48:47,319 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {2002#true} {2002#true} #4751#return; {2002#true} is VALID [2022-02-20 22:48:47,319 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 47 [2022-02-20 22:48:47,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:48:47,327 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:48:47,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:48:47,334 INFO L290 TraceCheckUtils]: 0: Hoare triple {2002#true} havoc ~tmp~78;assume -2147483648 <= #t~nondet944 && #t~nondet944 <= 2147483647;~tmp~78 := #t~nondet944;havoc #t~nondet944;#res := ~tmp~78; {2002#true} is VALID [2022-02-20 22:48:47,334 INFO L290 TraceCheckUtils]: 1: Hoare triple {2002#true} assume true; {2002#true} is VALID [2022-02-20 22:48:47,334 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2002#true} {2002#true} #3959#return; {2002#true} is VALID [2022-02-20 22:48:47,335 INFO L290 TraceCheckUtils]: 0: Hoare triple {2057#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~1.base, ~res~1.offset;havoc ~tmp~73.base, ~tmp~73.offset;havoc ~tmp___0~24;havoc ~tmp___1~15; {2002#true} is VALID [2022-02-20 22:48:47,335 INFO L272 TraceCheckUtils]: 1: Hoare triple {2002#true} call #t~ret933 := ldv_undef_int(); {2002#true} is VALID [2022-02-20 22:48:47,335 INFO L290 TraceCheckUtils]: 2: Hoare triple {2002#true} havoc ~tmp~78;assume -2147483648 <= #t~nondet944 && #t~nondet944 <= 2147483647;~tmp~78 := #t~nondet944;havoc #t~nondet944;#res := ~tmp~78; {2002#true} is VALID [2022-02-20 22:48:47,335 INFO L290 TraceCheckUtils]: 3: Hoare triple {2002#true} assume true; {2002#true} is VALID [2022-02-20 22:48:47,335 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {2002#true} {2002#true} #3959#return; {2002#true} is VALID [2022-02-20 22:48:47,336 INFO L290 TraceCheckUtils]: 5: Hoare triple {2002#true} assume -2147483648 <= #t~ret933 && #t~ret933 <= 2147483647;~tmp___1~15 := #t~ret933;havoc #t~ret933; {2002#true} is VALID [2022-02-20 22:48:47,336 INFO L290 TraceCheckUtils]: 6: Hoare triple {2002#true} assume !(0 != ~tmp___1~15);#res.base, #res.offset := 0, 0; {2002#true} is VALID [2022-02-20 22:48:47,336 INFO L290 TraceCheckUtils]: 7: Hoare triple {2002#true} assume true; {2002#true} is VALID [2022-02-20 22:48:47,336 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {2002#true} {2002#true} #4753#return; {2002#true} is VALID [2022-02-20 22:48:47,336 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2022-02-20 22:48:47,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:48:47,345 INFO L290 TraceCheckUtils]: 0: Hoare triple {2002#true} havoc ~tmp~78;assume -2147483648 <= #t~nondet944 && #t~nondet944 <= 2147483647;~tmp~78 := #t~nondet944;havoc #t~nondet944;#res := ~tmp~78; {2002#true} is VALID [2022-02-20 22:48:47,345 INFO L290 TraceCheckUtils]: 1: Hoare triple {2002#true} assume true; {2002#true} is VALID [2022-02-20 22:48:47,346 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2002#true} {2049#(= 7 ~ldv_statevar_10~0)} #4755#return; {2049#(= 7 ~ldv_statevar_10~0)} is VALID [2022-02-20 22:48:47,346 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 69 [2022-02-20 22:48:47,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:48:47,352 INFO L290 TraceCheckUtils]: 0: Hoare triple {2002#true} ~expression := #in~expression; {2002#true} is VALID [2022-02-20 22:48:47,353 INFO L290 TraceCheckUtils]: 1: Hoare triple {2002#true} assume !(0 == ~expression); {2002#true} is VALID [2022-02-20 22:48:47,353 INFO L290 TraceCheckUtils]: 2: Hoare triple {2002#true} assume true; {2002#true} is VALID [2022-02-20 22:48:47,353 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2002#true} {2003#false} #4767#return; {2003#false} is VALID [2022-02-20 22:48:47,355 INFO L290 TraceCheckUtils]: 0: Hoare triple {2002#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(199, 1);call #Ultimate.allocInit(26, 2);call #Ultimate.allocInit(63, 3);call #Ultimate.allocInit(9, 4);call #Ultimate.allocInit(9, 5);call #Ultimate.allocInit(7, 6);call write~init~int(15, 6, 0, 1);call write~init~int(37, 6, 1, 1);call write~init~int(115, 6, 2, 1);call write~init~int(40, 6, 3, 1);call write~init~int(41, 6, 4, 1);call write~init~int(10, 6, 5, 1);call write~init~int(0, 6, 6, 1);call #Ultimate.allocInit(14, 7);call #Ultimate.allocInit(9, 8);call #Ultimate.allocInit(45, 9);call #Ultimate.allocInit(14, 10);call #Ultimate.allocInit(25, 11);call #Ultimate.allocInit(13, 12);call #Ultimate.allocInit(22, 13);call #Ultimate.allocInit(13, 14);call #Ultimate.allocInit(23, 15);call #Ultimate.allocInit(13, 16);call #Ultimate.allocInit(23, 17);call #Ultimate.allocInit(13, 18);call #Ultimate.allocInit(22, 19);call #Ultimate.allocInit(13, 20);call #Ultimate.allocInit(7, 21);call write~init~int(15, 21, 0, 1);call write~init~int(37, 21, 1, 1);call write~init~int(115, 21, 2, 1);call write~init~int(40, 21, 3, 1);call write~init~int(41, 21, 4, 1);call write~init~int(10, 21, 5, 1);call write~init~int(0, 21, 6, 1);call #Ultimate.allocInit(17, 22);call #Ultimate.allocInit(7, 23);call write~init~int(15, 23, 0, 1);call write~init~int(37, 23, 1, 1);call write~init~int(115, 23, 2, 1);call write~init~int(40, 23, 3, 1);call write~init~int(41, 23, 4, 1);call write~init~int(10, 23, 5, 1);call write~init~int(0, 23, 6, 1);call #Ultimate.allocInit(14, 24);call #Ultimate.allocInit(22, 25);call #Ultimate.allocInit(35, 26);call #Ultimate.allocInit(14, 27);call #Ultimate.allocInit(40, 28);call #Ultimate.allocInit(7, 29);call write~init~int(15, 29, 0, 1);call write~init~int(37, 29, 1, 1);call write~init~int(115, 29, 2, 1);call write~init~int(40, 29, 3, 1);call write~init~int(41, 29, 4, 1);call write~init~int(10, 29, 5, 1);call write~init~int(0, 29, 6, 1);call #Ultimate.allocInit(15, 30);call #Ultimate.allocInit(30, 31);call #Ultimate.allocInit(15, 32);call #Ultimate.allocInit(7, 33);call write~init~int(15, 33, 0, 1);call write~init~int(37, 33, 1, 1);call write~init~int(115, 33, 2, 1);call write~init~int(40, 33, 3, 1);call write~init~int(41, 33, 4, 1);call write~init~int(10, 33, 5, 1);call write~init~int(0, 33, 6, 1);call #Ultimate.allocInit(12, 34);call #Ultimate.allocInit(85, 35);call #Ultimate.allocInit(47, 36);call #Ultimate.allocInit(29, 37);call #Ultimate.allocInit(58, 38);call #Ultimate.allocInit(29, 39);call #Ultimate.allocInit(50, 40);call #Ultimate.allocInit(29, 41);call #Ultimate.allocInit(40, 42);call #Ultimate.allocInit(29, 43);call #Ultimate.allocInit(30, 44);call #Ultimate.allocInit(22, 45);call #Ultimate.allocInit(31, 46);call #Ultimate.allocInit(28, 47);call #Ultimate.allocInit(23, 48);call #Ultimate.allocInit(13, 49);call #Ultimate.allocInit(45, 50);call #Ultimate.allocInit(18, 51);call #Ultimate.allocInit(7, 52);call write~init~int(15, 52, 0, 1);call write~init~int(37, 52, 1, 1);call write~init~int(115, 52, 2, 1);call write~init~int(40, 52, 3, 1);call write~init~int(41, 52, 4, 1);call write~init~int(10, 52, 5, 1);call write~init~int(0, 52, 6, 1);call #Ultimate.allocInit(27, 53);call #Ultimate.allocInit(56, 54);call #Ultimate.allocInit(27, 55);call #Ultimate.allocInit(7, 56);call write~init~int(15, 56, 0, 1);call write~init~int(37, 56, 1, 1);call write~init~int(115, 56, 2, 1);call write~init~int(40, 56, 3, 1);call write~init~int(41, 56, 4, 1);call write~init~int(10, 56, 5, 1);call write~init~int(0, 56, 6, 1);call #Ultimate.allocInit(21, 57);call #Ultimate.allocInit(50, 58);call #Ultimate.allocInit(30, 59);call #Ultimate.allocInit(41, 60);call #Ultimate.allocInit(30, 61);call #Ultimate.allocInit(26, 62);call #Ultimate.allocInit(30, 63);call #Ultimate.allocInit(15, 64);call #Ultimate.allocInit(14, 65);call #Ultimate.allocInit(23, 66);call #Ultimate.allocInit(15, 67);call #Ultimate.allocInit(48, 68);call #Ultimate.allocInit(15, 69);call #Ultimate.allocInit(43, 70);call #Ultimate.allocInit(19, 71);call #Ultimate.allocInit(6, 72);call write~init~int(84, 72, 0, 1);call write~init~int(105, 72, 1, 1);call write~init~int(109, 72, 2, 1);call write~init~int(101, 72, 3, 1);call write~init~int(114, 72, 4, 1);call write~init~int(0, 72, 5, 1);call #Ultimate.allocInit(1, 73);call write~init~int(0, 73, 0, 1);call #Ultimate.allocInit(3, 74);call write~init~int(84, 74, 0, 1);call write~init~int(120, 74, 1, 1);call write~init~int(0, 74, 2, 1);call #Ultimate.allocInit(1, 75);call write~init~int(0, 75, 0, 1);call #Ultimate.allocInit(3, 76);call write~init~int(82, 76, 0, 1);call write~init~int(120, 76, 1, 1);call write~init~int(0, 76, 2, 1);call #Ultimate.allocInit(1, 77);call write~init~int(0, 77, 0, 1);call #Ultimate.allocInit(38, 78);call #Ultimate.allocInit(19, 79);call #Ultimate.allocInit(13, 80);call #Ultimate.allocInit(1, 81);call write~init~int(0, 81, 0, 1);call #Ultimate.allocInit(4, 82);call write~init~int(69, 82, 0, 1);call write~init~int(79, 82, 1, 1);call write~init~int(77, 82, 2, 1);call write~init~int(0, 82, 3, 1);call #Ultimate.allocInit(1, 83);call write~init~int(0, 83, 0, 1);call #Ultimate.allocInit(11, 84);call #Ultimate.allocInit(1, 85);call write~init~int(0, 85, 0, 1);call #Ultimate.allocInit(10, 86);call #Ultimate.allocInit(1, 87);call write~init~int(0, 87, 0, 1);call #Ultimate.allocInit(47, 88);call #Ultimate.allocInit(19, 89);call #Ultimate.allocInit(9, 90);call #Ultimate.allocInit(1, 91);call write~init~int(0, 91, 0, 1);call #Ultimate.allocInit(8, 92);call #Ultimate.allocInit(1, 93);call write~init~int(0, 93, 0, 1);call #Ultimate.allocInit(12, 94);call #Ultimate.allocInit(1, 95);call write~init~int(0, 95, 0, 1);call #Ultimate.allocInit(4, 96);call write~init~int(69, 96, 0, 1);call write~init~int(79, 96, 1, 1);call write~init~int(70, 96, 2, 1);call write~init~int(0, 96, 3, 1);call #Ultimate.allocInit(1, 97);call write~init~int(0, 97, 0, 1);call #Ultimate.allocInit(7, 98);call write~init~int(82, 98, 0, 1);call write~init~int(120, 98, 1, 1);call write~init~int(68, 98, 2, 1);call write~init~int(97, 98, 3, 1);call write~init~int(116, 98, 4, 1);call write~init~int(97, 98, 5, 1);call write~init~int(0, 98, 6, 1);call #Ultimate.allocInit(1, 99);call write~init~int(0, 99, 0, 1);call #Ultimate.allocInit(9, 100);call #Ultimate.allocInit(1, 101);call write~init~int(0, 101, 0, 1);call #Ultimate.allocInit(8, 102);call #Ultimate.allocInit(1, 103);call write~init~int(0, 103, 0, 1);call #Ultimate.allocInit(17, 104);call #Ultimate.allocInit(19, 105);call #Ultimate.allocInit(79, 106);call #Ultimate.allocInit(19, 107);call #Ultimate.allocInit(7, 108);call write~init~int(15, 108, 0, 1);call write~init~int(37, 108, 1, 1);call write~init~int(115, 108, 2, 1);call write~init~int(40, 108, 3, 1);call write~init~int(41, 108, 4, 1);call write~init~int(10, 108, 5, 1);call write~init~int(0, 108, 6, 1);call #Ultimate.allocInit(8, 109);call #Ultimate.allocInit(31, 110);call #Ultimate.allocInit(28, 111);call #Ultimate.allocInit(22, 112);call #Ultimate.allocInit(13, 113);call #Ultimate.allocInit(22, 114);call #Ultimate.allocInit(22, 115);call #Ultimate.allocInit(7, 116);call write~init~int(15, 116, 0, 1);call write~init~int(37, 116, 1, 1);call write~init~int(115, 116, 2, 1);call write~init~int(40, 116, 3, 1);call write~init~int(41, 116, 4, 1);call write~init~int(10, 116, 5, 1);call write~init~int(0, 116, 6, 1);call #Ultimate.allocInit(18, 117);call #Ultimate.allocInit(31, 118);call #Ultimate.allocInit(28, 119);call #Ultimate.allocInit(18, 120);call #Ultimate.allocInit(12, 121);call #Ultimate.allocInit(31, 122);call #Ultimate.allocInit(28, 123);call #Ultimate.allocInit(18, 124);call #Ultimate.allocInit(13, 125);call #Ultimate.allocInit(32, 126);call #Ultimate.allocInit(32, 127);call #Ultimate.allocInit(33, 128);call #Ultimate.allocInit(11, 129);call #Ultimate.allocInit(7, 130);call write~init~int(15, 130, 0, 1);call write~init~int(37, 130, 1, 1);call write~init~int(115, 130, 2, 1);call write~init~int(40, 130, 3, 1);call write~init~int(41, 130, 4, 1);call write~init~int(10, 130, 5, 1);call write~init~int(0, 130, 6, 1);call #Ultimate.allocInit(19, 131);call #Ultimate.allocInit(31, 132);call #Ultimate.allocInit(28, 133);call #Ultimate.allocInit(19, 134);call #Ultimate.allocInit(12, 135);call #Ultimate.allocInit(31, 136);call #Ultimate.allocInit(28, 137);call #Ultimate.allocInit(19, 138);call #Ultimate.allocInit(13, 139);call #Ultimate.allocInit(31, 140);call #Ultimate.allocInit(28, 141);call #Ultimate.allocInit(19, 142);call #Ultimate.allocInit(12, 143);call #Ultimate.allocInit(31, 144);call #Ultimate.allocInit(28, 145);call #Ultimate.allocInit(19, 146);call #Ultimate.allocInit(13, 147);call #Ultimate.allocInit(23, 148);call #Ultimate.allocInit(19, 149);call #Ultimate.allocInit(1, 150);call write~init~int(0, 150, 0, 1);call #Ultimate.allocInit(2, 151);call write~init~int(48, 151, 0, 1);call write~init~int(0, 151, 1, 1);call #Ultimate.allocInit(85, 152);~driver_name~0.base, ~driver_name~0.offset := 4, 0;~qos_mtt_bits~0 := 7;~dongle_id~0 := 0;~#via_pci_tbl~0.base, ~#via_pci_tbl~0.offset := 153, 0;call #Ultimate.allocInit(192, 153);call write~init~int(4358, ~#via_pci_tbl~0.base, ~#via_pci_tbl~0.offset, 4);call write~init~int(33329, ~#via_pci_tbl~0.base, 4 + ~#via_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#via_pci_tbl~0.base, 8 + ~#via_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#via_pci_tbl~0.base, 12 + ~#via_pci_tbl~0.offset, 4);call write~init~int(0, ~#via_pci_tbl~0.base, 16 + ~#via_pci_tbl~0.offset, 4);call write~init~int(0, ~#via_pci_tbl~0.base, 20 + ~#via_pci_tbl~0.offset, 4);call write~init~int(0, ~#via_pci_tbl~0.base, 24 + ~#via_pci_tbl~0.offset, 8);call write~init~int(4358, ~#via_pci_tbl~0.base, 32 + ~#via_pci_tbl~0.offset, 4);call write~init~int(12553, ~#via_pci_tbl~0.base, 36 + ~#via_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#via_pci_tbl~0.base, 40 + ~#via_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#via_pci_tbl~0.base, 44 + ~#via_pci_tbl~0.offset, 4);call write~init~int(0, ~#via_pci_tbl~0.base, 48 + ~#via_pci_tbl~0.offset, 4);call write~init~int(0, ~#via_pci_tbl~0.base, 52 + ~#via_pci_tbl~0.offset, 4);call write~init~int(1, ~#via_pci_tbl~0.base, 56 + ~#via_pci_tbl~0.offset, 8);call write~init~int(4358, ~#via_pci_tbl~0.base, 64 + ~#via_pci_tbl~0.offset, 4);call write~init~int(12404, ~#via_pci_tbl~0.base, 68 + ~#via_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#via_pci_tbl~0.base, 72 + ~#via_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#via_pci_tbl~0.base, 76 + ~#via_pci_tbl~0.offset, 4);call write~init~int(0, ~#via_pci_tbl~0.base, 80 + ~#via_pci_tbl~0.offset, 4);call write~init~int(0, ~#via_pci_tbl~0.base, 84 + ~#via_pci_tbl~0.offset, 4);call write~init~int(2, ~#via_pci_tbl~0.base, 88 + ~#via_pci_tbl~0.offset, 8);call write~init~int(4358, ~#via_pci_tbl~0.base, 96 + ~#via_pci_tbl~0.offset, 4);call write~init~int(12615, ~#via_pci_tbl~0.base, 100 + ~#via_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#via_pci_tbl~0.base, 104 + ~#via_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#via_pci_tbl~0.base, 108 + ~#via_pci_tbl~0.offset, 4);call write~init~int(0, ~#via_pci_tbl~0.base, 112 + ~#via_pci_tbl~0.offset, 4);call write~init~int(0, ~#via_pci_tbl~0.base, 116 + ~#via_pci_tbl~0.offset, 4);call write~init~int(3, ~#via_pci_tbl~0.base, 120 + ~#via_pci_tbl~0.offset, 8);call write~init~int(4358, ~#via_pci_tbl~0.base, 128 + ~#via_pci_tbl~0.offset, 4);call write~init~int(12663, ~#via_pci_tbl~0.base, 132 + ~#via_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#via_pci_tbl~0.base, 136 + ~#via_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#via_pci_tbl~0.base, 140 + ~#via_pci_tbl~0.offset, 4);call write~init~int(0, ~#via_pci_tbl~0.base, 144 + ~#via_pci_tbl~0.offset, 4);call write~init~int(0, ~#via_pci_tbl~0.base, 148 + ~#via_pci_tbl~0.offset, 4);call write~init~int(4, ~#via_pci_tbl~0.base, 152 + ~#via_pci_tbl~0.offset, 8);call write~init~int(0, ~#via_pci_tbl~0.base, 160 + ~#via_pci_tbl~0.offset, 4);call write~init~int(0, ~#via_pci_tbl~0.base, 164 + ~#via_pci_tbl~0.offset, 4);call write~init~int(0, ~#via_pci_tbl~0.base, 168 + ~#via_pci_tbl~0.offset, 4);call write~init~int(0, ~#via_pci_tbl~0.base, 172 + ~#via_pci_tbl~0.offset, 4);call write~init~int(0, ~#via_pci_tbl~0.base, 176 + ~#via_pci_tbl~0.offset, 4);call write~init~int(0, ~#via_pci_tbl~0.base, 180 + ~#via_pci_tbl~0.offset, 4);call write~init~int(0, ~#via_pci_tbl~0.base, 184 + ~#via_pci_tbl~0.offset, 8);~__mod_pci_device_table~0.vendor := 0;~__mod_pci_device_table~0.device := 0;~__mod_pci_device_table~0.subvendor := 0;~__mod_pci_device_table~0.subdevice := 0;~__mod_pci_device_table~0.class := 0;~__mod_pci_device_table~0.class_mask := 0;~__mod_pci_device_table~0.driver_data := 0;~#via_driver~0.base, ~#via_driver~0.offset := 154, 0;call #Ultimate.allocInit(301, 154);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 8 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(5, 0, ~#via_driver~0.base, 16 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(~#via_pci_tbl~0.base, ~#via_pci_tbl~0.offset, ~#via_driver~0.base, 24 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~via_init_one.base, #funAddr~via_init_one.offset, ~#via_driver~0.base, 32 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~via_remove_one.base, #funAddr~via_remove_one.offset, ~#via_driver~0.base, 40 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 48 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 56 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 64 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 72 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 80 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 88 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 96 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 104 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 112 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 120 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 128 + ~#via_driver~0.offset, 8);call write~init~int(0, ~#via_driver~0.base, 136 + ~#via_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 137 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 145 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 153 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 161 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 169 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 177 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 185 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 193 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 201 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 209 + ~#via_driver~0.offset, 8);call write~init~int(0, ~#via_driver~0.base, 217 + ~#via_driver~0.offset, 4);call write~init~int(0, ~#via_driver~0.base, 221 + ~#via_driver~0.offset, 4);call write~init~int(0, ~#via_driver~0.base, 225 + ~#via_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 229 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 237 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 245 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 253 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 261 + ~#via_driver~0.offset, 8);call write~init~int(0, ~#via_driver~0.base, 269 + ~#via_driver~0.offset, 4);call write~init~int(0, ~#via_driver~0.base, 273 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 285 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 293 + ~#via_driver~0.offset, 8);~#via_ircc_sir_ops~0.base, ~#via_ircc_sir_ops~0.offset := 155, 0;call #Ultimate.allocInit(472, 155);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 8 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~via_ircc_net_open.base, #funAddr~via_ircc_net_open.offset, ~#via_ircc_sir_ops~0.base, 16 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~via_ircc_net_close.base, #funAddr~via_ircc_net_close.offset, ~#via_ircc_sir_ops~0.base, 24 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~via_ircc_hard_xmit_sir.base, #funAddr~via_ircc_hard_xmit_sir.offset, ~#via_ircc_sir_ops~0.base, 32 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 40 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 48 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 56 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 64 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 72 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~via_ircc_net_ioctl.base, #funAddr~via_ircc_net_ioctl.offset, ~#via_ircc_sir_ops~0.base, 80 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 88 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 96 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 104 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 112 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 120 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 128 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 136 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 144 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 152 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 160 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 168 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 176 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 184 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 192 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 200 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 208 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 216 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 224 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 232 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 240 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 248 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 256 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 264 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 272 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 280 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 288 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 296 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 304 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 312 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 320 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 328 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 336 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 344 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 352 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 360 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 368 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 376 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 384 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 392 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 400 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 408 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 416 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 424 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 432 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 440 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 448 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 456 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 464 + ~#via_ircc_sir_ops~0.offset, 8);~#via_ircc_fir_ops~0.base, ~#via_ircc_fir_ops~0.offset := 156, 0;call #Ultimate.allocInit(472, 156);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 8 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~via_ircc_net_open.base, #funAddr~via_ircc_net_open.offset, ~#via_ircc_fir_ops~0.base, 16 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~via_ircc_net_close.base, #funAddr~via_ircc_net_close.offset, ~#via_ircc_fir_ops~0.base, 24 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~via_ircc_hard_xmit_fir.base, #funAddr~via_ircc_hard_xmit_fir.offset, ~#via_ircc_fir_ops~0.base, 32 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 40 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 48 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 56 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 64 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 72 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~via_ircc_net_ioctl.base, #funAddr~via_ircc_net_ioctl.offset, ~#via_ircc_fir_ops~0.base, 80 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 88 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 96 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 104 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 112 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 120 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 128 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 136 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 144 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 152 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 160 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 168 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 176 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 184 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 192 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 200 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 208 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 216 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 224 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 232 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 240 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 248 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 256 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 264 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 272 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 280 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 288 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 296 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 304 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 312 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 320 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 328 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 336 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 344 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 352 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 360 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 368 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 376 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 384 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 392 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 400 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 408 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 416 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 424 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 432 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 440 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 448 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 456 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 464 + ~#via_ircc_fir_ops~0.offset, 8);~ldv_0_data_data~0.base, ~ldv_0_data_data~0.offset := 0, 0;~ldv_0_line_line~0 := 0;~ldv_0_ret_val_default~0 := 0;~ldv_0_thread_thread~0.base, ~ldv_0_thread_thread~0.offset := 0, 0;~ldv_10_ret_default~0 := 0;~ldv_1_container_net_device~0.base, ~ldv_1_container_net_device~0.offset := 0, 0;~ldv_1_container_struct_ifreq_ptr~0.base, ~ldv_1_container_struct_ifreq_ptr~0.offset := 0, 0;~ldv_1_container_struct_sk_buff_ptr~0.base, ~ldv_1_container_struct_sk_buff_ptr~0.offset := 0, 0;~ldv_1_ldv_param_3_2_default~0 := 0;~ldv_2_container_pci_driver~0.base, ~ldv_2_container_pci_driver~0.offset := 0, 0;~ldv_2_resource_dev~0.base, ~ldv_2_resource_dev~0.offset := 0, 0;~#ldv_2_resource_pm_message~0.base, ~#ldv_2_resource_pm_message~0.offset := 157, 0;call #Ultimate.allocInit(4, 157);call write~init~int(0, ~#ldv_2_resource_pm_message~0.base, ~#ldv_2_resource_pm_message~0.offset, 4);~ldv_2_resource_struct_pci_device_id_ptr~0.base, ~ldv_2_resource_struct_pci_device_id_ptr~0.offset := 0, 0;~ldv_2_ret_default~0 := 0;~ldv_statevar_0~0 := 0;~ldv_statevar_1~0 := 0;~ldv_statevar_10~0 := 0;~ldv_statevar_2~0 := 0;~ldv_0_callback_handler~0.base, ~ldv_0_callback_handler~0.offset := #funAddr~via_ircc_interrupt.base, #funAddr~via_ircc_interrupt.offset;~ldv_10_exit_via_ircc_cleanup_default~0.base, ~ldv_10_exit_via_ircc_cleanup_default~0.offset := #funAddr~via_ircc_cleanup.base, #funAddr~via_ircc_cleanup.offset;~ldv_10_init_via_ircc_init_default~0.base, ~ldv_10_init_via_ircc_init_default~0.offset := #funAddr~via_ircc_init.base, #funAddr~via_ircc_init.offset;~ldv_1_callback_ndo_do_ioctl~0.base, ~ldv_1_callback_ndo_do_ioctl~0.offset := #funAddr~via_ircc_net_ioctl.base, #funAddr~via_ircc_net_ioctl.offset;~ldv_1_callback_ndo_start_xmit~0.base, ~ldv_1_callback_ndo_start_xmit~0.offset := #funAddr~via_ircc_hard_xmit_sir.base, #funAddr~via_ircc_hard_xmit_sir.offset;~ldv_spin_NOT_ARG_SIGN~0 := 1;~ldv_spin__xmit_lock_of_netdev_queue~0 := 1;~ldv_spin_addr_list_lock_of_net_device~0 := 1;~ldv_spin_alloc_lock_of_task_struct~0 := 1;~ldv_spin_dma_spin_lock~0 := 1;~ldv_spin_i_lock_of_inode~0 := 1;~ldv_spin_lock~0 := 1;~ldv_spin_lock_of_NOT_ARG_SIGN~0 := 1;~ldv_spin_lock_of_via_ircc_cb~0 := 1;~ldv_spin_lru_lock_of_netns_frags~0 := 1;~ldv_spin_node_size_lock_of_pglist_data~0 := 1;~ldv_spin_ptl~0 := 1;~ldv_spin_siglock_of_sighand_struct~0 := 1;~ldv_spin_tx_global_lock_of_net_device~0 := 1; {2002#true} is VALID [2022-02-20 22:48:47,356 INFO L290 TraceCheckUtils]: 1: Hoare triple {2002#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret836#1, main_~tmp~50#1;havoc main_~tmp~50#1;assume { :begin_inline_ldv_initialize } true; {2002#true} is VALID [2022-02-20 22:48:47,356 INFO L290 TraceCheckUtils]: 2: Hoare triple {2002#true} assume { :end_inline_ldv_initialize } true;assume { :begin_inline_ldv_initialize_external_data } true;assume { :begin_inline_ldv_allocate_external_0 } true;havoc ldv_allocate_external_0_#t~ret826#1.base, ldv_allocate_external_0_#t~ret826#1.offset, ldv_allocate_external_0_#t~ret827#1.base, ldv_allocate_external_0_#t~ret827#1.offset, ldv_allocate_external_0_#t~ret828#1.base, ldv_allocate_external_0_#t~ret828#1.offset, ldv_allocate_external_0_#t~ret829#1.base, ldv_allocate_external_0_#t~ret829#1.offset, ldv_allocate_external_0_#t~ret830#1.base, ldv_allocate_external_0_#t~ret830#1.offset; {2002#true} is VALID [2022-02-20 22:48:47,357 INFO L272 TraceCheckUtils]: 3: Hoare triple {2002#true} call ldv_allocate_external_0_#t~ret826#1.base, ldv_allocate_external_0_#t~ret826#1.offset := ldv_malloc(0); {2057#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:48:47,357 INFO L290 TraceCheckUtils]: 4: Hoare triple {2057#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~1.base, ~res~1.offset;havoc ~tmp~73.base, ~tmp~73.offset;havoc ~tmp___0~24;havoc ~tmp___1~15; {2002#true} is VALID [2022-02-20 22:48:47,357 INFO L272 TraceCheckUtils]: 5: Hoare triple {2002#true} call #t~ret933 := ldv_undef_int(); {2002#true} is VALID [2022-02-20 22:48:47,357 INFO L290 TraceCheckUtils]: 6: Hoare triple {2002#true} havoc ~tmp~78;assume -2147483648 <= #t~nondet944 && #t~nondet944 <= 2147483647;~tmp~78 := #t~nondet944;havoc #t~nondet944;#res := ~tmp~78; {2002#true} is VALID [2022-02-20 22:48:47,357 INFO L290 TraceCheckUtils]: 7: Hoare triple {2002#true} assume true; {2002#true} is VALID [2022-02-20 22:48:47,357 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {2002#true} {2002#true} #3959#return; {2002#true} is VALID [2022-02-20 22:48:47,358 INFO L290 TraceCheckUtils]: 9: Hoare triple {2002#true} assume -2147483648 <= #t~ret933 && #t~ret933 <= 2147483647;~tmp___1~15 := #t~ret933;havoc #t~ret933; {2002#true} is VALID [2022-02-20 22:48:47,358 INFO L290 TraceCheckUtils]: 10: Hoare triple {2002#true} assume !(0 != ~tmp___1~15);#res.base, #res.offset := 0, 0; {2002#true} is VALID [2022-02-20 22:48:47,358 INFO L290 TraceCheckUtils]: 11: Hoare triple {2002#true} assume true; {2002#true} is VALID [2022-02-20 22:48:47,358 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {2002#true} {2002#true} #4745#return; {2002#true} is VALID [2022-02-20 22:48:47,358 INFO L290 TraceCheckUtils]: 13: Hoare triple {2002#true} ~ldv_0_data_data~0.base, ~ldv_0_data_data~0.offset := ldv_allocate_external_0_#t~ret826#1.base, ldv_allocate_external_0_#t~ret826#1.offset;havoc ldv_allocate_external_0_#t~ret826#1.base, ldv_allocate_external_0_#t~ret826#1.offset;~ldv_0_thread_thread~0.base, ~ldv_0_thread_thread~0.offset := 0, 0; {2002#true} is VALID [2022-02-20 22:48:47,359 INFO L272 TraceCheckUtils]: 14: Hoare triple {2002#true} call ldv_allocate_external_0_#t~ret827#1.base, ldv_allocate_external_0_#t~ret827#1.offset := ldv_malloc(3027); {2057#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:48:47,359 INFO L290 TraceCheckUtils]: 15: Hoare triple {2057#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~1.base, ~res~1.offset;havoc ~tmp~73.base, ~tmp~73.offset;havoc ~tmp___0~24;havoc ~tmp___1~15; {2002#true} is VALID [2022-02-20 22:48:47,359 INFO L272 TraceCheckUtils]: 16: Hoare triple {2002#true} call #t~ret933 := ldv_undef_int(); {2002#true} is VALID [2022-02-20 22:48:47,360 INFO L290 TraceCheckUtils]: 17: Hoare triple {2002#true} havoc ~tmp~78;assume -2147483648 <= #t~nondet944 && #t~nondet944 <= 2147483647;~tmp~78 := #t~nondet944;havoc #t~nondet944;#res := ~tmp~78; {2002#true} is VALID [2022-02-20 22:48:47,360 INFO L290 TraceCheckUtils]: 18: Hoare triple {2002#true} assume true; {2002#true} is VALID [2022-02-20 22:48:47,360 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {2002#true} {2002#true} #3959#return; {2002#true} is VALID [2022-02-20 22:48:47,360 INFO L290 TraceCheckUtils]: 20: Hoare triple {2002#true} assume -2147483648 <= #t~ret933 && #t~ret933 <= 2147483647;~tmp___1~15 := #t~ret933;havoc #t~ret933; {2002#true} is VALID [2022-02-20 22:48:47,360 INFO L290 TraceCheckUtils]: 21: Hoare triple {2002#true} assume !(0 != ~tmp___1~15);#res.base, #res.offset := 0, 0; {2002#true} is VALID [2022-02-20 22:48:47,360 INFO L290 TraceCheckUtils]: 22: Hoare triple {2002#true} assume true; {2002#true} is VALID [2022-02-20 22:48:47,361 INFO L284 TraceCheckUtils]: 23: Hoare quadruple {2002#true} {2002#true} #4747#return; {2002#true} is VALID [2022-02-20 22:48:47,361 INFO L290 TraceCheckUtils]: 24: Hoare triple {2002#true} ~ldv_1_container_net_device~0.base, ~ldv_1_container_net_device~0.offset := ldv_allocate_external_0_#t~ret827#1.base, ldv_allocate_external_0_#t~ret827#1.offset;havoc ldv_allocate_external_0_#t~ret827#1.base, ldv_allocate_external_0_#t~ret827#1.offset; {2002#true} is VALID [2022-02-20 22:48:47,362 INFO L272 TraceCheckUtils]: 25: Hoare triple {2002#true} call ldv_allocate_external_0_#t~ret828#1.base, ldv_allocate_external_0_#t~ret828#1.offset := ldv_malloc(37); {2057#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:48:47,362 INFO L290 TraceCheckUtils]: 26: Hoare triple {2057#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~1.base, ~res~1.offset;havoc ~tmp~73.base, ~tmp~73.offset;havoc ~tmp___0~24;havoc ~tmp___1~15; {2002#true} is VALID [2022-02-20 22:48:47,362 INFO L272 TraceCheckUtils]: 27: Hoare triple {2002#true} call #t~ret933 := ldv_undef_int(); {2002#true} is VALID [2022-02-20 22:48:47,362 INFO L290 TraceCheckUtils]: 28: Hoare triple {2002#true} havoc ~tmp~78;assume -2147483648 <= #t~nondet944 && #t~nondet944 <= 2147483647;~tmp~78 := #t~nondet944;havoc #t~nondet944;#res := ~tmp~78; {2002#true} is VALID [2022-02-20 22:48:47,362 INFO L290 TraceCheckUtils]: 29: Hoare triple {2002#true} assume true; {2002#true} is VALID [2022-02-20 22:48:47,362 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {2002#true} {2002#true} #3959#return; {2002#true} is VALID [2022-02-20 22:48:47,363 INFO L290 TraceCheckUtils]: 31: Hoare triple {2002#true} assume -2147483648 <= #t~ret933 && #t~ret933 <= 2147483647;~tmp___1~15 := #t~ret933;havoc #t~ret933; {2002#true} is VALID [2022-02-20 22:48:47,363 INFO L290 TraceCheckUtils]: 32: Hoare triple {2002#true} assume !(0 != ~tmp___1~15);#res.base, #res.offset := 0, 0; {2002#true} is VALID [2022-02-20 22:48:47,363 INFO L290 TraceCheckUtils]: 33: Hoare triple {2002#true} assume true; {2002#true} is VALID [2022-02-20 22:48:47,363 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {2002#true} {2002#true} #4749#return; {2002#true} is VALID [2022-02-20 22:48:47,363 INFO L290 TraceCheckUtils]: 35: Hoare triple {2002#true} ~ldv_1_container_struct_ifreq_ptr~0.base, ~ldv_1_container_struct_ifreq_ptr~0.offset := ldv_allocate_external_0_#t~ret828#1.base, ldv_allocate_external_0_#t~ret828#1.offset;havoc ldv_allocate_external_0_#t~ret828#1.base, ldv_allocate_external_0_#t~ret828#1.offset; {2002#true} is VALID [2022-02-20 22:48:47,364 INFO L272 TraceCheckUtils]: 36: Hoare triple {2002#true} call ldv_allocate_external_0_#t~ret829#1.base, ldv_allocate_external_0_#t~ret829#1.offset := ldv_malloc(245); {2057#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:48:47,364 INFO L290 TraceCheckUtils]: 37: Hoare triple {2057#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~1.base, ~res~1.offset;havoc ~tmp~73.base, ~tmp~73.offset;havoc ~tmp___0~24;havoc ~tmp___1~15; {2002#true} is VALID [2022-02-20 22:48:47,364 INFO L272 TraceCheckUtils]: 38: Hoare triple {2002#true} call #t~ret933 := ldv_undef_int(); {2002#true} is VALID [2022-02-20 22:48:47,364 INFO L290 TraceCheckUtils]: 39: Hoare triple {2002#true} havoc ~tmp~78;assume -2147483648 <= #t~nondet944 && #t~nondet944 <= 2147483647;~tmp~78 := #t~nondet944;havoc #t~nondet944;#res := ~tmp~78; {2002#true} is VALID [2022-02-20 22:48:47,365 INFO L290 TraceCheckUtils]: 40: Hoare triple {2002#true} assume true; {2002#true} is VALID [2022-02-20 22:48:47,365 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {2002#true} {2002#true} #3959#return; {2002#true} is VALID [2022-02-20 22:48:47,365 INFO L290 TraceCheckUtils]: 42: Hoare triple {2002#true} assume -2147483648 <= #t~ret933 && #t~ret933 <= 2147483647;~tmp___1~15 := #t~ret933;havoc #t~ret933; {2002#true} is VALID [2022-02-20 22:48:47,365 INFO L290 TraceCheckUtils]: 43: Hoare triple {2002#true} assume !(0 != ~tmp___1~15);#res.base, #res.offset := 0, 0; {2002#true} is VALID [2022-02-20 22:48:47,365 INFO L290 TraceCheckUtils]: 44: Hoare triple {2002#true} assume true; {2002#true} is VALID [2022-02-20 22:48:47,365 INFO L284 TraceCheckUtils]: 45: Hoare quadruple {2002#true} {2002#true} #4751#return; {2002#true} is VALID [2022-02-20 22:48:47,366 INFO L290 TraceCheckUtils]: 46: Hoare triple {2002#true} ~ldv_1_container_struct_sk_buff_ptr~0.base, ~ldv_1_container_struct_sk_buff_ptr~0.offset := ldv_allocate_external_0_#t~ret829#1.base, ldv_allocate_external_0_#t~ret829#1.offset;havoc ldv_allocate_external_0_#t~ret829#1.base, ldv_allocate_external_0_#t~ret829#1.offset; {2002#true} is VALID [2022-02-20 22:48:47,366 INFO L272 TraceCheckUtils]: 47: Hoare triple {2002#true} call ldv_allocate_external_0_#t~ret830#1.base, ldv_allocate_external_0_#t~ret830#1.offset := ldv_malloc(3018); {2057#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:48:47,366 INFO L290 TraceCheckUtils]: 48: Hoare triple {2057#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~1.base, ~res~1.offset;havoc ~tmp~73.base, ~tmp~73.offset;havoc ~tmp___0~24;havoc ~tmp___1~15; {2002#true} is VALID [2022-02-20 22:48:47,367 INFO L272 TraceCheckUtils]: 49: Hoare triple {2002#true} call #t~ret933 := ldv_undef_int(); {2002#true} is VALID [2022-02-20 22:48:47,367 INFO L290 TraceCheckUtils]: 50: Hoare triple {2002#true} havoc ~tmp~78;assume -2147483648 <= #t~nondet944 && #t~nondet944 <= 2147483647;~tmp~78 := #t~nondet944;havoc #t~nondet944;#res := ~tmp~78; {2002#true} is VALID [2022-02-20 22:48:47,367 INFO L290 TraceCheckUtils]: 51: Hoare triple {2002#true} assume true; {2002#true} is VALID [2022-02-20 22:48:47,367 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {2002#true} {2002#true} #3959#return; {2002#true} is VALID [2022-02-20 22:48:47,367 INFO L290 TraceCheckUtils]: 53: Hoare triple {2002#true} assume -2147483648 <= #t~ret933 && #t~ret933 <= 2147483647;~tmp___1~15 := #t~ret933;havoc #t~ret933; {2002#true} is VALID [2022-02-20 22:48:47,367 INFO L290 TraceCheckUtils]: 54: Hoare triple {2002#true} assume !(0 != ~tmp___1~15);#res.base, #res.offset := 0, 0; {2002#true} is VALID [2022-02-20 22:48:47,368 INFO L290 TraceCheckUtils]: 55: Hoare triple {2002#true} assume true; {2002#true} is VALID [2022-02-20 22:48:47,368 INFO L284 TraceCheckUtils]: 56: Hoare quadruple {2002#true} {2002#true} #4753#return; {2002#true} is VALID [2022-02-20 22:48:47,368 INFO L290 TraceCheckUtils]: 57: Hoare triple {2002#true} ~ldv_2_resource_dev~0.base, ~ldv_2_resource_dev~0.offset := ldv_allocate_external_0_#t~ret830#1.base, ldv_allocate_external_0_#t~ret830#1.offset;havoc ldv_allocate_external_0_#t~ret830#1.base, ldv_allocate_external_0_#t~ret830#1.offset; {2002#true} is VALID [2022-02-20 22:48:47,368 INFO L290 TraceCheckUtils]: 58: Hoare triple {2002#true} assume { :end_inline_ldv_allocate_external_0 } true; {2002#true} is VALID [2022-02-20 22:48:47,369 INFO L290 TraceCheckUtils]: 59: Hoare triple {2002#true} assume { :end_inline_ldv_initialize_external_data } true;~ldv_statevar_10~0 := 7;~ldv_statevar_0~0 := 6;~ldv_statevar_1~0 := 5;~ldv_2_ret_default~0 := 1;~ldv_statevar_2~0 := 20; {2049#(= 7 ~ldv_statevar_10~0)} is VALID [2022-02-20 22:48:47,369 INFO L272 TraceCheckUtils]: 60: Hoare triple {2049#(= 7 ~ldv_statevar_10~0)} call main_#t~ret836#1 := ldv_undef_int(); {2002#true} is VALID [2022-02-20 22:48:47,369 INFO L290 TraceCheckUtils]: 61: Hoare triple {2002#true} havoc ~tmp~78;assume -2147483648 <= #t~nondet944 && #t~nondet944 <= 2147483647;~tmp~78 := #t~nondet944;havoc #t~nondet944;#res := ~tmp~78; {2002#true} is VALID [2022-02-20 22:48:47,369 INFO L290 TraceCheckUtils]: 62: Hoare triple {2002#true} assume true; {2002#true} is VALID [2022-02-20 22:48:47,370 INFO L284 TraceCheckUtils]: 63: Hoare quadruple {2002#true} {2049#(= 7 ~ldv_statevar_10~0)} #4755#return; {2049#(= 7 ~ldv_statevar_10~0)} is VALID [2022-02-20 22:48:47,370 INFO L290 TraceCheckUtils]: 64: Hoare triple {2049#(= 7 ~ldv_statevar_10~0)} assume -2147483648 <= main_#t~ret836#1 && main_#t~ret836#1 <= 2147483647;main_~tmp~50#1 := main_#t~ret836#1;havoc main_#t~ret836#1; {2049#(= 7 ~ldv_statevar_10~0)} is VALID [2022-02-20 22:48:47,371 INFO L290 TraceCheckUtils]: 65: Hoare triple {2049#(= 7 ~ldv_statevar_10~0)} assume 0 == main_~tmp~50#1; {2049#(= 7 ~ldv_statevar_10~0)} is VALID [2022-02-20 22:48:47,371 INFO L290 TraceCheckUtils]: 66: Hoare triple {2049#(= 7 ~ldv_statevar_10~0)} assume { :begin_inline_ldv_entry_EMGentry_10 } true;ldv_entry_EMGentry_10_#in~arg0#1.base, ldv_entry_EMGentry_10_#in~arg0#1.offset := 0, 0;havoc ldv_entry_EMGentry_10_#t~ret833#1, ldv_entry_EMGentry_10_#t~ret834#1, ldv_entry_EMGentry_10_#t~ret835#1, ldv_entry_EMGentry_10_~arg0#1.base, ldv_entry_EMGentry_10_~arg0#1.offset, ldv_entry_EMGentry_10_~tmp~49#1;ldv_entry_EMGentry_10_~arg0#1.base, ldv_entry_EMGentry_10_~arg0#1.offset := ldv_entry_EMGentry_10_#in~arg0#1.base, ldv_entry_EMGentry_10_#in~arg0#1.offset;havoc ldv_entry_EMGentry_10_~tmp~49#1; {2049#(= 7 ~ldv_statevar_10~0)} is VALID [2022-02-20 22:48:47,371 INFO L290 TraceCheckUtils]: 67: Hoare triple {2049#(= 7 ~ldv_statevar_10~0)} assume !(4 == ~ldv_statevar_10~0); {2049#(= 7 ~ldv_statevar_10~0)} is VALID [2022-02-20 22:48:47,372 INFO L290 TraceCheckUtils]: 68: Hoare triple {2049#(= 7 ~ldv_statevar_10~0)} assume 6 == ~ldv_statevar_10~0; {2003#false} is VALID [2022-02-20 22:48:47,372 INFO L272 TraceCheckUtils]: 69: Hoare triple {2003#false} call ldv_assume((if 0 != ~ldv_10_ret_default~0 then 1 else 0)); {2002#true} is VALID [2022-02-20 22:48:47,372 INFO L290 TraceCheckUtils]: 70: Hoare triple {2002#true} ~expression := #in~expression; {2002#true} is VALID [2022-02-20 22:48:47,372 INFO L290 TraceCheckUtils]: 71: Hoare triple {2002#true} assume !(0 == ~expression); {2002#true} is VALID [2022-02-20 22:48:47,373 INFO L290 TraceCheckUtils]: 72: Hoare triple {2002#true} assume true; {2002#true} is VALID [2022-02-20 22:48:47,373 INFO L284 TraceCheckUtils]: 73: Hoare quadruple {2002#true} {2003#false} #4767#return; {2003#false} is VALID [2022-02-20 22:48:47,373 INFO L272 TraceCheckUtils]: 74: Hoare triple {2003#false} call ldv_check_final_state(); {2003#false} is VALID [2022-02-20 22:48:47,373 INFO L272 TraceCheckUtils]: 75: Hoare triple {2003#false} call ldv_assert_linux_kernel_locking_spinlock__one_thread_locked_at_exit((if 1 == ~ldv_spin_NOT_ARG_SIGN~0 then 1 else 0)); {2003#false} is VALID [2022-02-20 22:48:47,373 INFO L290 TraceCheckUtils]: 76: Hoare triple {2003#false} ~expr := #in~expr; {2003#false} is VALID [2022-02-20 22:48:47,373 INFO L290 TraceCheckUtils]: 77: Hoare triple {2003#false} assume 0 == ~expr; {2003#false} is VALID [2022-02-20 22:48:47,374 INFO L290 TraceCheckUtils]: 78: Hoare triple {2003#false} assume !false; {2003#false} is VALID [2022-02-20 22:48:47,374 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 105 trivial. 0 not checked. [2022-02-20 22:48:47,375 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:48:47,375 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [410938280] [2022-02-20 22:48:47,375 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [410938280] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:48:47,376 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 22:48:47,376 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-02-20 22:48:47,377 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [772439945] [2022-02-20 22:48:47,377 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:48:47,381 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 3 states have call successors, (10), 3 states have call predecessors, (10), 1 states have return successors, (8), 3 states have call predecessors, (8), 3 states have call successors, (8) Word has length 79 [2022-02-20 22:48:47,382 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:48:47,385 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 3 states have call successors, (10), 3 states have call predecessors, (10), 1 states have return successors, (8), 3 states have call predecessors, (8), 3 states have call successors, (8) [2022-02-20 22:48:47,447 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 45 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:48:47,447 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-02-20 22:48:47,447 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:48:47,461 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-02-20 22:48:47,462 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-02-20 22:48:47,469 INFO L87 Difference]: Start difference. First operand has 1999 states, 1251 states have (on average 1.3069544364508394) internal successors, (1635), 1277 states have internal predecessors, (1635), 654 states have call successors, (654), 92 states have call predecessors, (654), 91 states have return successors, (650), 638 states have call predecessors, (650), 650 states have call successors, (650) Second operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 3 states have call successors, (10), 3 states have call predecessors, (10), 1 states have return successors, (8), 3 states have call predecessors, (8), 3 states have call successors, (8) [2022-02-20 22:49:07,985 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:49:07,986 INFO L93 Difference]: Finished difference Result 5917 states and 8905 transitions. [2022-02-20 22:49:07,986 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-02-20 22:49:07,986 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 3 states have call successors, (10), 3 states have call predecessors, (10), 1 states have return successors, (8), 3 states have call predecessors, (8), 3 states have call successors, (8) Word has length 79 [2022-02-20 22:49:07,986 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 22:49:07,987 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 3 states have call successors, (10), 3 states have call predecessors, (10), 1 states have return successors, (8), 3 states have call predecessors, (8), 3 states have call successors, (8) [2022-02-20 22:49:08,615 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 8905 transitions. [2022-02-20 22:49:08,616 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 3 states have call successors, (10), 3 states have call predecessors, (10), 1 states have return successors, (8), 3 states have call predecessors, (8), 3 states have call successors, (8) [2022-02-20 22:49:09,173 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 8905 transitions. [2022-02-20 22:49:09,173 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 8905 transitions. [2022-02-20 22:49:15,039 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 8905 edges. 8905 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:49:15,978 INFO L225 Difference]: With dead ends: 5917 [2022-02-20 22:49:15,979 INFO L226 Difference]: Without dead ends: 3924 [2022-02-20 22:49:15,993 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 26 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-02-20 22:49:15,995 INFO L933 BasicCegarLoop]: 2795 mSDtfsCounter, 3435 mSDsluCounter, 1850 mSDsCounter, 0 mSdLazyCounter, 3081 mSolverCounterSat, 2339 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 5.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4056 SdHoareTripleChecker+Valid, 4645 SdHoareTripleChecker+Invalid, 5420 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 2339 IncrementalHoareTripleChecker+Valid, 3081 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 5.7s IncrementalHoareTripleChecker+Time [2022-02-20 22:49:15,996 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [4056 Valid, 4645 Invalid, 5420 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [2339 Valid, 3081 Invalid, 0 Unknown, 0 Unchecked, 5.7s Time] [2022-02-20 22:49:16,011 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3924 states. [2022-02-20 22:49:16,243 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3924 to 3892. [2022-02-20 22:49:16,243 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 22:49:16,260 INFO L82 GeneralOperation]: Start isEquivalent. First operand 3924 states. Second operand has 3892 states, 2442 states have (on average 1.2665847665847665) internal successors, (3093), 2492 states have internal predecessors, (3093), 1268 states have call successors, (1268), 180 states have call predecessors, (1268), 179 states have return successors, (1265), 1241 states have call predecessors, (1265), 1265 states have call successors, (1265) [2022-02-20 22:49:16,271 INFO L74 IsIncluded]: Start isIncluded. First operand 3924 states. Second operand has 3892 states, 2442 states have (on average 1.2665847665847665) internal successors, (3093), 2492 states have internal predecessors, (3093), 1268 states have call successors, (1268), 180 states have call predecessors, (1268), 179 states have return successors, (1265), 1241 states have call predecessors, (1265), 1265 states have call successors, (1265) [2022-02-20 22:49:16,280 INFO L87 Difference]: Start difference. First operand 3924 states. Second operand has 3892 states, 2442 states have (on average 1.2665847665847665) internal successors, (3093), 2492 states have internal predecessors, (3093), 1268 states have call successors, (1268), 180 states have call predecessors, (1268), 179 states have return successors, (1265), 1241 states have call predecessors, (1265), 1265 states have call successors, (1265) [2022-02-20 22:49:16,813 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:49:16,813 INFO L93 Difference]: Finished difference Result 3924 states and 5683 transitions. [2022-02-20 22:49:16,813 INFO L276 IsEmpty]: Start isEmpty. Operand 3924 states and 5683 transitions. [2022-02-20 22:49:16,842 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:49:16,843 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:49:16,862 INFO L74 IsIncluded]: Start isIncluded. First operand has 3892 states, 2442 states have (on average 1.2665847665847665) internal successors, (3093), 2492 states have internal predecessors, (3093), 1268 states have call successors, (1268), 180 states have call predecessors, (1268), 179 states have return successors, (1265), 1241 states have call predecessors, (1265), 1265 states have call successors, (1265) Second operand 3924 states. [2022-02-20 22:49:16,869 INFO L87 Difference]: Start difference. First operand has 3892 states, 2442 states have (on average 1.2665847665847665) internal successors, (3093), 2492 states have internal predecessors, (3093), 1268 states have call successors, (1268), 180 states have call predecessors, (1268), 179 states have return successors, (1265), 1241 states have call predecessors, (1265), 1265 states have call successors, (1265) Second operand 3924 states. [2022-02-20 22:49:17,376 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:49:17,376 INFO L93 Difference]: Finished difference Result 3924 states and 5683 transitions. [2022-02-20 22:49:17,377 INFO L276 IsEmpty]: Start isEmpty. Operand 3924 states and 5683 transitions. [2022-02-20 22:49:17,399 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:49:17,399 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:49:17,399 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 22:49:17,400 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 22:49:17,406 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3892 states, 2442 states have (on average 1.2665847665847665) internal successors, (3093), 2492 states have internal predecessors, (3093), 1268 states have call successors, (1268), 180 states have call predecessors, (1268), 179 states have return successors, (1265), 1241 states have call predecessors, (1265), 1265 states have call successors, (1265) [2022-02-20 22:49:18,151 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3892 states to 3892 states and 5626 transitions. [2022-02-20 22:49:18,154 INFO L78 Accepts]: Start accepts. Automaton has 3892 states and 5626 transitions. Word has length 79 [2022-02-20 22:49:18,154 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 22:49:18,154 INFO L470 AbstractCegarLoop]: Abstraction has 3892 states and 5626 transitions. [2022-02-20 22:49:18,155 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 3 states have call successors, (10), 3 states have call predecessors, (10), 1 states have return successors, (8), 3 states have call predecessors, (8), 3 states have call successors, (8) [2022-02-20 22:49:18,155 INFO L276 IsEmpty]: Start isEmpty. Operand 3892 states and 5626 transitions. [2022-02-20 22:49:18,156 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2022-02-20 22:49:18,157 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:49:18,157 INFO L514 BasicCegarLoop]: trace histogram [6, 6, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:49:18,157 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-02-20 22:49:18,157 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ldv_assert_linux_kernel_locking_spinlock__one_thread_double_lockErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_assert_linux_kernel_locking_spinlock__one_thread_double_unlockErr0ASSERT_VIOLATIONERROR_FUNCTION, ldv_assert_linux_kernel_locking_spinlock__one_thread_double_lockErr0ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-02-20 22:49:18,158 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:49:18,158 INFO L85 PathProgramCache]: Analyzing trace with hash -2063132158, now seen corresponding path program 1 times [2022-02-20 22:49:18,158 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:49:18,158 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2000369147] [2022-02-20 22:49:18,158 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:49:18,158 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:49:18,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:49:18,310 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-02-20 22:49:18,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:49:18,319 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:49:18,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:49:18,325 INFO L290 TraceCheckUtils]: 0: Hoare triple {24320#true} havoc ~tmp~78;assume -2147483648 <= #t~nondet944 && #t~nondet944 <= 2147483647;~tmp~78 := #t~nondet944;havoc #t~nondet944;#res := ~tmp~78; {24320#true} is VALID [2022-02-20 22:49:18,325 INFO L290 TraceCheckUtils]: 1: Hoare triple {24320#true} assume true; {24320#true} is VALID [2022-02-20 22:49:18,326 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {24320#true} {24320#true} #3959#return; {24320#true} is VALID [2022-02-20 22:49:18,326 INFO L290 TraceCheckUtils]: 0: Hoare triple {24374#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~1.base, ~res~1.offset;havoc ~tmp~73.base, ~tmp~73.offset;havoc ~tmp___0~24;havoc ~tmp___1~15; {24320#true} is VALID [2022-02-20 22:49:18,326 INFO L272 TraceCheckUtils]: 1: Hoare triple {24320#true} call #t~ret933 := ldv_undef_int(); {24320#true} is VALID [2022-02-20 22:49:18,326 INFO L290 TraceCheckUtils]: 2: Hoare triple {24320#true} havoc ~tmp~78;assume -2147483648 <= #t~nondet944 && #t~nondet944 <= 2147483647;~tmp~78 := #t~nondet944;havoc #t~nondet944;#res := ~tmp~78; {24320#true} is VALID [2022-02-20 22:49:18,326 INFO L290 TraceCheckUtils]: 3: Hoare triple {24320#true} assume true; {24320#true} is VALID [2022-02-20 22:49:18,327 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {24320#true} {24320#true} #3959#return; {24320#true} is VALID [2022-02-20 22:49:18,327 INFO L290 TraceCheckUtils]: 5: Hoare triple {24320#true} assume -2147483648 <= #t~ret933 && #t~ret933 <= 2147483647;~tmp___1~15 := #t~ret933;havoc #t~ret933; {24320#true} is VALID [2022-02-20 22:49:18,327 INFO L290 TraceCheckUtils]: 6: Hoare triple {24320#true} assume !(0 != ~tmp___1~15);#res.base, #res.offset := 0, 0; {24320#true} is VALID [2022-02-20 22:49:18,327 INFO L290 TraceCheckUtils]: 7: Hoare triple {24320#true} assume true; {24320#true} is VALID [2022-02-20 22:49:18,327 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {24320#true} {24320#true} #4745#return; {24320#true} is VALID [2022-02-20 22:49:18,327 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2022-02-20 22:49:18,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:49:18,336 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:49:18,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:49:18,342 INFO L290 TraceCheckUtils]: 0: Hoare triple {24320#true} havoc ~tmp~78;assume -2147483648 <= #t~nondet944 && #t~nondet944 <= 2147483647;~tmp~78 := #t~nondet944;havoc #t~nondet944;#res := ~tmp~78; {24320#true} is VALID [2022-02-20 22:49:18,342 INFO L290 TraceCheckUtils]: 1: Hoare triple {24320#true} assume true; {24320#true} is VALID [2022-02-20 22:49:18,342 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {24320#true} {24320#true} #3959#return; {24320#true} is VALID [2022-02-20 22:49:18,343 INFO L290 TraceCheckUtils]: 0: Hoare triple {24374#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~1.base, ~res~1.offset;havoc ~tmp~73.base, ~tmp~73.offset;havoc ~tmp___0~24;havoc ~tmp___1~15; {24320#true} is VALID [2022-02-20 22:49:18,343 INFO L272 TraceCheckUtils]: 1: Hoare triple {24320#true} call #t~ret933 := ldv_undef_int(); {24320#true} is VALID [2022-02-20 22:49:18,343 INFO L290 TraceCheckUtils]: 2: Hoare triple {24320#true} havoc ~tmp~78;assume -2147483648 <= #t~nondet944 && #t~nondet944 <= 2147483647;~tmp~78 := #t~nondet944;havoc #t~nondet944;#res := ~tmp~78; {24320#true} is VALID [2022-02-20 22:49:18,344 INFO L290 TraceCheckUtils]: 3: Hoare triple {24320#true} assume true; {24320#true} is VALID [2022-02-20 22:49:18,364 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {24320#true} {24320#true} #3959#return; {24320#true} is VALID [2022-02-20 22:49:18,364 INFO L290 TraceCheckUtils]: 5: Hoare triple {24320#true} assume -2147483648 <= #t~ret933 && #t~ret933 <= 2147483647;~tmp___1~15 := #t~ret933;havoc #t~ret933; {24320#true} is VALID [2022-02-20 22:49:18,364 INFO L290 TraceCheckUtils]: 6: Hoare triple {24320#true} assume !(0 != ~tmp___1~15);#res.base, #res.offset := 0, 0; {24320#true} is VALID [2022-02-20 22:49:18,365 INFO L290 TraceCheckUtils]: 7: Hoare triple {24320#true} assume true; {24320#true} is VALID [2022-02-20 22:49:18,366 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {24320#true} {24320#true} #4747#return; {24320#true} is VALID [2022-02-20 22:49:18,366 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 25 [2022-02-20 22:49:18,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:49:18,379 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:49:18,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:49:18,384 INFO L290 TraceCheckUtils]: 0: Hoare triple {24320#true} havoc ~tmp~78;assume -2147483648 <= #t~nondet944 && #t~nondet944 <= 2147483647;~tmp~78 := #t~nondet944;havoc #t~nondet944;#res := ~tmp~78; {24320#true} is VALID [2022-02-20 22:49:18,384 INFO L290 TraceCheckUtils]: 1: Hoare triple {24320#true} assume true; {24320#true} is VALID [2022-02-20 22:49:18,385 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {24320#true} {24320#true} #3959#return; {24320#true} is VALID [2022-02-20 22:49:18,386 INFO L290 TraceCheckUtils]: 0: Hoare triple {24374#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~1.base, ~res~1.offset;havoc ~tmp~73.base, ~tmp~73.offset;havoc ~tmp___0~24;havoc ~tmp___1~15; {24320#true} is VALID [2022-02-20 22:49:18,386 INFO L272 TraceCheckUtils]: 1: Hoare triple {24320#true} call #t~ret933 := ldv_undef_int(); {24320#true} is VALID [2022-02-20 22:49:18,389 INFO L290 TraceCheckUtils]: 2: Hoare triple {24320#true} havoc ~tmp~78;assume -2147483648 <= #t~nondet944 && #t~nondet944 <= 2147483647;~tmp~78 := #t~nondet944;havoc #t~nondet944;#res := ~tmp~78; {24320#true} is VALID [2022-02-20 22:49:18,389 INFO L290 TraceCheckUtils]: 3: Hoare triple {24320#true} assume true; {24320#true} is VALID [2022-02-20 22:49:18,389 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {24320#true} {24320#true} #3959#return; {24320#true} is VALID [2022-02-20 22:49:18,391 INFO L290 TraceCheckUtils]: 5: Hoare triple {24320#true} assume -2147483648 <= #t~ret933 && #t~ret933 <= 2147483647;~tmp___1~15 := #t~ret933;havoc #t~ret933; {24320#true} is VALID [2022-02-20 22:49:18,391 INFO L290 TraceCheckUtils]: 6: Hoare triple {24320#true} assume !(0 != ~tmp___1~15);#res.base, #res.offset := 0, 0; {24320#true} is VALID [2022-02-20 22:49:18,391 INFO L290 TraceCheckUtils]: 7: Hoare triple {24320#true} assume true; {24320#true} is VALID [2022-02-20 22:49:18,391 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {24320#true} {24320#true} #4749#return; {24320#true} is VALID [2022-02-20 22:49:18,391 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 36 [2022-02-20 22:49:18,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:49:18,415 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:49:18,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:49:18,425 INFO L290 TraceCheckUtils]: 0: Hoare triple {24320#true} havoc ~tmp~78;assume -2147483648 <= #t~nondet944 && #t~nondet944 <= 2147483647;~tmp~78 := #t~nondet944;havoc #t~nondet944;#res := ~tmp~78; {24320#true} is VALID [2022-02-20 22:49:18,425 INFO L290 TraceCheckUtils]: 1: Hoare triple {24320#true} assume true; {24320#true} is VALID [2022-02-20 22:49:18,425 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {24320#true} {24320#true} #3959#return; {24320#true} is VALID [2022-02-20 22:49:18,426 INFO L290 TraceCheckUtils]: 0: Hoare triple {24374#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~1.base, ~res~1.offset;havoc ~tmp~73.base, ~tmp~73.offset;havoc ~tmp___0~24;havoc ~tmp___1~15; {24320#true} is VALID [2022-02-20 22:49:18,426 INFO L272 TraceCheckUtils]: 1: Hoare triple {24320#true} call #t~ret933 := ldv_undef_int(); {24320#true} is VALID [2022-02-20 22:49:18,426 INFO L290 TraceCheckUtils]: 2: Hoare triple {24320#true} havoc ~tmp~78;assume -2147483648 <= #t~nondet944 && #t~nondet944 <= 2147483647;~tmp~78 := #t~nondet944;havoc #t~nondet944;#res := ~tmp~78; {24320#true} is VALID [2022-02-20 22:49:18,426 INFO L290 TraceCheckUtils]: 3: Hoare triple {24320#true} assume true; {24320#true} is VALID [2022-02-20 22:49:18,426 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {24320#true} {24320#true} #3959#return; {24320#true} is VALID [2022-02-20 22:49:18,426 INFO L290 TraceCheckUtils]: 5: Hoare triple {24320#true} assume -2147483648 <= #t~ret933 && #t~ret933 <= 2147483647;~tmp___1~15 := #t~ret933;havoc #t~ret933; {24320#true} is VALID [2022-02-20 22:49:18,426 INFO L290 TraceCheckUtils]: 6: Hoare triple {24320#true} assume !(0 != ~tmp___1~15);#res.base, #res.offset := 0, 0; {24320#true} is VALID [2022-02-20 22:49:18,426 INFO L290 TraceCheckUtils]: 7: Hoare triple {24320#true} assume true; {24320#true} is VALID [2022-02-20 22:49:18,426 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {24320#true} {24320#true} #4751#return; {24320#true} is VALID [2022-02-20 22:49:18,426 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 47 [2022-02-20 22:49:18,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:49:18,442 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:49:18,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:49:18,465 INFO L290 TraceCheckUtils]: 0: Hoare triple {24320#true} havoc ~tmp~78;assume -2147483648 <= #t~nondet944 && #t~nondet944 <= 2147483647;~tmp~78 := #t~nondet944;havoc #t~nondet944;#res := ~tmp~78; {24320#true} is VALID [2022-02-20 22:49:18,465 INFO L290 TraceCheckUtils]: 1: Hoare triple {24320#true} assume true; {24320#true} is VALID [2022-02-20 22:49:18,465 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {24320#true} {24320#true} #3959#return; {24320#true} is VALID [2022-02-20 22:49:18,465 INFO L290 TraceCheckUtils]: 0: Hoare triple {24374#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~1.base, ~res~1.offset;havoc ~tmp~73.base, ~tmp~73.offset;havoc ~tmp___0~24;havoc ~tmp___1~15; {24320#true} is VALID [2022-02-20 22:49:18,466 INFO L272 TraceCheckUtils]: 1: Hoare triple {24320#true} call #t~ret933 := ldv_undef_int(); {24320#true} is VALID [2022-02-20 22:49:18,466 INFO L290 TraceCheckUtils]: 2: Hoare triple {24320#true} havoc ~tmp~78;assume -2147483648 <= #t~nondet944 && #t~nondet944 <= 2147483647;~tmp~78 := #t~nondet944;havoc #t~nondet944;#res := ~tmp~78; {24320#true} is VALID [2022-02-20 22:49:18,466 INFO L290 TraceCheckUtils]: 3: Hoare triple {24320#true} assume true; {24320#true} is VALID [2022-02-20 22:49:18,466 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {24320#true} {24320#true} #3959#return; {24320#true} is VALID [2022-02-20 22:49:18,466 INFO L290 TraceCheckUtils]: 5: Hoare triple {24320#true} assume -2147483648 <= #t~ret933 && #t~ret933 <= 2147483647;~tmp___1~15 := #t~ret933;havoc #t~ret933; {24320#true} is VALID [2022-02-20 22:49:18,466 INFO L290 TraceCheckUtils]: 6: Hoare triple {24320#true} assume !(0 != ~tmp___1~15);#res.base, #res.offset := 0, 0; {24320#true} is VALID [2022-02-20 22:49:18,466 INFO L290 TraceCheckUtils]: 7: Hoare triple {24320#true} assume true; {24320#true} is VALID [2022-02-20 22:49:18,466 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {24320#true} {24320#true} #4753#return; {24320#true} is VALID [2022-02-20 22:49:18,466 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2022-02-20 22:49:18,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:49:18,474 INFO L290 TraceCheckUtils]: 0: Hoare triple {24320#true} havoc ~tmp~78;assume -2147483648 <= #t~nondet944 && #t~nondet944 <= 2147483647;~tmp~78 := #t~nondet944;havoc #t~nondet944;#res := ~tmp~78; {24320#true} is VALID [2022-02-20 22:49:18,474 INFO L290 TraceCheckUtils]: 1: Hoare triple {24320#true} assume true; {24320#true} is VALID [2022-02-20 22:49:18,474 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {24320#true} {24367#(= 6 ~ldv_statevar_0~0)} #4755#return; {24367#(= 6 ~ldv_statevar_0~0)} is VALID [2022-02-20 22:49:18,474 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73 [2022-02-20 22:49:18,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:49:18,481 INFO L290 TraceCheckUtils]: 0: Hoare triple {24320#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3200 + ~dev.offset; {24320#true} is VALID [2022-02-20 22:49:18,481 INFO L290 TraceCheckUtils]: 1: Hoare triple {24320#true} assume true; {24320#true} is VALID [2022-02-20 22:49:18,481 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {24320#true} {24321#false} #4791#return; {24321#false} is VALID [2022-02-20 22:49:18,481 INFO L290 TraceCheckUtils]: 0: Hoare triple {24320#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(199, 1);call #Ultimate.allocInit(26, 2);call #Ultimate.allocInit(63, 3);call #Ultimate.allocInit(9, 4);call #Ultimate.allocInit(9, 5);call #Ultimate.allocInit(7, 6);call write~init~int(15, 6, 0, 1);call write~init~int(37, 6, 1, 1);call write~init~int(115, 6, 2, 1);call write~init~int(40, 6, 3, 1);call write~init~int(41, 6, 4, 1);call write~init~int(10, 6, 5, 1);call write~init~int(0, 6, 6, 1);call #Ultimate.allocInit(14, 7);call #Ultimate.allocInit(9, 8);call #Ultimate.allocInit(45, 9);call #Ultimate.allocInit(14, 10);call #Ultimate.allocInit(25, 11);call #Ultimate.allocInit(13, 12);call #Ultimate.allocInit(22, 13);call #Ultimate.allocInit(13, 14);call #Ultimate.allocInit(23, 15);call #Ultimate.allocInit(13, 16);call #Ultimate.allocInit(23, 17);call #Ultimate.allocInit(13, 18);call #Ultimate.allocInit(22, 19);call #Ultimate.allocInit(13, 20);call #Ultimate.allocInit(7, 21);call write~init~int(15, 21, 0, 1);call write~init~int(37, 21, 1, 1);call write~init~int(115, 21, 2, 1);call write~init~int(40, 21, 3, 1);call write~init~int(41, 21, 4, 1);call write~init~int(10, 21, 5, 1);call write~init~int(0, 21, 6, 1);call #Ultimate.allocInit(17, 22);call #Ultimate.allocInit(7, 23);call write~init~int(15, 23, 0, 1);call write~init~int(37, 23, 1, 1);call write~init~int(115, 23, 2, 1);call write~init~int(40, 23, 3, 1);call write~init~int(41, 23, 4, 1);call write~init~int(10, 23, 5, 1);call write~init~int(0, 23, 6, 1);call #Ultimate.allocInit(14, 24);call #Ultimate.allocInit(22, 25);call #Ultimate.allocInit(35, 26);call #Ultimate.allocInit(14, 27);call #Ultimate.allocInit(40, 28);call #Ultimate.allocInit(7, 29);call write~init~int(15, 29, 0, 1);call write~init~int(37, 29, 1, 1);call write~init~int(115, 29, 2, 1);call write~init~int(40, 29, 3, 1);call write~init~int(41, 29, 4, 1);call write~init~int(10, 29, 5, 1);call write~init~int(0, 29, 6, 1);call #Ultimate.allocInit(15, 30);call #Ultimate.allocInit(30, 31);call #Ultimate.allocInit(15, 32);call #Ultimate.allocInit(7, 33);call write~init~int(15, 33, 0, 1);call write~init~int(37, 33, 1, 1);call write~init~int(115, 33, 2, 1);call write~init~int(40, 33, 3, 1);call write~init~int(41, 33, 4, 1);call write~init~int(10, 33, 5, 1);call write~init~int(0, 33, 6, 1);call #Ultimate.allocInit(12, 34);call #Ultimate.allocInit(85, 35);call #Ultimate.allocInit(47, 36);call #Ultimate.allocInit(29, 37);call #Ultimate.allocInit(58, 38);call #Ultimate.allocInit(29, 39);call #Ultimate.allocInit(50, 40);call #Ultimate.allocInit(29, 41);call #Ultimate.allocInit(40, 42);call #Ultimate.allocInit(29, 43);call #Ultimate.allocInit(30, 44);call #Ultimate.allocInit(22, 45);call #Ultimate.allocInit(31, 46);call #Ultimate.allocInit(28, 47);call #Ultimate.allocInit(23, 48);call #Ultimate.allocInit(13, 49);call #Ultimate.allocInit(45, 50);call #Ultimate.allocInit(18, 51);call #Ultimate.allocInit(7, 52);call write~init~int(15, 52, 0, 1);call write~init~int(37, 52, 1, 1);call write~init~int(115, 52, 2, 1);call write~init~int(40, 52, 3, 1);call write~init~int(41, 52, 4, 1);call write~init~int(10, 52, 5, 1);call write~init~int(0, 52, 6, 1);call #Ultimate.allocInit(27, 53);call #Ultimate.allocInit(56, 54);call #Ultimate.allocInit(27, 55);call #Ultimate.allocInit(7, 56);call write~init~int(15, 56, 0, 1);call write~init~int(37, 56, 1, 1);call write~init~int(115, 56, 2, 1);call write~init~int(40, 56, 3, 1);call write~init~int(41, 56, 4, 1);call write~init~int(10, 56, 5, 1);call write~init~int(0, 56, 6, 1);call #Ultimate.allocInit(21, 57);call #Ultimate.allocInit(50, 58);call #Ultimate.allocInit(30, 59);call #Ultimate.allocInit(41, 60);call #Ultimate.allocInit(30, 61);call #Ultimate.allocInit(26, 62);call #Ultimate.allocInit(30, 63);call #Ultimate.allocInit(15, 64);call #Ultimate.allocInit(14, 65);call #Ultimate.allocInit(23, 66);call #Ultimate.allocInit(15, 67);call #Ultimate.allocInit(48, 68);call #Ultimate.allocInit(15, 69);call #Ultimate.allocInit(43, 70);call #Ultimate.allocInit(19, 71);call #Ultimate.allocInit(6, 72);call write~init~int(84, 72, 0, 1);call write~init~int(105, 72, 1, 1);call write~init~int(109, 72, 2, 1);call write~init~int(101, 72, 3, 1);call write~init~int(114, 72, 4, 1);call write~init~int(0, 72, 5, 1);call #Ultimate.allocInit(1, 73);call write~init~int(0, 73, 0, 1);call #Ultimate.allocInit(3, 74);call write~init~int(84, 74, 0, 1);call write~init~int(120, 74, 1, 1);call write~init~int(0, 74, 2, 1);call #Ultimate.allocInit(1, 75);call write~init~int(0, 75, 0, 1);call #Ultimate.allocInit(3, 76);call write~init~int(82, 76, 0, 1);call write~init~int(120, 76, 1, 1);call write~init~int(0, 76, 2, 1);call #Ultimate.allocInit(1, 77);call write~init~int(0, 77, 0, 1);call #Ultimate.allocInit(38, 78);call #Ultimate.allocInit(19, 79);call #Ultimate.allocInit(13, 80);call #Ultimate.allocInit(1, 81);call write~init~int(0, 81, 0, 1);call #Ultimate.allocInit(4, 82);call write~init~int(69, 82, 0, 1);call write~init~int(79, 82, 1, 1);call write~init~int(77, 82, 2, 1);call write~init~int(0, 82, 3, 1);call #Ultimate.allocInit(1, 83);call write~init~int(0, 83, 0, 1);call #Ultimate.allocInit(11, 84);call #Ultimate.allocInit(1, 85);call write~init~int(0, 85, 0, 1);call #Ultimate.allocInit(10, 86);call #Ultimate.allocInit(1, 87);call write~init~int(0, 87, 0, 1);call #Ultimate.allocInit(47, 88);call #Ultimate.allocInit(19, 89);call #Ultimate.allocInit(9, 90);call #Ultimate.allocInit(1, 91);call write~init~int(0, 91, 0, 1);call #Ultimate.allocInit(8, 92);call #Ultimate.allocInit(1, 93);call write~init~int(0, 93, 0, 1);call #Ultimate.allocInit(12, 94);call #Ultimate.allocInit(1, 95);call write~init~int(0, 95, 0, 1);call #Ultimate.allocInit(4, 96);call write~init~int(69, 96, 0, 1);call write~init~int(79, 96, 1, 1);call write~init~int(70, 96, 2, 1);call write~init~int(0, 96, 3, 1);call #Ultimate.allocInit(1, 97);call write~init~int(0, 97, 0, 1);call #Ultimate.allocInit(7, 98);call write~init~int(82, 98, 0, 1);call write~init~int(120, 98, 1, 1);call write~init~int(68, 98, 2, 1);call write~init~int(97, 98, 3, 1);call write~init~int(116, 98, 4, 1);call write~init~int(97, 98, 5, 1);call write~init~int(0, 98, 6, 1);call #Ultimate.allocInit(1, 99);call write~init~int(0, 99, 0, 1);call #Ultimate.allocInit(9, 100);call #Ultimate.allocInit(1, 101);call write~init~int(0, 101, 0, 1);call #Ultimate.allocInit(8, 102);call #Ultimate.allocInit(1, 103);call write~init~int(0, 103, 0, 1);call #Ultimate.allocInit(17, 104);call #Ultimate.allocInit(19, 105);call #Ultimate.allocInit(79, 106);call #Ultimate.allocInit(19, 107);call #Ultimate.allocInit(7, 108);call write~init~int(15, 108, 0, 1);call write~init~int(37, 108, 1, 1);call write~init~int(115, 108, 2, 1);call write~init~int(40, 108, 3, 1);call write~init~int(41, 108, 4, 1);call write~init~int(10, 108, 5, 1);call write~init~int(0, 108, 6, 1);call #Ultimate.allocInit(8, 109);call #Ultimate.allocInit(31, 110);call #Ultimate.allocInit(28, 111);call #Ultimate.allocInit(22, 112);call #Ultimate.allocInit(13, 113);call #Ultimate.allocInit(22, 114);call #Ultimate.allocInit(22, 115);call #Ultimate.allocInit(7, 116);call write~init~int(15, 116, 0, 1);call write~init~int(37, 116, 1, 1);call write~init~int(115, 116, 2, 1);call write~init~int(40, 116, 3, 1);call write~init~int(41, 116, 4, 1);call write~init~int(10, 116, 5, 1);call write~init~int(0, 116, 6, 1);call #Ultimate.allocInit(18, 117);call #Ultimate.allocInit(31, 118);call #Ultimate.allocInit(28, 119);call #Ultimate.allocInit(18, 120);call #Ultimate.allocInit(12, 121);call #Ultimate.allocInit(31, 122);call #Ultimate.allocInit(28, 123);call #Ultimate.allocInit(18, 124);call #Ultimate.allocInit(13, 125);call #Ultimate.allocInit(32, 126);call #Ultimate.allocInit(32, 127);call #Ultimate.allocInit(33, 128);call #Ultimate.allocInit(11, 129);call #Ultimate.allocInit(7, 130);call write~init~int(15, 130, 0, 1);call write~init~int(37, 130, 1, 1);call write~init~int(115, 130, 2, 1);call write~init~int(40, 130, 3, 1);call write~init~int(41, 130, 4, 1);call write~init~int(10, 130, 5, 1);call write~init~int(0, 130, 6, 1);call #Ultimate.allocInit(19, 131);call #Ultimate.allocInit(31, 132);call #Ultimate.allocInit(28, 133);call #Ultimate.allocInit(19, 134);call #Ultimate.allocInit(12, 135);call #Ultimate.allocInit(31, 136);call #Ultimate.allocInit(28, 137);call #Ultimate.allocInit(19, 138);call #Ultimate.allocInit(13, 139);call #Ultimate.allocInit(31, 140);call #Ultimate.allocInit(28, 141);call #Ultimate.allocInit(19, 142);call #Ultimate.allocInit(12, 143);call #Ultimate.allocInit(31, 144);call #Ultimate.allocInit(28, 145);call #Ultimate.allocInit(19, 146);call #Ultimate.allocInit(13, 147);call #Ultimate.allocInit(23, 148);call #Ultimate.allocInit(19, 149);call #Ultimate.allocInit(1, 150);call write~init~int(0, 150, 0, 1);call #Ultimate.allocInit(2, 151);call write~init~int(48, 151, 0, 1);call write~init~int(0, 151, 1, 1);call #Ultimate.allocInit(85, 152);~driver_name~0.base, ~driver_name~0.offset := 4, 0;~qos_mtt_bits~0 := 7;~dongle_id~0 := 0;~#via_pci_tbl~0.base, ~#via_pci_tbl~0.offset := 153, 0;call #Ultimate.allocInit(192, 153);call write~init~int(4358, ~#via_pci_tbl~0.base, ~#via_pci_tbl~0.offset, 4);call write~init~int(33329, ~#via_pci_tbl~0.base, 4 + ~#via_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#via_pci_tbl~0.base, 8 + ~#via_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#via_pci_tbl~0.base, 12 + ~#via_pci_tbl~0.offset, 4);call write~init~int(0, ~#via_pci_tbl~0.base, 16 + ~#via_pci_tbl~0.offset, 4);call write~init~int(0, ~#via_pci_tbl~0.base, 20 + ~#via_pci_tbl~0.offset, 4);call write~init~int(0, ~#via_pci_tbl~0.base, 24 + ~#via_pci_tbl~0.offset, 8);call write~init~int(4358, ~#via_pci_tbl~0.base, 32 + ~#via_pci_tbl~0.offset, 4);call write~init~int(12553, ~#via_pci_tbl~0.base, 36 + ~#via_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#via_pci_tbl~0.base, 40 + ~#via_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#via_pci_tbl~0.base, 44 + ~#via_pci_tbl~0.offset, 4);call write~init~int(0, ~#via_pci_tbl~0.base, 48 + ~#via_pci_tbl~0.offset, 4);call write~init~int(0, ~#via_pci_tbl~0.base, 52 + ~#via_pci_tbl~0.offset, 4);call write~init~int(1, ~#via_pci_tbl~0.base, 56 + ~#via_pci_tbl~0.offset, 8);call write~init~int(4358, ~#via_pci_tbl~0.base, 64 + ~#via_pci_tbl~0.offset, 4);call write~init~int(12404, ~#via_pci_tbl~0.base, 68 + ~#via_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#via_pci_tbl~0.base, 72 + ~#via_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#via_pci_tbl~0.base, 76 + ~#via_pci_tbl~0.offset, 4);call write~init~int(0, ~#via_pci_tbl~0.base, 80 + ~#via_pci_tbl~0.offset, 4);call write~init~int(0, ~#via_pci_tbl~0.base, 84 + ~#via_pci_tbl~0.offset, 4);call write~init~int(2, ~#via_pci_tbl~0.base, 88 + ~#via_pci_tbl~0.offset, 8);call write~init~int(4358, ~#via_pci_tbl~0.base, 96 + ~#via_pci_tbl~0.offset, 4);call write~init~int(12615, ~#via_pci_tbl~0.base, 100 + ~#via_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#via_pci_tbl~0.base, 104 + ~#via_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#via_pci_tbl~0.base, 108 + ~#via_pci_tbl~0.offset, 4);call write~init~int(0, ~#via_pci_tbl~0.base, 112 + ~#via_pci_tbl~0.offset, 4);call write~init~int(0, ~#via_pci_tbl~0.base, 116 + ~#via_pci_tbl~0.offset, 4);call write~init~int(3, ~#via_pci_tbl~0.base, 120 + ~#via_pci_tbl~0.offset, 8);call write~init~int(4358, ~#via_pci_tbl~0.base, 128 + ~#via_pci_tbl~0.offset, 4);call write~init~int(12663, ~#via_pci_tbl~0.base, 132 + ~#via_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#via_pci_tbl~0.base, 136 + ~#via_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#via_pci_tbl~0.base, 140 + ~#via_pci_tbl~0.offset, 4);call write~init~int(0, ~#via_pci_tbl~0.base, 144 + ~#via_pci_tbl~0.offset, 4);call write~init~int(0, ~#via_pci_tbl~0.base, 148 + ~#via_pci_tbl~0.offset, 4);call write~init~int(4, ~#via_pci_tbl~0.base, 152 + ~#via_pci_tbl~0.offset, 8);call write~init~int(0, ~#via_pci_tbl~0.base, 160 + ~#via_pci_tbl~0.offset, 4);call write~init~int(0, ~#via_pci_tbl~0.base, 164 + ~#via_pci_tbl~0.offset, 4);call write~init~int(0, ~#via_pci_tbl~0.base, 168 + ~#via_pci_tbl~0.offset, 4);call write~init~int(0, ~#via_pci_tbl~0.base, 172 + ~#via_pci_tbl~0.offset, 4);call write~init~int(0, ~#via_pci_tbl~0.base, 176 + ~#via_pci_tbl~0.offset, 4);call write~init~int(0, ~#via_pci_tbl~0.base, 180 + ~#via_pci_tbl~0.offset, 4);call write~init~int(0, ~#via_pci_tbl~0.base, 184 + ~#via_pci_tbl~0.offset, 8);~__mod_pci_device_table~0.vendor := 0;~__mod_pci_device_table~0.device := 0;~__mod_pci_device_table~0.subvendor := 0;~__mod_pci_device_table~0.subdevice := 0;~__mod_pci_device_table~0.class := 0;~__mod_pci_device_table~0.class_mask := 0;~__mod_pci_device_table~0.driver_data := 0;~#via_driver~0.base, ~#via_driver~0.offset := 154, 0;call #Ultimate.allocInit(301, 154);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 8 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(5, 0, ~#via_driver~0.base, 16 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(~#via_pci_tbl~0.base, ~#via_pci_tbl~0.offset, ~#via_driver~0.base, 24 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~via_init_one.base, #funAddr~via_init_one.offset, ~#via_driver~0.base, 32 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~via_remove_one.base, #funAddr~via_remove_one.offset, ~#via_driver~0.base, 40 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 48 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 56 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 64 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 72 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 80 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 88 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 96 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 104 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 112 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 120 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 128 + ~#via_driver~0.offset, 8);call write~init~int(0, ~#via_driver~0.base, 136 + ~#via_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 137 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 145 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 153 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 161 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 169 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 177 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 185 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 193 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 201 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 209 + ~#via_driver~0.offset, 8);call write~init~int(0, ~#via_driver~0.base, 217 + ~#via_driver~0.offset, 4);call write~init~int(0, ~#via_driver~0.base, 221 + ~#via_driver~0.offset, 4);call write~init~int(0, ~#via_driver~0.base, 225 + ~#via_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 229 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 237 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 245 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 253 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 261 + ~#via_driver~0.offset, 8);call write~init~int(0, ~#via_driver~0.base, 269 + ~#via_driver~0.offset, 4);call write~init~int(0, ~#via_driver~0.base, 273 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 285 + ~#via_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_driver~0.base, 293 + ~#via_driver~0.offset, 8);~#via_ircc_sir_ops~0.base, ~#via_ircc_sir_ops~0.offset := 155, 0;call #Ultimate.allocInit(472, 155);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 8 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~via_ircc_net_open.base, #funAddr~via_ircc_net_open.offset, ~#via_ircc_sir_ops~0.base, 16 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~via_ircc_net_close.base, #funAddr~via_ircc_net_close.offset, ~#via_ircc_sir_ops~0.base, 24 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~via_ircc_hard_xmit_sir.base, #funAddr~via_ircc_hard_xmit_sir.offset, ~#via_ircc_sir_ops~0.base, 32 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 40 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 48 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 56 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 64 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 72 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~via_ircc_net_ioctl.base, #funAddr~via_ircc_net_ioctl.offset, ~#via_ircc_sir_ops~0.base, 80 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 88 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 96 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 104 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 112 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 120 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 128 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 136 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 144 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 152 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 160 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 168 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 176 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 184 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 192 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 200 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 208 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 216 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 224 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 232 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 240 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 248 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 256 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 264 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 272 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 280 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 288 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 296 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 304 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 312 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 320 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 328 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 336 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 344 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 352 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 360 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 368 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 376 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 384 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 392 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 400 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 408 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 416 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 424 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 432 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 440 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 448 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 456 + ~#via_ircc_sir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_sir_ops~0.base, 464 + ~#via_ircc_sir_ops~0.offset, 8);~#via_ircc_fir_ops~0.base, ~#via_ircc_fir_ops~0.offset := 156, 0;call #Ultimate.allocInit(472, 156);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 8 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~via_ircc_net_open.base, #funAddr~via_ircc_net_open.offset, ~#via_ircc_fir_ops~0.base, 16 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~via_ircc_net_close.base, #funAddr~via_ircc_net_close.offset, ~#via_ircc_fir_ops~0.base, 24 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~via_ircc_hard_xmit_fir.base, #funAddr~via_ircc_hard_xmit_fir.offset, ~#via_ircc_fir_ops~0.base, 32 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 40 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 48 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 56 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 64 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 72 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~via_ircc_net_ioctl.base, #funAddr~via_ircc_net_ioctl.offset, ~#via_ircc_fir_ops~0.base, 80 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 88 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 96 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 104 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 112 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 120 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 128 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 136 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 144 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 152 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 160 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 168 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 176 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 184 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 192 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 200 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 208 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 216 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 224 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 232 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 240 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 248 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 256 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 264 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 272 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 280 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 288 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 296 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 304 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 312 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 320 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 328 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 336 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 344 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 352 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 360 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 368 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 376 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 384 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 392 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 400 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 408 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 416 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 424 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 432 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 440 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 448 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 456 + ~#via_ircc_fir_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#via_ircc_fir_ops~0.base, 464 + ~#via_ircc_fir_ops~0.offset, 8);~ldv_0_data_data~0.base, ~ldv_0_data_data~0.offset := 0, 0;~ldv_0_line_line~0 := 0;~ldv_0_ret_val_default~0 := 0;~ldv_0_thread_thread~0.base, ~ldv_0_thread_thread~0.offset := 0, 0;~ldv_10_ret_default~0 := 0;~ldv_1_container_net_device~0.base, ~ldv_1_container_net_device~0.offset := 0, 0;~ldv_1_container_struct_ifreq_ptr~0.base, ~ldv_1_container_struct_ifreq_ptr~0.offset := 0, 0;~ldv_1_container_struct_sk_buff_ptr~0.base, ~ldv_1_container_struct_sk_buff_ptr~0.offset := 0, 0;~ldv_1_ldv_param_3_2_default~0 := 0;~ldv_2_container_pci_driver~0.base, ~ldv_2_container_pci_driver~0.offset := 0, 0;~ldv_2_resource_dev~0.base, ~ldv_2_resource_dev~0.offset := 0, 0;~#ldv_2_resource_pm_message~0.base, ~#ldv_2_resource_pm_message~0.offset := 157, 0;call #Ultimate.allocInit(4, 157);call write~init~int(0, ~#ldv_2_resource_pm_message~0.base, ~#ldv_2_resource_pm_message~0.offset, 4);~ldv_2_resource_struct_pci_device_id_ptr~0.base, ~ldv_2_resource_struct_pci_device_id_ptr~0.offset := 0, 0;~ldv_2_ret_default~0 := 0;~ldv_statevar_0~0 := 0;~ldv_statevar_1~0 := 0;~ldv_statevar_10~0 := 0;~ldv_statevar_2~0 := 0;~ldv_0_callback_handler~0.base, ~ldv_0_callback_handler~0.offset := #funAddr~via_ircc_interrupt.base, #funAddr~via_ircc_interrupt.offset;~ldv_10_exit_via_ircc_cleanup_default~0.base, ~ldv_10_exit_via_ircc_cleanup_default~0.offset := #funAddr~via_ircc_cleanup.base, #funAddr~via_ircc_cleanup.offset;~ldv_10_init_via_ircc_init_default~0.base, ~ldv_10_init_via_ircc_init_default~0.offset := #funAddr~via_ircc_init.base, #funAddr~via_ircc_init.offset;~ldv_1_callback_ndo_do_ioctl~0.base, ~ldv_1_callback_ndo_do_ioctl~0.offset := #funAddr~via_ircc_net_ioctl.base, #funAddr~via_ircc_net_ioctl.offset;~ldv_1_callback_ndo_start_xmit~0.base, ~ldv_1_callback_ndo_start_xmit~0.offset := #funAddr~via_ircc_hard_xmit_sir.base, #funAddr~via_ircc_hard_xmit_sir.offset;~ldv_spin_NOT_ARG_SIGN~0 := 1;~ldv_spin__xmit_lock_of_netdev_queue~0 := 1;~ldv_spin_addr_list_lock_of_net_device~0 := 1;~ldv_spin_alloc_lock_of_task_struct~0 := 1;~ldv_spin_dma_spin_lock~0 := 1;~ldv_spin_i_lock_of_inode~0 := 1;~ldv_spin_lock~0 := 1;~ldv_spin_lock_of_NOT_ARG_SIGN~0 := 1;~ldv_spin_lock_of_via_ircc_cb~0 := 1;~ldv_spin_lru_lock_of_netns_frags~0 := 1;~ldv_spin_node_size_lock_of_pglist_data~0 := 1;~ldv_spin_ptl~0 := 1;~ldv_spin_siglock_of_sighand_struct~0 := 1;~ldv_spin_tx_global_lock_of_net_device~0 := 1; {24320#true} is VALID [2022-02-20 22:49:18,488 INFO L290 TraceCheckUtils]: 1: Hoare triple {24320#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret836#1, main_~tmp~50#1;havoc main_~tmp~50#1;assume { :begin_inline_ldv_initialize } true; {24320#true} is VALID [2022-02-20 22:49:18,488 INFO L290 TraceCheckUtils]: 2: Hoare triple {24320#true} assume { :end_inline_ldv_initialize } true;assume { :begin_inline_ldv_initialize_external_data } true;assume { :begin_inline_ldv_allocate_external_0 } true;havoc ldv_allocate_external_0_#t~ret826#1.base, ldv_allocate_external_0_#t~ret826#1.offset, ldv_allocate_external_0_#t~ret827#1.base, ldv_allocate_external_0_#t~ret827#1.offset, ldv_allocate_external_0_#t~ret828#1.base, ldv_allocate_external_0_#t~ret828#1.offset, ldv_allocate_external_0_#t~ret829#1.base, ldv_allocate_external_0_#t~ret829#1.offset, ldv_allocate_external_0_#t~ret830#1.base, ldv_allocate_external_0_#t~ret830#1.offset; {24320#true} is VALID [2022-02-20 22:49:18,489 INFO L272 TraceCheckUtils]: 3: Hoare triple {24320#true} call ldv_allocate_external_0_#t~ret826#1.base, ldv_allocate_external_0_#t~ret826#1.offset := ldv_malloc(0); {24374#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:49:18,489 INFO L290 TraceCheckUtils]: 4: Hoare triple {24374#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~1.base, ~res~1.offset;havoc ~tmp~73.base, ~tmp~73.offset;havoc ~tmp___0~24;havoc ~tmp___1~15; {24320#true} is VALID [2022-02-20 22:49:18,489 INFO L272 TraceCheckUtils]: 5: Hoare triple {24320#true} call #t~ret933 := ldv_undef_int(); {24320#true} is VALID [2022-02-20 22:49:18,489 INFO L290 TraceCheckUtils]: 6: Hoare triple {24320#true} havoc ~tmp~78;assume -2147483648 <= #t~nondet944 && #t~nondet944 <= 2147483647;~tmp~78 := #t~nondet944;havoc #t~nondet944;#res := ~tmp~78; {24320#true} is VALID [2022-02-20 22:49:18,489 INFO L290 TraceCheckUtils]: 7: Hoare triple {24320#true} assume true; {24320#true} is VALID [2022-02-20 22:49:18,489 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {24320#true} {24320#true} #3959#return; {24320#true} is VALID [2022-02-20 22:49:18,489 INFO L290 TraceCheckUtils]: 9: Hoare triple {24320#true} assume -2147483648 <= #t~ret933 && #t~ret933 <= 2147483647;~tmp___1~15 := #t~ret933;havoc #t~ret933; {24320#true} is VALID [2022-02-20 22:49:18,490 INFO L290 TraceCheckUtils]: 10: Hoare triple {24320#true} assume !(0 != ~tmp___1~15);#res.base, #res.offset := 0, 0; {24320#true} is VALID [2022-02-20 22:49:18,490 INFO L290 TraceCheckUtils]: 11: Hoare triple {24320#true} assume true; {24320#true} is VALID [2022-02-20 22:49:18,490 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {24320#true} {24320#true} #4745#return; {24320#true} is VALID [2022-02-20 22:49:18,490 INFO L290 TraceCheckUtils]: 13: Hoare triple {24320#true} ~ldv_0_data_data~0.base, ~ldv_0_data_data~0.offset := ldv_allocate_external_0_#t~ret826#1.base, ldv_allocate_external_0_#t~ret826#1.offset;havoc ldv_allocate_external_0_#t~ret826#1.base, ldv_allocate_external_0_#t~ret826#1.offset;~ldv_0_thread_thread~0.base, ~ldv_0_thread_thread~0.offset := 0, 0; {24320#true} is VALID [2022-02-20 22:49:18,490 INFO L272 TraceCheckUtils]: 14: Hoare triple {24320#true} call ldv_allocate_external_0_#t~ret827#1.base, ldv_allocate_external_0_#t~ret827#1.offset := ldv_malloc(3027); {24374#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:49:18,490 INFO L290 TraceCheckUtils]: 15: Hoare triple {24374#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~1.base, ~res~1.offset;havoc ~tmp~73.base, ~tmp~73.offset;havoc ~tmp___0~24;havoc ~tmp___1~15; {24320#true} is VALID [2022-02-20 22:49:18,491 INFO L272 TraceCheckUtils]: 16: Hoare triple {24320#true} call #t~ret933 := ldv_undef_int(); {24320#true} is VALID [2022-02-20 22:49:18,491 INFO L290 TraceCheckUtils]: 17: Hoare triple {24320#true} havoc ~tmp~78;assume -2147483648 <= #t~nondet944 && #t~nondet944 <= 2147483647;~tmp~78 := #t~nondet944;havoc #t~nondet944;#res := ~tmp~78; {24320#true} is VALID [2022-02-20 22:49:18,491 INFO L290 TraceCheckUtils]: 18: Hoare triple {24320#true} assume true; {24320#true} is VALID [2022-02-20 22:49:18,491 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {24320#true} {24320#true} #3959#return; {24320#true} is VALID [2022-02-20 22:49:18,491 INFO L290 TraceCheckUtils]: 20: Hoare triple {24320#true} assume -2147483648 <= #t~ret933 && #t~ret933 <= 2147483647;~tmp___1~15 := #t~ret933;havoc #t~ret933; {24320#true} is VALID [2022-02-20 22:49:18,491 INFO L290 TraceCheckUtils]: 21: Hoare triple {24320#true} assume !(0 != ~tmp___1~15);#res.base, #res.offset := 0, 0; {24320#true} is VALID [2022-02-20 22:49:18,491 INFO L290 TraceCheckUtils]: 22: Hoare triple {24320#true} assume true; {24320#true} is VALID [2022-02-20 22:49:18,491 INFO L284 TraceCheckUtils]: 23: Hoare quadruple {24320#true} {24320#true} #4747#return; {24320#true} is VALID [2022-02-20 22:49:18,495 INFO L290 TraceCheckUtils]: 24: Hoare triple {24320#true} ~ldv_1_container_net_device~0.base, ~ldv_1_container_net_device~0.offset := ldv_allocate_external_0_#t~ret827#1.base, ldv_allocate_external_0_#t~ret827#1.offset;havoc ldv_allocate_external_0_#t~ret827#1.base, ldv_allocate_external_0_#t~ret827#1.offset; {24320#true} is VALID [2022-02-20 22:49:18,495 INFO L272 TraceCheckUtils]: 25: Hoare triple {24320#true} call ldv_allocate_external_0_#t~ret828#1.base, ldv_allocate_external_0_#t~ret828#1.offset := ldv_malloc(37); {24374#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:49:18,496 INFO L290 TraceCheckUtils]: 26: Hoare triple {24374#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~1.base, ~res~1.offset;havoc ~tmp~73.base, ~tmp~73.offset;havoc ~tmp___0~24;havoc ~tmp___1~15; {24320#true} is VALID [2022-02-20 22:49:18,496 INFO L272 TraceCheckUtils]: 27: Hoare triple {24320#true} call #t~ret933 := ldv_undef_int(); {24320#true} is VALID [2022-02-20 22:49:18,497 INFO L290 TraceCheckUtils]: 28: Hoare triple {24320#true} havoc ~tmp~78;assume -2147483648 <= #t~nondet944 && #t~nondet944 <= 2147483647;~tmp~78 := #t~nondet944;havoc #t~nondet944;#res := ~tmp~78; {24320#true} is VALID [2022-02-20 22:49:18,497 INFO L290 TraceCheckUtils]: 29: Hoare triple {24320#true} assume true; {24320#true} is VALID [2022-02-20 22:49:18,497 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {24320#true} {24320#true} #3959#return; {24320#true} is VALID [2022-02-20 22:49:18,497 INFO L290 TraceCheckUtils]: 31: Hoare triple {24320#true} assume -2147483648 <= #t~ret933 && #t~ret933 <= 2147483647;~tmp___1~15 := #t~ret933;havoc #t~ret933; {24320#true} is VALID [2022-02-20 22:49:18,497 INFO L290 TraceCheckUtils]: 32: Hoare triple {24320#true} assume !(0 != ~tmp___1~15);#res.base, #res.offset := 0, 0; {24320#true} is VALID [2022-02-20 22:49:18,497 INFO L290 TraceCheckUtils]: 33: Hoare triple {24320#true} assume true; {24320#true} is VALID [2022-02-20 22:49:18,497 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {24320#true} {24320#true} #4749#return; {24320#true} is VALID [2022-02-20 22:49:18,497 INFO L290 TraceCheckUtils]: 35: Hoare triple {24320#true} ~ldv_1_container_struct_ifreq_ptr~0.base, ~ldv_1_container_struct_ifreq_ptr~0.offset := ldv_allocate_external_0_#t~ret828#1.base, ldv_allocate_external_0_#t~ret828#1.offset;havoc ldv_allocate_external_0_#t~ret828#1.base, ldv_allocate_external_0_#t~ret828#1.offset; {24320#true} is VALID [2022-02-20 22:49:18,498 INFO L272 TraceCheckUtils]: 36: Hoare triple {24320#true} call ldv_allocate_external_0_#t~ret829#1.base, ldv_allocate_external_0_#t~ret829#1.offset := ldv_malloc(245); {24374#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:49:18,498 INFO L290 TraceCheckUtils]: 37: Hoare triple {24374#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~1.base, ~res~1.offset;havoc ~tmp~73.base, ~tmp~73.offset;havoc ~tmp___0~24;havoc ~tmp___1~15; {24320#true} is VALID [2022-02-20 22:49:18,498 INFO L272 TraceCheckUtils]: 38: Hoare triple {24320#true} call #t~ret933 := ldv_undef_int(); {24320#true} is VALID [2022-02-20 22:49:18,498 INFO L290 TraceCheckUtils]: 39: Hoare triple {24320#true} havoc ~tmp~78;assume -2147483648 <= #t~nondet944 && #t~nondet944 <= 2147483647;~tmp~78 := #t~nondet944;havoc #t~nondet944;#res := ~tmp~78; {24320#true} is VALID [2022-02-20 22:49:18,501 INFO L290 TraceCheckUtils]: 40: Hoare triple {24320#true} assume true; {24320#true} is VALID [2022-02-20 22:49:18,501 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {24320#true} {24320#true} #3959#return; {24320#true} is VALID [2022-02-20 22:49:18,501 INFO L290 TraceCheckUtils]: 42: Hoare triple {24320#true} assume -2147483648 <= #t~ret933 && #t~ret933 <= 2147483647;~tmp___1~15 := #t~ret933;havoc #t~ret933; {24320#true} is VALID [2022-02-20 22:49:18,501 INFO L290 TraceCheckUtils]: 43: Hoare triple {24320#true} assume !(0 != ~tmp___1~15);#res.base, #res.offset := 0, 0; {24320#true} is VALID [2022-02-20 22:49:18,501 INFO L290 TraceCheckUtils]: 44: Hoare triple {24320#true} assume true; {24320#true} is VALID [2022-02-20 22:49:18,501 INFO L284 TraceCheckUtils]: 45: Hoare quadruple {24320#true} {24320#true} #4751#return; {24320#true} is VALID [2022-02-20 22:49:18,501 INFO L290 TraceCheckUtils]: 46: Hoare triple {24320#true} ~ldv_1_container_struct_sk_buff_ptr~0.base, ~ldv_1_container_struct_sk_buff_ptr~0.offset := ldv_allocate_external_0_#t~ret829#1.base, ldv_allocate_external_0_#t~ret829#1.offset;havoc ldv_allocate_external_0_#t~ret829#1.base, ldv_allocate_external_0_#t~ret829#1.offset; {24320#true} is VALID [2022-02-20 22:49:18,503 INFO L272 TraceCheckUtils]: 47: Hoare triple {24320#true} call ldv_allocate_external_0_#t~ret830#1.base, ldv_allocate_external_0_#t~ret830#1.offset := ldv_malloc(3018); {24374#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:49:18,503 INFO L290 TraceCheckUtils]: 48: Hoare triple {24374#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~1.base, ~res~1.offset;havoc ~tmp~73.base, ~tmp~73.offset;havoc ~tmp___0~24;havoc ~tmp___1~15; {24320#true} is VALID [2022-02-20 22:49:18,504 INFO L272 TraceCheckUtils]: 49: Hoare triple {24320#true} call #t~ret933 := ldv_undef_int(); {24320#true} is VALID [2022-02-20 22:49:18,504 INFO L290 TraceCheckUtils]: 50: Hoare triple {24320#true} havoc ~tmp~78;assume -2147483648 <= #t~nondet944 && #t~nondet944 <= 2147483647;~tmp~78 := #t~nondet944;havoc #t~nondet944;#res := ~tmp~78; {24320#true} is VALID [2022-02-20 22:49:18,504 INFO L290 TraceCheckUtils]: 51: Hoare triple {24320#true} assume true; {24320#true} is VALID [2022-02-20 22:49:18,504 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {24320#true} {24320#true} #3959#return; {24320#true} is VALID [2022-02-20 22:49:18,504 INFO L290 TraceCheckUtils]: 53: Hoare triple {24320#true} assume -2147483648 <= #t~ret933 && #t~ret933 <= 2147483647;~tmp___1~15 := #t~ret933;havoc #t~ret933; {24320#true} is VALID [2022-02-20 22:49:18,504 INFO L290 TraceCheckUtils]: 54: Hoare triple {24320#true} assume !(0 != ~tmp___1~15);#res.base, #res.offset := 0, 0; {24320#true} is VALID [2022-02-20 22:49:18,504 INFO L290 TraceCheckUtils]: 55: Hoare triple {24320#true} assume true; {24320#true} is VALID [2022-02-20 22:49:18,504 INFO L284 TraceCheckUtils]: 56: Hoare quadruple {24320#true} {24320#true} #4753#return; {24320#true} is VALID [2022-02-20 22:49:18,504 INFO L290 TraceCheckUtils]: 57: Hoare triple {24320#true} ~ldv_2_resource_dev~0.base, ~ldv_2_resource_dev~0.offset := ldv_allocate_external_0_#t~ret830#1.base, ldv_allocate_external_0_#t~ret830#1.offset;havoc ldv_allocate_external_0_#t~ret830#1.base, ldv_allocate_external_0_#t~ret830#1.offset; {24320#true} is VALID [2022-02-20 22:49:18,504 INFO L290 TraceCheckUtils]: 58: Hoare triple {24320#true} assume { :end_inline_ldv_allocate_external_0 } true; {24320#true} is VALID [2022-02-20 22:49:18,504 INFO L290 TraceCheckUtils]: 59: Hoare triple {24320#true} assume { :end_inline_ldv_initialize_external_data } true;~ldv_statevar_10~0 := 7;~ldv_statevar_0~0 := 6;~ldv_statevar_1~0 := 5;~ldv_2_ret_default~0 := 1;~ldv_statevar_2~0 := 20; {24367#(= 6 ~ldv_statevar_0~0)} is VALID [2022-02-20 22:49:18,505 INFO L272 TraceCheckUtils]: 60: Hoare triple {24367#(= 6 ~ldv_statevar_0~0)} call main_#t~ret836#1 := ldv_undef_int(); {24320#true} is VALID [2022-02-20 22:49:18,505 INFO L290 TraceCheckUtils]: 61: Hoare triple {24320#true} havoc ~tmp~78;assume -2147483648 <= #t~nondet944 && #t~nondet944 <= 2147483647;~tmp~78 := #t~nondet944;havoc #t~nondet944;#res := ~tmp~78; {24320#true} is VALID [2022-02-20 22:49:18,505 INFO L290 TraceCheckUtils]: 62: Hoare triple {24320#true} assume true; {24320#true} is VALID [2022-02-20 22:49:18,505 INFO L284 TraceCheckUtils]: 63: Hoare quadruple {24320#true} {24367#(= 6 ~ldv_statevar_0~0)} #4755#return; {24367#(= 6 ~ldv_statevar_0~0)} is VALID [2022-02-20 22:49:18,505 INFO L290 TraceCheckUtils]: 64: Hoare triple {24367#(= 6 ~ldv_statevar_0~0)} assume -2147483648 <= main_#t~ret836#1 && main_#t~ret836#1 <= 2147483647;main_~tmp~50#1 := main_#t~ret836#1;havoc main_#t~ret836#1; {24367#(= 6 ~ldv_statevar_0~0)} is VALID [2022-02-20 22:49:18,505 INFO L290 TraceCheckUtils]: 65: Hoare triple {24367#(= 6 ~ldv_statevar_0~0)} assume !(0 == main_~tmp~50#1); {24367#(= 6 ~ldv_statevar_0~0)} is VALID [2022-02-20 22:49:18,506 INFO L290 TraceCheckUtils]: 66: Hoare triple {24367#(= 6 ~ldv_statevar_0~0)} assume 1 == main_~tmp~50#1; {24367#(= 6 ~ldv_statevar_0~0)} is VALID [2022-02-20 22:49:18,506 INFO L290 TraceCheckUtils]: 67: Hoare triple {24367#(= 6 ~ldv_statevar_0~0)} assume { :begin_inline_ldv_interrupt_interrupt_instance_0 } true;ldv_interrupt_interrupt_instance_0_#in~arg0#1.base, ldv_interrupt_interrupt_instance_0_#in~arg0#1.offset := 0, 0;havoc ldv_interrupt_interrupt_instance_0_#t~ret841#1, ldv_interrupt_interrupt_instance_0_#t~ret842#1, ldv_interrupt_interrupt_instance_0_~arg0#1.base, ldv_interrupt_interrupt_instance_0_~arg0#1.offset, ldv_interrupt_interrupt_instance_0_~tmp~52#1;ldv_interrupt_interrupt_instance_0_~arg0#1.base, ldv_interrupt_interrupt_instance_0_~arg0#1.offset := ldv_interrupt_interrupt_instance_0_#in~arg0#1.base, ldv_interrupt_interrupt_instance_0_#in~arg0#1.offset;havoc ldv_interrupt_interrupt_instance_0_~tmp~52#1; {24367#(= 6 ~ldv_statevar_0~0)} is VALID [2022-02-20 22:49:18,507 INFO L290 TraceCheckUtils]: 68: Hoare triple {24367#(= 6 ~ldv_statevar_0~0)} assume !(2 == ~ldv_statevar_0~0); {24367#(= 6 ~ldv_statevar_0~0)} is VALID [2022-02-20 22:49:18,507 INFO L290 TraceCheckUtils]: 69: Hoare triple {24367#(= 6 ~ldv_statevar_0~0)} assume !(4 == ~ldv_statevar_0~0); {24367#(= 6 ~ldv_statevar_0~0)} is VALID [2022-02-20 22:49:18,507 INFO L290 TraceCheckUtils]: 70: Hoare triple {24367#(= 6 ~ldv_statevar_0~0)} assume 5 == ~ldv_statevar_0~0; {24321#false} is VALID [2022-02-20 22:49:18,507 INFO L290 TraceCheckUtils]: 71: Hoare triple {24321#false} assume { :begin_inline_ldv_switch_to_interrupt_context } true; {24321#false} is VALID [2022-02-20 22:49:18,507 INFO L290 TraceCheckUtils]: 72: Hoare triple {24321#false} assume { :end_inline_ldv_switch_to_interrupt_context } true;assume { :begin_inline_ldv_interrupt_instance_handler_0_5 } true;ldv_interrupt_instance_handler_0_5_#in~arg0#1.base, ldv_interrupt_instance_handler_0_5_#in~arg0#1.offset, ldv_interrupt_instance_handler_0_5_#in~arg1#1, ldv_interrupt_instance_handler_0_5_#in~arg2#1.base, ldv_interrupt_instance_handler_0_5_#in~arg2#1.offset := ~ldv_0_callback_handler~0.base, ~ldv_0_callback_handler~0.offset, ~ldv_0_line_line~0, ~ldv_0_data_data~0.base, ~ldv_0_data_data~0.offset;havoc ldv_interrupt_instance_handler_0_5_#res#1;havoc ldv_interrupt_instance_handler_0_5_#t~ret837#1, ldv_interrupt_instance_handler_0_5_~arg0#1.base, ldv_interrupt_instance_handler_0_5_~arg0#1.offset, ldv_interrupt_instance_handler_0_5_~arg1#1, ldv_interrupt_instance_handler_0_5_~arg2#1.base, ldv_interrupt_instance_handler_0_5_~arg2#1.offset, ldv_interrupt_instance_handler_0_5_~tmp~51#1;ldv_interrupt_instance_handler_0_5_~arg0#1.base, ldv_interrupt_instance_handler_0_5_~arg0#1.offset := ldv_interrupt_instance_handler_0_5_#in~arg0#1.base, ldv_interrupt_instance_handler_0_5_#in~arg0#1.offset;ldv_interrupt_instance_handler_0_5_~arg1#1 := ldv_interrupt_instance_handler_0_5_#in~arg1#1;ldv_interrupt_instance_handler_0_5_~arg2#1.base, ldv_interrupt_instance_handler_0_5_~arg2#1.offset := ldv_interrupt_instance_handler_0_5_#in~arg2#1.base, ldv_interrupt_instance_handler_0_5_#in~arg2#1.offset;havoc ldv_interrupt_instance_handler_0_5_~tmp~51#1;assume { :begin_inline_via_ircc_interrupt } true;via_ircc_interrupt_#in~dummy#1, via_ircc_interrupt_#in~dev_id#1.base, via_ircc_interrupt_#in~dev_id#1.offset := ldv_interrupt_instance_handler_0_5_~arg1#1, ldv_interrupt_instance_handler_0_5_~arg2#1.base, ldv_interrupt_instance_handler_0_5_~arg2#1.offset;havoc via_ircc_interrupt_#res#1;havoc via_ircc_interrupt_#t~ret706#1.base, via_ircc_interrupt_#t~ret706#1.offset, via_ircc_interrupt_#t~mem707#1, via_ircc_interrupt_#t~ret708#1, via_ircc_interrupt_#t~nondet709#1, via_ircc_interrupt_#t~ite710#1.base, via_ircc_interrupt_#t~ite710#1.offset, via_ircc_interrupt_#t~ite711#1.base, via_ircc_interrupt_#t~ite711#1.offset, via_ircc_interrupt_#t~ite712#1.base, via_ircc_interrupt_#t~ite712#1.offset, via_ircc_interrupt_#t~mem713#1, via_ircc_interrupt_#t~ret714#1, via_ircc_interrupt_#t~mem715#1, via_ircc_interrupt_#t~ret716#1, via_ircc_interrupt_#t~mem717#1, via_ircc_interrupt_#t~mem718#1, via_ircc_interrupt_#t~mem719#1.base, via_ircc_interrupt_#t~mem719#1.offset, via_ircc_interrupt_#t~ret720#1, via_ircc_interrupt_#t~ret721#1, via_ircc_interrupt_#t~ret722#1, via_ircc_interrupt_#t~ret723#1, via_ircc_interrupt_#t~nondet724#1, via_ircc_interrupt_#t~ite725#1.base, via_ircc_interrupt_#t~ite725#1.offset, via_ircc_interrupt_#t~ite726#1.base, via_ircc_interrupt_#t~ite726#1.offset, via_ircc_interrupt_#t~ite727#1.base, via_ircc_interrupt_#t~ite727#1.offset, via_ircc_interrupt_#t~ite728#1.base, via_ircc_interrupt_#t~ite728#1.offset, via_ircc_interrupt_#t~mem729#1, via_ircc_interrupt_#t~ret730#1, via_ircc_interrupt_#t~mem731#1.base, via_ircc_interrupt_#t~mem731#1.offset, via_ircc_interrupt_#t~ret732#1, via_ircc_interrupt_#t~ret733#1, via_ircc_interrupt_#t~mem734#1, via_ircc_interrupt_#t~ret735#1, via_ircc_interrupt_#t~nondet736#1, via_ircc_interrupt_#t~ite737#1.base, via_ircc_interrupt_#t~ite737#1.offset, via_ircc_interrupt_#t~ite738#1.base, via_ircc_interrupt_#t~ite738#1.offset, via_ircc_interrupt_#t~ite739#1.base, via_ircc_interrupt_#t~ite739#1.offset, via_ircc_interrupt_#t~ite740#1.base, via_ircc_interrupt_#t~ite740#1.offset, via_ircc_interrupt_#t~ite741#1.base, via_ircc_interrupt_#t~ite741#1.offset, via_ircc_interrupt_#t~ite742#1.base, via_ircc_interrupt_#t~ite742#1.offset, via_ircc_interrupt_#t~ite743#1.base, via_ircc_interrupt_#t~ite743#1.offset, via_ircc_interrupt_#t~nondet744#1, via_ircc_interrupt_#t~ret745#1, via_ircc_interrupt_#t~ret746#1, via_ircc_interrupt_#t~ret747#1, via_ircc_interrupt_#t~nondet748#1, via_ircc_interrupt_#t~mem749#1, via_ircc_interrupt_#t~ret750#1, via_ircc_interrupt_~dummy#1, via_ircc_interrupt_~dev_id#1.base, via_ircc_interrupt_~dev_id#1.offset, via_ircc_interrupt_~dev~2#1.base, via_ircc_interrupt_~dev~2#1.offset, via_ircc_interrupt_~self~4#1.base, via_ircc_interrupt_~self~4#1.offset, via_ircc_interrupt_~tmp~42#1.base, via_ircc_interrupt_~tmp~42#1.offset, via_ircc_interrupt_~iobase~7#1, via_ircc_interrupt_~iHostIntType~0#1, via_ircc_interrupt_~iRxIntType~0#1, via_ircc_interrupt_~iTxIntType~0#1, via_ircc_interrupt_~tmp___0~14#1, via_ircc_interrupt_~tmp___1~10#1, via_ircc_interrupt_~tmp___2~7#1, via_ircc_interrupt_~tmp___3~4#1, via_ircc_interrupt_~tmp___4~4#1;via_ircc_interrupt_~dummy#1 := via_ircc_interrupt_#in~dummy#1;via_ircc_interrupt_~dev_id#1.base, via_ircc_interrupt_~dev_id#1.offset := via_ircc_interrupt_#in~dev_id#1.base, via_ircc_interrupt_#in~dev_id#1.offset;havoc via_ircc_interrupt_~dev~2#1.base, via_ircc_interrupt_~dev~2#1.offset;havoc via_ircc_interrupt_~self~4#1.base, via_ircc_interrupt_~self~4#1.offset;havoc via_ircc_interrupt_~tmp~42#1.base, via_ircc_interrupt_~tmp~42#1.offset;havoc via_ircc_interrupt_~iobase~7#1;havoc via_ircc_interrupt_~iHostIntType~0#1;havoc via_ircc_interrupt_~iRxIntType~0#1;havoc via_ircc_interrupt_~iTxIntType~0#1;havoc via_ircc_interrupt_~tmp___0~14#1;havoc via_ircc_interrupt_~tmp___1~10#1;havoc via_ircc_interrupt_~tmp___2~7#1;havoc via_ircc_interrupt_~tmp___3~4#1;havoc via_ircc_interrupt_~tmp___4~4#1;via_ircc_interrupt_~dev~2#1.base, via_ircc_interrupt_~dev~2#1.offset := via_ircc_interrupt_~dev_id#1.base, via_ircc_interrupt_~dev_id#1.offset; {24321#false} is VALID [2022-02-20 22:49:18,519 INFO L272 TraceCheckUtils]: 73: Hoare triple {24321#false} call via_ircc_interrupt_#t~ret706#1.base, via_ircc_interrupt_#t~ret706#1.offset := netdev_priv(via_ircc_interrupt_~dev~2#1.base, via_ircc_interrupt_~dev~2#1.offset); {24320#true} is VALID [2022-02-20 22:49:18,520 INFO L290 TraceCheckUtils]: 74: Hoare triple {24320#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3200 + ~dev.offset; {24320#true} is VALID [2022-02-20 22:49:18,520 INFO L290 TraceCheckUtils]: 75: Hoare triple {24320#true} assume true; {24320#true} is VALID [2022-02-20 22:49:18,520 INFO L284 TraceCheckUtils]: 76: Hoare quadruple {24320#true} {24321#false} #4791#return; {24321#false} is VALID [2022-02-20 22:49:18,520 INFO L290 TraceCheckUtils]: 77: Hoare triple {24321#false} via_ircc_interrupt_~tmp~42#1.base, via_ircc_interrupt_~tmp~42#1.offset := via_ircc_interrupt_#t~ret706#1.base, via_ircc_interrupt_#t~ret706#1.offset;havoc via_ircc_interrupt_#t~ret706#1.base, via_ircc_interrupt_#t~ret706#1.offset;via_ircc_interrupt_~self~4#1.base, via_ircc_interrupt_~self~4#1.offset := via_ircc_interrupt_~tmp~42#1.base, via_ircc_interrupt_~tmp~42#1.offset;call via_ircc_interrupt_#t~mem707#1 := read~int(via_ircc_interrupt_~self~4#1.base, 292 + via_ircc_interrupt_~self~4#1.offset, 4);via_ircc_interrupt_~iobase~7#1 := via_ircc_interrupt_#t~mem707#1;havoc via_ircc_interrupt_#t~mem707#1;assume { :begin_inline_ldv_spin_lock_76 } true;ldv_spin_lock_76_#in~lock#1.base, ldv_spin_lock_76_#in~lock#1.offset := via_ircc_interrupt_~self~4#1.base, 489 + via_ircc_interrupt_~self~4#1.offset;havoc ldv_spin_lock_76_~lock#1.base, ldv_spin_lock_76_~lock#1.offset;ldv_spin_lock_76_~lock#1.base, ldv_spin_lock_76_~lock#1.offset := ldv_spin_lock_76_#in~lock#1.base, ldv_spin_lock_76_#in~lock#1.offset; {24321#false} is VALID [2022-02-20 22:49:18,520 INFO L272 TraceCheckUtils]: 78: Hoare triple {24321#false} call ldv_spin_lock_lock_of_via_ircc_cb(); {24321#false} is VALID [2022-02-20 22:49:18,520 INFO L272 TraceCheckUtils]: 79: Hoare triple {24321#false} call ldv_assert_linux_kernel_locking_spinlock__one_thread_double_lock((if 1 == ~ldv_spin_lock_of_via_ircc_cb~0 then 1 else 0)); {24321#false} is VALID [2022-02-20 22:49:18,521 INFO L290 TraceCheckUtils]: 80: Hoare triple {24321#false} ~expr := #in~expr; {24321#false} is VALID [2022-02-20 22:49:18,521 INFO L290 TraceCheckUtils]: 81: Hoare triple {24321#false} assume 0 == ~expr; {24321#false} is VALID [2022-02-20 22:49:18,521 INFO L290 TraceCheckUtils]: 82: Hoare triple {24321#false} assume !false; {24321#false} is VALID [2022-02-20 22:49:18,521 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 105 trivial. 0 not checked. [2022-02-20 22:49:18,522 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:49:18,522 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2000369147] [2022-02-20 22:49:18,522 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2000369147] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:49:18,522 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 22:49:18,522 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-02-20 22:49:18,522 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [10493363] [2022-02-20 22:49:18,522 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:49:18,524 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 3 states have call successors, (10), 3 states have call predecessors, (10), 1 states have return successors, (8), 3 states have call predecessors, (8), 3 states have call successors, (8) Word has length 83 [2022-02-20 22:49:18,525 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:49:18,525 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 3 states have call successors, (10), 3 states have call predecessors, (10), 1 states have return successors, (8), 3 states have call predecessors, (8), 3 states have call successors, (8) [2022-02-20 22:49:18,575 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 49 edges. 49 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:49:18,576 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-02-20 22:49:18,576 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:49:18,576 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-02-20 22:49:18,576 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-02-20 22:49:18,576 INFO L87 Difference]: Start difference. First operand 3892 states and 5626 transitions. Second operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 3 states have call successors, (10), 3 states have call predecessors, (10), 1 states have return successors, (8), 3 states have call predecessors, (8), 3 states have call successors, (8)