./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/ldv-linux-3.14/linux-3.14_linux-alloc-spinlock_drivers-net-ethernet-sun-sunhme.cil.i --full-output -ea --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 03d7b7b3 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -ea -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/ldv-linux-3.14/linux-3.14_linux-alloc-spinlock_drivers-net-ethernet-sun-sunhme.cil.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash e184773994bf5ba427e3ad6843df80bcf1aa90cb50c2ace36ee6ac9939c1f916 --- Real Ultimate output --- This is Ultimate 0.2.2-dev-03d7b7b [2022-02-20 22:54:15,178 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-02-20 22:54:15,180 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-02-20 22:54:15,213 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-02-20 22:54:15,213 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-02-20 22:54:15,215 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-02-20 22:54:15,216 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-02-20 22:54:15,218 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-02-20 22:54:15,220 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-02-20 22:54:15,223 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-02-20 22:54:15,223 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-02-20 22:54:15,224 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-02-20 22:54:15,224 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-02-20 22:54:15,226 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-02-20 22:54:15,227 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-02-20 22:54:15,229 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-02-20 22:54:15,230 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-02-20 22:54:15,230 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-02-20 22:54:15,232 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-02-20 22:54:15,236 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-02-20 22:54:15,237 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-02-20 22:54:15,237 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-02-20 22:54:15,238 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-02-20 22:54:15,239 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-02-20 22:54:15,243 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-02-20 22:54:15,243 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-02-20 22:54:15,244 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-02-20 22:54:15,245 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-02-20 22:54:15,245 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-02-20 22:54:15,246 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-02-20 22:54:15,246 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-02-20 22:54:15,246 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-02-20 22:54:15,248 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-02-20 22:54:15,249 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-02-20 22:54:15,250 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-02-20 22:54:15,250 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-02-20 22:54:15,250 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-02-20 22:54:15,250 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-02-20 22:54:15,251 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-02-20 22:54:15,251 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-02-20 22:54:15,252 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-02-20 22:54:15,253 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2022-02-20 22:54:15,275 INFO L113 SettingsManager]: Loading preferences was successful [2022-02-20 22:54:15,275 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-02-20 22:54:15,276 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-02-20 22:54:15,276 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-02-20 22:54:15,277 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-02-20 22:54:15,277 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-02-20 22:54:15,277 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-02-20 22:54:15,277 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-02-20 22:54:15,277 INFO L138 SettingsManager]: * Use SBE=true [2022-02-20 22:54:15,278 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-02-20 22:54:15,278 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-02-20 22:54:15,278 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-02-20 22:54:15,279 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-02-20 22:54:15,279 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-02-20 22:54:15,279 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-02-20 22:54:15,279 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-02-20 22:54:15,279 INFO L138 SettingsManager]: * Use constant arrays=true [2022-02-20 22:54:15,279 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-02-20 22:54:15,280 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-02-20 22:54:15,280 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-02-20 22:54:15,280 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-02-20 22:54:15,280 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-02-20 22:54:15,280 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-02-20 22:54:15,280 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-02-20 22:54:15,281 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-02-20 22:54:15,281 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-02-20 22:54:15,281 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-02-20 22:54:15,281 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2022-02-20 22:54:15,281 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2022-02-20 22:54:15,281 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-02-20 22:54:15,281 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> e184773994bf5ba427e3ad6843df80bcf1aa90cb50c2ace36ee6ac9939c1f916 [2022-02-20 22:54:15,475 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-02-20 22:54:15,498 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-02-20 22:54:15,500 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-02-20 22:54:15,501 INFO L271 PluginConnector]: Initializing CDTParser... [2022-02-20 22:54:15,502 INFO L275 PluginConnector]: CDTParser initialized [2022-02-20 22:54:15,503 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/ldv-linux-3.14/linux-3.14_linux-alloc-spinlock_drivers-net-ethernet-sun-sunhme.cil.i [2022-02-20 22:54:15,579 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/69cede43d/2f8a193e921e407ab6263d4457f10492/FLAGed7cc9c27 [2022-02-20 22:54:16,305 INFO L306 CDTParser]: Found 1 translation units. [2022-02-20 22:54:16,306 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.14/linux-3.14_linux-alloc-spinlock_drivers-net-ethernet-sun-sunhme.cil.i [2022-02-20 22:54:16,352 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/69cede43d/2f8a193e921e407ab6263d4457f10492/FLAGed7cc9c27 [2022-02-20 22:54:16,369 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/69cede43d/2f8a193e921e407ab6263d4457f10492 [2022-02-20 22:54:16,371 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-02-20 22:54:16,372 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-02-20 22:54:16,373 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-02-20 22:54:16,373 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-02-20 22:54:16,376 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-02-20 22:54:16,377 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.02 10:54:16" (1/1) ... [2022-02-20 22:54:16,377 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@398a76f6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:54:16, skipping insertion in model container [2022-02-20 22:54:16,378 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.02 10:54:16" (1/1) ... [2022-02-20 22:54:16,382 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-02-20 22:54:16,486 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-02-20 22:54:18,114 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.14/linux-3.14_linux-alloc-spinlock_drivers-net-ethernet-sun-sunhme.cil.i[340444,340457] [2022-02-20 22:54:18,116 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.14/linux-3.14_linux-alloc-spinlock_drivers-net-ethernet-sun-sunhme.cil.i[340589,340602] [2022-02-20 22:54:18,125 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-20 22:54:18,145 INFO L203 MainTranslator]: Completed pre-run [2022-02-20 22:54:18,392 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.14/linux-3.14_linux-alloc-spinlock_drivers-net-ethernet-sun-sunhme.cil.i[340444,340457] [2022-02-20 22:54:18,393 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.14/linux-3.14_linux-alloc-spinlock_drivers-net-ethernet-sun-sunhme.cil.i[340589,340602] [2022-02-20 22:54:18,397 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-20 22:54:18,524 INFO L208 MainTranslator]: Completed translation [2022-02-20 22:54:18,525 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:54:18 WrapperNode [2022-02-20 22:54:18,525 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-02-20 22:54:18,526 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-02-20 22:54:18,526 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-02-20 22:54:18,526 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-02-20 22:54:18,530 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:54:18" (1/1) ... [2022-02-20 22:54:18,608 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:54:18" (1/1) ... [2022-02-20 22:54:18,793 INFO L137 Inliner]: procedures = 430, calls = 2141, calls flagged for inlining = 204, calls inlined = 189, statements flattened = 5063 [2022-02-20 22:54:18,794 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-02-20 22:54:18,796 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-02-20 22:54:18,796 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-02-20 22:54:18,796 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-02-20 22:54:18,802 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:54:18" (1/1) ... [2022-02-20 22:54:18,802 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:54:18" (1/1) ... [2022-02-20 22:54:18,826 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:54:18" (1/1) ... [2022-02-20 22:54:18,826 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:54:18" (1/1) ... [2022-02-20 22:54:18,910 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:54:18" (1/1) ... [2022-02-20 22:54:18,924 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:54:18" (1/1) ... [2022-02-20 22:54:18,957 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:54:18" (1/1) ... [2022-02-20 22:54:18,995 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-02-20 22:54:18,997 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-02-20 22:54:18,997 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-02-20 22:54:18,997 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-02-20 22:54:18,999 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:54:18" (1/1) ... [2022-02-20 22:54:19,004 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-02-20 22:54:19,011 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-20 22:54:19,037 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-02-20 22:54:19,040 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-02-20 22:54:19,070 INFO L130 BoogieDeclarations]: Found specification of procedure strncmp [2022-02-20 22:54:19,070 INFO L130 BoogieDeclarations]: Found specification of procedure BB_GET_BIT2 [2022-02-20 22:54:19,070 INFO L138 BoogieDeclarations]: Found implementation of procedure BB_GET_BIT2 [2022-02-20 22:54:19,071 INFO L130 BoogieDeclarations]: Found specification of procedure alloc_skb [2022-02-20 22:54:19,071 INFO L138 BoogieDeclarations]: Found implementation of procedure alloc_skb [2022-02-20 22:54:19,071 INFO L130 BoogieDeclarations]: Found specification of procedure pci_release_regions [2022-02-20 22:54:19,071 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_release_regions [2022-02-20 22:54:19,071 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.meminit [2022-02-20 22:54:19,071 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.meminit [2022-02-20 22:54:19,071 INFO L130 BoogieDeclarations]: Found specification of procedure happy_meal_open [2022-02-20 22:54:19,071 INFO L138 BoogieDeclarations]: Found implementation of procedure happy_meal_open [2022-02-20 22:54:19,071 INFO L130 BoogieDeclarations]: Found specification of procedure happy_meal_poll_stop [2022-02-20 22:54:19,072 INFO L138 BoogieDeclarations]: Found implementation of procedure happy_meal_poll_stop [2022-02-20 22:54:19,072 INFO L130 BoogieDeclarations]: Found specification of procedure is_quattro_p [2022-02-20 22:54:19,072 INFO L138 BoogieDeclarations]: Found implementation of procedure is_quattro_p [2022-02-20 22:54:19,072 INFO L130 BoogieDeclarations]: Found specification of procedure netif_wake_queue [2022-02-20 22:54:19,072 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_wake_queue [2022-02-20 22:54:19,072 INFO L130 BoogieDeclarations]: Found specification of procedure happy_meal_close [2022-02-20 22:54:19,072 INFO L138 BoogieDeclarations]: Found implementation of procedure happy_meal_close [2022-02-20 22:54:19,072 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2022-02-20 22:54:19,073 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2022-02-20 22:54:19,073 INFO L130 BoogieDeclarations]: Found specification of procedure free_irq [2022-02-20 22:54:19,073 INFO L138 BoogieDeclarations]: Found implementation of procedure free_irq [2022-02-20 22:54:19,073 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_spin_unlock_irq_87 [2022-02-20 22:54:19,073 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_spin_unlock_irq_87 [2022-02-20 22:54:19,073 INFO L130 BoogieDeclarations]: Found specification of procedure happy_meal_set_multicast [2022-02-20 22:54:19,073 INFO L138 BoogieDeclarations]: Found implementation of procedure happy_meal_set_multicast [2022-02-20 22:54:19,073 INFO L130 BoogieDeclarations]: Found specification of procedure valid_dma_direction [2022-02-20 22:54:19,073 INFO L138 BoogieDeclarations]: Found implementation of procedure valid_dma_direction [2022-02-20 22:54:19,074 INFO L130 BoogieDeclarations]: Found specification of procedure BB_PUT_BIT [2022-02-20 22:54:19,074 INFO L138 BoogieDeclarations]: Found implementation of procedure BB_PUT_BIT [2022-02-20 22:54:19,074 INFO L130 BoogieDeclarations]: Found specification of procedure crc32_le [2022-02-20 22:54:19,074 INFO L138 BoogieDeclarations]: Found implementation of procedure crc32_le [2022-02-20 22:54:19,074 INFO L130 BoogieDeclarations]: Found specification of procedure happy_meal_begin_auto_negotiation [2022-02-20 22:54:19,074 INFO L138 BoogieDeclarations]: Found implementation of procedure happy_meal_begin_auto_negotiation [2022-02-20 22:54:19,074 INFO L130 BoogieDeclarations]: Found specification of procedure happy_meal_get_counters [2022-02-20 22:54:19,074 INFO L138 BoogieDeclarations]: Found implementation of procedure happy_meal_get_counters [2022-02-20 22:54:19,075 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_spin_lock_happy_lock_of_happy_meal [2022-02-20 22:54:19,075 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_spin_lock_happy_lock_of_happy_meal [2022-02-20 22:54:19,075 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_xmalloc [2022-02-20 22:54:19,075 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_xmalloc [2022-02-20 22:54:19,075 INFO L130 BoogieDeclarations]: Found specification of procedure strlcpy [2022-02-20 22:54:19,075 INFO L138 BoogieDeclarations]: Found implementation of procedure strlcpy [2022-02-20 22:54:19,075 INFO L130 BoogieDeclarations]: Found specification of procedure skb_end_pointer [2022-02-20 22:54:19,075 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_end_pointer [2022-02-20 22:54:19,076 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_del_timer [2022-02-20 22:54:19,076 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_del_timer [2022-02-20 22:54:19,076 INFO L130 BoogieDeclarations]: Found specification of procedure eth_validate_addr [2022-02-20 22:54:19,076 INFO L138 BoogieDeclarations]: Found implementation of procedure eth_validate_addr [2022-02-20 22:54:19,076 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_is_err [2022-02-20 22:54:19,076 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_is_err [2022-02-20 22:54:19,076 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-02-20 22:54:19,076 INFO L130 BoogieDeclarations]: Found specification of procedure iounmap [2022-02-20 22:54:19,076 INFO L138 BoogieDeclarations]: Found implementation of procedure iounmap [2022-02-20 22:54:19,077 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_spin_unlock_happy_lock_of_happy_meal [2022-02-20 22:54:19,077 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_spin_unlock_happy_lock_of_happy_meal [2022-02-20 22:54:19,077 INFO L130 BoogieDeclarations]: Found specification of procedure netdev_get_tx_queue [2022-02-20 22:54:19,077 INFO L138 BoogieDeclarations]: Found implementation of procedure netdev_get_tx_queue [2022-02-20 22:54:19,077 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~int [2022-02-20 22:54:19,077 INFO L130 BoogieDeclarations]: Found specification of procedure get_dma_ops [2022-02-20 22:54:19,077 INFO L138 BoogieDeclarations]: Found implementation of procedure get_dma_ops [2022-02-20 22:54:19,077 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2022-02-20 22:54:19,077 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_assume [2022-02-20 22:54:19,078 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_assume [2022-02-20 22:54:19,078 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-02-20 22:54:19,078 INFO L130 BoogieDeclarations]: Found specification of procedure __phys_addr [2022-02-20 22:54:19,078 INFO L138 BoogieDeclarations]: Found implementation of procedure __phys_addr [2022-02-20 22:54:19,078 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_after_alloc [2022-02-20 22:54:19,078 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_after_alloc [2022-02-20 22:54:19,078 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_switch_to_interrupt_context [2022-02-20 22:54:19,078 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_switch_to_interrupt_context [2022-02-20 22:54:19,078 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_set_drvdata [2022-02-20 22:54:19,079 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_set_drvdata [2022-02-20 22:54:19,079 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_filter_err_code [2022-02-20 22:54:19,079 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_filter_err_code [2022-02-20 22:54:19,079 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_alloc_flags [2022-02-20 22:54:19,079 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_check_alloc_flags [2022-02-20 22:54:19,079 INFO L130 BoogieDeclarations]: Found specification of procedure set_happy_link_modes [2022-02-20 22:54:19,079 INFO L138 BoogieDeclarations]: Found implementation of procedure set_happy_link_modes [2022-02-20 22:54:19,079 INFO L130 BoogieDeclarations]: Found specification of procedure happy_meal_tcvr_reset [2022-02-20 22:54:19,080 INFO L138 BoogieDeclarations]: Found implementation of procedure happy_meal_tcvr_reset [2022-02-20 22:54:19,080 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-02-20 22:54:19,080 INFO L130 BoogieDeclarations]: Found specification of procedure happy_meal_tx_timeout [2022-02-20 22:54:19,080 INFO L138 BoogieDeclarations]: Found implementation of procedure happy_meal_tx_timeout [2022-02-20 22:54:19,080 INFO L130 BoogieDeclarations]: Found specification of procedure dma_map_single_attrs [2022-02-20 22:54:19,080 INFO L138 BoogieDeclarations]: Found implementation of procedure dma_map_single_attrs [2022-02-20 22:54:19,080 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-02-20 22:54:19,080 INFO L130 BoogieDeclarations]: Found specification of procedure happy_meal_tcvr_read [2022-02-20 22:54:19,080 INFO L138 BoogieDeclarations]: Found implementation of procedure happy_meal_tcvr_read [2022-02-20 22:54:19,081 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_undef_int [2022-02-20 22:54:19,081 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_undef_int [2022-02-20 22:54:19,081 INFO L130 BoogieDeclarations]: Found specification of procedure __const_udelay [2022-02-20 22:54:19,081 INFO L138 BoogieDeclarations]: Found implementation of procedure __const_udelay [2022-02-20 22:54:19,081 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-02-20 22:54:19,081 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2022-02-20 22:54:19,081 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2022-02-20 22:54:19,081 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~int [2022-02-20 22:54:19,081 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~int [2022-02-20 22:54:19,082 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_exclusive_spin_is_locked [2022-02-20 22:54:19,082 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_exclusive_spin_is_locked [2022-02-20 22:54:19,082 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_assert [2022-02-20 22:54:19,082 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_assert [2022-02-20 22:54:19,082 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~~dma_addr_t~0~X~int~X~int~TO~VOID [2022-02-20 22:54:19,082 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~~dma_addr_t~0~X~int~X~int~TO~VOID [2022-02-20 22:54:19,082 INFO L130 BoogieDeclarations]: Found specification of procedure debug_dma_map_page [2022-02-20 22:54:19,082 INFO L138 BoogieDeclarations]: Found implementation of procedure debug_dma_map_page [2022-02-20 22:54:19,083 INFO L130 BoogieDeclarations]: Found specification of procedure warn_slowpath_null [2022-02-20 22:54:19,083 INFO L138 BoogieDeclarations]: Found implementation of procedure warn_slowpath_null [2022-02-20 22:54:19,083 INFO L130 BoogieDeclarations]: Found specification of procedure skb_put [2022-02-20 22:54:19,083 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_put [2022-02-20 22:54:19,083 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_free_netdev [2022-02-20 22:54:19,083 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_free_netdev [2022-02-20 22:54:19,083 INFO L130 BoogieDeclarations]: Found specification of procedure writel [2022-02-20 22:54:19,084 INFO L138 BoogieDeclarations]: Found implementation of procedure writel [2022-02-20 22:54:19,084 INFO L130 BoogieDeclarations]: Found specification of procedure is_lucent_phy [2022-02-20 22:54:19,084 INFO L138 BoogieDeclarations]: Found implementation of procedure is_lucent_phy [2022-02-20 22:54:19,084 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-02-20 22:54:19,084 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-02-20 22:54:19,084 INFO L130 BoogieDeclarations]: Found specification of procedure hme_read_desc32 [2022-02-20 22:54:19,084 INFO L138 BoogieDeclarations]: Found implementation of procedure hme_read_desc32 [2022-02-20 22:54:19,084 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_strcpy [2022-02-20 22:54:19,085 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_strcpy [2022-02-20 22:54:19,085 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2022-02-20 22:54:19,085 INFO L130 BoogieDeclarations]: Found specification of procedure happy_meal_clean_rings [2022-02-20 22:54:19,085 INFO L138 BoogieDeclarations]: Found implementation of procedure happy_meal_clean_rings [2022-02-20 22:54:19,085 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2022-02-20 22:54:19,085 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_stop [2022-02-20 22:54:19,085 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_stop [2022-02-20 22:54:19,085 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0 [2022-02-20 22:54:19,086 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0 [2022-02-20 22:54:19,086 INFO L130 BoogieDeclarations]: Found specification of procedure kmemcheck_mark_initialized [2022-02-20 22:54:19,086 INFO L138 BoogieDeclarations]: Found implementation of procedure kmemcheck_mark_initialized [2022-02-20 22:54:19,086 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_switch_to_process_context [2022-02-20 22:54:19,086 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_switch_to_process_context [2022-02-20 22:54:19,086 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2022-02-20 22:54:19,086 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2022-02-20 22:54:19,086 INFO L130 BoogieDeclarations]: Found specification of procedure netif_stop_queue [2022-02-20 22:54:19,087 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_stop_queue [2022-02-20 22:54:19,087 INFO L130 BoogieDeclarations]: Found specification of procedure del_timer [2022-02-20 22:54:19,087 INFO L138 BoogieDeclarations]: Found implementation of procedure del_timer [2022-02-20 22:54:19,087 INFO L130 BoogieDeclarations]: Found specification of procedure debug_dma_unmap_page [2022-02-20 22:54:19,087 INFO L138 BoogieDeclarations]: Found implementation of procedure debug_dma_unmap_page [2022-02-20 22:54:19,087 INFO L130 BoogieDeclarations]: Found specification of procedure dma_unmap_single_attrs [2022-02-20 22:54:19,087 INFO L138 BoogieDeclarations]: Found implementation of procedure dma_unmap_single_attrs [2022-02-20 22:54:19,087 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-02-20 22:54:19,087 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-02-20 22:54:19,088 INFO L130 BoogieDeclarations]: Found specification of procedure add_timer [2022-02-20 22:54:19,088 INFO L138 BoogieDeclarations]: Found implementation of procedure add_timer [2022-02-20 22:54:19,088 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_spin_lock_irq_86 [2022-02-20 22:54:19,088 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_spin_lock_irq_86 [2022-02-20 22:54:19,088 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2022-02-20 22:54:19,088 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~~structbegin~int~structend~~TO~int [2022-02-20 22:54:19,088 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~~structbegin~int~structend~~TO~int [2022-02-20 22:54:19,088 INFO L130 BoogieDeclarations]: Found specification of procedure happy_meal_stop [2022-02-20 22:54:19,089 INFO L138 BoogieDeclarations]: Found implementation of procedure happy_meal_stop [2022-02-20 22:54:19,089 INFO L130 BoogieDeclarations]: Found specification of procedure netdev_priv [2022-02-20 22:54:19,089 INFO L138 BoogieDeclarations]: Found implementation of procedure netdev_priv [2022-02-20 22:54:19,089 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_filter_positive_int [2022-02-20 22:54:19,089 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_filter_positive_int [2022-02-20 22:54:19,089 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_free_irq [2022-02-20 22:54:19,089 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_free_irq [2022-02-20 22:54:19,089 INFO L130 BoogieDeclarations]: Found specification of procedure happy_meal_pci_remove [2022-02-20 22:54:19,089 INFO L138 BoogieDeclarations]: Found implementation of procedure happy_meal_pci_remove [2022-02-20 22:54:19,090 INFO L130 BoogieDeclarations]: Found specification of procedure happy_meal_init [2022-02-20 22:54:19,090 INFO L138 BoogieDeclarations]: Found implementation of procedure happy_meal_init [2022-02-20 22:54:19,090 INFO L130 BoogieDeclarations]: Found specification of procedure skb_reserve [2022-02-20 22:54:19,090 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_reserve [2022-02-20 22:54:19,090 INFO L130 BoogieDeclarations]: Found specification of procedure free_netdev [2022-02-20 22:54:19,090 INFO L138 BoogieDeclarations]: Found implementation of procedure free_netdev [2022-02-20 22:54:19,090 INFO L130 BoogieDeclarations]: Found specification of procedure happy_meal_tcvr_write [2022-02-20 22:54:19,090 INFO L138 BoogieDeclarations]: Found implementation of procedure happy_meal_tcvr_write [2022-02-20 22:54:19,090 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-02-20 22:54:19,091 INFO L130 BoogieDeclarations]: Found specification of procedure ldv__builtin_expect [2022-02-20 22:54:19,091 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv__builtin_expect [2022-02-20 22:54:19,091 INFO L130 BoogieDeclarations]: Found specification of procedure dev_kfree_skb_any [2022-02-20 22:54:19,091 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_kfree_skb_any [2022-02-20 22:54:19,091 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_free [2022-02-20 22:54:19,091 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_free [2022-02-20 22:54:19,091 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~~dma_addr_t~0~X~int~X~int~X~$Pointer$~TO~VOID [2022-02-20 22:54:19,091 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~~dma_addr_t~0~X~int~X~int~X~$Pointer$~TO~VOID [2022-02-20 22:54:19,091 INFO L130 BoogieDeclarations]: Found specification of procedure ethtool_cmd_speed [2022-02-20 22:54:19,092 INFO L138 BoogieDeclarations]: Found implementation of procedure ethtool_cmd_speed [2022-02-20 22:54:19,092 INFO L130 BoogieDeclarations]: Found specification of procedure readl [2022-02-20 22:54:19,092 INFO L138 BoogieDeclarations]: Found implementation of procedure readl [2022-02-20 22:54:19,092 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-02-20 22:54:19,092 INFO L130 BoogieDeclarations]: Found specification of procedure dma_unmap_page [2022-02-20 22:54:19,092 INFO L138 BoogieDeclarations]: Found implementation of procedure dma_unmap_page [2022-02-20 22:54:19,092 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_final_state [2022-02-20 22:54:19,092 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_check_final_state [2022-02-20 22:54:19,093 INFO L130 BoogieDeclarations]: Found specification of procedure readb [2022-02-20 22:54:19,093 INFO L138 BoogieDeclarations]: Found implementation of procedure readb [2022-02-20 22:54:19,093 INFO L130 BoogieDeclarations]: Found specification of procedure happy_meal_transceiver_check [2022-02-20 22:54:19,093 INFO L138 BoogieDeclarations]: Found implementation of procedure happy_meal_transceiver_check [2022-02-20 22:54:19,702 INFO L234 CfgBuilder]: Building ICFG [2022-02-20 22:54:19,704 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-02-20 22:54:20,258 INFO L766 $ProcedureCfgBuilder]: dead code at ProgramPoint ldv_stopFINAL: assume true; [2022-02-20 22:54:24,830 INFO L275 CfgBuilder]: Performing block encoding [2022-02-20 22:54:24,844 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-02-20 22:54:24,844 INFO L299 CfgBuilder]: Removed 1 assume(true) statements. [2022-02-20 22:54:24,846 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 10:54:24 BoogieIcfgContainer [2022-02-20 22:54:24,846 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-02-20 22:54:24,847 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-02-20 22:54:24,847 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-02-20 22:54:24,849 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-02-20 22:54:24,849 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 20.02 10:54:16" (1/3) ... [2022-02-20 22:54:24,850 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@18a31aaa and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.02 10:54:24, skipping insertion in model container [2022-02-20 22:54:24,850 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:54:18" (2/3) ... [2022-02-20 22:54:24,850 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@18a31aaa and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.02 10:54:24, skipping insertion in model container [2022-02-20 22:54:24,850 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 10:54:24" (3/3) ... [2022-02-20 22:54:24,851 INFO L111 eAbstractionObserver]: Analyzing ICFG linux-3.14_linux-alloc-spinlock_drivers-net-ethernet-sun-sunhme.cil.i [2022-02-20 22:54:24,854 INFO L205 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-02-20 22:54:24,854 INFO L164 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-02-20 22:54:24,884 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-02-20 22:54:24,888 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2022-02-20 22:54:24,888 INFO L340 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-02-20 22:54:24,939 INFO L276 IsEmpty]: Start isEmpty. Operand has 1964 states, 1342 states have (on average 1.3487332339791356) internal successors, (1810), 1389 states have internal predecessors, (1810), 533 states have call successors, (533), 88 states have call predecessors, (533), 87 states have return successors, (529), 515 states have call predecessors, (529), 529 states have call successors, (529) [2022-02-20 22:54:24,956 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2022-02-20 22:54:24,956 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:54:24,957 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 7, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:54:24,957 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ldv_check_alloc_flagsErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_check_alloc_flagsErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:54:24,962 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:54:24,962 INFO L85 PathProgramCache]: Analyzing trace with hash -1416901098, now seen corresponding path program 1 times [2022-02-20 22:54:24,968 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:54:24,968 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1046263877] [2022-02-20 22:54:24,969 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:54:24,969 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:54:25,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:54:25,360 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 5 [2022-02-20 22:54:25,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:54:25,371 INFO L290 TraceCheckUtils]: 0: Hoare triple {1967#true} havoc ~tmp~111;assume -2147483648 <= #t~nondet1100 && #t~nondet1100 <= 2147483647;~tmp~111 := #t~nondet1100;havoc #t~nondet1100;#res := ~tmp~111; {1967#true} is VALID [2022-02-20 22:54:25,371 INFO L290 TraceCheckUtils]: 1: Hoare triple {1967#true} assume true; {1967#true} is VALID [2022-02-20 22:54:25,372 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1967#true} {1967#true} #4937#return; {1967#true} is VALID [2022-02-20 22:54:25,372 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 11 [2022-02-20 22:54:25,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:54:25,385 INFO L290 TraceCheckUtils]: 0: Hoare triple {1967#true} ~expression := #in~expression; {1967#true} is VALID [2022-02-20 22:54:25,385 INFO L290 TraceCheckUtils]: 1: Hoare triple {1967#true} assume !(0 == ~expression); {1967#true} is VALID [2022-02-20 22:54:25,385 INFO L290 TraceCheckUtils]: 2: Hoare triple {1967#true} assume true; {1967#true} is VALID [2022-02-20 22:54:25,385 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1967#true} {1967#true} #4939#return; {1967#true} is VALID [2022-02-20 22:54:25,389 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 17 [2022-02-20 22:54:25,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:54:25,400 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:54:25,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:54:25,405 INFO L290 TraceCheckUtils]: 0: Hoare triple {1967#true} ~expression := #in~expression; {1967#true} is VALID [2022-02-20 22:54:25,405 INFO L290 TraceCheckUtils]: 1: Hoare triple {1967#true} assume !(0 == ~expression); {1967#true} is VALID [2022-02-20 22:54:25,405 INFO L290 TraceCheckUtils]: 2: Hoare triple {1967#true} assume true; {1967#true} is VALID [2022-02-20 22:54:25,405 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1967#true} {1967#true} #4875#return; {1967#true} is VALID [2022-02-20 22:54:25,405 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:54:25,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:54:25,410 INFO L290 TraceCheckUtils]: 0: Hoare triple {1967#true} ~ptr.base, ~ptr.offset := #in~ptr.base, #in~ptr.offset;#res := (if (~ptr.base + ~ptr.offset) % 18446744073709551616 > 4294967295 then 1 else 0); {1967#true} is VALID [2022-02-20 22:54:25,411 INFO L290 TraceCheckUtils]: 1: Hoare triple {1967#true} assume true; {1967#true} is VALID [2022-02-20 22:54:25,411 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1967#true} {1967#true} #4877#return; {1967#true} is VALID [2022-02-20 22:54:25,411 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 11 [2022-02-20 22:54:25,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:54:25,415 INFO L290 TraceCheckUtils]: 0: Hoare triple {1967#true} ~expression := #in~expression; {1967#true} is VALID [2022-02-20 22:54:25,415 INFO L290 TraceCheckUtils]: 1: Hoare triple {1967#true} assume !(0 == ~expression); {1967#true} is VALID [2022-02-20 22:54:25,416 INFO L290 TraceCheckUtils]: 2: Hoare triple {1967#true} assume true; {1967#true} is VALID [2022-02-20 22:54:25,416 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1967#true} {1967#true} #4879#return; {1967#true} is VALID [2022-02-20 22:54:25,416 INFO L290 TraceCheckUtils]: 0: Hoare triple {2048#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~5.base, ~res~5.offset;havoc ~tmp~109.base, ~tmp~109.offset;havoc ~tmp___0~53;call #t~malloc1096.base, #t~malloc1096.offset := #Ultimate.allocOnHeap(~size);~tmp~109.base, ~tmp~109.offset := #t~malloc1096.base, #t~malloc1096.offset;havoc #t~malloc1096.base, #t~malloc1096.offset;~res~5.base, ~res~5.offset := ~tmp~109.base, ~tmp~109.offset; {1967#true} is VALID [2022-02-20 22:54:25,416 INFO L272 TraceCheckUtils]: 1: Hoare triple {1967#true} call ldv_assume((if 0 != (~res~5.base + ~res~5.offset) % 18446744073709551616 then 1 else 0)); {1967#true} is VALID [2022-02-20 22:54:25,416 INFO L290 TraceCheckUtils]: 2: Hoare triple {1967#true} ~expression := #in~expression; {1967#true} is VALID [2022-02-20 22:54:25,417 INFO L290 TraceCheckUtils]: 3: Hoare triple {1967#true} assume !(0 == ~expression); {1967#true} is VALID [2022-02-20 22:54:25,417 INFO L290 TraceCheckUtils]: 4: Hoare triple {1967#true} assume true; {1967#true} is VALID [2022-02-20 22:54:25,417 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {1967#true} {1967#true} #4875#return; {1967#true} is VALID [2022-02-20 22:54:25,417 INFO L272 TraceCheckUtils]: 6: Hoare triple {1967#true} call #t~ret1097 := ldv_is_err(~res~5.base, ~res~5.offset); {1967#true} is VALID [2022-02-20 22:54:25,417 INFO L290 TraceCheckUtils]: 7: Hoare triple {1967#true} ~ptr.base, ~ptr.offset := #in~ptr.base, #in~ptr.offset;#res := (if (~ptr.base + ~ptr.offset) % 18446744073709551616 > 4294967295 then 1 else 0); {1967#true} is VALID [2022-02-20 22:54:25,417 INFO L290 TraceCheckUtils]: 8: Hoare triple {1967#true} assume true; {1967#true} is VALID [2022-02-20 22:54:25,418 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {1967#true} {1967#true} #4877#return; {1967#true} is VALID [2022-02-20 22:54:25,418 INFO L290 TraceCheckUtils]: 10: Hoare triple {1967#true} assume -9223372036854775808 <= #t~ret1097 && #t~ret1097 <= 9223372036854775807;~tmp___0~53 := #t~ret1097;havoc #t~ret1097; {1967#true} is VALID [2022-02-20 22:54:25,418 INFO L272 TraceCheckUtils]: 11: Hoare triple {1967#true} call ldv_assume((if 0 == ~tmp___0~53 then 1 else 0)); {1967#true} is VALID [2022-02-20 22:54:25,418 INFO L290 TraceCheckUtils]: 12: Hoare triple {1967#true} ~expression := #in~expression; {1967#true} is VALID [2022-02-20 22:54:25,418 INFO L290 TraceCheckUtils]: 13: Hoare triple {1967#true} assume !(0 == ~expression); {1967#true} is VALID [2022-02-20 22:54:25,418 INFO L290 TraceCheckUtils]: 14: Hoare triple {1967#true} assume true; {1967#true} is VALID [2022-02-20 22:54:25,419 INFO L284 TraceCheckUtils]: 15: Hoare quadruple {1967#true} {1967#true} #4879#return; {1967#true} is VALID [2022-02-20 22:54:25,419 INFO L290 TraceCheckUtils]: 16: Hoare triple {1967#true} #res.base, #res.offset := ~res~5.base, ~res~5.offset; {1967#true} is VALID [2022-02-20 22:54:25,419 INFO L290 TraceCheckUtils]: 17: Hoare triple {1967#true} assume true; {1967#true} is VALID [2022-02-20 22:54:25,419 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {1967#true} {1967#true} #4941#return; {1967#true} is VALID [2022-02-20 22:54:25,419 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 39 [2022-02-20 22:54:25,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:54:25,429 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:54:25,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:54:25,434 INFO L290 TraceCheckUtils]: 0: Hoare triple {1967#true} ~expression := #in~expression; {1967#true} is VALID [2022-02-20 22:54:25,434 INFO L290 TraceCheckUtils]: 1: Hoare triple {1967#true} assume !(0 == ~expression); {1967#true} is VALID [2022-02-20 22:54:25,434 INFO L290 TraceCheckUtils]: 2: Hoare triple {1967#true} assume true; {1967#true} is VALID [2022-02-20 22:54:25,434 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1967#true} {1967#true} #4875#return; {1967#true} is VALID [2022-02-20 22:54:25,434 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:54:25,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:54:25,440 INFO L290 TraceCheckUtils]: 0: Hoare triple {1967#true} ~ptr.base, ~ptr.offset := #in~ptr.base, #in~ptr.offset;#res := (if (~ptr.base + ~ptr.offset) % 18446744073709551616 > 4294967295 then 1 else 0); {1967#true} is VALID [2022-02-20 22:54:25,440 INFO L290 TraceCheckUtils]: 1: Hoare triple {1967#true} assume true; {1967#true} is VALID [2022-02-20 22:54:25,441 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1967#true} {1967#true} #4877#return; {1967#true} is VALID [2022-02-20 22:54:25,441 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 11 [2022-02-20 22:54:25,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:54:25,445 INFO L290 TraceCheckUtils]: 0: Hoare triple {1967#true} ~expression := #in~expression; {1967#true} is VALID [2022-02-20 22:54:25,445 INFO L290 TraceCheckUtils]: 1: Hoare triple {1967#true} assume !(0 == ~expression); {1967#true} is VALID [2022-02-20 22:54:25,445 INFO L290 TraceCheckUtils]: 2: Hoare triple {1967#true} assume true; {1967#true} is VALID [2022-02-20 22:54:25,445 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1967#true} {1967#true} #4879#return; {1967#true} is VALID [2022-02-20 22:54:25,446 INFO L290 TraceCheckUtils]: 0: Hoare triple {2048#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~5.base, ~res~5.offset;havoc ~tmp~109.base, ~tmp~109.offset;havoc ~tmp___0~53;call #t~malloc1096.base, #t~malloc1096.offset := #Ultimate.allocOnHeap(~size);~tmp~109.base, ~tmp~109.offset := #t~malloc1096.base, #t~malloc1096.offset;havoc #t~malloc1096.base, #t~malloc1096.offset;~res~5.base, ~res~5.offset := ~tmp~109.base, ~tmp~109.offset; {1967#true} is VALID [2022-02-20 22:54:25,446 INFO L272 TraceCheckUtils]: 1: Hoare triple {1967#true} call ldv_assume((if 0 != (~res~5.base + ~res~5.offset) % 18446744073709551616 then 1 else 0)); {1967#true} is VALID [2022-02-20 22:54:25,446 INFO L290 TraceCheckUtils]: 2: Hoare triple {1967#true} ~expression := #in~expression; {1967#true} is VALID [2022-02-20 22:54:25,446 INFO L290 TraceCheckUtils]: 3: Hoare triple {1967#true} assume !(0 == ~expression); {1967#true} is VALID [2022-02-20 22:54:25,446 INFO L290 TraceCheckUtils]: 4: Hoare triple {1967#true} assume true; {1967#true} is VALID [2022-02-20 22:54:25,447 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {1967#true} {1967#true} #4875#return; {1967#true} is VALID [2022-02-20 22:54:25,447 INFO L272 TraceCheckUtils]: 6: Hoare triple {1967#true} call #t~ret1097 := ldv_is_err(~res~5.base, ~res~5.offset); {1967#true} is VALID [2022-02-20 22:54:25,447 INFO L290 TraceCheckUtils]: 7: Hoare triple {1967#true} ~ptr.base, ~ptr.offset := #in~ptr.base, #in~ptr.offset;#res := (if (~ptr.base + ~ptr.offset) % 18446744073709551616 > 4294967295 then 1 else 0); {1967#true} is VALID [2022-02-20 22:54:25,447 INFO L290 TraceCheckUtils]: 8: Hoare triple {1967#true} assume true; {1967#true} is VALID [2022-02-20 22:54:25,447 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {1967#true} {1967#true} #4877#return; {1967#true} is VALID [2022-02-20 22:54:25,447 INFO L290 TraceCheckUtils]: 10: Hoare triple {1967#true} assume -9223372036854775808 <= #t~ret1097 && #t~ret1097 <= 9223372036854775807;~tmp___0~53 := #t~ret1097;havoc #t~ret1097; {1967#true} is VALID [2022-02-20 22:54:25,448 INFO L272 TraceCheckUtils]: 11: Hoare triple {1967#true} call ldv_assume((if 0 == ~tmp___0~53 then 1 else 0)); {1967#true} is VALID [2022-02-20 22:54:25,448 INFO L290 TraceCheckUtils]: 12: Hoare triple {1967#true} ~expression := #in~expression; {1967#true} is VALID [2022-02-20 22:54:25,448 INFO L290 TraceCheckUtils]: 13: Hoare triple {1967#true} assume !(0 == ~expression); {1967#true} is VALID [2022-02-20 22:54:25,448 INFO L290 TraceCheckUtils]: 14: Hoare triple {1967#true} assume true; {1967#true} is VALID [2022-02-20 22:54:25,448 INFO L284 TraceCheckUtils]: 15: Hoare quadruple {1967#true} {1967#true} #4879#return; {1967#true} is VALID [2022-02-20 22:54:25,448 INFO L290 TraceCheckUtils]: 16: Hoare triple {1967#true} #res.base, #res.offset := ~res~5.base, ~res~5.offset; {1967#true} is VALID [2022-02-20 22:54:25,449 INFO L290 TraceCheckUtils]: 17: Hoare triple {1967#true} assume true; {1967#true} is VALID [2022-02-20 22:54:25,449 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {1967#true} {1967#true} #4945#return; {1967#true} is VALID [2022-02-20 22:54:25,449 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2022-02-20 22:54:25,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:54:25,459 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:54:25,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:54:25,465 INFO L290 TraceCheckUtils]: 0: Hoare triple {1967#true} ~expression := #in~expression; {1967#true} is VALID [2022-02-20 22:54:25,465 INFO L290 TraceCheckUtils]: 1: Hoare triple {1967#true} assume !(0 == ~expression); {1967#true} is VALID [2022-02-20 22:54:25,465 INFO L290 TraceCheckUtils]: 2: Hoare triple {1967#true} assume true; {1967#true} is VALID [2022-02-20 22:54:25,465 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1967#true} {1967#true} #4875#return; {1967#true} is VALID [2022-02-20 22:54:25,465 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:54:25,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:54:25,471 INFO L290 TraceCheckUtils]: 0: Hoare triple {1967#true} ~ptr.base, ~ptr.offset := #in~ptr.base, #in~ptr.offset;#res := (if (~ptr.base + ~ptr.offset) % 18446744073709551616 > 4294967295 then 1 else 0); {1967#true} is VALID [2022-02-20 22:54:25,471 INFO L290 TraceCheckUtils]: 1: Hoare triple {1967#true} assume true; {1967#true} is VALID [2022-02-20 22:54:25,471 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1967#true} {1967#true} #4877#return; {1967#true} is VALID [2022-02-20 22:54:25,472 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 11 [2022-02-20 22:54:25,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:54:25,476 INFO L290 TraceCheckUtils]: 0: Hoare triple {1967#true} ~expression := #in~expression; {1967#true} is VALID [2022-02-20 22:54:25,476 INFO L290 TraceCheckUtils]: 1: Hoare triple {1967#true} assume !(0 == ~expression); {1967#true} is VALID [2022-02-20 22:54:25,476 INFO L290 TraceCheckUtils]: 2: Hoare triple {1967#true} assume true; {1967#true} is VALID [2022-02-20 22:54:25,477 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1967#true} {1967#true} #4879#return; {1967#true} is VALID [2022-02-20 22:54:25,477 INFO L290 TraceCheckUtils]: 0: Hoare triple {2048#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~5.base, ~res~5.offset;havoc ~tmp~109.base, ~tmp~109.offset;havoc ~tmp___0~53;call #t~malloc1096.base, #t~malloc1096.offset := #Ultimate.allocOnHeap(~size);~tmp~109.base, ~tmp~109.offset := #t~malloc1096.base, #t~malloc1096.offset;havoc #t~malloc1096.base, #t~malloc1096.offset;~res~5.base, ~res~5.offset := ~tmp~109.base, ~tmp~109.offset; {1967#true} is VALID [2022-02-20 22:54:25,477 INFO L272 TraceCheckUtils]: 1: Hoare triple {1967#true} call ldv_assume((if 0 != (~res~5.base + ~res~5.offset) % 18446744073709551616 then 1 else 0)); {1967#true} is VALID [2022-02-20 22:54:25,477 INFO L290 TraceCheckUtils]: 2: Hoare triple {1967#true} ~expression := #in~expression; {1967#true} is VALID [2022-02-20 22:54:25,477 INFO L290 TraceCheckUtils]: 3: Hoare triple {1967#true} assume !(0 == ~expression); {1967#true} is VALID [2022-02-20 22:54:25,477 INFO L290 TraceCheckUtils]: 4: Hoare triple {1967#true} assume true; {1967#true} is VALID [2022-02-20 22:54:25,478 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {1967#true} {1967#true} #4875#return; {1967#true} is VALID [2022-02-20 22:54:25,478 INFO L272 TraceCheckUtils]: 6: Hoare triple {1967#true} call #t~ret1097 := ldv_is_err(~res~5.base, ~res~5.offset); {1967#true} is VALID [2022-02-20 22:54:25,478 INFO L290 TraceCheckUtils]: 7: Hoare triple {1967#true} ~ptr.base, ~ptr.offset := #in~ptr.base, #in~ptr.offset;#res := (if (~ptr.base + ~ptr.offset) % 18446744073709551616 > 4294967295 then 1 else 0); {1967#true} is VALID [2022-02-20 22:54:25,478 INFO L290 TraceCheckUtils]: 8: Hoare triple {1967#true} assume true; {1967#true} is VALID [2022-02-20 22:54:25,478 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {1967#true} {1967#true} #4877#return; {1967#true} is VALID [2022-02-20 22:54:25,478 INFO L290 TraceCheckUtils]: 10: Hoare triple {1967#true} assume -9223372036854775808 <= #t~ret1097 && #t~ret1097 <= 9223372036854775807;~tmp___0~53 := #t~ret1097;havoc #t~ret1097; {1967#true} is VALID [2022-02-20 22:54:25,479 INFO L272 TraceCheckUtils]: 11: Hoare triple {1967#true} call ldv_assume((if 0 == ~tmp___0~53 then 1 else 0)); {1967#true} is VALID [2022-02-20 22:54:25,479 INFO L290 TraceCheckUtils]: 12: Hoare triple {1967#true} ~expression := #in~expression; {1967#true} is VALID [2022-02-20 22:54:25,479 INFO L290 TraceCheckUtils]: 13: Hoare triple {1967#true} assume !(0 == ~expression); {1967#true} is VALID [2022-02-20 22:54:25,479 INFO L290 TraceCheckUtils]: 14: Hoare triple {1967#true} assume true; {1967#true} is VALID [2022-02-20 22:54:25,479 INFO L284 TraceCheckUtils]: 15: Hoare quadruple {1967#true} {1967#true} #4879#return; {1967#true} is VALID [2022-02-20 22:54:25,479 INFO L290 TraceCheckUtils]: 16: Hoare triple {1967#true} #res.base, #res.offset := ~res~5.base, ~res~5.offset; {1967#true} is VALID [2022-02-20 22:54:25,480 INFO L290 TraceCheckUtils]: 17: Hoare triple {1967#true} assume true; {1967#true} is VALID [2022-02-20 22:54:25,480 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {1967#true} {1967#true} #4947#return; {1967#true} is VALID [2022-02-20 22:54:25,480 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 81 [2022-02-20 22:54:25,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:54:25,485 INFO L290 TraceCheckUtils]: 0: Hoare triple {1967#true} havoc ~tmp~111;assume -2147483648 <= #t~nondet1100 && #t~nondet1100 <= 2147483647;~tmp~111 := #t~nondet1100;havoc #t~nondet1100;#res := ~tmp~111; {1967#true} is VALID [2022-02-20 22:54:25,485 INFO L290 TraceCheckUtils]: 1: Hoare triple {1967#true} assume true; {1967#true} is VALID [2022-02-20 22:54:25,485 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1967#true} {1967#true} #4949#return; {1967#true} is VALID [2022-02-20 22:54:25,485 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 88 [2022-02-20 22:54:25,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:54:25,491 INFO L290 TraceCheckUtils]: 0: Hoare triple {1967#true} ~pdev.base, ~pdev.offset := #in~pdev.base, #in~pdev.offset;havoc ~busdev~0.base, ~busdev~0.offset;havoc ~this_pdev~0.base, ~this_pdev~0.offset;havoc ~n_hmes~0;havoc ~__mptr~2.base, ~__mptr~2.offset;havoc ~__mptr___0~2.base, ~__mptr___0~2.offset;call #t~mem873.base, #t~mem873.offset := read~$Pointer$(~pdev.base, 16 + ~pdev.offset, 8);call #t~mem874.base, #t~mem874.offset := read~$Pointer$(#t~mem873.base, 56 + #t~mem873.offset, 8);~busdev~0.base, ~busdev~0.offset := #t~mem874.base, #t~mem874.offset;havoc #t~mem873.base, #t~mem873.offset;havoc #t~mem874.base, #t~mem874.offset;#t~short876 := 0 == (~busdev~0.base + ~busdev~0.offset) % 18446744073709551616; {1967#true} is VALID [2022-02-20 22:54:25,491 INFO L290 TraceCheckUtils]: 1: Hoare triple {1967#true} assume #t~short876; {1967#true} is VALID [2022-02-20 22:54:25,491 INFO L290 TraceCheckUtils]: 2: Hoare triple {1967#true} assume #t~short876;havoc #t~mem875;havoc #t~short876;#res := 0; {1967#true} is VALID [2022-02-20 22:54:25,492 INFO L290 TraceCheckUtils]: 3: Hoare triple {1967#true} assume true; {1967#true} is VALID [2022-02-20 22:54:25,492 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {1967#true} {1967#true} #4951#return; {1967#true} is VALID [2022-02-20 22:54:25,497 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 96 [2022-02-20 22:54:25,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:54:25,502 INFO L290 TraceCheckUtils]: 0: Hoare triple {2082#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~offset1215 := 0; {1967#true} is VALID [2022-02-20 22:54:25,503 INFO L290 TraceCheckUtils]: 1: Hoare triple {1967#true} assume !true; {1968#false} is VALID [2022-02-20 22:54:25,503 INFO L290 TraceCheckUtils]: 2: Hoare triple {1968#false} assume #res.base == dest.base && #res.offset == dest.offset; {1968#false} is VALID [2022-02-20 22:54:25,503 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1968#false} {1967#true} #4955#return; {1968#false} is VALID [2022-02-20 22:54:25,503 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 113 [2022-02-20 22:54:25,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:54:25,510 INFO L290 TraceCheckUtils]: 0: Hoare triple {1967#true} assume 2 == ~ldv_spin__xmit_lock_of_netdev_queue~0;#res := 1; {1967#true} is VALID [2022-02-20 22:54:25,510 INFO L290 TraceCheckUtils]: 1: Hoare triple {1967#true} assume true; {1967#true} is VALID [2022-02-20 22:54:25,510 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1967#true} {1968#false} #4613#return; {1968#false} is VALID [2022-02-20 22:54:25,512 INFO L290 TraceCheckUtils]: 0: Hoare triple {1967#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(190, 1);call #Ultimate.allocInit(26, 2);call #Ultimate.allocInit(63, 3);call #Ultimate.allocInit(50, 4);call #Ultimate.allocInit(51, 5);call #Ultimate.allocInit(23, 6);call #Ultimate.allocInit(10, 7);call #Ultimate.allocInit(10, 8);call #Ultimate.allocInit(16, 9);call #Ultimate.allocInit(23, 10);call #Ultimate.allocInit(23, 11);call #Ultimate.allocInit(22, 12);call #Ultimate.allocInit(22, 13);call #Ultimate.allocInit(36, 14);call #Ultimate.allocInit(10, 15);call #Ultimate.allocInit(10, 16);call #Ultimate.allocInit(16, 17);call #Ultimate.allocInit(10, 18);call #Ultimate.allocInit(9, 19);call #Ultimate.allocInit(14, 20);call #Ultimate.allocInit(14, 21);call #Ultimate.allocInit(60, 22);call #Ultimate.allocInit(65, 23);call #Ultimate.allocInit(32, 24);call #Ultimate.allocInit(44, 25);call #Ultimate.allocInit(58, 26);call #Ultimate.allocInit(40, 27);call #Ultimate.allocInit(37, 28);call #Ultimate.allocInit(23, 29);call #Ultimate.allocInit(44, 30);call #Ultimate.allocInit(62, 31);call #Ultimate.allocInit(39, 32);call #Ultimate.allocInit(59, 33);call #Ultimate.allocInit(52, 34);call #Ultimate.allocInit(52, 35);call #Ultimate.allocInit(40, 36);call #Ultimate.allocInit(41, 37);call #Ultimate.allocInit(55, 38);call #Ultimate.allocInit(40, 39);call #Ultimate.allocInit(61, 40);call #Ultimate.allocInit(33, 41);call #Ultimate.allocInit(14, 42);call #Ultimate.allocInit(13, 43);call #Ultimate.allocInit(12, 44);call #Ultimate.allocInit(3, 45);call write~init~int(93, 45, 0, 1);call write~init~int(10, 45, 1, 1);call write~init~int(0, 45, 2, 1);call #Ultimate.allocInit(53, 46);call #Ultimate.allocInit(32, 47);call #Ultimate.allocInit(33, 48);call #Ultimate.allocInit(14, 49);call #Ultimate.allocInit(11, 50);call #Ultimate.allocInit(12, 51);call #Ultimate.allocInit(10, 52);call #Ultimate.allocInit(3, 53);call write~init~int(93, 53, 0, 1);call write~init~int(10, 53, 1, 1);call write~init~int(0, 53, 2, 1);call #Ultimate.allocInit(56, 54);call #Ultimate.allocInit(7, 55);call write~init~int(112, 55, 0, 1);call write~init~int(97, 55, 1, 1);call write~init~int(114, 55, 2, 1);call write~init~int(105, 55, 3, 1);call write~init~int(116, 55, 4, 1);call write~init~int(121, 55, 5, 1);call write~init~int(0, 55, 6, 1);call #Ultimate.allocInit(8, 56);call #Ultimate.allocInit(19, 57);call #Ultimate.allocInit(26, 58);call #Ultimate.allocInit(42, 59);call #Ultimate.allocInit(42, 60);call #Ultimate.allocInit(41, 61);call #Ultimate.allocInit(34, 62);call #Ultimate.allocInit(40, 63);call #Ultimate.allocInit(46, 64);call #Ultimate.allocInit(36, 65);call #Ultimate.allocInit(38, 66);call #Ultimate.allocInit(42, 67);call #Ultimate.allocInit(7, 68);call write~init~int(115, 68, 0, 1);call write~init~int(117, 68, 1, 1);call write~init~int(110, 68, 2, 1);call write~init~int(104, 68, 3, 1);call write~init~int(109, 68, 4, 1);call write~init~int(101, 68, 5, 1);call write~init~int(0, 68, 6, 1);call #Ultimate.allocInit(5, 69);call write~init~int(50, 69, 0, 1);call write~init~int(46, 69, 1, 1);call write~init~int(48, 69, 2, 1);call write~init~int(50, 69, 3, 1);call write~init~int(0, 69, 4, 1);call #Ultimate.allocInit(9, 70);call #Ultimate.allocInit(9, 71);call #Ultimate.allocInit(9, 72);call #Ultimate.allocInit(4, 73);call write~init~int(113, 73, 0, 1);call write~init~int(102, 73, 1, 1);call write~init~int(101, 73, 2, 1);call write~init~int(0, 73, 3, 1);call #Ultimate.allocInit(4, 74);call write~init~int(14, 74, 0, 1);call write~init~int(37, 74, 1, 1);call write~init~int(115, 74, 2, 1);call write~init~int(0, 74, 3, 1);call #Ultimate.allocInit(26, 75);call #Ultimate.allocInit(62, 76);call #Ultimate.allocInit(7, 77);call write~init~int(115, 77, 0, 1);call write~init~int(117, 77, 1, 1);call write~init~int(110, 77, 2, 1);call write~init~int(104, 77, 3, 1);call write~init~int(109, 77, 4, 1);call write~init~int(101, 77, 5, 1);call write~init~int(0, 77, 6, 1);call #Ultimate.allocInit(57, 78);call #Ultimate.allocInit(47, 79);call #Ultimate.allocInit(19, 80);call #Ultimate.allocInit(56, 81);call #Ultimate.allocInit(4, 82);call write~init~int(101, 82, 0, 1);call write~init~int(116, 82, 1, 1);call write~init~int(104, 82, 2, 1);call write~init~int(0, 82, 3, 1);call #Ultimate.allocInit(4, 83);call write~init~int(45, 83, 0, 1);call write~init~int(37, 83, 1, 1);call write~init~int(100, 83, 2, 1);call write~init~int(0, 83, 3, 1);call #Ultimate.allocInit(55, 84);call #Ultimate.allocInit(22, 85);call #Ultimate.allocInit(26, 86);call #Ultimate.allocInit(61, 87);call #Ultimate.allocInit(52, 88);call #Ultimate.allocInit(5, 89);call write~init~int(37, 89, 0, 1);call write~init~int(112, 89, 1, 1);call write~init~int(77, 89, 2, 1);call write~init~int(10, 89, 3, 1);call write~init~int(0, 89, 4, 1);call #Ultimate.allocInit(4, 90);call write~init~int(104, 90, 0, 1);call write~init~int(109, 90, 1, 1);call write~init~int(101, 90, 2, 1);call write~init~int(0, 90, 3, 1);call #Ultimate.allocInit(7, 91);call write~init~int(115, 91, 0, 1);call write~init~int(117, 91, 1, 1);call write~init~int(110, 91, 2, 1);call write~init~int(104, 91, 3, 1);call write~init~int(109, 91, 4, 1);call write~init~int(101, 91, 5, 1);call write~init~int(0, 91, 6, 1);call #Ultimate.allocInit(1, 92);call write~init~int(0, 92, 0, 1);call #Ultimate.allocInit(54, 93);call #Ultimate.allocInit(56, 94);call #Ultimate.allocInit(58, 95);call #Ultimate.allocInit(58, 96);call #Ultimate.allocInit(58, 97);call #Ultimate.allocInit(54, 98);call #Ultimate.allocInit(56, 99);call #Ultimate.allocInit(58, 100);call #Ultimate.allocInit(58, 101);call #Ultimate.allocInit(58, 102);call #Ultimate.allocInit(54, 103);call #Ultimate.allocInit(56, 104);call #Ultimate.allocInit(58, 105);call #Ultimate.allocInit(58, 106);call #Ultimate.allocInit(58, 107);call #Ultimate.allocInit(54, 108);call #Ultimate.allocInit(56, 109);call #Ultimate.allocInit(58, 110);call #Ultimate.allocInit(58, 111);call #Ultimate.allocInit(58, 112);call #Ultimate.allocInit(54, 113);call #Ultimate.allocInit(56, 114);call #Ultimate.allocInit(58, 115);call #Ultimate.allocInit(58, 116);call #Ultimate.allocInit(58, 117);call #Ultimate.allocInit(54, 118);call #Ultimate.allocInit(56, 119);call #Ultimate.allocInit(58, 120);call #Ultimate.allocInit(58, 121);call #Ultimate.allocInit(58, 122);call #Ultimate.allocInit(54, 123);call #Ultimate.allocInit(56, 124);call #Ultimate.allocInit(58, 125);call #Ultimate.allocInit(58, 126);call #Ultimate.allocInit(58, 127);call #Ultimate.allocInit(54, 128);call #Ultimate.allocInit(56, 129);call #Ultimate.allocInit(58, 130);call #Ultimate.allocInit(58, 131);call #Ultimate.allocInit(58, 132);call #Ultimate.allocInit(54, 133);call #Ultimate.allocInit(56, 134);call #Ultimate.allocInit(58, 135);call #Ultimate.allocInit(58, 136);call #Ultimate.allocInit(58, 137);call #Ultimate.allocInit(54, 138);call #Ultimate.allocInit(56, 139);call #Ultimate.allocInit(58, 140);call #Ultimate.allocInit(58, 141);call #Ultimate.allocInit(58, 142);call #Ultimate.allocInit(54, 143);call #Ultimate.allocInit(56, 144);call #Ultimate.allocInit(58, 145);call #Ultimate.allocInit(58, 146);call #Ultimate.allocInit(58, 147);call #Ultimate.allocInit(54, 148);call #Ultimate.allocInit(56, 149);call #Ultimate.allocInit(58, 150);call #Ultimate.allocInit(58, 151);call #Ultimate.allocInit(58, 152);call #Ultimate.allocInit(54, 153);call #Ultimate.allocInit(56, 154);call #Ultimate.allocInit(58, 155);call #Ultimate.allocInit(58, 156);call #Ultimate.allocInit(58, 157);call #Ultimate.allocInit(57, 158);call #Ultimate.allocInit(57, 159);call #Ultimate.allocInit(57, 160);call #Ultimate.allocInit(57, 161);call #Ultimate.allocInit(57, 162);call #Ultimate.allocInit(57, 163);call #Ultimate.allocInit(57, 164);call #Ultimate.allocInit(57, 165);call #Ultimate.allocInit(57, 166);call #Ultimate.allocInit(57, 167);call #Ultimate.allocInit(57, 168);call #Ultimate.allocInit(57, 169);call #Ultimate.allocInit(57, 170);call #Ultimate.allocInit(2, 171);call write~init~int(48, 171, 0, 1);call write~init~int(0, 171, 1, 1);call #Ultimate.allocInit(70, 172);~#version~0.base, ~#version~0.offset := 173, 0;call #Ultimate.allocInit(70, 173);call write~init~int(115, ~#version~0.base, ~#version~0.offset, 1);call write~init~int(117, ~#version~0.base, 1 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 2 + ~#version~0.offset, 1);call write~init~int(104, ~#version~0.base, 3 + ~#version~0.offset, 1);call write~init~int(109, ~#version~0.base, 4 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 5 + ~#version~0.offset, 1);call write~init~int(46, ~#version~0.base, 6 + ~#version~0.offset, 1);call write~init~int(99, ~#version~0.base, 7 + ~#version~0.offset, 1);call write~init~int(58, ~#version~0.base, 8 + ~#version~0.offset, 1);call write~init~int(118, ~#version~0.base, 9 + ~#version~0.offset, 1);call write~init~int(51, ~#version~0.base, 10 + ~#version~0.offset, 1);call write~init~int(46, ~#version~0.base, 11 + ~#version~0.offset, 1);call write~init~int(49, ~#version~0.base, 12 + ~#version~0.offset, 1);call write~init~int(48, ~#version~0.base, 13 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 14 + ~#version~0.offset, 1);call write~init~int(65, ~#version~0.base, 15 + ~#version~0.offset, 1);call write~init~int(117, ~#version~0.base, 16 + ~#version~0.offset, 1);call write~init~int(103, ~#version~0.base, 17 + ~#version~0.offset, 1);call write~init~int(117, ~#version~0.base, 18 + ~#version~0.offset, 1);call write~init~int(115, ~#version~0.base, 19 + ~#version~0.offset, 1);call write~init~int(116, ~#version~0.base, 20 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 21 + ~#version~0.offset, 1);call write~init~int(50, ~#version~0.base, 22 + ~#version~0.offset, 1);call write~init~int(54, ~#version~0.base, 23 + ~#version~0.offset, 1);call write~init~int(44, ~#version~0.base, 24 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 25 + ~#version~0.offset, 1);call write~init~int(50, ~#version~0.base, 26 + ~#version~0.offset, 1);call write~init~int(48, ~#version~0.base, 27 + ~#version~0.offset, 1);call write~init~int(48, ~#version~0.base, 28 + ~#version~0.offset, 1);call write~init~int(56, ~#version~0.base, 29 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 30 + ~#version~0.offset, 1);call write~init~int(68, ~#version~0.base, 31 + ~#version~0.offset, 1);call write~init~int(97, ~#version~0.base, 32 + ~#version~0.offset, 1);call write~init~int(118, ~#version~0.base, 33 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 34 + ~#version~0.offset, 1);call write~init~int(100, ~#version~0.base, 35 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 36 + ~#version~0.offset, 1);call write~init~int(83, ~#version~0.base, 37 + ~#version~0.offset, 1);call write~init~int(46, ~#version~0.base, 38 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 39 + ~#version~0.offset, 1);call write~init~int(77, ~#version~0.base, 40 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 41 + ~#version~0.offset, 1);call write~init~int(108, ~#version~0.base, 42 + ~#version~0.offset, 1);call write~init~int(108, ~#version~0.base, 43 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 44 + ~#version~0.offset, 1);call write~init~int(114, ~#version~0.base, 45 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 46 + ~#version~0.offset, 1);call write~init~int(40, ~#version~0.base, 47 + ~#version~0.offset, 1);call write~init~int(100, ~#version~0.base, 48 + ~#version~0.offset, 1);call write~init~int(97, ~#version~0.base, 49 + ~#version~0.offset, 1);call write~init~int(118, ~#version~0.base, 50 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 51 + ~#version~0.offset, 1);call write~init~int(109, ~#version~0.base, 52 + ~#version~0.offset, 1);call write~init~int(64, ~#version~0.base, 53 + ~#version~0.offset, 1);call write~init~int(100, ~#version~0.base, 54 + ~#version~0.offset, 1);call write~init~int(97, ~#version~0.base, 55 + ~#version~0.offset, 1);call write~init~int(118, ~#version~0.base, 56 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 57 + ~#version~0.offset, 1);call write~init~int(109, ~#version~0.base, 58 + ~#version~0.offset, 1);call write~init~int(108, ~#version~0.base, 59 + ~#version~0.offset, 1);call write~init~int(111, ~#version~0.base, 60 + ~#version~0.offset, 1);call write~init~int(102, ~#version~0.base, 61 + ~#version~0.offset, 1);call write~init~int(116, ~#version~0.base, 62 + ~#version~0.offset, 1);call write~init~int(46, ~#version~0.base, 63 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 64 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 65 + ~#version~0.offset, 1);call write~init~int(116, ~#version~0.base, 66 + ~#version~0.offset, 1);call write~init~int(41, ~#version~0.base, 67 + ~#version~0.offset, 1);call write~init~int(10, ~#version~0.base, 68 + ~#version~0.offset, 1);call write~init~int(0, ~#version~0.base, 69 + ~#version~0.offset, 1);~#macaddr~0.base, ~#macaddr~0.offset := 174, 0;call #Ultimate.allocInit(24, 174);call write~init~int(0, ~#macaddr~0.base, ~#macaddr~0.offset, 4);call write~init~int(0, ~#macaddr~0.base, 4 + ~#macaddr~0.offset, 4);call write~init~int(0, ~#macaddr~0.base, 8 + ~#macaddr~0.offset, 4);call write~init~int(0, ~#macaddr~0.base, 12 + ~#macaddr~0.offset, 4);call write~init~int(0, ~#macaddr~0.base, 16 + ~#macaddr~0.offset, 4);call write~init~int(0, ~#macaddr~0.base, 20 + ~#macaddr~0.offset, 4);~qfe_pci_list~0.base, ~qfe_pci_list~0.offset := 0, 0;~#hme_ethtool_ops~0.base, ~#hme_ethtool_ops~0.offset := 175, 0;call #Ultimate.allocInit(368, 175);call write~init~$Pointer$(#funAddr~hme_get_settings.base, #funAddr~hme_get_settings.offset, ~#hme_ethtool_ops~0.base, ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hme_set_settings.base, #funAddr~hme_set_settings.offset, ~#hme_ethtool_ops~0.base, 8 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hme_get_drvinfo.base, #funAddr~hme_get_drvinfo.offset, ~#hme_ethtool_ops~0.base, 16 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 24 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 32 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 40 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 48 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 56 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 64 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 72 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hme_get_link.base, #funAddr~hme_get_link.offset, ~#hme_ethtool_ops~0.base, 80 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 88 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 96 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 104 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 112 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 120 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 128 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 136 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 144 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 152 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 160 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 168 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 176 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 184 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 192 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 200 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 208 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 216 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 224 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 232 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 240 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 248 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 256 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 264 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 272 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 280 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 288 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 296 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 304 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 312 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 320 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 328 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 336 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 344 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 352 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 360 + ~#hme_ethtool_ops~0.offset, 8);~hme_version_printed~0 := 0;~#hme_netdev_ops~0.base, ~#hme_netdev_ops~0.offset := 176, 0;call #Ultimate.allocInit(472, 176);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 8 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~happy_meal_open.base, #funAddr~happy_meal_open.offset, ~#hme_netdev_ops~0.base, 16 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~happy_meal_close.base, #funAddr~happy_meal_close.offset, ~#hme_netdev_ops~0.base, 24 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~happy_meal_start_xmit.base, #funAddr~happy_meal_start_xmit.offset, ~#hme_netdev_ops~0.base, 32 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 40 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 48 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~happy_meal_set_multicast.base, #funAddr~happy_meal_set_multicast.offset, ~#hme_netdev_ops~0.base, 56 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_mac_addr.base, #funAddr~eth_mac_addr.offset, ~#hme_netdev_ops~0.base, 64 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_validate_addr.base, #funAddr~eth_validate_addr.offset, ~#hme_netdev_ops~0.base, 72 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 80 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 88 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_change_mtu.base, #funAddr~eth_change_mtu.offset, ~#hme_netdev_ops~0.base, 96 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 104 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~happy_meal_tx_timeout.base, #funAddr~happy_meal_tx_timeout.offset, ~#hme_netdev_ops~0.base, 112 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 120 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~happy_meal_get_stats.base, #funAddr~happy_meal_get_stats.offset, ~#hme_netdev_ops~0.base, 128 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 136 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 144 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 152 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 160 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 168 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 176 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 184 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 192 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 200 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 208 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 216 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 224 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 232 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 240 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 248 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 256 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 264 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 272 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 280 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 288 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 296 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 304 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 312 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 320 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 328 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 336 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 344 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 352 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 360 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 368 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 376 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 384 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 392 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 400 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 408 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 416 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 424 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 432 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 440 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 448 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 456 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 464 + ~#hme_netdev_ops~0.offset, 8);~#happymeal_pci_ids~0.base, ~#happymeal_pci_ids~0.offset := 177, 0;call #Ultimate.allocInit(64, 177);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#happymeal_pci_ids~0.base);call write~unchecked~int(4238, ~#happymeal_pci_ids~0.base, ~#happymeal_pci_ids~0.offset, 4);call write~unchecked~int(4097, ~#happymeal_pci_ids~0.base, 4 + ~#happymeal_pci_ids~0.offset, 4);call write~unchecked~int(4294967295, ~#happymeal_pci_ids~0.base, 8 + ~#happymeal_pci_ids~0.offset, 4);call write~unchecked~int(4294967295, ~#happymeal_pci_ids~0.base, 12 + ~#happymeal_pci_ids~0.offset, 4);call write~unchecked~int(0, ~#happymeal_pci_ids~0.base, 16 + ~#happymeal_pci_ids~0.offset, 4);call write~unchecked~int(0, ~#happymeal_pci_ids~0.base, 20 + ~#happymeal_pci_ids~0.offset, 4);call write~unchecked~int(0, ~#happymeal_pci_ids~0.base, 24 + ~#happymeal_pci_ids~0.offset, 8);~__mod_pci_device_table~0.vendor := 0;~__mod_pci_device_table~0.device := 0;~__mod_pci_device_table~0.subvendor := 0;~__mod_pci_device_table~0.subdevice := 0;~__mod_pci_device_table~0.class := 0;~__mod_pci_device_table~0.class_mask := 0;~__mod_pci_device_table~0.driver_data := 0;~#hme_pci_driver~0.base, ~#hme_pci_driver~0.offset := 178, 0;call #Ultimate.allocInit(301, 178);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 8 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(90, 0, ~#hme_pci_driver~0.base, 16 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(~#happymeal_pci_ids~0.base, ~#happymeal_pci_ids~0.offset, ~#hme_pci_driver~0.base, 24 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~happy_meal_pci_probe.base, #funAddr~happy_meal_pci_probe.offset, ~#hme_pci_driver~0.base, 32 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~happy_meal_pci_remove.base, #funAddr~happy_meal_pci_remove.offset, ~#hme_pci_driver~0.base, 40 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 48 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 56 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 64 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 72 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 80 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 88 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 96 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 104 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 112 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 120 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 128 + ~#hme_pci_driver~0.offset, 8);call write~init~int(0, ~#hme_pci_driver~0.base, 136 + ~#hme_pci_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 137 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 145 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 153 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 161 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 169 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 177 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 185 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 193 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 201 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 209 + ~#hme_pci_driver~0.offset, 8);call write~init~int(0, ~#hme_pci_driver~0.base, 217 + ~#hme_pci_driver~0.offset, 4);call write~init~int(0, ~#hme_pci_driver~0.base, 221 + ~#hme_pci_driver~0.offset, 4);call write~init~int(0, ~#hme_pci_driver~0.base, 225 + ~#hme_pci_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 229 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 237 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 245 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 253 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 261 + ~#hme_pci_driver~0.offset, 8);call write~init~int(0, ~#hme_pci_driver~0.base, 269 + ~#hme_pci_driver~0.offset, 4);call write~init~int(0, ~#hme_pci_driver~0.base, 273 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 285 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 293 + ~#hme_pci_driver~0.offset, 8);~ldv_thread_0~0.identifier := 0;~ldv_thread_0~0.function.base, ~ldv_thread_0~0.function.offset := 0, 0;~ldv_thread_1~0.identifier := 0;~ldv_thread_1~0.function.base, ~ldv_thread_1~0.function.offset := 0, 0;~ldv_thread_14~0.identifier := 0;~ldv_thread_14~0.function.base, ~ldv_thread_14~0.function.offset := 0, 0;~ldv_thread_2~0.identifier := 0;~ldv_thread_2~0.function.base, ~ldv_thread_2~0.function.offset := 0, 0;~ldv_thread_3~0.identifier := 0;~ldv_thread_3~0.function.base, ~ldv_thread_3~0.function.offset := 0, 0;~ldv_thread_4~0.identifier := 0;~ldv_thread_4~0.function.base, ~ldv_thread_4~0.function.offset := 0, 0;~ldv_spin__xmit_lock_of_netdev_queue~0 := 1;~ldv_spin_addr_list_lock_of_net_device~0 := 1;~ldv_spin_alloc_lock_of_task_struct~0 := 1;~ldv_spin_dma_spin_lock~0 := 1;~ldv_spin_happy_lock_of_happy_meal~0 := 1;~ldv_spin_i_lock_of_inode~0 := 1;~ldv_spin_lock~0 := 1;~ldv_spin_lock_of_NOT_ARG_SIGN~0 := 1;~ldv_spin_lru_lock_of_netns_frags~0 := 1;~ldv_spin_node_size_lock_of_pglist_data~0 := 1;~ldv_spin_ptl~0 := 1;~ldv_spin_siglock_of_sighand_struct~0 := 1;~ldv_spin_tx_global_lock_of_net_device~0 := 1; {1967#true} is VALID [2022-02-20 22:54:25,513 INFO L290 TraceCheckUtils]: 1: Hoare triple {1967#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;assume { :begin_inline_ldv_initialize } true; {1967#true} is VALID [2022-02-20 22:54:25,513 INFO L290 TraceCheckUtils]: 2: Hoare triple {1967#true} assume { :end_inline_ldv_initialize } true;assume { :begin_inline_ldv_entry_EMGentry_14 } true;ldv_entry_EMGentry_14_#in~arg0#1.base, ldv_entry_EMGentry_14_#in~arg0#1.offset := 0, 0;havoc ldv_entry_EMGentry_14_#t~ret977#1, ldv_entry_EMGentry_14_#t~ret978#1, ldv_entry_EMGentry_14_#t~ret979#1, ldv_entry_EMGentry_14_#t~ret980#1, ldv_entry_EMGentry_14_~arg0#1.base, ldv_entry_EMGentry_14_~arg0#1.offset, ldv_entry_EMGentry_14_~ldv_14_exit_happy_meal_exit_default~0#1.base, ldv_entry_EMGentry_14_~ldv_14_exit_happy_meal_exit_default~0#1.offset, ldv_entry_EMGentry_14_~ldv_14_init_happy_meal_probe_default~0#1.base, ldv_entry_EMGentry_14_~ldv_14_init_happy_meal_probe_default~0#1.offset, ldv_entry_EMGentry_14_~ldv_14_ret_default~0#1, ldv_entry_EMGentry_14_~tmp~76#1, ldv_entry_EMGentry_14_~tmp___0~40#1;ldv_entry_EMGentry_14_~arg0#1.base, ldv_entry_EMGentry_14_~arg0#1.offset := ldv_entry_EMGentry_14_#in~arg0#1.base, ldv_entry_EMGentry_14_#in~arg0#1.offset;havoc ldv_entry_EMGentry_14_~ldv_14_exit_happy_meal_exit_default~0#1.base, ldv_entry_EMGentry_14_~ldv_14_exit_happy_meal_exit_default~0#1.offset;havoc ldv_entry_EMGentry_14_~ldv_14_init_happy_meal_probe_default~0#1.base, ldv_entry_EMGentry_14_~ldv_14_init_happy_meal_probe_default~0#1.offset;havoc ldv_entry_EMGentry_14_~ldv_14_ret_default~0#1;havoc ldv_entry_EMGentry_14_~tmp~76#1;havoc ldv_entry_EMGentry_14_~tmp___0~40#1;assume { :begin_inline_ldv_EMGentry_init_happy_meal_probe_14_9 } true;ldv_EMGentry_init_happy_meal_probe_14_9_#in~arg0#1.base, ldv_EMGentry_init_happy_meal_probe_14_9_#in~arg0#1.offset := ldv_entry_EMGentry_14_~ldv_14_init_happy_meal_probe_default~0#1.base, ldv_entry_EMGentry_14_~ldv_14_init_happy_meal_probe_default~0#1.offset;havoc ldv_EMGentry_init_happy_meal_probe_14_9_#res#1;havoc ldv_EMGentry_init_happy_meal_probe_14_9_#t~ret960#1, ldv_EMGentry_init_happy_meal_probe_14_9_~arg0#1.base, ldv_EMGentry_init_happy_meal_probe_14_9_~arg0#1.offset, ldv_EMGentry_init_happy_meal_probe_14_9_~tmp~68#1;ldv_EMGentry_init_happy_meal_probe_14_9_~arg0#1.base, ldv_EMGentry_init_happy_meal_probe_14_9_~arg0#1.offset := ldv_EMGentry_init_happy_meal_probe_14_9_#in~arg0#1.base, ldv_EMGentry_init_happy_meal_probe_14_9_#in~arg0#1.offset;havoc ldv_EMGentry_init_happy_meal_probe_14_9_~tmp~68#1;assume { :begin_inline_happy_meal_probe } true;havoc happy_meal_probe_#res#1;havoc happy_meal_probe_#t~ret959#1, happy_meal_probe_~err~1#1;havoc happy_meal_probe_~err~1#1;happy_meal_probe_~err~1#1 := 0; {1967#true} is VALID [2022-02-20 22:54:25,514 INFO L290 TraceCheckUtils]: 3: Hoare triple {1967#true} assume 0 == happy_meal_probe_~err~1#1;assume { :begin_inline_happy_meal_pci_init } true;havoc happy_meal_pci_init_#res#1;havoc happy_meal_pci_init_#t~ret957#1, happy_meal_pci_init_~tmp~67#1;havoc happy_meal_pci_init_~tmp~67#1;assume { :begin_inline_ldv___pci_register_driver_122 } true;ldv___pci_register_driver_122_#in~ldv_func_arg1#1.base, ldv___pci_register_driver_122_#in~ldv_func_arg1#1.offset, ldv___pci_register_driver_122_#in~ldv_func_arg2#1.base, ldv___pci_register_driver_122_#in~ldv_func_arg2#1.offset, ldv___pci_register_driver_122_#in~ldv_func_arg3#1.base, ldv___pci_register_driver_122_#in~ldv_func_arg3#1.offset := ~#hme_pci_driver~0.base, ~#hme_pci_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 91, 0;havoc ldv___pci_register_driver_122_#res#1;havoc ldv___pci_register_driver_122_#t~ret1066#1, ldv___pci_register_driver_122_#t~ret1067#1, ldv___pci_register_driver_122_~ldv_func_arg1#1.base, ldv___pci_register_driver_122_~ldv_func_arg1#1.offset, ldv___pci_register_driver_122_~ldv_func_arg2#1.base, ldv___pci_register_driver_122_~ldv_func_arg2#1.offset, ldv___pci_register_driver_122_~ldv_func_arg3#1.base, ldv___pci_register_driver_122_~ldv_func_arg3#1.offset, ldv___pci_register_driver_122_~ldv_func_res~6#1, ldv___pci_register_driver_122_~tmp~97#1, ldv___pci_register_driver_122_~tmp___0~49#1;ldv___pci_register_driver_122_~ldv_func_arg1#1.base, ldv___pci_register_driver_122_~ldv_func_arg1#1.offset := ldv___pci_register_driver_122_#in~ldv_func_arg1#1.base, ldv___pci_register_driver_122_#in~ldv_func_arg1#1.offset;ldv___pci_register_driver_122_~ldv_func_arg2#1.base, ldv___pci_register_driver_122_~ldv_func_arg2#1.offset := ldv___pci_register_driver_122_#in~ldv_func_arg2#1.base, ldv___pci_register_driver_122_#in~ldv_func_arg2#1.offset;ldv___pci_register_driver_122_~ldv_func_arg3#1.base, ldv___pci_register_driver_122_~ldv_func_arg3#1.offset := ldv___pci_register_driver_122_#in~ldv_func_arg3#1.base, ldv___pci_register_driver_122_#in~ldv_func_arg3#1.offset;havoc ldv___pci_register_driver_122_~ldv_func_res~6#1;havoc ldv___pci_register_driver_122_~tmp~97#1;havoc ldv___pci_register_driver_122_~tmp___0~49#1;assume { :begin_inline___pci_register_driver } true;__pci_register_driver_#in~arg0#1.base, __pci_register_driver_#in~arg0#1.offset, __pci_register_driver_#in~arg1#1.base, __pci_register_driver_#in~arg1#1.offset, __pci_register_driver_#in~arg2#1.base, __pci_register_driver_#in~arg2#1.offset := ldv___pci_register_driver_122_~ldv_func_arg1#1.base, ldv___pci_register_driver_122_~ldv_func_arg1#1.offset, ldv___pci_register_driver_122_~ldv_func_arg2#1.base, ldv___pci_register_driver_122_~ldv_func_arg2#1.offset, ldv___pci_register_driver_122_~ldv_func_arg3#1.base, ldv___pci_register_driver_122_~ldv_func_arg3#1.offset;havoc __pci_register_driver_#res#1;havoc __pci_register_driver_#t~nondet1173#1, __pci_register_driver_~arg0#1.base, __pci_register_driver_~arg0#1.offset, __pci_register_driver_~arg1#1.base, __pci_register_driver_~arg1#1.offset, __pci_register_driver_~arg2#1.base, __pci_register_driver_~arg2#1.offset;__pci_register_driver_~arg0#1.base, __pci_register_driver_~arg0#1.offset := __pci_register_driver_#in~arg0#1.base, __pci_register_driver_#in~arg0#1.offset;__pci_register_driver_~arg1#1.base, __pci_register_driver_~arg1#1.offset := __pci_register_driver_#in~arg1#1.base, __pci_register_driver_#in~arg1#1.offset;__pci_register_driver_~arg2#1.base, __pci_register_driver_~arg2#1.offset := __pci_register_driver_#in~arg2#1.base, __pci_register_driver_#in~arg2#1.offset;assume -2147483648 <= __pci_register_driver_#t~nondet1173#1 && __pci_register_driver_#t~nondet1173#1 <= 2147483647;__pci_register_driver_#res#1 := __pci_register_driver_#t~nondet1173#1;havoc __pci_register_driver_#t~nondet1173#1; {1967#true} is VALID [2022-02-20 22:54:25,514 INFO L290 TraceCheckUtils]: 4: Hoare triple {1967#true} ldv___pci_register_driver_122_#t~ret1066#1 := __pci_register_driver_#res#1;assume { :end_inline___pci_register_driver } true;assume -2147483648 <= ldv___pci_register_driver_122_#t~ret1066#1 && ldv___pci_register_driver_122_#t~ret1066#1 <= 2147483647;ldv___pci_register_driver_122_~tmp~97#1 := ldv___pci_register_driver_122_#t~ret1066#1;havoc ldv___pci_register_driver_122_#t~ret1066#1;ldv___pci_register_driver_122_~ldv_func_res~6#1 := ldv___pci_register_driver_122_~tmp~97#1;assume { :begin_inline_ldv___pci_register_driver } true;ldv___pci_register_driver_#in~arg0#1, ldv___pci_register_driver_#in~arg1#1.base, ldv___pci_register_driver_#in~arg1#1.offset, ldv___pci_register_driver_#in~arg2#1.base, ldv___pci_register_driver_#in~arg2#1.offset, ldv___pci_register_driver_#in~arg3#1.base, ldv___pci_register_driver_#in~arg3#1.offset := ldv___pci_register_driver_122_~ldv_func_res~6#1, ldv___pci_register_driver_122_~ldv_func_arg1#1.base, ldv___pci_register_driver_122_~ldv_func_arg1#1.offset, ldv___pci_register_driver_122_~ldv_func_arg2#1.base, ldv___pci_register_driver_122_~ldv_func_arg2#1.offset, ldv___pci_register_driver_122_~ldv_func_arg3#1.base, ldv___pci_register_driver_122_~ldv_func_arg3#1.offset;havoc ldv___pci_register_driver_#res#1;havoc ldv___pci_register_driver_#t~ret961#1, ldv___pci_register_driver_~arg0#1, ldv___pci_register_driver_~arg1#1.base, ldv___pci_register_driver_~arg1#1.offset, ldv___pci_register_driver_~arg2#1.base, ldv___pci_register_driver_~arg2#1.offset, ldv___pci_register_driver_~arg3#1.base, ldv___pci_register_driver_~arg3#1.offset, ldv___pci_register_driver_~ldv_13_pci_driver_pci_driver~0#1.base, ldv___pci_register_driver_~ldv_13_pci_driver_pci_driver~0#1.offset, ldv___pci_register_driver_~tmp~69#1;ldv___pci_register_driver_~arg0#1 := ldv___pci_register_driver_#in~arg0#1;ldv___pci_register_driver_~arg1#1.base, ldv___pci_register_driver_~arg1#1.offset := ldv___pci_register_driver_#in~arg1#1.base, ldv___pci_register_driver_#in~arg1#1.offset;ldv___pci_register_driver_~arg2#1.base, ldv___pci_register_driver_~arg2#1.offset := ldv___pci_register_driver_#in~arg2#1.base, ldv___pci_register_driver_#in~arg2#1.offset;ldv___pci_register_driver_~arg3#1.base, ldv___pci_register_driver_~arg3#1.offset := ldv___pci_register_driver_#in~arg3#1.base, ldv___pci_register_driver_#in~arg3#1.offset;havoc ldv___pci_register_driver_~ldv_13_pci_driver_pci_driver~0#1.base, ldv___pci_register_driver_~ldv_13_pci_driver_pci_driver~0#1.offset;havoc ldv___pci_register_driver_~tmp~69#1; {1967#true} is VALID [2022-02-20 22:54:25,514 INFO L272 TraceCheckUtils]: 5: Hoare triple {1967#true} call ldv___pci_register_driver_#t~ret961#1 := ldv_undef_int(); {1967#true} is VALID [2022-02-20 22:54:25,514 INFO L290 TraceCheckUtils]: 6: Hoare triple {1967#true} havoc ~tmp~111;assume -2147483648 <= #t~nondet1100 && #t~nondet1100 <= 2147483647;~tmp~111 := #t~nondet1100;havoc #t~nondet1100;#res := ~tmp~111; {1967#true} is VALID [2022-02-20 22:54:25,514 INFO L290 TraceCheckUtils]: 7: Hoare triple {1967#true} assume true; {1967#true} is VALID [2022-02-20 22:54:25,514 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {1967#true} {1967#true} #4937#return; {1967#true} is VALID [2022-02-20 22:54:25,515 INFO L290 TraceCheckUtils]: 9: Hoare triple {1967#true} assume -2147483648 <= ldv___pci_register_driver_#t~ret961#1 && ldv___pci_register_driver_#t~ret961#1 <= 2147483647;ldv___pci_register_driver_~tmp~69#1 := ldv___pci_register_driver_#t~ret961#1;havoc ldv___pci_register_driver_#t~ret961#1; {1967#true} is VALID [2022-02-20 22:54:25,515 INFO L290 TraceCheckUtils]: 10: Hoare triple {1967#true} assume 0 != ldv___pci_register_driver_~tmp~69#1; {1967#true} is VALID [2022-02-20 22:54:25,515 INFO L272 TraceCheckUtils]: 11: Hoare triple {1967#true} call ldv_assume((if 0 == ldv___pci_register_driver_~arg0#1 then 1 else 0)); {1967#true} is VALID [2022-02-20 22:54:25,515 INFO L290 TraceCheckUtils]: 12: Hoare triple {1967#true} ~expression := #in~expression; {1967#true} is VALID [2022-02-20 22:54:25,515 INFO L290 TraceCheckUtils]: 13: Hoare triple {1967#true} assume !(0 == ~expression); {1967#true} is VALID [2022-02-20 22:54:25,516 INFO L290 TraceCheckUtils]: 14: Hoare triple {1967#true} assume true; {1967#true} is VALID [2022-02-20 22:54:25,516 INFO L284 TraceCheckUtils]: 15: Hoare quadruple {1967#true} {1967#true} #4939#return; {1967#true} is VALID [2022-02-20 22:54:25,516 INFO L290 TraceCheckUtils]: 16: Hoare triple {1967#true} ldv___pci_register_driver_~ldv_13_pci_driver_pci_driver~0#1.base, ldv___pci_register_driver_~ldv_13_pci_driver_pci_driver~0#1.offset := ldv___pci_register_driver_~arg1#1.base, ldv___pci_register_driver_~arg1#1.offset;assume { :begin_inline_ldv_dispatch_register_13_2 } true;ldv_dispatch_register_13_2_#in~arg0#1.base, ldv_dispatch_register_13_2_#in~arg0#1.offset := ldv___pci_register_driver_~ldv_13_pci_driver_pci_driver~0#1.base, ldv___pci_register_driver_~ldv_13_pci_driver_pci_driver~0#1.offset;havoc ldv_dispatch_register_13_2_#t~ret966#1.base, ldv_dispatch_register_13_2_#t~ret966#1.offset, ldv_dispatch_register_13_2_~arg0#1.base, ldv_dispatch_register_13_2_~arg0#1.offset, ldv_dispatch_register_13_2_~cf_arg_2~0#1.base, ldv_dispatch_register_13_2_~cf_arg_2~0#1.offset, ldv_dispatch_register_13_2_~tmp~73#1.base, ldv_dispatch_register_13_2_~tmp~73#1.offset;ldv_dispatch_register_13_2_~arg0#1.base, ldv_dispatch_register_13_2_~arg0#1.offset := ldv_dispatch_register_13_2_#in~arg0#1.base, ldv_dispatch_register_13_2_#in~arg0#1.offset;havoc ldv_dispatch_register_13_2_~cf_arg_2~0#1.base, ldv_dispatch_register_13_2_~cf_arg_2~0#1.offset;havoc ldv_dispatch_register_13_2_~tmp~73#1.base, ldv_dispatch_register_13_2_~tmp~73#1.offset; {1967#true} is VALID [2022-02-20 22:54:25,517 INFO L272 TraceCheckUtils]: 17: Hoare triple {1967#true} call ldv_dispatch_register_13_2_#t~ret966#1.base, ldv_dispatch_register_13_2_#t~ret966#1.offset := ldv_xmalloc(16); {2048#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:54:25,517 INFO L290 TraceCheckUtils]: 18: Hoare triple {2048#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~5.base, ~res~5.offset;havoc ~tmp~109.base, ~tmp~109.offset;havoc ~tmp___0~53;call #t~malloc1096.base, #t~malloc1096.offset := #Ultimate.allocOnHeap(~size);~tmp~109.base, ~tmp~109.offset := #t~malloc1096.base, #t~malloc1096.offset;havoc #t~malloc1096.base, #t~malloc1096.offset;~res~5.base, ~res~5.offset := ~tmp~109.base, ~tmp~109.offset; {1967#true} is VALID [2022-02-20 22:54:25,517 INFO L272 TraceCheckUtils]: 19: Hoare triple {1967#true} call ldv_assume((if 0 != (~res~5.base + ~res~5.offset) % 18446744073709551616 then 1 else 0)); {1967#true} is VALID [2022-02-20 22:54:25,517 INFO L290 TraceCheckUtils]: 20: Hoare triple {1967#true} ~expression := #in~expression; {1967#true} is VALID [2022-02-20 22:54:25,517 INFO L290 TraceCheckUtils]: 21: Hoare triple {1967#true} assume !(0 == ~expression); {1967#true} is VALID [2022-02-20 22:54:25,517 INFO L290 TraceCheckUtils]: 22: Hoare triple {1967#true} assume true; {1967#true} is VALID [2022-02-20 22:54:25,518 INFO L284 TraceCheckUtils]: 23: Hoare quadruple {1967#true} {1967#true} #4875#return; {1967#true} is VALID [2022-02-20 22:54:25,518 INFO L272 TraceCheckUtils]: 24: Hoare triple {1967#true} call #t~ret1097 := ldv_is_err(~res~5.base, ~res~5.offset); {1967#true} is VALID [2022-02-20 22:54:25,518 INFO L290 TraceCheckUtils]: 25: Hoare triple {1967#true} ~ptr.base, ~ptr.offset := #in~ptr.base, #in~ptr.offset;#res := (if (~ptr.base + ~ptr.offset) % 18446744073709551616 > 4294967295 then 1 else 0); {1967#true} is VALID [2022-02-20 22:54:25,518 INFO L290 TraceCheckUtils]: 26: Hoare triple {1967#true} assume true; {1967#true} is VALID [2022-02-20 22:54:25,518 INFO L284 TraceCheckUtils]: 27: Hoare quadruple {1967#true} {1967#true} #4877#return; {1967#true} is VALID [2022-02-20 22:54:25,518 INFO L290 TraceCheckUtils]: 28: Hoare triple {1967#true} assume -9223372036854775808 <= #t~ret1097 && #t~ret1097 <= 9223372036854775807;~tmp___0~53 := #t~ret1097;havoc #t~ret1097; {1967#true} is VALID [2022-02-20 22:54:25,518 INFO L272 TraceCheckUtils]: 29: Hoare triple {1967#true} call ldv_assume((if 0 == ~tmp___0~53 then 1 else 0)); {1967#true} is VALID [2022-02-20 22:54:25,519 INFO L290 TraceCheckUtils]: 30: Hoare triple {1967#true} ~expression := #in~expression; {1967#true} is VALID [2022-02-20 22:54:25,519 INFO L290 TraceCheckUtils]: 31: Hoare triple {1967#true} assume !(0 == ~expression); {1967#true} is VALID [2022-02-20 22:54:25,519 INFO L290 TraceCheckUtils]: 32: Hoare triple {1967#true} assume true; {1967#true} is VALID [2022-02-20 22:54:25,519 INFO L284 TraceCheckUtils]: 33: Hoare quadruple {1967#true} {1967#true} #4879#return; {1967#true} is VALID [2022-02-20 22:54:25,519 INFO L290 TraceCheckUtils]: 34: Hoare triple {1967#true} #res.base, #res.offset := ~res~5.base, ~res~5.offset; {1967#true} is VALID [2022-02-20 22:54:25,519 INFO L290 TraceCheckUtils]: 35: Hoare triple {1967#true} assume true; {1967#true} is VALID [2022-02-20 22:54:25,520 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {1967#true} {1967#true} #4941#return; {1967#true} is VALID [2022-02-20 22:54:25,520 INFO L290 TraceCheckUtils]: 37: Hoare triple {1967#true} ldv_dispatch_register_13_2_~tmp~73#1.base, ldv_dispatch_register_13_2_~tmp~73#1.offset := ldv_dispatch_register_13_2_#t~ret966#1.base, ldv_dispatch_register_13_2_#t~ret966#1.offset;havoc ldv_dispatch_register_13_2_#t~ret966#1.base, ldv_dispatch_register_13_2_#t~ret966#1.offset;ldv_dispatch_register_13_2_~cf_arg_2~0#1.base, ldv_dispatch_register_13_2_~cf_arg_2~0#1.offset := ldv_dispatch_register_13_2_~tmp~73#1.base, ldv_dispatch_register_13_2_~tmp~73#1.offset;call write~$Pointer$(ldv_dispatch_register_13_2_~arg0#1.base, ldv_dispatch_register_13_2_~arg0#1.offset, ldv_dispatch_register_13_2_~cf_arg_2~0#1.base, ldv_dispatch_register_13_2_~cf_arg_2~0#1.offset, 8);assume { :begin_inline_ldv_pci_pci_instance_2 } true;ldv_pci_pci_instance_2_#in~arg0#1.base, ldv_pci_pci_instance_2_#in~arg0#1.offset := ldv_dispatch_register_13_2_~cf_arg_2~0#1.base, ldv_dispatch_register_13_2_~cf_arg_2~0#1.offset;havoc ldv_pci_pci_instance_2_#t~mem1007#1.base, ldv_pci_pci_instance_2_#t~mem1007#1.offset, ldv_pci_pci_instance_2_#t~ret1008#1.base, ldv_pci_pci_instance_2_#t~ret1008#1.offset, ldv_pci_pci_instance_2_#t~ret1009#1.base, ldv_pci_pci_instance_2_#t~ret1009#1.offset, ldv_pci_pci_instance_2_#t~ret1010#1, ldv_pci_pci_instance_2_#t~mem1011#1.base, ldv_pci_pci_instance_2_#t~mem1011#1.offset, ldv_pci_pci_instance_2_#t~ret1012#1, ldv_pci_pci_instance_2_#t~ret1013#1, ldv_pci_pci_instance_2_#t~ret1014#1, ldv_pci_pci_instance_2_#t~ret1015#1, ldv_pci_pci_instance_2_#t~mem1016#1.base, ldv_pci_pci_instance_2_#t~mem1016#1.offset, ldv_pci_pci_instance_2_#t~mem1017#1.base, ldv_pci_pci_instance_2_#t~mem1017#1.offset, ldv_pci_pci_instance_2_#t~mem1018#1, ldv_pci_pci_instance_2_#t~ret1019#1, ldv_pci_pci_instance_2_#t~ret1020#1, ldv_pci_pci_instance_2_#t~mem1021#1.base, ldv_pci_pci_instance_2_#t~mem1021#1.offset, ldv_pci_pci_instance_2_#t~mem1022#1.base, ldv_pci_pci_instance_2_#t~mem1022#1.offset, ldv_pci_pci_instance_2_#t~mem1023#1, ldv_pci_pci_instance_2_#t~ret1024#1, ldv_pci_pci_instance_2_#t~ret1025#1, ldv_pci_pci_instance_2_#t~mem1026#1.base, ldv_pci_pci_instance_2_#t~mem1026#1.offset, ldv_pci_pci_instance_2_#t~mem1027#1.base, ldv_pci_pci_instance_2_#t~mem1027#1.offset, ldv_pci_pci_instance_2_#t~mem1028#1.base, ldv_pci_pci_instance_2_#t~mem1028#1.offset, ldv_pci_pci_instance_2_#t~mem1029#1.base, ldv_pci_pci_instance_2_#t~mem1029#1.offset, ldv_pci_pci_instance_2_#t~mem1030#1.base, ldv_pci_pci_instance_2_#t~mem1030#1.offset, ldv_pci_pci_instance_2_#t~mem1031#1.base, ldv_pci_pci_instance_2_#t~mem1031#1.offset, ldv_pci_pci_instance_2_#t~mem1032#1.base, ldv_pci_pci_instance_2_#t~mem1032#1.offset, ldv_pci_pci_instance_2_~arg0#1.base, ldv_pci_pci_instance_2_~arg0#1.offset, ldv_pci_pci_instance_2_~ldv_2_container_pci_driver~0#1.base, ldv_pci_pci_instance_2_~ldv_2_container_pci_driver~0#1.offset, ldv_pci_pci_instance_2_~ldv_2_resource_dev~0#1.base, ldv_pci_pci_instance_2_~ldv_2_resource_dev~0#1.offset, ldv_pci_pci_instance_2_~#ldv_2_resource_pm_message~0#1.base, ldv_pci_pci_instance_2_~#ldv_2_resource_pm_message~0#1.offset, ldv_pci_pci_instance_2_~ldv_2_resource_struct_pci_device_id_ptr~0#1.base, ldv_pci_pci_instance_2_~ldv_2_resource_struct_pci_device_id_ptr~0#1.offset, ldv_pci_pci_instance_2_~ldv_2_ret_default~0#1, ldv_pci_pci_instance_2_~data~2#1.base, ldv_pci_pci_instance_2_~data~2#1.offset, ldv_pci_pci_instance_2_~tmp~83#1.base, ldv_pci_pci_instance_2_~tmp~83#1.offset, ldv_pci_pci_instance_2_~tmp___0~41#1.base, ldv_pci_pci_instance_2_~tmp___0~41#1.offset, ldv_pci_pci_instance_2_~tmp___1~29#1, ldv_pci_pci_instance_2_~tmp___2~19#1, ldv_pci_pci_instance_2_~tmp___3~12#1;ldv_pci_pci_instance_2_~arg0#1.base, ldv_pci_pci_instance_2_~arg0#1.offset := ldv_pci_pci_instance_2_#in~arg0#1.base, ldv_pci_pci_instance_2_#in~arg0#1.offset;havoc ldv_pci_pci_instance_2_~ldv_2_container_pci_driver~0#1.base, ldv_pci_pci_instance_2_~ldv_2_container_pci_driver~0#1.offset;havoc ldv_pci_pci_instance_2_~ldv_2_resource_dev~0#1.base, ldv_pci_pci_instance_2_~ldv_2_resource_dev~0#1.offset;call ldv_pci_pci_instance_2_~#ldv_2_resource_pm_message~0#1.base, ldv_pci_pci_instance_2_~#ldv_2_resource_pm_message~0#1.offset := #Ultimate.allocOnStack(4);havoc ldv_pci_pci_instance_2_~ldv_2_resource_struct_pci_device_id_ptr~0#1.base, ldv_pci_pci_instance_2_~ldv_2_resource_struct_pci_device_id_ptr~0#1.offset;havoc ldv_pci_pci_instance_2_~ldv_2_ret_default~0#1;havoc ldv_pci_pci_instance_2_~data~2#1.base, ldv_pci_pci_instance_2_~data~2#1.offset;havoc ldv_pci_pci_instance_2_~tmp~83#1.base, ldv_pci_pci_instance_2_~tmp~83#1.offset;havoc ldv_pci_pci_instance_2_~tmp___0~41#1.base, ldv_pci_pci_instance_2_~tmp___0~41#1.offset;havoc ldv_pci_pci_instance_2_~tmp___1~29#1;havoc ldv_pci_pci_instance_2_~tmp___2~19#1;havoc ldv_pci_pci_instance_2_~tmp___3~12#1;ldv_pci_pci_instance_2_~data~2#1.base, ldv_pci_pci_instance_2_~data~2#1.offset := ldv_pci_pci_instance_2_~arg0#1.base, ldv_pci_pci_instance_2_~arg0#1.offset;ldv_pci_pci_instance_2_~ldv_2_ret_default~0#1 := 1; {1967#true} is VALID [2022-02-20 22:54:25,520 INFO L290 TraceCheckUtils]: 38: Hoare triple {1967#true} assume !(0 != (ldv_pci_pci_instance_2_~data~2#1.base + ldv_pci_pci_instance_2_~data~2#1.offset) % 18446744073709551616); {1967#true} is VALID [2022-02-20 22:54:25,521 INFO L272 TraceCheckUtils]: 39: Hoare triple {1967#true} call ldv_pci_pci_instance_2_#t~ret1008#1.base, ldv_pci_pci_instance_2_#t~ret1008#1.offset := ldv_xmalloc(2936); {2048#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:54:25,521 INFO L290 TraceCheckUtils]: 40: Hoare triple {2048#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~5.base, ~res~5.offset;havoc ~tmp~109.base, ~tmp~109.offset;havoc ~tmp___0~53;call #t~malloc1096.base, #t~malloc1096.offset := #Ultimate.allocOnHeap(~size);~tmp~109.base, ~tmp~109.offset := #t~malloc1096.base, #t~malloc1096.offset;havoc #t~malloc1096.base, #t~malloc1096.offset;~res~5.base, ~res~5.offset := ~tmp~109.base, ~tmp~109.offset; {1967#true} is VALID [2022-02-20 22:54:25,521 INFO L272 TraceCheckUtils]: 41: Hoare triple {1967#true} call ldv_assume((if 0 != (~res~5.base + ~res~5.offset) % 18446744073709551616 then 1 else 0)); {1967#true} is VALID [2022-02-20 22:54:25,521 INFO L290 TraceCheckUtils]: 42: Hoare triple {1967#true} ~expression := #in~expression; {1967#true} is VALID [2022-02-20 22:54:25,521 INFO L290 TraceCheckUtils]: 43: Hoare triple {1967#true} assume !(0 == ~expression); {1967#true} is VALID [2022-02-20 22:54:25,521 INFO L290 TraceCheckUtils]: 44: Hoare triple {1967#true} assume true; {1967#true} is VALID [2022-02-20 22:54:25,522 INFO L284 TraceCheckUtils]: 45: Hoare quadruple {1967#true} {1967#true} #4875#return; {1967#true} is VALID [2022-02-20 22:54:25,522 INFO L272 TraceCheckUtils]: 46: Hoare triple {1967#true} call #t~ret1097 := ldv_is_err(~res~5.base, ~res~5.offset); {1967#true} is VALID [2022-02-20 22:54:25,522 INFO L290 TraceCheckUtils]: 47: Hoare triple {1967#true} ~ptr.base, ~ptr.offset := #in~ptr.base, #in~ptr.offset;#res := (if (~ptr.base + ~ptr.offset) % 18446744073709551616 > 4294967295 then 1 else 0); {1967#true} is VALID [2022-02-20 22:54:25,522 INFO L290 TraceCheckUtils]: 48: Hoare triple {1967#true} assume true; {1967#true} is VALID [2022-02-20 22:54:25,522 INFO L284 TraceCheckUtils]: 49: Hoare quadruple {1967#true} {1967#true} #4877#return; {1967#true} is VALID [2022-02-20 22:54:25,522 INFO L290 TraceCheckUtils]: 50: Hoare triple {1967#true} assume -9223372036854775808 <= #t~ret1097 && #t~ret1097 <= 9223372036854775807;~tmp___0~53 := #t~ret1097;havoc #t~ret1097; {1967#true} is VALID [2022-02-20 22:54:25,522 INFO L272 TraceCheckUtils]: 51: Hoare triple {1967#true} call ldv_assume((if 0 == ~tmp___0~53 then 1 else 0)); {1967#true} is VALID [2022-02-20 22:54:25,523 INFO L290 TraceCheckUtils]: 52: Hoare triple {1967#true} ~expression := #in~expression; {1967#true} is VALID [2022-02-20 22:54:25,523 INFO L290 TraceCheckUtils]: 53: Hoare triple {1967#true} assume !(0 == ~expression); {1967#true} is VALID [2022-02-20 22:54:25,523 INFO L290 TraceCheckUtils]: 54: Hoare triple {1967#true} assume true; {1967#true} is VALID [2022-02-20 22:54:25,523 INFO L284 TraceCheckUtils]: 55: Hoare quadruple {1967#true} {1967#true} #4879#return; {1967#true} is VALID [2022-02-20 22:54:25,523 INFO L290 TraceCheckUtils]: 56: Hoare triple {1967#true} #res.base, #res.offset := ~res~5.base, ~res~5.offset; {1967#true} is VALID [2022-02-20 22:54:25,523 INFO L290 TraceCheckUtils]: 57: Hoare triple {1967#true} assume true; {1967#true} is VALID [2022-02-20 22:54:25,524 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {1967#true} {1967#true} #4945#return; {1967#true} is VALID [2022-02-20 22:54:25,524 INFO L290 TraceCheckUtils]: 59: Hoare triple {1967#true} ldv_pci_pci_instance_2_~tmp~83#1.base, ldv_pci_pci_instance_2_~tmp~83#1.offset := ldv_pci_pci_instance_2_#t~ret1008#1.base, ldv_pci_pci_instance_2_#t~ret1008#1.offset;havoc ldv_pci_pci_instance_2_#t~ret1008#1.base, ldv_pci_pci_instance_2_#t~ret1008#1.offset;ldv_pci_pci_instance_2_~ldv_2_resource_dev~0#1.base, ldv_pci_pci_instance_2_~ldv_2_resource_dev~0#1.offset := ldv_pci_pci_instance_2_~tmp~83#1.base, ldv_pci_pci_instance_2_~tmp~83#1.offset; {1967#true} is VALID [2022-02-20 22:54:25,524 INFO L272 TraceCheckUtils]: 60: Hoare triple {1967#true} call ldv_pci_pci_instance_2_#t~ret1009#1.base, ldv_pci_pci_instance_2_#t~ret1009#1.offset := ldv_xmalloc(32); {2048#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:54:25,524 INFO L290 TraceCheckUtils]: 61: Hoare triple {2048#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~5.base, ~res~5.offset;havoc ~tmp~109.base, ~tmp~109.offset;havoc ~tmp___0~53;call #t~malloc1096.base, #t~malloc1096.offset := #Ultimate.allocOnHeap(~size);~tmp~109.base, ~tmp~109.offset := #t~malloc1096.base, #t~malloc1096.offset;havoc #t~malloc1096.base, #t~malloc1096.offset;~res~5.base, ~res~5.offset := ~tmp~109.base, ~tmp~109.offset; {1967#true} is VALID [2022-02-20 22:54:25,525 INFO L272 TraceCheckUtils]: 62: Hoare triple {1967#true} call ldv_assume((if 0 != (~res~5.base + ~res~5.offset) % 18446744073709551616 then 1 else 0)); {1967#true} is VALID [2022-02-20 22:54:25,525 INFO L290 TraceCheckUtils]: 63: Hoare triple {1967#true} ~expression := #in~expression; {1967#true} is VALID [2022-02-20 22:54:25,525 INFO L290 TraceCheckUtils]: 64: Hoare triple {1967#true} assume !(0 == ~expression); {1967#true} is VALID [2022-02-20 22:54:25,525 INFO L290 TraceCheckUtils]: 65: Hoare triple {1967#true} assume true; {1967#true} is VALID [2022-02-20 22:54:25,525 INFO L284 TraceCheckUtils]: 66: Hoare quadruple {1967#true} {1967#true} #4875#return; {1967#true} is VALID [2022-02-20 22:54:25,525 INFO L272 TraceCheckUtils]: 67: Hoare triple {1967#true} call #t~ret1097 := ldv_is_err(~res~5.base, ~res~5.offset); {1967#true} is VALID [2022-02-20 22:54:25,526 INFO L290 TraceCheckUtils]: 68: Hoare triple {1967#true} ~ptr.base, ~ptr.offset := #in~ptr.base, #in~ptr.offset;#res := (if (~ptr.base + ~ptr.offset) % 18446744073709551616 > 4294967295 then 1 else 0); {1967#true} is VALID [2022-02-20 22:54:25,526 INFO L290 TraceCheckUtils]: 69: Hoare triple {1967#true} assume true; {1967#true} is VALID [2022-02-20 22:54:25,526 INFO L284 TraceCheckUtils]: 70: Hoare quadruple {1967#true} {1967#true} #4877#return; {1967#true} is VALID [2022-02-20 22:54:25,526 INFO L290 TraceCheckUtils]: 71: Hoare triple {1967#true} assume -9223372036854775808 <= #t~ret1097 && #t~ret1097 <= 9223372036854775807;~tmp___0~53 := #t~ret1097;havoc #t~ret1097; {1967#true} is VALID [2022-02-20 22:54:25,526 INFO L272 TraceCheckUtils]: 72: Hoare triple {1967#true} call ldv_assume((if 0 == ~tmp___0~53 then 1 else 0)); {1967#true} is VALID [2022-02-20 22:54:25,526 INFO L290 TraceCheckUtils]: 73: Hoare triple {1967#true} ~expression := #in~expression; {1967#true} is VALID [2022-02-20 22:54:25,526 INFO L290 TraceCheckUtils]: 74: Hoare triple {1967#true} assume !(0 == ~expression); {1967#true} is VALID [2022-02-20 22:54:25,527 INFO L290 TraceCheckUtils]: 75: Hoare triple {1967#true} assume true; {1967#true} is VALID [2022-02-20 22:54:25,527 INFO L284 TraceCheckUtils]: 76: Hoare quadruple {1967#true} {1967#true} #4879#return; {1967#true} is VALID [2022-02-20 22:54:25,527 INFO L290 TraceCheckUtils]: 77: Hoare triple {1967#true} #res.base, #res.offset := ~res~5.base, ~res~5.offset; {1967#true} is VALID [2022-02-20 22:54:25,527 INFO L290 TraceCheckUtils]: 78: Hoare triple {1967#true} assume true; {1967#true} is VALID [2022-02-20 22:54:25,527 INFO L284 TraceCheckUtils]: 79: Hoare quadruple {1967#true} {1967#true} #4947#return; {1967#true} is VALID [2022-02-20 22:54:25,527 INFO L290 TraceCheckUtils]: 80: Hoare triple {1967#true} ldv_pci_pci_instance_2_~tmp___0~41#1.base, ldv_pci_pci_instance_2_~tmp___0~41#1.offset := ldv_pci_pci_instance_2_#t~ret1009#1.base, ldv_pci_pci_instance_2_#t~ret1009#1.offset;havoc ldv_pci_pci_instance_2_#t~ret1009#1.base, ldv_pci_pci_instance_2_#t~ret1009#1.offset;ldv_pci_pci_instance_2_~ldv_2_resource_struct_pci_device_id_ptr~0#1.base, ldv_pci_pci_instance_2_~ldv_2_resource_struct_pci_device_id_ptr~0#1.offset := ldv_pci_pci_instance_2_~tmp___0~41#1.base, ldv_pci_pci_instance_2_~tmp___0~41#1.offset; {1967#true} is VALID [2022-02-20 22:54:25,527 INFO L272 TraceCheckUtils]: 81: Hoare triple {1967#true} call ldv_pci_pci_instance_2_#t~ret1010#1 := ldv_undef_int(); {1967#true} is VALID [2022-02-20 22:54:25,528 INFO L290 TraceCheckUtils]: 82: Hoare triple {1967#true} havoc ~tmp~111;assume -2147483648 <= #t~nondet1100 && #t~nondet1100 <= 2147483647;~tmp~111 := #t~nondet1100;havoc #t~nondet1100;#res := ~tmp~111; {1967#true} is VALID [2022-02-20 22:54:25,528 INFO L290 TraceCheckUtils]: 83: Hoare triple {1967#true} assume true; {1967#true} is VALID [2022-02-20 22:54:25,528 INFO L284 TraceCheckUtils]: 84: Hoare quadruple {1967#true} {1967#true} #4949#return; {1967#true} is VALID [2022-02-20 22:54:25,528 INFO L290 TraceCheckUtils]: 85: Hoare triple {1967#true} assume -2147483648 <= ldv_pci_pci_instance_2_#t~ret1010#1 && ldv_pci_pci_instance_2_#t~ret1010#1 <= 2147483647;ldv_pci_pci_instance_2_~tmp___2~19#1 := ldv_pci_pci_instance_2_#t~ret1010#1;havoc ldv_pci_pci_instance_2_#t~ret1010#1; {1967#true} is VALID [2022-02-20 22:54:25,528 INFO L290 TraceCheckUtils]: 86: Hoare triple {1967#true} assume 0 != ldv_pci_pci_instance_2_~tmp___2~19#1;assume { :begin_inline_ldv_pre_probe } true; {1967#true} is VALID [2022-02-20 22:54:25,528 INFO L290 TraceCheckUtils]: 87: Hoare triple {1967#true} assume { :end_inline_ldv_pre_probe } true;call ldv_pci_pci_instance_2_#t~mem1011#1.base, ldv_pci_pci_instance_2_#t~mem1011#1.offset := read~$Pointer$(ldv_pci_pci_instance_2_~ldv_2_container_pci_driver~0#1.base, 32 + ldv_pci_pci_instance_2_~ldv_2_container_pci_driver~0#1.offset, 8);assume { :begin_inline_ldv_pci_instance_probe_2_17 } true;ldv_pci_instance_probe_2_17_#in~arg0#1.base, ldv_pci_instance_probe_2_17_#in~arg0#1.offset, ldv_pci_instance_probe_2_17_#in~arg1#1.base, ldv_pci_instance_probe_2_17_#in~arg1#1.offset, ldv_pci_instance_probe_2_17_#in~arg2#1.base, ldv_pci_instance_probe_2_17_#in~arg2#1.offset := ldv_pci_pci_instance_2_#t~mem1011#1.base, ldv_pci_pci_instance_2_#t~mem1011#1.offset, ldv_pci_pci_instance_2_~ldv_2_resource_dev~0#1.base, ldv_pci_pci_instance_2_~ldv_2_resource_dev~0#1.offset, ldv_pci_pci_instance_2_~ldv_2_resource_struct_pci_device_id_ptr~0#1.base, ldv_pci_pci_instance_2_~ldv_2_resource_struct_pci_device_id_ptr~0#1.offset;havoc ldv_pci_instance_probe_2_17_#res#1;havoc ldv_pci_instance_probe_2_17_#t~ret993#1, ldv_pci_instance_probe_2_17_~arg0#1.base, ldv_pci_instance_probe_2_17_~arg0#1.offset, ldv_pci_instance_probe_2_17_~arg1#1.base, ldv_pci_instance_probe_2_17_~arg1#1.offset, ldv_pci_instance_probe_2_17_~arg2#1.base, ldv_pci_instance_probe_2_17_~arg2#1.offset, ldv_pci_instance_probe_2_17_~tmp~80#1;ldv_pci_instance_probe_2_17_~arg0#1.base, ldv_pci_instance_probe_2_17_~arg0#1.offset := ldv_pci_instance_probe_2_17_#in~arg0#1.base, ldv_pci_instance_probe_2_17_#in~arg0#1.offset;ldv_pci_instance_probe_2_17_~arg1#1.base, ldv_pci_instance_probe_2_17_~arg1#1.offset := ldv_pci_instance_probe_2_17_#in~arg1#1.base, ldv_pci_instance_probe_2_17_#in~arg1#1.offset;ldv_pci_instance_probe_2_17_~arg2#1.base, ldv_pci_instance_probe_2_17_~arg2#1.offset := ldv_pci_instance_probe_2_17_#in~arg2#1.base, ldv_pci_instance_probe_2_17_#in~arg2#1.offset;havoc ldv_pci_instance_probe_2_17_~tmp~80#1;assume { :begin_inline_happy_meal_pci_probe } true;happy_meal_pci_probe_#in~pdev#1.base, happy_meal_pci_probe_#in~pdev#1.offset, happy_meal_pci_probe_#in~ent#1.base, happy_meal_pci_probe_#in~ent#1.offset := ldv_pci_instance_probe_2_17_~arg1#1.base, ldv_pci_instance_probe_2_17_~arg1#1.offset, ldv_pci_instance_probe_2_17_~arg2#1.base, ldv_pci_instance_probe_2_17_~arg2#1.offset;havoc happy_meal_pci_probe_#res#1;havoc happy_meal_pci_probe_#t~ret897#1, happy_meal_pci_probe_#t~strcpy~res898#1.base, happy_meal_pci_probe_#t~strcpy~res898#1.offset, happy_meal_pci_probe_#t~strcpy~res899#1.base, happy_meal_pci_probe_#t~strcpy~res899#1.offset, happy_meal_pci_probe_#t~ret900#1, happy_meal_pci_probe_#t~nondet901#1, happy_meal_pci_probe_#t~nondet902#1, happy_meal_pci_probe_#t~ret903#1.base, happy_meal_pci_probe_#t~ret903#1.offset, happy_meal_pci_probe_#t~mem904#1.base, happy_meal_pci_probe_#t~mem904#1.offset, happy_meal_pci_probe_#t~ret905#1.base, happy_meal_pci_probe_#t~ret905#1.offset, happy_meal_pci_probe_#t~nondet906#1, happy_meal_pci_probe_#t~ret907#1.base, happy_meal_pci_probe_#t~ret907#1.offset, happy_meal_pci_probe_#t~ret908#1.base, happy_meal_pci_probe_#t~ret908#1.offset, happy_meal_pci_probe_#t~mem909#1, happy_meal_pci_probe_#t~mem910#1, happy_meal_pci_probe_#t~nondet911#1, happy_meal_pci_probe_#t~ret912#1, happy_meal_pci_probe_#t~nondet913#1, happy_meal_pci_probe_#t~ret914#1.base, happy_meal_pci_probe_#t~ret914#1.offset, happy_meal_pci_probe_#t~nondet915#1, happy_meal_pci_probe_#t~mem916#1, happy_meal_pci_probe_#t~mem917#1.base, happy_meal_pci_probe_#t~mem917#1.offset, happy_meal_pci_probe_#t~mem918#1, happy_meal_pci_probe_#t~mem919#1, happy_meal_pci_probe_#t~mem920#1.base, happy_meal_pci_probe_#t~mem920#1.offset, happy_meal_pci_probe_#t~mem921#1, happy_meal_pci_probe_#t~mem922#1, happy_meal_pci_probe_#t~mem923#1, happy_meal_pci_probe_#t~short924#1, happy_meal_pci_probe_#t~mem925#1, happy_meal_pci_probe_#t~mem926#1, happy_meal_pci_probe_#t~ret927#1.base, happy_meal_pci_probe_#t~ret927#1.offset, happy_meal_pci_probe_#t~mem928#1.base, happy_meal_pci_probe_#t~mem928#1.offset, happy_meal_pci_probe_#t~mem929#1, happy_meal_pci_probe_#t~mem930#1, happy_meal_pci_probe_#t~mem931#1, happy_meal_pci_probe_#t~mem932#1.base, happy_meal_pci_probe_#t~mem932#1.offset, happy_meal_pci_probe_#t~ret933#1, happy_meal_pci_probe_#t~nondet934#1, happy_meal_pci_probe_#t~mem935#1.base, happy_meal_pci_probe_#t~mem935#1.offset, happy_meal_pci_probe_#t~ret936#1, happy_meal_pci_probe_#t~ret937#1, happy_meal_pci_probe_#t~nondet938#1, happy_meal_pci_probe_#t~nondet939#1, happy_meal_pci_probe_#t~mem940#1, happy_meal_pci_probe_#t~nondet941#1, happy_meal_pci_probe_#t~nondet942#1, happy_meal_pci_probe_#t~mem943#1, happy_meal_pci_probe_#t~mem944#1, happy_meal_pci_probe_#t~nondet945#1, happy_meal_pci_probe_#t~nondet946#1, happy_meal_pci_probe_#t~nondet947#1, happy_meal_pci_probe_#t~mem948#1.base, happy_meal_pci_probe_#t~mem948#1.offset, happy_meal_pci_probe_#t~mem949#1.base, happy_meal_pci_probe_#t~mem949#1.offset, happy_meal_pci_probe_~pdev#1.base, happy_meal_pci_probe_~pdev#1.offset, happy_meal_pci_probe_~ent#1.base, happy_meal_pci_probe_~ent#1.offset, happy_meal_pci_probe_~qp~1#1.base, happy_meal_pci_probe_~qp~1#1.offset, happy_meal_pci_probe_~hp~12#1.base, happy_meal_pci_probe_~hp~12#1.offset, happy_meal_pci_probe_~dev~2#1.base, happy_meal_pci_probe_~dev~2#1.offset, happy_meal_pci_probe_~hpreg_base~0#1.base, happy_meal_pci_probe_~hpreg_base~0#1.offset, happy_meal_pci_probe_~hpreg_res~0#1, happy_meal_pci_probe_~i~6#1, happy_meal_pci_probe_~qfe_slot~0#1, happy_meal_pci_probe_~#prom_name~0#1.base, happy_meal_pci_probe_~#prom_name~0#1.offset, happy_meal_pci_probe_~err~0#1, happy_meal_pci_probe_~tmp~65#1, happy_meal_pci_probe_~tmp___0~38#1, happy_meal_pci_probe_~tmp___1~28#1, happy_meal_pci_probe_~tmp___2~18#1, happy_meal_pci_probe_~tmp___3~11#1, happy_meal_pci_probe_~tmp___4~8#1.base, happy_meal_pci_probe_~tmp___4~8#1.offset, happy_meal_pci_probe_~#__key~0#1.base, happy_meal_pci_probe_~#__key~0#1.offset, happy_meal_pci_probe_~tmp___5~5#1, happy_meal_pci_probe_~tmp___6~4#1.base, happy_meal_pci_probe_~tmp___6~4#1.offset, happy_meal_pci_probe_~#__key___0~0#1.base, happy_meal_pci_probe_~#__key___0~0#1.offset, happy_meal_pci_probe_~qpdev~1#1.base, happy_meal_pci_probe_~qpdev~1#1.offset, happy_meal_pci_probe_~i___0~0#1, happy_meal_pci_probe_~tmp___7~3#1, happy_meal_pci_probe_~tmp___8~2#1;happy_meal_pci_probe_~pdev#1.base, happy_meal_pci_probe_~pdev#1.offset := happy_meal_pci_probe_#in~pdev#1.base, happy_meal_pci_probe_#in~pdev#1.offset;happy_meal_pci_probe_~ent#1.base, happy_meal_pci_probe_~ent#1.offset := happy_meal_pci_probe_#in~ent#1.base, happy_meal_pci_probe_#in~ent#1.offset;havoc happy_meal_pci_probe_~qp~1#1.base, happy_meal_pci_probe_~qp~1#1.offset;havoc happy_meal_pci_probe_~hp~12#1.base, happy_meal_pci_probe_~hp~12#1.offset;havoc happy_meal_pci_probe_~dev~2#1.base, happy_meal_pci_probe_~dev~2#1.offset;havoc happy_meal_pci_probe_~hpreg_base~0#1.base, happy_meal_pci_probe_~hpreg_base~0#1.offset;havoc happy_meal_pci_probe_~hpreg_res~0#1;havoc happy_meal_pci_probe_~i~6#1;havoc happy_meal_pci_probe_~qfe_slot~0#1;call happy_meal_pci_probe_~#prom_name~0#1.base, happy_meal_pci_probe_~#prom_name~0#1.offset := #Ultimate.allocOnStack(64);havoc happy_meal_pci_probe_~err~0#1;havoc happy_meal_pci_probe_~tmp~65#1;havoc happy_meal_pci_probe_~tmp___0~38#1;havoc happy_meal_pci_probe_~tmp___1~28#1;havoc happy_meal_pci_probe_~tmp___2~18#1;havoc happy_meal_pci_probe_~tmp___3~11#1;havoc happy_meal_pci_probe_~tmp___4~8#1.base, happy_meal_pci_probe_~tmp___4~8#1.offset;call happy_meal_pci_probe_~#__key~0#1.base, happy_meal_pci_probe_~#__key~0#1.offset := #Ultimate.allocOnStack(8);havoc happy_meal_pci_probe_~tmp___5~5#1;havoc happy_meal_pci_probe_~tmp___6~4#1.base, happy_meal_pci_probe_~tmp___6~4#1.offset;call happy_meal_pci_probe_~#__key___0~0#1.base, happy_meal_pci_probe_~#__key___0~0#1.offset := #Ultimate.allocOnStack(8);havoc happy_meal_pci_probe_~qpdev~1#1.base, happy_meal_pci_probe_~qpdev~1#1.offset;havoc happy_meal_pci_probe_~i___0~0#1;havoc happy_meal_pci_probe_~tmp___7~3#1;havoc happy_meal_pci_probe_~tmp___8~2#1;happy_meal_pci_probe_~qp~1#1.base, happy_meal_pci_probe_~qp~1#1.offset := 0, 0;happy_meal_pci_probe_~qfe_slot~0#1 := -1; {1967#true} is VALID [2022-02-20 22:54:25,529 INFO L272 TraceCheckUtils]: 88: Hoare triple {1967#true} call happy_meal_pci_probe_#t~ret897#1 := is_quattro_p(happy_meal_pci_probe_~pdev#1.base, happy_meal_pci_probe_~pdev#1.offset); {1967#true} is VALID [2022-02-20 22:54:25,529 INFO L290 TraceCheckUtils]: 89: Hoare triple {1967#true} ~pdev.base, ~pdev.offset := #in~pdev.base, #in~pdev.offset;havoc ~busdev~0.base, ~busdev~0.offset;havoc ~this_pdev~0.base, ~this_pdev~0.offset;havoc ~n_hmes~0;havoc ~__mptr~2.base, ~__mptr~2.offset;havoc ~__mptr___0~2.base, ~__mptr___0~2.offset;call #t~mem873.base, #t~mem873.offset := read~$Pointer$(~pdev.base, 16 + ~pdev.offset, 8);call #t~mem874.base, #t~mem874.offset := read~$Pointer$(#t~mem873.base, 56 + #t~mem873.offset, 8);~busdev~0.base, ~busdev~0.offset := #t~mem874.base, #t~mem874.offset;havoc #t~mem873.base, #t~mem873.offset;havoc #t~mem874.base, #t~mem874.offset;#t~short876 := 0 == (~busdev~0.base + ~busdev~0.offset) % 18446744073709551616; {1967#true} is VALID [2022-02-20 22:54:25,529 INFO L290 TraceCheckUtils]: 90: Hoare triple {1967#true} assume #t~short876; {1967#true} is VALID [2022-02-20 22:54:25,529 INFO L290 TraceCheckUtils]: 91: Hoare triple {1967#true} assume #t~short876;havoc #t~mem875;havoc #t~short876;#res := 0; {1967#true} is VALID [2022-02-20 22:54:25,529 INFO L290 TraceCheckUtils]: 92: Hoare triple {1967#true} assume true; {1967#true} is VALID [2022-02-20 22:54:25,529 INFO L284 TraceCheckUtils]: 93: Hoare quadruple {1967#true} {1967#true} #4951#return; {1967#true} is VALID [2022-02-20 22:54:25,530 INFO L290 TraceCheckUtils]: 94: Hoare triple {1967#true} assume -2147483648 <= happy_meal_pci_probe_#t~ret897#1 && happy_meal_pci_probe_#t~ret897#1 <= 2147483647;happy_meal_pci_probe_~tmp~65#1 := happy_meal_pci_probe_#t~ret897#1;havoc happy_meal_pci_probe_#t~ret897#1; {1967#true} is VALID [2022-02-20 22:54:25,530 INFO L290 TraceCheckUtils]: 95: Hoare triple {1967#true} assume !(0 != happy_meal_pci_probe_~tmp~65#1); {1967#true} is VALID [2022-02-20 22:54:25,531 INFO L272 TraceCheckUtils]: 96: Hoare triple {1967#true} call happy_meal_pci_probe_#t~strcpy~res899#1.base, happy_meal_pci_probe_#t~strcpy~res899#1.offset := #Ultimate.C_strcpy(happy_meal_pci_probe_~#prom_name~0#1.base, happy_meal_pci_probe_~#prom_name~0#1.offset, 71, 0); {2082#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:54:25,531 INFO L290 TraceCheckUtils]: 97: Hoare triple {2082#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~offset1215 := 0; {1967#true} is VALID [2022-02-20 22:54:25,531 INFO L290 TraceCheckUtils]: 98: Hoare triple {1967#true} assume !true; {1968#false} is VALID [2022-02-20 22:54:25,531 INFO L290 TraceCheckUtils]: 99: Hoare triple {1968#false} assume #res.base == dest.base && #res.offset == dest.offset; {1968#false} is VALID [2022-02-20 22:54:25,531 INFO L284 TraceCheckUtils]: 100: Hoare quadruple {1968#false} {1967#true} #4955#return; {1968#false} is VALID [2022-02-20 22:54:25,531 INFO L290 TraceCheckUtils]: 101: Hoare triple {1968#false} havoc happy_meal_pci_probe_#t~strcpy~res899#1.base, happy_meal_pci_probe_#t~strcpy~res899#1.offset; {1968#false} is VALID [2022-02-20 22:54:25,532 INFO L290 TraceCheckUtils]: 102: Hoare triple {1968#false} happy_meal_pci_probe_~err~0#1 := -19;assume { :begin_inline_pci_enable_device } true;pci_enable_device_#in~arg0#1.base, pci_enable_device_#in~arg0#1.offset := happy_meal_pci_probe_~pdev#1.base, happy_meal_pci_probe_~pdev#1.offset;havoc pci_enable_device_#res#1;havoc pci_enable_device_#t~nondet1186#1, pci_enable_device_~arg0#1.base, pci_enable_device_~arg0#1.offset;pci_enable_device_~arg0#1.base, pci_enable_device_~arg0#1.offset := pci_enable_device_#in~arg0#1.base, pci_enable_device_#in~arg0#1.offset;assume -2147483648 <= pci_enable_device_#t~nondet1186#1 && pci_enable_device_#t~nondet1186#1 <= 2147483647;pci_enable_device_#res#1 := pci_enable_device_#t~nondet1186#1;havoc pci_enable_device_#t~nondet1186#1; {1968#false} is VALID [2022-02-20 22:54:25,532 INFO L290 TraceCheckUtils]: 103: Hoare triple {1968#false} happy_meal_pci_probe_#t~ret900#1 := pci_enable_device_#res#1;assume { :end_inline_pci_enable_device } true;assume -2147483648 <= happy_meal_pci_probe_#t~ret900#1 && happy_meal_pci_probe_#t~ret900#1 <= 2147483647;happy_meal_pci_probe_~tmp___0~38#1 := happy_meal_pci_probe_#t~ret900#1;havoc happy_meal_pci_probe_#t~ret900#1; {1968#false} is VALID [2022-02-20 22:54:25,532 INFO L290 TraceCheckUtils]: 104: Hoare triple {1968#false} assume !(0 != happy_meal_pci_probe_~tmp___0~38#1);assume { :begin_inline_pci_set_master } true;pci_set_master_#in~arg0#1.base, pci_set_master_#in~arg0#1.offset := happy_meal_pci_probe_~pdev#1.base, happy_meal_pci_probe_~pdev#1.offset;havoc pci_set_master_~arg0#1.base, pci_set_master_~arg0#1.offset;pci_set_master_~arg0#1.base, pci_set_master_~arg0#1.offset := pci_set_master_#in~arg0#1.base, pci_set_master_#in~arg0#1.offset; {1968#false} is VALID [2022-02-20 22:54:25,532 INFO L290 TraceCheckUtils]: 105: Hoare triple {1968#false} assume { :end_inline_pci_set_master } true;happy_meal_pci_probe_~tmp___1~28#1 := happy_meal_pci_probe_#t~nondet901#1;havoc happy_meal_pci_probe_#t~nondet901#1; {1968#false} is VALID [2022-02-20 22:54:25,532 INFO L290 TraceCheckUtils]: 106: Hoare triple {1968#false} assume 0 == happy_meal_pci_probe_~tmp___1~28#1; {1968#false} is VALID [2022-02-20 22:54:25,532 INFO L290 TraceCheckUtils]: 107: Hoare triple {1968#false} assume { :begin_inline_quattro_pci_find } true;quattro_pci_find_#in~pdev#1.base, quattro_pci_find_#in~pdev#1.offset := happy_meal_pci_probe_~pdev#1.base, happy_meal_pci_probe_~pdev#1.offset;havoc quattro_pci_find_#res#1.base, quattro_pci_find_#res#1.offset;havoc quattro_pci_find_#t~mem868#1.base, quattro_pci_find_#t~mem868#1.offset, quattro_pci_find_#t~mem869#1.base, quattro_pci_find_#t~mem869#1.offset, quattro_pci_find_#t~mem870#1.base, quattro_pci_find_#t~mem870#1.offset, quattro_pci_find_#t~mem871#1.base, quattro_pci_find_#t~mem871#1.offset, quattro_pci_find_#t~ret872#1.base, quattro_pci_find_#t~ret872#1.offset, quattro_pci_find_~pdev#1.base, quattro_pci_find_~pdev#1.offset, quattro_pci_find_~bdev~0#1.base, quattro_pci_find_~bdev~0#1.offset, quattro_pci_find_~qp~0#1.base, quattro_pci_find_~qp~0#1.offset, quattro_pci_find_~qpdev~0#1.base, quattro_pci_find_~qpdev~0#1.offset, quattro_pci_find_~tmp~62#1.base, quattro_pci_find_~tmp~62#1.offset, quattro_pci_find_~i~4#1;quattro_pci_find_~pdev#1.base, quattro_pci_find_~pdev#1.offset := quattro_pci_find_#in~pdev#1.base, quattro_pci_find_#in~pdev#1.offset;havoc quattro_pci_find_~bdev~0#1.base, quattro_pci_find_~bdev~0#1.offset;havoc quattro_pci_find_~qp~0#1.base, quattro_pci_find_~qp~0#1.offset;havoc quattro_pci_find_~qpdev~0#1.base, quattro_pci_find_~qpdev~0#1.offset;havoc quattro_pci_find_~tmp~62#1.base, quattro_pci_find_~tmp~62#1.offset;havoc quattro_pci_find_~i~4#1;call quattro_pci_find_#t~mem868#1.base, quattro_pci_find_#t~mem868#1.offset := read~$Pointer$(quattro_pci_find_~pdev#1.base, 16 + quattro_pci_find_~pdev#1.offset, 8);call quattro_pci_find_#t~mem869#1.base, quattro_pci_find_#t~mem869#1.offset := read~$Pointer$(quattro_pci_find_#t~mem868#1.base, 56 + quattro_pci_find_#t~mem868#1.offset, 8);quattro_pci_find_~bdev~0#1.base, quattro_pci_find_~bdev~0#1.offset := quattro_pci_find_#t~mem869#1.base, quattro_pci_find_#t~mem869#1.offset;havoc quattro_pci_find_#t~mem868#1.base, quattro_pci_find_#t~mem868#1.offset;havoc quattro_pci_find_#t~mem869#1.base, quattro_pci_find_#t~mem869#1.offset; {1968#false} is VALID [2022-02-20 22:54:25,533 INFO L290 TraceCheckUtils]: 108: Hoare triple {1968#false} assume !(0 == (quattro_pci_find_~bdev~0#1.base + quattro_pci_find_~bdev~0#1.offset) % 18446744073709551616);quattro_pci_find_~qp~0#1.base, quattro_pci_find_~qp~0#1.offset := ~qfe_pci_list~0.base, ~qfe_pci_list~0.offset; {1968#false} is VALID [2022-02-20 22:54:25,533 INFO L290 TraceCheckUtils]: 109: Hoare triple {1968#false} assume !(0 != (quattro_pci_find_~qp~0#1.base + quattro_pci_find_~qp~0#1.offset) % 18446744073709551616);assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := 56, 208;havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret1049#1.base, kmalloc_#t~ret1049#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~res~1#1.base, kmalloc_~res~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~res~1#1.base, kmalloc_~res~1#1.offset; {1968#false} is VALID [2022-02-20 22:54:25,533 INFO L272 TraceCheckUtils]: 110: Hoare triple {1968#false} call ldv_check_alloc_flags(kmalloc_~flags#1); {1968#false} is VALID [2022-02-20 22:54:25,533 INFO L290 TraceCheckUtils]: 111: Hoare triple {1968#false} ~flags#1 := #in~flags#1;havoc ~tmp~98#1; {1968#false} is VALID [2022-02-20 22:54:25,533 INFO L290 TraceCheckUtils]: 112: Hoare triple {1968#false} assume 32 != ~flags#1 % 4294967296 && 0 != ~flags#1 % 4294967296; {1968#false} is VALID [2022-02-20 22:54:25,533 INFO L272 TraceCheckUtils]: 113: Hoare triple {1968#false} call #t~ret1068#1 := ldv_exclusive_spin_is_locked(); {1967#true} is VALID [2022-02-20 22:54:25,534 INFO L290 TraceCheckUtils]: 114: Hoare triple {1967#true} assume 2 == ~ldv_spin__xmit_lock_of_netdev_queue~0;#res := 1; {1967#true} is VALID [2022-02-20 22:54:25,534 INFO L290 TraceCheckUtils]: 115: Hoare triple {1967#true} assume true; {1967#true} is VALID [2022-02-20 22:54:25,534 INFO L284 TraceCheckUtils]: 116: Hoare quadruple {1967#true} {1968#false} #4613#return; {1968#false} is VALID [2022-02-20 22:54:25,534 INFO L290 TraceCheckUtils]: 117: Hoare triple {1968#false} assume -2147483648 <= #t~ret1068#1 && #t~ret1068#1 <= 2147483647;~tmp~98#1 := #t~ret1068#1;havoc #t~ret1068#1;assume { :begin_inline_ldv_assert_linux_alloc_spinlock__wrong_flags } true;ldv_assert_linux_alloc_spinlock__wrong_flags_#in~expr#1 := (if 0 == ~tmp~98#1 then 1 else 0);havoc ldv_assert_linux_alloc_spinlock__wrong_flags_~expr#1;ldv_assert_linux_alloc_spinlock__wrong_flags_~expr#1 := ldv_assert_linux_alloc_spinlock__wrong_flags_#in~expr#1; {1968#false} is VALID [2022-02-20 22:54:25,534 INFO L290 TraceCheckUtils]: 118: Hoare triple {1968#false} assume 0 == ldv_assert_linux_alloc_spinlock__wrong_flags_~expr#1; {1968#false} is VALID [2022-02-20 22:54:25,534 INFO L290 TraceCheckUtils]: 119: Hoare triple {1968#false} assume !false; {1968#false} is VALID [2022-02-20 22:54:25,535 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 120 trivial. 0 not checked. [2022-02-20 22:54:25,535 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:54:25,535 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1046263877] [2022-02-20 22:54:25,536 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1046263877] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:54:25,536 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 22:54:25,536 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-02-20 22:54:25,537 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2114584259] [2022-02-20 22:54:25,538 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:54:25,541 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 12.75) internal successors, (51), 2 states have internal predecessors, (51), 2 states have call successors, (13), 4 states have call predecessors, (13), 2 states have return successors, (12), 2 states have call predecessors, (12), 2 states have call successors, (12) Word has length 120 [2022-02-20 22:54:25,542 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:54:25,544 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 12.75) internal successors, (51), 2 states have internal predecessors, (51), 2 states have call successors, (13), 4 states have call predecessors, (13), 2 states have return successors, (12), 2 states have call predecessors, (12), 2 states have call successors, (12) [2022-02-20 22:54:25,637 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 76 edges. 76 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:54:25,637 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-02-20 22:54:25,638 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:54:25,650 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-02-20 22:54:25,650 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-02-20 22:54:25,657 INFO L87 Difference]: Start difference. First operand has 1964 states, 1342 states have (on average 1.3487332339791356) internal successors, (1810), 1389 states have internal predecessors, (1810), 533 states have call successors, (533), 88 states have call predecessors, (533), 87 states have return successors, (529), 515 states have call predecessors, (529), 529 states have call successors, (529) Second operand has 4 states, 4 states have (on average 12.75) internal successors, (51), 2 states have internal predecessors, (51), 2 states have call successors, (13), 4 states have call predecessors, (13), 2 states have return successors, (12), 2 states have call predecessors, (12), 2 states have call successors, (12) [2022-02-20 22:54:37,979 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:54:37,980 INFO L93 Difference]: Finished difference Result 4023 states and 6010 transitions. [2022-02-20 22:54:37,980 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-02-20 22:54:37,980 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 12.75) internal successors, (51), 2 states have internal predecessors, (51), 2 states have call successors, (13), 4 states have call predecessors, (13), 2 states have return successors, (12), 2 states have call predecessors, (12), 2 states have call successors, (12) Word has length 120 [2022-02-20 22:54:37,981 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 22:54:37,982 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 12.75) internal successors, (51), 2 states have internal predecessors, (51), 2 states have call successors, (13), 4 states have call predecessors, (13), 2 states have return successors, (12), 2 states have call predecessors, (12), 2 states have call successors, (12) [2022-02-20 22:54:38,380 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 6010 transitions. [2022-02-20 22:54:38,381 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 12.75) internal successors, (51), 2 states have internal predecessors, (51), 2 states have call successors, (13), 4 states have call predecessors, (13), 2 states have return successors, (12), 2 states have call predecessors, (12), 2 states have call successors, (12) [2022-02-20 22:54:38,616 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 6010 transitions. [2022-02-20 22:54:38,616 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 6010 transitions. [2022-02-20 22:54:43,189 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 6010 edges. 6010 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:54:43,511 INFO L225 Difference]: With dead ends: 4023 [2022-02-20 22:54:43,511 INFO L226 Difference]: Without dead ends: 1934 [2022-02-20 22:54:43,536 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 38 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-02-20 22:54:43,540 INFO L933 BasicCegarLoop]: 2466 mSDtfsCounter, 1255 mSDsluCounter, 1821 mSDsCounter, 0 mSdLazyCounter, 1604 mSolverCounterSat, 1464 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1356 SdHoareTripleChecker+Valid, 4287 SdHoareTripleChecker+Invalid, 3068 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1464 IncrementalHoareTripleChecker+Valid, 1604 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.9s IncrementalHoareTripleChecker+Time [2022-02-20 22:54:43,540 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1356 Valid, 4287 Invalid, 3068 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1464 Valid, 1604 Invalid, 0 Unknown, 0 Unchecked, 3.9s Time] [2022-02-20 22:54:43,556 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1934 states. [2022-02-20 22:54:43,677 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1934 to 1809. [2022-02-20 22:54:43,678 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 22:54:43,694 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1934 states. Second operand has 1809 states, 1242 states have (on average 1.2826086956521738) internal successors, (1593), 1286 states have internal predecessors, (1593), 481 states have call successors, (481), 85 states have call predecessors, (481), 85 states have return successors, (480), 466 states have call predecessors, (480), 480 states have call successors, (480) [2022-02-20 22:54:43,700 INFO L74 IsIncluded]: Start isIncluded. First operand 1934 states. Second operand has 1809 states, 1242 states have (on average 1.2826086956521738) internal successors, (1593), 1286 states have internal predecessors, (1593), 481 states have call successors, (481), 85 states have call predecessors, (481), 85 states have return successors, (480), 466 states have call predecessors, (480), 480 states have call successors, (480) [2022-02-20 22:54:43,703 INFO L87 Difference]: Start difference. First operand 1934 states. Second operand has 1809 states, 1242 states have (on average 1.2826086956521738) internal successors, (1593), 1286 states have internal predecessors, (1593), 481 states have call successors, (481), 85 states have call predecessors, (481), 85 states have return successors, (480), 466 states have call predecessors, (480), 480 states have call successors, (480) [2022-02-20 22:54:43,850 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:54:43,851 INFO L93 Difference]: Finished difference Result 1934 states and 2742 transitions. [2022-02-20 22:54:43,851 INFO L276 IsEmpty]: Start isEmpty. Operand 1934 states and 2742 transitions. [2022-02-20 22:54:43,863 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:54:43,864 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:54:43,868 INFO L74 IsIncluded]: Start isIncluded. First operand has 1809 states, 1242 states have (on average 1.2826086956521738) internal successors, (1593), 1286 states have internal predecessors, (1593), 481 states have call successors, (481), 85 states have call predecessors, (481), 85 states have return successors, (480), 466 states have call predecessors, (480), 480 states have call successors, (480) Second operand 1934 states. [2022-02-20 22:54:43,871 INFO L87 Difference]: Start difference. First operand has 1809 states, 1242 states have (on average 1.2826086956521738) internal successors, (1593), 1286 states have internal predecessors, (1593), 481 states have call successors, (481), 85 states have call predecessors, (481), 85 states have return successors, (480), 466 states have call predecessors, (480), 480 states have call successors, (480) Second operand 1934 states. [2022-02-20 22:54:43,996 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:54:43,996 INFO L93 Difference]: Finished difference Result 1934 states and 2742 transitions. [2022-02-20 22:54:43,996 INFO L276 IsEmpty]: Start isEmpty. Operand 1934 states and 2742 transitions. [2022-02-20 22:54:44,008 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:54:44,009 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:54:44,009 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 22:54:44,009 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 22:54:44,015 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1809 states, 1242 states have (on average 1.2826086956521738) internal successors, (1593), 1286 states have internal predecessors, (1593), 481 states have call successors, (481), 85 states have call predecessors, (481), 85 states have return successors, (480), 466 states have call predecessors, (480), 480 states have call successors, (480) [2022-02-20 22:54:44,188 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1809 states to 1809 states and 2554 transitions. [2022-02-20 22:54:44,190 INFO L78 Accepts]: Start accepts. Automaton has 1809 states and 2554 transitions. Word has length 120 [2022-02-20 22:54:44,191 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 22:54:44,192 INFO L470 AbstractCegarLoop]: Abstraction has 1809 states and 2554 transitions. [2022-02-20 22:54:44,192 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 12.75) internal successors, (51), 2 states have internal predecessors, (51), 2 states have call successors, (13), 4 states have call predecessors, (13), 2 states have return successors, (12), 2 states have call predecessors, (12), 2 states have call successors, (12) [2022-02-20 22:54:44,192 INFO L276 IsEmpty]: Start isEmpty. Operand 1809 states and 2554 transitions. [2022-02-20 22:54:44,193 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 122 [2022-02-20 22:54:44,193 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:54:44,194 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 7, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:54:44,194 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-02-20 22:54:44,194 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ldv_check_alloc_flagsErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_check_alloc_flagsErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:54:44,194 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:54:44,194 INFO L85 PathProgramCache]: Analyzing trace with hash -1833459386, now seen corresponding path program 1 times [2022-02-20 22:54:44,195 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:54:44,195 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [735888265] [2022-02-20 22:54:44,195 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:54:44,195 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:54:44,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:54:44,451 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 5 [2022-02-20 22:54:44,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:54:44,462 INFO L290 TraceCheckUtils]: 0: Hoare triple {14413#true} havoc ~tmp~111;assume -2147483648 <= #t~nondet1100 && #t~nondet1100 <= 2147483647;~tmp~111 := #t~nondet1100;havoc #t~nondet1100;#res := ~tmp~111; {14413#true} is VALID [2022-02-20 22:54:44,462 INFO L290 TraceCheckUtils]: 1: Hoare triple {14413#true} assume true; {14413#true} is VALID [2022-02-20 22:54:44,462 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {14413#true} {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} #4937#return; {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} is VALID [2022-02-20 22:54:44,463 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 11 [2022-02-20 22:54:44,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:54:44,470 INFO L290 TraceCheckUtils]: 0: Hoare triple {14413#true} ~expression := #in~expression; {14413#true} is VALID [2022-02-20 22:54:44,470 INFO L290 TraceCheckUtils]: 1: Hoare triple {14413#true} assume !(0 == ~expression); {14413#true} is VALID [2022-02-20 22:54:44,470 INFO L290 TraceCheckUtils]: 2: Hoare triple {14413#true} assume true; {14413#true} is VALID [2022-02-20 22:54:44,470 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14413#true} {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} #4939#return; {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} is VALID [2022-02-20 22:54:44,474 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 17 [2022-02-20 22:54:44,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:54:44,489 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:54:44,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:54:44,500 INFO L290 TraceCheckUtils]: 0: Hoare triple {14413#true} ~expression := #in~expression; {14413#true} is VALID [2022-02-20 22:54:44,500 INFO L290 TraceCheckUtils]: 1: Hoare triple {14413#true} assume !(0 == ~expression); {14413#true} is VALID [2022-02-20 22:54:44,501 INFO L290 TraceCheckUtils]: 2: Hoare triple {14413#true} assume true; {14413#true} is VALID [2022-02-20 22:54:44,501 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14413#true} {14413#true} #4875#return; {14413#true} is VALID [2022-02-20 22:54:44,502 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:54:44,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:54:44,511 INFO L290 TraceCheckUtils]: 0: Hoare triple {14413#true} ~ptr.base, ~ptr.offset := #in~ptr.base, #in~ptr.offset;#res := (if (~ptr.base + ~ptr.offset) % 18446744073709551616 > 4294967295 then 1 else 0); {14413#true} is VALID [2022-02-20 22:54:44,512 INFO L290 TraceCheckUtils]: 1: Hoare triple {14413#true} assume true; {14413#true} is VALID [2022-02-20 22:54:44,513 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {14413#true} {14413#true} #4877#return; {14413#true} is VALID [2022-02-20 22:54:44,514 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 11 [2022-02-20 22:54:44,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:54:44,524 INFO L290 TraceCheckUtils]: 0: Hoare triple {14413#true} ~expression := #in~expression; {14413#true} is VALID [2022-02-20 22:54:44,525 INFO L290 TraceCheckUtils]: 1: Hoare triple {14413#true} assume !(0 == ~expression); {14413#true} is VALID [2022-02-20 22:54:44,525 INFO L290 TraceCheckUtils]: 2: Hoare triple {14413#true} assume true; {14413#true} is VALID [2022-02-20 22:54:44,526 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14413#true} {14413#true} #4879#return; {14413#true} is VALID [2022-02-20 22:54:44,526 INFO L290 TraceCheckUtils]: 0: Hoare triple {14496#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~5.base, ~res~5.offset;havoc ~tmp~109.base, ~tmp~109.offset;havoc ~tmp___0~53;call #t~malloc1096.base, #t~malloc1096.offset := #Ultimate.allocOnHeap(~size);~tmp~109.base, ~tmp~109.offset := #t~malloc1096.base, #t~malloc1096.offset;havoc #t~malloc1096.base, #t~malloc1096.offset;~res~5.base, ~res~5.offset := ~tmp~109.base, ~tmp~109.offset; {14413#true} is VALID [2022-02-20 22:54:44,527 INFO L272 TraceCheckUtils]: 1: Hoare triple {14413#true} call ldv_assume((if 0 != (~res~5.base + ~res~5.offset) % 18446744073709551616 then 1 else 0)); {14413#true} is VALID [2022-02-20 22:54:44,527 INFO L290 TraceCheckUtils]: 2: Hoare triple {14413#true} ~expression := #in~expression; {14413#true} is VALID [2022-02-20 22:54:44,529 INFO L290 TraceCheckUtils]: 3: Hoare triple {14413#true} assume !(0 == ~expression); {14413#true} is VALID [2022-02-20 22:54:44,530 INFO L290 TraceCheckUtils]: 4: Hoare triple {14413#true} assume true; {14413#true} is VALID [2022-02-20 22:54:44,531 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {14413#true} {14413#true} #4875#return; {14413#true} is VALID [2022-02-20 22:54:44,532 INFO L272 TraceCheckUtils]: 6: Hoare triple {14413#true} call #t~ret1097 := ldv_is_err(~res~5.base, ~res~5.offset); {14413#true} is VALID [2022-02-20 22:54:44,532 INFO L290 TraceCheckUtils]: 7: Hoare triple {14413#true} ~ptr.base, ~ptr.offset := #in~ptr.base, #in~ptr.offset;#res := (if (~ptr.base + ~ptr.offset) % 18446744073709551616 > 4294967295 then 1 else 0); {14413#true} is VALID [2022-02-20 22:54:44,532 INFO L290 TraceCheckUtils]: 8: Hoare triple {14413#true} assume true; {14413#true} is VALID [2022-02-20 22:54:44,532 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {14413#true} {14413#true} #4877#return; {14413#true} is VALID [2022-02-20 22:54:44,532 INFO L290 TraceCheckUtils]: 10: Hoare triple {14413#true} assume -9223372036854775808 <= #t~ret1097 && #t~ret1097 <= 9223372036854775807;~tmp___0~53 := #t~ret1097;havoc #t~ret1097; {14413#true} is VALID [2022-02-20 22:54:44,532 INFO L272 TraceCheckUtils]: 11: Hoare triple {14413#true} call ldv_assume((if 0 == ~tmp___0~53 then 1 else 0)); {14413#true} is VALID [2022-02-20 22:54:44,533 INFO L290 TraceCheckUtils]: 12: Hoare triple {14413#true} ~expression := #in~expression; {14413#true} is VALID [2022-02-20 22:54:44,533 INFO L290 TraceCheckUtils]: 13: Hoare triple {14413#true} assume !(0 == ~expression); {14413#true} is VALID [2022-02-20 22:54:44,533 INFO L290 TraceCheckUtils]: 14: Hoare triple {14413#true} assume true; {14413#true} is VALID [2022-02-20 22:54:44,533 INFO L284 TraceCheckUtils]: 15: Hoare quadruple {14413#true} {14413#true} #4879#return; {14413#true} is VALID [2022-02-20 22:54:44,533 INFO L290 TraceCheckUtils]: 16: Hoare triple {14413#true} #res.base, #res.offset := ~res~5.base, ~res~5.offset; {14413#true} is VALID [2022-02-20 22:54:44,533 INFO L290 TraceCheckUtils]: 17: Hoare triple {14413#true} assume true; {14413#true} is VALID [2022-02-20 22:54:44,534 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {14413#true} {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} #4941#return; {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} is VALID [2022-02-20 22:54:44,534 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 39 [2022-02-20 22:54:44,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:54:44,548 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:54:44,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:54:44,554 INFO L290 TraceCheckUtils]: 0: Hoare triple {14413#true} ~expression := #in~expression; {14413#true} is VALID [2022-02-20 22:54:44,554 INFO L290 TraceCheckUtils]: 1: Hoare triple {14413#true} assume !(0 == ~expression); {14413#true} is VALID [2022-02-20 22:54:44,555 INFO L290 TraceCheckUtils]: 2: Hoare triple {14413#true} assume true; {14413#true} is VALID [2022-02-20 22:54:44,555 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14413#true} {14413#true} #4875#return; {14413#true} is VALID [2022-02-20 22:54:44,555 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:54:44,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:54:44,567 INFO L290 TraceCheckUtils]: 0: Hoare triple {14413#true} ~ptr.base, ~ptr.offset := #in~ptr.base, #in~ptr.offset;#res := (if (~ptr.base + ~ptr.offset) % 18446744073709551616 > 4294967295 then 1 else 0); {14413#true} is VALID [2022-02-20 22:54:44,567 INFO L290 TraceCheckUtils]: 1: Hoare triple {14413#true} assume true; {14413#true} is VALID [2022-02-20 22:54:44,567 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {14413#true} {14413#true} #4877#return; {14413#true} is VALID [2022-02-20 22:54:44,567 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 11 [2022-02-20 22:54:44,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:54:44,572 INFO L290 TraceCheckUtils]: 0: Hoare triple {14413#true} ~expression := #in~expression; {14413#true} is VALID [2022-02-20 22:54:44,572 INFO L290 TraceCheckUtils]: 1: Hoare triple {14413#true} assume !(0 == ~expression); {14413#true} is VALID [2022-02-20 22:54:44,572 INFO L290 TraceCheckUtils]: 2: Hoare triple {14413#true} assume true; {14413#true} is VALID [2022-02-20 22:54:44,572 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14413#true} {14413#true} #4879#return; {14413#true} is VALID [2022-02-20 22:54:44,573 INFO L290 TraceCheckUtils]: 0: Hoare triple {14496#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~5.base, ~res~5.offset;havoc ~tmp~109.base, ~tmp~109.offset;havoc ~tmp___0~53;call #t~malloc1096.base, #t~malloc1096.offset := #Ultimate.allocOnHeap(~size);~tmp~109.base, ~tmp~109.offset := #t~malloc1096.base, #t~malloc1096.offset;havoc #t~malloc1096.base, #t~malloc1096.offset;~res~5.base, ~res~5.offset := ~tmp~109.base, ~tmp~109.offset; {14413#true} is VALID [2022-02-20 22:54:44,573 INFO L272 TraceCheckUtils]: 1: Hoare triple {14413#true} call ldv_assume((if 0 != (~res~5.base + ~res~5.offset) % 18446744073709551616 then 1 else 0)); {14413#true} is VALID [2022-02-20 22:54:44,573 INFO L290 TraceCheckUtils]: 2: Hoare triple {14413#true} ~expression := #in~expression; {14413#true} is VALID [2022-02-20 22:54:44,573 INFO L290 TraceCheckUtils]: 3: Hoare triple {14413#true} assume !(0 == ~expression); {14413#true} is VALID [2022-02-20 22:54:44,574 INFO L290 TraceCheckUtils]: 4: Hoare triple {14413#true} assume true; {14413#true} is VALID [2022-02-20 22:54:44,574 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {14413#true} {14413#true} #4875#return; {14413#true} is VALID [2022-02-20 22:54:44,575 INFO L272 TraceCheckUtils]: 6: Hoare triple {14413#true} call #t~ret1097 := ldv_is_err(~res~5.base, ~res~5.offset); {14413#true} is VALID [2022-02-20 22:54:44,575 INFO L290 TraceCheckUtils]: 7: Hoare triple {14413#true} ~ptr.base, ~ptr.offset := #in~ptr.base, #in~ptr.offset;#res := (if (~ptr.base + ~ptr.offset) % 18446744073709551616 > 4294967295 then 1 else 0); {14413#true} is VALID [2022-02-20 22:54:44,575 INFO L290 TraceCheckUtils]: 8: Hoare triple {14413#true} assume true; {14413#true} is VALID [2022-02-20 22:54:44,575 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {14413#true} {14413#true} #4877#return; {14413#true} is VALID [2022-02-20 22:54:44,575 INFO L290 TraceCheckUtils]: 10: Hoare triple {14413#true} assume -9223372036854775808 <= #t~ret1097 && #t~ret1097 <= 9223372036854775807;~tmp___0~53 := #t~ret1097;havoc #t~ret1097; {14413#true} is VALID [2022-02-20 22:54:44,575 INFO L272 TraceCheckUtils]: 11: Hoare triple {14413#true} call ldv_assume((if 0 == ~tmp___0~53 then 1 else 0)); {14413#true} is VALID [2022-02-20 22:54:44,575 INFO L290 TraceCheckUtils]: 12: Hoare triple {14413#true} ~expression := #in~expression; {14413#true} is VALID [2022-02-20 22:54:44,575 INFO L290 TraceCheckUtils]: 13: Hoare triple {14413#true} assume !(0 == ~expression); {14413#true} is VALID [2022-02-20 22:54:44,576 INFO L290 TraceCheckUtils]: 14: Hoare triple {14413#true} assume true; {14413#true} is VALID [2022-02-20 22:54:44,576 INFO L284 TraceCheckUtils]: 15: Hoare quadruple {14413#true} {14413#true} #4879#return; {14413#true} is VALID [2022-02-20 22:54:44,576 INFO L290 TraceCheckUtils]: 16: Hoare triple {14413#true} #res.base, #res.offset := ~res~5.base, ~res~5.offset; {14413#true} is VALID [2022-02-20 22:54:44,576 INFO L290 TraceCheckUtils]: 17: Hoare triple {14413#true} assume true; {14413#true} is VALID [2022-02-20 22:54:44,577 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {14413#true} {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} #4945#return; {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} is VALID [2022-02-20 22:54:44,578 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2022-02-20 22:54:44,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:54:44,589 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:54:44,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:54:44,594 INFO L290 TraceCheckUtils]: 0: Hoare triple {14413#true} ~expression := #in~expression; {14413#true} is VALID [2022-02-20 22:54:44,594 INFO L290 TraceCheckUtils]: 1: Hoare triple {14413#true} assume !(0 == ~expression); {14413#true} is VALID [2022-02-20 22:54:44,594 INFO L290 TraceCheckUtils]: 2: Hoare triple {14413#true} assume true; {14413#true} is VALID [2022-02-20 22:54:44,595 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14413#true} {14413#true} #4875#return; {14413#true} is VALID [2022-02-20 22:54:44,595 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:54:44,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:54:44,600 INFO L290 TraceCheckUtils]: 0: Hoare triple {14413#true} ~ptr.base, ~ptr.offset := #in~ptr.base, #in~ptr.offset;#res := (if (~ptr.base + ~ptr.offset) % 18446744073709551616 > 4294967295 then 1 else 0); {14413#true} is VALID [2022-02-20 22:54:44,600 INFO L290 TraceCheckUtils]: 1: Hoare triple {14413#true} assume true; {14413#true} is VALID [2022-02-20 22:54:44,600 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {14413#true} {14413#true} #4877#return; {14413#true} is VALID [2022-02-20 22:54:44,600 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 11 [2022-02-20 22:54:44,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:54:44,605 INFO L290 TraceCheckUtils]: 0: Hoare triple {14413#true} ~expression := #in~expression; {14413#true} is VALID [2022-02-20 22:54:44,605 INFO L290 TraceCheckUtils]: 1: Hoare triple {14413#true} assume !(0 == ~expression); {14413#true} is VALID [2022-02-20 22:54:44,605 INFO L290 TraceCheckUtils]: 2: Hoare triple {14413#true} assume true; {14413#true} is VALID [2022-02-20 22:54:44,605 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14413#true} {14413#true} #4879#return; {14413#true} is VALID [2022-02-20 22:54:44,605 INFO L290 TraceCheckUtils]: 0: Hoare triple {14496#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~5.base, ~res~5.offset;havoc ~tmp~109.base, ~tmp~109.offset;havoc ~tmp___0~53;call #t~malloc1096.base, #t~malloc1096.offset := #Ultimate.allocOnHeap(~size);~tmp~109.base, ~tmp~109.offset := #t~malloc1096.base, #t~malloc1096.offset;havoc #t~malloc1096.base, #t~malloc1096.offset;~res~5.base, ~res~5.offset := ~tmp~109.base, ~tmp~109.offset; {14413#true} is VALID [2022-02-20 22:54:44,606 INFO L272 TraceCheckUtils]: 1: Hoare triple {14413#true} call ldv_assume((if 0 != (~res~5.base + ~res~5.offset) % 18446744073709551616 then 1 else 0)); {14413#true} is VALID [2022-02-20 22:54:44,606 INFO L290 TraceCheckUtils]: 2: Hoare triple {14413#true} ~expression := #in~expression; {14413#true} is VALID [2022-02-20 22:54:44,606 INFO L290 TraceCheckUtils]: 3: Hoare triple {14413#true} assume !(0 == ~expression); {14413#true} is VALID [2022-02-20 22:54:44,606 INFO L290 TraceCheckUtils]: 4: Hoare triple {14413#true} assume true; {14413#true} is VALID [2022-02-20 22:54:44,606 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {14413#true} {14413#true} #4875#return; {14413#true} is VALID [2022-02-20 22:54:44,606 INFO L272 TraceCheckUtils]: 6: Hoare triple {14413#true} call #t~ret1097 := ldv_is_err(~res~5.base, ~res~5.offset); {14413#true} is VALID [2022-02-20 22:54:44,606 INFO L290 TraceCheckUtils]: 7: Hoare triple {14413#true} ~ptr.base, ~ptr.offset := #in~ptr.base, #in~ptr.offset;#res := (if (~ptr.base + ~ptr.offset) % 18446744073709551616 > 4294967295 then 1 else 0); {14413#true} is VALID [2022-02-20 22:54:44,606 INFO L290 TraceCheckUtils]: 8: Hoare triple {14413#true} assume true; {14413#true} is VALID [2022-02-20 22:54:44,606 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {14413#true} {14413#true} #4877#return; {14413#true} is VALID [2022-02-20 22:54:44,607 INFO L290 TraceCheckUtils]: 10: Hoare triple {14413#true} assume -9223372036854775808 <= #t~ret1097 && #t~ret1097 <= 9223372036854775807;~tmp___0~53 := #t~ret1097;havoc #t~ret1097; {14413#true} is VALID [2022-02-20 22:54:44,607 INFO L272 TraceCheckUtils]: 11: Hoare triple {14413#true} call ldv_assume((if 0 == ~tmp___0~53 then 1 else 0)); {14413#true} is VALID [2022-02-20 22:54:44,607 INFO L290 TraceCheckUtils]: 12: Hoare triple {14413#true} ~expression := #in~expression; {14413#true} is VALID [2022-02-20 22:54:44,607 INFO L290 TraceCheckUtils]: 13: Hoare triple {14413#true} assume !(0 == ~expression); {14413#true} is VALID [2022-02-20 22:54:44,607 INFO L290 TraceCheckUtils]: 14: Hoare triple {14413#true} assume true; {14413#true} is VALID [2022-02-20 22:54:44,607 INFO L284 TraceCheckUtils]: 15: Hoare quadruple {14413#true} {14413#true} #4879#return; {14413#true} is VALID [2022-02-20 22:54:44,607 INFO L290 TraceCheckUtils]: 16: Hoare triple {14413#true} #res.base, #res.offset := ~res~5.base, ~res~5.offset; {14413#true} is VALID [2022-02-20 22:54:44,607 INFO L290 TraceCheckUtils]: 17: Hoare triple {14413#true} assume true; {14413#true} is VALID [2022-02-20 22:54:44,608 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {14413#true} {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} #4947#return; {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} is VALID [2022-02-20 22:54:44,608 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 81 [2022-02-20 22:54:44,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:54:44,615 INFO L290 TraceCheckUtils]: 0: Hoare triple {14413#true} havoc ~tmp~111;assume -2147483648 <= #t~nondet1100 && #t~nondet1100 <= 2147483647;~tmp~111 := #t~nondet1100;havoc #t~nondet1100;#res := ~tmp~111; {14413#true} is VALID [2022-02-20 22:54:44,615 INFO L290 TraceCheckUtils]: 1: Hoare triple {14413#true} assume true; {14413#true} is VALID [2022-02-20 22:54:44,615 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {14413#true} {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} #4949#return; {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} is VALID [2022-02-20 22:54:44,616 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 88 [2022-02-20 22:54:44,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:54:44,623 INFO L290 TraceCheckUtils]: 0: Hoare triple {14413#true} ~pdev.base, ~pdev.offset := #in~pdev.base, #in~pdev.offset;havoc ~busdev~0.base, ~busdev~0.offset;havoc ~this_pdev~0.base, ~this_pdev~0.offset;havoc ~n_hmes~0;havoc ~__mptr~2.base, ~__mptr~2.offset;havoc ~__mptr___0~2.base, ~__mptr___0~2.offset;call #t~mem873.base, #t~mem873.offset := read~$Pointer$(~pdev.base, 16 + ~pdev.offset, 8);call #t~mem874.base, #t~mem874.offset := read~$Pointer$(#t~mem873.base, 56 + #t~mem873.offset, 8);~busdev~0.base, ~busdev~0.offset := #t~mem874.base, #t~mem874.offset;havoc #t~mem873.base, #t~mem873.offset;havoc #t~mem874.base, #t~mem874.offset;#t~short876 := 0 == (~busdev~0.base + ~busdev~0.offset) % 18446744073709551616; {14413#true} is VALID [2022-02-20 22:54:44,623 INFO L290 TraceCheckUtils]: 1: Hoare triple {14413#true} assume #t~short876; {14413#true} is VALID [2022-02-20 22:54:44,623 INFO L290 TraceCheckUtils]: 2: Hoare triple {14413#true} assume #t~short876;havoc #t~mem875;havoc #t~short876;#res := 0; {14413#true} is VALID [2022-02-20 22:54:44,623 INFO L290 TraceCheckUtils]: 3: Hoare triple {14413#true} assume true; {14413#true} is VALID [2022-02-20 22:54:44,624 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {14413#true} {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} #4951#return; {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} is VALID [2022-02-20 22:54:44,629 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 96 [2022-02-20 22:54:44,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:54:44,638 INFO L290 TraceCheckUtils]: 0: Hoare triple {14530#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~offset1215 := 0; {14413#true} is VALID [2022-02-20 22:54:44,638 INFO L290 TraceCheckUtils]: 1: Hoare triple {14413#true} call #t~mem1216 := read~int(src.base, src.offset + #t~offset1215, 1);call write~unchecked~int(#t~mem1216, dest.base, dest.offset + #t~offset1215, 1); {14413#true} is VALID [2022-02-20 22:54:44,638 INFO L290 TraceCheckUtils]: 2: Hoare triple {14413#true} assume 0 == #t~mem1216; {14413#true} is VALID [2022-02-20 22:54:44,638 INFO L290 TraceCheckUtils]: 3: Hoare triple {14413#true} assume #res.base == dest.base && #res.offset == dest.offset; {14413#true} is VALID [2022-02-20 22:54:44,639 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {14413#true} {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} #4955#return; {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} is VALID [2022-02-20 22:54:44,639 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 114 [2022-02-20 22:54:44,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:54:44,650 INFO L290 TraceCheckUtils]: 0: Hoare triple {14413#true} assume 2 == ~ldv_spin__xmit_lock_of_netdev_queue~0;#res := 1; {14531#(<= 2 ~ldv_spin__xmit_lock_of_netdev_queue~0)} is VALID [2022-02-20 22:54:44,651 INFO L290 TraceCheckUtils]: 1: Hoare triple {14531#(<= 2 ~ldv_spin__xmit_lock_of_netdev_queue~0)} assume true; {14531#(<= 2 ~ldv_spin__xmit_lock_of_netdev_queue~0)} is VALID [2022-02-20 22:54:44,651 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {14531#(<= 2 ~ldv_spin__xmit_lock_of_netdev_queue~0)} {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} #4613#return; {14414#false} is VALID [2022-02-20 22:54:44,652 INFO L290 TraceCheckUtils]: 0: Hoare triple {14413#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(190, 1);call #Ultimate.allocInit(26, 2);call #Ultimate.allocInit(63, 3);call #Ultimate.allocInit(50, 4);call #Ultimate.allocInit(51, 5);call #Ultimate.allocInit(23, 6);call #Ultimate.allocInit(10, 7);call #Ultimate.allocInit(10, 8);call #Ultimate.allocInit(16, 9);call #Ultimate.allocInit(23, 10);call #Ultimate.allocInit(23, 11);call #Ultimate.allocInit(22, 12);call #Ultimate.allocInit(22, 13);call #Ultimate.allocInit(36, 14);call #Ultimate.allocInit(10, 15);call #Ultimate.allocInit(10, 16);call #Ultimate.allocInit(16, 17);call #Ultimate.allocInit(10, 18);call #Ultimate.allocInit(9, 19);call #Ultimate.allocInit(14, 20);call #Ultimate.allocInit(14, 21);call #Ultimate.allocInit(60, 22);call #Ultimate.allocInit(65, 23);call #Ultimate.allocInit(32, 24);call #Ultimate.allocInit(44, 25);call #Ultimate.allocInit(58, 26);call #Ultimate.allocInit(40, 27);call #Ultimate.allocInit(37, 28);call #Ultimate.allocInit(23, 29);call #Ultimate.allocInit(44, 30);call #Ultimate.allocInit(62, 31);call #Ultimate.allocInit(39, 32);call #Ultimate.allocInit(59, 33);call #Ultimate.allocInit(52, 34);call #Ultimate.allocInit(52, 35);call #Ultimate.allocInit(40, 36);call #Ultimate.allocInit(41, 37);call #Ultimate.allocInit(55, 38);call #Ultimate.allocInit(40, 39);call #Ultimate.allocInit(61, 40);call #Ultimate.allocInit(33, 41);call #Ultimate.allocInit(14, 42);call #Ultimate.allocInit(13, 43);call #Ultimate.allocInit(12, 44);call #Ultimate.allocInit(3, 45);call write~init~int(93, 45, 0, 1);call write~init~int(10, 45, 1, 1);call write~init~int(0, 45, 2, 1);call #Ultimate.allocInit(53, 46);call #Ultimate.allocInit(32, 47);call #Ultimate.allocInit(33, 48);call #Ultimate.allocInit(14, 49);call #Ultimate.allocInit(11, 50);call #Ultimate.allocInit(12, 51);call #Ultimate.allocInit(10, 52);call #Ultimate.allocInit(3, 53);call write~init~int(93, 53, 0, 1);call write~init~int(10, 53, 1, 1);call write~init~int(0, 53, 2, 1);call #Ultimate.allocInit(56, 54);call #Ultimate.allocInit(7, 55);call write~init~int(112, 55, 0, 1);call write~init~int(97, 55, 1, 1);call write~init~int(114, 55, 2, 1);call write~init~int(105, 55, 3, 1);call write~init~int(116, 55, 4, 1);call write~init~int(121, 55, 5, 1);call write~init~int(0, 55, 6, 1);call #Ultimate.allocInit(8, 56);call #Ultimate.allocInit(19, 57);call #Ultimate.allocInit(26, 58);call #Ultimate.allocInit(42, 59);call #Ultimate.allocInit(42, 60);call #Ultimate.allocInit(41, 61);call #Ultimate.allocInit(34, 62);call #Ultimate.allocInit(40, 63);call #Ultimate.allocInit(46, 64);call #Ultimate.allocInit(36, 65);call #Ultimate.allocInit(38, 66);call #Ultimate.allocInit(42, 67);call #Ultimate.allocInit(7, 68);call write~init~int(115, 68, 0, 1);call write~init~int(117, 68, 1, 1);call write~init~int(110, 68, 2, 1);call write~init~int(104, 68, 3, 1);call write~init~int(109, 68, 4, 1);call write~init~int(101, 68, 5, 1);call write~init~int(0, 68, 6, 1);call #Ultimate.allocInit(5, 69);call write~init~int(50, 69, 0, 1);call write~init~int(46, 69, 1, 1);call write~init~int(48, 69, 2, 1);call write~init~int(50, 69, 3, 1);call write~init~int(0, 69, 4, 1);call #Ultimate.allocInit(9, 70);call #Ultimate.allocInit(9, 71);call #Ultimate.allocInit(9, 72);call #Ultimate.allocInit(4, 73);call write~init~int(113, 73, 0, 1);call write~init~int(102, 73, 1, 1);call write~init~int(101, 73, 2, 1);call write~init~int(0, 73, 3, 1);call #Ultimate.allocInit(4, 74);call write~init~int(14, 74, 0, 1);call write~init~int(37, 74, 1, 1);call write~init~int(115, 74, 2, 1);call write~init~int(0, 74, 3, 1);call #Ultimate.allocInit(26, 75);call #Ultimate.allocInit(62, 76);call #Ultimate.allocInit(7, 77);call write~init~int(115, 77, 0, 1);call write~init~int(117, 77, 1, 1);call write~init~int(110, 77, 2, 1);call write~init~int(104, 77, 3, 1);call write~init~int(109, 77, 4, 1);call write~init~int(101, 77, 5, 1);call write~init~int(0, 77, 6, 1);call #Ultimate.allocInit(57, 78);call #Ultimate.allocInit(47, 79);call #Ultimate.allocInit(19, 80);call #Ultimate.allocInit(56, 81);call #Ultimate.allocInit(4, 82);call write~init~int(101, 82, 0, 1);call write~init~int(116, 82, 1, 1);call write~init~int(104, 82, 2, 1);call write~init~int(0, 82, 3, 1);call #Ultimate.allocInit(4, 83);call write~init~int(45, 83, 0, 1);call write~init~int(37, 83, 1, 1);call write~init~int(100, 83, 2, 1);call write~init~int(0, 83, 3, 1);call #Ultimate.allocInit(55, 84);call #Ultimate.allocInit(22, 85);call #Ultimate.allocInit(26, 86);call #Ultimate.allocInit(61, 87);call #Ultimate.allocInit(52, 88);call #Ultimate.allocInit(5, 89);call write~init~int(37, 89, 0, 1);call write~init~int(112, 89, 1, 1);call write~init~int(77, 89, 2, 1);call write~init~int(10, 89, 3, 1);call write~init~int(0, 89, 4, 1);call #Ultimate.allocInit(4, 90);call write~init~int(104, 90, 0, 1);call write~init~int(109, 90, 1, 1);call write~init~int(101, 90, 2, 1);call write~init~int(0, 90, 3, 1);call #Ultimate.allocInit(7, 91);call write~init~int(115, 91, 0, 1);call write~init~int(117, 91, 1, 1);call write~init~int(110, 91, 2, 1);call write~init~int(104, 91, 3, 1);call write~init~int(109, 91, 4, 1);call write~init~int(101, 91, 5, 1);call write~init~int(0, 91, 6, 1);call #Ultimate.allocInit(1, 92);call write~init~int(0, 92, 0, 1);call #Ultimate.allocInit(54, 93);call #Ultimate.allocInit(56, 94);call #Ultimate.allocInit(58, 95);call #Ultimate.allocInit(58, 96);call #Ultimate.allocInit(58, 97);call #Ultimate.allocInit(54, 98);call #Ultimate.allocInit(56, 99);call #Ultimate.allocInit(58, 100);call #Ultimate.allocInit(58, 101);call #Ultimate.allocInit(58, 102);call #Ultimate.allocInit(54, 103);call #Ultimate.allocInit(56, 104);call #Ultimate.allocInit(58, 105);call #Ultimate.allocInit(58, 106);call #Ultimate.allocInit(58, 107);call #Ultimate.allocInit(54, 108);call #Ultimate.allocInit(56, 109);call #Ultimate.allocInit(58, 110);call #Ultimate.allocInit(58, 111);call #Ultimate.allocInit(58, 112);call #Ultimate.allocInit(54, 113);call #Ultimate.allocInit(56, 114);call #Ultimate.allocInit(58, 115);call #Ultimate.allocInit(58, 116);call #Ultimate.allocInit(58, 117);call #Ultimate.allocInit(54, 118);call #Ultimate.allocInit(56, 119);call #Ultimate.allocInit(58, 120);call #Ultimate.allocInit(58, 121);call #Ultimate.allocInit(58, 122);call #Ultimate.allocInit(54, 123);call #Ultimate.allocInit(56, 124);call #Ultimate.allocInit(58, 125);call #Ultimate.allocInit(58, 126);call #Ultimate.allocInit(58, 127);call #Ultimate.allocInit(54, 128);call #Ultimate.allocInit(56, 129);call #Ultimate.allocInit(58, 130);call #Ultimate.allocInit(58, 131);call #Ultimate.allocInit(58, 132);call #Ultimate.allocInit(54, 133);call #Ultimate.allocInit(56, 134);call #Ultimate.allocInit(58, 135);call #Ultimate.allocInit(58, 136);call #Ultimate.allocInit(58, 137);call #Ultimate.allocInit(54, 138);call #Ultimate.allocInit(56, 139);call #Ultimate.allocInit(58, 140);call #Ultimate.allocInit(58, 141);call #Ultimate.allocInit(58, 142);call #Ultimate.allocInit(54, 143);call #Ultimate.allocInit(56, 144);call #Ultimate.allocInit(58, 145);call #Ultimate.allocInit(58, 146);call #Ultimate.allocInit(58, 147);call #Ultimate.allocInit(54, 148);call #Ultimate.allocInit(56, 149);call #Ultimate.allocInit(58, 150);call #Ultimate.allocInit(58, 151);call #Ultimate.allocInit(58, 152);call #Ultimate.allocInit(54, 153);call #Ultimate.allocInit(56, 154);call #Ultimate.allocInit(58, 155);call #Ultimate.allocInit(58, 156);call #Ultimate.allocInit(58, 157);call #Ultimate.allocInit(57, 158);call #Ultimate.allocInit(57, 159);call #Ultimate.allocInit(57, 160);call #Ultimate.allocInit(57, 161);call #Ultimate.allocInit(57, 162);call #Ultimate.allocInit(57, 163);call #Ultimate.allocInit(57, 164);call #Ultimate.allocInit(57, 165);call #Ultimate.allocInit(57, 166);call #Ultimate.allocInit(57, 167);call #Ultimate.allocInit(57, 168);call #Ultimate.allocInit(57, 169);call #Ultimate.allocInit(57, 170);call #Ultimate.allocInit(2, 171);call write~init~int(48, 171, 0, 1);call write~init~int(0, 171, 1, 1);call #Ultimate.allocInit(70, 172);~#version~0.base, ~#version~0.offset := 173, 0;call #Ultimate.allocInit(70, 173);call write~init~int(115, ~#version~0.base, ~#version~0.offset, 1);call write~init~int(117, ~#version~0.base, 1 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 2 + ~#version~0.offset, 1);call write~init~int(104, ~#version~0.base, 3 + ~#version~0.offset, 1);call write~init~int(109, ~#version~0.base, 4 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 5 + ~#version~0.offset, 1);call write~init~int(46, ~#version~0.base, 6 + ~#version~0.offset, 1);call write~init~int(99, ~#version~0.base, 7 + ~#version~0.offset, 1);call write~init~int(58, ~#version~0.base, 8 + ~#version~0.offset, 1);call write~init~int(118, ~#version~0.base, 9 + ~#version~0.offset, 1);call write~init~int(51, ~#version~0.base, 10 + ~#version~0.offset, 1);call write~init~int(46, ~#version~0.base, 11 + ~#version~0.offset, 1);call write~init~int(49, ~#version~0.base, 12 + ~#version~0.offset, 1);call write~init~int(48, ~#version~0.base, 13 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 14 + ~#version~0.offset, 1);call write~init~int(65, ~#version~0.base, 15 + ~#version~0.offset, 1);call write~init~int(117, ~#version~0.base, 16 + ~#version~0.offset, 1);call write~init~int(103, ~#version~0.base, 17 + ~#version~0.offset, 1);call write~init~int(117, ~#version~0.base, 18 + ~#version~0.offset, 1);call write~init~int(115, ~#version~0.base, 19 + ~#version~0.offset, 1);call write~init~int(116, ~#version~0.base, 20 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 21 + ~#version~0.offset, 1);call write~init~int(50, ~#version~0.base, 22 + ~#version~0.offset, 1);call write~init~int(54, ~#version~0.base, 23 + ~#version~0.offset, 1);call write~init~int(44, ~#version~0.base, 24 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 25 + ~#version~0.offset, 1);call write~init~int(50, ~#version~0.base, 26 + ~#version~0.offset, 1);call write~init~int(48, ~#version~0.base, 27 + ~#version~0.offset, 1);call write~init~int(48, ~#version~0.base, 28 + ~#version~0.offset, 1);call write~init~int(56, ~#version~0.base, 29 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 30 + ~#version~0.offset, 1);call write~init~int(68, ~#version~0.base, 31 + ~#version~0.offset, 1);call write~init~int(97, ~#version~0.base, 32 + ~#version~0.offset, 1);call write~init~int(118, ~#version~0.base, 33 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 34 + ~#version~0.offset, 1);call write~init~int(100, ~#version~0.base, 35 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 36 + ~#version~0.offset, 1);call write~init~int(83, ~#version~0.base, 37 + ~#version~0.offset, 1);call write~init~int(46, ~#version~0.base, 38 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 39 + ~#version~0.offset, 1);call write~init~int(77, ~#version~0.base, 40 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 41 + ~#version~0.offset, 1);call write~init~int(108, ~#version~0.base, 42 + ~#version~0.offset, 1);call write~init~int(108, ~#version~0.base, 43 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 44 + ~#version~0.offset, 1);call write~init~int(114, ~#version~0.base, 45 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 46 + ~#version~0.offset, 1);call write~init~int(40, ~#version~0.base, 47 + ~#version~0.offset, 1);call write~init~int(100, ~#version~0.base, 48 + ~#version~0.offset, 1);call write~init~int(97, ~#version~0.base, 49 + ~#version~0.offset, 1);call write~init~int(118, ~#version~0.base, 50 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 51 + ~#version~0.offset, 1);call write~init~int(109, ~#version~0.base, 52 + ~#version~0.offset, 1);call write~init~int(64, ~#version~0.base, 53 + ~#version~0.offset, 1);call write~init~int(100, ~#version~0.base, 54 + ~#version~0.offset, 1);call write~init~int(97, ~#version~0.base, 55 + ~#version~0.offset, 1);call write~init~int(118, ~#version~0.base, 56 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 57 + ~#version~0.offset, 1);call write~init~int(109, ~#version~0.base, 58 + ~#version~0.offset, 1);call write~init~int(108, ~#version~0.base, 59 + ~#version~0.offset, 1);call write~init~int(111, ~#version~0.base, 60 + ~#version~0.offset, 1);call write~init~int(102, ~#version~0.base, 61 + ~#version~0.offset, 1);call write~init~int(116, ~#version~0.base, 62 + ~#version~0.offset, 1);call write~init~int(46, ~#version~0.base, 63 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 64 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 65 + ~#version~0.offset, 1);call write~init~int(116, ~#version~0.base, 66 + ~#version~0.offset, 1);call write~init~int(41, ~#version~0.base, 67 + ~#version~0.offset, 1);call write~init~int(10, ~#version~0.base, 68 + ~#version~0.offset, 1);call write~init~int(0, ~#version~0.base, 69 + ~#version~0.offset, 1);~#macaddr~0.base, ~#macaddr~0.offset := 174, 0;call #Ultimate.allocInit(24, 174);call write~init~int(0, ~#macaddr~0.base, ~#macaddr~0.offset, 4);call write~init~int(0, ~#macaddr~0.base, 4 + ~#macaddr~0.offset, 4);call write~init~int(0, ~#macaddr~0.base, 8 + ~#macaddr~0.offset, 4);call write~init~int(0, ~#macaddr~0.base, 12 + ~#macaddr~0.offset, 4);call write~init~int(0, ~#macaddr~0.base, 16 + ~#macaddr~0.offset, 4);call write~init~int(0, ~#macaddr~0.base, 20 + ~#macaddr~0.offset, 4);~qfe_pci_list~0.base, ~qfe_pci_list~0.offset := 0, 0;~#hme_ethtool_ops~0.base, ~#hme_ethtool_ops~0.offset := 175, 0;call #Ultimate.allocInit(368, 175);call write~init~$Pointer$(#funAddr~hme_get_settings.base, #funAddr~hme_get_settings.offset, ~#hme_ethtool_ops~0.base, ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hme_set_settings.base, #funAddr~hme_set_settings.offset, ~#hme_ethtool_ops~0.base, 8 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hme_get_drvinfo.base, #funAddr~hme_get_drvinfo.offset, ~#hme_ethtool_ops~0.base, 16 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 24 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 32 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 40 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 48 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 56 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 64 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 72 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hme_get_link.base, #funAddr~hme_get_link.offset, ~#hme_ethtool_ops~0.base, 80 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 88 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 96 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 104 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 112 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 120 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 128 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 136 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 144 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 152 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 160 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 168 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 176 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 184 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 192 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 200 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 208 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 216 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 224 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 232 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 240 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 248 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 256 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 264 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 272 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 280 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 288 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 296 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 304 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 312 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 320 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 328 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 336 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 344 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 352 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 360 + ~#hme_ethtool_ops~0.offset, 8);~hme_version_printed~0 := 0;~#hme_netdev_ops~0.base, ~#hme_netdev_ops~0.offset := 176, 0;call #Ultimate.allocInit(472, 176);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 8 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~happy_meal_open.base, #funAddr~happy_meal_open.offset, ~#hme_netdev_ops~0.base, 16 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~happy_meal_close.base, #funAddr~happy_meal_close.offset, ~#hme_netdev_ops~0.base, 24 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~happy_meal_start_xmit.base, #funAddr~happy_meal_start_xmit.offset, ~#hme_netdev_ops~0.base, 32 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 40 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 48 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~happy_meal_set_multicast.base, #funAddr~happy_meal_set_multicast.offset, ~#hme_netdev_ops~0.base, 56 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_mac_addr.base, #funAddr~eth_mac_addr.offset, ~#hme_netdev_ops~0.base, 64 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_validate_addr.base, #funAddr~eth_validate_addr.offset, ~#hme_netdev_ops~0.base, 72 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 80 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 88 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_change_mtu.base, #funAddr~eth_change_mtu.offset, ~#hme_netdev_ops~0.base, 96 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 104 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~happy_meal_tx_timeout.base, #funAddr~happy_meal_tx_timeout.offset, ~#hme_netdev_ops~0.base, 112 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 120 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~happy_meal_get_stats.base, #funAddr~happy_meal_get_stats.offset, ~#hme_netdev_ops~0.base, 128 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 136 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 144 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 152 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 160 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 168 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 176 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 184 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 192 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 200 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 208 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 216 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 224 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 232 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 240 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 248 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 256 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 264 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 272 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 280 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 288 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 296 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 304 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 312 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 320 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 328 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 336 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 344 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 352 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 360 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 368 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 376 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 384 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 392 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 400 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 408 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 416 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 424 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 432 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 440 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 448 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 456 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 464 + ~#hme_netdev_ops~0.offset, 8);~#happymeal_pci_ids~0.base, ~#happymeal_pci_ids~0.offset := 177, 0;call #Ultimate.allocInit(64, 177);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#happymeal_pci_ids~0.base);call write~unchecked~int(4238, ~#happymeal_pci_ids~0.base, ~#happymeal_pci_ids~0.offset, 4);call write~unchecked~int(4097, ~#happymeal_pci_ids~0.base, 4 + ~#happymeal_pci_ids~0.offset, 4);call write~unchecked~int(4294967295, ~#happymeal_pci_ids~0.base, 8 + ~#happymeal_pci_ids~0.offset, 4);call write~unchecked~int(4294967295, ~#happymeal_pci_ids~0.base, 12 + ~#happymeal_pci_ids~0.offset, 4);call write~unchecked~int(0, ~#happymeal_pci_ids~0.base, 16 + ~#happymeal_pci_ids~0.offset, 4);call write~unchecked~int(0, ~#happymeal_pci_ids~0.base, 20 + ~#happymeal_pci_ids~0.offset, 4);call write~unchecked~int(0, ~#happymeal_pci_ids~0.base, 24 + ~#happymeal_pci_ids~0.offset, 8);~__mod_pci_device_table~0.vendor := 0;~__mod_pci_device_table~0.device := 0;~__mod_pci_device_table~0.subvendor := 0;~__mod_pci_device_table~0.subdevice := 0;~__mod_pci_device_table~0.class := 0;~__mod_pci_device_table~0.class_mask := 0;~__mod_pci_device_table~0.driver_data := 0;~#hme_pci_driver~0.base, ~#hme_pci_driver~0.offset := 178, 0;call #Ultimate.allocInit(301, 178);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 8 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(90, 0, ~#hme_pci_driver~0.base, 16 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(~#happymeal_pci_ids~0.base, ~#happymeal_pci_ids~0.offset, ~#hme_pci_driver~0.base, 24 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~happy_meal_pci_probe.base, #funAddr~happy_meal_pci_probe.offset, ~#hme_pci_driver~0.base, 32 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~happy_meal_pci_remove.base, #funAddr~happy_meal_pci_remove.offset, ~#hme_pci_driver~0.base, 40 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 48 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 56 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 64 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 72 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 80 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 88 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 96 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 104 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 112 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 120 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 128 + ~#hme_pci_driver~0.offset, 8);call write~init~int(0, ~#hme_pci_driver~0.base, 136 + ~#hme_pci_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 137 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 145 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 153 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 161 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 169 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 177 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 185 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 193 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 201 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 209 + ~#hme_pci_driver~0.offset, 8);call write~init~int(0, ~#hme_pci_driver~0.base, 217 + ~#hme_pci_driver~0.offset, 4);call write~init~int(0, ~#hme_pci_driver~0.base, 221 + ~#hme_pci_driver~0.offset, 4);call write~init~int(0, ~#hme_pci_driver~0.base, 225 + ~#hme_pci_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 229 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 237 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 245 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 253 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 261 + ~#hme_pci_driver~0.offset, 8);call write~init~int(0, ~#hme_pci_driver~0.base, 269 + ~#hme_pci_driver~0.offset, 4);call write~init~int(0, ~#hme_pci_driver~0.base, 273 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 285 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 293 + ~#hme_pci_driver~0.offset, 8);~ldv_thread_0~0.identifier := 0;~ldv_thread_0~0.function.base, ~ldv_thread_0~0.function.offset := 0, 0;~ldv_thread_1~0.identifier := 0;~ldv_thread_1~0.function.base, ~ldv_thread_1~0.function.offset := 0, 0;~ldv_thread_14~0.identifier := 0;~ldv_thread_14~0.function.base, ~ldv_thread_14~0.function.offset := 0, 0;~ldv_thread_2~0.identifier := 0;~ldv_thread_2~0.function.base, ~ldv_thread_2~0.function.offset := 0, 0;~ldv_thread_3~0.identifier := 0;~ldv_thread_3~0.function.base, ~ldv_thread_3~0.function.offset := 0, 0;~ldv_thread_4~0.identifier := 0;~ldv_thread_4~0.function.base, ~ldv_thread_4~0.function.offset := 0, 0;~ldv_spin__xmit_lock_of_netdev_queue~0 := 1;~ldv_spin_addr_list_lock_of_net_device~0 := 1;~ldv_spin_alloc_lock_of_task_struct~0 := 1;~ldv_spin_dma_spin_lock~0 := 1;~ldv_spin_happy_lock_of_happy_meal~0 := 1;~ldv_spin_i_lock_of_inode~0 := 1;~ldv_spin_lock~0 := 1;~ldv_spin_lock_of_NOT_ARG_SIGN~0 := 1;~ldv_spin_lru_lock_of_netns_frags~0 := 1;~ldv_spin_node_size_lock_of_pglist_data~0 := 1;~ldv_spin_ptl~0 := 1;~ldv_spin_siglock_of_sighand_struct~0 := 1;~ldv_spin_tx_global_lock_of_net_device~0 := 1; {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} is VALID [2022-02-20 22:54:44,652 INFO L290 TraceCheckUtils]: 1: Hoare triple {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;assume { :begin_inline_ldv_initialize } true; {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} is VALID [2022-02-20 22:54:44,653 INFO L290 TraceCheckUtils]: 2: Hoare triple {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} assume { :end_inline_ldv_initialize } true;assume { :begin_inline_ldv_entry_EMGentry_14 } true;ldv_entry_EMGentry_14_#in~arg0#1.base, ldv_entry_EMGentry_14_#in~arg0#1.offset := 0, 0;havoc ldv_entry_EMGentry_14_#t~ret977#1, ldv_entry_EMGentry_14_#t~ret978#1, ldv_entry_EMGentry_14_#t~ret979#1, ldv_entry_EMGentry_14_#t~ret980#1, ldv_entry_EMGentry_14_~arg0#1.base, ldv_entry_EMGentry_14_~arg0#1.offset, ldv_entry_EMGentry_14_~ldv_14_exit_happy_meal_exit_default~0#1.base, ldv_entry_EMGentry_14_~ldv_14_exit_happy_meal_exit_default~0#1.offset, ldv_entry_EMGentry_14_~ldv_14_init_happy_meal_probe_default~0#1.base, ldv_entry_EMGentry_14_~ldv_14_init_happy_meal_probe_default~0#1.offset, ldv_entry_EMGentry_14_~ldv_14_ret_default~0#1, ldv_entry_EMGentry_14_~tmp~76#1, ldv_entry_EMGentry_14_~tmp___0~40#1;ldv_entry_EMGentry_14_~arg0#1.base, ldv_entry_EMGentry_14_~arg0#1.offset := ldv_entry_EMGentry_14_#in~arg0#1.base, ldv_entry_EMGentry_14_#in~arg0#1.offset;havoc ldv_entry_EMGentry_14_~ldv_14_exit_happy_meal_exit_default~0#1.base, ldv_entry_EMGentry_14_~ldv_14_exit_happy_meal_exit_default~0#1.offset;havoc ldv_entry_EMGentry_14_~ldv_14_init_happy_meal_probe_default~0#1.base, ldv_entry_EMGentry_14_~ldv_14_init_happy_meal_probe_default~0#1.offset;havoc ldv_entry_EMGentry_14_~ldv_14_ret_default~0#1;havoc ldv_entry_EMGentry_14_~tmp~76#1;havoc ldv_entry_EMGentry_14_~tmp___0~40#1;assume { :begin_inline_ldv_EMGentry_init_happy_meal_probe_14_9 } true;ldv_EMGentry_init_happy_meal_probe_14_9_#in~arg0#1.base, ldv_EMGentry_init_happy_meal_probe_14_9_#in~arg0#1.offset := ldv_entry_EMGentry_14_~ldv_14_init_happy_meal_probe_default~0#1.base, ldv_entry_EMGentry_14_~ldv_14_init_happy_meal_probe_default~0#1.offset;havoc ldv_EMGentry_init_happy_meal_probe_14_9_#res#1;havoc ldv_EMGentry_init_happy_meal_probe_14_9_#t~ret960#1, ldv_EMGentry_init_happy_meal_probe_14_9_~arg0#1.base, ldv_EMGentry_init_happy_meal_probe_14_9_~arg0#1.offset, ldv_EMGentry_init_happy_meal_probe_14_9_~tmp~68#1;ldv_EMGentry_init_happy_meal_probe_14_9_~arg0#1.base, ldv_EMGentry_init_happy_meal_probe_14_9_~arg0#1.offset := ldv_EMGentry_init_happy_meal_probe_14_9_#in~arg0#1.base, ldv_EMGentry_init_happy_meal_probe_14_9_#in~arg0#1.offset;havoc ldv_EMGentry_init_happy_meal_probe_14_9_~tmp~68#1;assume { :begin_inline_happy_meal_probe } true;havoc happy_meal_probe_#res#1;havoc happy_meal_probe_#t~ret959#1, happy_meal_probe_~err~1#1;havoc happy_meal_probe_~err~1#1;happy_meal_probe_~err~1#1 := 0; {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} is VALID [2022-02-20 22:54:44,653 INFO L290 TraceCheckUtils]: 3: Hoare triple {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} assume 0 == happy_meal_probe_~err~1#1;assume { :begin_inline_happy_meal_pci_init } true;havoc happy_meal_pci_init_#res#1;havoc happy_meal_pci_init_#t~ret957#1, happy_meal_pci_init_~tmp~67#1;havoc happy_meal_pci_init_~tmp~67#1;assume { :begin_inline_ldv___pci_register_driver_122 } true;ldv___pci_register_driver_122_#in~ldv_func_arg1#1.base, ldv___pci_register_driver_122_#in~ldv_func_arg1#1.offset, ldv___pci_register_driver_122_#in~ldv_func_arg2#1.base, ldv___pci_register_driver_122_#in~ldv_func_arg2#1.offset, ldv___pci_register_driver_122_#in~ldv_func_arg3#1.base, ldv___pci_register_driver_122_#in~ldv_func_arg3#1.offset := ~#hme_pci_driver~0.base, ~#hme_pci_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 91, 0;havoc ldv___pci_register_driver_122_#res#1;havoc ldv___pci_register_driver_122_#t~ret1066#1, ldv___pci_register_driver_122_#t~ret1067#1, ldv___pci_register_driver_122_~ldv_func_arg1#1.base, ldv___pci_register_driver_122_~ldv_func_arg1#1.offset, ldv___pci_register_driver_122_~ldv_func_arg2#1.base, ldv___pci_register_driver_122_~ldv_func_arg2#1.offset, ldv___pci_register_driver_122_~ldv_func_arg3#1.base, ldv___pci_register_driver_122_~ldv_func_arg3#1.offset, ldv___pci_register_driver_122_~ldv_func_res~6#1, ldv___pci_register_driver_122_~tmp~97#1, ldv___pci_register_driver_122_~tmp___0~49#1;ldv___pci_register_driver_122_~ldv_func_arg1#1.base, ldv___pci_register_driver_122_~ldv_func_arg1#1.offset := ldv___pci_register_driver_122_#in~ldv_func_arg1#1.base, ldv___pci_register_driver_122_#in~ldv_func_arg1#1.offset;ldv___pci_register_driver_122_~ldv_func_arg2#1.base, ldv___pci_register_driver_122_~ldv_func_arg2#1.offset := ldv___pci_register_driver_122_#in~ldv_func_arg2#1.base, ldv___pci_register_driver_122_#in~ldv_func_arg2#1.offset;ldv___pci_register_driver_122_~ldv_func_arg3#1.base, ldv___pci_register_driver_122_~ldv_func_arg3#1.offset := ldv___pci_register_driver_122_#in~ldv_func_arg3#1.base, ldv___pci_register_driver_122_#in~ldv_func_arg3#1.offset;havoc ldv___pci_register_driver_122_~ldv_func_res~6#1;havoc ldv___pci_register_driver_122_~tmp~97#1;havoc ldv___pci_register_driver_122_~tmp___0~49#1;assume { :begin_inline___pci_register_driver } true;__pci_register_driver_#in~arg0#1.base, __pci_register_driver_#in~arg0#1.offset, __pci_register_driver_#in~arg1#1.base, __pci_register_driver_#in~arg1#1.offset, __pci_register_driver_#in~arg2#1.base, __pci_register_driver_#in~arg2#1.offset := ldv___pci_register_driver_122_~ldv_func_arg1#1.base, ldv___pci_register_driver_122_~ldv_func_arg1#1.offset, ldv___pci_register_driver_122_~ldv_func_arg2#1.base, ldv___pci_register_driver_122_~ldv_func_arg2#1.offset, ldv___pci_register_driver_122_~ldv_func_arg3#1.base, ldv___pci_register_driver_122_~ldv_func_arg3#1.offset;havoc __pci_register_driver_#res#1;havoc __pci_register_driver_#t~nondet1173#1, __pci_register_driver_~arg0#1.base, __pci_register_driver_~arg0#1.offset, __pci_register_driver_~arg1#1.base, __pci_register_driver_~arg1#1.offset, __pci_register_driver_~arg2#1.base, __pci_register_driver_~arg2#1.offset;__pci_register_driver_~arg0#1.base, __pci_register_driver_~arg0#1.offset := __pci_register_driver_#in~arg0#1.base, __pci_register_driver_#in~arg0#1.offset;__pci_register_driver_~arg1#1.base, __pci_register_driver_~arg1#1.offset := __pci_register_driver_#in~arg1#1.base, __pci_register_driver_#in~arg1#1.offset;__pci_register_driver_~arg2#1.base, __pci_register_driver_~arg2#1.offset := __pci_register_driver_#in~arg2#1.base, __pci_register_driver_#in~arg2#1.offset;assume -2147483648 <= __pci_register_driver_#t~nondet1173#1 && __pci_register_driver_#t~nondet1173#1 <= 2147483647;__pci_register_driver_#res#1 := __pci_register_driver_#t~nondet1173#1;havoc __pci_register_driver_#t~nondet1173#1; {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} is VALID [2022-02-20 22:54:44,653 INFO L290 TraceCheckUtils]: 4: Hoare triple {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} ldv___pci_register_driver_122_#t~ret1066#1 := __pci_register_driver_#res#1;assume { :end_inline___pci_register_driver } true;assume -2147483648 <= ldv___pci_register_driver_122_#t~ret1066#1 && ldv___pci_register_driver_122_#t~ret1066#1 <= 2147483647;ldv___pci_register_driver_122_~tmp~97#1 := ldv___pci_register_driver_122_#t~ret1066#1;havoc ldv___pci_register_driver_122_#t~ret1066#1;ldv___pci_register_driver_122_~ldv_func_res~6#1 := ldv___pci_register_driver_122_~tmp~97#1;assume { :begin_inline_ldv___pci_register_driver } true;ldv___pci_register_driver_#in~arg0#1, ldv___pci_register_driver_#in~arg1#1.base, ldv___pci_register_driver_#in~arg1#1.offset, ldv___pci_register_driver_#in~arg2#1.base, ldv___pci_register_driver_#in~arg2#1.offset, ldv___pci_register_driver_#in~arg3#1.base, ldv___pci_register_driver_#in~arg3#1.offset := ldv___pci_register_driver_122_~ldv_func_res~6#1, ldv___pci_register_driver_122_~ldv_func_arg1#1.base, ldv___pci_register_driver_122_~ldv_func_arg1#1.offset, ldv___pci_register_driver_122_~ldv_func_arg2#1.base, ldv___pci_register_driver_122_~ldv_func_arg2#1.offset, ldv___pci_register_driver_122_~ldv_func_arg3#1.base, ldv___pci_register_driver_122_~ldv_func_arg3#1.offset;havoc ldv___pci_register_driver_#res#1;havoc ldv___pci_register_driver_#t~ret961#1, ldv___pci_register_driver_~arg0#1, ldv___pci_register_driver_~arg1#1.base, ldv___pci_register_driver_~arg1#1.offset, ldv___pci_register_driver_~arg2#1.base, ldv___pci_register_driver_~arg2#1.offset, ldv___pci_register_driver_~arg3#1.base, ldv___pci_register_driver_~arg3#1.offset, ldv___pci_register_driver_~ldv_13_pci_driver_pci_driver~0#1.base, ldv___pci_register_driver_~ldv_13_pci_driver_pci_driver~0#1.offset, ldv___pci_register_driver_~tmp~69#1;ldv___pci_register_driver_~arg0#1 := ldv___pci_register_driver_#in~arg0#1;ldv___pci_register_driver_~arg1#1.base, ldv___pci_register_driver_~arg1#1.offset := ldv___pci_register_driver_#in~arg1#1.base, ldv___pci_register_driver_#in~arg1#1.offset;ldv___pci_register_driver_~arg2#1.base, ldv___pci_register_driver_~arg2#1.offset := ldv___pci_register_driver_#in~arg2#1.base, ldv___pci_register_driver_#in~arg2#1.offset;ldv___pci_register_driver_~arg3#1.base, ldv___pci_register_driver_~arg3#1.offset := ldv___pci_register_driver_#in~arg3#1.base, ldv___pci_register_driver_#in~arg3#1.offset;havoc ldv___pci_register_driver_~ldv_13_pci_driver_pci_driver~0#1.base, ldv___pci_register_driver_~ldv_13_pci_driver_pci_driver~0#1.offset;havoc ldv___pci_register_driver_~tmp~69#1; {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} is VALID [2022-02-20 22:54:44,654 INFO L272 TraceCheckUtils]: 5: Hoare triple {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} call ldv___pci_register_driver_#t~ret961#1 := ldv_undef_int(); {14413#true} is VALID [2022-02-20 22:54:44,654 INFO L290 TraceCheckUtils]: 6: Hoare triple {14413#true} havoc ~tmp~111;assume -2147483648 <= #t~nondet1100 && #t~nondet1100 <= 2147483647;~tmp~111 := #t~nondet1100;havoc #t~nondet1100;#res := ~tmp~111; {14413#true} is VALID [2022-02-20 22:54:44,654 INFO L290 TraceCheckUtils]: 7: Hoare triple {14413#true} assume true; {14413#true} is VALID [2022-02-20 22:54:44,654 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {14413#true} {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} #4937#return; {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} is VALID [2022-02-20 22:54:44,654 INFO L290 TraceCheckUtils]: 9: Hoare triple {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} assume -2147483648 <= ldv___pci_register_driver_#t~ret961#1 && ldv___pci_register_driver_#t~ret961#1 <= 2147483647;ldv___pci_register_driver_~tmp~69#1 := ldv___pci_register_driver_#t~ret961#1;havoc ldv___pci_register_driver_#t~ret961#1; {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} is VALID [2022-02-20 22:54:44,655 INFO L290 TraceCheckUtils]: 10: Hoare triple {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} assume 0 != ldv___pci_register_driver_~tmp~69#1; {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} is VALID [2022-02-20 22:54:44,655 INFO L272 TraceCheckUtils]: 11: Hoare triple {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} call ldv_assume((if 0 == ldv___pci_register_driver_~arg0#1 then 1 else 0)); {14413#true} is VALID [2022-02-20 22:54:44,655 INFO L290 TraceCheckUtils]: 12: Hoare triple {14413#true} ~expression := #in~expression; {14413#true} is VALID [2022-02-20 22:54:44,655 INFO L290 TraceCheckUtils]: 13: Hoare triple {14413#true} assume !(0 == ~expression); {14413#true} is VALID [2022-02-20 22:54:44,655 INFO L290 TraceCheckUtils]: 14: Hoare triple {14413#true} assume true; {14413#true} is VALID [2022-02-20 22:54:44,656 INFO L284 TraceCheckUtils]: 15: Hoare quadruple {14413#true} {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} #4939#return; {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} is VALID [2022-02-20 22:54:44,656 INFO L290 TraceCheckUtils]: 16: Hoare triple {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} ldv___pci_register_driver_~ldv_13_pci_driver_pci_driver~0#1.base, ldv___pci_register_driver_~ldv_13_pci_driver_pci_driver~0#1.offset := ldv___pci_register_driver_~arg1#1.base, ldv___pci_register_driver_~arg1#1.offset;assume { :begin_inline_ldv_dispatch_register_13_2 } true;ldv_dispatch_register_13_2_#in~arg0#1.base, ldv_dispatch_register_13_2_#in~arg0#1.offset := ldv___pci_register_driver_~ldv_13_pci_driver_pci_driver~0#1.base, ldv___pci_register_driver_~ldv_13_pci_driver_pci_driver~0#1.offset;havoc ldv_dispatch_register_13_2_#t~ret966#1.base, ldv_dispatch_register_13_2_#t~ret966#1.offset, ldv_dispatch_register_13_2_~arg0#1.base, ldv_dispatch_register_13_2_~arg0#1.offset, ldv_dispatch_register_13_2_~cf_arg_2~0#1.base, ldv_dispatch_register_13_2_~cf_arg_2~0#1.offset, ldv_dispatch_register_13_2_~tmp~73#1.base, ldv_dispatch_register_13_2_~tmp~73#1.offset;ldv_dispatch_register_13_2_~arg0#1.base, ldv_dispatch_register_13_2_~arg0#1.offset := ldv_dispatch_register_13_2_#in~arg0#1.base, ldv_dispatch_register_13_2_#in~arg0#1.offset;havoc ldv_dispatch_register_13_2_~cf_arg_2~0#1.base, ldv_dispatch_register_13_2_~cf_arg_2~0#1.offset;havoc ldv_dispatch_register_13_2_~tmp~73#1.base, ldv_dispatch_register_13_2_~tmp~73#1.offset; {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} is VALID [2022-02-20 22:54:44,657 INFO L272 TraceCheckUtils]: 17: Hoare triple {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} call ldv_dispatch_register_13_2_#t~ret966#1.base, ldv_dispatch_register_13_2_#t~ret966#1.offset := ldv_xmalloc(16); {14496#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:54:44,657 INFO L290 TraceCheckUtils]: 18: Hoare triple {14496#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~5.base, ~res~5.offset;havoc ~tmp~109.base, ~tmp~109.offset;havoc ~tmp___0~53;call #t~malloc1096.base, #t~malloc1096.offset := #Ultimate.allocOnHeap(~size);~tmp~109.base, ~tmp~109.offset := #t~malloc1096.base, #t~malloc1096.offset;havoc #t~malloc1096.base, #t~malloc1096.offset;~res~5.base, ~res~5.offset := ~tmp~109.base, ~tmp~109.offset; {14413#true} is VALID [2022-02-20 22:54:44,657 INFO L272 TraceCheckUtils]: 19: Hoare triple {14413#true} call ldv_assume((if 0 != (~res~5.base + ~res~5.offset) % 18446744073709551616 then 1 else 0)); {14413#true} is VALID [2022-02-20 22:54:44,657 INFO L290 TraceCheckUtils]: 20: Hoare triple {14413#true} ~expression := #in~expression; {14413#true} is VALID [2022-02-20 22:54:44,657 INFO L290 TraceCheckUtils]: 21: Hoare triple {14413#true} assume !(0 == ~expression); {14413#true} is VALID [2022-02-20 22:54:44,657 INFO L290 TraceCheckUtils]: 22: Hoare triple {14413#true} assume true; {14413#true} is VALID [2022-02-20 22:54:44,657 INFO L284 TraceCheckUtils]: 23: Hoare quadruple {14413#true} {14413#true} #4875#return; {14413#true} is VALID [2022-02-20 22:54:44,657 INFO L272 TraceCheckUtils]: 24: Hoare triple {14413#true} call #t~ret1097 := ldv_is_err(~res~5.base, ~res~5.offset); {14413#true} is VALID [2022-02-20 22:54:44,658 INFO L290 TraceCheckUtils]: 25: Hoare triple {14413#true} ~ptr.base, ~ptr.offset := #in~ptr.base, #in~ptr.offset;#res := (if (~ptr.base + ~ptr.offset) % 18446744073709551616 > 4294967295 then 1 else 0); {14413#true} is VALID [2022-02-20 22:54:44,658 INFO L290 TraceCheckUtils]: 26: Hoare triple {14413#true} assume true; {14413#true} is VALID [2022-02-20 22:54:44,658 INFO L284 TraceCheckUtils]: 27: Hoare quadruple {14413#true} {14413#true} #4877#return; {14413#true} is VALID [2022-02-20 22:54:44,658 INFO L290 TraceCheckUtils]: 28: Hoare triple {14413#true} assume -9223372036854775808 <= #t~ret1097 && #t~ret1097 <= 9223372036854775807;~tmp___0~53 := #t~ret1097;havoc #t~ret1097; {14413#true} is VALID [2022-02-20 22:54:44,658 INFO L272 TraceCheckUtils]: 29: Hoare triple {14413#true} call ldv_assume((if 0 == ~tmp___0~53 then 1 else 0)); {14413#true} is VALID [2022-02-20 22:54:44,658 INFO L290 TraceCheckUtils]: 30: Hoare triple {14413#true} ~expression := #in~expression; {14413#true} is VALID [2022-02-20 22:54:44,658 INFO L290 TraceCheckUtils]: 31: Hoare triple {14413#true} assume !(0 == ~expression); {14413#true} is VALID [2022-02-20 22:54:44,658 INFO L290 TraceCheckUtils]: 32: Hoare triple {14413#true} assume true; {14413#true} is VALID [2022-02-20 22:54:44,658 INFO L284 TraceCheckUtils]: 33: Hoare quadruple {14413#true} {14413#true} #4879#return; {14413#true} is VALID [2022-02-20 22:54:44,659 INFO L290 TraceCheckUtils]: 34: Hoare triple {14413#true} #res.base, #res.offset := ~res~5.base, ~res~5.offset; {14413#true} is VALID [2022-02-20 22:54:44,659 INFO L290 TraceCheckUtils]: 35: Hoare triple {14413#true} assume true; {14413#true} is VALID [2022-02-20 22:54:44,659 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {14413#true} {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} #4941#return; {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} is VALID [2022-02-20 22:54:44,659 INFO L290 TraceCheckUtils]: 37: Hoare triple {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} ldv_dispatch_register_13_2_~tmp~73#1.base, ldv_dispatch_register_13_2_~tmp~73#1.offset := ldv_dispatch_register_13_2_#t~ret966#1.base, ldv_dispatch_register_13_2_#t~ret966#1.offset;havoc ldv_dispatch_register_13_2_#t~ret966#1.base, ldv_dispatch_register_13_2_#t~ret966#1.offset;ldv_dispatch_register_13_2_~cf_arg_2~0#1.base, ldv_dispatch_register_13_2_~cf_arg_2~0#1.offset := ldv_dispatch_register_13_2_~tmp~73#1.base, ldv_dispatch_register_13_2_~tmp~73#1.offset;call write~$Pointer$(ldv_dispatch_register_13_2_~arg0#1.base, ldv_dispatch_register_13_2_~arg0#1.offset, ldv_dispatch_register_13_2_~cf_arg_2~0#1.base, ldv_dispatch_register_13_2_~cf_arg_2~0#1.offset, 8);assume { :begin_inline_ldv_pci_pci_instance_2 } true;ldv_pci_pci_instance_2_#in~arg0#1.base, ldv_pci_pci_instance_2_#in~arg0#1.offset := ldv_dispatch_register_13_2_~cf_arg_2~0#1.base, ldv_dispatch_register_13_2_~cf_arg_2~0#1.offset;havoc ldv_pci_pci_instance_2_#t~mem1007#1.base, ldv_pci_pci_instance_2_#t~mem1007#1.offset, ldv_pci_pci_instance_2_#t~ret1008#1.base, ldv_pci_pci_instance_2_#t~ret1008#1.offset, ldv_pci_pci_instance_2_#t~ret1009#1.base, ldv_pci_pci_instance_2_#t~ret1009#1.offset, ldv_pci_pci_instance_2_#t~ret1010#1, ldv_pci_pci_instance_2_#t~mem1011#1.base, ldv_pci_pci_instance_2_#t~mem1011#1.offset, ldv_pci_pci_instance_2_#t~ret1012#1, ldv_pci_pci_instance_2_#t~ret1013#1, ldv_pci_pci_instance_2_#t~ret1014#1, ldv_pci_pci_instance_2_#t~ret1015#1, ldv_pci_pci_instance_2_#t~mem1016#1.base, ldv_pci_pci_instance_2_#t~mem1016#1.offset, ldv_pci_pci_instance_2_#t~mem1017#1.base, ldv_pci_pci_instance_2_#t~mem1017#1.offset, ldv_pci_pci_instance_2_#t~mem1018#1, ldv_pci_pci_instance_2_#t~ret1019#1, ldv_pci_pci_instance_2_#t~ret1020#1, ldv_pci_pci_instance_2_#t~mem1021#1.base, ldv_pci_pci_instance_2_#t~mem1021#1.offset, ldv_pci_pci_instance_2_#t~mem1022#1.base, ldv_pci_pci_instance_2_#t~mem1022#1.offset, ldv_pci_pci_instance_2_#t~mem1023#1, ldv_pci_pci_instance_2_#t~ret1024#1, ldv_pci_pci_instance_2_#t~ret1025#1, ldv_pci_pci_instance_2_#t~mem1026#1.base, ldv_pci_pci_instance_2_#t~mem1026#1.offset, ldv_pci_pci_instance_2_#t~mem1027#1.base, ldv_pci_pci_instance_2_#t~mem1027#1.offset, ldv_pci_pci_instance_2_#t~mem1028#1.base, ldv_pci_pci_instance_2_#t~mem1028#1.offset, ldv_pci_pci_instance_2_#t~mem1029#1.base, ldv_pci_pci_instance_2_#t~mem1029#1.offset, ldv_pci_pci_instance_2_#t~mem1030#1.base, ldv_pci_pci_instance_2_#t~mem1030#1.offset, ldv_pci_pci_instance_2_#t~mem1031#1.base, ldv_pci_pci_instance_2_#t~mem1031#1.offset, ldv_pci_pci_instance_2_#t~mem1032#1.base, ldv_pci_pci_instance_2_#t~mem1032#1.offset, ldv_pci_pci_instance_2_~arg0#1.base, ldv_pci_pci_instance_2_~arg0#1.offset, ldv_pci_pci_instance_2_~ldv_2_container_pci_driver~0#1.base, ldv_pci_pci_instance_2_~ldv_2_container_pci_driver~0#1.offset, ldv_pci_pci_instance_2_~ldv_2_resource_dev~0#1.base, ldv_pci_pci_instance_2_~ldv_2_resource_dev~0#1.offset, ldv_pci_pci_instance_2_~#ldv_2_resource_pm_message~0#1.base, ldv_pci_pci_instance_2_~#ldv_2_resource_pm_message~0#1.offset, ldv_pci_pci_instance_2_~ldv_2_resource_struct_pci_device_id_ptr~0#1.base, ldv_pci_pci_instance_2_~ldv_2_resource_struct_pci_device_id_ptr~0#1.offset, ldv_pci_pci_instance_2_~ldv_2_ret_default~0#1, ldv_pci_pci_instance_2_~data~2#1.base, ldv_pci_pci_instance_2_~data~2#1.offset, ldv_pci_pci_instance_2_~tmp~83#1.base, ldv_pci_pci_instance_2_~tmp~83#1.offset, ldv_pci_pci_instance_2_~tmp___0~41#1.base, ldv_pci_pci_instance_2_~tmp___0~41#1.offset, ldv_pci_pci_instance_2_~tmp___1~29#1, ldv_pci_pci_instance_2_~tmp___2~19#1, ldv_pci_pci_instance_2_~tmp___3~12#1;ldv_pci_pci_instance_2_~arg0#1.base, ldv_pci_pci_instance_2_~arg0#1.offset := ldv_pci_pci_instance_2_#in~arg0#1.base, ldv_pci_pci_instance_2_#in~arg0#1.offset;havoc ldv_pci_pci_instance_2_~ldv_2_container_pci_driver~0#1.base, ldv_pci_pci_instance_2_~ldv_2_container_pci_driver~0#1.offset;havoc ldv_pci_pci_instance_2_~ldv_2_resource_dev~0#1.base, ldv_pci_pci_instance_2_~ldv_2_resource_dev~0#1.offset;call ldv_pci_pci_instance_2_~#ldv_2_resource_pm_message~0#1.base, ldv_pci_pci_instance_2_~#ldv_2_resource_pm_message~0#1.offset := #Ultimate.allocOnStack(4);havoc ldv_pci_pci_instance_2_~ldv_2_resource_struct_pci_device_id_ptr~0#1.base, ldv_pci_pci_instance_2_~ldv_2_resource_struct_pci_device_id_ptr~0#1.offset;havoc ldv_pci_pci_instance_2_~ldv_2_ret_default~0#1;havoc ldv_pci_pci_instance_2_~data~2#1.base, ldv_pci_pci_instance_2_~data~2#1.offset;havoc ldv_pci_pci_instance_2_~tmp~83#1.base, ldv_pci_pci_instance_2_~tmp~83#1.offset;havoc ldv_pci_pci_instance_2_~tmp___0~41#1.base, ldv_pci_pci_instance_2_~tmp___0~41#1.offset;havoc ldv_pci_pci_instance_2_~tmp___1~29#1;havoc ldv_pci_pci_instance_2_~tmp___2~19#1;havoc ldv_pci_pci_instance_2_~tmp___3~12#1;ldv_pci_pci_instance_2_~data~2#1.base, ldv_pci_pci_instance_2_~data~2#1.offset := ldv_pci_pci_instance_2_~arg0#1.base, ldv_pci_pci_instance_2_~arg0#1.offset;ldv_pci_pci_instance_2_~ldv_2_ret_default~0#1 := 1; {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} is VALID [2022-02-20 22:54:44,660 INFO L290 TraceCheckUtils]: 38: Hoare triple {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} assume !(0 != (ldv_pci_pci_instance_2_~data~2#1.base + ldv_pci_pci_instance_2_~data~2#1.offset) % 18446744073709551616); {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} is VALID [2022-02-20 22:54:44,660 INFO L272 TraceCheckUtils]: 39: Hoare triple {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} call ldv_pci_pci_instance_2_#t~ret1008#1.base, ldv_pci_pci_instance_2_#t~ret1008#1.offset := ldv_xmalloc(2936); {14496#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:54:44,660 INFO L290 TraceCheckUtils]: 40: Hoare triple {14496#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~5.base, ~res~5.offset;havoc ~tmp~109.base, ~tmp~109.offset;havoc ~tmp___0~53;call #t~malloc1096.base, #t~malloc1096.offset := #Ultimate.allocOnHeap(~size);~tmp~109.base, ~tmp~109.offset := #t~malloc1096.base, #t~malloc1096.offset;havoc #t~malloc1096.base, #t~malloc1096.offset;~res~5.base, ~res~5.offset := ~tmp~109.base, ~tmp~109.offset; {14413#true} is VALID [2022-02-20 22:54:44,661 INFO L272 TraceCheckUtils]: 41: Hoare triple {14413#true} call ldv_assume((if 0 != (~res~5.base + ~res~5.offset) % 18446744073709551616 then 1 else 0)); {14413#true} is VALID [2022-02-20 22:54:44,661 INFO L290 TraceCheckUtils]: 42: Hoare triple {14413#true} ~expression := #in~expression; {14413#true} is VALID [2022-02-20 22:54:44,661 INFO L290 TraceCheckUtils]: 43: Hoare triple {14413#true} assume !(0 == ~expression); {14413#true} is VALID [2022-02-20 22:54:44,661 INFO L290 TraceCheckUtils]: 44: Hoare triple {14413#true} assume true; {14413#true} is VALID [2022-02-20 22:54:44,661 INFO L284 TraceCheckUtils]: 45: Hoare quadruple {14413#true} {14413#true} #4875#return; {14413#true} is VALID [2022-02-20 22:54:44,661 INFO L272 TraceCheckUtils]: 46: Hoare triple {14413#true} call #t~ret1097 := ldv_is_err(~res~5.base, ~res~5.offset); {14413#true} is VALID [2022-02-20 22:54:44,661 INFO L290 TraceCheckUtils]: 47: Hoare triple {14413#true} ~ptr.base, ~ptr.offset := #in~ptr.base, #in~ptr.offset;#res := (if (~ptr.base + ~ptr.offset) % 18446744073709551616 > 4294967295 then 1 else 0); {14413#true} is VALID [2022-02-20 22:54:44,661 INFO L290 TraceCheckUtils]: 48: Hoare triple {14413#true} assume true; {14413#true} is VALID [2022-02-20 22:54:44,661 INFO L284 TraceCheckUtils]: 49: Hoare quadruple {14413#true} {14413#true} #4877#return; {14413#true} is VALID [2022-02-20 22:54:44,662 INFO L290 TraceCheckUtils]: 50: Hoare triple {14413#true} assume -9223372036854775808 <= #t~ret1097 && #t~ret1097 <= 9223372036854775807;~tmp___0~53 := #t~ret1097;havoc #t~ret1097; {14413#true} is VALID [2022-02-20 22:54:44,662 INFO L272 TraceCheckUtils]: 51: Hoare triple {14413#true} call ldv_assume((if 0 == ~tmp___0~53 then 1 else 0)); {14413#true} is VALID [2022-02-20 22:54:44,662 INFO L290 TraceCheckUtils]: 52: Hoare triple {14413#true} ~expression := #in~expression; {14413#true} is VALID [2022-02-20 22:54:44,662 INFO L290 TraceCheckUtils]: 53: Hoare triple {14413#true} assume !(0 == ~expression); {14413#true} is VALID [2022-02-20 22:54:44,662 INFO L290 TraceCheckUtils]: 54: Hoare triple {14413#true} assume true; {14413#true} is VALID [2022-02-20 22:54:44,662 INFO L284 TraceCheckUtils]: 55: Hoare quadruple {14413#true} {14413#true} #4879#return; {14413#true} is VALID [2022-02-20 22:54:44,662 INFO L290 TraceCheckUtils]: 56: Hoare triple {14413#true} #res.base, #res.offset := ~res~5.base, ~res~5.offset; {14413#true} is VALID [2022-02-20 22:54:44,662 INFO L290 TraceCheckUtils]: 57: Hoare triple {14413#true} assume true; {14413#true} is VALID [2022-02-20 22:54:44,663 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {14413#true} {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} #4945#return; {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} is VALID [2022-02-20 22:54:44,663 INFO L290 TraceCheckUtils]: 59: Hoare triple {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} ldv_pci_pci_instance_2_~tmp~83#1.base, ldv_pci_pci_instance_2_~tmp~83#1.offset := ldv_pci_pci_instance_2_#t~ret1008#1.base, ldv_pci_pci_instance_2_#t~ret1008#1.offset;havoc ldv_pci_pci_instance_2_#t~ret1008#1.base, ldv_pci_pci_instance_2_#t~ret1008#1.offset;ldv_pci_pci_instance_2_~ldv_2_resource_dev~0#1.base, ldv_pci_pci_instance_2_~ldv_2_resource_dev~0#1.offset := ldv_pci_pci_instance_2_~tmp~83#1.base, ldv_pci_pci_instance_2_~tmp~83#1.offset; {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} is VALID [2022-02-20 22:54:44,664 INFO L272 TraceCheckUtils]: 60: Hoare triple {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} call ldv_pci_pci_instance_2_#t~ret1009#1.base, ldv_pci_pci_instance_2_#t~ret1009#1.offset := ldv_xmalloc(32); {14496#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:54:44,664 INFO L290 TraceCheckUtils]: 61: Hoare triple {14496#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~5.base, ~res~5.offset;havoc ~tmp~109.base, ~tmp~109.offset;havoc ~tmp___0~53;call #t~malloc1096.base, #t~malloc1096.offset := #Ultimate.allocOnHeap(~size);~tmp~109.base, ~tmp~109.offset := #t~malloc1096.base, #t~malloc1096.offset;havoc #t~malloc1096.base, #t~malloc1096.offset;~res~5.base, ~res~5.offset := ~tmp~109.base, ~tmp~109.offset; {14413#true} is VALID [2022-02-20 22:54:44,664 INFO L272 TraceCheckUtils]: 62: Hoare triple {14413#true} call ldv_assume((if 0 != (~res~5.base + ~res~5.offset) % 18446744073709551616 then 1 else 0)); {14413#true} is VALID [2022-02-20 22:54:44,664 INFO L290 TraceCheckUtils]: 63: Hoare triple {14413#true} ~expression := #in~expression; {14413#true} is VALID [2022-02-20 22:54:44,664 INFO L290 TraceCheckUtils]: 64: Hoare triple {14413#true} assume !(0 == ~expression); {14413#true} is VALID [2022-02-20 22:54:44,664 INFO L290 TraceCheckUtils]: 65: Hoare triple {14413#true} assume true; {14413#true} is VALID [2022-02-20 22:54:44,664 INFO L284 TraceCheckUtils]: 66: Hoare quadruple {14413#true} {14413#true} #4875#return; {14413#true} is VALID [2022-02-20 22:54:44,664 INFO L272 TraceCheckUtils]: 67: Hoare triple {14413#true} call #t~ret1097 := ldv_is_err(~res~5.base, ~res~5.offset); {14413#true} is VALID [2022-02-20 22:54:44,664 INFO L290 TraceCheckUtils]: 68: Hoare triple {14413#true} ~ptr.base, ~ptr.offset := #in~ptr.base, #in~ptr.offset;#res := (if (~ptr.base + ~ptr.offset) % 18446744073709551616 > 4294967295 then 1 else 0); {14413#true} is VALID [2022-02-20 22:54:44,664 INFO L290 TraceCheckUtils]: 69: Hoare triple {14413#true} assume true; {14413#true} is VALID [2022-02-20 22:54:44,665 INFO L284 TraceCheckUtils]: 70: Hoare quadruple {14413#true} {14413#true} #4877#return; {14413#true} is VALID [2022-02-20 22:54:44,665 INFO L290 TraceCheckUtils]: 71: Hoare triple {14413#true} assume -9223372036854775808 <= #t~ret1097 && #t~ret1097 <= 9223372036854775807;~tmp___0~53 := #t~ret1097;havoc #t~ret1097; {14413#true} is VALID [2022-02-20 22:54:44,665 INFO L272 TraceCheckUtils]: 72: Hoare triple {14413#true} call ldv_assume((if 0 == ~tmp___0~53 then 1 else 0)); {14413#true} is VALID [2022-02-20 22:54:44,665 INFO L290 TraceCheckUtils]: 73: Hoare triple {14413#true} ~expression := #in~expression; {14413#true} is VALID [2022-02-20 22:54:44,665 INFO L290 TraceCheckUtils]: 74: Hoare triple {14413#true} assume !(0 == ~expression); {14413#true} is VALID [2022-02-20 22:54:44,665 INFO L290 TraceCheckUtils]: 75: Hoare triple {14413#true} assume true; {14413#true} is VALID [2022-02-20 22:54:44,665 INFO L284 TraceCheckUtils]: 76: Hoare quadruple {14413#true} {14413#true} #4879#return; {14413#true} is VALID [2022-02-20 22:54:44,665 INFO L290 TraceCheckUtils]: 77: Hoare triple {14413#true} #res.base, #res.offset := ~res~5.base, ~res~5.offset; {14413#true} is VALID [2022-02-20 22:54:44,665 INFO L290 TraceCheckUtils]: 78: Hoare triple {14413#true} assume true; {14413#true} is VALID [2022-02-20 22:54:44,666 INFO L284 TraceCheckUtils]: 79: Hoare quadruple {14413#true} {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} #4947#return; {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} is VALID [2022-02-20 22:54:44,666 INFO L290 TraceCheckUtils]: 80: Hoare triple {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} ldv_pci_pci_instance_2_~tmp___0~41#1.base, ldv_pci_pci_instance_2_~tmp___0~41#1.offset := ldv_pci_pci_instance_2_#t~ret1009#1.base, ldv_pci_pci_instance_2_#t~ret1009#1.offset;havoc ldv_pci_pci_instance_2_#t~ret1009#1.base, ldv_pci_pci_instance_2_#t~ret1009#1.offset;ldv_pci_pci_instance_2_~ldv_2_resource_struct_pci_device_id_ptr~0#1.base, ldv_pci_pci_instance_2_~ldv_2_resource_struct_pci_device_id_ptr~0#1.offset := ldv_pci_pci_instance_2_~tmp___0~41#1.base, ldv_pci_pci_instance_2_~tmp___0~41#1.offset; {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} is VALID [2022-02-20 22:54:44,666 INFO L272 TraceCheckUtils]: 81: Hoare triple {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} call ldv_pci_pci_instance_2_#t~ret1010#1 := ldv_undef_int(); {14413#true} is VALID [2022-02-20 22:54:44,666 INFO L290 TraceCheckUtils]: 82: Hoare triple {14413#true} havoc ~tmp~111;assume -2147483648 <= #t~nondet1100 && #t~nondet1100 <= 2147483647;~tmp~111 := #t~nondet1100;havoc #t~nondet1100;#res := ~tmp~111; {14413#true} is VALID [2022-02-20 22:54:44,667 INFO L290 TraceCheckUtils]: 83: Hoare triple {14413#true} assume true; {14413#true} is VALID [2022-02-20 22:54:44,667 INFO L284 TraceCheckUtils]: 84: Hoare quadruple {14413#true} {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} #4949#return; {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} is VALID [2022-02-20 22:54:44,667 INFO L290 TraceCheckUtils]: 85: Hoare triple {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} assume -2147483648 <= ldv_pci_pci_instance_2_#t~ret1010#1 && ldv_pci_pci_instance_2_#t~ret1010#1 <= 2147483647;ldv_pci_pci_instance_2_~tmp___2~19#1 := ldv_pci_pci_instance_2_#t~ret1010#1;havoc ldv_pci_pci_instance_2_#t~ret1010#1; {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} is VALID [2022-02-20 22:54:44,667 INFO L290 TraceCheckUtils]: 86: Hoare triple {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} assume 0 != ldv_pci_pci_instance_2_~tmp___2~19#1;assume { :begin_inline_ldv_pre_probe } true; {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} is VALID [2022-02-20 22:54:44,668 INFO L290 TraceCheckUtils]: 87: Hoare triple {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} assume { :end_inline_ldv_pre_probe } true;call ldv_pci_pci_instance_2_#t~mem1011#1.base, ldv_pci_pci_instance_2_#t~mem1011#1.offset := read~$Pointer$(ldv_pci_pci_instance_2_~ldv_2_container_pci_driver~0#1.base, 32 + ldv_pci_pci_instance_2_~ldv_2_container_pci_driver~0#1.offset, 8);assume { :begin_inline_ldv_pci_instance_probe_2_17 } true;ldv_pci_instance_probe_2_17_#in~arg0#1.base, ldv_pci_instance_probe_2_17_#in~arg0#1.offset, ldv_pci_instance_probe_2_17_#in~arg1#1.base, ldv_pci_instance_probe_2_17_#in~arg1#1.offset, ldv_pci_instance_probe_2_17_#in~arg2#1.base, ldv_pci_instance_probe_2_17_#in~arg2#1.offset := ldv_pci_pci_instance_2_#t~mem1011#1.base, ldv_pci_pci_instance_2_#t~mem1011#1.offset, ldv_pci_pci_instance_2_~ldv_2_resource_dev~0#1.base, ldv_pci_pci_instance_2_~ldv_2_resource_dev~0#1.offset, ldv_pci_pci_instance_2_~ldv_2_resource_struct_pci_device_id_ptr~0#1.base, ldv_pci_pci_instance_2_~ldv_2_resource_struct_pci_device_id_ptr~0#1.offset;havoc ldv_pci_instance_probe_2_17_#res#1;havoc ldv_pci_instance_probe_2_17_#t~ret993#1, ldv_pci_instance_probe_2_17_~arg0#1.base, ldv_pci_instance_probe_2_17_~arg0#1.offset, ldv_pci_instance_probe_2_17_~arg1#1.base, ldv_pci_instance_probe_2_17_~arg1#1.offset, ldv_pci_instance_probe_2_17_~arg2#1.base, ldv_pci_instance_probe_2_17_~arg2#1.offset, ldv_pci_instance_probe_2_17_~tmp~80#1;ldv_pci_instance_probe_2_17_~arg0#1.base, ldv_pci_instance_probe_2_17_~arg0#1.offset := ldv_pci_instance_probe_2_17_#in~arg0#1.base, ldv_pci_instance_probe_2_17_#in~arg0#1.offset;ldv_pci_instance_probe_2_17_~arg1#1.base, ldv_pci_instance_probe_2_17_~arg1#1.offset := ldv_pci_instance_probe_2_17_#in~arg1#1.base, ldv_pci_instance_probe_2_17_#in~arg1#1.offset;ldv_pci_instance_probe_2_17_~arg2#1.base, ldv_pci_instance_probe_2_17_~arg2#1.offset := ldv_pci_instance_probe_2_17_#in~arg2#1.base, ldv_pci_instance_probe_2_17_#in~arg2#1.offset;havoc ldv_pci_instance_probe_2_17_~tmp~80#1;assume { :begin_inline_happy_meal_pci_probe } true;happy_meal_pci_probe_#in~pdev#1.base, happy_meal_pci_probe_#in~pdev#1.offset, happy_meal_pci_probe_#in~ent#1.base, happy_meal_pci_probe_#in~ent#1.offset := ldv_pci_instance_probe_2_17_~arg1#1.base, ldv_pci_instance_probe_2_17_~arg1#1.offset, ldv_pci_instance_probe_2_17_~arg2#1.base, ldv_pci_instance_probe_2_17_~arg2#1.offset;havoc happy_meal_pci_probe_#res#1;havoc happy_meal_pci_probe_#t~ret897#1, happy_meal_pci_probe_#t~strcpy~res898#1.base, happy_meal_pci_probe_#t~strcpy~res898#1.offset, happy_meal_pci_probe_#t~strcpy~res899#1.base, happy_meal_pci_probe_#t~strcpy~res899#1.offset, happy_meal_pci_probe_#t~ret900#1, happy_meal_pci_probe_#t~nondet901#1, happy_meal_pci_probe_#t~nondet902#1, happy_meal_pci_probe_#t~ret903#1.base, happy_meal_pci_probe_#t~ret903#1.offset, happy_meal_pci_probe_#t~mem904#1.base, happy_meal_pci_probe_#t~mem904#1.offset, happy_meal_pci_probe_#t~ret905#1.base, happy_meal_pci_probe_#t~ret905#1.offset, happy_meal_pci_probe_#t~nondet906#1, happy_meal_pci_probe_#t~ret907#1.base, happy_meal_pci_probe_#t~ret907#1.offset, happy_meal_pci_probe_#t~ret908#1.base, happy_meal_pci_probe_#t~ret908#1.offset, happy_meal_pci_probe_#t~mem909#1, happy_meal_pci_probe_#t~mem910#1, happy_meal_pci_probe_#t~nondet911#1, happy_meal_pci_probe_#t~ret912#1, happy_meal_pci_probe_#t~nondet913#1, happy_meal_pci_probe_#t~ret914#1.base, happy_meal_pci_probe_#t~ret914#1.offset, happy_meal_pci_probe_#t~nondet915#1, happy_meal_pci_probe_#t~mem916#1, happy_meal_pci_probe_#t~mem917#1.base, happy_meal_pci_probe_#t~mem917#1.offset, happy_meal_pci_probe_#t~mem918#1, happy_meal_pci_probe_#t~mem919#1, happy_meal_pci_probe_#t~mem920#1.base, happy_meal_pci_probe_#t~mem920#1.offset, happy_meal_pci_probe_#t~mem921#1, happy_meal_pci_probe_#t~mem922#1, happy_meal_pci_probe_#t~mem923#1, happy_meal_pci_probe_#t~short924#1, happy_meal_pci_probe_#t~mem925#1, happy_meal_pci_probe_#t~mem926#1, happy_meal_pci_probe_#t~ret927#1.base, happy_meal_pci_probe_#t~ret927#1.offset, happy_meal_pci_probe_#t~mem928#1.base, happy_meal_pci_probe_#t~mem928#1.offset, happy_meal_pci_probe_#t~mem929#1, happy_meal_pci_probe_#t~mem930#1, happy_meal_pci_probe_#t~mem931#1, happy_meal_pci_probe_#t~mem932#1.base, happy_meal_pci_probe_#t~mem932#1.offset, happy_meal_pci_probe_#t~ret933#1, happy_meal_pci_probe_#t~nondet934#1, happy_meal_pci_probe_#t~mem935#1.base, happy_meal_pci_probe_#t~mem935#1.offset, happy_meal_pci_probe_#t~ret936#1, happy_meal_pci_probe_#t~ret937#1, happy_meal_pci_probe_#t~nondet938#1, happy_meal_pci_probe_#t~nondet939#1, happy_meal_pci_probe_#t~mem940#1, happy_meal_pci_probe_#t~nondet941#1, happy_meal_pci_probe_#t~nondet942#1, happy_meal_pci_probe_#t~mem943#1, happy_meal_pci_probe_#t~mem944#1, happy_meal_pci_probe_#t~nondet945#1, happy_meal_pci_probe_#t~nondet946#1, happy_meal_pci_probe_#t~nondet947#1, happy_meal_pci_probe_#t~mem948#1.base, happy_meal_pci_probe_#t~mem948#1.offset, happy_meal_pci_probe_#t~mem949#1.base, happy_meal_pci_probe_#t~mem949#1.offset, happy_meal_pci_probe_~pdev#1.base, happy_meal_pci_probe_~pdev#1.offset, happy_meal_pci_probe_~ent#1.base, happy_meal_pci_probe_~ent#1.offset, happy_meal_pci_probe_~qp~1#1.base, happy_meal_pci_probe_~qp~1#1.offset, happy_meal_pci_probe_~hp~12#1.base, happy_meal_pci_probe_~hp~12#1.offset, happy_meal_pci_probe_~dev~2#1.base, happy_meal_pci_probe_~dev~2#1.offset, happy_meal_pci_probe_~hpreg_base~0#1.base, happy_meal_pci_probe_~hpreg_base~0#1.offset, happy_meal_pci_probe_~hpreg_res~0#1, happy_meal_pci_probe_~i~6#1, happy_meal_pci_probe_~qfe_slot~0#1, happy_meal_pci_probe_~#prom_name~0#1.base, happy_meal_pci_probe_~#prom_name~0#1.offset, happy_meal_pci_probe_~err~0#1, happy_meal_pci_probe_~tmp~65#1, happy_meal_pci_probe_~tmp___0~38#1, happy_meal_pci_probe_~tmp___1~28#1, happy_meal_pci_probe_~tmp___2~18#1, happy_meal_pci_probe_~tmp___3~11#1, happy_meal_pci_probe_~tmp___4~8#1.base, happy_meal_pci_probe_~tmp___4~8#1.offset, happy_meal_pci_probe_~#__key~0#1.base, happy_meal_pci_probe_~#__key~0#1.offset, happy_meal_pci_probe_~tmp___5~5#1, happy_meal_pci_probe_~tmp___6~4#1.base, happy_meal_pci_probe_~tmp___6~4#1.offset, happy_meal_pci_probe_~#__key___0~0#1.base, happy_meal_pci_probe_~#__key___0~0#1.offset, happy_meal_pci_probe_~qpdev~1#1.base, happy_meal_pci_probe_~qpdev~1#1.offset, happy_meal_pci_probe_~i___0~0#1, happy_meal_pci_probe_~tmp___7~3#1, happy_meal_pci_probe_~tmp___8~2#1;happy_meal_pci_probe_~pdev#1.base, happy_meal_pci_probe_~pdev#1.offset := happy_meal_pci_probe_#in~pdev#1.base, happy_meal_pci_probe_#in~pdev#1.offset;happy_meal_pci_probe_~ent#1.base, happy_meal_pci_probe_~ent#1.offset := happy_meal_pci_probe_#in~ent#1.base, happy_meal_pci_probe_#in~ent#1.offset;havoc happy_meal_pci_probe_~qp~1#1.base, happy_meal_pci_probe_~qp~1#1.offset;havoc happy_meal_pci_probe_~hp~12#1.base, happy_meal_pci_probe_~hp~12#1.offset;havoc happy_meal_pci_probe_~dev~2#1.base, happy_meal_pci_probe_~dev~2#1.offset;havoc happy_meal_pci_probe_~hpreg_base~0#1.base, happy_meal_pci_probe_~hpreg_base~0#1.offset;havoc happy_meal_pci_probe_~hpreg_res~0#1;havoc happy_meal_pci_probe_~i~6#1;havoc happy_meal_pci_probe_~qfe_slot~0#1;call happy_meal_pci_probe_~#prom_name~0#1.base, happy_meal_pci_probe_~#prom_name~0#1.offset := #Ultimate.allocOnStack(64);havoc happy_meal_pci_probe_~err~0#1;havoc happy_meal_pci_probe_~tmp~65#1;havoc happy_meal_pci_probe_~tmp___0~38#1;havoc happy_meal_pci_probe_~tmp___1~28#1;havoc happy_meal_pci_probe_~tmp___2~18#1;havoc happy_meal_pci_probe_~tmp___3~11#1;havoc happy_meal_pci_probe_~tmp___4~8#1.base, happy_meal_pci_probe_~tmp___4~8#1.offset;call happy_meal_pci_probe_~#__key~0#1.base, happy_meal_pci_probe_~#__key~0#1.offset := #Ultimate.allocOnStack(8);havoc happy_meal_pci_probe_~tmp___5~5#1;havoc happy_meal_pci_probe_~tmp___6~4#1.base, happy_meal_pci_probe_~tmp___6~4#1.offset;call happy_meal_pci_probe_~#__key___0~0#1.base, happy_meal_pci_probe_~#__key___0~0#1.offset := #Ultimate.allocOnStack(8);havoc happy_meal_pci_probe_~qpdev~1#1.base, happy_meal_pci_probe_~qpdev~1#1.offset;havoc happy_meal_pci_probe_~i___0~0#1;havoc happy_meal_pci_probe_~tmp___7~3#1;havoc happy_meal_pci_probe_~tmp___8~2#1;happy_meal_pci_probe_~qp~1#1.base, happy_meal_pci_probe_~qp~1#1.offset := 0, 0;happy_meal_pci_probe_~qfe_slot~0#1 := -1; {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} is VALID [2022-02-20 22:54:44,668 INFO L272 TraceCheckUtils]: 88: Hoare triple {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} call happy_meal_pci_probe_#t~ret897#1 := is_quattro_p(happy_meal_pci_probe_~pdev#1.base, happy_meal_pci_probe_~pdev#1.offset); {14413#true} is VALID [2022-02-20 22:54:44,668 INFO L290 TraceCheckUtils]: 89: Hoare triple {14413#true} ~pdev.base, ~pdev.offset := #in~pdev.base, #in~pdev.offset;havoc ~busdev~0.base, ~busdev~0.offset;havoc ~this_pdev~0.base, ~this_pdev~0.offset;havoc ~n_hmes~0;havoc ~__mptr~2.base, ~__mptr~2.offset;havoc ~__mptr___0~2.base, ~__mptr___0~2.offset;call #t~mem873.base, #t~mem873.offset := read~$Pointer$(~pdev.base, 16 + ~pdev.offset, 8);call #t~mem874.base, #t~mem874.offset := read~$Pointer$(#t~mem873.base, 56 + #t~mem873.offset, 8);~busdev~0.base, ~busdev~0.offset := #t~mem874.base, #t~mem874.offset;havoc #t~mem873.base, #t~mem873.offset;havoc #t~mem874.base, #t~mem874.offset;#t~short876 := 0 == (~busdev~0.base + ~busdev~0.offset) % 18446744073709551616; {14413#true} is VALID [2022-02-20 22:54:44,668 INFO L290 TraceCheckUtils]: 90: Hoare triple {14413#true} assume #t~short876; {14413#true} is VALID [2022-02-20 22:54:44,668 INFO L290 TraceCheckUtils]: 91: Hoare triple {14413#true} assume #t~short876;havoc #t~mem875;havoc #t~short876;#res := 0; {14413#true} is VALID [2022-02-20 22:54:44,668 INFO L290 TraceCheckUtils]: 92: Hoare triple {14413#true} assume true; {14413#true} is VALID [2022-02-20 22:54:44,669 INFO L284 TraceCheckUtils]: 93: Hoare quadruple {14413#true} {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} #4951#return; {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} is VALID [2022-02-20 22:54:44,669 INFO L290 TraceCheckUtils]: 94: Hoare triple {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} assume -2147483648 <= happy_meal_pci_probe_#t~ret897#1 && happy_meal_pci_probe_#t~ret897#1 <= 2147483647;happy_meal_pci_probe_~tmp~65#1 := happy_meal_pci_probe_#t~ret897#1;havoc happy_meal_pci_probe_#t~ret897#1; {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} is VALID [2022-02-20 22:54:44,670 INFO L290 TraceCheckUtils]: 95: Hoare triple {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} assume !(0 != happy_meal_pci_probe_~tmp~65#1); {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} is VALID [2022-02-20 22:54:44,670 INFO L272 TraceCheckUtils]: 96: Hoare triple {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} call happy_meal_pci_probe_#t~strcpy~res899#1.base, happy_meal_pci_probe_#t~strcpy~res899#1.offset := #Ultimate.C_strcpy(happy_meal_pci_probe_~#prom_name~0#1.base, happy_meal_pci_probe_~#prom_name~0#1.offset, 71, 0); {14530#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:54:44,670 INFO L290 TraceCheckUtils]: 97: Hoare triple {14530#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~offset1215 := 0; {14413#true} is VALID [2022-02-20 22:54:44,671 INFO L290 TraceCheckUtils]: 98: Hoare triple {14413#true} call #t~mem1216 := read~int(src.base, src.offset + #t~offset1215, 1);call write~unchecked~int(#t~mem1216, dest.base, dest.offset + #t~offset1215, 1); {14413#true} is VALID [2022-02-20 22:54:44,671 INFO L290 TraceCheckUtils]: 99: Hoare triple {14413#true} assume 0 == #t~mem1216; {14413#true} is VALID [2022-02-20 22:54:44,671 INFO L290 TraceCheckUtils]: 100: Hoare triple {14413#true} assume #res.base == dest.base && #res.offset == dest.offset; {14413#true} is VALID [2022-02-20 22:54:44,671 INFO L284 TraceCheckUtils]: 101: Hoare quadruple {14413#true} {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} #4955#return; {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} is VALID [2022-02-20 22:54:44,672 INFO L290 TraceCheckUtils]: 102: Hoare triple {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} havoc happy_meal_pci_probe_#t~strcpy~res899#1.base, happy_meal_pci_probe_#t~strcpy~res899#1.offset; {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} is VALID [2022-02-20 22:54:44,672 INFO L290 TraceCheckUtils]: 103: Hoare triple {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} happy_meal_pci_probe_~err~0#1 := -19;assume { :begin_inline_pci_enable_device } true;pci_enable_device_#in~arg0#1.base, pci_enable_device_#in~arg0#1.offset := happy_meal_pci_probe_~pdev#1.base, happy_meal_pci_probe_~pdev#1.offset;havoc pci_enable_device_#res#1;havoc pci_enable_device_#t~nondet1186#1, pci_enable_device_~arg0#1.base, pci_enable_device_~arg0#1.offset;pci_enable_device_~arg0#1.base, pci_enable_device_~arg0#1.offset := pci_enable_device_#in~arg0#1.base, pci_enable_device_#in~arg0#1.offset;assume -2147483648 <= pci_enable_device_#t~nondet1186#1 && pci_enable_device_#t~nondet1186#1 <= 2147483647;pci_enable_device_#res#1 := pci_enable_device_#t~nondet1186#1;havoc pci_enable_device_#t~nondet1186#1; {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} is VALID [2022-02-20 22:54:44,672 INFO L290 TraceCheckUtils]: 104: Hoare triple {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} happy_meal_pci_probe_#t~ret900#1 := pci_enable_device_#res#1;assume { :end_inline_pci_enable_device } true;assume -2147483648 <= happy_meal_pci_probe_#t~ret900#1 && happy_meal_pci_probe_#t~ret900#1 <= 2147483647;happy_meal_pci_probe_~tmp___0~38#1 := happy_meal_pci_probe_#t~ret900#1;havoc happy_meal_pci_probe_#t~ret900#1; {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} is VALID [2022-02-20 22:54:44,672 INFO L290 TraceCheckUtils]: 105: Hoare triple {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} assume !(0 != happy_meal_pci_probe_~tmp___0~38#1);assume { :begin_inline_pci_set_master } true;pci_set_master_#in~arg0#1.base, pci_set_master_#in~arg0#1.offset := happy_meal_pci_probe_~pdev#1.base, happy_meal_pci_probe_~pdev#1.offset;havoc pci_set_master_~arg0#1.base, pci_set_master_~arg0#1.offset;pci_set_master_~arg0#1.base, pci_set_master_~arg0#1.offset := pci_set_master_#in~arg0#1.base, pci_set_master_#in~arg0#1.offset; {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} is VALID [2022-02-20 22:54:44,673 INFO L290 TraceCheckUtils]: 106: Hoare triple {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} assume { :end_inline_pci_set_master } true;happy_meal_pci_probe_~tmp___1~28#1 := happy_meal_pci_probe_#t~nondet901#1;havoc happy_meal_pci_probe_#t~nondet901#1; {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} is VALID [2022-02-20 22:54:44,673 INFO L290 TraceCheckUtils]: 107: Hoare triple {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} assume 0 == happy_meal_pci_probe_~tmp___1~28#1; {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} is VALID [2022-02-20 22:54:44,673 INFO L290 TraceCheckUtils]: 108: Hoare triple {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} assume { :begin_inline_quattro_pci_find } true;quattro_pci_find_#in~pdev#1.base, quattro_pci_find_#in~pdev#1.offset := happy_meal_pci_probe_~pdev#1.base, happy_meal_pci_probe_~pdev#1.offset;havoc quattro_pci_find_#res#1.base, quattro_pci_find_#res#1.offset;havoc quattro_pci_find_#t~mem868#1.base, quattro_pci_find_#t~mem868#1.offset, quattro_pci_find_#t~mem869#1.base, quattro_pci_find_#t~mem869#1.offset, quattro_pci_find_#t~mem870#1.base, quattro_pci_find_#t~mem870#1.offset, quattro_pci_find_#t~mem871#1.base, quattro_pci_find_#t~mem871#1.offset, quattro_pci_find_#t~ret872#1.base, quattro_pci_find_#t~ret872#1.offset, quattro_pci_find_~pdev#1.base, quattro_pci_find_~pdev#1.offset, quattro_pci_find_~bdev~0#1.base, quattro_pci_find_~bdev~0#1.offset, quattro_pci_find_~qp~0#1.base, quattro_pci_find_~qp~0#1.offset, quattro_pci_find_~qpdev~0#1.base, quattro_pci_find_~qpdev~0#1.offset, quattro_pci_find_~tmp~62#1.base, quattro_pci_find_~tmp~62#1.offset, quattro_pci_find_~i~4#1;quattro_pci_find_~pdev#1.base, quattro_pci_find_~pdev#1.offset := quattro_pci_find_#in~pdev#1.base, quattro_pci_find_#in~pdev#1.offset;havoc quattro_pci_find_~bdev~0#1.base, quattro_pci_find_~bdev~0#1.offset;havoc quattro_pci_find_~qp~0#1.base, quattro_pci_find_~qp~0#1.offset;havoc quattro_pci_find_~qpdev~0#1.base, quattro_pci_find_~qpdev~0#1.offset;havoc quattro_pci_find_~tmp~62#1.base, quattro_pci_find_~tmp~62#1.offset;havoc quattro_pci_find_~i~4#1;call quattro_pci_find_#t~mem868#1.base, quattro_pci_find_#t~mem868#1.offset := read~$Pointer$(quattro_pci_find_~pdev#1.base, 16 + quattro_pci_find_~pdev#1.offset, 8);call quattro_pci_find_#t~mem869#1.base, quattro_pci_find_#t~mem869#1.offset := read~$Pointer$(quattro_pci_find_#t~mem868#1.base, 56 + quattro_pci_find_#t~mem868#1.offset, 8);quattro_pci_find_~bdev~0#1.base, quattro_pci_find_~bdev~0#1.offset := quattro_pci_find_#t~mem869#1.base, quattro_pci_find_#t~mem869#1.offset;havoc quattro_pci_find_#t~mem868#1.base, quattro_pci_find_#t~mem868#1.offset;havoc quattro_pci_find_#t~mem869#1.base, quattro_pci_find_#t~mem869#1.offset; {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} is VALID [2022-02-20 22:54:44,674 INFO L290 TraceCheckUtils]: 109: Hoare triple {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} assume !(0 == (quattro_pci_find_~bdev~0#1.base + quattro_pci_find_~bdev~0#1.offset) % 18446744073709551616);quattro_pci_find_~qp~0#1.base, quattro_pci_find_~qp~0#1.offset := ~qfe_pci_list~0.base, ~qfe_pci_list~0.offset; {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} is VALID [2022-02-20 22:54:44,674 INFO L290 TraceCheckUtils]: 110: Hoare triple {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} assume !(0 != (quattro_pci_find_~qp~0#1.base + quattro_pci_find_~qp~0#1.offset) % 18446744073709551616);assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := 56, 208;havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret1049#1.base, kmalloc_#t~ret1049#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~res~1#1.base, kmalloc_~res~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~res~1#1.base, kmalloc_~res~1#1.offset; {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} is VALID [2022-02-20 22:54:44,674 INFO L272 TraceCheckUtils]: 111: Hoare triple {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} call ldv_check_alloc_flags(kmalloc_~flags#1); {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} is VALID [2022-02-20 22:54:44,675 INFO L290 TraceCheckUtils]: 112: Hoare triple {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} ~flags#1 := #in~flags#1;havoc ~tmp~98#1; {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} is VALID [2022-02-20 22:54:44,675 INFO L290 TraceCheckUtils]: 113: Hoare triple {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} assume 32 != ~flags#1 % 4294967296 && 0 != ~flags#1 % 4294967296; {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} is VALID [2022-02-20 22:54:44,675 INFO L272 TraceCheckUtils]: 114: Hoare triple {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} call #t~ret1068#1 := ldv_exclusive_spin_is_locked(); {14413#true} is VALID [2022-02-20 22:54:44,675 INFO L290 TraceCheckUtils]: 115: Hoare triple {14413#true} assume 2 == ~ldv_spin__xmit_lock_of_netdev_queue~0;#res := 1; {14531#(<= 2 ~ldv_spin__xmit_lock_of_netdev_queue~0)} is VALID [2022-02-20 22:54:44,676 INFO L290 TraceCheckUtils]: 116: Hoare triple {14531#(<= 2 ~ldv_spin__xmit_lock_of_netdev_queue~0)} assume true; {14531#(<= 2 ~ldv_spin__xmit_lock_of_netdev_queue~0)} is VALID [2022-02-20 22:54:44,676 INFO L284 TraceCheckUtils]: 117: Hoare quadruple {14531#(<= 2 ~ldv_spin__xmit_lock_of_netdev_queue~0)} {14415#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)} #4613#return; {14414#false} is VALID [2022-02-20 22:54:44,676 INFO L290 TraceCheckUtils]: 118: Hoare triple {14414#false} assume -2147483648 <= #t~ret1068#1 && #t~ret1068#1 <= 2147483647;~tmp~98#1 := #t~ret1068#1;havoc #t~ret1068#1;assume { :begin_inline_ldv_assert_linux_alloc_spinlock__wrong_flags } true;ldv_assert_linux_alloc_spinlock__wrong_flags_#in~expr#1 := (if 0 == ~tmp~98#1 then 1 else 0);havoc ldv_assert_linux_alloc_spinlock__wrong_flags_~expr#1;ldv_assert_linux_alloc_spinlock__wrong_flags_~expr#1 := ldv_assert_linux_alloc_spinlock__wrong_flags_#in~expr#1; {14414#false} is VALID [2022-02-20 22:54:44,676 INFO L290 TraceCheckUtils]: 119: Hoare triple {14414#false} assume 0 == ldv_assert_linux_alloc_spinlock__wrong_flags_~expr#1; {14414#false} is VALID [2022-02-20 22:54:44,676 INFO L290 TraceCheckUtils]: 120: Hoare triple {14414#false} assume !false; {14414#false} is VALID [2022-02-20 22:54:44,677 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 120 trivial. 0 not checked. [2022-02-20 22:54:44,677 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:54:44,677 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [735888265] [2022-02-20 22:54:44,677 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [735888265] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:54:44,677 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 22:54:44,677 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-02-20 22:54:44,677 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1594680099] [2022-02-20 22:54:44,678 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:54:44,679 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 8.666666666666666) internal successors, (52), 4 states have internal predecessors, (52), 2 states have call successors, (13), 4 states have call predecessors, (13), 2 states have return successors, (12), 3 states have call predecessors, (12), 2 states have call successors, (12) Word has length 121 [2022-02-20 22:54:44,679 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:54:44,679 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 8.666666666666666) internal successors, (52), 4 states have internal predecessors, (52), 2 states have call successors, (13), 4 states have call predecessors, (13), 2 states have return successors, (12), 3 states have call predecessors, (12), 2 states have call successors, (12) [2022-02-20 22:54:44,750 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 77 edges. 77 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:54:44,751 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-02-20 22:54:44,751 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:54:44,751 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-02-20 22:54:44,751 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-02-20 22:54:44,752 INFO L87 Difference]: Start difference. First operand 1809 states and 2554 transitions. Second operand has 6 states, 6 states have (on average 8.666666666666666) internal successors, (52), 4 states have internal predecessors, (52), 2 states have call successors, (13), 4 states have call predecessors, (13), 2 states have return successors, (12), 3 states have call predecessors, (12), 2 states have call successors, (12) [2022-02-20 22:55:02,141 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:55:02,142 INFO L93 Difference]: Finished difference Result 3723 states and 5283 transitions. [2022-02-20 22:55:02,142 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-02-20 22:55:02,142 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 8.666666666666666) internal successors, (52), 4 states have internal predecessors, (52), 2 states have call successors, (13), 4 states have call predecessors, (13), 2 states have return successors, (12), 3 states have call predecessors, (12), 2 states have call successors, (12) Word has length 121 [2022-02-20 22:55:02,144 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 22:55:02,145 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 8.666666666666666) internal successors, (52), 4 states have internal predecessors, (52), 2 states have call successors, (13), 4 states have call predecessors, (13), 2 states have return successors, (12), 3 states have call predecessors, (12), 2 states have call successors, (12) [2022-02-20 22:55:02,414 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 5283 transitions. [2022-02-20 22:55:02,414 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 8.666666666666666) internal successors, (52), 4 states have internal predecessors, (52), 2 states have call successors, (13), 4 states have call predecessors, (13), 2 states have return successors, (12), 3 states have call predecessors, (12), 2 states have call successors, (12) [2022-02-20 22:55:02,676 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 5283 transitions. [2022-02-20 22:55:02,676 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states and 5283 transitions. [2022-02-20 22:55:05,610 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 5283 edges. 5283 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:55:05,783 INFO L225 Difference]: With dead ends: 3723 [2022-02-20 22:55:05,783 INFO L226 Difference]: Without dead ends: 1934 [2022-02-20 22:55:05,791 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 37 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2022-02-20 22:55:05,792 INFO L933 BasicCegarLoop]: 2248 mSDtfsCounter, 3124 mSDsluCounter, 2610 mSDsCounter, 0 mSdLazyCounter, 3087 mSolverCounterSat, 1932 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 5.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3399 SdHoareTripleChecker+Valid, 4858 SdHoareTripleChecker+Invalid, 5019 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1932 IncrementalHoareTripleChecker+Valid, 3087 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 5.5s IncrementalHoareTripleChecker+Time [2022-02-20 22:55:05,792 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [3399 Valid, 4858 Invalid, 5019 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1932 Valid, 3087 Invalid, 0 Unknown, 0 Unchecked, 5.5s Time] [2022-02-20 22:55:05,794 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1934 states. [2022-02-20 22:55:05,845 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1934 to 1809. [2022-02-20 22:55:05,845 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 22:55:05,848 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1934 states. Second operand has 1809 states, 1242 states have (on average 1.2818035426731078) internal successors, (1592), 1286 states have internal predecessors, (1592), 481 states have call successors, (481), 85 states have call predecessors, (481), 85 states have return successors, (480), 466 states have call predecessors, (480), 480 states have call successors, (480) [2022-02-20 22:55:05,851 INFO L74 IsIncluded]: Start isIncluded. First operand 1934 states. Second operand has 1809 states, 1242 states have (on average 1.2818035426731078) internal successors, (1592), 1286 states have internal predecessors, (1592), 481 states have call successors, (481), 85 states have call predecessors, (481), 85 states have return successors, (480), 466 states have call predecessors, (480), 480 states have call successors, (480) [2022-02-20 22:55:05,854 INFO L87 Difference]: Start difference. First operand 1934 states. Second operand has 1809 states, 1242 states have (on average 1.2818035426731078) internal successors, (1592), 1286 states have internal predecessors, (1592), 481 states have call successors, (481), 85 states have call predecessors, (481), 85 states have return successors, (480), 466 states have call predecessors, (480), 480 states have call successors, (480) [2022-02-20 22:55:05,969 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:55:05,969 INFO L93 Difference]: Finished difference Result 1934 states and 2741 transitions. [2022-02-20 22:55:05,969 INFO L276 IsEmpty]: Start isEmpty. Operand 1934 states and 2741 transitions. [2022-02-20 22:55:05,980 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:55:05,980 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:55:05,990 INFO L74 IsIncluded]: Start isIncluded. First operand has 1809 states, 1242 states have (on average 1.2818035426731078) internal successors, (1592), 1286 states have internal predecessors, (1592), 481 states have call successors, (481), 85 states have call predecessors, (481), 85 states have return successors, (480), 466 states have call predecessors, (480), 480 states have call successors, (480) Second operand 1934 states. [2022-02-20 22:55:05,995 INFO L87 Difference]: Start difference. First operand has 1809 states, 1242 states have (on average 1.2818035426731078) internal successors, (1592), 1286 states have internal predecessors, (1592), 481 states have call successors, (481), 85 states have call predecessors, (481), 85 states have return successors, (480), 466 states have call predecessors, (480), 480 states have call successors, (480) Second operand 1934 states. [2022-02-20 22:55:06,114 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:55:06,114 INFO L93 Difference]: Finished difference Result 1934 states and 2741 transitions. [2022-02-20 22:55:06,114 INFO L276 IsEmpty]: Start isEmpty. Operand 1934 states and 2741 transitions. [2022-02-20 22:55:06,125 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:55:06,125 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:55:06,125 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 22:55:06,125 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 22:55:06,129 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1809 states, 1242 states have (on average 1.2818035426731078) internal successors, (1592), 1286 states have internal predecessors, (1592), 481 states have call successors, (481), 85 states have call predecessors, (481), 85 states have return successors, (480), 466 states have call predecessors, (480), 480 states have call successors, (480) [2022-02-20 22:55:06,286 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1809 states to 1809 states and 2553 transitions. [2022-02-20 22:55:06,287 INFO L78 Accepts]: Start accepts. Automaton has 1809 states and 2553 transitions. Word has length 121 [2022-02-20 22:55:06,287 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 22:55:06,288 INFO L470 AbstractCegarLoop]: Abstraction has 1809 states and 2553 transitions. [2022-02-20 22:55:06,288 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 8.666666666666666) internal successors, (52), 4 states have internal predecessors, (52), 2 states have call successors, (13), 4 states have call predecessors, (13), 2 states have return successors, (12), 3 states have call predecessors, (12), 2 states have call successors, (12) [2022-02-20 22:55:06,288 INFO L276 IsEmpty]: Start isEmpty. Operand 1809 states and 2553 transitions. [2022-02-20 22:55:06,289 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2022-02-20 22:55:06,289 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:55:06,290 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 7, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:55:06,290 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-02-20 22:55:06,290 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ldv_check_alloc_flagsErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_check_alloc_flagsErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:55:06,290 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:55:06,290 INFO L85 PathProgramCache]: Analyzing trace with hash 769657438, now seen corresponding path program 1 times [2022-02-20 22:55:06,290 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:55:06,290 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1132301375] [2022-02-20 22:55:06,291 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:55:06,291 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:55:06,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:55:06,451 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 5 [2022-02-20 22:55:06,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:55:06,460 INFO L290 TraceCheckUtils]: 0: Hoare triple {26410#true} havoc ~tmp~111;assume -2147483648 <= #t~nondet1100 && #t~nondet1100 <= 2147483647;~tmp~111 := #t~nondet1100;havoc #t~nondet1100;#res := ~tmp~111; {26410#true} is VALID [2022-02-20 22:55:06,460 INFO L290 TraceCheckUtils]: 1: Hoare triple {26410#true} assume true; {26410#true} is VALID [2022-02-20 22:55:06,460 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {26410#true} {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} #4937#return; {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} is VALID [2022-02-20 22:55:06,460 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 11 [2022-02-20 22:55:06,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:55:06,467 INFO L290 TraceCheckUtils]: 0: Hoare triple {26410#true} ~expression := #in~expression; {26410#true} is VALID [2022-02-20 22:55:06,468 INFO L290 TraceCheckUtils]: 1: Hoare triple {26410#true} assume !(0 == ~expression); {26410#true} is VALID [2022-02-20 22:55:06,468 INFO L290 TraceCheckUtils]: 2: Hoare triple {26410#true} assume true; {26410#true} is VALID [2022-02-20 22:55:06,468 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {26410#true} {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} #4939#return; {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} is VALID [2022-02-20 22:55:06,472 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 17 [2022-02-20 22:55:06,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:55:06,483 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:55:06,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:55:06,488 INFO L290 TraceCheckUtils]: 0: Hoare triple {26410#true} ~expression := #in~expression; {26410#true} is VALID [2022-02-20 22:55:06,488 INFO L290 TraceCheckUtils]: 1: Hoare triple {26410#true} assume !(0 == ~expression); {26410#true} is VALID [2022-02-20 22:55:06,488 INFO L290 TraceCheckUtils]: 2: Hoare triple {26410#true} assume true; {26410#true} is VALID [2022-02-20 22:55:06,488 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {26410#true} {26410#true} #4875#return; {26410#true} is VALID [2022-02-20 22:55:06,488 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:55:06,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:55:06,496 INFO L290 TraceCheckUtils]: 0: Hoare triple {26410#true} ~ptr.base, ~ptr.offset := #in~ptr.base, #in~ptr.offset;#res := (if (~ptr.base + ~ptr.offset) % 18446744073709551616 > 4294967295 then 1 else 0); {26410#true} is VALID [2022-02-20 22:55:06,496 INFO L290 TraceCheckUtils]: 1: Hoare triple {26410#true} assume true; {26410#true} is VALID [2022-02-20 22:55:06,496 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {26410#true} {26410#true} #4877#return; {26410#true} is VALID [2022-02-20 22:55:06,497 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 11 [2022-02-20 22:55:06,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:55:06,502 INFO L290 TraceCheckUtils]: 0: Hoare triple {26410#true} ~expression := #in~expression; {26410#true} is VALID [2022-02-20 22:55:06,502 INFO L290 TraceCheckUtils]: 1: Hoare triple {26410#true} assume !(0 == ~expression); {26410#true} is VALID [2022-02-20 22:55:06,502 INFO L290 TraceCheckUtils]: 2: Hoare triple {26410#true} assume true; {26410#true} is VALID [2022-02-20 22:55:06,503 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {26410#true} {26410#true} #4879#return; {26410#true} is VALID [2022-02-20 22:55:06,503 INFO L290 TraceCheckUtils]: 0: Hoare triple {26494#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~5.base, ~res~5.offset;havoc ~tmp~109.base, ~tmp~109.offset;havoc ~tmp___0~53;call #t~malloc1096.base, #t~malloc1096.offset := #Ultimate.allocOnHeap(~size);~tmp~109.base, ~tmp~109.offset := #t~malloc1096.base, #t~malloc1096.offset;havoc #t~malloc1096.base, #t~malloc1096.offset;~res~5.base, ~res~5.offset := ~tmp~109.base, ~tmp~109.offset; {26410#true} is VALID [2022-02-20 22:55:06,503 INFO L272 TraceCheckUtils]: 1: Hoare triple {26410#true} call ldv_assume((if 0 != (~res~5.base + ~res~5.offset) % 18446744073709551616 then 1 else 0)); {26410#true} is VALID [2022-02-20 22:55:06,503 INFO L290 TraceCheckUtils]: 2: Hoare triple {26410#true} ~expression := #in~expression; {26410#true} is VALID [2022-02-20 22:55:06,503 INFO L290 TraceCheckUtils]: 3: Hoare triple {26410#true} assume !(0 == ~expression); {26410#true} is VALID [2022-02-20 22:55:06,503 INFO L290 TraceCheckUtils]: 4: Hoare triple {26410#true} assume true; {26410#true} is VALID [2022-02-20 22:55:06,503 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {26410#true} {26410#true} #4875#return; {26410#true} is VALID [2022-02-20 22:55:06,503 INFO L272 TraceCheckUtils]: 6: Hoare triple {26410#true} call #t~ret1097 := ldv_is_err(~res~5.base, ~res~5.offset); {26410#true} is VALID [2022-02-20 22:55:06,503 INFO L290 TraceCheckUtils]: 7: Hoare triple {26410#true} ~ptr.base, ~ptr.offset := #in~ptr.base, #in~ptr.offset;#res := (if (~ptr.base + ~ptr.offset) % 18446744073709551616 > 4294967295 then 1 else 0); {26410#true} is VALID [2022-02-20 22:55:06,504 INFO L290 TraceCheckUtils]: 8: Hoare triple {26410#true} assume true; {26410#true} is VALID [2022-02-20 22:55:06,504 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {26410#true} {26410#true} #4877#return; {26410#true} is VALID [2022-02-20 22:55:06,504 INFO L290 TraceCheckUtils]: 10: Hoare triple {26410#true} assume -9223372036854775808 <= #t~ret1097 && #t~ret1097 <= 9223372036854775807;~tmp___0~53 := #t~ret1097;havoc #t~ret1097; {26410#true} is VALID [2022-02-20 22:55:06,504 INFO L272 TraceCheckUtils]: 11: Hoare triple {26410#true} call ldv_assume((if 0 == ~tmp___0~53 then 1 else 0)); {26410#true} is VALID [2022-02-20 22:55:06,504 INFO L290 TraceCheckUtils]: 12: Hoare triple {26410#true} ~expression := #in~expression; {26410#true} is VALID [2022-02-20 22:55:06,504 INFO L290 TraceCheckUtils]: 13: Hoare triple {26410#true} assume !(0 == ~expression); {26410#true} is VALID [2022-02-20 22:55:06,504 INFO L290 TraceCheckUtils]: 14: Hoare triple {26410#true} assume true; {26410#true} is VALID [2022-02-20 22:55:06,504 INFO L284 TraceCheckUtils]: 15: Hoare quadruple {26410#true} {26410#true} #4879#return; {26410#true} is VALID [2022-02-20 22:55:06,504 INFO L290 TraceCheckUtils]: 16: Hoare triple {26410#true} #res.base, #res.offset := ~res~5.base, ~res~5.offset; {26410#true} is VALID [2022-02-20 22:55:06,505 INFO L290 TraceCheckUtils]: 17: Hoare triple {26410#true} assume true; {26410#true} is VALID [2022-02-20 22:55:06,505 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {26410#true} {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} #4941#return; {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} is VALID [2022-02-20 22:55:06,506 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 39 [2022-02-20 22:55:06,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:55:06,521 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:55:06,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:55:06,528 INFO L290 TraceCheckUtils]: 0: Hoare triple {26410#true} ~expression := #in~expression; {26410#true} is VALID [2022-02-20 22:55:06,528 INFO L290 TraceCheckUtils]: 1: Hoare triple {26410#true} assume !(0 == ~expression); {26410#true} is VALID [2022-02-20 22:55:06,528 INFO L290 TraceCheckUtils]: 2: Hoare triple {26410#true} assume true; {26410#true} is VALID [2022-02-20 22:55:06,529 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {26410#true} {26410#true} #4875#return; {26410#true} is VALID [2022-02-20 22:55:06,529 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:55:06,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:55:06,535 INFO L290 TraceCheckUtils]: 0: Hoare triple {26410#true} ~ptr.base, ~ptr.offset := #in~ptr.base, #in~ptr.offset;#res := (if (~ptr.base + ~ptr.offset) % 18446744073709551616 > 4294967295 then 1 else 0); {26410#true} is VALID [2022-02-20 22:55:06,535 INFO L290 TraceCheckUtils]: 1: Hoare triple {26410#true} assume true; {26410#true} is VALID [2022-02-20 22:55:06,535 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {26410#true} {26410#true} #4877#return; {26410#true} is VALID [2022-02-20 22:55:06,536 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 11 [2022-02-20 22:55:06,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:55:06,540 INFO L290 TraceCheckUtils]: 0: Hoare triple {26410#true} ~expression := #in~expression; {26410#true} is VALID [2022-02-20 22:55:06,541 INFO L290 TraceCheckUtils]: 1: Hoare triple {26410#true} assume !(0 == ~expression); {26410#true} is VALID [2022-02-20 22:55:06,541 INFO L290 TraceCheckUtils]: 2: Hoare triple {26410#true} assume true; {26410#true} is VALID [2022-02-20 22:55:06,541 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {26410#true} {26410#true} #4879#return; {26410#true} is VALID [2022-02-20 22:55:06,541 INFO L290 TraceCheckUtils]: 0: Hoare triple {26494#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~5.base, ~res~5.offset;havoc ~tmp~109.base, ~tmp~109.offset;havoc ~tmp___0~53;call #t~malloc1096.base, #t~malloc1096.offset := #Ultimate.allocOnHeap(~size);~tmp~109.base, ~tmp~109.offset := #t~malloc1096.base, #t~malloc1096.offset;havoc #t~malloc1096.base, #t~malloc1096.offset;~res~5.base, ~res~5.offset := ~tmp~109.base, ~tmp~109.offset; {26410#true} is VALID [2022-02-20 22:55:06,541 INFO L272 TraceCheckUtils]: 1: Hoare triple {26410#true} call ldv_assume((if 0 != (~res~5.base + ~res~5.offset) % 18446744073709551616 then 1 else 0)); {26410#true} is VALID [2022-02-20 22:55:06,541 INFO L290 TraceCheckUtils]: 2: Hoare triple {26410#true} ~expression := #in~expression; {26410#true} is VALID [2022-02-20 22:55:06,541 INFO L290 TraceCheckUtils]: 3: Hoare triple {26410#true} assume !(0 == ~expression); {26410#true} is VALID [2022-02-20 22:55:06,541 INFO L290 TraceCheckUtils]: 4: Hoare triple {26410#true} assume true; {26410#true} is VALID [2022-02-20 22:55:06,542 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {26410#true} {26410#true} #4875#return; {26410#true} is VALID [2022-02-20 22:55:06,542 INFO L272 TraceCheckUtils]: 6: Hoare triple {26410#true} call #t~ret1097 := ldv_is_err(~res~5.base, ~res~5.offset); {26410#true} is VALID [2022-02-20 22:55:06,542 INFO L290 TraceCheckUtils]: 7: Hoare triple {26410#true} ~ptr.base, ~ptr.offset := #in~ptr.base, #in~ptr.offset;#res := (if (~ptr.base + ~ptr.offset) % 18446744073709551616 > 4294967295 then 1 else 0); {26410#true} is VALID [2022-02-20 22:55:06,542 INFO L290 TraceCheckUtils]: 8: Hoare triple {26410#true} assume true; {26410#true} is VALID [2022-02-20 22:55:06,542 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {26410#true} {26410#true} #4877#return; {26410#true} is VALID [2022-02-20 22:55:06,542 INFO L290 TraceCheckUtils]: 10: Hoare triple {26410#true} assume -9223372036854775808 <= #t~ret1097 && #t~ret1097 <= 9223372036854775807;~tmp___0~53 := #t~ret1097;havoc #t~ret1097; {26410#true} is VALID [2022-02-20 22:55:06,542 INFO L272 TraceCheckUtils]: 11: Hoare triple {26410#true} call ldv_assume((if 0 == ~tmp___0~53 then 1 else 0)); {26410#true} is VALID [2022-02-20 22:55:06,542 INFO L290 TraceCheckUtils]: 12: Hoare triple {26410#true} ~expression := #in~expression; {26410#true} is VALID [2022-02-20 22:55:06,542 INFO L290 TraceCheckUtils]: 13: Hoare triple {26410#true} assume !(0 == ~expression); {26410#true} is VALID [2022-02-20 22:55:06,543 INFO L290 TraceCheckUtils]: 14: Hoare triple {26410#true} assume true; {26410#true} is VALID [2022-02-20 22:55:06,543 INFO L284 TraceCheckUtils]: 15: Hoare quadruple {26410#true} {26410#true} #4879#return; {26410#true} is VALID [2022-02-20 22:55:06,543 INFO L290 TraceCheckUtils]: 16: Hoare triple {26410#true} #res.base, #res.offset := ~res~5.base, ~res~5.offset; {26410#true} is VALID [2022-02-20 22:55:06,543 INFO L290 TraceCheckUtils]: 17: Hoare triple {26410#true} assume true; {26410#true} is VALID [2022-02-20 22:55:06,543 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {26410#true} {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} #4945#return; {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} is VALID [2022-02-20 22:55:06,544 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2022-02-20 22:55:06,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:55:06,561 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:55:06,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:55:06,567 INFO L290 TraceCheckUtils]: 0: Hoare triple {26410#true} ~expression := #in~expression; {26410#true} is VALID [2022-02-20 22:55:06,567 INFO L290 TraceCheckUtils]: 1: Hoare triple {26410#true} assume !(0 == ~expression); {26410#true} is VALID [2022-02-20 22:55:06,567 INFO L290 TraceCheckUtils]: 2: Hoare triple {26410#true} assume true; {26410#true} is VALID [2022-02-20 22:55:06,567 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {26410#true} {26410#true} #4875#return; {26410#true} is VALID [2022-02-20 22:55:06,567 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:55:06,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:55:06,576 INFO L290 TraceCheckUtils]: 0: Hoare triple {26410#true} ~ptr.base, ~ptr.offset := #in~ptr.base, #in~ptr.offset;#res := (if (~ptr.base + ~ptr.offset) % 18446744073709551616 > 4294967295 then 1 else 0); {26410#true} is VALID [2022-02-20 22:55:06,576 INFO L290 TraceCheckUtils]: 1: Hoare triple {26410#true} assume true; {26410#true} is VALID [2022-02-20 22:55:06,576 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {26410#true} {26410#true} #4877#return; {26410#true} is VALID [2022-02-20 22:55:06,576 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 11 [2022-02-20 22:55:06,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:55:06,581 INFO L290 TraceCheckUtils]: 0: Hoare triple {26410#true} ~expression := #in~expression; {26410#true} is VALID [2022-02-20 22:55:06,582 INFO L290 TraceCheckUtils]: 1: Hoare triple {26410#true} assume !(0 == ~expression); {26410#true} is VALID [2022-02-20 22:55:06,582 INFO L290 TraceCheckUtils]: 2: Hoare triple {26410#true} assume true; {26410#true} is VALID [2022-02-20 22:55:06,582 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {26410#true} {26410#true} #4879#return; {26410#true} is VALID [2022-02-20 22:55:06,582 INFO L290 TraceCheckUtils]: 0: Hoare triple {26494#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~5.base, ~res~5.offset;havoc ~tmp~109.base, ~tmp~109.offset;havoc ~tmp___0~53;call #t~malloc1096.base, #t~malloc1096.offset := #Ultimate.allocOnHeap(~size);~tmp~109.base, ~tmp~109.offset := #t~malloc1096.base, #t~malloc1096.offset;havoc #t~malloc1096.base, #t~malloc1096.offset;~res~5.base, ~res~5.offset := ~tmp~109.base, ~tmp~109.offset; {26410#true} is VALID [2022-02-20 22:55:06,582 INFO L272 TraceCheckUtils]: 1: Hoare triple {26410#true} call ldv_assume((if 0 != (~res~5.base + ~res~5.offset) % 18446744073709551616 then 1 else 0)); {26410#true} is VALID [2022-02-20 22:55:06,582 INFO L290 TraceCheckUtils]: 2: Hoare triple {26410#true} ~expression := #in~expression; {26410#true} is VALID [2022-02-20 22:55:06,582 INFO L290 TraceCheckUtils]: 3: Hoare triple {26410#true} assume !(0 == ~expression); {26410#true} is VALID [2022-02-20 22:55:06,582 INFO L290 TraceCheckUtils]: 4: Hoare triple {26410#true} assume true; {26410#true} is VALID [2022-02-20 22:55:06,582 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {26410#true} {26410#true} #4875#return; {26410#true} is VALID [2022-02-20 22:55:06,583 INFO L272 TraceCheckUtils]: 6: Hoare triple {26410#true} call #t~ret1097 := ldv_is_err(~res~5.base, ~res~5.offset); {26410#true} is VALID [2022-02-20 22:55:06,583 INFO L290 TraceCheckUtils]: 7: Hoare triple {26410#true} ~ptr.base, ~ptr.offset := #in~ptr.base, #in~ptr.offset;#res := (if (~ptr.base + ~ptr.offset) % 18446744073709551616 > 4294967295 then 1 else 0); {26410#true} is VALID [2022-02-20 22:55:06,583 INFO L290 TraceCheckUtils]: 8: Hoare triple {26410#true} assume true; {26410#true} is VALID [2022-02-20 22:55:06,583 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {26410#true} {26410#true} #4877#return; {26410#true} is VALID [2022-02-20 22:55:06,583 INFO L290 TraceCheckUtils]: 10: Hoare triple {26410#true} assume -9223372036854775808 <= #t~ret1097 && #t~ret1097 <= 9223372036854775807;~tmp___0~53 := #t~ret1097;havoc #t~ret1097; {26410#true} is VALID [2022-02-20 22:55:06,583 INFO L272 TraceCheckUtils]: 11: Hoare triple {26410#true} call ldv_assume((if 0 == ~tmp___0~53 then 1 else 0)); {26410#true} is VALID [2022-02-20 22:55:06,583 INFO L290 TraceCheckUtils]: 12: Hoare triple {26410#true} ~expression := #in~expression; {26410#true} is VALID [2022-02-20 22:55:06,583 INFO L290 TraceCheckUtils]: 13: Hoare triple {26410#true} assume !(0 == ~expression); {26410#true} is VALID [2022-02-20 22:55:06,584 INFO L290 TraceCheckUtils]: 14: Hoare triple {26410#true} assume true; {26410#true} is VALID [2022-02-20 22:55:06,584 INFO L284 TraceCheckUtils]: 15: Hoare quadruple {26410#true} {26410#true} #4879#return; {26410#true} is VALID [2022-02-20 22:55:06,584 INFO L290 TraceCheckUtils]: 16: Hoare triple {26410#true} #res.base, #res.offset := ~res~5.base, ~res~5.offset; {26410#true} is VALID [2022-02-20 22:55:06,584 INFO L290 TraceCheckUtils]: 17: Hoare triple {26410#true} assume true; {26410#true} is VALID [2022-02-20 22:55:06,585 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {26410#true} {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} #4947#return; {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} is VALID [2022-02-20 22:55:06,585 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 81 [2022-02-20 22:55:06,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:55:06,592 INFO L290 TraceCheckUtils]: 0: Hoare triple {26410#true} havoc ~tmp~111;assume -2147483648 <= #t~nondet1100 && #t~nondet1100 <= 2147483647;~tmp~111 := #t~nondet1100;havoc #t~nondet1100;#res := ~tmp~111; {26410#true} is VALID [2022-02-20 22:55:06,592 INFO L290 TraceCheckUtils]: 1: Hoare triple {26410#true} assume true; {26410#true} is VALID [2022-02-20 22:55:06,593 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {26410#true} {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} #4949#return; {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} is VALID [2022-02-20 22:55:06,593 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 88 [2022-02-20 22:55:06,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:55:06,602 INFO L290 TraceCheckUtils]: 0: Hoare triple {26410#true} ~pdev.base, ~pdev.offset := #in~pdev.base, #in~pdev.offset;havoc ~busdev~0.base, ~busdev~0.offset;havoc ~this_pdev~0.base, ~this_pdev~0.offset;havoc ~n_hmes~0;havoc ~__mptr~2.base, ~__mptr~2.offset;havoc ~__mptr___0~2.base, ~__mptr___0~2.offset;call #t~mem873.base, #t~mem873.offset := read~$Pointer$(~pdev.base, 16 + ~pdev.offset, 8);call #t~mem874.base, #t~mem874.offset := read~$Pointer$(#t~mem873.base, 56 + #t~mem873.offset, 8);~busdev~0.base, ~busdev~0.offset := #t~mem874.base, #t~mem874.offset;havoc #t~mem873.base, #t~mem873.offset;havoc #t~mem874.base, #t~mem874.offset;#t~short876 := 0 == (~busdev~0.base + ~busdev~0.offset) % 18446744073709551616; {26410#true} is VALID [2022-02-20 22:55:06,602 INFO L290 TraceCheckUtils]: 1: Hoare triple {26410#true} assume #t~short876; {26410#true} is VALID [2022-02-20 22:55:06,602 INFO L290 TraceCheckUtils]: 2: Hoare triple {26410#true} assume #t~short876;havoc #t~mem875;havoc #t~short876;#res := 0; {26410#true} is VALID [2022-02-20 22:55:06,603 INFO L290 TraceCheckUtils]: 3: Hoare triple {26410#true} assume true; {26410#true} is VALID [2022-02-20 22:55:06,603 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {26410#true} {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} #4951#return; {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} is VALID [2022-02-20 22:55:06,609 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 96 [2022-02-20 22:55:06,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:55:06,619 INFO L290 TraceCheckUtils]: 0: Hoare triple {26528#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~offset1215 := 0; {26410#true} is VALID [2022-02-20 22:55:06,619 INFO L290 TraceCheckUtils]: 1: Hoare triple {26410#true} call #t~mem1216 := read~int(src.base, src.offset + #t~offset1215, 1);call write~unchecked~int(#t~mem1216, dest.base, dest.offset + #t~offset1215, 1); {26410#true} is VALID [2022-02-20 22:55:06,619 INFO L290 TraceCheckUtils]: 2: Hoare triple {26410#true} assume 0 == #t~mem1216; {26410#true} is VALID [2022-02-20 22:55:06,619 INFO L290 TraceCheckUtils]: 3: Hoare triple {26410#true} assume #res.base == dest.base && #res.offset == dest.offset; {26410#true} is VALID [2022-02-20 22:55:06,621 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {26410#true} {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} #4955#return; {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} is VALID [2022-02-20 22:55:06,621 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 114 [2022-02-20 22:55:06,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:55:06,683 INFO L290 TraceCheckUtils]: 0: Hoare triple {26410#true} assume !(2 == ~ldv_spin__xmit_lock_of_netdev_queue~0); {26529#(or (<= ~ldv_spin__xmit_lock_of_netdev_queue~0 1) (not (<= ~ldv_spin__xmit_lock_of_netdev_queue~0 2)))} is VALID [2022-02-20 22:55:06,684 INFO L290 TraceCheckUtils]: 1: Hoare triple {26529#(or (<= ~ldv_spin__xmit_lock_of_netdev_queue~0 1) (not (<= ~ldv_spin__xmit_lock_of_netdev_queue~0 2)))} assume 2 == ~ldv_spin_addr_list_lock_of_net_device~0;#res := 1; {26530#(and (or (not (<= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)) (<= 2 ~ldv_spin_addr_list_lock_of_net_device~0)) (or (<= ~ldv_spin__xmit_lock_of_netdev_queue~0 1) (and (not (<= ~ldv_spin__xmit_lock_of_netdev_queue~0 2)) (<= ~ldv_spin_addr_list_lock_of_net_device~0 2))))} is VALID [2022-02-20 22:55:06,685 INFO L290 TraceCheckUtils]: 2: Hoare triple {26530#(and (or (not (<= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)) (<= 2 ~ldv_spin_addr_list_lock_of_net_device~0)) (or (<= ~ldv_spin__xmit_lock_of_netdev_queue~0 1) (and (not (<= ~ldv_spin__xmit_lock_of_netdev_queue~0 2)) (<= ~ldv_spin_addr_list_lock_of_net_device~0 2))))} assume true; {26530#(and (or (not (<= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)) (<= 2 ~ldv_spin_addr_list_lock_of_net_device~0)) (or (<= ~ldv_spin__xmit_lock_of_netdev_queue~0 1) (and (not (<= ~ldv_spin__xmit_lock_of_netdev_queue~0 2)) (<= ~ldv_spin_addr_list_lock_of_net_device~0 2))))} is VALID [2022-02-20 22:55:06,686 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {26530#(and (or (not (<= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)) (<= 2 ~ldv_spin_addr_list_lock_of_net_device~0)) (or (<= ~ldv_spin__xmit_lock_of_netdev_queue~0 1) (and (not (<= ~ldv_spin__xmit_lock_of_netdev_queue~0 2)) (<= ~ldv_spin_addr_list_lock_of_net_device~0 2))))} {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} #4613#return; {26411#false} is VALID [2022-02-20 22:55:06,703 INFO L290 TraceCheckUtils]: 0: Hoare triple {26410#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(190, 1);call #Ultimate.allocInit(26, 2);call #Ultimate.allocInit(63, 3);call #Ultimate.allocInit(50, 4);call #Ultimate.allocInit(51, 5);call #Ultimate.allocInit(23, 6);call #Ultimate.allocInit(10, 7);call #Ultimate.allocInit(10, 8);call #Ultimate.allocInit(16, 9);call #Ultimate.allocInit(23, 10);call #Ultimate.allocInit(23, 11);call #Ultimate.allocInit(22, 12);call #Ultimate.allocInit(22, 13);call #Ultimate.allocInit(36, 14);call #Ultimate.allocInit(10, 15);call #Ultimate.allocInit(10, 16);call #Ultimate.allocInit(16, 17);call #Ultimate.allocInit(10, 18);call #Ultimate.allocInit(9, 19);call #Ultimate.allocInit(14, 20);call #Ultimate.allocInit(14, 21);call #Ultimate.allocInit(60, 22);call #Ultimate.allocInit(65, 23);call #Ultimate.allocInit(32, 24);call #Ultimate.allocInit(44, 25);call #Ultimate.allocInit(58, 26);call #Ultimate.allocInit(40, 27);call #Ultimate.allocInit(37, 28);call #Ultimate.allocInit(23, 29);call #Ultimate.allocInit(44, 30);call #Ultimate.allocInit(62, 31);call #Ultimate.allocInit(39, 32);call #Ultimate.allocInit(59, 33);call #Ultimate.allocInit(52, 34);call #Ultimate.allocInit(52, 35);call #Ultimate.allocInit(40, 36);call #Ultimate.allocInit(41, 37);call #Ultimate.allocInit(55, 38);call #Ultimate.allocInit(40, 39);call #Ultimate.allocInit(61, 40);call #Ultimate.allocInit(33, 41);call #Ultimate.allocInit(14, 42);call #Ultimate.allocInit(13, 43);call #Ultimate.allocInit(12, 44);call #Ultimate.allocInit(3, 45);call write~init~int(93, 45, 0, 1);call write~init~int(10, 45, 1, 1);call write~init~int(0, 45, 2, 1);call #Ultimate.allocInit(53, 46);call #Ultimate.allocInit(32, 47);call #Ultimate.allocInit(33, 48);call #Ultimate.allocInit(14, 49);call #Ultimate.allocInit(11, 50);call #Ultimate.allocInit(12, 51);call #Ultimate.allocInit(10, 52);call #Ultimate.allocInit(3, 53);call write~init~int(93, 53, 0, 1);call write~init~int(10, 53, 1, 1);call write~init~int(0, 53, 2, 1);call #Ultimate.allocInit(56, 54);call #Ultimate.allocInit(7, 55);call write~init~int(112, 55, 0, 1);call write~init~int(97, 55, 1, 1);call write~init~int(114, 55, 2, 1);call write~init~int(105, 55, 3, 1);call write~init~int(116, 55, 4, 1);call write~init~int(121, 55, 5, 1);call write~init~int(0, 55, 6, 1);call #Ultimate.allocInit(8, 56);call #Ultimate.allocInit(19, 57);call #Ultimate.allocInit(26, 58);call #Ultimate.allocInit(42, 59);call #Ultimate.allocInit(42, 60);call #Ultimate.allocInit(41, 61);call #Ultimate.allocInit(34, 62);call #Ultimate.allocInit(40, 63);call #Ultimate.allocInit(46, 64);call #Ultimate.allocInit(36, 65);call #Ultimate.allocInit(38, 66);call #Ultimate.allocInit(42, 67);call #Ultimate.allocInit(7, 68);call write~init~int(115, 68, 0, 1);call write~init~int(117, 68, 1, 1);call write~init~int(110, 68, 2, 1);call write~init~int(104, 68, 3, 1);call write~init~int(109, 68, 4, 1);call write~init~int(101, 68, 5, 1);call write~init~int(0, 68, 6, 1);call #Ultimate.allocInit(5, 69);call write~init~int(50, 69, 0, 1);call write~init~int(46, 69, 1, 1);call write~init~int(48, 69, 2, 1);call write~init~int(50, 69, 3, 1);call write~init~int(0, 69, 4, 1);call #Ultimate.allocInit(9, 70);call #Ultimate.allocInit(9, 71);call #Ultimate.allocInit(9, 72);call #Ultimate.allocInit(4, 73);call write~init~int(113, 73, 0, 1);call write~init~int(102, 73, 1, 1);call write~init~int(101, 73, 2, 1);call write~init~int(0, 73, 3, 1);call #Ultimate.allocInit(4, 74);call write~init~int(14, 74, 0, 1);call write~init~int(37, 74, 1, 1);call write~init~int(115, 74, 2, 1);call write~init~int(0, 74, 3, 1);call #Ultimate.allocInit(26, 75);call #Ultimate.allocInit(62, 76);call #Ultimate.allocInit(7, 77);call write~init~int(115, 77, 0, 1);call write~init~int(117, 77, 1, 1);call write~init~int(110, 77, 2, 1);call write~init~int(104, 77, 3, 1);call write~init~int(109, 77, 4, 1);call write~init~int(101, 77, 5, 1);call write~init~int(0, 77, 6, 1);call #Ultimate.allocInit(57, 78);call #Ultimate.allocInit(47, 79);call #Ultimate.allocInit(19, 80);call #Ultimate.allocInit(56, 81);call #Ultimate.allocInit(4, 82);call write~init~int(101, 82, 0, 1);call write~init~int(116, 82, 1, 1);call write~init~int(104, 82, 2, 1);call write~init~int(0, 82, 3, 1);call #Ultimate.allocInit(4, 83);call write~init~int(45, 83, 0, 1);call write~init~int(37, 83, 1, 1);call write~init~int(100, 83, 2, 1);call write~init~int(0, 83, 3, 1);call #Ultimate.allocInit(55, 84);call #Ultimate.allocInit(22, 85);call #Ultimate.allocInit(26, 86);call #Ultimate.allocInit(61, 87);call #Ultimate.allocInit(52, 88);call #Ultimate.allocInit(5, 89);call write~init~int(37, 89, 0, 1);call write~init~int(112, 89, 1, 1);call write~init~int(77, 89, 2, 1);call write~init~int(10, 89, 3, 1);call write~init~int(0, 89, 4, 1);call #Ultimate.allocInit(4, 90);call write~init~int(104, 90, 0, 1);call write~init~int(109, 90, 1, 1);call write~init~int(101, 90, 2, 1);call write~init~int(0, 90, 3, 1);call #Ultimate.allocInit(7, 91);call write~init~int(115, 91, 0, 1);call write~init~int(117, 91, 1, 1);call write~init~int(110, 91, 2, 1);call write~init~int(104, 91, 3, 1);call write~init~int(109, 91, 4, 1);call write~init~int(101, 91, 5, 1);call write~init~int(0, 91, 6, 1);call #Ultimate.allocInit(1, 92);call write~init~int(0, 92, 0, 1);call #Ultimate.allocInit(54, 93);call #Ultimate.allocInit(56, 94);call #Ultimate.allocInit(58, 95);call #Ultimate.allocInit(58, 96);call #Ultimate.allocInit(58, 97);call #Ultimate.allocInit(54, 98);call #Ultimate.allocInit(56, 99);call #Ultimate.allocInit(58, 100);call #Ultimate.allocInit(58, 101);call #Ultimate.allocInit(58, 102);call #Ultimate.allocInit(54, 103);call #Ultimate.allocInit(56, 104);call #Ultimate.allocInit(58, 105);call #Ultimate.allocInit(58, 106);call #Ultimate.allocInit(58, 107);call #Ultimate.allocInit(54, 108);call #Ultimate.allocInit(56, 109);call #Ultimate.allocInit(58, 110);call #Ultimate.allocInit(58, 111);call #Ultimate.allocInit(58, 112);call #Ultimate.allocInit(54, 113);call #Ultimate.allocInit(56, 114);call #Ultimate.allocInit(58, 115);call #Ultimate.allocInit(58, 116);call #Ultimate.allocInit(58, 117);call #Ultimate.allocInit(54, 118);call #Ultimate.allocInit(56, 119);call #Ultimate.allocInit(58, 120);call #Ultimate.allocInit(58, 121);call #Ultimate.allocInit(58, 122);call #Ultimate.allocInit(54, 123);call #Ultimate.allocInit(56, 124);call #Ultimate.allocInit(58, 125);call #Ultimate.allocInit(58, 126);call #Ultimate.allocInit(58, 127);call #Ultimate.allocInit(54, 128);call #Ultimate.allocInit(56, 129);call #Ultimate.allocInit(58, 130);call #Ultimate.allocInit(58, 131);call #Ultimate.allocInit(58, 132);call #Ultimate.allocInit(54, 133);call #Ultimate.allocInit(56, 134);call #Ultimate.allocInit(58, 135);call #Ultimate.allocInit(58, 136);call #Ultimate.allocInit(58, 137);call #Ultimate.allocInit(54, 138);call #Ultimate.allocInit(56, 139);call #Ultimate.allocInit(58, 140);call #Ultimate.allocInit(58, 141);call #Ultimate.allocInit(58, 142);call #Ultimate.allocInit(54, 143);call #Ultimate.allocInit(56, 144);call #Ultimate.allocInit(58, 145);call #Ultimate.allocInit(58, 146);call #Ultimate.allocInit(58, 147);call #Ultimate.allocInit(54, 148);call #Ultimate.allocInit(56, 149);call #Ultimate.allocInit(58, 150);call #Ultimate.allocInit(58, 151);call #Ultimate.allocInit(58, 152);call #Ultimate.allocInit(54, 153);call #Ultimate.allocInit(56, 154);call #Ultimate.allocInit(58, 155);call #Ultimate.allocInit(58, 156);call #Ultimate.allocInit(58, 157);call #Ultimate.allocInit(57, 158);call #Ultimate.allocInit(57, 159);call #Ultimate.allocInit(57, 160);call #Ultimate.allocInit(57, 161);call #Ultimate.allocInit(57, 162);call #Ultimate.allocInit(57, 163);call #Ultimate.allocInit(57, 164);call #Ultimate.allocInit(57, 165);call #Ultimate.allocInit(57, 166);call #Ultimate.allocInit(57, 167);call #Ultimate.allocInit(57, 168);call #Ultimate.allocInit(57, 169);call #Ultimate.allocInit(57, 170);call #Ultimate.allocInit(2, 171);call write~init~int(48, 171, 0, 1);call write~init~int(0, 171, 1, 1);call #Ultimate.allocInit(70, 172);~#version~0.base, ~#version~0.offset := 173, 0;call #Ultimate.allocInit(70, 173);call write~init~int(115, ~#version~0.base, ~#version~0.offset, 1);call write~init~int(117, ~#version~0.base, 1 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 2 + ~#version~0.offset, 1);call write~init~int(104, ~#version~0.base, 3 + ~#version~0.offset, 1);call write~init~int(109, ~#version~0.base, 4 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 5 + ~#version~0.offset, 1);call write~init~int(46, ~#version~0.base, 6 + ~#version~0.offset, 1);call write~init~int(99, ~#version~0.base, 7 + ~#version~0.offset, 1);call write~init~int(58, ~#version~0.base, 8 + ~#version~0.offset, 1);call write~init~int(118, ~#version~0.base, 9 + ~#version~0.offset, 1);call write~init~int(51, ~#version~0.base, 10 + ~#version~0.offset, 1);call write~init~int(46, ~#version~0.base, 11 + ~#version~0.offset, 1);call write~init~int(49, ~#version~0.base, 12 + ~#version~0.offset, 1);call write~init~int(48, ~#version~0.base, 13 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 14 + ~#version~0.offset, 1);call write~init~int(65, ~#version~0.base, 15 + ~#version~0.offset, 1);call write~init~int(117, ~#version~0.base, 16 + ~#version~0.offset, 1);call write~init~int(103, ~#version~0.base, 17 + ~#version~0.offset, 1);call write~init~int(117, ~#version~0.base, 18 + ~#version~0.offset, 1);call write~init~int(115, ~#version~0.base, 19 + ~#version~0.offset, 1);call write~init~int(116, ~#version~0.base, 20 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 21 + ~#version~0.offset, 1);call write~init~int(50, ~#version~0.base, 22 + ~#version~0.offset, 1);call write~init~int(54, ~#version~0.base, 23 + ~#version~0.offset, 1);call write~init~int(44, ~#version~0.base, 24 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 25 + ~#version~0.offset, 1);call write~init~int(50, ~#version~0.base, 26 + ~#version~0.offset, 1);call write~init~int(48, ~#version~0.base, 27 + ~#version~0.offset, 1);call write~init~int(48, ~#version~0.base, 28 + ~#version~0.offset, 1);call write~init~int(56, ~#version~0.base, 29 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 30 + ~#version~0.offset, 1);call write~init~int(68, ~#version~0.base, 31 + ~#version~0.offset, 1);call write~init~int(97, ~#version~0.base, 32 + ~#version~0.offset, 1);call write~init~int(118, ~#version~0.base, 33 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 34 + ~#version~0.offset, 1);call write~init~int(100, ~#version~0.base, 35 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 36 + ~#version~0.offset, 1);call write~init~int(83, ~#version~0.base, 37 + ~#version~0.offset, 1);call write~init~int(46, ~#version~0.base, 38 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 39 + ~#version~0.offset, 1);call write~init~int(77, ~#version~0.base, 40 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 41 + ~#version~0.offset, 1);call write~init~int(108, ~#version~0.base, 42 + ~#version~0.offset, 1);call write~init~int(108, ~#version~0.base, 43 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 44 + ~#version~0.offset, 1);call write~init~int(114, ~#version~0.base, 45 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 46 + ~#version~0.offset, 1);call write~init~int(40, ~#version~0.base, 47 + ~#version~0.offset, 1);call write~init~int(100, ~#version~0.base, 48 + ~#version~0.offset, 1);call write~init~int(97, ~#version~0.base, 49 + ~#version~0.offset, 1);call write~init~int(118, ~#version~0.base, 50 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 51 + ~#version~0.offset, 1);call write~init~int(109, ~#version~0.base, 52 + ~#version~0.offset, 1);call write~init~int(64, ~#version~0.base, 53 + ~#version~0.offset, 1);call write~init~int(100, ~#version~0.base, 54 + ~#version~0.offset, 1);call write~init~int(97, ~#version~0.base, 55 + ~#version~0.offset, 1);call write~init~int(118, ~#version~0.base, 56 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 57 + ~#version~0.offset, 1);call write~init~int(109, ~#version~0.base, 58 + ~#version~0.offset, 1);call write~init~int(108, ~#version~0.base, 59 + ~#version~0.offset, 1);call write~init~int(111, ~#version~0.base, 60 + ~#version~0.offset, 1);call write~init~int(102, ~#version~0.base, 61 + ~#version~0.offset, 1);call write~init~int(116, ~#version~0.base, 62 + ~#version~0.offset, 1);call write~init~int(46, ~#version~0.base, 63 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 64 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 65 + ~#version~0.offset, 1);call write~init~int(116, ~#version~0.base, 66 + ~#version~0.offset, 1);call write~init~int(41, ~#version~0.base, 67 + ~#version~0.offset, 1);call write~init~int(10, ~#version~0.base, 68 + ~#version~0.offset, 1);call write~init~int(0, ~#version~0.base, 69 + ~#version~0.offset, 1);~#macaddr~0.base, ~#macaddr~0.offset := 174, 0;call #Ultimate.allocInit(24, 174);call write~init~int(0, ~#macaddr~0.base, ~#macaddr~0.offset, 4);call write~init~int(0, ~#macaddr~0.base, 4 + ~#macaddr~0.offset, 4);call write~init~int(0, ~#macaddr~0.base, 8 + ~#macaddr~0.offset, 4);call write~init~int(0, ~#macaddr~0.base, 12 + ~#macaddr~0.offset, 4);call write~init~int(0, ~#macaddr~0.base, 16 + ~#macaddr~0.offset, 4);call write~init~int(0, ~#macaddr~0.base, 20 + ~#macaddr~0.offset, 4);~qfe_pci_list~0.base, ~qfe_pci_list~0.offset := 0, 0;~#hme_ethtool_ops~0.base, ~#hme_ethtool_ops~0.offset := 175, 0;call #Ultimate.allocInit(368, 175);call write~init~$Pointer$(#funAddr~hme_get_settings.base, #funAddr~hme_get_settings.offset, ~#hme_ethtool_ops~0.base, ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hme_set_settings.base, #funAddr~hme_set_settings.offset, ~#hme_ethtool_ops~0.base, 8 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hme_get_drvinfo.base, #funAddr~hme_get_drvinfo.offset, ~#hme_ethtool_ops~0.base, 16 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 24 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 32 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 40 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 48 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 56 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 64 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 72 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hme_get_link.base, #funAddr~hme_get_link.offset, ~#hme_ethtool_ops~0.base, 80 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 88 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 96 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 104 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 112 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 120 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 128 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 136 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 144 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 152 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 160 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 168 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 176 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 184 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 192 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 200 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 208 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 216 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 224 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 232 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 240 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 248 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 256 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 264 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 272 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 280 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 288 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 296 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 304 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 312 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 320 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 328 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 336 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 344 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 352 + ~#hme_ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_ethtool_ops~0.base, 360 + ~#hme_ethtool_ops~0.offset, 8);~hme_version_printed~0 := 0;~#hme_netdev_ops~0.base, ~#hme_netdev_ops~0.offset := 176, 0;call #Ultimate.allocInit(472, 176);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 8 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~happy_meal_open.base, #funAddr~happy_meal_open.offset, ~#hme_netdev_ops~0.base, 16 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~happy_meal_close.base, #funAddr~happy_meal_close.offset, ~#hme_netdev_ops~0.base, 24 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~happy_meal_start_xmit.base, #funAddr~happy_meal_start_xmit.offset, ~#hme_netdev_ops~0.base, 32 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 40 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 48 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~happy_meal_set_multicast.base, #funAddr~happy_meal_set_multicast.offset, ~#hme_netdev_ops~0.base, 56 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_mac_addr.base, #funAddr~eth_mac_addr.offset, ~#hme_netdev_ops~0.base, 64 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_validate_addr.base, #funAddr~eth_validate_addr.offset, ~#hme_netdev_ops~0.base, 72 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 80 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 88 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_change_mtu.base, #funAddr~eth_change_mtu.offset, ~#hme_netdev_ops~0.base, 96 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 104 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~happy_meal_tx_timeout.base, #funAddr~happy_meal_tx_timeout.offset, ~#hme_netdev_ops~0.base, 112 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 120 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~happy_meal_get_stats.base, #funAddr~happy_meal_get_stats.offset, ~#hme_netdev_ops~0.base, 128 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 136 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 144 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 152 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 160 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 168 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 176 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 184 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 192 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 200 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 208 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 216 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 224 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 232 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 240 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 248 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 256 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 264 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 272 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 280 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 288 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 296 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 304 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 312 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 320 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 328 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 336 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 344 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 352 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 360 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 368 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 376 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 384 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 392 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 400 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 408 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 416 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 424 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 432 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 440 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 448 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 456 + ~#hme_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_netdev_ops~0.base, 464 + ~#hme_netdev_ops~0.offset, 8);~#happymeal_pci_ids~0.base, ~#happymeal_pci_ids~0.offset := 177, 0;call #Ultimate.allocInit(64, 177);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#happymeal_pci_ids~0.base);call write~unchecked~int(4238, ~#happymeal_pci_ids~0.base, ~#happymeal_pci_ids~0.offset, 4);call write~unchecked~int(4097, ~#happymeal_pci_ids~0.base, 4 + ~#happymeal_pci_ids~0.offset, 4);call write~unchecked~int(4294967295, ~#happymeal_pci_ids~0.base, 8 + ~#happymeal_pci_ids~0.offset, 4);call write~unchecked~int(4294967295, ~#happymeal_pci_ids~0.base, 12 + ~#happymeal_pci_ids~0.offset, 4);call write~unchecked~int(0, ~#happymeal_pci_ids~0.base, 16 + ~#happymeal_pci_ids~0.offset, 4);call write~unchecked~int(0, ~#happymeal_pci_ids~0.base, 20 + ~#happymeal_pci_ids~0.offset, 4);call write~unchecked~int(0, ~#happymeal_pci_ids~0.base, 24 + ~#happymeal_pci_ids~0.offset, 8);~__mod_pci_device_table~0.vendor := 0;~__mod_pci_device_table~0.device := 0;~__mod_pci_device_table~0.subvendor := 0;~__mod_pci_device_table~0.subdevice := 0;~__mod_pci_device_table~0.class := 0;~__mod_pci_device_table~0.class_mask := 0;~__mod_pci_device_table~0.driver_data := 0;~#hme_pci_driver~0.base, ~#hme_pci_driver~0.offset := 178, 0;call #Ultimate.allocInit(301, 178);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 8 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(90, 0, ~#hme_pci_driver~0.base, 16 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(~#happymeal_pci_ids~0.base, ~#happymeal_pci_ids~0.offset, ~#hme_pci_driver~0.base, 24 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~happy_meal_pci_probe.base, #funAddr~happy_meal_pci_probe.offset, ~#hme_pci_driver~0.base, 32 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~happy_meal_pci_remove.base, #funAddr~happy_meal_pci_remove.offset, ~#hme_pci_driver~0.base, 40 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 48 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 56 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 64 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 72 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 80 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 88 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 96 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 104 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 112 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 120 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 128 + ~#hme_pci_driver~0.offset, 8);call write~init~int(0, ~#hme_pci_driver~0.base, 136 + ~#hme_pci_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 137 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 145 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 153 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 161 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 169 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 177 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 185 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 193 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 201 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 209 + ~#hme_pci_driver~0.offset, 8);call write~init~int(0, ~#hme_pci_driver~0.base, 217 + ~#hme_pci_driver~0.offset, 4);call write~init~int(0, ~#hme_pci_driver~0.base, 221 + ~#hme_pci_driver~0.offset, 4);call write~init~int(0, ~#hme_pci_driver~0.base, 225 + ~#hme_pci_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 229 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 237 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 245 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 253 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 261 + ~#hme_pci_driver~0.offset, 8);call write~init~int(0, ~#hme_pci_driver~0.base, 269 + ~#hme_pci_driver~0.offset, 4);call write~init~int(0, ~#hme_pci_driver~0.base, 273 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 285 + ~#hme_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hme_pci_driver~0.base, 293 + ~#hme_pci_driver~0.offset, 8);~ldv_thread_0~0.identifier := 0;~ldv_thread_0~0.function.base, ~ldv_thread_0~0.function.offset := 0, 0;~ldv_thread_1~0.identifier := 0;~ldv_thread_1~0.function.base, ~ldv_thread_1~0.function.offset := 0, 0;~ldv_thread_14~0.identifier := 0;~ldv_thread_14~0.function.base, ~ldv_thread_14~0.function.offset := 0, 0;~ldv_thread_2~0.identifier := 0;~ldv_thread_2~0.function.base, ~ldv_thread_2~0.function.offset := 0, 0;~ldv_thread_3~0.identifier := 0;~ldv_thread_3~0.function.base, ~ldv_thread_3~0.function.offset := 0, 0;~ldv_thread_4~0.identifier := 0;~ldv_thread_4~0.function.base, ~ldv_thread_4~0.function.offset := 0, 0;~ldv_spin__xmit_lock_of_netdev_queue~0 := 1;~ldv_spin_addr_list_lock_of_net_device~0 := 1;~ldv_spin_alloc_lock_of_task_struct~0 := 1;~ldv_spin_dma_spin_lock~0 := 1;~ldv_spin_happy_lock_of_happy_meal~0 := 1;~ldv_spin_i_lock_of_inode~0 := 1;~ldv_spin_lock~0 := 1;~ldv_spin_lock_of_NOT_ARG_SIGN~0 := 1;~ldv_spin_lru_lock_of_netns_frags~0 := 1;~ldv_spin_node_size_lock_of_pglist_data~0 := 1;~ldv_spin_ptl~0 := 1;~ldv_spin_siglock_of_sighand_struct~0 := 1;~ldv_spin_tx_global_lock_of_net_device~0 := 1; {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} is VALID [2022-02-20 22:55:06,704 INFO L290 TraceCheckUtils]: 1: Hoare triple {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;assume { :begin_inline_ldv_initialize } true; {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} is VALID [2022-02-20 22:55:06,704 INFO L290 TraceCheckUtils]: 2: Hoare triple {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} assume { :end_inline_ldv_initialize } true;assume { :begin_inline_ldv_entry_EMGentry_14 } true;ldv_entry_EMGentry_14_#in~arg0#1.base, ldv_entry_EMGentry_14_#in~arg0#1.offset := 0, 0;havoc ldv_entry_EMGentry_14_#t~ret977#1, ldv_entry_EMGentry_14_#t~ret978#1, ldv_entry_EMGentry_14_#t~ret979#1, ldv_entry_EMGentry_14_#t~ret980#1, ldv_entry_EMGentry_14_~arg0#1.base, ldv_entry_EMGentry_14_~arg0#1.offset, ldv_entry_EMGentry_14_~ldv_14_exit_happy_meal_exit_default~0#1.base, ldv_entry_EMGentry_14_~ldv_14_exit_happy_meal_exit_default~0#1.offset, ldv_entry_EMGentry_14_~ldv_14_init_happy_meal_probe_default~0#1.base, ldv_entry_EMGentry_14_~ldv_14_init_happy_meal_probe_default~0#1.offset, ldv_entry_EMGentry_14_~ldv_14_ret_default~0#1, ldv_entry_EMGentry_14_~tmp~76#1, ldv_entry_EMGentry_14_~tmp___0~40#1;ldv_entry_EMGentry_14_~arg0#1.base, ldv_entry_EMGentry_14_~arg0#1.offset := ldv_entry_EMGentry_14_#in~arg0#1.base, ldv_entry_EMGentry_14_#in~arg0#1.offset;havoc ldv_entry_EMGentry_14_~ldv_14_exit_happy_meal_exit_default~0#1.base, ldv_entry_EMGentry_14_~ldv_14_exit_happy_meal_exit_default~0#1.offset;havoc ldv_entry_EMGentry_14_~ldv_14_init_happy_meal_probe_default~0#1.base, ldv_entry_EMGentry_14_~ldv_14_init_happy_meal_probe_default~0#1.offset;havoc ldv_entry_EMGentry_14_~ldv_14_ret_default~0#1;havoc ldv_entry_EMGentry_14_~tmp~76#1;havoc ldv_entry_EMGentry_14_~tmp___0~40#1;assume { :begin_inline_ldv_EMGentry_init_happy_meal_probe_14_9 } true;ldv_EMGentry_init_happy_meal_probe_14_9_#in~arg0#1.base, ldv_EMGentry_init_happy_meal_probe_14_9_#in~arg0#1.offset := ldv_entry_EMGentry_14_~ldv_14_init_happy_meal_probe_default~0#1.base, ldv_entry_EMGentry_14_~ldv_14_init_happy_meal_probe_default~0#1.offset;havoc ldv_EMGentry_init_happy_meal_probe_14_9_#res#1;havoc ldv_EMGentry_init_happy_meal_probe_14_9_#t~ret960#1, ldv_EMGentry_init_happy_meal_probe_14_9_~arg0#1.base, ldv_EMGentry_init_happy_meal_probe_14_9_~arg0#1.offset, ldv_EMGentry_init_happy_meal_probe_14_9_~tmp~68#1;ldv_EMGentry_init_happy_meal_probe_14_9_~arg0#1.base, ldv_EMGentry_init_happy_meal_probe_14_9_~arg0#1.offset := ldv_EMGentry_init_happy_meal_probe_14_9_#in~arg0#1.base, ldv_EMGentry_init_happy_meal_probe_14_9_#in~arg0#1.offset;havoc ldv_EMGentry_init_happy_meal_probe_14_9_~tmp~68#1;assume { :begin_inline_happy_meal_probe } true;havoc happy_meal_probe_#res#1;havoc happy_meal_probe_#t~ret959#1, happy_meal_probe_~err~1#1;havoc happy_meal_probe_~err~1#1;happy_meal_probe_~err~1#1 := 0; {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} is VALID [2022-02-20 22:55:06,705 INFO L290 TraceCheckUtils]: 3: Hoare triple {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} assume 0 == happy_meal_probe_~err~1#1;assume { :begin_inline_happy_meal_pci_init } true;havoc happy_meal_pci_init_#res#1;havoc happy_meal_pci_init_#t~ret957#1, happy_meal_pci_init_~tmp~67#1;havoc happy_meal_pci_init_~tmp~67#1;assume { :begin_inline_ldv___pci_register_driver_122 } true;ldv___pci_register_driver_122_#in~ldv_func_arg1#1.base, ldv___pci_register_driver_122_#in~ldv_func_arg1#1.offset, ldv___pci_register_driver_122_#in~ldv_func_arg2#1.base, ldv___pci_register_driver_122_#in~ldv_func_arg2#1.offset, ldv___pci_register_driver_122_#in~ldv_func_arg3#1.base, ldv___pci_register_driver_122_#in~ldv_func_arg3#1.offset := ~#hme_pci_driver~0.base, ~#hme_pci_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 91, 0;havoc ldv___pci_register_driver_122_#res#1;havoc ldv___pci_register_driver_122_#t~ret1066#1, ldv___pci_register_driver_122_#t~ret1067#1, ldv___pci_register_driver_122_~ldv_func_arg1#1.base, ldv___pci_register_driver_122_~ldv_func_arg1#1.offset, ldv___pci_register_driver_122_~ldv_func_arg2#1.base, ldv___pci_register_driver_122_~ldv_func_arg2#1.offset, ldv___pci_register_driver_122_~ldv_func_arg3#1.base, ldv___pci_register_driver_122_~ldv_func_arg3#1.offset, ldv___pci_register_driver_122_~ldv_func_res~6#1, ldv___pci_register_driver_122_~tmp~97#1, ldv___pci_register_driver_122_~tmp___0~49#1;ldv___pci_register_driver_122_~ldv_func_arg1#1.base, ldv___pci_register_driver_122_~ldv_func_arg1#1.offset := ldv___pci_register_driver_122_#in~ldv_func_arg1#1.base, ldv___pci_register_driver_122_#in~ldv_func_arg1#1.offset;ldv___pci_register_driver_122_~ldv_func_arg2#1.base, ldv___pci_register_driver_122_~ldv_func_arg2#1.offset := ldv___pci_register_driver_122_#in~ldv_func_arg2#1.base, ldv___pci_register_driver_122_#in~ldv_func_arg2#1.offset;ldv___pci_register_driver_122_~ldv_func_arg3#1.base, ldv___pci_register_driver_122_~ldv_func_arg3#1.offset := ldv___pci_register_driver_122_#in~ldv_func_arg3#1.base, ldv___pci_register_driver_122_#in~ldv_func_arg3#1.offset;havoc ldv___pci_register_driver_122_~ldv_func_res~6#1;havoc ldv___pci_register_driver_122_~tmp~97#1;havoc ldv___pci_register_driver_122_~tmp___0~49#1;assume { :begin_inline___pci_register_driver } true;__pci_register_driver_#in~arg0#1.base, __pci_register_driver_#in~arg0#1.offset, __pci_register_driver_#in~arg1#1.base, __pci_register_driver_#in~arg1#1.offset, __pci_register_driver_#in~arg2#1.base, __pci_register_driver_#in~arg2#1.offset := ldv___pci_register_driver_122_~ldv_func_arg1#1.base, ldv___pci_register_driver_122_~ldv_func_arg1#1.offset, ldv___pci_register_driver_122_~ldv_func_arg2#1.base, ldv___pci_register_driver_122_~ldv_func_arg2#1.offset, ldv___pci_register_driver_122_~ldv_func_arg3#1.base, ldv___pci_register_driver_122_~ldv_func_arg3#1.offset;havoc __pci_register_driver_#res#1;havoc __pci_register_driver_#t~nondet1173#1, __pci_register_driver_~arg0#1.base, __pci_register_driver_~arg0#1.offset, __pci_register_driver_~arg1#1.base, __pci_register_driver_~arg1#1.offset, __pci_register_driver_~arg2#1.base, __pci_register_driver_~arg2#1.offset;__pci_register_driver_~arg0#1.base, __pci_register_driver_~arg0#1.offset := __pci_register_driver_#in~arg0#1.base, __pci_register_driver_#in~arg0#1.offset;__pci_register_driver_~arg1#1.base, __pci_register_driver_~arg1#1.offset := __pci_register_driver_#in~arg1#1.base, __pci_register_driver_#in~arg1#1.offset;__pci_register_driver_~arg2#1.base, __pci_register_driver_~arg2#1.offset := __pci_register_driver_#in~arg2#1.base, __pci_register_driver_#in~arg2#1.offset;assume -2147483648 <= __pci_register_driver_#t~nondet1173#1 && __pci_register_driver_#t~nondet1173#1 <= 2147483647;__pci_register_driver_#res#1 := __pci_register_driver_#t~nondet1173#1;havoc __pci_register_driver_#t~nondet1173#1; {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} is VALID [2022-02-20 22:55:06,706 INFO L290 TraceCheckUtils]: 4: Hoare triple {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} ldv___pci_register_driver_122_#t~ret1066#1 := __pci_register_driver_#res#1;assume { :end_inline___pci_register_driver } true;assume -2147483648 <= ldv___pci_register_driver_122_#t~ret1066#1 && ldv___pci_register_driver_122_#t~ret1066#1 <= 2147483647;ldv___pci_register_driver_122_~tmp~97#1 := ldv___pci_register_driver_122_#t~ret1066#1;havoc ldv___pci_register_driver_122_#t~ret1066#1;ldv___pci_register_driver_122_~ldv_func_res~6#1 := ldv___pci_register_driver_122_~tmp~97#1;assume { :begin_inline_ldv___pci_register_driver } true;ldv___pci_register_driver_#in~arg0#1, ldv___pci_register_driver_#in~arg1#1.base, ldv___pci_register_driver_#in~arg1#1.offset, ldv___pci_register_driver_#in~arg2#1.base, ldv___pci_register_driver_#in~arg2#1.offset, ldv___pci_register_driver_#in~arg3#1.base, ldv___pci_register_driver_#in~arg3#1.offset := ldv___pci_register_driver_122_~ldv_func_res~6#1, ldv___pci_register_driver_122_~ldv_func_arg1#1.base, ldv___pci_register_driver_122_~ldv_func_arg1#1.offset, ldv___pci_register_driver_122_~ldv_func_arg2#1.base, ldv___pci_register_driver_122_~ldv_func_arg2#1.offset, ldv___pci_register_driver_122_~ldv_func_arg3#1.base, ldv___pci_register_driver_122_~ldv_func_arg3#1.offset;havoc ldv___pci_register_driver_#res#1;havoc ldv___pci_register_driver_#t~ret961#1, ldv___pci_register_driver_~arg0#1, ldv___pci_register_driver_~arg1#1.base, ldv___pci_register_driver_~arg1#1.offset, ldv___pci_register_driver_~arg2#1.base, ldv___pci_register_driver_~arg2#1.offset, ldv___pci_register_driver_~arg3#1.base, ldv___pci_register_driver_~arg3#1.offset, ldv___pci_register_driver_~ldv_13_pci_driver_pci_driver~0#1.base, ldv___pci_register_driver_~ldv_13_pci_driver_pci_driver~0#1.offset, ldv___pci_register_driver_~tmp~69#1;ldv___pci_register_driver_~arg0#1 := ldv___pci_register_driver_#in~arg0#1;ldv___pci_register_driver_~arg1#1.base, ldv___pci_register_driver_~arg1#1.offset := ldv___pci_register_driver_#in~arg1#1.base, ldv___pci_register_driver_#in~arg1#1.offset;ldv___pci_register_driver_~arg2#1.base, ldv___pci_register_driver_~arg2#1.offset := ldv___pci_register_driver_#in~arg2#1.base, ldv___pci_register_driver_#in~arg2#1.offset;ldv___pci_register_driver_~arg3#1.base, ldv___pci_register_driver_~arg3#1.offset := ldv___pci_register_driver_#in~arg3#1.base, ldv___pci_register_driver_#in~arg3#1.offset;havoc ldv___pci_register_driver_~ldv_13_pci_driver_pci_driver~0#1.base, ldv___pci_register_driver_~ldv_13_pci_driver_pci_driver~0#1.offset;havoc ldv___pci_register_driver_~tmp~69#1; {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} is VALID [2022-02-20 22:55:06,706 INFO L272 TraceCheckUtils]: 5: Hoare triple {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} call ldv___pci_register_driver_#t~ret961#1 := ldv_undef_int(); {26410#true} is VALID [2022-02-20 22:55:06,706 INFO L290 TraceCheckUtils]: 6: Hoare triple {26410#true} havoc ~tmp~111;assume -2147483648 <= #t~nondet1100 && #t~nondet1100 <= 2147483647;~tmp~111 := #t~nondet1100;havoc #t~nondet1100;#res := ~tmp~111; {26410#true} is VALID [2022-02-20 22:55:06,706 INFO L290 TraceCheckUtils]: 7: Hoare triple {26410#true} assume true; {26410#true} is VALID [2022-02-20 22:55:06,707 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {26410#true} {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} #4937#return; {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} is VALID [2022-02-20 22:55:06,707 INFO L290 TraceCheckUtils]: 9: Hoare triple {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} assume -2147483648 <= ldv___pci_register_driver_#t~ret961#1 && ldv___pci_register_driver_#t~ret961#1 <= 2147483647;ldv___pci_register_driver_~tmp~69#1 := ldv___pci_register_driver_#t~ret961#1;havoc ldv___pci_register_driver_#t~ret961#1; {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} is VALID [2022-02-20 22:55:06,708 INFO L290 TraceCheckUtils]: 10: Hoare triple {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} assume 0 != ldv___pci_register_driver_~tmp~69#1; {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} is VALID [2022-02-20 22:55:06,708 INFO L272 TraceCheckUtils]: 11: Hoare triple {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} call ldv_assume((if 0 == ldv___pci_register_driver_~arg0#1 then 1 else 0)); {26410#true} is VALID [2022-02-20 22:55:06,708 INFO L290 TraceCheckUtils]: 12: Hoare triple {26410#true} ~expression := #in~expression; {26410#true} is VALID [2022-02-20 22:55:06,708 INFO L290 TraceCheckUtils]: 13: Hoare triple {26410#true} assume !(0 == ~expression); {26410#true} is VALID [2022-02-20 22:55:06,708 INFO L290 TraceCheckUtils]: 14: Hoare triple {26410#true} assume true; {26410#true} is VALID [2022-02-20 22:55:06,709 INFO L284 TraceCheckUtils]: 15: Hoare quadruple {26410#true} {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} #4939#return; {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} is VALID [2022-02-20 22:55:06,709 INFO L290 TraceCheckUtils]: 16: Hoare triple {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} ldv___pci_register_driver_~ldv_13_pci_driver_pci_driver~0#1.base, ldv___pci_register_driver_~ldv_13_pci_driver_pci_driver~0#1.offset := ldv___pci_register_driver_~arg1#1.base, ldv___pci_register_driver_~arg1#1.offset;assume { :begin_inline_ldv_dispatch_register_13_2 } true;ldv_dispatch_register_13_2_#in~arg0#1.base, ldv_dispatch_register_13_2_#in~arg0#1.offset := ldv___pci_register_driver_~ldv_13_pci_driver_pci_driver~0#1.base, ldv___pci_register_driver_~ldv_13_pci_driver_pci_driver~0#1.offset;havoc ldv_dispatch_register_13_2_#t~ret966#1.base, ldv_dispatch_register_13_2_#t~ret966#1.offset, ldv_dispatch_register_13_2_~arg0#1.base, ldv_dispatch_register_13_2_~arg0#1.offset, ldv_dispatch_register_13_2_~cf_arg_2~0#1.base, ldv_dispatch_register_13_2_~cf_arg_2~0#1.offset, ldv_dispatch_register_13_2_~tmp~73#1.base, ldv_dispatch_register_13_2_~tmp~73#1.offset;ldv_dispatch_register_13_2_~arg0#1.base, ldv_dispatch_register_13_2_~arg0#1.offset := ldv_dispatch_register_13_2_#in~arg0#1.base, ldv_dispatch_register_13_2_#in~arg0#1.offset;havoc ldv_dispatch_register_13_2_~cf_arg_2~0#1.base, ldv_dispatch_register_13_2_~cf_arg_2~0#1.offset;havoc ldv_dispatch_register_13_2_~tmp~73#1.base, ldv_dispatch_register_13_2_~tmp~73#1.offset; {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} is VALID [2022-02-20 22:55:06,710 INFO L272 TraceCheckUtils]: 17: Hoare triple {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} call ldv_dispatch_register_13_2_#t~ret966#1.base, ldv_dispatch_register_13_2_#t~ret966#1.offset := ldv_xmalloc(16); {26494#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:55:06,710 INFO L290 TraceCheckUtils]: 18: Hoare triple {26494#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~5.base, ~res~5.offset;havoc ~tmp~109.base, ~tmp~109.offset;havoc ~tmp___0~53;call #t~malloc1096.base, #t~malloc1096.offset := #Ultimate.allocOnHeap(~size);~tmp~109.base, ~tmp~109.offset := #t~malloc1096.base, #t~malloc1096.offset;havoc #t~malloc1096.base, #t~malloc1096.offset;~res~5.base, ~res~5.offset := ~tmp~109.base, ~tmp~109.offset; {26410#true} is VALID [2022-02-20 22:55:06,710 INFO L272 TraceCheckUtils]: 19: Hoare triple {26410#true} call ldv_assume((if 0 != (~res~5.base + ~res~5.offset) % 18446744073709551616 then 1 else 0)); {26410#true} is VALID [2022-02-20 22:55:06,711 INFO L290 TraceCheckUtils]: 20: Hoare triple {26410#true} ~expression := #in~expression; {26410#true} is VALID [2022-02-20 22:55:06,711 INFO L290 TraceCheckUtils]: 21: Hoare triple {26410#true} assume !(0 == ~expression); {26410#true} is VALID [2022-02-20 22:55:06,711 INFO L290 TraceCheckUtils]: 22: Hoare triple {26410#true} assume true; {26410#true} is VALID [2022-02-20 22:55:06,711 INFO L284 TraceCheckUtils]: 23: Hoare quadruple {26410#true} {26410#true} #4875#return; {26410#true} is VALID [2022-02-20 22:55:06,711 INFO L272 TraceCheckUtils]: 24: Hoare triple {26410#true} call #t~ret1097 := ldv_is_err(~res~5.base, ~res~5.offset); {26410#true} is VALID [2022-02-20 22:55:06,711 INFO L290 TraceCheckUtils]: 25: Hoare triple {26410#true} ~ptr.base, ~ptr.offset := #in~ptr.base, #in~ptr.offset;#res := (if (~ptr.base + ~ptr.offset) % 18446744073709551616 > 4294967295 then 1 else 0); {26410#true} is VALID [2022-02-20 22:55:06,711 INFO L290 TraceCheckUtils]: 26: Hoare triple {26410#true} assume true; {26410#true} is VALID [2022-02-20 22:55:06,711 INFO L284 TraceCheckUtils]: 27: Hoare quadruple {26410#true} {26410#true} #4877#return; {26410#true} is VALID [2022-02-20 22:55:06,712 INFO L290 TraceCheckUtils]: 28: Hoare triple {26410#true} assume -9223372036854775808 <= #t~ret1097 && #t~ret1097 <= 9223372036854775807;~tmp___0~53 := #t~ret1097;havoc #t~ret1097; {26410#true} is VALID [2022-02-20 22:55:06,712 INFO L272 TraceCheckUtils]: 29: Hoare triple {26410#true} call ldv_assume((if 0 == ~tmp___0~53 then 1 else 0)); {26410#true} is VALID [2022-02-20 22:55:06,712 INFO L290 TraceCheckUtils]: 30: Hoare triple {26410#true} ~expression := #in~expression; {26410#true} is VALID [2022-02-20 22:55:06,712 INFO L290 TraceCheckUtils]: 31: Hoare triple {26410#true} assume !(0 == ~expression); {26410#true} is VALID [2022-02-20 22:55:06,712 INFO L290 TraceCheckUtils]: 32: Hoare triple {26410#true} assume true; {26410#true} is VALID [2022-02-20 22:55:06,712 INFO L284 TraceCheckUtils]: 33: Hoare quadruple {26410#true} {26410#true} #4879#return; {26410#true} is VALID [2022-02-20 22:55:06,712 INFO L290 TraceCheckUtils]: 34: Hoare triple {26410#true} #res.base, #res.offset := ~res~5.base, ~res~5.offset; {26410#true} is VALID [2022-02-20 22:55:06,712 INFO L290 TraceCheckUtils]: 35: Hoare triple {26410#true} assume true; {26410#true} is VALID [2022-02-20 22:55:06,713 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {26410#true} {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} #4941#return; {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} is VALID [2022-02-20 22:55:06,714 INFO L290 TraceCheckUtils]: 37: Hoare triple {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} ldv_dispatch_register_13_2_~tmp~73#1.base, ldv_dispatch_register_13_2_~tmp~73#1.offset := ldv_dispatch_register_13_2_#t~ret966#1.base, ldv_dispatch_register_13_2_#t~ret966#1.offset;havoc ldv_dispatch_register_13_2_#t~ret966#1.base, ldv_dispatch_register_13_2_#t~ret966#1.offset;ldv_dispatch_register_13_2_~cf_arg_2~0#1.base, ldv_dispatch_register_13_2_~cf_arg_2~0#1.offset := ldv_dispatch_register_13_2_~tmp~73#1.base, ldv_dispatch_register_13_2_~tmp~73#1.offset;call write~$Pointer$(ldv_dispatch_register_13_2_~arg0#1.base, ldv_dispatch_register_13_2_~arg0#1.offset, ldv_dispatch_register_13_2_~cf_arg_2~0#1.base, ldv_dispatch_register_13_2_~cf_arg_2~0#1.offset, 8);assume { :begin_inline_ldv_pci_pci_instance_2 } true;ldv_pci_pci_instance_2_#in~arg0#1.base, ldv_pci_pci_instance_2_#in~arg0#1.offset := ldv_dispatch_register_13_2_~cf_arg_2~0#1.base, ldv_dispatch_register_13_2_~cf_arg_2~0#1.offset;havoc ldv_pci_pci_instance_2_#t~mem1007#1.base, ldv_pci_pci_instance_2_#t~mem1007#1.offset, ldv_pci_pci_instance_2_#t~ret1008#1.base, ldv_pci_pci_instance_2_#t~ret1008#1.offset, ldv_pci_pci_instance_2_#t~ret1009#1.base, ldv_pci_pci_instance_2_#t~ret1009#1.offset, ldv_pci_pci_instance_2_#t~ret1010#1, ldv_pci_pci_instance_2_#t~mem1011#1.base, ldv_pci_pci_instance_2_#t~mem1011#1.offset, ldv_pci_pci_instance_2_#t~ret1012#1, ldv_pci_pci_instance_2_#t~ret1013#1, ldv_pci_pci_instance_2_#t~ret1014#1, ldv_pci_pci_instance_2_#t~ret1015#1, ldv_pci_pci_instance_2_#t~mem1016#1.base, ldv_pci_pci_instance_2_#t~mem1016#1.offset, ldv_pci_pci_instance_2_#t~mem1017#1.base, ldv_pci_pci_instance_2_#t~mem1017#1.offset, ldv_pci_pci_instance_2_#t~mem1018#1, ldv_pci_pci_instance_2_#t~ret1019#1, ldv_pci_pci_instance_2_#t~ret1020#1, ldv_pci_pci_instance_2_#t~mem1021#1.base, ldv_pci_pci_instance_2_#t~mem1021#1.offset, ldv_pci_pci_instance_2_#t~mem1022#1.base, ldv_pci_pci_instance_2_#t~mem1022#1.offset, ldv_pci_pci_instance_2_#t~mem1023#1, ldv_pci_pci_instance_2_#t~ret1024#1, ldv_pci_pci_instance_2_#t~ret1025#1, ldv_pci_pci_instance_2_#t~mem1026#1.base, ldv_pci_pci_instance_2_#t~mem1026#1.offset, ldv_pci_pci_instance_2_#t~mem1027#1.base, ldv_pci_pci_instance_2_#t~mem1027#1.offset, ldv_pci_pci_instance_2_#t~mem1028#1.base, ldv_pci_pci_instance_2_#t~mem1028#1.offset, ldv_pci_pci_instance_2_#t~mem1029#1.base, ldv_pci_pci_instance_2_#t~mem1029#1.offset, ldv_pci_pci_instance_2_#t~mem1030#1.base, ldv_pci_pci_instance_2_#t~mem1030#1.offset, ldv_pci_pci_instance_2_#t~mem1031#1.base, ldv_pci_pci_instance_2_#t~mem1031#1.offset, ldv_pci_pci_instance_2_#t~mem1032#1.base, ldv_pci_pci_instance_2_#t~mem1032#1.offset, ldv_pci_pci_instance_2_~arg0#1.base, ldv_pci_pci_instance_2_~arg0#1.offset, ldv_pci_pci_instance_2_~ldv_2_container_pci_driver~0#1.base, ldv_pci_pci_instance_2_~ldv_2_container_pci_driver~0#1.offset, ldv_pci_pci_instance_2_~ldv_2_resource_dev~0#1.base, ldv_pci_pci_instance_2_~ldv_2_resource_dev~0#1.offset, ldv_pci_pci_instance_2_~#ldv_2_resource_pm_message~0#1.base, ldv_pci_pci_instance_2_~#ldv_2_resource_pm_message~0#1.offset, ldv_pci_pci_instance_2_~ldv_2_resource_struct_pci_device_id_ptr~0#1.base, ldv_pci_pci_instance_2_~ldv_2_resource_struct_pci_device_id_ptr~0#1.offset, ldv_pci_pci_instance_2_~ldv_2_ret_default~0#1, ldv_pci_pci_instance_2_~data~2#1.base, ldv_pci_pci_instance_2_~data~2#1.offset, ldv_pci_pci_instance_2_~tmp~83#1.base, ldv_pci_pci_instance_2_~tmp~83#1.offset, ldv_pci_pci_instance_2_~tmp___0~41#1.base, ldv_pci_pci_instance_2_~tmp___0~41#1.offset, ldv_pci_pci_instance_2_~tmp___1~29#1, ldv_pci_pci_instance_2_~tmp___2~19#1, ldv_pci_pci_instance_2_~tmp___3~12#1;ldv_pci_pci_instance_2_~arg0#1.base, ldv_pci_pci_instance_2_~arg0#1.offset := ldv_pci_pci_instance_2_#in~arg0#1.base, ldv_pci_pci_instance_2_#in~arg0#1.offset;havoc ldv_pci_pci_instance_2_~ldv_2_container_pci_driver~0#1.base, ldv_pci_pci_instance_2_~ldv_2_container_pci_driver~0#1.offset;havoc ldv_pci_pci_instance_2_~ldv_2_resource_dev~0#1.base, ldv_pci_pci_instance_2_~ldv_2_resource_dev~0#1.offset;call ldv_pci_pci_instance_2_~#ldv_2_resource_pm_message~0#1.base, ldv_pci_pci_instance_2_~#ldv_2_resource_pm_message~0#1.offset := #Ultimate.allocOnStack(4);havoc ldv_pci_pci_instance_2_~ldv_2_resource_struct_pci_device_id_ptr~0#1.base, ldv_pci_pci_instance_2_~ldv_2_resource_struct_pci_device_id_ptr~0#1.offset;havoc ldv_pci_pci_instance_2_~ldv_2_ret_default~0#1;havoc ldv_pci_pci_instance_2_~data~2#1.base, ldv_pci_pci_instance_2_~data~2#1.offset;havoc ldv_pci_pci_instance_2_~tmp~83#1.base, ldv_pci_pci_instance_2_~tmp~83#1.offset;havoc ldv_pci_pci_instance_2_~tmp___0~41#1.base, ldv_pci_pci_instance_2_~tmp___0~41#1.offset;havoc ldv_pci_pci_instance_2_~tmp___1~29#1;havoc ldv_pci_pci_instance_2_~tmp___2~19#1;havoc ldv_pci_pci_instance_2_~tmp___3~12#1;ldv_pci_pci_instance_2_~data~2#1.base, ldv_pci_pci_instance_2_~data~2#1.offset := ldv_pci_pci_instance_2_~arg0#1.base, ldv_pci_pci_instance_2_~arg0#1.offset;ldv_pci_pci_instance_2_~ldv_2_ret_default~0#1 := 1; {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} is VALID [2022-02-20 22:55:06,715 INFO L290 TraceCheckUtils]: 38: Hoare triple {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} assume !(0 != (ldv_pci_pci_instance_2_~data~2#1.base + ldv_pci_pci_instance_2_~data~2#1.offset) % 18446744073709551616); {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} is VALID [2022-02-20 22:55:06,715 INFO L272 TraceCheckUtils]: 39: Hoare triple {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} call ldv_pci_pci_instance_2_#t~ret1008#1.base, ldv_pci_pci_instance_2_#t~ret1008#1.offset := ldv_xmalloc(2936); {26494#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:55:06,715 INFO L290 TraceCheckUtils]: 40: Hoare triple {26494#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~5.base, ~res~5.offset;havoc ~tmp~109.base, ~tmp~109.offset;havoc ~tmp___0~53;call #t~malloc1096.base, #t~malloc1096.offset := #Ultimate.allocOnHeap(~size);~tmp~109.base, ~tmp~109.offset := #t~malloc1096.base, #t~malloc1096.offset;havoc #t~malloc1096.base, #t~malloc1096.offset;~res~5.base, ~res~5.offset := ~tmp~109.base, ~tmp~109.offset; {26410#true} is VALID [2022-02-20 22:55:06,716 INFO L272 TraceCheckUtils]: 41: Hoare triple {26410#true} call ldv_assume((if 0 != (~res~5.base + ~res~5.offset) % 18446744073709551616 then 1 else 0)); {26410#true} is VALID [2022-02-20 22:55:06,716 INFO L290 TraceCheckUtils]: 42: Hoare triple {26410#true} ~expression := #in~expression; {26410#true} is VALID [2022-02-20 22:55:06,716 INFO L290 TraceCheckUtils]: 43: Hoare triple {26410#true} assume !(0 == ~expression); {26410#true} is VALID [2022-02-20 22:55:06,716 INFO L290 TraceCheckUtils]: 44: Hoare triple {26410#true} assume true; {26410#true} is VALID [2022-02-20 22:55:06,716 INFO L284 TraceCheckUtils]: 45: Hoare quadruple {26410#true} {26410#true} #4875#return; {26410#true} is VALID [2022-02-20 22:55:06,716 INFO L272 TraceCheckUtils]: 46: Hoare triple {26410#true} call #t~ret1097 := ldv_is_err(~res~5.base, ~res~5.offset); {26410#true} is VALID [2022-02-20 22:55:06,716 INFO L290 TraceCheckUtils]: 47: Hoare triple {26410#true} ~ptr.base, ~ptr.offset := #in~ptr.base, #in~ptr.offset;#res := (if (~ptr.base + ~ptr.offset) % 18446744073709551616 > 4294967295 then 1 else 0); {26410#true} is VALID [2022-02-20 22:55:06,717 INFO L290 TraceCheckUtils]: 48: Hoare triple {26410#true} assume true; {26410#true} is VALID [2022-02-20 22:55:06,717 INFO L284 TraceCheckUtils]: 49: Hoare quadruple {26410#true} {26410#true} #4877#return; {26410#true} is VALID [2022-02-20 22:55:06,717 INFO L290 TraceCheckUtils]: 50: Hoare triple {26410#true} assume -9223372036854775808 <= #t~ret1097 && #t~ret1097 <= 9223372036854775807;~tmp___0~53 := #t~ret1097;havoc #t~ret1097; {26410#true} is VALID [2022-02-20 22:55:06,717 INFO L272 TraceCheckUtils]: 51: Hoare triple {26410#true} call ldv_assume((if 0 == ~tmp___0~53 then 1 else 0)); {26410#true} is VALID [2022-02-20 22:55:06,717 INFO L290 TraceCheckUtils]: 52: Hoare triple {26410#true} ~expression := #in~expression; {26410#true} is VALID [2022-02-20 22:55:06,717 INFO L290 TraceCheckUtils]: 53: Hoare triple {26410#true} assume !(0 == ~expression); {26410#true} is VALID [2022-02-20 22:55:06,717 INFO L290 TraceCheckUtils]: 54: Hoare triple {26410#true} assume true; {26410#true} is VALID [2022-02-20 22:55:06,717 INFO L284 TraceCheckUtils]: 55: Hoare quadruple {26410#true} {26410#true} #4879#return; {26410#true} is VALID [2022-02-20 22:55:06,718 INFO L290 TraceCheckUtils]: 56: Hoare triple {26410#true} #res.base, #res.offset := ~res~5.base, ~res~5.offset; {26410#true} is VALID [2022-02-20 22:55:06,718 INFO L290 TraceCheckUtils]: 57: Hoare triple {26410#true} assume true; {26410#true} is VALID [2022-02-20 22:55:06,718 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {26410#true} {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} #4945#return; {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} is VALID [2022-02-20 22:55:06,719 INFO L290 TraceCheckUtils]: 59: Hoare triple {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} ldv_pci_pci_instance_2_~tmp~83#1.base, ldv_pci_pci_instance_2_~tmp~83#1.offset := ldv_pci_pci_instance_2_#t~ret1008#1.base, ldv_pci_pci_instance_2_#t~ret1008#1.offset;havoc ldv_pci_pci_instance_2_#t~ret1008#1.base, ldv_pci_pci_instance_2_#t~ret1008#1.offset;ldv_pci_pci_instance_2_~ldv_2_resource_dev~0#1.base, ldv_pci_pci_instance_2_~ldv_2_resource_dev~0#1.offset := ldv_pci_pci_instance_2_~tmp~83#1.base, ldv_pci_pci_instance_2_~tmp~83#1.offset; {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} is VALID [2022-02-20 22:55:06,719 INFO L272 TraceCheckUtils]: 60: Hoare triple {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} call ldv_pci_pci_instance_2_#t~ret1009#1.base, ldv_pci_pci_instance_2_#t~ret1009#1.offset := ldv_xmalloc(32); {26494#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:55:06,719 INFO L290 TraceCheckUtils]: 61: Hoare triple {26494#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~res~5.base, ~res~5.offset;havoc ~tmp~109.base, ~tmp~109.offset;havoc ~tmp___0~53;call #t~malloc1096.base, #t~malloc1096.offset := #Ultimate.allocOnHeap(~size);~tmp~109.base, ~tmp~109.offset := #t~malloc1096.base, #t~malloc1096.offset;havoc #t~malloc1096.base, #t~malloc1096.offset;~res~5.base, ~res~5.offset := ~tmp~109.base, ~tmp~109.offset; {26410#true} is VALID [2022-02-20 22:55:06,720 INFO L272 TraceCheckUtils]: 62: Hoare triple {26410#true} call ldv_assume((if 0 != (~res~5.base + ~res~5.offset) % 18446744073709551616 then 1 else 0)); {26410#true} is VALID [2022-02-20 22:55:06,720 INFO L290 TraceCheckUtils]: 63: Hoare triple {26410#true} ~expression := #in~expression; {26410#true} is VALID [2022-02-20 22:55:06,720 INFO L290 TraceCheckUtils]: 64: Hoare triple {26410#true} assume !(0 == ~expression); {26410#true} is VALID [2022-02-20 22:55:06,720 INFO L290 TraceCheckUtils]: 65: Hoare triple {26410#true} assume true; {26410#true} is VALID [2022-02-20 22:55:06,720 INFO L284 TraceCheckUtils]: 66: Hoare quadruple {26410#true} {26410#true} #4875#return; {26410#true} is VALID [2022-02-20 22:55:06,720 INFO L272 TraceCheckUtils]: 67: Hoare triple {26410#true} call #t~ret1097 := ldv_is_err(~res~5.base, ~res~5.offset); {26410#true} is VALID [2022-02-20 22:55:06,720 INFO L290 TraceCheckUtils]: 68: Hoare triple {26410#true} ~ptr.base, ~ptr.offset := #in~ptr.base, #in~ptr.offset;#res := (if (~ptr.base + ~ptr.offset) % 18446744073709551616 > 4294967295 then 1 else 0); {26410#true} is VALID [2022-02-20 22:55:06,721 INFO L290 TraceCheckUtils]: 69: Hoare triple {26410#true} assume true; {26410#true} is VALID [2022-02-20 22:55:06,721 INFO L284 TraceCheckUtils]: 70: Hoare quadruple {26410#true} {26410#true} #4877#return; {26410#true} is VALID [2022-02-20 22:55:06,721 INFO L290 TraceCheckUtils]: 71: Hoare triple {26410#true} assume -9223372036854775808 <= #t~ret1097 && #t~ret1097 <= 9223372036854775807;~tmp___0~53 := #t~ret1097;havoc #t~ret1097; {26410#true} is VALID [2022-02-20 22:55:06,721 INFO L272 TraceCheckUtils]: 72: Hoare triple {26410#true} call ldv_assume((if 0 == ~tmp___0~53 then 1 else 0)); {26410#true} is VALID [2022-02-20 22:55:06,721 INFO L290 TraceCheckUtils]: 73: Hoare triple {26410#true} ~expression := #in~expression; {26410#true} is VALID [2022-02-20 22:55:06,721 INFO L290 TraceCheckUtils]: 74: Hoare triple {26410#true} assume !(0 == ~expression); {26410#true} is VALID [2022-02-20 22:55:06,721 INFO L290 TraceCheckUtils]: 75: Hoare triple {26410#true} assume true; {26410#true} is VALID [2022-02-20 22:55:06,721 INFO L284 TraceCheckUtils]: 76: Hoare quadruple {26410#true} {26410#true} #4879#return; {26410#true} is VALID [2022-02-20 22:55:06,722 INFO L290 TraceCheckUtils]: 77: Hoare triple {26410#true} #res.base, #res.offset := ~res~5.base, ~res~5.offset; {26410#true} is VALID [2022-02-20 22:55:06,722 INFO L290 TraceCheckUtils]: 78: Hoare triple {26410#true} assume true; {26410#true} is VALID [2022-02-20 22:55:06,722 INFO L284 TraceCheckUtils]: 79: Hoare quadruple {26410#true} {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} #4947#return; {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} is VALID [2022-02-20 22:55:06,723 INFO L290 TraceCheckUtils]: 80: Hoare triple {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} ldv_pci_pci_instance_2_~tmp___0~41#1.base, ldv_pci_pci_instance_2_~tmp___0~41#1.offset := ldv_pci_pci_instance_2_#t~ret1009#1.base, ldv_pci_pci_instance_2_#t~ret1009#1.offset;havoc ldv_pci_pci_instance_2_#t~ret1009#1.base, ldv_pci_pci_instance_2_#t~ret1009#1.offset;ldv_pci_pci_instance_2_~ldv_2_resource_struct_pci_device_id_ptr~0#1.base, ldv_pci_pci_instance_2_~ldv_2_resource_struct_pci_device_id_ptr~0#1.offset := ldv_pci_pci_instance_2_~tmp___0~41#1.base, ldv_pci_pci_instance_2_~tmp___0~41#1.offset; {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} is VALID [2022-02-20 22:55:06,723 INFO L272 TraceCheckUtils]: 81: Hoare triple {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} call ldv_pci_pci_instance_2_#t~ret1010#1 := ldv_undef_int(); {26410#true} is VALID [2022-02-20 22:55:06,723 INFO L290 TraceCheckUtils]: 82: Hoare triple {26410#true} havoc ~tmp~111;assume -2147483648 <= #t~nondet1100 && #t~nondet1100 <= 2147483647;~tmp~111 := #t~nondet1100;havoc #t~nondet1100;#res := ~tmp~111; {26410#true} is VALID [2022-02-20 22:55:06,723 INFO L290 TraceCheckUtils]: 83: Hoare triple {26410#true} assume true; {26410#true} is VALID [2022-02-20 22:55:06,724 INFO L284 TraceCheckUtils]: 84: Hoare quadruple {26410#true} {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} #4949#return; {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} is VALID [2022-02-20 22:55:06,724 INFO L290 TraceCheckUtils]: 85: Hoare triple {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} assume -2147483648 <= ldv_pci_pci_instance_2_#t~ret1010#1 && ldv_pci_pci_instance_2_#t~ret1010#1 <= 2147483647;ldv_pci_pci_instance_2_~tmp___2~19#1 := ldv_pci_pci_instance_2_#t~ret1010#1;havoc ldv_pci_pci_instance_2_#t~ret1010#1; {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} is VALID [2022-02-20 22:55:06,725 INFO L290 TraceCheckUtils]: 86: Hoare triple {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} assume 0 != ldv_pci_pci_instance_2_~tmp___2~19#1;assume { :begin_inline_ldv_pre_probe } true; {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} is VALID [2022-02-20 22:55:06,726 INFO L290 TraceCheckUtils]: 87: Hoare triple {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} assume { :end_inline_ldv_pre_probe } true;call ldv_pci_pci_instance_2_#t~mem1011#1.base, ldv_pci_pci_instance_2_#t~mem1011#1.offset := read~$Pointer$(ldv_pci_pci_instance_2_~ldv_2_container_pci_driver~0#1.base, 32 + ldv_pci_pci_instance_2_~ldv_2_container_pci_driver~0#1.offset, 8);assume { :begin_inline_ldv_pci_instance_probe_2_17 } true;ldv_pci_instance_probe_2_17_#in~arg0#1.base, ldv_pci_instance_probe_2_17_#in~arg0#1.offset, ldv_pci_instance_probe_2_17_#in~arg1#1.base, ldv_pci_instance_probe_2_17_#in~arg1#1.offset, ldv_pci_instance_probe_2_17_#in~arg2#1.base, ldv_pci_instance_probe_2_17_#in~arg2#1.offset := ldv_pci_pci_instance_2_#t~mem1011#1.base, ldv_pci_pci_instance_2_#t~mem1011#1.offset, ldv_pci_pci_instance_2_~ldv_2_resource_dev~0#1.base, ldv_pci_pci_instance_2_~ldv_2_resource_dev~0#1.offset, ldv_pci_pci_instance_2_~ldv_2_resource_struct_pci_device_id_ptr~0#1.base, ldv_pci_pci_instance_2_~ldv_2_resource_struct_pci_device_id_ptr~0#1.offset;havoc ldv_pci_instance_probe_2_17_#res#1;havoc ldv_pci_instance_probe_2_17_#t~ret993#1, ldv_pci_instance_probe_2_17_~arg0#1.base, ldv_pci_instance_probe_2_17_~arg0#1.offset, ldv_pci_instance_probe_2_17_~arg1#1.base, ldv_pci_instance_probe_2_17_~arg1#1.offset, ldv_pci_instance_probe_2_17_~arg2#1.base, ldv_pci_instance_probe_2_17_~arg2#1.offset, ldv_pci_instance_probe_2_17_~tmp~80#1;ldv_pci_instance_probe_2_17_~arg0#1.base, ldv_pci_instance_probe_2_17_~arg0#1.offset := ldv_pci_instance_probe_2_17_#in~arg0#1.base, ldv_pci_instance_probe_2_17_#in~arg0#1.offset;ldv_pci_instance_probe_2_17_~arg1#1.base, ldv_pci_instance_probe_2_17_~arg1#1.offset := ldv_pci_instance_probe_2_17_#in~arg1#1.base, ldv_pci_instance_probe_2_17_#in~arg1#1.offset;ldv_pci_instance_probe_2_17_~arg2#1.base, ldv_pci_instance_probe_2_17_~arg2#1.offset := ldv_pci_instance_probe_2_17_#in~arg2#1.base, ldv_pci_instance_probe_2_17_#in~arg2#1.offset;havoc ldv_pci_instance_probe_2_17_~tmp~80#1;assume { :begin_inline_happy_meal_pci_probe } true;happy_meal_pci_probe_#in~pdev#1.base, happy_meal_pci_probe_#in~pdev#1.offset, happy_meal_pci_probe_#in~ent#1.base, happy_meal_pci_probe_#in~ent#1.offset := ldv_pci_instance_probe_2_17_~arg1#1.base, ldv_pci_instance_probe_2_17_~arg1#1.offset, ldv_pci_instance_probe_2_17_~arg2#1.base, ldv_pci_instance_probe_2_17_~arg2#1.offset;havoc happy_meal_pci_probe_#res#1;havoc happy_meal_pci_probe_#t~ret897#1, happy_meal_pci_probe_#t~strcpy~res898#1.base, happy_meal_pci_probe_#t~strcpy~res898#1.offset, happy_meal_pci_probe_#t~strcpy~res899#1.base, happy_meal_pci_probe_#t~strcpy~res899#1.offset, happy_meal_pci_probe_#t~ret900#1, happy_meal_pci_probe_#t~nondet901#1, happy_meal_pci_probe_#t~nondet902#1, happy_meal_pci_probe_#t~ret903#1.base, happy_meal_pci_probe_#t~ret903#1.offset, happy_meal_pci_probe_#t~mem904#1.base, happy_meal_pci_probe_#t~mem904#1.offset, happy_meal_pci_probe_#t~ret905#1.base, happy_meal_pci_probe_#t~ret905#1.offset, happy_meal_pci_probe_#t~nondet906#1, happy_meal_pci_probe_#t~ret907#1.base, happy_meal_pci_probe_#t~ret907#1.offset, happy_meal_pci_probe_#t~ret908#1.base, happy_meal_pci_probe_#t~ret908#1.offset, happy_meal_pci_probe_#t~mem909#1, happy_meal_pci_probe_#t~mem910#1, happy_meal_pci_probe_#t~nondet911#1, happy_meal_pci_probe_#t~ret912#1, happy_meal_pci_probe_#t~nondet913#1, happy_meal_pci_probe_#t~ret914#1.base, happy_meal_pci_probe_#t~ret914#1.offset, happy_meal_pci_probe_#t~nondet915#1, happy_meal_pci_probe_#t~mem916#1, happy_meal_pci_probe_#t~mem917#1.base, happy_meal_pci_probe_#t~mem917#1.offset, happy_meal_pci_probe_#t~mem918#1, happy_meal_pci_probe_#t~mem919#1, happy_meal_pci_probe_#t~mem920#1.base, happy_meal_pci_probe_#t~mem920#1.offset, happy_meal_pci_probe_#t~mem921#1, happy_meal_pci_probe_#t~mem922#1, happy_meal_pci_probe_#t~mem923#1, happy_meal_pci_probe_#t~short924#1, happy_meal_pci_probe_#t~mem925#1, happy_meal_pci_probe_#t~mem926#1, happy_meal_pci_probe_#t~ret927#1.base, happy_meal_pci_probe_#t~ret927#1.offset, happy_meal_pci_probe_#t~mem928#1.base, happy_meal_pci_probe_#t~mem928#1.offset, happy_meal_pci_probe_#t~mem929#1, happy_meal_pci_probe_#t~mem930#1, happy_meal_pci_probe_#t~mem931#1, happy_meal_pci_probe_#t~mem932#1.base, happy_meal_pci_probe_#t~mem932#1.offset, happy_meal_pci_probe_#t~ret933#1, happy_meal_pci_probe_#t~nondet934#1, happy_meal_pci_probe_#t~mem935#1.base, happy_meal_pci_probe_#t~mem935#1.offset, happy_meal_pci_probe_#t~ret936#1, happy_meal_pci_probe_#t~ret937#1, happy_meal_pci_probe_#t~nondet938#1, happy_meal_pci_probe_#t~nondet939#1, happy_meal_pci_probe_#t~mem940#1, happy_meal_pci_probe_#t~nondet941#1, happy_meal_pci_probe_#t~nondet942#1, happy_meal_pci_probe_#t~mem943#1, happy_meal_pci_probe_#t~mem944#1, happy_meal_pci_probe_#t~nondet945#1, happy_meal_pci_probe_#t~nondet946#1, happy_meal_pci_probe_#t~nondet947#1, happy_meal_pci_probe_#t~mem948#1.base, happy_meal_pci_probe_#t~mem948#1.offset, happy_meal_pci_probe_#t~mem949#1.base, happy_meal_pci_probe_#t~mem949#1.offset, happy_meal_pci_probe_~pdev#1.base, happy_meal_pci_probe_~pdev#1.offset, happy_meal_pci_probe_~ent#1.base, happy_meal_pci_probe_~ent#1.offset, happy_meal_pci_probe_~qp~1#1.base, happy_meal_pci_probe_~qp~1#1.offset, happy_meal_pci_probe_~hp~12#1.base, happy_meal_pci_probe_~hp~12#1.offset, happy_meal_pci_probe_~dev~2#1.base, happy_meal_pci_probe_~dev~2#1.offset, happy_meal_pci_probe_~hpreg_base~0#1.base, happy_meal_pci_probe_~hpreg_base~0#1.offset, happy_meal_pci_probe_~hpreg_res~0#1, happy_meal_pci_probe_~i~6#1, happy_meal_pci_probe_~qfe_slot~0#1, happy_meal_pci_probe_~#prom_name~0#1.base, happy_meal_pci_probe_~#prom_name~0#1.offset, happy_meal_pci_probe_~err~0#1, happy_meal_pci_probe_~tmp~65#1, happy_meal_pci_probe_~tmp___0~38#1, happy_meal_pci_probe_~tmp___1~28#1, happy_meal_pci_probe_~tmp___2~18#1, happy_meal_pci_probe_~tmp___3~11#1, happy_meal_pci_probe_~tmp___4~8#1.base, happy_meal_pci_probe_~tmp___4~8#1.offset, happy_meal_pci_probe_~#__key~0#1.base, happy_meal_pci_probe_~#__key~0#1.offset, happy_meal_pci_probe_~tmp___5~5#1, happy_meal_pci_probe_~tmp___6~4#1.base, happy_meal_pci_probe_~tmp___6~4#1.offset, happy_meal_pci_probe_~#__key___0~0#1.base, happy_meal_pci_probe_~#__key___0~0#1.offset, happy_meal_pci_probe_~qpdev~1#1.base, happy_meal_pci_probe_~qpdev~1#1.offset, happy_meal_pci_probe_~i___0~0#1, happy_meal_pci_probe_~tmp___7~3#1, happy_meal_pci_probe_~tmp___8~2#1;happy_meal_pci_probe_~pdev#1.base, happy_meal_pci_probe_~pdev#1.offset := happy_meal_pci_probe_#in~pdev#1.base, happy_meal_pci_probe_#in~pdev#1.offset;happy_meal_pci_probe_~ent#1.base, happy_meal_pci_probe_~ent#1.offset := happy_meal_pci_probe_#in~ent#1.base, happy_meal_pci_probe_#in~ent#1.offset;havoc happy_meal_pci_probe_~qp~1#1.base, happy_meal_pci_probe_~qp~1#1.offset;havoc happy_meal_pci_probe_~hp~12#1.base, happy_meal_pci_probe_~hp~12#1.offset;havoc happy_meal_pci_probe_~dev~2#1.base, happy_meal_pci_probe_~dev~2#1.offset;havoc happy_meal_pci_probe_~hpreg_base~0#1.base, happy_meal_pci_probe_~hpreg_base~0#1.offset;havoc happy_meal_pci_probe_~hpreg_res~0#1;havoc happy_meal_pci_probe_~i~6#1;havoc happy_meal_pci_probe_~qfe_slot~0#1;call happy_meal_pci_probe_~#prom_name~0#1.base, happy_meal_pci_probe_~#prom_name~0#1.offset := #Ultimate.allocOnStack(64);havoc happy_meal_pci_probe_~err~0#1;havoc happy_meal_pci_probe_~tmp~65#1;havoc happy_meal_pci_probe_~tmp___0~38#1;havoc happy_meal_pci_probe_~tmp___1~28#1;havoc happy_meal_pci_probe_~tmp___2~18#1;havoc happy_meal_pci_probe_~tmp___3~11#1;havoc happy_meal_pci_probe_~tmp___4~8#1.base, happy_meal_pci_probe_~tmp___4~8#1.offset;call happy_meal_pci_probe_~#__key~0#1.base, happy_meal_pci_probe_~#__key~0#1.offset := #Ultimate.allocOnStack(8);havoc happy_meal_pci_probe_~tmp___5~5#1;havoc happy_meal_pci_probe_~tmp___6~4#1.base, happy_meal_pci_probe_~tmp___6~4#1.offset;call happy_meal_pci_probe_~#__key___0~0#1.base, happy_meal_pci_probe_~#__key___0~0#1.offset := #Ultimate.allocOnStack(8);havoc happy_meal_pci_probe_~qpdev~1#1.base, happy_meal_pci_probe_~qpdev~1#1.offset;havoc happy_meal_pci_probe_~i___0~0#1;havoc happy_meal_pci_probe_~tmp___7~3#1;havoc happy_meal_pci_probe_~tmp___8~2#1;happy_meal_pci_probe_~qp~1#1.base, happy_meal_pci_probe_~qp~1#1.offset := 0, 0;happy_meal_pci_probe_~qfe_slot~0#1 := -1; {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} is VALID [2022-02-20 22:55:06,726 INFO L272 TraceCheckUtils]: 88: Hoare triple {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} call happy_meal_pci_probe_#t~ret897#1 := is_quattro_p(happy_meal_pci_probe_~pdev#1.base, happy_meal_pci_probe_~pdev#1.offset); {26410#true} is VALID [2022-02-20 22:55:06,726 INFO L290 TraceCheckUtils]: 89: Hoare triple {26410#true} ~pdev.base, ~pdev.offset := #in~pdev.base, #in~pdev.offset;havoc ~busdev~0.base, ~busdev~0.offset;havoc ~this_pdev~0.base, ~this_pdev~0.offset;havoc ~n_hmes~0;havoc ~__mptr~2.base, ~__mptr~2.offset;havoc ~__mptr___0~2.base, ~__mptr___0~2.offset;call #t~mem873.base, #t~mem873.offset := read~$Pointer$(~pdev.base, 16 + ~pdev.offset, 8);call #t~mem874.base, #t~mem874.offset := read~$Pointer$(#t~mem873.base, 56 + #t~mem873.offset, 8);~busdev~0.base, ~busdev~0.offset := #t~mem874.base, #t~mem874.offset;havoc #t~mem873.base, #t~mem873.offset;havoc #t~mem874.base, #t~mem874.offset;#t~short876 := 0 == (~busdev~0.base + ~busdev~0.offset) % 18446744073709551616; {26410#true} is VALID [2022-02-20 22:55:06,726 INFO L290 TraceCheckUtils]: 90: Hoare triple {26410#true} assume #t~short876; {26410#true} is VALID [2022-02-20 22:55:06,726 INFO L290 TraceCheckUtils]: 91: Hoare triple {26410#true} assume #t~short876;havoc #t~mem875;havoc #t~short876;#res := 0; {26410#true} is VALID [2022-02-20 22:55:06,727 INFO L290 TraceCheckUtils]: 92: Hoare triple {26410#true} assume true; {26410#true} is VALID [2022-02-20 22:55:06,727 INFO L284 TraceCheckUtils]: 93: Hoare quadruple {26410#true} {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} #4951#return; {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} is VALID [2022-02-20 22:55:06,728 INFO L290 TraceCheckUtils]: 94: Hoare triple {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} assume -2147483648 <= happy_meal_pci_probe_#t~ret897#1 && happy_meal_pci_probe_#t~ret897#1 <= 2147483647;happy_meal_pci_probe_~tmp~65#1 := happy_meal_pci_probe_#t~ret897#1;havoc happy_meal_pci_probe_#t~ret897#1; {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} is VALID [2022-02-20 22:55:06,728 INFO L290 TraceCheckUtils]: 95: Hoare triple {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} assume !(0 != happy_meal_pci_probe_~tmp~65#1); {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} is VALID [2022-02-20 22:55:06,729 INFO L272 TraceCheckUtils]: 96: Hoare triple {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} call happy_meal_pci_probe_#t~strcpy~res899#1.base, happy_meal_pci_probe_#t~strcpy~res899#1.offset := #Ultimate.C_strcpy(happy_meal_pci_probe_~#prom_name~0#1.base, happy_meal_pci_probe_~#prom_name~0#1.offset, 71, 0); {26528#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:55:06,729 INFO L290 TraceCheckUtils]: 97: Hoare triple {26528#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~offset1215 := 0; {26410#true} is VALID [2022-02-20 22:55:06,729 INFO L290 TraceCheckUtils]: 98: Hoare triple {26410#true} call #t~mem1216 := read~int(src.base, src.offset + #t~offset1215, 1);call write~unchecked~int(#t~mem1216, dest.base, dest.offset + #t~offset1215, 1); {26410#true} is VALID [2022-02-20 22:55:06,729 INFO L290 TraceCheckUtils]: 99: Hoare triple {26410#true} assume 0 == #t~mem1216; {26410#true} is VALID [2022-02-20 22:55:06,729 INFO L290 TraceCheckUtils]: 100: Hoare triple {26410#true} assume #res.base == dest.base && #res.offset == dest.offset; {26410#true} is VALID [2022-02-20 22:55:06,730 INFO L284 TraceCheckUtils]: 101: Hoare quadruple {26410#true} {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} #4955#return; {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} is VALID [2022-02-20 22:55:06,730 INFO L290 TraceCheckUtils]: 102: Hoare triple {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} havoc happy_meal_pci_probe_#t~strcpy~res899#1.base, happy_meal_pci_probe_#t~strcpy~res899#1.offset; {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} is VALID [2022-02-20 22:55:06,731 INFO L290 TraceCheckUtils]: 103: Hoare triple {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} happy_meal_pci_probe_~err~0#1 := -19;assume { :begin_inline_pci_enable_device } true;pci_enable_device_#in~arg0#1.base, pci_enable_device_#in~arg0#1.offset := happy_meal_pci_probe_~pdev#1.base, happy_meal_pci_probe_~pdev#1.offset;havoc pci_enable_device_#res#1;havoc pci_enable_device_#t~nondet1186#1, pci_enable_device_~arg0#1.base, pci_enable_device_~arg0#1.offset;pci_enable_device_~arg0#1.base, pci_enable_device_~arg0#1.offset := pci_enable_device_#in~arg0#1.base, pci_enable_device_#in~arg0#1.offset;assume -2147483648 <= pci_enable_device_#t~nondet1186#1 && pci_enable_device_#t~nondet1186#1 <= 2147483647;pci_enable_device_#res#1 := pci_enable_device_#t~nondet1186#1;havoc pci_enable_device_#t~nondet1186#1; {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} is VALID [2022-02-20 22:55:06,731 INFO L290 TraceCheckUtils]: 104: Hoare triple {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} happy_meal_pci_probe_#t~ret900#1 := pci_enable_device_#res#1;assume { :end_inline_pci_enable_device } true;assume -2147483648 <= happy_meal_pci_probe_#t~ret900#1 && happy_meal_pci_probe_#t~ret900#1 <= 2147483647;happy_meal_pci_probe_~tmp___0~38#1 := happy_meal_pci_probe_#t~ret900#1;havoc happy_meal_pci_probe_#t~ret900#1; {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} is VALID [2022-02-20 22:55:06,732 INFO L290 TraceCheckUtils]: 105: Hoare triple {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} assume !(0 != happy_meal_pci_probe_~tmp___0~38#1);assume { :begin_inline_pci_set_master } true;pci_set_master_#in~arg0#1.base, pci_set_master_#in~arg0#1.offset := happy_meal_pci_probe_~pdev#1.base, happy_meal_pci_probe_~pdev#1.offset;havoc pci_set_master_~arg0#1.base, pci_set_master_~arg0#1.offset;pci_set_master_~arg0#1.base, pci_set_master_~arg0#1.offset := pci_set_master_#in~arg0#1.base, pci_set_master_#in~arg0#1.offset; {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} is VALID [2022-02-20 22:55:06,732 INFO L290 TraceCheckUtils]: 106: Hoare triple {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} assume { :end_inline_pci_set_master } true;happy_meal_pci_probe_~tmp___1~28#1 := happy_meal_pci_probe_#t~nondet901#1;havoc happy_meal_pci_probe_#t~nondet901#1; {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} is VALID [2022-02-20 22:55:06,732 INFO L290 TraceCheckUtils]: 107: Hoare triple {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} assume 0 == happy_meal_pci_probe_~tmp___1~28#1; {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} is VALID [2022-02-20 22:55:06,733 INFO L290 TraceCheckUtils]: 108: Hoare triple {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} assume { :begin_inline_quattro_pci_find } true;quattro_pci_find_#in~pdev#1.base, quattro_pci_find_#in~pdev#1.offset := happy_meal_pci_probe_~pdev#1.base, happy_meal_pci_probe_~pdev#1.offset;havoc quattro_pci_find_#res#1.base, quattro_pci_find_#res#1.offset;havoc quattro_pci_find_#t~mem868#1.base, quattro_pci_find_#t~mem868#1.offset, quattro_pci_find_#t~mem869#1.base, quattro_pci_find_#t~mem869#1.offset, quattro_pci_find_#t~mem870#1.base, quattro_pci_find_#t~mem870#1.offset, quattro_pci_find_#t~mem871#1.base, quattro_pci_find_#t~mem871#1.offset, quattro_pci_find_#t~ret872#1.base, quattro_pci_find_#t~ret872#1.offset, quattro_pci_find_~pdev#1.base, quattro_pci_find_~pdev#1.offset, quattro_pci_find_~bdev~0#1.base, quattro_pci_find_~bdev~0#1.offset, quattro_pci_find_~qp~0#1.base, quattro_pci_find_~qp~0#1.offset, quattro_pci_find_~qpdev~0#1.base, quattro_pci_find_~qpdev~0#1.offset, quattro_pci_find_~tmp~62#1.base, quattro_pci_find_~tmp~62#1.offset, quattro_pci_find_~i~4#1;quattro_pci_find_~pdev#1.base, quattro_pci_find_~pdev#1.offset := quattro_pci_find_#in~pdev#1.base, quattro_pci_find_#in~pdev#1.offset;havoc quattro_pci_find_~bdev~0#1.base, quattro_pci_find_~bdev~0#1.offset;havoc quattro_pci_find_~qp~0#1.base, quattro_pci_find_~qp~0#1.offset;havoc quattro_pci_find_~qpdev~0#1.base, quattro_pci_find_~qpdev~0#1.offset;havoc quattro_pci_find_~tmp~62#1.base, quattro_pci_find_~tmp~62#1.offset;havoc quattro_pci_find_~i~4#1;call quattro_pci_find_#t~mem868#1.base, quattro_pci_find_#t~mem868#1.offset := read~$Pointer$(quattro_pci_find_~pdev#1.base, 16 + quattro_pci_find_~pdev#1.offset, 8);call quattro_pci_find_#t~mem869#1.base, quattro_pci_find_#t~mem869#1.offset := read~$Pointer$(quattro_pci_find_#t~mem868#1.base, 56 + quattro_pci_find_#t~mem868#1.offset, 8);quattro_pci_find_~bdev~0#1.base, quattro_pci_find_~bdev~0#1.offset := quattro_pci_find_#t~mem869#1.base, quattro_pci_find_#t~mem869#1.offset;havoc quattro_pci_find_#t~mem868#1.base, quattro_pci_find_#t~mem868#1.offset;havoc quattro_pci_find_#t~mem869#1.base, quattro_pci_find_#t~mem869#1.offset; {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} is VALID [2022-02-20 22:55:06,733 INFO L290 TraceCheckUtils]: 109: Hoare triple {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} assume !(0 == (quattro_pci_find_~bdev~0#1.base + quattro_pci_find_~bdev~0#1.offset) % 18446744073709551616);quattro_pci_find_~qp~0#1.base, quattro_pci_find_~qp~0#1.offset := ~qfe_pci_list~0.base, ~qfe_pci_list~0.offset; {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} is VALID [2022-02-20 22:55:06,733 INFO L290 TraceCheckUtils]: 110: Hoare triple {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} assume !(0 != (quattro_pci_find_~qp~0#1.base + quattro_pci_find_~qp~0#1.offset) % 18446744073709551616);assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := 56, 208;havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret1049#1.base, kmalloc_#t~ret1049#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~res~1#1.base, kmalloc_~res~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~res~1#1.base, kmalloc_~res~1#1.offset; {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} is VALID [2022-02-20 22:55:06,734 INFO L272 TraceCheckUtils]: 111: Hoare triple {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} call ldv_check_alloc_flags(kmalloc_~flags#1); {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} is VALID [2022-02-20 22:55:06,734 INFO L290 TraceCheckUtils]: 112: Hoare triple {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} ~flags#1 := #in~flags#1;havoc ~tmp~98#1; {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} is VALID [2022-02-20 22:55:06,734 INFO L290 TraceCheckUtils]: 113: Hoare triple {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} assume 32 != ~flags#1 % 4294967296 && 0 != ~flags#1 % 4294967296; {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} is VALID [2022-02-20 22:55:06,734 INFO L272 TraceCheckUtils]: 114: Hoare triple {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} call #t~ret1068#1 := ldv_exclusive_spin_is_locked(); {26410#true} is VALID [2022-02-20 22:55:06,735 INFO L290 TraceCheckUtils]: 115: Hoare triple {26410#true} assume !(2 == ~ldv_spin__xmit_lock_of_netdev_queue~0); {26529#(or (<= ~ldv_spin__xmit_lock_of_netdev_queue~0 1) (not (<= ~ldv_spin__xmit_lock_of_netdev_queue~0 2)))} is VALID [2022-02-20 22:55:06,735 INFO L290 TraceCheckUtils]: 116: Hoare triple {26529#(or (<= ~ldv_spin__xmit_lock_of_netdev_queue~0 1) (not (<= ~ldv_spin__xmit_lock_of_netdev_queue~0 2)))} assume 2 == ~ldv_spin_addr_list_lock_of_net_device~0;#res := 1; {26530#(and (or (not (<= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)) (<= 2 ~ldv_spin_addr_list_lock_of_net_device~0)) (or (<= ~ldv_spin__xmit_lock_of_netdev_queue~0 1) (and (not (<= ~ldv_spin__xmit_lock_of_netdev_queue~0 2)) (<= ~ldv_spin_addr_list_lock_of_net_device~0 2))))} is VALID [2022-02-20 22:55:06,736 INFO L290 TraceCheckUtils]: 117: Hoare triple {26530#(and (or (not (<= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)) (<= 2 ~ldv_spin_addr_list_lock_of_net_device~0)) (or (<= ~ldv_spin__xmit_lock_of_netdev_queue~0 1) (and (not (<= ~ldv_spin__xmit_lock_of_netdev_queue~0 2)) (<= ~ldv_spin_addr_list_lock_of_net_device~0 2))))} assume true; {26530#(and (or (not (<= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)) (<= 2 ~ldv_spin_addr_list_lock_of_net_device~0)) (or (<= ~ldv_spin__xmit_lock_of_netdev_queue~0 1) (and (not (<= ~ldv_spin__xmit_lock_of_netdev_queue~0 2)) (<= ~ldv_spin_addr_list_lock_of_net_device~0 2))))} is VALID [2022-02-20 22:55:06,736 INFO L284 TraceCheckUtils]: 118: Hoare quadruple {26530#(and (or (not (<= ~ldv_spin__xmit_lock_of_netdev_queue~0 1)) (<= 2 ~ldv_spin_addr_list_lock_of_net_device~0)) (or (<= ~ldv_spin__xmit_lock_of_netdev_queue~0 1) (and (not (<= ~ldv_spin__xmit_lock_of_netdev_queue~0 2)) (<= ~ldv_spin_addr_list_lock_of_net_device~0 2))))} {26412#(= ~ldv_spin__xmit_lock_of_netdev_queue~0 ~ldv_spin_addr_list_lock_of_net_device~0)} #4613#return; {26411#false} is VALID [2022-02-20 22:55:06,736 INFO L290 TraceCheckUtils]: 119: Hoare triple {26411#false} assume -2147483648 <= #t~ret1068#1 && #t~ret1068#1 <= 2147483647;~tmp~98#1 := #t~ret1068#1;havoc #t~ret1068#1;assume { :begin_inline_ldv_assert_linux_alloc_spinlock__wrong_flags } true;ldv_assert_linux_alloc_spinlock__wrong_flags_#in~expr#1 := (if 0 == ~tmp~98#1 then 1 else 0);havoc ldv_assert_linux_alloc_spinlock__wrong_flags_~expr#1;ldv_assert_linux_alloc_spinlock__wrong_flags_~expr#1 := ldv_assert_linux_alloc_spinlock__wrong_flags_#in~expr#1; {26411#false} is VALID [2022-02-20 22:55:06,737 INFO L290 TraceCheckUtils]: 120: Hoare triple {26411#false} assume 0 == ldv_assert_linux_alloc_spinlock__wrong_flags_~expr#1; {26411#false} is VALID [2022-02-20 22:55:06,737 INFO L290 TraceCheckUtils]: 121: Hoare triple {26411#false} assume !false; {26411#false} is VALID [2022-02-20 22:55:06,737 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 120 trivial. 0 not checked. [2022-02-20 22:55:06,737 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:55:06,737 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1132301375] [2022-02-20 22:55:06,737 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1132301375] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:55:06,738 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 22:55:06,738 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-02-20 22:55:06,738 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1499023745] [2022-02-20 22:55:06,738 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:55:06,738 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 7.571428571428571) internal successors, (53), 5 states have internal predecessors, (53), 2 states have call successors, (13), 4 states have call predecessors, (13), 2 states have return successors, (12), 3 states have call predecessors, (12), 2 states have call successors, (12) Word has length 122 [2022-02-20 22:55:06,739 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:55:06,739 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 7.571428571428571) internal successors, (53), 5 states have internal predecessors, (53), 2 states have call successors, (13), 4 states have call predecessors, (13), 2 states have return successors, (12), 3 states have call predecessors, (12), 2 states have call successors, (12) [2022-02-20 22:55:06,859 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 78 edges. 78 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:55:06,859 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-02-20 22:55:06,859 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:55:06,860 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-02-20 22:55:06,860 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2022-02-20 22:55:06,860 INFO L87 Difference]: Start difference. First operand 1809 states and 2553 transitions. Second operand has 7 states, 7 states have (on average 7.571428571428571) internal successors, (53), 5 states have internal predecessors, (53), 2 states have call successors, (13), 4 states have call predecessors, (13), 2 states have return successors, (12), 3 states have call predecessors, (12), 2 states have call successors, (12)