./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/ldv-linux-4.2-rc1/linux-4.2-rc1.tar.xz-43_2a-drivers--net--ethernet--hp--hp100.ko-entry_point.cil.out.i --full-output -ea --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 03d7b7b3 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -ea -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/ldv-linux-4.2-rc1/linux-4.2-rc1.tar.xz-43_2a-drivers--net--ethernet--hp--hp100.ko-entry_point.cil.out.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 71a394c873c772dcf5e6708cb37d9b35e24256f5a212c542b9c08f202c87eae6 --- Real Ultimate output --- This is Ultimate 0.2.2-dev-03d7b7b [2022-02-20 22:27:44,347 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-02-20 22:27:44,349 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-02-20 22:27:44,378 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-02-20 22:27:44,379 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-02-20 22:27:44,381 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-02-20 22:27:44,382 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-02-20 22:27:44,384 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-02-20 22:27:44,386 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-02-20 22:27:44,389 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-02-20 22:27:44,390 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-02-20 22:27:44,391 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-02-20 22:27:44,391 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-02-20 22:27:44,393 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-02-20 22:27:44,394 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-02-20 22:27:44,396 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-02-20 22:27:44,397 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-02-20 22:27:44,397 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-02-20 22:27:44,399 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-02-20 22:27:44,403 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-02-20 22:27:44,404 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-02-20 22:27:44,404 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-02-20 22:27:44,405 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-02-20 22:27:44,406 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-02-20 22:27:44,411 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-02-20 22:27:44,412 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-02-20 22:27:44,412 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-02-20 22:27:44,413 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-02-20 22:27:44,413 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-02-20 22:27:44,414 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-02-20 22:27:44,415 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-02-20 22:27:44,415 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-02-20 22:27:44,416 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-02-20 22:27:44,417 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-02-20 22:27:44,418 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-02-20 22:27:44,418 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-02-20 22:27:44,418 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-02-20 22:27:44,419 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-02-20 22:27:44,419 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-02-20 22:27:44,419 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-02-20 22:27:44,420 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-02-20 22:27:44,421 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2022-02-20 22:27:44,447 INFO L113 SettingsManager]: Loading preferences was successful [2022-02-20 22:27:44,449 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-02-20 22:27:44,449 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-02-20 22:27:44,449 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-02-20 22:27:44,450 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-02-20 22:27:44,450 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-02-20 22:27:44,451 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-02-20 22:27:44,451 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-02-20 22:27:44,451 INFO L138 SettingsManager]: * Use SBE=true [2022-02-20 22:27:44,451 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-02-20 22:27:44,452 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-02-20 22:27:44,452 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-02-20 22:27:44,452 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-02-20 22:27:44,452 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-02-20 22:27:44,452 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-02-20 22:27:44,453 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-02-20 22:27:44,453 INFO L138 SettingsManager]: * Use constant arrays=true [2022-02-20 22:27:44,453 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-02-20 22:27:44,453 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-02-20 22:27:44,453 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-02-20 22:27:44,453 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-02-20 22:27:44,453 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-02-20 22:27:44,454 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-02-20 22:27:44,454 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-02-20 22:27:44,454 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-02-20 22:27:44,454 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-02-20 22:27:44,454 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-02-20 22:27:44,455 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2022-02-20 22:27:44,455 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2022-02-20 22:27:44,456 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-02-20 22:27:44,456 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 71a394c873c772dcf5e6708cb37d9b35e24256f5a212c542b9c08f202c87eae6 [2022-02-20 22:27:44,658 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-02-20 22:27:44,683 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-02-20 22:27:44,685 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-02-20 22:27:44,686 INFO L271 PluginConnector]: Initializing CDTParser... [2022-02-20 22:27:44,687 INFO L275 PluginConnector]: CDTParser initialized [2022-02-20 22:27:44,688 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/ldv-linux-4.2-rc1/linux-4.2-rc1.tar.xz-43_2a-drivers--net--ethernet--hp--hp100.ko-entry_point.cil.out.i [2022-02-20 22:27:44,747 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/07ad546b3/8666c51a6d6a437e9dd6aaf8958d158f/FLAGb065eefb0 [2022-02-20 22:27:45,342 INFO L306 CDTParser]: Found 1 translation units. [2022-02-20 22:27:45,343 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.2-rc1/linux-4.2-rc1.tar.xz-43_2a-drivers--net--ethernet--hp--hp100.ko-entry_point.cil.out.i [2022-02-20 22:27:45,376 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/07ad546b3/8666c51a6d6a437e9dd6aaf8958d158f/FLAGb065eefb0 [2022-02-20 22:27:45,500 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/07ad546b3/8666c51a6d6a437e9dd6aaf8958d158f [2022-02-20 22:27:45,515 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-02-20 22:27:45,516 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-02-20 22:27:45,519 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-02-20 22:27:45,519 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-02-20 22:27:45,521 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-02-20 22:27:45,522 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.02 10:27:45" (1/1) ... [2022-02-20 22:27:45,523 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5db40985 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:27:45, skipping insertion in model container [2022-02-20 22:27:45,523 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.02 10:27:45" (1/1) ... [2022-02-20 22:27:45,528 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-02-20 22:27:45,636 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-02-20 22:27:46,901 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.2-rc1/linux-4.2-rc1.tar.xz-43_2a-drivers--net--ethernet--hp--hp100.ko-entry_point.cil.out.i[263471,263484] [2022-02-20 22:27:46,966 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-20 22:27:47,023 INFO L203 MainTranslator]: Completed pre-run [2022-02-20 22:27:47,340 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.2-rc1/linux-4.2-rc1.tar.xz-43_2a-drivers--net--ethernet--hp--hp100.ko-entry_point.cil.out.i[263471,263484] [2022-02-20 22:27:47,349 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-20 22:27:47,448 INFO L208 MainTranslator]: Completed translation [2022-02-20 22:27:47,449 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:27:47 WrapperNode [2022-02-20 22:27:47,450 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-02-20 22:27:47,451 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-02-20 22:27:47,451 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-02-20 22:27:47,451 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-02-20 22:27:47,456 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:27:47" (1/1) ... [2022-02-20 22:27:47,513 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:27:47" (1/1) ... [2022-02-20 22:27:47,659 INFO L137 Inliner]: procedures = 225, calls = 1448, calls flagged for inlining = 103, calls inlined = 100, statements flattened = 3781 [2022-02-20 22:27:47,659 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-02-20 22:27:47,660 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-02-20 22:27:47,660 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-02-20 22:27:47,660 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-02-20 22:27:47,666 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:27:47" (1/1) ... [2022-02-20 22:27:47,667 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:27:47" (1/1) ... [2022-02-20 22:27:47,692 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:27:47" (1/1) ... [2022-02-20 22:27:47,692 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:27:47" (1/1) ... [2022-02-20 22:27:47,811 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:27:47" (1/1) ... [2022-02-20 22:27:47,832 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:27:47" (1/1) ... [2022-02-20 22:27:47,851 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:27:47" (1/1) ... [2022-02-20 22:27:47,873 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-02-20 22:27:47,874 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-02-20 22:27:47,874 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-02-20 22:27:47,874 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-02-20 22:27:47,876 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:27:47" (1/1) ... [2022-02-20 22:27:47,881 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-02-20 22:27:47,889 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-20 22:27:47,900 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-02-20 22:27:47,918 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-02-20 22:27:47,936 INFO L130 BoogieDeclarations]: Found specification of procedure hp100_update_stats [2022-02-20 22:27:47,937 INFO L138 BoogieDeclarations]: Found implementation of procedure hp100_update_stats [2022-02-20 22:27:47,937 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2022-02-20 22:27:47,937 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2022-02-20 22:27:47,937 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_stop [2022-02-20 22:27:47,938 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_stop [2022-02-20 22:27:47,938 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.meminit [2022-02-20 22:27:47,938 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.meminit [2022-02-20 22:27:47,938 INFO L130 BoogieDeclarations]: Found specification of procedure netdev_alloc_skb [2022-02-20 22:27:47,938 INFO L138 BoogieDeclarations]: Found implementation of procedure netdev_alloc_skb [2022-02-20 22:27:47,938 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_spin_lock [2022-02-20 22:27:47,938 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_spin_lock [2022-02-20 22:27:47,938 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2022-02-20 22:27:47,938 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2022-02-20 22:27:47,939 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_error [2022-02-20 22:27:47,939 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_error [2022-02-20 22:27:47,939 INFO L130 BoogieDeclarations]: Found specification of procedure pci_map_single [2022-02-20 22:27:47,939 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_map_single [2022-02-20 22:27:47,939 INFO L130 BoogieDeclarations]: Found specification of procedure valid_dma_direction [2022-02-20 22:27:47,939 INFO L138 BoogieDeclarations]: Found implementation of procedure valid_dma_direction [2022-02-20 22:27:47,939 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2022-02-20 22:27:47,939 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2022-02-20 22:27:47,940 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2022-02-20 22:27:47,940 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2022-02-20 22:27:47,940 INFO L130 BoogieDeclarations]: Found specification of procedure dev_trans_start [2022-02-20 22:27:47,940 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_trans_start [2022-02-20 22:27:47,940 INFO L130 BoogieDeclarations]: Found specification of procedure hp100_open [2022-02-20 22:27:47,940 INFO L138 BoogieDeclarations]: Found implementation of procedure hp100_open [2022-02-20 22:27:47,940 INFO L130 BoogieDeclarations]: Found specification of procedure hp100_load_eeprom [2022-02-20 22:27:47,940 INFO L138 BoogieDeclarations]: Found implementation of procedure hp100_load_eeprom [2022-02-20 22:27:47,940 INFO L130 BoogieDeclarations]: Found specification of procedure consume_skb [2022-02-20 22:27:47,941 INFO L138 BoogieDeclarations]: Found implementation of procedure consume_skb [2022-02-20 22:27:47,941 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-02-20 22:27:47,941 INFO L130 BoogieDeclarations]: Found specification of procedure memcmp [2022-02-20 22:27:47,941 INFO L130 BoogieDeclarations]: Found specification of procedure hp100_sense_lan [2022-02-20 22:27:47,941 INFO L138 BoogieDeclarations]: Found implementation of procedure hp100_sense_lan [2022-02-20 22:27:47,941 INFO L130 BoogieDeclarations]: Found specification of procedure eth_mac_addr [2022-02-20 22:27:47,941 INFO L138 BoogieDeclarations]: Found implementation of procedure eth_mac_addr [2022-02-20 22:27:47,942 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-02-20 22:27:47,942 INFO L130 BoogieDeclarations]: Found specification of procedure hp100_get_stats [2022-02-20 22:27:47,942 INFO L138 BoogieDeclarations]: Found implementation of procedure hp100_get_stats [2022-02-20 22:27:47,942 INFO L130 BoogieDeclarations]: Found specification of procedure eth_validate_addr [2022-02-20 22:27:47,942 INFO L138 BoogieDeclarations]: Found implementation of procedure eth_validate_addr [2022-02-20 22:27:47,942 INFO L130 BoogieDeclarations]: Found specification of procedure netif_rx [2022-02-20 22:27:47,942 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_rx [2022-02-20 22:27:47,943 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_spin_unlock [2022-02-20 22:27:47,943 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_spin_unlock [2022-02-20 22:27:47,943 INFO L130 BoogieDeclarations]: Found specification of procedure spin_unlock_irqrestore [2022-02-20 22:27:47,943 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_unlock_irqrestore [2022-02-20 22:27:47,943 INFO L130 BoogieDeclarations]: Found specification of procedure pci_unmap_single [2022-02-20 22:27:47,943 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_unmap_single [2022-02-20 22:27:47,943 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-02-20 22:27:47,944 INFO L130 BoogieDeclarations]: Found specification of procedure iounmap [2022-02-20 22:27:47,944 INFO L138 BoogieDeclarations]: Found implementation of procedure iounmap [2022-02-20 22:27:47,944 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2022-02-20 22:27:47,944 INFO L130 BoogieDeclarations]: Found specification of procedure pci_write_config_word [2022-02-20 22:27:47,944 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_write_config_word [2022-02-20 22:27:47,944 INFO L130 BoogieDeclarations]: Found specification of procedure outw [2022-02-20 22:27:47,945 INFO L138 BoogieDeclarations]: Found implementation of procedure outw [2022-02-20 22:27:47,945 INFO L130 BoogieDeclarations]: Found specification of procedure eth_change_mtu [2022-02-20 22:27:47,946 INFO L138 BoogieDeclarations]: Found implementation of procedure eth_change_mtu [2022-02-20 22:27:47,946 INFO L130 BoogieDeclarations]: Found specification of procedure netdev_priv [2022-02-20 22:27:47,946 INFO L138 BoogieDeclarations]: Found implementation of procedure netdev_priv [2022-02-20 22:27:47,946 INFO L130 BoogieDeclarations]: Found specification of procedure outb [2022-02-20 22:27:47,946 INFO L138 BoogieDeclarations]: Found implementation of procedure outb [2022-02-20 22:27:47,946 INFO L130 BoogieDeclarations]: Found specification of procedure netdev_get_tx_queue [2022-02-20 22:27:47,946 INFO L138 BoogieDeclarations]: Found implementation of procedure netdev_get_tx_queue [2022-02-20 22:27:47,946 INFO L130 BoogieDeclarations]: Found specification of procedure spin_unlock [2022-02-20 22:27:47,946 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_unlock [2022-02-20 22:27:47,947 INFO L130 BoogieDeclarations]: Found specification of procedure outl [2022-02-20 22:27:47,947 INFO L138 BoogieDeclarations]: Found implementation of procedure outl [2022-02-20 22:27:47,947 INFO L130 BoogieDeclarations]: Found specification of procedure hp100_cascade_reset [2022-02-20 22:27:47,947 INFO L138 BoogieDeclarations]: Found implementation of procedure hp100_cascade_reset [2022-02-20 22:27:47,947 INFO L130 BoogieDeclarations]: Found specification of procedure __dev_kfree_skb_any [2022-02-20 22:27:47,948 INFO L138 BoogieDeclarations]: Found implementation of procedure __dev_kfree_skb_any [2022-02-20 22:27:47,948 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~int [2022-02-20 22:27:47,948 INFO L130 BoogieDeclarations]: Found specification of procedure get_dma_ops [2022-02-20 22:27:47,948 INFO L138 BoogieDeclarations]: Found implementation of procedure get_dma_ops [2022-02-20 22:27:47,948 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2022-02-20 22:27:47,948 INFO L130 BoogieDeclarations]: Found specification of procedure hp100_build_rx_pdl [2022-02-20 22:27:47,948 INFO L138 BoogieDeclarations]: Found implementation of procedure hp100_build_rx_pdl [2022-02-20 22:27:47,948 INFO L130 BoogieDeclarations]: Found specification of procedure skb_reserve [2022-02-20 22:27:47,948 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_reserve [2022-02-20 22:27:47,949 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-02-20 22:27:47,949 INFO L130 BoogieDeclarations]: Found specification of procedure free_netdev [2022-02-20 22:27:47,949 INFO L138 BoogieDeclarations]: Found implementation of procedure free_netdev [2022-02-20 22:27:47,949 INFO L130 BoogieDeclarations]: Found specification of procedure __phys_addr [2022-02-20 22:27:47,949 INFO L138 BoogieDeclarations]: Found implementation of procedure __phys_addr [2022-02-20 22:27:47,949 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2022-02-20 22:27:47,949 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2022-02-20 22:27:47,949 INFO L130 BoogieDeclarations]: Found specification of procedure hp100_rx_bm [2022-02-20 22:27:47,950 INFO L138 BoogieDeclarations]: Found implementation of procedure hp100_rx_bm [2022-02-20 22:27:47,950 INFO L130 BoogieDeclarations]: Found specification of procedure hp100_BM_shutdown [2022-02-20 22:27:47,950 INFO L138 BoogieDeclarations]: Found implementation of procedure hp100_BM_shutdown [2022-02-20 22:27:47,950 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_alloc_flags [2022-02-20 22:27:47,950 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_check_alloc_flags [2022-02-20 22:27:47,951 INFO L130 BoogieDeclarations]: Found specification of procedure wait [2022-02-20 22:27:47,951 INFO L138 BoogieDeclarations]: Found implementation of procedure wait [2022-02-20 22:27:47,951 INFO L130 BoogieDeclarations]: Found specification of procedure __release_region [2022-02-20 22:27:47,951 INFO L138 BoogieDeclarations]: Found implementation of procedure __release_region [2022-02-20 22:27:47,952 INFO L130 BoogieDeclarations]: Found specification of procedure pci_free_consistent [2022-02-20 22:27:47,952 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_free_consistent [2022-02-20 22:27:47,952 INFO L130 BoogieDeclarations]: Found specification of procedure hp100_hwinit [2022-02-20 22:27:47,952 INFO L138 BoogieDeclarations]: Found implementation of procedure hp100_hwinit [2022-02-20 22:27:47,952 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-02-20 22:27:47,952 INFO L130 BoogieDeclarations]: Found specification of procedure pci_disable_device [2022-02-20 22:27:47,953 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_disable_device [2022-02-20 22:27:47,953 INFO L130 BoogieDeclarations]: Found specification of procedure dev_consume_skb_any [2022-02-20 22:27:47,953 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_consume_skb_any [2022-02-20 22:27:47,953 INFO L130 BoogieDeclarations]: Found specification of procedure eth_type_trans [2022-02-20 22:27:47,953 INFO L138 BoogieDeclarations]: Found implementation of procedure eth_type_trans [2022-02-20 22:27:47,953 INFO L130 BoogieDeclarations]: Found specification of procedure ldv__builtin_expect [2022-02-20 22:27:47,953 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv__builtin_expect [2022-02-20 22:27:47,954 INFO L130 BoogieDeclarations]: Found specification of procedure virt_to_whatever [2022-02-20 22:27:47,954 INFO L138 BoogieDeclarations]: Found implementation of procedure virt_to_whatever [2022-02-20 22:27:47,954 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_init_zalloc [2022-02-20 22:27:47,954 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_init_zalloc [2022-02-20 22:27:47,954 INFO L130 BoogieDeclarations]: Found specification of procedure hp100_close [2022-02-20 22:27:47,954 INFO L138 BoogieDeclarations]: Found implementation of procedure hp100_close [2022-02-20 22:27:47,955 INFO L130 BoogieDeclarations]: Found specification of procedure schedule_timeout_interruptible [2022-02-20 22:27:47,956 INFO L138 BoogieDeclarations]: Found implementation of procedure schedule_timeout_interruptible [2022-02-20 22:27:47,957 INFO L130 BoogieDeclarations]: Found specification of procedure hp100_stop_interface [2022-02-20 22:27:47,957 INFO L138 BoogieDeclarations]: Found implementation of procedure hp100_stop_interface [2022-02-20 22:27:47,957 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-02-20 22:27:47,957 INFO L130 BoogieDeclarations]: Found specification of procedure hp100_check_lan [2022-02-20 22:27:47,959 INFO L138 BoogieDeclarations]: Found implementation of procedure hp100_check_lan [2022-02-20 22:27:47,959 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_memset [2022-02-20 22:27:47,959 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_memset [2022-02-20 22:27:47,959 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-02-20 22:27:47,963 INFO L130 BoogieDeclarations]: Found specification of procedure __const_udelay [2022-02-20 22:27:47,963 INFO L138 BoogieDeclarations]: Found implementation of procedure __const_udelay [2022-02-20 22:27:47,963 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-02-20 22:27:47,964 INFO L130 BoogieDeclarations]: Found specification of procedure __bad_percpu_size [2022-02-20 22:27:47,964 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_irq_1 [2022-02-20 22:27:47,964 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_irq_1 [2022-02-20 22:27:47,964 INFO L130 BoogieDeclarations]: Found specification of procedure hp100_set_multicast_list [2022-02-20 22:27:47,964 INFO L138 BoogieDeclarations]: Found implementation of procedure hp100_set_multicast_list [2022-02-20 22:27:47,964 INFO L130 BoogieDeclarations]: Found specification of procedure hp100_rxfill [2022-02-20 22:27:47,964 INFO L138 BoogieDeclarations]: Found implementation of procedure hp100_rxfill [2022-02-20 22:27:47,964 INFO L130 BoogieDeclarations]: Found specification of procedure hp100_start_interface [2022-02-20 22:27:47,964 INFO L138 BoogieDeclarations]: Found implementation of procedure hp100_start_interface [2022-02-20 22:27:47,964 INFO L130 BoogieDeclarations]: Found specification of procedure skb_put [2022-02-20 22:27:47,965 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_put [2022-02-20 22:27:47,965 INFO L130 BoogieDeclarations]: Found specification of procedure inb [2022-02-20 22:27:47,965 INFO L138 BoogieDeclarations]: Found implementation of procedure inb [2022-02-20 22:27:47,965 INFO L130 BoogieDeclarations]: Found specification of procedure hp100_clean_txring [2022-02-20 22:27:47,965 INFO L138 BoogieDeclarations]: Found implementation of procedure hp100_clean_txring [2022-02-20 22:27:47,965 INFO L130 BoogieDeclarations]: Found specification of procedure inl [2022-02-20 22:27:47,965 INFO L138 BoogieDeclarations]: Found implementation of procedure inl [2022-02-20 22:27:47,965 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-02-20 22:27:47,965 INFO L130 BoogieDeclarations]: Found specification of procedure inw [2022-02-20 22:27:47,965 INFO L138 BoogieDeclarations]: Found implementation of procedure inw [2022-02-20 22:27:47,965 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-02-20 22:27:47,966 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-02-20 22:27:47,966 INFO L130 BoogieDeclarations]: Found specification of procedure hp100_login_to_vg_hub [2022-02-20 22:27:47,966 INFO L138 BoogieDeclarations]: Found implementation of procedure hp100_login_to_vg_hub [2022-02-20 22:27:47,966 INFO L130 BoogieDeclarations]: Found specification of procedure preempt_count [2022-02-20 22:27:47,966 INFO L138 BoogieDeclarations]: Found implementation of procedure preempt_count [2022-02-20 22:27:48,488 INFO L234 CfgBuilder]: Building ICFG [2022-02-20 22:27:48,490 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-02-20 22:27:49,039 INFO L766 $ProcedureCfgBuilder]: dead code at ProgramPoint ldv_stopFINAL: assume true; [2022-02-20 22:27:51,241 WARN L813 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-02-20 22:27:51,422 INFO L766 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##8: assume 0 == (if 0 == ~tmp___4~7#1 then 0 else (if 1 == ~tmp___4~7#1 then 0 else ~bitwiseAnd(~tmp___4~7#1, 2096896))) % 18446744073709551616; [2022-02-20 22:27:51,423 INFO L766 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##9: assume !(0 == (if 0 == ~tmp___4~7#1 then 0 else (if 1 == ~tmp___4~7#1 then 0 else ~bitwiseAnd(~tmp___4~7#1, 2096896))) % 18446744073709551616); [2022-02-20 22:27:51,423 INFO L766 $ProcedureCfgBuilder]: dead code at ProgramPoint L8189-1: assume -9223372036854775808 <= #t~ret673#1 && #t~ret673#1 <= 9223372036854775807;havoc #t~ret673#1; [2022-02-20 22:27:51,423 INFO L766 $ProcedureCfgBuilder]: dead code at ProgramPoint L8189: SUMMARY for call #t~ret673#1 := schedule_timeout_interruptible(1); srcloc: null [2022-02-20 22:27:51,423 INFO L766 $ProcedureCfgBuilder]: dead code at ProgramPoint L8192: assume (if (~jiffies~0 - ~time~2#1) % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then (~jiffies~0 - ~time~2#1) % 18446744073709551616 % 18446744073709551616 else (~jiffies~0 - ~time~2#1) % 18446744073709551616 % 18446744073709551616 - 18446744073709551616) < 0; [2022-02-20 22:27:51,423 INFO L766 $ProcedureCfgBuilder]: dead code at ProgramPoint L8192: assume !((if (~jiffies~0 - ~time~2#1) % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then (~jiffies~0 - ~time~2#1) % 18446744073709551616 % 18446744073709551616 else (~jiffies~0 - ~time~2#1) % 18446744073709551616 % 18446744073709551616 - 18446744073709551616) < 0); [2022-02-20 22:27:51,495 INFO L275 CfgBuilder]: Performing block encoding [2022-02-20 22:27:51,509 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-02-20 22:27:51,510 INFO L299 CfgBuilder]: Removed 2 assume(true) statements. [2022-02-20 22:27:51,512 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 10:27:51 BoogieIcfgContainer [2022-02-20 22:27:51,512 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-02-20 22:27:51,514 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-02-20 22:27:51,514 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-02-20 22:27:51,516 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-02-20 22:27:51,516 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 20.02 10:27:45" (1/3) ... [2022-02-20 22:27:51,517 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@47bb1455 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.02 10:27:51, skipping insertion in model container [2022-02-20 22:27:51,517 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:27:47" (2/3) ... [2022-02-20 22:27:51,517 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@47bb1455 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.02 10:27:51, skipping insertion in model container [2022-02-20 22:27:51,517 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 10:27:51" (3/3) ... [2022-02-20 22:27:51,518 INFO L111 eAbstractionObserver]: Analyzing ICFG linux-4.2-rc1.tar.xz-43_2a-drivers--net--ethernet--hp--hp100.ko-entry_point.cil.out.i [2022-02-20 22:27:51,522 INFO L205 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-02-20 22:27:51,522 INFO L164 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-02-20 22:27:51,560 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-02-20 22:27:51,564 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2022-02-20 22:27:51,565 INFO L340 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-02-20 22:27:51,614 INFO L276 IsEmpty]: Start isEmpty. Operand has 1687 states, 1083 states have (on average 1.3776546629732225) internal successors, (1492), 1137 states have internal predecessors, (1492), 535 states have call successors, (535), 70 states have call predecessors, (535), 69 states have return successors, (528), 512 states have call predecessors, (528), 528 states have call successors, (528) [2022-02-20 22:27:51,632 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 168 [2022-02-20 22:27:51,632 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:27:51,633 INFO L514 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:27:51,635 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:27:51,639 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:27:51,640 INFO L85 PathProgramCache]: Analyzing trace with hash -439134438, now seen corresponding path program 1 times [2022-02-20 22:27:51,647 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:27:51,648 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1882967699] [2022-02-20 22:27:51,648 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:27:51,648 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:27:51,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:27:52,174 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 22:27:52,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:27:52,218 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:27:52,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:27:52,239 INFO L290 TraceCheckUtils]: 0: Hoare triple {1806#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {1690#true} is VALID [2022-02-20 22:27:52,240 INFO L290 TraceCheckUtils]: 1: Hoare triple {1690#true} assume true; {1690#true} is VALID [2022-02-20 22:27:52,240 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1690#true} {1690#true} #4170#return; {1690#true} is VALID [2022-02-20 22:27:52,241 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:27:52,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:27:52,255 INFO L290 TraceCheckUtils]: 0: Hoare triple {1690#true} ~cond := #in~cond; {1690#true} is VALID [2022-02-20 22:27:52,256 INFO L290 TraceCheckUtils]: 1: Hoare triple {1690#true} assume 0 == ~cond;assume false; {1691#false} is VALID [2022-02-20 22:27:52,256 INFO L290 TraceCheckUtils]: 2: Hoare triple {1691#false} assume true; {1691#false} is VALID [2022-02-20 22:27:52,257 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1691#false} {1690#true} #4172#return; {1691#false} is VALID [2022-02-20 22:27:52,257 INFO L290 TraceCheckUtils]: 0: Hoare triple {1798#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {1690#true} is VALID [2022-02-20 22:27:52,258 INFO L272 TraceCheckUtils]: 1: Hoare triple {1690#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {1806#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:27:52,259 INFO L290 TraceCheckUtils]: 2: Hoare triple {1806#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {1690#true} is VALID [2022-02-20 22:27:52,259 INFO L290 TraceCheckUtils]: 3: Hoare triple {1690#true} assume true; {1690#true} is VALID [2022-02-20 22:27:52,259 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {1690#true} {1690#true} #4170#return; {1690#true} is VALID [2022-02-20 22:27:52,259 INFO L290 TraceCheckUtils]: 5: Hoare triple {1690#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {1690#true} is VALID [2022-02-20 22:27:52,260 INFO L272 TraceCheckUtils]: 6: Hoare triple {1690#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {1690#true} is VALID [2022-02-20 22:27:52,260 INFO L290 TraceCheckUtils]: 7: Hoare triple {1690#true} ~cond := #in~cond; {1690#true} is VALID [2022-02-20 22:27:52,260 INFO L290 TraceCheckUtils]: 8: Hoare triple {1690#true} assume 0 == ~cond;assume false; {1691#false} is VALID [2022-02-20 22:27:52,261 INFO L290 TraceCheckUtils]: 9: Hoare triple {1691#false} assume true; {1691#false} is VALID [2022-02-20 22:27:52,261 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {1691#false} {1690#true} #4172#return; {1691#false} is VALID [2022-02-20 22:27:52,261 INFO L290 TraceCheckUtils]: 11: Hoare triple {1691#false} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {1691#false} is VALID [2022-02-20 22:27:52,261 INFO L290 TraceCheckUtils]: 12: Hoare triple {1691#false} assume true; {1691#false} is VALID [2022-02-20 22:27:52,262 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {1691#false} {1690#true} #4246#return; {1691#false} is VALID [2022-02-20 22:27:52,265 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 18 [2022-02-20 22:27:52,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:27:52,293 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:27:52,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:27:52,303 INFO L290 TraceCheckUtils]: 0: Hoare triple {1806#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {1690#true} is VALID [2022-02-20 22:27:52,304 INFO L290 TraceCheckUtils]: 1: Hoare triple {1690#true} assume true; {1690#true} is VALID [2022-02-20 22:27:52,304 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1690#true} {1690#true} #4170#return; {1690#true} is VALID [2022-02-20 22:27:52,305 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:27:52,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:27:52,314 INFO L290 TraceCheckUtils]: 0: Hoare triple {1690#true} ~cond := #in~cond; {1690#true} is VALID [2022-02-20 22:27:52,315 INFO L290 TraceCheckUtils]: 1: Hoare triple {1690#true} assume 0 == ~cond;assume false; {1691#false} is VALID [2022-02-20 22:27:52,315 INFO L290 TraceCheckUtils]: 2: Hoare triple {1691#false} assume true; {1691#false} is VALID [2022-02-20 22:27:52,315 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1691#false} {1690#true} #4172#return; {1691#false} is VALID [2022-02-20 22:27:52,316 INFO L290 TraceCheckUtils]: 0: Hoare triple {1798#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {1690#true} is VALID [2022-02-20 22:27:52,317 INFO L272 TraceCheckUtils]: 1: Hoare triple {1690#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {1806#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:27:52,318 INFO L290 TraceCheckUtils]: 2: Hoare triple {1806#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {1690#true} is VALID [2022-02-20 22:27:52,318 INFO L290 TraceCheckUtils]: 3: Hoare triple {1690#true} assume true; {1690#true} is VALID [2022-02-20 22:27:52,318 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {1690#true} {1690#true} #4170#return; {1690#true} is VALID [2022-02-20 22:27:52,318 INFO L290 TraceCheckUtils]: 5: Hoare triple {1690#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {1690#true} is VALID [2022-02-20 22:27:52,319 INFO L272 TraceCheckUtils]: 6: Hoare triple {1690#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {1690#true} is VALID [2022-02-20 22:27:52,320 INFO L290 TraceCheckUtils]: 7: Hoare triple {1690#true} ~cond := #in~cond; {1690#true} is VALID [2022-02-20 22:27:52,323 INFO L290 TraceCheckUtils]: 8: Hoare triple {1690#true} assume 0 == ~cond;assume false; {1691#false} is VALID [2022-02-20 22:27:52,324 INFO L290 TraceCheckUtils]: 9: Hoare triple {1691#false} assume true; {1691#false} is VALID [2022-02-20 22:27:52,324 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {1691#false} {1690#true} #4172#return; {1691#false} is VALID [2022-02-20 22:27:52,324 INFO L290 TraceCheckUtils]: 11: Hoare triple {1691#false} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {1691#false} is VALID [2022-02-20 22:27:52,324 INFO L290 TraceCheckUtils]: 12: Hoare triple {1691#false} assume true; {1691#false} is VALID [2022-02-20 22:27:52,325 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {1691#false} {1691#false} #4248#return; {1691#false} is VALID [2022-02-20 22:27:52,325 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 34 [2022-02-20 22:27:52,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:27:52,350 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:27:52,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:27:52,357 INFO L290 TraceCheckUtils]: 0: Hoare triple {1806#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {1690#true} is VALID [2022-02-20 22:27:52,358 INFO L290 TraceCheckUtils]: 1: Hoare triple {1690#true} assume true; {1690#true} is VALID [2022-02-20 22:27:52,358 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1690#true} {1690#true} #4170#return; {1690#true} is VALID [2022-02-20 22:27:52,358 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:27:52,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:27:52,365 INFO L290 TraceCheckUtils]: 0: Hoare triple {1690#true} ~cond := #in~cond; {1690#true} is VALID [2022-02-20 22:27:52,366 INFO L290 TraceCheckUtils]: 1: Hoare triple {1690#true} assume 0 == ~cond;assume false; {1691#false} is VALID [2022-02-20 22:27:52,368 INFO L290 TraceCheckUtils]: 2: Hoare triple {1691#false} assume true; {1691#false} is VALID [2022-02-20 22:27:52,368 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1691#false} {1690#true} #4172#return; {1691#false} is VALID [2022-02-20 22:27:52,369 INFO L290 TraceCheckUtils]: 0: Hoare triple {1798#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {1690#true} is VALID [2022-02-20 22:27:52,370 INFO L272 TraceCheckUtils]: 1: Hoare triple {1690#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {1806#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:27:52,371 INFO L290 TraceCheckUtils]: 2: Hoare triple {1806#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {1690#true} is VALID [2022-02-20 22:27:52,371 INFO L290 TraceCheckUtils]: 3: Hoare triple {1690#true} assume true; {1690#true} is VALID [2022-02-20 22:27:52,371 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {1690#true} {1690#true} #4170#return; {1690#true} is VALID [2022-02-20 22:27:52,371 INFO L290 TraceCheckUtils]: 5: Hoare triple {1690#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {1690#true} is VALID [2022-02-20 22:27:52,373 INFO L272 TraceCheckUtils]: 6: Hoare triple {1690#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {1690#true} is VALID [2022-02-20 22:27:52,373 INFO L290 TraceCheckUtils]: 7: Hoare triple {1690#true} ~cond := #in~cond; {1690#true} is VALID [2022-02-20 22:27:52,374 INFO L290 TraceCheckUtils]: 8: Hoare triple {1690#true} assume 0 == ~cond;assume false; {1691#false} is VALID [2022-02-20 22:27:52,374 INFO L290 TraceCheckUtils]: 9: Hoare triple {1691#false} assume true; {1691#false} is VALID [2022-02-20 22:27:52,374 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {1691#false} {1690#true} #4172#return; {1691#false} is VALID [2022-02-20 22:27:52,374 INFO L290 TraceCheckUtils]: 11: Hoare triple {1691#false} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {1691#false} is VALID [2022-02-20 22:27:52,375 INFO L290 TraceCheckUtils]: 12: Hoare triple {1691#false} assume true; {1691#false} is VALID [2022-02-20 22:27:52,375 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {1691#false} {1691#false} #4250#return; {1691#false} is VALID [2022-02-20 22:27:52,375 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 50 [2022-02-20 22:27:52,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:27:52,391 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:27:52,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:27:52,400 INFO L290 TraceCheckUtils]: 0: Hoare triple {1806#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {1690#true} is VALID [2022-02-20 22:27:52,400 INFO L290 TraceCheckUtils]: 1: Hoare triple {1690#true} assume true; {1690#true} is VALID [2022-02-20 22:27:52,401 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1690#true} {1690#true} #4170#return; {1690#true} is VALID [2022-02-20 22:27:52,401 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:27:52,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:27:52,408 INFO L290 TraceCheckUtils]: 0: Hoare triple {1690#true} ~cond := #in~cond; {1690#true} is VALID [2022-02-20 22:27:52,409 INFO L290 TraceCheckUtils]: 1: Hoare triple {1690#true} assume 0 == ~cond;assume false; {1691#false} is VALID [2022-02-20 22:27:52,409 INFO L290 TraceCheckUtils]: 2: Hoare triple {1691#false} assume true; {1691#false} is VALID [2022-02-20 22:27:52,410 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1691#false} {1690#true} #4172#return; {1691#false} is VALID [2022-02-20 22:27:52,410 INFO L290 TraceCheckUtils]: 0: Hoare triple {1798#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {1690#true} is VALID [2022-02-20 22:27:52,411 INFO L272 TraceCheckUtils]: 1: Hoare triple {1690#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {1806#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:27:52,411 INFO L290 TraceCheckUtils]: 2: Hoare triple {1806#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {1690#true} is VALID [2022-02-20 22:27:52,411 INFO L290 TraceCheckUtils]: 3: Hoare triple {1690#true} assume true; {1690#true} is VALID [2022-02-20 22:27:52,411 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {1690#true} {1690#true} #4170#return; {1690#true} is VALID [2022-02-20 22:27:52,411 INFO L290 TraceCheckUtils]: 5: Hoare triple {1690#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {1690#true} is VALID [2022-02-20 22:27:52,412 INFO L272 TraceCheckUtils]: 6: Hoare triple {1690#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {1690#true} is VALID [2022-02-20 22:27:52,412 INFO L290 TraceCheckUtils]: 7: Hoare triple {1690#true} ~cond := #in~cond; {1690#true} is VALID [2022-02-20 22:27:52,412 INFO L290 TraceCheckUtils]: 8: Hoare triple {1690#true} assume 0 == ~cond;assume false; {1691#false} is VALID [2022-02-20 22:27:52,412 INFO L290 TraceCheckUtils]: 9: Hoare triple {1691#false} assume true; {1691#false} is VALID [2022-02-20 22:27:52,412 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {1691#false} {1690#true} #4172#return; {1691#false} is VALID [2022-02-20 22:27:52,413 INFO L290 TraceCheckUtils]: 11: Hoare triple {1691#false} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {1691#false} is VALID [2022-02-20 22:27:52,413 INFO L290 TraceCheckUtils]: 12: Hoare triple {1691#false} assume true; {1691#false} is VALID [2022-02-20 22:27:52,413 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {1691#false} {1691#false} #4252#return; {1691#false} is VALID [2022-02-20 22:27:52,413 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 66 [2022-02-20 22:27:52,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:27:52,429 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:27:52,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:27:52,435 INFO L290 TraceCheckUtils]: 0: Hoare triple {1806#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {1690#true} is VALID [2022-02-20 22:27:52,436 INFO L290 TraceCheckUtils]: 1: Hoare triple {1690#true} assume true; {1690#true} is VALID [2022-02-20 22:27:52,436 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1690#true} {1690#true} #4170#return; {1690#true} is VALID [2022-02-20 22:27:52,436 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:27:52,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:27:52,442 INFO L290 TraceCheckUtils]: 0: Hoare triple {1690#true} ~cond := #in~cond; {1690#true} is VALID [2022-02-20 22:27:52,443 INFO L290 TraceCheckUtils]: 1: Hoare triple {1690#true} assume 0 == ~cond;assume false; {1691#false} is VALID [2022-02-20 22:27:52,443 INFO L290 TraceCheckUtils]: 2: Hoare triple {1691#false} assume true; {1691#false} is VALID [2022-02-20 22:27:52,444 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1691#false} {1690#true} #4172#return; {1691#false} is VALID [2022-02-20 22:27:52,444 INFO L290 TraceCheckUtils]: 0: Hoare triple {1798#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {1690#true} is VALID [2022-02-20 22:27:52,445 INFO L272 TraceCheckUtils]: 1: Hoare triple {1690#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {1806#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:27:52,445 INFO L290 TraceCheckUtils]: 2: Hoare triple {1806#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {1690#true} is VALID [2022-02-20 22:27:52,445 INFO L290 TraceCheckUtils]: 3: Hoare triple {1690#true} assume true; {1690#true} is VALID [2022-02-20 22:27:52,445 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {1690#true} {1690#true} #4170#return; {1690#true} is VALID [2022-02-20 22:27:52,445 INFO L290 TraceCheckUtils]: 5: Hoare triple {1690#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {1690#true} is VALID [2022-02-20 22:27:52,446 INFO L272 TraceCheckUtils]: 6: Hoare triple {1690#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {1690#true} is VALID [2022-02-20 22:27:52,446 INFO L290 TraceCheckUtils]: 7: Hoare triple {1690#true} ~cond := #in~cond; {1690#true} is VALID [2022-02-20 22:27:52,446 INFO L290 TraceCheckUtils]: 8: Hoare triple {1690#true} assume 0 == ~cond;assume false; {1691#false} is VALID [2022-02-20 22:27:52,446 INFO L290 TraceCheckUtils]: 9: Hoare triple {1691#false} assume true; {1691#false} is VALID [2022-02-20 22:27:52,446 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {1691#false} {1690#true} #4172#return; {1691#false} is VALID [2022-02-20 22:27:52,447 INFO L290 TraceCheckUtils]: 11: Hoare triple {1691#false} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {1691#false} is VALID [2022-02-20 22:27:52,447 INFO L290 TraceCheckUtils]: 12: Hoare triple {1691#false} assume true; {1691#false} is VALID [2022-02-20 22:27:52,447 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {1691#false} {1691#false} #4254#return; {1691#false} is VALID [2022-02-20 22:27:52,453 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 83 [2022-02-20 22:27:52,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:27:52,463 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:27:52,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:27:52,473 INFO L290 TraceCheckUtils]: 0: Hoare triple {1835#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr849 := 0; {1690#true} is VALID [2022-02-20 22:27:52,473 INFO L290 TraceCheckUtils]: 1: Hoare triple {1690#true} assume !(#t~loopctr849 % 18446744073709551616 < #amount % 18446744073709551616); {1690#true} is VALID [2022-02-20 22:27:52,474 INFO L290 TraceCheckUtils]: 2: Hoare triple {1690#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1690#true} is VALID [2022-02-20 22:27:52,474 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1690#true} {1690#true} #4588#return; {1690#true} is VALID [2022-02-20 22:27:52,474 INFO L290 TraceCheckUtils]: 0: Hoare triple {1835#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {1690#true} is VALID [2022-02-20 22:27:52,475 INFO L272 TraceCheckUtils]: 1: Hoare triple {1690#true} call #t~memset~res15.base, #t~memset~res15.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, ~n); {1835#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:27:52,475 INFO L290 TraceCheckUtils]: 2: Hoare triple {1835#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr849 := 0; {1690#true} is VALID [2022-02-20 22:27:52,475 INFO L290 TraceCheckUtils]: 3: Hoare triple {1690#true} assume !(#t~loopctr849 % 18446744073709551616 < #amount % 18446744073709551616); {1690#true} is VALID [2022-02-20 22:27:52,476 INFO L290 TraceCheckUtils]: 4: Hoare triple {1690#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1690#true} is VALID [2022-02-20 22:27:52,476 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {1690#true} {1690#true} #4588#return; {1690#true} is VALID [2022-02-20 22:27:52,476 INFO L290 TraceCheckUtils]: 6: Hoare triple {1690#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res15.base, #t~memset~res15.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {1690#true} is VALID [2022-02-20 22:27:52,476 INFO L290 TraceCheckUtils]: 7: Hoare triple {1690#true} assume true; {1690#true} is VALID [2022-02-20 22:27:52,476 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {1690#true} {1691#false} #4256#return; {1691#false} is VALID [2022-02-20 22:27:52,477 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 94 [2022-02-20 22:27:52,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:27:52,486 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:27:52,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:27:52,493 INFO L290 TraceCheckUtils]: 0: Hoare triple {1835#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr849 := 0; {1690#true} is VALID [2022-02-20 22:27:52,494 INFO L290 TraceCheckUtils]: 1: Hoare triple {1690#true} assume !(#t~loopctr849 % 18446744073709551616 < #amount % 18446744073709551616); {1690#true} is VALID [2022-02-20 22:27:52,494 INFO L290 TraceCheckUtils]: 2: Hoare triple {1690#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1690#true} is VALID [2022-02-20 22:27:52,494 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1690#true} {1690#true} #4588#return; {1690#true} is VALID [2022-02-20 22:27:52,494 INFO L290 TraceCheckUtils]: 0: Hoare triple {1835#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {1690#true} is VALID [2022-02-20 22:27:52,501 INFO L272 TraceCheckUtils]: 1: Hoare triple {1690#true} call #t~memset~res15.base, #t~memset~res15.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, ~n); {1835#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:27:52,501 INFO L290 TraceCheckUtils]: 2: Hoare triple {1835#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr849 := 0; {1690#true} is VALID [2022-02-20 22:27:52,502 INFO L290 TraceCheckUtils]: 3: Hoare triple {1690#true} assume !(#t~loopctr849 % 18446744073709551616 < #amount % 18446744073709551616); {1690#true} is VALID [2022-02-20 22:27:52,502 INFO L290 TraceCheckUtils]: 4: Hoare triple {1690#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1690#true} is VALID [2022-02-20 22:27:52,502 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {1690#true} {1690#true} #4588#return; {1690#true} is VALID [2022-02-20 22:27:52,502 INFO L290 TraceCheckUtils]: 6: Hoare triple {1690#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res15.base, #t~memset~res15.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {1690#true} is VALID [2022-02-20 22:27:52,502 INFO L290 TraceCheckUtils]: 7: Hoare triple {1690#true} assume true; {1690#true} is VALID [2022-02-20 22:27:52,502 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {1690#true} {1691#false} #4258#return; {1691#false} is VALID [2022-02-20 22:27:52,503 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 115 [2022-02-20 22:27:52,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:27:52,509 INFO L290 TraceCheckUtils]: 0: Hoare triple {1690#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3008 + ~dev.offset; {1690#true} is VALID [2022-02-20 22:27:52,509 INFO L290 TraceCheckUtils]: 1: Hoare triple {1690#true} assume true; {1690#true} is VALID [2022-02-20 22:27:52,510 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1690#true} {1691#false} #3708#return; {1691#false} is VALID [2022-02-20 22:27:52,513 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 121 [2022-02-20 22:27:52,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:27:52,518 INFO L290 TraceCheckUtils]: 0: Hoare triple {1844#(= ~ldv_spin~0 |old(~ldv_spin~0)|)} ~ldv_spin~0 := 1; {1690#true} is VALID [2022-02-20 22:27:52,519 INFO L290 TraceCheckUtils]: 1: Hoare triple {1690#true} assume true; {1690#true} is VALID [2022-02-20 22:27:52,519 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1690#true} {1691#false} #3710#return; {1691#false} is VALID [2022-02-20 22:27:52,519 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 129 [2022-02-20 22:27:52,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:27:52,525 INFO L290 TraceCheckUtils]: 0: Hoare triple {1690#true} ~value := #in~value;~port := #in~port; {1690#true} is VALID [2022-02-20 22:27:52,525 INFO L290 TraceCheckUtils]: 1: Hoare triple {1690#true} assume true; {1690#true} is VALID [2022-02-20 22:27:52,526 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1690#true} {1691#false} #3712#return; {1691#false} is VALID [2022-02-20 22:27:52,526 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 133 [2022-02-20 22:27:52,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:27:52,533 INFO L290 TraceCheckUtils]: 0: Hoare triple {1690#true} ~port := #in~port;havoc ~value~1;#res := ~value~1; {1690#true} is VALID [2022-02-20 22:27:52,534 INFO L290 TraceCheckUtils]: 1: Hoare triple {1690#true} assume true; {1690#true} is VALID [2022-02-20 22:27:52,534 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1690#true} {1691#false} #3714#return; {1691#false} is VALID [2022-02-20 22:27:52,534 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 142 [2022-02-20 22:27:52,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:27:52,541 INFO L290 TraceCheckUtils]: 0: Hoare triple {1690#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3008 + ~dev.offset; {1690#true} is VALID [2022-02-20 22:27:52,541 INFO L290 TraceCheckUtils]: 1: Hoare triple {1690#true} assume true; {1690#true} is VALID [2022-02-20 22:27:52,541 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1690#true} {1691#false} #3722#return; {1691#false} is VALID [2022-02-20 22:27:52,542 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 147 [2022-02-20 22:27:52,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:27:52,548 INFO L290 TraceCheckUtils]: 0: Hoare triple {1690#true} ~port := #in~port;havoc ~value~0;#res := ~value~0; {1690#true} is VALID [2022-02-20 22:27:52,548 INFO L290 TraceCheckUtils]: 1: Hoare triple {1690#true} assume true; {1690#true} is VALID [2022-02-20 22:27:52,548 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1690#true} {1691#false} #3724#return; {1691#false} is VALID [2022-02-20 22:27:52,550 INFO L290 TraceCheckUtils]: 0: Hoare triple {1690#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(86, 2);call #Ultimate.allocInit(5, 3);call write~init~int(37, 3, 0, 1);call write~init~int(48, 3, 1, 1);call write~init~int(52, 3, 2, 1);call write~init~int(88, 3, 3, 1);call write~init~int(0, 3, 4, 1);call #Ultimate.allocInit(6, 4);call write~init~int(104, 4, 0, 1);call write~init~int(112, 4, 1, 1);call write~init~int(49, 4, 2, 1);call write~init~int(48, 4, 3, 1);call write~init~int(48, 4, 4, 1);call write~init~int(0, 4, 5, 1);call #Ultimate.allocInit(40, 5);call #Ultimate.allocInit(13, 6);call #Ultimate.allocInit(45, 7);call #Ultimate.allocInit(13, 8);call #Ultimate.allocInit(31, 9);call #Ultimate.allocInit(38, 10);call #Ultimate.allocInit(34, 11);call #Ultimate.allocInit(32, 12);call #Ultimate.allocInit(42, 13);call #Ultimate.allocInit(81, 14);call #Ultimate.allocInit(42, 15);call #Ultimate.allocInit(20, 16);call #Ultimate.allocInit(25, 17);call #Ultimate.allocInit(5, 18);call write~init~int(69, 18, 0, 1);call write~init~int(73, 18, 1, 1);call write~init~int(83, 18, 2, 1);call write~init~int(65, 18, 3, 1);call write~init~int(0, 18, 4, 1);call #Ultimate.allocInit(4, 19);call write~init~int(80, 19, 0, 1);call write~init~int(67, 19, 1, 1);call write~init~int(73, 19, 2, 1);call write~init~int(0, 19, 3, 1);call #Ultimate.allocInit(4, 20);call write~init~int(73, 20, 0, 1);call write~init~int(83, 20, 1, 1);call write~init~int(65, 20, 2, 1);call write~init~int(0, 20, 3, 1);call #Ultimate.allocInit(30, 21);call #Ultimate.allocInit(34, 22);call #Ultimate.allocInit(19, 23);call #Ultimate.allocInit(3, 24);call write~init~int(46, 24, 0, 1);call write~init~int(10, 24, 1, 1);call write~init~int(0, 24, 2, 1);call #Ultimate.allocInit(8, 25);call #Ultimate.allocInit(24, 26);call #Ultimate.allocInit(37, 27);call #Ultimate.allocInit(27, 28);call #Ultimate.allocInit(24, 29);call #Ultimate.allocInit(21, 30);call #Ultimate.allocInit(33, 31);call #Ultimate.allocInit(58, 32);call #Ultimate.allocInit(48, 33);call #Ultimate.allocInit(48, 34);call #Ultimate.allocInit(31, 35);call #Ultimate.allocInit(45, 36);call #Ultimate.allocInit(39, 37);call #Ultimate.allocInit(31, 38);call #Ultimate.allocInit(53, 39);call #Ultimate.allocInit(28, 40);call #Ultimate.allocInit(39, 41);call #Ultimate.allocInit(31, 42);call #Ultimate.allocInit(53, 43);call #Ultimate.allocInit(28, 44);call #Ultimate.allocInit(28, 45);call #Ultimate.allocInit(64, 46);call #Ultimate.allocInit(43, 47);call #Ultimate.allocInit(40, 48);call #Ultimate.allocInit(8, 49);call #Ultimate.allocInit(42, 50);call #Ultimate.allocInit(31, 51);call #Ultimate.allocInit(64, 52);call #Ultimate.allocInit(50, 53);call #Ultimate.allocInit(29, 54);call #Ultimate.allocInit(6, 55);call write~init~int(104, 55, 0, 1);call write~init~int(112, 55, 1, 1);call write~init~int(49, 55, 2, 1);call write~init~int(48, 55, 3, 1);call write~init~int(48, 55, 4, 1);call write~init~int(0, 55, 5, 1);call #Ultimate.allocInit(6, 56);call write~init~int(104, 56, 0, 1);call write~init~int(112, 56, 1, 1);call write~init~int(49, 56, 2, 1);call write~init~int(48, 56, 3, 1);call write~init~int(48, 56, 4, 1);call write~init~int(0, 56, 5, 1);~ldv_irq_1_3~0 := 0;~ldv_irq_data_1_1~0.base, ~ldv_irq_data_1_1~0.offset := 0, 0;~hp100_pci_driver_group1~0.base, ~hp100_pci_driver_group1~0.offset := 0, 0;~pci_counter~0 := 0;~ldv_irq_1_0~0 := 0;~hp100_bm_netdev_ops_group1~0.base, ~hp100_bm_netdev_ops_group1~0.offset := 0, 0;~ldv_irq_data_1_0~0.base, ~ldv_irq_data_1_0~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_irq_data_1_3~0.base, ~ldv_irq_data_1_3~0.offset := 0, 0;~ldv_irq_data_1_2~0.base, ~ldv_irq_data_1_2~0.offset := 0, 0;~ldv_irq_1_2~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_irq_1_1~0 := 0;~hp100_netdev_ops_group1~0.base, ~hp100_netdev_ops_group1~0.offset := 0, 0;~ldv_irq_line_1_3~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_irq_line_1_0~0 := 0;~ref_cnt~0 := 0;~ldv_irq_line_1_1~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_irq_line_1_2~0 := 0;~ldv_state_variable_4~0 := 0;~#hp100_pci_tbl~0.base, ~#hp100_pci_tbl~0.offset := 57, 0;call #Ultimate.allocInit(224, 57);call write~init~int(4156, ~#hp100_pci_tbl~0.base, ~#hp100_pci_tbl~0.offset, 4);call write~init~int(4144, ~#hp100_pci_tbl~0.base, 4 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#hp100_pci_tbl~0.base, 8 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#hp100_pci_tbl~0.base, 12 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 16 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 20 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 24 + ~#hp100_pci_tbl~0.offset, 8);call write~init~int(4156, ~#hp100_pci_tbl~0.base, 32 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(4145, ~#hp100_pci_tbl~0.base, 36 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#hp100_pci_tbl~0.base, 40 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#hp100_pci_tbl~0.base, 44 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 48 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 52 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 56 + ~#hp100_pci_tbl~0.offset, 8);call write~init~int(4156, ~#hp100_pci_tbl~0.base, 64 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(4162, ~#hp100_pci_tbl~0.base, 68 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#hp100_pci_tbl~0.base, 72 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#hp100_pci_tbl~0.base, 76 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 80 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 84 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 88 + ~#hp100_pci_tbl~0.offset, 8);call write~init~int(4156, ~#hp100_pci_tbl~0.base, 96 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(4160, ~#hp100_pci_tbl~0.base, 100 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#hp100_pci_tbl~0.base, 104 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#hp100_pci_tbl~0.base, 108 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 112 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 116 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 120 + ~#hp100_pci_tbl~0.offset, 8);call write~init~int(4598, ~#hp100_pci_tbl~0.base, 128 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(274, ~#hp100_pci_tbl~0.base, 132 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#hp100_pci_tbl~0.base, 136 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#hp100_pci_tbl~0.base, 140 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 144 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 148 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 152 + ~#hp100_pci_tbl~0.offset, 8);call write~init~int(4122, ~#hp100_pci_tbl~0.base, 160 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(5, ~#hp100_pci_tbl~0.base, 164 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#hp100_pci_tbl~0.base, 168 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#hp100_pci_tbl~0.base, 172 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 176 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 180 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 184 + ~#hp100_pci_tbl~0.offset, 8);call write~init~int(0, ~#hp100_pci_tbl~0.base, 192 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 196 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 200 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 204 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 208 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 212 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 216 + ~#hp100_pci_tbl~0.offset, 8);~__mod_pci__hp100_pci_tbl_device_table~0.vendor := ~__mod_pci__hp100_pci_tbl_device_table~0.vendor[0 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.device := ~__mod_pci__hp100_pci_tbl_device_table~0.device[0 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.subvendor := ~__mod_pci__hp100_pci_tbl_device_table~0.subvendor[0 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.subdevice := ~__mod_pci__hp100_pci_tbl_device_table~0.subdevice[0 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.class := ~__mod_pci__hp100_pci_tbl_device_table~0.class[0 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.class_mask := ~__mod_pci__hp100_pci_tbl_device_table~0.class_mask[0 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.driver_data := ~__mod_pci__hp100_pci_tbl_device_table~0.driver_data[0 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.vendor := ~__mod_pci__hp100_pci_tbl_device_table~0.vendor[1 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.device := ~__mod_pci__hp100_pci_tbl_device_table~0.device[1 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.subvendor := ~__mod_pci__hp100_pci_tbl_device_table~0.subvendor[1 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.subdevice := ~__mod_pci__hp100_pci_tbl_device_table~0.subdevice[1 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.class := ~__mod_pci__hp100_pci_tbl_device_table~0.class[1 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.class_mask := ~__mod_pci__hp100_pci_tbl_device_table~0.class_mask[1 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.driver_data := ~__mod_pci__hp100_pci_tbl_device_table~0.driver_data[1 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.vendor := ~__mod_pci__hp100_pci_tbl_device_table~0.vendor[2 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.device := ~__mod_pci__hp100_pci_tbl_device_table~0.device[2 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.subvendor := ~__mod_pci__hp100_pci_tbl_device_table~0.subvendor[2 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.subdevice := ~__mod_pci__hp100_pci_tbl_device_table~0.subdevice[2 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.class := ~__mod_pci__hp100_pci_tbl_device_table~0.class[2 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.class_mask := ~__mod_pci__hp100_pci_tbl_device_table~0.class_mask[2 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.driver_data := ~__mod_pci__hp100_pci_tbl_device_table~0.driver_data[2 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.vendor := ~__mod_pci__hp100_pci_tbl_device_table~0.vendor[3 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.device := ~__mod_pci__hp100_pci_tbl_device_table~0.device[3 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.subvendor := ~__mod_pci__hp100_pci_tbl_device_table~0.subvendor[3 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.subdevice := ~__mod_pci__hp100_pci_tbl_device_table~0.subdevice[3 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.class := ~__mod_pci__hp100_pci_tbl_device_table~0.class[3 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.class_mask := ~__mod_pci__hp100_pci_tbl_device_table~0.class_mask[3 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.driver_data := ~__mod_pci__hp100_pci_tbl_device_table~0.driver_data[3 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.vendor := ~__mod_pci__hp100_pci_tbl_device_table~0.vendor[4 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.device := ~__mod_pci__hp100_pci_tbl_device_table~0.device[4 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.subvendor := ~__mod_pci__hp100_pci_tbl_device_table~0.subvendor[4 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.subdevice := ~__mod_pci__hp100_pci_tbl_device_table~0.subdevice[4 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.class := ~__mod_pci__hp100_pci_tbl_device_table~0.class[4 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.class_mask := ~__mod_pci__hp100_pci_tbl_device_table~0.class_mask[4 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.driver_data := ~__mod_pci__hp100_pci_tbl_device_table~0.driver_data[4 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.vendor := ~__mod_pci__hp100_pci_tbl_device_table~0.vendor[5 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.device := ~__mod_pci__hp100_pci_tbl_device_table~0.device[5 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.subvendor := ~__mod_pci__hp100_pci_tbl_device_table~0.subvendor[5 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.subdevice := ~__mod_pci__hp100_pci_tbl_device_table~0.subdevice[5 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.class := ~__mod_pci__hp100_pci_tbl_device_table~0.class[5 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.class_mask := ~__mod_pci__hp100_pci_tbl_device_table~0.class_mask[5 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.driver_data := ~__mod_pci__hp100_pci_tbl_device_table~0.driver_data[5 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.vendor := ~__mod_pci__hp100_pci_tbl_device_table~0.vendor[6 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.device := ~__mod_pci__hp100_pci_tbl_device_table~0.device[6 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.subvendor := ~__mod_pci__hp100_pci_tbl_device_table~0.subvendor[6 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.subdevice := ~__mod_pci__hp100_pci_tbl_device_table~0.subdevice[6 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.class := ~__mod_pci__hp100_pci_tbl_device_table~0.class[6 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.class_mask := ~__mod_pci__hp100_pci_tbl_device_table~0.class_mask[6 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.driver_data := ~__mod_pci__hp100_pci_tbl_device_table~0.driver_data[6 := 0];~hp100_rx_ratio~0 := 75;~hp100_priority_tx~0 := 0;~hp100_mode~0 := 1;~#hp100_bm_netdev_ops~0.base, ~#hp100_bm_netdev_ops~0.offset := 58, 0;call #Ultimate.allocInit(528, 58);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 8 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hp100_open.base, #funAddr~hp100_open.offset, ~#hp100_bm_netdev_ops~0.base, 16 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hp100_close.base, #funAddr~hp100_close.offset, ~#hp100_bm_netdev_ops~0.base, 24 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hp100_start_xmit_bm.base, #funAddr~hp100_start_xmit_bm.offset, ~#hp100_bm_netdev_ops~0.base, 32 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 40 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 48 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hp100_set_multicast_list.base, #funAddr~hp100_set_multicast_list.offset, ~#hp100_bm_netdev_ops~0.base, 56 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_mac_addr.base, #funAddr~eth_mac_addr.offset, ~#hp100_bm_netdev_ops~0.base, 64 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_validate_addr.base, #funAddr~eth_validate_addr.offset, ~#hp100_bm_netdev_ops~0.base, 72 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 80 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 88 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_change_mtu.base, #funAddr~eth_change_mtu.offset, ~#hp100_bm_netdev_ops~0.base, 96 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 104 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 112 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 120 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hp100_get_stats.base, #funAddr~hp100_get_stats.offset, ~#hp100_bm_netdev_ops~0.base, 128 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 136 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 144 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 152 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 160 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 168 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 176 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 184 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 192 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 200 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 208 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 216 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 224 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 232 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 240 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 248 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 256 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 264 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 272 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 280 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 288 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 296 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 304 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 312 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 320 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 328 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 336 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 344 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 352 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 360 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 368 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 376 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 384 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 392 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 400 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 408 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 416 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 424 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 432 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 440 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 448 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 456 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 464 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 472 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 480 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 488 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 496 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 504 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 512 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 520 + ~#hp100_bm_netdev_ops~0.offset, 8);~#hp100_netdev_ops~0.base, ~#hp100_netdev_ops~0.offset := 59, 0;call #Ultimate.allocInit(528, 59);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 8 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hp100_open.base, #funAddr~hp100_open.offset, ~#hp100_netdev_ops~0.base, 16 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hp100_close.base, #funAddr~hp100_close.offset, ~#hp100_netdev_ops~0.base, 24 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hp100_start_xmit.base, #funAddr~hp100_start_xmit.offset, ~#hp100_netdev_ops~0.base, 32 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 40 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 48 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hp100_set_multicast_list.base, #funAddr~hp100_set_multicast_list.offset, ~#hp100_netdev_ops~0.base, 56 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_mac_addr.base, #funAddr~eth_mac_addr.offset, ~#hp100_netdev_ops~0.base, 64 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_validate_addr.base, #funAddr~eth_validate_addr.offset, ~#hp100_netdev_ops~0.base, 72 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 80 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 88 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_change_mtu.base, #funAddr~eth_change_mtu.offset, ~#hp100_netdev_ops~0.base, 96 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 104 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 112 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 120 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hp100_get_stats.base, #funAddr~hp100_get_stats.offset, ~#hp100_netdev_ops~0.base, 128 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 136 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 144 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 152 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 160 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 168 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 176 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 184 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 192 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 200 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 208 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 216 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 224 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 232 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 240 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 248 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 256 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 264 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 272 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 280 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 288 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 296 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 304 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 312 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 320 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 328 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 336 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 344 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 352 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 360 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 368 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 376 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 384 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 392 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 400 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 408 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 416 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 424 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 432 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 440 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 448 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 456 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 464 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 472 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 480 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 488 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 496 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 504 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 512 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 520 + ~#hp100_netdev_ops~0.offset, 8);~#hp100_pci_driver~0.base, ~#hp100_pci_driver~0.offset := 60, 0;call #Ultimate.allocInit(305, 60);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 8 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(55, 0, ~#hp100_pci_driver~0.base, 16 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(~#hp100_pci_tbl~0.base, ~#hp100_pci_tbl~0.offset, ~#hp100_pci_driver~0.base, 24 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~hp100_pci_probe.base, #funAddr~hp100_pci_probe.offset, ~#hp100_pci_driver~0.base, 32 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~hp100_pci_remove.base, #funAddr~hp100_pci_remove.offset, ~#hp100_pci_driver~0.base, 40 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 48 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 56 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 64 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 72 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 80 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 88 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 96 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 104 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 112 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 120 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 128 + ~#hp100_pci_driver~0.offset, 8);call write~init~int(0, ~#hp100_pci_driver~0.base, 136 + ~#hp100_pci_driver~0.offset, 1);call write~init~int(0, ~#hp100_pci_driver~0.base, 137 + ~#hp100_pci_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 141 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 149 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 157 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 165 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 173 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 181 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 189 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 197 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 205 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 213 + ~#hp100_pci_driver~0.offset, 8);call write~init~int(0, ~#hp100_pci_driver~0.base, 221 + ~#hp100_pci_driver~0.offset, 4);call write~init~int(0, ~#hp100_pci_driver~0.base, 225 + ~#hp100_pci_driver~0.offset, 4);call write~init~int(0, ~#hp100_pci_driver~0.base, 229 + ~#hp100_pci_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 233 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 241 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 249 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 257 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 265 + ~#hp100_pci_driver~0.offset, 8);call write~init~int(0, ~#hp100_pci_driver~0.base, 273 + ~#hp100_pci_driver~0.offset, 4);call write~init~int(0, ~#hp100_pci_driver~0.base, 277 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 289 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 297 + ~#hp100_pci_driver~0.offset, 8);~ldv_retval_2~0 := 0;~ldv_retval_5~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_spin~0 := 0; {1690#true} is VALID [2022-02-20 22:27:52,551 INFO L290 TraceCheckUtils]: 1: Hoare triple {1690#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret744#1.base, main_#t~ret744#1.offset, main_#t~ret745#1.base, main_#t~ret745#1.offset, main_#t~ret746#1.base, main_#t~ret746#1.offset, main_#t~ret747#1.base, main_#t~ret747#1.offset, main_#t~ret748#1.base, main_#t~ret748#1.offset, main_#t~ret749#1.base, main_#t~ret749#1.offset, main_#t~ret750#1.base, main_#t~ret750#1.offset, main_#t~nondet751#1, main_#t~switch752#1, main_#t~nondet753#1, main_#t~switch754#1, main_#t~ret755#1, main_#t~ret756#1, main_#t~ret757#1, main_#t~ret758#1, main_#t~ret759#1.base, main_#t~ret759#1.offset, main_#t~ret760#1.base, main_#t~ret760#1.offset, main_#t~ret761#1.base, main_#t~ret761#1.offset, main_#t~mem762#1, main_#t~ret763#1, main_#t~mem764#1, main_#t~ret765#1, main_#t~ret766#1, main_#t~ret767#1, main_#t~ret768#1, main_#t~ret769#1, main_#t~ret770#1, main_#t~ret771#1, main_#t~ret772#1, main_#t~nondet773#1, main_#t~switch774#1, main_#t~ret775#1, main_#t~nondet776#1, main_#t~switch777#1, main_#t~ret778#1, main_#t~ret779#1, main_#t~ret780#1, main_#t~ret781#1, main_#t~ret782#1.base, main_#t~ret782#1.offset, main_#t~ret783#1.base, main_#t~ret783#1.offset, main_#t~ret784#1.base, main_#t~ret784#1.offset, main_#t~mem785#1, main_#t~ret786#1, main_#t~mem787#1, main_#t~ret788#1, main_#t~ret789#1, main_#t~ret790#1, main_#t~ret791#1, main_#t~ret792#1, main_#t~ret793#1, main_#t~ret794#1, main_#t~ret795#1, main_#t~nondet796#1, main_#t~switch797#1, main_#t~ret798#1, main_#t~ret799#1, main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset, main_~tmp~61#1.base, main_~tmp~61#1.offset, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp___0~31#1.base, main_~tmp___0~31#1.offset, main_~#ldvarg2~0#1.base, main_~#ldvarg2~0#1.offset, main_~ldvarg4~0#1.base, main_~ldvarg4~0#1.offset, main_~tmp___1~20#1.base, main_~tmp___1~20#1.offset, main_~ldvarg3~0#1.base, main_~ldvarg3~0#1.offset, main_~tmp___2~14#1.base, main_~tmp___2~14#1.offset, main_~#ldvarg5~0#1.base, main_~#ldvarg5~0#1.offset, main_~ldvarg6~0#1.base, main_~ldvarg6~0#1.offset, main_~tmp___3~10#1.base, main_~tmp___3~10#1.offset, main_~tmp___4~8#1, main_~tmp___5~8#1, main_~tmp___6~6#1, main_~tmp___7~5#1, main_~tmp___8~4#1;havoc main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset;havoc main_~tmp~61#1.base, main_~tmp~61#1.offset;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp___0~31#1.base, main_~tmp___0~31#1.offset;call main_~#ldvarg2~0#1.base, main_~#ldvarg2~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~ldvarg4~0#1.base, main_~ldvarg4~0#1.offset;havoc main_~tmp___1~20#1.base, main_~tmp___1~20#1.offset;havoc main_~ldvarg3~0#1.base, main_~ldvarg3~0#1.offset;havoc main_~tmp___2~14#1.base, main_~tmp___2~14#1.offset;call main_~#ldvarg5~0#1.base, main_~#ldvarg5~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~ldvarg6~0#1.base, main_~ldvarg6~0#1.offset;havoc main_~tmp___3~10#1.base, main_~tmp___3~10#1.offset;havoc main_~tmp___4~8#1;havoc main_~tmp___5~8#1;havoc main_~tmp___6~6#1;havoc main_~tmp___7~5#1;havoc main_~tmp___8~4#1; {1690#true} is VALID [2022-02-20 22:27:52,554 INFO L272 TraceCheckUtils]: 2: Hoare triple {1690#true} call main_#t~ret744#1.base, main_#t~ret744#1.offset := ldv_init_zalloc(232); {1798#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:27:52,554 INFO L290 TraceCheckUtils]: 3: Hoare triple {1798#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {1690#true} is VALID [2022-02-20 22:27:52,555 INFO L272 TraceCheckUtils]: 4: Hoare triple {1690#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {1806#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:27:52,555 INFO L290 TraceCheckUtils]: 5: Hoare triple {1806#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {1690#true} is VALID [2022-02-20 22:27:52,555 INFO L290 TraceCheckUtils]: 6: Hoare triple {1690#true} assume true; {1690#true} is VALID [2022-02-20 22:27:52,555 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {1690#true} {1690#true} #4170#return; {1690#true} is VALID [2022-02-20 22:27:52,556 INFO L290 TraceCheckUtils]: 8: Hoare triple {1690#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {1690#true} is VALID [2022-02-20 22:27:52,556 INFO L272 TraceCheckUtils]: 9: Hoare triple {1690#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {1690#true} is VALID [2022-02-20 22:27:52,556 INFO L290 TraceCheckUtils]: 10: Hoare triple {1690#true} ~cond := #in~cond; {1690#true} is VALID [2022-02-20 22:27:52,556 INFO L290 TraceCheckUtils]: 11: Hoare triple {1690#true} assume 0 == ~cond;assume false; {1691#false} is VALID [2022-02-20 22:27:52,556 INFO L290 TraceCheckUtils]: 12: Hoare triple {1691#false} assume true; {1691#false} is VALID [2022-02-20 22:27:52,557 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {1691#false} {1690#true} #4172#return; {1691#false} is VALID [2022-02-20 22:27:52,557 INFO L290 TraceCheckUtils]: 14: Hoare triple {1691#false} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {1691#false} is VALID [2022-02-20 22:27:52,557 INFO L290 TraceCheckUtils]: 15: Hoare triple {1691#false} assume true; {1691#false} is VALID [2022-02-20 22:27:52,557 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {1691#false} {1690#true} #4246#return; {1691#false} is VALID [2022-02-20 22:27:52,557 INFO L290 TraceCheckUtils]: 17: Hoare triple {1691#false} main_~tmp~61#1.base, main_~tmp~61#1.offset := main_#t~ret744#1.base, main_#t~ret744#1.offset;havoc main_#t~ret744#1.base, main_#t~ret744#1.offset;main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset := main_~tmp~61#1.base, main_~tmp~61#1.offset; {1691#false} is VALID [2022-02-20 22:27:52,557 INFO L272 TraceCheckUtils]: 18: Hoare triple {1691#false} call main_#t~ret745#1.base, main_#t~ret745#1.offset := ldv_init_zalloc(1); {1798#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:27:52,558 INFO L290 TraceCheckUtils]: 19: Hoare triple {1798#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {1690#true} is VALID [2022-02-20 22:27:52,559 INFO L272 TraceCheckUtils]: 20: Hoare triple {1690#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {1806#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:27:52,559 INFO L290 TraceCheckUtils]: 21: Hoare triple {1806#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {1690#true} is VALID [2022-02-20 22:27:52,559 INFO L290 TraceCheckUtils]: 22: Hoare triple {1690#true} assume true; {1690#true} is VALID [2022-02-20 22:27:52,559 INFO L284 TraceCheckUtils]: 23: Hoare quadruple {1690#true} {1690#true} #4170#return; {1690#true} is VALID [2022-02-20 22:27:52,559 INFO L290 TraceCheckUtils]: 24: Hoare triple {1690#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {1690#true} is VALID [2022-02-20 22:27:52,560 INFO L272 TraceCheckUtils]: 25: Hoare triple {1690#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {1690#true} is VALID [2022-02-20 22:27:52,560 INFO L290 TraceCheckUtils]: 26: Hoare triple {1690#true} ~cond := #in~cond; {1690#true} is VALID [2022-02-20 22:27:52,560 INFO L290 TraceCheckUtils]: 27: Hoare triple {1690#true} assume 0 == ~cond;assume false; {1691#false} is VALID [2022-02-20 22:27:52,560 INFO L290 TraceCheckUtils]: 28: Hoare triple {1691#false} assume true; {1691#false} is VALID [2022-02-20 22:27:52,560 INFO L284 TraceCheckUtils]: 29: Hoare quadruple {1691#false} {1690#true} #4172#return; {1691#false} is VALID [2022-02-20 22:27:52,561 INFO L290 TraceCheckUtils]: 30: Hoare triple {1691#false} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {1691#false} is VALID [2022-02-20 22:27:52,561 INFO L290 TraceCheckUtils]: 31: Hoare triple {1691#false} assume true; {1691#false} is VALID [2022-02-20 22:27:52,561 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {1691#false} {1691#false} #4248#return; {1691#false} is VALID [2022-02-20 22:27:52,561 INFO L290 TraceCheckUtils]: 33: Hoare triple {1691#false} main_~tmp___0~31#1.base, main_~tmp___0~31#1.offset := main_#t~ret745#1.base, main_#t~ret745#1.offset;havoc main_#t~ret745#1.base, main_#t~ret745#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp___0~31#1.base, main_~tmp___0~31#1.offset; {1691#false} is VALID [2022-02-20 22:27:52,561 INFO L272 TraceCheckUtils]: 34: Hoare triple {1691#false} call main_#t~ret746#1.base, main_#t~ret746#1.offset := ldv_init_zalloc(232); {1798#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:27:52,561 INFO L290 TraceCheckUtils]: 35: Hoare triple {1798#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {1690#true} is VALID [2022-02-20 22:27:52,562 INFO L272 TraceCheckUtils]: 36: Hoare triple {1690#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {1806#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:27:52,563 INFO L290 TraceCheckUtils]: 37: Hoare triple {1806#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {1690#true} is VALID [2022-02-20 22:27:52,563 INFO L290 TraceCheckUtils]: 38: Hoare triple {1690#true} assume true; {1690#true} is VALID [2022-02-20 22:27:52,563 INFO L284 TraceCheckUtils]: 39: Hoare quadruple {1690#true} {1690#true} #4170#return; {1690#true} is VALID [2022-02-20 22:27:52,563 INFO L290 TraceCheckUtils]: 40: Hoare triple {1690#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {1690#true} is VALID [2022-02-20 22:27:52,563 INFO L272 TraceCheckUtils]: 41: Hoare triple {1690#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {1690#true} is VALID [2022-02-20 22:27:52,611 INFO L290 TraceCheckUtils]: 42: Hoare triple {1690#true} ~cond := #in~cond; {1690#true} is VALID [2022-02-20 22:27:52,615 INFO L290 TraceCheckUtils]: 43: Hoare triple {1690#true} assume 0 == ~cond;assume false; {1691#false} is VALID [2022-02-20 22:27:52,616 INFO L290 TraceCheckUtils]: 44: Hoare triple {1691#false} assume true; {1691#false} is VALID [2022-02-20 22:27:52,616 INFO L284 TraceCheckUtils]: 45: Hoare quadruple {1691#false} {1690#true} #4172#return; {1691#false} is VALID [2022-02-20 22:27:52,616 INFO L290 TraceCheckUtils]: 46: Hoare triple {1691#false} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {1691#false} is VALID [2022-02-20 22:27:52,616 INFO L290 TraceCheckUtils]: 47: Hoare triple {1691#false} assume true; {1691#false} is VALID [2022-02-20 22:27:52,616 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {1691#false} {1691#false} #4250#return; {1691#false} is VALID [2022-02-20 22:27:52,616 INFO L290 TraceCheckUtils]: 49: Hoare triple {1691#false} main_~tmp___1~20#1.base, main_~tmp___1~20#1.offset := main_#t~ret746#1.base, main_#t~ret746#1.offset;havoc main_#t~ret746#1.base, main_#t~ret746#1.offset;main_~ldvarg4~0#1.base, main_~ldvarg4~0#1.offset := main_~tmp___1~20#1.base, main_~tmp___1~20#1.offset; {1691#false} is VALID [2022-02-20 22:27:52,616 INFO L272 TraceCheckUtils]: 50: Hoare triple {1691#false} call main_#t~ret747#1.base, main_#t~ret747#1.offset := ldv_init_zalloc(1); {1798#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:27:52,616 INFO L290 TraceCheckUtils]: 51: Hoare triple {1798#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {1690#true} is VALID [2022-02-20 22:27:52,618 INFO L272 TraceCheckUtils]: 52: Hoare triple {1690#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {1806#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:27:52,618 INFO L290 TraceCheckUtils]: 53: Hoare triple {1806#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {1690#true} is VALID [2022-02-20 22:27:52,618 INFO L290 TraceCheckUtils]: 54: Hoare triple {1690#true} assume true; {1690#true} is VALID [2022-02-20 22:27:52,618 INFO L284 TraceCheckUtils]: 55: Hoare quadruple {1690#true} {1690#true} #4170#return; {1690#true} is VALID [2022-02-20 22:27:52,618 INFO L290 TraceCheckUtils]: 56: Hoare triple {1690#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {1690#true} is VALID [2022-02-20 22:27:52,618 INFO L272 TraceCheckUtils]: 57: Hoare triple {1690#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {1690#true} is VALID [2022-02-20 22:27:52,618 INFO L290 TraceCheckUtils]: 58: Hoare triple {1690#true} ~cond := #in~cond; {1690#true} is VALID [2022-02-20 22:27:52,619 INFO L290 TraceCheckUtils]: 59: Hoare triple {1690#true} assume 0 == ~cond;assume false; {1691#false} is VALID [2022-02-20 22:27:52,619 INFO L290 TraceCheckUtils]: 60: Hoare triple {1691#false} assume true; {1691#false} is VALID [2022-02-20 22:27:52,619 INFO L284 TraceCheckUtils]: 61: Hoare quadruple {1691#false} {1690#true} #4172#return; {1691#false} is VALID [2022-02-20 22:27:52,619 INFO L290 TraceCheckUtils]: 62: Hoare triple {1691#false} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {1691#false} is VALID [2022-02-20 22:27:52,620 INFO L290 TraceCheckUtils]: 63: Hoare triple {1691#false} assume true; {1691#false} is VALID [2022-02-20 22:27:52,620 INFO L284 TraceCheckUtils]: 64: Hoare quadruple {1691#false} {1691#false} #4252#return; {1691#false} is VALID [2022-02-20 22:27:52,620 INFO L290 TraceCheckUtils]: 65: Hoare triple {1691#false} main_~tmp___2~14#1.base, main_~tmp___2~14#1.offset := main_#t~ret747#1.base, main_#t~ret747#1.offset;havoc main_#t~ret747#1.base, main_#t~ret747#1.offset;main_~ldvarg3~0#1.base, main_~ldvarg3~0#1.offset := main_~tmp___2~14#1.base, main_~tmp___2~14#1.offset; {1691#false} is VALID [2022-02-20 22:27:52,620 INFO L272 TraceCheckUtils]: 66: Hoare triple {1691#false} call main_#t~ret748#1.base, main_#t~ret748#1.offset := ldv_init_zalloc(32); {1798#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:27:52,620 INFO L290 TraceCheckUtils]: 67: Hoare triple {1798#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {1690#true} is VALID [2022-02-20 22:27:52,621 INFO L272 TraceCheckUtils]: 68: Hoare triple {1690#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {1806#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:27:52,621 INFO L290 TraceCheckUtils]: 69: Hoare triple {1806#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {1690#true} is VALID [2022-02-20 22:27:52,621 INFO L290 TraceCheckUtils]: 70: Hoare triple {1690#true} assume true; {1690#true} is VALID [2022-02-20 22:27:52,621 INFO L284 TraceCheckUtils]: 71: Hoare quadruple {1690#true} {1690#true} #4170#return; {1690#true} is VALID [2022-02-20 22:27:52,621 INFO L290 TraceCheckUtils]: 72: Hoare triple {1690#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {1690#true} is VALID [2022-02-20 22:27:52,622 INFO L272 TraceCheckUtils]: 73: Hoare triple {1690#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {1690#true} is VALID [2022-02-20 22:27:52,622 INFO L290 TraceCheckUtils]: 74: Hoare triple {1690#true} ~cond := #in~cond; {1690#true} is VALID [2022-02-20 22:27:52,622 INFO L290 TraceCheckUtils]: 75: Hoare triple {1690#true} assume 0 == ~cond;assume false; {1691#false} is VALID [2022-02-20 22:27:52,622 INFO L290 TraceCheckUtils]: 76: Hoare triple {1691#false} assume true; {1691#false} is VALID [2022-02-20 22:27:52,623 INFO L284 TraceCheckUtils]: 77: Hoare quadruple {1691#false} {1690#true} #4172#return; {1691#false} is VALID [2022-02-20 22:27:52,623 INFO L290 TraceCheckUtils]: 78: Hoare triple {1691#false} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {1691#false} is VALID [2022-02-20 22:27:52,623 INFO L290 TraceCheckUtils]: 79: Hoare triple {1691#false} assume true; {1691#false} is VALID [2022-02-20 22:27:52,623 INFO L284 TraceCheckUtils]: 80: Hoare quadruple {1691#false} {1691#false} #4254#return; {1691#false} is VALID [2022-02-20 22:27:52,623 INFO L290 TraceCheckUtils]: 81: Hoare triple {1691#false} main_~tmp___3~10#1.base, main_~tmp___3~10#1.offset := main_#t~ret748#1.base, main_#t~ret748#1.offset;havoc main_#t~ret748#1.base, main_#t~ret748#1.offset;main_~ldvarg6~0#1.base, main_~ldvarg6~0#1.offset := main_~tmp___3~10#1.base, main_~tmp___3~10#1.offset;assume { :begin_inline_ldv_initialize } true; {1691#false} is VALID [2022-02-20 22:27:52,623 INFO L290 TraceCheckUtils]: 82: Hoare triple {1691#false} assume { :end_inline_ldv_initialize } true; {1691#false} is VALID [2022-02-20 22:27:52,624 INFO L272 TraceCheckUtils]: 83: Hoare triple {1691#false} call main_#t~ret749#1.base, main_#t~ret749#1.offset := ldv_memset(main_~#ldvarg2~0#1.base, main_~#ldvarg2~0#1.offset, 0, 4); {1835#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:27:52,624 INFO L290 TraceCheckUtils]: 84: Hoare triple {1835#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {1690#true} is VALID [2022-02-20 22:27:52,625 INFO L272 TraceCheckUtils]: 85: Hoare triple {1690#true} call #t~memset~res15.base, #t~memset~res15.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, ~n); {1835#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:27:52,626 INFO L290 TraceCheckUtils]: 86: Hoare triple {1835#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr849 := 0; {1690#true} is VALID [2022-02-20 22:27:52,626 INFO L290 TraceCheckUtils]: 87: Hoare triple {1690#true} assume !(#t~loopctr849 % 18446744073709551616 < #amount % 18446744073709551616); {1690#true} is VALID [2022-02-20 22:27:52,626 INFO L290 TraceCheckUtils]: 88: Hoare triple {1690#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1690#true} is VALID [2022-02-20 22:27:52,626 INFO L284 TraceCheckUtils]: 89: Hoare quadruple {1690#true} {1690#true} #4588#return; {1690#true} is VALID [2022-02-20 22:27:52,626 INFO L290 TraceCheckUtils]: 90: Hoare triple {1690#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res15.base, #t~memset~res15.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {1690#true} is VALID [2022-02-20 22:27:52,627 INFO L290 TraceCheckUtils]: 91: Hoare triple {1690#true} assume true; {1690#true} is VALID [2022-02-20 22:27:52,627 INFO L284 TraceCheckUtils]: 92: Hoare quadruple {1690#true} {1691#false} #4256#return; {1691#false} is VALID [2022-02-20 22:27:52,627 INFO L290 TraceCheckUtils]: 93: Hoare triple {1691#false} havoc main_#t~ret749#1.base, main_#t~ret749#1.offset; {1691#false} is VALID [2022-02-20 22:27:52,627 INFO L272 TraceCheckUtils]: 94: Hoare triple {1691#false} call main_#t~ret750#1.base, main_#t~ret750#1.offset := ldv_memset(main_~#ldvarg5~0#1.base, main_~#ldvarg5~0#1.offset, 0, 4); {1835#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:27:52,627 INFO L290 TraceCheckUtils]: 95: Hoare triple {1835#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {1690#true} is VALID [2022-02-20 22:27:52,628 INFO L272 TraceCheckUtils]: 96: Hoare triple {1690#true} call #t~memset~res15.base, #t~memset~res15.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, ~n); {1835#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:27:52,628 INFO L290 TraceCheckUtils]: 97: Hoare triple {1835#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr849 := 0; {1690#true} is VALID [2022-02-20 22:27:52,628 INFO L290 TraceCheckUtils]: 98: Hoare triple {1690#true} assume !(#t~loopctr849 % 18446744073709551616 < #amount % 18446744073709551616); {1690#true} is VALID [2022-02-20 22:27:52,629 INFO L290 TraceCheckUtils]: 99: Hoare triple {1690#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1690#true} is VALID [2022-02-20 22:27:52,629 INFO L284 TraceCheckUtils]: 100: Hoare quadruple {1690#true} {1690#true} #4588#return; {1690#true} is VALID [2022-02-20 22:27:52,629 INFO L290 TraceCheckUtils]: 101: Hoare triple {1690#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res15.base, #t~memset~res15.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {1690#true} is VALID [2022-02-20 22:27:52,629 INFO L290 TraceCheckUtils]: 102: Hoare triple {1690#true} assume true; {1690#true} is VALID [2022-02-20 22:27:52,629 INFO L284 TraceCheckUtils]: 103: Hoare quadruple {1690#true} {1691#false} #4258#return; {1691#false} is VALID [2022-02-20 22:27:52,629 INFO L290 TraceCheckUtils]: 104: Hoare triple {1691#false} havoc main_#t~ret750#1.base, main_#t~ret750#1.offset;~ldv_state_variable_4~0 := 0;~ldv_state_variable_1~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {1691#false} is VALID [2022-02-20 22:27:52,630 INFO L290 TraceCheckUtils]: 105: Hoare triple {1691#false} assume -2147483648 <= main_#t~nondet751#1 && main_#t~nondet751#1 <= 2147483647;main_~tmp___4~8#1 := main_#t~nondet751#1;havoc main_#t~nondet751#1;main_#t~switch752#1 := 0 == main_~tmp___4~8#1; {1691#false} is VALID [2022-02-20 22:27:52,630 INFO L290 TraceCheckUtils]: 106: Hoare triple {1691#false} assume !main_#t~switch752#1;main_#t~switch752#1 := main_#t~switch752#1 || 1 == main_~tmp___4~8#1; {1691#false} is VALID [2022-02-20 22:27:52,630 INFO L290 TraceCheckUtils]: 107: Hoare triple {1691#false} assume main_#t~switch752#1; {1691#false} is VALID [2022-02-20 22:27:52,630 INFO L290 TraceCheckUtils]: 108: Hoare triple {1691#false} assume 0 != ~ldv_state_variable_1~0;assume { :begin_inline_choose_interrupt_1 } true;havoc choose_interrupt_1_#t~nondet738#1, choose_interrupt_1_#t~switch739#1, choose_interrupt_1_#t~ret740#1, choose_interrupt_1_#t~ret741#1, choose_interrupt_1_#t~ret742#1, choose_interrupt_1_#t~ret743#1, choose_interrupt_1_~tmp~60#1;havoc choose_interrupt_1_~tmp~60#1;assume -2147483648 <= choose_interrupt_1_#t~nondet738#1 && choose_interrupt_1_#t~nondet738#1 <= 2147483647;choose_interrupt_1_~tmp~60#1 := choose_interrupt_1_#t~nondet738#1;havoc choose_interrupt_1_#t~nondet738#1;choose_interrupt_1_#t~switch739#1 := 0 == choose_interrupt_1_~tmp~60#1; {1691#false} is VALID [2022-02-20 22:27:52,630 INFO L290 TraceCheckUtils]: 109: Hoare triple {1691#false} assume choose_interrupt_1_#t~switch739#1; {1691#false} is VALID [2022-02-20 22:27:52,630 INFO L272 TraceCheckUtils]: 110: Hoare triple {1691#false} call choose_interrupt_1_#t~ret740#1 := ldv_irq_1(~ldv_irq_1_0~0, ~ldv_irq_line_1_0~0, ~ldv_irq_data_1_0~0.base, ~ldv_irq_data_1_0~0.offset); {1691#false} is VALID [2022-02-20 22:27:52,631 INFO L290 TraceCheckUtils]: 111: Hoare triple {1691#false} ~state#1 := #in~state#1;~line#1 := #in~line#1;~data#1.base, ~data#1.offset := #in~data#1.base, #in~data#1.offset;havoc ~irq_retval~0#1;havoc ~tmp~56#1;havoc ~tmp___0~30#1;assume -2147483648 <= #t~nondet731#1 && #t~nondet731#1 <= 2147483647;~tmp~56#1 := #t~nondet731#1;havoc #t~nondet731#1;~irq_retval~0#1 := ~tmp~56#1; {1691#false} is VALID [2022-02-20 22:27:52,631 INFO L290 TraceCheckUtils]: 112: Hoare triple {1691#false} assume 0 != ~state#1;assume -2147483648 <= #t~nondet732#1 && #t~nondet732#1 <= 2147483647;~tmp___0~30#1 := #t~nondet732#1;havoc #t~nondet732#1;#t~switch733#1 := 0 == ~tmp___0~30#1; {1691#false} is VALID [2022-02-20 22:27:52,631 INFO L290 TraceCheckUtils]: 113: Hoare triple {1691#false} assume #t~switch733#1; {1691#false} is VALID [2022-02-20 22:27:52,631 INFO L290 TraceCheckUtils]: 114: Hoare triple {1691#false} assume 1 == ~state#1;~LDV_IN_INTERRUPT~0 := 2;assume { :begin_inline_hp100_interrupt } true;hp100_interrupt_#in~irq#1, hp100_interrupt_#in~dev_id#1.base, hp100_interrupt_#in~dev_id#1.offset := ~line#1, ~data#1.base, ~data#1.offset;havoc hp100_interrupt_#res#1;havoc hp100_interrupt_#t~ret591#1.base, hp100_interrupt_#t~ret591#1.offset, hp100_interrupt_#t~mem592#1, hp100_interrupt_#t~ret593#1, hp100_interrupt_#t~mem594#1, hp100_interrupt_#t~nondet595#1, hp100_interrupt_#t~mem596#1, hp100_interrupt_#t~mem597#1, hp100_interrupt_#t~mem598#1, hp100_interrupt_#t~mem599#1, hp100_interrupt_#t~mem600#1, hp100_interrupt_~irq#1, hp100_interrupt_~dev_id#1.base, hp100_interrupt_~dev_id#1.offset, hp100_interrupt_~dev~0#1.base, hp100_interrupt_~dev~0#1.offset, hp100_interrupt_~lp~17#1.base, hp100_interrupt_~lp~17#1.offset, hp100_interrupt_~tmp~45#1.base, hp100_interrupt_~tmp~45#1.offset, hp100_interrupt_~ioaddr~13#1, hp100_interrupt_~val~2#1, hp100_interrupt_~tmp___0~21#1;hp100_interrupt_~irq#1 := hp100_interrupt_#in~irq#1;hp100_interrupt_~dev_id#1.base, hp100_interrupt_~dev_id#1.offset := hp100_interrupt_#in~dev_id#1.base, hp100_interrupt_#in~dev_id#1.offset;havoc hp100_interrupt_~dev~0#1.base, hp100_interrupt_~dev~0#1.offset;havoc hp100_interrupt_~lp~17#1.base, hp100_interrupt_~lp~17#1.offset;havoc hp100_interrupt_~tmp~45#1.base, hp100_interrupt_~tmp~45#1.offset;havoc hp100_interrupt_~ioaddr~13#1;havoc hp100_interrupt_~val~2#1;havoc hp100_interrupt_~tmp___0~21#1;hp100_interrupt_~dev~0#1.base, hp100_interrupt_~dev~0#1.offset := hp100_interrupt_~dev_id#1.base, hp100_interrupt_~dev_id#1.offset; {1691#false} is VALID [2022-02-20 22:27:52,631 INFO L272 TraceCheckUtils]: 115: Hoare triple {1691#false} call hp100_interrupt_#t~ret591#1.base, hp100_interrupt_#t~ret591#1.offset := netdev_priv(hp100_interrupt_~dev~0#1.base, hp100_interrupt_~dev~0#1.offset); {1690#true} is VALID [2022-02-20 22:27:52,631 INFO L290 TraceCheckUtils]: 116: Hoare triple {1690#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3008 + ~dev.offset; {1690#true} is VALID [2022-02-20 22:27:52,632 INFO L290 TraceCheckUtils]: 117: Hoare triple {1690#true} assume true; {1690#true} is VALID [2022-02-20 22:27:52,632 INFO L284 TraceCheckUtils]: 118: Hoare quadruple {1690#true} {1691#false} #3708#return; {1691#false} is VALID [2022-02-20 22:27:52,632 INFO L290 TraceCheckUtils]: 119: Hoare triple {1691#false} hp100_interrupt_~tmp~45#1.base, hp100_interrupt_~tmp~45#1.offset := hp100_interrupt_#t~ret591#1.base, hp100_interrupt_#t~ret591#1.offset;havoc hp100_interrupt_#t~ret591#1.base, hp100_interrupt_#t~ret591#1.offset;hp100_interrupt_~lp~17#1.base, hp100_interrupt_~lp~17#1.offset := hp100_interrupt_~tmp~45#1.base, hp100_interrupt_~tmp~45#1.offset; {1691#false} is VALID [2022-02-20 22:27:52,632 INFO L290 TraceCheckUtils]: 120: Hoare triple {1691#false} assume !(0 == (hp100_interrupt_~dev~0#1.base + hp100_interrupt_~dev~0#1.offset) % 18446744073709551616);call hp100_interrupt_#t~mem592#1 := read~int(hp100_interrupt_~dev~0#1.base, 56 + hp100_interrupt_~dev~0#1.offset, 8);hp100_interrupt_~ioaddr~13#1 := (if hp100_interrupt_#t~mem592#1 % 18446744073709551616 % 4294967296 <= 2147483647 then hp100_interrupt_#t~mem592#1 % 18446744073709551616 % 4294967296 else hp100_interrupt_#t~mem592#1 % 18446744073709551616 % 4294967296 - 4294967296);havoc hp100_interrupt_#t~mem592#1;assume { :begin_inline_spin_lock } true;spin_lock_#in~lock#1.base, spin_lock_#in~lock#1.offset := hp100_interrupt_~lp~17#1.base, hp100_interrupt_~lp~17#1.offset;havoc spin_lock_~lock#1.base, spin_lock_~lock#1.offset;spin_lock_~lock#1.base, spin_lock_~lock#1.offset := spin_lock_#in~lock#1.base, spin_lock_#in~lock#1.offset; {1691#false} is VALID [2022-02-20 22:27:52,632 INFO L272 TraceCheckUtils]: 121: Hoare triple {1691#false} call ldv_spin_lock(); {1844#(= ~ldv_spin~0 |old(~ldv_spin~0)|)} is VALID [2022-02-20 22:27:52,632 INFO L290 TraceCheckUtils]: 122: Hoare triple {1844#(= ~ldv_spin~0 |old(~ldv_spin~0)|)} ~ldv_spin~0 := 1; {1690#true} is VALID [2022-02-20 22:27:52,633 INFO L290 TraceCheckUtils]: 123: Hoare triple {1690#true} assume true; {1690#true} is VALID [2022-02-20 22:27:52,633 INFO L284 TraceCheckUtils]: 124: Hoare quadruple {1690#true} {1691#false} #3710#return; {1691#false} is VALID [2022-02-20 22:27:52,633 INFO L290 TraceCheckUtils]: 125: Hoare triple {1691#false} assume { :begin_inline_ldv_spin_lock_5 } true;ldv_spin_lock_5_#in~lock#1.base, ldv_spin_lock_5_#in~lock#1.offset := spin_lock_~lock#1.base, spin_lock_~lock#1.offset;havoc ldv_spin_lock_5_~lock#1.base, ldv_spin_lock_5_~lock#1.offset;ldv_spin_lock_5_~lock#1.base, ldv_spin_lock_5_~lock#1.offset := ldv_spin_lock_5_#in~lock#1.base, ldv_spin_lock_5_#in~lock#1.offset;assume { :begin_inline__raw_spin_lock } true;_raw_spin_lock_#in~arg0#1.base, _raw_spin_lock_#in~arg0#1.offset := ldv_spin_lock_5_~lock#1.base, ldv_spin_lock_5_~lock#1.offset;havoc _raw_spin_lock_~arg0#1.base, _raw_spin_lock_~arg0#1.offset;_raw_spin_lock_~arg0#1.base, _raw_spin_lock_~arg0#1.offset := _raw_spin_lock_#in~arg0#1.base, _raw_spin_lock_#in~arg0#1.offset; {1691#false} is VALID [2022-02-20 22:27:52,633 INFO L290 TraceCheckUtils]: 126: Hoare triple {1691#false} assume { :end_inline__raw_spin_lock } true; {1691#false} is VALID [2022-02-20 22:27:52,633 INFO L290 TraceCheckUtils]: 127: Hoare triple {1691#false} assume { :end_inline_ldv_spin_lock_5 } true; {1691#false} is VALID [2022-02-20 22:27:52,633 INFO L290 TraceCheckUtils]: 128: Hoare triple {1691#false} assume { :end_inline_spin_lock } true; {1691#false} is VALID [2022-02-20 22:27:52,633 INFO L272 TraceCheckUtils]: 129: Hoare triple {1691#false} call outw(4, 4 + hp100_interrupt_~ioaddr~13#1); {1690#true} is VALID [2022-02-20 22:27:52,634 INFO L290 TraceCheckUtils]: 130: Hoare triple {1690#true} ~value := #in~value;~port := #in~port; {1690#true} is VALID [2022-02-20 22:27:52,634 INFO L290 TraceCheckUtils]: 131: Hoare triple {1690#true} assume true; {1690#true} is VALID [2022-02-20 22:27:52,634 INFO L284 TraceCheckUtils]: 132: Hoare quadruple {1690#true} {1691#false} #3712#return; {1691#false} is VALID [2022-02-20 22:27:52,634 INFO L272 TraceCheckUtils]: 133: Hoare triple {1691#false} call hp100_interrupt_#t~ret593#1 := inw(8 + hp100_interrupt_~ioaddr~13#1); {1690#true} is VALID [2022-02-20 22:27:52,634 INFO L290 TraceCheckUtils]: 134: Hoare triple {1690#true} ~port := #in~port;havoc ~value~1;#res := ~value~1; {1690#true} is VALID [2022-02-20 22:27:52,634 INFO L290 TraceCheckUtils]: 135: Hoare triple {1690#true} assume true; {1690#true} is VALID [2022-02-20 22:27:52,635 INFO L284 TraceCheckUtils]: 136: Hoare quadruple {1690#true} {1691#false} #3714#return; {1691#false} is VALID [2022-02-20 22:27:52,635 INFO L290 TraceCheckUtils]: 137: Hoare triple {1691#false} hp100_interrupt_~tmp___0~21#1 := hp100_interrupt_#t~ret593#1;havoc hp100_interrupt_#t~ret593#1;hp100_interrupt_~val~2#1 := hp100_interrupt_~tmp___0~21#1 % 65536; {1691#false} is VALID [2022-02-20 22:27:52,635 INFO L290 TraceCheckUtils]: 138: Hoare triple {1691#false} assume !(0 == hp100_interrupt_~val~2#1 % 4294967296); {1691#false} is VALID [2022-02-20 22:27:52,635 INFO L290 TraceCheckUtils]: 139: Hoare triple {1691#false} assume !(0 != (if 0 == hp100_interrupt_~val~2#1 then 0 else (if 1 == hp100_interrupt_~val~2#1 then 0 else ~bitwiseAnd(hp100_interrupt_~val~2#1, 2048))) % 4294967296); {1691#false} is VALID [2022-02-20 22:27:52,635 INFO L290 TraceCheckUtils]: 140: Hoare triple {1691#false} assume 0 != (if 0 == hp100_interrupt_~val~2#1 then 0 else (if 1 == hp100_interrupt_~val~2#1 then 0 else ~bitwiseAnd(hp100_interrupt_~val~2#1, 1024))) % 4294967296;call hp100_interrupt_#t~mem596#1 := read~int(hp100_interrupt_~lp~17#1.base, 92 + hp100_interrupt_~lp~17#1.offset, 2); {1691#false} is VALID [2022-02-20 22:27:52,635 INFO L290 TraceCheckUtils]: 141: Hoare triple {1691#false} assume 1 != hp100_interrupt_#t~mem596#1 % 65536 % 4294967296;havoc hp100_interrupt_#t~mem596#1;assume { :begin_inline_hp100_rx } true;hp100_rx_#in~dev#1.base, hp100_rx_#in~dev#1.offset := hp100_interrupt_~dev~0#1.base, hp100_interrupt_~dev~0#1.offset;havoc hp100_rx_#t~mem490#1, hp100_rx_#t~ret491#1.base, hp100_rx_#t~ret491#1.offset, hp100_rx_#t~ret492#1, hp100_rx_#t~ret493#1, hp100_rx_#t~mem494#1, hp100_rx_#t~mem495#1.base, hp100_rx_#t~mem495#1.offset, hp100_rx_#t~ret496#1, hp100_rx_#t~ret497#1, hp100_rx_#t~ret499#1.base, hp100_rx_#t~ret499#1.offset, hp100_rx_#t~mem500#1, hp100_rx_#t~ret501#1.base, hp100_rx_#t~ret501#1.offset, hp100_rx_#t~mem502#1.base, hp100_rx_#t~mem502#1.offset, hp100_rx_#t~mem503#1, hp100_rx_#t~mem504#1.base, hp100_rx_#t~mem504#1.offset, hp100_rx_#t~ret505#1, hp100_rx_#t~ret506#1, hp100_rx_#t~mem507#1, hp100_rx_#t~mem508#1, hp100_rx_#t~switch509#1, hp100_rx_#t~mem510#1, hp100_rx_#t~nondet498#1, hp100_rx_~dev#1.base, hp100_rx_~dev#1.offset, hp100_rx_~packets~0#1, hp100_rx_~pkt_len~0#1, hp100_rx_~ioaddr~8#1, hp100_rx_~lp~13#1.base, hp100_rx_~lp~13#1.offset, hp100_rx_~tmp~40#1.base, hp100_rx_~tmp~40#1.offset, hp100_rx_~header~0#1, hp100_rx_~skb~0#1.base, hp100_rx_~skb~0#1.offset, hp100_rx_~tmp___0~17#1, hp100_rx_~tmp___1~10#1, hp100_rx_~ptr~0#1.base, hp100_rx_~ptr~0#1.offset, hp100_rx_~tmp___2~7#1;hp100_rx_~dev#1.base, hp100_rx_~dev#1.offset := hp100_rx_#in~dev#1.base, hp100_rx_#in~dev#1.offset;havoc hp100_rx_~packets~0#1;havoc hp100_rx_~pkt_len~0#1;havoc hp100_rx_~ioaddr~8#1;havoc hp100_rx_~lp~13#1.base, hp100_rx_~lp~13#1.offset;havoc hp100_rx_~tmp~40#1.base, hp100_rx_~tmp~40#1.offset;havoc hp100_rx_~header~0#1;havoc hp100_rx_~skb~0#1.base, hp100_rx_~skb~0#1.offset;havoc hp100_rx_~tmp___0~17#1;havoc hp100_rx_~tmp___1~10#1;havoc hp100_rx_~ptr~0#1.base, hp100_rx_~ptr~0#1.offset;havoc hp100_rx_~tmp___2~7#1;call hp100_rx_#t~mem490#1 := read~int(hp100_rx_~dev#1.base, 56 + hp100_rx_~dev#1.offset, 8);hp100_rx_~ioaddr~8#1 := (if hp100_rx_#t~mem490#1 % 18446744073709551616 % 4294967296 <= 2147483647 then hp100_rx_#t~mem490#1 % 18446744073709551616 % 4294967296 else hp100_rx_#t~mem490#1 % 18446744073709551616 % 4294967296 - 4294967296);havoc hp100_rx_#t~mem490#1; {1691#false} is VALID [2022-02-20 22:27:52,636 INFO L272 TraceCheckUtils]: 142: Hoare triple {1691#false} call hp100_rx_#t~ret491#1.base, hp100_rx_#t~ret491#1.offset := netdev_priv(hp100_rx_~dev#1.base, hp100_rx_~dev#1.offset); {1690#true} is VALID [2022-02-20 22:27:52,636 INFO L290 TraceCheckUtils]: 143: Hoare triple {1690#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3008 + ~dev.offset; {1690#true} is VALID [2022-02-20 22:27:52,636 INFO L290 TraceCheckUtils]: 144: Hoare triple {1690#true} assume true; {1690#true} is VALID [2022-02-20 22:27:52,636 INFO L284 TraceCheckUtils]: 145: Hoare quadruple {1690#true} {1691#false} #3722#return; {1691#false} is VALID [2022-02-20 22:27:52,636 INFO L290 TraceCheckUtils]: 146: Hoare triple {1691#false} hp100_rx_~tmp~40#1.base, hp100_rx_~tmp~40#1.offset := hp100_rx_#t~ret491#1.base, hp100_rx_#t~ret491#1.offset;havoc hp100_rx_#t~ret491#1.base, hp100_rx_#t~ret491#1.offset;hp100_rx_~lp~13#1.base, hp100_rx_~lp~13#1.offset := hp100_rx_~tmp~40#1.base, hp100_rx_~tmp~40#1.offset; {1691#false} is VALID [2022-02-20 22:27:52,636 INFO L272 TraceCheckUtils]: 147: Hoare triple {1691#false} call hp100_rx_#t~ret492#1 := inb(24 + hp100_rx_~ioaddr~8#1); {1690#true} is VALID [2022-02-20 22:27:52,636 INFO L290 TraceCheckUtils]: 148: Hoare triple {1690#true} ~port := #in~port;havoc ~value~0;#res := ~value~0; {1690#true} is VALID [2022-02-20 22:27:52,637 INFO L290 TraceCheckUtils]: 149: Hoare triple {1690#true} assume true; {1690#true} is VALID [2022-02-20 22:27:52,637 INFO L284 TraceCheckUtils]: 150: Hoare quadruple {1690#true} {1691#false} #3724#return; {1691#false} is VALID [2022-02-20 22:27:52,637 INFO L290 TraceCheckUtils]: 151: Hoare triple {1691#false} hp100_rx_~tmp___0~17#1 := hp100_rx_#t~ret492#1;havoc hp100_rx_#t~ret492#1;hp100_rx_~packets~0#1 := hp100_rx_~tmp___0~17#1 % 256; {1691#false} is VALID [2022-02-20 22:27:52,637 INFO L290 TraceCheckUtils]: 152: Hoare triple {1691#false} hp100_rx_~tmp___2~7#1 := hp100_rx_~packets~0#1;hp100_rx_~packets~0#1 := hp100_rx_~packets~0#1 - 1; {1691#false} is VALID [2022-02-20 22:27:52,637 INFO L290 TraceCheckUtils]: 153: Hoare triple {1691#false} assume hp100_rx_~tmp___2~7#1 > 0; {1691#false} is VALID [2022-02-20 22:27:52,637 INFO L290 TraceCheckUtils]: 154: Hoare triple {1691#false} hp100_rx_~pkt_len~0#1 := 0; {1691#false} is VALID [2022-02-20 22:27:52,637 INFO L290 TraceCheckUtils]: 155: Hoare triple {1691#false} assume !(hp100_rx_~pkt_len~0#1 <= 5999); {1691#false} is VALID [2022-02-20 22:27:52,638 INFO L290 TraceCheckUtils]: 156: Hoare triple {1691#false} call hp100_rx_#t~mem494#1 := read~int(hp100_rx_~lp~13#1.base, 92 + hp100_rx_~lp~13#1.offset, 2); {1691#false} is VALID [2022-02-20 22:27:52,638 INFO L290 TraceCheckUtils]: 157: Hoare triple {1691#false} assume 2 == hp100_rx_#t~mem494#1 % 65536 % 4294967296;havoc hp100_rx_#t~mem494#1;call hp100_rx_#t~mem495#1.base, hp100_rx_#t~mem495#1.offset := read~$Pointer$(hp100_rx_~lp~13#1.base, 105 + hp100_rx_~lp~13#1.offset, 8);assume { :begin_inline_readl } true;readl_#in~addr#1.base, readl_#in~addr#1.offset := hp100_rx_#t~mem495#1.base, hp100_rx_#t~mem495#1.offset;havoc readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;readl_~addr#1.base, readl_~addr#1.offset := readl_#in~addr#1.base, readl_#in~addr#1.offset;havoc readl_~ret~0#1;readl_#res#1 := readl_~ret~0#1; {1691#false} is VALID [2022-02-20 22:27:52,638 INFO L290 TraceCheckUtils]: 158: Hoare triple {1691#false} hp100_rx_#t~ret496#1 := readl_#res#1;assume { :end_inline_readl } true;hp100_rx_~header~0#1 := hp100_rx_#t~ret496#1;havoc hp100_rx_#t~mem495#1.base, hp100_rx_#t~mem495#1.offset;havoc hp100_rx_#t~ret496#1; {1691#false} is VALID [2022-02-20 22:27:52,638 INFO L290 TraceCheckUtils]: 159: Hoare triple {1691#false} assume 0 == (if (3 + (if 0 == hp100_rx_~header~0#1 then 0 else (if 1 == hp100_rx_~header~0#1 then 1 else ~bitwiseAnd(hp100_rx_~header~0#1, 8191)))) % 4294967296 % 4294967296 <= 2147483647 then (3 + (if 0 == hp100_rx_~header~0#1 then 0 else (if 1 == hp100_rx_~header~0#1 then 1 else ~bitwiseAnd(hp100_rx_~header~0#1, 8191)))) % 4294967296 % 4294967296 else (3 + (if 0 == hp100_rx_~header~0#1 then 0 else (if 1 == hp100_rx_~header~0#1 then 1 else ~bitwiseAnd(hp100_rx_~header~0#1, 8191)))) % 4294967296 % 4294967296 - 4294967296);hp100_rx_~pkt_len~0#1 := 0; {1691#false} is VALID [2022-02-20 22:27:52,638 INFO L272 TraceCheckUtils]: 160: Hoare triple {1691#false} call hp100_rx_#t~ret499#1.base, hp100_rx_#t~ret499#1.offset := netdev_alloc_skb(hp100_rx_~dev#1.base, hp100_rx_~dev#1.offset, 2 + hp100_rx_~pkt_len~0#1); {1691#false} is VALID [2022-02-20 22:27:52,638 INFO L290 TraceCheckUtils]: 161: Hoare triple {1691#false} ~dev#1.base, ~dev#1.offset := #in~dev#1.base, #in~dev#1.offset;~length#1 := #in~length#1;havoc ~tmp~17#1.base, ~tmp~17#1.offset;assume { :begin_inline_ldv___netdev_alloc_skb_31 } true;ldv___netdev_alloc_skb_31_#in~ldv_func_arg1#1.base, ldv___netdev_alloc_skb_31_#in~ldv_func_arg1#1.offset, ldv___netdev_alloc_skb_31_#in~ldv_func_arg2#1, ldv___netdev_alloc_skb_31_#in~flags#1 := ~dev#1.base, ~dev#1.offset, ~length#1, 32;havoc ldv___netdev_alloc_skb_31_#res#1.base, ldv___netdev_alloc_skb_31_#res#1.offset;havoc ldv___netdev_alloc_skb_31_#t~ret803#1.base, ldv___netdev_alloc_skb_31_#t~ret803#1.offset, ldv___netdev_alloc_skb_31_~ldv_func_arg1#1.base, ldv___netdev_alloc_skb_31_~ldv_func_arg1#1.offset, ldv___netdev_alloc_skb_31_~ldv_func_arg2#1, ldv___netdev_alloc_skb_31_~flags#1, ldv___netdev_alloc_skb_31_~tmp~64#1.base, ldv___netdev_alloc_skb_31_~tmp~64#1.offset;ldv___netdev_alloc_skb_31_~ldv_func_arg1#1.base, ldv___netdev_alloc_skb_31_~ldv_func_arg1#1.offset := ldv___netdev_alloc_skb_31_#in~ldv_func_arg1#1.base, ldv___netdev_alloc_skb_31_#in~ldv_func_arg1#1.offset;ldv___netdev_alloc_skb_31_~ldv_func_arg2#1 := ldv___netdev_alloc_skb_31_#in~ldv_func_arg2#1;ldv___netdev_alloc_skb_31_~flags#1 := ldv___netdev_alloc_skb_31_#in~flags#1;havoc ldv___netdev_alloc_skb_31_~tmp~64#1.base, ldv___netdev_alloc_skb_31_~tmp~64#1.offset; {1691#false} is VALID [2022-02-20 22:27:52,639 INFO L272 TraceCheckUtils]: 162: Hoare triple {1691#false} call ldv_check_alloc_flags(ldv___netdev_alloc_skb_31_~flags#1); {1691#false} is VALID [2022-02-20 22:27:52,639 INFO L290 TraceCheckUtils]: 163: Hoare triple {1691#false} ~flags := #in~flags; {1691#false} is VALID [2022-02-20 22:27:52,639 INFO L290 TraceCheckUtils]: 164: Hoare triple {1691#false} assume 0 != ~ldv_spin~0 && 0 != (if 0 == ~flags then 0 else (if 1 == ~flags then 0 else ~bitwiseAnd(~flags, 16))) % 4294967296; {1691#false} is VALID [2022-02-20 22:27:52,639 INFO L272 TraceCheckUtils]: 165: Hoare triple {1691#false} call ldv_error(); {1691#false} is VALID [2022-02-20 22:27:52,639 INFO L290 TraceCheckUtils]: 166: Hoare triple {1691#false} assume !false; {1691#false} is VALID [2022-02-20 22:27:52,640 INFO L134 CoverageAnalysis]: Checked inductivity of 152 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 152 trivial. 0 not checked. [2022-02-20 22:27:52,640 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:27:52,640 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1882967699] [2022-02-20 22:27:52,641 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1882967699] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:27:52,641 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 22:27:52,641 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-02-20 22:27:52,642 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [669044507] [2022-02-20 22:27:52,643 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:27:52,646 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 11.5) internal successors, (69), 2 states have internal predecessors, (69), 2 states have call successors, (20), 6 states have call predecessors, (20), 2 states have return successors, (16), 2 states have call predecessors, (16), 2 states have call successors, (16) Word has length 167 [2022-02-20 22:27:52,648 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:27:52,651 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 11.5) internal successors, (69), 2 states have internal predecessors, (69), 2 states have call successors, (20), 6 states have call predecessors, (20), 2 states have return successors, (16), 2 states have call predecessors, (16), 2 states have call successors, (16) [2022-02-20 22:27:52,750 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 105 edges. 105 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:27:52,750 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-02-20 22:27:52,751 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:27:52,766 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-02-20 22:27:52,769 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2022-02-20 22:27:52,776 INFO L87 Difference]: Start difference. First operand has 1687 states, 1083 states have (on average 1.3776546629732225) internal successors, (1492), 1137 states have internal predecessors, (1492), 535 states have call successors, (535), 70 states have call predecessors, (535), 69 states have return successors, (528), 512 states have call predecessors, (528), 528 states have call successors, (528) Second operand has 6 states, 6 states have (on average 11.5) internal successors, (69), 2 states have internal predecessors, (69), 2 states have call successors, (20), 6 states have call predecessors, (20), 2 states have return successors, (16), 2 states have call predecessors, (16), 2 states have call successors, (16) [2022-02-20 22:28:10,577 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:28:10,577 INFO L93 Difference]: Finished difference Result 3516 states and 5444 transitions. [2022-02-20 22:28:10,577 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-02-20 22:28:10,578 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 11.5) internal successors, (69), 2 states have internal predecessors, (69), 2 states have call successors, (20), 6 states have call predecessors, (20), 2 states have return successors, (16), 2 states have call predecessors, (16), 2 states have call successors, (16) Word has length 167 [2022-02-20 22:28:10,578 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 22:28:10,579 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 11.5) internal successors, (69), 2 states have internal predecessors, (69), 2 states have call successors, (20), 6 states have call predecessors, (20), 2 states have return successors, (16), 2 states have call predecessors, (16), 2 states have call successors, (16) [2022-02-20 22:28:10,857 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 5444 transitions. [2022-02-20 22:28:10,858 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 11.5) internal successors, (69), 2 states have internal predecessors, (69), 2 states have call successors, (20), 6 states have call predecessors, (20), 2 states have return successors, (16), 2 states have call predecessors, (16), 2 states have call successors, (16) [2022-02-20 22:28:11,123 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 5444 transitions. [2022-02-20 22:28:11,123 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 7 states and 5444 transitions. [2022-02-20 22:28:15,030 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 5444 edges. 5444 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:28:15,457 INFO L225 Difference]: With dead ends: 3516 [2022-02-20 22:28:15,458 INFO L226 Difference]: Without dead ends: 1814 [2022-02-20 22:28:15,472 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 68 GetRequests, 61 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=43, Unknown=0, NotChecked=0, Total=72 [2022-02-20 22:28:15,476 INFO L933 BasicCegarLoop]: 2088 mSDtfsCounter, 2137 mSDsluCounter, 2039 mSDsCounter, 0 mSdLazyCounter, 1757 mSolverCounterSat, 2576 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 5.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2178 SdHoareTripleChecker+Valid, 4127 SdHoareTripleChecker+Invalid, 4333 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 2576 IncrementalHoareTripleChecker+Valid, 1757 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 5.6s IncrementalHoareTripleChecker+Time [2022-02-20 22:28:15,476 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [2178 Valid, 4127 Invalid, 4333 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [2576 Valid, 1757 Invalid, 0 Unknown, 0 Unchecked, 5.6s Time] [2022-02-20 22:28:15,491 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1814 states. [2022-02-20 22:28:15,634 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1814 to 1661. [2022-02-20 22:28:15,635 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 22:28:15,646 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1814 states. Second operand has 1661 states, 1066 states have (on average 1.3377110694183865) internal successors, (1426), 1110 states have internal predecessors, (1426), 526 states have call successors, (526), 69 states have call predecessors, (526), 68 states have return successors, (525), 509 states have call predecessors, (525), 525 states have call successors, (525) [2022-02-20 22:28:15,653 INFO L74 IsIncluded]: Start isIncluded. First operand 1814 states. Second operand has 1661 states, 1066 states have (on average 1.3377110694183865) internal successors, (1426), 1110 states have internal predecessors, (1426), 526 states have call successors, (526), 69 states have call predecessors, (526), 68 states have return successors, (525), 509 states have call predecessors, (525), 525 states have call successors, (525) [2022-02-20 22:28:15,658 INFO L87 Difference]: Start difference. First operand 1814 states. Second operand has 1661 states, 1066 states have (on average 1.3377110694183865) internal successors, (1426), 1110 states have internal predecessors, (1426), 526 states have call successors, (526), 69 states have call predecessors, (526), 68 states have return successors, (525), 509 states have call predecessors, (525), 525 states have call successors, (525) [2022-02-20 22:28:15,826 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:28:15,826 INFO L93 Difference]: Finished difference Result 1814 states and 2736 transitions. [2022-02-20 22:28:15,826 INFO L276 IsEmpty]: Start isEmpty. Operand 1814 states and 2736 transitions. [2022-02-20 22:28:15,840 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:28:15,841 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:28:15,845 INFO L74 IsIncluded]: Start isIncluded. First operand has 1661 states, 1066 states have (on average 1.3377110694183865) internal successors, (1426), 1110 states have internal predecessors, (1426), 526 states have call successors, (526), 69 states have call predecessors, (526), 68 states have return successors, (525), 509 states have call predecessors, (525), 525 states have call successors, (525) Second operand 1814 states. [2022-02-20 22:28:15,850 INFO L87 Difference]: Start difference. First operand has 1661 states, 1066 states have (on average 1.3377110694183865) internal successors, (1426), 1110 states have internal predecessors, (1426), 526 states have call successors, (526), 69 states have call predecessors, (526), 68 states have return successors, (525), 509 states have call predecessors, (525), 525 states have call successors, (525) Second operand 1814 states. [2022-02-20 22:28:15,998 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:28:15,999 INFO L93 Difference]: Finished difference Result 1814 states and 2736 transitions. [2022-02-20 22:28:15,999 INFO L276 IsEmpty]: Start isEmpty. Operand 1814 states and 2736 transitions. [2022-02-20 22:28:16,010 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:28:16,011 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:28:16,011 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 22:28:16,011 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 22:28:16,016 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1661 states, 1066 states have (on average 1.3377110694183865) internal successors, (1426), 1110 states have internal predecessors, (1426), 526 states have call successors, (526), 69 states have call predecessors, (526), 68 states have return successors, (525), 509 states have call predecessors, (525), 525 states have call successors, (525) [2022-02-20 22:28:16,181 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1661 states to 1661 states and 2477 transitions. [2022-02-20 22:28:16,183 INFO L78 Accepts]: Start accepts. Automaton has 1661 states and 2477 transitions. Word has length 167 [2022-02-20 22:28:16,185 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 22:28:16,185 INFO L470 AbstractCegarLoop]: Abstraction has 1661 states and 2477 transitions. [2022-02-20 22:28:16,185 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 11.5) internal successors, (69), 2 states have internal predecessors, (69), 2 states have call successors, (20), 6 states have call predecessors, (20), 2 states have return successors, (16), 2 states have call predecessors, (16), 2 states have call successors, (16) [2022-02-20 22:28:16,185 INFO L276 IsEmpty]: Start isEmpty. Operand 1661 states and 2477 transitions. [2022-02-20 22:28:16,196 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 169 [2022-02-20 22:28:16,196 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:28:16,196 INFO L514 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:28:16,196 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-02-20 22:28:16,196 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:28:16,207 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:28:16,207 INFO L85 PathProgramCache]: Analyzing trace with hash -202498239, now seen corresponding path program 1 times [2022-02-20 22:28:16,207 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:28:16,208 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1106233442] [2022-02-20 22:28:16,208 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:28:16,208 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:28:16,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:16,467 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 22:28:16,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:16,486 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:28:16,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:16,494 INFO L290 TraceCheckUtils]: 0: Hoare triple {13127#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {13008#true} is VALID [2022-02-20 22:28:16,494 INFO L290 TraceCheckUtils]: 1: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,494 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {13008#true} {13008#true} #4170#return; {13008#true} is VALID [2022-02-20 22:28:16,495 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:28:16,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:16,501 INFO L290 TraceCheckUtils]: 0: Hoare triple {13008#true} ~cond := #in~cond; {13008#true} is VALID [2022-02-20 22:28:16,502 INFO L290 TraceCheckUtils]: 1: Hoare triple {13008#true} assume !(0 == ~cond); {13008#true} is VALID [2022-02-20 22:28:16,502 INFO L290 TraceCheckUtils]: 2: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,502 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13008#true} {13008#true} #4172#return; {13008#true} is VALID [2022-02-20 22:28:16,502 INFO L290 TraceCheckUtils]: 0: Hoare triple {13119#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {13008#true} is VALID [2022-02-20 22:28:16,503 INFO L272 TraceCheckUtils]: 1: Hoare triple {13008#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {13127#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:28:16,503 INFO L290 TraceCheckUtils]: 2: Hoare triple {13127#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {13008#true} is VALID [2022-02-20 22:28:16,503 INFO L290 TraceCheckUtils]: 3: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,503 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {13008#true} {13008#true} #4170#return; {13008#true} is VALID [2022-02-20 22:28:16,507 INFO L290 TraceCheckUtils]: 5: Hoare triple {13008#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {13008#true} is VALID [2022-02-20 22:28:16,508 INFO L272 TraceCheckUtils]: 6: Hoare triple {13008#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {13008#true} is VALID [2022-02-20 22:28:16,508 INFO L290 TraceCheckUtils]: 7: Hoare triple {13008#true} ~cond := #in~cond; {13008#true} is VALID [2022-02-20 22:28:16,508 INFO L290 TraceCheckUtils]: 8: Hoare triple {13008#true} assume !(0 == ~cond); {13008#true} is VALID [2022-02-20 22:28:16,508 INFO L290 TraceCheckUtils]: 9: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,508 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {13008#true} {13008#true} #4172#return; {13008#true} is VALID [2022-02-20 22:28:16,509 INFO L290 TraceCheckUtils]: 11: Hoare triple {13008#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {13008#true} is VALID [2022-02-20 22:28:16,509 INFO L290 TraceCheckUtils]: 12: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,509 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {13008#true} {13010#(= ~ldv_irq_1_1~0 0)} #4246#return; {13010#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:28:16,510 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 18 [2022-02-20 22:28:16,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:16,521 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:28:16,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:16,527 INFO L290 TraceCheckUtils]: 0: Hoare triple {13127#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {13008#true} is VALID [2022-02-20 22:28:16,528 INFO L290 TraceCheckUtils]: 1: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,528 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {13008#true} {13008#true} #4170#return; {13008#true} is VALID [2022-02-20 22:28:16,528 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:28:16,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:16,535 INFO L290 TraceCheckUtils]: 0: Hoare triple {13008#true} ~cond := #in~cond; {13008#true} is VALID [2022-02-20 22:28:16,536 INFO L290 TraceCheckUtils]: 1: Hoare triple {13008#true} assume !(0 == ~cond); {13008#true} is VALID [2022-02-20 22:28:16,536 INFO L290 TraceCheckUtils]: 2: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,536 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13008#true} {13008#true} #4172#return; {13008#true} is VALID [2022-02-20 22:28:16,536 INFO L290 TraceCheckUtils]: 0: Hoare triple {13119#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {13008#true} is VALID [2022-02-20 22:28:16,537 INFO L272 TraceCheckUtils]: 1: Hoare triple {13008#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {13127#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:28:16,537 INFO L290 TraceCheckUtils]: 2: Hoare triple {13127#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {13008#true} is VALID [2022-02-20 22:28:16,537 INFO L290 TraceCheckUtils]: 3: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,537 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {13008#true} {13008#true} #4170#return; {13008#true} is VALID [2022-02-20 22:28:16,538 INFO L290 TraceCheckUtils]: 5: Hoare triple {13008#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {13008#true} is VALID [2022-02-20 22:28:16,538 INFO L272 TraceCheckUtils]: 6: Hoare triple {13008#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {13008#true} is VALID [2022-02-20 22:28:16,538 INFO L290 TraceCheckUtils]: 7: Hoare triple {13008#true} ~cond := #in~cond; {13008#true} is VALID [2022-02-20 22:28:16,538 INFO L290 TraceCheckUtils]: 8: Hoare triple {13008#true} assume !(0 == ~cond); {13008#true} is VALID [2022-02-20 22:28:16,538 INFO L290 TraceCheckUtils]: 9: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,539 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {13008#true} {13008#true} #4172#return; {13008#true} is VALID [2022-02-20 22:28:16,539 INFO L290 TraceCheckUtils]: 11: Hoare triple {13008#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {13008#true} is VALID [2022-02-20 22:28:16,539 INFO L290 TraceCheckUtils]: 12: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,539 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {13008#true} {13010#(= ~ldv_irq_1_1~0 0)} #4248#return; {13010#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:28:16,540 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 34 [2022-02-20 22:28:16,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:16,555 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:28:16,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:16,567 INFO L290 TraceCheckUtils]: 0: Hoare triple {13127#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {13008#true} is VALID [2022-02-20 22:28:16,568 INFO L290 TraceCheckUtils]: 1: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,568 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {13008#true} {13008#true} #4170#return; {13008#true} is VALID [2022-02-20 22:28:16,568 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:28:16,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:16,573 INFO L290 TraceCheckUtils]: 0: Hoare triple {13008#true} ~cond := #in~cond; {13008#true} is VALID [2022-02-20 22:28:16,574 INFO L290 TraceCheckUtils]: 1: Hoare triple {13008#true} assume !(0 == ~cond); {13008#true} is VALID [2022-02-20 22:28:16,574 INFO L290 TraceCheckUtils]: 2: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,574 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13008#true} {13008#true} #4172#return; {13008#true} is VALID [2022-02-20 22:28:16,574 INFO L290 TraceCheckUtils]: 0: Hoare triple {13119#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {13008#true} is VALID [2022-02-20 22:28:16,575 INFO L272 TraceCheckUtils]: 1: Hoare triple {13008#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {13127#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:28:16,575 INFO L290 TraceCheckUtils]: 2: Hoare triple {13127#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {13008#true} is VALID [2022-02-20 22:28:16,575 INFO L290 TraceCheckUtils]: 3: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,575 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {13008#true} {13008#true} #4170#return; {13008#true} is VALID [2022-02-20 22:28:16,576 INFO L290 TraceCheckUtils]: 5: Hoare triple {13008#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {13008#true} is VALID [2022-02-20 22:28:16,576 INFO L272 TraceCheckUtils]: 6: Hoare triple {13008#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {13008#true} is VALID [2022-02-20 22:28:16,576 INFO L290 TraceCheckUtils]: 7: Hoare triple {13008#true} ~cond := #in~cond; {13008#true} is VALID [2022-02-20 22:28:16,576 INFO L290 TraceCheckUtils]: 8: Hoare triple {13008#true} assume !(0 == ~cond); {13008#true} is VALID [2022-02-20 22:28:16,578 INFO L290 TraceCheckUtils]: 9: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,578 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {13008#true} {13008#true} #4172#return; {13008#true} is VALID [2022-02-20 22:28:16,579 INFO L290 TraceCheckUtils]: 11: Hoare triple {13008#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {13008#true} is VALID [2022-02-20 22:28:16,584 INFO L290 TraceCheckUtils]: 12: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,586 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {13008#true} {13010#(= ~ldv_irq_1_1~0 0)} #4250#return; {13010#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:28:16,586 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 50 [2022-02-20 22:28:16,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:16,612 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:28:16,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:16,619 INFO L290 TraceCheckUtils]: 0: Hoare triple {13127#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {13008#true} is VALID [2022-02-20 22:28:16,620 INFO L290 TraceCheckUtils]: 1: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,620 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {13008#true} {13008#true} #4170#return; {13008#true} is VALID [2022-02-20 22:28:16,620 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:28:16,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:16,626 INFO L290 TraceCheckUtils]: 0: Hoare triple {13008#true} ~cond := #in~cond; {13008#true} is VALID [2022-02-20 22:28:16,627 INFO L290 TraceCheckUtils]: 1: Hoare triple {13008#true} assume !(0 == ~cond); {13008#true} is VALID [2022-02-20 22:28:16,627 INFO L290 TraceCheckUtils]: 2: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,627 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13008#true} {13008#true} #4172#return; {13008#true} is VALID [2022-02-20 22:28:16,627 INFO L290 TraceCheckUtils]: 0: Hoare triple {13119#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {13008#true} is VALID [2022-02-20 22:28:16,628 INFO L272 TraceCheckUtils]: 1: Hoare triple {13008#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {13127#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:28:16,629 INFO L290 TraceCheckUtils]: 2: Hoare triple {13127#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {13008#true} is VALID [2022-02-20 22:28:16,629 INFO L290 TraceCheckUtils]: 3: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,630 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {13008#true} {13008#true} #4170#return; {13008#true} is VALID [2022-02-20 22:28:16,630 INFO L290 TraceCheckUtils]: 5: Hoare triple {13008#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {13008#true} is VALID [2022-02-20 22:28:16,630 INFO L272 TraceCheckUtils]: 6: Hoare triple {13008#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {13008#true} is VALID [2022-02-20 22:28:16,630 INFO L290 TraceCheckUtils]: 7: Hoare triple {13008#true} ~cond := #in~cond; {13008#true} is VALID [2022-02-20 22:28:16,630 INFO L290 TraceCheckUtils]: 8: Hoare triple {13008#true} assume !(0 == ~cond); {13008#true} is VALID [2022-02-20 22:28:16,630 INFO L290 TraceCheckUtils]: 9: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,630 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {13008#true} {13008#true} #4172#return; {13008#true} is VALID [2022-02-20 22:28:16,631 INFO L290 TraceCheckUtils]: 11: Hoare triple {13008#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {13008#true} is VALID [2022-02-20 22:28:16,631 INFO L290 TraceCheckUtils]: 12: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,631 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {13008#true} {13010#(= ~ldv_irq_1_1~0 0)} #4252#return; {13010#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:28:16,632 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 66 [2022-02-20 22:28:16,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:16,644 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:28:16,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:16,650 INFO L290 TraceCheckUtils]: 0: Hoare triple {13127#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {13008#true} is VALID [2022-02-20 22:28:16,650 INFO L290 TraceCheckUtils]: 1: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,650 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {13008#true} {13008#true} #4170#return; {13008#true} is VALID [2022-02-20 22:28:16,650 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:28:16,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:16,657 INFO L290 TraceCheckUtils]: 0: Hoare triple {13008#true} ~cond := #in~cond; {13008#true} is VALID [2022-02-20 22:28:16,658 INFO L290 TraceCheckUtils]: 1: Hoare triple {13008#true} assume !(0 == ~cond); {13008#true} is VALID [2022-02-20 22:28:16,658 INFO L290 TraceCheckUtils]: 2: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,658 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13008#true} {13008#true} #4172#return; {13008#true} is VALID [2022-02-20 22:28:16,658 INFO L290 TraceCheckUtils]: 0: Hoare triple {13119#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {13008#true} is VALID [2022-02-20 22:28:16,659 INFO L272 TraceCheckUtils]: 1: Hoare triple {13008#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {13127#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:28:16,659 INFO L290 TraceCheckUtils]: 2: Hoare triple {13127#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {13008#true} is VALID [2022-02-20 22:28:16,659 INFO L290 TraceCheckUtils]: 3: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,659 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {13008#true} {13008#true} #4170#return; {13008#true} is VALID [2022-02-20 22:28:16,659 INFO L290 TraceCheckUtils]: 5: Hoare triple {13008#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {13008#true} is VALID [2022-02-20 22:28:16,660 INFO L272 TraceCheckUtils]: 6: Hoare triple {13008#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {13008#true} is VALID [2022-02-20 22:28:16,660 INFO L290 TraceCheckUtils]: 7: Hoare triple {13008#true} ~cond := #in~cond; {13008#true} is VALID [2022-02-20 22:28:16,660 INFO L290 TraceCheckUtils]: 8: Hoare triple {13008#true} assume !(0 == ~cond); {13008#true} is VALID [2022-02-20 22:28:16,660 INFO L290 TraceCheckUtils]: 9: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,660 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {13008#true} {13008#true} #4172#return; {13008#true} is VALID [2022-02-20 22:28:16,660 INFO L290 TraceCheckUtils]: 11: Hoare triple {13008#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {13008#true} is VALID [2022-02-20 22:28:16,660 INFO L290 TraceCheckUtils]: 12: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,661 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {13008#true} {13010#(= ~ldv_irq_1_1~0 0)} #4254#return; {13010#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:28:16,669 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 83 [2022-02-20 22:28:16,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:16,681 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:28:16,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:16,687 INFO L290 TraceCheckUtils]: 0: Hoare triple {13156#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr849 := 0; {13008#true} is VALID [2022-02-20 22:28:16,688 INFO L290 TraceCheckUtils]: 1: Hoare triple {13008#true} assume !(#t~loopctr849 % 18446744073709551616 < #amount % 18446744073709551616); {13008#true} is VALID [2022-02-20 22:28:16,688 INFO L290 TraceCheckUtils]: 2: Hoare triple {13008#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {13008#true} is VALID [2022-02-20 22:28:16,688 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13008#true} {13008#true} #4588#return; {13008#true} is VALID [2022-02-20 22:28:16,688 INFO L290 TraceCheckUtils]: 0: Hoare triple {13156#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {13008#true} is VALID [2022-02-20 22:28:16,689 INFO L272 TraceCheckUtils]: 1: Hoare triple {13008#true} call #t~memset~res15.base, #t~memset~res15.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, ~n); {13156#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:28:16,689 INFO L290 TraceCheckUtils]: 2: Hoare triple {13156#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr849 := 0; {13008#true} is VALID [2022-02-20 22:28:16,690 INFO L290 TraceCheckUtils]: 3: Hoare triple {13008#true} assume !(#t~loopctr849 % 18446744073709551616 < #amount % 18446744073709551616); {13008#true} is VALID [2022-02-20 22:28:16,690 INFO L290 TraceCheckUtils]: 4: Hoare triple {13008#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {13008#true} is VALID [2022-02-20 22:28:16,690 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {13008#true} {13008#true} #4588#return; {13008#true} is VALID [2022-02-20 22:28:16,690 INFO L290 TraceCheckUtils]: 6: Hoare triple {13008#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res15.base, #t~memset~res15.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {13008#true} is VALID [2022-02-20 22:28:16,691 INFO L290 TraceCheckUtils]: 7: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,693 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {13008#true} {13010#(= ~ldv_irq_1_1~0 0)} #4256#return; {13010#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:28:16,693 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 94 [2022-02-20 22:28:16,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:16,703 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:28:16,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:16,710 INFO L290 TraceCheckUtils]: 0: Hoare triple {13156#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr849 := 0; {13008#true} is VALID [2022-02-20 22:28:16,710 INFO L290 TraceCheckUtils]: 1: Hoare triple {13008#true} assume !(#t~loopctr849 % 18446744073709551616 < #amount % 18446744073709551616); {13008#true} is VALID [2022-02-20 22:28:16,710 INFO L290 TraceCheckUtils]: 2: Hoare triple {13008#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {13008#true} is VALID [2022-02-20 22:28:16,711 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13008#true} {13008#true} #4588#return; {13008#true} is VALID [2022-02-20 22:28:16,711 INFO L290 TraceCheckUtils]: 0: Hoare triple {13156#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {13008#true} is VALID [2022-02-20 22:28:16,712 INFO L272 TraceCheckUtils]: 1: Hoare triple {13008#true} call #t~memset~res15.base, #t~memset~res15.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, ~n); {13156#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:28:16,712 INFO L290 TraceCheckUtils]: 2: Hoare triple {13156#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr849 := 0; {13008#true} is VALID [2022-02-20 22:28:16,712 INFO L290 TraceCheckUtils]: 3: Hoare triple {13008#true} assume !(#t~loopctr849 % 18446744073709551616 < #amount % 18446744073709551616); {13008#true} is VALID [2022-02-20 22:28:16,712 INFO L290 TraceCheckUtils]: 4: Hoare triple {13008#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {13008#true} is VALID [2022-02-20 22:28:16,712 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {13008#true} {13008#true} #4588#return; {13008#true} is VALID [2022-02-20 22:28:16,712 INFO L290 TraceCheckUtils]: 6: Hoare triple {13008#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res15.base, #t~memset~res15.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {13008#true} is VALID [2022-02-20 22:28:16,712 INFO L290 TraceCheckUtils]: 7: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,713 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {13008#true} {13010#(= ~ldv_irq_1_1~0 0)} #4258#return; {13010#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:28:16,714 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 116 [2022-02-20 22:28:16,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:16,724 INFO L290 TraceCheckUtils]: 0: Hoare triple {13008#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3008 + ~dev.offset; {13008#true} is VALID [2022-02-20 22:28:16,725 INFO L290 TraceCheckUtils]: 1: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,725 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {13008#true} {13009#false} #3708#return; {13009#false} is VALID [2022-02-20 22:28:16,730 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 122 [2022-02-20 22:28:16,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:16,736 INFO L290 TraceCheckUtils]: 0: Hoare triple {13165#(= ~ldv_spin~0 |old(~ldv_spin~0)|)} ~ldv_spin~0 := 1; {13008#true} is VALID [2022-02-20 22:28:16,736 INFO L290 TraceCheckUtils]: 1: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,736 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {13008#true} {13009#false} #3710#return; {13009#false} is VALID [2022-02-20 22:28:16,737 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 130 [2022-02-20 22:28:16,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:16,742 INFO L290 TraceCheckUtils]: 0: Hoare triple {13008#true} ~value := #in~value;~port := #in~port; {13008#true} is VALID [2022-02-20 22:28:16,742 INFO L290 TraceCheckUtils]: 1: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,742 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {13008#true} {13009#false} #3712#return; {13009#false} is VALID [2022-02-20 22:28:16,742 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 134 [2022-02-20 22:28:16,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:16,751 INFO L290 TraceCheckUtils]: 0: Hoare triple {13008#true} ~port := #in~port;havoc ~value~1;#res := ~value~1; {13008#true} is VALID [2022-02-20 22:28:16,751 INFO L290 TraceCheckUtils]: 1: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,751 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {13008#true} {13009#false} #3714#return; {13009#false} is VALID [2022-02-20 22:28:16,751 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 143 [2022-02-20 22:28:16,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:16,757 INFO L290 TraceCheckUtils]: 0: Hoare triple {13008#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3008 + ~dev.offset; {13008#true} is VALID [2022-02-20 22:28:16,757 INFO L290 TraceCheckUtils]: 1: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,757 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {13008#true} {13009#false} #3722#return; {13009#false} is VALID [2022-02-20 22:28:16,757 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 148 [2022-02-20 22:28:16,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:16,767 INFO L290 TraceCheckUtils]: 0: Hoare triple {13008#true} ~port := #in~port;havoc ~value~0;#res := ~value~0; {13008#true} is VALID [2022-02-20 22:28:16,768 INFO L290 TraceCheckUtils]: 1: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,768 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {13008#true} {13009#false} #3724#return; {13009#false} is VALID [2022-02-20 22:28:16,768 INFO L290 TraceCheckUtils]: 0: Hoare triple {13008#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(86, 2);call #Ultimate.allocInit(5, 3);call write~init~int(37, 3, 0, 1);call write~init~int(48, 3, 1, 1);call write~init~int(52, 3, 2, 1);call write~init~int(88, 3, 3, 1);call write~init~int(0, 3, 4, 1);call #Ultimate.allocInit(6, 4);call write~init~int(104, 4, 0, 1);call write~init~int(112, 4, 1, 1);call write~init~int(49, 4, 2, 1);call write~init~int(48, 4, 3, 1);call write~init~int(48, 4, 4, 1);call write~init~int(0, 4, 5, 1);call #Ultimate.allocInit(40, 5);call #Ultimate.allocInit(13, 6);call #Ultimate.allocInit(45, 7);call #Ultimate.allocInit(13, 8);call #Ultimate.allocInit(31, 9);call #Ultimate.allocInit(38, 10);call #Ultimate.allocInit(34, 11);call #Ultimate.allocInit(32, 12);call #Ultimate.allocInit(42, 13);call #Ultimate.allocInit(81, 14);call #Ultimate.allocInit(42, 15);call #Ultimate.allocInit(20, 16);call #Ultimate.allocInit(25, 17);call #Ultimate.allocInit(5, 18);call write~init~int(69, 18, 0, 1);call write~init~int(73, 18, 1, 1);call write~init~int(83, 18, 2, 1);call write~init~int(65, 18, 3, 1);call write~init~int(0, 18, 4, 1);call #Ultimate.allocInit(4, 19);call write~init~int(80, 19, 0, 1);call write~init~int(67, 19, 1, 1);call write~init~int(73, 19, 2, 1);call write~init~int(0, 19, 3, 1);call #Ultimate.allocInit(4, 20);call write~init~int(73, 20, 0, 1);call write~init~int(83, 20, 1, 1);call write~init~int(65, 20, 2, 1);call write~init~int(0, 20, 3, 1);call #Ultimate.allocInit(30, 21);call #Ultimate.allocInit(34, 22);call #Ultimate.allocInit(19, 23);call #Ultimate.allocInit(3, 24);call write~init~int(46, 24, 0, 1);call write~init~int(10, 24, 1, 1);call write~init~int(0, 24, 2, 1);call #Ultimate.allocInit(8, 25);call #Ultimate.allocInit(24, 26);call #Ultimate.allocInit(37, 27);call #Ultimate.allocInit(27, 28);call #Ultimate.allocInit(24, 29);call #Ultimate.allocInit(21, 30);call #Ultimate.allocInit(33, 31);call #Ultimate.allocInit(58, 32);call #Ultimate.allocInit(48, 33);call #Ultimate.allocInit(48, 34);call #Ultimate.allocInit(31, 35);call #Ultimate.allocInit(45, 36);call #Ultimate.allocInit(39, 37);call #Ultimate.allocInit(31, 38);call #Ultimate.allocInit(53, 39);call #Ultimate.allocInit(28, 40);call #Ultimate.allocInit(39, 41);call #Ultimate.allocInit(31, 42);call #Ultimate.allocInit(53, 43);call #Ultimate.allocInit(28, 44);call #Ultimate.allocInit(28, 45);call #Ultimate.allocInit(64, 46);call #Ultimate.allocInit(43, 47);call #Ultimate.allocInit(40, 48);call #Ultimate.allocInit(8, 49);call #Ultimate.allocInit(42, 50);call #Ultimate.allocInit(31, 51);call #Ultimate.allocInit(64, 52);call #Ultimate.allocInit(50, 53);call #Ultimate.allocInit(29, 54);call #Ultimate.allocInit(6, 55);call write~init~int(104, 55, 0, 1);call write~init~int(112, 55, 1, 1);call write~init~int(49, 55, 2, 1);call write~init~int(48, 55, 3, 1);call write~init~int(48, 55, 4, 1);call write~init~int(0, 55, 5, 1);call #Ultimate.allocInit(6, 56);call write~init~int(104, 56, 0, 1);call write~init~int(112, 56, 1, 1);call write~init~int(49, 56, 2, 1);call write~init~int(48, 56, 3, 1);call write~init~int(48, 56, 4, 1);call write~init~int(0, 56, 5, 1);~ldv_irq_1_3~0 := 0;~ldv_irq_data_1_1~0.base, ~ldv_irq_data_1_1~0.offset := 0, 0;~hp100_pci_driver_group1~0.base, ~hp100_pci_driver_group1~0.offset := 0, 0;~pci_counter~0 := 0;~ldv_irq_1_0~0 := 0;~hp100_bm_netdev_ops_group1~0.base, ~hp100_bm_netdev_ops_group1~0.offset := 0, 0;~ldv_irq_data_1_0~0.base, ~ldv_irq_data_1_0~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_irq_data_1_3~0.base, ~ldv_irq_data_1_3~0.offset := 0, 0;~ldv_irq_data_1_2~0.base, ~ldv_irq_data_1_2~0.offset := 0, 0;~ldv_irq_1_2~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_irq_1_1~0 := 0;~hp100_netdev_ops_group1~0.base, ~hp100_netdev_ops_group1~0.offset := 0, 0;~ldv_irq_line_1_3~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_irq_line_1_0~0 := 0;~ref_cnt~0 := 0;~ldv_irq_line_1_1~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_irq_line_1_2~0 := 0;~ldv_state_variable_4~0 := 0;~#hp100_pci_tbl~0.base, ~#hp100_pci_tbl~0.offset := 57, 0;call #Ultimate.allocInit(224, 57);call write~init~int(4156, ~#hp100_pci_tbl~0.base, ~#hp100_pci_tbl~0.offset, 4);call write~init~int(4144, ~#hp100_pci_tbl~0.base, 4 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#hp100_pci_tbl~0.base, 8 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#hp100_pci_tbl~0.base, 12 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 16 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 20 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 24 + ~#hp100_pci_tbl~0.offset, 8);call write~init~int(4156, ~#hp100_pci_tbl~0.base, 32 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(4145, ~#hp100_pci_tbl~0.base, 36 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#hp100_pci_tbl~0.base, 40 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#hp100_pci_tbl~0.base, 44 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 48 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 52 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 56 + ~#hp100_pci_tbl~0.offset, 8);call write~init~int(4156, ~#hp100_pci_tbl~0.base, 64 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(4162, ~#hp100_pci_tbl~0.base, 68 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#hp100_pci_tbl~0.base, 72 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#hp100_pci_tbl~0.base, 76 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 80 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 84 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 88 + ~#hp100_pci_tbl~0.offset, 8);call write~init~int(4156, ~#hp100_pci_tbl~0.base, 96 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(4160, ~#hp100_pci_tbl~0.base, 100 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#hp100_pci_tbl~0.base, 104 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#hp100_pci_tbl~0.base, 108 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 112 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 116 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 120 + ~#hp100_pci_tbl~0.offset, 8);call write~init~int(4598, ~#hp100_pci_tbl~0.base, 128 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(274, ~#hp100_pci_tbl~0.base, 132 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#hp100_pci_tbl~0.base, 136 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#hp100_pci_tbl~0.base, 140 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 144 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 148 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 152 + ~#hp100_pci_tbl~0.offset, 8);call write~init~int(4122, ~#hp100_pci_tbl~0.base, 160 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(5, ~#hp100_pci_tbl~0.base, 164 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#hp100_pci_tbl~0.base, 168 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#hp100_pci_tbl~0.base, 172 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 176 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 180 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 184 + ~#hp100_pci_tbl~0.offset, 8);call write~init~int(0, ~#hp100_pci_tbl~0.base, 192 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 196 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 200 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 204 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 208 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 212 + ~#hp100_pci_tbl~0.offset, 4);call write~init~int(0, ~#hp100_pci_tbl~0.base, 216 + ~#hp100_pci_tbl~0.offset, 8);~__mod_pci__hp100_pci_tbl_device_table~0.vendor := ~__mod_pci__hp100_pci_tbl_device_table~0.vendor[0 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.device := ~__mod_pci__hp100_pci_tbl_device_table~0.device[0 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.subvendor := ~__mod_pci__hp100_pci_tbl_device_table~0.subvendor[0 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.subdevice := ~__mod_pci__hp100_pci_tbl_device_table~0.subdevice[0 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.class := ~__mod_pci__hp100_pci_tbl_device_table~0.class[0 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.class_mask := ~__mod_pci__hp100_pci_tbl_device_table~0.class_mask[0 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.driver_data := ~__mod_pci__hp100_pci_tbl_device_table~0.driver_data[0 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.vendor := ~__mod_pci__hp100_pci_tbl_device_table~0.vendor[1 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.device := ~__mod_pci__hp100_pci_tbl_device_table~0.device[1 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.subvendor := ~__mod_pci__hp100_pci_tbl_device_table~0.subvendor[1 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.subdevice := ~__mod_pci__hp100_pci_tbl_device_table~0.subdevice[1 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.class := ~__mod_pci__hp100_pci_tbl_device_table~0.class[1 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.class_mask := ~__mod_pci__hp100_pci_tbl_device_table~0.class_mask[1 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.driver_data := ~__mod_pci__hp100_pci_tbl_device_table~0.driver_data[1 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.vendor := ~__mod_pci__hp100_pci_tbl_device_table~0.vendor[2 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.device := ~__mod_pci__hp100_pci_tbl_device_table~0.device[2 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.subvendor := ~__mod_pci__hp100_pci_tbl_device_table~0.subvendor[2 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.subdevice := ~__mod_pci__hp100_pci_tbl_device_table~0.subdevice[2 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.class := ~__mod_pci__hp100_pci_tbl_device_table~0.class[2 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.class_mask := ~__mod_pci__hp100_pci_tbl_device_table~0.class_mask[2 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.driver_data := ~__mod_pci__hp100_pci_tbl_device_table~0.driver_data[2 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.vendor := ~__mod_pci__hp100_pci_tbl_device_table~0.vendor[3 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.device := ~__mod_pci__hp100_pci_tbl_device_table~0.device[3 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.subvendor := ~__mod_pci__hp100_pci_tbl_device_table~0.subvendor[3 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.subdevice := ~__mod_pci__hp100_pci_tbl_device_table~0.subdevice[3 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.class := ~__mod_pci__hp100_pci_tbl_device_table~0.class[3 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.class_mask := ~__mod_pci__hp100_pci_tbl_device_table~0.class_mask[3 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.driver_data := ~__mod_pci__hp100_pci_tbl_device_table~0.driver_data[3 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.vendor := ~__mod_pci__hp100_pci_tbl_device_table~0.vendor[4 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.device := ~__mod_pci__hp100_pci_tbl_device_table~0.device[4 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.subvendor := ~__mod_pci__hp100_pci_tbl_device_table~0.subvendor[4 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.subdevice := ~__mod_pci__hp100_pci_tbl_device_table~0.subdevice[4 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.class := ~__mod_pci__hp100_pci_tbl_device_table~0.class[4 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.class_mask := ~__mod_pci__hp100_pci_tbl_device_table~0.class_mask[4 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.driver_data := ~__mod_pci__hp100_pci_tbl_device_table~0.driver_data[4 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.vendor := ~__mod_pci__hp100_pci_tbl_device_table~0.vendor[5 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.device := ~__mod_pci__hp100_pci_tbl_device_table~0.device[5 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.subvendor := ~__mod_pci__hp100_pci_tbl_device_table~0.subvendor[5 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.subdevice := ~__mod_pci__hp100_pci_tbl_device_table~0.subdevice[5 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.class := ~__mod_pci__hp100_pci_tbl_device_table~0.class[5 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.class_mask := ~__mod_pci__hp100_pci_tbl_device_table~0.class_mask[5 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.driver_data := ~__mod_pci__hp100_pci_tbl_device_table~0.driver_data[5 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.vendor := ~__mod_pci__hp100_pci_tbl_device_table~0.vendor[6 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.device := ~__mod_pci__hp100_pci_tbl_device_table~0.device[6 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.subvendor := ~__mod_pci__hp100_pci_tbl_device_table~0.subvendor[6 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.subdevice := ~__mod_pci__hp100_pci_tbl_device_table~0.subdevice[6 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.class := ~__mod_pci__hp100_pci_tbl_device_table~0.class[6 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.class_mask := ~__mod_pci__hp100_pci_tbl_device_table~0.class_mask[6 := 0];~__mod_pci__hp100_pci_tbl_device_table~0.driver_data := ~__mod_pci__hp100_pci_tbl_device_table~0.driver_data[6 := 0];~hp100_rx_ratio~0 := 75;~hp100_priority_tx~0 := 0;~hp100_mode~0 := 1;~#hp100_bm_netdev_ops~0.base, ~#hp100_bm_netdev_ops~0.offset := 58, 0;call #Ultimate.allocInit(528, 58);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 8 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hp100_open.base, #funAddr~hp100_open.offset, ~#hp100_bm_netdev_ops~0.base, 16 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hp100_close.base, #funAddr~hp100_close.offset, ~#hp100_bm_netdev_ops~0.base, 24 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hp100_start_xmit_bm.base, #funAddr~hp100_start_xmit_bm.offset, ~#hp100_bm_netdev_ops~0.base, 32 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 40 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 48 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hp100_set_multicast_list.base, #funAddr~hp100_set_multicast_list.offset, ~#hp100_bm_netdev_ops~0.base, 56 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_mac_addr.base, #funAddr~eth_mac_addr.offset, ~#hp100_bm_netdev_ops~0.base, 64 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_validate_addr.base, #funAddr~eth_validate_addr.offset, ~#hp100_bm_netdev_ops~0.base, 72 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 80 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 88 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_change_mtu.base, #funAddr~eth_change_mtu.offset, ~#hp100_bm_netdev_ops~0.base, 96 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 104 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 112 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 120 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hp100_get_stats.base, #funAddr~hp100_get_stats.offset, ~#hp100_bm_netdev_ops~0.base, 128 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 136 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 144 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 152 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 160 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 168 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 176 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 184 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 192 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 200 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 208 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 216 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 224 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 232 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 240 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 248 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 256 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 264 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 272 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 280 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 288 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 296 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 304 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 312 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 320 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 328 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 336 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 344 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 352 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 360 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 368 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 376 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 384 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 392 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 400 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 408 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 416 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 424 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 432 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 440 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 448 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 456 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 464 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 472 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 480 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 488 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 496 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 504 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 512 + ~#hp100_bm_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_bm_netdev_ops~0.base, 520 + ~#hp100_bm_netdev_ops~0.offset, 8);~#hp100_netdev_ops~0.base, ~#hp100_netdev_ops~0.offset := 59, 0;call #Ultimate.allocInit(528, 59);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 8 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hp100_open.base, #funAddr~hp100_open.offset, ~#hp100_netdev_ops~0.base, 16 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hp100_close.base, #funAddr~hp100_close.offset, ~#hp100_netdev_ops~0.base, 24 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hp100_start_xmit.base, #funAddr~hp100_start_xmit.offset, ~#hp100_netdev_ops~0.base, 32 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 40 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 48 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hp100_set_multicast_list.base, #funAddr~hp100_set_multicast_list.offset, ~#hp100_netdev_ops~0.base, 56 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_mac_addr.base, #funAddr~eth_mac_addr.offset, ~#hp100_netdev_ops~0.base, 64 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_validate_addr.base, #funAddr~eth_validate_addr.offset, ~#hp100_netdev_ops~0.base, 72 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 80 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 88 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_change_mtu.base, #funAddr~eth_change_mtu.offset, ~#hp100_netdev_ops~0.base, 96 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 104 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 112 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 120 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hp100_get_stats.base, #funAddr~hp100_get_stats.offset, ~#hp100_netdev_ops~0.base, 128 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 136 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 144 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 152 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 160 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 168 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 176 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 184 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 192 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 200 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 208 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 216 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 224 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 232 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 240 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 248 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 256 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 264 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 272 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 280 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 288 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 296 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 304 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 312 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 320 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 328 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 336 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 344 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 352 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 360 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 368 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 376 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 384 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 392 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 400 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 408 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 416 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 424 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 432 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 440 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 448 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 456 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 464 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 472 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 480 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 488 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 496 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 504 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 512 + ~#hp100_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_netdev_ops~0.base, 520 + ~#hp100_netdev_ops~0.offset, 8);~#hp100_pci_driver~0.base, ~#hp100_pci_driver~0.offset := 60, 0;call #Ultimate.allocInit(305, 60);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 8 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(55, 0, ~#hp100_pci_driver~0.base, 16 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(~#hp100_pci_tbl~0.base, ~#hp100_pci_tbl~0.offset, ~#hp100_pci_driver~0.base, 24 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~hp100_pci_probe.base, #funAddr~hp100_pci_probe.offset, ~#hp100_pci_driver~0.base, 32 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~hp100_pci_remove.base, #funAddr~hp100_pci_remove.offset, ~#hp100_pci_driver~0.base, 40 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 48 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 56 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 64 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 72 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 80 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 88 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 96 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 104 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 112 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 120 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 128 + ~#hp100_pci_driver~0.offset, 8);call write~init~int(0, ~#hp100_pci_driver~0.base, 136 + ~#hp100_pci_driver~0.offset, 1);call write~init~int(0, ~#hp100_pci_driver~0.base, 137 + ~#hp100_pci_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 141 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 149 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 157 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 165 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 173 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 181 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 189 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 197 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 205 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 213 + ~#hp100_pci_driver~0.offset, 8);call write~init~int(0, ~#hp100_pci_driver~0.base, 221 + ~#hp100_pci_driver~0.offset, 4);call write~init~int(0, ~#hp100_pci_driver~0.base, 225 + ~#hp100_pci_driver~0.offset, 4);call write~init~int(0, ~#hp100_pci_driver~0.base, 229 + ~#hp100_pci_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 233 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 241 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 249 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 257 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 265 + ~#hp100_pci_driver~0.offset, 8);call write~init~int(0, ~#hp100_pci_driver~0.base, 273 + ~#hp100_pci_driver~0.offset, 4);call write~init~int(0, ~#hp100_pci_driver~0.base, 277 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 289 + ~#hp100_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hp100_pci_driver~0.base, 297 + ~#hp100_pci_driver~0.offset, 8);~ldv_retval_2~0 := 0;~ldv_retval_5~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_spin~0 := 0; {13010#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:28:16,769 INFO L290 TraceCheckUtils]: 1: Hoare triple {13010#(= ~ldv_irq_1_1~0 0)} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret744#1.base, main_#t~ret744#1.offset, main_#t~ret745#1.base, main_#t~ret745#1.offset, main_#t~ret746#1.base, main_#t~ret746#1.offset, main_#t~ret747#1.base, main_#t~ret747#1.offset, main_#t~ret748#1.base, main_#t~ret748#1.offset, main_#t~ret749#1.base, main_#t~ret749#1.offset, main_#t~ret750#1.base, main_#t~ret750#1.offset, main_#t~nondet751#1, main_#t~switch752#1, main_#t~nondet753#1, main_#t~switch754#1, main_#t~ret755#1, main_#t~ret756#1, main_#t~ret757#1, main_#t~ret758#1, main_#t~ret759#1.base, main_#t~ret759#1.offset, main_#t~ret760#1.base, main_#t~ret760#1.offset, main_#t~ret761#1.base, main_#t~ret761#1.offset, main_#t~mem762#1, main_#t~ret763#1, main_#t~mem764#1, main_#t~ret765#1, main_#t~ret766#1, main_#t~ret767#1, main_#t~ret768#1, main_#t~ret769#1, main_#t~ret770#1, main_#t~ret771#1, main_#t~ret772#1, main_#t~nondet773#1, main_#t~switch774#1, main_#t~ret775#1, main_#t~nondet776#1, main_#t~switch777#1, main_#t~ret778#1, main_#t~ret779#1, main_#t~ret780#1, main_#t~ret781#1, main_#t~ret782#1.base, main_#t~ret782#1.offset, main_#t~ret783#1.base, main_#t~ret783#1.offset, main_#t~ret784#1.base, main_#t~ret784#1.offset, main_#t~mem785#1, main_#t~ret786#1, main_#t~mem787#1, main_#t~ret788#1, main_#t~ret789#1, main_#t~ret790#1, main_#t~ret791#1, main_#t~ret792#1, main_#t~ret793#1, main_#t~ret794#1, main_#t~ret795#1, main_#t~nondet796#1, main_#t~switch797#1, main_#t~ret798#1, main_#t~ret799#1, main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset, main_~tmp~61#1.base, main_~tmp~61#1.offset, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp___0~31#1.base, main_~tmp___0~31#1.offset, main_~#ldvarg2~0#1.base, main_~#ldvarg2~0#1.offset, main_~ldvarg4~0#1.base, main_~ldvarg4~0#1.offset, main_~tmp___1~20#1.base, main_~tmp___1~20#1.offset, main_~ldvarg3~0#1.base, main_~ldvarg3~0#1.offset, main_~tmp___2~14#1.base, main_~tmp___2~14#1.offset, main_~#ldvarg5~0#1.base, main_~#ldvarg5~0#1.offset, main_~ldvarg6~0#1.base, main_~ldvarg6~0#1.offset, main_~tmp___3~10#1.base, main_~tmp___3~10#1.offset, main_~tmp___4~8#1, main_~tmp___5~8#1, main_~tmp___6~6#1, main_~tmp___7~5#1, main_~tmp___8~4#1;havoc main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset;havoc main_~tmp~61#1.base, main_~tmp~61#1.offset;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp___0~31#1.base, main_~tmp___0~31#1.offset;call main_~#ldvarg2~0#1.base, main_~#ldvarg2~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~ldvarg4~0#1.base, main_~ldvarg4~0#1.offset;havoc main_~tmp___1~20#1.base, main_~tmp___1~20#1.offset;havoc main_~ldvarg3~0#1.base, main_~ldvarg3~0#1.offset;havoc main_~tmp___2~14#1.base, main_~tmp___2~14#1.offset;call main_~#ldvarg5~0#1.base, main_~#ldvarg5~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~ldvarg6~0#1.base, main_~ldvarg6~0#1.offset;havoc main_~tmp___3~10#1.base, main_~tmp___3~10#1.offset;havoc main_~tmp___4~8#1;havoc main_~tmp___5~8#1;havoc main_~tmp___6~6#1;havoc main_~tmp___7~5#1;havoc main_~tmp___8~4#1; {13010#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:28:16,769 INFO L272 TraceCheckUtils]: 2: Hoare triple {13010#(= ~ldv_irq_1_1~0 0)} call main_#t~ret744#1.base, main_#t~ret744#1.offset := ldv_init_zalloc(232); {13119#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:28:16,770 INFO L290 TraceCheckUtils]: 3: Hoare triple {13119#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {13008#true} is VALID [2022-02-20 22:28:16,770 INFO L272 TraceCheckUtils]: 4: Hoare triple {13008#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {13127#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:28:16,770 INFO L290 TraceCheckUtils]: 5: Hoare triple {13127#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {13008#true} is VALID [2022-02-20 22:28:16,771 INFO L290 TraceCheckUtils]: 6: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,771 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {13008#true} {13008#true} #4170#return; {13008#true} is VALID [2022-02-20 22:28:16,771 INFO L290 TraceCheckUtils]: 8: Hoare triple {13008#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {13008#true} is VALID [2022-02-20 22:28:16,771 INFO L272 TraceCheckUtils]: 9: Hoare triple {13008#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {13008#true} is VALID [2022-02-20 22:28:16,771 INFO L290 TraceCheckUtils]: 10: Hoare triple {13008#true} ~cond := #in~cond; {13008#true} is VALID [2022-02-20 22:28:16,771 INFO L290 TraceCheckUtils]: 11: Hoare triple {13008#true} assume !(0 == ~cond); {13008#true} is VALID [2022-02-20 22:28:16,771 INFO L290 TraceCheckUtils]: 12: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,771 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {13008#true} {13008#true} #4172#return; {13008#true} is VALID [2022-02-20 22:28:16,772 INFO L290 TraceCheckUtils]: 14: Hoare triple {13008#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {13008#true} is VALID [2022-02-20 22:28:16,772 INFO L290 TraceCheckUtils]: 15: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,772 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {13008#true} {13010#(= ~ldv_irq_1_1~0 0)} #4246#return; {13010#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:28:16,772 INFO L290 TraceCheckUtils]: 17: Hoare triple {13010#(= ~ldv_irq_1_1~0 0)} main_~tmp~61#1.base, main_~tmp~61#1.offset := main_#t~ret744#1.base, main_#t~ret744#1.offset;havoc main_#t~ret744#1.base, main_#t~ret744#1.offset;main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset := main_~tmp~61#1.base, main_~tmp~61#1.offset; {13010#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:28:16,773 INFO L272 TraceCheckUtils]: 18: Hoare triple {13010#(= ~ldv_irq_1_1~0 0)} call main_#t~ret745#1.base, main_#t~ret745#1.offset := ldv_init_zalloc(1); {13119#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:28:16,773 INFO L290 TraceCheckUtils]: 19: Hoare triple {13119#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {13008#true} is VALID [2022-02-20 22:28:16,774 INFO L272 TraceCheckUtils]: 20: Hoare triple {13008#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {13127#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:28:16,774 INFO L290 TraceCheckUtils]: 21: Hoare triple {13127#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {13008#true} is VALID [2022-02-20 22:28:16,774 INFO L290 TraceCheckUtils]: 22: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,774 INFO L284 TraceCheckUtils]: 23: Hoare quadruple {13008#true} {13008#true} #4170#return; {13008#true} is VALID [2022-02-20 22:28:16,774 INFO L290 TraceCheckUtils]: 24: Hoare triple {13008#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {13008#true} is VALID [2022-02-20 22:28:16,774 INFO L272 TraceCheckUtils]: 25: Hoare triple {13008#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {13008#true} is VALID [2022-02-20 22:28:16,774 INFO L290 TraceCheckUtils]: 26: Hoare triple {13008#true} ~cond := #in~cond; {13008#true} is VALID [2022-02-20 22:28:16,775 INFO L290 TraceCheckUtils]: 27: Hoare triple {13008#true} assume !(0 == ~cond); {13008#true} is VALID [2022-02-20 22:28:16,775 INFO L290 TraceCheckUtils]: 28: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,775 INFO L284 TraceCheckUtils]: 29: Hoare quadruple {13008#true} {13008#true} #4172#return; {13008#true} is VALID [2022-02-20 22:28:16,775 INFO L290 TraceCheckUtils]: 30: Hoare triple {13008#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {13008#true} is VALID [2022-02-20 22:28:16,775 INFO L290 TraceCheckUtils]: 31: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,776 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {13008#true} {13010#(= ~ldv_irq_1_1~0 0)} #4248#return; {13010#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:28:16,776 INFO L290 TraceCheckUtils]: 33: Hoare triple {13010#(= ~ldv_irq_1_1~0 0)} main_~tmp___0~31#1.base, main_~tmp___0~31#1.offset := main_#t~ret745#1.base, main_#t~ret745#1.offset;havoc main_#t~ret745#1.base, main_#t~ret745#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp___0~31#1.base, main_~tmp___0~31#1.offset; {13010#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:28:16,776 INFO L272 TraceCheckUtils]: 34: Hoare triple {13010#(= ~ldv_irq_1_1~0 0)} call main_#t~ret746#1.base, main_#t~ret746#1.offset := ldv_init_zalloc(232); {13119#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:28:16,777 INFO L290 TraceCheckUtils]: 35: Hoare triple {13119#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {13008#true} is VALID [2022-02-20 22:28:16,777 INFO L272 TraceCheckUtils]: 36: Hoare triple {13008#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {13127#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:28:16,777 INFO L290 TraceCheckUtils]: 37: Hoare triple {13127#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {13008#true} is VALID [2022-02-20 22:28:16,777 INFO L290 TraceCheckUtils]: 38: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,779 INFO L284 TraceCheckUtils]: 39: Hoare quadruple {13008#true} {13008#true} #4170#return; {13008#true} is VALID [2022-02-20 22:28:16,779 INFO L290 TraceCheckUtils]: 40: Hoare triple {13008#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {13008#true} is VALID [2022-02-20 22:28:16,779 INFO L272 TraceCheckUtils]: 41: Hoare triple {13008#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {13008#true} is VALID [2022-02-20 22:28:16,779 INFO L290 TraceCheckUtils]: 42: Hoare triple {13008#true} ~cond := #in~cond; {13008#true} is VALID [2022-02-20 22:28:16,779 INFO L290 TraceCheckUtils]: 43: Hoare triple {13008#true} assume !(0 == ~cond); {13008#true} is VALID [2022-02-20 22:28:16,779 INFO L290 TraceCheckUtils]: 44: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,779 INFO L284 TraceCheckUtils]: 45: Hoare quadruple {13008#true} {13008#true} #4172#return; {13008#true} is VALID [2022-02-20 22:28:16,779 INFO L290 TraceCheckUtils]: 46: Hoare triple {13008#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {13008#true} is VALID [2022-02-20 22:28:16,780 INFO L290 TraceCheckUtils]: 47: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,780 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {13008#true} {13010#(= ~ldv_irq_1_1~0 0)} #4250#return; {13010#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:28:16,780 INFO L290 TraceCheckUtils]: 49: Hoare triple {13010#(= ~ldv_irq_1_1~0 0)} main_~tmp___1~20#1.base, main_~tmp___1~20#1.offset := main_#t~ret746#1.base, main_#t~ret746#1.offset;havoc main_#t~ret746#1.base, main_#t~ret746#1.offset;main_~ldvarg4~0#1.base, main_~ldvarg4~0#1.offset := main_~tmp___1~20#1.base, main_~tmp___1~20#1.offset; {13010#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:28:16,781 INFO L272 TraceCheckUtils]: 50: Hoare triple {13010#(= ~ldv_irq_1_1~0 0)} call main_#t~ret747#1.base, main_#t~ret747#1.offset := ldv_init_zalloc(1); {13119#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:28:16,781 INFO L290 TraceCheckUtils]: 51: Hoare triple {13119#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {13008#true} is VALID [2022-02-20 22:28:16,782 INFO L272 TraceCheckUtils]: 52: Hoare triple {13008#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {13127#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:28:16,782 INFO L290 TraceCheckUtils]: 53: Hoare triple {13127#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {13008#true} is VALID [2022-02-20 22:28:16,782 INFO L290 TraceCheckUtils]: 54: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,782 INFO L284 TraceCheckUtils]: 55: Hoare quadruple {13008#true} {13008#true} #4170#return; {13008#true} is VALID [2022-02-20 22:28:16,782 INFO L290 TraceCheckUtils]: 56: Hoare triple {13008#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {13008#true} is VALID [2022-02-20 22:28:16,782 INFO L272 TraceCheckUtils]: 57: Hoare triple {13008#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {13008#true} is VALID [2022-02-20 22:28:16,782 INFO L290 TraceCheckUtils]: 58: Hoare triple {13008#true} ~cond := #in~cond; {13008#true} is VALID [2022-02-20 22:28:16,783 INFO L290 TraceCheckUtils]: 59: Hoare triple {13008#true} assume !(0 == ~cond); {13008#true} is VALID [2022-02-20 22:28:16,783 INFO L290 TraceCheckUtils]: 60: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,783 INFO L284 TraceCheckUtils]: 61: Hoare quadruple {13008#true} {13008#true} #4172#return; {13008#true} is VALID [2022-02-20 22:28:16,783 INFO L290 TraceCheckUtils]: 62: Hoare triple {13008#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {13008#true} is VALID [2022-02-20 22:28:16,783 INFO L290 TraceCheckUtils]: 63: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,784 INFO L284 TraceCheckUtils]: 64: Hoare quadruple {13008#true} {13010#(= ~ldv_irq_1_1~0 0)} #4252#return; {13010#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:28:16,784 INFO L290 TraceCheckUtils]: 65: Hoare triple {13010#(= ~ldv_irq_1_1~0 0)} main_~tmp___2~14#1.base, main_~tmp___2~14#1.offset := main_#t~ret747#1.base, main_#t~ret747#1.offset;havoc main_#t~ret747#1.base, main_#t~ret747#1.offset;main_~ldvarg3~0#1.base, main_~ldvarg3~0#1.offset := main_~tmp___2~14#1.base, main_~tmp___2~14#1.offset; {13010#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:28:16,784 INFO L272 TraceCheckUtils]: 66: Hoare triple {13010#(= ~ldv_irq_1_1~0 0)} call main_#t~ret748#1.base, main_#t~ret748#1.offset := ldv_init_zalloc(32); {13119#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:28:16,784 INFO L290 TraceCheckUtils]: 67: Hoare triple {13119#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {13008#true} is VALID [2022-02-20 22:28:16,785 INFO L272 TraceCheckUtils]: 68: Hoare triple {13008#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {13127#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:28:16,785 INFO L290 TraceCheckUtils]: 69: Hoare triple {13127#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {13008#true} is VALID [2022-02-20 22:28:16,785 INFO L290 TraceCheckUtils]: 70: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,785 INFO L284 TraceCheckUtils]: 71: Hoare quadruple {13008#true} {13008#true} #4170#return; {13008#true} is VALID [2022-02-20 22:28:16,786 INFO L290 TraceCheckUtils]: 72: Hoare triple {13008#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {13008#true} is VALID [2022-02-20 22:28:16,786 INFO L272 TraceCheckUtils]: 73: Hoare triple {13008#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {13008#true} is VALID [2022-02-20 22:28:16,786 INFO L290 TraceCheckUtils]: 74: Hoare triple {13008#true} ~cond := #in~cond; {13008#true} is VALID [2022-02-20 22:28:16,786 INFO L290 TraceCheckUtils]: 75: Hoare triple {13008#true} assume !(0 == ~cond); {13008#true} is VALID [2022-02-20 22:28:16,786 INFO L290 TraceCheckUtils]: 76: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,786 INFO L284 TraceCheckUtils]: 77: Hoare quadruple {13008#true} {13008#true} #4172#return; {13008#true} is VALID [2022-02-20 22:28:16,786 INFO L290 TraceCheckUtils]: 78: Hoare triple {13008#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {13008#true} is VALID [2022-02-20 22:28:16,786 INFO L290 TraceCheckUtils]: 79: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,787 INFO L284 TraceCheckUtils]: 80: Hoare quadruple {13008#true} {13010#(= ~ldv_irq_1_1~0 0)} #4254#return; {13010#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:28:16,787 INFO L290 TraceCheckUtils]: 81: Hoare triple {13010#(= ~ldv_irq_1_1~0 0)} main_~tmp___3~10#1.base, main_~tmp___3~10#1.offset := main_#t~ret748#1.base, main_#t~ret748#1.offset;havoc main_#t~ret748#1.base, main_#t~ret748#1.offset;main_~ldvarg6~0#1.base, main_~ldvarg6~0#1.offset := main_~tmp___3~10#1.base, main_~tmp___3~10#1.offset;assume { :begin_inline_ldv_initialize } true; {13010#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:28:16,787 INFO L290 TraceCheckUtils]: 82: Hoare triple {13010#(= ~ldv_irq_1_1~0 0)} assume { :end_inline_ldv_initialize } true; {13010#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:28:16,788 INFO L272 TraceCheckUtils]: 83: Hoare triple {13010#(= ~ldv_irq_1_1~0 0)} call main_#t~ret749#1.base, main_#t~ret749#1.offset := ldv_memset(main_~#ldvarg2~0#1.base, main_~#ldvarg2~0#1.offset, 0, 4); {13156#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:28:16,788 INFO L290 TraceCheckUtils]: 84: Hoare triple {13156#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {13008#true} is VALID [2022-02-20 22:28:16,789 INFO L272 TraceCheckUtils]: 85: Hoare triple {13008#true} call #t~memset~res15.base, #t~memset~res15.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, ~n); {13156#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:28:16,789 INFO L290 TraceCheckUtils]: 86: Hoare triple {13156#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr849 := 0; {13008#true} is VALID [2022-02-20 22:28:16,789 INFO L290 TraceCheckUtils]: 87: Hoare triple {13008#true} assume !(#t~loopctr849 % 18446744073709551616 < #amount % 18446744073709551616); {13008#true} is VALID [2022-02-20 22:28:16,789 INFO L290 TraceCheckUtils]: 88: Hoare triple {13008#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {13008#true} is VALID [2022-02-20 22:28:16,790 INFO L284 TraceCheckUtils]: 89: Hoare quadruple {13008#true} {13008#true} #4588#return; {13008#true} is VALID [2022-02-20 22:28:16,790 INFO L290 TraceCheckUtils]: 90: Hoare triple {13008#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res15.base, #t~memset~res15.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {13008#true} is VALID [2022-02-20 22:28:16,790 INFO L290 TraceCheckUtils]: 91: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,790 INFO L284 TraceCheckUtils]: 92: Hoare quadruple {13008#true} {13010#(= ~ldv_irq_1_1~0 0)} #4256#return; {13010#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:28:16,791 INFO L290 TraceCheckUtils]: 93: Hoare triple {13010#(= ~ldv_irq_1_1~0 0)} havoc main_#t~ret749#1.base, main_#t~ret749#1.offset; {13010#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:28:16,792 INFO L272 TraceCheckUtils]: 94: Hoare triple {13010#(= ~ldv_irq_1_1~0 0)} call main_#t~ret750#1.base, main_#t~ret750#1.offset := ldv_memset(main_~#ldvarg5~0#1.base, main_~#ldvarg5~0#1.offset, 0, 4); {13156#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:28:16,792 INFO L290 TraceCheckUtils]: 95: Hoare triple {13156#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {13008#true} is VALID [2022-02-20 22:28:16,792 INFO L272 TraceCheckUtils]: 96: Hoare triple {13008#true} call #t~memset~res15.base, #t~memset~res15.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, ~n); {13156#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:28:16,793 INFO L290 TraceCheckUtils]: 97: Hoare triple {13156#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr849 := 0; {13008#true} is VALID [2022-02-20 22:28:16,793 INFO L290 TraceCheckUtils]: 98: Hoare triple {13008#true} assume !(#t~loopctr849 % 18446744073709551616 < #amount % 18446744073709551616); {13008#true} is VALID [2022-02-20 22:28:16,793 INFO L290 TraceCheckUtils]: 99: Hoare triple {13008#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {13008#true} is VALID [2022-02-20 22:28:16,794 INFO L284 TraceCheckUtils]: 100: Hoare quadruple {13008#true} {13008#true} #4588#return; {13008#true} is VALID [2022-02-20 22:28:16,794 INFO L290 TraceCheckUtils]: 101: Hoare triple {13008#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res15.base, #t~memset~res15.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {13008#true} is VALID [2022-02-20 22:28:16,794 INFO L290 TraceCheckUtils]: 102: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,795 INFO L284 TraceCheckUtils]: 103: Hoare quadruple {13008#true} {13010#(= ~ldv_irq_1_1~0 0)} #4258#return; {13010#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:28:16,795 INFO L290 TraceCheckUtils]: 104: Hoare triple {13010#(= ~ldv_irq_1_1~0 0)} havoc main_#t~ret750#1.base, main_#t~ret750#1.offset;~ldv_state_variable_4~0 := 0;~ldv_state_variable_1~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {13010#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:28:16,795 INFO L290 TraceCheckUtils]: 105: Hoare triple {13010#(= ~ldv_irq_1_1~0 0)} assume -2147483648 <= main_#t~nondet751#1 && main_#t~nondet751#1 <= 2147483647;main_~tmp___4~8#1 := main_#t~nondet751#1;havoc main_#t~nondet751#1;main_#t~switch752#1 := 0 == main_~tmp___4~8#1; {13010#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:28:16,796 INFO L290 TraceCheckUtils]: 106: Hoare triple {13010#(= ~ldv_irq_1_1~0 0)} assume !main_#t~switch752#1;main_#t~switch752#1 := main_#t~switch752#1 || 1 == main_~tmp___4~8#1; {13010#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:28:16,796 INFO L290 TraceCheckUtils]: 107: Hoare triple {13010#(= ~ldv_irq_1_1~0 0)} assume main_#t~switch752#1; {13010#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:28:16,796 INFO L290 TraceCheckUtils]: 108: Hoare triple {13010#(= ~ldv_irq_1_1~0 0)} assume 0 != ~ldv_state_variable_1~0;assume { :begin_inline_choose_interrupt_1 } true;havoc choose_interrupt_1_#t~nondet738#1, choose_interrupt_1_#t~switch739#1, choose_interrupt_1_#t~ret740#1, choose_interrupt_1_#t~ret741#1, choose_interrupt_1_#t~ret742#1, choose_interrupt_1_#t~ret743#1, choose_interrupt_1_~tmp~60#1;havoc choose_interrupt_1_~tmp~60#1;assume -2147483648 <= choose_interrupt_1_#t~nondet738#1 && choose_interrupt_1_#t~nondet738#1 <= 2147483647;choose_interrupt_1_~tmp~60#1 := choose_interrupt_1_#t~nondet738#1;havoc choose_interrupt_1_#t~nondet738#1;choose_interrupt_1_#t~switch739#1 := 0 == choose_interrupt_1_~tmp~60#1; {13010#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:28:16,797 INFO L290 TraceCheckUtils]: 109: Hoare triple {13010#(= ~ldv_irq_1_1~0 0)} assume !choose_interrupt_1_#t~switch739#1;choose_interrupt_1_#t~switch739#1 := choose_interrupt_1_#t~switch739#1 || 1 == choose_interrupt_1_~tmp~60#1; {13010#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:28:16,797 INFO L290 TraceCheckUtils]: 110: Hoare triple {13010#(= ~ldv_irq_1_1~0 0)} assume choose_interrupt_1_#t~switch739#1; {13010#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:28:16,798 INFO L272 TraceCheckUtils]: 111: Hoare triple {13010#(= ~ldv_irq_1_1~0 0)} call choose_interrupt_1_#t~ret741#1 := ldv_irq_1(~ldv_irq_1_1~0, ~ldv_irq_line_1_1~0, ~ldv_irq_data_1_1~0.base, ~ldv_irq_data_1_1~0.offset); {13099#(= |ldv_irq_1_#in~state#1| 0)} is VALID [2022-02-20 22:28:16,798 INFO L290 TraceCheckUtils]: 112: Hoare triple {13099#(= |ldv_irq_1_#in~state#1| 0)} ~state#1 := #in~state#1;~line#1 := #in~line#1;~data#1.base, ~data#1.offset := #in~data#1.base, #in~data#1.offset;havoc ~irq_retval~0#1;havoc ~tmp~56#1;havoc ~tmp___0~30#1;assume -2147483648 <= #t~nondet731#1 && #t~nondet731#1 <= 2147483647;~tmp~56#1 := #t~nondet731#1;havoc #t~nondet731#1;~irq_retval~0#1 := ~tmp~56#1; {13100#(= |ldv_irq_1_~state#1| 0)} is VALID [2022-02-20 22:28:16,798 INFO L290 TraceCheckUtils]: 113: Hoare triple {13100#(= |ldv_irq_1_~state#1| 0)} assume 0 != ~state#1;assume -2147483648 <= #t~nondet732#1 && #t~nondet732#1 <= 2147483647;~tmp___0~30#1 := #t~nondet732#1;havoc #t~nondet732#1;#t~switch733#1 := 0 == ~tmp___0~30#1; {13009#false} is VALID [2022-02-20 22:28:16,798 INFO L290 TraceCheckUtils]: 114: Hoare triple {13009#false} assume #t~switch733#1; {13009#false} is VALID [2022-02-20 22:28:16,799 INFO L290 TraceCheckUtils]: 115: Hoare triple {13009#false} assume 1 == ~state#1;~LDV_IN_INTERRUPT~0 := 2;assume { :begin_inline_hp100_interrupt } true;hp100_interrupt_#in~irq#1, hp100_interrupt_#in~dev_id#1.base, hp100_interrupt_#in~dev_id#1.offset := ~line#1, ~data#1.base, ~data#1.offset;havoc hp100_interrupt_#res#1;havoc hp100_interrupt_#t~ret591#1.base, hp100_interrupt_#t~ret591#1.offset, hp100_interrupt_#t~mem592#1, hp100_interrupt_#t~ret593#1, hp100_interrupt_#t~mem594#1, hp100_interrupt_#t~nondet595#1, hp100_interrupt_#t~mem596#1, hp100_interrupt_#t~mem597#1, hp100_interrupt_#t~mem598#1, hp100_interrupt_#t~mem599#1, hp100_interrupt_#t~mem600#1, hp100_interrupt_~irq#1, hp100_interrupt_~dev_id#1.base, hp100_interrupt_~dev_id#1.offset, hp100_interrupt_~dev~0#1.base, hp100_interrupt_~dev~0#1.offset, hp100_interrupt_~lp~17#1.base, hp100_interrupt_~lp~17#1.offset, hp100_interrupt_~tmp~45#1.base, hp100_interrupt_~tmp~45#1.offset, hp100_interrupt_~ioaddr~13#1, hp100_interrupt_~val~2#1, hp100_interrupt_~tmp___0~21#1;hp100_interrupt_~irq#1 := hp100_interrupt_#in~irq#1;hp100_interrupt_~dev_id#1.base, hp100_interrupt_~dev_id#1.offset := hp100_interrupt_#in~dev_id#1.base, hp100_interrupt_#in~dev_id#1.offset;havoc hp100_interrupt_~dev~0#1.base, hp100_interrupt_~dev~0#1.offset;havoc hp100_interrupt_~lp~17#1.base, hp100_interrupt_~lp~17#1.offset;havoc hp100_interrupt_~tmp~45#1.base, hp100_interrupt_~tmp~45#1.offset;havoc hp100_interrupt_~ioaddr~13#1;havoc hp100_interrupt_~val~2#1;havoc hp100_interrupt_~tmp___0~21#1;hp100_interrupt_~dev~0#1.base, hp100_interrupt_~dev~0#1.offset := hp100_interrupt_~dev_id#1.base, hp100_interrupt_~dev_id#1.offset; {13009#false} is VALID [2022-02-20 22:28:16,799 INFO L272 TraceCheckUtils]: 116: Hoare triple {13009#false} call hp100_interrupt_#t~ret591#1.base, hp100_interrupt_#t~ret591#1.offset := netdev_priv(hp100_interrupt_~dev~0#1.base, hp100_interrupt_~dev~0#1.offset); {13008#true} is VALID [2022-02-20 22:28:16,799 INFO L290 TraceCheckUtils]: 117: Hoare triple {13008#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3008 + ~dev.offset; {13008#true} is VALID [2022-02-20 22:28:16,799 INFO L290 TraceCheckUtils]: 118: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,799 INFO L284 TraceCheckUtils]: 119: Hoare quadruple {13008#true} {13009#false} #3708#return; {13009#false} is VALID [2022-02-20 22:28:16,799 INFO L290 TraceCheckUtils]: 120: Hoare triple {13009#false} hp100_interrupt_~tmp~45#1.base, hp100_interrupt_~tmp~45#1.offset := hp100_interrupt_#t~ret591#1.base, hp100_interrupt_#t~ret591#1.offset;havoc hp100_interrupt_#t~ret591#1.base, hp100_interrupt_#t~ret591#1.offset;hp100_interrupt_~lp~17#1.base, hp100_interrupt_~lp~17#1.offset := hp100_interrupt_~tmp~45#1.base, hp100_interrupt_~tmp~45#1.offset; {13009#false} is VALID [2022-02-20 22:28:16,799 INFO L290 TraceCheckUtils]: 121: Hoare triple {13009#false} assume !(0 == (hp100_interrupt_~dev~0#1.base + hp100_interrupt_~dev~0#1.offset) % 18446744073709551616);call hp100_interrupt_#t~mem592#1 := read~int(hp100_interrupt_~dev~0#1.base, 56 + hp100_interrupt_~dev~0#1.offset, 8);hp100_interrupt_~ioaddr~13#1 := (if hp100_interrupt_#t~mem592#1 % 18446744073709551616 % 4294967296 <= 2147483647 then hp100_interrupt_#t~mem592#1 % 18446744073709551616 % 4294967296 else hp100_interrupt_#t~mem592#1 % 18446744073709551616 % 4294967296 - 4294967296);havoc hp100_interrupt_#t~mem592#1;assume { :begin_inline_spin_lock } true;spin_lock_#in~lock#1.base, spin_lock_#in~lock#1.offset := hp100_interrupt_~lp~17#1.base, hp100_interrupt_~lp~17#1.offset;havoc spin_lock_~lock#1.base, spin_lock_~lock#1.offset;spin_lock_~lock#1.base, spin_lock_~lock#1.offset := spin_lock_#in~lock#1.base, spin_lock_#in~lock#1.offset; {13009#false} is VALID [2022-02-20 22:28:16,799 INFO L272 TraceCheckUtils]: 122: Hoare triple {13009#false} call ldv_spin_lock(); {13165#(= ~ldv_spin~0 |old(~ldv_spin~0)|)} is VALID [2022-02-20 22:28:16,800 INFO L290 TraceCheckUtils]: 123: Hoare triple {13165#(= ~ldv_spin~0 |old(~ldv_spin~0)|)} ~ldv_spin~0 := 1; {13008#true} is VALID [2022-02-20 22:28:16,800 INFO L290 TraceCheckUtils]: 124: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,800 INFO L284 TraceCheckUtils]: 125: Hoare quadruple {13008#true} {13009#false} #3710#return; {13009#false} is VALID [2022-02-20 22:28:16,800 INFO L290 TraceCheckUtils]: 126: Hoare triple {13009#false} assume { :begin_inline_ldv_spin_lock_5 } true;ldv_spin_lock_5_#in~lock#1.base, ldv_spin_lock_5_#in~lock#1.offset := spin_lock_~lock#1.base, spin_lock_~lock#1.offset;havoc ldv_spin_lock_5_~lock#1.base, ldv_spin_lock_5_~lock#1.offset;ldv_spin_lock_5_~lock#1.base, ldv_spin_lock_5_~lock#1.offset := ldv_spin_lock_5_#in~lock#1.base, ldv_spin_lock_5_#in~lock#1.offset;assume { :begin_inline__raw_spin_lock } true;_raw_spin_lock_#in~arg0#1.base, _raw_spin_lock_#in~arg0#1.offset := ldv_spin_lock_5_~lock#1.base, ldv_spin_lock_5_~lock#1.offset;havoc _raw_spin_lock_~arg0#1.base, _raw_spin_lock_~arg0#1.offset;_raw_spin_lock_~arg0#1.base, _raw_spin_lock_~arg0#1.offset := _raw_spin_lock_#in~arg0#1.base, _raw_spin_lock_#in~arg0#1.offset; {13009#false} is VALID [2022-02-20 22:28:16,800 INFO L290 TraceCheckUtils]: 127: Hoare triple {13009#false} assume { :end_inline__raw_spin_lock } true; {13009#false} is VALID [2022-02-20 22:28:16,800 INFO L290 TraceCheckUtils]: 128: Hoare triple {13009#false} assume { :end_inline_ldv_spin_lock_5 } true; {13009#false} is VALID [2022-02-20 22:28:16,800 INFO L290 TraceCheckUtils]: 129: Hoare triple {13009#false} assume { :end_inline_spin_lock } true; {13009#false} is VALID [2022-02-20 22:28:16,800 INFO L272 TraceCheckUtils]: 130: Hoare triple {13009#false} call outw(4, 4 + hp100_interrupt_~ioaddr~13#1); {13008#true} is VALID [2022-02-20 22:28:16,801 INFO L290 TraceCheckUtils]: 131: Hoare triple {13008#true} ~value := #in~value;~port := #in~port; {13008#true} is VALID [2022-02-20 22:28:16,801 INFO L290 TraceCheckUtils]: 132: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,801 INFO L284 TraceCheckUtils]: 133: Hoare quadruple {13008#true} {13009#false} #3712#return; {13009#false} is VALID [2022-02-20 22:28:16,801 INFO L272 TraceCheckUtils]: 134: Hoare triple {13009#false} call hp100_interrupt_#t~ret593#1 := inw(8 + hp100_interrupt_~ioaddr~13#1); {13008#true} is VALID [2022-02-20 22:28:16,801 INFO L290 TraceCheckUtils]: 135: Hoare triple {13008#true} ~port := #in~port;havoc ~value~1;#res := ~value~1; {13008#true} is VALID [2022-02-20 22:28:16,801 INFO L290 TraceCheckUtils]: 136: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,801 INFO L284 TraceCheckUtils]: 137: Hoare quadruple {13008#true} {13009#false} #3714#return; {13009#false} is VALID [2022-02-20 22:28:16,801 INFO L290 TraceCheckUtils]: 138: Hoare triple {13009#false} hp100_interrupt_~tmp___0~21#1 := hp100_interrupt_#t~ret593#1;havoc hp100_interrupt_#t~ret593#1;hp100_interrupt_~val~2#1 := hp100_interrupt_~tmp___0~21#1 % 65536; {13009#false} is VALID [2022-02-20 22:28:16,802 INFO L290 TraceCheckUtils]: 139: Hoare triple {13009#false} assume !(0 == hp100_interrupt_~val~2#1 % 4294967296); {13009#false} is VALID [2022-02-20 22:28:16,802 INFO L290 TraceCheckUtils]: 140: Hoare triple {13009#false} assume !(0 != (if 0 == hp100_interrupt_~val~2#1 then 0 else (if 1 == hp100_interrupt_~val~2#1 then 0 else ~bitwiseAnd(hp100_interrupt_~val~2#1, 2048))) % 4294967296); {13009#false} is VALID [2022-02-20 22:28:16,802 INFO L290 TraceCheckUtils]: 141: Hoare triple {13009#false} assume 0 != (if 0 == hp100_interrupt_~val~2#1 then 0 else (if 1 == hp100_interrupt_~val~2#1 then 0 else ~bitwiseAnd(hp100_interrupt_~val~2#1, 1024))) % 4294967296;call hp100_interrupt_#t~mem596#1 := read~int(hp100_interrupt_~lp~17#1.base, 92 + hp100_interrupt_~lp~17#1.offset, 2); {13009#false} is VALID [2022-02-20 22:28:16,802 INFO L290 TraceCheckUtils]: 142: Hoare triple {13009#false} assume 1 != hp100_interrupt_#t~mem596#1 % 65536 % 4294967296;havoc hp100_interrupt_#t~mem596#1;assume { :begin_inline_hp100_rx } true;hp100_rx_#in~dev#1.base, hp100_rx_#in~dev#1.offset := hp100_interrupt_~dev~0#1.base, hp100_interrupt_~dev~0#1.offset;havoc hp100_rx_#t~mem490#1, hp100_rx_#t~ret491#1.base, hp100_rx_#t~ret491#1.offset, hp100_rx_#t~ret492#1, hp100_rx_#t~ret493#1, hp100_rx_#t~mem494#1, hp100_rx_#t~mem495#1.base, hp100_rx_#t~mem495#1.offset, hp100_rx_#t~ret496#1, hp100_rx_#t~ret497#1, hp100_rx_#t~ret499#1.base, hp100_rx_#t~ret499#1.offset, hp100_rx_#t~mem500#1, hp100_rx_#t~ret501#1.base, hp100_rx_#t~ret501#1.offset, hp100_rx_#t~mem502#1.base, hp100_rx_#t~mem502#1.offset, hp100_rx_#t~mem503#1, hp100_rx_#t~mem504#1.base, hp100_rx_#t~mem504#1.offset, hp100_rx_#t~ret505#1, hp100_rx_#t~ret506#1, hp100_rx_#t~mem507#1, hp100_rx_#t~mem508#1, hp100_rx_#t~switch509#1, hp100_rx_#t~mem510#1, hp100_rx_#t~nondet498#1, hp100_rx_~dev#1.base, hp100_rx_~dev#1.offset, hp100_rx_~packets~0#1, hp100_rx_~pkt_len~0#1, hp100_rx_~ioaddr~8#1, hp100_rx_~lp~13#1.base, hp100_rx_~lp~13#1.offset, hp100_rx_~tmp~40#1.base, hp100_rx_~tmp~40#1.offset, hp100_rx_~header~0#1, hp100_rx_~skb~0#1.base, hp100_rx_~skb~0#1.offset, hp100_rx_~tmp___0~17#1, hp100_rx_~tmp___1~10#1, hp100_rx_~ptr~0#1.base, hp100_rx_~ptr~0#1.offset, hp100_rx_~tmp___2~7#1;hp100_rx_~dev#1.base, hp100_rx_~dev#1.offset := hp100_rx_#in~dev#1.base, hp100_rx_#in~dev#1.offset;havoc hp100_rx_~packets~0#1;havoc hp100_rx_~pkt_len~0#1;havoc hp100_rx_~ioaddr~8#1;havoc hp100_rx_~lp~13#1.base, hp100_rx_~lp~13#1.offset;havoc hp100_rx_~tmp~40#1.base, hp100_rx_~tmp~40#1.offset;havoc hp100_rx_~header~0#1;havoc hp100_rx_~skb~0#1.base, hp100_rx_~skb~0#1.offset;havoc hp100_rx_~tmp___0~17#1;havoc hp100_rx_~tmp___1~10#1;havoc hp100_rx_~ptr~0#1.base, hp100_rx_~ptr~0#1.offset;havoc hp100_rx_~tmp___2~7#1;call hp100_rx_#t~mem490#1 := read~int(hp100_rx_~dev#1.base, 56 + hp100_rx_~dev#1.offset, 8);hp100_rx_~ioaddr~8#1 := (if hp100_rx_#t~mem490#1 % 18446744073709551616 % 4294967296 <= 2147483647 then hp100_rx_#t~mem490#1 % 18446744073709551616 % 4294967296 else hp100_rx_#t~mem490#1 % 18446744073709551616 % 4294967296 - 4294967296);havoc hp100_rx_#t~mem490#1; {13009#false} is VALID [2022-02-20 22:28:16,802 INFO L272 TraceCheckUtils]: 143: Hoare triple {13009#false} call hp100_rx_#t~ret491#1.base, hp100_rx_#t~ret491#1.offset := netdev_priv(hp100_rx_~dev#1.base, hp100_rx_~dev#1.offset); {13008#true} is VALID [2022-02-20 22:28:16,802 INFO L290 TraceCheckUtils]: 144: Hoare triple {13008#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3008 + ~dev.offset; {13008#true} is VALID [2022-02-20 22:28:16,802 INFO L290 TraceCheckUtils]: 145: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,802 INFO L284 TraceCheckUtils]: 146: Hoare quadruple {13008#true} {13009#false} #3722#return; {13009#false} is VALID [2022-02-20 22:28:16,803 INFO L290 TraceCheckUtils]: 147: Hoare triple {13009#false} hp100_rx_~tmp~40#1.base, hp100_rx_~tmp~40#1.offset := hp100_rx_#t~ret491#1.base, hp100_rx_#t~ret491#1.offset;havoc hp100_rx_#t~ret491#1.base, hp100_rx_#t~ret491#1.offset;hp100_rx_~lp~13#1.base, hp100_rx_~lp~13#1.offset := hp100_rx_~tmp~40#1.base, hp100_rx_~tmp~40#1.offset; {13009#false} is VALID [2022-02-20 22:28:16,803 INFO L272 TraceCheckUtils]: 148: Hoare triple {13009#false} call hp100_rx_#t~ret492#1 := inb(24 + hp100_rx_~ioaddr~8#1); {13008#true} is VALID [2022-02-20 22:28:16,803 INFO L290 TraceCheckUtils]: 149: Hoare triple {13008#true} ~port := #in~port;havoc ~value~0;#res := ~value~0; {13008#true} is VALID [2022-02-20 22:28:16,803 INFO L290 TraceCheckUtils]: 150: Hoare triple {13008#true} assume true; {13008#true} is VALID [2022-02-20 22:28:16,803 INFO L284 TraceCheckUtils]: 151: Hoare quadruple {13008#true} {13009#false} #3724#return; {13009#false} is VALID [2022-02-20 22:28:16,803 INFO L290 TraceCheckUtils]: 152: Hoare triple {13009#false} hp100_rx_~tmp___0~17#1 := hp100_rx_#t~ret492#1;havoc hp100_rx_#t~ret492#1;hp100_rx_~packets~0#1 := hp100_rx_~tmp___0~17#1 % 256; {13009#false} is VALID [2022-02-20 22:28:16,803 INFO L290 TraceCheckUtils]: 153: Hoare triple {13009#false} hp100_rx_~tmp___2~7#1 := hp100_rx_~packets~0#1;hp100_rx_~packets~0#1 := hp100_rx_~packets~0#1 - 1; {13009#false} is VALID [2022-02-20 22:28:16,803 INFO L290 TraceCheckUtils]: 154: Hoare triple {13009#false} assume hp100_rx_~tmp___2~7#1 > 0; {13009#false} is VALID [2022-02-20 22:28:16,804 INFO L290 TraceCheckUtils]: 155: Hoare triple {13009#false} hp100_rx_~pkt_len~0#1 := 0; {13009#false} is VALID [2022-02-20 22:28:16,804 INFO L290 TraceCheckUtils]: 156: Hoare triple {13009#false} assume !(hp100_rx_~pkt_len~0#1 <= 5999); {13009#false} is VALID [2022-02-20 22:28:16,804 INFO L290 TraceCheckUtils]: 157: Hoare triple {13009#false} call hp100_rx_#t~mem494#1 := read~int(hp100_rx_~lp~13#1.base, 92 + hp100_rx_~lp~13#1.offset, 2); {13009#false} is VALID [2022-02-20 22:28:16,804 INFO L290 TraceCheckUtils]: 158: Hoare triple {13009#false} assume 2 == hp100_rx_#t~mem494#1 % 65536 % 4294967296;havoc hp100_rx_#t~mem494#1;call hp100_rx_#t~mem495#1.base, hp100_rx_#t~mem495#1.offset := read~$Pointer$(hp100_rx_~lp~13#1.base, 105 + hp100_rx_~lp~13#1.offset, 8);assume { :begin_inline_readl } true;readl_#in~addr#1.base, readl_#in~addr#1.offset := hp100_rx_#t~mem495#1.base, hp100_rx_#t~mem495#1.offset;havoc readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;readl_~addr#1.base, readl_~addr#1.offset := readl_#in~addr#1.base, readl_#in~addr#1.offset;havoc readl_~ret~0#1;readl_#res#1 := readl_~ret~0#1; {13009#false} is VALID [2022-02-20 22:28:16,804 INFO L290 TraceCheckUtils]: 159: Hoare triple {13009#false} hp100_rx_#t~ret496#1 := readl_#res#1;assume { :end_inline_readl } true;hp100_rx_~header~0#1 := hp100_rx_#t~ret496#1;havoc hp100_rx_#t~mem495#1.base, hp100_rx_#t~mem495#1.offset;havoc hp100_rx_#t~ret496#1; {13009#false} is VALID [2022-02-20 22:28:16,804 INFO L290 TraceCheckUtils]: 160: Hoare triple {13009#false} assume 0 == (if (3 + (if 0 == hp100_rx_~header~0#1 then 0 else (if 1 == hp100_rx_~header~0#1 then 1 else ~bitwiseAnd(hp100_rx_~header~0#1, 8191)))) % 4294967296 % 4294967296 <= 2147483647 then (3 + (if 0 == hp100_rx_~header~0#1 then 0 else (if 1 == hp100_rx_~header~0#1 then 1 else ~bitwiseAnd(hp100_rx_~header~0#1, 8191)))) % 4294967296 % 4294967296 else (3 + (if 0 == hp100_rx_~header~0#1 then 0 else (if 1 == hp100_rx_~header~0#1 then 1 else ~bitwiseAnd(hp100_rx_~header~0#1, 8191)))) % 4294967296 % 4294967296 - 4294967296);hp100_rx_~pkt_len~0#1 := 0; {13009#false} is VALID [2022-02-20 22:28:16,804 INFO L272 TraceCheckUtils]: 161: Hoare triple {13009#false} call hp100_rx_#t~ret499#1.base, hp100_rx_#t~ret499#1.offset := netdev_alloc_skb(hp100_rx_~dev#1.base, hp100_rx_~dev#1.offset, 2 + hp100_rx_~pkt_len~0#1); {13009#false} is VALID [2022-02-20 22:28:16,804 INFO L290 TraceCheckUtils]: 162: Hoare triple {13009#false} ~dev#1.base, ~dev#1.offset := #in~dev#1.base, #in~dev#1.offset;~length#1 := #in~length#1;havoc ~tmp~17#1.base, ~tmp~17#1.offset;assume { :begin_inline_ldv___netdev_alloc_skb_31 } true;ldv___netdev_alloc_skb_31_#in~ldv_func_arg1#1.base, ldv___netdev_alloc_skb_31_#in~ldv_func_arg1#1.offset, ldv___netdev_alloc_skb_31_#in~ldv_func_arg2#1, ldv___netdev_alloc_skb_31_#in~flags#1 := ~dev#1.base, ~dev#1.offset, ~length#1, 32;havoc ldv___netdev_alloc_skb_31_#res#1.base, ldv___netdev_alloc_skb_31_#res#1.offset;havoc ldv___netdev_alloc_skb_31_#t~ret803#1.base, ldv___netdev_alloc_skb_31_#t~ret803#1.offset, ldv___netdev_alloc_skb_31_~ldv_func_arg1#1.base, ldv___netdev_alloc_skb_31_~ldv_func_arg1#1.offset, ldv___netdev_alloc_skb_31_~ldv_func_arg2#1, ldv___netdev_alloc_skb_31_~flags#1, ldv___netdev_alloc_skb_31_~tmp~64#1.base, ldv___netdev_alloc_skb_31_~tmp~64#1.offset;ldv___netdev_alloc_skb_31_~ldv_func_arg1#1.base, ldv___netdev_alloc_skb_31_~ldv_func_arg1#1.offset := ldv___netdev_alloc_skb_31_#in~ldv_func_arg1#1.base, ldv___netdev_alloc_skb_31_#in~ldv_func_arg1#1.offset;ldv___netdev_alloc_skb_31_~ldv_func_arg2#1 := ldv___netdev_alloc_skb_31_#in~ldv_func_arg2#1;ldv___netdev_alloc_skb_31_~flags#1 := ldv___netdev_alloc_skb_31_#in~flags#1;havoc ldv___netdev_alloc_skb_31_~tmp~64#1.base, ldv___netdev_alloc_skb_31_~tmp~64#1.offset; {13009#false} is VALID [2022-02-20 22:28:16,805 INFO L272 TraceCheckUtils]: 163: Hoare triple {13009#false} call ldv_check_alloc_flags(ldv___netdev_alloc_skb_31_~flags#1); {13009#false} is VALID [2022-02-20 22:28:16,805 INFO L290 TraceCheckUtils]: 164: Hoare triple {13009#false} ~flags := #in~flags; {13009#false} is VALID [2022-02-20 22:28:16,805 INFO L290 TraceCheckUtils]: 165: Hoare triple {13009#false} assume 0 != ~ldv_spin~0 && 0 != (if 0 == ~flags then 0 else (if 1 == ~flags then 0 else ~bitwiseAnd(~flags, 16))) % 4294967296; {13009#false} is VALID [2022-02-20 22:28:16,805 INFO L272 TraceCheckUtils]: 166: Hoare triple {13009#false} call ldv_error(); {13009#false} is VALID [2022-02-20 22:28:16,805 INFO L290 TraceCheckUtils]: 167: Hoare triple {13009#false} assume !false; {13009#false} is VALID [2022-02-20 22:28:16,806 INFO L134 CoverageAnalysis]: Checked inductivity of 152 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 152 trivial. 0 not checked. [2022-02-20 22:28:16,806 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:28:16,806 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1106233442] [2022-02-20 22:28:16,806 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1106233442] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:28:16,807 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 22:28:16,807 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2022-02-20 22:28:16,807 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1380523175] [2022-02-20 22:28:16,807 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:28:16,809 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 7.777777777777778) internal successors, (70), 4 states have internal predecessors, (70), 3 states have call successors, (20), 7 states have call predecessors, (20), 1 states have return successors, (16), 3 states have call predecessors, (16), 3 states have call successors, (16) Word has length 168 [2022-02-20 22:28:16,809 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:28:16,810 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 9 states, 9 states have (on average 7.777777777777778) internal successors, (70), 4 states have internal predecessors, (70), 3 states have call successors, (20), 7 states have call predecessors, (20), 1 states have return successors, (16), 3 states have call predecessors, (16), 3 states have call successors, (16) [2022-02-20 22:28:16,898 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 106 edges. 106 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:28:16,899 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-02-20 22:28:16,899 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:28:16,899 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-02-20 22:28:16,900 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2022-02-20 22:28:16,900 INFO L87 Difference]: Start difference. First operand 1661 states and 2477 transitions. Second operand has 9 states, 9 states have (on average 7.777777777777778) internal successors, (70), 4 states have internal predecessors, (70), 3 states have call successors, (20), 7 states have call predecessors, (20), 1 states have return successors, (16), 3 states have call predecessors, (16), 3 states have call successors, (16)