./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/ldv-linux-4.2-rc1/linux-4.2-rc1.tar.xz-43_2a-drivers--net--ethernet--packetengines--hamachi.ko-entry_point.cil.out.i --full-output -ea --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 03d7b7b3 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -ea -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/ldv-linux-4.2-rc1/linux-4.2-rc1.tar.xz-43_2a-drivers--net--ethernet--packetengines--hamachi.ko-entry_point.cil.out.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 375c8b791fa06d541fb014bd5076ab9979e5fb4b76e2515aaac1f292cd2a1d79 --- Real Ultimate output --- This is Ultimate 0.2.2-dev-03d7b7b [2022-02-20 22:28:37,710 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-02-20 22:28:37,711 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-02-20 22:28:37,742 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-02-20 22:28:37,743 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-02-20 22:28:37,746 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-02-20 22:28:37,747 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-02-20 22:28:37,748 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-02-20 22:28:37,751 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-02-20 22:28:37,752 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-02-20 22:28:37,753 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-02-20 22:28:37,754 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-02-20 22:28:37,755 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-02-20 22:28:37,758 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-02-20 22:28:37,759 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-02-20 22:28:37,760 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-02-20 22:28:37,761 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-02-20 22:28:37,762 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-02-20 22:28:37,762 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-02-20 22:28:37,765 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-02-20 22:28:37,767 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-02-20 22:28:37,768 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-02-20 22:28:37,769 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-02-20 22:28:37,769 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-02-20 22:28:37,771 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-02-20 22:28:37,774 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-02-20 22:28:37,774 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-02-20 22:28:37,774 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-02-20 22:28:37,775 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-02-20 22:28:37,776 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-02-20 22:28:37,776 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-02-20 22:28:37,777 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-02-20 22:28:37,777 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-02-20 22:28:37,778 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-02-20 22:28:37,779 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-02-20 22:28:37,779 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-02-20 22:28:37,780 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-02-20 22:28:37,780 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-02-20 22:28:37,780 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-02-20 22:28:37,781 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-02-20 22:28:37,782 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-02-20 22:28:37,782 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2022-02-20 22:28:37,803 INFO L113 SettingsManager]: Loading preferences was successful [2022-02-20 22:28:37,805 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-02-20 22:28:37,805 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-02-20 22:28:37,805 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-02-20 22:28:37,806 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-02-20 22:28:37,806 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-02-20 22:28:37,806 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-02-20 22:28:37,807 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-02-20 22:28:37,807 INFO L138 SettingsManager]: * Use SBE=true [2022-02-20 22:28:37,807 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-02-20 22:28:37,807 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-02-20 22:28:37,808 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-02-20 22:28:37,808 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-02-20 22:28:37,808 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-02-20 22:28:37,808 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-02-20 22:28:37,808 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-02-20 22:28:37,808 INFO L138 SettingsManager]: * Use constant arrays=true [2022-02-20 22:28:37,808 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-02-20 22:28:37,808 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-02-20 22:28:37,809 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-02-20 22:28:37,809 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-02-20 22:28:37,809 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-02-20 22:28:37,809 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-02-20 22:28:37,809 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-02-20 22:28:37,809 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-02-20 22:28:37,809 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-02-20 22:28:37,810 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-02-20 22:28:37,810 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2022-02-20 22:28:37,810 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2022-02-20 22:28:37,810 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-02-20 22:28:37,810 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 375c8b791fa06d541fb014bd5076ab9979e5fb4b76e2515aaac1f292cd2a1d79 [2022-02-20 22:28:37,972 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-02-20 22:28:37,998 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-02-20 22:28:38,000 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-02-20 22:28:38,000 INFO L271 PluginConnector]: Initializing CDTParser... [2022-02-20 22:28:38,001 INFO L275 PluginConnector]: CDTParser initialized [2022-02-20 22:28:38,002 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/ldv-linux-4.2-rc1/linux-4.2-rc1.tar.xz-43_2a-drivers--net--ethernet--packetengines--hamachi.ko-entry_point.cil.out.i [2022-02-20 22:28:38,064 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/0c04d3899/51606ba391dd4848b57e7f2975c2b5a1/FLAG48aec6373 [2022-02-20 22:28:38,719 INFO L306 CDTParser]: Found 1 translation units. [2022-02-20 22:28:38,720 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.2-rc1/linux-4.2-rc1.tar.xz-43_2a-drivers--net--ethernet--packetengines--hamachi.ko-entry_point.cil.out.i [2022-02-20 22:28:38,765 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/0c04d3899/51606ba391dd4848b57e7f2975c2b5a1/FLAG48aec6373 [2022-02-20 22:28:39,083 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/0c04d3899/51606ba391dd4848b57e7f2975c2b5a1 [2022-02-20 22:28:39,086 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-02-20 22:28:39,088 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-02-20 22:28:39,090 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-02-20 22:28:39,090 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-02-20 22:28:39,093 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-02-20 22:28:39,094 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.02 10:28:39" (1/1) ... [2022-02-20 22:28:39,095 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@69394332 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:28:39, skipping insertion in model container [2022-02-20 22:28:39,095 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.02 10:28:39" (1/1) ... [2022-02-20 22:28:39,100 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-02-20 22:28:39,198 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-02-20 22:28:40,500 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.2-rc1/linux-4.2-rc1.tar.xz-43_2a-drivers--net--ethernet--packetengines--hamachi.ko-entry_point.cil.out.i[258653,258666] [2022-02-20 22:28:40,553 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-20 22:28:40,622 INFO L203 MainTranslator]: Completed pre-run [2022-02-20 22:28:40,907 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.2-rc1/linux-4.2-rc1.tar.xz-43_2a-drivers--net--ethernet--packetengines--hamachi.ko-entry_point.cil.out.i[258653,258666] [2022-02-20 22:28:40,914 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-20 22:28:41,009 INFO L208 MainTranslator]: Completed translation [2022-02-20 22:28:41,009 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:28:41 WrapperNode [2022-02-20 22:28:41,010 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-02-20 22:28:41,011 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-02-20 22:28:41,012 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-02-20 22:28:41,012 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-02-20 22:28:41,017 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:28:41" (1/1) ... [2022-02-20 22:28:41,085 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:28:41" (1/1) ... [2022-02-20 22:28:41,220 INFO L137 Inliner]: procedures = 226, calls = 1428, calls flagged for inlining = 121, calls inlined = 118, statements flattened = 3926 [2022-02-20 22:28:41,220 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-02-20 22:28:41,221 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-02-20 22:28:41,221 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-02-20 22:28:41,221 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-02-20 22:28:41,227 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:28:41" (1/1) ... [2022-02-20 22:28:41,227 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:28:41" (1/1) ... [2022-02-20 22:28:41,249 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:28:41" (1/1) ... [2022-02-20 22:28:41,250 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:28:41" (1/1) ... [2022-02-20 22:28:41,357 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:28:41" (1/1) ... [2022-02-20 22:28:41,369 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:28:41" (1/1) ... [2022-02-20 22:28:41,383 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:28:41" (1/1) ... [2022-02-20 22:28:41,405 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-02-20 22:28:41,406 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-02-20 22:28:41,407 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-02-20 22:28:41,407 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-02-20 22:28:41,408 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:28:41" (1/1) ... [2022-02-20 22:28:41,414 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-02-20 22:28:41,422 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-20 22:28:41,442 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-02-20 22:28:41,460 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-02-20 22:28:41,478 INFO L130 BoogieDeclarations]: Found specification of procedure hamachi_get_drvinfo [2022-02-20 22:28:41,479 INFO L138 BoogieDeclarations]: Found implementation of procedure hamachi_get_drvinfo [2022-02-20 22:28:41,479 INFO L130 BoogieDeclarations]: Found specification of procedure check_if_running [2022-02-20 22:28:41,479 INFO L138 BoogieDeclarations]: Found implementation of procedure check_if_running [2022-02-20 22:28:41,479 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2022-02-20 22:28:41,479 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2022-02-20 22:28:41,479 INFO L130 BoogieDeclarations]: Found specification of procedure pci_release_regions [2022-02-20 22:28:41,479 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_release_regions [2022-02-20 22:28:41,480 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_stop [2022-02-20 22:28:41,480 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_stop [2022-02-20 22:28:41,480 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.meminit [2022-02-20 22:28:41,480 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.meminit [2022-02-20 22:28:41,480 INFO L130 BoogieDeclarations]: Found specification of procedure netdev_alloc_skb [2022-02-20 22:28:41,480 INFO L138 BoogieDeclarations]: Found implementation of procedure netdev_alloc_skb [2022-02-20 22:28:41,480 INFO L130 BoogieDeclarations]: Found specification of procedure netif_wake_queue [2022-02-20 22:28:41,480 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_wake_queue [2022-02-20 22:28:41,480 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_spin_lock [2022-02-20 22:28:41,481 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_spin_lock [2022-02-20 22:28:41,481 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2022-02-20 22:28:41,481 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2022-02-20 22:28:41,481 INFO L130 BoogieDeclarations]: Found specification of procedure pci_dma_sync_single_for_cpu [2022-02-20 22:28:41,481 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_dma_sync_single_for_cpu [2022-02-20 22:28:41,481 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_error [2022-02-20 22:28:41,481 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_error [2022-02-20 22:28:41,481 INFO L130 BoogieDeclarations]: Found specification of procedure pci_map_single [2022-02-20 22:28:41,481 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_map_single [2022-02-20 22:28:41,482 INFO L130 BoogieDeclarations]: Found specification of procedure valid_dma_direction [2022-02-20 22:28:41,482 INFO L138 BoogieDeclarations]: Found implementation of procedure valid_dma_direction [2022-02-20 22:28:41,482 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2022-02-20 22:28:41,482 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2022-02-20 22:28:41,482 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2022-02-20 22:28:41,482 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2022-02-20 22:28:41,482 INFO L130 BoogieDeclarations]: Found specification of procedure netif_stop_queue [2022-02-20 22:28:41,482 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_stop_queue [2022-02-20 22:28:41,482 INFO L130 BoogieDeclarations]: Found specification of procedure pci_alloc_consistent [2022-02-20 22:28:41,483 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_alloc_consistent [2022-02-20 22:28:41,483 INFO L130 BoogieDeclarations]: Found specification of procedure consume_skb [2022-02-20 22:28:41,483 INFO L138 BoogieDeclarations]: Found implementation of procedure consume_skb [2022-02-20 22:28:41,483 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-02-20 22:28:41,483 INFO L130 BoogieDeclarations]: Found specification of procedure netif_running [2022-02-20 22:28:41,483 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_running [2022-02-20 22:28:41,483 INFO L130 BoogieDeclarations]: Found specification of procedure eth_mac_addr [2022-02-20 22:28:41,484 INFO L138 BoogieDeclarations]: Found implementation of procedure eth_mac_addr [2022-02-20 22:28:41,484 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-02-20 22:28:41,484 INFO L130 BoogieDeclarations]: Found specification of procedure add_timer [2022-02-20 22:28:41,484 INFO L138 BoogieDeclarations]: Found implementation of procedure add_timer [2022-02-20 22:28:41,484 INFO L130 BoogieDeclarations]: Found specification of procedure strlcpy [2022-02-20 22:28:41,484 INFO L138 BoogieDeclarations]: Found implementation of procedure strlcpy [2022-02-20 22:28:41,484 INFO L130 BoogieDeclarations]: Found specification of procedure eth_validate_addr [2022-02-20 22:28:41,484 INFO L138 BoogieDeclarations]: Found implementation of procedure eth_validate_addr [2022-02-20 22:28:41,485 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_spin_unlock [2022-02-20 22:28:41,485 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_spin_unlock [2022-02-20 22:28:41,485 INFO L130 BoogieDeclarations]: Found specification of procedure pci_unmap_single [2022-02-20 22:28:41,485 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_unmap_single [2022-02-20 22:28:41,485 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-02-20 22:28:41,486 INFO L130 BoogieDeclarations]: Found specification of procedure iounmap [2022-02-20 22:28:41,486 INFO L138 BoogieDeclarations]: Found implementation of procedure iounmap [2022-02-20 22:28:41,486 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2022-02-20 22:28:41,487 INFO L130 BoogieDeclarations]: Found specification of procedure __fswab16 [2022-02-20 22:28:41,487 INFO L138 BoogieDeclarations]: Found implementation of procedure __fswab16 [2022-02-20 22:28:41,487 INFO L130 BoogieDeclarations]: Found specification of procedure eth_change_mtu [2022-02-20 22:28:41,487 INFO L138 BoogieDeclarations]: Found implementation of procedure eth_change_mtu [2022-02-20 22:28:41,487 INFO L130 BoogieDeclarations]: Found specification of procedure netdev_priv [2022-02-20 22:28:41,487 INFO L138 BoogieDeclarations]: Found implementation of procedure netdev_priv [2022-02-20 22:28:41,488 INFO L130 BoogieDeclarations]: Found specification of procedure netdev_get_tx_queue [2022-02-20 22:28:41,488 INFO L138 BoogieDeclarations]: Found implementation of procedure netdev_get_tx_queue [2022-02-20 22:28:41,488 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~int [2022-02-20 22:28:41,488 INFO L130 BoogieDeclarations]: Found specification of procedure get_dma_ops [2022-02-20 22:28:41,488 INFO L138 BoogieDeclarations]: Found implementation of procedure get_dma_ops [2022-02-20 22:28:41,488 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2022-02-20 22:28:41,488 INFO L130 BoogieDeclarations]: Found specification of procedure skb_reserve [2022-02-20 22:28:41,489 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_reserve [2022-02-20 22:28:41,489 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-02-20 22:28:41,489 INFO L130 BoogieDeclarations]: Found specification of procedure set_rx_mode [2022-02-20 22:28:41,489 INFO L138 BoogieDeclarations]: Found implementation of procedure set_rx_mode [2022-02-20 22:28:41,489 INFO L130 BoogieDeclarations]: Found specification of procedure free_netdev [2022-02-20 22:28:41,489 INFO L138 BoogieDeclarations]: Found implementation of procedure free_netdev [2022-02-20 22:28:41,489 INFO L130 BoogieDeclarations]: Found specification of procedure __phys_addr [2022-02-20 22:28:41,490 INFO L138 BoogieDeclarations]: Found implementation of procedure __phys_addr [2022-02-20 22:28:41,490 INFO L130 BoogieDeclarations]: Found specification of procedure netdev_ioctl [2022-02-20 22:28:41,490 INFO L138 BoogieDeclarations]: Found implementation of procedure netdev_ioctl [2022-02-20 22:28:41,490 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_alloc_flags [2022-02-20 22:28:41,490 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_check_alloc_flags [2022-02-20 22:28:41,490 INFO L130 BoogieDeclarations]: Found specification of procedure pci_free_consistent [2022-02-20 22:28:41,490 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_free_consistent [2022-02-20 22:28:41,490 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-02-20 22:28:41,490 INFO L130 BoogieDeclarations]: Found specification of procedure spin_unlock_irq [2022-02-20 22:28:41,490 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_unlock_irq [2022-02-20 22:28:41,491 INFO L130 BoogieDeclarations]: Found specification of procedure ldv__builtin_expect [2022-02-20 22:28:41,491 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv__builtin_expect [2022-02-20 22:28:41,491 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_init_zalloc [2022-02-20 22:28:41,491 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_init_zalloc [2022-02-20 22:28:41,491 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-02-20 22:28:41,492 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_memset [2022-02-20 22:28:41,492 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_memset [2022-02-20 22:28:41,492 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-02-20 22:28:41,492 INFO L130 BoogieDeclarations]: Found specification of procedure __const_udelay [2022-02-20 22:28:41,492 INFO L138 BoogieDeclarations]: Found implementation of procedure __const_udelay [2022-02-20 22:28:41,493 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-02-20 22:28:41,493 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_irq_1 [2022-02-20 22:28:41,493 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_irq_1 [2022-02-20 22:28:41,494 INFO L130 BoogieDeclarations]: Found specification of procedure hamachi_get_stats [2022-02-20 22:28:41,494 INFO L138 BoogieDeclarations]: Found implementation of procedure hamachi_get_stats [2022-02-20 22:28:41,494 INFO L130 BoogieDeclarations]: Found specification of procedure reg_timer_2 [2022-02-20 22:28:41,494 INFO L138 BoogieDeclarations]: Found implementation of procedure reg_timer_2 [2022-02-20 22:28:41,494 INFO L130 BoogieDeclarations]: Found specification of procedure spin_lock_irq [2022-02-20 22:28:41,494 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_lock_irq [2022-02-20 22:28:41,494 INFO L130 BoogieDeclarations]: Found specification of procedure hamachi_tx_timeout [2022-02-20 22:28:41,494 INFO L138 BoogieDeclarations]: Found implementation of procedure hamachi_tx_timeout [2022-02-20 22:28:41,494 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~~dma_addr_t~0~X~int~X~int~TO~VOID [2022-02-20 22:28:41,494 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~~dma_addr_t~0~X~int~X~int~TO~VOID [2022-02-20 22:28:41,495 INFO L130 BoogieDeclarations]: Found specification of procedure skb_put [2022-02-20 22:28:41,495 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_put [2022-02-20 22:28:41,495 INFO L130 BoogieDeclarations]: Found specification of procedure readw [2022-02-20 22:28:41,495 INFO L138 BoogieDeclarations]: Found implementation of procedure readw [2022-02-20 22:28:41,495 INFO L130 BoogieDeclarations]: Found specification of procedure readl [2022-02-20 22:28:41,495 INFO L138 BoogieDeclarations]: Found implementation of procedure readl [2022-02-20 22:28:41,495 INFO L130 BoogieDeclarations]: Found specification of procedure writel [2022-02-20 22:28:41,496 INFO L138 BoogieDeclarations]: Found implementation of procedure writel [2022-02-20 22:28:41,496 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-02-20 22:28:41,498 INFO L130 BoogieDeclarations]: Found specification of procedure writeb [2022-02-20 22:28:41,498 INFO L138 BoogieDeclarations]: Found implementation of procedure writeb [2022-02-20 22:28:41,498 INFO L130 BoogieDeclarations]: Found specification of procedure writew [2022-02-20 22:28:41,498 INFO L138 BoogieDeclarations]: Found implementation of procedure writew [2022-02-20 22:28:41,499 INFO L130 BoogieDeclarations]: Found specification of procedure mdio_read [2022-02-20 22:28:41,500 INFO L138 BoogieDeclarations]: Found implementation of procedure mdio_read [2022-02-20 22:28:41,500 INFO L130 BoogieDeclarations]: Found specification of procedure readb [2022-02-20 22:28:41,500 INFO L138 BoogieDeclarations]: Found implementation of procedure readb [2022-02-20 22:28:41,500 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-02-20 22:28:41,503 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-02-20 22:28:41,991 INFO L234 CfgBuilder]: Building ICFG [2022-02-20 22:28:41,993 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-02-20 22:28:42,775 INFO L766 $ProcedureCfgBuilder]: dead code at ProgramPoint ldv_stopFINAL: assume true; [2022-02-20 22:28:44,364 INFO L275 CfgBuilder]: Performing block encoding [2022-02-20 22:28:44,377 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-02-20 22:28:44,377 INFO L299 CfgBuilder]: Removed 0 assume(true) statements. [2022-02-20 22:28:44,379 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 10:28:44 BoogieIcfgContainer [2022-02-20 22:28:44,379 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-02-20 22:28:44,380 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-02-20 22:28:44,381 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-02-20 22:28:44,385 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-02-20 22:28:44,385 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 20.02 10:28:39" (1/3) ... [2022-02-20 22:28:44,386 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@334d2869 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.02 10:28:44, skipping insertion in model container [2022-02-20 22:28:44,386 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:28:41" (2/3) ... [2022-02-20 22:28:44,386 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@334d2869 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.02 10:28:44, skipping insertion in model container [2022-02-20 22:28:44,386 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 10:28:44" (3/3) ... [2022-02-20 22:28:44,387 INFO L111 eAbstractionObserver]: Analyzing ICFG linux-4.2-rc1.tar.xz-43_2a-drivers--net--ethernet--packetengines--hamachi.ko-entry_point.cil.out.i [2022-02-20 22:28:44,391 INFO L205 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-02-20 22:28:44,391 INFO L164 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-02-20 22:28:44,425 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-02-20 22:28:44,429 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2022-02-20 22:28:44,430 INFO L340 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-02-20 22:28:44,464 INFO L276 IsEmpty]: Start isEmpty. Operand has 1238 states, 895 states have (on average 1.3743016759776536) internal successors, (1230), 923 states have internal predecessors, (1230), 285 states have call successors, (285), 57 states have call predecessors, (285), 56 states have return successors, (277), 267 states have call predecessors, (277), 277 states have call successors, (277) [2022-02-20 22:28:44,485 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 163 [2022-02-20 22:28:44,486 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:28:44,486 INFO L514 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:28:44,487 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:28:44,490 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:28:44,491 INFO L85 PathProgramCache]: Analyzing trace with hash 1879216522, now seen corresponding path program 1 times [2022-02-20 22:28:44,497 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:28:44,497 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1116317708] [2022-02-20 22:28:44,497 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:28:44,498 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:28:44,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:44,984 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 22:28:44,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:44,999 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:28:45,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:45,009 INFO L290 TraceCheckUtils]: 0: Hoare triple {1360#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {1241#true} is VALID [2022-02-20 22:28:45,010 INFO L290 TraceCheckUtils]: 1: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,010 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1241#true} {1241#true} #3100#return; {1241#true} is VALID [2022-02-20 22:28:45,011 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:28:45,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:45,017 INFO L290 TraceCheckUtils]: 0: Hoare triple {1241#true} ~cond := #in~cond; {1241#true} is VALID [2022-02-20 22:28:45,018 INFO L290 TraceCheckUtils]: 1: Hoare triple {1241#true} assume !(0 == ~cond); {1241#true} is VALID [2022-02-20 22:28:45,018 INFO L290 TraceCheckUtils]: 2: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,018 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1241#true} {1241#true} #3102#return; {1241#true} is VALID [2022-02-20 22:28:45,018 INFO L290 TraceCheckUtils]: 0: Hoare triple {1352#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {1241#true} is VALID [2022-02-20 22:28:45,019 INFO L272 TraceCheckUtils]: 1: Hoare triple {1241#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {1360#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:28:45,020 INFO L290 TraceCheckUtils]: 2: Hoare triple {1360#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {1241#true} is VALID [2022-02-20 22:28:45,020 INFO L290 TraceCheckUtils]: 3: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,020 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {1241#true} {1241#true} #3100#return; {1241#true} is VALID [2022-02-20 22:28:45,020 INFO L290 TraceCheckUtils]: 5: Hoare triple {1241#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {1241#true} is VALID [2022-02-20 22:28:45,020 INFO L272 TraceCheckUtils]: 6: Hoare triple {1241#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {1241#true} is VALID [2022-02-20 22:28:45,021 INFO L290 TraceCheckUtils]: 7: Hoare triple {1241#true} ~cond := #in~cond; {1241#true} is VALID [2022-02-20 22:28:45,021 INFO L290 TraceCheckUtils]: 8: Hoare triple {1241#true} assume !(0 == ~cond); {1241#true} is VALID [2022-02-20 22:28:45,021 INFO L290 TraceCheckUtils]: 9: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,021 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {1241#true} {1241#true} #3102#return; {1241#true} is VALID [2022-02-20 22:28:45,021 INFO L290 TraceCheckUtils]: 11: Hoare triple {1241#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {1241#true} is VALID [2022-02-20 22:28:45,021 INFO L290 TraceCheckUtils]: 12: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,022 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {1241#true} {1241#true} #3120#return; {1241#true} is VALID [2022-02-20 22:28:45,022 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 18 [2022-02-20 22:28:45,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:45,032 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:28:45,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:45,039 INFO L290 TraceCheckUtils]: 0: Hoare triple {1360#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {1241#true} is VALID [2022-02-20 22:28:45,039 INFO L290 TraceCheckUtils]: 1: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,039 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1241#true} {1241#true} #3100#return; {1241#true} is VALID [2022-02-20 22:28:45,040 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:28:45,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:45,047 INFO L290 TraceCheckUtils]: 0: Hoare triple {1241#true} ~cond := #in~cond; {1241#true} is VALID [2022-02-20 22:28:45,048 INFO L290 TraceCheckUtils]: 1: Hoare triple {1241#true} assume !(0 == ~cond); {1241#true} is VALID [2022-02-20 22:28:45,048 INFO L290 TraceCheckUtils]: 2: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,048 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1241#true} {1241#true} #3102#return; {1241#true} is VALID [2022-02-20 22:28:45,048 INFO L290 TraceCheckUtils]: 0: Hoare triple {1352#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {1241#true} is VALID [2022-02-20 22:28:45,049 INFO L272 TraceCheckUtils]: 1: Hoare triple {1241#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {1360#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:28:45,049 INFO L290 TraceCheckUtils]: 2: Hoare triple {1360#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {1241#true} is VALID [2022-02-20 22:28:45,049 INFO L290 TraceCheckUtils]: 3: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,050 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {1241#true} {1241#true} #3100#return; {1241#true} is VALID [2022-02-20 22:28:45,050 INFO L290 TraceCheckUtils]: 5: Hoare triple {1241#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {1241#true} is VALID [2022-02-20 22:28:45,050 INFO L272 TraceCheckUtils]: 6: Hoare triple {1241#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {1241#true} is VALID [2022-02-20 22:28:45,050 INFO L290 TraceCheckUtils]: 7: Hoare triple {1241#true} ~cond := #in~cond; {1241#true} is VALID [2022-02-20 22:28:45,050 INFO L290 TraceCheckUtils]: 8: Hoare triple {1241#true} assume !(0 == ~cond); {1241#true} is VALID [2022-02-20 22:28:45,050 INFO L290 TraceCheckUtils]: 9: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,051 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {1241#true} {1241#true} #3102#return; {1241#true} is VALID [2022-02-20 22:28:45,051 INFO L290 TraceCheckUtils]: 11: Hoare triple {1241#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {1241#true} is VALID [2022-02-20 22:28:45,051 INFO L290 TraceCheckUtils]: 12: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,051 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {1241#true} {1241#true} #3122#return; {1241#true} is VALID [2022-02-20 22:28:45,051 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 34 [2022-02-20 22:28:45,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:45,061 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:28:45,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:45,067 INFO L290 TraceCheckUtils]: 0: Hoare triple {1360#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {1241#true} is VALID [2022-02-20 22:28:45,068 INFO L290 TraceCheckUtils]: 1: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,068 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1241#true} {1241#true} #3100#return; {1241#true} is VALID [2022-02-20 22:28:45,068 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:28:45,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:45,080 INFO L290 TraceCheckUtils]: 0: Hoare triple {1241#true} ~cond := #in~cond; {1241#true} is VALID [2022-02-20 22:28:45,080 INFO L290 TraceCheckUtils]: 1: Hoare triple {1241#true} assume !(0 == ~cond); {1241#true} is VALID [2022-02-20 22:28:45,083 INFO L290 TraceCheckUtils]: 2: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,083 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1241#true} {1241#true} #3102#return; {1241#true} is VALID [2022-02-20 22:28:45,085 INFO L290 TraceCheckUtils]: 0: Hoare triple {1352#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {1241#true} is VALID [2022-02-20 22:28:45,086 INFO L272 TraceCheckUtils]: 1: Hoare triple {1241#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {1360#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:28:45,086 INFO L290 TraceCheckUtils]: 2: Hoare triple {1360#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {1241#true} is VALID [2022-02-20 22:28:45,086 INFO L290 TraceCheckUtils]: 3: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,087 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {1241#true} {1241#true} #3100#return; {1241#true} is VALID [2022-02-20 22:28:45,087 INFO L290 TraceCheckUtils]: 5: Hoare triple {1241#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {1241#true} is VALID [2022-02-20 22:28:45,087 INFO L272 TraceCheckUtils]: 6: Hoare triple {1241#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {1241#true} is VALID [2022-02-20 22:28:45,087 INFO L290 TraceCheckUtils]: 7: Hoare triple {1241#true} ~cond := #in~cond; {1241#true} is VALID [2022-02-20 22:28:45,087 INFO L290 TraceCheckUtils]: 8: Hoare triple {1241#true} assume !(0 == ~cond); {1241#true} is VALID [2022-02-20 22:28:45,088 INFO L290 TraceCheckUtils]: 9: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,088 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {1241#true} {1241#true} #3102#return; {1241#true} is VALID [2022-02-20 22:28:45,088 INFO L290 TraceCheckUtils]: 11: Hoare triple {1241#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {1241#true} is VALID [2022-02-20 22:28:45,088 INFO L290 TraceCheckUtils]: 12: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,088 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {1241#true} {1241#true} #3124#return; {1241#true} is VALID [2022-02-20 22:28:45,089 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 50 [2022-02-20 22:28:45,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:45,104 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:28:45,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:45,111 INFO L290 TraceCheckUtils]: 0: Hoare triple {1360#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {1241#true} is VALID [2022-02-20 22:28:45,111 INFO L290 TraceCheckUtils]: 1: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,112 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1241#true} {1241#true} #3100#return; {1241#true} is VALID [2022-02-20 22:28:45,112 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:28:45,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:45,119 INFO L290 TraceCheckUtils]: 0: Hoare triple {1241#true} ~cond := #in~cond; {1241#true} is VALID [2022-02-20 22:28:45,119 INFO L290 TraceCheckUtils]: 1: Hoare triple {1241#true} assume !(0 == ~cond); {1241#true} is VALID [2022-02-20 22:28:45,119 INFO L290 TraceCheckUtils]: 2: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,119 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1241#true} {1241#true} #3102#return; {1241#true} is VALID [2022-02-20 22:28:45,120 INFO L290 TraceCheckUtils]: 0: Hoare triple {1352#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {1241#true} is VALID [2022-02-20 22:28:45,121 INFO L272 TraceCheckUtils]: 1: Hoare triple {1241#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {1360#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:28:45,121 INFO L290 TraceCheckUtils]: 2: Hoare triple {1360#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {1241#true} is VALID [2022-02-20 22:28:45,121 INFO L290 TraceCheckUtils]: 3: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,121 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {1241#true} {1241#true} #3100#return; {1241#true} is VALID [2022-02-20 22:28:45,122 INFO L290 TraceCheckUtils]: 5: Hoare triple {1241#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {1241#true} is VALID [2022-02-20 22:28:45,122 INFO L272 TraceCheckUtils]: 6: Hoare triple {1241#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {1241#true} is VALID [2022-02-20 22:28:45,122 INFO L290 TraceCheckUtils]: 7: Hoare triple {1241#true} ~cond := #in~cond; {1241#true} is VALID [2022-02-20 22:28:45,122 INFO L290 TraceCheckUtils]: 8: Hoare triple {1241#true} assume !(0 == ~cond); {1241#true} is VALID [2022-02-20 22:28:45,122 INFO L290 TraceCheckUtils]: 9: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,122 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {1241#true} {1241#true} #3102#return; {1241#true} is VALID [2022-02-20 22:28:45,123 INFO L290 TraceCheckUtils]: 11: Hoare triple {1241#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {1241#true} is VALID [2022-02-20 22:28:45,123 INFO L290 TraceCheckUtils]: 12: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,123 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {1241#true} {1241#true} #3126#return; {1241#true} is VALID [2022-02-20 22:28:45,123 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 66 [2022-02-20 22:28:45,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:45,133 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:28:45,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:45,140 INFO L290 TraceCheckUtils]: 0: Hoare triple {1360#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {1241#true} is VALID [2022-02-20 22:28:45,140 INFO L290 TraceCheckUtils]: 1: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,140 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1241#true} {1241#true} #3100#return; {1241#true} is VALID [2022-02-20 22:28:45,141 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:28:45,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:45,147 INFO L290 TraceCheckUtils]: 0: Hoare triple {1241#true} ~cond := #in~cond; {1241#true} is VALID [2022-02-20 22:28:45,147 INFO L290 TraceCheckUtils]: 1: Hoare triple {1241#true} assume !(0 == ~cond); {1241#true} is VALID [2022-02-20 22:28:45,147 INFO L290 TraceCheckUtils]: 2: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,147 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1241#true} {1241#true} #3102#return; {1241#true} is VALID [2022-02-20 22:28:45,147 INFO L290 TraceCheckUtils]: 0: Hoare triple {1352#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {1241#true} is VALID [2022-02-20 22:28:45,148 INFO L272 TraceCheckUtils]: 1: Hoare triple {1241#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {1360#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:28:45,148 INFO L290 TraceCheckUtils]: 2: Hoare triple {1360#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {1241#true} is VALID [2022-02-20 22:28:45,149 INFO L290 TraceCheckUtils]: 3: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,149 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {1241#true} {1241#true} #3100#return; {1241#true} is VALID [2022-02-20 22:28:45,149 INFO L290 TraceCheckUtils]: 5: Hoare triple {1241#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {1241#true} is VALID [2022-02-20 22:28:45,149 INFO L272 TraceCheckUtils]: 6: Hoare triple {1241#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {1241#true} is VALID [2022-02-20 22:28:45,149 INFO L290 TraceCheckUtils]: 7: Hoare triple {1241#true} ~cond := #in~cond; {1241#true} is VALID [2022-02-20 22:28:45,149 INFO L290 TraceCheckUtils]: 8: Hoare triple {1241#true} assume !(0 == ~cond); {1241#true} is VALID [2022-02-20 22:28:45,150 INFO L290 TraceCheckUtils]: 9: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,150 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {1241#true} {1241#true} #3102#return; {1241#true} is VALID [2022-02-20 22:28:45,150 INFO L290 TraceCheckUtils]: 11: Hoare triple {1241#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {1241#true} is VALID [2022-02-20 22:28:45,150 INFO L290 TraceCheckUtils]: 12: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,150 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {1241#true} {1241#true} #3128#return; {1241#true} is VALID [2022-02-20 22:28:45,151 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 82 [2022-02-20 22:28:45,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:45,160 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:28:45,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:45,167 INFO L290 TraceCheckUtils]: 0: Hoare triple {1360#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {1241#true} is VALID [2022-02-20 22:28:45,167 INFO L290 TraceCheckUtils]: 1: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,167 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1241#true} {1241#true} #3100#return; {1241#true} is VALID [2022-02-20 22:28:45,168 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:28:45,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:45,174 INFO L290 TraceCheckUtils]: 0: Hoare triple {1241#true} ~cond := #in~cond; {1241#true} is VALID [2022-02-20 22:28:45,174 INFO L290 TraceCheckUtils]: 1: Hoare triple {1241#true} assume !(0 == ~cond); {1241#true} is VALID [2022-02-20 22:28:45,174 INFO L290 TraceCheckUtils]: 2: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,174 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1241#true} {1241#true} #3102#return; {1241#true} is VALID [2022-02-20 22:28:45,175 INFO L290 TraceCheckUtils]: 0: Hoare triple {1352#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {1241#true} is VALID [2022-02-20 22:28:45,175 INFO L272 TraceCheckUtils]: 1: Hoare triple {1241#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {1360#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:28:45,176 INFO L290 TraceCheckUtils]: 2: Hoare triple {1360#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {1241#true} is VALID [2022-02-20 22:28:45,176 INFO L290 TraceCheckUtils]: 3: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,176 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {1241#true} {1241#true} #3100#return; {1241#true} is VALID [2022-02-20 22:28:45,176 INFO L290 TraceCheckUtils]: 5: Hoare triple {1241#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {1241#true} is VALID [2022-02-20 22:28:45,176 INFO L272 TraceCheckUtils]: 6: Hoare triple {1241#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {1241#true} is VALID [2022-02-20 22:28:45,176 INFO L290 TraceCheckUtils]: 7: Hoare triple {1241#true} ~cond := #in~cond; {1241#true} is VALID [2022-02-20 22:28:45,176 INFO L290 TraceCheckUtils]: 8: Hoare triple {1241#true} assume !(0 == ~cond); {1241#true} is VALID [2022-02-20 22:28:45,177 INFO L290 TraceCheckUtils]: 9: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,177 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {1241#true} {1241#true} #3102#return; {1241#true} is VALID [2022-02-20 22:28:45,177 INFO L290 TraceCheckUtils]: 11: Hoare triple {1241#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {1241#true} is VALID [2022-02-20 22:28:45,177 INFO L290 TraceCheckUtils]: 12: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,177 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {1241#true} {1241#true} #3130#return; {1241#true} is VALID [2022-02-20 22:28:45,183 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 99 [2022-02-20 22:28:45,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:45,191 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:28:45,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:45,198 INFO L290 TraceCheckUtils]: 0: Hoare triple {1396#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr788 := 0; {1241#true} is VALID [2022-02-20 22:28:45,198 INFO L290 TraceCheckUtils]: 1: Hoare triple {1241#true} assume !(#t~loopctr788 % 18446744073709551616 < #amount % 18446744073709551616); {1241#true} is VALID [2022-02-20 22:28:45,199 INFO L290 TraceCheckUtils]: 2: Hoare triple {1241#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1241#true} is VALID [2022-02-20 22:28:45,199 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1241#true} {1241#true} #3454#return; {1241#true} is VALID [2022-02-20 22:28:45,199 INFO L290 TraceCheckUtils]: 0: Hoare triple {1396#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {1241#true} is VALID [2022-02-20 22:28:45,200 INFO L272 TraceCheckUtils]: 1: Hoare triple {1241#true} call #t~memset~res15.base, #t~memset~res15.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, ~n); {1396#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:28:45,200 INFO L290 TraceCheckUtils]: 2: Hoare triple {1396#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr788 := 0; {1241#true} is VALID [2022-02-20 22:28:45,200 INFO L290 TraceCheckUtils]: 3: Hoare triple {1241#true} assume !(#t~loopctr788 % 18446744073709551616 < #amount % 18446744073709551616); {1241#true} is VALID [2022-02-20 22:28:45,200 INFO L290 TraceCheckUtils]: 4: Hoare triple {1241#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1241#true} is VALID [2022-02-20 22:28:45,200 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {1241#true} {1241#true} #3454#return; {1241#true} is VALID [2022-02-20 22:28:45,201 INFO L290 TraceCheckUtils]: 6: Hoare triple {1241#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res15.base, #t~memset~res15.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {1241#true} is VALID [2022-02-20 22:28:45,201 INFO L290 TraceCheckUtils]: 7: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,201 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {1241#true} {1241#true} #3132#return; {1241#true} is VALID [2022-02-20 22:28:45,201 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 110 [2022-02-20 22:28:45,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:45,213 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:28:45,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:45,220 INFO L290 TraceCheckUtils]: 0: Hoare triple {1396#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr788 := 0; {1241#true} is VALID [2022-02-20 22:28:45,220 INFO L290 TraceCheckUtils]: 1: Hoare triple {1241#true} assume !(#t~loopctr788 % 18446744073709551616 < #amount % 18446744073709551616); {1241#true} is VALID [2022-02-20 22:28:45,220 INFO L290 TraceCheckUtils]: 2: Hoare triple {1241#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1241#true} is VALID [2022-02-20 22:28:45,221 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1241#true} {1241#true} #3454#return; {1241#true} is VALID [2022-02-20 22:28:45,221 INFO L290 TraceCheckUtils]: 0: Hoare triple {1396#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {1241#true} is VALID [2022-02-20 22:28:45,222 INFO L272 TraceCheckUtils]: 1: Hoare triple {1241#true} call #t~memset~res15.base, #t~memset~res15.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, ~n); {1396#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:28:45,222 INFO L290 TraceCheckUtils]: 2: Hoare triple {1396#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr788 := 0; {1241#true} is VALID [2022-02-20 22:28:45,222 INFO L290 TraceCheckUtils]: 3: Hoare triple {1241#true} assume !(#t~loopctr788 % 18446744073709551616 < #amount % 18446744073709551616); {1241#true} is VALID [2022-02-20 22:28:45,222 INFO L290 TraceCheckUtils]: 4: Hoare triple {1241#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1241#true} is VALID [2022-02-20 22:28:45,223 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {1241#true} {1241#true} #3454#return; {1241#true} is VALID [2022-02-20 22:28:45,223 INFO L290 TraceCheckUtils]: 6: Hoare triple {1241#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res15.base, #t~memset~res15.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {1241#true} is VALID [2022-02-20 22:28:45,223 INFO L290 TraceCheckUtils]: 7: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,223 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {1241#true} {1241#true} #3134#return; {1241#true} is VALID [2022-02-20 22:28:45,223 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 132 [2022-02-20 22:28:45,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:45,230 INFO L290 TraceCheckUtils]: 0: Hoare triple {1241#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3008 + ~dev.offset; {1241#true} is VALID [2022-02-20 22:28:45,231 INFO L290 TraceCheckUtils]: 1: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,231 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1241#true} {1242#false} #3190#return; {1242#false} is VALID [2022-02-20 22:28:45,231 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 145 [2022-02-20 22:28:45,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:28:45,238 INFO L290 TraceCheckUtils]: 0: Hoare triple {1241#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3008 + ~dev.offset; {1241#true} is VALID [2022-02-20 22:28:45,239 INFO L290 TraceCheckUtils]: 1: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,239 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1241#true} {1242#false} #3192#return; {1242#false} is VALID [2022-02-20 22:28:45,241 INFO L290 TraceCheckUtils]: 0: Hoare triple {1241#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(99, 2);call #Ultimate.allocInit(16, 3);call #Ultimate.allocInit(8, 4);call #Ultimate.allocInit(21, 5);call #Ultimate.allocInit(37, 6);call #Ultimate.allocInit(69, 7);call #Ultimate.allocInit(69, 8);call #Ultimate.allocInit(43, 9);call #Ultimate.allocInit(43, 10);call #Ultimate.allocInit(52, 11);call #Ultimate.allocInit(52, 12);call #Ultimate.allocInit(32, 13);call #Ultimate.allocInit(48, 14);call #Ultimate.allocInit(55, 15);call #Ultimate.allocInit(64, 16);call #Ultimate.allocInit(61, 17);call #Ultimate.allocInit(16, 18);call #Ultimate.allocInit(7, 19);call write~init~int(32, 19, 0, 1);call write~init~int(37, 19, 1, 1);call write~init~int(56, 19, 2, 1);call write~init~int(46, 19, 3, 1);call write~init~int(56, 19, 4, 1);call write~init~int(120, 19, 5, 1);call write~init~int(0, 19, 6, 1);call #Ultimate.allocInit(2, 20);call write~init~int(10, 20, 0, 1);call write~init~int(0, 20, 1, 1);call #Ultimate.allocInit(16, 21);call #Ultimate.allocInit(7, 22);call write~init~int(32, 22, 0, 1);call write~init~int(37, 22, 1, 1);call write~init~int(52, 22, 2, 1);call write~init~int(46, 22, 3, 1);call write~init~int(52, 22, 4, 1);call write~init~int(120, 22, 5, 1);call write~init~int(0, 22, 6, 1);call #Ultimate.allocInit(2, 23);call write~init~int(10, 23, 0, 1);call write~init~int(0, 23, 1, 1);call #Ultimate.allocInit(46, 24);call #Ultimate.allocInit(52, 25);call #Ultimate.allocInit(39, 26);call #Ultimate.allocInit(50, 27);call #Ultimate.allocInit(40, 28);call #Ultimate.allocInit(43, 29);call #Ultimate.allocInit(35, 30);call #Ultimate.allocInit(91, 31);call #Ultimate.allocInit(41, 32);call #Ultimate.allocInit(68, 33);call #Ultimate.allocInit(37, 34);call #Ultimate.allocInit(54, 35);call #Ultimate.allocInit(86, 36);call #Ultimate.allocInit(40, 37);call #Ultimate.allocInit(71, 38);call #Ultimate.allocInit(51, 39);call #Ultimate.allocInit(8, 40);call #Ultimate.allocInit(4, 41);call write~init~int(50, 41, 0, 1);call write~init~int(46, 41, 1, 1);call write~init~int(49, 41, 2, 1);call write~init~int(0, 41, 3, 1);call #Ultimate.allocInit(28, 42);call #Ultimate.allocInit(8, 43);call #Ultimate.allocInit(8, 44);~ldv_irq_1_3~0 := 0;~ldv_irq_data_1_1~0.base, ~ldv_irq_data_1_1~0.offset := 0, 0;~pci_counter~0 := 0;~ldv_irq_1_0~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_irq_data_1_0~0.base, ~ldv_irq_data_1_0~0.offset := 0, 0;~ethtool_ops_no_mii_group0~0.base, ~ethtool_ops_no_mii_group0~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_irq_data_1_3~0.base, ~ldv_irq_data_1_3~0.offset := 0, 0;~ethtool_ops_group1~0.base, ~ethtool_ops_group1~0.offset := 0, 0;~ldv_irq_data_1_2~0.base, ~ldv_irq_data_1_2~0.offset := 0, 0;~hamachi_netdev_ops_group1~0.base, ~hamachi_netdev_ops_group1~0.offset := 0, 0;~ldv_irq_1_2~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ethtool_ops_group0~0.base, ~ethtool_ops_group0~0.offset := 0, 0;~ldv_irq_1_1~0 := 0;~ldv_timer_state_2~0 := 0;~ldv_irq_line_1_3~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_irq_line_1_0~0 := 0;~ldv_timer_list_2~0.base, ~ldv_timer_list_2~0.offset := 0, 0;~hamachi_driver_group1~0.base, ~hamachi_driver_group1~0.offset := 0, 0;~ref_cnt~0 := 0;~ldv_irq_line_1_1~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_irq_line_1_2~0 := 0;~ldv_state_variable_4~0 := 0;~debug~0 := 1;~max_interrupt_work~0 := 40;~mtu~0 := 0;~max_rx_latency~0 := 17;~max_rx_gap~0 := 5;~min_rx_pkt~0 := 24;~max_tx_latency~0 := 0;~max_tx_gap~0 := 0;~min_tx_pkt~0 := 48;~rx_copybreak~0 := 0;~force32~0 := 0;~#options~0.base, ~#options~0.offset := 45, 0;call #Ultimate.allocInit(32, 45);call write~init~int(-1, ~#options~0.base, ~#options~0.offset, 4);call write~init~int(-1, ~#options~0.base, 4 + ~#options~0.offset, 4);call write~init~int(-1, ~#options~0.base, 8 + ~#options~0.offset, 4);call write~init~int(-1, ~#options~0.base, 12 + ~#options~0.offset, 4);call write~init~int(-1, ~#options~0.base, 16 + ~#options~0.offset, 4);call write~init~int(-1, ~#options~0.base, 20 + ~#options~0.offset, 4);call write~init~int(-1, ~#options~0.base, 24 + ~#options~0.offset, 4);call write~init~int(-1, ~#options~0.base, 28 + ~#options~0.offset, 4);~#full_duplex~0.base, ~#full_duplex~0.offset := 46, 0;call #Ultimate.allocInit(32, 46);call write~init~int(-1, ~#full_duplex~0.base, ~#full_duplex~0.offset, 4);call write~init~int(-1, ~#full_duplex~0.base, 4 + ~#full_duplex~0.offset, 4);call write~init~int(-1, ~#full_duplex~0.base, 8 + ~#full_duplex~0.offset, 4);call write~init~int(-1, ~#full_duplex~0.base, 12 + ~#full_duplex~0.offset, 4);call write~init~int(-1, ~#full_duplex~0.base, 16 + ~#full_duplex~0.offset, 4);call write~init~int(-1, ~#full_duplex~0.base, 20 + ~#full_duplex~0.offset, 4);call write~init~int(-1, ~#full_duplex~0.base, 24 + ~#full_duplex~0.offset, 4);call write~init~int(-1, ~#full_duplex~0.base, 28 + ~#full_duplex~0.offset, 4);~#rx_params~0.base, ~#rx_params~0.offset := 47, 0;call #Ultimate.allocInit(32, 47);call write~init~int(-1, ~#rx_params~0.base, ~#rx_params~0.offset, 4);call write~init~int(-1, ~#rx_params~0.base, 4 + ~#rx_params~0.offset, 4);call write~init~int(-1, ~#rx_params~0.base, 8 + ~#rx_params~0.offset, 4);call write~init~int(-1, ~#rx_params~0.base, 12 + ~#rx_params~0.offset, 4);call write~init~int(-1, ~#rx_params~0.base, 16 + ~#rx_params~0.offset, 4);call write~init~int(-1, ~#rx_params~0.base, 20 + ~#rx_params~0.offset, 4);call write~init~int(-1, ~#rx_params~0.base, 24 + ~#rx_params~0.offset, 4);call write~init~int(-1, ~#rx_params~0.base, 28 + ~#rx_params~0.offset, 4);~#tx_params~0.base, ~#tx_params~0.offset := 48, 0;call #Ultimate.allocInit(32, 48);call write~init~int(-1, ~#tx_params~0.base, ~#tx_params~0.offset, 4);call write~init~int(-1, ~#tx_params~0.base, 4 + ~#tx_params~0.offset, 4);call write~init~int(-1, ~#tx_params~0.base, 8 + ~#tx_params~0.offset, 4);call write~init~int(-1, ~#tx_params~0.base, 12 + ~#tx_params~0.offset, 4);call write~init~int(-1, ~#tx_params~0.base, 16 + ~#tx_params~0.offset, 4);call write~init~int(-1, ~#tx_params~0.base, 20 + ~#tx_params~0.offset, 4);call write~init~int(-1, ~#tx_params~0.base, 24 + ~#tx_params~0.offset, 4);call write~init~int(-1, ~#tx_params~0.base, 28 + ~#tx_params~0.offset, 4);~#version~0.base, ~#version~0.offset := 49, 0;call #Ultimate.allocInit(187, 49);call write~init~int(14, ~#version~0.base, ~#version~0.offset, 1);call write~init~int(104, ~#version~0.base, 1 + ~#version~0.offset, 1);call write~init~int(97, ~#version~0.base, 2 + ~#version~0.offset, 1);call write~init~int(109, ~#version~0.base, 3 + ~#version~0.offset, 1);call write~init~int(97, ~#version~0.base, 4 + ~#version~0.offset, 1);call write~init~int(99, ~#version~0.base, 5 + ~#version~0.offset, 1);call write~init~int(104, ~#version~0.base, 6 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 7 + ~#version~0.offset, 1);call write~init~int(46, ~#version~0.base, 8 + ~#version~0.offset, 1);call write~init~int(99, ~#version~0.base, 9 + ~#version~0.offset, 1);call write~init~int(58, ~#version~0.base, 10 + ~#version~0.offset, 1);call write~init~int(118, ~#version~0.base, 11 + ~#version~0.offset, 1);call write~init~int(50, ~#version~0.base, 12 + ~#version~0.offset, 1);call write~init~int(46, ~#version~0.base, 13 + ~#version~0.offset, 1);call write~init~int(49, ~#version~0.base, 14 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 15 + ~#version~0.offset, 1);call write~init~int(83, ~#version~0.base, 16 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 17 + ~#version~0.offset, 1);call write~init~int(112, ~#version~0.base, 18 + ~#version~0.offset, 1);call write~init~int(116, ~#version~0.base, 19 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 20 + ~#version~0.offset, 1);call write~init~int(49, ~#version~0.base, 21 + ~#version~0.offset, 1);call write~init~int(49, ~#version~0.base, 22 + ~#version~0.offset, 1);call write~init~int(44, ~#version~0.base, 23 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 24 + ~#version~0.offset, 1);call write~init~int(50, ~#version~0.base, 25 + ~#version~0.offset, 1);call write~init~int(48, ~#version~0.base, 26 + ~#version~0.offset, 1);call write~init~int(48, ~#version~0.base, 27 + ~#version~0.offset, 1);call write~init~int(54, ~#version~0.base, 28 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 29 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 30 + ~#version~0.offset, 1);call write~init~int(87, ~#version~0.base, 31 + ~#version~0.offset, 1);call write~init~int(114, ~#version~0.base, 32 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 33 + ~#version~0.offset, 1);call write~init~int(116, ~#version~0.base, 34 + ~#version~0.offset, 1);call write~init~int(116, ~#version~0.base, 35 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 36 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 37 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 38 + ~#version~0.offset, 1);call write~init~int(98, ~#version~0.base, 39 + ~#version~0.offset, 1);call write~init~int(121, ~#version~0.base, 40 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 41 + ~#version~0.offset, 1);call write~init~int(68, ~#version~0.base, 42 + ~#version~0.offset, 1);call write~init~int(111, ~#version~0.base, 43 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 44 + ~#version~0.offset, 1);call write~init~int(97, ~#version~0.base, 45 + ~#version~0.offset, 1);call write~init~int(108, ~#version~0.base, 46 + ~#version~0.offset, 1);call write~init~int(100, ~#version~0.base, 47 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 48 + ~#version~0.offset, 1);call write~init~int(66, ~#version~0.base, 49 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 50 + ~#version~0.offset, 1);call write~init~int(99, ~#version~0.base, 51 + ~#version~0.offset, 1);call write~init~int(107, ~#version~0.base, 52 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 53 + ~#version~0.offset, 1);call write~init~int(114, ~#version~0.base, 54 + ~#version~0.offset, 1);call write~init~int(10, ~#version~0.base, 55 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 56 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 57 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 58 + ~#version~0.offset, 1);call write~init~int(83, ~#version~0.base, 59 + ~#version~0.offset, 1);call write~init~int(111, ~#version~0.base, 60 + ~#version~0.offset, 1);call write~init~int(109, ~#version~0.base, 61 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 62 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 63 + ~#version~0.offset, 1);call write~init~int(109, ~#version~0.base, 64 + ~#version~0.offset, 1);call write~init~int(111, ~#version~0.base, 65 + ~#version~0.offset, 1);call write~init~int(100, ~#version~0.base, 66 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 67 + ~#version~0.offset, 1);call write~init~int(102, ~#version~0.base, 68 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 69 + ~#version~0.offset, 1);call write~init~int(99, ~#version~0.base, 70 + ~#version~0.offset, 1);call write~init~int(97, ~#version~0.base, 71 + ~#version~0.offset, 1);call write~init~int(116, ~#version~0.base, 72 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 73 + ~#version~0.offset, 1);call write~init~int(111, ~#version~0.base, 74 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 75 + ~#version~0.offset, 1);call write~init~int(115, ~#version~0.base, 76 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 77 + ~#version~0.offset, 1);call write~init~int(98, ~#version~0.base, 78 + ~#version~0.offset, 1);call write~init~int(121, ~#version~0.base, 79 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 80 + ~#version~0.offset, 1);call write~init~int(69, ~#version~0.base, 81 + ~#version~0.offset, 1);call write~init~int(114, ~#version~0.base, 82 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 83 + ~#version~0.offset, 1);call write~init~int(99, ~#version~0.base, 84 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 85 + ~#version~0.offset, 1);call write~init~int(107, ~#version~0.base, 86 + ~#version~0.offset, 1);call write~init~int(97, ~#version~0.base, 87 + ~#version~0.offset, 1);call write~init~int(115, ~#version~0.base, 88 + ~#version~0.offset, 1);call write~init~int(116, ~#version~0.base, 89 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 90 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 91 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 92 + ~#version~0.offset, 1);call write~init~int(60, ~#version~0.base, 93 + ~#version~0.offset, 1);call write~init~int(107, ~#version~0.base, 94 + ~#version~0.offset, 1);call write~init~int(97, ~#version~0.base, 95 + ~#version~0.offset, 1);call write~init~int(115, ~#version~0.base, 96 + ~#version~0.offset, 1);call write~init~int(116, ~#version~0.base, 97 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 98 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 99 + ~#version~0.offset, 1);call write~init~int(64, ~#version~0.base, 100 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 101 + ~#version~0.offset, 1);call write~init~int(115, ~#version~0.base, 102 + ~#version~0.offset, 1);call write~init~int(99, ~#version~0.base, 103 + ~#version~0.offset, 1);call write~init~int(108, ~#version~0.base, 104 + ~#version~0.offset, 1);call write~init~int(46, ~#version~0.base, 105 + ~#version~0.offset, 1);call write~init~int(109, ~#version~0.base, 106 + ~#version~0.offset, 1);call write~init~int(115, ~#version~0.base, 107 + ~#version~0.offset, 1);call write~init~int(117, ~#version~0.base, 108 + ~#version~0.offset, 1);call write~init~int(46, ~#version~0.base, 109 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 110 + ~#version~0.offset, 1);call write~init~int(100, ~#version~0.base, 111 + ~#version~0.offset, 1);call write~init~int(117, ~#version~0.base, 112 + ~#version~0.offset, 1);call write~init~int(62, ~#version~0.base, 113 + ~#version~0.offset, 1);call write~init~int(10, ~#version~0.base, 114 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 115 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 116 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 117 + ~#version~0.offset, 1);call write~init~int(70, ~#version~0.base, 118 + ~#version~0.offset, 1);call write~init~int(117, ~#version~0.base, 119 + ~#version~0.offset, 1);call write~init~int(114, ~#version~0.base, 120 + ~#version~0.offset, 1);call write~init~int(116, ~#version~0.base, 121 + ~#version~0.offset, 1);call write~init~int(104, ~#version~0.base, 122 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 123 + ~#version~0.offset, 1);call write~init~int(114, ~#version~0.base, 124 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 125 + ~#version~0.offset, 1);call write~init~int(109, ~#version~0.base, 126 + ~#version~0.offset, 1);call write~init~int(111, ~#version~0.base, 127 + ~#version~0.offset, 1);call write~init~int(100, ~#version~0.base, 128 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 129 + ~#version~0.offset, 1);call write~init~int(102, ~#version~0.base, 130 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 131 + ~#version~0.offset, 1);call write~init~int(99, ~#version~0.base, 132 + ~#version~0.offset, 1);call write~init~int(97, ~#version~0.base, 133 + ~#version~0.offset, 1);call write~init~int(116, ~#version~0.base, 134 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 135 + ~#version~0.offset, 1);call write~init~int(111, ~#version~0.base, 136 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 137 + ~#version~0.offset, 1);call write~init~int(115, ~#version~0.base, 138 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 139 + ~#version~0.offset, 1);call write~init~int(98, ~#version~0.base, 140 + ~#version~0.offset, 1);call write~init~int(121, ~#version~0.base, 141 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 142 + ~#version~0.offset, 1);call write~init~int(75, ~#version~0.base, 143 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 144 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 145 + ~#version~0.offset, 1);call write~init~int(116, ~#version~0.base, 146 + ~#version~0.offset, 1);call write~init~int(104, ~#version~0.base, 147 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 148 + ~#version~0.offset, 1);call write~init~int(85, ~#version~0.base, 149 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 150 + ~#version~0.offset, 1);call write~init~int(100, ~#version~0.base, 151 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 152 + ~#version~0.offset, 1);call write~init~int(114, ~#version~0.base, 153 + ~#version~0.offset, 1);call write~init~int(119, ~#version~0.base, 154 + ~#version~0.offset, 1);call write~init~int(111, ~#version~0.base, 155 + ~#version~0.offset, 1);call write~init~int(111, ~#version~0.base, 156 + ~#version~0.offset, 1);call write~init~int(100, ~#version~0.base, 157 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 158 + ~#version~0.offset, 1);call write~init~int(60, ~#version~0.base, 159 + ~#version~0.offset, 1);call write~init~int(107, ~#version~0.base, 160 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 161 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 162 + ~#version~0.offset, 1);call write~init~int(116, ~#version~0.base, 163 + ~#version~0.offset, 1);call write~init~int(104, ~#version~0.base, 164 + ~#version~0.offset, 1);call write~init~int(117, ~#version~0.base, 165 + ~#version~0.offset, 1);call write~init~int(64, ~#version~0.base, 166 + ~#version~0.offset, 1);call write~init~int(112, ~#version~0.base, 167 + ~#version~0.offset, 1);call write~init~int(97, ~#version~0.base, 168 + ~#version~0.offset, 1);call write~init~int(114, ~#version~0.base, 169 + ~#version~0.offset, 1);call write~init~int(108, ~#version~0.base, 170 + ~#version~0.offset, 1);call write~init~int(46, ~#version~0.base, 171 + ~#version~0.offset, 1);call write~init~int(99, ~#version~0.base, 172 + ~#version~0.offset, 1);call write~init~int(108, ~#version~0.base, 173 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 174 + ~#version~0.offset, 1);call write~init~int(109, ~#version~0.base, 175 + ~#version~0.offset, 1);call write~init~int(115, ~#version~0.base, 176 + ~#version~0.offset, 1);call write~init~int(111, ~#version~0.base, 177 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 178 + ~#version~0.offset, 1);call write~init~int(46, ~#version~0.base, 179 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 180 + ~#version~0.offset, 1);call write~init~int(100, ~#version~0.base, 181 + ~#version~0.offset, 1);call write~init~int(117, ~#version~0.base, 182 + ~#version~0.offset, 1);call write~init~int(62, ~#version~0.base, 183 + ~#version~0.offset, 1);call write~init~int(10, ~#version~0.base, 184 + ~#version~0.offset, 1);call write~init~int(0, ~#version~0.base, 185 + ~#version~0.offset, 1);call write~init~int(0, ~#version~0.base, 186 + ~#version~0.offset, 1);~#chip_tbl~0.base, ~#chip_tbl~0.offset := 50, 0;call #Ultimate.allocInit(56, 50);call write~init~int(4888, ~#chip_tbl~0.base, ~#chip_tbl~0.offset, 2);call write~init~int(2321, ~#chip_tbl~0.base, 2 + ~#chip_tbl~0.offset, 2);call write~init~int(65535, ~#chip_tbl~0.base, 4 + ~#chip_tbl~0.offset, 2);call write~init~int(0, ~#chip_tbl~0.base, 6 + ~#chip_tbl~0.offset, 2);call write~init~$Pointer$(3, 0, ~#chip_tbl~0.base, 8 + ~#chip_tbl~0.offset, 8);call write~init~$Pointer$(#funAddr~hamachi_timer.base, #funAddr~hamachi_timer.offset, ~#chip_tbl~0.base, 16 + ~#chip_tbl~0.offset, 8);call write~init~int(0, ~#chip_tbl~0.base, 24 + ~#chip_tbl~0.offset, 4);call write~init~int(0, ~#chip_tbl~0.base, 28 + ~#chip_tbl~0.offset, 2);call write~init~int(0, ~#chip_tbl~0.base, 30 + ~#chip_tbl~0.offset, 2);call write~init~int(0, ~#chip_tbl~0.base, 32 + ~#chip_tbl~0.offset, 2);call write~init~int(0, ~#chip_tbl~0.base, 34 + ~#chip_tbl~0.offset, 2);call write~init~$Pointer$(0, 0, ~#chip_tbl~0.base, 36 + ~#chip_tbl~0.offset, 8);call write~init~$Pointer$(0, 0, ~#chip_tbl~0.base, 44 + ~#chip_tbl~0.offset, 8);call write~init~int(0, ~#chip_tbl~0.base, 52 + ~#chip_tbl~0.offset, 4);~#hamachi_netdev_ops~0.base, ~#hamachi_netdev_ops~0.offset := 51, 0;call #Ultimate.allocInit(528, 51);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 8 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hamachi_open.base, #funAddr~hamachi_open.offset, ~#hamachi_netdev_ops~0.base, 16 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hamachi_close.base, #funAddr~hamachi_close.offset, ~#hamachi_netdev_ops~0.base, 24 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hamachi_start_xmit.base, #funAddr~hamachi_start_xmit.offset, ~#hamachi_netdev_ops~0.base, 32 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 40 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 48 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~set_rx_mode.base, #funAddr~set_rx_mode.offset, ~#hamachi_netdev_ops~0.base, 56 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_mac_addr.base, #funAddr~eth_mac_addr.offset, ~#hamachi_netdev_ops~0.base, 64 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_validate_addr.base, #funAddr~eth_validate_addr.offset, ~#hamachi_netdev_ops~0.base, 72 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~netdev_ioctl.base, #funAddr~netdev_ioctl.offset, ~#hamachi_netdev_ops~0.base, 80 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 88 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_change_mtu.base, #funAddr~eth_change_mtu.offset, ~#hamachi_netdev_ops~0.base, 96 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 104 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hamachi_tx_timeout.base, #funAddr~hamachi_tx_timeout.offset, ~#hamachi_netdev_ops~0.base, 112 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 120 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hamachi_get_stats.base, #funAddr~hamachi_get_stats.offset, ~#hamachi_netdev_ops~0.base, 128 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 136 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 144 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 152 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 160 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 168 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 176 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 184 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 192 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 200 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 208 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 216 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 224 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 232 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 240 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 248 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 256 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 264 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 272 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 280 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 288 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 296 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 304 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 312 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 320 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 328 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 336 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 344 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 352 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 360 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 368 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 376 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 384 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 392 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 400 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 408 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 416 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 424 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 432 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 440 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 448 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 456 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 464 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 472 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 480 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 488 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 496 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 504 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 512 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 520 + ~#hamachi_netdev_ops~0.offset, 8);~#ethtool_ops~0.base, ~#ethtool_ops~0.offset := 52, 0;call #Ultimate.allocInit(392, 52);call write~init~$Pointer$(#funAddr~hamachi_get_settings.base, #funAddr~hamachi_get_settings.offset, ~#ethtool_ops~0.base, ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hamachi_set_settings.base, #funAddr~hamachi_set_settings.offset, ~#ethtool_ops~0.base, 8 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hamachi_get_drvinfo.base, #funAddr~hamachi_get_drvinfo.offset, ~#ethtool_ops~0.base, 16 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 24 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 32 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 40 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 48 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 56 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 64 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hamachi_nway_reset.base, #funAddr~hamachi_nway_reset.offset, ~#ethtool_ops~0.base, 72 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hamachi_get_link.base, #funAddr~hamachi_get_link.offset, ~#ethtool_ops~0.base, 80 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 88 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 96 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 104 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 112 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 120 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 128 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 136 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 144 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 152 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 160 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 168 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 176 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 184 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~check_if_running.base, #funAddr~check_if_running.offset, ~#ethtool_ops~0.base, 192 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 200 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 208 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 216 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 224 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 232 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 240 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 248 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 256 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 264 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 272 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 280 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 288 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 296 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 304 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 312 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 320 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 328 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 336 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 344 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 352 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 360 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 368 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 376 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 384 + ~#ethtool_ops~0.offset, 8);~#ethtool_ops_no_mii~0.base, ~#ethtool_ops_no_mii~0.offset := 53, 0;call #Ultimate.allocInit(392, 53);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 8 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(#funAddr~hamachi_get_drvinfo.base, #funAddr~hamachi_get_drvinfo.offset, ~#ethtool_ops_no_mii~0.base, 16 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 24 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 32 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 40 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 48 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 56 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 64 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 72 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 80 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 88 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 96 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 104 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 112 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 120 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 128 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 136 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 144 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 152 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 160 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 168 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 176 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 184 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(#funAddr~check_if_running.base, #funAddr~check_if_running.offset, ~#ethtool_ops_no_mii~0.base, 192 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 200 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 208 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 216 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 224 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 232 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 240 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 248 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 256 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 264 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 272 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 280 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 288 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 296 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 304 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 312 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 320 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 328 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 336 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 344 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 352 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 360 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 368 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 376 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 384 + ~#ethtool_ops_no_mii~0.offset, 8);~#hamachi_pci_tbl~0.base, ~#hamachi_pci_tbl~0.offset := 54, 0;call #Ultimate.allocInit(64, 54);call write~init~int(4888, ~#hamachi_pci_tbl~0.base, ~#hamachi_pci_tbl~0.offset, 4);call write~init~int(2321, ~#hamachi_pci_tbl~0.base, 4 + ~#hamachi_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#hamachi_pci_tbl~0.base, 8 + ~#hamachi_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#hamachi_pci_tbl~0.base, 12 + ~#hamachi_pci_tbl~0.offset, 4);call write~init~int(0, ~#hamachi_pci_tbl~0.base, 16 + ~#hamachi_pci_tbl~0.offset, 4);call write~init~int(0, ~#hamachi_pci_tbl~0.base, 20 + ~#hamachi_pci_tbl~0.offset, 4);call write~init~int(0, ~#hamachi_pci_tbl~0.base, 24 + ~#hamachi_pci_tbl~0.offset, 8);call write~init~int(0, ~#hamachi_pci_tbl~0.base, 32 + ~#hamachi_pci_tbl~0.offset, 4);call write~init~int(0, ~#hamachi_pci_tbl~0.base, 36 + ~#hamachi_pci_tbl~0.offset, 4);call write~init~int(0, ~#hamachi_pci_tbl~0.base, 40 + ~#hamachi_pci_tbl~0.offset, 4);call write~init~int(0, ~#hamachi_pci_tbl~0.base, 44 + ~#hamachi_pci_tbl~0.offset, 4);call write~init~int(0, ~#hamachi_pci_tbl~0.base, 48 + ~#hamachi_pci_tbl~0.offset, 4);call write~init~int(0, ~#hamachi_pci_tbl~0.base, 52 + ~#hamachi_pci_tbl~0.offset, 4);call write~init~int(0, ~#hamachi_pci_tbl~0.base, 56 + ~#hamachi_pci_tbl~0.offset, 8);~__mod_pci__hamachi_pci_tbl_device_table~0.vendor := ~__mod_pci__hamachi_pci_tbl_device_table~0.vendor[0 := 0];~__mod_pci__hamachi_pci_tbl_device_table~0.device := ~__mod_pci__hamachi_pci_tbl_device_table~0.device[0 := 0];~__mod_pci__hamachi_pci_tbl_device_table~0.subvendor := ~__mod_pci__hamachi_pci_tbl_device_table~0.subvendor[0 := 0];~__mod_pci__hamachi_pci_tbl_device_table~0.subdevice := ~__mod_pci__hamachi_pci_tbl_device_table~0.subdevice[0 := 0];~__mod_pci__hamachi_pci_tbl_device_table~0.class := ~__mod_pci__hamachi_pci_tbl_device_table~0.class[0 := 0];~__mod_pci__hamachi_pci_tbl_device_table~0.class_mask := ~__mod_pci__hamachi_pci_tbl_device_table~0.class_mask[0 := 0];~__mod_pci__hamachi_pci_tbl_device_table~0.driver_data := ~__mod_pci__hamachi_pci_tbl_device_table~0.driver_data[0 := 0];~__mod_pci__hamachi_pci_tbl_device_table~0.vendor := ~__mod_pci__hamachi_pci_tbl_device_table~0.vendor[1 := 0];~__mod_pci__hamachi_pci_tbl_device_table~0.device := ~__mod_pci__hamachi_pci_tbl_device_table~0.device[1 := 0];~__mod_pci__hamachi_pci_tbl_device_table~0.subvendor := ~__mod_pci__hamachi_pci_tbl_device_table~0.subvendor[1 := 0];~__mod_pci__hamachi_pci_tbl_device_table~0.subdevice := ~__mod_pci__hamachi_pci_tbl_device_table~0.subdevice[1 := 0];~__mod_pci__hamachi_pci_tbl_device_table~0.class := ~__mod_pci__hamachi_pci_tbl_device_table~0.class[1 := 0];~__mod_pci__hamachi_pci_tbl_device_table~0.class_mask := ~__mod_pci__hamachi_pci_tbl_device_table~0.class_mask[1 := 0];~__mod_pci__hamachi_pci_tbl_device_table~0.driver_data := ~__mod_pci__hamachi_pci_tbl_device_table~0.driver_data[1 := 0];~#hamachi_driver~0.base, ~#hamachi_driver~0.offset := 55, 0;call #Ultimate.allocInit(305, 55);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 8 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(43, 0, ~#hamachi_driver~0.base, 16 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(~#hamachi_pci_tbl~0.base, ~#hamachi_pci_tbl~0.offset, ~#hamachi_driver~0.base, 24 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~hamachi_init_one.base, #funAddr~hamachi_init_one.offset, ~#hamachi_driver~0.base, 32 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~hamachi_remove_one.base, #funAddr~hamachi_remove_one.offset, ~#hamachi_driver~0.base, 40 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 48 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 56 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 64 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 72 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 80 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 88 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 96 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 104 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 112 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 120 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 128 + ~#hamachi_driver~0.offset, 8);call write~init~int(0, ~#hamachi_driver~0.base, 136 + ~#hamachi_driver~0.offset, 1);call write~init~int(0, ~#hamachi_driver~0.base, 137 + ~#hamachi_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 141 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 149 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 157 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 165 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 173 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 181 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 189 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 197 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 205 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 213 + ~#hamachi_driver~0.offset, 8);call write~init~int(0, ~#hamachi_driver~0.base, 221 + ~#hamachi_driver~0.offset, 4);call write~init~int(0, ~#hamachi_driver~0.base, 225 + ~#hamachi_driver~0.offset, 4);call write~init~int(0, ~#hamachi_driver~0.base, 229 + ~#hamachi_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 233 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 241 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 249 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 257 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 265 + ~#hamachi_driver~0.offset, 8);call write~init~int(0, ~#hamachi_driver~0.base, 273 + ~#hamachi_driver~0.offset, 4);call write~init~int(0, ~#hamachi_driver~0.base, 277 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 289 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 297 + ~#hamachi_driver~0.offset, 8);~ldv_retval_2~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_spin~0 := 0; {1241#true} is VALID [2022-02-20 22:28:45,242 INFO L290 TraceCheckUtils]: 1: Hoare triple {1241#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret686#1.base, main_#t~ret686#1.offset, main_#t~ret687#1.base, main_#t~ret687#1.offset, main_#t~ret688#1.base, main_#t~ret688#1.offset, main_#t~ret689#1.base, main_#t~ret689#1.offset, main_#t~ret690#1.base, main_#t~ret690#1.offset, main_#t~ret691#1.base, main_#t~ret691#1.offset, main_#t~ret692#1.base, main_#t~ret692#1.offset, main_#t~ret693#1.base, main_#t~ret693#1.offset, main_#t~nondet694#1, main_#t~switch695#1, main_#t~nondet696#1, main_#t~switch697#1, main_#t~ret698#1, main_#t~ret699#1, main_#t~ret700#1, main_#t~ret701#1, main_#t~mem702#1, main_#t~ret703#1, main_#t~mem704#1, main_#t~ret705#1, main_#t~mem706#1, main_#t~ret707#1, main_#t~ret708#1.base, main_#t~ret708#1.offset, main_#t~ret709#1.base, main_#t~ret709#1.offset, main_#t~ret710#1.base, main_#t~ret710#1.offset, main_#t~mem711#1, main_#t~ret712#1, main_#t~mem713#1, main_#t~ret714#1, main_#t~ret715#1, main_#t~ret716#1, main_#t~ret717#1, main_#t~ret718#1, main_#t~ret719#1, main_#t~ret720#1, main_#t~ret721#1, main_#t~nondet722#1, main_#t~switch723#1, main_#t~ret724#1, main_#t~nondet725#1, main_#t~switch726#1, main_#t~ret727#1, main_#t~nondet728#1, main_#t~switch729#1, main_#t~ret730#1, main_#t~ret731#1, main_#t~nondet732#1, main_#t~switch733#1, main_#t~ret734#1, main_#t~ret735#1, main_#t~ret736#1, main_#t~ret737#1, main_#t~ret738#1, main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset, main_~tmp~57#1.base, main_~tmp~57#1.offset, main_~ldvarg4~0#1.base, main_~ldvarg4~0#1.offset, main_~tmp___0~28#1.base, main_~tmp___0~28#1.offset, main_~#ldvarg3~0#1.base, main_~#ldvarg3~0#1.offset, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp___1~18#1.base, main_~tmp___1~18#1.offset, main_~#ldvarg2~0#1.base, main_~#ldvarg2~0#1.offset, main_~ldvarg5~0#1.base, main_~ldvarg5~0#1.offset, main_~tmp___2~13#1.base, main_~tmp___2~13#1.offset, main_~ldvarg6~0#1.base, main_~ldvarg6~0#1.offset, main_~tmp___3~9#1.base, main_~tmp___3~9#1.offset, main_~ldvarg7~0#1.base, main_~ldvarg7~0#1.offset, main_~tmp___4~6#1.base, main_~tmp___4~6#1.offset, main_~tmp___5~5#1, main_~tmp___6~4#1, main_~tmp___7~3#1, main_~tmp___8~1#1, main_~tmp___9~1#1, main_~tmp___10~1#1;havoc main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset;havoc main_~tmp~57#1.base, main_~tmp~57#1.offset;havoc main_~ldvarg4~0#1.base, main_~ldvarg4~0#1.offset;havoc main_~tmp___0~28#1.base, main_~tmp___0~28#1.offset;call main_~#ldvarg3~0#1.base, main_~#ldvarg3~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp___1~18#1.base, main_~tmp___1~18#1.offset;call main_~#ldvarg2~0#1.base, main_~#ldvarg2~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~ldvarg5~0#1.base, main_~ldvarg5~0#1.offset;havoc main_~tmp___2~13#1.base, main_~tmp___2~13#1.offset;havoc main_~ldvarg6~0#1.base, main_~ldvarg6~0#1.offset;havoc main_~tmp___3~9#1.base, main_~tmp___3~9#1.offset;havoc main_~ldvarg7~0#1.base, main_~ldvarg7~0#1.offset;havoc main_~tmp___4~6#1.base, main_~tmp___4~6#1.offset;havoc main_~tmp___5~5#1;havoc main_~tmp___6~4#1;havoc main_~tmp___7~3#1;havoc main_~tmp___8~1#1;havoc main_~tmp___9~1#1;havoc main_~tmp___10~1#1; {1241#true} is VALID [2022-02-20 22:28:45,243 INFO L272 TraceCheckUtils]: 2: Hoare triple {1241#true} call main_#t~ret686#1.base, main_#t~ret686#1.offset := ldv_init_zalloc(232); {1352#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:28:45,243 INFO L290 TraceCheckUtils]: 3: Hoare triple {1352#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {1241#true} is VALID [2022-02-20 22:28:45,244 INFO L272 TraceCheckUtils]: 4: Hoare triple {1241#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {1360#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:28:45,244 INFO L290 TraceCheckUtils]: 5: Hoare triple {1360#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {1241#true} is VALID [2022-02-20 22:28:45,244 INFO L290 TraceCheckUtils]: 6: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,245 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {1241#true} {1241#true} #3100#return; {1241#true} is VALID [2022-02-20 22:28:45,245 INFO L290 TraceCheckUtils]: 8: Hoare triple {1241#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {1241#true} is VALID [2022-02-20 22:28:45,245 INFO L272 TraceCheckUtils]: 9: Hoare triple {1241#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {1241#true} is VALID [2022-02-20 22:28:45,245 INFO L290 TraceCheckUtils]: 10: Hoare triple {1241#true} ~cond := #in~cond; {1241#true} is VALID [2022-02-20 22:28:45,245 INFO L290 TraceCheckUtils]: 11: Hoare triple {1241#true} assume !(0 == ~cond); {1241#true} is VALID [2022-02-20 22:28:45,245 INFO L290 TraceCheckUtils]: 12: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,246 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {1241#true} {1241#true} #3102#return; {1241#true} is VALID [2022-02-20 22:28:45,246 INFO L290 TraceCheckUtils]: 14: Hoare triple {1241#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {1241#true} is VALID [2022-02-20 22:28:45,246 INFO L290 TraceCheckUtils]: 15: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,246 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {1241#true} {1241#true} #3120#return; {1241#true} is VALID [2022-02-20 22:28:45,246 INFO L290 TraceCheckUtils]: 17: Hoare triple {1241#true} main_~tmp~57#1.base, main_~tmp~57#1.offset := main_#t~ret686#1.base, main_#t~ret686#1.offset;havoc main_#t~ret686#1.base, main_#t~ret686#1.offset;main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset := main_~tmp~57#1.base, main_~tmp~57#1.offset; {1241#true} is VALID [2022-02-20 22:28:45,247 INFO L272 TraceCheckUtils]: 18: Hoare triple {1241#true} call main_#t~ret687#1.base, main_#t~ret687#1.offset := ldv_init_zalloc(40); {1352#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:28:45,247 INFO L290 TraceCheckUtils]: 19: Hoare triple {1352#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {1241#true} is VALID [2022-02-20 22:28:45,248 INFO L272 TraceCheckUtils]: 20: Hoare triple {1241#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {1360#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:28:45,248 INFO L290 TraceCheckUtils]: 21: Hoare triple {1360#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {1241#true} is VALID [2022-02-20 22:28:45,248 INFO L290 TraceCheckUtils]: 22: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,248 INFO L284 TraceCheckUtils]: 23: Hoare quadruple {1241#true} {1241#true} #3100#return; {1241#true} is VALID [2022-02-20 22:28:45,249 INFO L290 TraceCheckUtils]: 24: Hoare triple {1241#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {1241#true} is VALID [2022-02-20 22:28:45,249 INFO L272 TraceCheckUtils]: 25: Hoare triple {1241#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {1241#true} is VALID [2022-02-20 22:28:45,249 INFO L290 TraceCheckUtils]: 26: Hoare triple {1241#true} ~cond := #in~cond; {1241#true} is VALID [2022-02-20 22:28:45,249 INFO L290 TraceCheckUtils]: 27: Hoare triple {1241#true} assume !(0 == ~cond); {1241#true} is VALID [2022-02-20 22:28:45,249 INFO L290 TraceCheckUtils]: 28: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,249 INFO L284 TraceCheckUtils]: 29: Hoare quadruple {1241#true} {1241#true} #3102#return; {1241#true} is VALID [2022-02-20 22:28:45,250 INFO L290 TraceCheckUtils]: 30: Hoare triple {1241#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {1241#true} is VALID [2022-02-20 22:28:45,250 INFO L290 TraceCheckUtils]: 31: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,250 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {1241#true} {1241#true} #3122#return; {1241#true} is VALID [2022-02-20 22:28:45,250 INFO L290 TraceCheckUtils]: 33: Hoare triple {1241#true} main_~tmp___0~28#1.base, main_~tmp___0~28#1.offset := main_#t~ret687#1.base, main_#t~ret687#1.offset;havoc main_#t~ret687#1.base, main_#t~ret687#1.offset;main_~ldvarg4~0#1.base, main_~ldvarg4~0#1.offset := main_~tmp___0~28#1.base, main_~tmp___0~28#1.offset; {1241#true} is VALID [2022-02-20 22:28:45,251 INFO L272 TraceCheckUtils]: 34: Hoare triple {1241#true} call main_#t~ret688#1.base, main_#t~ret688#1.offset := ldv_init_zalloc(1); {1352#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:28:45,251 INFO L290 TraceCheckUtils]: 35: Hoare triple {1352#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {1241#true} is VALID [2022-02-20 22:28:45,252 INFO L272 TraceCheckUtils]: 36: Hoare triple {1241#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {1360#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:28:45,252 INFO L290 TraceCheckUtils]: 37: Hoare triple {1360#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {1241#true} is VALID [2022-02-20 22:28:45,252 INFO L290 TraceCheckUtils]: 38: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,252 INFO L284 TraceCheckUtils]: 39: Hoare quadruple {1241#true} {1241#true} #3100#return; {1241#true} is VALID [2022-02-20 22:28:45,253 INFO L290 TraceCheckUtils]: 40: Hoare triple {1241#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {1241#true} is VALID [2022-02-20 22:28:45,253 INFO L272 TraceCheckUtils]: 41: Hoare triple {1241#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {1241#true} is VALID [2022-02-20 22:28:45,253 INFO L290 TraceCheckUtils]: 42: Hoare triple {1241#true} ~cond := #in~cond; {1241#true} is VALID [2022-02-20 22:28:45,253 INFO L290 TraceCheckUtils]: 43: Hoare triple {1241#true} assume !(0 == ~cond); {1241#true} is VALID [2022-02-20 22:28:45,253 INFO L290 TraceCheckUtils]: 44: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,253 INFO L284 TraceCheckUtils]: 45: Hoare quadruple {1241#true} {1241#true} #3102#return; {1241#true} is VALID [2022-02-20 22:28:45,253 INFO L290 TraceCheckUtils]: 46: Hoare triple {1241#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {1241#true} is VALID [2022-02-20 22:28:45,254 INFO L290 TraceCheckUtils]: 47: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,254 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {1241#true} {1241#true} #3124#return; {1241#true} is VALID [2022-02-20 22:28:45,254 INFO L290 TraceCheckUtils]: 49: Hoare triple {1241#true} main_~tmp___1~18#1.base, main_~tmp___1~18#1.offset := main_#t~ret688#1.base, main_#t~ret688#1.offset;havoc main_#t~ret688#1.base, main_#t~ret688#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp___1~18#1.base, main_~tmp___1~18#1.offset; {1241#true} is VALID [2022-02-20 22:28:45,255 INFO L272 TraceCheckUtils]: 50: Hoare triple {1241#true} call main_#t~ret689#1.base, main_#t~ret689#1.offset := ldv_init_zalloc(196); {1352#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:28:45,255 INFO L290 TraceCheckUtils]: 51: Hoare triple {1352#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {1241#true} is VALID [2022-02-20 22:28:45,256 INFO L272 TraceCheckUtils]: 52: Hoare triple {1241#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {1360#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:28:45,256 INFO L290 TraceCheckUtils]: 53: Hoare triple {1360#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {1241#true} is VALID [2022-02-20 22:28:45,256 INFO L290 TraceCheckUtils]: 54: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,256 INFO L284 TraceCheckUtils]: 55: Hoare quadruple {1241#true} {1241#true} #3100#return; {1241#true} is VALID [2022-02-20 22:28:45,256 INFO L290 TraceCheckUtils]: 56: Hoare triple {1241#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {1241#true} is VALID [2022-02-20 22:28:45,256 INFO L272 TraceCheckUtils]: 57: Hoare triple {1241#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {1241#true} is VALID [2022-02-20 22:28:45,256 INFO L290 TraceCheckUtils]: 58: Hoare triple {1241#true} ~cond := #in~cond; {1241#true} is VALID [2022-02-20 22:28:45,257 INFO L290 TraceCheckUtils]: 59: Hoare triple {1241#true} assume !(0 == ~cond); {1241#true} is VALID [2022-02-20 22:28:45,257 INFO L290 TraceCheckUtils]: 60: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,257 INFO L284 TraceCheckUtils]: 61: Hoare quadruple {1241#true} {1241#true} #3102#return; {1241#true} is VALID [2022-02-20 22:28:45,257 INFO L290 TraceCheckUtils]: 62: Hoare triple {1241#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {1241#true} is VALID [2022-02-20 22:28:45,257 INFO L290 TraceCheckUtils]: 63: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,257 INFO L284 TraceCheckUtils]: 64: Hoare quadruple {1241#true} {1241#true} #3126#return; {1241#true} is VALID [2022-02-20 22:28:45,258 INFO L290 TraceCheckUtils]: 65: Hoare triple {1241#true} main_~tmp___2~13#1.base, main_~tmp___2~13#1.offset := main_#t~ret689#1.base, main_#t~ret689#1.offset;havoc main_#t~ret689#1.base, main_#t~ret689#1.offset;main_~ldvarg5~0#1.base, main_~ldvarg5~0#1.offset := main_~tmp___2~13#1.base, main_~tmp___2~13#1.offset; {1241#true} is VALID [2022-02-20 22:28:45,258 INFO L272 TraceCheckUtils]: 66: Hoare triple {1241#true} call main_#t~ret690#1.base, main_#t~ret690#1.offset := ldv_init_zalloc(32); {1352#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:28:45,258 INFO L290 TraceCheckUtils]: 67: Hoare triple {1352#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {1241#true} is VALID [2022-02-20 22:28:45,259 INFO L272 TraceCheckUtils]: 68: Hoare triple {1241#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {1360#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:28:45,259 INFO L290 TraceCheckUtils]: 69: Hoare triple {1360#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {1241#true} is VALID [2022-02-20 22:28:45,260 INFO L290 TraceCheckUtils]: 70: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,260 INFO L284 TraceCheckUtils]: 71: Hoare quadruple {1241#true} {1241#true} #3100#return; {1241#true} is VALID [2022-02-20 22:28:45,260 INFO L290 TraceCheckUtils]: 72: Hoare triple {1241#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {1241#true} is VALID [2022-02-20 22:28:45,260 INFO L272 TraceCheckUtils]: 73: Hoare triple {1241#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {1241#true} is VALID [2022-02-20 22:28:45,260 INFO L290 TraceCheckUtils]: 74: Hoare triple {1241#true} ~cond := #in~cond; {1241#true} is VALID [2022-02-20 22:28:45,260 INFO L290 TraceCheckUtils]: 75: Hoare triple {1241#true} assume !(0 == ~cond); {1241#true} is VALID [2022-02-20 22:28:45,260 INFO L290 TraceCheckUtils]: 76: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,261 INFO L284 TraceCheckUtils]: 77: Hoare quadruple {1241#true} {1241#true} #3102#return; {1241#true} is VALID [2022-02-20 22:28:45,261 INFO L290 TraceCheckUtils]: 78: Hoare triple {1241#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {1241#true} is VALID [2022-02-20 22:28:45,261 INFO L290 TraceCheckUtils]: 79: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,261 INFO L284 TraceCheckUtils]: 80: Hoare quadruple {1241#true} {1241#true} #3128#return; {1241#true} is VALID [2022-02-20 22:28:45,261 INFO L290 TraceCheckUtils]: 81: Hoare triple {1241#true} main_~tmp___3~9#1.base, main_~tmp___3~9#1.offset := main_#t~ret690#1.base, main_#t~ret690#1.offset;havoc main_#t~ret690#1.base, main_#t~ret690#1.offset;main_~ldvarg6~0#1.base, main_~ldvarg6~0#1.offset := main_~tmp___3~9#1.base, main_~tmp___3~9#1.offset; {1241#true} is VALID [2022-02-20 22:28:45,262 INFO L272 TraceCheckUtils]: 82: Hoare triple {1241#true} call main_#t~ret691#1.base, main_#t~ret691#1.offset := ldv_init_zalloc(196); {1352#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:28:45,262 INFO L290 TraceCheckUtils]: 83: Hoare triple {1352#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {1241#true} is VALID [2022-02-20 22:28:45,263 INFO L272 TraceCheckUtils]: 84: Hoare triple {1241#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {1360#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:28:45,263 INFO L290 TraceCheckUtils]: 85: Hoare triple {1360#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {1241#true} is VALID [2022-02-20 22:28:45,263 INFO L290 TraceCheckUtils]: 86: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,263 INFO L284 TraceCheckUtils]: 87: Hoare quadruple {1241#true} {1241#true} #3100#return; {1241#true} is VALID [2022-02-20 22:28:45,264 INFO L290 TraceCheckUtils]: 88: Hoare triple {1241#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {1241#true} is VALID [2022-02-20 22:28:45,264 INFO L272 TraceCheckUtils]: 89: Hoare triple {1241#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {1241#true} is VALID [2022-02-20 22:28:45,264 INFO L290 TraceCheckUtils]: 90: Hoare triple {1241#true} ~cond := #in~cond; {1241#true} is VALID [2022-02-20 22:28:45,264 INFO L290 TraceCheckUtils]: 91: Hoare triple {1241#true} assume !(0 == ~cond); {1241#true} is VALID [2022-02-20 22:28:45,264 INFO L290 TraceCheckUtils]: 92: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,264 INFO L284 TraceCheckUtils]: 93: Hoare quadruple {1241#true} {1241#true} #3102#return; {1241#true} is VALID [2022-02-20 22:28:45,264 INFO L290 TraceCheckUtils]: 94: Hoare triple {1241#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {1241#true} is VALID [2022-02-20 22:28:45,265 INFO L290 TraceCheckUtils]: 95: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,265 INFO L284 TraceCheckUtils]: 96: Hoare quadruple {1241#true} {1241#true} #3130#return; {1241#true} is VALID [2022-02-20 22:28:45,265 INFO L290 TraceCheckUtils]: 97: Hoare triple {1241#true} main_~tmp___4~6#1.base, main_~tmp___4~6#1.offset := main_#t~ret691#1.base, main_#t~ret691#1.offset;havoc main_#t~ret691#1.base, main_#t~ret691#1.offset;main_~ldvarg7~0#1.base, main_~ldvarg7~0#1.offset := main_~tmp___4~6#1.base, main_~tmp___4~6#1.offset;assume { :begin_inline_ldv_initialize } true; {1241#true} is VALID [2022-02-20 22:28:45,265 INFO L290 TraceCheckUtils]: 98: Hoare triple {1241#true} assume { :end_inline_ldv_initialize } true; {1241#true} is VALID [2022-02-20 22:28:45,266 INFO L272 TraceCheckUtils]: 99: Hoare triple {1241#true} call main_#t~ret692#1.base, main_#t~ret692#1.offset := ldv_memset(main_~#ldvarg3~0#1.base, main_~#ldvarg3~0#1.offset, 0, 4); {1396#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:28:45,266 INFO L290 TraceCheckUtils]: 100: Hoare triple {1396#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {1241#true} is VALID [2022-02-20 22:28:45,267 INFO L272 TraceCheckUtils]: 101: Hoare triple {1241#true} call #t~memset~res15.base, #t~memset~res15.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, ~n); {1396#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:28:45,267 INFO L290 TraceCheckUtils]: 102: Hoare triple {1396#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr788 := 0; {1241#true} is VALID [2022-02-20 22:28:45,267 INFO L290 TraceCheckUtils]: 103: Hoare triple {1241#true} assume !(#t~loopctr788 % 18446744073709551616 < #amount % 18446744073709551616); {1241#true} is VALID [2022-02-20 22:28:45,267 INFO L290 TraceCheckUtils]: 104: Hoare triple {1241#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1241#true} is VALID [2022-02-20 22:28:45,268 INFO L284 TraceCheckUtils]: 105: Hoare quadruple {1241#true} {1241#true} #3454#return; {1241#true} is VALID [2022-02-20 22:28:45,268 INFO L290 TraceCheckUtils]: 106: Hoare triple {1241#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res15.base, #t~memset~res15.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {1241#true} is VALID [2022-02-20 22:28:45,268 INFO L290 TraceCheckUtils]: 107: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,268 INFO L284 TraceCheckUtils]: 108: Hoare quadruple {1241#true} {1241#true} #3132#return; {1241#true} is VALID [2022-02-20 22:28:45,268 INFO L290 TraceCheckUtils]: 109: Hoare triple {1241#true} havoc main_#t~ret692#1.base, main_#t~ret692#1.offset; {1241#true} is VALID [2022-02-20 22:28:45,269 INFO L272 TraceCheckUtils]: 110: Hoare triple {1241#true} call main_#t~ret693#1.base, main_#t~ret693#1.offset := ldv_memset(main_~#ldvarg2~0#1.base, main_~#ldvarg2~0#1.offset, 0, 4); {1396#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:28:45,269 INFO L290 TraceCheckUtils]: 111: Hoare triple {1396#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {1241#true} is VALID [2022-02-20 22:28:45,270 INFO L272 TraceCheckUtils]: 112: Hoare triple {1241#true} call #t~memset~res15.base, #t~memset~res15.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, ~n); {1396#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:28:45,270 INFO L290 TraceCheckUtils]: 113: Hoare triple {1396#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr788 := 0; {1241#true} is VALID [2022-02-20 22:28:45,270 INFO L290 TraceCheckUtils]: 114: Hoare triple {1241#true} assume !(#t~loopctr788 % 18446744073709551616 < #amount % 18446744073709551616); {1241#true} is VALID [2022-02-20 22:28:45,271 INFO L290 TraceCheckUtils]: 115: Hoare triple {1241#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1241#true} is VALID [2022-02-20 22:28:45,271 INFO L284 TraceCheckUtils]: 116: Hoare quadruple {1241#true} {1241#true} #3454#return; {1241#true} is VALID [2022-02-20 22:28:45,271 INFO L290 TraceCheckUtils]: 117: Hoare triple {1241#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res15.base, #t~memset~res15.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {1241#true} is VALID [2022-02-20 22:28:45,271 INFO L290 TraceCheckUtils]: 118: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,271 INFO L284 TraceCheckUtils]: 119: Hoare quadruple {1241#true} {1241#true} #3134#return; {1241#true} is VALID [2022-02-20 22:28:45,272 INFO L290 TraceCheckUtils]: 120: Hoare triple {1241#true} havoc main_#t~ret693#1.base, main_#t~ret693#1.offset;~ldv_state_variable_6~0 := 0;~ldv_state_variable_4~0 := 0;~ldv_state_variable_1~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 1;~ldv_state_variable_5~0 := 0; {1345#(= ~ldv_state_variable_6~0 0)} is VALID [2022-02-20 22:28:45,272 INFO L290 TraceCheckUtils]: 121: Hoare triple {1345#(= ~ldv_state_variable_6~0 0)} assume -2147483648 <= main_#t~nondet694#1 && main_#t~nondet694#1 <= 2147483647;main_~tmp___5~5#1 := main_#t~nondet694#1;havoc main_#t~nondet694#1;main_#t~switch695#1 := 0 == main_~tmp___5~5#1; {1345#(= ~ldv_state_variable_6~0 0)} is VALID [2022-02-20 22:28:45,272 INFO L290 TraceCheckUtils]: 122: Hoare triple {1345#(= ~ldv_state_variable_6~0 0)} assume main_#t~switch695#1; {1345#(= ~ldv_state_variable_6~0 0)} is VALID [2022-02-20 22:28:45,273 INFO L290 TraceCheckUtils]: 123: Hoare triple {1345#(= ~ldv_state_variable_6~0 0)} assume 0 != ~ldv_state_variable_6~0;assume -2147483648 <= main_#t~nondet696#1 && main_#t~nondet696#1 <= 2147483647;main_~tmp___6~4#1 := main_#t~nondet696#1;havoc main_#t~nondet696#1;main_#t~switch697#1 := 0 == main_~tmp___6~4#1; {1242#false} is VALID [2022-02-20 22:28:45,273 INFO L290 TraceCheckUtils]: 124: Hoare triple {1242#false} assume !main_#t~switch697#1;main_#t~switch697#1 := main_#t~switch697#1 || 1 == main_~tmp___6~4#1; {1242#false} is VALID [2022-02-20 22:28:45,303 INFO L290 TraceCheckUtils]: 125: Hoare triple {1242#false} assume !main_#t~switch697#1;main_#t~switch697#1 := main_#t~switch697#1 || 2 == main_~tmp___6~4#1; {1242#false} is VALID [2022-02-20 22:28:45,303 INFO L290 TraceCheckUtils]: 126: Hoare triple {1242#false} assume !main_#t~switch697#1;main_#t~switch697#1 := main_#t~switch697#1 || 3 == main_~tmp___6~4#1; {1242#false} is VALID [2022-02-20 22:28:45,303 INFO L290 TraceCheckUtils]: 127: Hoare triple {1242#false} assume !main_#t~switch697#1;main_#t~switch697#1 := main_#t~switch697#1 || 4 == main_~tmp___6~4#1; {1242#false} is VALID [2022-02-20 22:28:45,303 INFO L290 TraceCheckUtils]: 128: Hoare triple {1242#false} assume !main_#t~switch697#1;main_#t~switch697#1 := main_#t~switch697#1 || 5 == main_~tmp___6~4#1; {1242#false} is VALID [2022-02-20 22:28:45,303 INFO L290 TraceCheckUtils]: 129: Hoare triple {1242#false} assume !main_#t~switch697#1;main_#t~switch697#1 := main_#t~switch697#1 || 6 == main_~tmp___6~4#1; {1242#false} is VALID [2022-02-20 22:28:45,304 INFO L290 TraceCheckUtils]: 130: Hoare triple {1242#false} assume main_#t~switch697#1; {1242#false} is VALID [2022-02-20 22:28:45,304 INFO L290 TraceCheckUtils]: 131: Hoare triple {1242#false} assume 2 == ~ldv_state_variable_6~0;assume { :begin_inline_hamachi_open } true;hamachi_open_#in~dev#1.base, hamachi_open_#in~dev#1.offset := ~hamachi_netdev_ops_group1~0.base, ~hamachi_netdev_ops_group1~0.offset;havoc hamachi_open_#res#1;havoc hamachi_open_#t~ret279#1.base, hamachi_open_#t~ret279#1.offset, hamachi_open_#t~mem280#1.base, hamachi_open_#t~mem280#1.offset, hamachi_open_#t~mem281#1.base, hamachi_open_#t~mem281#1.offset, hamachi_open_#t~mem282#1, hamachi_open_#t~ret283#1, hamachi_open_#t~mem284#1, hamachi_open_#t~mem285#1, hamachi_open_#t~mem286#1.base, hamachi_open_#t~mem286#1.offset, hamachi_open_#t~mem287#1, hamachi_open_#t~ret288#1, hamachi_open_#t~switch289#1, hamachi_open_#t~nondet290#1, hamachi_open_#t~mem291#1, hamachi_open_#t~mem292#1, hamachi_open_#t~mem293#1, hamachi_open_#t~mem294#1, hamachi_open_#t~mem295#1, hamachi_open_#t~nondet296#1, hamachi_open_#t~nondet297#1, hamachi_open_#t~nondet298#1, hamachi_open_#t~ret299#1, hamachi_open_#t~ret300#1, hamachi_open_#t~nondet301#1, hamachi_open_#t~ret302#1, hamachi_open_~dev#1.base, hamachi_open_~dev#1.offset, hamachi_open_~hmp~3#1.base, hamachi_open_~hmp~3#1.offset, hamachi_open_~tmp~30#1.base, hamachi_open_~tmp~30#1.offset, hamachi_open_~ioaddr~3#1.base, hamachi_open_~ioaddr~3#1.offset, hamachi_open_~i~3#1, hamachi_open_~rx_int_var~1#1, hamachi_open_~tx_int_var~1#1, hamachi_open_~fifo_info~0#1, hamachi_open_~tmp___0~10#1, hamachi_open_~tmp___1~8#1, hamachi_open_~tmp___2~4#1;hamachi_open_~dev#1.base, hamachi_open_~dev#1.offset := hamachi_open_#in~dev#1.base, hamachi_open_#in~dev#1.offset;havoc hamachi_open_~hmp~3#1.base, hamachi_open_~hmp~3#1.offset;havoc hamachi_open_~tmp~30#1.base, hamachi_open_~tmp~30#1.offset;havoc hamachi_open_~ioaddr~3#1.base, hamachi_open_~ioaddr~3#1.offset;havoc hamachi_open_~i~3#1;havoc hamachi_open_~rx_int_var~1#1;havoc hamachi_open_~tx_int_var~1#1;havoc hamachi_open_~fifo_info~0#1;havoc hamachi_open_~tmp___0~10#1;havoc hamachi_open_~tmp___1~8#1;havoc hamachi_open_~tmp___2~4#1; {1242#false} is VALID [2022-02-20 22:28:45,304 INFO L272 TraceCheckUtils]: 132: Hoare triple {1242#false} call hamachi_open_#t~ret279#1.base, hamachi_open_#t~ret279#1.offset := netdev_priv(hamachi_open_~dev#1.base, hamachi_open_~dev#1.offset); {1241#true} is VALID [2022-02-20 22:28:45,304 INFO L290 TraceCheckUtils]: 133: Hoare triple {1241#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3008 + ~dev.offset; {1241#true} is VALID [2022-02-20 22:28:45,304 INFO L290 TraceCheckUtils]: 134: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,304 INFO L284 TraceCheckUtils]: 135: Hoare quadruple {1241#true} {1242#false} #3190#return; {1242#false} is VALID [2022-02-20 22:28:45,305 INFO L290 TraceCheckUtils]: 136: Hoare triple {1242#false} hamachi_open_~tmp~30#1.base, hamachi_open_~tmp~30#1.offset := hamachi_open_#t~ret279#1.base, hamachi_open_#t~ret279#1.offset;havoc hamachi_open_#t~ret279#1.base, hamachi_open_#t~ret279#1.offset;hamachi_open_~hmp~3#1.base, hamachi_open_~hmp~3#1.offset := hamachi_open_~tmp~30#1.base, hamachi_open_~tmp~30#1.offset;call hamachi_open_#t~mem280#1.base, hamachi_open_#t~mem280#1.offset := read~$Pointer$(hamachi_open_~hmp~3#1.base, 4926 + hamachi_open_~hmp~3#1.offset, 8);hamachi_open_~ioaddr~3#1.base, hamachi_open_~ioaddr~3#1.offset := hamachi_open_#t~mem280#1.base, hamachi_open_#t~mem280#1.offset;havoc hamachi_open_#t~mem280#1.base, hamachi_open_#t~mem280#1.offset;call hamachi_open_#t~mem281#1.base, hamachi_open_#t~mem281#1.offset := read~$Pointer$(hamachi_open_~hmp~3#1.base, 4918 + hamachi_open_~hmp~3#1.offset, 8);call hamachi_open_#t~mem282#1 := read~int(hamachi_open_#t~mem281#1.base, 1489 + hamachi_open_#t~mem281#1.offset, 4);assume { :begin_inline_ldv_request_irq_39 } true;ldv_request_irq_39_#in~irq#1, ldv_request_irq_39_#in~handler#1.base, ldv_request_irq_39_#in~handler#1.offset, ldv_request_irq_39_#in~flags#1, ldv_request_irq_39_#in~name#1.base, ldv_request_irq_39_#in~name#1.offset, ldv_request_irq_39_#in~dev#1.base, ldv_request_irq_39_#in~dev#1.offset := hamachi_open_#t~mem282#1, #funAddr~hamachi_interrupt.base, #funAddr~hamachi_interrupt.offset, 128, hamachi_open_~dev#1.base, hamachi_open_~dev#1.offset, hamachi_open_~dev#1.base, hamachi_open_~dev#1.offset;havoc ldv_request_irq_39_#res#1;havoc ldv_request_irq_39_#t~ret749#1, ldv_request_irq_39_#t~ret750#1, ldv_request_irq_39_~irq#1, ldv_request_irq_39_~handler#1.base, ldv_request_irq_39_~handler#1.offset, ldv_request_irq_39_~flags#1, ldv_request_irq_39_~name#1.base, ldv_request_irq_39_~name#1.offset, ldv_request_irq_39_~dev#1.base, ldv_request_irq_39_~dev#1.offset, ldv_request_irq_39_~ldv_func_res~1#1, ldv_request_irq_39_~tmp~65#1, ldv_request_irq_39_~tmp___0~29#1;ldv_request_irq_39_~irq#1 := ldv_request_irq_39_#in~irq#1;ldv_request_irq_39_~handler#1.base, ldv_request_irq_39_~handler#1.offset := ldv_request_irq_39_#in~handler#1.base, ldv_request_irq_39_#in~handler#1.offset;ldv_request_irq_39_~flags#1 := ldv_request_irq_39_#in~flags#1;ldv_request_irq_39_~name#1.base, ldv_request_irq_39_~name#1.offset := ldv_request_irq_39_#in~name#1.base, ldv_request_irq_39_#in~name#1.offset;ldv_request_irq_39_~dev#1.base, ldv_request_irq_39_~dev#1.offset := ldv_request_irq_39_#in~dev#1.base, ldv_request_irq_39_#in~dev#1.offset;havoc ldv_request_irq_39_~ldv_func_res~1#1;havoc ldv_request_irq_39_~tmp~65#1;havoc ldv_request_irq_39_~tmp___0~29#1;assume { :begin_inline_request_irq } true;request_irq_#in~irq#1, request_irq_#in~handler#1.base, request_irq_#in~handler#1.offset, request_irq_#in~flags#1, request_irq_#in~name#1.base, request_irq_#in~name#1.offset, request_irq_#in~dev#1.base, request_irq_#in~dev#1.offset := ldv_request_irq_39_~irq#1, ldv_request_irq_39_~handler#1.base, ldv_request_irq_39_~handler#1.offset, ldv_request_irq_39_~flags#1, ldv_request_irq_39_~name#1.base, ldv_request_irq_39_~name#1.offset, ldv_request_irq_39_~dev#1.base, ldv_request_irq_39_~dev#1.offset;havoc request_irq_#res#1;havoc request_irq_#t~ret49#1, request_irq_~irq#1, request_irq_~handler#1.base, request_irq_~handler#1.offset, request_irq_~flags#1, request_irq_~name#1.base, request_irq_~name#1.offset, request_irq_~dev#1.base, request_irq_~dev#1.offset, request_irq_~tmp~7#1;request_irq_~irq#1 := request_irq_#in~irq#1;request_irq_~handler#1.base, request_irq_~handler#1.offset := request_irq_#in~handler#1.base, request_irq_#in~handler#1.offset;request_irq_~flags#1 := request_irq_#in~flags#1;request_irq_~name#1.base, request_irq_~name#1.offset := request_irq_#in~name#1.base, request_irq_#in~name#1.offset;request_irq_~dev#1.base, request_irq_~dev#1.offset := request_irq_#in~dev#1.base, request_irq_#in~dev#1.offset;havoc request_irq_~tmp~7#1;assume { :begin_inline_request_threaded_irq } true;request_threaded_irq_#in~arg0#1, request_threaded_irq_#in~arg1#1.base, request_threaded_irq_#in~arg1#1.offset, request_threaded_irq_#in~arg2#1.base, request_threaded_irq_#in~arg2#1.offset, request_threaded_irq_#in~arg3#1, request_threaded_irq_#in~arg4#1.base, request_threaded_irq_#in~arg4#1.offset, request_threaded_irq_#in~arg5#1.base, request_threaded_irq_#in~arg5#1.offset := request_irq_~irq#1, request_irq_~handler#1.base, request_irq_~handler#1.offset, 0, 0, request_irq_~flags#1, request_irq_~name#1.base, request_irq_~name#1.offset, request_irq_~dev#1.base, request_irq_~dev#1.offset;havoc request_threaded_irq_#res#1;havoc request_threaded_irq_#t~nondet781#1, request_threaded_irq_~arg0#1, request_threaded_irq_~arg1#1.base, request_threaded_irq_~arg1#1.offset, request_threaded_irq_~arg2#1.base, request_threaded_irq_~arg2#1.offset, request_threaded_irq_~arg3#1, request_threaded_irq_~arg4#1.base, request_threaded_irq_~arg4#1.offset, request_threaded_irq_~arg5#1.base, request_threaded_irq_~arg5#1.offset;request_threaded_irq_~arg0#1 := request_threaded_irq_#in~arg0#1;request_threaded_irq_~arg1#1.base, request_threaded_irq_~arg1#1.offset := request_threaded_irq_#in~arg1#1.base, request_threaded_irq_#in~arg1#1.offset;request_threaded_irq_~arg2#1.base, request_threaded_irq_~arg2#1.offset := request_threaded_irq_#in~arg2#1.base, request_threaded_irq_#in~arg2#1.offset;request_threaded_irq_~arg3#1 := request_threaded_irq_#in~arg3#1;request_threaded_irq_~arg4#1.base, request_threaded_irq_~arg4#1.offset := request_threaded_irq_#in~arg4#1.base, request_threaded_irq_#in~arg4#1.offset;request_threaded_irq_~arg5#1.base, request_threaded_irq_~arg5#1.offset := request_threaded_irq_#in~arg5#1.base, request_threaded_irq_#in~arg5#1.offset;assume -2147483648 <= request_threaded_irq_#t~nondet781#1 && request_threaded_irq_#t~nondet781#1 <= 2147483647;request_threaded_irq_#res#1 := request_threaded_irq_#t~nondet781#1;havoc request_threaded_irq_#t~nondet781#1; {1242#false} is VALID [2022-02-20 22:28:45,305 INFO L290 TraceCheckUtils]: 137: Hoare triple {1242#false} request_irq_#t~ret49#1 := request_threaded_irq_#res#1;assume { :end_inline_request_threaded_irq } true;assume -2147483648 <= request_irq_#t~ret49#1 && request_irq_#t~ret49#1 <= 2147483647;request_irq_~tmp~7#1 := request_irq_#t~ret49#1;havoc request_irq_#t~ret49#1;request_irq_#res#1 := request_irq_~tmp~7#1; {1242#false} is VALID [2022-02-20 22:28:45,305 INFO L290 TraceCheckUtils]: 138: Hoare triple {1242#false} ldv_request_irq_39_#t~ret749#1 := request_irq_#res#1;assume { :end_inline_request_irq } true;assume -2147483648 <= ldv_request_irq_39_#t~ret749#1 && ldv_request_irq_39_#t~ret749#1 <= 2147483647;ldv_request_irq_39_~tmp~65#1 := ldv_request_irq_39_#t~ret749#1;havoc ldv_request_irq_39_#t~ret749#1;ldv_request_irq_39_~ldv_func_res~1#1 := ldv_request_irq_39_~tmp~65#1;assume { :begin_inline_reg_check_1 } true;reg_check_1_#in~handler#1.base, reg_check_1_#in~handler#1.offset := ldv_request_irq_39_~handler#1.base, ldv_request_irq_39_~handler#1.offset;havoc reg_check_1_#res#1;havoc reg_check_1_~handler#1.base, reg_check_1_~handler#1.offset;reg_check_1_~handler#1.base, reg_check_1_~handler#1.offset := reg_check_1_#in~handler#1.base, reg_check_1_#in~handler#1.offset; {1242#false} is VALID [2022-02-20 22:28:45,305 INFO L290 TraceCheckUtils]: 139: Hoare triple {1242#false} assume (reg_check_1_~handler#1.base + reg_check_1_~handler#1.offset) % 18446744073709551616 == (#funAddr~hamachi_interrupt.base + #funAddr~hamachi_interrupt.offset) % 18446744073709551616;reg_check_1_#res#1 := 1; {1242#false} is VALID [2022-02-20 22:28:45,305 INFO L290 TraceCheckUtils]: 140: Hoare triple {1242#false} ldv_request_irq_39_#t~ret750#1 := reg_check_1_#res#1;assume { :end_inline_reg_check_1 } true;assume -2147483648 <= ldv_request_irq_39_#t~ret750#1 && ldv_request_irq_39_#t~ret750#1 <= 2147483647;ldv_request_irq_39_~tmp___0~29#1 := ldv_request_irq_39_#t~ret750#1;havoc ldv_request_irq_39_#t~ret750#1; {1242#false} is VALID [2022-02-20 22:28:45,306 INFO L290 TraceCheckUtils]: 141: Hoare triple {1242#false} assume !(0 != ldv_request_irq_39_~tmp___0~29#1 && 0 == ldv_request_irq_39_~ldv_func_res~1#1); {1242#false} is VALID [2022-02-20 22:28:45,306 INFO L290 TraceCheckUtils]: 142: Hoare triple {1242#false} ldv_request_irq_39_#res#1 := ldv_request_irq_39_~ldv_func_res~1#1; {1242#false} is VALID [2022-02-20 22:28:45,306 INFO L290 TraceCheckUtils]: 143: Hoare triple {1242#false} hamachi_open_#t~ret283#1 := ldv_request_irq_39_#res#1;assume { :end_inline_ldv_request_irq_39 } true;assume -2147483648 <= hamachi_open_#t~ret283#1 && hamachi_open_#t~ret283#1 <= 2147483647;hamachi_open_~i~3#1 := hamachi_open_#t~ret283#1;havoc hamachi_open_#t~mem281#1.base, hamachi_open_#t~mem281#1.offset;havoc hamachi_open_#t~mem282#1;havoc hamachi_open_#t~ret283#1; {1242#false} is VALID [2022-02-20 22:28:45,307 INFO L290 TraceCheckUtils]: 144: Hoare triple {1242#false} assume !(0 != hamachi_open_~i~3#1);assume { :begin_inline_hamachi_init_ring } true;hamachi_init_ring_#in~dev#1.base, hamachi_init_ring_#in~dev#1.offset := hamachi_open_~dev#1.base, hamachi_open_~dev#1.offset;havoc hamachi_init_ring_#t~ret382#1.base, hamachi_init_ring_#t~ret382#1.offset, hamachi_init_ring_#t~mem383#1, hamachi_init_ring_#t~ite385#1, hamachi_init_ring_#t~mem384#1, hamachi_init_ring_#t~mem386#1.base, hamachi_init_ring_#t~mem386#1.offset, hamachi_init_ring_#t~mem387#1, hamachi_init_ring_#t~ret388#1.base, hamachi_init_ring_#t~ret388#1.offset, hamachi_init_ring_#t~mem389#1.base, hamachi_init_ring_#t~mem389#1.offset, hamachi_init_ring_#t~mem390#1.base, hamachi_init_ring_#t~mem390#1.offset, hamachi_init_ring_#t~mem391#1, hamachi_init_ring_#t~ret392#1, hamachi_init_ring_#t~mem393#1.base, hamachi_init_ring_#t~mem393#1.offset, hamachi_init_ring_#t~mem394#1.base, hamachi_init_ring_#t~mem394#1.offset, hamachi_init_ring_#t~mem395#1, hamachi_init_ring_#t~mem396#1.base, hamachi_init_ring_#t~mem396#1.offset, hamachi_init_ring_#t~mem397#1.base, hamachi_init_ring_#t~mem397#1.offset, hamachi_init_ring_#t~mem398#1, hamachi_init_ring_#t~mem399#1.base, hamachi_init_ring_#t~mem399#1.offset, hamachi_init_ring_#t~mem400#1.base, hamachi_init_ring_#t~mem400#1.offset, hamachi_init_ring_#t~mem401#1.base, hamachi_init_ring_#t~mem401#1.offset, hamachi_init_ring_#t~mem402#1, hamachi_init_ring_~dev#1.base, hamachi_init_ring_~dev#1.offset, hamachi_init_ring_~hmp~7#1.base, hamachi_init_ring_~hmp~7#1.offset, hamachi_init_ring_~tmp~34#1.base, hamachi_init_ring_~tmp~34#1.offset, hamachi_init_ring_~i~5#1, hamachi_init_ring_~tmp___0~13#1, hamachi_init_ring_~tmp___1~11#1, hamachi_init_ring_~skb~3#1.base, hamachi_init_ring_~skb~3#1.offset, hamachi_init_ring_~tmp___2~7#1.base, hamachi_init_ring_~tmp___2~7#1.offset, hamachi_init_ring_~tmp___3~4#1;hamachi_init_ring_~dev#1.base, hamachi_init_ring_~dev#1.offset := hamachi_init_ring_#in~dev#1.base, hamachi_init_ring_#in~dev#1.offset;havoc hamachi_init_ring_~hmp~7#1.base, hamachi_init_ring_~hmp~7#1.offset;havoc hamachi_init_ring_~tmp~34#1.base, hamachi_init_ring_~tmp~34#1.offset;havoc hamachi_init_ring_~i~5#1;havoc hamachi_init_ring_~tmp___0~13#1;havoc hamachi_init_ring_~tmp___1~11#1;havoc hamachi_init_ring_~skb~3#1.base, hamachi_init_ring_~skb~3#1.offset;havoc hamachi_init_ring_~tmp___2~7#1.base, hamachi_init_ring_~tmp___2~7#1.offset;havoc hamachi_init_ring_~tmp___3~4#1; {1242#false} is VALID [2022-02-20 22:28:45,308 INFO L272 TraceCheckUtils]: 145: Hoare triple {1242#false} call hamachi_init_ring_#t~ret382#1.base, hamachi_init_ring_#t~ret382#1.offset := netdev_priv(hamachi_init_ring_~dev#1.base, hamachi_init_ring_~dev#1.offset); {1241#true} is VALID [2022-02-20 22:28:45,308 INFO L290 TraceCheckUtils]: 146: Hoare triple {1241#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3008 + ~dev.offset; {1241#true} is VALID [2022-02-20 22:28:45,308 INFO L290 TraceCheckUtils]: 147: Hoare triple {1241#true} assume true; {1241#true} is VALID [2022-02-20 22:28:45,308 INFO L284 TraceCheckUtils]: 148: Hoare quadruple {1241#true} {1242#false} #3192#return; {1242#false} is VALID [2022-02-20 22:28:45,309 INFO L290 TraceCheckUtils]: 149: Hoare triple {1242#false} hamachi_init_ring_~tmp~34#1.base, hamachi_init_ring_~tmp~34#1.offset := hamachi_init_ring_#t~ret382#1.base, hamachi_init_ring_#t~ret382#1.offset;havoc hamachi_init_ring_#t~ret382#1.base, hamachi_init_ring_#t~ret382#1.offset;hamachi_init_ring_~hmp~7#1.base, hamachi_init_ring_~hmp~7#1.offset := hamachi_init_ring_~tmp~34#1.base, hamachi_init_ring_~tmp~34#1.offset;call write~int(0, hamachi_init_ring_~hmp~7#1.base, 4852 + hamachi_init_ring_~hmp~7#1.offset, 1);hamachi_init_ring_~tmp___0~13#1 := 0;call write~int(hamachi_init_ring_~tmp___0~13#1, hamachi_init_ring_~hmp~7#1.base, 4840 + hamachi_init_ring_~hmp~7#1.offset, 4);call write~int(hamachi_init_ring_~tmp___0~13#1, hamachi_init_ring_~hmp~7#1.base, 4832 + hamachi_init_ring_~hmp~7#1.offset, 4);hamachi_init_ring_~tmp___1~11#1 := 0;call write~int(hamachi_init_ring_~tmp___1~11#1, hamachi_init_ring_~hmp~7#1.base, 4844 + hamachi_init_ring_~hmp~7#1.offset, 4);call write~int(hamachi_init_ring_~tmp___1~11#1, hamachi_init_ring_~hmp~7#1.base, 4836 + hamachi_init_ring_~hmp~7#1.offset, 4);call hamachi_init_ring_#t~mem383#1 := read~int(hamachi_init_ring_~dev#1.base, 560 + hamachi_init_ring_~dev#1.offset, 4); {1242#false} is VALID [2022-02-20 22:28:45,309 INFO L290 TraceCheckUtils]: 150: Hoare triple {1242#false} assume hamachi_init_ring_#t~mem383#1 % 4294967296 > 1492;call hamachi_init_ring_#t~mem384#1 := read~int(hamachi_init_ring_~dev#1.base, 560 + hamachi_init_ring_~dev#1.offset, 4);hamachi_init_ring_#t~ite385#1 := 16 + (if 0 == 33 + hamachi_init_ring_#t~mem384#1 then 0 else (if 1 == 33 + hamachi_init_ring_#t~mem384#1 then 0 else ~bitwiseAnd(33 + hamachi_init_ring_#t~mem384#1, 4294967288))); {1242#false} is VALID [2022-02-20 22:28:45,310 INFO L290 TraceCheckUtils]: 151: Hoare triple {1242#false} call write~int(hamachi_init_ring_#t~ite385#1, hamachi_init_ring_~hmp~7#1.base, 4848 + hamachi_init_ring_~hmp~7#1.offset, 4);havoc hamachi_init_ring_#t~mem383#1;havoc hamachi_init_ring_#t~ite385#1;havoc hamachi_init_ring_#t~mem384#1;hamachi_init_ring_~i~5#1 := 0; {1242#false} is VALID [2022-02-20 22:28:45,310 INFO L290 TraceCheckUtils]: 152: Hoare triple {1242#false} assume !(hamachi_init_ring_~i~5#1 <= 511);hamachi_init_ring_~i~5#1 := 0; {1242#false} is VALID [2022-02-20 22:28:45,310 INFO L290 TraceCheckUtils]: 153: Hoare triple {1242#false} assume hamachi_init_ring_~i~5#1 <= 511; {1242#false} is VALID [2022-02-20 22:28:45,310 INFO L290 TraceCheckUtils]: 154: Hoare triple {1242#false} call hamachi_init_ring_#t~mem387#1 := read~int(hamachi_init_ring_~hmp~7#1.base, 4848 + hamachi_init_ring_~hmp~7#1.offset, 4); {1242#false} is VALID [2022-02-20 22:28:45,310 INFO L272 TraceCheckUtils]: 155: Hoare triple {1242#false} call hamachi_init_ring_#t~ret388#1.base, hamachi_init_ring_#t~ret388#1.offset := netdev_alloc_skb(hamachi_init_ring_~dev#1.base, hamachi_init_ring_~dev#1.offset, 2 + hamachi_init_ring_#t~mem387#1); {1242#false} is VALID [2022-02-20 22:28:45,311 INFO L290 TraceCheckUtils]: 156: Hoare triple {1242#false} ~dev#1.base, ~dev#1.offset := #in~dev#1.base, #in~dev#1.offset;~length#1 := #in~length#1;havoc ~tmp~18#1.base, ~tmp~18#1.offset;assume { :begin_inline_ldv___netdev_alloc_skb_31 } true;ldv___netdev_alloc_skb_31_#in~ldv_func_arg1#1.base, ldv___netdev_alloc_skb_31_#in~ldv_func_arg1#1.offset, ldv___netdev_alloc_skb_31_#in~ldv_func_arg2#1, ldv___netdev_alloc_skb_31_#in~flags#1 := ~dev#1.base, ~dev#1.offset, ~length#1, 32;havoc ldv___netdev_alloc_skb_31_#res#1.base, ldv___netdev_alloc_skb_31_#res#1.offset;havoc ldv___netdev_alloc_skb_31_#t~ret742#1.base, ldv___netdev_alloc_skb_31_#t~ret742#1.offset, ldv___netdev_alloc_skb_31_~ldv_func_arg1#1.base, ldv___netdev_alloc_skb_31_~ldv_func_arg1#1.offset, ldv___netdev_alloc_skb_31_~ldv_func_arg2#1, ldv___netdev_alloc_skb_31_~flags#1, ldv___netdev_alloc_skb_31_~tmp~60#1.base, ldv___netdev_alloc_skb_31_~tmp~60#1.offset;ldv___netdev_alloc_skb_31_~ldv_func_arg1#1.base, ldv___netdev_alloc_skb_31_~ldv_func_arg1#1.offset := ldv___netdev_alloc_skb_31_#in~ldv_func_arg1#1.base, ldv___netdev_alloc_skb_31_#in~ldv_func_arg1#1.offset;ldv___netdev_alloc_skb_31_~ldv_func_arg2#1 := ldv___netdev_alloc_skb_31_#in~ldv_func_arg2#1;ldv___netdev_alloc_skb_31_~flags#1 := ldv___netdev_alloc_skb_31_#in~flags#1;havoc ldv___netdev_alloc_skb_31_~tmp~60#1.base, ldv___netdev_alloc_skb_31_~tmp~60#1.offset; {1242#false} is VALID [2022-02-20 22:28:45,311 INFO L272 TraceCheckUtils]: 157: Hoare triple {1242#false} call ldv_check_alloc_flags(ldv___netdev_alloc_skb_31_~flags#1); {1242#false} is VALID [2022-02-20 22:28:45,311 INFO L290 TraceCheckUtils]: 158: Hoare triple {1242#false} ~flags := #in~flags; {1242#false} is VALID [2022-02-20 22:28:45,311 INFO L290 TraceCheckUtils]: 159: Hoare triple {1242#false} assume 0 != ~ldv_spin~0 && 0 != (if 0 == ~flags then 0 else (if 1 == ~flags then 0 else ~bitwiseAnd(~flags, 16))) % 4294967296; {1242#false} is VALID [2022-02-20 22:28:45,311 INFO L272 TraceCheckUtils]: 160: Hoare triple {1242#false} call ldv_error(); {1242#false} is VALID [2022-02-20 22:28:45,312 INFO L290 TraceCheckUtils]: 161: Hoare triple {1242#false} assume !false; {1242#false} is VALID [2022-02-20 22:28:45,314 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 222 trivial. 0 not checked. [2022-02-20 22:28:45,315 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:28:45,315 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1116317708] [2022-02-20 22:28:45,316 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1116317708] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:28:45,316 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 22:28:45,316 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-02-20 22:28:45,318 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1894527373] [2022-02-20 22:28:45,319 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:28:45,323 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 3 states have internal predecessors, (58), 2 states have call successors, (16), 5 states have call predecessors, (16), 1 states have return successors, (13), 2 states have call predecessors, (13), 2 states have call successors, (13) Word has length 162 [2022-02-20 22:28:45,325 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:28:45,329 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 3 states have internal predecessors, (58), 2 states have call successors, (16), 5 states have call predecessors, (16), 1 states have return successors, (13), 2 states have call predecessors, (13), 2 states have call successors, (13) [2022-02-20 22:28:45,436 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 87 edges. 87 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:28:45,436 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-02-20 22:28:45,437 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:28:45,450 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-02-20 22:28:45,451 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2022-02-20 22:28:45,457 INFO L87 Difference]: Start difference. First operand has 1238 states, 895 states have (on average 1.3743016759776536) internal successors, (1230), 923 states have internal predecessors, (1230), 285 states have call successors, (285), 57 states have call predecessors, (285), 56 states have return successors, (277), 267 states have call predecessors, (277), 277 states have call successors, (277) Second operand has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 3 states have internal predecessors, (58), 2 states have call successors, (16), 5 states have call predecessors, (16), 1 states have return successors, (13), 2 states have call predecessors, (13), 2 states have call successors, (13) [2022-02-20 22:28:56,554 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:28:56,554 INFO L93 Difference]: Finished difference Result 3495 states and 5126 transitions. [2022-02-20 22:28:56,555 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-02-20 22:28:56,555 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 3 states have internal predecessors, (58), 2 states have call successors, (16), 5 states have call predecessors, (16), 1 states have return successors, (13), 2 states have call predecessors, (13), 2 states have call successors, (13) Word has length 162 [2022-02-20 22:28:56,555 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 22:28:56,556 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 3 states have internal predecessors, (58), 2 states have call successors, (16), 5 states have call predecessors, (16), 1 states have return successors, (13), 2 states have call predecessors, (13), 2 states have call successors, (13) [2022-02-20 22:28:56,712 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 5126 transitions. [2022-02-20 22:28:56,712 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 3 states have internal predecessors, (58), 2 states have call successors, (16), 5 states have call predecessors, (16), 1 states have return successors, (13), 2 states have call predecessors, (13), 2 states have call successors, (13) [2022-02-20 22:28:56,812 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 5126 transitions. [2022-02-20 22:28:56,813 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 7 states and 5126 transitions. [2022-02-20 22:29:00,617 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 5126 edges. 5126 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:29:01,025 INFO L225 Difference]: With dead ends: 3495 [2022-02-20 22:29:01,026 INFO L226 Difference]: Without dead ends: 2219 [2022-02-20 22:29:01,035 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 50 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=43, Unknown=0, NotChecked=0, Total=72 [2022-02-20 22:29:01,042 INFO L933 BasicCegarLoop]: 1782 mSDtfsCounter, 3092 mSDsluCounter, 1894 mSDsCounter, 0 mSdLazyCounter, 1401 mSolverCounterSat, 1870 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3192 SdHoareTripleChecker+Valid, 3676 SdHoareTripleChecker+Invalid, 3271 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 1870 IncrementalHoareTripleChecker+Valid, 1401 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.2s IncrementalHoareTripleChecker+Time [2022-02-20 22:29:01,043 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [3192 Valid, 3676 Invalid, 3271 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [1870 Valid, 1401 Invalid, 0 Unknown, 0 Unchecked, 3.2s Time] [2022-02-20 22:29:01,060 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2219 states. [2022-02-20 22:29:01,213 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2219 to 1891. [2022-02-20 22:29:01,213 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 22:29:01,227 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2219 states. Second operand has 1891 states, 1385 states have (on average 1.3097472924187725) internal successors, (1814), 1412 states have internal predecessors, (1814), 407 states have call successors, (407), 99 states have call predecessors, (407), 98 states have return successors, (406), 392 states have call predecessors, (406), 406 states have call successors, (406) [2022-02-20 22:29:01,232 INFO L74 IsIncluded]: Start isIncluded. First operand 2219 states. Second operand has 1891 states, 1385 states have (on average 1.3097472924187725) internal successors, (1814), 1412 states have internal predecessors, (1814), 407 states have call successors, (407), 99 states have call predecessors, (407), 98 states have return successors, (406), 392 states have call predecessors, (406), 406 states have call successors, (406) [2022-02-20 22:29:01,238 INFO L87 Difference]: Start difference. First operand 2219 states. Second operand has 1891 states, 1385 states have (on average 1.3097472924187725) internal successors, (1814), 1412 states have internal predecessors, (1814), 407 states have call successors, (407), 99 states have call predecessors, (407), 98 states have return successors, (406), 392 states have call predecessors, (406), 406 states have call successors, (406) [2022-02-20 22:29:01,410 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:29:01,410 INFO L93 Difference]: Finished difference Result 2219 states and 3130 transitions. [2022-02-20 22:29:01,410 INFO L276 IsEmpty]: Start isEmpty. Operand 2219 states and 3130 transitions. [2022-02-20 22:29:01,423 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:29:01,424 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:29:01,429 INFO L74 IsIncluded]: Start isIncluded. First operand has 1891 states, 1385 states have (on average 1.3097472924187725) internal successors, (1814), 1412 states have internal predecessors, (1814), 407 states have call successors, (407), 99 states have call predecessors, (407), 98 states have return successors, (406), 392 states have call predecessors, (406), 406 states have call successors, (406) Second operand 2219 states. [2022-02-20 22:29:01,434 INFO L87 Difference]: Start difference. First operand has 1891 states, 1385 states have (on average 1.3097472924187725) internal successors, (1814), 1412 states have internal predecessors, (1814), 407 states have call successors, (407), 99 states have call predecessors, (407), 98 states have return successors, (406), 392 states have call predecessors, (406), 406 states have call successors, (406) Second operand 2219 states. [2022-02-20 22:29:01,609 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:29:01,609 INFO L93 Difference]: Finished difference Result 2219 states and 3130 transitions. [2022-02-20 22:29:01,609 INFO L276 IsEmpty]: Start isEmpty. Operand 2219 states and 3130 transitions. [2022-02-20 22:29:01,618 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:29:01,618 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:29:01,618 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 22:29:01,618 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 22:29:01,623 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1891 states, 1385 states have (on average 1.3097472924187725) internal successors, (1814), 1412 states have internal predecessors, (1814), 407 states have call successors, (407), 99 states have call predecessors, (407), 98 states have return successors, (406), 392 states have call predecessors, (406), 406 states have call successors, (406) [2022-02-20 22:29:01,807 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1891 states to 1891 states and 2627 transitions. [2022-02-20 22:29:01,809 INFO L78 Accepts]: Start accepts. Automaton has 1891 states and 2627 transitions. Word has length 162 [2022-02-20 22:29:01,810 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 22:29:01,810 INFO L470 AbstractCegarLoop]: Abstraction has 1891 states and 2627 transitions. [2022-02-20 22:29:01,810 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 3 states have internal predecessors, (58), 2 states have call successors, (16), 5 states have call predecessors, (16), 1 states have return successors, (13), 2 states have call predecessors, (13), 2 states have call successors, (13) [2022-02-20 22:29:01,810 INFO L276 IsEmpty]: Start isEmpty. Operand 1891 states and 2627 transitions. [2022-02-20 22:29:01,818 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 177 [2022-02-20 22:29:01,818 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:29:01,818 INFO L514 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:29:01,819 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-02-20 22:29:01,819 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:29:01,819 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:29:01,820 INFO L85 PathProgramCache]: Analyzing trace with hash -1716162063, now seen corresponding path program 1 times [2022-02-20 22:29:01,820 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:29:01,820 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [370340323] [2022-02-20 22:29:01,820 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:29:01,820 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:29:01,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:02,081 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 22:29:02,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:02,103 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:29:02,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:02,109 INFO L290 TraceCheckUtils]: 0: Hoare triple {13554#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {13427#true} is VALID [2022-02-20 22:29:02,110 INFO L290 TraceCheckUtils]: 1: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,110 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {13427#true} {13427#true} #3100#return; {13427#true} is VALID [2022-02-20 22:29:02,110 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:29:02,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:02,118 INFO L290 TraceCheckUtils]: 0: Hoare triple {13427#true} ~cond := #in~cond; {13427#true} is VALID [2022-02-20 22:29:02,119 INFO L290 TraceCheckUtils]: 1: Hoare triple {13427#true} assume !(0 == ~cond); {13427#true} is VALID [2022-02-20 22:29:02,119 INFO L290 TraceCheckUtils]: 2: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,119 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13427#true} {13427#true} #3102#return; {13427#true} is VALID [2022-02-20 22:29:02,119 INFO L290 TraceCheckUtils]: 0: Hoare triple {13546#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {13427#true} is VALID [2022-02-20 22:29:02,124 INFO L272 TraceCheckUtils]: 1: Hoare triple {13427#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {13554#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:29:02,124 INFO L290 TraceCheckUtils]: 2: Hoare triple {13554#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {13427#true} is VALID [2022-02-20 22:29:02,124 INFO L290 TraceCheckUtils]: 3: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,124 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {13427#true} {13427#true} #3100#return; {13427#true} is VALID [2022-02-20 22:29:02,125 INFO L290 TraceCheckUtils]: 5: Hoare triple {13427#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {13427#true} is VALID [2022-02-20 22:29:02,125 INFO L272 TraceCheckUtils]: 6: Hoare triple {13427#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {13427#true} is VALID [2022-02-20 22:29:02,125 INFO L290 TraceCheckUtils]: 7: Hoare triple {13427#true} ~cond := #in~cond; {13427#true} is VALID [2022-02-20 22:29:02,125 INFO L290 TraceCheckUtils]: 8: Hoare triple {13427#true} assume !(0 == ~cond); {13427#true} is VALID [2022-02-20 22:29:02,125 INFO L290 TraceCheckUtils]: 9: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,125 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {13427#true} {13427#true} #3102#return; {13427#true} is VALID [2022-02-20 22:29:02,125 INFO L290 TraceCheckUtils]: 11: Hoare triple {13427#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {13427#true} is VALID [2022-02-20 22:29:02,126 INFO L290 TraceCheckUtils]: 12: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,126 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {13427#true} {13429#(= ~ldv_irq_1_0~0 0)} #3120#return; {13429#(= ~ldv_irq_1_0~0 0)} is VALID [2022-02-20 22:29:02,127 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 18 [2022-02-20 22:29:02,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:02,139 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:29:02,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:02,145 INFO L290 TraceCheckUtils]: 0: Hoare triple {13554#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {13427#true} is VALID [2022-02-20 22:29:02,146 INFO L290 TraceCheckUtils]: 1: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,146 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {13427#true} {13427#true} #3100#return; {13427#true} is VALID [2022-02-20 22:29:02,146 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:29:02,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:02,153 INFO L290 TraceCheckUtils]: 0: Hoare triple {13427#true} ~cond := #in~cond; {13427#true} is VALID [2022-02-20 22:29:02,153 INFO L290 TraceCheckUtils]: 1: Hoare triple {13427#true} assume !(0 == ~cond); {13427#true} is VALID [2022-02-20 22:29:02,153 INFO L290 TraceCheckUtils]: 2: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,153 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13427#true} {13427#true} #3102#return; {13427#true} is VALID [2022-02-20 22:29:02,154 INFO L290 TraceCheckUtils]: 0: Hoare triple {13546#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {13427#true} is VALID [2022-02-20 22:29:02,154 INFO L272 TraceCheckUtils]: 1: Hoare triple {13427#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {13554#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:29:02,154 INFO L290 TraceCheckUtils]: 2: Hoare triple {13554#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {13427#true} is VALID [2022-02-20 22:29:02,155 INFO L290 TraceCheckUtils]: 3: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,155 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {13427#true} {13427#true} #3100#return; {13427#true} is VALID [2022-02-20 22:29:02,155 INFO L290 TraceCheckUtils]: 5: Hoare triple {13427#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {13427#true} is VALID [2022-02-20 22:29:02,155 INFO L272 TraceCheckUtils]: 6: Hoare triple {13427#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {13427#true} is VALID [2022-02-20 22:29:02,155 INFO L290 TraceCheckUtils]: 7: Hoare triple {13427#true} ~cond := #in~cond; {13427#true} is VALID [2022-02-20 22:29:02,155 INFO L290 TraceCheckUtils]: 8: Hoare triple {13427#true} assume !(0 == ~cond); {13427#true} is VALID [2022-02-20 22:29:02,155 INFO L290 TraceCheckUtils]: 9: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,156 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {13427#true} {13427#true} #3102#return; {13427#true} is VALID [2022-02-20 22:29:02,156 INFO L290 TraceCheckUtils]: 11: Hoare triple {13427#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {13427#true} is VALID [2022-02-20 22:29:02,156 INFO L290 TraceCheckUtils]: 12: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,156 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {13427#true} {13429#(= ~ldv_irq_1_0~0 0)} #3122#return; {13429#(= ~ldv_irq_1_0~0 0)} is VALID [2022-02-20 22:29:02,157 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 34 [2022-02-20 22:29:02,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:02,170 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:29:02,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:02,176 INFO L290 TraceCheckUtils]: 0: Hoare triple {13554#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {13427#true} is VALID [2022-02-20 22:29:02,177 INFO L290 TraceCheckUtils]: 1: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,181 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {13427#true} {13427#true} #3100#return; {13427#true} is VALID [2022-02-20 22:29:02,181 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:29:02,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:02,187 INFO L290 TraceCheckUtils]: 0: Hoare triple {13427#true} ~cond := #in~cond; {13427#true} is VALID [2022-02-20 22:29:02,188 INFO L290 TraceCheckUtils]: 1: Hoare triple {13427#true} assume !(0 == ~cond); {13427#true} is VALID [2022-02-20 22:29:02,189 INFO L290 TraceCheckUtils]: 2: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,190 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13427#true} {13427#true} #3102#return; {13427#true} is VALID [2022-02-20 22:29:02,191 INFO L290 TraceCheckUtils]: 0: Hoare triple {13546#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {13427#true} is VALID [2022-02-20 22:29:02,192 INFO L272 TraceCheckUtils]: 1: Hoare triple {13427#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {13554#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:29:02,192 INFO L290 TraceCheckUtils]: 2: Hoare triple {13554#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {13427#true} is VALID [2022-02-20 22:29:02,193 INFO L290 TraceCheckUtils]: 3: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,193 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {13427#true} {13427#true} #3100#return; {13427#true} is VALID [2022-02-20 22:29:02,194 INFO L290 TraceCheckUtils]: 5: Hoare triple {13427#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {13427#true} is VALID [2022-02-20 22:29:02,194 INFO L272 TraceCheckUtils]: 6: Hoare triple {13427#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {13427#true} is VALID [2022-02-20 22:29:02,194 INFO L290 TraceCheckUtils]: 7: Hoare triple {13427#true} ~cond := #in~cond; {13427#true} is VALID [2022-02-20 22:29:02,194 INFO L290 TraceCheckUtils]: 8: Hoare triple {13427#true} assume !(0 == ~cond); {13427#true} is VALID [2022-02-20 22:29:02,194 INFO L290 TraceCheckUtils]: 9: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,194 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {13427#true} {13427#true} #3102#return; {13427#true} is VALID [2022-02-20 22:29:02,197 INFO L290 TraceCheckUtils]: 11: Hoare triple {13427#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {13427#true} is VALID [2022-02-20 22:29:02,199 INFO L290 TraceCheckUtils]: 12: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,200 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {13427#true} {13429#(= ~ldv_irq_1_0~0 0)} #3124#return; {13429#(= ~ldv_irq_1_0~0 0)} is VALID [2022-02-20 22:29:02,200 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 50 [2022-02-20 22:29:02,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:02,215 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:29:02,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:02,222 INFO L290 TraceCheckUtils]: 0: Hoare triple {13554#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {13427#true} is VALID [2022-02-20 22:29:02,223 INFO L290 TraceCheckUtils]: 1: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,223 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {13427#true} {13427#true} #3100#return; {13427#true} is VALID [2022-02-20 22:29:02,223 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:29:02,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:02,230 INFO L290 TraceCheckUtils]: 0: Hoare triple {13427#true} ~cond := #in~cond; {13427#true} is VALID [2022-02-20 22:29:02,231 INFO L290 TraceCheckUtils]: 1: Hoare triple {13427#true} assume !(0 == ~cond); {13427#true} is VALID [2022-02-20 22:29:02,231 INFO L290 TraceCheckUtils]: 2: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,231 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13427#true} {13427#true} #3102#return; {13427#true} is VALID [2022-02-20 22:29:02,231 INFO L290 TraceCheckUtils]: 0: Hoare triple {13546#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {13427#true} is VALID [2022-02-20 22:29:02,232 INFO L272 TraceCheckUtils]: 1: Hoare triple {13427#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {13554#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:29:02,232 INFO L290 TraceCheckUtils]: 2: Hoare triple {13554#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {13427#true} is VALID [2022-02-20 22:29:02,232 INFO L290 TraceCheckUtils]: 3: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,232 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {13427#true} {13427#true} #3100#return; {13427#true} is VALID [2022-02-20 22:29:02,232 INFO L290 TraceCheckUtils]: 5: Hoare triple {13427#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {13427#true} is VALID [2022-02-20 22:29:02,233 INFO L272 TraceCheckUtils]: 6: Hoare triple {13427#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {13427#true} is VALID [2022-02-20 22:29:02,233 INFO L290 TraceCheckUtils]: 7: Hoare triple {13427#true} ~cond := #in~cond; {13427#true} is VALID [2022-02-20 22:29:02,233 INFO L290 TraceCheckUtils]: 8: Hoare triple {13427#true} assume !(0 == ~cond); {13427#true} is VALID [2022-02-20 22:29:02,233 INFO L290 TraceCheckUtils]: 9: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,233 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {13427#true} {13427#true} #3102#return; {13427#true} is VALID [2022-02-20 22:29:02,233 INFO L290 TraceCheckUtils]: 11: Hoare triple {13427#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {13427#true} is VALID [2022-02-20 22:29:02,233 INFO L290 TraceCheckUtils]: 12: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,234 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {13427#true} {13429#(= ~ldv_irq_1_0~0 0)} #3126#return; {13429#(= ~ldv_irq_1_0~0 0)} is VALID [2022-02-20 22:29:02,234 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 66 [2022-02-20 22:29:02,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:02,259 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:29:02,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:02,265 INFO L290 TraceCheckUtils]: 0: Hoare triple {13554#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {13427#true} is VALID [2022-02-20 22:29:02,265 INFO L290 TraceCheckUtils]: 1: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,265 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {13427#true} {13427#true} #3100#return; {13427#true} is VALID [2022-02-20 22:29:02,267 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:29:02,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:02,273 INFO L290 TraceCheckUtils]: 0: Hoare triple {13427#true} ~cond := #in~cond; {13427#true} is VALID [2022-02-20 22:29:02,274 INFO L290 TraceCheckUtils]: 1: Hoare triple {13427#true} assume !(0 == ~cond); {13427#true} is VALID [2022-02-20 22:29:02,274 INFO L290 TraceCheckUtils]: 2: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,274 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13427#true} {13427#true} #3102#return; {13427#true} is VALID [2022-02-20 22:29:02,274 INFO L290 TraceCheckUtils]: 0: Hoare triple {13546#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {13427#true} is VALID [2022-02-20 22:29:02,275 INFO L272 TraceCheckUtils]: 1: Hoare triple {13427#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {13554#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:29:02,275 INFO L290 TraceCheckUtils]: 2: Hoare triple {13554#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {13427#true} is VALID [2022-02-20 22:29:02,275 INFO L290 TraceCheckUtils]: 3: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,276 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {13427#true} {13427#true} #3100#return; {13427#true} is VALID [2022-02-20 22:29:02,276 INFO L290 TraceCheckUtils]: 5: Hoare triple {13427#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {13427#true} is VALID [2022-02-20 22:29:02,276 INFO L272 TraceCheckUtils]: 6: Hoare triple {13427#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {13427#true} is VALID [2022-02-20 22:29:02,276 INFO L290 TraceCheckUtils]: 7: Hoare triple {13427#true} ~cond := #in~cond; {13427#true} is VALID [2022-02-20 22:29:02,276 INFO L290 TraceCheckUtils]: 8: Hoare triple {13427#true} assume !(0 == ~cond); {13427#true} is VALID [2022-02-20 22:29:02,276 INFO L290 TraceCheckUtils]: 9: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,276 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {13427#true} {13427#true} #3102#return; {13427#true} is VALID [2022-02-20 22:29:02,276 INFO L290 TraceCheckUtils]: 11: Hoare triple {13427#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {13427#true} is VALID [2022-02-20 22:29:02,277 INFO L290 TraceCheckUtils]: 12: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,277 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {13427#true} {13429#(= ~ldv_irq_1_0~0 0)} #3128#return; {13429#(= ~ldv_irq_1_0~0 0)} is VALID [2022-02-20 22:29:02,278 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 82 [2022-02-20 22:29:02,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:02,291 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:29:02,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:02,297 INFO L290 TraceCheckUtils]: 0: Hoare triple {13554#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {13427#true} is VALID [2022-02-20 22:29:02,297 INFO L290 TraceCheckUtils]: 1: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,297 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {13427#true} {13427#true} #3100#return; {13427#true} is VALID [2022-02-20 22:29:02,298 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:29:02,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:02,303 INFO L290 TraceCheckUtils]: 0: Hoare triple {13427#true} ~cond := #in~cond; {13427#true} is VALID [2022-02-20 22:29:02,304 INFO L290 TraceCheckUtils]: 1: Hoare triple {13427#true} assume !(0 == ~cond); {13427#true} is VALID [2022-02-20 22:29:02,304 INFO L290 TraceCheckUtils]: 2: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,304 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13427#true} {13427#true} #3102#return; {13427#true} is VALID [2022-02-20 22:29:02,304 INFO L290 TraceCheckUtils]: 0: Hoare triple {13546#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {13427#true} is VALID [2022-02-20 22:29:02,305 INFO L272 TraceCheckUtils]: 1: Hoare triple {13427#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {13554#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:29:02,305 INFO L290 TraceCheckUtils]: 2: Hoare triple {13554#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {13427#true} is VALID [2022-02-20 22:29:02,306 INFO L290 TraceCheckUtils]: 3: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,306 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {13427#true} {13427#true} #3100#return; {13427#true} is VALID [2022-02-20 22:29:02,306 INFO L290 TraceCheckUtils]: 5: Hoare triple {13427#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {13427#true} is VALID [2022-02-20 22:29:02,306 INFO L272 TraceCheckUtils]: 6: Hoare triple {13427#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {13427#true} is VALID [2022-02-20 22:29:02,306 INFO L290 TraceCheckUtils]: 7: Hoare triple {13427#true} ~cond := #in~cond; {13427#true} is VALID [2022-02-20 22:29:02,306 INFO L290 TraceCheckUtils]: 8: Hoare triple {13427#true} assume !(0 == ~cond); {13427#true} is VALID [2022-02-20 22:29:02,306 INFO L290 TraceCheckUtils]: 9: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,307 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {13427#true} {13427#true} #3102#return; {13427#true} is VALID [2022-02-20 22:29:02,308 INFO L290 TraceCheckUtils]: 11: Hoare triple {13427#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {13427#true} is VALID [2022-02-20 22:29:02,309 INFO L290 TraceCheckUtils]: 12: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,309 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {13427#true} {13429#(= ~ldv_irq_1_0~0 0)} #3130#return; {13429#(= ~ldv_irq_1_0~0 0)} is VALID [2022-02-20 22:29:02,316 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 99 [2022-02-20 22:29:02,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:02,327 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:29:02,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:02,335 INFO L290 TraceCheckUtils]: 0: Hoare triple {13590#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr788 := 0; {13427#true} is VALID [2022-02-20 22:29:02,335 INFO L290 TraceCheckUtils]: 1: Hoare triple {13427#true} assume !(#t~loopctr788 % 18446744073709551616 < #amount % 18446744073709551616); {13427#true} is VALID [2022-02-20 22:29:02,336 INFO L290 TraceCheckUtils]: 2: Hoare triple {13427#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {13427#true} is VALID [2022-02-20 22:29:02,336 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13427#true} {13427#true} #3454#return; {13427#true} is VALID [2022-02-20 22:29:02,336 INFO L290 TraceCheckUtils]: 0: Hoare triple {13590#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {13427#true} is VALID [2022-02-20 22:29:02,337 INFO L272 TraceCheckUtils]: 1: Hoare triple {13427#true} call #t~memset~res15.base, #t~memset~res15.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, ~n); {13590#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:29:02,337 INFO L290 TraceCheckUtils]: 2: Hoare triple {13590#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr788 := 0; {13427#true} is VALID [2022-02-20 22:29:02,337 INFO L290 TraceCheckUtils]: 3: Hoare triple {13427#true} assume !(#t~loopctr788 % 18446744073709551616 < #amount % 18446744073709551616); {13427#true} is VALID [2022-02-20 22:29:02,337 INFO L290 TraceCheckUtils]: 4: Hoare triple {13427#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {13427#true} is VALID [2022-02-20 22:29:02,337 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {13427#true} {13427#true} #3454#return; {13427#true} is VALID [2022-02-20 22:29:02,337 INFO L290 TraceCheckUtils]: 6: Hoare triple {13427#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res15.base, #t~memset~res15.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {13427#true} is VALID [2022-02-20 22:29:02,338 INFO L290 TraceCheckUtils]: 7: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,338 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {13427#true} {13429#(= ~ldv_irq_1_0~0 0)} #3132#return; {13429#(= ~ldv_irq_1_0~0 0)} is VALID [2022-02-20 22:29:02,339 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 110 [2022-02-20 22:29:02,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:02,354 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:29:02,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:02,361 INFO L290 TraceCheckUtils]: 0: Hoare triple {13590#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr788 := 0; {13427#true} is VALID [2022-02-20 22:29:02,361 INFO L290 TraceCheckUtils]: 1: Hoare triple {13427#true} assume !(#t~loopctr788 % 18446744073709551616 < #amount % 18446744073709551616); {13427#true} is VALID [2022-02-20 22:29:02,362 INFO L290 TraceCheckUtils]: 2: Hoare triple {13427#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {13427#true} is VALID [2022-02-20 22:29:02,362 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13427#true} {13427#true} #3454#return; {13427#true} is VALID [2022-02-20 22:29:02,363 INFO L290 TraceCheckUtils]: 0: Hoare triple {13590#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {13427#true} is VALID [2022-02-20 22:29:02,364 INFO L272 TraceCheckUtils]: 1: Hoare triple {13427#true} call #t~memset~res15.base, #t~memset~res15.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, ~n); {13590#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:29:02,364 INFO L290 TraceCheckUtils]: 2: Hoare triple {13590#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr788 := 0; {13427#true} is VALID [2022-02-20 22:29:02,364 INFO L290 TraceCheckUtils]: 3: Hoare triple {13427#true} assume !(#t~loopctr788 % 18446744073709551616 < #amount % 18446744073709551616); {13427#true} is VALID [2022-02-20 22:29:02,364 INFO L290 TraceCheckUtils]: 4: Hoare triple {13427#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {13427#true} is VALID [2022-02-20 22:29:02,364 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {13427#true} {13427#true} #3454#return; {13427#true} is VALID [2022-02-20 22:29:02,364 INFO L290 TraceCheckUtils]: 6: Hoare triple {13427#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res15.base, #t~memset~res15.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {13427#true} is VALID [2022-02-20 22:29:02,364 INFO L290 TraceCheckUtils]: 7: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,365 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {13427#true} {13429#(= ~ldv_irq_1_0~0 0)} #3134#return; {13429#(= ~ldv_irq_1_0~0 0)} is VALID [2022-02-20 22:29:02,365 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 132 [2022-02-20 22:29:02,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:02,372 INFO L290 TraceCheckUtils]: 0: Hoare triple {13427#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3008 + ~dev.offset; {13427#true} is VALID [2022-02-20 22:29:02,372 INFO L290 TraceCheckUtils]: 1: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,372 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {13427#true} {13428#false} #2898#return; {13428#false} is VALID [2022-02-20 22:29:02,377 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 137 [2022-02-20 22:29:02,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:02,382 INFO L290 TraceCheckUtils]: 0: Hoare triple {13599#(= ~ldv_spin~0 |old(~ldv_spin~0)|)} ~ldv_spin~0 := 1; {13427#true} is VALID [2022-02-20 22:29:02,383 INFO L290 TraceCheckUtils]: 1: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,383 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {13427#true} {13428#false} #2900#return; {13428#false} is VALID [2022-02-20 22:29:02,383 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 145 [2022-02-20 22:29:02,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:02,394 INFO L290 TraceCheckUtils]: 0: Hoare triple {13427#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~2;#res := ~ret~2; {13427#true} is VALID [2022-02-20 22:29:02,394 INFO L290 TraceCheckUtils]: 1: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,394 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {13427#true} {13428#false} #2902#return; {13428#false} is VALID [2022-02-20 22:29:02,395 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 153 [2022-02-20 22:29:02,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:02,402 INFO L290 TraceCheckUtils]: 0: Hoare triple {13427#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3008 + ~dev.offset; {13427#true} is VALID [2022-02-20 22:29:02,402 INFO L290 TraceCheckUtils]: 1: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,402 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {13427#true} {13428#false} #2904#return; {13428#false} is VALID [2022-02-20 22:29:02,403 INFO L290 TraceCheckUtils]: 0: Hoare triple {13427#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(99, 2);call #Ultimate.allocInit(16, 3);call #Ultimate.allocInit(8, 4);call #Ultimate.allocInit(21, 5);call #Ultimate.allocInit(37, 6);call #Ultimate.allocInit(69, 7);call #Ultimate.allocInit(69, 8);call #Ultimate.allocInit(43, 9);call #Ultimate.allocInit(43, 10);call #Ultimate.allocInit(52, 11);call #Ultimate.allocInit(52, 12);call #Ultimate.allocInit(32, 13);call #Ultimate.allocInit(48, 14);call #Ultimate.allocInit(55, 15);call #Ultimate.allocInit(64, 16);call #Ultimate.allocInit(61, 17);call #Ultimate.allocInit(16, 18);call #Ultimate.allocInit(7, 19);call write~init~int(32, 19, 0, 1);call write~init~int(37, 19, 1, 1);call write~init~int(56, 19, 2, 1);call write~init~int(46, 19, 3, 1);call write~init~int(56, 19, 4, 1);call write~init~int(120, 19, 5, 1);call write~init~int(0, 19, 6, 1);call #Ultimate.allocInit(2, 20);call write~init~int(10, 20, 0, 1);call write~init~int(0, 20, 1, 1);call #Ultimate.allocInit(16, 21);call #Ultimate.allocInit(7, 22);call write~init~int(32, 22, 0, 1);call write~init~int(37, 22, 1, 1);call write~init~int(52, 22, 2, 1);call write~init~int(46, 22, 3, 1);call write~init~int(52, 22, 4, 1);call write~init~int(120, 22, 5, 1);call write~init~int(0, 22, 6, 1);call #Ultimate.allocInit(2, 23);call write~init~int(10, 23, 0, 1);call write~init~int(0, 23, 1, 1);call #Ultimate.allocInit(46, 24);call #Ultimate.allocInit(52, 25);call #Ultimate.allocInit(39, 26);call #Ultimate.allocInit(50, 27);call #Ultimate.allocInit(40, 28);call #Ultimate.allocInit(43, 29);call #Ultimate.allocInit(35, 30);call #Ultimate.allocInit(91, 31);call #Ultimate.allocInit(41, 32);call #Ultimate.allocInit(68, 33);call #Ultimate.allocInit(37, 34);call #Ultimate.allocInit(54, 35);call #Ultimate.allocInit(86, 36);call #Ultimate.allocInit(40, 37);call #Ultimate.allocInit(71, 38);call #Ultimate.allocInit(51, 39);call #Ultimate.allocInit(8, 40);call #Ultimate.allocInit(4, 41);call write~init~int(50, 41, 0, 1);call write~init~int(46, 41, 1, 1);call write~init~int(49, 41, 2, 1);call write~init~int(0, 41, 3, 1);call #Ultimate.allocInit(28, 42);call #Ultimate.allocInit(8, 43);call #Ultimate.allocInit(8, 44);~ldv_irq_1_3~0 := 0;~ldv_irq_data_1_1~0.base, ~ldv_irq_data_1_1~0.offset := 0, 0;~pci_counter~0 := 0;~ldv_irq_1_0~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_irq_data_1_0~0.base, ~ldv_irq_data_1_0~0.offset := 0, 0;~ethtool_ops_no_mii_group0~0.base, ~ethtool_ops_no_mii_group0~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_irq_data_1_3~0.base, ~ldv_irq_data_1_3~0.offset := 0, 0;~ethtool_ops_group1~0.base, ~ethtool_ops_group1~0.offset := 0, 0;~ldv_irq_data_1_2~0.base, ~ldv_irq_data_1_2~0.offset := 0, 0;~hamachi_netdev_ops_group1~0.base, ~hamachi_netdev_ops_group1~0.offset := 0, 0;~ldv_irq_1_2~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ethtool_ops_group0~0.base, ~ethtool_ops_group0~0.offset := 0, 0;~ldv_irq_1_1~0 := 0;~ldv_timer_state_2~0 := 0;~ldv_irq_line_1_3~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_irq_line_1_0~0 := 0;~ldv_timer_list_2~0.base, ~ldv_timer_list_2~0.offset := 0, 0;~hamachi_driver_group1~0.base, ~hamachi_driver_group1~0.offset := 0, 0;~ref_cnt~0 := 0;~ldv_irq_line_1_1~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_irq_line_1_2~0 := 0;~ldv_state_variable_4~0 := 0;~debug~0 := 1;~max_interrupt_work~0 := 40;~mtu~0 := 0;~max_rx_latency~0 := 17;~max_rx_gap~0 := 5;~min_rx_pkt~0 := 24;~max_tx_latency~0 := 0;~max_tx_gap~0 := 0;~min_tx_pkt~0 := 48;~rx_copybreak~0 := 0;~force32~0 := 0;~#options~0.base, ~#options~0.offset := 45, 0;call #Ultimate.allocInit(32, 45);call write~init~int(-1, ~#options~0.base, ~#options~0.offset, 4);call write~init~int(-1, ~#options~0.base, 4 + ~#options~0.offset, 4);call write~init~int(-1, ~#options~0.base, 8 + ~#options~0.offset, 4);call write~init~int(-1, ~#options~0.base, 12 + ~#options~0.offset, 4);call write~init~int(-1, ~#options~0.base, 16 + ~#options~0.offset, 4);call write~init~int(-1, ~#options~0.base, 20 + ~#options~0.offset, 4);call write~init~int(-1, ~#options~0.base, 24 + ~#options~0.offset, 4);call write~init~int(-1, ~#options~0.base, 28 + ~#options~0.offset, 4);~#full_duplex~0.base, ~#full_duplex~0.offset := 46, 0;call #Ultimate.allocInit(32, 46);call write~init~int(-1, ~#full_duplex~0.base, ~#full_duplex~0.offset, 4);call write~init~int(-1, ~#full_duplex~0.base, 4 + ~#full_duplex~0.offset, 4);call write~init~int(-1, ~#full_duplex~0.base, 8 + ~#full_duplex~0.offset, 4);call write~init~int(-1, ~#full_duplex~0.base, 12 + ~#full_duplex~0.offset, 4);call write~init~int(-1, ~#full_duplex~0.base, 16 + ~#full_duplex~0.offset, 4);call write~init~int(-1, ~#full_duplex~0.base, 20 + ~#full_duplex~0.offset, 4);call write~init~int(-1, ~#full_duplex~0.base, 24 + ~#full_duplex~0.offset, 4);call write~init~int(-1, ~#full_duplex~0.base, 28 + ~#full_duplex~0.offset, 4);~#rx_params~0.base, ~#rx_params~0.offset := 47, 0;call #Ultimate.allocInit(32, 47);call write~init~int(-1, ~#rx_params~0.base, ~#rx_params~0.offset, 4);call write~init~int(-1, ~#rx_params~0.base, 4 + ~#rx_params~0.offset, 4);call write~init~int(-1, ~#rx_params~0.base, 8 + ~#rx_params~0.offset, 4);call write~init~int(-1, ~#rx_params~0.base, 12 + ~#rx_params~0.offset, 4);call write~init~int(-1, ~#rx_params~0.base, 16 + ~#rx_params~0.offset, 4);call write~init~int(-1, ~#rx_params~0.base, 20 + ~#rx_params~0.offset, 4);call write~init~int(-1, ~#rx_params~0.base, 24 + ~#rx_params~0.offset, 4);call write~init~int(-1, ~#rx_params~0.base, 28 + ~#rx_params~0.offset, 4);~#tx_params~0.base, ~#tx_params~0.offset := 48, 0;call #Ultimate.allocInit(32, 48);call write~init~int(-1, ~#tx_params~0.base, ~#tx_params~0.offset, 4);call write~init~int(-1, ~#tx_params~0.base, 4 + ~#tx_params~0.offset, 4);call write~init~int(-1, ~#tx_params~0.base, 8 + ~#tx_params~0.offset, 4);call write~init~int(-1, ~#tx_params~0.base, 12 + ~#tx_params~0.offset, 4);call write~init~int(-1, ~#tx_params~0.base, 16 + ~#tx_params~0.offset, 4);call write~init~int(-1, ~#tx_params~0.base, 20 + ~#tx_params~0.offset, 4);call write~init~int(-1, ~#tx_params~0.base, 24 + ~#tx_params~0.offset, 4);call write~init~int(-1, ~#tx_params~0.base, 28 + ~#tx_params~0.offset, 4);~#version~0.base, ~#version~0.offset := 49, 0;call #Ultimate.allocInit(187, 49);call write~init~int(14, ~#version~0.base, ~#version~0.offset, 1);call write~init~int(104, ~#version~0.base, 1 + ~#version~0.offset, 1);call write~init~int(97, ~#version~0.base, 2 + ~#version~0.offset, 1);call write~init~int(109, ~#version~0.base, 3 + ~#version~0.offset, 1);call write~init~int(97, ~#version~0.base, 4 + ~#version~0.offset, 1);call write~init~int(99, ~#version~0.base, 5 + ~#version~0.offset, 1);call write~init~int(104, ~#version~0.base, 6 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 7 + ~#version~0.offset, 1);call write~init~int(46, ~#version~0.base, 8 + ~#version~0.offset, 1);call write~init~int(99, ~#version~0.base, 9 + ~#version~0.offset, 1);call write~init~int(58, ~#version~0.base, 10 + ~#version~0.offset, 1);call write~init~int(118, ~#version~0.base, 11 + ~#version~0.offset, 1);call write~init~int(50, ~#version~0.base, 12 + ~#version~0.offset, 1);call write~init~int(46, ~#version~0.base, 13 + ~#version~0.offset, 1);call write~init~int(49, ~#version~0.base, 14 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 15 + ~#version~0.offset, 1);call write~init~int(83, ~#version~0.base, 16 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 17 + ~#version~0.offset, 1);call write~init~int(112, ~#version~0.base, 18 + ~#version~0.offset, 1);call write~init~int(116, ~#version~0.base, 19 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 20 + ~#version~0.offset, 1);call write~init~int(49, ~#version~0.base, 21 + ~#version~0.offset, 1);call write~init~int(49, ~#version~0.base, 22 + ~#version~0.offset, 1);call write~init~int(44, ~#version~0.base, 23 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 24 + ~#version~0.offset, 1);call write~init~int(50, ~#version~0.base, 25 + ~#version~0.offset, 1);call write~init~int(48, ~#version~0.base, 26 + ~#version~0.offset, 1);call write~init~int(48, ~#version~0.base, 27 + ~#version~0.offset, 1);call write~init~int(54, ~#version~0.base, 28 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 29 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 30 + ~#version~0.offset, 1);call write~init~int(87, ~#version~0.base, 31 + ~#version~0.offset, 1);call write~init~int(114, ~#version~0.base, 32 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 33 + ~#version~0.offset, 1);call write~init~int(116, ~#version~0.base, 34 + ~#version~0.offset, 1);call write~init~int(116, ~#version~0.base, 35 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 36 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 37 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 38 + ~#version~0.offset, 1);call write~init~int(98, ~#version~0.base, 39 + ~#version~0.offset, 1);call write~init~int(121, ~#version~0.base, 40 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 41 + ~#version~0.offset, 1);call write~init~int(68, ~#version~0.base, 42 + ~#version~0.offset, 1);call write~init~int(111, ~#version~0.base, 43 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 44 + ~#version~0.offset, 1);call write~init~int(97, ~#version~0.base, 45 + ~#version~0.offset, 1);call write~init~int(108, ~#version~0.base, 46 + ~#version~0.offset, 1);call write~init~int(100, ~#version~0.base, 47 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 48 + ~#version~0.offset, 1);call write~init~int(66, ~#version~0.base, 49 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 50 + ~#version~0.offset, 1);call write~init~int(99, ~#version~0.base, 51 + ~#version~0.offset, 1);call write~init~int(107, ~#version~0.base, 52 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 53 + ~#version~0.offset, 1);call write~init~int(114, ~#version~0.base, 54 + ~#version~0.offset, 1);call write~init~int(10, ~#version~0.base, 55 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 56 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 57 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 58 + ~#version~0.offset, 1);call write~init~int(83, ~#version~0.base, 59 + ~#version~0.offset, 1);call write~init~int(111, ~#version~0.base, 60 + ~#version~0.offset, 1);call write~init~int(109, ~#version~0.base, 61 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 62 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 63 + ~#version~0.offset, 1);call write~init~int(109, ~#version~0.base, 64 + ~#version~0.offset, 1);call write~init~int(111, ~#version~0.base, 65 + ~#version~0.offset, 1);call write~init~int(100, ~#version~0.base, 66 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 67 + ~#version~0.offset, 1);call write~init~int(102, ~#version~0.base, 68 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 69 + ~#version~0.offset, 1);call write~init~int(99, ~#version~0.base, 70 + ~#version~0.offset, 1);call write~init~int(97, ~#version~0.base, 71 + ~#version~0.offset, 1);call write~init~int(116, ~#version~0.base, 72 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 73 + ~#version~0.offset, 1);call write~init~int(111, ~#version~0.base, 74 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 75 + ~#version~0.offset, 1);call write~init~int(115, ~#version~0.base, 76 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 77 + ~#version~0.offset, 1);call write~init~int(98, ~#version~0.base, 78 + ~#version~0.offset, 1);call write~init~int(121, ~#version~0.base, 79 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 80 + ~#version~0.offset, 1);call write~init~int(69, ~#version~0.base, 81 + ~#version~0.offset, 1);call write~init~int(114, ~#version~0.base, 82 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 83 + ~#version~0.offset, 1);call write~init~int(99, ~#version~0.base, 84 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 85 + ~#version~0.offset, 1);call write~init~int(107, ~#version~0.base, 86 + ~#version~0.offset, 1);call write~init~int(97, ~#version~0.base, 87 + ~#version~0.offset, 1);call write~init~int(115, ~#version~0.base, 88 + ~#version~0.offset, 1);call write~init~int(116, ~#version~0.base, 89 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 90 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 91 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 92 + ~#version~0.offset, 1);call write~init~int(60, ~#version~0.base, 93 + ~#version~0.offset, 1);call write~init~int(107, ~#version~0.base, 94 + ~#version~0.offset, 1);call write~init~int(97, ~#version~0.base, 95 + ~#version~0.offset, 1);call write~init~int(115, ~#version~0.base, 96 + ~#version~0.offset, 1);call write~init~int(116, ~#version~0.base, 97 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 98 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 99 + ~#version~0.offset, 1);call write~init~int(64, ~#version~0.base, 100 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 101 + ~#version~0.offset, 1);call write~init~int(115, ~#version~0.base, 102 + ~#version~0.offset, 1);call write~init~int(99, ~#version~0.base, 103 + ~#version~0.offset, 1);call write~init~int(108, ~#version~0.base, 104 + ~#version~0.offset, 1);call write~init~int(46, ~#version~0.base, 105 + ~#version~0.offset, 1);call write~init~int(109, ~#version~0.base, 106 + ~#version~0.offset, 1);call write~init~int(115, ~#version~0.base, 107 + ~#version~0.offset, 1);call write~init~int(117, ~#version~0.base, 108 + ~#version~0.offset, 1);call write~init~int(46, ~#version~0.base, 109 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 110 + ~#version~0.offset, 1);call write~init~int(100, ~#version~0.base, 111 + ~#version~0.offset, 1);call write~init~int(117, ~#version~0.base, 112 + ~#version~0.offset, 1);call write~init~int(62, ~#version~0.base, 113 + ~#version~0.offset, 1);call write~init~int(10, ~#version~0.base, 114 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 115 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 116 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 117 + ~#version~0.offset, 1);call write~init~int(70, ~#version~0.base, 118 + ~#version~0.offset, 1);call write~init~int(117, ~#version~0.base, 119 + ~#version~0.offset, 1);call write~init~int(114, ~#version~0.base, 120 + ~#version~0.offset, 1);call write~init~int(116, ~#version~0.base, 121 + ~#version~0.offset, 1);call write~init~int(104, ~#version~0.base, 122 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 123 + ~#version~0.offset, 1);call write~init~int(114, ~#version~0.base, 124 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 125 + ~#version~0.offset, 1);call write~init~int(109, ~#version~0.base, 126 + ~#version~0.offset, 1);call write~init~int(111, ~#version~0.base, 127 + ~#version~0.offset, 1);call write~init~int(100, ~#version~0.base, 128 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 129 + ~#version~0.offset, 1);call write~init~int(102, ~#version~0.base, 130 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 131 + ~#version~0.offset, 1);call write~init~int(99, ~#version~0.base, 132 + ~#version~0.offset, 1);call write~init~int(97, ~#version~0.base, 133 + ~#version~0.offset, 1);call write~init~int(116, ~#version~0.base, 134 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 135 + ~#version~0.offset, 1);call write~init~int(111, ~#version~0.base, 136 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 137 + ~#version~0.offset, 1);call write~init~int(115, ~#version~0.base, 138 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 139 + ~#version~0.offset, 1);call write~init~int(98, ~#version~0.base, 140 + ~#version~0.offset, 1);call write~init~int(121, ~#version~0.base, 141 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 142 + ~#version~0.offset, 1);call write~init~int(75, ~#version~0.base, 143 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 144 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 145 + ~#version~0.offset, 1);call write~init~int(116, ~#version~0.base, 146 + ~#version~0.offset, 1);call write~init~int(104, ~#version~0.base, 147 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 148 + ~#version~0.offset, 1);call write~init~int(85, ~#version~0.base, 149 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 150 + ~#version~0.offset, 1);call write~init~int(100, ~#version~0.base, 151 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 152 + ~#version~0.offset, 1);call write~init~int(114, ~#version~0.base, 153 + ~#version~0.offset, 1);call write~init~int(119, ~#version~0.base, 154 + ~#version~0.offset, 1);call write~init~int(111, ~#version~0.base, 155 + ~#version~0.offset, 1);call write~init~int(111, ~#version~0.base, 156 + ~#version~0.offset, 1);call write~init~int(100, ~#version~0.base, 157 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 158 + ~#version~0.offset, 1);call write~init~int(60, ~#version~0.base, 159 + ~#version~0.offset, 1);call write~init~int(107, ~#version~0.base, 160 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 161 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 162 + ~#version~0.offset, 1);call write~init~int(116, ~#version~0.base, 163 + ~#version~0.offset, 1);call write~init~int(104, ~#version~0.base, 164 + ~#version~0.offset, 1);call write~init~int(117, ~#version~0.base, 165 + ~#version~0.offset, 1);call write~init~int(64, ~#version~0.base, 166 + ~#version~0.offset, 1);call write~init~int(112, ~#version~0.base, 167 + ~#version~0.offset, 1);call write~init~int(97, ~#version~0.base, 168 + ~#version~0.offset, 1);call write~init~int(114, ~#version~0.base, 169 + ~#version~0.offset, 1);call write~init~int(108, ~#version~0.base, 170 + ~#version~0.offset, 1);call write~init~int(46, ~#version~0.base, 171 + ~#version~0.offset, 1);call write~init~int(99, ~#version~0.base, 172 + ~#version~0.offset, 1);call write~init~int(108, ~#version~0.base, 173 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 174 + ~#version~0.offset, 1);call write~init~int(109, ~#version~0.base, 175 + ~#version~0.offset, 1);call write~init~int(115, ~#version~0.base, 176 + ~#version~0.offset, 1);call write~init~int(111, ~#version~0.base, 177 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 178 + ~#version~0.offset, 1);call write~init~int(46, ~#version~0.base, 179 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 180 + ~#version~0.offset, 1);call write~init~int(100, ~#version~0.base, 181 + ~#version~0.offset, 1);call write~init~int(117, ~#version~0.base, 182 + ~#version~0.offset, 1);call write~init~int(62, ~#version~0.base, 183 + ~#version~0.offset, 1);call write~init~int(10, ~#version~0.base, 184 + ~#version~0.offset, 1);call write~init~int(0, ~#version~0.base, 185 + ~#version~0.offset, 1);call write~init~int(0, ~#version~0.base, 186 + ~#version~0.offset, 1);~#chip_tbl~0.base, ~#chip_tbl~0.offset := 50, 0;call #Ultimate.allocInit(56, 50);call write~init~int(4888, ~#chip_tbl~0.base, ~#chip_tbl~0.offset, 2);call write~init~int(2321, ~#chip_tbl~0.base, 2 + ~#chip_tbl~0.offset, 2);call write~init~int(65535, ~#chip_tbl~0.base, 4 + ~#chip_tbl~0.offset, 2);call write~init~int(0, ~#chip_tbl~0.base, 6 + ~#chip_tbl~0.offset, 2);call write~init~$Pointer$(3, 0, ~#chip_tbl~0.base, 8 + ~#chip_tbl~0.offset, 8);call write~init~$Pointer$(#funAddr~hamachi_timer.base, #funAddr~hamachi_timer.offset, ~#chip_tbl~0.base, 16 + ~#chip_tbl~0.offset, 8);call write~init~int(0, ~#chip_tbl~0.base, 24 + ~#chip_tbl~0.offset, 4);call write~init~int(0, ~#chip_tbl~0.base, 28 + ~#chip_tbl~0.offset, 2);call write~init~int(0, ~#chip_tbl~0.base, 30 + ~#chip_tbl~0.offset, 2);call write~init~int(0, ~#chip_tbl~0.base, 32 + ~#chip_tbl~0.offset, 2);call write~init~int(0, ~#chip_tbl~0.base, 34 + ~#chip_tbl~0.offset, 2);call write~init~$Pointer$(0, 0, ~#chip_tbl~0.base, 36 + ~#chip_tbl~0.offset, 8);call write~init~$Pointer$(0, 0, ~#chip_tbl~0.base, 44 + ~#chip_tbl~0.offset, 8);call write~init~int(0, ~#chip_tbl~0.base, 52 + ~#chip_tbl~0.offset, 4);~#hamachi_netdev_ops~0.base, ~#hamachi_netdev_ops~0.offset := 51, 0;call #Ultimate.allocInit(528, 51);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 8 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hamachi_open.base, #funAddr~hamachi_open.offset, ~#hamachi_netdev_ops~0.base, 16 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hamachi_close.base, #funAddr~hamachi_close.offset, ~#hamachi_netdev_ops~0.base, 24 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hamachi_start_xmit.base, #funAddr~hamachi_start_xmit.offset, ~#hamachi_netdev_ops~0.base, 32 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 40 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 48 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~set_rx_mode.base, #funAddr~set_rx_mode.offset, ~#hamachi_netdev_ops~0.base, 56 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_mac_addr.base, #funAddr~eth_mac_addr.offset, ~#hamachi_netdev_ops~0.base, 64 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_validate_addr.base, #funAddr~eth_validate_addr.offset, ~#hamachi_netdev_ops~0.base, 72 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~netdev_ioctl.base, #funAddr~netdev_ioctl.offset, ~#hamachi_netdev_ops~0.base, 80 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 88 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_change_mtu.base, #funAddr~eth_change_mtu.offset, ~#hamachi_netdev_ops~0.base, 96 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 104 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hamachi_tx_timeout.base, #funAddr~hamachi_tx_timeout.offset, ~#hamachi_netdev_ops~0.base, 112 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 120 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hamachi_get_stats.base, #funAddr~hamachi_get_stats.offset, ~#hamachi_netdev_ops~0.base, 128 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 136 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 144 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 152 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 160 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 168 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 176 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 184 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 192 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 200 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 208 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 216 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 224 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 232 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 240 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 248 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 256 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 264 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 272 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 280 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 288 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 296 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 304 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 312 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 320 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 328 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 336 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 344 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 352 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 360 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 368 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 376 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 384 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 392 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 400 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 408 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 416 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 424 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 432 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 440 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 448 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 456 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 464 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 472 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 480 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 488 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 496 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 504 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 512 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 520 + ~#hamachi_netdev_ops~0.offset, 8);~#ethtool_ops~0.base, ~#ethtool_ops~0.offset := 52, 0;call #Ultimate.allocInit(392, 52);call write~init~$Pointer$(#funAddr~hamachi_get_settings.base, #funAddr~hamachi_get_settings.offset, ~#ethtool_ops~0.base, ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hamachi_set_settings.base, #funAddr~hamachi_set_settings.offset, ~#ethtool_ops~0.base, 8 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hamachi_get_drvinfo.base, #funAddr~hamachi_get_drvinfo.offset, ~#ethtool_ops~0.base, 16 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 24 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 32 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 40 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 48 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 56 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 64 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hamachi_nway_reset.base, #funAddr~hamachi_nway_reset.offset, ~#ethtool_ops~0.base, 72 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hamachi_get_link.base, #funAddr~hamachi_get_link.offset, ~#ethtool_ops~0.base, 80 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 88 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 96 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 104 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 112 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 120 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 128 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 136 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 144 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 152 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 160 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 168 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 176 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 184 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~check_if_running.base, #funAddr~check_if_running.offset, ~#ethtool_ops~0.base, 192 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 200 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 208 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 216 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 224 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 232 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 240 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 248 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 256 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 264 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 272 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 280 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 288 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 296 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 304 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 312 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 320 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 328 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 336 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 344 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 352 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 360 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 368 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 376 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 384 + ~#ethtool_ops~0.offset, 8);~#ethtool_ops_no_mii~0.base, ~#ethtool_ops_no_mii~0.offset := 53, 0;call #Ultimate.allocInit(392, 53);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 8 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(#funAddr~hamachi_get_drvinfo.base, #funAddr~hamachi_get_drvinfo.offset, ~#ethtool_ops_no_mii~0.base, 16 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 24 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 32 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 40 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 48 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 56 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 64 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 72 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 80 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 88 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 96 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 104 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 112 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 120 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 128 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 136 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 144 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 152 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 160 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 168 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 176 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 184 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(#funAddr~check_if_running.base, #funAddr~check_if_running.offset, ~#ethtool_ops_no_mii~0.base, 192 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 200 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 208 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 216 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 224 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 232 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 240 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 248 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 256 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 264 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 272 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 280 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 288 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 296 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 304 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 312 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 320 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 328 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 336 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 344 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 352 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 360 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 368 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 376 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 384 + ~#ethtool_ops_no_mii~0.offset, 8);~#hamachi_pci_tbl~0.base, ~#hamachi_pci_tbl~0.offset := 54, 0;call #Ultimate.allocInit(64, 54);call write~init~int(4888, ~#hamachi_pci_tbl~0.base, ~#hamachi_pci_tbl~0.offset, 4);call write~init~int(2321, ~#hamachi_pci_tbl~0.base, 4 + ~#hamachi_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#hamachi_pci_tbl~0.base, 8 + ~#hamachi_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#hamachi_pci_tbl~0.base, 12 + ~#hamachi_pci_tbl~0.offset, 4);call write~init~int(0, ~#hamachi_pci_tbl~0.base, 16 + ~#hamachi_pci_tbl~0.offset, 4);call write~init~int(0, ~#hamachi_pci_tbl~0.base, 20 + ~#hamachi_pci_tbl~0.offset, 4);call write~init~int(0, ~#hamachi_pci_tbl~0.base, 24 + ~#hamachi_pci_tbl~0.offset, 8);call write~init~int(0, ~#hamachi_pci_tbl~0.base, 32 + ~#hamachi_pci_tbl~0.offset, 4);call write~init~int(0, ~#hamachi_pci_tbl~0.base, 36 + ~#hamachi_pci_tbl~0.offset, 4);call write~init~int(0, ~#hamachi_pci_tbl~0.base, 40 + ~#hamachi_pci_tbl~0.offset, 4);call write~init~int(0, ~#hamachi_pci_tbl~0.base, 44 + ~#hamachi_pci_tbl~0.offset, 4);call write~init~int(0, ~#hamachi_pci_tbl~0.base, 48 + ~#hamachi_pci_tbl~0.offset, 4);call write~init~int(0, ~#hamachi_pci_tbl~0.base, 52 + ~#hamachi_pci_tbl~0.offset, 4);call write~init~int(0, ~#hamachi_pci_tbl~0.base, 56 + ~#hamachi_pci_tbl~0.offset, 8);~__mod_pci__hamachi_pci_tbl_device_table~0.vendor := ~__mod_pci__hamachi_pci_tbl_device_table~0.vendor[0 := 0];~__mod_pci__hamachi_pci_tbl_device_table~0.device := ~__mod_pci__hamachi_pci_tbl_device_table~0.device[0 := 0];~__mod_pci__hamachi_pci_tbl_device_table~0.subvendor := ~__mod_pci__hamachi_pci_tbl_device_table~0.subvendor[0 := 0];~__mod_pci__hamachi_pci_tbl_device_table~0.subdevice := ~__mod_pci__hamachi_pci_tbl_device_table~0.subdevice[0 := 0];~__mod_pci__hamachi_pci_tbl_device_table~0.class := ~__mod_pci__hamachi_pci_tbl_device_table~0.class[0 := 0];~__mod_pci__hamachi_pci_tbl_device_table~0.class_mask := ~__mod_pci__hamachi_pci_tbl_device_table~0.class_mask[0 := 0];~__mod_pci__hamachi_pci_tbl_device_table~0.driver_data := ~__mod_pci__hamachi_pci_tbl_device_table~0.driver_data[0 := 0];~__mod_pci__hamachi_pci_tbl_device_table~0.vendor := ~__mod_pci__hamachi_pci_tbl_device_table~0.vendor[1 := 0];~__mod_pci__hamachi_pci_tbl_device_table~0.device := ~__mod_pci__hamachi_pci_tbl_device_table~0.device[1 := 0];~__mod_pci__hamachi_pci_tbl_device_table~0.subvendor := ~__mod_pci__hamachi_pci_tbl_device_table~0.subvendor[1 := 0];~__mod_pci__hamachi_pci_tbl_device_table~0.subdevice := ~__mod_pci__hamachi_pci_tbl_device_table~0.subdevice[1 := 0];~__mod_pci__hamachi_pci_tbl_device_table~0.class := ~__mod_pci__hamachi_pci_tbl_device_table~0.class[1 := 0];~__mod_pci__hamachi_pci_tbl_device_table~0.class_mask := ~__mod_pci__hamachi_pci_tbl_device_table~0.class_mask[1 := 0];~__mod_pci__hamachi_pci_tbl_device_table~0.driver_data := ~__mod_pci__hamachi_pci_tbl_device_table~0.driver_data[1 := 0];~#hamachi_driver~0.base, ~#hamachi_driver~0.offset := 55, 0;call #Ultimate.allocInit(305, 55);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 8 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(43, 0, ~#hamachi_driver~0.base, 16 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(~#hamachi_pci_tbl~0.base, ~#hamachi_pci_tbl~0.offset, ~#hamachi_driver~0.base, 24 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~hamachi_init_one.base, #funAddr~hamachi_init_one.offset, ~#hamachi_driver~0.base, 32 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~hamachi_remove_one.base, #funAddr~hamachi_remove_one.offset, ~#hamachi_driver~0.base, 40 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 48 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 56 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 64 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 72 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 80 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 88 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 96 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 104 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 112 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 120 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 128 + ~#hamachi_driver~0.offset, 8);call write~init~int(0, ~#hamachi_driver~0.base, 136 + ~#hamachi_driver~0.offset, 1);call write~init~int(0, ~#hamachi_driver~0.base, 137 + ~#hamachi_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 141 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 149 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 157 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 165 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 173 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 181 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 189 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 197 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 205 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 213 + ~#hamachi_driver~0.offset, 8);call write~init~int(0, ~#hamachi_driver~0.base, 221 + ~#hamachi_driver~0.offset, 4);call write~init~int(0, ~#hamachi_driver~0.base, 225 + ~#hamachi_driver~0.offset, 4);call write~init~int(0, ~#hamachi_driver~0.base, 229 + ~#hamachi_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 233 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 241 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 249 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 257 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 265 + ~#hamachi_driver~0.offset, 8);call write~init~int(0, ~#hamachi_driver~0.base, 273 + ~#hamachi_driver~0.offset, 4);call write~init~int(0, ~#hamachi_driver~0.base, 277 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 289 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 297 + ~#hamachi_driver~0.offset, 8);~ldv_retval_2~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_spin~0 := 0; {13429#(= ~ldv_irq_1_0~0 0)} is VALID [2022-02-20 22:29:02,404 INFO L290 TraceCheckUtils]: 1: Hoare triple {13429#(= ~ldv_irq_1_0~0 0)} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret686#1.base, main_#t~ret686#1.offset, main_#t~ret687#1.base, main_#t~ret687#1.offset, main_#t~ret688#1.base, main_#t~ret688#1.offset, main_#t~ret689#1.base, main_#t~ret689#1.offset, main_#t~ret690#1.base, main_#t~ret690#1.offset, main_#t~ret691#1.base, main_#t~ret691#1.offset, main_#t~ret692#1.base, main_#t~ret692#1.offset, main_#t~ret693#1.base, main_#t~ret693#1.offset, main_#t~nondet694#1, main_#t~switch695#1, main_#t~nondet696#1, main_#t~switch697#1, main_#t~ret698#1, main_#t~ret699#1, main_#t~ret700#1, main_#t~ret701#1, main_#t~mem702#1, main_#t~ret703#1, main_#t~mem704#1, main_#t~ret705#1, main_#t~mem706#1, main_#t~ret707#1, main_#t~ret708#1.base, main_#t~ret708#1.offset, main_#t~ret709#1.base, main_#t~ret709#1.offset, main_#t~ret710#1.base, main_#t~ret710#1.offset, main_#t~mem711#1, main_#t~ret712#1, main_#t~mem713#1, main_#t~ret714#1, main_#t~ret715#1, main_#t~ret716#1, main_#t~ret717#1, main_#t~ret718#1, main_#t~ret719#1, main_#t~ret720#1, main_#t~ret721#1, main_#t~nondet722#1, main_#t~switch723#1, main_#t~ret724#1, main_#t~nondet725#1, main_#t~switch726#1, main_#t~ret727#1, main_#t~nondet728#1, main_#t~switch729#1, main_#t~ret730#1, main_#t~ret731#1, main_#t~nondet732#1, main_#t~switch733#1, main_#t~ret734#1, main_#t~ret735#1, main_#t~ret736#1, main_#t~ret737#1, main_#t~ret738#1, main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset, main_~tmp~57#1.base, main_~tmp~57#1.offset, main_~ldvarg4~0#1.base, main_~ldvarg4~0#1.offset, main_~tmp___0~28#1.base, main_~tmp___0~28#1.offset, main_~#ldvarg3~0#1.base, main_~#ldvarg3~0#1.offset, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp___1~18#1.base, main_~tmp___1~18#1.offset, main_~#ldvarg2~0#1.base, main_~#ldvarg2~0#1.offset, main_~ldvarg5~0#1.base, main_~ldvarg5~0#1.offset, main_~tmp___2~13#1.base, main_~tmp___2~13#1.offset, main_~ldvarg6~0#1.base, main_~ldvarg6~0#1.offset, main_~tmp___3~9#1.base, main_~tmp___3~9#1.offset, main_~ldvarg7~0#1.base, main_~ldvarg7~0#1.offset, main_~tmp___4~6#1.base, main_~tmp___4~6#1.offset, main_~tmp___5~5#1, main_~tmp___6~4#1, main_~tmp___7~3#1, main_~tmp___8~1#1, main_~tmp___9~1#1, main_~tmp___10~1#1;havoc main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset;havoc main_~tmp~57#1.base, main_~tmp~57#1.offset;havoc main_~ldvarg4~0#1.base, main_~ldvarg4~0#1.offset;havoc main_~tmp___0~28#1.base, main_~tmp___0~28#1.offset;call main_~#ldvarg3~0#1.base, main_~#ldvarg3~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp___1~18#1.base, main_~tmp___1~18#1.offset;call main_~#ldvarg2~0#1.base, main_~#ldvarg2~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~ldvarg5~0#1.base, main_~ldvarg5~0#1.offset;havoc main_~tmp___2~13#1.base, main_~tmp___2~13#1.offset;havoc main_~ldvarg6~0#1.base, main_~ldvarg6~0#1.offset;havoc main_~tmp___3~9#1.base, main_~tmp___3~9#1.offset;havoc main_~ldvarg7~0#1.base, main_~ldvarg7~0#1.offset;havoc main_~tmp___4~6#1.base, main_~tmp___4~6#1.offset;havoc main_~tmp___5~5#1;havoc main_~tmp___6~4#1;havoc main_~tmp___7~3#1;havoc main_~tmp___8~1#1;havoc main_~tmp___9~1#1;havoc main_~tmp___10~1#1; {13429#(= ~ldv_irq_1_0~0 0)} is VALID [2022-02-20 22:29:02,405 INFO L272 TraceCheckUtils]: 2: Hoare triple {13429#(= ~ldv_irq_1_0~0 0)} call main_#t~ret686#1.base, main_#t~ret686#1.offset := ldv_init_zalloc(232); {13546#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:29:02,405 INFO L290 TraceCheckUtils]: 3: Hoare triple {13546#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {13427#true} is VALID [2022-02-20 22:29:02,405 INFO L272 TraceCheckUtils]: 4: Hoare triple {13427#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {13554#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:29:02,406 INFO L290 TraceCheckUtils]: 5: Hoare triple {13554#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {13427#true} is VALID [2022-02-20 22:29:02,406 INFO L290 TraceCheckUtils]: 6: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,406 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {13427#true} {13427#true} #3100#return; {13427#true} is VALID [2022-02-20 22:29:02,407 INFO L290 TraceCheckUtils]: 8: Hoare triple {13427#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {13427#true} is VALID [2022-02-20 22:29:02,408 INFO L272 TraceCheckUtils]: 9: Hoare triple {13427#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {13427#true} is VALID [2022-02-20 22:29:02,408 INFO L290 TraceCheckUtils]: 10: Hoare triple {13427#true} ~cond := #in~cond; {13427#true} is VALID [2022-02-20 22:29:02,409 INFO L290 TraceCheckUtils]: 11: Hoare triple {13427#true} assume !(0 == ~cond); {13427#true} is VALID [2022-02-20 22:29:02,409 INFO L290 TraceCheckUtils]: 12: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,409 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {13427#true} {13427#true} #3102#return; {13427#true} is VALID [2022-02-20 22:29:02,410 INFO L290 TraceCheckUtils]: 14: Hoare triple {13427#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {13427#true} is VALID [2022-02-20 22:29:02,410 INFO L290 TraceCheckUtils]: 15: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,410 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {13427#true} {13429#(= ~ldv_irq_1_0~0 0)} #3120#return; {13429#(= ~ldv_irq_1_0~0 0)} is VALID [2022-02-20 22:29:02,411 INFO L290 TraceCheckUtils]: 17: Hoare triple {13429#(= ~ldv_irq_1_0~0 0)} main_~tmp~57#1.base, main_~tmp~57#1.offset := main_#t~ret686#1.base, main_#t~ret686#1.offset;havoc main_#t~ret686#1.base, main_#t~ret686#1.offset;main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset := main_~tmp~57#1.base, main_~tmp~57#1.offset; {13429#(= ~ldv_irq_1_0~0 0)} is VALID [2022-02-20 22:29:02,411 INFO L272 TraceCheckUtils]: 18: Hoare triple {13429#(= ~ldv_irq_1_0~0 0)} call main_#t~ret687#1.base, main_#t~ret687#1.offset := ldv_init_zalloc(40); {13546#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:29:02,411 INFO L290 TraceCheckUtils]: 19: Hoare triple {13546#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {13427#true} is VALID [2022-02-20 22:29:02,412 INFO L272 TraceCheckUtils]: 20: Hoare triple {13427#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {13554#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:29:02,412 INFO L290 TraceCheckUtils]: 21: Hoare triple {13554#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {13427#true} is VALID [2022-02-20 22:29:02,412 INFO L290 TraceCheckUtils]: 22: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,412 INFO L284 TraceCheckUtils]: 23: Hoare quadruple {13427#true} {13427#true} #3100#return; {13427#true} is VALID [2022-02-20 22:29:02,413 INFO L290 TraceCheckUtils]: 24: Hoare triple {13427#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {13427#true} is VALID [2022-02-20 22:29:02,413 INFO L272 TraceCheckUtils]: 25: Hoare triple {13427#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {13427#true} is VALID [2022-02-20 22:29:02,413 INFO L290 TraceCheckUtils]: 26: Hoare triple {13427#true} ~cond := #in~cond; {13427#true} is VALID [2022-02-20 22:29:02,413 INFO L290 TraceCheckUtils]: 27: Hoare triple {13427#true} assume !(0 == ~cond); {13427#true} is VALID [2022-02-20 22:29:02,414 INFO L290 TraceCheckUtils]: 28: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,414 INFO L284 TraceCheckUtils]: 29: Hoare quadruple {13427#true} {13427#true} #3102#return; {13427#true} is VALID [2022-02-20 22:29:02,414 INFO L290 TraceCheckUtils]: 30: Hoare triple {13427#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {13427#true} is VALID [2022-02-20 22:29:02,414 INFO L290 TraceCheckUtils]: 31: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,414 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {13427#true} {13429#(= ~ldv_irq_1_0~0 0)} #3122#return; {13429#(= ~ldv_irq_1_0~0 0)} is VALID [2022-02-20 22:29:02,415 INFO L290 TraceCheckUtils]: 33: Hoare triple {13429#(= ~ldv_irq_1_0~0 0)} main_~tmp___0~28#1.base, main_~tmp___0~28#1.offset := main_#t~ret687#1.base, main_#t~ret687#1.offset;havoc main_#t~ret687#1.base, main_#t~ret687#1.offset;main_~ldvarg4~0#1.base, main_~ldvarg4~0#1.offset := main_~tmp___0~28#1.base, main_~tmp___0~28#1.offset; {13429#(= ~ldv_irq_1_0~0 0)} is VALID [2022-02-20 22:29:02,415 INFO L272 TraceCheckUtils]: 34: Hoare triple {13429#(= ~ldv_irq_1_0~0 0)} call main_#t~ret688#1.base, main_#t~ret688#1.offset := ldv_init_zalloc(1); {13546#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:29:02,415 INFO L290 TraceCheckUtils]: 35: Hoare triple {13546#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {13427#true} is VALID [2022-02-20 22:29:02,416 INFO L272 TraceCheckUtils]: 36: Hoare triple {13427#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {13554#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:29:02,416 INFO L290 TraceCheckUtils]: 37: Hoare triple {13554#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {13427#true} is VALID [2022-02-20 22:29:02,416 INFO L290 TraceCheckUtils]: 38: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,416 INFO L284 TraceCheckUtils]: 39: Hoare quadruple {13427#true} {13427#true} #3100#return; {13427#true} is VALID [2022-02-20 22:29:02,417 INFO L290 TraceCheckUtils]: 40: Hoare triple {13427#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {13427#true} is VALID [2022-02-20 22:29:02,417 INFO L272 TraceCheckUtils]: 41: Hoare triple {13427#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {13427#true} is VALID [2022-02-20 22:29:02,417 INFO L290 TraceCheckUtils]: 42: Hoare triple {13427#true} ~cond := #in~cond; {13427#true} is VALID [2022-02-20 22:29:02,417 INFO L290 TraceCheckUtils]: 43: Hoare triple {13427#true} assume !(0 == ~cond); {13427#true} is VALID [2022-02-20 22:29:02,417 INFO L290 TraceCheckUtils]: 44: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,417 INFO L284 TraceCheckUtils]: 45: Hoare quadruple {13427#true} {13427#true} #3102#return; {13427#true} is VALID [2022-02-20 22:29:02,417 INFO L290 TraceCheckUtils]: 46: Hoare triple {13427#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {13427#true} is VALID [2022-02-20 22:29:02,417 INFO L290 TraceCheckUtils]: 47: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,418 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {13427#true} {13429#(= ~ldv_irq_1_0~0 0)} #3124#return; {13429#(= ~ldv_irq_1_0~0 0)} is VALID [2022-02-20 22:29:02,418 INFO L290 TraceCheckUtils]: 49: Hoare triple {13429#(= ~ldv_irq_1_0~0 0)} main_~tmp___1~18#1.base, main_~tmp___1~18#1.offset := main_#t~ret688#1.base, main_#t~ret688#1.offset;havoc main_#t~ret688#1.base, main_#t~ret688#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp___1~18#1.base, main_~tmp___1~18#1.offset; {13429#(= ~ldv_irq_1_0~0 0)} is VALID [2022-02-20 22:29:02,419 INFO L272 TraceCheckUtils]: 50: Hoare triple {13429#(= ~ldv_irq_1_0~0 0)} call main_#t~ret689#1.base, main_#t~ret689#1.offset := ldv_init_zalloc(196); {13546#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:29:02,419 INFO L290 TraceCheckUtils]: 51: Hoare triple {13546#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {13427#true} is VALID [2022-02-20 22:29:02,420 INFO L272 TraceCheckUtils]: 52: Hoare triple {13427#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {13554#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:29:02,420 INFO L290 TraceCheckUtils]: 53: Hoare triple {13554#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {13427#true} is VALID [2022-02-20 22:29:02,420 INFO L290 TraceCheckUtils]: 54: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,420 INFO L284 TraceCheckUtils]: 55: Hoare quadruple {13427#true} {13427#true} #3100#return; {13427#true} is VALID [2022-02-20 22:29:02,420 INFO L290 TraceCheckUtils]: 56: Hoare triple {13427#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {13427#true} is VALID [2022-02-20 22:29:02,420 INFO L272 TraceCheckUtils]: 57: Hoare triple {13427#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {13427#true} is VALID [2022-02-20 22:29:02,420 INFO L290 TraceCheckUtils]: 58: Hoare triple {13427#true} ~cond := #in~cond; {13427#true} is VALID [2022-02-20 22:29:02,421 INFO L290 TraceCheckUtils]: 59: Hoare triple {13427#true} assume !(0 == ~cond); {13427#true} is VALID [2022-02-20 22:29:02,421 INFO L290 TraceCheckUtils]: 60: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,421 INFO L284 TraceCheckUtils]: 61: Hoare quadruple {13427#true} {13427#true} #3102#return; {13427#true} is VALID [2022-02-20 22:29:02,421 INFO L290 TraceCheckUtils]: 62: Hoare triple {13427#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {13427#true} is VALID [2022-02-20 22:29:02,421 INFO L290 TraceCheckUtils]: 63: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,422 INFO L284 TraceCheckUtils]: 64: Hoare quadruple {13427#true} {13429#(= ~ldv_irq_1_0~0 0)} #3126#return; {13429#(= ~ldv_irq_1_0~0 0)} is VALID [2022-02-20 22:29:02,422 INFO L290 TraceCheckUtils]: 65: Hoare triple {13429#(= ~ldv_irq_1_0~0 0)} main_~tmp___2~13#1.base, main_~tmp___2~13#1.offset := main_#t~ret689#1.base, main_#t~ret689#1.offset;havoc main_#t~ret689#1.base, main_#t~ret689#1.offset;main_~ldvarg5~0#1.base, main_~ldvarg5~0#1.offset := main_~tmp___2~13#1.base, main_~tmp___2~13#1.offset; {13429#(= ~ldv_irq_1_0~0 0)} is VALID [2022-02-20 22:29:02,422 INFO L272 TraceCheckUtils]: 66: Hoare triple {13429#(= ~ldv_irq_1_0~0 0)} call main_#t~ret690#1.base, main_#t~ret690#1.offset := ldv_init_zalloc(32); {13546#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:29:02,423 INFO L290 TraceCheckUtils]: 67: Hoare triple {13546#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {13427#true} is VALID [2022-02-20 22:29:02,423 INFO L272 TraceCheckUtils]: 68: Hoare triple {13427#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {13554#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:29:02,423 INFO L290 TraceCheckUtils]: 69: Hoare triple {13554#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {13427#true} is VALID [2022-02-20 22:29:02,424 INFO L290 TraceCheckUtils]: 70: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,424 INFO L284 TraceCheckUtils]: 71: Hoare quadruple {13427#true} {13427#true} #3100#return; {13427#true} is VALID [2022-02-20 22:29:02,424 INFO L290 TraceCheckUtils]: 72: Hoare triple {13427#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {13427#true} is VALID [2022-02-20 22:29:02,424 INFO L272 TraceCheckUtils]: 73: Hoare triple {13427#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {13427#true} is VALID [2022-02-20 22:29:02,424 INFO L290 TraceCheckUtils]: 74: Hoare triple {13427#true} ~cond := #in~cond; {13427#true} is VALID [2022-02-20 22:29:02,424 INFO L290 TraceCheckUtils]: 75: Hoare triple {13427#true} assume !(0 == ~cond); {13427#true} is VALID [2022-02-20 22:29:02,424 INFO L290 TraceCheckUtils]: 76: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,424 INFO L284 TraceCheckUtils]: 77: Hoare quadruple {13427#true} {13427#true} #3102#return; {13427#true} is VALID [2022-02-20 22:29:02,425 INFO L290 TraceCheckUtils]: 78: Hoare triple {13427#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {13427#true} is VALID [2022-02-20 22:29:02,425 INFO L290 TraceCheckUtils]: 79: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,425 INFO L284 TraceCheckUtils]: 80: Hoare quadruple {13427#true} {13429#(= ~ldv_irq_1_0~0 0)} #3128#return; {13429#(= ~ldv_irq_1_0~0 0)} is VALID [2022-02-20 22:29:02,425 INFO L290 TraceCheckUtils]: 81: Hoare triple {13429#(= ~ldv_irq_1_0~0 0)} main_~tmp___3~9#1.base, main_~tmp___3~9#1.offset := main_#t~ret690#1.base, main_#t~ret690#1.offset;havoc main_#t~ret690#1.base, main_#t~ret690#1.offset;main_~ldvarg6~0#1.base, main_~ldvarg6~0#1.offset := main_~tmp___3~9#1.base, main_~tmp___3~9#1.offset; {13429#(= ~ldv_irq_1_0~0 0)} is VALID [2022-02-20 22:29:02,426 INFO L272 TraceCheckUtils]: 82: Hoare triple {13429#(= ~ldv_irq_1_0~0 0)} call main_#t~ret691#1.base, main_#t~ret691#1.offset := ldv_init_zalloc(196); {13546#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:29:02,426 INFO L290 TraceCheckUtils]: 83: Hoare triple {13546#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {13427#true} is VALID [2022-02-20 22:29:02,427 INFO L272 TraceCheckUtils]: 84: Hoare triple {13427#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {13554#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:29:02,427 INFO L290 TraceCheckUtils]: 85: Hoare triple {13554#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {13427#true} is VALID [2022-02-20 22:29:02,428 INFO L290 TraceCheckUtils]: 86: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,428 INFO L284 TraceCheckUtils]: 87: Hoare quadruple {13427#true} {13427#true} #3100#return; {13427#true} is VALID [2022-02-20 22:29:02,428 INFO L290 TraceCheckUtils]: 88: Hoare triple {13427#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {13427#true} is VALID [2022-02-20 22:29:02,428 INFO L272 TraceCheckUtils]: 89: Hoare triple {13427#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {13427#true} is VALID [2022-02-20 22:29:02,428 INFO L290 TraceCheckUtils]: 90: Hoare triple {13427#true} ~cond := #in~cond; {13427#true} is VALID [2022-02-20 22:29:02,428 INFO L290 TraceCheckUtils]: 91: Hoare triple {13427#true} assume !(0 == ~cond); {13427#true} is VALID [2022-02-20 22:29:02,428 INFO L290 TraceCheckUtils]: 92: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,428 INFO L284 TraceCheckUtils]: 93: Hoare quadruple {13427#true} {13427#true} #3102#return; {13427#true} is VALID [2022-02-20 22:29:02,429 INFO L290 TraceCheckUtils]: 94: Hoare triple {13427#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {13427#true} is VALID [2022-02-20 22:29:02,429 INFO L290 TraceCheckUtils]: 95: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,429 INFO L284 TraceCheckUtils]: 96: Hoare quadruple {13427#true} {13429#(= ~ldv_irq_1_0~0 0)} #3130#return; {13429#(= ~ldv_irq_1_0~0 0)} is VALID [2022-02-20 22:29:02,430 INFO L290 TraceCheckUtils]: 97: Hoare triple {13429#(= ~ldv_irq_1_0~0 0)} main_~tmp___4~6#1.base, main_~tmp___4~6#1.offset := main_#t~ret691#1.base, main_#t~ret691#1.offset;havoc main_#t~ret691#1.base, main_#t~ret691#1.offset;main_~ldvarg7~0#1.base, main_~ldvarg7~0#1.offset := main_~tmp___4~6#1.base, main_~tmp___4~6#1.offset;assume { :begin_inline_ldv_initialize } true; {13429#(= ~ldv_irq_1_0~0 0)} is VALID [2022-02-20 22:29:02,430 INFO L290 TraceCheckUtils]: 98: Hoare triple {13429#(= ~ldv_irq_1_0~0 0)} assume { :end_inline_ldv_initialize } true; {13429#(= ~ldv_irq_1_0~0 0)} is VALID [2022-02-20 22:29:02,431 INFO L272 TraceCheckUtils]: 99: Hoare triple {13429#(= ~ldv_irq_1_0~0 0)} call main_#t~ret692#1.base, main_#t~ret692#1.offset := ldv_memset(main_~#ldvarg3~0#1.base, main_~#ldvarg3~0#1.offset, 0, 4); {13590#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:29:02,431 INFO L290 TraceCheckUtils]: 100: Hoare triple {13590#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {13427#true} is VALID [2022-02-20 22:29:02,432 INFO L272 TraceCheckUtils]: 101: Hoare triple {13427#true} call #t~memset~res15.base, #t~memset~res15.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, ~n); {13590#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:29:02,432 INFO L290 TraceCheckUtils]: 102: Hoare triple {13590#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr788 := 0; {13427#true} is VALID [2022-02-20 22:29:02,432 INFO L290 TraceCheckUtils]: 103: Hoare triple {13427#true} assume !(#t~loopctr788 % 18446744073709551616 < #amount % 18446744073709551616); {13427#true} is VALID [2022-02-20 22:29:02,432 INFO L290 TraceCheckUtils]: 104: Hoare triple {13427#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {13427#true} is VALID [2022-02-20 22:29:02,432 INFO L284 TraceCheckUtils]: 105: Hoare quadruple {13427#true} {13427#true} #3454#return; {13427#true} is VALID [2022-02-20 22:29:02,432 INFO L290 TraceCheckUtils]: 106: Hoare triple {13427#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res15.base, #t~memset~res15.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {13427#true} is VALID [2022-02-20 22:29:02,432 INFO L290 TraceCheckUtils]: 107: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,433 INFO L284 TraceCheckUtils]: 108: Hoare quadruple {13427#true} {13429#(= ~ldv_irq_1_0~0 0)} #3132#return; {13429#(= ~ldv_irq_1_0~0 0)} is VALID [2022-02-20 22:29:02,433 INFO L290 TraceCheckUtils]: 109: Hoare triple {13429#(= ~ldv_irq_1_0~0 0)} havoc main_#t~ret692#1.base, main_#t~ret692#1.offset; {13429#(= ~ldv_irq_1_0~0 0)} is VALID [2022-02-20 22:29:02,434 INFO L272 TraceCheckUtils]: 110: Hoare triple {13429#(= ~ldv_irq_1_0~0 0)} call main_#t~ret693#1.base, main_#t~ret693#1.offset := ldv_memset(main_~#ldvarg2~0#1.base, main_~#ldvarg2~0#1.offset, 0, 4); {13590#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:29:02,434 INFO L290 TraceCheckUtils]: 111: Hoare triple {13590#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {13427#true} is VALID [2022-02-20 22:29:02,435 INFO L272 TraceCheckUtils]: 112: Hoare triple {13427#true} call #t~memset~res15.base, #t~memset~res15.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, ~n); {13590#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:29:02,435 INFO L290 TraceCheckUtils]: 113: Hoare triple {13590#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr788 := 0; {13427#true} is VALID [2022-02-20 22:29:02,435 INFO L290 TraceCheckUtils]: 114: Hoare triple {13427#true} assume !(#t~loopctr788 % 18446744073709551616 < #amount % 18446744073709551616); {13427#true} is VALID [2022-02-20 22:29:02,435 INFO L290 TraceCheckUtils]: 115: Hoare triple {13427#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {13427#true} is VALID [2022-02-20 22:29:02,435 INFO L284 TraceCheckUtils]: 116: Hoare quadruple {13427#true} {13427#true} #3454#return; {13427#true} is VALID [2022-02-20 22:29:02,436 INFO L290 TraceCheckUtils]: 117: Hoare triple {13427#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res15.base, #t~memset~res15.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {13427#true} is VALID [2022-02-20 22:29:02,436 INFO L290 TraceCheckUtils]: 118: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,436 INFO L284 TraceCheckUtils]: 119: Hoare quadruple {13427#true} {13429#(= ~ldv_irq_1_0~0 0)} #3134#return; {13429#(= ~ldv_irq_1_0~0 0)} is VALID [2022-02-20 22:29:02,437 INFO L290 TraceCheckUtils]: 120: Hoare triple {13429#(= ~ldv_irq_1_0~0 0)} havoc main_#t~ret693#1.base, main_#t~ret693#1.offset;~ldv_state_variable_6~0 := 0;~ldv_state_variable_4~0 := 0;~ldv_state_variable_1~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 1;~ldv_state_variable_5~0 := 0; {13429#(= ~ldv_irq_1_0~0 0)} is VALID [2022-02-20 22:29:02,437 INFO L290 TraceCheckUtils]: 121: Hoare triple {13429#(= ~ldv_irq_1_0~0 0)} assume -2147483648 <= main_#t~nondet694#1 && main_#t~nondet694#1 <= 2147483647;main_~tmp___5~5#1 := main_#t~nondet694#1;havoc main_#t~nondet694#1;main_#t~switch695#1 := 0 == main_~tmp___5~5#1; {13429#(= ~ldv_irq_1_0~0 0)} is VALID [2022-02-20 22:29:02,437 INFO L290 TraceCheckUtils]: 122: Hoare triple {13429#(= ~ldv_irq_1_0~0 0)} assume !main_#t~switch695#1;main_#t~switch695#1 := main_#t~switch695#1 || 1 == main_~tmp___5~5#1; {13429#(= ~ldv_irq_1_0~0 0)} is VALID [2022-02-20 22:29:02,438 INFO L290 TraceCheckUtils]: 123: Hoare triple {13429#(= ~ldv_irq_1_0~0 0)} assume !main_#t~switch695#1;main_#t~switch695#1 := main_#t~switch695#1 || 2 == main_~tmp___5~5#1; {13429#(= ~ldv_irq_1_0~0 0)} is VALID [2022-02-20 22:29:02,438 INFO L290 TraceCheckUtils]: 124: Hoare triple {13429#(= ~ldv_irq_1_0~0 0)} assume main_#t~switch695#1; {13429#(= ~ldv_irq_1_0~0 0)} is VALID [2022-02-20 22:29:02,438 INFO L290 TraceCheckUtils]: 125: Hoare triple {13429#(= ~ldv_irq_1_0~0 0)} assume 0 != ~ldv_state_variable_1~0;assume { :begin_inline_choose_interrupt_1 } true;havoc choose_interrupt_1_#t~nondet680#1, choose_interrupt_1_#t~switch681#1, choose_interrupt_1_#t~ret682#1, choose_interrupt_1_#t~ret683#1, choose_interrupt_1_#t~ret684#1, choose_interrupt_1_#t~ret685#1, choose_interrupt_1_~tmp~56#1;havoc choose_interrupt_1_~tmp~56#1;assume -2147483648 <= choose_interrupt_1_#t~nondet680#1 && choose_interrupt_1_#t~nondet680#1 <= 2147483647;choose_interrupt_1_~tmp~56#1 := choose_interrupt_1_#t~nondet680#1;havoc choose_interrupt_1_#t~nondet680#1;choose_interrupt_1_#t~switch681#1 := 0 == choose_interrupt_1_~tmp~56#1; {13429#(= ~ldv_irq_1_0~0 0)} is VALID [2022-02-20 22:29:02,438 INFO L290 TraceCheckUtils]: 126: Hoare triple {13429#(= ~ldv_irq_1_0~0 0)} assume choose_interrupt_1_#t~switch681#1; {13429#(= ~ldv_irq_1_0~0 0)} is VALID [2022-02-20 22:29:02,439 INFO L272 TraceCheckUtils]: 127: Hoare triple {13429#(= ~ldv_irq_1_0~0 0)} call choose_interrupt_1_#t~ret682#1 := ldv_irq_1(~ldv_irq_1_0~0, ~ldv_irq_line_1_0~0, ~ldv_irq_data_1_0~0.base, ~ldv_irq_data_1_0~0.offset); {13532#(= |ldv_irq_1_#in~state#1| 0)} is VALID [2022-02-20 22:29:02,440 INFO L290 TraceCheckUtils]: 128: Hoare triple {13532#(= |ldv_irq_1_#in~state#1| 0)} ~state#1 := #in~state#1;~line#1 := #in~line#1;~data#1.base, ~data#1.offset := #in~data#1.base, #in~data#1.offset;havoc ~irq_retval~0#1;havoc ~tmp~52#1;havoc ~tmp___0~26#1;assume -2147483648 <= #t~nondet672#1 && #t~nondet672#1 <= 2147483647;~tmp~52#1 := #t~nondet672#1;havoc #t~nondet672#1;~irq_retval~0#1 := ~tmp~52#1; {13533#(= |ldv_irq_1_~state#1| 0)} is VALID [2022-02-20 22:29:02,440 INFO L290 TraceCheckUtils]: 129: Hoare triple {13533#(= |ldv_irq_1_~state#1| 0)} assume 0 != ~state#1;assume -2147483648 <= #t~nondet673#1 && #t~nondet673#1 <= 2147483647;~tmp___0~26#1 := #t~nondet673#1;havoc #t~nondet673#1;#t~switch674#1 := 0 == ~tmp___0~26#1; {13428#false} is VALID [2022-02-20 22:29:02,440 INFO L290 TraceCheckUtils]: 130: Hoare triple {13428#false} assume #t~switch674#1; {13428#false} is VALID [2022-02-20 22:29:02,440 INFO L290 TraceCheckUtils]: 131: Hoare triple {13428#false} assume 1 == ~state#1;~LDV_IN_INTERRUPT~0 := 2;assume { :begin_inline_hamachi_interrupt } true;hamachi_interrupt_#in~irq#1, hamachi_interrupt_#in~dev_instance#1.base, hamachi_interrupt_#in~dev_instance#1.offset := ~line#1, ~data#1.base, ~data#1.offset;havoc hamachi_interrupt_#res#1;havoc hamachi_interrupt_#t~ret431#1.base, hamachi_interrupt_#t~ret431#1.offset, hamachi_interrupt_#t~mem432#1.base, hamachi_interrupt_#t~mem432#1.offset, hamachi_interrupt_#t~ret433#1, hamachi_interrupt_#t~nondet434#1, hamachi_interrupt_#t~ret435#1, hamachi_interrupt_#t~mem436#1, hamachi_interrupt_#t~mem438#1, hamachi_interrupt_#t~mem440#1.base, hamachi_interrupt_#t~mem440#1.offset, hamachi_interrupt_#t~mem441#1, hamachi_interrupt_#t~mem442#1.base, hamachi_interrupt_#t~mem442#1.offset, hamachi_interrupt_#t~mem443#1.base, hamachi_interrupt_#t~mem443#1.offset, hamachi_interrupt_#t~mem444#1.base, hamachi_interrupt_#t~mem444#1.offset, hamachi_interrupt_#t~mem445#1, hamachi_interrupt_#t~mem446#1, hamachi_interrupt_#t~mem447#1.base, hamachi_interrupt_#t~mem447#1.offset, hamachi_interrupt_#t~mem448#1.base, hamachi_interrupt_#t~mem448#1.offset, hamachi_interrupt_#t~mem449#1.base, hamachi_interrupt_#t~mem449#1.offset, hamachi_interrupt_#t~mem450#1, hamachi_interrupt_#t~mem451#1, hamachi_interrupt_#t~mem452#1, hamachi_interrupt_#t~mem453#1, hamachi_interrupt_#t~mem454#1, hamachi_interrupt_#t~mem455#1, hamachi_interrupt_#t~mem456#1, hamachi_interrupt_#t~nondet439#1, hamachi_interrupt_#t~nondet457#1, hamachi_interrupt_#t~ret458#1, hamachi_interrupt_#t~nondet459#1, hamachi_interrupt_~irq#1, hamachi_interrupt_~dev_instance#1.base, hamachi_interrupt_~dev_instance#1.offset, hamachi_interrupt_~dev~2#1.base, hamachi_interrupt_~dev~2#1.offset, hamachi_interrupt_~hmp~9#1.base, hamachi_interrupt_~hmp~9#1.offset, hamachi_interrupt_~tmp~36#1.base, hamachi_interrupt_~tmp~36#1.offset, hamachi_interrupt_~ioaddr~6#1.base, hamachi_interrupt_~ioaddr~6#1.offset, hamachi_interrupt_~boguscnt~1#1, hamachi_interrupt_~handled~0#1, hamachi_interrupt_~intr_status~0#1, hamachi_interrupt_~tmp___0~15#1, hamachi_interrupt_~entry~2#1, hamachi_interrupt_~skb~4#1.base, hamachi_interrupt_~skb~4#1.offset, hamachi_interrupt_~tmp___1~12#1;hamachi_interrupt_~irq#1 := hamachi_interrupt_#in~irq#1;hamachi_interrupt_~dev_instance#1.base, hamachi_interrupt_~dev_instance#1.offset := hamachi_interrupt_#in~dev_instance#1.base, hamachi_interrupt_#in~dev_instance#1.offset;havoc hamachi_interrupt_~dev~2#1.base, hamachi_interrupt_~dev~2#1.offset;havoc hamachi_interrupt_~hmp~9#1.base, hamachi_interrupt_~hmp~9#1.offset;havoc hamachi_interrupt_~tmp~36#1.base, hamachi_interrupt_~tmp~36#1.offset;havoc hamachi_interrupt_~ioaddr~6#1.base, hamachi_interrupt_~ioaddr~6#1.offset;havoc hamachi_interrupt_~boguscnt~1#1;havoc hamachi_interrupt_~handled~0#1;havoc hamachi_interrupt_~intr_status~0#1;havoc hamachi_interrupt_~tmp___0~15#1;havoc hamachi_interrupt_~entry~2#1;havoc hamachi_interrupt_~skb~4#1.base, hamachi_interrupt_~skb~4#1.offset;havoc hamachi_interrupt_~tmp___1~12#1;hamachi_interrupt_~dev~2#1.base, hamachi_interrupt_~dev~2#1.offset := hamachi_interrupt_~dev_instance#1.base, hamachi_interrupt_~dev_instance#1.offset; {13428#false} is VALID [2022-02-20 22:29:02,440 INFO L272 TraceCheckUtils]: 132: Hoare triple {13428#false} call hamachi_interrupt_#t~ret431#1.base, hamachi_interrupt_#t~ret431#1.offset := netdev_priv(hamachi_interrupt_~dev~2#1.base, hamachi_interrupt_~dev~2#1.offset); {13427#true} is VALID [2022-02-20 22:29:02,441 INFO L290 TraceCheckUtils]: 133: Hoare triple {13427#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3008 + ~dev.offset; {13427#true} is VALID [2022-02-20 22:29:02,441 INFO L290 TraceCheckUtils]: 134: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,441 INFO L284 TraceCheckUtils]: 135: Hoare quadruple {13427#true} {13428#false} #2898#return; {13428#false} is VALID [2022-02-20 22:29:02,441 INFO L290 TraceCheckUtils]: 136: Hoare triple {13428#false} hamachi_interrupt_~tmp~36#1.base, hamachi_interrupt_~tmp~36#1.offset := hamachi_interrupt_#t~ret431#1.base, hamachi_interrupt_#t~ret431#1.offset;havoc hamachi_interrupt_#t~ret431#1.base, hamachi_interrupt_#t~ret431#1.offset;hamachi_interrupt_~hmp~9#1.base, hamachi_interrupt_~hmp~9#1.offset := hamachi_interrupt_~tmp~36#1.base, hamachi_interrupt_~tmp~36#1.offset;call hamachi_interrupt_#t~mem432#1.base, hamachi_interrupt_#t~mem432#1.offset := read~$Pointer$(hamachi_interrupt_~hmp~9#1.base, 4926 + hamachi_interrupt_~hmp~9#1.offset, 8);hamachi_interrupt_~ioaddr~6#1.base, hamachi_interrupt_~ioaddr~6#1.offset := hamachi_interrupt_#t~mem432#1.base, hamachi_interrupt_#t~mem432#1.offset;havoc hamachi_interrupt_#t~mem432#1.base, hamachi_interrupt_#t~mem432#1.offset;hamachi_interrupt_~boguscnt~1#1 := ~max_interrupt_work~0;hamachi_interrupt_~handled~0#1 := 0;assume { :begin_inline_spin_lock } true;spin_lock_#in~lock#1.base, spin_lock_#in~lock#1.offset := hamachi_interrupt_~hmp~9#1.base, 4760 + hamachi_interrupt_~hmp~9#1.offset;havoc spin_lock_~lock#1.base, spin_lock_~lock#1.offset;spin_lock_~lock#1.base, spin_lock_~lock#1.offset := spin_lock_#in~lock#1.base, spin_lock_#in~lock#1.offset; {13428#false} is VALID [2022-02-20 22:29:02,441 INFO L272 TraceCheckUtils]: 137: Hoare triple {13428#false} call ldv_spin_lock(); {13599#(= ~ldv_spin~0 |old(~ldv_spin~0)|)} is VALID [2022-02-20 22:29:02,441 INFO L290 TraceCheckUtils]: 138: Hoare triple {13599#(= ~ldv_spin~0 |old(~ldv_spin~0)|)} ~ldv_spin~0 := 1; {13427#true} is VALID [2022-02-20 22:29:02,441 INFO L290 TraceCheckUtils]: 139: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,441 INFO L284 TraceCheckUtils]: 140: Hoare quadruple {13427#true} {13428#false} #2900#return; {13428#false} is VALID [2022-02-20 22:29:02,442 INFO L290 TraceCheckUtils]: 141: Hoare triple {13428#false} assume { :begin_inline_ldv_spin_lock_5 } true;ldv_spin_lock_5_#in~lock#1.base, ldv_spin_lock_5_#in~lock#1.offset := spin_lock_~lock#1.base, spin_lock_~lock#1.offset;havoc ldv_spin_lock_5_~lock#1.base, ldv_spin_lock_5_~lock#1.offset;ldv_spin_lock_5_~lock#1.base, ldv_spin_lock_5_~lock#1.offset := ldv_spin_lock_5_#in~lock#1.base, ldv_spin_lock_5_#in~lock#1.offset;assume { :begin_inline__raw_spin_lock } true;_raw_spin_lock_#in~arg0#1.base, _raw_spin_lock_#in~arg0#1.offset := ldv_spin_lock_5_~lock#1.base, ldv_spin_lock_5_~lock#1.offset;havoc _raw_spin_lock_~arg0#1.base, _raw_spin_lock_~arg0#1.offset;_raw_spin_lock_~arg0#1.base, _raw_spin_lock_~arg0#1.offset := _raw_spin_lock_#in~arg0#1.base, _raw_spin_lock_#in~arg0#1.offset; {13428#false} is VALID [2022-02-20 22:29:02,442 INFO L290 TraceCheckUtils]: 142: Hoare triple {13428#false} assume { :end_inline__raw_spin_lock } true; {13428#false} is VALID [2022-02-20 22:29:02,442 INFO L290 TraceCheckUtils]: 143: Hoare triple {13428#false} assume { :end_inline_ldv_spin_lock_5 } true; {13428#false} is VALID [2022-02-20 22:29:02,442 INFO L290 TraceCheckUtils]: 144: Hoare triple {13428#false} assume { :end_inline_spin_lock } true; {13428#false} is VALID [2022-02-20 22:29:02,442 INFO L272 TraceCheckUtils]: 145: Hoare triple {13428#false} call hamachi_interrupt_#t~ret433#1 := readl(hamachi_interrupt_~ioaddr~6#1.base, 132 + hamachi_interrupt_~ioaddr~6#1.offset); {13427#true} is VALID [2022-02-20 22:29:02,442 INFO L290 TraceCheckUtils]: 146: Hoare triple {13427#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~2;#res := ~ret~2; {13427#true} is VALID [2022-02-20 22:29:02,442 INFO L290 TraceCheckUtils]: 147: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,442 INFO L284 TraceCheckUtils]: 148: Hoare quadruple {13427#true} {13428#false} #2902#return; {13428#false} is VALID [2022-02-20 22:29:02,443 INFO L290 TraceCheckUtils]: 149: Hoare triple {13428#false} hamachi_interrupt_~tmp___0~15#1 := hamachi_interrupt_#t~ret433#1;havoc hamachi_interrupt_#t~ret433#1;hamachi_interrupt_~intr_status~0#1 := hamachi_interrupt_~tmp___0~15#1; {13428#false} is VALID [2022-02-20 22:29:02,443 INFO L290 TraceCheckUtils]: 150: Hoare triple {13428#false} assume ~debug~0 > 4;havoc hamachi_interrupt_#t~nondet434#1; {13428#false} is VALID [2022-02-20 22:29:02,443 INFO L290 TraceCheckUtils]: 151: Hoare triple {13428#false} assume !(0 == hamachi_interrupt_~intr_status~0#1 % 4294967296);hamachi_interrupt_~handled~0#1 := 1; {13428#false} is VALID [2022-02-20 22:29:02,443 INFO L290 TraceCheckUtils]: 152: Hoare triple {13428#false} assume 0 != (if hamachi_interrupt_~intr_status~0#1 % 4294967296 % 4294967296 <= 2147483647 then hamachi_interrupt_~intr_status~0#1 % 4294967296 % 4294967296 else hamachi_interrupt_~intr_status~0#1 % 4294967296 % 4294967296 - 4294967296);assume { :begin_inline_hamachi_rx } true;hamachi_rx_#in~dev#1.base, hamachi_rx_#in~dev#1.offset := hamachi_interrupt_~dev~2#1.base, hamachi_interrupt_~dev~2#1.offset;havoc hamachi_rx_#res#1;havoc hamachi_rx_#t~ret460#1.base, hamachi_rx_#t~ret460#1.offset, hamachi_rx_#t~mem462#1, hamachi_rx_#t~mem464#1, hamachi_rx_#t~mem465#1, hamachi_rx_#t~nondet466#1, hamachi_rx_#t~mem467#1.base, hamachi_rx_#t~mem467#1.offset, hamachi_rx_#t~mem468#1, hamachi_rx_#t~mem469#1.base, hamachi_rx_#t~mem469#1.offset, hamachi_rx_#t~mem470#1, hamachi_rx_#t~mem471#1.base, hamachi_rx_#t~mem471#1.offset, hamachi_rx_#t~mem472#1, hamachi_rx_#t~mem473#1, hamachi_rx_#t~mem474#1.base, hamachi_rx_#t~mem474#1.offset, hamachi_rx_#t~mem475#1.base, hamachi_rx_#t~mem475#1.offset, hamachi_rx_#t~ret476#1, hamachi_rx_#t~nondet477#1, hamachi_rx_#t~nondet478#1, hamachi_rx_#t~mem479#1, hamachi_rx_#t~nondet480#1, hamachi_rx_#t~mem482#1.base, hamachi_rx_#t~mem482#1.offset, hamachi_rx_#t~mem481#1, hamachi_rx_#t~nondet483#1, hamachi_rx_#t~mem485#1.base, hamachi_rx_#t~mem485#1.offset, hamachi_rx_#t~mem484#1, hamachi_rx_#t~mem486#1, hamachi_rx_#t~mem488#1.base, hamachi_rx_#t~mem488#1.offset, hamachi_rx_#t~mem487#1, hamachi_rx_#t~mem489#1, hamachi_rx_#t~mem491#1.base, hamachi_rx_#t~mem491#1.offset, hamachi_rx_#t~mem490#1, hamachi_rx_#t~mem492#1, hamachi_rx_#t~mem493#1, hamachi_rx_#t~nondet494#1, hamachi_rx_#t~mem495#1, hamachi_rx_#t~mem496#1, hamachi_rx_#t~mem497#1, hamachi_rx_#t~mem498#1, hamachi_rx_#t~mem499#1, hamachi_rx_#t~mem500#1, hamachi_rx_#t~ret501#1.base, hamachi_rx_#t~ret501#1.offset, hamachi_rx_#t~nondet502#1, hamachi_rx_#t~mem503#1.base, hamachi_rx_#t~mem503#1.offset, hamachi_rx_#t~mem504#1.base, hamachi_rx_#t~mem504#1.offset, hamachi_rx_#t~mem505#1, hamachi_rx_#t~mem506#1, hamachi_rx_#t~mem507#1.base, hamachi_rx_#t~mem507#1.offset, hamachi_rx_#t~mem508#1.base, hamachi_rx_#t~mem508#1.offset, hamachi_rx_#t~ret509#1.base, hamachi_rx_#t~ret509#1.offset, hamachi_rx_#t~mem510#1.base, hamachi_rx_#t~mem510#1.offset, hamachi_rx_#t~mem511#1.base, hamachi_rx_#t~mem511#1.offset, hamachi_rx_#t~mem512#1, hamachi_rx_#t~mem513#1, hamachi_rx_#t~mem514#1.base, hamachi_rx_#t~mem514#1.offset, hamachi_rx_#t~mem515#1.base, hamachi_rx_#t~mem515#1.offset, hamachi_rx_#t~mem516#1, hamachi_rx_#t~mem517#1, hamachi_rx_#t~mem518#1.base, hamachi_rx_#t~mem518#1.offset, hamachi_rx_#t~ret519#1.base, hamachi_rx_#t~ret519#1.offset, hamachi_rx_#t~mem520#1.base, hamachi_rx_#t~mem520#1.offset, hamachi_rx_#t~mem521#1.base, hamachi_rx_#t~mem521#1.offset, hamachi_rx_#t~mem522#1, hamachi_rx_#t~mem523#1, hamachi_rx_#t~mem524#1.base, hamachi_rx_#t~mem524#1.offset, hamachi_rx_#t~ret525#1.base, hamachi_rx_#t~ret525#1.offset, hamachi_rx_#t~ret526#1, hamachi_rx_#t~mem527#1.base, hamachi_rx_#t~mem527#1.offset, hamachi_rx_#t~mem528#1, hamachi_rx_#t~ret529#1, hamachi_rx_#t~mem530#1, hamachi_rx_#t~mem531#1, hamachi_rx_#t~nondet532#1, hamachi_rx_#t~mem533#1, hamachi_rx_#t~mem534#1, hamachi_rx_#t~switch535#1, hamachi_rx_#t~nondet536#1, hamachi_rx_#t~ret537#1, hamachi_rx_#t~mem538#1, hamachi_rx_#t~mem539#1, hamachi_rx_#t~mem540#1, hamachi_rx_#t~ret541#1, hamachi_rx_#t~mem542#1, hamachi_rx_#t~mem543#1, hamachi_rx_#t~mem545#1, hamachi_rx_#t~mem548#1, hamachi_rx_#t~mem550#1.base, hamachi_rx_#t~mem550#1.offset, hamachi_rx_#t~mem551#1.base, hamachi_rx_#t~mem551#1.offset, hamachi_rx_#t~mem552#1, hamachi_rx_#t~ret553#1.base, hamachi_rx_#t~ret553#1.offset, hamachi_rx_#t~mem554#1.base, hamachi_rx_#t~mem554#1.offset, hamachi_rx_#t~mem555#1.base, hamachi_rx_#t~mem555#1.offset, hamachi_rx_#t~mem556#1, hamachi_rx_#t~ret557#1, hamachi_rx_#t~mem558#1, hamachi_rx_#t~mem559#1, hamachi_rx_#t~mem560#1, hamachi_rx_#t~mem561#1, hamachi_rx_#t~mem562#1, hamachi_rx_#t~mem563#1, hamachi_rx_#t~mem564#1.base, hamachi_rx_#t~mem564#1.offset, hamachi_rx_#t~ret565#1, hamachi_rx_#t~mem566#1.base, hamachi_rx_#t~mem566#1.offset, hamachi_rx_#t~nondet463#1, hamachi_rx_#t~nondet546#1, hamachi_rx_#t~nondet549#1, hamachi_rx_~dev#1.base, hamachi_rx_~dev#1.offset, hamachi_rx_~hmp~10#1.base, hamachi_rx_~hmp~10#1.offset, hamachi_rx_~tmp~37#1.base, hamachi_rx_~tmp~37#1.offset, hamachi_rx_~entry~3#1, hamachi_rx_~boguscnt~2#1, hamachi_rx_~desc~0#1.base, hamachi_rx_~desc~0#1.offset, hamachi_rx_~desc_status~0#1, hamachi_rx_~data_size~0#1, hamachi_rx_~buf_addr~0#1.base, hamachi_rx_~buf_addr~0#1.offset, hamachi_rx_~frame_status~0#1, hamachi_rx_~tmp___0~16#1, hamachi_rx_~skb~5#1.base, hamachi_rx_~skb~5#1.offset, hamachi_rx_~pkt_len~0#1, hamachi_rx_~pfck~0#1, hamachi_rx_~ih~0#1.base, hamachi_rx_~ih~0#1.offset, hamachi_rx_~inv~0#1, hamachi_rx_~p~3#1.base, hamachi_rx_~p~3#1.offset, hamachi_rx_~crc~0#1, hamachi_rx_~p_r~0#1, hamachi_rx_~p_r1~0#1, hamachi_rx_~tmp___1~13#1, hamachi_rx_~tmp___2~8#1, hamachi_rx_~desc___0~0#1.base, hamachi_rx_~desc___0~0#1.offset, hamachi_rx_~skb___0~1#1.base, hamachi_rx_~skb___0~1#1.offset, hamachi_rx_~tmp___3~5#1.base, hamachi_rx_~tmp___3~5#1.offset, hamachi_rx_~tmp___4~2#1, hamachi_rx_~tmp___5~2#1;hamachi_rx_~dev#1.base, hamachi_rx_~dev#1.offset := hamachi_rx_#in~dev#1.base, hamachi_rx_#in~dev#1.offset;havoc hamachi_rx_~hmp~10#1.base, hamachi_rx_~hmp~10#1.offset;havoc hamachi_rx_~tmp~37#1.base, hamachi_rx_~tmp~37#1.offset;havoc hamachi_rx_~entry~3#1;havoc hamachi_rx_~boguscnt~2#1;havoc hamachi_rx_~desc~0#1.base, hamachi_rx_~desc~0#1.offset;havoc hamachi_rx_~desc_status~0#1;havoc hamachi_rx_~data_size~0#1;havoc hamachi_rx_~buf_addr~0#1.base, hamachi_rx_~buf_addr~0#1.offset;havoc hamachi_rx_~frame_status~0#1;havoc hamachi_rx_~tmp___0~16#1;havoc hamachi_rx_~skb~5#1.base, hamachi_rx_~skb~5#1.offset;havoc hamachi_rx_~pkt_len~0#1;havoc hamachi_rx_~pfck~0#1;havoc hamachi_rx_~ih~0#1.base, hamachi_rx_~ih~0#1.offset;havoc hamachi_rx_~inv~0#1;havoc hamachi_rx_~p~3#1.base, hamachi_rx_~p~3#1.offset;havoc hamachi_rx_~crc~0#1;havoc hamachi_rx_~p_r~0#1;havoc hamachi_rx_~p_r1~0#1;havoc hamachi_rx_~tmp___1~13#1;havoc hamachi_rx_~tmp___2~8#1;havoc hamachi_rx_~desc___0~0#1.base, hamachi_rx_~desc___0~0#1.offset;havoc hamachi_rx_~skb___0~1#1.base, hamachi_rx_~skb___0~1#1.offset;havoc hamachi_rx_~tmp___3~5#1.base, hamachi_rx_~tmp___3~5#1.offset;havoc hamachi_rx_~tmp___4~2#1;havoc hamachi_rx_~tmp___5~2#1; {13428#false} is VALID [2022-02-20 22:29:02,443 INFO L272 TraceCheckUtils]: 153: Hoare triple {13428#false} call hamachi_rx_#t~ret460#1.base, hamachi_rx_#t~ret460#1.offset := netdev_priv(hamachi_rx_~dev#1.base, hamachi_rx_~dev#1.offset); {13427#true} is VALID [2022-02-20 22:29:02,443 INFO L290 TraceCheckUtils]: 154: Hoare triple {13427#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3008 + ~dev.offset; {13427#true} is VALID [2022-02-20 22:29:02,443 INFO L290 TraceCheckUtils]: 155: Hoare triple {13427#true} assume true; {13427#true} is VALID [2022-02-20 22:29:02,444 INFO L284 TraceCheckUtils]: 156: Hoare quadruple {13427#true} {13428#false} #2904#return; {13428#false} is VALID [2022-02-20 22:29:02,444 INFO L290 TraceCheckUtils]: 157: Hoare triple {13428#false} hamachi_rx_~tmp~37#1.base, hamachi_rx_~tmp~37#1.offset := hamachi_rx_#t~ret460#1.base, hamachi_rx_#t~ret460#1.offset;havoc hamachi_rx_#t~ret460#1.base, hamachi_rx_#t~ret460#1.offset;hamachi_rx_~hmp~10#1.base, hamachi_rx_~hmp~10#1.offset := hamachi_rx_~tmp~37#1.base, hamachi_rx_~tmp~37#1.offset;call hamachi_rx_#t~mem462#1 := read~int(hamachi_rx_~hmp~10#1.base, 4832 + hamachi_rx_~hmp~10#1.offset, 4); {13428#false} is VALID [2022-02-20 22:29:02,444 INFO L290 TraceCheckUtils]: 158: Hoare triple {13428#false} assume 0 == (if hamachi_rx_#t~mem462#1 % 4294967296 % 4294967296 <= 2147483647 then hamachi_rx_#t~mem462#1 % 4294967296 % 4294967296 else hamachi_rx_#t~mem462#1 % 4294967296 % 4294967296 - 4294967296);hamachi_rx_~entry~3#1 := 0; {13428#false} is VALID [2022-02-20 22:29:02,444 INFO L290 TraceCheckUtils]: 159: Hoare triple {13428#false} havoc hamachi_rx_#t~mem462#1;call hamachi_rx_#t~mem464#1 := read~int(hamachi_rx_~hmp~10#1.base, 4836 + hamachi_rx_~hmp~10#1.offset, 4);call hamachi_rx_#t~mem465#1 := read~int(hamachi_rx_~hmp~10#1.base, 4832 + hamachi_rx_~hmp~10#1.offset, 4);hamachi_rx_~boguscnt~2#1 := (if (512 + (hamachi_rx_#t~mem464#1 - hamachi_rx_#t~mem465#1)) % 4294967296 % 4294967296 <= 2147483647 then (512 + (hamachi_rx_#t~mem464#1 - hamachi_rx_#t~mem465#1)) % 4294967296 % 4294967296 else (512 + (hamachi_rx_#t~mem464#1 - hamachi_rx_#t~mem465#1)) % 4294967296 % 4294967296 - 4294967296);havoc hamachi_rx_#t~mem464#1;havoc hamachi_rx_#t~mem465#1; {13428#false} is VALID [2022-02-20 22:29:02,444 INFO L290 TraceCheckUtils]: 160: Hoare triple {13428#false} assume ~debug~0 > 4;havoc hamachi_rx_#t~nondet466#1;call hamachi_rx_#t~mem467#1.base, hamachi_rx_#t~mem467#1.offset := read~$Pointer$(hamachi_rx_~hmp~10#1.base, hamachi_rx_~hmp~10#1.offset, 8);call hamachi_rx_#t~mem468#1 := read~int(hamachi_rx_#t~mem467#1.base, hamachi_rx_#t~mem467#1.offset + 8 * (if hamachi_rx_~entry~3#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then hamachi_rx_~entry~3#1 % 18446744073709551616 % 18446744073709551616 else hamachi_rx_~entry~3#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), 4);havoc hamachi_rx_#t~mem467#1.base, hamachi_rx_#t~mem467#1.offset;havoc hamachi_rx_#t~mem468#1; {13428#false} is VALID [2022-02-20 22:29:02,444 INFO L290 TraceCheckUtils]: 161: Hoare triple {13428#false} call hamachi_rx_#t~mem469#1.base, hamachi_rx_#t~mem469#1.offset := read~$Pointer$(hamachi_rx_~hmp~10#1.base, hamachi_rx_~hmp~10#1.offset, 8);hamachi_rx_~desc~0#1.base, hamachi_rx_~desc~0#1.offset := hamachi_rx_#t~mem469#1.base, hamachi_rx_#t~mem469#1.offset + 8 * (if hamachi_rx_~entry~3#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then hamachi_rx_~entry~3#1 % 18446744073709551616 % 18446744073709551616 else hamachi_rx_~entry~3#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc hamachi_rx_#t~mem469#1.base, hamachi_rx_#t~mem469#1.offset;call hamachi_rx_#t~mem470#1 := read~int(hamachi_rx_~desc~0#1.base, hamachi_rx_~desc~0#1.offset, 4);hamachi_rx_~desc_status~0#1 := hamachi_rx_#t~mem470#1;havoc hamachi_rx_#t~mem470#1;hamachi_rx_~data_size~0#1 := hamachi_rx_~desc_status~0#1; {13428#false} is VALID [2022-02-20 22:29:02,444 INFO L290 TraceCheckUtils]: 162: Hoare triple {13428#false} assume (if hamachi_rx_~desc_status~0#1 % 4294967296 % 4294967296 <= 2147483647 then hamachi_rx_~desc_status~0#1 % 4294967296 % 4294967296 else hamachi_rx_~desc_status~0#1 % 4294967296 % 4294967296 - 4294967296) < 0; {13428#false} is VALID [2022-02-20 22:29:02,444 INFO L290 TraceCheckUtils]: 163: Hoare triple {13428#false} call hamachi_rx_#t~mem562#1 := read~int(hamachi_rx_~hmp~10#1.base, 4832 + hamachi_rx_~hmp~10#1.offset, 4);call hamachi_rx_#t~mem563#1 := read~int(hamachi_rx_~hmp~10#1.base, 4836 + hamachi_rx_~hmp~10#1.offset, 4); {13428#false} is VALID [2022-02-20 22:29:02,445 INFO L290 TraceCheckUtils]: 164: Hoare triple {13428#false} assume hamachi_rx_#t~mem562#1 % 4294967296 != hamachi_rx_#t~mem563#1 % 4294967296;havoc hamachi_rx_#t~mem562#1;havoc hamachi_rx_#t~mem563#1; {13428#false} is VALID [2022-02-20 22:29:02,445 INFO L290 TraceCheckUtils]: 165: Hoare triple {13428#false} call hamachi_rx_#t~mem548#1 := read~int(hamachi_rx_~hmp~10#1.base, 4836 + hamachi_rx_~hmp~10#1.offset, 4); {13428#false} is VALID [2022-02-20 22:29:02,445 INFO L290 TraceCheckUtils]: 166: Hoare triple {13428#false} assume 0 == (if hamachi_rx_#t~mem548#1 % 4294967296 % 4294967296 <= 2147483647 then hamachi_rx_#t~mem548#1 % 4294967296 % 4294967296 else hamachi_rx_#t~mem548#1 % 4294967296 % 4294967296 - 4294967296);hamachi_rx_~entry~3#1 := 0; {13428#false} is VALID [2022-02-20 22:29:02,445 INFO L290 TraceCheckUtils]: 167: Hoare triple {13428#false} havoc hamachi_rx_#t~mem548#1;call hamachi_rx_#t~mem550#1.base, hamachi_rx_#t~mem550#1.offset := read~$Pointer$(hamachi_rx_~hmp~10#1.base, hamachi_rx_~hmp~10#1.offset, 8);hamachi_rx_~desc___0~0#1.base, hamachi_rx_~desc___0~0#1.offset := hamachi_rx_#t~mem550#1.base, hamachi_rx_#t~mem550#1.offset + 8 * (if hamachi_rx_~entry~3#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then hamachi_rx_~entry~3#1 % 18446744073709551616 % 18446744073709551616 else hamachi_rx_~entry~3#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc hamachi_rx_#t~mem550#1.base, hamachi_rx_#t~mem550#1.offset;call hamachi_rx_#t~mem551#1.base, hamachi_rx_#t~mem551#1.offset := read~$Pointer$(hamachi_rx_~hmp~10#1.base, 16 + hamachi_rx_~hmp~10#1.offset + 8 * hamachi_rx_~entry~3#1, 8); {13428#false} is VALID [2022-02-20 22:29:02,445 INFO L290 TraceCheckUtils]: 168: Hoare triple {13428#false} assume 0 == (hamachi_rx_#t~mem551#1.base + hamachi_rx_#t~mem551#1.offset) % 18446744073709551616;havoc hamachi_rx_#t~mem551#1.base, hamachi_rx_#t~mem551#1.offset;call hamachi_rx_#t~mem552#1 := read~int(hamachi_rx_~hmp~10#1.base, 4848 + hamachi_rx_~hmp~10#1.offset, 4); {13428#false} is VALID [2022-02-20 22:29:02,445 INFO L272 TraceCheckUtils]: 169: Hoare triple {13428#false} call hamachi_rx_#t~ret553#1.base, hamachi_rx_#t~ret553#1.offset := netdev_alloc_skb(hamachi_rx_~dev#1.base, hamachi_rx_~dev#1.offset, 2 + hamachi_rx_#t~mem552#1); {13428#false} is VALID [2022-02-20 22:29:02,445 INFO L290 TraceCheckUtils]: 170: Hoare triple {13428#false} ~dev#1.base, ~dev#1.offset := #in~dev#1.base, #in~dev#1.offset;~length#1 := #in~length#1;havoc ~tmp~18#1.base, ~tmp~18#1.offset;assume { :begin_inline_ldv___netdev_alloc_skb_31 } true;ldv___netdev_alloc_skb_31_#in~ldv_func_arg1#1.base, ldv___netdev_alloc_skb_31_#in~ldv_func_arg1#1.offset, ldv___netdev_alloc_skb_31_#in~ldv_func_arg2#1, ldv___netdev_alloc_skb_31_#in~flags#1 := ~dev#1.base, ~dev#1.offset, ~length#1, 32;havoc ldv___netdev_alloc_skb_31_#res#1.base, ldv___netdev_alloc_skb_31_#res#1.offset;havoc ldv___netdev_alloc_skb_31_#t~ret742#1.base, ldv___netdev_alloc_skb_31_#t~ret742#1.offset, ldv___netdev_alloc_skb_31_~ldv_func_arg1#1.base, ldv___netdev_alloc_skb_31_~ldv_func_arg1#1.offset, ldv___netdev_alloc_skb_31_~ldv_func_arg2#1, ldv___netdev_alloc_skb_31_~flags#1, ldv___netdev_alloc_skb_31_~tmp~60#1.base, ldv___netdev_alloc_skb_31_~tmp~60#1.offset;ldv___netdev_alloc_skb_31_~ldv_func_arg1#1.base, ldv___netdev_alloc_skb_31_~ldv_func_arg1#1.offset := ldv___netdev_alloc_skb_31_#in~ldv_func_arg1#1.base, ldv___netdev_alloc_skb_31_#in~ldv_func_arg1#1.offset;ldv___netdev_alloc_skb_31_~ldv_func_arg2#1 := ldv___netdev_alloc_skb_31_#in~ldv_func_arg2#1;ldv___netdev_alloc_skb_31_~flags#1 := ldv___netdev_alloc_skb_31_#in~flags#1;havoc ldv___netdev_alloc_skb_31_~tmp~60#1.base, ldv___netdev_alloc_skb_31_~tmp~60#1.offset; {13428#false} is VALID [2022-02-20 22:29:02,445 INFO L272 TraceCheckUtils]: 171: Hoare triple {13428#false} call ldv_check_alloc_flags(ldv___netdev_alloc_skb_31_~flags#1); {13428#false} is VALID [2022-02-20 22:29:02,446 INFO L290 TraceCheckUtils]: 172: Hoare triple {13428#false} ~flags := #in~flags; {13428#false} is VALID [2022-02-20 22:29:02,446 INFO L290 TraceCheckUtils]: 173: Hoare triple {13428#false} assume 0 != ~ldv_spin~0 && 0 != (if 0 == ~flags then 0 else (if 1 == ~flags then 0 else ~bitwiseAnd(~flags, 16))) % 4294967296; {13428#false} is VALID [2022-02-20 22:29:02,446 INFO L272 TraceCheckUtils]: 174: Hoare triple {13428#false} call ldv_error(); {13428#false} is VALID [2022-02-20 22:29:02,446 INFO L290 TraceCheckUtils]: 175: Hoare triple {13428#false} assume !false; {13428#false} is VALID [2022-02-20 22:29:02,447 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 222 trivial. 0 not checked. [2022-02-20 22:29:02,447 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:29:02,447 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [370340323] [2022-02-20 22:29:02,447 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [370340323] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:29:02,447 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 22:29:02,448 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2022-02-20 22:29:02,448 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [895380576] [2022-02-20 22:29:02,448 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:29:02,450 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 7.444444444444445) internal successors, (67), 4 states have internal predecessors, (67), 3 states have call successors, (19), 7 states have call predecessors, (19), 1 states have return successors, (15), 3 states have call predecessors, (15), 3 states have call successors, (15) Word has length 176 [2022-02-20 22:29:02,452 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:29:02,452 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 9 states, 9 states have (on average 7.444444444444445) internal successors, (67), 4 states have internal predecessors, (67), 3 states have call successors, (19), 7 states have call predecessors, (19), 1 states have return successors, (15), 3 states have call predecessors, (15), 3 states have call successors, (15) [2022-02-20 22:29:02,543 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 101 edges. 101 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:29:02,544 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-02-20 22:29:02,544 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:29:02,544 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-02-20 22:29:02,544 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2022-02-20 22:29:02,545 INFO L87 Difference]: Start difference. First operand 1891 states and 2627 transitions. Second operand has 9 states, 9 states have (on average 7.444444444444445) internal successors, (67), 4 states have internal predecessors, (67), 3 states have call successors, (19), 7 states have call predecessors, (19), 1 states have return successors, (15), 3 states have call predecessors, (15), 3 states have call successors, (15) [2022-02-20 22:29:29,011 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:29:29,011 INFO L93 Difference]: Finished difference Result 6189 states and 8714 transitions. [2022-02-20 22:29:29,011 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-02-20 22:29:29,012 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 7.444444444444445) internal successors, (67), 4 states have internal predecessors, (67), 3 states have call successors, (19), 7 states have call predecessors, (19), 1 states have return successors, (15), 3 states have call predecessors, (15), 3 states have call successors, (15) Word has length 176 [2022-02-20 22:29:29,012 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 22:29:29,012 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 7.444444444444445) internal successors, (67), 4 states have internal predecessors, (67), 3 states have call successors, (19), 7 states have call predecessors, (19), 1 states have return successors, (15), 3 states have call predecessors, (15), 3 states have call successors, (15) [2022-02-20 22:29:29,121 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 5551 transitions. [2022-02-20 22:29:29,121 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 7.444444444444445) internal successors, (67), 4 states have internal predecessors, (67), 3 states have call successors, (19), 7 states have call predecessors, (19), 1 states have return successors, (15), 3 states have call predecessors, (15), 3 states have call successors, (15) [2022-02-20 22:29:29,248 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 5551 transitions. [2022-02-20 22:29:29,249 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 17 states and 5551 transitions. [2022-02-20 22:29:34,002 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 5551 edges. 5551 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:29:34,866 INFO L225 Difference]: With dead ends: 6189 [2022-02-20 22:29:34,867 INFO L226 Difference]: Without dead ends: 4326 [2022-02-20 22:29:34,874 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 75 GetRequests, 56 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 82 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=138, Invalid=282, Unknown=0, NotChecked=0, Total=420 [2022-02-20 22:29:34,879 INFO L933 BasicCegarLoop]: 1803 mSDtfsCounter, 4405 mSDsluCounter, 4739 mSDsCounter, 0 mSdLazyCounter, 4222 mSolverCounterSat, 3161 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 8.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4635 SdHoareTripleChecker+Valid, 6542 SdHoareTripleChecker+Invalid, 7383 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 3161 IncrementalHoareTripleChecker+Valid, 4222 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 8.1s IncrementalHoareTripleChecker+Time [2022-02-20 22:29:34,879 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [4635 Valid, 6542 Invalid, 7383 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [3161 Valid, 4222 Invalid, 0 Unknown, 0 Unchecked, 8.1s Time] [2022-02-20 22:29:34,884 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4326 states. [2022-02-20 22:29:35,004 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4326 to 3749. [2022-02-20 22:29:35,005 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 22:29:35,013 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4326 states. Second operand has 3749 states, 2748 states have (on average 1.3100436681222707) internal successors, (3600), 2810 states have internal predecessors, (3600), 804 states have call successors, (804), 197 states have call predecessors, (804), 196 states have return successors, (803), 767 states have call predecessors, (803), 803 states have call successors, (803) [2022-02-20 22:29:35,021 INFO L74 IsIncluded]: Start isIncluded. First operand 4326 states. Second operand has 3749 states, 2748 states have (on average 1.3100436681222707) internal successors, (3600), 2810 states have internal predecessors, (3600), 804 states have call successors, (804), 197 states have call predecessors, (804), 196 states have return successors, (803), 767 states have call predecessors, (803), 803 states have call successors, (803) [2022-02-20 22:29:35,029 INFO L87 Difference]: Start difference. First operand 4326 states. Second operand has 3749 states, 2748 states have (on average 1.3100436681222707) internal successors, (3600), 2810 states have internal predecessors, (3600), 804 states have call successors, (804), 197 states have call predecessors, (804), 196 states have return successors, (803), 767 states have call predecessors, (803), 803 states have call successors, (803) [2022-02-20 22:29:35,592 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:29:35,593 INFO L93 Difference]: Finished difference Result 4326 states and 6117 transitions. [2022-02-20 22:29:35,593 INFO L276 IsEmpty]: Start isEmpty. Operand 4326 states and 6117 transitions. [2022-02-20 22:29:35,610 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:29:35,611 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:29:35,619 INFO L74 IsIncluded]: Start isIncluded. First operand has 3749 states, 2748 states have (on average 1.3100436681222707) internal successors, (3600), 2810 states have internal predecessors, (3600), 804 states have call successors, (804), 197 states have call predecessors, (804), 196 states have return successors, (803), 767 states have call predecessors, (803), 803 states have call successors, (803) Second operand 4326 states. [2022-02-20 22:29:35,628 INFO L87 Difference]: Start difference. First operand has 3749 states, 2748 states have (on average 1.3100436681222707) internal successors, (3600), 2810 states have internal predecessors, (3600), 804 states have call successors, (804), 197 states have call predecessors, (804), 196 states have return successors, (803), 767 states have call predecessors, (803), 803 states have call successors, (803) Second operand 4326 states. [2022-02-20 22:29:36,217 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:29:36,217 INFO L93 Difference]: Finished difference Result 4326 states and 6117 transitions. [2022-02-20 22:29:36,217 INFO L276 IsEmpty]: Start isEmpty. Operand 4326 states and 6117 transitions. [2022-02-20 22:29:36,232 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:29:36,233 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:29:36,233 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 22:29:36,233 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 22:29:36,240 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3749 states, 2748 states have (on average 1.3100436681222707) internal successors, (3600), 2810 states have internal predecessors, (3600), 804 states have call successors, (804), 197 states have call predecessors, (804), 196 states have return successors, (803), 767 states have call predecessors, (803), 803 states have call successors, (803) [2022-02-20 22:29:36,949 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3749 states to 3749 states and 5207 transitions. [2022-02-20 22:29:36,950 INFO L78 Accepts]: Start accepts. Automaton has 3749 states and 5207 transitions. Word has length 176 [2022-02-20 22:29:36,950 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 22:29:36,950 INFO L470 AbstractCegarLoop]: Abstraction has 3749 states and 5207 transitions. [2022-02-20 22:29:36,951 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 7.444444444444445) internal successors, (67), 4 states have internal predecessors, (67), 3 states have call successors, (19), 7 states have call predecessors, (19), 1 states have return successors, (15), 3 states have call predecessors, (15), 3 states have call successors, (15) [2022-02-20 22:29:36,951 INFO L276 IsEmpty]: Start isEmpty. Operand 3749 states and 5207 transitions. [2022-02-20 22:29:36,955 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 178 [2022-02-20 22:29:36,955 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:29:36,955 INFO L514 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:29:36,955 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-02-20 22:29:36,956 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:29:36,956 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:29:36,956 INFO L85 PathProgramCache]: Analyzing trace with hash -1474887068, now seen corresponding path program 1 times [2022-02-20 22:29:36,956 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:29:36,956 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [276308916] [2022-02-20 22:29:36,956 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:29:36,957 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:29:37,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:37,177 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 22:29:37,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:37,193 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:29:37,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:37,205 INFO L290 TraceCheckUtils]: 0: Hoare triple {36334#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {36207#true} is VALID [2022-02-20 22:29:37,206 INFO L290 TraceCheckUtils]: 1: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,206 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {36207#true} {36207#true} #3100#return; {36207#true} is VALID [2022-02-20 22:29:37,206 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:29:37,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:37,216 INFO L290 TraceCheckUtils]: 0: Hoare triple {36207#true} ~cond := #in~cond; {36207#true} is VALID [2022-02-20 22:29:37,216 INFO L290 TraceCheckUtils]: 1: Hoare triple {36207#true} assume !(0 == ~cond); {36207#true} is VALID [2022-02-20 22:29:37,216 INFO L290 TraceCheckUtils]: 2: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,216 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {36207#true} {36207#true} #3102#return; {36207#true} is VALID [2022-02-20 22:29:37,216 INFO L290 TraceCheckUtils]: 0: Hoare triple {36326#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {36207#true} is VALID [2022-02-20 22:29:37,217 INFO L272 TraceCheckUtils]: 1: Hoare triple {36207#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {36334#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:29:37,218 INFO L290 TraceCheckUtils]: 2: Hoare triple {36334#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {36207#true} is VALID [2022-02-20 22:29:37,218 INFO L290 TraceCheckUtils]: 3: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,218 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {36207#true} {36207#true} #3100#return; {36207#true} is VALID [2022-02-20 22:29:37,218 INFO L290 TraceCheckUtils]: 5: Hoare triple {36207#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {36207#true} is VALID [2022-02-20 22:29:37,218 INFO L272 TraceCheckUtils]: 6: Hoare triple {36207#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {36207#true} is VALID [2022-02-20 22:29:37,218 INFO L290 TraceCheckUtils]: 7: Hoare triple {36207#true} ~cond := #in~cond; {36207#true} is VALID [2022-02-20 22:29:37,218 INFO L290 TraceCheckUtils]: 8: Hoare triple {36207#true} assume !(0 == ~cond); {36207#true} is VALID [2022-02-20 22:29:37,219 INFO L290 TraceCheckUtils]: 9: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,219 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {36207#true} {36207#true} #3102#return; {36207#true} is VALID [2022-02-20 22:29:37,219 INFO L290 TraceCheckUtils]: 11: Hoare triple {36207#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {36207#true} is VALID [2022-02-20 22:29:37,219 INFO L290 TraceCheckUtils]: 12: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,220 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {36207#true} {36209#(= ~ldv_irq_1_1~0 0)} #3120#return; {36209#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:29:37,220 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 18 [2022-02-20 22:29:37,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:37,231 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:29:37,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:37,240 INFO L290 TraceCheckUtils]: 0: Hoare triple {36334#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {36207#true} is VALID [2022-02-20 22:29:37,241 INFO L290 TraceCheckUtils]: 1: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,241 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {36207#true} {36207#true} #3100#return; {36207#true} is VALID [2022-02-20 22:29:37,241 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:29:37,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:37,248 INFO L290 TraceCheckUtils]: 0: Hoare triple {36207#true} ~cond := #in~cond; {36207#true} is VALID [2022-02-20 22:29:37,248 INFO L290 TraceCheckUtils]: 1: Hoare triple {36207#true} assume !(0 == ~cond); {36207#true} is VALID [2022-02-20 22:29:37,248 INFO L290 TraceCheckUtils]: 2: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,249 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {36207#true} {36207#true} #3102#return; {36207#true} is VALID [2022-02-20 22:29:37,249 INFO L290 TraceCheckUtils]: 0: Hoare triple {36326#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {36207#true} is VALID [2022-02-20 22:29:37,250 INFO L272 TraceCheckUtils]: 1: Hoare triple {36207#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {36334#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:29:37,250 INFO L290 TraceCheckUtils]: 2: Hoare triple {36334#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {36207#true} is VALID [2022-02-20 22:29:37,250 INFO L290 TraceCheckUtils]: 3: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,250 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {36207#true} {36207#true} #3100#return; {36207#true} is VALID [2022-02-20 22:29:37,250 INFO L290 TraceCheckUtils]: 5: Hoare triple {36207#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {36207#true} is VALID [2022-02-20 22:29:37,250 INFO L272 TraceCheckUtils]: 6: Hoare triple {36207#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {36207#true} is VALID [2022-02-20 22:29:37,250 INFO L290 TraceCheckUtils]: 7: Hoare triple {36207#true} ~cond := #in~cond; {36207#true} is VALID [2022-02-20 22:29:37,251 INFO L290 TraceCheckUtils]: 8: Hoare triple {36207#true} assume !(0 == ~cond); {36207#true} is VALID [2022-02-20 22:29:37,251 INFO L290 TraceCheckUtils]: 9: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,263 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {36207#true} {36207#true} #3102#return; {36207#true} is VALID [2022-02-20 22:29:37,264 INFO L290 TraceCheckUtils]: 11: Hoare triple {36207#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {36207#true} is VALID [2022-02-20 22:29:37,264 INFO L290 TraceCheckUtils]: 12: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,265 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {36207#true} {36209#(= ~ldv_irq_1_1~0 0)} #3122#return; {36209#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:29:37,265 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 34 [2022-02-20 22:29:37,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:37,276 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:29:37,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:37,282 INFO L290 TraceCheckUtils]: 0: Hoare triple {36334#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {36207#true} is VALID [2022-02-20 22:29:37,283 INFO L290 TraceCheckUtils]: 1: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,283 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {36207#true} {36207#true} #3100#return; {36207#true} is VALID [2022-02-20 22:29:37,283 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:29:37,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:37,289 INFO L290 TraceCheckUtils]: 0: Hoare triple {36207#true} ~cond := #in~cond; {36207#true} is VALID [2022-02-20 22:29:37,289 INFO L290 TraceCheckUtils]: 1: Hoare triple {36207#true} assume !(0 == ~cond); {36207#true} is VALID [2022-02-20 22:29:37,289 INFO L290 TraceCheckUtils]: 2: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,289 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {36207#true} {36207#true} #3102#return; {36207#true} is VALID [2022-02-20 22:29:37,290 INFO L290 TraceCheckUtils]: 0: Hoare triple {36326#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {36207#true} is VALID [2022-02-20 22:29:37,290 INFO L272 TraceCheckUtils]: 1: Hoare triple {36207#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {36334#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:29:37,291 INFO L290 TraceCheckUtils]: 2: Hoare triple {36334#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {36207#true} is VALID [2022-02-20 22:29:37,291 INFO L290 TraceCheckUtils]: 3: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,291 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {36207#true} {36207#true} #3100#return; {36207#true} is VALID [2022-02-20 22:29:37,291 INFO L290 TraceCheckUtils]: 5: Hoare triple {36207#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {36207#true} is VALID [2022-02-20 22:29:37,291 INFO L272 TraceCheckUtils]: 6: Hoare triple {36207#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {36207#true} is VALID [2022-02-20 22:29:37,291 INFO L290 TraceCheckUtils]: 7: Hoare triple {36207#true} ~cond := #in~cond; {36207#true} is VALID [2022-02-20 22:29:37,291 INFO L290 TraceCheckUtils]: 8: Hoare triple {36207#true} assume !(0 == ~cond); {36207#true} is VALID [2022-02-20 22:29:37,292 INFO L290 TraceCheckUtils]: 9: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,292 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {36207#true} {36207#true} #3102#return; {36207#true} is VALID [2022-02-20 22:29:37,292 INFO L290 TraceCheckUtils]: 11: Hoare triple {36207#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {36207#true} is VALID [2022-02-20 22:29:37,292 INFO L290 TraceCheckUtils]: 12: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,293 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {36207#true} {36209#(= ~ldv_irq_1_1~0 0)} #3124#return; {36209#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:29:37,293 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 50 [2022-02-20 22:29:37,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:37,307 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:29:37,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:37,315 INFO L290 TraceCheckUtils]: 0: Hoare triple {36334#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {36207#true} is VALID [2022-02-20 22:29:37,315 INFO L290 TraceCheckUtils]: 1: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,315 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {36207#true} {36207#true} #3100#return; {36207#true} is VALID [2022-02-20 22:29:37,315 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:29:37,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:37,322 INFO L290 TraceCheckUtils]: 0: Hoare triple {36207#true} ~cond := #in~cond; {36207#true} is VALID [2022-02-20 22:29:37,323 INFO L290 TraceCheckUtils]: 1: Hoare triple {36207#true} assume !(0 == ~cond); {36207#true} is VALID [2022-02-20 22:29:37,323 INFO L290 TraceCheckUtils]: 2: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,323 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {36207#true} {36207#true} #3102#return; {36207#true} is VALID [2022-02-20 22:29:37,323 INFO L290 TraceCheckUtils]: 0: Hoare triple {36326#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {36207#true} is VALID [2022-02-20 22:29:37,324 INFO L272 TraceCheckUtils]: 1: Hoare triple {36207#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {36334#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:29:37,324 INFO L290 TraceCheckUtils]: 2: Hoare triple {36334#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {36207#true} is VALID [2022-02-20 22:29:37,324 INFO L290 TraceCheckUtils]: 3: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,324 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {36207#true} {36207#true} #3100#return; {36207#true} is VALID [2022-02-20 22:29:37,324 INFO L290 TraceCheckUtils]: 5: Hoare triple {36207#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {36207#true} is VALID [2022-02-20 22:29:37,325 INFO L272 TraceCheckUtils]: 6: Hoare triple {36207#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {36207#true} is VALID [2022-02-20 22:29:37,325 INFO L290 TraceCheckUtils]: 7: Hoare triple {36207#true} ~cond := #in~cond; {36207#true} is VALID [2022-02-20 22:29:37,325 INFO L290 TraceCheckUtils]: 8: Hoare triple {36207#true} assume !(0 == ~cond); {36207#true} is VALID [2022-02-20 22:29:37,325 INFO L290 TraceCheckUtils]: 9: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,325 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {36207#true} {36207#true} #3102#return; {36207#true} is VALID [2022-02-20 22:29:37,325 INFO L290 TraceCheckUtils]: 11: Hoare triple {36207#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {36207#true} is VALID [2022-02-20 22:29:37,325 INFO L290 TraceCheckUtils]: 12: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,326 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {36207#true} {36209#(= ~ldv_irq_1_1~0 0)} #3126#return; {36209#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:29:37,326 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 66 [2022-02-20 22:29:37,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:37,340 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:29:37,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:37,348 INFO L290 TraceCheckUtils]: 0: Hoare triple {36334#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {36207#true} is VALID [2022-02-20 22:29:37,348 INFO L290 TraceCheckUtils]: 1: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,349 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {36207#true} {36207#true} #3100#return; {36207#true} is VALID [2022-02-20 22:29:37,349 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:29:37,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:37,355 INFO L290 TraceCheckUtils]: 0: Hoare triple {36207#true} ~cond := #in~cond; {36207#true} is VALID [2022-02-20 22:29:37,355 INFO L290 TraceCheckUtils]: 1: Hoare triple {36207#true} assume !(0 == ~cond); {36207#true} is VALID [2022-02-20 22:29:37,355 INFO L290 TraceCheckUtils]: 2: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,355 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {36207#true} {36207#true} #3102#return; {36207#true} is VALID [2022-02-20 22:29:37,356 INFO L290 TraceCheckUtils]: 0: Hoare triple {36326#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {36207#true} is VALID [2022-02-20 22:29:37,356 INFO L272 TraceCheckUtils]: 1: Hoare triple {36207#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {36334#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:29:37,357 INFO L290 TraceCheckUtils]: 2: Hoare triple {36334#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {36207#true} is VALID [2022-02-20 22:29:37,357 INFO L290 TraceCheckUtils]: 3: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,357 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {36207#true} {36207#true} #3100#return; {36207#true} is VALID [2022-02-20 22:29:37,357 INFO L290 TraceCheckUtils]: 5: Hoare triple {36207#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {36207#true} is VALID [2022-02-20 22:29:37,357 INFO L272 TraceCheckUtils]: 6: Hoare triple {36207#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {36207#true} is VALID [2022-02-20 22:29:37,357 INFO L290 TraceCheckUtils]: 7: Hoare triple {36207#true} ~cond := #in~cond; {36207#true} is VALID [2022-02-20 22:29:37,357 INFO L290 TraceCheckUtils]: 8: Hoare triple {36207#true} assume !(0 == ~cond); {36207#true} is VALID [2022-02-20 22:29:37,357 INFO L290 TraceCheckUtils]: 9: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,358 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {36207#true} {36207#true} #3102#return; {36207#true} is VALID [2022-02-20 22:29:37,358 INFO L290 TraceCheckUtils]: 11: Hoare triple {36207#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {36207#true} is VALID [2022-02-20 22:29:37,358 INFO L290 TraceCheckUtils]: 12: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,359 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {36207#true} {36209#(= ~ldv_irq_1_1~0 0)} #3128#return; {36209#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:29:37,359 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 82 [2022-02-20 22:29:37,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:37,370 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:29:37,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:37,376 INFO L290 TraceCheckUtils]: 0: Hoare triple {36334#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {36207#true} is VALID [2022-02-20 22:29:37,377 INFO L290 TraceCheckUtils]: 1: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,377 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {36207#true} {36207#true} #3100#return; {36207#true} is VALID [2022-02-20 22:29:37,377 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:29:37,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:37,383 INFO L290 TraceCheckUtils]: 0: Hoare triple {36207#true} ~cond := #in~cond; {36207#true} is VALID [2022-02-20 22:29:37,383 INFO L290 TraceCheckUtils]: 1: Hoare triple {36207#true} assume !(0 == ~cond); {36207#true} is VALID [2022-02-20 22:29:37,383 INFO L290 TraceCheckUtils]: 2: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,383 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {36207#true} {36207#true} #3102#return; {36207#true} is VALID [2022-02-20 22:29:37,383 INFO L290 TraceCheckUtils]: 0: Hoare triple {36326#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {36207#true} is VALID [2022-02-20 22:29:37,384 INFO L272 TraceCheckUtils]: 1: Hoare triple {36207#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {36334#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:29:37,384 INFO L290 TraceCheckUtils]: 2: Hoare triple {36334#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {36207#true} is VALID [2022-02-20 22:29:37,384 INFO L290 TraceCheckUtils]: 3: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,385 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {36207#true} {36207#true} #3100#return; {36207#true} is VALID [2022-02-20 22:29:37,385 INFO L290 TraceCheckUtils]: 5: Hoare triple {36207#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {36207#true} is VALID [2022-02-20 22:29:37,385 INFO L272 TraceCheckUtils]: 6: Hoare triple {36207#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {36207#true} is VALID [2022-02-20 22:29:37,385 INFO L290 TraceCheckUtils]: 7: Hoare triple {36207#true} ~cond := #in~cond; {36207#true} is VALID [2022-02-20 22:29:37,385 INFO L290 TraceCheckUtils]: 8: Hoare triple {36207#true} assume !(0 == ~cond); {36207#true} is VALID [2022-02-20 22:29:37,385 INFO L290 TraceCheckUtils]: 9: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,385 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {36207#true} {36207#true} #3102#return; {36207#true} is VALID [2022-02-20 22:29:37,385 INFO L290 TraceCheckUtils]: 11: Hoare triple {36207#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {36207#true} is VALID [2022-02-20 22:29:37,386 INFO L290 TraceCheckUtils]: 12: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,392 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {36207#true} {36209#(= ~ldv_irq_1_1~0 0)} #3130#return; {36209#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:29:37,400 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 99 [2022-02-20 22:29:37,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:37,415 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:29:37,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:37,422 INFO L290 TraceCheckUtils]: 0: Hoare triple {36370#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr788 := 0; {36207#true} is VALID [2022-02-20 22:29:37,422 INFO L290 TraceCheckUtils]: 1: Hoare triple {36207#true} assume !(#t~loopctr788 % 18446744073709551616 < #amount % 18446744073709551616); {36207#true} is VALID [2022-02-20 22:29:37,422 INFO L290 TraceCheckUtils]: 2: Hoare triple {36207#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {36207#true} is VALID [2022-02-20 22:29:37,423 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {36207#true} {36207#true} #3454#return; {36207#true} is VALID [2022-02-20 22:29:37,423 INFO L290 TraceCheckUtils]: 0: Hoare triple {36370#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {36207#true} is VALID [2022-02-20 22:29:37,424 INFO L272 TraceCheckUtils]: 1: Hoare triple {36207#true} call #t~memset~res15.base, #t~memset~res15.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, ~n); {36370#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:29:37,424 INFO L290 TraceCheckUtils]: 2: Hoare triple {36370#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr788 := 0; {36207#true} is VALID [2022-02-20 22:29:37,424 INFO L290 TraceCheckUtils]: 3: Hoare triple {36207#true} assume !(#t~loopctr788 % 18446744073709551616 < #amount % 18446744073709551616); {36207#true} is VALID [2022-02-20 22:29:37,424 INFO L290 TraceCheckUtils]: 4: Hoare triple {36207#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {36207#true} is VALID [2022-02-20 22:29:37,424 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {36207#true} {36207#true} #3454#return; {36207#true} is VALID [2022-02-20 22:29:37,424 INFO L290 TraceCheckUtils]: 6: Hoare triple {36207#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res15.base, #t~memset~res15.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {36207#true} is VALID [2022-02-20 22:29:37,425 INFO L290 TraceCheckUtils]: 7: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,425 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {36207#true} {36209#(= ~ldv_irq_1_1~0 0)} #3132#return; {36209#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:29:37,426 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 110 [2022-02-20 22:29:37,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:37,436 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:29:37,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:37,444 INFO L290 TraceCheckUtils]: 0: Hoare triple {36370#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr788 := 0; {36207#true} is VALID [2022-02-20 22:29:37,444 INFO L290 TraceCheckUtils]: 1: Hoare triple {36207#true} assume !(#t~loopctr788 % 18446744073709551616 < #amount % 18446744073709551616); {36207#true} is VALID [2022-02-20 22:29:37,444 INFO L290 TraceCheckUtils]: 2: Hoare triple {36207#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {36207#true} is VALID [2022-02-20 22:29:37,445 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {36207#true} {36207#true} #3454#return; {36207#true} is VALID [2022-02-20 22:29:37,445 INFO L290 TraceCheckUtils]: 0: Hoare triple {36370#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {36207#true} is VALID [2022-02-20 22:29:37,446 INFO L272 TraceCheckUtils]: 1: Hoare triple {36207#true} call #t~memset~res15.base, #t~memset~res15.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, ~n); {36370#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:29:37,446 INFO L290 TraceCheckUtils]: 2: Hoare triple {36370#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr788 := 0; {36207#true} is VALID [2022-02-20 22:29:37,446 INFO L290 TraceCheckUtils]: 3: Hoare triple {36207#true} assume !(#t~loopctr788 % 18446744073709551616 < #amount % 18446744073709551616); {36207#true} is VALID [2022-02-20 22:29:37,446 INFO L290 TraceCheckUtils]: 4: Hoare triple {36207#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {36207#true} is VALID [2022-02-20 22:29:37,446 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {36207#true} {36207#true} #3454#return; {36207#true} is VALID [2022-02-20 22:29:37,447 INFO L290 TraceCheckUtils]: 6: Hoare triple {36207#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res15.base, #t~memset~res15.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {36207#true} is VALID [2022-02-20 22:29:37,447 INFO L290 TraceCheckUtils]: 7: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,448 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {36207#true} {36209#(= ~ldv_irq_1_1~0 0)} #3134#return; {36209#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:29:37,448 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 133 [2022-02-20 22:29:37,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:37,454 INFO L290 TraceCheckUtils]: 0: Hoare triple {36207#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3008 + ~dev.offset; {36207#true} is VALID [2022-02-20 22:29:37,454 INFO L290 TraceCheckUtils]: 1: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,454 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {36207#true} {36208#false} #2898#return; {36208#false} is VALID [2022-02-20 22:29:37,459 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 138 [2022-02-20 22:29:37,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:37,465 INFO L290 TraceCheckUtils]: 0: Hoare triple {36379#(= ~ldv_spin~0 |old(~ldv_spin~0)|)} ~ldv_spin~0 := 1; {36207#true} is VALID [2022-02-20 22:29:37,466 INFO L290 TraceCheckUtils]: 1: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,466 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {36207#true} {36208#false} #2900#return; {36208#false} is VALID [2022-02-20 22:29:37,466 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 146 [2022-02-20 22:29:37,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:37,475 INFO L290 TraceCheckUtils]: 0: Hoare triple {36207#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~2;#res := ~ret~2; {36207#true} is VALID [2022-02-20 22:29:37,475 INFO L290 TraceCheckUtils]: 1: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,476 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {36207#true} {36208#false} #2902#return; {36208#false} is VALID [2022-02-20 22:29:37,476 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 154 [2022-02-20 22:29:37,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:29:37,482 INFO L290 TraceCheckUtils]: 0: Hoare triple {36207#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3008 + ~dev.offset; {36207#true} is VALID [2022-02-20 22:29:37,482 INFO L290 TraceCheckUtils]: 1: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,482 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {36207#true} {36208#false} #2904#return; {36208#false} is VALID [2022-02-20 22:29:37,482 INFO L290 TraceCheckUtils]: 0: Hoare triple {36207#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(99, 2);call #Ultimate.allocInit(16, 3);call #Ultimate.allocInit(8, 4);call #Ultimate.allocInit(21, 5);call #Ultimate.allocInit(37, 6);call #Ultimate.allocInit(69, 7);call #Ultimate.allocInit(69, 8);call #Ultimate.allocInit(43, 9);call #Ultimate.allocInit(43, 10);call #Ultimate.allocInit(52, 11);call #Ultimate.allocInit(52, 12);call #Ultimate.allocInit(32, 13);call #Ultimate.allocInit(48, 14);call #Ultimate.allocInit(55, 15);call #Ultimate.allocInit(64, 16);call #Ultimate.allocInit(61, 17);call #Ultimate.allocInit(16, 18);call #Ultimate.allocInit(7, 19);call write~init~int(32, 19, 0, 1);call write~init~int(37, 19, 1, 1);call write~init~int(56, 19, 2, 1);call write~init~int(46, 19, 3, 1);call write~init~int(56, 19, 4, 1);call write~init~int(120, 19, 5, 1);call write~init~int(0, 19, 6, 1);call #Ultimate.allocInit(2, 20);call write~init~int(10, 20, 0, 1);call write~init~int(0, 20, 1, 1);call #Ultimate.allocInit(16, 21);call #Ultimate.allocInit(7, 22);call write~init~int(32, 22, 0, 1);call write~init~int(37, 22, 1, 1);call write~init~int(52, 22, 2, 1);call write~init~int(46, 22, 3, 1);call write~init~int(52, 22, 4, 1);call write~init~int(120, 22, 5, 1);call write~init~int(0, 22, 6, 1);call #Ultimate.allocInit(2, 23);call write~init~int(10, 23, 0, 1);call write~init~int(0, 23, 1, 1);call #Ultimate.allocInit(46, 24);call #Ultimate.allocInit(52, 25);call #Ultimate.allocInit(39, 26);call #Ultimate.allocInit(50, 27);call #Ultimate.allocInit(40, 28);call #Ultimate.allocInit(43, 29);call #Ultimate.allocInit(35, 30);call #Ultimate.allocInit(91, 31);call #Ultimate.allocInit(41, 32);call #Ultimate.allocInit(68, 33);call #Ultimate.allocInit(37, 34);call #Ultimate.allocInit(54, 35);call #Ultimate.allocInit(86, 36);call #Ultimate.allocInit(40, 37);call #Ultimate.allocInit(71, 38);call #Ultimate.allocInit(51, 39);call #Ultimate.allocInit(8, 40);call #Ultimate.allocInit(4, 41);call write~init~int(50, 41, 0, 1);call write~init~int(46, 41, 1, 1);call write~init~int(49, 41, 2, 1);call write~init~int(0, 41, 3, 1);call #Ultimate.allocInit(28, 42);call #Ultimate.allocInit(8, 43);call #Ultimate.allocInit(8, 44);~ldv_irq_1_3~0 := 0;~ldv_irq_data_1_1~0.base, ~ldv_irq_data_1_1~0.offset := 0, 0;~pci_counter~0 := 0;~ldv_irq_1_0~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_irq_data_1_0~0.base, ~ldv_irq_data_1_0~0.offset := 0, 0;~ethtool_ops_no_mii_group0~0.base, ~ethtool_ops_no_mii_group0~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_irq_data_1_3~0.base, ~ldv_irq_data_1_3~0.offset := 0, 0;~ethtool_ops_group1~0.base, ~ethtool_ops_group1~0.offset := 0, 0;~ldv_irq_data_1_2~0.base, ~ldv_irq_data_1_2~0.offset := 0, 0;~hamachi_netdev_ops_group1~0.base, ~hamachi_netdev_ops_group1~0.offset := 0, 0;~ldv_irq_1_2~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ethtool_ops_group0~0.base, ~ethtool_ops_group0~0.offset := 0, 0;~ldv_irq_1_1~0 := 0;~ldv_timer_state_2~0 := 0;~ldv_irq_line_1_3~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_irq_line_1_0~0 := 0;~ldv_timer_list_2~0.base, ~ldv_timer_list_2~0.offset := 0, 0;~hamachi_driver_group1~0.base, ~hamachi_driver_group1~0.offset := 0, 0;~ref_cnt~0 := 0;~ldv_irq_line_1_1~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_irq_line_1_2~0 := 0;~ldv_state_variable_4~0 := 0;~debug~0 := 1;~max_interrupt_work~0 := 40;~mtu~0 := 0;~max_rx_latency~0 := 17;~max_rx_gap~0 := 5;~min_rx_pkt~0 := 24;~max_tx_latency~0 := 0;~max_tx_gap~0 := 0;~min_tx_pkt~0 := 48;~rx_copybreak~0 := 0;~force32~0 := 0;~#options~0.base, ~#options~0.offset := 45, 0;call #Ultimate.allocInit(32, 45);call write~init~int(-1, ~#options~0.base, ~#options~0.offset, 4);call write~init~int(-1, ~#options~0.base, 4 + ~#options~0.offset, 4);call write~init~int(-1, ~#options~0.base, 8 + ~#options~0.offset, 4);call write~init~int(-1, ~#options~0.base, 12 + ~#options~0.offset, 4);call write~init~int(-1, ~#options~0.base, 16 + ~#options~0.offset, 4);call write~init~int(-1, ~#options~0.base, 20 + ~#options~0.offset, 4);call write~init~int(-1, ~#options~0.base, 24 + ~#options~0.offset, 4);call write~init~int(-1, ~#options~0.base, 28 + ~#options~0.offset, 4);~#full_duplex~0.base, ~#full_duplex~0.offset := 46, 0;call #Ultimate.allocInit(32, 46);call write~init~int(-1, ~#full_duplex~0.base, ~#full_duplex~0.offset, 4);call write~init~int(-1, ~#full_duplex~0.base, 4 + ~#full_duplex~0.offset, 4);call write~init~int(-1, ~#full_duplex~0.base, 8 + ~#full_duplex~0.offset, 4);call write~init~int(-1, ~#full_duplex~0.base, 12 + ~#full_duplex~0.offset, 4);call write~init~int(-1, ~#full_duplex~0.base, 16 + ~#full_duplex~0.offset, 4);call write~init~int(-1, ~#full_duplex~0.base, 20 + ~#full_duplex~0.offset, 4);call write~init~int(-1, ~#full_duplex~0.base, 24 + ~#full_duplex~0.offset, 4);call write~init~int(-1, ~#full_duplex~0.base, 28 + ~#full_duplex~0.offset, 4);~#rx_params~0.base, ~#rx_params~0.offset := 47, 0;call #Ultimate.allocInit(32, 47);call write~init~int(-1, ~#rx_params~0.base, ~#rx_params~0.offset, 4);call write~init~int(-1, ~#rx_params~0.base, 4 + ~#rx_params~0.offset, 4);call write~init~int(-1, ~#rx_params~0.base, 8 + ~#rx_params~0.offset, 4);call write~init~int(-1, ~#rx_params~0.base, 12 + ~#rx_params~0.offset, 4);call write~init~int(-1, ~#rx_params~0.base, 16 + ~#rx_params~0.offset, 4);call write~init~int(-1, ~#rx_params~0.base, 20 + ~#rx_params~0.offset, 4);call write~init~int(-1, ~#rx_params~0.base, 24 + ~#rx_params~0.offset, 4);call write~init~int(-1, ~#rx_params~0.base, 28 + ~#rx_params~0.offset, 4);~#tx_params~0.base, ~#tx_params~0.offset := 48, 0;call #Ultimate.allocInit(32, 48);call write~init~int(-1, ~#tx_params~0.base, ~#tx_params~0.offset, 4);call write~init~int(-1, ~#tx_params~0.base, 4 + ~#tx_params~0.offset, 4);call write~init~int(-1, ~#tx_params~0.base, 8 + ~#tx_params~0.offset, 4);call write~init~int(-1, ~#tx_params~0.base, 12 + ~#tx_params~0.offset, 4);call write~init~int(-1, ~#tx_params~0.base, 16 + ~#tx_params~0.offset, 4);call write~init~int(-1, ~#tx_params~0.base, 20 + ~#tx_params~0.offset, 4);call write~init~int(-1, ~#tx_params~0.base, 24 + ~#tx_params~0.offset, 4);call write~init~int(-1, ~#tx_params~0.base, 28 + ~#tx_params~0.offset, 4);~#version~0.base, ~#version~0.offset := 49, 0;call #Ultimate.allocInit(187, 49);call write~init~int(14, ~#version~0.base, ~#version~0.offset, 1);call write~init~int(104, ~#version~0.base, 1 + ~#version~0.offset, 1);call write~init~int(97, ~#version~0.base, 2 + ~#version~0.offset, 1);call write~init~int(109, ~#version~0.base, 3 + ~#version~0.offset, 1);call write~init~int(97, ~#version~0.base, 4 + ~#version~0.offset, 1);call write~init~int(99, ~#version~0.base, 5 + ~#version~0.offset, 1);call write~init~int(104, ~#version~0.base, 6 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 7 + ~#version~0.offset, 1);call write~init~int(46, ~#version~0.base, 8 + ~#version~0.offset, 1);call write~init~int(99, ~#version~0.base, 9 + ~#version~0.offset, 1);call write~init~int(58, ~#version~0.base, 10 + ~#version~0.offset, 1);call write~init~int(118, ~#version~0.base, 11 + ~#version~0.offset, 1);call write~init~int(50, ~#version~0.base, 12 + ~#version~0.offset, 1);call write~init~int(46, ~#version~0.base, 13 + ~#version~0.offset, 1);call write~init~int(49, ~#version~0.base, 14 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 15 + ~#version~0.offset, 1);call write~init~int(83, ~#version~0.base, 16 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 17 + ~#version~0.offset, 1);call write~init~int(112, ~#version~0.base, 18 + ~#version~0.offset, 1);call write~init~int(116, ~#version~0.base, 19 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 20 + ~#version~0.offset, 1);call write~init~int(49, ~#version~0.base, 21 + ~#version~0.offset, 1);call write~init~int(49, ~#version~0.base, 22 + ~#version~0.offset, 1);call write~init~int(44, ~#version~0.base, 23 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 24 + ~#version~0.offset, 1);call write~init~int(50, ~#version~0.base, 25 + ~#version~0.offset, 1);call write~init~int(48, ~#version~0.base, 26 + ~#version~0.offset, 1);call write~init~int(48, ~#version~0.base, 27 + ~#version~0.offset, 1);call write~init~int(54, ~#version~0.base, 28 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 29 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 30 + ~#version~0.offset, 1);call write~init~int(87, ~#version~0.base, 31 + ~#version~0.offset, 1);call write~init~int(114, ~#version~0.base, 32 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 33 + ~#version~0.offset, 1);call write~init~int(116, ~#version~0.base, 34 + ~#version~0.offset, 1);call write~init~int(116, ~#version~0.base, 35 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 36 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 37 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 38 + ~#version~0.offset, 1);call write~init~int(98, ~#version~0.base, 39 + ~#version~0.offset, 1);call write~init~int(121, ~#version~0.base, 40 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 41 + ~#version~0.offset, 1);call write~init~int(68, ~#version~0.base, 42 + ~#version~0.offset, 1);call write~init~int(111, ~#version~0.base, 43 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 44 + ~#version~0.offset, 1);call write~init~int(97, ~#version~0.base, 45 + ~#version~0.offset, 1);call write~init~int(108, ~#version~0.base, 46 + ~#version~0.offset, 1);call write~init~int(100, ~#version~0.base, 47 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 48 + ~#version~0.offset, 1);call write~init~int(66, ~#version~0.base, 49 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 50 + ~#version~0.offset, 1);call write~init~int(99, ~#version~0.base, 51 + ~#version~0.offset, 1);call write~init~int(107, ~#version~0.base, 52 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 53 + ~#version~0.offset, 1);call write~init~int(114, ~#version~0.base, 54 + ~#version~0.offset, 1);call write~init~int(10, ~#version~0.base, 55 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 56 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 57 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 58 + ~#version~0.offset, 1);call write~init~int(83, ~#version~0.base, 59 + ~#version~0.offset, 1);call write~init~int(111, ~#version~0.base, 60 + ~#version~0.offset, 1);call write~init~int(109, ~#version~0.base, 61 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 62 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 63 + ~#version~0.offset, 1);call write~init~int(109, ~#version~0.base, 64 + ~#version~0.offset, 1);call write~init~int(111, ~#version~0.base, 65 + ~#version~0.offset, 1);call write~init~int(100, ~#version~0.base, 66 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 67 + ~#version~0.offset, 1);call write~init~int(102, ~#version~0.base, 68 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 69 + ~#version~0.offset, 1);call write~init~int(99, ~#version~0.base, 70 + ~#version~0.offset, 1);call write~init~int(97, ~#version~0.base, 71 + ~#version~0.offset, 1);call write~init~int(116, ~#version~0.base, 72 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 73 + ~#version~0.offset, 1);call write~init~int(111, ~#version~0.base, 74 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 75 + ~#version~0.offset, 1);call write~init~int(115, ~#version~0.base, 76 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 77 + ~#version~0.offset, 1);call write~init~int(98, ~#version~0.base, 78 + ~#version~0.offset, 1);call write~init~int(121, ~#version~0.base, 79 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 80 + ~#version~0.offset, 1);call write~init~int(69, ~#version~0.base, 81 + ~#version~0.offset, 1);call write~init~int(114, ~#version~0.base, 82 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 83 + ~#version~0.offset, 1);call write~init~int(99, ~#version~0.base, 84 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 85 + ~#version~0.offset, 1);call write~init~int(107, ~#version~0.base, 86 + ~#version~0.offset, 1);call write~init~int(97, ~#version~0.base, 87 + ~#version~0.offset, 1);call write~init~int(115, ~#version~0.base, 88 + ~#version~0.offset, 1);call write~init~int(116, ~#version~0.base, 89 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 90 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 91 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 92 + ~#version~0.offset, 1);call write~init~int(60, ~#version~0.base, 93 + ~#version~0.offset, 1);call write~init~int(107, ~#version~0.base, 94 + ~#version~0.offset, 1);call write~init~int(97, ~#version~0.base, 95 + ~#version~0.offset, 1);call write~init~int(115, ~#version~0.base, 96 + ~#version~0.offset, 1);call write~init~int(116, ~#version~0.base, 97 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 98 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 99 + ~#version~0.offset, 1);call write~init~int(64, ~#version~0.base, 100 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 101 + ~#version~0.offset, 1);call write~init~int(115, ~#version~0.base, 102 + ~#version~0.offset, 1);call write~init~int(99, ~#version~0.base, 103 + ~#version~0.offset, 1);call write~init~int(108, ~#version~0.base, 104 + ~#version~0.offset, 1);call write~init~int(46, ~#version~0.base, 105 + ~#version~0.offset, 1);call write~init~int(109, ~#version~0.base, 106 + ~#version~0.offset, 1);call write~init~int(115, ~#version~0.base, 107 + ~#version~0.offset, 1);call write~init~int(117, ~#version~0.base, 108 + ~#version~0.offset, 1);call write~init~int(46, ~#version~0.base, 109 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 110 + ~#version~0.offset, 1);call write~init~int(100, ~#version~0.base, 111 + ~#version~0.offset, 1);call write~init~int(117, ~#version~0.base, 112 + ~#version~0.offset, 1);call write~init~int(62, ~#version~0.base, 113 + ~#version~0.offset, 1);call write~init~int(10, ~#version~0.base, 114 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 115 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 116 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 117 + ~#version~0.offset, 1);call write~init~int(70, ~#version~0.base, 118 + ~#version~0.offset, 1);call write~init~int(117, ~#version~0.base, 119 + ~#version~0.offset, 1);call write~init~int(114, ~#version~0.base, 120 + ~#version~0.offset, 1);call write~init~int(116, ~#version~0.base, 121 + ~#version~0.offset, 1);call write~init~int(104, ~#version~0.base, 122 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 123 + ~#version~0.offset, 1);call write~init~int(114, ~#version~0.base, 124 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 125 + ~#version~0.offset, 1);call write~init~int(109, ~#version~0.base, 126 + ~#version~0.offset, 1);call write~init~int(111, ~#version~0.base, 127 + ~#version~0.offset, 1);call write~init~int(100, ~#version~0.base, 128 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 129 + ~#version~0.offset, 1);call write~init~int(102, ~#version~0.base, 130 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 131 + ~#version~0.offset, 1);call write~init~int(99, ~#version~0.base, 132 + ~#version~0.offset, 1);call write~init~int(97, ~#version~0.base, 133 + ~#version~0.offset, 1);call write~init~int(116, ~#version~0.base, 134 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 135 + ~#version~0.offset, 1);call write~init~int(111, ~#version~0.base, 136 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 137 + ~#version~0.offset, 1);call write~init~int(115, ~#version~0.base, 138 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 139 + ~#version~0.offset, 1);call write~init~int(98, ~#version~0.base, 140 + ~#version~0.offset, 1);call write~init~int(121, ~#version~0.base, 141 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 142 + ~#version~0.offset, 1);call write~init~int(75, ~#version~0.base, 143 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 144 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 145 + ~#version~0.offset, 1);call write~init~int(116, ~#version~0.base, 146 + ~#version~0.offset, 1);call write~init~int(104, ~#version~0.base, 147 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 148 + ~#version~0.offset, 1);call write~init~int(85, ~#version~0.base, 149 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 150 + ~#version~0.offset, 1);call write~init~int(100, ~#version~0.base, 151 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 152 + ~#version~0.offset, 1);call write~init~int(114, ~#version~0.base, 153 + ~#version~0.offset, 1);call write~init~int(119, ~#version~0.base, 154 + ~#version~0.offset, 1);call write~init~int(111, ~#version~0.base, 155 + ~#version~0.offset, 1);call write~init~int(111, ~#version~0.base, 156 + ~#version~0.offset, 1);call write~init~int(100, ~#version~0.base, 157 + ~#version~0.offset, 1);call write~init~int(32, ~#version~0.base, 158 + ~#version~0.offset, 1);call write~init~int(60, ~#version~0.base, 159 + ~#version~0.offset, 1);call write~init~int(107, ~#version~0.base, 160 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 161 + ~#version~0.offset, 1);call write~init~int(105, ~#version~0.base, 162 + ~#version~0.offset, 1);call write~init~int(116, ~#version~0.base, 163 + ~#version~0.offset, 1);call write~init~int(104, ~#version~0.base, 164 + ~#version~0.offset, 1);call write~init~int(117, ~#version~0.base, 165 + ~#version~0.offset, 1);call write~init~int(64, ~#version~0.base, 166 + ~#version~0.offset, 1);call write~init~int(112, ~#version~0.base, 167 + ~#version~0.offset, 1);call write~init~int(97, ~#version~0.base, 168 + ~#version~0.offset, 1);call write~init~int(114, ~#version~0.base, 169 + ~#version~0.offset, 1);call write~init~int(108, ~#version~0.base, 170 + ~#version~0.offset, 1);call write~init~int(46, ~#version~0.base, 171 + ~#version~0.offset, 1);call write~init~int(99, ~#version~0.base, 172 + ~#version~0.offset, 1);call write~init~int(108, ~#version~0.base, 173 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 174 + ~#version~0.offset, 1);call write~init~int(109, ~#version~0.base, 175 + ~#version~0.offset, 1);call write~init~int(115, ~#version~0.base, 176 + ~#version~0.offset, 1);call write~init~int(111, ~#version~0.base, 177 + ~#version~0.offset, 1);call write~init~int(110, ~#version~0.base, 178 + ~#version~0.offset, 1);call write~init~int(46, ~#version~0.base, 179 + ~#version~0.offset, 1);call write~init~int(101, ~#version~0.base, 180 + ~#version~0.offset, 1);call write~init~int(100, ~#version~0.base, 181 + ~#version~0.offset, 1);call write~init~int(117, ~#version~0.base, 182 + ~#version~0.offset, 1);call write~init~int(62, ~#version~0.base, 183 + ~#version~0.offset, 1);call write~init~int(10, ~#version~0.base, 184 + ~#version~0.offset, 1);call write~init~int(0, ~#version~0.base, 185 + ~#version~0.offset, 1);call write~init~int(0, ~#version~0.base, 186 + ~#version~0.offset, 1);~#chip_tbl~0.base, ~#chip_tbl~0.offset := 50, 0;call #Ultimate.allocInit(56, 50);call write~init~int(4888, ~#chip_tbl~0.base, ~#chip_tbl~0.offset, 2);call write~init~int(2321, ~#chip_tbl~0.base, 2 + ~#chip_tbl~0.offset, 2);call write~init~int(65535, ~#chip_tbl~0.base, 4 + ~#chip_tbl~0.offset, 2);call write~init~int(0, ~#chip_tbl~0.base, 6 + ~#chip_tbl~0.offset, 2);call write~init~$Pointer$(3, 0, ~#chip_tbl~0.base, 8 + ~#chip_tbl~0.offset, 8);call write~init~$Pointer$(#funAddr~hamachi_timer.base, #funAddr~hamachi_timer.offset, ~#chip_tbl~0.base, 16 + ~#chip_tbl~0.offset, 8);call write~init~int(0, ~#chip_tbl~0.base, 24 + ~#chip_tbl~0.offset, 4);call write~init~int(0, ~#chip_tbl~0.base, 28 + ~#chip_tbl~0.offset, 2);call write~init~int(0, ~#chip_tbl~0.base, 30 + ~#chip_tbl~0.offset, 2);call write~init~int(0, ~#chip_tbl~0.base, 32 + ~#chip_tbl~0.offset, 2);call write~init~int(0, ~#chip_tbl~0.base, 34 + ~#chip_tbl~0.offset, 2);call write~init~$Pointer$(0, 0, ~#chip_tbl~0.base, 36 + ~#chip_tbl~0.offset, 8);call write~init~$Pointer$(0, 0, ~#chip_tbl~0.base, 44 + ~#chip_tbl~0.offset, 8);call write~init~int(0, ~#chip_tbl~0.base, 52 + ~#chip_tbl~0.offset, 4);~#hamachi_netdev_ops~0.base, ~#hamachi_netdev_ops~0.offset := 51, 0;call #Ultimate.allocInit(528, 51);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 8 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hamachi_open.base, #funAddr~hamachi_open.offset, ~#hamachi_netdev_ops~0.base, 16 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hamachi_close.base, #funAddr~hamachi_close.offset, ~#hamachi_netdev_ops~0.base, 24 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hamachi_start_xmit.base, #funAddr~hamachi_start_xmit.offset, ~#hamachi_netdev_ops~0.base, 32 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 40 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 48 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~set_rx_mode.base, #funAddr~set_rx_mode.offset, ~#hamachi_netdev_ops~0.base, 56 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_mac_addr.base, #funAddr~eth_mac_addr.offset, ~#hamachi_netdev_ops~0.base, 64 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_validate_addr.base, #funAddr~eth_validate_addr.offset, ~#hamachi_netdev_ops~0.base, 72 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~netdev_ioctl.base, #funAddr~netdev_ioctl.offset, ~#hamachi_netdev_ops~0.base, 80 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 88 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_change_mtu.base, #funAddr~eth_change_mtu.offset, ~#hamachi_netdev_ops~0.base, 96 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 104 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hamachi_tx_timeout.base, #funAddr~hamachi_tx_timeout.offset, ~#hamachi_netdev_ops~0.base, 112 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 120 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hamachi_get_stats.base, #funAddr~hamachi_get_stats.offset, ~#hamachi_netdev_ops~0.base, 128 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 136 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 144 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 152 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 160 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 168 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 176 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 184 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 192 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 200 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 208 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 216 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 224 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 232 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 240 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 248 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 256 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 264 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 272 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 280 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 288 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 296 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 304 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 312 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 320 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 328 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 336 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 344 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 352 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 360 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 368 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 376 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 384 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 392 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 400 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 408 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 416 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 424 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 432 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 440 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 448 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 456 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 464 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 472 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 480 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 488 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 496 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 504 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 512 + ~#hamachi_netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_netdev_ops~0.base, 520 + ~#hamachi_netdev_ops~0.offset, 8);~#ethtool_ops~0.base, ~#ethtool_ops~0.offset := 52, 0;call #Ultimate.allocInit(392, 52);call write~init~$Pointer$(#funAddr~hamachi_get_settings.base, #funAddr~hamachi_get_settings.offset, ~#ethtool_ops~0.base, ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hamachi_set_settings.base, #funAddr~hamachi_set_settings.offset, ~#ethtool_ops~0.base, 8 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hamachi_get_drvinfo.base, #funAddr~hamachi_get_drvinfo.offset, ~#ethtool_ops~0.base, 16 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 24 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 32 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 40 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 48 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 56 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 64 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hamachi_nway_reset.base, #funAddr~hamachi_nway_reset.offset, ~#ethtool_ops~0.base, 72 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~hamachi_get_link.base, #funAddr~hamachi_get_link.offset, ~#ethtool_ops~0.base, 80 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 88 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 96 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 104 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 112 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 120 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 128 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 136 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 144 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 152 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 160 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 168 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 176 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 184 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~check_if_running.base, #funAddr~check_if_running.offset, ~#ethtool_ops~0.base, 192 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 200 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 208 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 216 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 224 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 232 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 240 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 248 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 256 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 264 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 272 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 280 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 288 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 296 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 304 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 312 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 320 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 328 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 336 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 344 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 352 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 360 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 368 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 376 + ~#ethtool_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops~0.base, 384 + ~#ethtool_ops~0.offset, 8);~#ethtool_ops_no_mii~0.base, ~#ethtool_ops_no_mii~0.offset := 53, 0;call #Ultimate.allocInit(392, 53);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 8 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(#funAddr~hamachi_get_drvinfo.base, #funAddr~hamachi_get_drvinfo.offset, ~#ethtool_ops_no_mii~0.base, 16 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 24 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 32 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 40 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 48 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 56 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 64 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 72 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 80 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 88 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 96 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 104 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 112 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 120 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 128 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 136 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 144 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 152 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 160 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 168 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 176 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 184 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(#funAddr~check_if_running.base, #funAddr~check_if_running.offset, ~#ethtool_ops_no_mii~0.base, 192 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 200 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 208 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 216 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 224 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 232 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 240 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 248 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 256 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 264 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 272 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 280 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 288 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 296 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 304 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 312 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 320 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 328 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 336 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 344 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 352 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 360 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 368 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 376 + ~#ethtool_ops_no_mii~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ethtool_ops_no_mii~0.base, 384 + ~#ethtool_ops_no_mii~0.offset, 8);~#hamachi_pci_tbl~0.base, ~#hamachi_pci_tbl~0.offset := 54, 0;call #Ultimate.allocInit(64, 54);call write~init~int(4888, ~#hamachi_pci_tbl~0.base, ~#hamachi_pci_tbl~0.offset, 4);call write~init~int(2321, ~#hamachi_pci_tbl~0.base, 4 + ~#hamachi_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#hamachi_pci_tbl~0.base, 8 + ~#hamachi_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#hamachi_pci_tbl~0.base, 12 + ~#hamachi_pci_tbl~0.offset, 4);call write~init~int(0, ~#hamachi_pci_tbl~0.base, 16 + ~#hamachi_pci_tbl~0.offset, 4);call write~init~int(0, ~#hamachi_pci_tbl~0.base, 20 + ~#hamachi_pci_tbl~0.offset, 4);call write~init~int(0, ~#hamachi_pci_tbl~0.base, 24 + ~#hamachi_pci_tbl~0.offset, 8);call write~init~int(0, ~#hamachi_pci_tbl~0.base, 32 + ~#hamachi_pci_tbl~0.offset, 4);call write~init~int(0, ~#hamachi_pci_tbl~0.base, 36 + ~#hamachi_pci_tbl~0.offset, 4);call write~init~int(0, ~#hamachi_pci_tbl~0.base, 40 + ~#hamachi_pci_tbl~0.offset, 4);call write~init~int(0, ~#hamachi_pci_tbl~0.base, 44 + ~#hamachi_pci_tbl~0.offset, 4);call write~init~int(0, ~#hamachi_pci_tbl~0.base, 48 + ~#hamachi_pci_tbl~0.offset, 4);call write~init~int(0, ~#hamachi_pci_tbl~0.base, 52 + ~#hamachi_pci_tbl~0.offset, 4);call write~init~int(0, ~#hamachi_pci_tbl~0.base, 56 + ~#hamachi_pci_tbl~0.offset, 8);~__mod_pci__hamachi_pci_tbl_device_table~0.vendor := ~__mod_pci__hamachi_pci_tbl_device_table~0.vendor[0 := 0];~__mod_pci__hamachi_pci_tbl_device_table~0.device := ~__mod_pci__hamachi_pci_tbl_device_table~0.device[0 := 0];~__mod_pci__hamachi_pci_tbl_device_table~0.subvendor := ~__mod_pci__hamachi_pci_tbl_device_table~0.subvendor[0 := 0];~__mod_pci__hamachi_pci_tbl_device_table~0.subdevice := ~__mod_pci__hamachi_pci_tbl_device_table~0.subdevice[0 := 0];~__mod_pci__hamachi_pci_tbl_device_table~0.class := ~__mod_pci__hamachi_pci_tbl_device_table~0.class[0 := 0];~__mod_pci__hamachi_pci_tbl_device_table~0.class_mask := ~__mod_pci__hamachi_pci_tbl_device_table~0.class_mask[0 := 0];~__mod_pci__hamachi_pci_tbl_device_table~0.driver_data := ~__mod_pci__hamachi_pci_tbl_device_table~0.driver_data[0 := 0];~__mod_pci__hamachi_pci_tbl_device_table~0.vendor := ~__mod_pci__hamachi_pci_tbl_device_table~0.vendor[1 := 0];~__mod_pci__hamachi_pci_tbl_device_table~0.device := ~__mod_pci__hamachi_pci_tbl_device_table~0.device[1 := 0];~__mod_pci__hamachi_pci_tbl_device_table~0.subvendor := ~__mod_pci__hamachi_pci_tbl_device_table~0.subvendor[1 := 0];~__mod_pci__hamachi_pci_tbl_device_table~0.subdevice := ~__mod_pci__hamachi_pci_tbl_device_table~0.subdevice[1 := 0];~__mod_pci__hamachi_pci_tbl_device_table~0.class := ~__mod_pci__hamachi_pci_tbl_device_table~0.class[1 := 0];~__mod_pci__hamachi_pci_tbl_device_table~0.class_mask := ~__mod_pci__hamachi_pci_tbl_device_table~0.class_mask[1 := 0];~__mod_pci__hamachi_pci_tbl_device_table~0.driver_data := ~__mod_pci__hamachi_pci_tbl_device_table~0.driver_data[1 := 0];~#hamachi_driver~0.base, ~#hamachi_driver~0.offset := 55, 0;call #Ultimate.allocInit(305, 55);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 8 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(43, 0, ~#hamachi_driver~0.base, 16 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(~#hamachi_pci_tbl~0.base, ~#hamachi_pci_tbl~0.offset, ~#hamachi_driver~0.base, 24 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~hamachi_init_one.base, #funAddr~hamachi_init_one.offset, ~#hamachi_driver~0.base, 32 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~hamachi_remove_one.base, #funAddr~hamachi_remove_one.offset, ~#hamachi_driver~0.base, 40 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 48 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 56 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 64 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 72 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 80 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 88 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 96 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 104 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 112 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 120 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 128 + ~#hamachi_driver~0.offset, 8);call write~init~int(0, ~#hamachi_driver~0.base, 136 + ~#hamachi_driver~0.offset, 1);call write~init~int(0, ~#hamachi_driver~0.base, 137 + ~#hamachi_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 141 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 149 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 157 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 165 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 173 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 181 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 189 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 197 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 205 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 213 + ~#hamachi_driver~0.offset, 8);call write~init~int(0, ~#hamachi_driver~0.base, 221 + ~#hamachi_driver~0.offset, 4);call write~init~int(0, ~#hamachi_driver~0.base, 225 + ~#hamachi_driver~0.offset, 4);call write~init~int(0, ~#hamachi_driver~0.base, 229 + ~#hamachi_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 233 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 241 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 249 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 257 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 265 + ~#hamachi_driver~0.offset, 8);call write~init~int(0, ~#hamachi_driver~0.base, 273 + ~#hamachi_driver~0.offset, 4);call write~init~int(0, ~#hamachi_driver~0.base, 277 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 289 + ~#hamachi_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hamachi_driver~0.base, 297 + ~#hamachi_driver~0.offset, 8);~ldv_retval_2~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~ldv_spin~0 := 0; {36209#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:29:37,499 INFO L290 TraceCheckUtils]: 1: Hoare triple {36209#(= ~ldv_irq_1_1~0 0)} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret686#1.base, main_#t~ret686#1.offset, main_#t~ret687#1.base, main_#t~ret687#1.offset, main_#t~ret688#1.base, main_#t~ret688#1.offset, main_#t~ret689#1.base, main_#t~ret689#1.offset, main_#t~ret690#1.base, main_#t~ret690#1.offset, main_#t~ret691#1.base, main_#t~ret691#1.offset, main_#t~ret692#1.base, main_#t~ret692#1.offset, main_#t~ret693#1.base, main_#t~ret693#1.offset, main_#t~nondet694#1, main_#t~switch695#1, main_#t~nondet696#1, main_#t~switch697#1, main_#t~ret698#1, main_#t~ret699#1, main_#t~ret700#1, main_#t~ret701#1, main_#t~mem702#1, main_#t~ret703#1, main_#t~mem704#1, main_#t~ret705#1, main_#t~mem706#1, main_#t~ret707#1, main_#t~ret708#1.base, main_#t~ret708#1.offset, main_#t~ret709#1.base, main_#t~ret709#1.offset, main_#t~ret710#1.base, main_#t~ret710#1.offset, main_#t~mem711#1, main_#t~ret712#1, main_#t~mem713#1, main_#t~ret714#1, main_#t~ret715#1, main_#t~ret716#1, main_#t~ret717#1, main_#t~ret718#1, main_#t~ret719#1, main_#t~ret720#1, main_#t~ret721#1, main_#t~nondet722#1, main_#t~switch723#1, main_#t~ret724#1, main_#t~nondet725#1, main_#t~switch726#1, main_#t~ret727#1, main_#t~nondet728#1, main_#t~switch729#1, main_#t~ret730#1, main_#t~ret731#1, main_#t~nondet732#1, main_#t~switch733#1, main_#t~ret734#1, main_#t~ret735#1, main_#t~ret736#1, main_#t~ret737#1, main_#t~ret738#1, main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset, main_~tmp~57#1.base, main_~tmp~57#1.offset, main_~ldvarg4~0#1.base, main_~ldvarg4~0#1.offset, main_~tmp___0~28#1.base, main_~tmp___0~28#1.offset, main_~#ldvarg3~0#1.base, main_~#ldvarg3~0#1.offset, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp___1~18#1.base, main_~tmp___1~18#1.offset, main_~#ldvarg2~0#1.base, main_~#ldvarg2~0#1.offset, main_~ldvarg5~0#1.base, main_~ldvarg5~0#1.offset, main_~tmp___2~13#1.base, main_~tmp___2~13#1.offset, main_~ldvarg6~0#1.base, main_~ldvarg6~0#1.offset, main_~tmp___3~9#1.base, main_~tmp___3~9#1.offset, main_~ldvarg7~0#1.base, main_~ldvarg7~0#1.offset, main_~tmp___4~6#1.base, main_~tmp___4~6#1.offset, main_~tmp___5~5#1, main_~tmp___6~4#1, main_~tmp___7~3#1, main_~tmp___8~1#1, main_~tmp___9~1#1, main_~tmp___10~1#1;havoc main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset;havoc main_~tmp~57#1.base, main_~tmp~57#1.offset;havoc main_~ldvarg4~0#1.base, main_~ldvarg4~0#1.offset;havoc main_~tmp___0~28#1.base, main_~tmp___0~28#1.offset;call main_~#ldvarg3~0#1.base, main_~#ldvarg3~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp___1~18#1.base, main_~tmp___1~18#1.offset;call main_~#ldvarg2~0#1.base, main_~#ldvarg2~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~ldvarg5~0#1.base, main_~ldvarg5~0#1.offset;havoc main_~tmp___2~13#1.base, main_~tmp___2~13#1.offset;havoc main_~ldvarg6~0#1.base, main_~ldvarg6~0#1.offset;havoc main_~tmp___3~9#1.base, main_~tmp___3~9#1.offset;havoc main_~ldvarg7~0#1.base, main_~ldvarg7~0#1.offset;havoc main_~tmp___4~6#1.base, main_~tmp___4~6#1.offset;havoc main_~tmp___5~5#1;havoc main_~tmp___6~4#1;havoc main_~tmp___7~3#1;havoc main_~tmp___8~1#1;havoc main_~tmp___9~1#1;havoc main_~tmp___10~1#1; {36209#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:29:37,500 INFO L272 TraceCheckUtils]: 2: Hoare triple {36209#(= ~ldv_irq_1_1~0 0)} call main_#t~ret686#1.base, main_#t~ret686#1.offset := ldv_init_zalloc(232); {36326#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:29:37,500 INFO L290 TraceCheckUtils]: 3: Hoare triple {36326#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {36207#true} is VALID [2022-02-20 22:29:37,501 INFO L272 TraceCheckUtils]: 4: Hoare triple {36207#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {36334#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:29:37,501 INFO L290 TraceCheckUtils]: 5: Hoare triple {36334#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {36207#true} is VALID [2022-02-20 22:29:37,501 INFO L290 TraceCheckUtils]: 6: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,502 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {36207#true} {36207#true} #3100#return; {36207#true} is VALID [2022-02-20 22:29:37,502 INFO L290 TraceCheckUtils]: 8: Hoare triple {36207#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {36207#true} is VALID [2022-02-20 22:29:37,502 INFO L272 TraceCheckUtils]: 9: Hoare triple {36207#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {36207#true} is VALID [2022-02-20 22:29:37,502 INFO L290 TraceCheckUtils]: 10: Hoare triple {36207#true} ~cond := #in~cond; {36207#true} is VALID [2022-02-20 22:29:37,502 INFO L290 TraceCheckUtils]: 11: Hoare triple {36207#true} assume !(0 == ~cond); {36207#true} is VALID [2022-02-20 22:29:37,502 INFO L290 TraceCheckUtils]: 12: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,502 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {36207#true} {36207#true} #3102#return; {36207#true} is VALID [2022-02-20 22:29:37,502 INFO L290 TraceCheckUtils]: 14: Hoare triple {36207#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {36207#true} is VALID [2022-02-20 22:29:37,502 INFO L290 TraceCheckUtils]: 15: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,503 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {36207#true} {36209#(= ~ldv_irq_1_1~0 0)} #3120#return; {36209#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:29:37,503 INFO L290 TraceCheckUtils]: 17: Hoare triple {36209#(= ~ldv_irq_1_1~0 0)} main_~tmp~57#1.base, main_~tmp~57#1.offset := main_#t~ret686#1.base, main_#t~ret686#1.offset;havoc main_#t~ret686#1.base, main_#t~ret686#1.offset;main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset := main_~tmp~57#1.base, main_~tmp~57#1.offset; {36209#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:29:37,504 INFO L272 TraceCheckUtils]: 18: Hoare triple {36209#(= ~ldv_irq_1_1~0 0)} call main_#t~ret687#1.base, main_#t~ret687#1.offset := ldv_init_zalloc(40); {36326#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:29:37,504 INFO L290 TraceCheckUtils]: 19: Hoare triple {36326#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {36207#true} is VALID [2022-02-20 22:29:37,505 INFO L272 TraceCheckUtils]: 20: Hoare triple {36207#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {36334#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:29:37,505 INFO L290 TraceCheckUtils]: 21: Hoare triple {36334#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {36207#true} is VALID [2022-02-20 22:29:37,505 INFO L290 TraceCheckUtils]: 22: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,505 INFO L284 TraceCheckUtils]: 23: Hoare quadruple {36207#true} {36207#true} #3100#return; {36207#true} is VALID [2022-02-20 22:29:37,505 INFO L290 TraceCheckUtils]: 24: Hoare triple {36207#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {36207#true} is VALID [2022-02-20 22:29:37,505 INFO L272 TraceCheckUtils]: 25: Hoare triple {36207#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {36207#true} is VALID [2022-02-20 22:29:37,505 INFO L290 TraceCheckUtils]: 26: Hoare triple {36207#true} ~cond := #in~cond; {36207#true} is VALID [2022-02-20 22:29:37,505 INFO L290 TraceCheckUtils]: 27: Hoare triple {36207#true} assume !(0 == ~cond); {36207#true} is VALID [2022-02-20 22:29:37,506 INFO L290 TraceCheckUtils]: 28: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,506 INFO L284 TraceCheckUtils]: 29: Hoare quadruple {36207#true} {36207#true} #3102#return; {36207#true} is VALID [2022-02-20 22:29:37,506 INFO L290 TraceCheckUtils]: 30: Hoare triple {36207#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {36207#true} is VALID [2022-02-20 22:29:37,506 INFO L290 TraceCheckUtils]: 31: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,507 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {36207#true} {36209#(= ~ldv_irq_1_1~0 0)} #3122#return; {36209#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:29:37,507 INFO L290 TraceCheckUtils]: 33: Hoare triple {36209#(= ~ldv_irq_1_1~0 0)} main_~tmp___0~28#1.base, main_~tmp___0~28#1.offset := main_#t~ret687#1.base, main_#t~ret687#1.offset;havoc main_#t~ret687#1.base, main_#t~ret687#1.offset;main_~ldvarg4~0#1.base, main_~ldvarg4~0#1.offset := main_~tmp___0~28#1.base, main_~tmp___0~28#1.offset; {36209#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:29:37,508 INFO L272 TraceCheckUtils]: 34: Hoare triple {36209#(= ~ldv_irq_1_1~0 0)} call main_#t~ret688#1.base, main_#t~ret688#1.offset := ldv_init_zalloc(1); {36326#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:29:37,508 INFO L290 TraceCheckUtils]: 35: Hoare triple {36326#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {36207#true} is VALID [2022-02-20 22:29:37,509 INFO L272 TraceCheckUtils]: 36: Hoare triple {36207#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {36334#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:29:37,509 INFO L290 TraceCheckUtils]: 37: Hoare triple {36334#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {36207#true} is VALID [2022-02-20 22:29:37,509 INFO L290 TraceCheckUtils]: 38: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,510 INFO L284 TraceCheckUtils]: 39: Hoare quadruple {36207#true} {36207#true} #3100#return; {36207#true} is VALID [2022-02-20 22:29:37,510 INFO L290 TraceCheckUtils]: 40: Hoare triple {36207#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {36207#true} is VALID [2022-02-20 22:29:37,510 INFO L272 TraceCheckUtils]: 41: Hoare triple {36207#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {36207#true} is VALID [2022-02-20 22:29:37,510 INFO L290 TraceCheckUtils]: 42: Hoare triple {36207#true} ~cond := #in~cond; {36207#true} is VALID [2022-02-20 22:29:37,510 INFO L290 TraceCheckUtils]: 43: Hoare triple {36207#true} assume !(0 == ~cond); {36207#true} is VALID [2022-02-20 22:29:37,510 INFO L290 TraceCheckUtils]: 44: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,510 INFO L284 TraceCheckUtils]: 45: Hoare quadruple {36207#true} {36207#true} #3102#return; {36207#true} is VALID [2022-02-20 22:29:37,510 INFO L290 TraceCheckUtils]: 46: Hoare triple {36207#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {36207#true} is VALID [2022-02-20 22:29:37,511 INFO L290 TraceCheckUtils]: 47: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,511 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {36207#true} {36209#(= ~ldv_irq_1_1~0 0)} #3124#return; {36209#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:29:37,512 INFO L290 TraceCheckUtils]: 49: Hoare triple {36209#(= ~ldv_irq_1_1~0 0)} main_~tmp___1~18#1.base, main_~tmp___1~18#1.offset := main_#t~ret688#1.base, main_#t~ret688#1.offset;havoc main_#t~ret688#1.base, main_#t~ret688#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp___1~18#1.base, main_~tmp___1~18#1.offset; {36209#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:29:37,512 INFO L272 TraceCheckUtils]: 50: Hoare triple {36209#(= ~ldv_irq_1_1~0 0)} call main_#t~ret689#1.base, main_#t~ret689#1.offset := ldv_init_zalloc(196); {36326#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:29:37,512 INFO L290 TraceCheckUtils]: 51: Hoare triple {36326#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {36207#true} is VALID [2022-02-20 22:29:37,513 INFO L272 TraceCheckUtils]: 52: Hoare triple {36207#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {36334#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:29:37,513 INFO L290 TraceCheckUtils]: 53: Hoare triple {36334#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {36207#true} is VALID [2022-02-20 22:29:37,513 INFO L290 TraceCheckUtils]: 54: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,513 INFO L284 TraceCheckUtils]: 55: Hoare quadruple {36207#true} {36207#true} #3100#return; {36207#true} is VALID [2022-02-20 22:29:37,514 INFO L290 TraceCheckUtils]: 56: Hoare triple {36207#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {36207#true} is VALID [2022-02-20 22:29:37,514 INFO L272 TraceCheckUtils]: 57: Hoare triple {36207#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {36207#true} is VALID [2022-02-20 22:29:37,514 INFO L290 TraceCheckUtils]: 58: Hoare triple {36207#true} ~cond := #in~cond; {36207#true} is VALID [2022-02-20 22:29:37,514 INFO L290 TraceCheckUtils]: 59: Hoare triple {36207#true} assume !(0 == ~cond); {36207#true} is VALID [2022-02-20 22:29:37,514 INFO L290 TraceCheckUtils]: 60: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,514 INFO L284 TraceCheckUtils]: 61: Hoare quadruple {36207#true} {36207#true} #3102#return; {36207#true} is VALID [2022-02-20 22:29:37,514 INFO L290 TraceCheckUtils]: 62: Hoare triple {36207#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {36207#true} is VALID [2022-02-20 22:29:37,514 INFO L290 TraceCheckUtils]: 63: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,515 INFO L284 TraceCheckUtils]: 64: Hoare quadruple {36207#true} {36209#(= ~ldv_irq_1_1~0 0)} #3126#return; {36209#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:29:37,515 INFO L290 TraceCheckUtils]: 65: Hoare triple {36209#(= ~ldv_irq_1_1~0 0)} main_~tmp___2~13#1.base, main_~tmp___2~13#1.offset := main_#t~ret689#1.base, main_#t~ret689#1.offset;havoc main_#t~ret689#1.base, main_#t~ret689#1.offset;main_~ldvarg5~0#1.base, main_~ldvarg5~0#1.offset := main_~tmp___2~13#1.base, main_~tmp___2~13#1.offset; {36209#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:29:37,516 INFO L272 TraceCheckUtils]: 66: Hoare triple {36209#(= ~ldv_irq_1_1~0 0)} call main_#t~ret690#1.base, main_#t~ret690#1.offset := ldv_init_zalloc(32); {36326#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:29:37,516 INFO L290 TraceCheckUtils]: 67: Hoare triple {36326#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {36207#true} is VALID [2022-02-20 22:29:37,517 INFO L272 TraceCheckUtils]: 68: Hoare triple {36207#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {36334#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:29:37,517 INFO L290 TraceCheckUtils]: 69: Hoare triple {36334#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {36207#true} is VALID [2022-02-20 22:29:37,517 INFO L290 TraceCheckUtils]: 70: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,517 INFO L284 TraceCheckUtils]: 71: Hoare quadruple {36207#true} {36207#true} #3100#return; {36207#true} is VALID [2022-02-20 22:29:37,517 INFO L290 TraceCheckUtils]: 72: Hoare triple {36207#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {36207#true} is VALID [2022-02-20 22:29:37,518 INFO L272 TraceCheckUtils]: 73: Hoare triple {36207#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {36207#true} is VALID [2022-02-20 22:29:37,518 INFO L290 TraceCheckUtils]: 74: Hoare triple {36207#true} ~cond := #in~cond; {36207#true} is VALID [2022-02-20 22:29:37,518 INFO L290 TraceCheckUtils]: 75: Hoare triple {36207#true} assume !(0 == ~cond); {36207#true} is VALID [2022-02-20 22:29:37,518 INFO L290 TraceCheckUtils]: 76: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,518 INFO L284 TraceCheckUtils]: 77: Hoare quadruple {36207#true} {36207#true} #3102#return; {36207#true} is VALID [2022-02-20 22:29:37,532 INFO L290 TraceCheckUtils]: 78: Hoare triple {36207#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {36207#true} is VALID [2022-02-20 22:29:37,532 INFO L290 TraceCheckUtils]: 79: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,533 INFO L284 TraceCheckUtils]: 80: Hoare quadruple {36207#true} {36209#(= ~ldv_irq_1_1~0 0)} #3128#return; {36209#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:29:37,534 INFO L290 TraceCheckUtils]: 81: Hoare triple {36209#(= ~ldv_irq_1_1~0 0)} main_~tmp___3~9#1.base, main_~tmp___3~9#1.offset := main_#t~ret690#1.base, main_#t~ret690#1.offset;havoc main_#t~ret690#1.base, main_#t~ret690#1.offset;main_~ldvarg6~0#1.base, main_~ldvarg6~0#1.offset := main_~tmp___3~9#1.base, main_~tmp___3~9#1.offset; {36209#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:29:37,534 INFO L272 TraceCheckUtils]: 82: Hoare triple {36209#(= ~ldv_irq_1_1~0 0)} call main_#t~ret691#1.base, main_#t~ret691#1.offset := ldv_init_zalloc(196); {36326#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:29:37,534 INFO L290 TraceCheckUtils]: 83: Hoare triple {36326#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~2.base, ~tmp~2.offset;call #t~malloc14.base, #t~malloc14.offset := #Ultimate.allocOnHeap(~size); {36207#true} is VALID [2022-02-20 22:29:37,535 INFO L272 TraceCheckUtils]: 84: Hoare triple {36207#true} call #Ultimate.meminit(#t~malloc14.base, #t~malloc14.offset, 1, ~size, ~size); {36334#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:29:37,535 INFO L290 TraceCheckUtils]: 85: Hoare triple {36334#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {36207#true} is VALID [2022-02-20 22:29:37,535 INFO L290 TraceCheckUtils]: 86: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,536 INFO L284 TraceCheckUtils]: 87: Hoare quadruple {36207#true} {36207#true} #3100#return; {36207#true} is VALID [2022-02-20 22:29:37,536 INFO L290 TraceCheckUtils]: 88: Hoare triple {36207#true} ~tmp~2.base, ~tmp~2.offset := #t~malloc14.base, #t~malloc14.offset;~p~2.base, ~p~2.offset := ~tmp~2.base, ~tmp~2.offset; {36207#true} is VALID [2022-02-20 22:29:37,536 INFO L272 TraceCheckUtils]: 89: Hoare triple {36207#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {36207#true} is VALID [2022-02-20 22:29:37,536 INFO L290 TraceCheckUtils]: 90: Hoare triple {36207#true} ~cond := #in~cond; {36207#true} is VALID [2022-02-20 22:29:37,536 INFO L290 TraceCheckUtils]: 91: Hoare triple {36207#true} assume !(0 == ~cond); {36207#true} is VALID [2022-02-20 22:29:37,536 INFO L290 TraceCheckUtils]: 92: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,536 INFO L284 TraceCheckUtils]: 93: Hoare quadruple {36207#true} {36207#true} #3102#return; {36207#true} is VALID [2022-02-20 22:29:37,536 INFO L290 TraceCheckUtils]: 94: Hoare triple {36207#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {36207#true} is VALID [2022-02-20 22:29:37,536 INFO L290 TraceCheckUtils]: 95: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,537 INFO L284 TraceCheckUtils]: 96: Hoare quadruple {36207#true} {36209#(= ~ldv_irq_1_1~0 0)} #3130#return; {36209#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:29:37,537 INFO L290 TraceCheckUtils]: 97: Hoare triple {36209#(= ~ldv_irq_1_1~0 0)} main_~tmp___4~6#1.base, main_~tmp___4~6#1.offset := main_#t~ret691#1.base, main_#t~ret691#1.offset;havoc main_#t~ret691#1.base, main_#t~ret691#1.offset;main_~ldvarg7~0#1.base, main_~ldvarg7~0#1.offset := main_~tmp___4~6#1.base, main_~tmp___4~6#1.offset;assume { :begin_inline_ldv_initialize } true; {36209#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:29:37,538 INFO L290 TraceCheckUtils]: 98: Hoare triple {36209#(= ~ldv_irq_1_1~0 0)} assume { :end_inline_ldv_initialize } true; {36209#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:29:37,539 INFO L272 TraceCheckUtils]: 99: Hoare triple {36209#(= ~ldv_irq_1_1~0 0)} call main_#t~ret692#1.base, main_#t~ret692#1.offset := ldv_memset(main_~#ldvarg3~0#1.base, main_~#ldvarg3~0#1.offset, 0, 4); {36370#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:29:37,539 INFO L290 TraceCheckUtils]: 100: Hoare triple {36370#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {36207#true} is VALID [2022-02-20 22:29:37,540 INFO L272 TraceCheckUtils]: 101: Hoare triple {36207#true} call #t~memset~res15.base, #t~memset~res15.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, ~n); {36370#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:29:37,540 INFO L290 TraceCheckUtils]: 102: Hoare triple {36370#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr788 := 0; {36207#true} is VALID [2022-02-20 22:29:37,540 INFO L290 TraceCheckUtils]: 103: Hoare triple {36207#true} assume !(#t~loopctr788 % 18446744073709551616 < #amount % 18446744073709551616); {36207#true} is VALID [2022-02-20 22:29:37,540 INFO L290 TraceCheckUtils]: 104: Hoare triple {36207#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {36207#true} is VALID [2022-02-20 22:29:37,540 INFO L284 TraceCheckUtils]: 105: Hoare quadruple {36207#true} {36207#true} #3454#return; {36207#true} is VALID [2022-02-20 22:29:37,540 INFO L290 TraceCheckUtils]: 106: Hoare triple {36207#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res15.base, #t~memset~res15.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {36207#true} is VALID [2022-02-20 22:29:37,540 INFO L290 TraceCheckUtils]: 107: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,541 INFO L284 TraceCheckUtils]: 108: Hoare quadruple {36207#true} {36209#(= ~ldv_irq_1_1~0 0)} #3132#return; {36209#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:29:37,542 INFO L290 TraceCheckUtils]: 109: Hoare triple {36209#(= ~ldv_irq_1_1~0 0)} havoc main_#t~ret692#1.base, main_#t~ret692#1.offset; {36209#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:29:37,542 INFO L272 TraceCheckUtils]: 110: Hoare triple {36209#(= ~ldv_irq_1_1~0 0)} call main_#t~ret693#1.base, main_#t~ret693#1.offset := ldv_memset(main_~#ldvarg2~0#1.base, main_~#ldvarg2~0#1.offset, 0, 4); {36370#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:29:37,543 INFO L290 TraceCheckUtils]: 111: Hoare triple {36370#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} ~s.base, ~s.offset := #in~s.base, #in~s.offset;~c := #in~c;~n := #in~n;havoc ~tmp~3.base, ~tmp~3.offset; {36207#true} is VALID [2022-02-20 22:29:37,543 INFO L272 TraceCheckUtils]: 112: Hoare triple {36207#true} call #t~memset~res15.base, #t~memset~res15.offset := #Ultimate.C_memset(~s.base, ~s.offset, ~c, ~n); {36370#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:29:37,544 INFO L290 TraceCheckUtils]: 113: Hoare triple {36370#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr788 := 0; {36207#true} is VALID [2022-02-20 22:29:37,544 INFO L290 TraceCheckUtils]: 114: Hoare triple {36207#true} assume !(#t~loopctr788 % 18446744073709551616 < #amount % 18446744073709551616); {36207#true} is VALID [2022-02-20 22:29:37,544 INFO L290 TraceCheckUtils]: 115: Hoare triple {36207#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {36207#true} is VALID [2022-02-20 22:29:37,544 INFO L284 TraceCheckUtils]: 116: Hoare quadruple {36207#true} {36207#true} #3454#return; {36207#true} is VALID [2022-02-20 22:29:37,544 INFO L290 TraceCheckUtils]: 117: Hoare triple {36207#true} ~tmp~3.base, ~tmp~3.offset := ~s.base, ~s.offset;havoc #t~memset~res15.base, #t~memset~res15.offset;#res.base, #res.offset := ~tmp~3.base, ~tmp~3.offset; {36207#true} is VALID [2022-02-20 22:29:37,544 INFO L290 TraceCheckUtils]: 118: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,545 INFO L284 TraceCheckUtils]: 119: Hoare quadruple {36207#true} {36209#(= ~ldv_irq_1_1~0 0)} #3134#return; {36209#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:29:37,545 INFO L290 TraceCheckUtils]: 120: Hoare triple {36209#(= ~ldv_irq_1_1~0 0)} havoc main_#t~ret693#1.base, main_#t~ret693#1.offset;~ldv_state_variable_6~0 := 0;~ldv_state_variable_4~0 := 0;~ldv_state_variable_1~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 1;~ldv_state_variable_5~0 := 0; {36209#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:29:37,546 INFO L290 TraceCheckUtils]: 121: Hoare triple {36209#(= ~ldv_irq_1_1~0 0)} assume -2147483648 <= main_#t~nondet694#1 && main_#t~nondet694#1 <= 2147483647;main_~tmp___5~5#1 := main_#t~nondet694#1;havoc main_#t~nondet694#1;main_#t~switch695#1 := 0 == main_~tmp___5~5#1; {36209#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:29:37,546 INFO L290 TraceCheckUtils]: 122: Hoare triple {36209#(= ~ldv_irq_1_1~0 0)} assume !main_#t~switch695#1;main_#t~switch695#1 := main_#t~switch695#1 || 1 == main_~tmp___5~5#1; {36209#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:29:37,546 INFO L290 TraceCheckUtils]: 123: Hoare triple {36209#(= ~ldv_irq_1_1~0 0)} assume !main_#t~switch695#1;main_#t~switch695#1 := main_#t~switch695#1 || 2 == main_~tmp___5~5#1; {36209#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:29:37,547 INFO L290 TraceCheckUtils]: 124: Hoare triple {36209#(= ~ldv_irq_1_1~0 0)} assume main_#t~switch695#1; {36209#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:29:37,547 INFO L290 TraceCheckUtils]: 125: Hoare triple {36209#(= ~ldv_irq_1_1~0 0)} assume 0 != ~ldv_state_variable_1~0;assume { :begin_inline_choose_interrupt_1 } true;havoc choose_interrupt_1_#t~nondet680#1, choose_interrupt_1_#t~switch681#1, choose_interrupt_1_#t~ret682#1, choose_interrupt_1_#t~ret683#1, choose_interrupt_1_#t~ret684#1, choose_interrupt_1_#t~ret685#1, choose_interrupt_1_~tmp~56#1;havoc choose_interrupt_1_~tmp~56#1;assume -2147483648 <= choose_interrupt_1_#t~nondet680#1 && choose_interrupt_1_#t~nondet680#1 <= 2147483647;choose_interrupt_1_~tmp~56#1 := choose_interrupt_1_#t~nondet680#1;havoc choose_interrupt_1_#t~nondet680#1;choose_interrupt_1_#t~switch681#1 := 0 == choose_interrupt_1_~tmp~56#1; {36209#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:29:37,547 INFO L290 TraceCheckUtils]: 126: Hoare triple {36209#(= ~ldv_irq_1_1~0 0)} assume !choose_interrupt_1_#t~switch681#1;choose_interrupt_1_#t~switch681#1 := choose_interrupt_1_#t~switch681#1 || 1 == choose_interrupt_1_~tmp~56#1; {36209#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:29:37,547 INFO L290 TraceCheckUtils]: 127: Hoare triple {36209#(= ~ldv_irq_1_1~0 0)} assume choose_interrupt_1_#t~switch681#1; {36209#(= ~ldv_irq_1_1~0 0)} is VALID [2022-02-20 22:29:37,548 INFO L272 TraceCheckUtils]: 128: Hoare triple {36209#(= ~ldv_irq_1_1~0 0)} call choose_interrupt_1_#t~ret683#1 := ldv_irq_1(~ldv_irq_1_1~0, ~ldv_irq_line_1_1~0, ~ldv_irq_data_1_1~0.base, ~ldv_irq_data_1_1~0.offset); {36312#(= |ldv_irq_1_#in~state#1| 0)} is VALID [2022-02-20 22:29:37,549 INFO L290 TraceCheckUtils]: 129: Hoare triple {36312#(= |ldv_irq_1_#in~state#1| 0)} ~state#1 := #in~state#1;~line#1 := #in~line#1;~data#1.base, ~data#1.offset := #in~data#1.base, #in~data#1.offset;havoc ~irq_retval~0#1;havoc ~tmp~52#1;havoc ~tmp___0~26#1;assume -2147483648 <= #t~nondet672#1 && #t~nondet672#1 <= 2147483647;~tmp~52#1 := #t~nondet672#1;havoc #t~nondet672#1;~irq_retval~0#1 := ~tmp~52#1; {36313#(= |ldv_irq_1_~state#1| 0)} is VALID [2022-02-20 22:29:37,549 INFO L290 TraceCheckUtils]: 130: Hoare triple {36313#(= |ldv_irq_1_~state#1| 0)} assume 0 != ~state#1;assume -2147483648 <= #t~nondet673#1 && #t~nondet673#1 <= 2147483647;~tmp___0~26#1 := #t~nondet673#1;havoc #t~nondet673#1;#t~switch674#1 := 0 == ~tmp___0~26#1; {36208#false} is VALID [2022-02-20 22:29:37,549 INFO L290 TraceCheckUtils]: 131: Hoare triple {36208#false} assume #t~switch674#1; {36208#false} is VALID [2022-02-20 22:29:37,549 INFO L290 TraceCheckUtils]: 132: Hoare triple {36208#false} assume 1 == ~state#1;~LDV_IN_INTERRUPT~0 := 2;assume { :begin_inline_hamachi_interrupt } true;hamachi_interrupt_#in~irq#1, hamachi_interrupt_#in~dev_instance#1.base, hamachi_interrupt_#in~dev_instance#1.offset := ~line#1, ~data#1.base, ~data#1.offset;havoc hamachi_interrupt_#res#1;havoc hamachi_interrupt_#t~ret431#1.base, hamachi_interrupt_#t~ret431#1.offset, hamachi_interrupt_#t~mem432#1.base, hamachi_interrupt_#t~mem432#1.offset, hamachi_interrupt_#t~ret433#1, hamachi_interrupt_#t~nondet434#1, hamachi_interrupt_#t~ret435#1, hamachi_interrupt_#t~mem436#1, hamachi_interrupt_#t~mem438#1, hamachi_interrupt_#t~mem440#1.base, hamachi_interrupt_#t~mem440#1.offset, hamachi_interrupt_#t~mem441#1, hamachi_interrupt_#t~mem442#1.base, hamachi_interrupt_#t~mem442#1.offset, hamachi_interrupt_#t~mem443#1.base, hamachi_interrupt_#t~mem443#1.offset, hamachi_interrupt_#t~mem444#1.base, hamachi_interrupt_#t~mem444#1.offset, hamachi_interrupt_#t~mem445#1, hamachi_interrupt_#t~mem446#1, hamachi_interrupt_#t~mem447#1.base, hamachi_interrupt_#t~mem447#1.offset, hamachi_interrupt_#t~mem448#1.base, hamachi_interrupt_#t~mem448#1.offset, hamachi_interrupt_#t~mem449#1.base, hamachi_interrupt_#t~mem449#1.offset, hamachi_interrupt_#t~mem450#1, hamachi_interrupt_#t~mem451#1, hamachi_interrupt_#t~mem452#1, hamachi_interrupt_#t~mem453#1, hamachi_interrupt_#t~mem454#1, hamachi_interrupt_#t~mem455#1, hamachi_interrupt_#t~mem456#1, hamachi_interrupt_#t~nondet439#1, hamachi_interrupt_#t~nondet457#1, hamachi_interrupt_#t~ret458#1, hamachi_interrupt_#t~nondet459#1, hamachi_interrupt_~irq#1, hamachi_interrupt_~dev_instance#1.base, hamachi_interrupt_~dev_instance#1.offset, hamachi_interrupt_~dev~2#1.base, hamachi_interrupt_~dev~2#1.offset, hamachi_interrupt_~hmp~9#1.base, hamachi_interrupt_~hmp~9#1.offset, hamachi_interrupt_~tmp~36#1.base, hamachi_interrupt_~tmp~36#1.offset, hamachi_interrupt_~ioaddr~6#1.base, hamachi_interrupt_~ioaddr~6#1.offset, hamachi_interrupt_~boguscnt~1#1, hamachi_interrupt_~handled~0#1, hamachi_interrupt_~intr_status~0#1, hamachi_interrupt_~tmp___0~15#1, hamachi_interrupt_~entry~2#1, hamachi_interrupt_~skb~4#1.base, hamachi_interrupt_~skb~4#1.offset, hamachi_interrupt_~tmp___1~12#1;hamachi_interrupt_~irq#1 := hamachi_interrupt_#in~irq#1;hamachi_interrupt_~dev_instance#1.base, hamachi_interrupt_~dev_instance#1.offset := hamachi_interrupt_#in~dev_instance#1.base, hamachi_interrupt_#in~dev_instance#1.offset;havoc hamachi_interrupt_~dev~2#1.base, hamachi_interrupt_~dev~2#1.offset;havoc hamachi_interrupt_~hmp~9#1.base, hamachi_interrupt_~hmp~9#1.offset;havoc hamachi_interrupt_~tmp~36#1.base, hamachi_interrupt_~tmp~36#1.offset;havoc hamachi_interrupt_~ioaddr~6#1.base, hamachi_interrupt_~ioaddr~6#1.offset;havoc hamachi_interrupt_~boguscnt~1#1;havoc hamachi_interrupt_~handled~0#1;havoc hamachi_interrupt_~intr_status~0#1;havoc hamachi_interrupt_~tmp___0~15#1;havoc hamachi_interrupt_~entry~2#1;havoc hamachi_interrupt_~skb~4#1.base, hamachi_interrupt_~skb~4#1.offset;havoc hamachi_interrupt_~tmp___1~12#1;hamachi_interrupt_~dev~2#1.base, hamachi_interrupt_~dev~2#1.offset := hamachi_interrupt_~dev_instance#1.base, hamachi_interrupt_~dev_instance#1.offset; {36208#false} is VALID [2022-02-20 22:29:37,549 INFO L272 TraceCheckUtils]: 133: Hoare triple {36208#false} call hamachi_interrupt_#t~ret431#1.base, hamachi_interrupt_#t~ret431#1.offset := netdev_priv(hamachi_interrupt_~dev~2#1.base, hamachi_interrupt_~dev~2#1.offset); {36207#true} is VALID [2022-02-20 22:29:37,550 INFO L290 TraceCheckUtils]: 134: Hoare triple {36207#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3008 + ~dev.offset; {36207#true} is VALID [2022-02-20 22:29:37,550 INFO L290 TraceCheckUtils]: 135: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,550 INFO L284 TraceCheckUtils]: 136: Hoare quadruple {36207#true} {36208#false} #2898#return; {36208#false} is VALID [2022-02-20 22:29:37,550 INFO L290 TraceCheckUtils]: 137: Hoare triple {36208#false} hamachi_interrupt_~tmp~36#1.base, hamachi_interrupt_~tmp~36#1.offset := hamachi_interrupt_#t~ret431#1.base, hamachi_interrupt_#t~ret431#1.offset;havoc hamachi_interrupt_#t~ret431#1.base, hamachi_interrupt_#t~ret431#1.offset;hamachi_interrupt_~hmp~9#1.base, hamachi_interrupt_~hmp~9#1.offset := hamachi_interrupt_~tmp~36#1.base, hamachi_interrupt_~tmp~36#1.offset;call hamachi_interrupt_#t~mem432#1.base, hamachi_interrupt_#t~mem432#1.offset := read~$Pointer$(hamachi_interrupt_~hmp~9#1.base, 4926 + hamachi_interrupt_~hmp~9#1.offset, 8);hamachi_interrupt_~ioaddr~6#1.base, hamachi_interrupt_~ioaddr~6#1.offset := hamachi_interrupt_#t~mem432#1.base, hamachi_interrupt_#t~mem432#1.offset;havoc hamachi_interrupt_#t~mem432#1.base, hamachi_interrupt_#t~mem432#1.offset;hamachi_interrupt_~boguscnt~1#1 := ~max_interrupt_work~0;hamachi_interrupt_~handled~0#1 := 0;assume { :begin_inline_spin_lock } true;spin_lock_#in~lock#1.base, spin_lock_#in~lock#1.offset := hamachi_interrupt_~hmp~9#1.base, 4760 + hamachi_interrupt_~hmp~9#1.offset;havoc spin_lock_~lock#1.base, spin_lock_~lock#1.offset;spin_lock_~lock#1.base, spin_lock_~lock#1.offset := spin_lock_#in~lock#1.base, spin_lock_#in~lock#1.offset; {36208#false} is VALID [2022-02-20 22:29:37,550 INFO L272 TraceCheckUtils]: 138: Hoare triple {36208#false} call ldv_spin_lock(); {36379#(= ~ldv_spin~0 |old(~ldv_spin~0)|)} is VALID [2022-02-20 22:29:37,550 INFO L290 TraceCheckUtils]: 139: Hoare triple {36379#(= ~ldv_spin~0 |old(~ldv_spin~0)|)} ~ldv_spin~0 := 1; {36207#true} is VALID [2022-02-20 22:29:37,550 INFO L290 TraceCheckUtils]: 140: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,550 INFO L284 TraceCheckUtils]: 141: Hoare quadruple {36207#true} {36208#false} #2900#return; {36208#false} is VALID [2022-02-20 22:29:37,551 INFO L290 TraceCheckUtils]: 142: Hoare triple {36208#false} assume { :begin_inline_ldv_spin_lock_5 } true;ldv_spin_lock_5_#in~lock#1.base, ldv_spin_lock_5_#in~lock#1.offset := spin_lock_~lock#1.base, spin_lock_~lock#1.offset;havoc ldv_spin_lock_5_~lock#1.base, ldv_spin_lock_5_~lock#1.offset;ldv_spin_lock_5_~lock#1.base, ldv_spin_lock_5_~lock#1.offset := ldv_spin_lock_5_#in~lock#1.base, ldv_spin_lock_5_#in~lock#1.offset;assume { :begin_inline__raw_spin_lock } true;_raw_spin_lock_#in~arg0#1.base, _raw_spin_lock_#in~arg0#1.offset := ldv_spin_lock_5_~lock#1.base, ldv_spin_lock_5_~lock#1.offset;havoc _raw_spin_lock_~arg0#1.base, _raw_spin_lock_~arg0#1.offset;_raw_spin_lock_~arg0#1.base, _raw_spin_lock_~arg0#1.offset := _raw_spin_lock_#in~arg0#1.base, _raw_spin_lock_#in~arg0#1.offset; {36208#false} is VALID [2022-02-20 22:29:37,551 INFO L290 TraceCheckUtils]: 143: Hoare triple {36208#false} assume { :end_inline__raw_spin_lock } true; {36208#false} is VALID [2022-02-20 22:29:37,551 INFO L290 TraceCheckUtils]: 144: Hoare triple {36208#false} assume { :end_inline_ldv_spin_lock_5 } true; {36208#false} is VALID [2022-02-20 22:29:37,551 INFO L290 TraceCheckUtils]: 145: Hoare triple {36208#false} assume { :end_inline_spin_lock } true; {36208#false} is VALID [2022-02-20 22:29:37,551 INFO L272 TraceCheckUtils]: 146: Hoare triple {36208#false} call hamachi_interrupt_#t~ret433#1 := readl(hamachi_interrupt_~ioaddr~6#1.base, 132 + hamachi_interrupt_~ioaddr~6#1.offset); {36207#true} is VALID [2022-02-20 22:29:37,551 INFO L290 TraceCheckUtils]: 147: Hoare triple {36207#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~2;#res := ~ret~2; {36207#true} is VALID [2022-02-20 22:29:37,551 INFO L290 TraceCheckUtils]: 148: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,551 INFO L284 TraceCheckUtils]: 149: Hoare quadruple {36207#true} {36208#false} #2902#return; {36208#false} is VALID [2022-02-20 22:29:37,552 INFO L290 TraceCheckUtils]: 150: Hoare triple {36208#false} hamachi_interrupt_~tmp___0~15#1 := hamachi_interrupt_#t~ret433#1;havoc hamachi_interrupt_#t~ret433#1;hamachi_interrupt_~intr_status~0#1 := hamachi_interrupt_~tmp___0~15#1; {36208#false} is VALID [2022-02-20 22:29:37,552 INFO L290 TraceCheckUtils]: 151: Hoare triple {36208#false} assume ~debug~0 > 4;havoc hamachi_interrupt_#t~nondet434#1; {36208#false} is VALID [2022-02-20 22:29:37,552 INFO L290 TraceCheckUtils]: 152: Hoare triple {36208#false} assume !(0 == hamachi_interrupt_~intr_status~0#1 % 4294967296);hamachi_interrupt_~handled~0#1 := 1; {36208#false} is VALID [2022-02-20 22:29:37,552 INFO L290 TraceCheckUtils]: 153: Hoare triple {36208#false} assume 0 != (if hamachi_interrupt_~intr_status~0#1 % 4294967296 % 4294967296 <= 2147483647 then hamachi_interrupt_~intr_status~0#1 % 4294967296 % 4294967296 else hamachi_interrupt_~intr_status~0#1 % 4294967296 % 4294967296 - 4294967296);assume { :begin_inline_hamachi_rx } true;hamachi_rx_#in~dev#1.base, hamachi_rx_#in~dev#1.offset := hamachi_interrupt_~dev~2#1.base, hamachi_interrupt_~dev~2#1.offset;havoc hamachi_rx_#res#1;havoc hamachi_rx_#t~ret460#1.base, hamachi_rx_#t~ret460#1.offset, hamachi_rx_#t~mem462#1, hamachi_rx_#t~mem464#1, hamachi_rx_#t~mem465#1, hamachi_rx_#t~nondet466#1, hamachi_rx_#t~mem467#1.base, hamachi_rx_#t~mem467#1.offset, hamachi_rx_#t~mem468#1, hamachi_rx_#t~mem469#1.base, hamachi_rx_#t~mem469#1.offset, hamachi_rx_#t~mem470#1, hamachi_rx_#t~mem471#1.base, hamachi_rx_#t~mem471#1.offset, hamachi_rx_#t~mem472#1, hamachi_rx_#t~mem473#1, hamachi_rx_#t~mem474#1.base, hamachi_rx_#t~mem474#1.offset, hamachi_rx_#t~mem475#1.base, hamachi_rx_#t~mem475#1.offset, hamachi_rx_#t~ret476#1, hamachi_rx_#t~nondet477#1, hamachi_rx_#t~nondet478#1, hamachi_rx_#t~mem479#1, hamachi_rx_#t~nondet480#1, hamachi_rx_#t~mem482#1.base, hamachi_rx_#t~mem482#1.offset, hamachi_rx_#t~mem481#1, hamachi_rx_#t~nondet483#1, hamachi_rx_#t~mem485#1.base, hamachi_rx_#t~mem485#1.offset, hamachi_rx_#t~mem484#1, hamachi_rx_#t~mem486#1, hamachi_rx_#t~mem488#1.base, hamachi_rx_#t~mem488#1.offset, hamachi_rx_#t~mem487#1, hamachi_rx_#t~mem489#1, hamachi_rx_#t~mem491#1.base, hamachi_rx_#t~mem491#1.offset, hamachi_rx_#t~mem490#1, hamachi_rx_#t~mem492#1, hamachi_rx_#t~mem493#1, hamachi_rx_#t~nondet494#1, hamachi_rx_#t~mem495#1, hamachi_rx_#t~mem496#1, hamachi_rx_#t~mem497#1, hamachi_rx_#t~mem498#1, hamachi_rx_#t~mem499#1, hamachi_rx_#t~mem500#1, hamachi_rx_#t~ret501#1.base, hamachi_rx_#t~ret501#1.offset, hamachi_rx_#t~nondet502#1, hamachi_rx_#t~mem503#1.base, hamachi_rx_#t~mem503#1.offset, hamachi_rx_#t~mem504#1.base, hamachi_rx_#t~mem504#1.offset, hamachi_rx_#t~mem505#1, hamachi_rx_#t~mem506#1, hamachi_rx_#t~mem507#1.base, hamachi_rx_#t~mem507#1.offset, hamachi_rx_#t~mem508#1.base, hamachi_rx_#t~mem508#1.offset, hamachi_rx_#t~ret509#1.base, hamachi_rx_#t~ret509#1.offset, hamachi_rx_#t~mem510#1.base, hamachi_rx_#t~mem510#1.offset, hamachi_rx_#t~mem511#1.base, hamachi_rx_#t~mem511#1.offset, hamachi_rx_#t~mem512#1, hamachi_rx_#t~mem513#1, hamachi_rx_#t~mem514#1.base, hamachi_rx_#t~mem514#1.offset, hamachi_rx_#t~mem515#1.base, hamachi_rx_#t~mem515#1.offset, hamachi_rx_#t~mem516#1, hamachi_rx_#t~mem517#1, hamachi_rx_#t~mem518#1.base, hamachi_rx_#t~mem518#1.offset, hamachi_rx_#t~ret519#1.base, hamachi_rx_#t~ret519#1.offset, hamachi_rx_#t~mem520#1.base, hamachi_rx_#t~mem520#1.offset, hamachi_rx_#t~mem521#1.base, hamachi_rx_#t~mem521#1.offset, hamachi_rx_#t~mem522#1, hamachi_rx_#t~mem523#1, hamachi_rx_#t~mem524#1.base, hamachi_rx_#t~mem524#1.offset, hamachi_rx_#t~ret525#1.base, hamachi_rx_#t~ret525#1.offset, hamachi_rx_#t~ret526#1, hamachi_rx_#t~mem527#1.base, hamachi_rx_#t~mem527#1.offset, hamachi_rx_#t~mem528#1, hamachi_rx_#t~ret529#1, hamachi_rx_#t~mem530#1, hamachi_rx_#t~mem531#1, hamachi_rx_#t~nondet532#1, hamachi_rx_#t~mem533#1, hamachi_rx_#t~mem534#1, hamachi_rx_#t~switch535#1, hamachi_rx_#t~nondet536#1, hamachi_rx_#t~ret537#1, hamachi_rx_#t~mem538#1, hamachi_rx_#t~mem539#1, hamachi_rx_#t~mem540#1, hamachi_rx_#t~ret541#1, hamachi_rx_#t~mem542#1, hamachi_rx_#t~mem543#1, hamachi_rx_#t~mem545#1, hamachi_rx_#t~mem548#1, hamachi_rx_#t~mem550#1.base, hamachi_rx_#t~mem550#1.offset, hamachi_rx_#t~mem551#1.base, hamachi_rx_#t~mem551#1.offset, hamachi_rx_#t~mem552#1, hamachi_rx_#t~ret553#1.base, hamachi_rx_#t~ret553#1.offset, hamachi_rx_#t~mem554#1.base, hamachi_rx_#t~mem554#1.offset, hamachi_rx_#t~mem555#1.base, hamachi_rx_#t~mem555#1.offset, hamachi_rx_#t~mem556#1, hamachi_rx_#t~ret557#1, hamachi_rx_#t~mem558#1, hamachi_rx_#t~mem559#1, hamachi_rx_#t~mem560#1, hamachi_rx_#t~mem561#1, hamachi_rx_#t~mem562#1, hamachi_rx_#t~mem563#1, hamachi_rx_#t~mem564#1.base, hamachi_rx_#t~mem564#1.offset, hamachi_rx_#t~ret565#1, hamachi_rx_#t~mem566#1.base, hamachi_rx_#t~mem566#1.offset, hamachi_rx_#t~nondet463#1, hamachi_rx_#t~nondet546#1, hamachi_rx_#t~nondet549#1, hamachi_rx_~dev#1.base, hamachi_rx_~dev#1.offset, hamachi_rx_~hmp~10#1.base, hamachi_rx_~hmp~10#1.offset, hamachi_rx_~tmp~37#1.base, hamachi_rx_~tmp~37#1.offset, hamachi_rx_~entry~3#1, hamachi_rx_~boguscnt~2#1, hamachi_rx_~desc~0#1.base, hamachi_rx_~desc~0#1.offset, hamachi_rx_~desc_status~0#1, hamachi_rx_~data_size~0#1, hamachi_rx_~buf_addr~0#1.base, hamachi_rx_~buf_addr~0#1.offset, hamachi_rx_~frame_status~0#1, hamachi_rx_~tmp___0~16#1, hamachi_rx_~skb~5#1.base, hamachi_rx_~skb~5#1.offset, hamachi_rx_~pkt_len~0#1, hamachi_rx_~pfck~0#1, hamachi_rx_~ih~0#1.base, hamachi_rx_~ih~0#1.offset, hamachi_rx_~inv~0#1, hamachi_rx_~p~3#1.base, hamachi_rx_~p~3#1.offset, hamachi_rx_~crc~0#1, hamachi_rx_~p_r~0#1, hamachi_rx_~p_r1~0#1, hamachi_rx_~tmp___1~13#1, hamachi_rx_~tmp___2~8#1, hamachi_rx_~desc___0~0#1.base, hamachi_rx_~desc___0~0#1.offset, hamachi_rx_~skb___0~1#1.base, hamachi_rx_~skb___0~1#1.offset, hamachi_rx_~tmp___3~5#1.base, hamachi_rx_~tmp___3~5#1.offset, hamachi_rx_~tmp___4~2#1, hamachi_rx_~tmp___5~2#1;hamachi_rx_~dev#1.base, hamachi_rx_~dev#1.offset := hamachi_rx_#in~dev#1.base, hamachi_rx_#in~dev#1.offset;havoc hamachi_rx_~hmp~10#1.base, hamachi_rx_~hmp~10#1.offset;havoc hamachi_rx_~tmp~37#1.base, hamachi_rx_~tmp~37#1.offset;havoc hamachi_rx_~entry~3#1;havoc hamachi_rx_~boguscnt~2#1;havoc hamachi_rx_~desc~0#1.base, hamachi_rx_~desc~0#1.offset;havoc hamachi_rx_~desc_status~0#1;havoc hamachi_rx_~data_size~0#1;havoc hamachi_rx_~buf_addr~0#1.base, hamachi_rx_~buf_addr~0#1.offset;havoc hamachi_rx_~frame_status~0#1;havoc hamachi_rx_~tmp___0~16#1;havoc hamachi_rx_~skb~5#1.base, hamachi_rx_~skb~5#1.offset;havoc hamachi_rx_~pkt_len~0#1;havoc hamachi_rx_~pfck~0#1;havoc hamachi_rx_~ih~0#1.base, hamachi_rx_~ih~0#1.offset;havoc hamachi_rx_~inv~0#1;havoc hamachi_rx_~p~3#1.base, hamachi_rx_~p~3#1.offset;havoc hamachi_rx_~crc~0#1;havoc hamachi_rx_~p_r~0#1;havoc hamachi_rx_~p_r1~0#1;havoc hamachi_rx_~tmp___1~13#1;havoc hamachi_rx_~tmp___2~8#1;havoc hamachi_rx_~desc___0~0#1.base, hamachi_rx_~desc___0~0#1.offset;havoc hamachi_rx_~skb___0~1#1.base, hamachi_rx_~skb___0~1#1.offset;havoc hamachi_rx_~tmp___3~5#1.base, hamachi_rx_~tmp___3~5#1.offset;havoc hamachi_rx_~tmp___4~2#1;havoc hamachi_rx_~tmp___5~2#1; {36208#false} is VALID [2022-02-20 22:29:37,552 INFO L272 TraceCheckUtils]: 154: Hoare triple {36208#false} call hamachi_rx_#t~ret460#1.base, hamachi_rx_#t~ret460#1.offset := netdev_priv(hamachi_rx_~dev#1.base, hamachi_rx_~dev#1.offset); {36207#true} is VALID [2022-02-20 22:29:37,552 INFO L290 TraceCheckUtils]: 155: Hoare triple {36207#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3008 + ~dev.offset; {36207#true} is VALID [2022-02-20 22:29:37,552 INFO L290 TraceCheckUtils]: 156: Hoare triple {36207#true} assume true; {36207#true} is VALID [2022-02-20 22:29:37,552 INFO L284 TraceCheckUtils]: 157: Hoare quadruple {36207#true} {36208#false} #2904#return; {36208#false} is VALID [2022-02-20 22:29:37,553 INFO L290 TraceCheckUtils]: 158: Hoare triple {36208#false} hamachi_rx_~tmp~37#1.base, hamachi_rx_~tmp~37#1.offset := hamachi_rx_#t~ret460#1.base, hamachi_rx_#t~ret460#1.offset;havoc hamachi_rx_#t~ret460#1.base, hamachi_rx_#t~ret460#1.offset;hamachi_rx_~hmp~10#1.base, hamachi_rx_~hmp~10#1.offset := hamachi_rx_~tmp~37#1.base, hamachi_rx_~tmp~37#1.offset;call hamachi_rx_#t~mem462#1 := read~int(hamachi_rx_~hmp~10#1.base, 4832 + hamachi_rx_~hmp~10#1.offset, 4); {36208#false} is VALID [2022-02-20 22:29:37,553 INFO L290 TraceCheckUtils]: 159: Hoare triple {36208#false} assume 0 == (if hamachi_rx_#t~mem462#1 % 4294967296 % 4294967296 <= 2147483647 then hamachi_rx_#t~mem462#1 % 4294967296 % 4294967296 else hamachi_rx_#t~mem462#1 % 4294967296 % 4294967296 - 4294967296);hamachi_rx_~entry~3#1 := 0; {36208#false} is VALID [2022-02-20 22:29:37,553 INFO L290 TraceCheckUtils]: 160: Hoare triple {36208#false} havoc hamachi_rx_#t~mem462#1;call hamachi_rx_#t~mem464#1 := read~int(hamachi_rx_~hmp~10#1.base, 4836 + hamachi_rx_~hmp~10#1.offset, 4);call hamachi_rx_#t~mem465#1 := read~int(hamachi_rx_~hmp~10#1.base, 4832 + hamachi_rx_~hmp~10#1.offset, 4);hamachi_rx_~boguscnt~2#1 := (if (512 + (hamachi_rx_#t~mem464#1 - hamachi_rx_#t~mem465#1)) % 4294967296 % 4294967296 <= 2147483647 then (512 + (hamachi_rx_#t~mem464#1 - hamachi_rx_#t~mem465#1)) % 4294967296 % 4294967296 else (512 + (hamachi_rx_#t~mem464#1 - hamachi_rx_#t~mem465#1)) % 4294967296 % 4294967296 - 4294967296);havoc hamachi_rx_#t~mem464#1;havoc hamachi_rx_#t~mem465#1; {36208#false} is VALID [2022-02-20 22:29:37,553 INFO L290 TraceCheckUtils]: 161: Hoare triple {36208#false} assume ~debug~0 > 4;havoc hamachi_rx_#t~nondet466#1;call hamachi_rx_#t~mem467#1.base, hamachi_rx_#t~mem467#1.offset := read~$Pointer$(hamachi_rx_~hmp~10#1.base, hamachi_rx_~hmp~10#1.offset, 8);call hamachi_rx_#t~mem468#1 := read~int(hamachi_rx_#t~mem467#1.base, hamachi_rx_#t~mem467#1.offset + 8 * (if hamachi_rx_~entry~3#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then hamachi_rx_~entry~3#1 % 18446744073709551616 % 18446744073709551616 else hamachi_rx_~entry~3#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), 4);havoc hamachi_rx_#t~mem467#1.base, hamachi_rx_#t~mem467#1.offset;havoc hamachi_rx_#t~mem468#1; {36208#false} is VALID [2022-02-20 22:29:37,553 INFO L290 TraceCheckUtils]: 162: Hoare triple {36208#false} call hamachi_rx_#t~mem469#1.base, hamachi_rx_#t~mem469#1.offset := read~$Pointer$(hamachi_rx_~hmp~10#1.base, hamachi_rx_~hmp~10#1.offset, 8);hamachi_rx_~desc~0#1.base, hamachi_rx_~desc~0#1.offset := hamachi_rx_#t~mem469#1.base, hamachi_rx_#t~mem469#1.offset + 8 * (if hamachi_rx_~entry~3#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then hamachi_rx_~entry~3#1 % 18446744073709551616 % 18446744073709551616 else hamachi_rx_~entry~3#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc hamachi_rx_#t~mem469#1.base, hamachi_rx_#t~mem469#1.offset;call hamachi_rx_#t~mem470#1 := read~int(hamachi_rx_~desc~0#1.base, hamachi_rx_~desc~0#1.offset, 4);hamachi_rx_~desc_status~0#1 := hamachi_rx_#t~mem470#1;havoc hamachi_rx_#t~mem470#1;hamachi_rx_~data_size~0#1 := hamachi_rx_~desc_status~0#1; {36208#false} is VALID [2022-02-20 22:29:37,553 INFO L290 TraceCheckUtils]: 163: Hoare triple {36208#false} assume (if hamachi_rx_~desc_status~0#1 % 4294967296 % 4294967296 <= 2147483647 then hamachi_rx_~desc_status~0#1 % 4294967296 % 4294967296 else hamachi_rx_~desc_status~0#1 % 4294967296 % 4294967296 - 4294967296) < 0; {36208#false} is VALID [2022-02-20 22:29:37,553 INFO L290 TraceCheckUtils]: 164: Hoare triple {36208#false} call hamachi_rx_#t~mem562#1 := read~int(hamachi_rx_~hmp~10#1.base, 4832 + hamachi_rx_~hmp~10#1.offset, 4);call hamachi_rx_#t~mem563#1 := read~int(hamachi_rx_~hmp~10#1.base, 4836 + hamachi_rx_~hmp~10#1.offset, 4); {36208#false} is VALID [2022-02-20 22:29:37,553 INFO L290 TraceCheckUtils]: 165: Hoare triple {36208#false} assume hamachi_rx_#t~mem562#1 % 4294967296 != hamachi_rx_#t~mem563#1 % 4294967296;havoc hamachi_rx_#t~mem562#1;havoc hamachi_rx_#t~mem563#1; {36208#false} is VALID [2022-02-20 22:29:37,554 INFO L290 TraceCheckUtils]: 166: Hoare triple {36208#false} call hamachi_rx_#t~mem548#1 := read~int(hamachi_rx_~hmp~10#1.base, 4836 + hamachi_rx_~hmp~10#1.offset, 4); {36208#false} is VALID [2022-02-20 22:29:37,554 INFO L290 TraceCheckUtils]: 167: Hoare triple {36208#false} assume 0 == (if hamachi_rx_#t~mem548#1 % 4294967296 % 4294967296 <= 2147483647 then hamachi_rx_#t~mem548#1 % 4294967296 % 4294967296 else hamachi_rx_#t~mem548#1 % 4294967296 % 4294967296 - 4294967296);hamachi_rx_~entry~3#1 := 0; {36208#false} is VALID [2022-02-20 22:29:37,554 INFO L290 TraceCheckUtils]: 168: Hoare triple {36208#false} havoc hamachi_rx_#t~mem548#1;call hamachi_rx_#t~mem550#1.base, hamachi_rx_#t~mem550#1.offset := read~$Pointer$(hamachi_rx_~hmp~10#1.base, hamachi_rx_~hmp~10#1.offset, 8);hamachi_rx_~desc___0~0#1.base, hamachi_rx_~desc___0~0#1.offset := hamachi_rx_#t~mem550#1.base, hamachi_rx_#t~mem550#1.offset + 8 * (if hamachi_rx_~entry~3#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then hamachi_rx_~entry~3#1 % 18446744073709551616 % 18446744073709551616 else hamachi_rx_~entry~3#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc hamachi_rx_#t~mem550#1.base, hamachi_rx_#t~mem550#1.offset;call hamachi_rx_#t~mem551#1.base, hamachi_rx_#t~mem551#1.offset := read~$Pointer$(hamachi_rx_~hmp~10#1.base, 16 + hamachi_rx_~hmp~10#1.offset + 8 * hamachi_rx_~entry~3#1, 8); {36208#false} is VALID [2022-02-20 22:29:37,554 INFO L290 TraceCheckUtils]: 169: Hoare triple {36208#false} assume 0 == (hamachi_rx_#t~mem551#1.base + hamachi_rx_#t~mem551#1.offset) % 18446744073709551616;havoc hamachi_rx_#t~mem551#1.base, hamachi_rx_#t~mem551#1.offset;call hamachi_rx_#t~mem552#1 := read~int(hamachi_rx_~hmp~10#1.base, 4848 + hamachi_rx_~hmp~10#1.offset, 4); {36208#false} is VALID [2022-02-20 22:29:37,554 INFO L272 TraceCheckUtils]: 170: Hoare triple {36208#false} call hamachi_rx_#t~ret553#1.base, hamachi_rx_#t~ret553#1.offset := netdev_alloc_skb(hamachi_rx_~dev#1.base, hamachi_rx_~dev#1.offset, 2 + hamachi_rx_#t~mem552#1); {36208#false} is VALID [2022-02-20 22:29:37,554 INFO L290 TraceCheckUtils]: 171: Hoare triple {36208#false} ~dev#1.base, ~dev#1.offset := #in~dev#1.base, #in~dev#1.offset;~length#1 := #in~length#1;havoc ~tmp~18#1.base, ~tmp~18#1.offset;assume { :begin_inline_ldv___netdev_alloc_skb_31 } true;ldv___netdev_alloc_skb_31_#in~ldv_func_arg1#1.base, ldv___netdev_alloc_skb_31_#in~ldv_func_arg1#1.offset, ldv___netdev_alloc_skb_31_#in~ldv_func_arg2#1, ldv___netdev_alloc_skb_31_#in~flags#1 := ~dev#1.base, ~dev#1.offset, ~length#1, 32;havoc ldv___netdev_alloc_skb_31_#res#1.base, ldv___netdev_alloc_skb_31_#res#1.offset;havoc ldv___netdev_alloc_skb_31_#t~ret742#1.base, ldv___netdev_alloc_skb_31_#t~ret742#1.offset, ldv___netdev_alloc_skb_31_~ldv_func_arg1#1.base, ldv___netdev_alloc_skb_31_~ldv_func_arg1#1.offset, ldv___netdev_alloc_skb_31_~ldv_func_arg2#1, ldv___netdev_alloc_skb_31_~flags#1, ldv___netdev_alloc_skb_31_~tmp~60#1.base, ldv___netdev_alloc_skb_31_~tmp~60#1.offset;ldv___netdev_alloc_skb_31_~ldv_func_arg1#1.base, ldv___netdev_alloc_skb_31_~ldv_func_arg1#1.offset := ldv___netdev_alloc_skb_31_#in~ldv_func_arg1#1.base, ldv___netdev_alloc_skb_31_#in~ldv_func_arg1#1.offset;ldv___netdev_alloc_skb_31_~ldv_func_arg2#1 := ldv___netdev_alloc_skb_31_#in~ldv_func_arg2#1;ldv___netdev_alloc_skb_31_~flags#1 := ldv___netdev_alloc_skb_31_#in~flags#1;havoc ldv___netdev_alloc_skb_31_~tmp~60#1.base, ldv___netdev_alloc_skb_31_~tmp~60#1.offset; {36208#false} is VALID [2022-02-20 22:29:37,554 INFO L272 TraceCheckUtils]: 172: Hoare triple {36208#false} call ldv_check_alloc_flags(ldv___netdev_alloc_skb_31_~flags#1); {36208#false} is VALID [2022-02-20 22:29:37,555 INFO L290 TraceCheckUtils]: 173: Hoare triple {36208#false} ~flags := #in~flags; {36208#false} is VALID [2022-02-20 22:29:37,555 INFO L290 TraceCheckUtils]: 174: Hoare triple {36208#false} assume 0 != ~ldv_spin~0 && 0 != (if 0 == ~flags then 0 else (if 1 == ~flags then 0 else ~bitwiseAnd(~flags, 16))) % 4294967296; {36208#false} is VALID [2022-02-20 22:29:37,555 INFO L272 TraceCheckUtils]: 175: Hoare triple {36208#false} call ldv_error(); {36208#false} is VALID [2022-02-20 22:29:37,555 INFO L290 TraceCheckUtils]: 176: Hoare triple {36208#false} assume !false; {36208#false} is VALID [2022-02-20 22:29:37,555 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 222 trivial. 0 not checked. [2022-02-20 22:29:37,556 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:29:37,556 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [276308916] [2022-02-20 22:29:37,556 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [276308916] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:29:37,556 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 22:29:37,556 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2022-02-20 22:29:37,556 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [513341065] [2022-02-20 22:29:37,556 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:29:37,557 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 7.555555555555555) internal successors, (68), 4 states have internal predecessors, (68), 3 states have call successors, (19), 7 states have call predecessors, (19), 1 states have return successors, (15), 3 states have call predecessors, (15), 3 states have call successors, (15) Word has length 177 [2022-02-20 22:29:37,557 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:29:37,557 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 9 states, 9 states have (on average 7.555555555555555) internal successors, (68), 4 states have internal predecessors, (68), 3 states have call successors, (19), 7 states have call predecessors, (19), 1 states have return successors, (15), 3 states have call predecessors, (15), 3 states have call successors, (15) [2022-02-20 22:29:37,667 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 102 edges. 102 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:29:37,667 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-02-20 22:29:37,667 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:29:37,667 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-02-20 22:29:37,667 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2022-02-20 22:29:37,668 INFO L87 Difference]: Start difference. First operand 3749 states and 5207 transitions. Second operand has 9 states, 9 states have (on average 7.555555555555555) internal successors, (68), 4 states have internal predecessors, (68), 3 states have call successors, (19), 7 states have call predecessors, (19), 1 states have return successors, (15), 3 states have call predecessors, (15), 3 states have call successors, (15)