./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/ldv-validator-v0.8/linux-stable-a450319-1-144_1a-drivers--input--tablet--acecad.ko-entry_point_ldv-val-v0.8.cil.out.i --full-output -ea --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 03d7b7b3 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -ea -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/ldv-validator-v0.8/linux-stable-a450319-1-144_1a-drivers--input--tablet--acecad.ko-entry_point_ldv-val-v0.8.cil.out.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 8bd4d18c7774801c1dd2fcc01cd37afd9da2c99096cf08f4bd160d17156b286b --- Real Ultimate output --- This is Ultimate 0.2.2-dev-03d7b7b [2022-02-20 22:06:48,996 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-02-20 22:06:48,998 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-02-20 22:06:49,023 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-02-20 22:06:49,023 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-02-20 22:06:49,024 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-02-20 22:06:49,025 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-02-20 22:06:49,026 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-02-20 22:06:49,027 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-02-20 22:06:49,028 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-02-20 22:06:49,029 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-02-20 22:06:49,029 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-02-20 22:06:49,030 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-02-20 22:06:49,030 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-02-20 22:06:49,031 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-02-20 22:06:49,032 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-02-20 22:06:49,033 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-02-20 22:06:49,033 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-02-20 22:06:49,034 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-02-20 22:06:49,036 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-02-20 22:06:49,037 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-02-20 22:06:49,038 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-02-20 22:06:49,038 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-02-20 22:06:49,039 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-02-20 22:06:49,041 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-02-20 22:06:49,041 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-02-20 22:06:49,041 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-02-20 22:06:49,042 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-02-20 22:06:49,042 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-02-20 22:06:49,043 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-02-20 22:06:49,043 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-02-20 22:06:49,044 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-02-20 22:06:49,044 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-02-20 22:06:49,045 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-02-20 22:06:49,045 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-02-20 22:06:49,046 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-02-20 22:06:49,046 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-02-20 22:06:49,046 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-02-20 22:06:49,047 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-02-20 22:06:49,047 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-02-20 22:06:49,048 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-02-20 22:06:49,048 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2022-02-20 22:06:49,062 INFO L113 SettingsManager]: Loading preferences was successful [2022-02-20 22:06:49,062 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-02-20 22:06:49,063 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-02-20 22:06:49,063 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-02-20 22:06:49,063 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-02-20 22:06:49,064 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-02-20 22:06:49,064 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-02-20 22:06:49,064 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-02-20 22:06:49,064 INFO L138 SettingsManager]: * Use SBE=true [2022-02-20 22:06:49,065 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-02-20 22:06:49,065 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-02-20 22:06:49,065 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-02-20 22:06:49,065 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-02-20 22:06:49,065 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-02-20 22:06:49,065 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-02-20 22:06:49,066 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-02-20 22:06:49,066 INFO L138 SettingsManager]: * Use constant arrays=true [2022-02-20 22:06:49,066 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-02-20 22:06:49,066 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-02-20 22:06:49,066 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-02-20 22:06:49,066 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-02-20 22:06:49,067 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-02-20 22:06:49,067 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-02-20 22:06:49,067 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-02-20 22:06:49,067 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-02-20 22:06:49,067 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-02-20 22:06:49,067 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-02-20 22:06:49,068 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2022-02-20 22:06:49,068 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2022-02-20 22:06:49,068 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-02-20 22:06:49,068 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 8bd4d18c7774801c1dd2fcc01cd37afd9da2c99096cf08f4bd160d17156b286b [2022-02-20 22:06:49,232 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-02-20 22:06:49,252 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-02-20 22:06:49,254 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-02-20 22:06:49,256 INFO L271 PluginConnector]: Initializing CDTParser... [2022-02-20 22:06:49,257 INFO L275 PluginConnector]: CDTParser initialized [2022-02-20 22:06:49,258 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/ldv-validator-v0.8/linux-stable-a450319-1-144_1a-drivers--input--tablet--acecad.ko-entry_point_ldv-val-v0.8.cil.out.i [2022-02-20 22:06:49,331 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/33b9224ab/7a2d72b53b3b4ac99d41b3256a2f7e34/FLAG4c010a8e8 [2022-02-20 22:06:49,837 INFO L306 CDTParser]: Found 1 translation units. [2022-02-20 22:06:49,838 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-validator-v0.8/linux-stable-a450319-1-144_1a-drivers--input--tablet--acecad.ko-entry_point_ldv-val-v0.8.cil.out.i [2022-02-20 22:06:49,873 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/33b9224ab/7a2d72b53b3b4ac99d41b3256a2f7e34/FLAG4c010a8e8 [2022-02-20 22:06:50,334 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/33b9224ab/7a2d72b53b3b4ac99d41b3256a2f7e34 [2022-02-20 22:06:50,336 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-02-20 22:06:50,337 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-02-20 22:06:50,339 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-02-20 22:06:50,339 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-02-20 22:06:50,341 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-02-20 22:06:50,342 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.02 10:06:50" (1/1) ... [2022-02-20 22:06:50,343 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1c011692 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:06:50, skipping insertion in model container [2022-02-20 22:06:50,343 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.02 10:06:50" (1/1) ... [2022-02-20 22:06:50,348 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-02-20 22:06:50,398 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-02-20 22:06:50,961 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-validator-v0.8/linux-stable-a450319-1-144_1a-drivers--input--tablet--acecad.ko-entry_point_ldv-val-v0.8.cil.out.i[113815,113828] [2022-02-20 22:06:51,012 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-20 22:06:51,030 INFO L203 MainTranslator]: Completed pre-run [2022-02-20 22:06:51,187 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-validator-v0.8/linux-stable-a450319-1-144_1a-drivers--input--tablet--acecad.ko-entry_point_ldv-val-v0.8.cil.out.i[113815,113828] [2022-02-20 22:06:51,205 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-20 22:06:51,235 INFO L208 MainTranslator]: Completed translation [2022-02-20 22:06:51,235 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:06:51 WrapperNode [2022-02-20 22:06:51,236 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-02-20 22:06:51,238 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-02-20 22:06:51,238 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-02-20 22:06:51,238 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-02-20 22:06:51,244 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:06:51" (1/1) ... [2022-02-20 22:06:51,285 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:06:51" (1/1) ... [2022-02-20 22:06:51,352 INFO L137 Inliner]: procedures = 109, calls = 313, calls flagged for inlining = 49, calls inlined = 43, statements flattened = 781 [2022-02-20 22:06:51,352 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-02-20 22:06:51,352 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-02-20 22:06:51,353 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-02-20 22:06:51,353 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-02-20 22:06:51,360 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:06:51" (1/1) ... [2022-02-20 22:06:51,361 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:06:51" (1/1) ... [2022-02-20 22:06:51,371 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:06:51" (1/1) ... [2022-02-20 22:06:51,377 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:06:51" (1/1) ... [2022-02-20 22:06:51,424 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:06:51" (1/1) ... [2022-02-20 22:06:51,431 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:06:51" (1/1) ... [2022-02-20 22:06:51,445 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:06:51" (1/1) ... [2022-02-20 22:06:51,451 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-02-20 22:06:51,456 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-02-20 22:06:51,457 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-02-20 22:06:51,457 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-02-20 22:06:51,458 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:06:51" (1/1) ... [2022-02-20 22:06:51,463 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-02-20 22:06:51,470 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-20 22:06:51,480 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-02-20 22:06:51,493 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-02-20 22:06:51,523 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_stop [2022-02-20 22:06:51,524 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_stop [2022-02-20 22:06:51,524 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-02-20 22:06:51,524 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.meminit [2022-02-20 22:06:51,524 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.meminit [2022-02-20 22:06:51,524 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2022-02-20 22:06:51,525 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2022-02-20 22:06:51,525 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2022-02-20 22:06:51,525 INFO L138 BoogieDeclarations]: Found implementation of procedure kfree [2022-02-20 22:06:51,525 INFO L130 BoogieDeclarations]: Found specification of procedure strlcat [2022-02-20 22:06:51,525 INFO L138 BoogieDeclarations]: Found implementation of procedure strlcat [2022-02-20 22:06:51,525 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-02-20 22:06:51,528 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_error [2022-02-20 22:06:51,528 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_error [2022-02-20 22:06:51,528 INFO L130 BoogieDeclarations]: Found specification of procedure ldv__builtin_expect [2022-02-20 22:06:51,529 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv__builtin_expect [2022-02-20 22:06:51,529 INFO L130 BoogieDeclarations]: Found specification of procedure usb_acecad_disconnect [2022-02-20 22:06:51,529 INFO L138 BoogieDeclarations]: Found implementation of procedure usb_acecad_disconnect [2022-02-20 22:06:51,530 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_init_zalloc [2022-02-20 22:06:51,530 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_init_zalloc [2022-02-20 22:06:51,530 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2022-02-20 22:06:51,530 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2022-02-20 22:06:51,530 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-02-20 22:06:51,530 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-02-20 22:06:51,530 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_undef_int [2022-02-20 22:06:51,531 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_undef_int [2022-02-20 22:06:51,531 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-02-20 22:06:51,531 INFO L130 BoogieDeclarations]: Found specification of procedure input_set_abs_params [2022-02-20 22:06:51,531 INFO L138 BoogieDeclarations]: Found implementation of procedure input_set_abs_params [2022-02-20 22:06:51,531 INFO L130 BoogieDeclarations]: Found specification of procedure usb_free_coherent [2022-02-20 22:06:51,531 INFO L138 BoogieDeclarations]: Found implementation of procedure usb_free_coherent [2022-02-20 22:06:51,531 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_set_intfdata_7 [2022-02-20 22:06:51,532 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_set_intfdata_7 [2022-02-20 22:06:51,532 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-02-20 22:06:51,532 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-02-20 22:06:51,532 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2022-02-20 22:06:51,532 INFO L130 BoogieDeclarations]: Found specification of procedure warn_slowpath_null [2022-02-20 22:06:51,532 INFO L138 BoogieDeclarations]: Found implementation of procedure warn_slowpath_null [2022-02-20 22:06:51,532 INFO L130 BoogieDeclarations]: Found specification of procedure kzalloc [2022-02-20 22:06:51,533 INFO L138 BoogieDeclarations]: Found implementation of procedure kzalloc [2022-02-20 22:06:51,533 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-02-20 22:06:51,533 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-02-20 22:06:51,533 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-02-20 22:06:51,776 INFO L234 CfgBuilder]: Building ICFG [2022-02-20 22:06:51,777 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-02-20 22:06:51,889 INFO L766 $ProcedureCfgBuilder]: dead code at ProgramPoint ldv_stopFINAL: assume true; [2022-02-20 22:06:52,508 INFO L275 CfgBuilder]: Performing block encoding [2022-02-20 22:06:52,515 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-02-20 22:06:52,516 INFO L299 CfgBuilder]: Removed 0 assume(true) statements. [2022-02-20 22:06:52,517 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 10:06:52 BoogieIcfgContainer [2022-02-20 22:06:52,517 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-02-20 22:06:52,518 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-02-20 22:06:52,518 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-02-20 22:06:52,521 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-02-20 22:06:52,521 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 20.02 10:06:50" (1/3) ... [2022-02-20 22:06:52,521 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1d90ebc5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.02 10:06:52, skipping insertion in model container [2022-02-20 22:06:52,521 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:06:51" (2/3) ... [2022-02-20 22:06:52,522 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1d90ebc5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.02 10:06:52, skipping insertion in model container [2022-02-20 22:06:52,522 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 10:06:52" (3/3) ... [2022-02-20 22:06:52,523 INFO L111 eAbstractionObserver]: Analyzing ICFG linux-stable-a450319-1-144_1a-drivers--input--tablet--acecad.ko-entry_point_ldv-val-v0.8.cil.out.i [2022-02-20 22:06:52,526 INFO L205 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-02-20 22:06:52,526 INFO L164 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-02-20 22:06:52,557 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-02-20 22:06:52,561 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2022-02-20 22:06:52,562 INFO L340 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-02-20 22:06:52,580 INFO L276 IsEmpty]: Start isEmpty. Operand has 237 states, 177 states have (on average 1.3276836158192091) internal successors, (235), 188 states have internal predecessors, (235), 43 states have call successors, (43), 16 states have call predecessors, (43), 15 states have return successors, (39), 39 states have call predecessors, (39), 39 states have call successors, (39) [2022-02-20 22:06:52,586 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-02-20 22:06:52,586 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:06:52,586 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:06:52,587 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:06:52,596 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:06:52,596 INFO L85 PathProgramCache]: Analyzing trace with hash -949146533, now seen corresponding path program 1 times [2022-02-20 22:06:52,602 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:06:52,602 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1314644296] [2022-02-20 22:06:52,602 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:06:52,603 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:06:52,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:06:52,860 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 22:06:52,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:06:52,908 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:06:52,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:06:52,932 INFO L290 TraceCheckUtils]: 0: Hoare triple {264#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {240#true} is VALID [2022-02-20 22:06:52,934 INFO L290 TraceCheckUtils]: 1: Hoare triple {240#true} assume true; {240#true} is VALID [2022-02-20 22:06:52,934 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {240#true} {240#true} #547#return; {240#true} is VALID [2022-02-20 22:06:52,935 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:06:52,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:06:52,943 INFO L290 TraceCheckUtils]: 0: Hoare triple {240#true} ~cond := #in~cond; {240#true} is VALID [2022-02-20 22:06:52,943 INFO L290 TraceCheckUtils]: 1: Hoare triple {240#true} assume 0 == ~cond;assume false; {241#false} is VALID [2022-02-20 22:06:52,944 INFO L290 TraceCheckUtils]: 2: Hoare triple {241#false} assume true; {241#false} is VALID [2022-02-20 22:06:52,944 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {241#false} {240#true} #549#return; {241#false} is VALID [2022-02-20 22:06:52,944 INFO L290 TraceCheckUtils]: 0: Hoare triple {256#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {240#true} is VALID [2022-02-20 22:06:52,945 INFO L272 TraceCheckUtils]: 1: Hoare triple {240#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {264#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:06:52,945 INFO L290 TraceCheckUtils]: 2: Hoare triple {264#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {240#true} is VALID [2022-02-20 22:06:52,946 INFO L290 TraceCheckUtils]: 3: Hoare triple {240#true} assume true; {240#true} is VALID [2022-02-20 22:06:52,946 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {240#true} {240#true} #547#return; {240#true} is VALID [2022-02-20 22:06:52,946 INFO L290 TraceCheckUtils]: 5: Hoare triple {240#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {240#true} is VALID [2022-02-20 22:06:52,946 INFO L272 TraceCheckUtils]: 6: Hoare triple {240#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {240#true} is VALID [2022-02-20 22:06:52,946 INFO L290 TraceCheckUtils]: 7: Hoare triple {240#true} ~cond := #in~cond; {240#true} is VALID [2022-02-20 22:06:52,947 INFO L290 TraceCheckUtils]: 8: Hoare triple {240#true} assume 0 == ~cond;assume false; {241#false} is VALID [2022-02-20 22:06:52,947 INFO L290 TraceCheckUtils]: 9: Hoare triple {241#false} assume true; {241#false} is VALID [2022-02-20 22:06:52,947 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {241#false} {240#true} #549#return; {241#false} is VALID [2022-02-20 22:06:52,947 INFO L290 TraceCheckUtils]: 11: Hoare triple {241#false} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {241#false} is VALID [2022-02-20 22:06:52,948 INFO L290 TraceCheckUtils]: 12: Hoare triple {241#false} assume true; {241#false} is VALID [2022-02-20 22:06:52,948 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {241#false} {240#true} #553#return; {241#false} is VALID [2022-02-20 22:06:52,949 INFO L290 TraceCheckUtils]: 0: Hoare triple {240#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(99, 2);call #Ultimate.allocInit(10, 3);call #Ultimate.allocInit(7, 4);call write~init~int(97, 4, 0, 1);call write~init~int(99, 4, 1, 1);call write~init~int(101, 4, 2, 1);call write~init~int(99, 4, 3, 1);call write~init~int(97, 4, 4, 1);call write~init~int(100, 4, 5, 1);call write~init~int(0, 4, 6, 1);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(20, 6);call #Ultimate.allocInit(57, 7);call #Ultimate.allocInit(2, 8);call write~init~int(32, 8, 0, 1);call write~init~int(0, 8, 1, 1);call #Ultimate.allocInit(8, 9);call #Ultimate.allocInit(34, 10);call #Ultimate.allocInit(32, 11);call #Ultimate.allocInit(11, 12);call #Ultimate.allocInit(48, 13);~LDV_IN_INTERRUPT~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset := 14, 0;call #Ultimate.allocInit(72, 14);call write~init~int(3, ~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 2 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(4, ~#usb_acecad_id_table~0.base, 4 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 6 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 8 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 10 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 11 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 12 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 13 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 14 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 15 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 16 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(3, ~#usb_acecad_id_table~0.base, 24 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 26 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(8, ~#usb_acecad_id_table~0.base, 28 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 30 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 32 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 34 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 35 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 36 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 37 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 38 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 39 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(1, ~#usb_acecad_id_table~0.base, 40 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(0, ~#usb_acecad_id_table~0.base, 48 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 50 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 52 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 54 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 56 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 58 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 59 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 60 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 61 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 62 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 63 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 64 + ~#usb_acecad_id_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.driver_info := 0;~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset := 15, 0;call #Ultimate.allocInit(264, 15);call write~init~$Pointer$(12, 0, ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_probe.base, #funAddr~usb_acecad_probe.offset, ~#usb_acecad_driver~0.base, 8 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_disconnect.base, #funAddr~usb_acecad_disconnect.offset, ~#usb_acecad_driver~0.base, 16 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 24 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 32 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 40 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 48 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 56 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 64 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, ~#usb_acecad_driver~0.base, 72 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 80 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 84 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 88 + ~#usb_acecad_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 92 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 100 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 108 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 116 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 124 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 132 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 136 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 144 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 152 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 160 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 168 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 176 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 184 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 192 + ~#usb_acecad_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 193 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 201 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 209 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 217 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 225 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 233 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 241 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 249 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 257 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 261 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 262 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 263 + ~#usb_acecad_driver~0.offset, 1);~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~URB_STATE~0 := 0;~DEV_STATE~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~int_urb~0.base, ~int_urb~0.offset := 0, 0;~bulk_urb~0.base, ~bulk_urb~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {240#true} is VALID [2022-02-20 22:06:52,949 INFO L290 TraceCheckUtils]: 1: Hoare triple {240#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret186#1.base, main_#t~ret186#1.offset, main_#t~nondet187#1, main_#t~switch188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~ret191#1, main_#t~nondet192#1, main_#t~switch193#1, main_#t~ret194#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~17#1.base, main_~tmp~17#1.offset, main_~tmp___0~6#1, main_~tmp___1~3#1, main_~tmp___2~1#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~17#1.base, main_~tmp~17#1.offset;havoc main_~tmp___0~6#1;havoc main_~tmp___1~3#1;havoc main_~tmp___2~1#1; {240#true} is VALID [2022-02-20 22:06:52,950 INFO L272 TraceCheckUtils]: 2: Hoare triple {240#true} call main_#t~ret186#1.base, main_#t~ret186#1.offset := ldv_init_zalloc(24); {256#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:06:52,950 INFO L290 TraceCheckUtils]: 3: Hoare triple {256#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {240#true} is VALID [2022-02-20 22:06:52,951 INFO L272 TraceCheckUtils]: 4: Hoare triple {240#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {264#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:06:52,951 INFO L290 TraceCheckUtils]: 5: Hoare triple {264#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {240#true} is VALID [2022-02-20 22:06:52,952 INFO L290 TraceCheckUtils]: 6: Hoare triple {240#true} assume true; {240#true} is VALID [2022-02-20 22:06:52,952 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {240#true} {240#true} #547#return; {240#true} is VALID [2022-02-20 22:06:52,952 INFO L290 TraceCheckUtils]: 8: Hoare triple {240#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {240#true} is VALID [2022-02-20 22:06:52,952 INFO L272 TraceCheckUtils]: 9: Hoare triple {240#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {240#true} is VALID [2022-02-20 22:06:52,952 INFO L290 TraceCheckUtils]: 10: Hoare triple {240#true} ~cond := #in~cond; {240#true} is VALID [2022-02-20 22:06:52,953 INFO L290 TraceCheckUtils]: 11: Hoare triple {240#true} assume 0 == ~cond;assume false; {241#false} is VALID [2022-02-20 22:06:52,953 INFO L290 TraceCheckUtils]: 12: Hoare triple {241#false} assume true; {241#false} is VALID [2022-02-20 22:06:52,953 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {241#false} {240#true} #549#return; {241#false} is VALID [2022-02-20 22:06:52,953 INFO L290 TraceCheckUtils]: 14: Hoare triple {241#false} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {241#false} is VALID [2022-02-20 22:06:52,954 INFO L290 TraceCheckUtils]: 15: Hoare triple {241#false} assume true; {241#false} is VALID [2022-02-20 22:06:52,954 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {241#false} {240#true} #553#return; {241#false} is VALID [2022-02-20 22:06:52,954 INFO L290 TraceCheckUtils]: 17: Hoare triple {241#false} main_~tmp~17#1.base, main_~tmp~17#1.offset := main_#t~ret186#1.base, main_#t~ret186#1.offset;havoc main_#t~ret186#1.base, main_#t~ret186#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~17#1.base, main_~tmp~17#1.offset;assume { :begin_inline_ldv_initialize } true; {241#false} is VALID [2022-02-20 22:06:52,954 INFO L290 TraceCheckUtils]: 18: Hoare triple {241#false} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1; {241#false} is VALID [2022-02-20 22:06:52,954 INFO L290 TraceCheckUtils]: 19: Hoare triple {241#false} assume -2147483648 <= main_#t~nondet187#1 && main_#t~nondet187#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet187#1;havoc main_#t~nondet187#1;main_#t~switch188#1 := 0 == main_~tmp___0~6#1; {241#false} is VALID [2022-02-20 22:06:52,955 INFO L290 TraceCheckUtils]: 20: Hoare triple {241#false} assume !main_#t~switch188#1;main_#t~switch188#1 := main_#t~switch188#1 || 1 == main_~tmp___0~6#1; {241#false} is VALID [2022-02-20 22:06:52,955 INFO L290 TraceCheckUtils]: 21: Hoare triple {241#false} assume main_#t~switch188#1; {241#false} is VALID [2022-02-20 22:06:52,958 INFO L290 TraceCheckUtils]: 22: Hoare triple {241#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet192#1 && main_#t~nondet192#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet192#1;havoc main_#t~nondet192#1;main_#t~switch193#1 := 0 == main_~tmp___2~1#1; {241#false} is VALID [2022-02-20 22:06:52,958 INFO L290 TraceCheckUtils]: 23: Hoare triple {241#false} assume main_#t~switch193#1; {241#false} is VALID [2022-02-20 22:06:52,959 INFO L290 TraceCheckUtils]: 24: Hoare triple {241#false} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0;assume { :begin_inline_usb_acecad_exit } true;assume { :begin_inline_ldv_usb_deregister_11 } true;ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset := ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset;assume { :begin_inline_usb_deregister } true;usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset := ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;havoc usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset;usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset := usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset; {241#false} is VALID [2022-02-20 22:06:52,959 INFO L290 TraceCheckUtils]: 25: Hoare triple {241#false} assume { :end_inline_usb_deregister } true;~ldv_state_variable_1~0 := 0; {241#false} is VALID [2022-02-20 22:06:52,959 INFO L290 TraceCheckUtils]: 26: Hoare triple {241#false} assume { :end_inline_ldv_usb_deregister_11 } true; {241#false} is VALID [2022-02-20 22:06:52,959 INFO L290 TraceCheckUtils]: 27: Hoare triple {241#false} assume { :end_inline_usb_acecad_exit } true;~ldv_state_variable_0~0 := 2; {241#false} is VALID [2022-02-20 22:06:52,960 INFO L290 TraceCheckUtils]: 28: Hoare triple {241#false} assume { :begin_inline_ldv_check_final_state } true; {241#false} is VALID [2022-02-20 22:06:52,960 INFO L290 TraceCheckUtils]: 29: Hoare triple {241#false} assume 0 != ~URB_STATE~0; {241#false} is VALID [2022-02-20 22:06:52,960 INFO L272 TraceCheckUtils]: 30: Hoare triple {241#false} call ldv_error(); {241#false} is VALID [2022-02-20 22:06:52,960 INFO L290 TraceCheckUtils]: 31: Hoare triple {241#false} assume !false; {241#false} is VALID [2022-02-20 22:06:52,961 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-20 22:06:52,961 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:06:52,963 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1314644296] [2022-02-20 22:06:52,964 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1314644296] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:06:52,964 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 22:06:52,964 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-02-20 22:06:52,965 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [452313054] [2022-02-20 22:06:52,967 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:06:52,970 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 2 states have internal predecessors, (25), 2 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) Word has length 32 [2022-02-20 22:06:52,973 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:06:52,976 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.25) internal successors, (25), 2 states have internal predecessors, (25), 2 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) [2022-02-20 22:06:53,006 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:06:53,006 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-02-20 22:06:53,007 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:06:53,020 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-02-20 22:06:53,021 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2022-02-20 22:06:53,024 INFO L87 Difference]: Start difference. First operand has 237 states, 177 states have (on average 1.3276836158192091) internal successors, (235), 188 states have internal predecessors, (235), 43 states have call successors, (43), 16 states have call predecessors, (43), 15 states have return successors, (39), 39 states have call predecessors, (39), 39 states have call successors, (39) Second operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 2 states have internal predecessors, (25), 2 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) [2022-02-20 22:06:53,840 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:06:53,841 INFO L93 Difference]: Finished difference Result 476 states and 652 transitions. [2022-02-20 22:06:53,842 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-02-20 22:06:53,842 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 2 states have internal predecessors, (25), 2 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) Word has length 32 [2022-02-20 22:06:53,842 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 22:06:53,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 2 states have internal predecessors, (25), 2 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) [2022-02-20 22:06:53,875 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 652 transitions. [2022-02-20 22:06:53,876 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 2 states have internal predecessors, (25), 2 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) [2022-02-20 22:06:53,893 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 652 transitions. [2022-02-20 22:06:53,894 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states and 652 transitions. [2022-02-20 22:06:54,397 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 652 edges. 652 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:06:54,415 INFO L225 Difference]: With dead ends: 476 [2022-02-20 22:06:54,416 INFO L226 Difference]: Without dead ends: 233 [2022-02-20 22:06:54,422 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2022-02-20 22:06:54,427 INFO L933 BasicCegarLoop]: 299 mSDtfsCounter, 90 mSDsluCounter, 169 mSDsCounter, 0 mSdLazyCounter, 69 mSolverCounterSat, 93 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 93 SdHoareTripleChecker+Valid, 468 SdHoareTripleChecker+Invalid, 162 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 93 IncrementalHoareTripleChecker+Valid, 69 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-02-20 22:06:54,428 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [93 Valid, 468 Invalid, 162 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [93 Valid, 69 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-02-20 22:06:54,441 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 233 states. [2022-02-20 22:06:54,472 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 233 to 226. [2022-02-20 22:06:54,472 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 22:06:54,474 INFO L82 GeneralOperation]: Start isEquivalent. First operand 233 states. Second operand has 226 states, 172 states have (on average 1.2848837209302326) internal successors, (221), 177 states have internal predecessors, (221), 39 states have call successors, (39), 15 states have call predecessors, (39), 14 states have return successors, (35), 35 states have call predecessors, (35), 35 states have call successors, (35) [2022-02-20 22:06:54,475 INFO L74 IsIncluded]: Start isIncluded. First operand 233 states. Second operand has 226 states, 172 states have (on average 1.2848837209302326) internal successors, (221), 177 states have internal predecessors, (221), 39 states have call successors, (39), 15 states have call predecessors, (39), 14 states have return successors, (35), 35 states have call predecessors, (35), 35 states have call successors, (35) [2022-02-20 22:06:54,488 INFO L87 Difference]: Start difference. First operand 233 states. Second operand has 226 states, 172 states have (on average 1.2848837209302326) internal successors, (221), 177 states have internal predecessors, (221), 39 states have call successors, (39), 15 states have call predecessors, (39), 14 states have return successors, (35), 35 states have call predecessors, (35), 35 states have call successors, (35) [2022-02-20 22:06:54,500 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:06:54,500 INFO L93 Difference]: Finished difference Result 233 states and 307 transitions. [2022-02-20 22:06:54,501 INFO L276 IsEmpty]: Start isEmpty. Operand 233 states and 307 transitions. [2022-02-20 22:06:54,502 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:06:54,503 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:06:54,504 INFO L74 IsIncluded]: Start isIncluded. First operand has 226 states, 172 states have (on average 1.2848837209302326) internal successors, (221), 177 states have internal predecessors, (221), 39 states have call successors, (39), 15 states have call predecessors, (39), 14 states have return successors, (35), 35 states have call predecessors, (35), 35 states have call successors, (35) Second operand 233 states. [2022-02-20 22:06:54,504 INFO L87 Difference]: Start difference. First operand has 226 states, 172 states have (on average 1.2848837209302326) internal successors, (221), 177 states have internal predecessors, (221), 39 states have call successors, (39), 15 states have call predecessors, (39), 14 states have return successors, (35), 35 states have call predecessors, (35), 35 states have call successors, (35) Second operand 233 states. [2022-02-20 22:06:54,511 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:06:54,512 INFO L93 Difference]: Finished difference Result 233 states and 307 transitions. [2022-02-20 22:06:54,512 INFO L276 IsEmpty]: Start isEmpty. Operand 233 states and 307 transitions. [2022-02-20 22:06:54,513 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:06:54,513 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:06:54,513 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 22:06:54,513 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 22:06:54,514 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 226 states, 172 states have (on average 1.2848837209302326) internal successors, (221), 177 states have internal predecessors, (221), 39 states have call successors, (39), 15 states have call predecessors, (39), 14 states have return successors, (35), 35 states have call predecessors, (35), 35 states have call successors, (35) [2022-02-20 22:06:54,532 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 226 states to 226 states and 295 transitions. [2022-02-20 22:06:54,533 INFO L78 Accepts]: Start accepts. Automaton has 226 states and 295 transitions. Word has length 32 [2022-02-20 22:06:54,534 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 22:06:54,534 INFO L470 AbstractCegarLoop]: Abstraction has 226 states and 295 transitions. [2022-02-20 22:06:54,534 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 2 states have internal predecessors, (25), 2 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) [2022-02-20 22:06:54,534 INFO L276 IsEmpty]: Start isEmpty. Operand 226 states and 295 transitions. [2022-02-20 22:06:54,535 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-02-20 22:06:54,535 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:06:54,535 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:06:54,536 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-02-20 22:06:54,536 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:06:54,536 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:06:54,537 INFO L85 PathProgramCache]: Analyzing trace with hash -526444707, now seen corresponding path program 1 times [2022-02-20 22:06:54,537 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:06:54,537 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [965580125] [2022-02-20 22:06:54,537 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:06:54,537 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:06:54,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:06:54,625 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 22:06:54,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:06:54,647 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:06:54,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:06:54,653 INFO L290 TraceCheckUtils]: 0: Hoare triple {1772#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {1747#true} is VALID [2022-02-20 22:06:54,653 INFO L290 TraceCheckUtils]: 1: Hoare triple {1747#true} assume true; {1747#true} is VALID [2022-02-20 22:06:54,653 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1747#true} {1747#true} #547#return; {1747#true} is VALID [2022-02-20 22:06:54,653 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:06:54,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:06:54,658 INFO L290 TraceCheckUtils]: 0: Hoare triple {1747#true} ~cond := #in~cond; {1747#true} is VALID [2022-02-20 22:06:54,658 INFO L290 TraceCheckUtils]: 1: Hoare triple {1747#true} assume !(0 == ~cond); {1747#true} is VALID [2022-02-20 22:06:54,658 INFO L290 TraceCheckUtils]: 2: Hoare triple {1747#true} assume true; {1747#true} is VALID [2022-02-20 22:06:54,659 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1747#true} {1747#true} #549#return; {1747#true} is VALID [2022-02-20 22:06:54,659 INFO L290 TraceCheckUtils]: 0: Hoare triple {1764#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {1747#true} is VALID [2022-02-20 22:06:54,660 INFO L272 TraceCheckUtils]: 1: Hoare triple {1747#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {1772#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:06:54,660 INFO L290 TraceCheckUtils]: 2: Hoare triple {1772#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {1747#true} is VALID [2022-02-20 22:06:54,660 INFO L290 TraceCheckUtils]: 3: Hoare triple {1747#true} assume true; {1747#true} is VALID [2022-02-20 22:06:54,660 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {1747#true} {1747#true} #547#return; {1747#true} is VALID [2022-02-20 22:06:54,660 INFO L290 TraceCheckUtils]: 5: Hoare triple {1747#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {1747#true} is VALID [2022-02-20 22:06:54,661 INFO L272 TraceCheckUtils]: 6: Hoare triple {1747#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {1747#true} is VALID [2022-02-20 22:06:54,661 INFO L290 TraceCheckUtils]: 7: Hoare triple {1747#true} ~cond := #in~cond; {1747#true} is VALID [2022-02-20 22:06:54,661 INFO L290 TraceCheckUtils]: 8: Hoare triple {1747#true} assume !(0 == ~cond); {1747#true} is VALID [2022-02-20 22:06:54,661 INFO L290 TraceCheckUtils]: 9: Hoare triple {1747#true} assume true; {1747#true} is VALID [2022-02-20 22:06:54,661 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {1747#true} {1747#true} #549#return; {1747#true} is VALID [2022-02-20 22:06:54,662 INFO L290 TraceCheckUtils]: 11: Hoare triple {1747#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {1747#true} is VALID [2022-02-20 22:06:54,662 INFO L290 TraceCheckUtils]: 12: Hoare triple {1747#true} assume true; {1747#true} is VALID [2022-02-20 22:06:54,662 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {1747#true} {1747#true} #553#return; {1747#true} is VALID [2022-02-20 22:06:54,662 INFO L290 TraceCheckUtils]: 0: Hoare triple {1747#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(99, 2);call #Ultimate.allocInit(10, 3);call #Ultimate.allocInit(7, 4);call write~init~int(97, 4, 0, 1);call write~init~int(99, 4, 1, 1);call write~init~int(101, 4, 2, 1);call write~init~int(99, 4, 3, 1);call write~init~int(97, 4, 4, 1);call write~init~int(100, 4, 5, 1);call write~init~int(0, 4, 6, 1);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(20, 6);call #Ultimate.allocInit(57, 7);call #Ultimate.allocInit(2, 8);call write~init~int(32, 8, 0, 1);call write~init~int(0, 8, 1, 1);call #Ultimate.allocInit(8, 9);call #Ultimate.allocInit(34, 10);call #Ultimate.allocInit(32, 11);call #Ultimate.allocInit(11, 12);call #Ultimate.allocInit(48, 13);~LDV_IN_INTERRUPT~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset := 14, 0;call #Ultimate.allocInit(72, 14);call write~init~int(3, ~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 2 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(4, ~#usb_acecad_id_table~0.base, 4 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 6 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 8 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 10 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 11 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 12 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 13 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 14 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 15 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 16 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(3, ~#usb_acecad_id_table~0.base, 24 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 26 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(8, ~#usb_acecad_id_table~0.base, 28 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 30 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 32 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 34 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 35 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 36 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 37 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 38 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 39 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(1, ~#usb_acecad_id_table~0.base, 40 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(0, ~#usb_acecad_id_table~0.base, 48 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 50 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 52 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 54 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 56 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 58 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 59 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 60 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 61 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 62 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 63 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 64 + ~#usb_acecad_id_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.driver_info := 0;~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset := 15, 0;call #Ultimate.allocInit(264, 15);call write~init~$Pointer$(12, 0, ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_probe.base, #funAddr~usb_acecad_probe.offset, ~#usb_acecad_driver~0.base, 8 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_disconnect.base, #funAddr~usb_acecad_disconnect.offset, ~#usb_acecad_driver~0.base, 16 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 24 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 32 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 40 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 48 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 56 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 64 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, ~#usb_acecad_driver~0.base, 72 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 80 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 84 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 88 + ~#usb_acecad_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 92 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 100 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 108 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 116 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 124 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 132 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 136 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 144 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 152 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 160 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 168 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 176 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 184 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 192 + ~#usb_acecad_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 193 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 201 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 209 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 217 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 225 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 233 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 241 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 249 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 257 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 261 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 262 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 263 + ~#usb_acecad_driver~0.offset, 1);~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~URB_STATE~0 := 0;~DEV_STATE~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~int_urb~0.base, ~int_urb~0.offset := 0, 0;~bulk_urb~0.base, ~bulk_urb~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {1747#true} is VALID [2022-02-20 22:06:54,662 INFO L290 TraceCheckUtils]: 1: Hoare triple {1747#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret186#1.base, main_#t~ret186#1.offset, main_#t~nondet187#1, main_#t~switch188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~ret191#1, main_#t~nondet192#1, main_#t~switch193#1, main_#t~ret194#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~17#1.base, main_~tmp~17#1.offset, main_~tmp___0~6#1, main_~tmp___1~3#1, main_~tmp___2~1#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~17#1.base, main_~tmp~17#1.offset;havoc main_~tmp___0~6#1;havoc main_~tmp___1~3#1;havoc main_~tmp___2~1#1; {1747#true} is VALID [2022-02-20 22:06:54,663 INFO L272 TraceCheckUtils]: 2: Hoare triple {1747#true} call main_#t~ret186#1.base, main_#t~ret186#1.offset := ldv_init_zalloc(24); {1764#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:06:54,663 INFO L290 TraceCheckUtils]: 3: Hoare triple {1764#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {1747#true} is VALID [2022-02-20 22:06:54,664 INFO L272 TraceCheckUtils]: 4: Hoare triple {1747#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {1772#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:06:54,664 INFO L290 TraceCheckUtils]: 5: Hoare triple {1772#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {1747#true} is VALID [2022-02-20 22:06:54,664 INFO L290 TraceCheckUtils]: 6: Hoare triple {1747#true} assume true; {1747#true} is VALID [2022-02-20 22:06:54,665 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {1747#true} {1747#true} #547#return; {1747#true} is VALID [2022-02-20 22:06:54,665 INFO L290 TraceCheckUtils]: 8: Hoare triple {1747#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {1747#true} is VALID [2022-02-20 22:06:54,665 INFO L272 TraceCheckUtils]: 9: Hoare triple {1747#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {1747#true} is VALID [2022-02-20 22:06:54,665 INFO L290 TraceCheckUtils]: 10: Hoare triple {1747#true} ~cond := #in~cond; {1747#true} is VALID [2022-02-20 22:06:54,665 INFO L290 TraceCheckUtils]: 11: Hoare triple {1747#true} assume !(0 == ~cond); {1747#true} is VALID [2022-02-20 22:06:54,665 INFO L290 TraceCheckUtils]: 12: Hoare triple {1747#true} assume true; {1747#true} is VALID [2022-02-20 22:06:54,666 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {1747#true} {1747#true} #549#return; {1747#true} is VALID [2022-02-20 22:06:54,666 INFO L290 TraceCheckUtils]: 14: Hoare triple {1747#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {1747#true} is VALID [2022-02-20 22:06:54,666 INFO L290 TraceCheckUtils]: 15: Hoare triple {1747#true} assume true; {1747#true} is VALID [2022-02-20 22:06:54,666 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {1747#true} {1747#true} #553#return; {1747#true} is VALID [2022-02-20 22:06:54,666 INFO L290 TraceCheckUtils]: 17: Hoare triple {1747#true} main_~tmp~17#1.base, main_~tmp~17#1.offset := main_#t~ret186#1.base, main_#t~ret186#1.offset;havoc main_#t~ret186#1.base, main_#t~ret186#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~17#1.base, main_~tmp~17#1.offset;assume { :begin_inline_ldv_initialize } true; {1747#true} is VALID [2022-02-20 22:06:54,667 INFO L290 TraceCheckUtils]: 18: Hoare triple {1747#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1; {1763#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 22:06:54,667 INFO L290 TraceCheckUtils]: 19: Hoare triple {1763#(= ~ldv_state_variable_0~0 1)} assume -2147483648 <= main_#t~nondet187#1 && main_#t~nondet187#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet187#1;havoc main_#t~nondet187#1;main_#t~switch188#1 := 0 == main_~tmp___0~6#1; {1763#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 22:06:54,667 INFO L290 TraceCheckUtils]: 20: Hoare triple {1763#(= ~ldv_state_variable_0~0 1)} assume !main_#t~switch188#1;main_#t~switch188#1 := main_#t~switch188#1 || 1 == main_~tmp___0~6#1; {1763#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 22:06:54,668 INFO L290 TraceCheckUtils]: 21: Hoare triple {1763#(= ~ldv_state_variable_0~0 1)} assume main_#t~switch188#1; {1763#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 22:06:54,668 INFO L290 TraceCheckUtils]: 22: Hoare triple {1763#(= ~ldv_state_variable_0~0 1)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet192#1 && main_#t~nondet192#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet192#1;havoc main_#t~nondet192#1;main_#t~switch193#1 := 0 == main_~tmp___2~1#1; {1763#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 22:06:54,669 INFO L290 TraceCheckUtils]: 23: Hoare triple {1763#(= ~ldv_state_variable_0~0 1)} assume main_#t~switch193#1; {1763#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 22:06:54,669 INFO L290 TraceCheckUtils]: 24: Hoare triple {1763#(= ~ldv_state_variable_0~0 1)} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0;assume { :begin_inline_usb_acecad_exit } true;assume { :begin_inline_ldv_usb_deregister_11 } true;ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset := ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset;assume { :begin_inline_usb_deregister } true;usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset := ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;havoc usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset;usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset := usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset; {1748#false} is VALID [2022-02-20 22:06:54,669 INFO L290 TraceCheckUtils]: 25: Hoare triple {1748#false} assume { :end_inline_usb_deregister } true;~ldv_state_variable_1~0 := 0; {1748#false} is VALID [2022-02-20 22:06:54,669 INFO L290 TraceCheckUtils]: 26: Hoare triple {1748#false} assume { :end_inline_ldv_usb_deregister_11 } true; {1748#false} is VALID [2022-02-20 22:06:54,670 INFO L290 TraceCheckUtils]: 27: Hoare triple {1748#false} assume { :end_inline_usb_acecad_exit } true;~ldv_state_variable_0~0 := 2; {1748#false} is VALID [2022-02-20 22:06:54,670 INFO L290 TraceCheckUtils]: 28: Hoare triple {1748#false} assume { :begin_inline_ldv_check_final_state } true; {1748#false} is VALID [2022-02-20 22:06:54,670 INFO L290 TraceCheckUtils]: 29: Hoare triple {1748#false} assume 0 != ~URB_STATE~0; {1748#false} is VALID [2022-02-20 22:06:54,670 INFO L272 TraceCheckUtils]: 30: Hoare triple {1748#false} call ldv_error(); {1748#false} is VALID [2022-02-20 22:06:54,670 INFO L290 TraceCheckUtils]: 31: Hoare triple {1748#false} assume !false; {1748#false} is VALID [2022-02-20 22:06:54,671 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-20 22:06:54,671 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:06:54,671 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [965580125] [2022-02-20 22:06:54,671 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [965580125] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:06:54,671 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 22:06:54,672 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-02-20 22:06:54,672 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2004570985] [2022-02-20 22:06:54,672 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:06:54,673 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 5.0) internal successors, (25), 3 states have internal predecessors, (25), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 32 [2022-02-20 22:06:54,673 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:06:54,674 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 5.0) internal successors, (25), 3 states have internal predecessors, (25), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-02-20 22:06:54,700 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:06:54,701 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-02-20 22:06:54,701 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:06:54,702 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-02-20 22:06:54,702 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-02-20 22:06:54,702 INFO L87 Difference]: Start difference. First operand 226 states and 295 transitions. Second operand has 5 states, 5 states have (on average 5.0) internal successors, (25), 3 states have internal predecessors, (25), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-02-20 22:06:56,276 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:06:56,276 INFO L93 Difference]: Finished difference Result 658 states and 868 transitions. [2022-02-20 22:06:56,277 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-02-20 22:06:56,277 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 5.0) internal successors, (25), 3 states have internal predecessors, (25), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 32 [2022-02-20 22:06:56,277 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 22:06:56,277 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 5.0) internal successors, (25), 3 states have internal predecessors, (25), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-02-20 22:06:56,286 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 868 transitions. [2022-02-20 22:06:56,286 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 5.0) internal successors, (25), 3 states have internal predecessors, (25), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-02-20 22:06:56,295 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 868 transitions. [2022-02-20 22:06:56,295 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 7 states and 868 transitions. [2022-02-20 22:06:56,936 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 868 edges. 868 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:06:56,948 INFO L225 Difference]: With dead ends: 658 [2022-02-20 22:06:56,948 INFO L226 Difference]: Without dead ends: 437 [2022-02-20 22:06:56,949 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2022-02-20 22:06:56,950 INFO L933 BasicCegarLoop]: 322 mSDtfsCounter, 318 mSDsluCounter, 514 mSDsCounter, 0 mSdLazyCounter, 292 mSolverCounterSat, 103 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 353 SdHoareTripleChecker+Valid, 836 SdHoareTripleChecker+Invalid, 395 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 103 IncrementalHoareTripleChecker+Valid, 292 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-02-20 22:06:56,950 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [353 Valid, 836 Invalid, 395 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [103 Valid, 292 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-02-20 22:06:56,951 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 437 states. [2022-02-20 22:06:56,967 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 437 to 423. [2022-02-20 22:06:56,967 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 22:06:56,968 INFO L82 GeneralOperation]: Start isEquivalent. First operand 437 states. Second operand has 423 states, 322 states have (on average 1.279503105590062) internal successors, (412), 329 states have internal predecessors, (412), 72 states have call successors, (72), 29 states have call predecessors, (72), 28 states have return successors, (68), 68 states have call predecessors, (68), 68 states have call successors, (68) [2022-02-20 22:06:56,969 INFO L74 IsIncluded]: Start isIncluded. First operand 437 states. Second operand has 423 states, 322 states have (on average 1.279503105590062) internal successors, (412), 329 states have internal predecessors, (412), 72 states have call successors, (72), 29 states have call predecessors, (72), 28 states have return successors, (68), 68 states have call predecessors, (68), 68 states have call successors, (68) [2022-02-20 22:06:56,970 INFO L87 Difference]: Start difference. First operand 437 states. Second operand has 423 states, 322 states have (on average 1.279503105590062) internal successors, (412), 329 states have internal predecessors, (412), 72 states have call successors, (72), 29 states have call predecessors, (72), 28 states have return successors, (68), 68 states have call predecessors, (68), 68 states have call successors, (68) [2022-02-20 22:06:56,986 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:06:56,987 INFO L93 Difference]: Finished difference Result 437 states and 576 transitions. [2022-02-20 22:06:56,987 INFO L276 IsEmpty]: Start isEmpty. Operand 437 states and 576 transitions. [2022-02-20 22:06:56,988 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:06:56,988 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:06:56,989 INFO L74 IsIncluded]: Start isIncluded. First operand has 423 states, 322 states have (on average 1.279503105590062) internal successors, (412), 329 states have internal predecessors, (412), 72 states have call successors, (72), 29 states have call predecessors, (72), 28 states have return successors, (68), 68 states have call predecessors, (68), 68 states have call successors, (68) Second operand 437 states. [2022-02-20 22:06:56,992 INFO L87 Difference]: Start difference. First operand has 423 states, 322 states have (on average 1.279503105590062) internal successors, (412), 329 states have internal predecessors, (412), 72 states have call successors, (72), 29 states have call predecessors, (72), 28 states have return successors, (68), 68 states have call predecessors, (68), 68 states have call successors, (68) Second operand 437 states. [2022-02-20 22:06:57,006 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:06:57,006 INFO L93 Difference]: Finished difference Result 437 states and 576 transitions. [2022-02-20 22:06:57,006 INFO L276 IsEmpty]: Start isEmpty. Operand 437 states and 576 transitions. [2022-02-20 22:06:57,008 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:06:57,008 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:06:57,008 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 22:06:57,008 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 22:06:57,009 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 423 states, 322 states have (on average 1.279503105590062) internal successors, (412), 329 states have internal predecessors, (412), 72 states have call successors, (72), 29 states have call predecessors, (72), 28 states have return successors, (68), 68 states have call predecessors, (68), 68 states have call successors, (68) [2022-02-20 22:06:57,032 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 423 states to 423 states and 552 transitions. [2022-02-20 22:06:57,032 INFO L78 Accepts]: Start accepts. Automaton has 423 states and 552 transitions. Word has length 32 [2022-02-20 22:06:57,033 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 22:06:57,033 INFO L470 AbstractCegarLoop]: Abstraction has 423 states and 552 transitions. [2022-02-20 22:06:57,033 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 5.0) internal successors, (25), 3 states have internal predecessors, (25), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-02-20 22:06:57,033 INFO L276 IsEmpty]: Start isEmpty. Operand 423 states and 552 transitions. [2022-02-20 22:06:57,034 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2022-02-20 22:06:57,034 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:06:57,035 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:06:57,035 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-02-20 22:06:57,035 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:06:57,039 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:06:57,039 INFO L85 PathProgramCache]: Analyzing trace with hash 1956153286, now seen corresponding path program 1 times [2022-02-20 22:06:57,039 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:06:57,039 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1317130841] [2022-02-20 22:06:57,040 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:06:57,040 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:06:57,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:06:57,113 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 22:06:57,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:06:57,138 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:06:57,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:06:57,148 INFO L290 TraceCheckUtils]: 0: Hoare triple {4240#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {4199#true} is VALID [2022-02-20 22:06:57,149 INFO L290 TraceCheckUtils]: 1: Hoare triple {4199#true} assume true; {4199#true} is VALID [2022-02-20 22:06:57,150 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4199#true} {4199#true} #547#return; {4199#true} is VALID [2022-02-20 22:06:57,150 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:06:57,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:06:57,157 INFO L290 TraceCheckUtils]: 0: Hoare triple {4199#true} ~cond := #in~cond; {4199#true} is VALID [2022-02-20 22:06:57,158 INFO L290 TraceCheckUtils]: 1: Hoare triple {4199#true} assume !(0 == ~cond); {4199#true} is VALID [2022-02-20 22:06:57,160 INFO L290 TraceCheckUtils]: 2: Hoare triple {4199#true} assume true; {4199#true} is VALID [2022-02-20 22:06:57,160 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4199#true} {4199#true} #549#return; {4199#true} is VALID [2022-02-20 22:06:57,180 INFO L290 TraceCheckUtils]: 0: Hoare triple {4232#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {4199#true} is VALID [2022-02-20 22:06:57,183 INFO L272 TraceCheckUtils]: 1: Hoare triple {4199#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {4240#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:06:57,184 INFO L290 TraceCheckUtils]: 2: Hoare triple {4240#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {4199#true} is VALID [2022-02-20 22:06:57,197 INFO L290 TraceCheckUtils]: 3: Hoare triple {4199#true} assume true; {4199#true} is VALID [2022-02-20 22:06:57,197 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {4199#true} {4199#true} #547#return; {4199#true} is VALID [2022-02-20 22:06:57,198 INFO L290 TraceCheckUtils]: 5: Hoare triple {4199#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {4199#true} is VALID [2022-02-20 22:06:57,198 INFO L272 TraceCheckUtils]: 6: Hoare triple {4199#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {4199#true} is VALID [2022-02-20 22:06:57,198 INFO L290 TraceCheckUtils]: 7: Hoare triple {4199#true} ~cond := #in~cond; {4199#true} is VALID [2022-02-20 22:06:57,198 INFO L290 TraceCheckUtils]: 8: Hoare triple {4199#true} assume !(0 == ~cond); {4199#true} is VALID [2022-02-20 22:06:57,198 INFO L290 TraceCheckUtils]: 9: Hoare triple {4199#true} assume true; {4199#true} is VALID [2022-02-20 22:06:57,199 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {4199#true} {4199#true} #549#return; {4199#true} is VALID [2022-02-20 22:06:57,199 INFO L290 TraceCheckUtils]: 11: Hoare triple {4199#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {4199#true} is VALID [2022-02-20 22:06:57,199 INFO L290 TraceCheckUtils]: 12: Hoare triple {4199#true} assume true; {4199#true} is VALID [2022-02-20 22:06:57,199 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {4199#true} {4199#true} #553#return; {4199#true} is VALID [2022-02-20 22:06:57,200 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 27 [2022-02-20 22:06:57,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:06:57,215 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:06:57,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:06:57,222 INFO L290 TraceCheckUtils]: 0: Hoare triple {4240#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {4199#true} is VALID [2022-02-20 22:06:57,222 INFO L290 TraceCheckUtils]: 1: Hoare triple {4199#true} assume true; {4199#true} is VALID [2022-02-20 22:06:57,222 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4199#true} {4199#true} #547#return; {4199#true} is VALID [2022-02-20 22:06:57,222 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:06:57,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:06:57,235 INFO L290 TraceCheckUtils]: 0: Hoare triple {4199#true} ~cond := #in~cond; {4199#true} is VALID [2022-02-20 22:06:57,236 INFO L290 TraceCheckUtils]: 1: Hoare triple {4199#true} assume !(0 == ~cond); {4199#true} is VALID [2022-02-20 22:06:57,236 INFO L290 TraceCheckUtils]: 2: Hoare triple {4199#true} assume true; {4199#true} is VALID [2022-02-20 22:06:57,236 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4199#true} {4199#true} #549#return; {4199#true} is VALID [2022-02-20 22:06:57,236 INFO L290 TraceCheckUtils]: 0: Hoare triple {4232#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {4199#true} is VALID [2022-02-20 22:06:57,237 INFO L272 TraceCheckUtils]: 1: Hoare triple {4199#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {4240#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:06:57,237 INFO L290 TraceCheckUtils]: 2: Hoare triple {4240#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {4199#true} is VALID [2022-02-20 22:06:57,238 INFO L290 TraceCheckUtils]: 3: Hoare triple {4199#true} assume true; {4199#true} is VALID [2022-02-20 22:06:57,238 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {4199#true} {4199#true} #547#return; {4199#true} is VALID [2022-02-20 22:06:57,238 INFO L290 TraceCheckUtils]: 5: Hoare triple {4199#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {4199#true} is VALID [2022-02-20 22:06:57,238 INFO L272 TraceCheckUtils]: 6: Hoare triple {4199#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {4199#true} is VALID [2022-02-20 22:06:57,238 INFO L290 TraceCheckUtils]: 7: Hoare triple {4199#true} ~cond := #in~cond; {4199#true} is VALID [2022-02-20 22:06:57,238 INFO L290 TraceCheckUtils]: 8: Hoare triple {4199#true} assume !(0 == ~cond); {4199#true} is VALID [2022-02-20 22:06:57,239 INFO L290 TraceCheckUtils]: 9: Hoare triple {4199#true} assume true; {4199#true} is VALID [2022-02-20 22:06:57,239 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {4199#true} {4199#true} #549#return; {4199#true} is VALID [2022-02-20 22:06:57,239 INFO L290 TraceCheckUtils]: 11: Hoare triple {4199#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {4199#true} is VALID [2022-02-20 22:06:57,239 INFO L290 TraceCheckUtils]: 12: Hoare triple {4199#true} assume true; {4199#true} is VALID [2022-02-20 22:06:57,239 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {4199#true} {4199#true} #611#return; {4199#true} is VALID [2022-02-20 22:06:57,240 INFO L290 TraceCheckUtils]: 0: Hoare triple {4199#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(99, 2);call #Ultimate.allocInit(10, 3);call #Ultimate.allocInit(7, 4);call write~init~int(97, 4, 0, 1);call write~init~int(99, 4, 1, 1);call write~init~int(101, 4, 2, 1);call write~init~int(99, 4, 3, 1);call write~init~int(97, 4, 4, 1);call write~init~int(100, 4, 5, 1);call write~init~int(0, 4, 6, 1);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(20, 6);call #Ultimate.allocInit(57, 7);call #Ultimate.allocInit(2, 8);call write~init~int(32, 8, 0, 1);call write~init~int(0, 8, 1, 1);call #Ultimate.allocInit(8, 9);call #Ultimate.allocInit(34, 10);call #Ultimate.allocInit(32, 11);call #Ultimate.allocInit(11, 12);call #Ultimate.allocInit(48, 13);~LDV_IN_INTERRUPT~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset := 14, 0;call #Ultimate.allocInit(72, 14);call write~init~int(3, ~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 2 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(4, ~#usb_acecad_id_table~0.base, 4 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 6 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 8 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 10 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 11 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 12 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 13 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 14 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 15 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 16 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(3, ~#usb_acecad_id_table~0.base, 24 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 26 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(8, ~#usb_acecad_id_table~0.base, 28 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 30 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 32 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 34 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 35 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 36 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 37 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 38 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 39 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(1, ~#usb_acecad_id_table~0.base, 40 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(0, ~#usb_acecad_id_table~0.base, 48 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 50 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 52 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 54 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 56 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 58 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 59 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 60 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 61 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 62 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 63 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 64 + ~#usb_acecad_id_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.driver_info := 0;~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset := 15, 0;call #Ultimate.allocInit(264, 15);call write~init~$Pointer$(12, 0, ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_probe.base, #funAddr~usb_acecad_probe.offset, ~#usb_acecad_driver~0.base, 8 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_disconnect.base, #funAddr~usb_acecad_disconnect.offset, ~#usb_acecad_driver~0.base, 16 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 24 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 32 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 40 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 48 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 56 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 64 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, ~#usb_acecad_driver~0.base, 72 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 80 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 84 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 88 + ~#usb_acecad_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 92 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 100 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 108 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 116 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 124 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 132 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 136 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 144 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 152 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 160 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 168 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 176 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 184 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 192 + ~#usb_acecad_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 193 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 201 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 209 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 217 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 225 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 233 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 241 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 249 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 257 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 261 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 262 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 263 + ~#usb_acecad_driver~0.offset, 1);~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~URB_STATE~0 := 0;~DEV_STATE~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~int_urb~0.base, ~int_urb~0.offset := 0, 0;~bulk_urb~0.base, ~bulk_urb~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {4199#true} is VALID [2022-02-20 22:06:57,240 INFO L290 TraceCheckUtils]: 1: Hoare triple {4199#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret186#1.base, main_#t~ret186#1.offset, main_#t~nondet187#1, main_#t~switch188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~ret191#1, main_#t~nondet192#1, main_#t~switch193#1, main_#t~ret194#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~17#1.base, main_~tmp~17#1.offset, main_~tmp___0~6#1, main_~tmp___1~3#1, main_~tmp___2~1#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~17#1.base, main_~tmp~17#1.offset;havoc main_~tmp___0~6#1;havoc main_~tmp___1~3#1;havoc main_~tmp___2~1#1; {4199#true} is VALID [2022-02-20 22:06:57,241 INFO L272 TraceCheckUtils]: 2: Hoare triple {4199#true} call main_#t~ret186#1.base, main_#t~ret186#1.offset := ldv_init_zalloc(24); {4232#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:06:57,241 INFO L290 TraceCheckUtils]: 3: Hoare triple {4232#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {4199#true} is VALID [2022-02-20 22:06:57,241 INFO L272 TraceCheckUtils]: 4: Hoare triple {4199#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {4240#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:06:57,242 INFO L290 TraceCheckUtils]: 5: Hoare triple {4240#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {4199#true} is VALID [2022-02-20 22:06:57,242 INFO L290 TraceCheckUtils]: 6: Hoare triple {4199#true} assume true; {4199#true} is VALID [2022-02-20 22:06:57,242 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {4199#true} {4199#true} #547#return; {4199#true} is VALID [2022-02-20 22:06:57,242 INFO L290 TraceCheckUtils]: 8: Hoare triple {4199#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {4199#true} is VALID [2022-02-20 22:06:57,242 INFO L272 TraceCheckUtils]: 9: Hoare triple {4199#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {4199#true} is VALID [2022-02-20 22:06:57,242 INFO L290 TraceCheckUtils]: 10: Hoare triple {4199#true} ~cond := #in~cond; {4199#true} is VALID [2022-02-20 22:06:57,243 INFO L290 TraceCheckUtils]: 11: Hoare triple {4199#true} assume !(0 == ~cond); {4199#true} is VALID [2022-02-20 22:06:57,243 INFO L290 TraceCheckUtils]: 12: Hoare triple {4199#true} assume true; {4199#true} is VALID [2022-02-20 22:06:57,243 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {4199#true} {4199#true} #549#return; {4199#true} is VALID [2022-02-20 22:06:57,243 INFO L290 TraceCheckUtils]: 14: Hoare triple {4199#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {4199#true} is VALID [2022-02-20 22:06:57,243 INFO L290 TraceCheckUtils]: 15: Hoare triple {4199#true} assume true; {4199#true} is VALID [2022-02-20 22:06:57,244 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {4199#true} {4199#true} #553#return; {4199#true} is VALID [2022-02-20 22:06:57,244 INFO L290 TraceCheckUtils]: 17: Hoare triple {4199#true} main_~tmp~17#1.base, main_~tmp~17#1.offset := main_#t~ret186#1.base, main_#t~ret186#1.offset;havoc main_#t~ret186#1.base, main_#t~ret186#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~17#1.base, main_~tmp~17#1.offset;assume { :begin_inline_ldv_initialize } true; {4199#true} is VALID [2022-02-20 22:06:57,244 INFO L290 TraceCheckUtils]: 18: Hoare triple {4199#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1; {4199#true} is VALID [2022-02-20 22:06:57,244 INFO L290 TraceCheckUtils]: 19: Hoare triple {4199#true} assume -2147483648 <= main_#t~nondet187#1 && main_#t~nondet187#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet187#1;havoc main_#t~nondet187#1;main_#t~switch188#1 := 0 == main_~tmp___0~6#1; {4199#true} is VALID [2022-02-20 22:06:57,244 INFO L290 TraceCheckUtils]: 20: Hoare triple {4199#true} assume !main_#t~switch188#1;main_#t~switch188#1 := main_#t~switch188#1 || 1 == main_~tmp___0~6#1; {4199#true} is VALID [2022-02-20 22:06:57,244 INFO L290 TraceCheckUtils]: 21: Hoare triple {4199#true} assume main_#t~switch188#1; {4199#true} is VALID [2022-02-20 22:06:57,245 INFO L290 TraceCheckUtils]: 22: Hoare triple {4199#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet192#1 && main_#t~nondet192#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet192#1;havoc main_#t~nondet192#1;main_#t~switch193#1 := 0 == main_~tmp___2~1#1; {4199#true} is VALID [2022-02-20 22:06:57,245 INFO L290 TraceCheckUtils]: 23: Hoare triple {4199#true} assume !main_#t~switch193#1;main_#t~switch193#1 := main_#t~switch193#1 || 1 == main_~tmp___2~1#1; {4199#true} is VALID [2022-02-20 22:06:57,245 INFO L290 TraceCheckUtils]: 24: Hoare triple {4199#true} assume main_#t~switch193#1; {4199#true} is VALID [2022-02-20 22:06:57,245 INFO L290 TraceCheckUtils]: 25: Hoare triple {4199#true} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_usb_acecad_init } true;havoc usb_acecad_init_#res#1;havoc usb_acecad_init_#t~ret183#1, usb_acecad_init_#t~nondet184#1, usb_acecad_init_~result~0#1, usb_acecad_init_~tmp~15#1;havoc usb_acecad_init_~result~0#1;havoc usb_acecad_init_~tmp~15#1;assume { :begin_inline_usb_register } true;usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc usb_register_#res#1;havoc usb_register_#t~ret31#1, usb_register_~driver#1.base, usb_register_~driver#1.offset, usb_register_~tmp~1#1;usb_register_~driver#1.base, usb_register_~driver#1.offset := usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset;havoc usb_register_~tmp~1#1;assume { :begin_inline_ldv_usb_register_driver_2 } true;ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset := usb_register_~driver#1.base, usb_register_~driver#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 4, 0;havoc ldv_usb_register_driver_2_#res#1;havoc ldv_usb_register_driver_2_#t~ret196#1, ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset, ldv_usb_register_driver_2_~ldv_func_res~0#1, ldv_usb_register_driver_2_~tmp~19#1;ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_2_~ldv_func_res~0#1;havoc ldv_usb_register_driver_2_~tmp~19#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet217#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet217#1 && usb_register_driver_#t~nondet217#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet217#1;havoc usb_register_driver_#t~nondet217#1; {4199#true} is VALID [2022-02-20 22:06:57,245 INFO L290 TraceCheckUtils]: 26: Hoare triple {4199#true} ldv_usb_register_driver_2_#t~ret196#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_2_#t~ret196#1 && ldv_usb_register_driver_2_#t~ret196#1 <= 2147483647;ldv_usb_register_driver_2_~tmp~19#1 := ldv_usb_register_driver_2_#t~ret196#1;havoc ldv_usb_register_driver_2_#t~ret196#1;ldv_usb_register_driver_2_~ldv_func_res~0#1 := ldv_usb_register_driver_2_~tmp~19#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset, ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset;havoc ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {4199#true} is VALID [2022-02-20 22:06:57,246 INFO L272 TraceCheckUtils]: 27: Hoare triple {4199#true} call ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset := ldv_init_zalloc(1248); {4232#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:06:57,246 INFO L290 TraceCheckUtils]: 28: Hoare triple {4232#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {4199#true} is VALID [2022-02-20 22:06:57,247 INFO L272 TraceCheckUtils]: 29: Hoare triple {4199#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {4240#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:06:57,247 INFO L290 TraceCheckUtils]: 30: Hoare triple {4240#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {4199#true} is VALID [2022-02-20 22:06:57,247 INFO L290 TraceCheckUtils]: 31: Hoare triple {4199#true} assume true; {4199#true} is VALID [2022-02-20 22:06:57,248 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {4199#true} {4199#true} #547#return; {4199#true} is VALID [2022-02-20 22:06:57,248 INFO L290 TraceCheckUtils]: 33: Hoare triple {4199#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {4199#true} is VALID [2022-02-20 22:06:57,248 INFO L272 TraceCheckUtils]: 34: Hoare triple {4199#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {4199#true} is VALID [2022-02-20 22:06:57,248 INFO L290 TraceCheckUtils]: 35: Hoare triple {4199#true} ~cond := #in~cond; {4199#true} is VALID [2022-02-20 22:06:57,248 INFO L290 TraceCheckUtils]: 36: Hoare triple {4199#true} assume !(0 == ~cond); {4199#true} is VALID [2022-02-20 22:06:57,248 INFO L290 TraceCheckUtils]: 37: Hoare triple {4199#true} assume true; {4199#true} is VALID [2022-02-20 22:06:57,249 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {4199#true} {4199#true} #549#return; {4199#true} is VALID [2022-02-20 22:06:57,249 INFO L290 TraceCheckUtils]: 39: Hoare triple {4199#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {4199#true} is VALID [2022-02-20 22:06:57,249 INFO L290 TraceCheckUtils]: 40: Hoare triple {4199#true} assume true; {4199#true} is VALID [2022-02-20 22:06:57,249 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {4199#true} {4199#true} #611#return; {4199#true} is VALID [2022-02-20 22:06:57,249 INFO L290 TraceCheckUtils]: 42: Hoare triple {4199#true} ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset := ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset;havoc ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {4199#true} is VALID [2022-02-20 22:06:57,249 INFO L290 TraceCheckUtils]: 43: Hoare triple {4199#true} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_2_#res#1 := ldv_usb_register_driver_2_~ldv_func_res~0#1; {4199#true} is VALID [2022-02-20 22:06:57,250 INFO L290 TraceCheckUtils]: 44: Hoare triple {4199#true} usb_register_#t~ret31#1 := ldv_usb_register_driver_2_#res#1;assume { :end_inline_ldv_usb_register_driver_2 } true;assume -2147483648 <= usb_register_#t~ret31#1 && usb_register_#t~ret31#1 <= 2147483647;usb_register_~tmp~1#1 := usb_register_#t~ret31#1;havoc usb_register_#t~ret31#1;usb_register_#res#1 := usb_register_~tmp~1#1; {4199#true} is VALID [2022-02-20 22:06:57,250 INFO L290 TraceCheckUtils]: 45: Hoare triple {4199#true} usb_acecad_init_#t~ret183#1 := usb_register_#res#1;assume { :end_inline_usb_register } true;assume -2147483648 <= usb_acecad_init_#t~ret183#1 && usb_acecad_init_#t~ret183#1 <= 2147483647;usb_acecad_init_~tmp~15#1 := usb_acecad_init_#t~ret183#1;havoc usb_acecad_init_#t~ret183#1;usb_acecad_init_~result~0#1 := usb_acecad_init_~tmp~15#1; {4199#true} is VALID [2022-02-20 22:06:57,250 INFO L290 TraceCheckUtils]: 46: Hoare triple {4199#true} assume 0 == usb_acecad_init_~result~0#1;havoc usb_acecad_init_#t~nondet184#1; {4229#(= |ULTIMATE.start_usb_acecad_init_~result~0#1| 0)} is VALID [2022-02-20 22:06:57,251 INFO L290 TraceCheckUtils]: 47: Hoare triple {4229#(= |ULTIMATE.start_usb_acecad_init_~result~0#1| 0)} usb_acecad_init_#res#1 := usb_acecad_init_~result~0#1; {4230#(= |ULTIMATE.start_usb_acecad_init_#res#1| 0)} is VALID [2022-02-20 22:06:57,251 INFO L290 TraceCheckUtils]: 48: Hoare triple {4230#(= |ULTIMATE.start_usb_acecad_init_#res#1| 0)} main_#t~ret194#1 := usb_acecad_init_#res#1;assume { :end_inline_usb_acecad_init } true;assume -2147483648 <= main_#t~ret194#1 && main_#t~ret194#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret194#1;havoc main_#t~ret194#1; {4231#(= ~ldv_retval_1~0 0)} is VALID [2022-02-20 22:06:57,251 INFO L290 TraceCheckUtils]: 49: Hoare triple {4231#(= ~ldv_retval_1~0 0)} assume 0 == ~ldv_retval_1~0;~ldv_state_variable_0~0 := 3; {4231#(= ~ldv_retval_1~0 0)} is VALID [2022-02-20 22:06:57,252 INFO L290 TraceCheckUtils]: 50: Hoare triple {4231#(= ~ldv_retval_1~0 0)} assume 0 != ~ldv_retval_1~0;~ldv_state_variable_0~0 := 2; {4200#false} is VALID [2022-02-20 22:06:57,252 INFO L290 TraceCheckUtils]: 51: Hoare triple {4200#false} assume { :begin_inline_ldv_check_final_state } true; {4200#false} is VALID [2022-02-20 22:06:57,252 INFO L290 TraceCheckUtils]: 52: Hoare triple {4200#false} assume 0 != ~URB_STATE~0; {4200#false} is VALID [2022-02-20 22:06:57,252 INFO L272 TraceCheckUtils]: 53: Hoare triple {4200#false} call ldv_error(); {4200#false} is VALID [2022-02-20 22:06:57,252 INFO L290 TraceCheckUtils]: 54: Hoare triple {4200#false} assume !false; {4200#false} is VALID [2022-02-20 22:06:57,253 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2022-02-20 22:06:57,253 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:06:57,253 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1317130841] [2022-02-20 22:06:57,253 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1317130841] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:06:57,253 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 22:06:57,253 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-02-20 22:06:57,254 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [555995786] [2022-02-20 22:06:57,254 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:06:57,254 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 4.714285714285714) internal successors, (33), 5 states have internal predecessors, (33), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 55 [2022-02-20 22:06:57,255 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:06:57,255 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 4.714285714285714) internal successors, (33), 5 states have internal predecessors, (33), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 22:06:57,284 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 42 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:06:57,284 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-02-20 22:06:57,284 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:06:57,285 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-02-20 22:06:57,285 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2022-02-20 22:06:57,285 INFO L87 Difference]: Start difference. First operand 423 states and 552 transitions. Second operand has 7 states, 7 states have (on average 4.714285714285714) internal successors, (33), 5 states have internal predecessors, (33), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 22:06:59,600 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:06:59,601 INFO L93 Difference]: Finished difference Result 1000 states and 1346 transitions. [2022-02-20 22:06:59,601 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-02-20 22:06:59,601 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 4.714285714285714) internal successors, (33), 5 states have internal predecessors, (33), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 55 [2022-02-20 22:06:59,603 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 22:06:59,603 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 4.714285714285714) internal successors, (33), 5 states have internal predecessors, (33), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 22:06:59,609 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 832 transitions. [2022-02-20 22:06:59,610 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 4.714285714285714) internal successors, (33), 5 states have internal predecessors, (33), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 22:06:59,616 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 832 transitions. [2022-02-20 22:06:59,616 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 8 states and 832 transitions. [2022-02-20 22:07:00,189 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 832 edges. 832 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:00,206 INFO L225 Difference]: With dead ends: 1000 [2022-02-20 22:07:00,207 INFO L226 Difference]: Without dead ends: 592 [2022-02-20 22:07:00,208 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2022-02-20 22:07:00,208 INFO L933 BasicCegarLoop]: 459 mSDtfsCounter, 626 mSDsluCounter, 1077 mSDsCounter, 0 mSdLazyCounter, 426 mSolverCounterSat, 167 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 658 SdHoareTripleChecker+Valid, 1536 SdHoareTripleChecker+Invalid, 593 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 167 IncrementalHoareTripleChecker+Valid, 426 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-02-20 22:07:00,209 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [658 Valid, 1536 Invalid, 593 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [167 Valid, 426 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2022-02-20 22:07:00,210 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 592 states. [2022-02-20 22:07:00,225 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 592 to 426. [2022-02-20 22:07:00,225 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 22:07:00,231 INFO L82 GeneralOperation]: Start isEquivalent. First operand 592 states. Second operand has 426 states, 325 states have (on average 1.2738461538461539) internal successors, (414), 332 states have internal predecessors, (414), 72 states have call successors, (72), 29 states have call predecessors, (72), 28 states have return successors, (68), 68 states have call predecessors, (68), 68 states have call successors, (68) [2022-02-20 22:07:00,232 INFO L74 IsIncluded]: Start isIncluded. First operand 592 states. Second operand has 426 states, 325 states have (on average 1.2738461538461539) internal successors, (414), 332 states have internal predecessors, (414), 72 states have call successors, (72), 29 states have call predecessors, (72), 28 states have return successors, (68), 68 states have call predecessors, (68), 68 states have call successors, (68) [2022-02-20 22:07:00,233 INFO L87 Difference]: Start difference. First operand 592 states. Second operand has 426 states, 325 states have (on average 1.2738461538461539) internal successors, (414), 332 states have internal predecessors, (414), 72 states have call successors, (72), 29 states have call predecessors, (72), 28 states have return successors, (68), 68 states have call predecessors, (68), 68 states have call successors, (68) [2022-02-20 22:07:00,249 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:00,249 INFO L93 Difference]: Finished difference Result 592 states and 807 transitions. [2022-02-20 22:07:00,249 INFO L276 IsEmpty]: Start isEmpty. Operand 592 states and 807 transitions. [2022-02-20 22:07:00,251 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:00,251 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:00,253 INFO L74 IsIncluded]: Start isIncluded. First operand has 426 states, 325 states have (on average 1.2738461538461539) internal successors, (414), 332 states have internal predecessors, (414), 72 states have call successors, (72), 29 states have call predecessors, (72), 28 states have return successors, (68), 68 states have call predecessors, (68), 68 states have call successors, (68) Second operand 592 states. [2022-02-20 22:07:00,254 INFO L87 Difference]: Start difference. First operand has 426 states, 325 states have (on average 1.2738461538461539) internal successors, (414), 332 states have internal predecessors, (414), 72 states have call successors, (72), 29 states have call predecessors, (72), 28 states have return successors, (68), 68 states have call predecessors, (68), 68 states have call successors, (68) Second operand 592 states. [2022-02-20 22:07:00,269 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:00,269 INFO L93 Difference]: Finished difference Result 592 states and 807 transitions. [2022-02-20 22:07:00,269 INFO L276 IsEmpty]: Start isEmpty. Operand 592 states and 807 transitions. [2022-02-20 22:07:00,271 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:00,271 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:00,271 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 22:07:00,271 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 22:07:00,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 426 states, 325 states have (on average 1.2738461538461539) internal successors, (414), 332 states have internal predecessors, (414), 72 states have call successors, (72), 29 states have call predecessors, (72), 28 states have return successors, (68), 68 states have call predecessors, (68), 68 states have call successors, (68) [2022-02-20 22:07:00,282 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 426 states to 426 states and 554 transitions. [2022-02-20 22:07:00,283 INFO L78 Accepts]: Start accepts. Automaton has 426 states and 554 transitions. Word has length 55 [2022-02-20 22:07:00,284 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 22:07:00,284 INFO L470 AbstractCegarLoop]: Abstraction has 426 states and 554 transitions. [2022-02-20 22:07:00,286 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 4.714285714285714) internal successors, (33), 5 states have internal predecessors, (33), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 22:07:00,286 INFO L276 IsEmpty]: Start isEmpty. Operand 426 states and 554 transitions. [2022-02-20 22:07:00,289 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2022-02-20 22:07:00,289 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:07:00,289 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:07:00,289 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-02-20 22:07:00,290 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:07:00,294 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:07:00,294 INFO L85 PathProgramCache]: Analyzing trace with hash -1601497338, now seen corresponding path program 1 times [2022-02-20 22:07:00,295 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:07:00,295 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [413978030] [2022-02-20 22:07:00,295 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:07:00,295 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:07:00,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:00,356 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 22:07:00,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:00,371 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:00,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:00,377 INFO L290 TraceCheckUtils]: 0: Hoare triple {7519#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {7480#true} is VALID [2022-02-20 22:07:00,377 INFO L290 TraceCheckUtils]: 1: Hoare triple {7480#true} assume true; {7480#true} is VALID [2022-02-20 22:07:00,378 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {7480#true} {7480#true} #547#return; {7480#true} is VALID [2022-02-20 22:07:00,378 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:00,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:00,386 INFO L290 TraceCheckUtils]: 0: Hoare triple {7480#true} ~cond := #in~cond; {7480#true} is VALID [2022-02-20 22:07:00,386 INFO L290 TraceCheckUtils]: 1: Hoare triple {7480#true} assume !(0 == ~cond); {7480#true} is VALID [2022-02-20 22:07:00,386 INFO L290 TraceCheckUtils]: 2: Hoare triple {7480#true} assume true; {7480#true} is VALID [2022-02-20 22:07:00,386 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7480#true} {7480#true} #549#return; {7480#true} is VALID [2022-02-20 22:07:00,387 INFO L290 TraceCheckUtils]: 0: Hoare triple {7511#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {7480#true} is VALID [2022-02-20 22:07:00,387 INFO L272 TraceCheckUtils]: 1: Hoare triple {7480#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {7519#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:00,388 INFO L290 TraceCheckUtils]: 2: Hoare triple {7519#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {7480#true} is VALID [2022-02-20 22:07:00,388 INFO L290 TraceCheckUtils]: 3: Hoare triple {7480#true} assume true; {7480#true} is VALID [2022-02-20 22:07:00,388 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {7480#true} {7480#true} #547#return; {7480#true} is VALID [2022-02-20 22:07:00,388 INFO L290 TraceCheckUtils]: 5: Hoare triple {7480#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {7480#true} is VALID [2022-02-20 22:07:00,388 INFO L272 TraceCheckUtils]: 6: Hoare triple {7480#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {7480#true} is VALID [2022-02-20 22:07:00,388 INFO L290 TraceCheckUtils]: 7: Hoare triple {7480#true} ~cond := #in~cond; {7480#true} is VALID [2022-02-20 22:07:00,388 INFO L290 TraceCheckUtils]: 8: Hoare triple {7480#true} assume !(0 == ~cond); {7480#true} is VALID [2022-02-20 22:07:00,389 INFO L290 TraceCheckUtils]: 9: Hoare triple {7480#true} assume true; {7480#true} is VALID [2022-02-20 22:07:00,389 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {7480#true} {7480#true} #549#return; {7480#true} is VALID [2022-02-20 22:07:00,389 INFO L290 TraceCheckUtils]: 11: Hoare triple {7480#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {7480#true} is VALID [2022-02-20 22:07:00,389 INFO L290 TraceCheckUtils]: 12: Hoare triple {7480#true} assume true; {7480#true} is VALID [2022-02-20 22:07:00,390 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {7480#true} {7482#(= ~URB_STATE~0 0)} #553#return; {7482#(= ~URB_STATE~0 0)} is VALID [2022-02-20 22:07:00,390 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 27 [2022-02-20 22:07:00,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:00,399 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:00,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:00,403 INFO L290 TraceCheckUtils]: 0: Hoare triple {7519#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {7480#true} is VALID [2022-02-20 22:07:00,403 INFO L290 TraceCheckUtils]: 1: Hoare triple {7480#true} assume true; {7480#true} is VALID [2022-02-20 22:07:00,403 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {7480#true} {7480#true} #547#return; {7480#true} is VALID [2022-02-20 22:07:00,403 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:00,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:00,407 INFO L290 TraceCheckUtils]: 0: Hoare triple {7480#true} ~cond := #in~cond; {7480#true} is VALID [2022-02-20 22:07:00,407 INFO L290 TraceCheckUtils]: 1: Hoare triple {7480#true} assume !(0 == ~cond); {7480#true} is VALID [2022-02-20 22:07:00,408 INFO L290 TraceCheckUtils]: 2: Hoare triple {7480#true} assume true; {7480#true} is VALID [2022-02-20 22:07:00,408 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7480#true} {7480#true} #549#return; {7480#true} is VALID [2022-02-20 22:07:00,408 INFO L290 TraceCheckUtils]: 0: Hoare triple {7511#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {7480#true} is VALID [2022-02-20 22:07:00,409 INFO L272 TraceCheckUtils]: 1: Hoare triple {7480#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {7519#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:00,409 INFO L290 TraceCheckUtils]: 2: Hoare triple {7519#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {7480#true} is VALID [2022-02-20 22:07:00,409 INFO L290 TraceCheckUtils]: 3: Hoare triple {7480#true} assume true; {7480#true} is VALID [2022-02-20 22:07:00,409 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {7480#true} {7480#true} #547#return; {7480#true} is VALID [2022-02-20 22:07:00,409 INFO L290 TraceCheckUtils]: 5: Hoare triple {7480#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {7480#true} is VALID [2022-02-20 22:07:00,409 INFO L272 TraceCheckUtils]: 6: Hoare triple {7480#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {7480#true} is VALID [2022-02-20 22:07:00,410 INFO L290 TraceCheckUtils]: 7: Hoare triple {7480#true} ~cond := #in~cond; {7480#true} is VALID [2022-02-20 22:07:00,410 INFO L290 TraceCheckUtils]: 8: Hoare triple {7480#true} assume !(0 == ~cond); {7480#true} is VALID [2022-02-20 22:07:00,410 INFO L290 TraceCheckUtils]: 9: Hoare triple {7480#true} assume true; {7480#true} is VALID [2022-02-20 22:07:00,410 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {7480#true} {7480#true} #549#return; {7480#true} is VALID [2022-02-20 22:07:00,410 INFO L290 TraceCheckUtils]: 11: Hoare triple {7480#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {7480#true} is VALID [2022-02-20 22:07:00,410 INFO L290 TraceCheckUtils]: 12: Hoare triple {7480#true} assume true; {7480#true} is VALID [2022-02-20 22:07:00,423 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {7480#true} {7482#(= ~URB_STATE~0 0)} #611#return; {7482#(= ~URB_STATE~0 0)} is VALID [2022-02-20 22:07:00,425 INFO L290 TraceCheckUtils]: 0: Hoare triple {7480#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(99, 2);call #Ultimate.allocInit(10, 3);call #Ultimate.allocInit(7, 4);call write~init~int(97, 4, 0, 1);call write~init~int(99, 4, 1, 1);call write~init~int(101, 4, 2, 1);call write~init~int(99, 4, 3, 1);call write~init~int(97, 4, 4, 1);call write~init~int(100, 4, 5, 1);call write~init~int(0, 4, 6, 1);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(20, 6);call #Ultimate.allocInit(57, 7);call #Ultimate.allocInit(2, 8);call write~init~int(32, 8, 0, 1);call write~init~int(0, 8, 1, 1);call #Ultimate.allocInit(8, 9);call #Ultimate.allocInit(34, 10);call #Ultimate.allocInit(32, 11);call #Ultimate.allocInit(11, 12);call #Ultimate.allocInit(48, 13);~LDV_IN_INTERRUPT~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset := 14, 0;call #Ultimate.allocInit(72, 14);call write~init~int(3, ~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 2 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(4, ~#usb_acecad_id_table~0.base, 4 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 6 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 8 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 10 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 11 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 12 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 13 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 14 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 15 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 16 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(3, ~#usb_acecad_id_table~0.base, 24 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 26 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(8, ~#usb_acecad_id_table~0.base, 28 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 30 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 32 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 34 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 35 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 36 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 37 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 38 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 39 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(1, ~#usb_acecad_id_table~0.base, 40 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(0, ~#usb_acecad_id_table~0.base, 48 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 50 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 52 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 54 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 56 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 58 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 59 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 60 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 61 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 62 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 63 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 64 + ~#usb_acecad_id_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.driver_info := 0;~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset := 15, 0;call #Ultimate.allocInit(264, 15);call write~init~$Pointer$(12, 0, ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_probe.base, #funAddr~usb_acecad_probe.offset, ~#usb_acecad_driver~0.base, 8 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_disconnect.base, #funAddr~usb_acecad_disconnect.offset, ~#usb_acecad_driver~0.base, 16 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 24 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 32 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 40 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 48 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 56 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 64 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, ~#usb_acecad_driver~0.base, 72 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 80 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 84 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 88 + ~#usb_acecad_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 92 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 100 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 108 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 116 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 124 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 132 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 136 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 144 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 152 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 160 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 168 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 176 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 184 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 192 + ~#usb_acecad_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 193 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 201 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 209 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 217 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 225 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 233 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 241 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 249 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 257 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 261 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 262 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 263 + ~#usb_acecad_driver~0.offset, 1);~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~URB_STATE~0 := 0;~DEV_STATE~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~int_urb~0.base, ~int_urb~0.offset := 0, 0;~bulk_urb~0.base, ~bulk_urb~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {7482#(= ~URB_STATE~0 0)} is VALID [2022-02-20 22:07:00,426 INFO L290 TraceCheckUtils]: 1: Hoare triple {7482#(= ~URB_STATE~0 0)} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret186#1.base, main_#t~ret186#1.offset, main_#t~nondet187#1, main_#t~switch188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~ret191#1, main_#t~nondet192#1, main_#t~switch193#1, main_#t~ret194#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~17#1.base, main_~tmp~17#1.offset, main_~tmp___0~6#1, main_~tmp___1~3#1, main_~tmp___2~1#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~17#1.base, main_~tmp~17#1.offset;havoc main_~tmp___0~6#1;havoc main_~tmp___1~3#1;havoc main_~tmp___2~1#1; {7482#(= ~URB_STATE~0 0)} is VALID [2022-02-20 22:07:00,426 INFO L272 TraceCheckUtils]: 2: Hoare triple {7482#(= ~URB_STATE~0 0)} call main_#t~ret186#1.base, main_#t~ret186#1.offset := ldv_init_zalloc(24); {7511#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:00,427 INFO L290 TraceCheckUtils]: 3: Hoare triple {7511#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {7480#true} is VALID [2022-02-20 22:07:00,427 INFO L272 TraceCheckUtils]: 4: Hoare triple {7480#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {7519#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:00,427 INFO L290 TraceCheckUtils]: 5: Hoare triple {7519#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {7480#true} is VALID [2022-02-20 22:07:00,427 INFO L290 TraceCheckUtils]: 6: Hoare triple {7480#true} assume true; {7480#true} is VALID [2022-02-20 22:07:00,430 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {7480#true} {7480#true} #547#return; {7480#true} is VALID [2022-02-20 22:07:00,430 INFO L290 TraceCheckUtils]: 8: Hoare triple {7480#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {7480#true} is VALID [2022-02-20 22:07:00,432 INFO L272 TraceCheckUtils]: 9: Hoare triple {7480#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {7480#true} is VALID [2022-02-20 22:07:00,434 INFO L290 TraceCheckUtils]: 10: Hoare triple {7480#true} ~cond := #in~cond; {7480#true} is VALID [2022-02-20 22:07:00,434 INFO L290 TraceCheckUtils]: 11: Hoare triple {7480#true} assume !(0 == ~cond); {7480#true} is VALID [2022-02-20 22:07:00,434 INFO L290 TraceCheckUtils]: 12: Hoare triple {7480#true} assume true; {7480#true} is VALID [2022-02-20 22:07:00,434 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {7480#true} {7480#true} #549#return; {7480#true} is VALID [2022-02-20 22:07:00,434 INFO L290 TraceCheckUtils]: 14: Hoare triple {7480#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {7480#true} is VALID [2022-02-20 22:07:00,434 INFO L290 TraceCheckUtils]: 15: Hoare triple {7480#true} assume true; {7480#true} is VALID [2022-02-20 22:07:00,435 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {7480#true} {7482#(= ~URB_STATE~0 0)} #553#return; {7482#(= ~URB_STATE~0 0)} is VALID [2022-02-20 22:07:00,435 INFO L290 TraceCheckUtils]: 17: Hoare triple {7482#(= ~URB_STATE~0 0)} main_~tmp~17#1.base, main_~tmp~17#1.offset := main_#t~ret186#1.base, main_#t~ret186#1.offset;havoc main_#t~ret186#1.base, main_#t~ret186#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~17#1.base, main_~tmp~17#1.offset;assume { :begin_inline_ldv_initialize } true; {7482#(= ~URB_STATE~0 0)} is VALID [2022-02-20 22:07:00,436 INFO L290 TraceCheckUtils]: 18: Hoare triple {7482#(= ~URB_STATE~0 0)} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1; {7482#(= ~URB_STATE~0 0)} is VALID [2022-02-20 22:07:00,436 INFO L290 TraceCheckUtils]: 19: Hoare triple {7482#(= ~URB_STATE~0 0)} assume -2147483648 <= main_#t~nondet187#1 && main_#t~nondet187#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet187#1;havoc main_#t~nondet187#1;main_#t~switch188#1 := 0 == main_~tmp___0~6#1; {7482#(= ~URB_STATE~0 0)} is VALID [2022-02-20 22:07:00,436 INFO L290 TraceCheckUtils]: 20: Hoare triple {7482#(= ~URB_STATE~0 0)} assume !main_#t~switch188#1;main_#t~switch188#1 := main_#t~switch188#1 || 1 == main_~tmp___0~6#1; {7482#(= ~URB_STATE~0 0)} is VALID [2022-02-20 22:07:00,437 INFO L290 TraceCheckUtils]: 21: Hoare triple {7482#(= ~URB_STATE~0 0)} assume main_#t~switch188#1; {7482#(= ~URB_STATE~0 0)} is VALID [2022-02-20 22:07:00,437 INFO L290 TraceCheckUtils]: 22: Hoare triple {7482#(= ~URB_STATE~0 0)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet192#1 && main_#t~nondet192#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet192#1;havoc main_#t~nondet192#1;main_#t~switch193#1 := 0 == main_~tmp___2~1#1; {7482#(= ~URB_STATE~0 0)} is VALID [2022-02-20 22:07:00,437 INFO L290 TraceCheckUtils]: 23: Hoare triple {7482#(= ~URB_STATE~0 0)} assume !main_#t~switch193#1;main_#t~switch193#1 := main_#t~switch193#1 || 1 == main_~tmp___2~1#1; {7482#(= ~URB_STATE~0 0)} is VALID [2022-02-20 22:07:00,437 INFO L290 TraceCheckUtils]: 24: Hoare triple {7482#(= ~URB_STATE~0 0)} assume main_#t~switch193#1; {7482#(= ~URB_STATE~0 0)} is VALID [2022-02-20 22:07:00,438 INFO L290 TraceCheckUtils]: 25: Hoare triple {7482#(= ~URB_STATE~0 0)} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_usb_acecad_init } true;havoc usb_acecad_init_#res#1;havoc usb_acecad_init_#t~ret183#1, usb_acecad_init_#t~nondet184#1, usb_acecad_init_~result~0#1, usb_acecad_init_~tmp~15#1;havoc usb_acecad_init_~result~0#1;havoc usb_acecad_init_~tmp~15#1;assume { :begin_inline_usb_register } true;usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc usb_register_#res#1;havoc usb_register_#t~ret31#1, usb_register_~driver#1.base, usb_register_~driver#1.offset, usb_register_~tmp~1#1;usb_register_~driver#1.base, usb_register_~driver#1.offset := usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset;havoc usb_register_~tmp~1#1;assume { :begin_inline_ldv_usb_register_driver_2 } true;ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset := usb_register_~driver#1.base, usb_register_~driver#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 4, 0;havoc ldv_usb_register_driver_2_#res#1;havoc ldv_usb_register_driver_2_#t~ret196#1, ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset, ldv_usb_register_driver_2_~ldv_func_res~0#1, ldv_usb_register_driver_2_~tmp~19#1;ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_2_~ldv_func_res~0#1;havoc ldv_usb_register_driver_2_~tmp~19#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet217#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet217#1 && usb_register_driver_#t~nondet217#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet217#1;havoc usb_register_driver_#t~nondet217#1; {7482#(= ~URB_STATE~0 0)} is VALID [2022-02-20 22:07:00,438 INFO L290 TraceCheckUtils]: 26: Hoare triple {7482#(= ~URB_STATE~0 0)} ldv_usb_register_driver_2_#t~ret196#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_2_#t~ret196#1 && ldv_usb_register_driver_2_#t~ret196#1 <= 2147483647;ldv_usb_register_driver_2_~tmp~19#1 := ldv_usb_register_driver_2_#t~ret196#1;havoc ldv_usb_register_driver_2_#t~ret196#1;ldv_usb_register_driver_2_~ldv_func_res~0#1 := ldv_usb_register_driver_2_~tmp~19#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset, ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset;havoc ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {7482#(= ~URB_STATE~0 0)} is VALID [2022-02-20 22:07:00,438 INFO L272 TraceCheckUtils]: 27: Hoare triple {7482#(= ~URB_STATE~0 0)} call ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset := ldv_init_zalloc(1248); {7511#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:00,439 INFO L290 TraceCheckUtils]: 28: Hoare triple {7511#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {7480#true} is VALID [2022-02-20 22:07:00,439 INFO L272 TraceCheckUtils]: 29: Hoare triple {7480#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {7519#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:00,439 INFO L290 TraceCheckUtils]: 30: Hoare triple {7519#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {7480#true} is VALID [2022-02-20 22:07:00,439 INFO L290 TraceCheckUtils]: 31: Hoare triple {7480#true} assume true; {7480#true} is VALID [2022-02-20 22:07:00,440 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {7480#true} {7480#true} #547#return; {7480#true} is VALID [2022-02-20 22:07:00,440 INFO L290 TraceCheckUtils]: 33: Hoare triple {7480#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {7480#true} is VALID [2022-02-20 22:07:00,440 INFO L272 TraceCheckUtils]: 34: Hoare triple {7480#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {7480#true} is VALID [2022-02-20 22:07:00,440 INFO L290 TraceCheckUtils]: 35: Hoare triple {7480#true} ~cond := #in~cond; {7480#true} is VALID [2022-02-20 22:07:00,440 INFO L290 TraceCheckUtils]: 36: Hoare triple {7480#true} assume !(0 == ~cond); {7480#true} is VALID [2022-02-20 22:07:00,440 INFO L290 TraceCheckUtils]: 37: Hoare triple {7480#true} assume true; {7480#true} is VALID [2022-02-20 22:07:00,440 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {7480#true} {7480#true} #549#return; {7480#true} is VALID [2022-02-20 22:07:00,441 INFO L290 TraceCheckUtils]: 39: Hoare triple {7480#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {7480#true} is VALID [2022-02-20 22:07:00,441 INFO L290 TraceCheckUtils]: 40: Hoare triple {7480#true} assume true; {7480#true} is VALID [2022-02-20 22:07:00,441 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {7480#true} {7482#(= ~URB_STATE~0 0)} #611#return; {7482#(= ~URB_STATE~0 0)} is VALID [2022-02-20 22:07:00,441 INFO L290 TraceCheckUtils]: 42: Hoare triple {7482#(= ~URB_STATE~0 0)} ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset := ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset;havoc ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {7482#(= ~URB_STATE~0 0)} is VALID [2022-02-20 22:07:00,442 INFO L290 TraceCheckUtils]: 43: Hoare triple {7482#(= ~URB_STATE~0 0)} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_2_#res#1 := ldv_usb_register_driver_2_~ldv_func_res~0#1; {7482#(= ~URB_STATE~0 0)} is VALID [2022-02-20 22:07:00,442 INFO L290 TraceCheckUtils]: 44: Hoare triple {7482#(= ~URB_STATE~0 0)} usb_register_#t~ret31#1 := ldv_usb_register_driver_2_#res#1;assume { :end_inline_ldv_usb_register_driver_2 } true;assume -2147483648 <= usb_register_#t~ret31#1 && usb_register_#t~ret31#1 <= 2147483647;usb_register_~tmp~1#1 := usb_register_#t~ret31#1;havoc usb_register_#t~ret31#1;usb_register_#res#1 := usb_register_~tmp~1#1; {7482#(= ~URB_STATE~0 0)} is VALID [2022-02-20 22:07:00,442 INFO L290 TraceCheckUtils]: 45: Hoare triple {7482#(= ~URB_STATE~0 0)} usb_acecad_init_#t~ret183#1 := usb_register_#res#1;assume { :end_inline_usb_register } true;assume -2147483648 <= usb_acecad_init_#t~ret183#1 && usb_acecad_init_#t~ret183#1 <= 2147483647;usb_acecad_init_~tmp~15#1 := usb_acecad_init_#t~ret183#1;havoc usb_acecad_init_#t~ret183#1;usb_acecad_init_~result~0#1 := usb_acecad_init_~tmp~15#1; {7482#(= ~URB_STATE~0 0)} is VALID [2022-02-20 22:07:00,443 INFO L290 TraceCheckUtils]: 46: Hoare triple {7482#(= ~URB_STATE~0 0)} assume !(0 == usb_acecad_init_~result~0#1); {7482#(= ~URB_STATE~0 0)} is VALID [2022-02-20 22:07:00,443 INFO L290 TraceCheckUtils]: 47: Hoare triple {7482#(= ~URB_STATE~0 0)} usb_acecad_init_#res#1 := usb_acecad_init_~result~0#1; {7482#(= ~URB_STATE~0 0)} is VALID [2022-02-20 22:07:00,443 INFO L290 TraceCheckUtils]: 48: Hoare triple {7482#(= ~URB_STATE~0 0)} main_#t~ret194#1 := usb_acecad_init_#res#1;assume { :end_inline_usb_acecad_init } true;assume -2147483648 <= main_#t~ret194#1 && main_#t~ret194#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret194#1;havoc main_#t~ret194#1; {7482#(= ~URB_STATE~0 0)} is VALID [2022-02-20 22:07:00,443 INFO L290 TraceCheckUtils]: 49: Hoare triple {7482#(= ~URB_STATE~0 0)} assume !(0 == ~ldv_retval_1~0); {7482#(= ~URB_STATE~0 0)} is VALID [2022-02-20 22:07:00,444 INFO L290 TraceCheckUtils]: 50: Hoare triple {7482#(= ~URB_STATE~0 0)} assume 0 != ~ldv_retval_1~0;~ldv_state_variable_0~0 := 2; {7482#(= ~URB_STATE~0 0)} is VALID [2022-02-20 22:07:00,444 INFO L290 TraceCheckUtils]: 51: Hoare triple {7482#(= ~URB_STATE~0 0)} assume { :begin_inline_ldv_check_final_state } true; {7482#(= ~URB_STATE~0 0)} is VALID [2022-02-20 22:07:00,444 INFO L290 TraceCheckUtils]: 52: Hoare triple {7482#(= ~URB_STATE~0 0)} assume 0 != ~URB_STATE~0; {7481#false} is VALID [2022-02-20 22:07:00,444 INFO L272 TraceCheckUtils]: 53: Hoare triple {7481#false} call ldv_error(); {7481#false} is VALID [2022-02-20 22:07:00,445 INFO L290 TraceCheckUtils]: 54: Hoare triple {7481#false} assume !false; {7481#false} is VALID [2022-02-20 22:07:00,446 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2022-02-20 22:07:00,446 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:07:00,447 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [413978030] [2022-02-20 22:07:00,447 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [413978030] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:07:00,447 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 22:07:00,447 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-02-20 22:07:00,447 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1242656590] [2022-02-20 22:07:00,447 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:07:00,448 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 55 [2022-02-20 22:07:00,448 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:07:00,448 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 22:07:00,473 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 42 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:00,473 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-02-20 22:07:00,474 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:07:00,474 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-02-20 22:07:00,475 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-02-20 22:07:00,475 INFO L87 Difference]: Start difference. First operand 426 states and 554 transitions. Second operand has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 22:07:01,803 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:01,803 INFO L93 Difference]: Finished difference Result 1269 states and 1671 transitions. [2022-02-20 22:07:01,804 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-02-20 22:07:01,804 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 55 [2022-02-20 22:07:01,804 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 22:07:01,804 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 22:07:01,811 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 889 transitions. [2022-02-20 22:07:01,812 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 22:07:01,819 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 889 transitions. [2022-02-20 22:07:01,819 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 7 states and 889 transitions. [2022-02-20 22:07:02,408 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 889 edges. 889 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:02,444 INFO L225 Difference]: With dead ends: 1269 [2022-02-20 22:07:02,444 INFO L226 Difference]: Without dead ends: 858 [2022-02-20 22:07:02,445 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2022-02-20 22:07:02,445 INFO L933 BasicCegarLoop]: 383 mSDtfsCounter, 391 mSDsluCounter, 396 mSDsCounter, 0 mSdLazyCounter, 211 mSolverCounterSat, 157 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 425 SdHoareTripleChecker+Valid, 779 SdHoareTripleChecker+Invalid, 368 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 157 IncrementalHoareTripleChecker+Valid, 211 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-02-20 22:07:02,445 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [425 Valid, 779 Invalid, 368 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [157 Valid, 211 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-02-20 22:07:02,446 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 858 states. [2022-02-20 22:07:02,464 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 858 to 828. [2022-02-20 22:07:02,465 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 22:07:02,466 INFO L82 GeneralOperation]: Start isEquivalent. First operand 858 states. Second operand has 828 states, 636 states have (on average 1.2688679245283019) internal successors, (807), 647 states have internal predecessors, (807), 137 states have call successors, (137), 55 states have call predecessors, (137), 54 states have return successors, (133), 133 states have call predecessors, (133), 133 states have call successors, (133) [2022-02-20 22:07:02,467 INFO L74 IsIncluded]: Start isIncluded. First operand 858 states. Second operand has 828 states, 636 states have (on average 1.2688679245283019) internal successors, (807), 647 states have internal predecessors, (807), 137 states have call successors, (137), 55 states have call predecessors, (137), 54 states have return successors, (133), 133 states have call predecessors, (133), 133 states have call successors, (133) [2022-02-20 22:07:02,469 INFO L87 Difference]: Start difference. First operand 858 states. Second operand has 828 states, 636 states have (on average 1.2688679245283019) internal successors, (807), 647 states have internal predecessors, (807), 137 states have call successors, (137), 55 states have call predecessors, (137), 54 states have return successors, (133), 133 states have call predecessors, (133), 133 states have call successors, (133) [2022-02-20 22:07:02,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:02,496 INFO L93 Difference]: Finished difference Result 858 states and 1126 transitions. [2022-02-20 22:07:02,496 INFO L276 IsEmpty]: Start isEmpty. Operand 858 states and 1126 transitions. [2022-02-20 22:07:02,497 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:02,498 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:02,499 INFO L74 IsIncluded]: Start isIncluded. First operand has 828 states, 636 states have (on average 1.2688679245283019) internal successors, (807), 647 states have internal predecessors, (807), 137 states have call successors, (137), 55 states have call predecessors, (137), 54 states have return successors, (133), 133 states have call predecessors, (133), 133 states have call successors, (133) Second operand 858 states. [2022-02-20 22:07:02,500 INFO L87 Difference]: Start difference. First operand has 828 states, 636 states have (on average 1.2688679245283019) internal successors, (807), 647 states have internal predecessors, (807), 137 states have call successors, (137), 55 states have call predecessors, (137), 54 states have return successors, (133), 133 states have call predecessors, (133), 133 states have call successors, (133) Second operand 858 states. [2022-02-20 22:07:02,527 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:02,527 INFO L93 Difference]: Finished difference Result 858 states and 1126 transitions. [2022-02-20 22:07:02,528 INFO L276 IsEmpty]: Start isEmpty. Operand 858 states and 1126 transitions. [2022-02-20 22:07:02,529 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:02,529 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:02,529 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 22:07:02,529 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 22:07:02,531 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 828 states, 636 states have (on average 1.2688679245283019) internal successors, (807), 647 states have internal predecessors, (807), 137 states have call successors, (137), 55 states have call predecessors, (137), 54 states have return successors, (133), 133 states have call predecessors, (133), 133 states have call successors, (133) [2022-02-20 22:07:02,570 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 828 states to 828 states and 1077 transitions. [2022-02-20 22:07:02,571 INFO L78 Accepts]: Start accepts. Automaton has 828 states and 1077 transitions. Word has length 55 [2022-02-20 22:07:02,571 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 22:07:02,571 INFO L470 AbstractCegarLoop]: Abstraction has 828 states and 1077 transitions. [2022-02-20 22:07:02,571 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 22:07:02,571 INFO L276 IsEmpty]: Start isEmpty. Operand 828 states and 1077 transitions. [2022-02-20 22:07:02,572 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2022-02-20 22:07:02,572 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:07:02,572 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:07:02,572 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-02-20 22:07:02,572 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:07:02,573 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:07:02,573 INFO L85 PathProgramCache]: Analyzing trace with hash 1893200283, now seen corresponding path program 1 times [2022-02-20 22:07:02,573 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:07:02,573 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1658533900] [2022-02-20 22:07:02,573 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:07:02,573 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:07:02,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:02,631 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 22:07:02,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:02,648 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:02,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:02,659 INFO L290 TraceCheckUtils]: 0: Hoare triple {12278#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {12239#true} is VALID [2022-02-20 22:07:02,659 INFO L290 TraceCheckUtils]: 1: Hoare triple {12239#true} assume true; {12239#true} is VALID [2022-02-20 22:07:02,660 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {12239#true} {12239#true} #547#return; {12239#true} is VALID [2022-02-20 22:07:02,660 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:02,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:02,664 INFO L290 TraceCheckUtils]: 0: Hoare triple {12239#true} ~cond := #in~cond; {12239#true} is VALID [2022-02-20 22:07:02,665 INFO L290 TraceCheckUtils]: 1: Hoare triple {12239#true} assume !(0 == ~cond); {12239#true} is VALID [2022-02-20 22:07:02,665 INFO L290 TraceCheckUtils]: 2: Hoare triple {12239#true} assume true; {12239#true} is VALID [2022-02-20 22:07:02,665 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12239#true} {12239#true} #549#return; {12239#true} is VALID [2022-02-20 22:07:02,665 INFO L290 TraceCheckUtils]: 0: Hoare triple {12270#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {12239#true} is VALID [2022-02-20 22:07:02,666 INFO L272 TraceCheckUtils]: 1: Hoare triple {12239#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {12278#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:02,666 INFO L290 TraceCheckUtils]: 2: Hoare triple {12278#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {12239#true} is VALID [2022-02-20 22:07:02,666 INFO L290 TraceCheckUtils]: 3: Hoare triple {12239#true} assume true; {12239#true} is VALID [2022-02-20 22:07:02,666 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {12239#true} {12239#true} #547#return; {12239#true} is VALID [2022-02-20 22:07:02,666 INFO L290 TraceCheckUtils]: 5: Hoare triple {12239#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {12239#true} is VALID [2022-02-20 22:07:02,666 INFO L272 TraceCheckUtils]: 6: Hoare triple {12239#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {12239#true} is VALID [2022-02-20 22:07:02,667 INFO L290 TraceCheckUtils]: 7: Hoare triple {12239#true} ~cond := #in~cond; {12239#true} is VALID [2022-02-20 22:07:02,667 INFO L290 TraceCheckUtils]: 8: Hoare triple {12239#true} assume !(0 == ~cond); {12239#true} is VALID [2022-02-20 22:07:02,667 INFO L290 TraceCheckUtils]: 9: Hoare triple {12239#true} assume true; {12239#true} is VALID [2022-02-20 22:07:02,667 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {12239#true} {12239#true} #549#return; {12239#true} is VALID [2022-02-20 22:07:02,667 INFO L290 TraceCheckUtils]: 11: Hoare triple {12239#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {12239#true} is VALID [2022-02-20 22:07:02,667 INFO L290 TraceCheckUtils]: 12: Hoare triple {12239#true} assume true; {12239#true} is VALID [2022-02-20 22:07:02,668 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {12239#true} {12241#(= ~DEV_STATE~0 0)} #553#return; {12241#(= ~DEV_STATE~0 0)} is VALID [2022-02-20 22:07:02,668 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 27 [2022-02-20 22:07:02,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:02,681 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:02,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:02,687 INFO L290 TraceCheckUtils]: 0: Hoare triple {12278#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {12239#true} is VALID [2022-02-20 22:07:02,687 INFO L290 TraceCheckUtils]: 1: Hoare triple {12239#true} assume true; {12239#true} is VALID [2022-02-20 22:07:02,687 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {12239#true} {12239#true} #547#return; {12239#true} is VALID [2022-02-20 22:07:02,687 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:02,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:02,694 INFO L290 TraceCheckUtils]: 0: Hoare triple {12239#true} ~cond := #in~cond; {12239#true} is VALID [2022-02-20 22:07:02,695 INFO L290 TraceCheckUtils]: 1: Hoare triple {12239#true} assume !(0 == ~cond); {12239#true} is VALID [2022-02-20 22:07:02,695 INFO L290 TraceCheckUtils]: 2: Hoare triple {12239#true} assume true; {12239#true} is VALID [2022-02-20 22:07:02,695 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12239#true} {12239#true} #549#return; {12239#true} is VALID [2022-02-20 22:07:02,695 INFO L290 TraceCheckUtils]: 0: Hoare triple {12270#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {12239#true} is VALID [2022-02-20 22:07:02,696 INFO L272 TraceCheckUtils]: 1: Hoare triple {12239#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {12278#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:02,696 INFO L290 TraceCheckUtils]: 2: Hoare triple {12278#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {12239#true} is VALID [2022-02-20 22:07:02,696 INFO L290 TraceCheckUtils]: 3: Hoare triple {12239#true} assume true; {12239#true} is VALID [2022-02-20 22:07:02,696 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {12239#true} {12239#true} #547#return; {12239#true} is VALID [2022-02-20 22:07:02,697 INFO L290 TraceCheckUtils]: 5: Hoare triple {12239#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {12239#true} is VALID [2022-02-20 22:07:02,697 INFO L272 TraceCheckUtils]: 6: Hoare triple {12239#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {12239#true} is VALID [2022-02-20 22:07:02,697 INFO L290 TraceCheckUtils]: 7: Hoare triple {12239#true} ~cond := #in~cond; {12239#true} is VALID [2022-02-20 22:07:02,697 INFO L290 TraceCheckUtils]: 8: Hoare triple {12239#true} assume !(0 == ~cond); {12239#true} is VALID [2022-02-20 22:07:02,697 INFO L290 TraceCheckUtils]: 9: Hoare triple {12239#true} assume true; {12239#true} is VALID [2022-02-20 22:07:02,697 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {12239#true} {12239#true} #549#return; {12239#true} is VALID [2022-02-20 22:07:02,697 INFO L290 TraceCheckUtils]: 11: Hoare triple {12239#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {12239#true} is VALID [2022-02-20 22:07:02,698 INFO L290 TraceCheckUtils]: 12: Hoare triple {12239#true} assume true; {12239#true} is VALID [2022-02-20 22:07:02,698 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {12239#true} {12241#(= ~DEV_STATE~0 0)} #611#return; {12241#(= ~DEV_STATE~0 0)} is VALID [2022-02-20 22:07:02,699 INFO L290 TraceCheckUtils]: 0: Hoare triple {12239#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(99, 2);call #Ultimate.allocInit(10, 3);call #Ultimate.allocInit(7, 4);call write~init~int(97, 4, 0, 1);call write~init~int(99, 4, 1, 1);call write~init~int(101, 4, 2, 1);call write~init~int(99, 4, 3, 1);call write~init~int(97, 4, 4, 1);call write~init~int(100, 4, 5, 1);call write~init~int(0, 4, 6, 1);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(20, 6);call #Ultimate.allocInit(57, 7);call #Ultimate.allocInit(2, 8);call write~init~int(32, 8, 0, 1);call write~init~int(0, 8, 1, 1);call #Ultimate.allocInit(8, 9);call #Ultimate.allocInit(34, 10);call #Ultimate.allocInit(32, 11);call #Ultimate.allocInit(11, 12);call #Ultimate.allocInit(48, 13);~LDV_IN_INTERRUPT~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset := 14, 0;call #Ultimate.allocInit(72, 14);call write~init~int(3, ~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 2 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(4, ~#usb_acecad_id_table~0.base, 4 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 6 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 8 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 10 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 11 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 12 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 13 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 14 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 15 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 16 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(3, ~#usb_acecad_id_table~0.base, 24 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 26 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(8, ~#usb_acecad_id_table~0.base, 28 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 30 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 32 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 34 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 35 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 36 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 37 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 38 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 39 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(1, ~#usb_acecad_id_table~0.base, 40 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(0, ~#usb_acecad_id_table~0.base, 48 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 50 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 52 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 54 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 56 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 58 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 59 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 60 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 61 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 62 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 63 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 64 + ~#usb_acecad_id_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.driver_info := 0;~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset := 15, 0;call #Ultimate.allocInit(264, 15);call write~init~$Pointer$(12, 0, ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_probe.base, #funAddr~usb_acecad_probe.offset, ~#usb_acecad_driver~0.base, 8 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_disconnect.base, #funAddr~usb_acecad_disconnect.offset, ~#usb_acecad_driver~0.base, 16 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 24 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 32 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 40 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 48 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 56 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 64 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, ~#usb_acecad_driver~0.base, 72 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 80 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 84 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 88 + ~#usb_acecad_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 92 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 100 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 108 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 116 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 124 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 132 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 136 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 144 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 152 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 160 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 168 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 176 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 184 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 192 + ~#usb_acecad_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 193 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 201 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 209 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 217 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 225 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 233 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 241 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 249 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 257 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 261 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 262 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 263 + ~#usb_acecad_driver~0.offset, 1);~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~URB_STATE~0 := 0;~DEV_STATE~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~int_urb~0.base, ~int_urb~0.offset := 0, 0;~bulk_urb~0.base, ~bulk_urb~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {12241#(= ~DEV_STATE~0 0)} is VALID [2022-02-20 22:07:02,699 INFO L290 TraceCheckUtils]: 1: Hoare triple {12241#(= ~DEV_STATE~0 0)} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret186#1.base, main_#t~ret186#1.offset, main_#t~nondet187#1, main_#t~switch188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~ret191#1, main_#t~nondet192#1, main_#t~switch193#1, main_#t~ret194#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~17#1.base, main_~tmp~17#1.offset, main_~tmp___0~6#1, main_~tmp___1~3#1, main_~tmp___2~1#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~17#1.base, main_~tmp~17#1.offset;havoc main_~tmp___0~6#1;havoc main_~tmp___1~3#1;havoc main_~tmp___2~1#1; {12241#(= ~DEV_STATE~0 0)} is VALID [2022-02-20 22:07:02,699 INFO L272 TraceCheckUtils]: 2: Hoare triple {12241#(= ~DEV_STATE~0 0)} call main_#t~ret186#1.base, main_#t~ret186#1.offset := ldv_init_zalloc(24); {12270#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:02,700 INFO L290 TraceCheckUtils]: 3: Hoare triple {12270#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {12239#true} is VALID [2022-02-20 22:07:02,700 INFO L272 TraceCheckUtils]: 4: Hoare triple {12239#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {12278#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:02,700 INFO L290 TraceCheckUtils]: 5: Hoare triple {12278#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {12239#true} is VALID [2022-02-20 22:07:02,701 INFO L290 TraceCheckUtils]: 6: Hoare triple {12239#true} assume true; {12239#true} is VALID [2022-02-20 22:07:02,701 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {12239#true} {12239#true} #547#return; {12239#true} is VALID [2022-02-20 22:07:02,701 INFO L290 TraceCheckUtils]: 8: Hoare triple {12239#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {12239#true} is VALID [2022-02-20 22:07:02,701 INFO L272 TraceCheckUtils]: 9: Hoare triple {12239#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {12239#true} is VALID [2022-02-20 22:07:02,701 INFO L290 TraceCheckUtils]: 10: Hoare triple {12239#true} ~cond := #in~cond; {12239#true} is VALID [2022-02-20 22:07:02,701 INFO L290 TraceCheckUtils]: 11: Hoare triple {12239#true} assume !(0 == ~cond); {12239#true} is VALID [2022-02-20 22:07:02,702 INFO L290 TraceCheckUtils]: 12: Hoare triple {12239#true} assume true; {12239#true} is VALID [2022-02-20 22:07:02,702 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {12239#true} {12239#true} #549#return; {12239#true} is VALID [2022-02-20 22:07:02,702 INFO L290 TraceCheckUtils]: 14: Hoare triple {12239#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {12239#true} is VALID [2022-02-20 22:07:02,702 INFO L290 TraceCheckUtils]: 15: Hoare triple {12239#true} assume true; {12239#true} is VALID [2022-02-20 22:07:02,703 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {12239#true} {12241#(= ~DEV_STATE~0 0)} #553#return; {12241#(= ~DEV_STATE~0 0)} is VALID [2022-02-20 22:07:02,703 INFO L290 TraceCheckUtils]: 17: Hoare triple {12241#(= ~DEV_STATE~0 0)} main_~tmp~17#1.base, main_~tmp~17#1.offset := main_#t~ret186#1.base, main_#t~ret186#1.offset;havoc main_#t~ret186#1.base, main_#t~ret186#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~17#1.base, main_~tmp~17#1.offset;assume { :begin_inline_ldv_initialize } true; {12241#(= ~DEV_STATE~0 0)} is VALID [2022-02-20 22:07:02,703 INFO L290 TraceCheckUtils]: 18: Hoare triple {12241#(= ~DEV_STATE~0 0)} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1; {12241#(= ~DEV_STATE~0 0)} is VALID [2022-02-20 22:07:02,703 INFO L290 TraceCheckUtils]: 19: Hoare triple {12241#(= ~DEV_STATE~0 0)} assume -2147483648 <= main_#t~nondet187#1 && main_#t~nondet187#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet187#1;havoc main_#t~nondet187#1;main_#t~switch188#1 := 0 == main_~tmp___0~6#1; {12241#(= ~DEV_STATE~0 0)} is VALID [2022-02-20 22:07:02,704 INFO L290 TraceCheckUtils]: 20: Hoare triple {12241#(= ~DEV_STATE~0 0)} assume !main_#t~switch188#1;main_#t~switch188#1 := main_#t~switch188#1 || 1 == main_~tmp___0~6#1; {12241#(= ~DEV_STATE~0 0)} is VALID [2022-02-20 22:07:02,704 INFO L290 TraceCheckUtils]: 21: Hoare triple {12241#(= ~DEV_STATE~0 0)} assume main_#t~switch188#1; {12241#(= ~DEV_STATE~0 0)} is VALID [2022-02-20 22:07:02,704 INFO L290 TraceCheckUtils]: 22: Hoare triple {12241#(= ~DEV_STATE~0 0)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet192#1 && main_#t~nondet192#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet192#1;havoc main_#t~nondet192#1;main_#t~switch193#1 := 0 == main_~tmp___2~1#1; {12241#(= ~DEV_STATE~0 0)} is VALID [2022-02-20 22:07:02,705 INFO L290 TraceCheckUtils]: 23: Hoare triple {12241#(= ~DEV_STATE~0 0)} assume !main_#t~switch193#1;main_#t~switch193#1 := main_#t~switch193#1 || 1 == main_~tmp___2~1#1; {12241#(= ~DEV_STATE~0 0)} is VALID [2022-02-20 22:07:02,705 INFO L290 TraceCheckUtils]: 24: Hoare triple {12241#(= ~DEV_STATE~0 0)} assume main_#t~switch193#1; {12241#(= ~DEV_STATE~0 0)} is VALID [2022-02-20 22:07:02,706 INFO L290 TraceCheckUtils]: 25: Hoare triple {12241#(= ~DEV_STATE~0 0)} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_usb_acecad_init } true;havoc usb_acecad_init_#res#1;havoc usb_acecad_init_#t~ret183#1, usb_acecad_init_#t~nondet184#1, usb_acecad_init_~result~0#1, usb_acecad_init_~tmp~15#1;havoc usb_acecad_init_~result~0#1;havoc usb_acecad_init_~tmp~15#1;assume { :begin_inline_usb_register } true;usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc usb_register_#res#1;havoc usb_register_#t~ret31#1, usb_register_~driver#1.base, usb_register_~driver#1.offset, usb_register_~tmp~1#1;usb_register_~driver#1.base, usb_register_~driver#1.offset := usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset;havoc usb_register_~tmp~1#1;assume { :begin_inline_ldv_usb_register_driver_2 } true;ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset := usb_register_~driver#1.base, usb_register_~driver#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 4, 0;havoc ldv_usb_register_driver_2_#res#1;havoc ldv_usb_register_driver_2_#t~ret196#1, ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset, ldv_usb_register_driver_2_~ldv_func_res~0#1, ldv_usb_register_driver_2_~tmp~19#1;ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_2_~ldv_func_res~0#1;havoc ldv_usb_register_driver_2_~tmp~19#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet217#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet217#1 && usb_register_driver_#t~nondet217#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet217#1;havoc usb_register_driver_#t~nondet217#1; {12241#(= ~DEV_STATE~0 0)} is VALID [2022-02-20 22:07:02,709 INFO L290 TraceCheckUtils]: 26: Hoare triple {12241#(= ~DEV_STATE~0 0)} ldv_usb_register_driver_2_#t~ret196#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_2_#t~ret196#1 && ldv_usb_register_driver_2_#t~ret196#1 <= 2147483647;ldv_usb_register_driver_2_~tmp~19#1 := ldv_usb_register_driver_2_#t~ret196#1;havoc ldv_usb_register_driver_2_#t~ret196#1;ldv_usb_register_driver_2_~ldv_func_res~0#1 := ldv_usb_register_driver_2_~tmp~19#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset, ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset;havoc ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {12241#(= ~DEV_STATE~0 0)} is VALID [2022-02-20 22:07:02,710 INFO L272 TraceCheckUtils]: 27: Hoare triple {12241#(= ~DEV_STATE~0 0)} call ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset := ldv_init_zalloc(1248); {12270#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:02,711 INFO L290 TraceCheckUtils]: 28: Hoare triple {12270#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {12239#true} is VALID [2022-02-20 22:07:02,711 INFO L272 TraceCheckUtils]: 29: Hoare triple {12239#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {12278#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:02,712 INFO L290 TraceCheckUtils]: 30: Hoare triple {12278#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {12239#true} is VALID [2022-02-20 22:07:02,712 INFO L290 TraceCheckUtils]: 31: Hoare triple {12239#true} assume true; {12239#true} is VALID [2022-02-20 22:07:02,712 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {12239#true} {12239#true} #547#return; {12239#true} is VALID [2022-02-20 22:07:02,712 INFO L290 TraceCheckUtils]: 33: Hoare triple {12239#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {12239#true} is VALID [2022-02-20 22:07:02,713 INFO L272 TraceCheckUtils]: 34: Hoare triple {12239#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {12239#true} is VALID [2022-02-20 22:07:02,713 INFO L290 TraceCheckUtils]: 35: Hoare triple {12239#true} ~cond := #in~cond; {12239#true} is VALID [2022-02-20 22:07:02,713 INFO L290 TraceCheckUtils]: 36: Hoare triple {12239#true} assume !(0 == ~cond); {12239#true} is VALID [2022-02-20 22:07:02,713 INFO L290 TraceCheckUtils]: 37: Hoare triple {12239#true} assume true; {12239#true} is VALID [2022-02-20 22:07:02,713 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {12239#true} {12239#true} #549#return; {12239#true} is VALID [2022-02-20 22:07:02,713 INFO L290 TraceCheckUtils]: 39: Hoare triple {12239#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {12239#true} is VALID [2022-02-20 22:07:02,713 INFO L290 TraceCheckUtils]: 40: Hoare triple {12239#true} assume true; {12239#true} is VALID [2022-02-20 22:07:02,714 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {12239#true} {12241#(= ~DEV_STATE~0 0)} #611#return; {12241#(= ~DEV_STATE~0 0)} is VALID [2022-02-20 22:07:02,714 INFO L290 TraceCheckUtils]: 42: Hoare triple {12241#(= ~DEV_STATE~0 0)} ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset := ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset;havoc ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {12241#(= ~DEV_STATE~0 0)} is VALID [2022-02-20 22:07:02,715 INFO L290 TraceCheckUtils]: 43: Hoare triple {12241#(= ~DEV_STATE~0 0)} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_2_#res#1 := ldv_usb_register_driver_2_~ldv_func_res~0#1; {12241#(= ~DEV_STATE~0 0)} is VALID [2022-02-20 22:07:02,715 INFO L290 TraceCheckUtils]: 44: Hoare triple {12241#(= ~DEV_STATE~0 0)} usb_register_#t~ret31#1 := ldv_usb_register_driver_2_#res#1;assume { :end_inline_ldv_usb_register_driver_2 } true;assume -2147483648 <= usb_register_#t~ret31#1 && usb_register_#t~ret31#1 <= 2147483647;usb_register_~tmp~1#1 := usb_register_#t~ret31#1;havoc usb_register_#t~ret31#1;usb_register_#res#1 := usb_register_~tmp~1#1; {12241#(= ~DEV_STATE~0 0)} is VALID [2022-02-20 22:07:02,715 INFO L290 TraceCheckUtils]: 45: Hoare triple {12241#(= ~DEV_STATE~0 0)} usb_acecad_init_#t~ret183#1 := usb_register_#res#1;assume { :end_inline_usb_register } true;assume -2147483648 <= usb_acecad_init_#t~ret183#1 && usb_acecad_init_#t~ret183#1 <= 2147483647;usb_acecad_init_~tmp~15#1 := usb_acecad_init_#t~ret183#1;havoc usb_acecad_init_#t~ret183#1;usb_acecad_init_~result~0#1 := usb_acecad_init_~tmp~15#1; {12241#(= ~DEV_STATE~0 0)} is VALID [2022-02-20 22:07:02,715 INFO L290 TraceCheckUtils]: 46: Hoare triple {12241#(= ~DEV_STATE~0 0)} assume !(0 == usb_acecad_init_~result~0#1); {12241#(= ~DEV_STATE~0 0)} is VALID [2022-02-20 22:07:02,716 INFO L290 TraceCheckUtils]: 47: Hoare triple {12241#(= ~DEV_STATE~0 0)} usb_acecad_init_#res#1 := usb_acecad_init_~result~0#1; {12241#(= ~DEV_STATE~0 0)} is VALID [2022-02-20 22:07:02,716 INFO L290 TraceCheckUtils]: 48: Hoare triple {12241#(= ~DEV_STATE~0 0)} main_#t~ret194#1 := usb_acecad_init_#res#1;assume { :end_inline_usb_acecad_init } true;assume -2147483648 <= main_#t~ret194#1 && main_#t~ret194#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret194#1;havoc main_#t~ret194#1; {12241#(= ~DEV_STATE~0 0)} is VALID [2022-02-20 22:07:02,716 INFO L290 TraceCheckUtils]: 49: Hoare triple {12241#(= ~DEV_STATE~0 0)} assume !(0 == ~ldv_retval_1~0); {12241#(= ~DEV_STATE~0 0)} is VALID [2022-02-20 22:07:02,717 INFO L290 TraceCheckUtils]: 50: Hoare triple {12241#(= ~DEV_STATE~0 0)} assume 0 != ~ldv_retval_1~0;~ldv_state_variable_0~0 := 2; {12241#(= ~DEV_STATE~0 0)} is VALID [2022-02-20 22:07:02,717 INFO L290 TraceCheckUtils]: 51: Hoare triple {12241#(= ~DEV_STATE~0 0)} assume { :begin_inline_ldv_check_final_state } true; {12241#(= ~DEV_STATE~0 0)} is VALID [2022-02-20 22:07:02,717 INFO L290 TraceCheckUtils]: 52: Hoare triple {12241#(= ~DEV_STATE~0 0)} assume !(0 != ~URB_STATE~0); {12241#(= ~DEV_STATE~0 0)} is VALID [2022-02-20 22:07:02,717 INFO L290 TraceCheckUtils]: 53: Hoare triple {12241#(= ~DEV_STATE~0 0)} assume 0 != ~DEV_STATE~0; {12240#false} is VALID [2022-02-20 22:07:02,718 INFO L272 TraceCheckUtils]: 54: Hoare triple {12240#false} call ldv_error(); {12240#false} is VALID [2022-02-20 22:07:02,718 INFO L290 TraceCheckUtils]: 55: Hoare triple {12240#false} assume !false; {12240#false} is VALID [2022-02-20 22:07:02,718 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2022-02-20 22:07:02,718 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:07:02,718 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1658533900] [2022-02-20 22:07:02,718 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1658533900] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:07:02,718 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 22:07:02,719 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-02-20 22:07:02,719 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1454742235] [2022-02-20 22:07:02,719 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:07:02,719 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 6.8) internal successors, (34), 3 states have internal predecessors, (34), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 56 [2022-02-20 22:07:02,720 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:07:02,720 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 6.8) internal successors, (34), 3 states have internal predecessors, (34), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 22:07:02,747 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 43 edges. 43 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:02,747 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-02-20 22:07:02,747 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:07:02,748 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-02-20 22:07:02,748 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-02-20 22:07:02,748 INFO L87 Difference]: Start difference. First operand 828 states and 1077 transitions. Second operand has 5 states, 5 states have (on average 6.8) internal successors, (34), 3 states have internal predecessors, (34), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 22:07:03,595 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:03,595 INFO L93 Difference]: Finished difference Result 858 states and 1126 transitions. [2022-02-20 22:07:03,595 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-02-20 22:07:03,596 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 6.8) internal successors, (34), 3 states have internal predecessors, (34), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 56 [2022-02-20 22:07:03,596 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 22:07:03,596 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 6.8) internal successors, (34), 3 states have internal predecessors, (34), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 22:07:03,598 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 308 transitions. [2022-02-20 22:07:03,599 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 6.8) internal successors, (34), 3 states have internal predecessors, (34), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 22:07:03,602 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 308 transitions. [2022-02-20 22:07:03,602 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 308 transitions. [2022-02-20 22:07:03,831 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 308 edges. 308 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:03,866 INFO L225 Difference]: With dead ends: 858 [2022-02-20 22:07:03,866 INFO L226 Difference]: Without dead ends: 855 [2022-02-20 22:07:03,866 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2022-02-20 22:07:03,869 INFO L933 BasicCegarLoop]: 282 mSDtfsCounter, 279 mSDsluCounter, 317 mSDsCounter, 0 mSdLazyCounter, 119 mSolverCounterSat, 63 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 311 SdHoareTripleChecker+Valid, 599 SdHoareTripleChecker+Invalid, 182 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 63 IncrementalHoareTripleChecker+Valid, 119 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-02-20 22:07:03,869 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [311 Valid, 599 Invalid, 182 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [63 Valid, 119 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-02-20 22:07:03,871 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 855 states. [2022-02-20 22:07:03,895 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 855 to 827. [2022-02-20 22:07:03,895 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 22:07:03,896 INFO L82 GeneralOperation]: Start isEquivalent. First operand 855 states. Second operand has 827 states, 636 states have (on average 1.2672955974842768) internal successors, (806), 646 states have internal predecessors, (806), 136 states have call successors, (136), 55 states have call predecessors, (136), 54 states have return successors, (133), 133 states have call predecessors, (133), 133 states have call successors, (133) [2022-02-20 22:07:03,898 INFO L74 IsIncluded]: Start isIncluded. First operand 855 states. Second operand has 827 states, 636 states have (on average 1.2672955974842768) internal successors, (806), 646 states have internal predecessors, (806), 136 states have call successors, (136), 55 states have call predecessors, (136), 54 states have return successors, (133), 133 states have call predecessors, (133), 133 states have call successors, (133) [2022-02-20 22:07:03,899 INFO L87 Difference]: Start difference. First operand 855 states. Second operand has 827 states, 636 states have (on average 1.2672955974842768) internal successors, (806), 646 states have internal predecessors, (806), 136 states have call successors, (136), 55 states have call predecessors, (136), 54 states have return successors, (133), 133 states have call predecessors, (133), 133 states have call successors, (133) [2022-02-20 22:07:03,927 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:03,927 INFO L93 Difference]: Finished difference Result 855 states and 1123 transitions. [2022-02-20 22:07:03,928 INFO L276 IsEmpty]: Start isEmpty. Operand 855 states and 1123 transitions. [2022-02-20 22:07:03,929 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:03,929 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:03,932 INFO L74 IsIncluded]: Start isIncluded. First operand has 827 states, 636 states have (on average 1.2672955974842768) internal successors, (806), 646 states have internal predecessors, (806), 136 states have call successors, (136), 55 states have call predecessors, (136), 54 states have return successors, (133), 133 states have call predecessors, (133), 133 states have call successors, (133) Second operand 855 states. [2022-02-20 22:07:03,933 INFO L87 Difference]: Start difference. First operand has 827 states, 636 states have (on average 1.2672955974842768) internal successors, (806), 646 states have internal predecessors, (806), 136 states have call successors, (136), 55 states have call predecessors, (136), 54 states have return successors, (133), 133 states have call predecessors, (133), 133 states have call successors, (133) Second operand 855 states. [2022-02-20 22:07:03,961 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:03,962 INFO L93 Difference]: Finished difference Result 855 states and 1123 transitions. [2022-02-20 22:07:03,962 INFO L276 IsEmpty]: Start isEmpty. Operand 855 states and 1123 transitions. [2022-02-20 22:07:03,963 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:03,963 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:03,963 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 22:07:03,963 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 22:07:03,966 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 827 states, 636 states have (on average 1.2672955974842768) internal successors, (806), 646 states have internal predecessors, (806), 136 states have call successors, (136), 55 states have call predecessors, (136), 54 states have return successors, (133), 133 states have call predecessors, (133), 133 states have call successors, (133) [2022-02-20 22:07:03,998 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 827 states to 827 states and 1075 transitions. [2022-02-20 22:07:03,999 INFO L78 Accepts]: Start accepts. Automaton has 827 states and 1075 transitions. Word has length 56 [2022-02-20 22:07:03,999 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 22:07:03,999 INFO L470 AbstractCegarLoop]: Abstraction has 827 states and 1075 transitions. [2022-02-20 22:07:03,999 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 6.8) internal successors, (34), 3 states have internal predecessors, (34), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 22:07:03,999 INFO L276 IsEmpty]: Start isEmpty. Operand 827 states and 1075 transitions. [2022-02-20 22:07:04,001 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2022-02-20 22:07:04,001 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:07:04,001 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:07:04,001 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2022-02-20 22:07:04,001 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:07:04,001 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:07:04,002 INFO L85 PathProgramCache]: Analyzing trace with hash -1440318295, now seen corresponding path program 1 times [2022-02-20 22:07:04,002 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:07:04,002 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1606066731] [2022-02-20 22:07:04,002 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:07:04,002 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:07:04,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:04,057 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 22:07:04,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:04,069 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:04,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:04,075 INFO L290 TraceCheckUtils]: 0: Hoare triple {16442#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {16403#true} is VALID [2022-02-20 22:07:04,075 INFO L290 TraceCheckUtils]: 1: Hoare triple {16403#true} assume true; {16403#true} is VALID [2022-02-20 22:07:04,075 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {16403#true} {16403#true} #547#return; {16403#true} is VALID [2022-02-20 22:07:04,075 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:04,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:04,080 INFO L290 TraceCheckUtils]: 0: Hoare triple {16403#true} ~cond := #in~cond; {16403#true} is VALID [2022-02-20 22:07:04,080 INFO L290 TraceCheckUtils]: 1: Hoare triple {16403#true} assume !(0 == ~cond); {16403#true} is VALID [2022-02-20 22:07:04,080 INFO L290 TraceCheckUtils]: 2: Hoare triple {16403#true} assume true; {16403#true} is VALID [2022-02-20 22:07:04,080 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16403#true} {16403#true} #549#return; {16403#true} is VALID [2022-02-20 22:07:04,080 INFO L290 TraceCheckUtils]: 0: Hoare triple {16434#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {16403#true} is VALID [2022-02-20 22:07:04,081 INFO L272 TraceCheckUtils]: 1: Hoare triple {16403#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {16442#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:04,081 INFO L290 TraceCheckUtils]: 2: Hoare triple {16442#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {16403#true} is VALID [2022-02-20 22:07:04,081 INFO L290 TraceCheckUtils]: 3: Hoare triple {16403#true} assume true; {16403#true} is VALID [2022-02-20 22:07:04,081 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {16403#true} {16403#true} #547#return; {16403#true} is VALID [2022-02-20 22:07:04,081 INFO L290 TraceCheckUtils]: 5: Hoare triple {16403#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {16403#true} is VALID [2022-02-20 22:07:04,081 INFO L272 TraceCheckUtils]: 6: Hoare triple {16403#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {16403#true} is VALID [2022-02-20 22:07:04,082 INFO L290 TraceCheckUtils]: 7: Hoare triple {16403#true} ~cond := #in~cond; {16403#true} is VALID [2022-02-20 22:07:04,082 INFO L290 TraceCheckUtils]: 8: Hoare triple {16403#true} assume !(0 == ~cond); {16403#true} is VALID [2022-02-20 22:07:04,082 INFO L290 TraceCheckUtils]: 9: Hoare triple {16403#true} assume true; {16403#true} is VALID [2022-02-20 22:07:04,082 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {16403#true} {16403#true} #549#return; {16403#true} is VALID [2022-02-20 22:07:04,082 INFO L290 TraceCheckUtils]: 11: Hoare triple {16403#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {16403#true} is VALID [2022-02-20 22:07:04,082 INFO L290 TraceCheckUtils]: 12: Hoare triple {16403#true} assume true; {16403#true} is VALID [2022-02-20 22:07:04,083 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {16403#true} {16405#(= ~INTERF_STATE~0 0)} #553#return; {16405#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:04,083 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 27 [2022-02-20 22:07:04,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:04,092 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:04,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:04,096 INFO L290 TraceCheckUtils]: 0: Hoare triple {16442#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {16403#true} is VALID [2022-02-20 22:07:04,096 INFO L290 TraceCheckUtils]: 1: Hoare triple {16403#true} assume true; {16403#true} is VALID [2022-02-20 22:07:04,096 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {16403#true} {16403#true} #547#return; {16403#true} is VALID [2022-02-20 22:07:04,097 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:04,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:04,100 INFO L290 TraceCheckUtils]: 0: Hoare triple {16403#true} ~cond := #in~cond; {16403#true} is VALID [2022-02-20 22:07:04,101 INFO L290 TraceCheckUtils]: 1: Hoare triple {16403#true} assume !(0 == ~cond); {16403#true} is VALID [2022-02-20 22:07:04,101 INFO L290 TraceCheckUtils]: 2: Hoare triple {16403#true} assume true; {16403#true} is VALID [2022-02-20 22:07:04,101 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16403#true} {16403#true} #549#return; {16403#true} is VALID [2022-02-20 22:07:04,101 INFO L290 TraceCheckUtils]: 0: Hoare triple {16434#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {16403#true} is VALID [2022-02-20 22:07:04,102 INFO L272 TraceCheckUtils]: 1: Hoare triple {16403#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {16442#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:04,102 INFO L290 TraceCheckUtils]: 2: Hoare triple {16442#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {16403#true} is VALID [2022-02-20 22:07:04,102 INFO L290 TraceCheckUtils]: 3: Hoare triple {16403#true} assume true; {16403#true} is VALID [2022-02-20 22:07:04,102 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {16403#true} {16403#true} #547#return; {16403#true} is VALID [2022-02-20 22:07:04,102 INFO L290 TraceCheckUtils]: 5: Hoare triple {16403#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {16403#true} is VALID [2022-02-20 22:07:04,102 INFO L272 TraceCheckUtils]: 6: Hoare triple {16403#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {16403#true} is VALID [2022-02-20 22:07:04,103 INFO L290 TraceCheckUtils]: 7: Hoare triple {16403#true} ~cond := #in~cond; {16403#true} is VALID [2022-02-20 22:07:04,103 INFO L290 TraceCheckUtils]: 8: Hoare triple {16403#true} assume !(0 == ~cond); {16403#true} is VALID [2022-02-20 22:07:04,103 INFO L290 TraceCheckUtils]: 9: Hoare triple {16403#true} assume true; {16403#true} is VALID [2022-02-20 22:07:04,103 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {16403#true} {16403#true} #549#return; {16403#true} is VALID [2022-02-20 22:07:04,103 INFO L290 TraceCheckUtils]: 11: Hoare triple {16403#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {16403#true} is VALID [2022-02-20 22:07:04,103 INFO L290 TraceCheckUtils]: 12: Hoare triple {16403#true} assume true; {16403#true} is VALID [2022-02-20 22:07:04,104 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {16403#true} {16405#(= ~INTERF_STATE~0 0)} #611#return; {16405#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:04,104 INFO L290 TraceCheckUtils]: 0: Hoare triple {16403#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(99, 2);call #Ultimate.allocInit(10, 3);call #Ultimate.allocInit(7, 4);call write~init~int(97, 4, 0, 1);call write~init~int(99, 4, 1, 1);call write~init~int(101, 4, 2, 1);call write~init~int(99, 4, 3, 1);call write~init~int(97, 4, 4, 1);call write~init~int(100, 4, 5, 1);call write~init~int(0, 4, 6, 1);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(20, 6);call #Ultimate.allocInit(57, 7);call #Ultimate.allocInit(2, 8);call write~init~int(32, 8, 0, 1);call write~init~int(0, 8, 1, 1);call #Ultimate.allocInit(8, 9);call #Ultimate.allocInit(34, 10);call #Ultimate.allocInit(32, 11);call #Ultimate.allocInit(11, 12);call #Ultimate.allocInit(48, 13);~LDV_IN_INTERRUPT~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset := 14, 0;call #Ultimate.allocInit(72, 14);call write~init~int(3, ~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 2 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(4, ~#usb_acecad_id_table~0.base, 4 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 6 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 8 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 10 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 11 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 12 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 13 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 14 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 15 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 16 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(3, ~#usb_acecad_id_table~0.base, 24 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 26 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(8, ~#usb_acecad_id_table~0.base, 28 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 30 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 32 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 34 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 35 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 36 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 37 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 38 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 39 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(1, ~#usb_acecad_id_table~0.base, 40 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(0, ~#usb_acecad_id_table~0.base, 48 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 50 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 52 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 54 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 56 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 58 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 59 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 60 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 61 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 62 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 63 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 64 + ~#usb_acecad_id_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.driver_info := 0;~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset := 15, 0;call #Ultimate.allocInit(264, 15);call write~init~$Pointer$(12, 0, ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_probe.base, #funAddr~usb_acecad_probe.offset, ~#usb_acecad_driver~0.base, 8 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_disconnect.base, #funAddr~usb_acecad_disconnect.offset, ~#usb_acecad_driver~0.base, 16 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 24 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 32 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 40 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 48 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 56 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 64 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, ~#usb_acecad_driver~0.base, 72 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 80 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 84 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 88 + ~#usb_acecad_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 92 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 100 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 108 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 116 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 124 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 132 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 136 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 144 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 152 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 160 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 168 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 176 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 184 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 192 + ~#usb_acecad_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 193 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 201 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 209 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 217 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 225 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 233 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 241 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 249 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 257 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 261 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 262 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 263 + ~#usb_acecad_driver~0.offset, 1);~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~URB_STATE~0 := 0;~DEV_STATE~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~int_urb~0.base, ~int_urb~0.offset := 0, 0;~bulk_urb~0.base, ~bulk_urb~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {16405#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:04,105 INFO L290 TraceCheckUtils]: 1: Hoare triple {16405#(= ~INTERF_STATE~0 0)} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret186#1.base, main_#t~ret186#1.offset, main_#t~nondet187#1, main_#t~switch188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~ret191#1, main_#t~nondet192#1, main_#t~switch193#1, main_#t~ret194#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~17#1.base, main_~tmp~17#1.offset, main_~tmp___0~6#1, main_~tmp___1~3#1, main_~tmp___2~1#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~17#1.base, main_~tmp~17#1.offset;havoc main_~tmp___0~6#1;havoc main_~tmp___1~3#1;havoc main_~tmp___2~1#1; {16405#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:04,105 INFO L272 TraceCheckUtils]: 2: Hoare triple {16405#(= ~INTERF_STATE~0 0)} call main_#t~ret186#1.base, main_#t~ret186#1.offset := ldv_init_zalloc(24); {16434#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:04,105 INFO L290 TraceCheckUtils]: 3: Hoare triple {16434#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {16403#true} is VALID [2022-02-20 22:07:04,106 INFO L272 TraceCheckUtils]: 4: Hoare triple {16403#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {16442#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:04,106 INFO L290 TraceCheckUtils]: 5: Hoare triple {16442#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {16403#true} is VALID [2022-02-20 22:07:04,106 INFO L290 TraceCheckUtils]: 6: Hoare triple {16403#true} assume true; {16403#true} is VALID [2022-02-20 22:07:04,106 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {16403#true} {16403#true} #547#return; {16403#true} is VALID [2022-02-20 22:07:04,106 INFO L290 TraceCheckUtils]: 8: Hoare triple {16403#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {16403#true} is VALID [2022-02-20 22:07:04,106 INFO L272 TraceCheckUtils]: 9: Hoare triple {16403#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {16403#true} is VALID [2022-02-20 22:07:04,107 INFO L290 TraceCheckUtils]: 10: Hoare triple {16403#true} ~cond := #in~cond; {16403#true} is VALID [2022-02-20 22:07:04,107 INFO L290 TraceCheckUtils]: 11: Hoare triple {16403#true} assume !(0 == ~cond); {16403#true} is VALID [2022-02-20 22:07:04,107 INFO L290 TraceCheckUtils]: 12: Hoare triple {16403#true} assume true; {16403#true} is VALID [2022-02-20 22:07:04,107 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {16403#true} {16403#true} #549#return; {16403#true} is VALID [2022-02-20 22:07:04,107 INFO L290 TraceCheckUtils]: 14: Hoare triple {16403#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {16403#true} is VALID [2022-02-20 22:07:04,107 INFO L290 TraceCheckUtils]: 15: Hoare triple {16403#true} assume true; {16403#true} is VALID [2022-02-20 22:07:04,108 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {16403#true} {16405#(= ~INTERF_STATE~0 0)} #553#return; {16405#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:04,108 INFO L290 TraceCheckUtils]: 17: Hoare triple {16405#(= ~INTERF_STATE~0 0)} main_~tmp~17#1.base, main_~tmp~17#1.offset := main_#t~ret186#1.base, main_#t~ret186#1.offset;havoc main_#t~ret186#1.base, main_#t~ret186#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~17#1.base, main_~tmp~17#1.offset;assume { :begin_inline_ldv_initialize } true; {16405#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:04,108 INFO L290 TraceCheckUtils]: 18: Hoare triple {16405#(= ~INTERF_STATE~0 0)} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1; {16405#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:04,109 INFO L290 TraceCheckUtils]: 19: Hoare triple {16405#(= ~INTERF_STATE~0 0)} assume -2147483648 <= main_#t~nondet187#1 && main_#t~nondet187#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet187#1;havoc main_#t~nondet187#1;main_#t~switch188#1 := 0 == main_~tmp___0~6#1; {16405#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:04,109 INFO L290 TraceCheckUtils]: 20: Hoare triple {16405#(= ~INTERF_STATE~0 0)} assume !main_#t~switch188#1;main_#t~switch188#1 := main_#t~switch188#1 || 1 == main_~tmp___0~6#1; {16405#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:04,109 INFO L290 TraceCheckUtils]: 21: Hoare triple {16405#(= ~INTERF_STATE~0 0)} assume main_#t~switch188#1; {16405#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:04,110 INFO L290 TraceCheckUtils]: 22: Hoare triple {16405#(= ~INTERF_STATE~0 0)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet192#1 && main_#t~nondet192#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet192#1;havoc main_#t~nondet192#1;main_#t~switch193#1 := 0 == main_~tmp___2~1#1; {16405#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:04,110 INFO L290 TraceCheckUtils]: 23: Hoare triple {16405#(= ~INTERF_STATE~0 0)} assume !main_#t~switch193#1;main_#t~switch193#1 := main_#t~switch193#1 || 1 == main_~tmp___2~1#1; {16405#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:04,110 INFO L290 TraceCheckUtils]: 24: Hoare triple {16405#(= ~INTERF_STATE~0 0)} assume main_#t~switch193#1; {16405#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:04,111 INFO L290 TraceCheckUtils]: 25: Hoare triple {16405#(= ~INTERF_STATE~0 0)} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_usb_acecad_init } true;havoc usb_acecad_init_#res#1;havoc usb_acecad_init_#t~ret183#1, usb_acecad_init_#t~nondet184#1, usb_acecad_init_~result~0#1, usb_acecad_init_~tmp~15#1;havoc usb_acecad_init_~result~0#1;havoc usb_acecad_init_~tmp~15#1;assume { :begin_inline_usb_register } true;usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc usb_register_#res#1;havoc usb_register_#t~ret31#1, usb_register_~driver#1.base, usb_register_~driver#1.offset, usb_register_~tmp~1#1;usb_register_~driver#1.base, usb_register_~driver#1.offset := usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset;havoc usb_register_~tmp~1#1;assume { :begin_inline_ldv_usb_register_driver_2 } true;ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset := usb_register_~driver#1.base, usb_register_~driver#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 4, 0;havoc ldv_usb_register_driver_2_#res#1;havoc ldv_usb_register_driver_2_#t~ret196#1, ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset, ldv_usb_register_driver_2_~ldv_func_res~0#1, ldv_usb_register_driver_2_~tmp~19#1;ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_2_~ldv_func_res~0#1;havoc ldv_usb_register_driver_2_~tmp~19#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet217#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet217#1 && usb_register_driver_#t~nondet217#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet217#1;havoc usb_register_driver_#t~nondet217#1; {16405#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:04,111 INFO L290 TraceCheckUtils]: 26: Hoare triple {16405#(= ~INTERF_STATE~0 0)} ldv_usb_register_driver_2_#t~ret196#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_2_#t~ret196#1 && ldv_usb_register_driver_2_#t~ret196#1 <= 2147483647;ldv_usb_register_driver_2_~tmp~19#1 := ldv_usb_register_driver_2_#t~ret196#1;havoc ldv_usb_register_driver_2_#t~ret196#1;ldv_usb_register_driver_2_~ldv_func_res~0#1 := ldv_usb_register_driver_2_~tmp~19#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset, ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset;havoc ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {16405#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:04,112 INFO L272 TraceCheckUtils]: 27: Hoare triple {16405#(= ~INTERF_STATE~0 0)} call ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset := ldv_init_zalloc(1248); {16434#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:04,112 INFO L290 TraceCheckUtils]: 28: Hoare triple {16434#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {16403#true} is VALID [2022-02-20 22:07:04,113 INFO L272 TraceCheckUtils]: 29: Hoare triple {16403#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {16442#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:04,113 INFO L290 TraceCheckUtils]: 30: Hoare triple {16442#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {16403#true} is VALID [2022-02-20 22:07:04,113 INFO L290 TraceCheckUtils]: 31: Hoare triple {16403#true} assume true; {16403#true} is VALID [2022-02-20 22:07:04,113 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {16403#true} {16403#true} #547#return; {16403#true} is VALID [2022-02-20 22:07:04,113 INFO L290 TraceCheckUtils]: 33: Hoare triple {16403#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {16403#true} is VALID [2022-02-20 22:07:04,113 INFO L272 TraceCheckUtils]: 34: Hoare triple {16403#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {16403#true} is VALID [2022-02-20 22:07:04,113 INFO L290 TraceCheckUtils]: 35: Hoare triple {16403#true} ~cond := #in~cond; {16403#true} is VALID [2022-02-20 22:07:04,114 INFO L290 TraceCheckUtils]: 36: Hoare triple {16403#true} assume !(0 == ~cond); {16403#true} is VALID [2022-02-20 22:07:04,114 INFO L290 TraceCheckUtils]: 37: Hoare triple {16403#true} assume true; {16403#true} is VALID [2022-02-20 22:07:04,114 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {16403#true} {16403#true} #549#return; {16403#true} is VALID [2022-02-20 22:07:04,114 INFO L290 TraceCheckUtils]: 39: Hoare triple {16403#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {16403#true} is VALID [2022-02-20 22:07:04,114 INFO L290 TraceCheckUtils]: 40: Hoare triple {16403#true} assume true; {16403#true} is VALID [2022-02-20 22:07:04,115 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {16403#true} {16405#(= ~INTERF_STATE~0 0)} #611#return; {16405#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:04,115 INFO L290 TraceCheckUtils]: 42: Hoare triple {16405#(= ~INTERF_STATE~0 0)} ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset := ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset;havoc ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {16405#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:04,115 INFO L290 TraceCheckUtils]: 43: Hoare triple {16405#(= ~INTERF_STATE~0 0)} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_2_#res#1 := ldv_usb_register_driver_2_~ldv_func_res~0#1; {16405#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:04,116 INFO L290 TraceCheckUtils]: 44: Hoare triple {16405#(= ~INTERF_STATE~0 0)} usb_register_#t~ret31#1 := ldv_usb_register_driver_2_#res#1;assume { :end_inline_ldv_usb_register_driver_2 } true;assume -2147483648 <= usb_register_#t~ret31#1 && usb_register_#t~ret31#1 <= 2147483647;usb_register_~tmp~1#1 := usb_register_#t~ret31#1;havoc usb_register_#t~ret31#1;usb_register_#res#1 := usb_register_~tmp~1#1; {16405#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:04,116 INFO L290 TraceCheckUtils]: 45: Hoare triple {16405#(= ~INTERF_STATE~0 0)} usb_acecad_init_#t~ret183#1 := usb_register_#res#1;assume { :end_inline_usb_register } true;assume -2147483648 <= usb_acecad_init_#t~ret183#1 && usb_acecad_init_#t~ret183#1 <= 2147483647;usb_acecad_init_~tmp~15#1 := usb_acecad_init_#t~ret183#1;havoc usb_acecad_init_#t~ret183#1;usb_acecad_init_~result~0#1 := usb_acecad_init_~tmp~15#1; {16405#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:04,116 INFO L290 TraceCheckUtils]: 46: Hoare triple {16405#(= ~INTERF_STATE~0 0)} assume !(0 == usb_acecad_init_~result~0#1); {16405#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:04,116 INFO L290 TraceCheckUtils]: 47: Hoare triple {16405#(= ~INTERF_STATE~0 0)} usb_acecad_init_#res#1 := usb_acecad_init_~result~0#1; {16405#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:04,117 INFO L290 TraceCheckUtils]: 48: Hoare triple {16405#(= ~INTERF_STATE~0 0)} main_#t~ret194#1 := usb_acecad_init_#res#1;assume { :end_inline_usb_acecad_init } true;assume -2147483648 <= main_#t~ret194#1 && main_#t~ret194#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret194#1;havoc main_#t~ret194#1; {16405#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:04,117 INFO L290 TraceCheckUtils]: 49: Hoare triple {16405#(= ~INTERF_STATE~0 0)} assume !(0 == ~ldv_retval_1~0); {16405#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:04,117 INFO L290 TraceCheckUtils]: 50: Hoare triple {16405#(= ~INTERF_STATE~0 0)} assume 0 != ~ldv_retval_1~0;~ldv_state_variable_0~0 := 2; {16405#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:04,118 INFO L290 TraceCheckUtils]: 51: Hoare triple {16405#(= ~INTERF_STATE~0 0)} assume { :begin_inline_ldv_check_final_state } true; {16405#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:04,118 INFO L290 TraceCheckUtils]: 52: Hoare triple {16405#(= ~INTERF_STATE~0 0)} assume !(0 != ~URB_STATE~0); {16405#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:04,118 INFO L290 TraceCheckUtils]: 53: Hoare triple {16405#(= ~INTERF_STATE~0 0)} assume !(0 != ~DEV_STATE~0); {16405#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:04,119 INFO L290 TraceCheckUtils]: 54: Hoare triple {16405#(= ~INTERF_STATE~0 0)} assume 0 != ~INTERF_STATE~0; {16404#false} is VALID [2022-02-20 22:07:04,120 INFO L272 TraceCheckUtils]: 55: Hoare triple {16404#false} call ldv_error(); {16404#false} is VALID [2022-02-20 22:07:04,121 INFO L290 TraceCheckUtils]: 56: Hoare triple {16404#false} assume !false; {16404#false} is VALID [2022-02-20 22:07:04,121 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2022-02-20 22:07:04,122 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:07:04,123 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1606066731] [2022-02-20 22:07:04,123 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1606066731] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:07:04,131 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 22:07:04,131 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-02-20 22:07:04,131 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1002233247] [2022-02-20 22:07:04,132 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:07:04,133 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 7.0) internal successors, (35), 3 states have internal predecessors, (35), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 57 [2022-02-20 22:07:04,133 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:07:04,133 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 7.0) internal successors, (35), 3 states have internal predecessors, (35), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 22:07:04,160 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 44 edges. 44 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:04,160 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-02-20 22:07:04,161 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:07:04,161 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-02-20 22:07:04,161 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-02-20 22:07:04,161 INFO L87 Difference]: Start difference. First operand 827 states and 1075 transitions. Second operand has 5 states, 5 states have (on average 7.0) internal successors, (35), 3 states have internal predecessors, (35), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 22:07:05,035 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:05,036 INFO L93 Difference]: Finished difference Result 857 states and 1124 transitions. [2022-02-20 22:07:05,036 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-02-20 22:07:05,036 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 7.0) internal successors, (35), 3 states have internal predecessors, (35), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 57 [2022-02-20 22:07:05,036 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 22:07:05,036 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 7.0) internal successors, (35), 3 states have internal predecessors, (35), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 22:07:05,039 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 306 transitions. [2022-02-20 22:07:05,039 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 7.0) internal successors, (35), 3 states have internal predecessors, (35), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 22:07:05,041 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 306 transitions. [2022-02-20 22:07:05,041 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 306 transitions. [2022-02-20 22:07:05,282 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 306 edges. 306 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:05,314 INFO L225 Difference]: With dead ends: 857 [2022-02-20 22:07:05,315 INFO L226 Difference]: Without dead ends: 854 [2022-02-20 22:07:05,315 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2022-02-20 22:07:05,317 INFO L933 BasicCegarLoop]: 280 mSDtfsCounter, 276 mSDsluCounter, 315 mSDsCounter, 0 mSdLazyCounter, 119 mSolverCounterSat, 62 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 308 SdHoareTripleChecker+Valid, 595 SdHoareTripleChecker+Invalid, 181 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 62 IncrementalHoareTripleChecker+Valid, 119 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-02-20 22:07:05,317 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [308 Valid, 595 Invalid, 181 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [62 Valid, 119 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-02-20 22:07:05,318 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 854 states. [2022-02-20 22:07:05,336 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 854 to 826. [2022-02-20 22:07:05,336 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 22:07:05,338 INFO L82 GeneralOperation]: Start isEquivalent. First operand 854 states. Second operand has 826 states, 636 states have (on average 1.2657232704402517) internal successors, (805), 645 states have internal predecessors, (805), 135 states have call successors, (135), 55 states have call predecessors, (135), 54 states have return successors, (133), 133 states have call predecessors, (133), 133 states have call successors, (133) [2022-02-20 22:07:05,339 INFO L74 IsIncluded]: Start isIncluded. First operand 854 states. Second operand has 826 states, 636 states have (on average 1.2657232704402517) internal successors, (805), 645 states have internal predecessors, (805), 135 states have call successors, (135), 55 states have call predecessors, (135), 54 states have return successors, (133), 133 states have call predecessors, (133), 133 states have call successors, (133) [2022-02-20 22:07:05,340 INFO L87 Difference]: Start difference. First operand 854 states. Second operand has 826 states, 636 states have (on average 1.2657232704402517) internal successors, (805), 645 states have internal predecessors, (805), 135 states have call successors, (135), 55 states have call predecessors, (135), 54 states have return successors, (133), 133 states have call predecessors, (133), 133 states have call successors, (133) [2022-02-20 22:07:05,367 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:05,367 INFO L93 Difference]: Finished difference Result 854 states and 1121 transitions. [2022-02-20 22:07:05,367 INFO L276 IsEmpty]: Start isEmpty. Operand 854 states and 1121 transitions. [2022-02-20 22:07:05,369 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:05,369 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:05,377 INFO L74 IsIncluded]: Start isIncluded. First operand has 826 states, 636 states have (on average 1.2657232704402517) internal successors, (805), 645 states have internal predecessors, (805), 135 states have call successors, (135), 55 states have call predecessors, (135), 54 states have return successors, (133), 133 states have call predecessors, (133), 133 states have call successors, (133) Second operand 854 states. [2022-02-20 22:07:05,378 INFO L87 Difference]: Start difference. First operand has 826 states, 636 states have (on average 1.2657232704402517) internal successors, (805), 645 states have internal predecessors, (805), 135 states have call successors, (135), 55 states have call predecessors, (135), 54 states have return successors, (133), 133 states have call predecessors, (133), 133 states have call successors, (133) Second operand 854 states. [2022-02-20 22:07:05,407 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:05,407 INFO L93 Difference]: Finished difference Result 854 states and 1121 transitions. [2022-02-20 22:07:05,407 INFO L276 IsEmpty]: Start isEmpty. Operand 854 states and 1121 transitions. [2022-02-20 22:07:05,409 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:05,409 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:05,409 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 22:07:05,409 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 22:07:05,416 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 826 states, 636 states have (on average 1.2657232704402517) internal successors, (805), 645 states have internal predecessors, (805), 135 states have call successors, (135), 55 states have call predecessors, (135), 54 states have return successors, (133), 133 states have call predecessors, (133), 133 states have call successors, (133) [2022-02-20 22:07:05,449 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 826 states to 826 states and 1073 transitions. [2022-02-20 22:07:05,449 INFO L78 Accepts]: Start accepts. Automaton has 826 states and 1073 transitions. Word has length 57 [2022-02-20 22:07:05,450 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 22:07:05,450 INFO L470 AbstractCegarLoop]: Abstraction has 826 states and 1073 transitions. [2022-02-20 22:07:05,451 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 7.0) internal successors, (35), 3 states have internal predecessors, (35), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 22:07:05,451 INFO L276 IsEmpty]: Start isEmpty. Operand 826 states and 1073 transitions. [2022-02-20 22:07:05,451 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2022-02-20 22:07:05,451 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:07:05,451 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:07:05,452 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2022-02-20 22:07:05,452 INFO L402 AbstractCegarLoop]: === Iteration 7 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:07:05,452 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:07:05,452 INFO L85 PathProgramCache]: Analyzing trace with hash -1700174242, now seen corresponding path program 1 times [2022-02-20 22:07:05,453 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:07:05,453 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2074247065] [2022-02-20 22:07:05,453 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:07:05,453 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:07:05,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:05,511 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 22:07:05,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:05,524 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:05,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:05,528 INFO L290 TraceCheckUtils]: 0: Hoare triple {20600#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {20561#true} is VALID [2022-02-20 22:07:05,528 INFO L290 TraceCheckUtils]: 1: Hoare triple {20561#true} assume true; {20561#true} is VALID [2022-02-20 22:07:05,528 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {20561#true} {20561#true} #547#return; {20561#true} is VALID [2022-02-20 22:07:05,528 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:05,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:05,533 INFO L290 TraceCheckUtils]: 0: Hoare triple {20561#true} ~cond := #in~cond; {20561#true} is VALID [2022-02-20 22:07:05,533 INFO L290 TraceCheckUtils]: 1: Hoare triple {20561#true} assume !(0 == ~cond); {20561#true} is VALID [2022-02-20 22:07:05,533 INFO L290 TraceCheckUtils]: 2: Hoare triple {20561#true} assume true; {20561#true} is VALID [2022-02-20 22:07:05,533 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20561#true} {20561#true} #549#return; {20561#true} is VALID [2022-02-20 22:07:05,534 INFO L290 TraceCheckUtils]: 0: Hoare triple {20592#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {20561#true} is VALID [2022-02-20 22:07:05,534 INFO L272 TraceCheckUtils]: 1: Hoare triple {20561#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {20600#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:05,534 INFO L290 TraceCheckUtils]: 2: Hoare triple {20600#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {20561#true} is VALID [2022-02-20 22:07:05,534 INFO L290 TraceCheckUtils]: 3: Hoare triple {20561#true} assume true; {20561#true} is VALID [2022-02-20 22:07:05,535 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {20561#true} {20561#true} #547#return; {20561#true} is VALID [2022-02-20 22:07:05,535 INFO L290 TraceCheckUtils]: 5: Hoare triple {20561#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {20561#true} is VALID [2022-02-20 22:07:05,535 INFO L272 TraceCheckUtils]: 6: Hoare triple {20561#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {20561#true} is VALID [2022-02-20 22:07:05,535 INFO L290 TraceCheckUtils]: 7: Hoare triple {20561#true} ~cond := #in~cond; {20561#true} is VALID [2022-02-20 22:07:05,535 INFO L290 TraceCheckUtils]: 8: Hoare triple {20561#true} assume !(0 == ~cond); {20561#true} is VALID [2022-02-20 22:07:05,535 INFO L290 TraceCheckUtils]: 9: Hoare triple {20561#true} assume true; {20561#true} is VALID [2022-02-20 22:07:05,535 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {20561#true} {20561#true} #549#return; {20561#true} is VALID [2022-02-20 22:07:05,535 INFO L290 TraceCheckUtils]: 11: Hoare triple {20561#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {20561#true} is VALID [2022-02-20 22:07:05,536 INFO L290 TraceCheckUtils]: 12: Hoare triple {20561#true} assume true; {20561#true} is VALID [2022-02-20 22:07:05,536 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {20561#true} {20563#(= ~SERIAL_STATE~0 0)} #553#return; {20563#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:05,536 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 27 [2022-02-20 22:07:05,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:05,554 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:05,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:05,564 INFO L290 TraceCheckUtils]: 0: Hoare triple {20600#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {20561#true} is VALID [2022-02-20 22:07:05,564 INFO L290 TraceCheckUtils]: 1: Hoare triple {20561#true} assume true; {20561#true} is VALID [2022-02-20 22:07:05,564 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {20561#true} {20561#true} #547#return; {20561#true} is VALID [2022-02-20 22:07:05,565 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:05,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:05,569 INFO L290 TraceCheckUtils]: 0: Hoare triple {20561#true} ~cond := #in~cond; {20561#true} is VALID [2022-02-20 22:07:05,569 INFO L290 TraceCheckUtils]: 1: Hoare triple {20561#true} assume !(0 == ~cond); {20561#true} is VALID [2022-02-20 22:07:05,569 INFO L290 TraceCheckUtils]: 2: Hoare triple {20561#true} assume true; {20561#true} is VALID [2022-02-20 22:07:05,569 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20561#true} {20561#true} #549#return; {20561#true} is VALID [2022-02-20 22:07:05,570 INFO L290 TraceCheckUtils]: 0: Hoare triple {20592#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {20561#true} is VALID [2022-02-20 22:07:05,570 INFO L272 TraceCheckUtils]: 1: Hoare triple {20561#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {20600#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:05,571 INFO L290 TraceCheckUtils]: 2: Hoare triple {20600#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {20561#true} is VALID [2022-02-20 22:07:05,571 INFO L290 TraceCheckUtils]: 3: Hoare triple {20561#true} assume true; {20561#true} is VALID [2022-02-20 22:07:05,571 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {20561#true} {20561#true} #547#return; {20561#true} is VALID [2022-02-20 22:07:05,572 INFO L290 TraceCheckUtils]: 5: Hoare triple {20561#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {20561#true} is VALID [2022-02-20 22:07:05,572 INFO L272 TraceCheckUtils]: 6: Hoare triple {20561#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {20561#true} is VALID [2022-02-20 22:07:05,572 INFO L290 TraceCheckUtils]: 7: Hoare triple {20561#true} ~cond := #in~cond; {20561#true} is VALID [2022-02-20 22:07:05,572 INFO L290 TraceCheckUtils]: 8: Hoare triple {20561#true} assume !(0 == ~cond); {20561#true} is VALID [2022-02-20 22:07:05,572 INFO L290 TraceCheckUtils]: 9: Hoare triple {20561#true} assume true; {20561#true} is VALID [2022-02-20 22:07:05,572 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {20561#true} {20561#true} #549#return; {20561#true} is VALID [2022-02-20 22:07:05,572 INFO L290 TraceCheckUtils]: 11: Hoare triple {20561#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {20561#true} is VALID [2022-02-20 22:07:05,572 INFO L290 TraceCheckUtils]: 12: Hoare triple {20561#true} assume true; {20561#true} is VALID [2022-02-20 22:07:05,573 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {20561#true} {20563#(= ~SERIAL_STATE~0 0)} #611#return; {20563#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:05,573 INFO L290 TraceCheckUtils]: 0: Hoare triple {20561#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(99, 2);call #Ultimate.allocInit(10, 3);call #Ultimate.allocInit(7, 4);call write~init~int(97, 4, 0, 1);call write~init~int(99, 4, 1, 1);call write~init~int(101, 4, 2, 1);call write~init~int(99, 4, 3, 1);call write~init~int(97, 4, 4, 1);call write~init~int(100, 4, 5, 1);call write~init~int(0, 4, 6, 1);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(20, 6);call #Ultimate.allocInit(57, 7);call #Ultimate.allocInit(2, 8);call write~init~int(32, 8, 0, 1);call write~init~int(0, 8, 1, 1);call #Ultimate.allocInit(8, 9);call #Ultimate.allocInit(34, 10);call #Ultimate.allocInit(32, 11);call #Ultimate.allocInit(11, 12);call #Ultimate.allocInit(48, 13);~LDV_IN_INTERRUPT~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset := 14, 0;call #Ultimate.allocInit(72, 14);call write~init~int(3, ~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 2 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(4, ~#usb_acecad_id_table~0.base, 4 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 6 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 8 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 10 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 11 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 12 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 13 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 14 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 15 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 16 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(3, ~#usb_acecad_id_table~0.base, 24 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 26 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(8, ~#usb_acecad_id_table~0.base, 28 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 30 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 32 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 34 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 35 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 36 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 37 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 38 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 39 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(1, ~#usb_acecad_id_table~0.base, 40 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(0, ~#usb_acecad_id_table~0.base, 48 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 50 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 52 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 54 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 56 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 58 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 59 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 60 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 61 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 62 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 63 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 64 + ~#usb_acecad_id_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.driver_info := 0;~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset := 15, 0;call #Ultimate.allocInit(264, 15);call write~init~$Pointer$(12, 0, ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_probe.base, #funAddr~usb_acecad_probe.offset, ~#usb_acecad_driver~0.base, 8 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_disconnect.base, #funAddr~usb_acecad_disconnect.offset, ~#usb_acecad_driver~0.base, 16 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 24 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 32 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 40 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 48 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 56 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 64 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, ~#usb_acecad_driver~0.base, 72 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 80 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 84 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 88 + ~#usb_acecad_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 92 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 100 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 108 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 116 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 124 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 132 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 136 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 144 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 152 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 160 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 168 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 176 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 184 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 192 + ~#usb_acecad_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 193 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 201 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 209 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 217 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 225 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 233 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 241 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 249 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 257 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 261 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 262 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 263 + ~#usb_acecad_driver~0.offset, 1);~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~URB_STATE~0 := 0;~DEV_STATE~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~int_urb~0.base, ~int_urb~0.offset := 0, 0;~bulk_urb~0.base, ~bulk_urb~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {20563#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:05,574 INFO L290 TraceCheckUtils]: 1: Hoare triple {20563#(= ~SERIAL_STATE~0 0)} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret186#1.base, main_#t~ret186#1.offset, main_#t~nondet187#1, main_#t~switch188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~ret191#1, main_#t~nondet192#1, main_#t~switch193#1, main_#t~ret194#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~17#1.base, main_~tmp~17#1.offset, main_~tmp___0~6#1, main_~tmp___1~3#1, main_~tmp___2~1#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~17#1.base, main_~tmp~17#1.offset;havoc main_~tmp___0~6#1;havoc main_~tmp___1~3#1;havoc main_~tmp___2~1#1; {20563#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:05,574 INFO L272 TraceCheckUtils]: 2: Hoare triple {20563#(= ~SERIAL_STATE~0 0)} call main_#t~ret186#1.base, main_#t~ret186#1.offset := ldv_init_zalloc(24); {20592#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:05,574 INFO L290 TraceCheckUtils]: 3: Hoare triple {20592#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {20561#true} is VALID [2022-02-20 22:07:05,575 INFO L272 TraceCheckUtils]: 4: Hoare triple {20561#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {20600#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:05,575 INFO L290 TraceCheckUtils]: 5: Hoare triple {20600#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {20561#true} is VALID [2022-02-20 22:07:05,575 INFO L290 TraceCheckUtils]: 6: Hoare triple {20561#true} assume true; {20561#true} is VALID [2022-02-20 22:07:05,575 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {20561#true} {20561#true} #547#return; {20561#true} is VALID [2022-02-20 22:07:05,575 INFO L290 TraceCheckUtils]: 8: Hoare triple {20561#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {20561#true} is VALID [2022-02-20 22:07:05,575 INFO L272 TraceCheckUtils]: 9: Hoare triple {20561#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {20561#true} is VALID [2022-02-20 22:07:05,576 INFO L290 TraceCheckUtils]: 10: Hoare triple {20561#true} ~cond := #in~cond; {20561#true} is VALID [2022-02-20 22:07:05,576 INFO L290 TraceCheckUtils]: 11: Hoare triple {20561#true} assume !(0 == ~cond); {20561#true} is VALID [2022-02-20 22:07:05,576 INFO L290 TraceCheckUtils]: 12: Hoare triple {20561#true} assume true; {20561#true} is VALID [2022-02-20 22:07:05,576 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {20561#true} {20561#true} #549#return; {20561#true} is VALID [2022-02-20 22:07:05,576 INFO L290 TraceCheckUtils]: 14: Hoare triple {20561#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {20561#true} is VALID [2022-02-20 22:07:05,576 INFO L290 TraceCheckUtils]: 15: Hoare triple {20561#true} assume true; {20561#true} is VALID [2022-02-20 22:07:05,577 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {20561#true} {20563#(= ~SERIAL_STATE~0 0)} #553#return; {20563#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:05,577 INFO L290 TraceCheckUtils]: 17: Hoare triple {20563#(= ~SERIAL_STATE~0 0)} main_~tmp~17#1.base, main_~tmp~17#1.offset := main_#t~ret186#1.base, main_#t~ret186#1.offset;havoc main_#t~ret186#1.base, main_#t~ret186#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~17#1.base, main_~tmp~17#1.offset;assume { :begin_inline_ldv_initialize } true; {20563#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:05,577 INFO L290 TraceCheckUtils]: 18: Hoare triple {20563#(= ~SERIAL_STATE~0 0)} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1; {20563#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:05,577 INFO L290 TraceCheckUtils]: 19: Hoare triple {20563#(= ~SERIAL_STATE~0 0)} assume -2147483648 <= main_#t~nondet187#1 && main_#t~nondet187#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet187#1;havoc main_#t~nondet187#1;main_#t~switch188#1 := 0 == main_~tmp___0~6#1; {20563#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:05,578 INFO L290 TraceCheckUtils]: 20: Hoare triple {20563#(= ~SERIAL_STATE~0 0)} assume !main_#t~switch188#1;main_#t~switch188#1 := main_#t~switch188#1 || 1 == main_~tmp___0~6#1; {20563#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:05,578 INFO L290 TraceCheckUtils]: 21: Hoare triple {20563#(= ~SERIAL_STATE~0 0)} assume main_#t~switch188#1; {20563#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:05,578 INFO L290 TraceCheckUtils]: 22: Hoare triple {20563#(= ~SERIAL_STATE~0 0)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet192#1 && main_#t~nondet192#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet192#1;havoc main_#t~nondet192#1;main_#t~switch193#1 := 0 == main_~tmp___2~1#1; {20563#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:05,578 INFO L290 TraceCheckUtils]: 23: Hoare triple {20563#(= ~SERIAL_STATE~0 0)} assume !main_#t~switch193#1;main_#t~switch193#1 := main_#t~switch193#1 || 1 == main_~tmp___2~1#1; {20563#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:05,579 INFO L290 TraceCheckUtils]: 24: Hoare triple {20563#(= ~SERIAL_STATE~0 0)} assume main_#t~switch193#1; {20563#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:05,579 INFO L290 TraceCheckUtils]: 25: Hoare triple {20563#(= ~SERIAL_STATE~0 0)} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_usb_acecad_init } true;havoc usb_acecad_init_#res#1;havoc usb_acecad_init_#t~ret183#1, usb_acecad_init_#t~nondet184#1, usb_acecad_init_~result~0#1, usb_acecad_init_~tmp~15#1;havoc usb_acecad_init_~result~0#1;havoc usb_acecad_init_~tmp~15#1;assume { :begin_inline_usb_register } true;usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc usb_register_#res#1;havoc usb_register_#t~ret31#1, usb_register_~driver#1.base, usb_register_~driver#1.offset, usb_register_~tmp~1#1;usb_register_~driver#1.base, usb_register_~driver#1.offset := usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset;havoc usb_register_~tmp~1#1;assume { :begin_inline_ldv_usb_register_driver_2 } true;ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset := usb_register_~driver#1.base, usb_register_~driver#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 4, 0;havoc ldv_usb_register_driver_2_#res#1;havoc ldv_usb_register_driver_2_#t~ret196#1, ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset, ldv_usb_register_driver_2_~ldv_func_res~0#1, ldv_usb_register_driver_2_~tmp~19#1;ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_2_~ldv_func_res~0#1;havoc ldv_usb_register_driver_2_~tmp~19#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet217#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet217#1 && usb_register_driver_#t~nondet217#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet217#1;havoc usb_register_driver_#t~nondet217#1; {20563#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:05,579 INFO L290 TraceCheckUtils]: 26: Hoare triple {20563#(= ~SERIAL_STATE~0 0)} ldv_usb_register_driver_2_#t~ret196#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_2_#t~ret196#1 && ldv_usb_register_driver_2_#t~ret196#1 <= 2147483647;ldv_usb_register_driver_2_~tmp~19#1 := ldv_usb_register_driver_2_#t~ret196#1;havoc ldv_usb_register_driver_2_#t~ret196#1;ldv_usb_register_driver_2_~ldv_func_res~0#1 := ldv_usb_register_driver_2_~tmp~19#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset, ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset;havoc ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {20563#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:05,580 INFO L272 TraceCheckUtils]: 27: Hoare triple {20563#(= ~SERIAL_STATE~0 0)} call ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset := ldv_init_zalloc(1248); {20592#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:05,580 INFO L290 TraceCheckUtils]: 28: Hoare triple {20592#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {20561#true} is VALID [2022-02-20 22:07:05,580 INFO L272 TraceCheckUtils]: 29: Hoare triple {20561#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {20600#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:05,581 INFO L290 TraceCheckUtils]: 30: Hoare triple {20600#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {20561#true} is VALID [2022-02-20 22:07:05,581 INFO L290 TraceCheckUtils]: 31: Hoare triple {20561#true} assume true; {20561#true} is VALID [2022-02-20 22:07:05,581 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {20561#true} {20561#true} #547#return; {20561#true} is VALID [2022-02-20 22:07:05,581 INFO L290 TraceCheckUtils]: 33: Hoare triple {20561#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {20561#true} is VALID [2022-02-20 22:07:05,581 INFO L272 TraceCheckUtils]: 34: Hoare triple {20561#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {20561#true} is VALID [2022-02-20 22:07:05,581 INFO L290 TraceCheckUtils]: 35: Hoare triple {20561#true} ~cond := #in~cond; {20561#true} is VALID [2022-02-20 22:07:05,581 INFO L290 TraceCheckUtils]: 36: Hoare triple {20561#true} assume !(0 == ~cond); {20561#true} is VALID [2022-02-20 22:07:05,581 INFO L290 TraceCheckUtils]: 37: Hoare triple {20561#true} assume true; {20561#true} is VALID [2022-02-20 22:07:05,581 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {20561#true} {20561#true} #549#return; {20561#true} is VALID [2022-02-20 22:07:05,582 INFO L290 TraceCheckUtils]: 39: Hoare triple {20561#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {20561#true} is VALID [2022-02-20 22:07:05,582 INFO L290 TraceCheckUtils]: 40: Hoare triple {20561#true} assume true; {20561#true} is VALID [2022-02-20 22:07:05,582 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {20561#true} {20563#(= ~SERIAL_STATE~0 0)} #611#return; {20563#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:05,582 INFO L290 TraceCheckUtils]: 42: Hoare triple {20563#(= ~SERIAL_STATE~0 0)} ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset := ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset;havoc ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {20563#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:05,583 INFO L290 TraceCheckUtils]: 43: Hoare triple {20563#(= ~SERIAL_STATE~0 0)} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_2_#res#1 := ldv_usb_register_driver_2_~ldv_func_res~0#1; {20563#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:05,583 INFO L290 TraceCheckUtils]: 44: Hoare triple {20563#(= ~SERIAL_STATE~0 0)} usb_register_#t~ret31#1 := ldv_usb_register_driver_2_#res#1;assume { :end_inline_ldv_usb_register_driver_2 } true;assume -2147483648 <= usb_register_#t~ret31#1 && usb_register_#t~ret31#1 <= 2147483647;usb_register_~tmp~1#1 := usb_register_#t~ret31#1;havoc usb_register_#t~ret31#1;usb_register_#res#1 := usb_register_~tmp~1#1; {20563#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:05,583 INFO L290 TraceCheckUtils]: 45: Hoare triple {20563#(= ~SERIAL_STATE~0 0)} usb_acecad_init_#t~ret183#1 := usb_register_#res#1;assume { :end_inline_usb_register } true;assume -2147483648 <= usb_acecad_init_#t~ret183#1 && usb_acecad_init_#t~ret183#1 <= 2147483647;usb_acecad_init_~tmp~15#1 := usb_acecad_init_#t~ret183#1;havoc usb_acecad_init_#t~ret183#1;usb_acecad_init_~result~0#1 := usb_acecad_init_~tmp~15#1; {20563#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:05,584 INFO L290 TraceCheckUtils]: 46: Hoare triple {20563#(= ~SERIAL_STATE~0 0)} assume !(0 == usb_acecad_init_~result~0#1); {20563#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:05,584 INFO L290 TraceCheckUtils]: 47: Hoare triple {20563#(= ~SERIAL_STATE~0 0)} usb_acecad_init_#res#1 := usb_acecad_init_~result~0#1; {20563#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:05,584 INFO L290 TraceCheckUtils]: 48: Hoare triple {20563#(= ~SERIAL_STATE~0 0)} main_#t~ret194#1 := usb_acecad_init_#res#1;assume { :end_inline_usb_acecad_init } true;assume -2147483648 <= main_#t~ret194#1 && main_#t~ret194#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret194#1;havoc main_#t~ret194#1; {20563#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:05,584 INFO L290 TraceCheckUtils]: 49: Hoare triple {20563#(= ~SERIAL_STATE~0 0)} assume !(0 == ~ldv_retval_1~0); {20563#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:05,585 INFO L290 TraceCheckUtils]: 50: Hoare triple {20563#(= ~SERIAL_STATE~0 0)} assume 0 != ~ldv_retval_1~0;~ldv_state_variable_0~0 := 2; {20563#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:05,585 INFO L290 TraceCheckUtils]: 51: Hoare triple {20563#(= ~SERIAL_STATE~0 0)} assume { :begin_inline_ldv_check_final_state } true; {20563#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:05,585 INFO L290 TraceCheckUtils]: 52: Hoare triple {20563#(= ~SERIAL_STATE~0 0)} assume !(0 != ~URB_STATE~0); {20563#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:05,585 INFO L290 TraceCheckUtils]: 53: Hoare triple {20563#(= ~SERIAL_STATE~0 0)} assume !(0 != ~DEV_STATE~0); {20563#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:05,586 INFO L290 TraceCheckUtils]: 54: Hoare triple {20563#(= ~SERIAL_STATE~0 0)} assume !(0 != ~INTERF_STATE~0); {20563#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:05,586 INFO L290 TraceCheckUtils]: 55: Hoare triple {20563#(= ~SERIAL_STATE~0 0)} assume 0 != ~SERIAL_STATE~0; {20562#false} is VALID [2022-02-20 22:07:05,586 INFO L272 TraceCheckUtils]: 56: Hoare triple {20562#false} call ldv_error(); {20562#false} is VALID [2022-02-20 22:07:05,586 INFO L290 TraceCheckUtils]: 57: Hoare triple {20562#false} assume !false; {20562#false} is VALID [2022-02-20 22:07:05,587 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2022-02-20 22:07:05,587 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:07:05,587 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2074247065] [2022-02-20 22:07:05,587 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2074247065] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:07:05,587 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 22:07:05,587 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-02-20 22:07:05,588 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [63666119] [2022-02-20 22:07:05,588 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:07:05,588 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 7.2) internal successors, (36), 3 states have internal predecessors, (36), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 58 [2022-02-20 22:07:05,588 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:07:05,588 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 7.2) internal successors, (36), 3 states have internal predecessors, (36), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 22:07:05,615 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 45 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:05,615 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-02-20 22:07:05,615 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:07:05,616 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-02-20 22:07:05,616 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-02-20 22:07:05,616 INFO L87 Difference]: Start difference. First operand 826 states and 1073 transitions. Second operand has 5 states, 5 states have (on average 7.2) internal successors, (36), 3 states have internal predecessors, (36), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 22:07:06,319 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:06,319 INFO L93 Difference]: Finished difference Result 856 states and 1122 transitions. [2022-02-20 22:07:06,319 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-02-20 22:07:06,320 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 7.2) internal successors, (36), 3 states have internal predecessors, (36), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 58 [2022-02-20 22:07:06,320 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 22:07:06,320 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 7.2) internal successors, (36), 3 states have internal predecessors, (36), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 22:07:06,322 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 304 transitions. [2022-02-20 22:07:06,322 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 7.2) internal successors, (36), 3 states have internal predecessors, (36), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 22:07:06,324 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 304 transitions. [2022-02-20 22:07:06,324 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 304 transitions. [2022-02-20 22:07:06,576 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 304 edges. 304 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:06,610 INFO L225 Difference]: With dead ends: 856 [2022-02-20 22:07:06,610 INFO L226 Difference]: Without dead ends: 845 [2022-02-20 22:07:06,610 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2022-02-20 22:07:06,611 INFO L933 BasicCegarLoop]: 279 mSDtfsCounter, 313 mSDsluCounter, 158 mSDsCounter, 0 mSdLazyCounter, 70 mSolverCounterSat, 97 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 345 SdHoareTripleChecker+Valid, 437 SdHoareTripleChecker+Invalid, 167 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 97 IncrementalHoareTripleChecker+Valid, 70 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-02-20 22:07:06,612 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [345 Valid, 437 Invalid, 167 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [97 Valid, 70 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-02-20 22:07:06,613 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 845 states. [2022-02-20 22:07:06,630 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 845 to 817. [2022-02-20 22:07:06,631 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 22:07:06,632 INFO L82 GeneralOperation]: Start isEquivalent. First operand 845 states. Second operand has 817 states, 628 states have (on average 1.2643312101910829) internal successors, (794), 636 states have internal predecessors, (794), 134 states have call successors, (134), 55 states have call predecessors, (134), 54 states have return successors, (133), 133 states have call predecessors, (133), 133 states have call successors, (133) [2022-02-20 22:07:06,633 INFO L74 IsIncluded]: Start isIncluded. First operand 845 states. Second operand has 817 states, 628 states have (on average 1.2643312101910829) internal successors, (794), 636 states have internal predecessors, (794), 134 states have call successors, (134), 55 states have call predecessors, (134), 54 states have return successors, (133), 133 states have call predecessors, (133), 133 states have call successors, (133) [2022-02-20 22:07:06,634 INFO L87 Difference]: Start difference. First operand 845 states. Second operand has 817 states, 628 states have (on average 1.2643312101910829) internal successors, (794), 636 states have internal predecessors, (794), 134 states have call successors, (134), 55 states have call predecessors, (134), 54 states have return successors, (133), 133 states have call predecessors, (133), 133 states have call successors, (133) [2022-02-20 22:07:06,660 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:06,660 INFO L93 Difference]: Finished difference Result 845 states and 1109 transitions. [2022-02-20 22:07:06,660 INFO L276 IsEmpty]: Start isEmpty. Operand 845 states and 1109 transitions. [2022-02-20 22:07:06,661 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:06,662 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:06,663 INFO L74 IsIncluded]: Start isIncluded. First operand has 817 states, 628 states have (on average 1.2643312101910829) internal successors, (794), 636 states have internal predecessors, (794), 134 states have call successors, (134), 55 states have call predecessors, (134), 54 states have return successors, (133), 133 states have call predecessors, (133), 133 states have call successors, (133) Second operand 845 states. [2022-02-20 22:07:06,664 INFO L87 Difference]: Start difference. First operand has 817 states, 628 states have (on average 1.2643312101910829) internal successors, (794), 636 states have internal predecessors, (794), 134 states have call successors, (134), 55 states have call predecessors, (134), 54 states have return successors, (133), 133 states have call predecessors, (133), 133 states have call successors, (133) Second operand 845 states. [2022-02-20 22:07:06,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:06,690 INFO L93 Difference]: Finished difference Result 845 states and 1109 transitions. [2022-02-20 22:07:06,690 INFO L276 IsEmpty]: Start isEmpty. Operand 845 states and 1109 transitions. [2022-02-20 22:07:06,692 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:06,692 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:06,692 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 22:07:06,692 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 22:07:06,693 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 817 states, 628 states have (on average 1.2643312101910829) internal successors, (794), 636 states have internal predecessors, (794), 134 states have call successors, (134), 55 states have call predecessors, (134), 54 states have return successors, (133), 133 states have call predecessors, (133), 133 states have call successors, (133) [2022-02-20 22:07:06,723 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 817 states to 817 states and 1061 transitions. [2022-02-20 22:07:06,723 INFO L78 Accepts]: Start accepts. Automaton has 817 states and 1061 transitions. Word has length 58 [2022-02-20 22:07:06,723 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 22:07:06,723 INFO L470 AbstractCegarLoop]: Abstraction has 817 states and 1061 transitions. [2022-02-20 22:07:06,723 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 7.2) internal successors, (36), 3 states have internal predecessors, (36), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 22:07:06,723 INFO L276 IsEmpty]: Start isEmpty. Operand 817 states and 1061 transitions. [2022-02-20 22:07:06,728 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 154 [2022-02-20 22:07:06,728 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:07:06,728 INFO L514 BasicCegarLoop]: trace histogram [5, 5, 5, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:07:06,728 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2022-02-20 22:07:06,729 INFO L402 AbstractCegarLoop]: === Iteration 8 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:07:06,729 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:07:06,729 INFO L85 PathProgramCache]: Analyzing trace with hash 1841089283, now seen corresponding path program 1 times [2022-02-20 22:07:06,729 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:07:06,729 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [495698040] [2022-02-20 22:07:06,729 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:07:06,729 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:07:06,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:06,823 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 22:07:06,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:06,833 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:06,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:06,837 INFO L290 TraceCheckUtils]: 0: Hoare triple {24770#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {24685#true} is VALID [2022-02-20 22:07:06,837 INFO L290 TraceCheckUtils]: 1: Hoare triple {24685#true} assume true; {24685#true} is VALID [2022-02-20 22:07:06,837 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {24685#true} {24685#true} #547#return; {24685#true} is VALID [2022-02-20 22:07:06,837 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:06,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:06,856 INFO L290 TraceCheckUtils]: 0: Hoare triple {24685#true} ~cond := #in~cond; {24685#true} is VALID [2022-02-20 22:07:06,856 INFO L290 TraceCheckUtils]: 1: Hoare triple {24685#true} assume !(0 == ~cond); {24685#true} is VALID [2022-02-20 22:07:06,856 INFO L290 TraceCheckUtils]: 2: Hoare triple {24685#true} assume true; {24685#true} is VALID [2022-02-20 22:07:06,856 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {24685#true} {24685#true} #549#return; {24685#true} is VALID [2022-02-20 22:07:06,856 INFO L290 TraceCheckUtils]: 0: Hoare triple {24762#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {24685#true} is VALID [2022-02-20 22:07:06,857 INFO L272 TraceCheckUtils]: 1: Hoare triple {24685#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {24770#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:06,857 INFO L290 TraceCheckUtils]: 2: Hoare triple {24770#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {24685#true} is VALID [2022-02-20 22:07:06,857 INFO L290 TraceCheckUtils]: 3: Hoare triple {24685#true} assume true; {24685#true} is VALID [2022-02-20 22:07:06,857 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {24685#true} {24685#true} #547#return; {24685#true} is VALID [2022-02-20 22:07:06,857 INFO L290 TraceCheckUtils]: 5: Hoare triple {24685#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {24685#true} is VALID [2022-02-20 22:07:06,857 INFO L272 TraceCheckUtils]: 6: Hoare triple {24685#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {24685#true} is VALID [2022-02-20 22:07:06,857 INFO L290 TraceCheckUtils]: 7: Hoare triple {24685#true} ~cond := #in~cond; {24685#true} is VALID [2022-02-20 22:07:06,857 INFO L290 TraceCheckUtils]: 8: Hoare triple {24685#true} assume !(0 == ~cond); {24685#true} is VALID [2022-02-20 22:07:06,857 INFO L290 TraceCheckUtils]: 9: Hoare triple {24685#true} assume true; {24685#true} is VALID [2022-02-20 22:07:06,857 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {24685#true} {24685#true} #549#return; {24685#true} is VALID [2022-02-20 22:07:06,857 INFO L290 TraceCheckUtils]: 11: Hoare triple {24685#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {24685#true} is VALID [2022-02-20 22:07:06,858 INFO L290 TraceCheckUtils]: 12: Hoare triple {24685#true} assume true; {24685#true} is VALID [2022-02-20 22:07:06,858 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {24685#true} {24685#true} #553#return; {24685#true} is VALID [2022-02-20 22:07:06,862 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 24 [2022-02-20 22:07:06,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:06,867 INFO L290 TraceCheckUtils]: 0: Hoare triple {24771#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {24685#true} is VALID [2022-02-20 22:07:06,867 INFO L290 TraceCheckUtils]: 1: Hoare triple {24685#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {24685#true} is VALID [2022-02-20 22:07:06,867 INFO L290 TraceCheckUtils]: 2: Hoare triple {24685#true} assume true; {24685#true} is VALID [2022-02-20 22:07:06,867 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {24685#true} {24686#false} #555#return; {24686#false} is VALID [2022-02-20 22:07:06,867 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 42 [2022-02-20 22:07:06,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:06,873 INFO L290 TraceCheckUtils]: 0: Hoare triple {24685#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {24685#true} is VALID [2022-02-20 22:07:06,873 INFO L290 TraceCheckUtils]: 1: Hoare triple {24685#true} assume true; {24685#true} is VALID [2022-02-20 22:07:06,873 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {24685#true} {24686#false} #563#return; {24686#false} is VALID [2022-02-20 22:07:06,873 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 48 [2022-02-20 22:07:06,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:06,877 INFO L290 TraceCheckUtils]: 0: Hoare triple {24685#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {24685#true} is VALID [2022-02-20 22:07:06,877 INFO L290 TraceCheckUtils]: 1: Hoare triple {24685#true} assume true; {24685#true} is VALID [2022-02-20 22:07:06,877 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {24685#true} {24686#false} #567#return; {24686#false} is VALID [2022-02-20 22:07:06,877 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 55 [2022-02-20 22:07:06,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:06,884 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:06,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:06,889 INFO L290 TraceCheckUtils]: 0: Hoare triple {24771#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {24685#true} is VALID [2022-02-20 22:07:06,889 INFO L290 TraceCheckUtils]: 1: Hoare triple {24685#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {24685#true} is VALID [2022-02-20 22:07:06,889 INFO L290 TraceCheckUtils]: 2: Hoare triple {24685#true} assume true; {24685#true} is VALID [2022-02-20 22:07:06,889 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {24685#true} {24685#true} #539#return; {24685#true} is VALID [2022-02-20 22:07:06,890 INFO L290 TraceCheckUtils]: 0: Hoare triple {24771#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {24685#true} is VALID [2022-02-20 22:07:06,890 INFO L272 TraceCheckUtils]: 1: Hoare triple {24685#true} call __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset := ldv_malloc(__kmalloc_~size#1); {24771#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:06,890 INFO L290 TraceCheckUtils]: 2: Hoare triple {24771#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {24685#true} is VALID [2022-02-20 22:07:06,890 INFO L290 TraceCheckUtils]: 3: Hoare triple {24685#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {24685#true} is VALID [2022-02-20 22:07:06,891 INFO L290 TraceCheckUtils]: 4: Hoare triple {24685#true} assume true; {24685#true} is VALID [2022-02-20 22:07:06,891 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {24685#true} {24685#true} #539#return; {24685#true} is VALID [2022-02-20 22:07:06,891 INFO L290 TraceCheckUtils]: 6: Hoare triple {24685#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset; {24685#true} is VALID [2022-02-20 22:07:06,891 INFO L290 TraceCheckUtils]: 7: Hoare triple {24685#true} kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {24685#true} is VALID [2022-02-20 22:07:06,891 INFO L290 TraceCheckUtils]: 8: Hoare triple {24685#true} #t~ret58#1.base, #t~ret58#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret58#1.base, #t~ret58#1.offset;havoc #t~ret58#1.base, #t~ret58#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {24685#true} is VALID [2022-02-20 22:07:06,891 INFO L290 TraceCheckUtils]: 9: Hoare triple {24685#true} assume true; {24685#true} is VALID [2022-02-20 22:07:06,892 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {24685#true} {24686#false} #569#return; {24686#false} is VALID [2022-02-20 22:07:06,892 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 68 [2022-02-20 22:07:06,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:06,900 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:06,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:06,904 INFO L290 TraceCheckUtils]: 0: Hoare triple {24771#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {24685#true} is VALID [2022-02-20 22:07:06,905 INFO L290 TraceCheckUtils]: 1: Hoare triple {24685#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {24685#true} is VALID [2022-02-20 22:07:06,905 INFO L290 TraceCheckUtils]: 2: Hoare triple {24685#true} assume true; {24685#true} is VALID [2022-02-20 22:07:06,905 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {24685#true} {24685#true} #539#return; {24685#true} is VALID [2022-02-20 22:07:06,905 INFO L290 TraceCheckUtils]: 0: Hoare triple {24771#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {24685#true} is VALID [2022-02-20 22:07:06,905 INFO L272 TraceCheckUtils]: 1: Hoare triple {24685#true} call __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset := ldv_malloc(__kmalloc_~size#1); {24771#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:06,906 INFO L290 TraceCheckUtils]: 2: Hoare triple {24771#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {24685#true} is VALID [2022-02-20 22:07:06,906 INFO L290 TraceCheckUtils]: 3: Hoare triple {24685#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {24685#true} is VALID [2022-02-20 22:07:06,906 INFO L290 TraceCheckUtils]: 4: Hoare triple {24685#true} assume true; {24685#true} is VALID [2022-02-20 22:07:06,906 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {24685#true} {24685#true} #539#return; {24685#true} is VALID [2022-02-20 22:07:06,906 INFO L290 TraceCheckUtils]: 6: Hoare triple {24685#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset; {24685#true} is VALID [2022-02-20 22:07:06,906 INFO L290 TraceCheckUtils]: 7: Hoare triple {24685#true} kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {24685#true} is VALID [2022-02-20 22:07:06,906 INFO L290 TraceCheckUtils]: 8: Hoare triple {24685#true} #t~ret58#1.base, #t~ret58#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret58#1.base, #t~ret58#1.offset;havoc #t~ret58#1.base, #t~ret58#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {24685#true} is VALID [2022-02-20 22:07:06,906 INFO L290 TraceCheckUtils]: 9: Hoare triple {24685#true} assume true; {24685#true} is VALID [2022-02-20 22:07:06,907 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {24685#true} {24686#false} #571#return; {24686#false} is VALID [2022-02-20 22:07:06,907 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 83 [2022-02-20 22:07:06,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:06,915 INFO L290 TraceCheckUtils]: 0: Hoare triple {24771#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {24685#true} is VALID [2022-02-20 22:07:06,915 INFO L290 TraceCheckUtils]: 1: Hoare triple {24685#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {24685#true} is VALID [2022-02-20 22:07:06,915 INFO L290 TraceCheckUtils]: 2: Hoare triple {24685#true} assume true; {24685#true} is VALID [2022-02-20 22:07:06,916 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {24685#true} {24686#false} #573#return; {24686#false} is VALID [2022-02-20 22:07:06,916 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 91 [2022-02-20 22:07:06,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:06,921 INFO L290 TraceCheckUtils]: 0: Hoare triple {24771#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {24685#true} is VALID [2022-02-20 22:07:06,921 INFO L290 TraceCheckUtils]: 1: Hoare triple {24685#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {24685#true} is VALID [2022-02-20 22:07:06,921 INFO L290 TraceCheckUtils]: 2: Hoare triple {24685#true} assume true; {24685#true} is VALID [2022-02-20 22:07:06,921 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {24685#true} {24686#false} #575#return; {24686#false} is VALID [2022-02-20 22:07:06,921 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 103 [2022-02-20 22:07:06,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:06,925 INFO L290 TraceCheckUtils]: 0: Hoare triple {24685#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1 := #in~arg1;~arg2.base, ~arg2.offset := #in~arg2.base, #in~arg2.offset;~arg3 := #in~arg3; {24685#true} is VALID [2022-02-20 22:07:06,925 INFO L290 TraceCheckUtils]: 1: Hoare triple {24685#true} assume true; {24685#true} is VALID [2022-02-20 22:07:06,925 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {24685#true} {24686#false} #603#return; {24686#false} is VALID [2022-02-20 22:07:06,928 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 110 [2022-02-20 22:07:06,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:06,932 INFO L290 TraceCheckUtils]: 0: Hoare triple {24780#(= |old(#valid)| |#valid|)} ~p.base, ~p.offset := #in~p.base, #in~p.offset;call ULTIMATE.dealloc(~p.base, ~p.offset); {24685#true} is VALID [2022-02-20 22:07:06,932 INFO L290 TraceCheckUtils]: 1: Hoare triple {24685#true} assume true; {24685#true} is VALID [2022-02-20 22:07:06,932 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {24685#true} {24686#false} #605#return; {24686#false} is VALID [2022-02-20 22:07:06,933 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 125 [2022-02-20 22:07:06,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:06,941 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:06,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:06,944 INFO L290 TraceCheckUtils]: 0: Hoare triple {24770#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {24685#true} is VALID [2022-02-20 22:07:06,944 INFO L290 TraceCheckUtils]: 1: Hoare triple {24685#true} assume true; {24685#true} is VALID [2022-02-20 22:07:06,944 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {24685#true} {24685#true} #547#return; {24685#true} is VALID [2022-02-20 22:07:06,944 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:06,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:06,949 INFO L290 TraceCheckUtils]: 0: Hoare triple {24685#true} ~cond := #in~cond; {24685#true} is VALID [2022-02-20 22:07:06,949 INFO L290 TraceCheckUtils]: 1: Hoare triple {24685#true} assume !(0 == ~cond); {24685#true} is VALID [2022-02-20 22:07:06,949 INFO L290 TraceCheckUtils]: 2: Hoare triple {24685#true} assume true; {24685#true} is VALID [2022-02-20 22:07:06,949 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {24685#true} {24685#true} #549#return; {24685#true} is VALID [2022-02-20 22:07:06,949 INFO L290 TraceCheckUtils]: 0: Hoare triple {24762#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {24685#true} is VALID [2022-02-20 22:07:06,950 INFO L272 TraceCheckUtils]: 1: Hoare triple {24685#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {24770#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:06,950 INFO L290 TraceCheckUtils]: 2: Hoare triple {24770#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {24685#true} is VALID [2022-02-20 22:07:06,950 INFO L290 TraceCheckUtils]: 3: Hoare triple {24685#true} assume true; {24685#true} is VALID [2022-02-20 22:07:06,950 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {24685#true} {24685#true} #547#return; {24685#true} is VALID [2022-02-20 22:07:06,950 INFO L290 TraceCheckUtils]: 5: Hoare triple {24685#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {24685#true} is VALID [2022-02-20 22:07:06,951 INFO L272 TraceCheckUtils]: 6: Hoare triple {24685#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {24685#true} is VALID [2022-02-20 22:07:06,951 INFO L290 TraceCheckUtils]: 7: Hoare triple {24685#true} ~cond := #in~cond; {24685#true} is VALID [2022-02-20 22:07:06,951 INFO L290 TraceCheckUtils]: 8: Hoare triple {24685#true} assume !(0 == ~cond); {24685#true} is VALID [2022-02-20 22:07:06,951 INFO L290 TraceCheckUtils]: 9: Hoare triple {24685#true} assume true; {24685#true} is VALID [2022-02-20 22:07:06,951 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {24685#true} {24685#true} #549#return; {24685#true} is VALID [2022-02-20 22:07:06,951 INFO L290 TraceCheckUtils]: 11: Hoare triple {24685#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {24685#true} is VALID [2022-02-20 22:07:06,951 INFO L290 TraceCheckUtils]: 12: Hoare triple {24685#true} assume true; {24685#true} is VALID [2022-02-20 22:07:06,952 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {24685#true} {24686#false} #611#return; {24686#false} is VALID [2022-02-20 22:07:06,952 INFO L290 TraceCheckUtils]: 0: Hoare triple {24685#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(99, 2);call #Ultimate.allocInit(10, 3);call #Ultimate.allocInit(7, 4);call write~init~int(97, 4, 0, 1);call write~init~int(99, 4, 1, 1);call write~init~int(101, 4, 2, 1);call write~init~int(99, 4, 3, 1);call write~init~int(97, 4, 4, 1);call write~init~int(100, 4, 5, 1);call write~init~int(0, 4, 6, 1);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(20, 6);call #Ultimate.allocInit(57, 7);call #Ultimate.allocInit(2, 8);call write~init~int(32, 8, 0, 1);call write~init~int(0, 8, 1, 1);call #Ultimate.allocInit(8, 9);call #Ultimate.allocInit(34, 10);call #Ultimate.allocInit(32, 11);call #Ultimate.allocInit(11, 12);call #Ultimate.allocInit(48, 13);~LDV_IN_INTERRUPT~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset := 14, 0;call #Ultimate.allocInit(72, 14);call write~init~int(3, ~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 2 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(4, ~#usb_acecad_id_table~0.base, 4 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 6 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 8 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 10 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 11 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 12 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 13 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 14 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 15 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 16 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(3, ~#usb_acecad_id_table~0.base, 24 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 26 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(8, ~#usb_acecad_id_table~0.base, 28 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 30 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 32 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 34 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 35 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 36 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 37 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 38 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 39 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(1, ~#usb_acecad_id_table~0.base, 40 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(0, ~#usb_acecad_id_table~0.base, 48 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 50 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 52 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 54 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 56 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 58 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 59 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 60 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 61 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 62 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 63 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 64 + ~#usb_acecad_id_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.driver_info := 0;~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset := 15, 0;call #Ultimate.allocInit(264, 15);call write~init~$Pointer$(12, 0, ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_probe.base, #funAddr~usb_acecad_probe.offset, ~#usb_acecad_driver~0.base, 8 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_disconnect.base, #funAddr~usb_acecad_disconnect.offset, ~#usb_acecad_driver~0.base, 16 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 24 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 32 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 40 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 48 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 56 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 64 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, ~#usb_acecad_driver~0.base, 72 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 80 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 84 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 88 + ~#usb_acecad_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 92 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 100 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 108 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 116 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 124 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 132 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 136 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 144 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 152 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 160 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 168 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 176 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 184 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 192 + ~#usb_acecad_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 193 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 201 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 209 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 217 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 225 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 233 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 241 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 249 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 257 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 261 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 262 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 263 + ~#usb_acecad_driver~0.offset, 1);~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~URB_STATE~0 := 0;~DEV_STATE~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~int_urb~0.base, ~int_urb~0.offset := 0, 0;~bulk_urb~0.base, ~bulk_urb~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {24685#true} is VALID [2022-02-20 22:07:06,952 INFO L290 TraceCheckUtils]: 1: Hoare triple {24685#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret186#1.base, main_#t~ret186#1.offset, main_#t~nondet187#1, main_#t~switch188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~ret191#1, main_#t~nondet192#1, main_#t~switch193#1, main_#t~ret194#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~17#1.base, main_~tmp~17#1.offset, main_~tmp___0~6#1, main_~tmp___1~3#1, main_~tmp___2~1#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~17#1.base, main_~tmp~17#1.offset;havoc main_~tmp___0~6#1;havoc main_~tmp___1~3#1;havoc main_~tmp___2~1#1; {24685#true} is VALID [2022-02-20 22:07:06,952 INFO L272 TraceCheckUtils]: 2: Hoare triple {24685#true} call main_#t~ret186#1.base, main_#t~ret186#1.offset := ldv_init_zalloc(24); {24762#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:06,953 INFO L290 TraceCheckUtils]: 3: Hoare triple {24762#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {24685#true} is VALID [2022-02-20 22:07:06,953 INFO L272 TraceCheckUtils]: 4: Hoare triple {24685#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {24770#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:06,953 INFO L290 TraceCheckUtils]: 5: Hoare triple {24770#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {24685#true} is VALID [2022-02-20 22:07:06,953 INFO L290 TraceCheckUtils]: 6: Hoare triple {24685#true} assume true; {24685#true} is VALID [2022-02-20 22:07:06,953 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {24685#true} {24685#true} #547#return; {24685#true} is VALID [2022-02-20 22:07:06,954 INFO L290 TraceCheckUtils]: 8: Hoare triple {24685#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {24685#true} is VALID [2022-02-20 22:07:06,954 INFO L272 TraceCheckUtils]: 9: Hoare triple {24685#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {24685#true} is VALID [2022-02-20 22:07:06,954 INFO L290 TraceCheckUtils]: 10: Hoare triple {24685#true} ~cond := #in~cond; {24685#true} is VALID [2022-02-20 22:07:06,954 INFO L290 TraceCheckUtils]: 11: Hoare triple {24685#true} assume !(0 == ~cond); {24685#true} is VALID [2022-02-20 22:07:06,954 INFO L290 TraceCheckUtils]: 12: Hoare triple {24685#true} assume true; {24685#true} is VALID [2022-02-20 22:07:06,954 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {24685#true} {24685#true} #549#return; {24685#true} is VALID [2022-02-20 22:07:06,954 INFO L290 TraceCheckUtils]: 14: Hoare triple {24685#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {24685#true} is VALID [2022-02-20 22:07:06,954 INFO L290 TraceCheckUtils]: 15: Hoare triple {24685#true} assume true; {24685#true} is VALID [2022-02-20 22:07:06,955 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {24685#true} {24685#true} #553#return; {24685#true} is VALID [2022-02-20 22:07:06,955 INFO L290 TraceCheckUtils]: 17: Hoare triple {24685#true} main_~tmp~17#1.base, main_~tmp~17#1.offset := main_#t~ret186#1.base, main_#t~ret186#1.offset;havoc main_#t~ret186#1.base, main_#t~ret186#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~17#1.base, main_~tmp~17#1.offset;assume { :begin_inline_ldv_initialize } true; {24685#true} is VALID [2022-02-20 22:07:06,955 INFO L290 TraceCheckUtils]: 18: Hoare triple {24685#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1; {24701#(= ~ldv_state_variable_1~0 0)} is VALID [2022-02-20 22:07:06,955 INFO L290 TraceCheckUtils]: 19: Hoare triple {24701#(= ~ldv_state_variable_1~0 0)} assume -2147483648 <= main_#t~nondet187#1 && main_#t~nondet187#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet187#1;havoc main_#t~nondet187#1;main_#t~switch188#1 := 0 == main_~tmp___0~6#1; {24701#(= ~ldv_state_variable_1~0 0)} is VALID [2022-02-20 22:07:06,956 INFO L290 TraceCheckUtils]: 20: Hoare triple {24701#(= ~ldv_state_variable_1~0 0)} assume main_#t~switch188#1; {24701#(= ~ldv_state_variable_1~0 0)} is VALID [2022-02-20 22:07:06,956 INFO L290 TraceCheckUtils]: 21: Hoare triple {24701#(= ~ldv_state_variable_1~0 0)} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= main_#t~nondet189#1 && main_#t~nondet189#1 <= 2147483647;main_~tmp___1~3#1 := main_#t~nondet189#1;havoc main_#t~nondet189#1;main_#t~switch190#1 := 0 == main_~tmp___1~3#1; {24686#false} is VALID [2022-02-20 22:07:06,956 INFO L290 TraceCheckUtils]: 22: Hoare triple {24686#false} assume main_#t~switch190#1; {24686#false} is VALID [2022-02-20 22:07:06,957 INFO L290 TraceCheckUtils]: 23: Hoare triple {24686#false} assume 1 == ~ldv_state_variable_1~0;assume { :begin_inline_usb_acecad_probe } true;usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset, usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset := ~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc usb_acecad_probe_#res#1;havoc usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset, usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset, usb_acecad_probe_#t~mem132#1, usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset, usb_acecad_probe_#t~ret134#1, usb_acecad_probe_#t~mem135#1, usb_acecad_probe_#t~ret136#1, usb_acecad_probe_#t~ret137#1, usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset, usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset, usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset, usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset, usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset, usb_acecad_probe_#t~mem143#1.base, usb_acecad_probe_#t~mem143#1.offset, usb_acecad_probe_#t~mem144#1.base, usb_acecad_probe_#t~mem144#1.offset, usb_acecad_probe_#t~mem145#1.base, usb_acecad_probe_#t~mem145#1.offset, usb_acecad_probe_#t~ret146#1, usb_acecad_probe_#t~mem147#1.base, usb_acecad_probe_#t~mem147#1.offset, usb_acecad_probe_#t~mem148#1.base, usb_acecad_probe_#t~mem148#1.offset, usb_acecad_probe_#t~ret149#1, usb_acecad_probe_#t~mem150#1.base, usb_acecad_probe_#t~mem150#1.offset, usb_acecad_probe_#t~ret151#1, usb_acecad_probe_#t~ret152#1, usb_acecad_probe_#t~ret153#1, usb_acecad_probe_#t~mem154#1, usb_acecad_probe_#t~switch155#1, usb_acecad_probe_#t~nondet156#1, usb_acecad_probe_#t~nondet157#1, usb_acecad_probe_#t~mem158#1, usb_acecad_probe_#t~mem159#1, usb_acecad_probe_#t~nondet160#1, usb_acecad_probe_#t~nondet161#1, usb_acecad_probe_#t~mem162#1, usb_acecad_probe_#t~mem163#1, usb_acecad_probe_#t~mem164#1.base, usb_acecad_probe_#t~mem164#1.offset, usb_acecad_probe_#t~mem165#1.base, usb_acecad_probe_#t~mem165#1.offset, usb_acecad_probe_#t~ite166#1, usb_acecad_probe_#t~mem167#1, usb_acecad_probe_#t~mem168#1.base, usb_acecad_probe_#t~mem168#1.offset, usb_acecad_probe_#t~mem169#1, usb_acecad_probe_#t~mem170#1.base, usb_acecad_probe_#t~mem170#1.offset, usb_acecad_probe_#t~mem171#1.base, usb_acecad_probe_#t~mem171#1.offset, usb_acecad_probe_#t~mem172#1, usb_acecad_probe_#t~mem173#1.base, usb_acecad_probe_#t~mem173#1.offset, usb_acecad_probe_#t~ret174#1, usb_acecad_probe_#t~mem175#1.base, usb_acecad_probe_#t~mem175#1.offset, usb_acecad_probe_#t~mem176#1, usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset, usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset, usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset, usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset, usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset, usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset, usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset, usb_acecad_probe_~pipe~0#1, usb_acecad_probe_~maxp~0#1, usb_acecad_probe_~err~0#1, usb_acecad_probe_~tmp___0~5#1, usb_acecad_probe_~tmp___1~2#1, usb_acecad_probe_~tmp___2~0#1, usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset, usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~tmp___5~0#1, usb_acecad_probe_~tmp___6~0#1;usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset := usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset;usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset := usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset;havoc usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset;havoc usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;havoc usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset;havoc usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset;havoc usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset;havoc usb_acecad_probe_~pipe~0#1;havoc usb_acecad_probe_~maxp~0#1;havoc usb_acecad_probe_~err~0#1;havoc usb_acecad_probe_~tmp___0~5#1;havoc usb_acecad_probe_~tmp___1~2#1;havoc usb_acecad_probe_~tmp___2~0#1;havoc usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;havoc usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset;havoc usb_acecad_probe_~tmp___5~0#1;havoc usb_acecad_probe_~tmp___6~0#1;assume { :begin_inline_interface_to_usbdev } true;interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset := usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset;havoc interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;havoc interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset, interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset, interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset := interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset;havoc interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;assume { :begin_inline_ldv_interface_to_usbdev } true;havoc ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;havoc ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset, ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset;havoc ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset; {24686#false} is VALID [2022-02-20 22:07:06,957 INFO L272 TraceCheckUtils]: 24: Hoare triple {24686#false} call ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset := ldv_malloc(1822); {24771#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:06,957 INFO L290 TraceCheckUtils]: 25: Hoare triple {24771#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {24685#true} is VALID [2022-02-20 22:07:06,957 INFO L290 TraceCheckUtils]: 26: Hoare triple {24685#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {24685#true} is VALID [2022-02-20 22:07:06,957 INFO L290 TraceCheckUtils]: 27: Hoare triple {24685#true} assume true; {24685#true} is VALID [2022-02-20 22:07:06,957 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {24685#true} {24686#false} #555#return; {24686#false} is VALID [2022-02-20 22:07:06,958 INFO L290 TraceCheckUtils]: 29: Hoare triple {24686#false} ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset := ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset;havoc ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset; {24686#false} is VALID [2022-02-20 22:07:06,958 INFO L290 TraceCheckUtils]: 30: Hoare triple {24686#false} assume !(0 == (ldv_interface_to_usbdev_~result~1#1.base + ldv_interface_to_usbdev_~result~1#1.offset) % 18446744073709551616);ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset := ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset; {24686#false} is VALID [2022-02-20 22:07:06,958 INFO L290 TraceCheckUtils]: 31: Hoare triple {24686#false} interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset := ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;assume { :end_inline_ldv_interface_to_usbdev } true;interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset := interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset;havoc interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset;interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset := interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset; {24686#false} is VALID [2022-02-20 22:07:06,958 INFO L290 TraceCheckUtils]: 32: Hoare triple {24686#false} usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset := interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;assume { :end_inline_interface_to_usbdev } true;usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset := usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset;havoc usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset;usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset := usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;call usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset := read~$Pointer$(usb_acecad_probe_~intf#1.base, 8 + usb_acecad_probe_~intf#1.offset, 8);usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset := usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset;havoc usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset;call usb_acecad_probe_#t~mem132#1 := read~int(usb_acecad_probe_~interface~0#1.base, 4 + usb_acecad_probe_~interface~0#1.offset, 1); {24686#false} is VALID [2022-02-20 22:07:06,962 INFO L290 TraceCheckUtils]: 33: Hoare triple {24686#false} assume !(1 != usb_acecad_probe_#t~mem132#1 % 256 % 4294967296);havoc usb_acecad_probe_#t~mem132#1;call usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset := read~$Pointer$(usb_acecad_probe_~interface~0#1.base, 9 + usb_acecad_probe_~interface~0#1.offset, 8);usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset := usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset;havoc usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset;assume { :begin_inline_usb_endpoint_is_int_in } true;usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset := usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_endpoint_is_int_in_#res#1;havoc usb_endpoint_is_int_in_#t~ret3#1, usb_endpoint_is_int_in_#t~ret4#1, usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset, usb_endpoint_is_int_in_~tmp~0#1, usb_endpoint_is_int_in_~tmp___0~0#1, usb_endpoint_is_int_in_~tmp___1~0#1;usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset := usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset;havoc usb_endpoint_is_int_in_~tmp~0#1;havoc usb_endpoint_is_int_in_~tmp___0~0#1;havoc usb_endpoint_is_int_in_~tmp___1~0#1;assume { :begin_inline_usb_endpoint_xfer_int } true;usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset := usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset;havoc usb_endpoint_xfer_int_#res#1;havoc usb_endpoint_xfer_int_#t~mem2#1, usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset;usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset := usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset;call usb_endpoint_xfer_int_#t~mem2#1 := read~int(usb_endpoint_xfer_int_~epd#1.base, 3 + usb_endpoint_xfer_int_~epd#1.offset, 1);usb_endpoint_xfer_int_#res#1 := (if 3 == (if 0 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 0 else (if 1 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 1 else ~bitwiseAnd(usb_endpoint_xfer_int_#t~mem2#1 % 256, 3))) then 1 else 0);havoc usb_endpoint_xfer_int_#t~mem2#1; {24686#false} is VALID [2022-02-20 22:07:06,962 INFO L290 TraceCheckUtils]: 34: Hoare triple {24686#false} usb_endpoint_is_int_in_#t~ret3#1 := usb_endpoint_xfer_int_#res#1;assume { :end_inline_usb_endpoint_xfer_int } true;assume -2147483648 <= usb_endpoint_is_int_in_#t~ret3#1 && usb_endpoint_is_int_in_#t~ret3#1 <= 2147483647;usb_endpoint_is_int_in_~tmp~0#1 := usb_endpoint_is_int_in_#t~ret3#1;havoc usb_endpoint_is_int_in_#t~ret3#1; {24686#false} is VALID [2022-02-20 22:07:06,963 INFO L290 TraceCheckUtils]: 35: Hoare triple {24686#false} assume !(0 != usb_endpoint_is_int_in_~tmp~0#1);usb_endpoint_is_int_in_~tmp___1~0#1 := 0; {24686#false} is VALID [2022-02-20 22:07:06,963 INFO L290 TraceCheckUtils]: 36: Hoare triple {24686#false} usb_endpoint_is_int_in_#res#1 := usb_endpoint_is_int_in_~tmp___1~0#1; {24686#false} is VALID [2022-02-20 22:07:06,963 INFO L290 TraceCheckUtils]: 37: Hoare triple {24686#false} usb_acecad_probe_#t~ret134#1 := usb_endpoint_is_int_in_#res#1;assume { :end_inline_usb_endpoint_is_int_in } true;assume -2147483648 <= usb_acecad_probe_#t~ret134#1 && usb_acecad_probe_#t~ret134#1 <= 2147483647;usb_acecad_probe_~tmp___0~5#1 := usb_acecad_probe_#t~ret134#1;havoc usb_acecad_probe_#t~ret134#1; {24686#false} is VALID [2022-02-20 22:07:06,963 INFO L290 TraceCheckUtils]: 38: Hoare triple {24686#false} assume !(0 == usb_acecad_probe_~tmp___0~5#1);call usb_acecad_probe_#t~mem135#1 := read~int(usb_acecad_probe_~endpoint~0#1.base, 2 + usb_acecad_probe_~endpoint~0#1.offset, 1);assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_#t~mem135#1 % 256;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem45#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem45#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := (if (1 == 256 * __create_pipe_#t~mem45#1 || 0 == 256 * __create_pipe_#t~mem45#1) && 0 == 32768 * __create_pipe_~endpoint#1 then 256 * __create_pipe_#t~mem45#1 else (if 0 == 256 * __create_pipe_#t~mem45#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1) then 32768 * __create_pipe_~endpoint#1 else (if (1 == 256 * __create_pipe_#t~mem45#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1)) || ((1 == 256 * __create_pipe_#t~mem45#1 || 0 == 256 * __create_pipe_#t~mem45#1) && 1 == 32768 * __create_pipe_~endpoint#1) then 1 else ~bitwiseOr(256 * __create_pipe_#t~mem45#1, 32768 * __create_pipe_~endpoint#1))));havoc __create_pipe_#t~mem45#1; {24686#false} is VALID [2022-02-20 22:07:06,964 INFO L290 TraceCheckUtils]: 39: Hoare triple {24686#false} usb_acecad_probe_#t~ret136#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;usb_acecad_probe_~tmp___1~2#1 := usb_acecad_probe_#t~ret136#1;havoc usb_acecad_probe_#t~mem135#1;havoc usb_acecad_probe_#t~ret136#1;usb_acecad_probe_~pipe~0#1 := (if ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 else ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 - 4294967296);assume { :begin_inline_usb_maxpacket } true;usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset, usb_maxpacket_#in~pipe#1, usb_maxpacket_#in~is_out#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~pipe~0#1, (if 0 == (if 0 == usb_acecad_probe_~pipe~0#1 then 0 else (if 1 == usb_acecad_probe_~pipe~0#1 then 0 else ~bitwiseAnd(usb_acecad_probe_~pipe~0#1, 128))) then 1 else 0);havoc usb_maxpacket_#res#1;havoc usb_maxpacket_#t~ret47#1, usb_maxpacket_#t~ret48#1, usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset, usb_maxpacket_#t~ret50#1, usb_maxpacket_#t~ret51#1, usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset, usb_maxpacket_#t~mem53#1, usb_maxpacket_#t~nondet46#1, usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset, usb_maxpacket_~pipe#1, usb_maxpacket_~is_out#1, usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset, usb_maxpacket_~epnum~0#1, usb_maxpacket_~__ret_warn_on~0#1, usb_maxpacket_~tmp~2#1, usb_maxpacket_~__ret_warn_on___0~0#1, usb_maxpacket_~tmp___0~1#1;usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset := usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset;usb_maxpacket_~pipe#1 := usb_maxpacket_#in~pipe#1;usb_maxpacket_~is_out#1 := usb_maxpacket_#in~is_out#1;havoc usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset;havoc usb_maxpacket_~epnum~0#1;havoc usb_maxpacket_~__ret_warn_on~0#1;havoc usb_maxpacket_~tmp~2#1;havoc usb_maxpacket_~__ret_warn_on___0~0#1;havoc usb_maxpacket_~tmp___0~1#1; {24686#false} is VALID [2022-02-20 22:07:06,964 INFO L290 TraceCheckUtils]: 40: Hoare triple {24686#false} assume 0 == usb_maxpacket_~pipe#1 / 32768;usb_maxpacket_~epnum~0#1 := 0; {24686#false} is VALID [2022-02-20 22:07:06,964 INFO L290 TraceCheckUtils]: 41: Hoare triple {24686#false} assume !(0 != usb_maxpacket_~is_out#1);usb_maxpacket_~__ret_warn_on___0~0#1 := (if 0 == (if 0 == usb_maxpacket_~pipe#1 then 0 else (if 1 == usb_maxpacket_~pipe#1 then 0 else ~bitwiseAnd(usb_maxpacket_~pipe#1, 128))) then 1 else 0); {24686#false} is VALID [2022-02-20 22:07:06,964 INFO L272 TraceCheckUtils]: 42: Hoare triple {24686#false} call usb_maxpacket_#t~ret50#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {24685#true} is VALID [2022-02-20 22:07:06,964 INFO L290 TraceCheckUtils]: 43: Hoare triple {24685#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {24685#true} is VALID [2022-02-20 22:07:06,965 INFO L290 TraceCheckUtils]: 44: Hoare triple {24685#true} assume true; {24685#true} is VALID [2022-02-20 22:07:06,965 INFO L284 TraceCheckUtils]: 45: Hoare quadruple {24685#true} {24686#false} #563#return; {24686#false} is VALID [2022-02-20 22:07:06,965 INFO L290 TraceCheckUtils]: 46: Hoare triple {24686#false} assume -9223372036854775808 <= usb_maxpacket_#t~ret50#1 && usb_maxpacket_#t~ret50#1 <= 9223372036854775807;usb_maxpacket_~tmp___0~1#1 := usb_maxpacket_#t~ret50#1;havoc usb_maxpacket_#t~ret50#1; {24686#false} is VALID [2022-02-20 22:07:06,965 INFO L290 TraceCheckUtils]: 47: Hoare triple {24686#false} assume !(0 != usb_maxpacket_~tmp___0~1#1); {24686#false} is VALID [2022-02-20 22:07:06,965 INFO L272 TraceCheckUtils]: 48: Hoare triple {24686#false} call usb_maxpacket_#t~ret51#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {24685#true} is VALID [2022-02-20 22:07:06,965 INFO L290 TraceCheckUtils]: 49: Hoare triple {24685#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {24685#true} is VALID [2022-02-20 22:07:06,965 INFO L290 TraceCheckUtils]: 50: Hoare triple {24685#true} assume true; {24685#true} is VALID [2022-02-20 22:07:06,965 INFO L284 TraceCheckUtils]: 51: Hoare quadruple {24685#true} {24686#false} #567#return; {24686#false} is VALID [2022-02-20 22:07:06,966 INFO L290 TraceCheckUtils]: 52: Hoare triple {24686#false} assume -9223372036854775808 <= usb_maxpacket_#t~ret51#1 && usb_maxpacket_#t~ret51#1 <= 9223372036854775807;havoc usb_maxpacket_#t~ret51#1;call usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset := read~$Pointer$(usb_maxpacket_~udev#1.base, 1186 + usb_maxpacket_~udev#1.offset + 8 * (usb_maxpacket_~epnum~0#1 % 4294967296), 8);usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset := usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset;havoc usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset; {24686#false} is VALID [2022-02-20 22:07:06,966 INFO L290 TraceCheckUtils]: 53: Hoare triple {24686#false} assume 0 == (usb_maxpacket_~ep~0#1.base + usb_maxpacket_~ep~0#1.offset) % 18446744073709551616;usb_maxpacket_#res#1 := 0; {24686#false} is VALID [2022-02-20 22:07:06,966 INFO L290 TraceCheckUtils]: 54: Hoare triple {24686#false} usb_acecad_probe_#t~ret137#1 := usb_maxpacket_#res#1;assume { :end_inline_usb_maxpacket } true;usb_acecad_probe_~tmp___2~0#1 := usb_acecad_probe_#t~ret137#1;havoc usb_acecad_probe_#t~ret137#1;usb_acecad_probe_~maxp~0#1 := usb_acecad_probe_~tmp___2~0#1 % 65536; {24686#false} is VALID [2022-02-20 22:07:06,966 INFO L272 TraceCheckUtils]: 55: Hoare triple {24686#false} call usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset := kzalloc(232, 208); {24771#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:06,966 INFO L290 TraceCheckUtils]: 56: Hoare triple {24771#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {24685#true} is VALID [2022-02-20 22:07:06,967 INFO L272 TraceCheckUtils]: 57: Hoare triple {24685#true} call __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset := ldv_malloc(__kmalloc_~size#1); {24771#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:06,967 INFO L290 TraceCheckUtils]: 58: Hoare triple {24771#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {24685#true} is VALID [2022-02-20 22:07:06,967 INFO L290 TraceCheckUtils]: 59: Hoare triple {24685#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {24685#true} is VALID [2022-02-20 22:07:06,967 INFO L290 TraceCheckUtils]: 60: Hoare triple {24685#true} assume true; {24685#true} is VALID [2022-02-20 22:07:06,967 INFO L284 TraceCheckUtils]: 61: Hoare quadruple {24685#true} {24685#true} #539#return; {24685#true} is VALID [2022-02-20 22:07:06,967 INFO L290 TraceCheckUtils]: 62: Hoare triple {24685#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset; {24685#true} is VALID [2022-02-20 22:07:06,967 INFO L290 TraceCheckUtils]: 63: Hoare triple {24685#true} kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {24685#true} is VALID [2022-02-20 22:07:06,968 INFO L290 TraceCheckUtils]: 64: Hoare triple {24685#true} #t~ret58#1.base, #t~ret58#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret58#1.base, #t~ret58#1.offset;havoc #t~ret58#1.base, #t~ret58#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {24685#true} is VALID [2022-02-20 22:07:06,968 INFO L290 TraceCheckUtils]: 65: Hoare triple {24685#true} assume true; {24685#true} is VALID [2022-02-20 22:07:06,968 INFO L284 TraceCheckUtils]: 66: Hoare quadruple {24685#true} {24686#false} #569#return; {24686#false} is VALID [2022-02-20 22:07:06,968 INFO L290 TraceCheckUtils]: 67: Hoare triple {24686#false} usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset := usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset;havoc usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset;usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset := usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;assume { :begin_inline_input_allocate_device } true;havoc input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;havoc input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset; {24686#false} is VALID [2022-02-20 22:07:06,968 INFO L272 TraceCheckUtils]: 68: Hoare triple {24686#false} call input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset := kzalloc(1855, ~bitwiseOr(~bitwiseOr(16, 64), 128)); {24771#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:06,968 INFO L290 TraceCheckUtils]: 69: Hoare triple {24771#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {24685#true} is VALID [2022-02-20 22:07:06,969 INFO L272 TraceCheckUtils]: 70: Hoare triple {24685#true} call __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset := ldv_malloc(__kmalloc_~size#1); {24771#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:06,969 INFO L290 TraceCheckUtils]: 71: Hoare triple {24771#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {24685#true} is VALID [2022-02-20 22:07:06,969 INFO L290 TraceCheckUtils]: 72: Hoare triple {24685#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {24685#true} is VALID [2022-02-20 22:07:06,969 INFO L290 TraceCheckUtils]: 73: Hoare triple {24685#true} assume true; {24685#true} is VALID [2022-02-20 22:07:06,969 INFO L284 TraceCheckUtils]: 74: Hoare quadruple {24685#true} {24685#true} #539#return; {24685#true} is VALID [2022-02-20 22:07:06,969 INFO L290 TraceCheckUtils]: 75: Hoare triple {24685#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset; {24685#true} is VALID [2022-02-20 22:07:06,969 INFO L290 TraceCheckUtils]: 76: Hoare triple {24685#true} kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {24685#true} is VALID [2022-02-20 22:07:06,969 INFO L290 TraceCheckUtils]: 77: Hoare triple {24685#true} #t~ret58#1.base, #t~ret58#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret58#1.base, #t~ret58#1.offset;havoc #t~ret58#1.base, #t~ret58#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {24685#true} is VALID [2022-02-20 22:07:06,970 INFO L290 TraceCheckUtils]: 78: Hoare triple {24685#true} assume true; {24685#true} is VALID [2022-02-20 22:07:06,970 INFO L284 TraceCheckUtils]: 79: Hoare quadruple {24685#true} {24686#false} #571#return; {24686#false} is VALID [2022-02-20 22:07:06,970 INFO L290 TraceCheckUtils]: 80: Hoare triple {24686#false} input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset := input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset;havoc input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset; {24686#false} is VALID [2022-02-20 22:07:06,970 INFO L290 TraceCheckUtils]: 81: Hoare triple {24686#false} usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset := input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;assume { :end_inline_input_allocate_device } true;usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset := usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset;havoc usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset; {24686#false} is VALID [2022-02-20 22:07:06,970 INFO L290 TraceCheckUtils]: 82: Hoare triple {24686#false} assume !(0 == (usb_acecad_probe_~acecad~3#1.base + usb_acecad_probe_~acecad~3#1.offset) % 18446744073709551616 || 0 == (usb_acecad_probe_~input_dev~0#1.base + usb_acecad_probe_~input_dev~0#1.offset) % 18446744073709551616);assume { :begin_inline_usb_alloc_coherent } true;usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset, usb_alloc_coherent_#in~arg1#1, usb_alloc_coherent_#in~arg2#1, usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, 8, 208, usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset;havoc usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;havoc usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset, usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset, usb_alloc_coherent_~arg1#1, usb_alloc_coherent_~arg2#1, usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset;usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset := usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset;usb_alloc_coherent_~arg1#1 := usb_alloc_coherent_#in~arg1#1;usb_alloc_coherent_~arg2#1 := usb_alloc_coherent_#in~arg2#1;usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset := usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset; {24686#false} is VALID [2022-02-20 22:07:06,971 INFO L272 TraceCheckUtils]: 83: Hoare triple {24686#false} call usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset := ldv_malloc(0); {24771#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:06,971 INFO L290 TraceCheckUtils]: 84: Hoare triple {24771#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {24685#true} is VALID [2022-02-20 22:07:06,971 INFO L290 TraceCheckUtils]: 85: Hoare triple {24685#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {24685#true} is VALID [2022-02-20 22:07:06,971 INFO L290 TraceCheckUtils]: 86: Hoare triple {24685#true} assume true; {24685#true} is VALID [2022-02-20 22:07:06,971 INFO L284 TraceCheckUtils]: 87: Hoare quadruple {24685#true} {24686#false} #573#return; {24686#false} is VALID [2022-02-20 22:07:06,971 INFO L290 TraceCheckUtils]: 88: Hoare triple {24686#false} usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset := usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset;havoc usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset; {24686#false} is VALID [2022-02-20 22:07:06,971 INFO L290 TraceCheckUtils]: 89: Hoare triple {24686#false} usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset := usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;assume { :end_inline_usb_alloc_coherent } true;usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset := usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset;havoc usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset;call write~$Pointer$(usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8); {24686#false} is VALID [2022-02-20 22:07:06,972 INFO L290 TraceCheckUtils]: 90: Hoare triple {24686#false} assume !(0 == (usb_acecad_probe_#t~mem141#1.base + usb_acecad_probe_#t~mem141#1.offset) % 18446744073709551616);havoc usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset;assume { :begin_inline_ldv_usb_alloc_urb_5 } true;ldv_usb_alloc_urb_5_#in~ldv_func_arg1#1, ldv_usb_alloc_urb_5_#in~ldv_func_arg2#1 := 0, 208;havoc ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset, ldv_usb_alloc_urb_5_~ldv_func_arg1#1, ldv_usb_alloc_urb_5_~ldv_func_arg2#1, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset, ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;ldv_usb_alloc_urb_5_~ldv_func_arg1#1 := ldv_usb_alloc_urb_5_#in~ldv_func_arg1#1;ldv_usb_alloc_urb_5_~ldv_func_arg2#1 := ldv_usb_alloc_urb_5_#in~ldv_func_arg2#1;havoc ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset;havoc ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;assume { :begin_inline_usb_alloc_urb } true;usb_alloc_urb_#in~arg0#1, usb_alloc_urb_#in~arg1#1 := ldv_usb_alloc_urb_5_~ldv_func_arg1#1, ldv_usb_alloc_urb_5_~ldv_func_arg2#1;havoc usb_alloc_urb_#res#1.base, usb_alloc_urb_#res#1.offset;havoc usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset, usb_alloc_urb_~arg0#1, usb_alloc_urb_~arg1#1;usb_alloc_urb_~arg0#1 := usb_alloc_urb_#in~arg0#1;usb_alloc_urb_~arg1#1 := usb_alloc_urb_#in~arg1#1; {24686#false} is VALID [2022-02-20 22:07:06,972 INFO L272 TraceCheckUtils]: 91: Hoare triple {24686#false} call usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset := ldv_malloc(180); {24771#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:06,972 INFO L290 TraceCheckUtils]: 92: Hoare triple {24771#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {24685#true} is VALID [2022-02-20 22:07:06,972 INFO L290 TraceCheckUtils]: 93: Hoare triple {24685#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {24685#true} is VALID [2022-02-20 22:07:06,972 INFO L290 TraceCheckUtils]: 94: Hoare triple {24685#true} assume true; {24685#true} is VALID [2022-02-20 22:07:06,972 INFO L284 TraceCheckUtils]: 95: Hoare quadruple {24685#true} {24686#false} #575#return; {24686#false} is VALID [2022-02-20 22:07:06,972 INFO L290 TraceCheckUtils]: 96: Hoare triple {24686#false} usb_alloc_urb_#res#1.base, usb_alloc_urb_#res#1.offset := usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset;havoc usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset; {24686#false} is VALID [2022-02-20 22:07:06,973 INFO L290 TraceCheckUtils]: 97: Hoare triple {24686#false} ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset := usb_alloc_urb_#res#1.base, usb_alloc_urb_#res#1.offset;assume { :end_inline_usb_alloc_urb } true;ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset := ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset;ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset := ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;assume { :begin_inline_ldv_alloc_urb } true;ldv_alloc_urb_#in~res#1.base, ldv_alloc_urb_#in~res#1.offset := ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset;havoc ldv_alloc_urb_~res#1.base, ldv_alloc_urb_~res#1.offset;ldv_alloc_urb_~res#1.base, ldv_alloc_urb_~res#1.offset := ldv_alloc_urb_#in~res#1.base, ldv_alloc_urb_#in~res#1.offset; {24686#false} is VALID [2022-02-20 22:07:06,973 INFO L290 TraceCheckUtils]: 98: Hoare triple {24686#false} assume 0 != (ldv_alloc_urb_~res#1.base + ldv_alloc_urb_~res#1.offset) % 18446744073709551616;~URB_STATE~0 := 1 + ~URB_STATE~0; {24686#false} is VALID [2022-02-20 22:07:06,973 INFO L290 TraceCheckUtils]: 99: Hoare triple {24686#false} assume { :end_inline_ldv_alloc_urb } true;ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset := ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset; {24686#false} is VALID [2022-02-20 22:07:06,973 INFO L290 TraceCheckUtils]: 100: Hoare triple {24686#false} usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset := ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;assume { :end_inline_ldv_usb_alloc_urb_5 } true;call write~$Pointer$(usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset, usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8);havoc usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset;call usb_acecad_probe_#t~mem143#1.base, usb_acecad_probe_#t~mem143#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8); {24686#false} is VALID [2022-02-20 22:07:06,974 INFO L290 TraceCheckUtils]: 101: Hoare triple {24686#false} assume 0 == (usb_acecad_probe_#t~mem143#1.base + usb_acecad_probe_#t~mem143#1.offset) % 18446744073709551616;havoc usb_acecad_probe_#t~mem143#1.base, usb_acecad_probe_#t~mem143#1.offset;usb_acecad_probe_~err~0#1 := -12; {24686#false} is VALID [2022-02-20 22:07:06,974 INFO L290 TraceCheckUtils]: 102: Hoare triple {24686#false} call usb_acecad_probe_#t~mem175#1.base, usb_acecad_probe_#t~mem175#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem176#1 := read~int(usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset, 8); {24686#false} is VALID [2022-02-20 22:07:06,974 INFO L272 TraceCheckUtils]: 103: Hoare triple {24686#false} call usb_free_coherent(usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, 8, usb_acecad_probe_#t~mem175#1.base, usb_acecad_probe_#t~mem175#1.offset, usb_acecad_probe_#t~mem176#1); {24685#true} is VALID [2022-02-20 22:07:06,974 INFO L290 TraceCheckUtils]: 104: Hoare triple {24685#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1 := #in~arg1;~arg2.base, ~arg2.offset := #in~arg2.base, #in~arg2.offset;~arg3 := #in~arg3; {24685#true} is VALID [2022-02-20 22:07:06,974 INFO L290 TraceCheckUtils]: 105: Hoare triple {24685#true} assume true; {24685#true} is VALID [2022-02-20 22:07:06,974 INFO L284 TraceCheckUtils]: 106: Hoare quadruple {24685#true} {24686#false} #603#return; {24686#false} is VALID [2022-02-20 22:07:06,974 INFO L290 TraceCheckUtils]: 107: Hoare triple {24686#false} havoc usb_acecad_probe_#t~mem175#1.base, usb_acecad_probe_#t~mem175#1.offset;havoc usb_acecad_probe_#t~mem176#1; {24686#false} is VALID [2022-02-20 22:07:06,974 INFO L290 TraceCheckUtils]: 108: Hoare triple {24686#false} assume { :begin_inline_input_free_device } true;input_free_device_#in~arg0#1.base, input_free_device_#in~arg0#1.offset := usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset;havoc input_free_device_~arg0#1.base, input_free_device_~arg0#1.offset;input_free_device_~arg0#1.base, input_free_device_~arg0#1.offset := input_free_device_#in~arg0#1.base, input_free_device_#in~arg0#1.offset; {24686#false} is VALID [2022-02-20 22:07:06,975 INFO L290 TraceCheckUtils]: 109: Hoare triple {24686#false} assume { :end_inline_input_free_device } true; {24686#false} is VALID [2022-02-20 22:07:06,975 INFO L272 TraceCheckUtils]: 110: Hoare triple {24686#false} call kfree(usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset); {24780#(= |old(#valid)| |#valid|)} is VALID [2022-02-20 22:07:06,975 INFO L290 TraceCheckUtils]: 111: Hoare triple {24780#(= |old(#valid)| |#valid|)} ~p.base, ~p.offset := #in~p.base, #in~p.offset;call ULTIMATE.dealloc(~p.base, ~p.offset); {24685#true} is VALID [2022-02-20 22:07:06,975 INFO L290 TraceCheckUtils]: 112: Hoare triple {24685#true} assume true; {24685#true} is VALID [2022-02-20 22:07:06,975 INFO L284 TraceCheckUtils]: 113: Hoare quadruple {24685#true} {24686#false} #605#return; {24686#false} is VALID [2022-02-20 22:07:06,975 INFO L290 TraceCheckUtils]: 114: Hoare triple {24686#false} usb_acecad_probe_#res#1 := usb_acecad_probe_~err~0#1; {24686#false} is VALID [2022-02-20 22:07:06,975 INFO L290 TraceCheckUtils]: 115: Hoare triple {24686#false} main_#t~ret191#1 := usb_acecad_probe_#res#1;assume { :end_inline_usb_acecad_probe } true;assume -2147483648 <= main_#t~ret191#1 && main_#t~ret191#1 <= 2147483647;~ldv_retval_0~0 := main_#t~ret191#1;havoc main_#t~ret191#1; {24686#false} is VALID [2022-02-20 22:07:06,975 INFO L290 TraceCheckUtils]: 116: Hoare triple {24686#false} assume 0 == ~ldv_retval_0~0;~ldv_state_variable_1~0 := 2;~ref_cnt~0 := 1 + ~ref_cnt~0; {24686#false} is VALID [2022-02-20 22:07:06,976 INFO L290 TraceCheckUtils]: 117: Hoare triple {24686#false} assume -2147483648 <= main_#t~nondet187#1 && main_#t~nondet187#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet187#1;havoc main_#t~nondet187#1;main_#t~switch188#1 := 0 == main_~tmp___0~6#1; {24686#false} is VALID [2022-02-20 22:07:06,976 INFO L290 TraceCheckUtils]: 118: Hoare triple {24686#false} assume !main_#t~switch188#1;main_#t~switch188#1 := main_#t~switch188#1 || 1 == main_~tmp___0~6#1; {24686#false} is VALID [2022-02-20 22:07:06,976 INFO L290 TraceCheckUtils]: 119: Hoare triple {24686#false} assume main_#t~switch188#1; {24686#false} is VALID [2022-02-20 22:07:06,976 INFO L290 TraceCheckUtils]: 120: Hoare triple {24686#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet192#1 && main_#t~nondet192#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet192#1;havoc main_#t~nondet192#1;main_#t~switch193#1 := 0 == main_~tmp___2~1#1; {24686#false} is VALID [2022-02-20 22:07:06,976 INFO L290 TraceCheckUtils]: 121: Hoare triple {24686#false} assume !main_#t~switch193#1;main_#t~switch193#1 := main_#t~switch193#1 || 1 == main_~tmp___2~1#1; {24686#false} is VALID [2022-02-20 22:07:06,976 INFO L290 TraceCheckUtils]: 122: Hoare triple {24686#false} assume main_#t~switch193#1; {24686#false} is VALID [2022-02-20 22:07:06,976 INFO L290 TraceCheckUtils]: 123: Hoare triple {24686#false} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_usb_acecad_init } true;havoc usb_acecad_init_#res#1;havoc usb_acecad_init_#t~ret183#1, usb_acecad_init_#t~nondet184#1, usb_acecad_init_~result~0#1, usb_acecad_init_~tmp~15#1;havoc usb_acecad_init_~result~0#1;havoc usb_acecad_init_~tmp~15#1;assume { :begin_inline_usb_register } true;usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc usb_register_#res#1;havoc usb_register_#t~ret31#1, usb_register_~driver#1.base, usb_register_~driver#1.offset, usb_register_~tmp~1#1;usb_register_~driver#1.base, usb_register_~driver#1.offset := usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset;havoc usb_register_~tmp~1#1;assume { :begin_inline_ldv_usb_register_driver_2 } true;ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset := usb_register_~driver#1.base, usb_register_~driver#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 4, 0;havoc ldv_usb_register_driver_2_#res#1;havoc ldv_usb_register_driver_2_#t~ret196#1, ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset, ldv_usb_register_driver_2_~ldv_func_res~0#1, ldv_usb_register_driver_2_~tmp~19#1;ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_2_~ldv_func_res~0#1;havoc ldv_usb_register_driver_2_~tmp~19#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet217#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet217#1 && usb_register_driver_#t~nondet217#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet217#1;havoc usb_register_driver_#t~nondet217#1; {24686#false} is VALID [2022-02-20 22:07:06,976 INFO L290 TraceCheckUtils]: 124: Hoare triple {24686#false} ldv_usb_register_driver_2_#t~ret196#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_2_#t~ret196#1 && ldv_usb_register_driver_2_#t~ret196#1 <= 2147483647;ldv_usb_register_driver_2_~tmp~19#1 := ldv_usb_register_driver_2_#t~ret196#1;havoc ldv_usb_register_driver_2_#t~ret196#1;ldv_usb_register_driver_2_~ldv_func_res~0#1 := ldv_usb_register_driver_2_~tmp~19#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset, ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset;havoc ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {24686#false} is VALID [2022-02-20 22:07:06,977 INFO L272 TraceCheckUtils]: 125: Hoare triple {24686#false} call ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset := ldv_init_zalloc(1248); {24762#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:06,977 INFO L290 TraceCheckUtils]: 126: Hoare triple {24762#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {24685#true} is VALID [2022-02-20 22:07:06,977 INFO L272 TraceCheckUtils]: 127: Hoare triple {24685#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {24770#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:06,978 INFO L290 TraceCheckUtils]: 128: Hoare triple {24770#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {24685#true} is VALID [2022-02-20 22:07:06,978 INFO L290 TraceCheckUtils]: 129: Hoare triple {24685#true} assume true; {24685#true} is VALID [2022-02-20 22:07:06,978 INFO L284 TraceCheckUtils]: 130: Hoare quadruple {24685#true} {24685#true} #547#return; {24685#true} is VALID [2022-02-20 22:07:06,978 INFO L290 TraceCheckUtils]: 131: Hoare triple {24685#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {24685#true} is VALID [2022-02-20 22:07:06,978 INFO L272 TraceCheckUtils]: 132: Hoare triple {24685#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {24685#true} is VALID [2022-02-20 22:07:06,978 INFO L290 TraceCheckUtils]: 133: Hoare triple {24685#true} ~cond := #in~cond; {24685#true} is VALID [2022-02-20 22:07:06,978 INFO L290 TraceCheckUtils]: 134: Hoare triple {24685#true} assume !(0 == ~cond); {24685#true} is VALID [2022-02-20 22:07:06,978 INFO L290 TraceCheckUtils]: 135: Hoare triple {24685#true} assume true; {24685#true} is VALID [2022-02-20 22:07:06,979 INFO L284 TraceCheckUtils]: 136: Hoare quadruple {24685#true} {24685#true} #549#return; {24685#true} is VALID [2022-02-20 22:07:06,979 INFO L290 TraceCheckUtils]: 137: Hoare triple {24685#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {24685#true} is VALID [2022-02-20 22:07:06,979 INFO L290 TraceCheckUtils]: 138: Hoare triple {24685#true} assume true; {24685#true} is VALID [2022-02-20 22:07:06,979 INFO L284 TraceCheckUtils]: 139: Hoare quadruple {24685#true} {24686#false} #611#return; {24686#false} is VALID [2022-02-20 22:07:06,979 INFO L290 TraceCheckUtils]: 140: Hoare triple {24686#false} ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset := ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset;havoc ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {24686#false} is VALID [2022-02-20 22:07:06,979 INFO L290 TraceCheckUtils]: 141: Hoare triple {24686#false} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_2_#res#1 := ldv_usb_register_driver_2_~ldv_func_res~0#1; {24686#false} is VALID [2022-02-20 22:07:06,979 INFO L290 TraceCheckUtils]: 142: Hoare triple {24686#false} usb_register_#t~ret31#1 := ldv_usb_register_driver_2_#res#1;assume { :end_inline_ldv_usb_register_driver_2 } true;assume -2147483648 <= usb_register_#t~ret31#1 && usb_register_#t~ret31#1 <= 2147483647;usb_register_~tmp~1#1 := usb_register_#t~ret31#1;havoc usb_register_#t~ret31#1;usb_register_#res#1 := usb_register_~tmp~1#1; {24686#false} is VALID [2022-02-20 22:07:06,979 INFO L290 TraceCheckUtils]: 143: Hoare triple {24686#false} usb_acecad_init_#t~ret183#1 := usb_register_#res#1;assume { :end_inline_usb_register } true;assume -2147483648 <= usb_acecad_init_#t~ret183#1 && usb_acecad_init_#t~ret183#1 <= 2147483647;usb_acecad_init_~tmp~15#1 := usb_acecad_init_#t~ret183#1;havoc usb_acecad_init_#t~ret183#1;usb_acecad_init_~result~0#1 := usb_acecad_init_~tmp~15#1; {24686#false} is VALID [2022-02-20 22:07:06,980 INFO L290 TraceCheckUtils]: 144: Hoare triple {24686#false} assume !(0 == usb_acecad_init_~result~0#1); {24686#false} is VALID [2022-02-20 22:07:06,980 INFO L290 TraceCheckUtils]: 145: Hoare triple {24686#false} usb_acecad_init_#res#1 := usb_acecad_init_~result~0#1; {24686#false} is VALID [2022-02-20 22:07:06,980 INFO L290 TraceCheckUtils]: 146: Hoare triple {24686#false} main_#t~ret194#1 := usb_acecad_init_#res#1;assume { :end_inline_usb_acecad_init } true;assume -2147483648 <= main_#t~ret194#1 && main_#t~ret194#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret194#1;havoc main_#t~ret194#1; {24686#false} is VALID [2022-02-20 22:07:06,980 INFO L290 TraceCheckUtils]: 147: Hoare triple {24686#false} assume !(0 == ~ldv_retval_1~0); {24686#false} is VALID [2022-02-20 22:07:06,980 INFO L290 TraceCheckUtils]: 148: Hoare triple {24686#false} assume 0 != ~ldv_retval_1~0;~ldv_state_variable_0~0 := 2; {24686#false} is VALID [2022-02-20 22:07:06,980 INFO L290 TraceCheckUtils]: 149: Hoare triple {24686#false} assume { :begin_inline_ldv_check_final_state } true; {24686#false} is VALID [2022-02-20 22:07:06,980 INFO L290 TraceCheckUtils]: 150: Hoare triple {24686#false} assume 0 != ~URB_STATE~0; {24686#false} is VALID [2022-02-20 22:07:06,980 INFO L272 TraceCheckUtils]: 151: Hoare triple {24686#false} call ldv_error(); {24686#false} is VALID [2022-02-20 22:07:06,980 INFO L290 TraceCheckUtils]: 152: Hoare triple {24686#false} assume !false; {24686#false} is VALID [2022-02-20 22:07:06,981 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2022-02-20 22:07:06,981 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:07:06,981 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [495698040] [2022-02-20 22:07:06,981 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [495698040] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:07:06,981 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 22:07:06,982 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-02-20 22:07:06,982 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [392069362] [2022-02-20 22:07:06,982 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:07:06,983 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 12.857142857142858) internal successors, (90), 3 states have internal predecessors, (90), 2 states have call successors, (15), 6 states have call predecessors, (15), 1 states have return successors, (14), 2 states have call predecessors, (14), 2 states have call successors, (14) Word has length 153 [2022-02-20 22:07:06,983 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:07:06,984 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 12.857142857142858) internal successors, (90), 3 states have internal predecessors, (90), 2 states have call successors, (15), 6 states have call predecessors, (15), 1 states have return successors, (14), 2 states have call predecessors, (14), 2 states have call successors, (14) [2022-02-20 22:07:07,066 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 119 edges. 119 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:07,067 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-02-20 22:07:07,067 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:07:07,068 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-02-20 22:07:07,068 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2022-02-20 22:07:07,068 INFO L87 Difference]: Start difference. First operand 817 states and 1061 transitions. Second operand has 7 states, 7 states have (on average 12.857142857142858) internal successors, (90), 3 states have internal predecessors, (90), 2 states have call successors, (15), 6 states have call predecessors, (15), 1 states have return successors, (14), 2 states have call predecessors, (14), 2 states have call successors, (14) [2022-02-20 22:07:08,516 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:08,516 INFO L93 Difference]: Finished difference Result 1711 states and 2241 transitions. [2022-02-20 22:07:08,516 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-02-20 22:07:08,516 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 12.857142857142858) internal successors, (90), 3 states have internal predecessors, (90), 2 states have call successors, (15), 6 states have call predecessors, (15), 1 states have return successors, (14), 2 states have call predecessors, (14), 2 states have call successors, (14) Word has length 153 [2022-02-20 22:07:08,516 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 22:07:08,517 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 12.857142857142858) internal successors, (90), 3 states have internal predecessors, (90), 2 states have call successors, (15), 6 states have call predecessors, (15), 1 states have return successors, (14), 2 states have call predecessors, (14), 2 states have call successors, (14) [2022-02-20 22:07:08,520 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 618 transitions. [2022-02-20 22:07:08,521 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 12.857142857142858) internal successors, (90), 3 states have internal predecessors, (90), 2 states have call successors, (15), 6 states have call predecessors, (15), 1 states have return successors, (14), 2 states have call predecessors, (14), 2 states have call successors, (14) [2022-02-20 22:07:08,524 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 618 transitions. [2022-02-20 22:07:08,524 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 9 states and 618 transitions. [2022-02-20 22:07:08,949 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 618 edges. 618 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:08,991 INFO L225 Difference]: With dead ends: 1711 [2022-02-20 22:07:08,991 INFO L226 Difference]: Without dead ends: 909 [2022-02-20 22:07:08,993 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 33 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2022-02-20 22:07:08,993 INFO L933 BasicCegarLoop]: 281 mSDtfsCounter, 90 mSDsluCounter, 838 mSDsCounter, 0 mSdLazyCounter, 313 mSolverCounterSat, 56 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 94 SdHoareTripleChecker+Valid, 1119 SdHoareTripleChecker+Invalid, 369 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 56 IncrementalHoareTripleChecker+Valid, 313 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-02-20 22:07:08,993 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [94 Valid, 1119 Invalid, 369 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [56 Valid, 313 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-02-20 22:07:08,994 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 909 states. [2022-02-20 22:07:09,012 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 909 to 871. [2022-02-20 22:07:09,013 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 22:07:09,014 INFO L82 GeneralOperation]: Start isEquivalent. First operand 909 states. Second operand has 871 states, 681 states have (on average 1.2745961820851688) internal successors, (868), 689 states have internal predecessors, (868), 134 states have call successors, (134), 56 states have call predecessors, (134), 55 states have return successors, (133), 133 states have call predecessors, (133), 133 states have call successors, (133) [2022-02-20 22:07:09,015 INFO L74 IsIncluded]: Start isIncluded. First operand 909 states. Second operand has 871 states, 681 states have (on average 1.2745961820851688) internal successors, (868), 689 states have internal predecessors, (868), 134 states have call successors, (134), 56 states have call predecessors, (134), 55 states have return successors, (133), 133 states have call predecessors, (133), 133 states have call successors, (133) [2022-02-20 22:07:09,016 INFO L87 Difference]: Start difference. First operand 909 states. Second operand has 871 states, 681 states have (on average 1.2745961820851688) internal successors, (868), 689 states have internal predecessors, (868), 134 states have call successors, (134), 56 states have call predecessors, (134), 55 states have return successors, (133), 133 states have call predecessors, (133), 133 states have call successors, (133) [2022-02-20 22:07:09,044 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:09,045 INFO L93 Difference]: Finished difference Result 909 states and 1192 transitions. [2022-02-20 22:07:09,045 INFO L276 IsEmpty]: Start isEmpty. Operand 909 states and 1192 transitions. [2022-02-20 22:07:09,046 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:09,046 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:09,048 INFO L74 IsIncluded]: Start isIncluded. First operand has 871 states, 681 states have (on average 1.2745961820851688) internal successors, (868), 689 states have internal predecessors, (868), 134 states have call successors, (134), 56 states have call predecessors, (134), 55 states have return successors, (133), 133 states have call predecessors, (133), 133 states have call successors, (133) Second operand 909 states. [2022-02-20 22:07:09,049 INFO L87 Difference]: Start difference. First operand has 871 states, 681 states have (on average 1.2745961820851688) internal successors, (868), 689 states have internal predecessors, (868), 134 states have call successors, (134), 56 states have call predecessors, (134), 55 states have return successors, (133), 133 states have call predecessors, (133), 133 states have call successors, (133) Second operand 909 states. [2022-02-20 22:07:09,076 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:09,077 INFO L93 Difference]: Finished difference Result 909 states and 1192 transitions. [2022-02-20 22:07:09,077 INFO L276 IsEmpty]: Start isEmpty. Operand 909 states and 1192 transitions. [2022-02-20 22:07:09,078 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:09,078 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:09,078 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 22:07:09,078 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 22:07:09,080 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 871 states, 681 states have (on average 1.2745961820851688) internal successors, (868), 689 states have internal predecessors, (868), 134 states have call successors, (134), 56 states have call predecessors, (134), 55 states have return successors, (133), 133 states have call predecessors, (133), 133 states have call successors, (133) [2022-02-20 22:07:09,112 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 871 states to 871 states and 1135 transitions. [2022-02-20 22:07:09,112 INFO L78 Accepts]: Start accepts. Automaton has 871 states and 1135 transitions. Word has length 153 [2022-02-20 22:07:09,112 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 22:07:09,112 INFO L470 AbstractCegarLoop]: Abstraction has 871 states and 1135 transitions. [2022-02-20 22:07:09,113 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 12.857142857142858) internal successors, (90), 3 states have internal predecessors, (90), 2 states have call successors, (15), 6 states have call predecessors, (15), 1 states have return successors, (14), 2 states have call predecessors, (14), 2 states have call successors, (14) [2022-02-20 22:07:09,113 INFO L276 IsEmpty]: Start isEmpty. Operand 871 states and 1135 transitions. [2022-02-20 22:07:09,114 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 163 [2022-02-20 22:07:09,115 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:07:09,115 INFO L514 BasicCegarLoop]: trace histogram [5, 5, 5, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:07:09,115 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2022-02-20 22:07:09,115 INFO L402 AbstractCegarLoop]: === Iteration 9 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:07:09,115 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:07:09,116 INFO L85 PathProgramCache]: Analyzing trace with hash 314942574, now seen corresponding path program 1 times [2022-02-20 22:07:09,116 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:07:09,116 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1195353493] [2022-02-20 22:07:09,116 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:07:09,116 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:07:09,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:09,212 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 22:07:09,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:09,220 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:09,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:09,225 INFO L290 TraceCheckUtils]: 0: Hoare triple {30340#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {30253#true} is VALID [2022-02-20 22:07:09,225 INFO L290 TraceCheckUtils]: 1: Hoare triple {30253#true} assume true; {30253#true} is VALID [2022-02-20 22:07:09,225 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {30253#true} {30253#true} #547#return; {30253#true} is VALID [2022-02-20 22:07:09,226 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:09,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:09,229 INFO L290 TraceCheckUtils]: 0: Hoare triple {30253#true} ~cond := #in~cond; {30253#true} is VALID [2022-02-20 22:07:09,229 INFO L290 TraceCheckUtils]: 1: Hoare triple {30253#true} assume !(0 == ~cond); {30253#true} is VALID [2022-02-20 22:07:09,230 INFO L290 TraceCheckUtils]: 2: Hoare triple {30253#true} assume true; {30253#true} is VALID [2022-02-20 22:07:09,230 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {30253#true} {30253#true} #549#return; {30253#true} is VALID [2022-02-20 22:07:09,230 INFO L290 TraceCheckUtils]: 0: Hoare triple {30332#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {30253#true} is VALID [2022-02-20 22:07:09,231 INFO L272 TraceCheckUtils]: 1: Hoare triple {30253#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {30340#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:09,231 INFO L290 TraceCheckUtils]: 2: Hoare triple {30340#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {30253#true} is VALID [2022-02-20 22:07:09,231 INFO L290 TraceCheckUtils]: 3: Hoare triple {30253#true} assume true; {30253#true} is VALID [2022-02-20 22:07:09,231 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {30253#true} {30253#true} #547#return; {30253#true} is VALID [2022-02-20 22:07:09,231 INFO L290 TraceCheckUtils]: 5: Hoare triple {30253#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {30253#true} is VALID [2022-02-20 22:07:09,231 INFO L272 TraceCheckUtils]: 6: Hoare triple {30253#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {30253#true} is VALID [2022-02-20 22:07:09,231 INFO L290 TraceCheckUtils]: 7: Hoare triple {30253#true} ~cond := #in~cond; {30253#true} is VALID [2022-02-20 22:07:09,231 INFO L290 TraceCheckUtils]: 8: Hoare triple {30253#true} assume !(0 == ~cond); {30253#true} is VALID [2022-02-20 22:07:09,232 INFO L290 TraceCheckUtils]: 9: Hoare triple {30253#true} assume true; {30253#true} is VALID [2022-02-20 22:07:09,232 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {30253#true} {30253#true} #549#return; {30253#true} is VALID [2022-02-20 22:07:09,232 INFO L290 TraceCheckUtils]: 11: Hoare triple {30253#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {30253#true} is VALID [2022-02-20 22:07:09,232 INFO L290 TraceCheckUtils]: 12: Hoare triple {30253#true} assume true; {30253#true} is VALID [2022-02-20 22:07:09,232 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {30253#true} {30253#true} #553#return; {30253#true} is VALID [2022-02-20 22:07:09,232 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 27 [2022-02-20 22:07:09,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:09,238 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:09,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:09,245 INFO L290 TraceCheckUtils]: 0: Hoare triple {30340#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {30253#true} is VALID [2022-02-20 22:07:09,245 INFO L290 TraceCheckUtils]: 1: Hoare triple {30253#true} assume true; {30253#true} is VALID [2022-02-20 22:07:09,245 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {30253#true} {30253#true} #547#return; {30253#true} is VALID [2022-02-20 22:07:09,245 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:09,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:09,249 INFO L290 TraceCheckUtils]: 0: Hoare triple {30253#true} ~cond := #in~cond; {30253#true} is VALID [2022-02-20 22:07:09,250 INFO L290 TraceCheckUtils]: 1: Hoare triple {30253#true} assume !(0 == ~cond); {30253#true} is VALID [2022-02-20 22:07:09,250 INFO L290 TraceCheckUtils]: 2: Hoare triple {30253#true} assume true; {30253#true} is VALID [2022-02-20 22:07:09,250 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {30253#true} {30253#true} #549#return; {30253#true} is VALID [2022-02-20 22:07:09,250 INFO L290 TraceCheckUtils]: 0: Hoare triple {30332#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {30253#true} is VALID [2022-02-20 22:07:09,251 INFO L272 TraceCheckUtils]: 1: Hoare triple {30253#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {30340#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:09,251 INFO L290 TraceCheckUtils]: 2: Hoare triple {30340#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {30253#true} is VALID [2022-02-20 22:07:09,251 INFO L290 TraceCheckUtils]: 3: Hoare triple {30253#true} assume true; {30253#true} is VALID [2022-02-20 22:07:09,251 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {30253#true} {30253#true} #547#return; {30253#true} is VALID [2022-02-20 22:07:09,251 INFO L290 TraceCheckUtils]: 5: Hoare triple {30253#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {30253#true} is VALID [2022-02-20 22:07:09,251 INFO L272 TraceCheckUtils]: 6: Hoare triple {30253#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {30253#true} is VALID [2022-02-20 22:07:09,252 INFO L290 TraceCheckUtils]: 7: Hoare triple {30253#true} ~cond := #in~cond; {30253#true} is VALID [2022-02-20 22:07:09,252 INFO L290 TraceCheckUtils]: 8: Hoare triple {30253#true} assume !(0 == ~cond); {30253#true} is VALID [2022-02-20 22:07:09,252 INFO L290 TraceCheckUtils]: 9: Hoare triple {30253#true} assume true; {30253#true} is VALID [2022-02-20 22:07:09,252 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {30253#true} {30253#true} #549#return; {30253#true} is VALID [2022-02-20 22:07:09,252 INFO L290 TraceCheckUtils]: 11: Hoare triple {30253#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {30253#true} is VALID [2022-02-20 22:07:09,252 INFO L290 TraceCheckUtils]: 12: Hoare triple {30253#true} assume true; {30253#true} is VALID [2022-02-20 22:07:09,252 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {30253#true} {30253#true} #611#return; {30253#true} is VALID [2022-02-20 22:07:09,258 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 56 [2022-02-20 22:07:09,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:09,263 INFO L290 TraceCheckUtils]: 0: Hoare triple {30348#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {30253#true} is VALID [2022-02-20 22:07:09,263 INFO L290 TraceCheckUtils]: 1: Hoare triple {30253#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {30253#true} is VALID [2022-02-20 22:07:09,263 INFO L290 TraceCheckUtils]: 2: Hoare triple {30253#true} assume true; {30253#true} is VALID [2022-02-20 22:07:09,263 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {30253#true} {30253#true} #555#return; {30253#true} is VALID [2022-02-20 22:07:09,264 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 74 [2022-02-20 22:07:09,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:09,268 INFO L290 TraceCheckUtils]: 0: Hoare triple {30253#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {30253#true} is VALID [2022-02-20 22:07:09,268 INFO L290 TraceCheckUtils]: 1: Hoare triple {30253#true} assume true; {30253#true} is VALID [2022-02-20 22:07:09,268 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {30253#true} {30254#false} #563#return; {30254#false} is VALID [2022-02-20 22:07:09,268 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 80 [2022-02-20 22:07:09,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:09,274 INFO L290 TraceCheckUtils]: 0: Hoare triple {30253#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {30253#true} is VALID [2022-02-20 22:07:09,274 INFO L290 TraceCheckUtils]: 1: Hoare triple {30253#true} assume true; {30253#true} is VALID [2022-02-20 22:07:09,274 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {30253#true} {30254#false} #567#return; {30254#false} is VALID [2022-02-20 22:07:09,277 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2022-02-20 22:07:09,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:09,283 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:09,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:09,289 INFO L290 TraceCheckUtils]: 0: Hoare triple {30348#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {30253#true} is VALID [2022-02-20 22:07:09,289 INFO L290 TraceCheckUtils]: 1: Hoare triple {30253#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {30253#true} is VALID [2022-02-20 22:07:09,289 INFO L290 TraceCheckUtils]: 2: Hoare triple {30253#true} assume true; {30253#true} is VALID [2022-02-20 22:07:09,289 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {30253#true} {30253#true} #539#return; {30253#true} is VALID [2022-02-20 22:07:09,289 INFO L290 TraceCheckUtils]: 0: Hoare triple {30348#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {30253#true} is VALID [2022-02-20 22:07:09,290 INFO L272 TraceCheckUtils]: 1: Hoare triple {30253#true} call __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset := ldv_malloc(__kmalloc_~size#1); {30348#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:09,290 INFO L290 TraceCheckUtils]: 2: Hoare triple {30348#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {30253#true} is VALID [2022-02-20 22:07:09,290 INFO L290 TraceCheckUtils]: 3: Hoare triple {30253#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {30253#true} is VALID [2022-02-20 22:07:09,290 INFO L290 TraceCheckUtils]: 4: Hoare triple {30253#true} assume true; {30253#true} is VALID [2022-02-20 22:07:09,290 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {30253#true} {30253#true} #539#return; {30253#true} is VALID [2022-02-20 22:07:09,291 INFO L290 TraceCheckUtils]: 6: Hoare triple {30253#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset; {30253#true} is VALID [2022-02-20 22:07:09,291 INFO L290 TraceCheckUtils]: 7: Hoare triple {30253#true} kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {30253#true} is VALID [2022-02-20 22:07:09,291 INFO L290 TraceCheckUtils]: 8: Hoare triple {30253#true} #t~ret58#1.base, #t~ret58#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret58#1.base, #t~ret58#1.offset;havoc #t~ret58#1.base, #t~ret58#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {30253#true} is VALID [2022-02-20 22:07:09,291 INFO L290 TraceCheckUtils]: 9: Hoare triple {30253#true} assume true; {30253#true} is VALID [2022-02-20 22:07:09,291 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {30253#true} {30254#false} #569#return; {30254#false} is VALID [2022-02-20 22:07:09,291 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 100 [2022-02-20 22:07:09,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:09,297 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:09,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:09,302 INFO L290 TraceCheckUtils]: 0: Hoare triple {30348#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {30253#true} is VALID [2022-02-20 22:07:09,302 INFO L290 TraceCheckUtils]: 1: Hoare triple {30253#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {30253#true} is VALID [2022-02-20 22:07:09,302 INFO L290 TraceCheckUtils]: 2: Hoare triple {30253#true} assume true; {30253#true} is VALID [2022-02-20 22:07:09,302 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {30253#true} {30253#true} #539#return; {30253#true} is VALID [2022-02-20 22:07:09,303 INFO L290 TraceCheckUtils]: 0: Hoare triple {30348#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {30253#true} is VALID [2022-02-20 22:07:09,303 INFO L272 TraceCheckUtils]: 1: Hoare triple {30253#true} call __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset := ldv_malloc(__kmalloc_~size#1); {30348#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:09,303 INFO L290 TraceCheckUtils]: 2: Hoare triple {30348#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {30253#true} is VALID [2022-02-20 22:07:09,303 INFO L290 TraceCheckUtils]: 3: Hoare triple {30253#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {30253#true} is VALID [2022-02-20 22:07:09,303 INFO L290 TraceCheckUtils]: 4: Hoare triple {30253#true} assume true; {30253#true} is VALID [2022-02-20 22:07:09,304 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {30253#true} {30253#true} #539#return; {30253#true} is VALID [2022-02-20 22:07:09,304 INFO L290 TraceCheckUtils]: 6: Hoare triple {30253#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset; {30253#true} is VALID [2022-02-20 22:07:09,304 INFO L290 TraceCheckUtils]: 7: Hoare triple {30253#true} kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {30253#true} is VALID [2022-02-20 22:07:09,304 INFO L290 TraceCheckUtils]: 8: Hoare triple {30253#true} #t~ret58#1.base, #t~ret58#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret58#1.base, #t~ret58#1.offset;havoc #t~ret58#1.base, #t~ret58#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {30253#true} is VALID [2022-02-20 22:07:09,304 INFO L290 TraceCheckUtils]: 9: Hoare triple {30253#true} assume true; {30253#true} is VALID [2022-02-20 22:07:09,304 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {30253#true} {30254#false} #571#return; {30254#false} is VALID [2022-02-20 22:07:09,304 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 115 [2022-02-20 22:07:09,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:09,311 INFO L290 TraceCheckUtils]: 0: Hoare triple {30348#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {30253#true} is VALID [2022-02-20 22:07:09,311 INFO L290 TraceCheckUtils]: 1: Hoare triple {30253#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {30253#true} is VALID [2022-02-20 22:07:09,312 INFO L290 TraceCheckUtils]: 2: Hoare triple {30253#true} assume true; {30253#true} is VALID [2022-02-20 22:07:09,312 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {30253#true} {30254#false} #573#return; {30254#false} is VALID [2022-02-20 22:07:09,312 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 123 [2022-02-20 22:07:09,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:09,319 INFO L290 TraceCheckUtils]: 0: Hoare triple {30348#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {30253#true} is VALID [2022-02-20 22:07:09,319 INFO L290 TraceCheckUtils]: 1: Hoare triple {30253#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {30253#true} is VALID [2022-02-20 22:07:09,319 INFO L290 TraceCheckUtils]: 2: Hoare triple {30253#true} assume true; {30253#true} is VALID [2022-02-20 22:07:09,319 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {30253#true} {30254#false} #575#return; {30254#false} is VALID [2022-02-20 22:07:09,320 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 135 [2022-02-20 22:07:09,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:09,323 INFO L290 TraceCheckUtils]: 0: Hoare triple {30253#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1 := #in~arg1;~arg2.base, ~arg2.offset := #in~arg2.base, #in~arg2.offset;~arg3 := #in~arg3; {30253#true} is VALID [2022-02-20 22:07:09,323 INFO L290 TraceCheckUtils]: 1: Hoare triple {30253#true} assume true; {30253#true} is VALID [2022-02-20 22:07:09,323 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {30253#true} {30254#false} #603#return; {30254#false} is VALID [2022-02-20 22:07:09,328 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 142 [2022-02-20 22:07:09,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:09,335 INFO L290 TraceCheckUtils]: 0: Hoare triple {30357#(= |old(#valid)| |#valid|)} ~p.base, ~p.offset := #in~p.base, #in~p.offset;call ULTIMATE.dealloc(~p.base, ~p.offset); {30253#true} is VALID [2022-02-20 22:07:09,335 INFO L290 TraceCheckUtils]: 1: Hoare triple {30253#true} assume true; {30253#true} is VALID [2022-02-20 22:07:09,335 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {30253#true} {30254#false} #605#return; {30254#false} is VALID [2022-02-20 22:07:09,335 INFO L290 TraceCheckUtils]: 0: Hoare triple {30253#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(99, 2);call #Ultimate.allocInit(10, 3);call #Ultimate.allocInit(7, 4);call write~init~int(97, 4, 0, 1);call write~init~int(99, 4, 1, 1);call write~init~int(101, 4, 2, 1);call write~init~int(99, 4, 3, 1);call write~init~int(97, 4, 4, 1);call write~init~int(100, 4, 5, 1);call write~init~int(0, 4, 6, 1);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(20, 6);call #Ultimate.allocInit(57, 7);call #Ultimate.allocInit(2, 8);call write~init~int(32, 8, 0, 1);call write~init~int(0, 8, 1, 1);call #Ultimate.allocInit(8, 9);call #Ultimate.allocInit(34, 10);call #Ultimate.allocInit(32, 11);call #Ultimate.allocInit(11, 12);call #Ultimate.allocInit(48, 13);~LDV_IN_INTERRUPT~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset := 14, 0;call #Ultimate.allocInit(72, 14);call write~init~int(3, ~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 2 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(4, ~#usb_acecad_id_table~0.base, 4 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 6 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 8 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 10 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 11 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 12 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 13 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 14 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 15 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 16 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(3, ~#usb_acecad_id_table~0.base, 24 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 26 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(8, ~#usb_acecad_id_table~0.base, 28 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 30 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 32 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 34 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 35 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 36 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 37 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 38 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 39 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(1, ~#usb_acecad_id_table~0.base, 40 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(0, ~#usb_acecad_id_table~0.base, 48 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 50 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 52 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 54 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 56 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 58 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 59 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 60 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 61 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 62 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 63 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 64 + ~#usb_acecad_id_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.driver_info := 0;~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset := 15, 0;call #Ultimate.allocInit(264, 15);call write~init~$Pointer$(12, 0, ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_probe.base, #funAddr~usb_acecad_probe.offset, ~#usb_acecad_driver~0.base, 8 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_disconnect.base, #funAddr~usb_acecad_disconnect.offset, ~#usb_acecad_driver~0.base, 16 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 24 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 32 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 40 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 48 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 56 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 64 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, ~#usb_acecad_driver~0.base, 72 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 80 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 84 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 88 + ~#usb_acecad_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 92 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 100 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 108 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 116 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 124 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 132 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 136 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 144 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 152 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 160 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 168 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 176 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 184 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 192 + ~#usb_acecad_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 193 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 201 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 209 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 217 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 225 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 233 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 241 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 249 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 257 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 261 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 262 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 263 + ~#usb_acecad_driver~0.offset, 1);~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~URB_STATE~0 := 0;~DEV_STATE~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~int_urb~0.base, ~int_urb~0.offset := 0, 0;~bulk_urb~0.base, ~bulk_urb~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {30253#true} is VALID [2022-02-20 22:07:09,336 INFO L290 TraceCheckUtils]: 1: Hoare triple {30253#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret186#1.base, main_#t~ret186#1.offset, main_#t~nondet187#1, main_#t~switch188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~ret191#1, main_#t~nondet192#1, main_#t~switch193#1, main_#t~ret194#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~17#1.base, main_~tmp~17#1.offset, main_~tmp___0~6#1, main_~tmp___1~3#1, main_~tmp___2~1#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~17#1.base, main_~tmp~17#1.offset;havoc main_~tmp___0~6#1;havoc main_~tmp___1~3#1;havoc main_~tmp___2~1#1; {30253#true} is VALID [2022-02-20 22:07:09,336 INFO L272 TraceCheckUtils]: 2: Hoare triple {30253#true} call main_#t~ret186#1.base, main_#t~ret186#1.offset := ldv_init_zalloc(24); {30332#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:09,336 INFO L290 TraceCheckUtils]: 3: Hoare triple {30332#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {30253#true} is VALID [2022-02-20 22:07:09,337 INFO L272 TraceCheckUtils]: 4: Hoare triple {30253#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {30340#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:09,337 INFO L290 TraceCheckUtils]: 5: Hoare triple {30340#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {30253#true} is VALID [2022-02-20 22:07:09,337 INFO L290 TraceCheckUtils]: 6: Hoare triple {30253#true} assume true; {30253#true} is VALID [2022-02-20 22:07:09,337 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {30253#true} {30253#true} #547#return; {30253#true} is VALID [2022-02-20 22:07:09,337 INFO L290 TraceCheckUtils]: 8: Hoare triple {30253#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {30253#true} is VALID [2022-02-20 22:07:09,337 INFO L272 TraceCheckUtils]: 9: Hoare triple {30253#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {30253#true} is VALID [2022-02-20 22:07:09,337 INFO L290 TraceCheckUtils]: 10: Hoare triple {30253#true} ~cond := #in~cond; {30253#true} is VALID [2022-02-20 22:07:09,338 INFO L290 TraceCheckUtils]: 11: Hoare triple {30253#true} assume !(0 == ~cond); {30253#true} is VALID [2022-02-20 22:07:09,338 INFO L290 TraceCheckUtils]: 12: Hoare triple {30253#true} assume true; {30253#true} is VALID [2022-02-20 22:07:09,338 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {30253#true} {30253#true} #549#return; {30253#true} is VALID [2022-02-20 22:07:09,338 INFO L290 TraceCheckUtils]: 14: Hoare triple {30253#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {30253#true} is VALID [2022-02-20 22:07:09,338 INFO L290 TraceCheckUtils]: 15: Hoare triple {30253#true} assume true; {30253#true} is VALID [2022-02-20 22:07:09,338 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {30253#true} {30253#true} #553#return; {30253#true} is VALID [2022-02-20 22:07:09,338 INFO L290 TraceCheckUtils]: 17: Hoare triple {30253#true} main_~tmp~17#1.base, main_~tmp~17#1.offset := main_#t~ret186#1.base, main_#t~ret186#1.offset;havoc main_#t~ret186#1.base, main_#t~ret186#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~17#1.base, main_~tmp~17#1.offset;assume { :begin_inline_ldv_initialize } true; {30253#true} is VALID [2022-02-20 22:07:09,338 INFO L290 TraceCheckUtils]: 18: Hoare triple {30253#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1; {30253#true} is VALID [2022-02-20 22:07:09,339 INFO L290 TraceCheckUtils]: 19: Hoare triple {30253#true} assume -2147483648 <= main_#t~nondet187#1 && main_#t~nondet187#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet187#1;havoc main_#t~nondet187#1;main_#t~switch188#1 := 0 == main_~tmp___0~6#1; {30253#true} is VALID [2022-02-20 22:07:09,339 INFO L290 TraceCheckUtils]: 20: Hoare triple {30253#true} assume !main_#t~switch188#1;main_#t~switch188#1 := main_#t~switch188#1 || 1 == main_~tmp___0~6#1; {30253#true} is VALID [2022-02-20 22:07:09,339 INFO L290 TraceCheckUtils]: 21: Hoare triple {30253#true} assume main_#t~switch188#1; {30253#true} is VALID [2022-02-20 22:07:09,339 INFO L290 TraceCheckUtils]: 22: Hoare triple {30253#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet192#1 && main_#t~nondet192#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet192#1;havoc main_#t~nondet192#1;main_#t~switch193#1 := 0 == main_~tmp___2~1#1; {30253#true} is VALID [2022-02-20 22:07:09,339 INFO L290 TraceCheckUtils]: 23: Hoare triple {30253#true} assume !main_#t~switch193#1;main_#t~switch193#1 := main_#t~switch193#1 || 1 == main_~tmp___2~1#1; {30253#true} is VALID [2022-02-20 22:07:09,339 INFO L290 TraceCheckUtils]: 24: Hoare triple {30253#true} assume main_#t~switch193#1; {30253#true} is VALID [2022-02-20 22:07:09,339 INFO L290 TraceCheckUtils]: 25: Hoare triple {30253#true} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_usb_acecad_init } true;havoc usb_acecad_init_#res#1;havoc usb_acecad_init_#t~ret183#1, usb_acecad_init_#t~nondet184#1, usb_acecad_init_~result~0#1, usb_acecad_init_~tmp~15#1;havoc usb_acecad_init_~result~0#1;havoc usb_acecad_init_~tmp~15#1;assume { :begin_inline_usb_register } true;usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc usb_register_#res#1;havoc usb_register_#t~ret31#1, usb_register_~driver#1.base, usb_register_~driver#1.offset, usb_register_~tmp~1#1;usb_register_~driver#1.base, usb_register_~driver#1.offset := usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset;havoc usb_register_~tmp~1#1;assume { :begin_inline_ldv_usb_register_driver_2 } true;ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset := usb_register_~driver#1.base, usb_register_~driver#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 4, 0;havoc ldv_usb_register_driver_2_#res#1;havoc ldv_usb_register_driver_2_#t~ret196#1, ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset, ldv_usb_register_driver_2_~ldv_func_res~0#1, ldv_usb_register_driver_2_~tmp~19#1;ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_2_~ldv_func_res~0#1;havoc ldv_usb_register_driver_2_~tmp~19#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet217#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet217#1 && usb_register_driver_#t~nondet217#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet217#1;havoc usb_register_driver_#t~nondet217#1; {30253#true} is VALID [2022-02-20 22:07:09,340 INFO L290 TraceCheckUtils]: 26: Hoare triple {30253#true} ldv_usb_register_driver_2_#t~ret196#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_2_#t~ret196#1 && ldv_usb_register_driver_2_#t~ret196#1 <= 2147483647;ldv_usb_register_driver_2_~tmp~19#1 := ldv_usb_register_driver_2_#t~ret196#1;havoc ldv_usb_register_driver_2_#t~ret196#1;ldv_usb_register_driver_2_~ldv_func_res~0#1 := ldv_usb_register_driver_2_~tmp~19#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset, ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset;havoc ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {30253#true} is VALID [2022-02-20 22:07:09,340 INFO L272 TraceCheckUtils]: 27: Hoare triple {30253#true} call ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset := ldv_init_zalloc(1248); {30332#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:09,340 INFO L290 TraceCheckUtils]: 28: Hoare triple {30332#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {30253#true} is VALID [2022-02-20 22:07:09,341 INFO L272 TraceCheckUtils]: 29: Hoare triple {30253#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {30340#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:09,341 INFO L290 TraceCheckUtils]: 30: Hoare triple {30340#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {30253#true} is VALID [2022-02-20 22:07:09,341 INFO L290 TraceCheckUtils]: 31: Hoare triple {30253#true} assume true; {30253#true} is VALID [2022-02-20 22:07:09,341 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {30253#true} {30253#true} #547#return; {30253#true} is VALID [2022-02-20 22:07:09,352 INFO L290 TraceCheckUtils]: 33: Hoare triple {30253#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {30253#true} is VALID [2022-02-20 22:07:09,352 INFO L272 TraceCheckUtils]: 34: Hoare triple {30253#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {30253#true} is VALID [2022-02-20 22:07:09,352 INFO L290 TraceCheckUtils]: 35: Hoare triple {30253#true} ~cond := #in~cond; {30253#true} is VALID [2022-02-20 22:07:09,352 INFO L290 TraceCheckUtils]: 36: Hoare triple {30253#true} assume !(0 == ~cond); {30253#true} is VALID [2022-02-20 22:07:09,352 INFO L290 TraceCheckUtils]: 37: Hoare triple {30253#true} assume true; {30253#true} is VALID [2022-02-20 22:07:09,353 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {30253#true} {30253#true} #549#return; {30253#true} is VALID [2022-02-20 22:07:09,353 INFO L290 TraceCheckUtils]: 39: Hoare triple {30253#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {30253#true} is VALID [2022-02-20 22:07:09,353 INFO L290 TraceCheckUtils]: 40: Hoare triple {30253#true} assume true; {30253#true} is VALID [2022-02-20 22:07:09,353 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {30253#true} {30253#true} #611#return; {30253#true} is VALID [2022-02-20 22:07:09,353 INFO L290 TraceCheckUtils]: 42: Hoare triple {30253#true} ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset := ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset;havoc ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {30253#true} is VALID [2022-02-20 22:07:09,353 INFO L290 TraceCheckUtils]: 43: Hoare triple {30253#true} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_2_#res#1 := ldv_usb_register_driver_2_~ldv_func_res~0#1; {30253#true} is VALID [2022-02-20 22:07:09,353 INFO L290 TraceCheckUtils]: 44: Hoare triple {30253#true} usb_register_#t~ret31#1 := ldv_usb_register_driver_2_#res#1;assume { :end_inline_ldv_usb_register_driver_2 } true;assume -2147483648 <= usb_register_#t~ret31#1 && usb_register_#t~ret31#1 <= 2147483647;usb_register_~tmp~1#1 := usb_register_#t~ret31#1;havoc usb_register_#t~ret31#1;usb_register_#res#1 := usb_register_~tmp~1#1; {30253#true} is VALID [2022-02-20 22:07:09,353 INFO L290 TraceCheckUtils]: 45: Hoare triple {30253#true} usb_acecad_init_#t~ret183#1 := usb_register_#res#1;assume { :end_inline_usb_register } true;assume -2147483648 <= usb_acecad_init_#t~ret183#1 && usb_acecad_init_#t~ret183#1 <= 2147483647;usb_acecad_init_~tmp~15#1 := usb_acecad_init_#t~ret183#1;havoc usb_acecad_init_#t~ret183#1;usb_acecad_init_~result~0#1 := usb_acecad_init_~tmp~15#1; {30253#true} is VALID [2022-02-20 22:07:09,354 INFO L290 TraceCheckUtils]: 46: Hoare triple {30253#true} assume 0 == usb_acecad_init_~result~0#1;havoc usb_acecad_init_#t~nondet184#1; {30253#true} is VALID [2022-02-20 22:07:09,354 INFO L290 TraceCheckUtils]: 47: Hoare triple {30253#true} usb_acecad_init_#res#1 := usb_acecad_init_~result~0#1; {30253#true} is VALID [2022-02-20 22:07:09,354 INFO L290 TraceCheckUtils]: 48: Hoare triple {30253#true} main_#t~ret194#1 := usb_acecad_init_#res#1;assume { :end_inline_usb_acecad_init } true;assume -2147483648 <= main_#t~ret194#1 && main_#t~ret194#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret194#1;havoc main_#t~ret194#1; {30253#true} is VALID [2022-02-20 22:07:09,354 INFO L290 TraceCheckUtils]: 49: Hoare triple {30253#true} assume 0 == ~ldv_retval_1~0;~ldv_state_variable_0~0 := 3; {30253#true} is VALID [2022-02-20 22:07:09,354 INFO L290 TraceCheckUtils]: 50: Hoare triple {30253#true} assume !(0 != ~ldv_retval_1~0); {30253#true} is VALID [2022-02-20 22:07:09,354 INFO L290 TraceCheckUtils]: 51: Hoare triple {30253#true} assume -2147483648 <= main_#t~nondet187#1 && main_#t~nondet187#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet187#1;havoc main_#t~nondet187#1;main_#t~switch188#1 := 0 == main_~tmp___0~6#1; {30253#true} is VALID [2022-02-20 22:07:09,354 INFO L290 TraceCheckUtils]: 52: Hoare triple {30253#true} assume main_#t~switch188#1; {30253#true} is VALID [2022-02-20 22:07:09,354 INFO L290 TraceCheckUtils]: 53: Hoare triple {30253#true} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= main_#t~nondet189#1 && main_#t~nondet189#1 <= 2147483647;main_~tmp___1~3#1 := main_#t~nondet189#1;havoc main_#t~nondet189#1;main_#t~switch190#1 := 0 == main_~tmp___1~3#1; {30253#true} is VALID [2022-02-20 22:07:09,355 INFO L290 TraceCheckUtils]: 54: Hoare triple {30253#true} assume main_#t~switch190#1; {30253#true} is VALID [2022-02-20 22:07:09,355 INFO L290 TraceCheckUtils]: 55: Hoare triple {30253#true} assume 1 == ~ldv_state_variable_1~0;assume { :begin_inline_usb_acecad_probe } true;usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset, usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset := ~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc usb_acecad_probe_#res#1;havoc usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset, usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset, usb_acecad_probe_#t~mem132#1, usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset, usb_acecad_probe_#t~ret134#1, usb_acecad_probe_#t~mem135#1, usb_acecad_probe_#t~ret136#1, usb_acecad_probe_#t~ret137#1, usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset, usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset, usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset, usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset, usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset, usb_acecad_probe_#t~mem143#1.base, usb_acecad_probe_#t~mem143#1.offset, usb_acecad_probe_#t~mem144#1.base, usb_acecad_probe_#t~mem144#1.offset, usb_acecad_probe_#t~mem145#1.base, usb_acecad_probe_#t~mem145#1.offset, usb_acecad_probe_#t~ret146#1, usb_acecad_probe_#t~mem147#1.base, usb_acecad_probe_#t~mem147#1.offset, usb_acecad_probe_#t~mem148#1.base, usb_acecad_probe_#t~mem148#1.offset, usb_acecad_probe_#t~ret149#1, usb_acecad_probe_#t~mem150#1.base, usb_acecad_probe_#t~mem150#1.offset, usb_acecad_probe_#t~ret151#1, usb_acecad_probe_#t~ret152#1, usb_acecad_probe_#t~ret153#1, usb_acecad_probe_#t~mem154#1, usb_acecad_probe_#t~switch155#1, usb_acecad_probe_#t~nondet156#1, usb_acecad_probe_#t~nondet157#1, usb_acecad_probe_#t~mem158#1, usb_acecad_probe_#t~mem159#1, usb_acecad_probe_#t~nondet160#1, usb_acecad_probe_#t~nondet161#1, usb_acecad_probe_#t~mem162#1, usb_acecad_probe_#t~mem163#1, usb_acecad_probe_#t~mem164#1.base, usb_acecad_probe_#t~mem164#1.offset, usb_acecad_probe_#t~mem165#1.base, usb_acecad_probe_#t~mem165#1.offset, usb_acecad_probe_#t~ite166#1, usb_acecad_probe_#t~mem167#1, usb_acecad_probe_#t~mem168#1.base, usb_acecad_probe_#t~mem168#1.offset, usb_acecad_probe_#t~mem169#1, usb_acecad_probe_#t~mem170#1.base, usb_acecad_probe_#t~mem170#1.offset, usb_acecad_probe_#t~mem171#1.base, usb_acecad_probe_#t~mem171#1.offset, usb_acecad_probe_#t~mem172#1, usb_acecad_probe_#t~mem173#1.base, usb_acecad_probe_#t~mem173#1.offset, usb_acecad_probe_#t~ret174#1, usb_acecad_probe_#t~mem175#1.base, usb_acecad_probe_#t~mem175#1.offset, usb_acecad_probe_#t~mem176#1, usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset, usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset, usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset, usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset, usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset, usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset, usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset, usb_acecad_probe_~pipe~0#1, usb_acecad_probe_~maxp~0#1, usb_acecad_probe_~err~0#1, usb_acecad_probe_~tmp___0~5#1, usb_acecad_probe_~tmp___1~2#1, usb_acecad_probe_~tmp___2~0#1, usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset, usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~tmp___5~0#1, usb_acecad_probe_~tmp___6~0#1;usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset := usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset;usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset := usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset;havoc usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset;havoc usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;havoc usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset;havoc usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset;havoc usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset;havoc usb_acecad_probe_~pipe~0#1;havoc usb_acecad_probe_~maxp~0#1;havoc usb_acecad_probe_~err~0#1;havoc usb_acecad_probe_~tmp___0~5#1;havoc usb_acecad_probe_~tmp___1~2#1;havoc usb_acecad_probe_~tmp___2~0#1;havoc usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;havoc usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset;havoc usb_acecad_probe_~tmp___5~0#1;havoc usb_acecad_probe_~tmp___6~0#1;assume { :begin_inline_interface_to_usbdev } true;interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset := usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset;havoc interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;havoc interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset, interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset, interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset := interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset;havoc interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;assume { :begin_inline_ldv_interface_to_usbdev } true;havoc ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;havoc ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset, ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset;havoc ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset; {30253#true} is VALID [2022-02-20 22:07:09,355 INFO L272 TraceCheckUtils]: 56: Hoare triple {30253#true} call ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset := ldv_malloc(1822); {30348#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:09,356 INFO L290 TraceCheckUtils]: 57: Hoare triple {30348#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {30253#true} is VALID [2022-02-20 22:07:09,356 INFO L290 TraceCheckUtils]: 58: Hoare triple {30253#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {30253#true} is VALID [2022-02-20 22:07:09,356 INFO L290 TraceCheckUtils]: 59: Hoare triple {30253#true} assume true; {30253#true} is VALID [2022-02-20 22:07:09,356 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {30253#true} {30253#true} #555#return; {30253#true} is VALID [2022-02-20 22:07:09,356 INFO L290 TraceCheckUtils]: 61: Hoare triple {30253#true} ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset := ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset;havoc ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset; {30253#true} is VALID [2022-02-20 22:07:09,356 INFO L290 TraceCheckUtils]: 62: Hoare triple {30253#true} assume !(0 == (ldv_interface_to_usbdev_~result~1#1.base + ldv_interface_to_usbdev_~result~1#1.offset) % 18446744073709551616);ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset := ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset; {30253#true} is VALID [2022-02-20 22:07:09,356 INFO L290 TraceCheckUtils]: 63: Hoare triple {30253#true} interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset := ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;assume { :end_inline_ldv_interface_to_usbdev } true;interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset := interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset;havoc interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset;interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset := interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset; {30253#true} is VALID [2022-02-20 22:07:09,356 INFO L290 TraceCheckUtils]: 64: Hoare triple {30253#true} usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset := interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;assume { :end_inline_interface_to_usbdev } true;usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset := usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset;havoc usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset;usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset := usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;call usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset := read~$Pointer$(usb_acecad_probe_~intf#1.base, 8 + usb_acecad_probe_~intf#1.offset, 8);usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset := usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset;havoc usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset;call usb_acecad_probe_#t~mem132#1 := read~int(usb_acecad_probe_~interface~0#1.base, 4 + usb_acecad_probe_~interface~0#1.offset, 1); {30253#true} is VALID [2022-02-20 22:07:09,357 INFO L290 TraceCheckUtils]: 65: Hoare triple {30253#true} assume !(1 != usb_acecad_probe_#t~mem132#1 % 256 % 4294967296);havoc usb_acecad_probe_#t~mem132#1;call usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset := read~$Pointer$(usb_acecad_probe_~interface~0#1.base, 9 + usb_acecad_probe_~interface~0#1.offset, 8);usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset := usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset;havoc usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset;assume { :begin_inline_usb_endpoint_is_int_in } true;usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset := usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_endpoint_is_int_in_#res#1;havoc usb_endpoint_is_int_in_#t~ret3#1, usb_endpoint_is_int_in_#t~ret4#1, usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset, usb_endpoint_is_int_in_~tmp~0#1, usb_endpoint_is_int_in_~tmp___0~0#1, usb_endpoint_is_int_in_~tmp___1~0#1;usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset := usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset;havoc usb_endpoint_is_int_in_~tmp~0#1;havoc usb_endpoint_is_int_in_~tmp___0~0#1;havoc usb_endpoint_is_int_in_~tmp___1~0#1;assume { :begin_inline_usb_endpoint_xfer_int } true;usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset := usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset;havoc usb_endpoint_xfer_int_#res#1;havoc usb_endpoint_xfer_int_#t~mem2#1, usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset;usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset := usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset;call usb_endpoint_xfer_int_#t~mem2#1 := read~int(usb_endpoint_xfer_int_~epd#1.base, 3 + usb_endpoint_xfer_int_~epd#1.offset, 1);usb_endpoint_xfer_int_#res#1 := (if 3 == (if 0 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 0 else (if 1 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 1 else ~bitwiseAnd(usb_endpoint_xfer_int_#t~mem2#1 % 256, 3))) then 1 else 0);havoc usb_endpoint_xfer_int_#t~mem2#1; {30253#true} is VALID [2022-02-20 22:07:09,357 INFO L290 TraceCheckUtils]: 66: Hoare triple {30253#true} usb_endpoint_is_int_in_#t~ret3#1 := usb_endpoint_xfer_int_#res#1;assume { :end_inline_usb_endpoint_xfer_int } true;assume -2147483648 <= usb_endpoint_is_int_in_#t~ret3#1 && usb_endpoint_is_int_in_#t~ret3#1 <= 2147483647;usb_endpoint_is_int_in_~tmp~0#1 := usb_endpoint_is_int_in_#t~ret3#1;havoc usb_endpoint_is_int_in_#t~ret3#1; {30253#true} is VALID [2022-02-20 22:07:09,357 INFO L290 TraceCheckUtils]: 67: Hoare triple {30253#true} assume !(0 != usb_endpoint_is_int_in_~tmp~0#1);usb_endpoint_is_int_in_~tmp___1~0#1 := 0; {30287#(= 0 |ULTIMATE.start_usb_endpoint_is_int_in_~tmp___1~0#1|)} is VALID [2022-02-20 22:07:09,357 INFO L290 TraceCheckUtils]: 68: Hoare triple {30287#(= 0 |ULTIMATE.start_usb_endpoint_is_int_in_~tmp___1~0#1|)} usb_endpoint_is_int_in_#res#1 := usb_endpoint_is_int_in_~tmp___1~0#1; {30288#(= |ULTIMATE.start_usb_endpoint_is_int_in_#res#1| 0)} is VALID [2022-02-20 22:07:09,358 INFO L290 TraceCheckUtils]: 69: Hoare triple {30288#(= |ULTIMATE.start_usb_endpoint_is_int_in_#res#1| 0)} usb_acecad_probe_#t~ret134#1 := usb_endpoint_is_int_in_#res#1;assume { :end_inline_usb_endpoint_is_int_in } true;assume -2147483648 <= usb_acecad_probe_#t~ret134#1 && usb_acecad_probe_#t~ret134#1 <= 2147483647;usb_acecad_probe_~tmp___0~5#1 := usb_acecad_probe_#t~ret134#1;havoc usb_acecad_probe_#t~ret134#1; {30289#(= |ULTIMATE.start_usb_acecad_probe_~tmp___0~5#1| 0)} is VALID [2022-02-20 22:07:09,358 INFO L290 TraceCheckUtils]: 70: Hoare triple {30289#(= |ULTIMATE.start_usb_acecad_probe_~tmp___0~5#1| 0)} assume !(0 == usb_acecad_probe_~tmp___0~5#1);call usb_acecad_probe_#t~mem135#1 := read~int(usb_acecad_probe_~endpoint~0#1.base, 2 + usb_acecad_probe_~endpoint~0#1.offset, 1);assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_#t~mem135#1 % 256;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem45#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem45#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := (if (1 == 256 * __create_pipe_#t~mem45#1 || 0 == 256 * __create_pipe_#t~mem45#1) && 0 == 32768 * __create_pipe_~endpoint#1 then 256 * __create_pipe_#t~mem45#1 else (if 0 == 256 * __create_pipe_#t~mem45#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1) then 32768 * __create_pipe_~endpoint#1 else (if (1 == 256 * __create_pipe_#t~mem45#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1)) || ((1 == 256 * __create_pipe_#t~mem45#1 || 0 == 256 * __create_pipe_#t~mem45#1) && 1 == 32768 * __create_pipe_~endpoint#1) then 1 else ~bitwiseOr(256 * __create_pipe_#t~mem45#1, 32768 * __create_pipe_~endpoint#1))));havoc __create_pipe_#t~mem45#1; {30254#false} is VALID [2022-02-20 22:07:09,358 INFO L290 TraceCheckUtils]: 71: Hoare triple {30254#false} usb_acecad_probe_#t~ret136#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;usb_acecad_probe_~tmp___1~2#1 := usb_acecad_probe_#t~ret136#1;havoc usb_acecad_probe_#t~mem135#1;havoc usb_acecad_probe_#t~ret136#1;usb_acecad_probe_~pipe~0#1 := (if ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 else ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 - 4294967296);assume { :begin_inline_usb_maxpacket } true;usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset, usb_maxpacket_#in~pipe#1, usb_maxpacket_#in~is_out#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~pipe~0#1, (if 0 == (if 0 == usb_acecad_probe_~pipe~0#1 then 0 else (if 1 == usb_acecad_probe_~pipe~0#1 then 0 else ~bitwiseAnd(usb_acecad_probe_~pipe~0#1, 128))) then 1 else 0);havoc usb_maxpacket_#res#1;havoc usb_maxpacket_#t~ret47#1, usb_maxpacket_#t~ret48#1, usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset, usb_maxpacket_#t~ret50#1, usb_maxpacket_#t~ret51#1, usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset, usb_maxpacket_#t~mem53#1, usb_maxpacket_#t~nondet46#1, usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset, usb_maxpacket_~pipe#1, usb_maxpacket_~is_out#1, usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset, usb_maxpacket_~epnum~0#1, usb_maxpacket_~__ret_warn_on~0#1, usb_maxpacket_~tmp~2#1, usb_maxpacket_~__ret_warn_on___0~0#1, usb_maxpacket_~tmp___0~1#1;usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset := usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset;usb_maxpacket_~pipe#1 := usb_maxpacket_#in~pipe#1;usb_maxpacket_~is_out#1 := usb_maxpacket_#in~is_out#1;havoc usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset;havoc usb_maxpacket_~epnum~0#1;havoc usb_maxpacket_~__ret_warn_on~0#1;havoc usb_maxpacket_~tmp~2#1;havoc usb_maxpacket_~__ret_warn_on___0~0#1;havoc usb_maxpacket_~tmp___0~1#1; {30254#false} is VALID [2022-02-20 22:07:09,358 INFO L290 TraceCheckUtils]: 72: Hoare triple {30254#false} assume 0 == usb_maxpacket_~pipe#1 / 32768;usb_maxpacket_~epnum~0#1 := 0; {30254#false} is VALID [2022-02-20 22:07:09,358 INFO L290 TraceCheckUtils]: 73: Hoare triple {30254#false} assume !(0 != usb_maxpacket_~is_out#1);usb_maxpacket_~__ret_warn_on___0~0#1 := (if 0 == (if 0 == usb_maxpacket_~pipe#1 then 0 else (if 1 == usb_maxpacket_~pipe#1 then 0 else ~bitwiseAnd(usb_maxpacket_~pipe#1, 128))) then 1 else 0); {30254#false} is VALID [2022-02-20 22:07:09,358 INFO L272 TraceCheckUtils]: 74: Hoare triple {30254#false} call usb_maxpacket_#t~ret50#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {30253#true} is VALID [2022-02-20 22:07:09,359 INFO L290 TraceCheckUtils]: 75: Hoare triple {30253#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {30253#true} is VALID [2022-02-20 22:07:09,359 INFO L290 TraceCheckUtils]: 76: Hoare triple {30253#true} assume true; {30253#true} is VALID [2022-02-20 22:07:09,359 INFO L284 TraceCheckUtils]: 77: Hoare quadruple {30253#true} {30254#false} #563#return; {30254#false} is VALID [2022-02-20 22:07:09,359 INFO L290 TraceCheckUtils]: 78: Hoare triple {30254#false} assume -9223372036854775808 <= usb_maxpacket_#t~ret50#1 && usb_maxpacket_#t~ret50#1 <= 9223372036854775807;usb_maxpacket_~tmp___0~1#1 := usb_maxpacket_#t~ret50#1;havoc usb_maxpacket_#t~ret50#1; {30254#false} is VALID [2022-02-20 22:07:09,359 INFO L290 TraceCheckUtils]: 79: Hoare triple {30254#false} assume !(0 != usb_maxpacket_~tmp___0~1#1); {30254#false} is VALID [2022-02-20 22:07:09,359 INFO L272 TraceCheckUtils]: 80: Hoare triple {30254#false} call usb_maxpacket_#t~ret51#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {30253#true} is VALID [2022-02-20 22:07:09,359 INFO L290 TraceCheckUtils]: 81: Hoare triple {30253#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {30253#true} is VALID [2022-02-20 22:07:09,359 INFO L290 TraceCheckUtils]: 82: Hoare triple {30253#true} assume true; {30253#true} is VALID [2022-02-20 22:07:09,360 INFO L284 TraceCheckUtils]: 83: Hoare quadruple {30253#true} {30254#false} #567#return; {30254#false} is VALID [2022-02-20 22:07:09,360 INFO L290 TraceCheckUtils]: 84: Hoare triple {30254#false} assume -9223372036854775808 <= usb_maxpacket_#t~ret51#1 && usb_maxpacket_#t~ret51#1 <= 9223372036854775807;havoc usb_maxpacket_#t~ret51#1;call usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset := read~$Pointer$(usb_maxpacket_~udev#1.base, 1186 + usb_maxpacket_~udev#1.offset + 8 * (usb_maxpacket_~epnum~0#1 % 4294967296), 8);usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset := usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset;havoc usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset; {30254#false} is VALID [2022-02-20 22:07:09,360 INFO L290 TraceCheckUtils]: 85: Hoare triple {30254#false} assume 0 == (usb_maxpacket_~ep~0#1.base + usb_maxpacket_~ep~0#1.offset) % 18446744073709551616;usb_maxpacket_#res#1 := 0; {30254#false} is VALID [2022-02-20 22:07:09,360 INFO L290 TraceCheckUtils]: 86: Hoare triple {30254#false} usb_acecad_probe_#t~ret137#1 := usb_maxpacket_#res#1;assume { :end_inline_usb_maxpacket } true;usb_acecad_probe_~tmp___2~0#1 := usb_acecad_probe_#t~ret137#1;havoc usb_acecad_probe_#t~ret137#1;usb_acecad_probe_~maxp~0#1 := usb_acecad_probe_~tmp___2~0#1 % 65536; {30254#false} is VALID [2022-02-20 22:07:09,360 INFO L272 TraceCheckUtils]: 87: Hoare triple {30254#false} call usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset := kzalloc(232, 208); {30348#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:09,360 INFO L290 TraceCheckUtils]: 88: Hoare triple {30348#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {30253#true} is VALID [2022-02-20 22:07:09,361 INFO L272 TraceCheckUtils]: 89: Hoare triple {30253#true} call __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset := ldv_malloc(__kmalloc_~size#1); {30348#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:09,361 INFO L290 TraceCheckUtils]: 90: Hoare triple {30348#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {30253#true} is VALID [2022-02-20 22:07:09,361 INFO L290 TraceCheckUtils]: 91: Hoare triple {30253#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {30253#true} is VALID [2022-02-20 22:07:09,361 INFO L290 TraceCheckUtils]: 92: Hoare triple {30253#true} assume true; {30253#true} is VALID [2022-02-20 22:07:09,361 INFO L284 TraceCheckUtils]: 93: Hoare quadruple {30253#true} {30253#true} #539#return; {30253#true} is VALID [2022-02-20 22:07:09,361 INFO L290 TraceCheckUtils]: 94: Hoare triple {30253#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset; {30253#true} is VALID [2022-02-20 22:07:09,361 INFO L290 TraceCheckUtils]: 95: Hoare triple {30253#true} kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {30253#true} is VALID [2022-02-20 22:07:09,361 INFO L290 TraceCheckUtils]: 96: Hoare triple {30253#true} #t~ret58#1.base, #t~ret58#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret58#1.base, #t~ret58#1.offset;havoc #t~ret58#1.base, #t~ret58#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {30253#true} is VALID [2022-02-20 22:07:09,362 INFO L290 TraceCheckUtils]: 97: Hoare triple {30253#true} assume true; {30253#true} is VALID [2022-02-20 22:07:09,362 INFO L284 TraceCheckUtils]: 98: Hoare quadruple {30253#true} {30254#false} #569#return; {30254#false} is VALID [2022-02-20 22:07:09,362 INFO L290 TraceCheckUtils]: 99: Hoare triple {30254#false} usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset := usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset;havoc usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset;usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset := usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;assume { :begin_inline_input_allocate_device } true;havoc input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;havoc input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset; {30254#false} is VALID [2022-02-20 22:07:09,362 INFO L272 TraceCheckUtils]: 100: Hoare triple {30254#false} call input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset := kzalloc(1855, ~bitwiseOr(~bitwiseOr(16, 64), 128)); {30348#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:09,362 INFO L290 TraceCheckUtils]: 101: Hoare triple {30348#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {30253#true} is VALID [2022-02-20 22:07:09,362 INFO L272 TraceCheckUtils]: 102: Hoare triple {30253#true} call __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset := ldv_malloc(__kmalloc_~size#1); {30348#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:09,363 INFO L290 TraceCheckUtils]: 103: Hoare triple {30348#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {30253#true} is VALID [2022-02-20 22:07:09,363 INFO L290 TraceCheckUtils]: 104: Hoare triple {30253#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {30253#true} is VALID [2022-02-20 22:07:09,363 INFO L290 TraceCheckUtils]: 105: Hoare triple {30253#true} assume true; {30253#true} is VALID [2022-02-20 22:07:09,363 INFO L284 TraceCheckUtils]: 106: Hoare quadruple {30253#true} {30253#true} #539#return; {30253#true} is VALID [2022-02-20 22:07:09,363 INFO L290 TraceCheckUtils]: 107: Hoare triple {30253#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset; {30253#true} is VALID [2022-02-20 22:07:09,363 INFO L290 TraceCheckUtils]: 108: Hoare triple {30253#true} kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {30253#true} is VALID [2022-02-20 22:07:09,363 INFO L290 TraceCheckUtils]: 109: Hoare triple {30253#true} #t~ret58#1.base, #t~ret58#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret58#1.base, #t~ret58#1.offset;havoc #t~ret58#1.base, #t~ret58#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {30253#true} is VALID [2022-02-20 22:07:09,363 INFO L290 TraceCheckUtils]: 110: Hoare triple {30253#true} assume true; {30253#true} is VALID [2022-02-20 22:07:09,364 INFO L284 TraceCheckUtils]: 111: Hoare quadruple {30253#true} {30254#false} #571#return; {30254#false} is VALID [2022-02-20 22:07:09,364 INFO L290 TraceCheckUtils]: 112: Hoare triple {30254#false} input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset := input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset;havoc input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset; {30254#false} is VALID [2022-02-20 22:07:09,364 INFO L290 TraceCheckUtils]: 113: Hoare triple {30254#false} usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset := input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;assume { :end_inline_input_allocate_device } true;usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset := usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset;havoc usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset; {30254#false} is VALID [2022-02-20 22:07:09,364 INFO L290 TraceCheckUtils]: 114: Hoare triple {30254#false} assume !(0 == (usb_acecad_probe_~acecad~3#1.base + usb_acecad_probe_~acecad~3#1.offset) % 18446744073709551616 || 0 == (usb_acecad_probe_~input_dev~0#1.base + usb_acecad_probe_~input_dev~0#1.offset) % 18446744073709551616);assume { :begin_inline_usb_alloc_coherent } true;usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset, usb_alloc_coherent_#in~arg1#1, usb_alloc_coherent_#in~arg2#1, usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, 8, 208, usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset;havoc usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;havoc usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset, usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset, usb_alloc_coherent_~arg1#1, usb_alloc_coherent_~arg2#1, usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset;usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset := usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset;usb_alloc_coherent_~arg1#1 := usb_alloc_coherent_#in~arg1#1;usb_alloc_coherent_~arg2#1 := usb_alloc_coherent_#in~arg2#1;usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset := usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset; {30254#false} is VALID [2022-02-20 22:07:09,364 INFO L272 TraceCheckUtils]: 115: Hoare triple {30254#false} call usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset := ldv_malloc(0); {30348#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:09,364 INFO L290 TraceCheckUtils]: 116: Hoare triple {30348#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {30253#true} is VALID [2022-02-20 22:07:09,364 INFO L290 TraceCheckUtils]: 117: Hoare triple {30253#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {30253#true} is VALID [2022-02-20 22:07:09,364 INFO L290 TraceCheckUtils]: 118: Hoare triple {30253#true} assume true; {30253#true} is VALID [2022-02-20 22:07:09,365 INFO L284 TraceCheckUtils]: 119: Hoare quadruple {30253#true} {30254#false} #573#return; {30254#false} is VALID [2022-02-20 22:07:09,365 INFO L290 TraceCheckUtils]: 120: Hoare triple {30254#false} usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset := usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset;havoc usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset; {30254#false} is VALID [2022-02-20 22:07:09,365 INFO L290 TraceCheckUtils]: 121: Hoare triple {30254#false} usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset := usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;assume { :end_inline_usb_alloc_coherent } true;usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset := usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset;havoc usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset;call write~$Pointer$(usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8); {30254#false} is VALID [2022-02-20 22:07:09,365 INFO L290 TraceCheckUtils]: 122: Hoare triple {30254#false} assume !(0 == (usb_acecad_probe_#t~mem141#1.base + usb_acecad_probe_#t~mem141#1.offset) % 18446744073709551616);havoc usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset;assume { :begin_inline_ldv_usb_alloc_urb_5 } true;ldv_usb_alloc_urb_5_#in~ldv_func_arg1#1, ldv_usb_alloc_urb_5_#in~ldv_func_arg2#1 := 0, 208;havoc ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset, ldv_usb_alloc_urb_5_~ldv_func_arg1#1, ldv_usb_alloc_urb_5_~ldv_func_arg2#1, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset, ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;ldv_usb_alloc_urb_5_~ldv_func_arg1#1 := ldv_usb_alloc_urb_5_#in~ldv_func_arg1#1;ldv_usb_alloc_urb_5_~ldv_func_arg2#1 := ldv_usb_alloc_urb_5_#in~ldv_func_arg2#1;havoc ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset;havoc ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;assume { :begin_inline_usb_alloc_urb } true;usb_alloc_urb_#in~arg0#1, usb_alloc_urb_#in~arg1#1 := ldv_usb_alloc_urb_5_~ldv_func_arg1#1, ldv_usb_alloc_urb_5_~ldv_func_arg2#1;havoc usb_alloc_urb_#res#1.base, usb_alloc_urb_#res#1.offset;havoc usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset, usb_alloc_urb_~arg0#1, usb_alloc_urb_~arg1#1;usb_alloc_urb_~arg0#1 := usb_alloc_urb_#in~arg0#1;usb_alloc_urb_~arg1#1 := usb_alloc_urb_#in~arg1#1; {30254#false} is VALID [2022-02-20 22:07:09,365 INFO L272 TraceCheckUtils]: 123: Hoare triple {30254#false} call usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset := ldv_malloc(180); {30348#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:09,365 INFO L290 TraceCheckUtils]: 124: Hoare triple {30348#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {30253#true} is VALID [2022-02-20 22:07:09,365 INFO L290 TraceCheckUtils]: 125: Hoare triple {30253#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {30253#true} is VALID [2022-02-20 22:07:09,365 INFO L290 TraceCheckUtils]: 126: Hoare triple {30253#true} assume true; {30253#true} is VALID [2022-02-20 22:07:09,365 INFO L284 TraceCheckUtils]: 127: Hoare quadruple {30253#true} {30254#false} #575#return; {30254#false} is VALID [2022-02-20 22:07:09,366 INFO L290 TraceCheckUtils]: 128: Hoare triple {30254#false} usb_alloc_urb_#res#1.base, usb_alloc_urb_#res#1.offset := usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset;havoc usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset; {30254#false} is VALID [2022-02-20 22:07:09,366 INFO L290 TraceCheckUtils]: 129: Hoare triple {30254#false} ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset := usb_alloc_urb_#res#1.base, usb_alloc_urb_#res#1.offset;assume { :end_inline_usb_alloc_urb } true;ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset := ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset;ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset := ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;assume { :begin_inline_ldv_alloc_urb } true;ldv_alloc_urb_#in~res#1.base, ldv_alloc_urb_#in~res#1.offset := ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset;havoc ldv_alloc_urb_~res#1.base, ldv_alloc_urb_~res#1.offset;ldv_alloc_urb_~res#1.base, ldv_alloc_urb_~res#1.offset := ldv_alloc_urb_#in~res#1.base, ldv_alloc_urb_#in~res#1.offset; {30254#false} is VALID [2022-02-20 22:07:09,366 INFO L290 TraceCheckUtils]: 130: Hoare triple {30254#false} assume 0 != (ldv_alloc_urb_~res#1.base + ldv_alloc_urb_~res#1.offset) % 18446744073709551616;~URB_STATE~0 := 1 + ~URB_STATE~0; {30254#false} is VALID [2022-02-20 22:07:09,366 INFO L290 TraceCheckUtils]: 131: Hoare triple {30254#false} assume { :end_inline_ldv_alloc_urb } true;ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset := ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset; {30254#false} is VALID [2022-02-20 22:07:09,366 INFO L290 TraceCheckUtils]: 132: Hoare triple {30254#false} usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset := ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;assume { :end_inline_ldv_usb_alloc_urb_5 } true;call write~$Pointer$(usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset, usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8);havoc usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset;call usb_acecad_probe_#t~mem143#1.base, usb_acecad_probe_#t~mem143#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8); {30254#false} is VALID [2022-02-20 22:07:09,366 INFO L290 TraceCheckUtils]: 133: Hoare triple {30254#false} assume 0 == (usb_acecad_probe_#t~mem143#1.base + usb_acecad_probe_#t~mem143#1.offset) % 18446744073709551616;havoc usb_acecad_probe_#t~mem143#1.base, usb_acecad_probe_#t~mem143#1.offset;usb_acecad_probe_~err~0#1 := -12; {30254#false} is VALID [2022-02-20 22:07:09,366 INFO L290 TraceCheckUtils]: 134: Hoare triple {30254#false} call usb_acecad_probe_#t~mem175#1.base, usb_acecad_probe_#t~mem175#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem176#1 := read~int(usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset, 8); {30254#false} is VALID [2022-02-20 22:07:09,366 INFO L272 TraceCheckUtils]: 135: Hoare triple {30254#false} call usb_free_coherent(usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, 8, usb_acecad_probe_#t~mem175#1.base, usb_acecad_probe_#t~mem175#1.offset, usb_acecad_probe_#t~mem176#1); {30253#true} is VALID [2022-02-20 22:07:09,367 INFO L290 TraceCheckUtils]: 136: Hoare triple {30253#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1 := #in~arg1;~arg2.base, ~arg2.offset := #in~arg2.base, #in~arg2.offset;~arg3 := #in~arg3; {30253#true} is VALID [2022-02-20 22:07:09,367 INFO L290 TraceCheckUtils]: 137: Hoare triple {30253#true} assume true; {30253#true} is VALID [2022-02-20 22:07:09,367 INFO L284 TraceCheckUtils]: 138: Hoare quadruple {30253#true} {30254#false} #603#return; {30254#false} is VALID [2022-02-20 22:07:09,367 INFO L290 TraceCheckUtils]: 139: Hoare triple {30254#false} havoc usb_acecad_probe_#t~mem175#1.base, usb_acecad_probe_#t~mem175#1.offset;havoc usb_acecad_probe_#t~mem176#1; {30254#false} is VALID [2022-02-20 22:07:09,367 INFO L290 TraceCheckUtils]: 140: Hoare triple {30254#false} assume { :begin_inline_input_free_device } true;input_free_device_#in~arg0#1.base, input_free_device_#in~arg0#1.offset := usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset;havoc input_free_device_~arg0#1.base, input_free_device_~arg0#1.offset;input_free_device_~arg0#1.base, input_free_device_~arg0#1.offset := input_free_device_#in~arg0#1.base, input_free_device_#in~arg0#1.offset; {30254#false} is VALID [2022-02-20 22:07:09,367 INFO L290 TraceCheckUtils]: 141: Hoare triple {30254#false} assume { :end_inline_input_free_device } true; {30254#false} is VALID [2022-02-20 22:07:09,367 INFO L272 TraceCheckUtils]: 142: Hoare triple {30254#false} call kfree(usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset); {30357#(= |old(#valid)| |#valid|)} is VALID [2022-02-20 22:07:09,367 INFO L290 TraceCheckUtils]: 143: Hoare triple {30357#(= |old(#valid)| |#valid|)} ~p.base, ~p.offset := #in~p.base, #in~p.offset;call ULTIMATE.dealloc(~p.base, ~p.offset); {30253#true} is VALID [2022-02-20 22:07:09,368 INFO L290 TraceCheckUtils]: 144: Hoare triple {30253#true} assume true; {30253#true} is VALID [2022-02-20 22:07:09,368 INFO L284 TraceCheckUtils]: 145: Hoare quadruple {30253#true} {30254#false} #605#return; {30254#false} is VALID [2022-02-20 22:07:09,368 INFO L290 TraceCheckUtils]: 146: Hoare triple {30254#false} usb_acecad_probe_#res#1 := usb_acecad_probe_~err~0#1; {30254#false} is VALID [2022-02-20 22:07:09,368 INFO L290 TraceCheckUtils]: 147: Hoare triple {30254#false} main_#t~ret191#1 := usb_acecad_probe_#res#1;assume { :end_inline_usb_acecad_probe } true;assume -2147483648 <= main_#t~ret191#1 && main_#t~ret191#1 <= 2147483647;~ldv_retval_0~0 := main_#t~ret191#1;havoc main_#t~ret191#1; {30254#false} is VALID [2022-02-20 22:07:09,368 INFO L290 TraceCheckUtils]: 148: Hoare triple {30254#false} assume 0 == ~ldv_retval_0~0;~ldv_state_variable_1~0 := 2;~ref_cnt~0 := 1 + ~ref_cnt~0; {30254#false} is VALID [2022-02-20 22:07:09,368 INFO L290 TraceCheckUtils]: 149: Hoare triple {30254#false} assume -2147483648 <= main_#t~nondet187#1 && main_#t~nondet187#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet187#1;havoc main_#t~nondet187#1;main_#t~switch188#1 := 0 == main_~tmp___0~6#1; {30254#false} is VALID [2022-02-20 22:07:09,368 INFO L290 TraceCheckUtils]: 150: Hoare triple {30254#false} assume !main_#t~switch188#1;main_#t~switch188#1 := main_#t~switch188#1 || 1 == main_~tmp___0~6#1; {30254#false} is VALID [2022-02-20 22:07:09,368 INFO L290 TraceCheckUtils]: 151: Hoare triple {30254#false} assume main_#t~switch188#1; {30254#false} is VALID [2022-02-20 22:07:09,368 INFO L290 TraceCheckUtils]: 152: Hoare triple {30254#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet192#1 && main_#t~nondet192#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet192#1;havoc main_#t~nondet192#1;main_#t~switch193#1 := 0 == main_~tmp___2~1#1; {30254#false} is VALID [2022-02-20 22:07:09,369 INFO L290 TraceCheckUtils]: 153: Hoare triple {30254#false} assume main_#t~switch193#1; {30254#false} is VALID [2022-02-20 22:07:09,369 INFO L290 TraceCheckUtils]: 154: Hoare triple {30254#false} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0;assume { :begin_inline_usb_acecad_exit } true;assume { :begin_inline_ldv_usb_deregister_11 } true;ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset := ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset;assume { :begin_inline_usb_deregister } true;usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset := ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;havoc usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset;usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset := usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset; {30254#false} is VALID [2022-02-20 22:07:09,369 INFO L290 TraceCheckUtils]: 155: Hoare triple {30254#false} assume { :end_inline_usb_deregister } true;~ldv_state_variable_1~0 := 0; {30254#false} is VALID [2022-02-20 22:07:09,369 INFO L290 TraceCheckUtils]: 156: Hoare triple {30254#false} assume { :end_inline_ldv_usb_deregister_11 } true; {30254#false} is VALID [2022-02-20 22:07:09,369 INFO L290 TraceCheckUtils]: 157: Hoare triple {30254#false} assume { :end_inline_usb_acecad_exit } true;~ldv_state_variable_0~0 := 2; {30254#false} is VALID [2022-02-20 22:07:09,369 INFO L290 TraceCheckUtils]: 158: Hoare triple {30254#false} assume { :begin_inline_ldv_check_final_state } true; {30254#false} is VALID [2022-02-20 22:07:09,369 INFO L290 TraceCheckUtils]: 159: Hoare triple {30254#false} assume 0 != ~URB_STATE~0; {30254#false} is VALID [2022-02-20 22:07:09,369 INFO L272 TraceCheckUtils]: 160: Hoare triple {30254#false} call ldv_error(); {30254#false} is VALID [2022-02-20 22:07:09,370 INFO L290 TraceCheckUtils]: 161: Hoare triple {30254#false} assume !false; {30254#false} is VALID [2022-02-20 22:07:09,370 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2022-02-20 22:07:09,370 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:07:09,370 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1195353493] [2022-02-20 22:07:09,370 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1195353493] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:07:09,370 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 22:07:09,371 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2022-02-20 22:07:09,371 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [189996362] [2022-02-20 22:07:09,371 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:07:09,372 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 10.88888888888889) internal successors, (98), 5 states have internal predecessors, (98), 2 states have call successors, (15), 6 states have call predecessors, (15), 1 states have return successors, (14), 2 states have call predecessors, (14), 2 states have call successors, (14) Word has length 162 [2022-02-20 22:07:09,372 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:07:09,372 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 9 states, 9 states have (on average 10.88888888888889) internal successors, (98), 5 states have internal predecessors, (98), 2 states have call successors, (15), 6 states have call predecessors, (15), 1 states have return successors, (14), 2 states have call predecessors, (14), 2 states have call successors, (14) [2022-02-20 22:07:09,452 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 127 edges. 127 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:09,452 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-02-20 22:07:09,453 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:07:09,453 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-02-20 22:07:09,453 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2022-02-20 22:07:09,453 INFO L87 Difference]: Start difference. First operand 871 states and 1135 transitions. Second operand has 9 states, 9 states have (on average 10.88888888888889) internal successors, (98), 5 states have internal predecessors, (98), 2 states have call successors, (15), 6 states have call predecessors, (15), 1 states have return successors, (14), 2 states have call predecessors, (14), 2 states have call successors, (14) [2022-02-20 22:07:11,336 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:11,336 INFO L93 Difference]: Finished difference Result 2321 states and 3120 transitions. [2022-02-20 22:07:11,336 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-02-20 22:07:11,336 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 10.88888888888889) internal successors, (98), 5 states have internal predecessors, (98), 2 states have call successors, (15), 6 states have call predecessors, (15), 1 states have return successors, (14), 2 states have call predecessors, (14), 2 states have call successors, (14) Word has length 162 [2022-02-20 22:07:11,337 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 22:07:11,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 10.88888888888889) internal successors, (98), 5 states have internal predecessors, (98), 2 states have call successors, (15), 6 states have call predecessors, (15), 1 states have return successors, (14), 2 states have call predecessors, (14), 2 states have call successors, (14) [2022-02-20 22:07:11,341 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 766 transitions. [2022-02-20 22:07:11,341 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 10.88888888888889) internal successors, (98), 5 states have internal predecessors, (98), 2 states have call successors, (15), 6 states have call predecessors, (15), 1 states have return successors, (14), 2 states have call predecessors, (14), 2 states have call successors, (14) [2022-02-20 22:07:11,344 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 766 transitions. [2022-02-20 22:07:11,345 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 9 states and 766 transitions. [2022-02-20 22:07:11,825 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 766 edges. 766 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:11,908 INFO L225 Difference]: With dead ends: 2321 [2022-02-20 22:07:11,909 INFO L226 Difference]: Without dead ends: 1469 [2022-02-20 22:07:11,910 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 34 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=81, Unknown=0, NotChecked=0, Total=110 [2022-02-20 22:07:11,912 INFO L933 BasicCegarLoop]: 358 mSDtfsCounter, 412 mSDsluCounter, 1231 mSDsCounter, 0 mSdLazyCounter, 402 mSolverCounterSat, 99 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 417 SdHoareTripleChecker+Valid, 1589 SdHoareTripleChecker+Invalid, 501 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 99 IncrementalHoareTripleChecker+Valid, 402 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-02-20 22:07:11,913 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [417 Valid, 1589 Invalid, 501 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [99 Valid, 402 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-02-20 22:07:11,915 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1469 states. [2022-02-20 22:07:11,940 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1469 to 883. [2022-02-20 22:07:11,941 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 22:07:11,942 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1469 states. Second operand has 883 states, 693 states have (on average 1.2698412698412698) internal successors, (880), 701 states have internal predecessors, (880), 134 states have call successors, (134), 56 states have call predecessors, (134), 55 states have return successors, (133), 133 states have call predecessors, (133), 133 states have call successors, (133) [2022-02-20 22:07:11,943 INFO L74 IsIncluded]: Start isIncluded. First operand 1469 states. Second operand has 883 states, 693 states have (on average 1.2698412698412698) internal successors, (880), 701 states have internal predecessors, (880), 134 states have call successors, (134), 56 states have call predecessors, (134), 55 states have return successors, (133), 133 states have call predecessors, (133), 133 states have call successors, (133) [2022-02-20 22:07:11,944 INFO L87 Difference]: Start difference. First operand 1469 states. Second operand has 883 states, 693 states have (on average 1.2698412698412698) internal successors, (880), 701 states have internal predecessors, (880), 134 states have call successors, (134), 56 states have call predecessors, (134), 55 states have return successors, (133), 133 states have call predecessors, (133), 133 states have call successors, (133) [2022-02-20 22:07:12,006 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:12,007 INFO L93 Difference]: Finished difference Result 1469 states and 2000 transitions. [2022-02-20 22:07:12,007 INFO L276 IsEmpty]: Start isEmpty. Operand 1469 states and 2000 transitions. [2022-02-20 22:07:12,010 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:12,010 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:12,012 INFO L74 IsIncluded]: Start isIncluded. First operand has 883 states, 693 states have (on average 1.2698412698412698) internal successors, (880), 701 states have internal predecessors, (880), 134 states have call successors, (134), 56 states have call predecessors, (134), 55 states have return successors, (133), 133 states have call predecessors, (133), 133 states have call successors, (133) Second operand 1469 states. [2022-02-20 22:07:12,013 INFO L87 Difference]: Start difference. First operand has 883 states, 693 states have (on average 1.2698412698412698) internal successors, (880), 701 states have internal predecessors, (880), 134 states have call successors, (134), 56 states have call predecessors, (134), 55 states have return successors, (133), 133 states have call predecessors, (133), 133 states have call successors, (133) Second operand 1469 states. [2022-02-20 22:07:12,075 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:12,075 INFO L93 Difference]: Finished difference Result 1469 states and 2000 transitions. [2022-02-20 22:07:12,075 INFO L276 IsEmpty]: Start isEmpty. Operand 1469 states and 2000 transitions. [2022-02-20 22:07:12,077 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:12,078 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:12,078 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 22:07:12,078 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 22:07:12,079 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 883 states, 693 states have (on average 1.2698412698412698) internal successors, (880), 701 states have internal predecessors, (880), 134 states have call successors, (134), 56 states have call predecessors, (134), 55 states have return successors, (133), 133 states have call predecessors, (133), 133 states have call successors, (133) [2022-02-20 22:07:12,114 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 883 states to 883 states and 1147 transitions. [2022-02-20 22:07:12,114 INFO L78 Accepts]: Start accepts. Automaton has 883 states and 1147 transitions. Word has length 162 [2022-02-20 22:07:12,114 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 22:07:12,115 INFO L470 AbstractCegarLoop]: Abstraction has 883 states and 1147 transitions. [2022-02-20 22:07:12,115 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 10.88888888888889) internal successors, (98), 5 states have internal predecessors, (98), 2 states have call successors, (15), 6 states have call predecessors, (15), 1 states have return successors, (14), 2 states have call predecessors, (14), 2 states have call successors, (14) [2022-02-20 22:07:12,115 INFO L276 IsEmpty]: Start isEmpty. Operand 883 states and 1147 transitions. [2022-02-20 22:07:12,117 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 165 [2022-02-20 22:07:12,117 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:07:12,118 INFO L514 BasicCegarLoop]: trace histogram [5, 5, 5, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:07:12,118 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2022-02-20 22:07:12,118 INFO L402 AbstractCegarLoop]: === Iteration 10 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:07:12,118 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:07:12,119 INFO L85 PathProgramCache]: Analyzing trace with hash -1067823865, now seen corresponding path program 1 times [2022-02-20 22:07:12,119 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:07:12,119 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1366173370] [2022-02-20 22:07:12,119 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:07:12,119 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:07:12,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:12,255 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 22:07:12,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:12,263 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:12,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:12,267 INFO L290 TraceCheckUtils]: 0: Hoare triple {37773#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {37687#true} is VALID [2022-02-20 22:07:12,267 INFO L290 TraceCheckUtils]: 1: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:12,267 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {37687#true} {37687#true} #547#return; {37687#true} is VALID [2022-02-20 22:07:12,267 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:12,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:12,271 INFO L290 TraceCheckUtils]: 0: Hoare triple {37687#true} ~cond := #in~cond; {37687#true} is VALID [2022-02-20 22:07:12,271 INFO L290 TraceCheckUtils]: 1: Hoare triple {37687#true} assume !(0 == ~cond); {37687#true} is VALID [2022-02-20 22:07:12,271 INFO L290 TraceCheckUtils]: 2: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:12,271 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {37687#true} {37687#true} #549#return; {37687#true} is VALID [2022-02-20 22:07:12,272 INFO L290 TraceCheckUtils]: 0: Hoare triple {37765#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {37687#true} is VALID [2022-02-20 22:07:12,272 INFO L272 TraceCheckUtils]: 1: Hoare triple {37687#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {37773#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:12,272 INFO L290 TraceCheckUtils]: 2: Hoare triple {37773#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {37687#true} is VALID [2022-02-20 22:07:12,273 INFO L290 TraceCheckUtils]: 3: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:12,273 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {37687#true} {37687#true} #547#return; {37687#true} is VALID [2022-02-20 22:07:12,273 INFO L290 TraceCheckUtils]: 5: Hoare triple {37687#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {37687#true} is VALID [2022-02-20 22:07:12,273 INFO L272 TraceCheckUtils]: 6: Hoare triple {37687#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {37687#true} is VALID [2022-02-20 22:07:12,273 INFO L290 TraceCheckUtils]: 7: Hoare triple {37687#true} ~cond := #in~cond; {37687#true} is VALID [2022-02-20 22:07:12,273 INFO L290 TraceCheckUtils]: 8: Hoare triple {37687#true} assume !(0 == ~cond); {37687#true} is VALID [2022-02-20 22:07:12,273 INFO L290 TraceCheckUtils]: 9: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:12,273 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {37687#true} {37687#true} #549#return; {37687#true} is VALID [2022-02-20 22:07:12,274 INFO L290 TraceCheckUtils]: 11: Hoare triple {37687#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {37687#true} is VALID [2022-02-20 22:07:12,274 INFO L290 TraceCheckUtils]: 12: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:12,274 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {37687#true} {37687#true} #553#return; {37687#true} is VALID [2022-02-20 22:07:12,274 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 27 [2022-02-20 22:07:12,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:12,282 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:12,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:12,286 INFO L290 TraceCheckUtils]: 0: Hoare triple {37773#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {37687#true} is VALID [2022-02-20 22:07:12,286 INFO L290 TraceCheckUtils]: 1: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:12,286 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {37687#true} {37687#true} #547#return; {37687#true} is VALID [2022-02-20 22:07:12,286 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:12,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:12,291 INFO L290 TraceCheckUtils]: 0: Hoare triple {37687#true} ~cond := #in~cond; {37687#true} is VALID [2022-02-20 22:07:12,291 INFO L290 TraceCheckUtils]: 1: Hoare triple {37687#true} assume !(0 == ~cond); {37687#true} is VALID [2022-02-20 22:07:12,291 INFO L290 TraceCheckUtils]: 2: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:12,291 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {37687#true} {37687#true} #549#return; {37687#true} is VALID [2022-02-20 22:07:12,291 INFO L290 TraceCheckUtils]: 0: Hoare triple {37765#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {37687#true} is VALID [2022-02-20 22:07:12,292 INFO L272 TraceCheckUtils]: 1: Hoare triple {37687#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {37773#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:12,292 INFO L290 TraceCheckUtils]: 2: Hoare triple {37773#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {37687#true} is VALID [2022-02-20 22:07:12,292 INFO L290 TraceCheckUtils]: 3: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:12,292 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {37687#true} {37687#true} #547#return; {37687#true} is VALID [2022-02-20 22:07:12,293 INFO L290 TraceCheckUtils]: 5: Hoare triple {37687#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {37687#true} is VALID [2022-02-20 22:07:12,293 INFO L272 TraceCheckUtils]: 6: Hoare triple {37687#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {37687#true} is VALID [2022-02-20 22:07:12,293 INFO L290 TraceCheckUtils]: 7: Hoare triple {37687#true} ~cond := #in~cond; {37687#true} is VALID [2022-02-20 22:07:12,293 INFO L290 TraceCheckUtils]: 8: Hoare triple {37687#true} assume !(0 == ~cond); {37687#true} is VALID [2022-02-20 22:07:12,293 INFO L290 TraceCheckUtils]: 9: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:12,293 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {37687#true} {37687#true} #549#return; {37687#true} is VALID [2022-02-20 22:07:12,293 INFO L290 TraceCheckUtils]: 11: Hoare triple {37687#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {37687#true} is VALID [2022-02-20 22:07:12,293 INFO L290 TraceCheckUtils]: 12: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:12,294 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {37687#true} {37703#(= ~ref_cnt~0 0)} #611#return; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,302 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 56 [2022-02-20 22:07:12,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:12,307 INFO L290 TraceCheckUtils]: 0: Hoare triple {37781#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {37687#true} is VALID [2022-02-20 22:07:12,308 INFO L290 TraceCheckUtils]: 1: Hoare triple {37687#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {37687#true} is VALID [2022-02-20 22:07:12,308 INFO L290 TraceCheckUtils]: 2: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:12,308 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {37687#true} {37703#(= ~ref_cnt~0 0)} #555#return; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,308 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 76 [2022-02-20 22:07:12,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:12,312 INFO L290 TraceCheckUtils]: 0: Hoare triple {37687#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {37687#true} is VALID [2022-02-20 22:07:12,313 INFO L290 TraceCheckUtils]: 1: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:12,313 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {37687#true} {37703#(= ~ref_cnt~0 0)} #563#return; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,313 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 82 [2022-02-20 22:07:12,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:12,325 INFO L290 TraceCheckUtils]: 0: Hoare triple {37687#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {37687#true} is VALID [2022-02-20 22:07:12,325 INFO L290 TraceCheckUtils]: 1: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:12,326 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {37687#true} {37703#(= ~ref_cnt~0 0)} #567#return; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,326 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 89 [2022-02-20 22:07:12,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:12,334 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:12,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:12,338 INFO L290 TraceCheckUtils]: 0: Hoare triple {37781#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {37687#true} is VALID [2022-02-20 22:07:12,338 INFO L290 TraceCheckUtils]: 1: Hoare triple {37687#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {37687#true} is VALID [2022-02-20 22:07:12,338 INFO L290 TraceCheckUtils]: 2: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:12,338 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {37687#true} {37687#true} #539#return; {37687#true} is VALID [2022-02-20 22:07:12,338 INFO L290 TraceCheckUtils]: 0: Hoare triple {37781#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {37687#true} is VALID [2022-02-20 22:07:12,339 INFO L272 TraceCheckUtils]: 1: Hoare triple {37687#true} call __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset := ldv_malloc(__kmalloc_~size#1); {37781#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:12,339 INFO L290 TraceCheckUtils]: 2: Hoare triple {37781#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {37687#true} is VALID [2022-02-20 22:07:12,339 INFO L290 TraceCheckUtils]: 3: Hoare triple {37687#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {37687#true} is VALID [2022-02-20 22:07:12,339 INFO L290 TraceCheckUtils]: 4: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:12,339 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {37687#true} {37687#true} #539#return; {37687#true} is VALID [2022-02-20 22:07:12,340 INFO L290 TraceCheckUtils]: 6: Hoare triple {37687#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset; {37687#true} is VALID [2022-02-20 22:07:12,340 INFO L290 TraceCheckUtils]: 7: Hoare triple {37687#true} kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {37687#true} is VALID [2022-02-20 22:07:12,340 INFO L290 TraceCheckUtils]: 8: Hoare triple {37687#true} #t~ret58#1.base, #t~ret58#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret58#1.base, #t~ret58#1.offset;havoc #t~ret58#1.base, #t~ret58#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {37687#true} is VALID [2022-02-20 22:07:12,340 INFO L290 TraceCheckUtils]: 9: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:12,340 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {37687#true} {37703#(= ~ref_cnt~0 0)} #569#return; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,341 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 102 [2022-02-20 22:07:12,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:12,346 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:12,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:12,360 INFO L290 TraceCheckUtils]: 0: Hoare triple {37781#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {37687#true} is VALID [2022-02-20 22:07:12,361 INFO L290 TraceCheckUtils]: 1: Hoare triple {37687#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {37687#true} is VALID [2022-02-20 22:07:12,361 INFO L290 TraceCheckUtils]: 2: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:12,361 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {37687#true} {37687#true} #539#return; {37687#true} is VALID [2022-02-20 22:07:12,361 INFO L290 TraceCheckUtils]: 0: Hoare triple {37781#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {37687#true} is VALID [2022-02-20 22:07:12,362 INFO L272 TraceCheckUtils]: 1: Hoare triple {37687#true} call __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset := ldv_malloc(__kmalloc_~size#1); {37781#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:12,362 INFO L290 TraceCheckUtils]: 2: Hoare triple {37781#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {37687#true} is VALID [2022-02-20 22:07:12,362 INFO L290 TraceCheckUtils]: 3: Hoare triple {37687#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {37687#true} is VALID [2022-02-20 22:07:12,362 INFO L290 TraceCheckUtils]: 4: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:12,362 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {37687#true} {37687#true} #539#return; {37687#true} is VALID [2022-02-20 22:07:12,362 INFO L290 TraceCheckUtils]: 6: Hoare triple {37687#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset; {37687#true} is VALID [2022-02-20 22:07:12,362 INFO L290 TraceCheckUtils]: 7: Hoare triple {37687#true} kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {37687#true} is VALID [2022-02-20 22:07:12,362 INFO L290 TraceCheckUtils]: 8: Hoare triple {37687#true} #t~ret58#1.base, #t~ret58#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret58#1.base, #t~ret58#1.offset;havoc #t~ret58#1.base, #t~ret58#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {37687#true} is VALID [2022-02-20 22:07:12,363 INFO L290 TraceCheckUtils]: 9: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:12,363 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {37687#true} {37703#(= ~ref_cnt~0 0)} #571#return; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,363 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 117 [2022-02-20 22:07:12,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:12,369 INFO L290 TraceCheckUtils]: 0: Hoare triple {37781#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {37687#true} is VALID [2022-02-20 22:07:12,370 INFO L290 TraceCheckUtils]: 1: Hoare triple {37687#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {37687#true} is VALID [2022-02-20 22:07:12,370 INFO L290 TraceCheckUtils]: 2: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:12,370 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {37687#true} {37703#(= ~ref_cnt~0 0)} #573#return; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,370 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 125 [2022-02-20 22:07:12,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:12,375 INFO L290 TraceCheckUtils]: 0: Hoare triple {37781#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {37687#true} is VALID [2022-02-20 22:07:12,375 INFO L290 TraceCheckUtils]: 1: Hoare triple {37687#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {37687#true} is VALID [2022-02-20 22:07:12,376 INFO L290 TraceCheckUtils]: 2: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:12,376 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {37687#true} {37703#(= ~ref_cnt~0 0)} #575#return; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,376 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 137 [2022-02-20 22:07:12,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:12,381 INFO L290 TraceCheckUtils]: 0: Hoare triple {37687#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1 := #in~arg1;~arg2.base, ~arg2.offset := #in~arg2.base, #in~arg2.offset;~arg3 := #in~arg3; {37687#true} is VALID [2022-02-20 22:07:12,381 INFO L290 TraceCheckUtils]: 1: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:12,381 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {37687#true} {37703#(= ~ref_cnt~0 0)} #603#return; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,385 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 144 [2022-02-20 22:07:12,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:12,390 INFO L290 TraceCheckUtils]: 0: Hoare triple {37790#(= |old(#valid)| |#valid|)} ~p.base, ~p.offset := #in~p.base, #in~p.offset;call ULTIMATE.dealloc(~p.base, ~p.offset); {37687#true} is VALID [2022-02-20 22:07:12,390 INFO L290 TraceCheckUtils]: 1: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:12,391 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {37687#true} {37703#(= ~ref_cnt~0 0)} #605#return; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,391 INFO L290 TraceCheckUtils]: 0: Hoare triple {37687#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(99, 2);call #Ultimate.allocInit(10, 3);call #Ultimate.allocInit(7, 4);call write~init~int(97, 4, 0, 1);call write~init~int(99, 4, 1, 1);call write~init~int(101, 4, 2, 1);call write~init~int(99, 4, 3, 1);call write~init~int(97, 4, 4, 1);call write~init~int(100, 4, 5, 1);call write~init~int(0, 4, 6, 1);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(20, 6);call #Ultimate.allocInit(57, 7);call #Ultimate.allocInit(2, 8);call write~init~int(32, 8, 0, 1);call write~init~int(0, 8, 1, 1);call #Ultimate.allocInit(8, 9);call #Ultimate.allocInit(34, 10);call #Ultimate.allocInit(32, 11);call #Ultimate.allocInit(11, 12);call #Ultimate.allocInit(48, 13);~LDV_IN_INTERRUPT~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset := 14, 0;call #Ultimate.allocInit(72, 14);call write~init~int(3, ~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 2 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(4, ~#usb_acecad_id_table~0.base, 4 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 6 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 8 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 10 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 11 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 12 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 13 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 14 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 15 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 16 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(3, ~#usb_acecad_id_table~0.base, 24 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 26 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(8, ~#usb_acecad_id_table~0.base, 28 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 30 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 32 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 34 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 35 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 36 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 37 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 38 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 39 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(1, ~#usb_acecad_id_table~0.base, 40 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(0, ~#usb_acecad_id_table~0.base, 48 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 50 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 52 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 54 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 56 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 58 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 59 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 60 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 61 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 62 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 63 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 64 + ~#usb_acecad_id_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.driver_info := 0;~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset := 15, 0;call #Ultimate.allocInit(264, 15);call write~init~$Pointer$(12, 0, ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_probe.base, #funAddr~usb_acecad_probe.offset, ~#usb_acecad_driver~0.base, 8 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_disconnect.base, #funAddr~usb_acecad_disconnect.offset, ~#usb_acecad_driver~0.base, 16 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 24 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 32 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 40 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 48 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 56 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 64 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, ~#usb_acecad_driver~0.base, 72 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 80 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 84 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 88 + ~#usb_acecad_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 92 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 100 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 108 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 116 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 124 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 132 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 136 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 144 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 152 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 160 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 168 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 176 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 184 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 192 + ~#usb_acecad_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 193 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 201 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 209 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 217 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 225 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 233 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 241 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 249 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 257 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 261 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 262 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 263 + ~#usb_acecad_driver~0.offset, 1);~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~URB_STATE~0 := 0;~DEV_STATE~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~int_urb~0.base, ~int_urb~0.offset := 0, 0;~bulk_urb~0.base, ~bulk_urb~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {37687#true} is VALID [2022-02-20 22:07:12,391 INFO L290 TraceCheckUtils]: 1: Hoare triple {37687#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret186#1.base, main_#t~ret186#1.offset, main_#t~nondet187#1, main_#t~switch188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~ret191#1, main_#t~nondet192#1, main_#t~switch193#1, main_#t~ret194#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~17#1.base, main_~tmp~17#1.offset, main_~tmp___0~6#1, main_~tmp___1~3#1, main_~tmp___2~1#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~17#1.base, main_~tmp~17#1.offset;havoc main_~tmp___0~6#1;havoc main_~tmp___1~3#1;havoc main_~tmp___2~1#1; {37687#true} is VALID [2022-02-20 22:07:12,391 INFO L272 TraceCheckUtils]: 2: Hoare triple {37687#true} call main_#t~ret186#1.base, main_#t~ret186#1.offset := ldv_init_zalloc(24); {37765#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:12,392 INFO L290 TraceCheckUtils]: 3: Hoare triple {37765#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {37687#true} is VALID [2022-02-20 22:07:12,392 INFO L272 TraceCheckUtils]: 4: Hoare triple {37687#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {37773#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:12,392 INFO L290 TraceCheckUtils]: 5: Hoare triple {37773#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {37687#true} is VALID [2022-02-20 22:07:12,392 INFO L290 TraceCheckUtils]: 6: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:12,392 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {37687#true} {37687#true} #547#return; {37687#true} is VALID [2022-02-20 22:07:12,393 INFO L290 TraceCheckUtils]: 8: Hoare triple {37687#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {37687#true} is VALID [2022-02-20 22:07:12,393 INFO L272 TraceCheckUtils]: 9: Hoare triple {37687#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {37687#true} is VALID [2022-02-20 22:07:12,393 INFO L290 TraceCheckUtils]: 10: Hoare triple {37687#true} ~cond := #in~cond; {37687#true} is VALID [2022-02-20 22:07:12,393 INFO L290 TraceCheckUtils]: 11: Hoare triple {37687#true} assume !(0 == ~cond); {37687#true} is VALID [2022-02-20 22:07:12,393 INFO L290 TraceCheckUtils]: 12: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:12,393 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {37687#true} {37687#true} #549#return; {37687#true} is VALID [2022-02-20 22:07:12,393 INFO L290 TraceCheckUtils]: 14: Hoare triple {37687#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {37687#true} is VALID [2022-02-20 22:07:12,393 INFO L290 TraceCheckUtils]: 15: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:12,394 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {37687#true} {37687#true} #553#return; {37687#true} is VALID [2022-02-20 22:07:12,394 INFO L290 TraceCheckUtils]: 17: Hoare triple {37687#true} main_~tmp~17#1.base, main_~tmp~17#1.offset := main_#t~ret186#1.base, main_#t~ret186#1.offset;havoc main_#t~ret186#1.base, main_#t~ret186#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~17#1.base, main_~tmp~17#1.offset;assume { :begin_inline_ldv_initialize } true; {37687#true} is VALID [2022-02-20 22:07:12,394 INFO L290 TraceCheckUtils]: 18: Hoare triple {37687#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,394 INFO L290 TraceCheckUtils]: 19: Hoare triple {37703#(= ~ref_cnt~0 0)} assume -2147483648 <= main_#t~nondet187#1 && main_#t~nondet187#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet187#1;havoc main_#t~nondet187#1;main_#t~switch188#1 := 0 == main_~tmp___0~6#1; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,395 INFO L290 TraceCheckUtils]: 20: Hoare triple {37703#(= ~ref_cnt~0 0)} assume !main_#t~switch188#1;main_#t~switch188#1 := main_#t~switch188#1 || 1 == main_~tmp___0~6#1; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,395 INFO L290 TraceCheckUtils]: 21: Hoare triple {37703#(= ~ref_cnt~0 0)} assume main_#t~switch188#1; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,395 INFO L290 TraceCheckUtils]: 22: Hoare triple {37703#(= ~ref_cnt~0 0)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet192#1 && main_#t~nondet192#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet192#1;havoc main_#t~nondet192#1;main_#t~switch193#1 := 0 == main_~tmp___2~1#1; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,395 INFO L290 TraceCheckUtils]: 23: Hoare triple {37703#(= ~ref_cnt~0 0)} assume !main_#t~switch193#1;main_#t~switch193#1 := main_#t~switch193#1 || 1 == main_~tmp___2~1#1; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,396 INFO L290 TraceCheckUtils]: 24: Hoare triple {37703#(= ~ref_cnt~0 0)} assume main_#t~switch193#1; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,396 INFO L290 TraceCheckUtils]: 25: Hoare triple {37703#(= ~ref_cnt~0 0)} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_usb_acecad_init } true;havoc usb_acecad_init_#res#1;havoc usb_acecad_init_#t~ret183#1, usb_acecad_init_#t~nondet184#1, usb_acecad_init_~result~0#1, usb_acecad_init_~tmp~15#1;havoc usb_acecad_init_~result~0#1;havoc usb_acecad_init_~tmp~15#1;assume { :begin_inline_usb_register } true;usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc usb_register_#res#1;havoc usb_register_#t~ret31#1, usb_register_~driver#1.base, usb_register_~driver#1.offset, usb_register_~tmp~1#1;usb_register_~driver#1.base, usb_register_~driver#1.offset := usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset;havoc usb_register_~tmp~1#1;assume { :begin_inline_ldv_usb_register_driver_2 } true;ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset := usb_register_~driver#1.base, usb_register_~driver#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 4, 0;havoc ldv_usb_register_driver_2_#res#1;havoc ldv_usb_register_driver_2_#t~ret196#1, ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset, ldv_usb_register_driver_2_~ldv_func_res~0#1, ldv_usb_register_driver_2_~tmp~19#1;ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_2_~ldv_func_res~0#1;havoc ldv_usb_register_driver_2_~tmp~19#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet217#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet217#1 && usb_register_driver_#t~nondet217#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet217#1;havoc usb_register_driver_#t~nondet217#1; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,396 INFO L290 TraceCheckUtils]: 26: Hoare triple {37703#(= ~ref_cnt~0 0)} ldv_usb_register_driver_2_#t~ret196#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_2_#t~ret196#1 && ldv_usb_register_driver_2_#t~ret196#1 <= 2147483647;ldv_usb_register_driver_2_~tmp~19#1 := ldv_usb_register_driver_2_#t~ret196#1;havoc ldv_usb_register_driver_2_#t~ret196#1;ldv_usb_register_driver_2_~ldv_func_res~0#1 := ldv_usb_register_driver_2_~tmp~19#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset, ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset;havoc ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,397 INFO L272 TraceCheckUtils]: 27: Hoare triple {37703#(= ~ref_cnt~0 0)} call ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset := ldv_init_zalloc(1248); {37765#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:12,397 INFO L290 TraceCheckUtils]: 28: Hoare triple {37765#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {37687#true} is VALID [2022-02-20 22:07:12,397 INFO L272 TraceCheckUtils]: 29: Hoare triple {37687#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {37773#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:12,397 INFO L290 TraceCheckUtils]: 30: Hoare triple {37773#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {37687#true} is VALID [2022-02-20 22:07:12,398 INFO L290 TraceCheckUtils]: 31: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:12,398 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {37687#true} {37687#true} #547#return; {37687#true} is VALID [2022-02-20 22:07:12,398 INFO L290 TraceCheckUtils]: 33: Hoare triple {37687#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {37687#true} is VALID [2022-02-20 22:07:12,398 INFO L272 TraceCheckUtils]: 34: Hoare triple {37687#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {37687#true} is VALID [2022-02-20 22:07:12,398 INFO L290 TraceCheckUtils]: 35: Hoare triple {37687#true} ~cond := #in~cond; {37687#true} is VALID [2022-02-20 22:07:12,398 INFO L290 TraceCheckUtils]: 36: Hoare triple {37687#true} assume !(0 == ~cond); {37687#true} is VALID [2022-02-20 22:07:12,398 INFO L290 TraceCheckUtils]: 37: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:12,398 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {37687#true} {37687#true} #549#return; {37687#true} is VALID [2022-02-20 22:07:12,399 INFO L290 TraceCheckUtils]: 39: Hoare triple {37687#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {37687#true} is VALID [2022-02-20 22:07:12,399 INFO L290 TraceCheckUtils]: 40: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:12,399 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {37687#true} {37703#(= ~ref_cnt~0 0)} #611#return; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,399 INFO L290 TraceCheckUtils]: 42: Hoare triple {37703#(= ~ref_cnt~0 0)} ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset := ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset;havoc ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,400 INFO L290 TraceCheckUtils]: 43: Hoare triple {37703#(= ~ref_cnt~0 0)} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_2_#res#1 := ldv_usb_register_driver_2_~ldv_func_res~0#1; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,400 INFO L290 TraceCheckUtils]: 44: Hoare triple {37703#(= ~ref_cnt~0 0)} usb_register_#t~ret31#1 := ldv_usb_register_driver_2_#res#1;assume { :end_inline_ldv_usb_register_driver_2 } true;assume -2147483648 <= usb_register_#t~ret31#1 && usb_register_#t~ret31#1 <= 2147483647;usb_register_~tmp~1#1 := usb_register_#t~ret31#1;havoc usb_register_#t~ret31#1;usb_register_#res#1 := usb_register_~tmp~1#1; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,400 INFO L290 TraceCheckUtils]: 45: Hoare triple {37703#(= ~ref_cnt~0 0)} usb_acecad_init_#t~ret183#1 := usb_register_#res#1;assume { :end_inline_usb_register } true;assume -2147483648 <= usb_acecad_init_#t~ret183#1 && usb_acecad_init_#t~ret183#1 <= 2147483647;usb_acecad_init_~tmp~15#1 := usb_acecad_init_#t~ret183#1;havoc usb_acecad_init_#t~ret183#1;usb_acecad_init_~result~0#1 := usb_acecad_init_~tmp~15#1; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,401 INFO L290 TraceCheckUtils]: 46: Hoare triple {37703#(= ~ref_cnt~0 0)} assume 0 == usb_acecad_init_~result~0#1;havoc usb_acecad_init_#t~nondet184#1; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,401 INFO L290 TraceCheckUtils]: 47: Hoare triple {37703#(= ~ref_cnt~0 0)} usb_acecad_init_#res#1 := usb_acecad_init_~result~0#1; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,401 INFO L290 TraceCheckUtils]: 48: Hoare triple {37703#(= ~ref_cnt~0 0)} main_#t~ret194#1 := usb_acecad_init_#res#1;assume { :end_inline_usb_acecad_init } true;assume -2147483648 <= main_#t~ret194#1 && main_#t~ret194#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret194#1;havoc main_#t~ret194#1; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,401 INFO L290 TraceCheckUtils]: 49: Hoare triple {37703#(= ~ref_cnt~0 0)} assume 0 == ~ldv_retval_1~0;~ldv_state_variable_0~0 := 3; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,402 INFO L290 TraceCheckUtils]: 50: Hoare triple {37703#(= ~ref_cnt~0 0)} assume !(0 != ~ldv_retval_1~0); {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,402 INFO L290 TraceCheckUtils]: 51: Hoare triple {37703#(= ~ref_cnt~0 0)} assume -2147483648 <= main_#t~nondet187#1 && main_#t~nondet187#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet187#1;havoc main_#t~nondet187#1;main_#t~switch188#1 := 0 == main_~tmp___0~6#1; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,402 INFO L290 TraceCheckUtils]: 52: Hoare triple {37703#(= ~ref_cnt~0 0)} assume main_#t~switch188#1; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,402 INFO L290 TraceCheckUtils]: 53: Hoare triple {37703#(= ~ref_cnt~0 0)} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= main_#t~nondet189#1 && main_#t~nondet189#1 <= 2147483647;main_~tmp___1~3#1 := main_#t~nondet189#1;havoc main_#t~nondet189#1;main_#t~switch190#1 := 0 == main_~tmp___1~3#1; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,403 INFO L290 TraceCheckUtils]: 54: Hoare triple {37703#(= ~ref_cnt~0 0)} assume main_#t~switch190#1; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,403 INFO L290 TraceCheckUtils]: 55: Hoare triple {37703#(= ~ref_cnt~0 0)} assume 1 == ~ldv_state_variable_1~0;assume { :begin_inline_usb_acecad_probe } true;usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset, usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset := ~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc usb_acecad_probe_#res#1;havoc usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset, usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset, usb_acecad_probe_#t~mem132#1, usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset, usb_acecad_probe_#t~ret134#1, usb_acecad_probe_#t~mem135#1, usb_acecad_probe_#t~ret136#1, usb_acecad_probe_#t~ret137#1, usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset, usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset, usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset, usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset, usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset, usb_acecad_probe_#t~mem143#1.base, usb_acecad_probe_#t~mem143#1.offset, usb_acecad_probe_#t~mem144#1.base, usb_acecad_probe_#t~mem144#1.offset, usb_acecad_probe_#t~mem145#1.base, usb_acecad_probe_#t~mem145#1.offset, usb_acecad_probe_#t~ret146#1, usb_acecad_probe_#t~mem147#1.base, usb_acecad_probe_#t~mem147#1.offset, usb_acecad_probe_#t~mem148#1.base, usb_acecad_probe_#t~mem148#1.offset, usb_acecad_probe_#t~ret149#1, usb_acecad_probe_#t~mem150#1.base, usb_acecad_probe_#t~mem150#1.offset, usb_acecad_probe_#t~ret151#1, usb_acecad_probe_#t~ret152#1, usb_acecad_probe_#t~ret153#1, usb_acecad_probe_#t~mem154#1, usb_acecad_probe_#t~switch155#1, usb_acecad_probe_#t~nondet156#1, usb_acecad_probe_#t~nondet157#1, usb_acecad_probe_#t~mem158#1, usb_acecad_probe_#t~mem159#1, usb_acecad_probe_#t~nondet160#1, usb_acecad_probe_#t~nondet161#1, usb_acecad_probe_#t~mem162#1, usb_acecad_probe_#t~mem163#1, usb_acecad_probe_#t~mem164#1.base, usb_acecad_probe_#t~mem164#1.offset, usb_acecad_probe_#t~mem165#1.base, usb_acecad_probe_#t~mem165#1.offset, usb_acecad_probe_#t~ite166#1, usb_acecad_probe_#t~mem167#1, usb_acecad_probe_#t~mem168#1.base, usb_acecad_probe_#t~mem168#1.offset, usb_acecad_probe_#t~mem169#1, usb_acecad_probe_#t~mem170#1.base, usb_acecad_probe_#t~mem170#1.offset, usb_acecad_probe_#t~mem171#1.base, usb_acecad_probe_#t~mem171#1.offset, usb_acecad_probe_#t~mem172#1, usb_acecad_probe_#t~mem173#1.base, usb_acecad_probe_#t~mem173#1.offset, usb_acecad_probe_#t~ret174#1, usb_acecad_probe_#t~mem175#1.base, usb_acecad_probe_#t~mem175#1.offset, usb_acecad_probe_#t~mem176#1, usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset, usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset, usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset, usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset, usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset, usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset, usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset, usb_acecad_probe_~pipe~0#1, usb_acecad_probe_~maxp~0#1, usb_acecad_probe_~err~0#1, usb_acecad_probe_~tmp___0~5#1, usb_acecad_probe_~tmp___1~2#1, usb_acecad_probe_~tmp___2~0#1, usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset, usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~tmp___5~0#1, usb_acecad_probe_~tmp___6~0#1;usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset := usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset;usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset := usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset;havoc usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset;havoc usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;havoc usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset;havoc usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset;havoc usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset;havoc usb_acecad_probe_~pipe~0#1;havoc usb_acecad_probe_~maxp~0#1;havoc usb_acecad_probe_~err~0#1;havoc usb_acecad_probe_~tmp___0~5#1;havoc usb_acecad_probe_~tmp___1~2#1;havoc usb_acecad_probe_~tmp___2~0#1;havoc usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;havoc usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset;havoc usb_acecad_probe_~tmp___5~0#1;havoc usb_acecad_probe_~tmp___6~0#1;assume { :begin_inline_interface_to_usbdev } true;interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset := usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset;havoc interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;havoc interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset, interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset, interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset := interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset;havoc interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;assume { :begin_inline_ldv_interface_to_usbdev } true;havoc ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;havoc ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset, ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset;havoc ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,404 INFO L272 TraceCheckUtils]: 56: Hoare triple {37703#(= ~ref_cnt~0 0)} call ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset := ldv_malloc(1822); {37781#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:12,404 INFO L290 TraceCheckUtils]: 57: Hoare triple {37781#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {37687#true} is VALID [2022-02-20 22:07:12,404 INFO L290 TraceCheckUtils]: 58: Hoare triple {37687#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {37687#true} is VALID [2022-02-20 22:07:12,404 INFO L290 TraceCheckUtils]: 59: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:12,404 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {37687#true} {37703#(= ~ref_cnt~0 0)} #555#return; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,405 INFO L290 TraceCheckUtils]: 61: Hoare triple {37703#(= ~ref_cnt~0 0)} ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset := ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset;havoc ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,405 INFO L290 TraceCheckUtils]: 62: Hoare triple {37703#(= ~ref_cnt~0 0)} assume !(0 == (ldv_interface_to_usbdev_~result~1#1.base + ldv_interface_to_usbdev_~result~1#1.offset) % 18446744073709551616);ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset := ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,405 INFO L290 TraceCheckUtils]: 63: Hoare triple {37703#(= ~ref_cnt~0 0)} interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset := ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;assume { :end_inline_ldv_interface_to_usbdev } true;interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset := interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset;havoc interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset;interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset := interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,405 INFO L290 TraceCheckUtils]: 64: Hoare triple {37703#(= ~ref_cnt~0 0)} usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset := interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;assume { :end_inline_interface_to_usbdev } true;usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset := usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset;havoc usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset;usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset := usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;call usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset := read~$Pointer$(usb_acecad_probe_~intf#1.base, 8 + usb_acecad_probe_~intf#1.offset, 8);usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset := usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset;havoc usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset;call usb_acecad_probe_#t~mem132#1 := read~int(usb_acecad_probe_~interface~0#1.base, 4 + usb_acecad_probe_~interface~0#1.offset, 1); {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,406 INFO L290 TraceCheckUtils]: 65: Hoare triple {37703#(= ~ref_cnt~0 0)} assume !(1 != usb_acecad_probe_#t~mem132#1 % 256 % 4294967296);havoc usb_acecad_probe_#t~mem132#1;call usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset := read~$Pointer$(usb_acecad_probe_~interface~0#1.base, 9 + usb_acecad_probe_~interface~0#1.offset, 8);usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset := usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset;havoc usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset;assume { :begin_inline_usb_endpoint_is_int_in } true;usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset := usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_endpoint_is_int_in_#res#1;havoc usb_endpoint_is_int_in_#t~ret3#1, usb_endpoint_is_int_in_#t~ret4#1, usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset, usb_endpoint_is_int_in_~tmp~0#1, usb_endpoint_is_int_in_~tmp___0~0#1, usb_endpoint_is_int_in_~tmp___1~0#1;usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset := usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset;havoc usb_endpoint_is_int_in_~tmp~0#1;havoc usb_endpoint_is_int_in_~tmp___0~0#1;havoc usb_endpoint_is_int_in_~tmp___1~0#1;assume { :begin_inline_usb_endpoint_xfer_int } true;usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset := usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset;havoc usb_endpoint_xfer_int_#res#1;havoc usb_endpoint_xfer_int_#t~mem2#1, usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset;usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset := usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset;call usb_endpoint_xfer_int_#t~mem2#1 := read~int(usb_endpoint_xfer_int_~epd#1.base, 3 + usb_endpoint_xfer_int_~epd#1.offset, 1);usb_endpoint_xfer_int_#res#1 := (if 3 == (if 0 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 0 else (if 1 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 1 else ~bitwiseAnd(usb_endpoint_xfer_int_#t~mem2#1 % 256, 3))) then 1 else 0);havoc usb_endpoint_xfer_int_#t~mem2#1; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,406 INFO L290 TraceCheckUtils]: 66: Hoare triple {37703#(= ~ref_cnt~0 0)} usb_endpoint_is_int_in_#t~ret3#1 := usb_endpoint_xfer_int_#res#1;assume { :end_inline_usb_endpoint_xfer_int } true;assume -2147483648 <= usb_endpoint_is_int_in_#t~ret3#1 && usb_endpoint_is_int_in_#t~ret3#1 <= 2147483647;usb_endpoint_is_int_in_~tmp~0#1 := usb_endpoint_is_int_in_#t~ret3#1;havoc usb_endpoint_is_int_in_#t~ret3#1; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,406 INFO L290 TraceCheckUtils]: 67: Hoare triple {37703#(= ~ref_cnt~0 0)} assume 0 != usb_endpoint_is_int_in_~tmp~0#1;assume { :begin_inline_usb_endpoint_dir_in } true;usb_endpoint_dir_in_#in~epd#1.base, usb_endpoint_dir_in_#in~epd#1.offset := usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset;havoc usb_endpoint_dir_in_#res#1;havoc usb_endpoint_dir_in_#t~mem1#1, usb_endpoint_dir_in_~epd#1.base, usb_endpoint_dir_in_~epd#1.offset;usb_endpoint_dir_in_~epd#1.base, usb_endpoint_dir_in_~epd#1.offset := usb_endpoint_dir_in_#in~epd#1.base, usb_endpoint_dir_in_#in~epd#1.offset;call usb_endpoint_dir_in_#t~mem1#1 := read~int(usb_endpoint_dir_in_~epd#1.base, 2 + usb_endpoint_dir_in_~epd#1.offset, 1);usb_endpoint_dir_in_#res#1 := (if (if usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 <= 127 then usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 else usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 - 256) < 0 then 1 else 0);havoc usb_endpoint_dir_in_#t~mem1#1; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,407 INFO L290 TraceCheckUtils]: 68: Hoare triple {37703#(= ~ref_cnt~0 0)} usb_endpoint_is_int_in_#t~ret4#1 := usb_endpoint_dir_in_#res#1;assume { :end_inline_usb_endpoint_dir_in } true;assume -2147483648 <= usb_endpoint_is_int_in_#t~ret4#1 && usb_endpoint_is_int_in_#t~ret4#1 <= 2147483647;usb_endpoint_is_int_in_~tmp___0~0#1 := usb_endpoint_is_int_in_#t~ret4#1;havoc usb_endpoint_is_int_in_#t~ret4#1; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,407 INFO L290 TraceCheckUtils]: 69: Hoare triple {37703#(= ~ref_cnt~0 0)} assume 0 != usb_endpoint_is_int_in_~tmp___0~0#1;usb_endpoint_is_int_in_~tmp___1~0#1 := 1; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,407 INFO L290 TraceCheckUtils]: 70: Hoare triple {37703#(= ~ref_cnt~0 0)} usb_endpoint_is_int_in_#res#1 := usb_endpoint_is_int_in_~tmp___1~0#1; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,407 INFO L290 TraceCheckUtils]: 71: Hoare triple {37703#(= ~ref_cnt~0 0)} usb_acecad_probe_#t~ret134#1 := usb_endpoint_is_int_in_#res#1;assume { :end_inline_usb_endpoint_is_int_in } true;assume -2147483648 <= usb_acecad_probe_#t~ret134#1 && usb_acecad_probe_#t~ret134#1 <= 2147483647;usb_acecad_probe_~tmp___0~5#1 := usb_acecad_probe_#t~ret134#1;havoc usb_acecad_probe_#t~ret134#1; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,408 INFO L290 TraceCheckUtils]: 72: Hoare triple {37703#(= ~ref_cnt~0 0)} assume !(0 == usb_acecad_probe_~tmp___0~5#1);call usb_acecad_probe_#t~mem135#1 := read~int(usb_acecad_probe_~endpoint~0#1.base, 2 + usb_acecad_probe_~endpoint~0#1.offset, 1);assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_#t~mem135#1 % 256;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem45#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem45#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := (if (1 == 256 * __create_pipe_#t~mem45#1 || 0 == 256 * __create_pipe_#t~mem45#1) && 0 == 32768 * __create_pipe_~endpoint#1 then 256 * __create_pipe_#t~mem45#1 else (if 0 == 256 * __create_pipe_#t~mem45#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1) then 32768 * __create_pipe_~endpoint#1 else (if (1 == 256 * __create_pipe_#t~mem45#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1)) || ((1 == 256 * __create_pipe_#t~mem45#1 || 0 == 256 * __create_pipe_#t~mem45#1) && 1 == 32768 * __create_pipe_~endpoint#1) then 1 else ~bitwiseOr(256 * __create_pipe_#t~mem45#1, 32768 * __create_pipe_~endpoint#1))));havoc __create_pipe_#t~mem45#1; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,408 INFO L290 TraceCheckUtils]: 73: Hoare triple {37703#(= ~ref_cnt~0 0)} usb_acecad_probe_#t~ret136#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;usb_acecad_probe_~tmp___1~2#1 := usb_acecad_probe_#t~ret136#1;havoc usb_acecad_probe_#t~mem135#1;havoc usb_acecad_probe_#t~ret136#1;usb_acecad_probe_~pipe~0#1 := (if ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 else ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 - 4294967296);assume { :begin_inline_usb_maxpacket } true;usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset, usb_maxpacket_#in~pipe#1, usb_maxpacket_#in~is_out#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~pipe~0#1, (if 0 == (if 0 == usb_acecad_probe_~pipe~0#1 then 0 else (if 1 == usb_acecad_probe_~pipe~0#1 then 0 else ~bitwiseAnd(usb_acecad_probe_~pipe~0#1, 128))) then 1 else 0);havoc usb_maxpacket_#res#1;havoc usb_maxpacket_#t~ret47#1, usb_maxpacket_#t~ret48#1, usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset, usb_maxpacket_#t~ret50#1, usb_maxpacket_#t~ret51#1, usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset, usb_maxpacket_#t~mem53#1, usb_maxpacket_#t~nondet46#1, usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset, usb_maxpacket_~pipe#1, usb_maxpacket_~is_out#1, usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset, usb_maxpacket_~epnum~0#1, usb_maxpacket_~__ret_warn_on~0#1, usb_maxpacket_~tmp~2#1, usb_maxpacket_~__ret_warn_on___0~0#1, usb_maxpacket_~tmp___0~1#1;usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset := usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset;usb_maxpacket_~pipe#1 := usb_maxpacket_#in~pipe#1;usb_maxpacket_~is_out#1 := usb_maxpacket_#in~is_out#1;havoc usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset;havoc usb_maxpacket_~epnum~0#1;havoc usb_maxpacket_~__ret_warn_on~0#1;havoc usb_maxpacket_~tmp~2#1;havoc usb_maxpacket_~__ret_warn_on___0~0#1;havoc usb_maxpacket_~tmp___0~1#1; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,408 INFO L290 TraceCheckUtils]: 74: Hoare triple {37703#(= ~ref_cnt~0 0)} assume 0 == usb_maxpacket_~pipe#1 / 32768;usb_maxpacket_~epnum~0#1 := 0; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,409 INFO L290 TraceCheckUtils]: 75: Hoare triple {37703#(= ~ref_cnt~0 0)} assume !(0 != usb_maxpacket_~is_out#1);usb_maxpacket_~__ret_warn_on___0~0#1 := (if 0 == (if 0 == usb_maxpacket_~pipe#1 then 0 else (if 1 == usb_maxpacket_~pipe#1 then 0 else ~bitwiseAnd(usb_maxpacket_~pipe#1, 128))) then 1 else 0); {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,409 INFO L272 TraceCheckUtils]: 76: Hoare triple {37703#(= ~ref_cnt~0 0)} call usb_maxpacket_#t~ret50#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {37687#true} is VALID [2022-02-20 22:07:12,409 INFO L290 TraceCheckUtils]: 77: Hoare triple {37687#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {37687#true} is VALID [2022-02-20 22:07:12,409 INFO L290 TraceCheckUtils]: 78: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:12,409 INFO L284 TraceCheckUtils]: 79: Hoare quadruple {37687#true} {37703#(= ~ref_cnt~0 0)} #563#return; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,410 INFO L290 TraceCheckUtils]: 80: Hoare triple {37703#(= ~ref_cnt~0 0)} assume -9223372036854775808 <= usb_maxpacket_#t~ret50#1 && usb_maxpacket_#t~ret50#1 <= 9223372036854775807;usb_maxpacket_~tmp___0~1#1 := usb_maxpacket_#t~ret50#1;havoc usb_maxpacket_#t~ret50#1; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,410 INFO L290 TraceCheckUtils]: 81: Hoare triple {37703#(= ~ref_cnt~0 0)} assume !(0 != usb_maxpacket_~tmp___0~1#1); {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,410 INFO L272 TraceCheckUtils]: 82: Hoare triple {37703#(= ~ref_cnt~0 0)} call usb_maxpacket_#t~ret51#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {37687#true} is VALID [2022-02-20 22:07:12,410 INFO L290 TraceCheckUtils]: 83: Hoare triple {37687#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {37687#true} is VALID [2022-02-20 22:07:12,410 INFO L290 TraceCheckUtils]: 84: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:12,411 INFO L284 TraceCheckUtils]: 85: Hoare quadruple {37687#true} {37703#(= ~ref_cnt~0 0)} #567#return; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,411 INFO L290 TraceCheckUtils]: 86: Hoare triple {37703#(= ~ref_cnt~0 0)} assume -9223372036854775808 <= usb_maxpacket_#t~ret51#1 && usb_maxpacket_#t~ret51#1 <= 9223372036854775807;havoc usb_maxpacket_#t~ret51#1;call usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset := read~$Pointer$(usb_maxpacket_~udev#1.base, 1186 + usb_maxpacket_~udev#1.offset + 8 * (usb_maxpacket_~epnum~0#1 % 4294967296), 8);usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset := usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset;havoc usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,411 INFO L290 TraceCheckUtils]: 87: Hoare triple {37703#(= ~ref_cnt~0 0)} assume 0 == (usb_maxpacket_~ep~0#1.base + usb_maxpacket_~ep~0#1.offset) % 18446744073709551616;usb_maxpacket_#res#1 := 0; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,412 INFO L290 TraceCheckUtils]: 88: Hoare triple {37703#(= ~ref_cnt~0 0)} usb_acecad_probe_#t~ret137#1 := usb_maxpacket_#res#1;assume { :end_inline_usb_maxpacket } true;usb_acecad_probe_~tmp___2~0#1 := usb_acecad_probe_#t~ret137#1;havoc usb_acecad_probe_#t~ret137#1;usb_acecad_probe_~maxp~0#1 := usb_acecad_probe_~tmp___2~0#1 % 65536; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,412 INFO L272 TraceCheckUtils]: 89: Hoare triple {37703#(= ~ref_cnt~0 0)} call usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset := kzalloc(232, 208); {37781#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:12,412 INFO L290 TraceCheckUtils]: 90: Hoare triple {37781#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {37687#true} is VALID [2022-02-20 22:07:12,413 INFO L272 TraceCheckUtils]: 91: Hoare triple {37687#true} call __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset := ldv_malloc(__kmalloc_~size#1); {37781#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:12,413 INFO L290 TraceCheckUtils]: 92: Hoare triple {37781#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {37687#true} is VALID [2022-02-20 22:07:12,413 INFO L290 TraceCheckUtils]: 93: Hoare triple {37687#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {37687#true} is VALID [2022-02-20 22:07:12,413 INFO L290 TraceCheckUtils]: 94: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:12,413 INFO L284 TraceCheckUtils]: 95: Hoare quadruple {37687#true} {37687#true} #539#return; {37687#true} is VALID [2022-02-20 22:07:12,413 INFO L290 TraceCheckUtils]: 96: Hoare triple {37687#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset; {37687#true} is VALID [2022-02-20 22:07:12,413 INFO L290 TraceCheckUtils]: 97: Hoare triple {37687#true} kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {37687#true} is VALID [2022-02-20 22:07:12,413 INFO L290 TraceCheckUtils]: 98: Hoare triple {37687#true} #t~ret58#1.base, #t~ret58#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret58#1.base, #t~ret58#1.offset;havoc #t~ret58#1.base, #t~ret58#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {37687#true} is VALID [2022-02-20 22:07:12,414 INFO L290 TraceCheckUtils]: 99: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:12,414 INFO L284 TraceCheckUtils]: 100: Hoare quadruple {37687#true} {37703#(= ~ref_cnt~0 0)} #569#return; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,414 INFO L290 TraceCheckUtils]: 101: Hoare triple {37703#(= ~ref_cnt~0 0)} usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset := usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset;havoc usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset;usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset := usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;assume { :begin_inline_input_allocate_device } true;havoc input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;havoc input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,415 INFO L272 TraceCheckUtils]: 102: Hoare triple {37703#(= ~ref_cnt~0 0)} call input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset := kzalloc(1855, ~bitwiseOr(~bitwiseOr(16, 64), 128)); {37781#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:12,415 INFO L290 TraceCheckUtils]: 103: Hoare triple {37781#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {37687#true} is VALID [2022-02-20 22:07:12,415 INFO L272 TraceCheckUtils]: 104: Hoare triple {37687#true} call __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset := ldv_malloc(__kmalloc_~size#1); {37781#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:12,415 INFO L290 TraceCheckUtils]: 105: Hoare triple {37781#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {37687#true} is VALID [2022-02-20 22:07:12,416 INFO L290 TraceCheckUtils]: 106: Hoare triple {37687#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {37687#true} is VALID [2022-02-20 22:07:12,416 INFO L290 TraceCheckUtils]: 107: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:12,416 INFO L284 TraceCheckUtils]: 108: Hoare quadruple {37687#true} {37687#true} #539#return; {37687#true} is VALID [2022-02-20 22:07:12,416 INFO L290 TraceCheckUtils]: 109: Hoare triple {37687#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset; {37687#true} is VALID [2022-02-20 22:07:12,416 INFO L290 TraceCheckUtils]: 110: Hoare triple {37687#true} kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {37687#true} is VALID [2022-02-20 22:07:12,416 INFO L290 TraceCheckUtils]: 111: Hoare triple {37687#true} #t~ret58#1.base, #t~ret58#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret58#1.base, #t~ret58#1.offset;havoc #t~ret58#1.base, #t~ret58#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {37687#true} is VALID [2022-02-20 22:07:12,416 INFO L290 TraceCheckUtils]: 112: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:12,417 INFO L284 TraceCheckUtils]: 113: Hoare quadruple {37687#true} {37703#(= ~ref_cnt~0 0)} #571#return; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,417 INFO L290 TraceCheckUtils]: 114: Hoare triple {37703#(= ~ref_cnt~0 0)} input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset := input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset;havoc input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,417 INFO L290 TraceCheckUtils]: 115: Hoare triple {37703#(= ~ref_cnt~0 0)} usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset := input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;assume { :end_inline_input_allocate_device } true;usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset := usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset;havoc usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,418 INFO L290 TraceCheckUtils]: 116: Hoare triple {37703#(= ~ref_cnt~0 0)} assume !(0 == (usb_acecad_probe_~acecad~3#1.base + usb_acecad_probe_~acecad~3#1.offset) % 18446744073709551616 || 0 == (usb_acecad_probe_~input_dev~0#1.base + usb_acecad_probe_~input_dev~0#1.offset) % 18446744073709551616);assume { :begin_inline_usb_alloc_coherent } true;usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset, usb_alloc_coherent_#in~arg1#1, usb_alloc_coherent_#in~arg2#1, usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, 8, 208, usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset;havoc usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;havoc usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset, usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset, usb_alloc_coherent_~arg1#1, usb_alloc_coherent_~arg2#1, usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset;usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset := usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset;usb_alloc_coherent_~arg1#1 := usb_alloc_coherent_#in~arg1#1;usb_alloc_coherent_~arg2#1 := usb_alloc_coherent_#in~arg2#1;usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset := usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,418 INFO L272 TraceCheckUtils]: 117: Hoare triple {37703#(= ~ref_cnt~0 0)} call usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset := ldv_malloc(0); {37781#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:12,418 INFO L290 TraceCheckUtils]: 118: Hoare triple {37781#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {37687#true} is VALID [2022-02-20 22:07:12,418 INFO L290 TraceCheckUtils]: 119: Hoare triple {37687#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {37687#true} is VALID [2022-02-20 22:07:12,418 INFO L290 TraceCheckUtils]: 120: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:12,419 INFO L284 TraceCheckUtils]: 121: Hoare quadruple {37687#true} {37703#(= ~ref_cnt~0 0)} #573#return; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,419 INFO L290 TraceCheckUtils]: 122: Hoare triple {37703#(= ~ref_cnt~0 0)} usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset := usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset;havoc usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,419 INFO L290 TraceCheckUtils]: 123: Hoare triple {37703#(= ~ref_cnt~0 0)} usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset := usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;assume { :end_inline_usb_alloc_coherent } true;usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset := usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset;havoc usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset;call write~$Pointer$(usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8); {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,420 INFO L290 TraceCheckUtils]: 124: Hoare triple {37703#(= ~ref_cnt~0 0)} assume !(0 == (usb_acecad_probe_#t~mem141#1.base + usb_acecad_probe_#t~mem141#1.offset) % 18446744073709551616);havoc usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset;assume { :begin_inline_ldv_usb_alloc_urb_5 } true;ldv_usb_alloc_urb_5_#in~ldv_func_arg1#1, ldv_usb_alloc_urb_5_#in~ldv_func_arg2#1 := 0, 208;havoc ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset, ldv_usb_alloc_urb_5_~ldv_func_arg1#1, ldv_usb_alloc_urb_5_~ldv_func_arg2#1, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset, ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;ldv_usb_alloc_urb_5_~ldv_func_arg1#1 := ldv_usb_alloc_urb_5_#in~ldv_func_arg1#1;ldv_usb_alloc_urb_5_~ldv_func_arg2#1 := ldv_usb_alloc_urb_5_#in~ldv_func_arg2#1;havoc ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset;havoc ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;assume { :begin_inline_usb_alloc_urb } true;usb_alloc_urb_#in~arg0#1, usb_alloc_urb_#in~arg1#1 := ldv_usb_alloc_urb_5_~ldv_func_arg1#1, ldv_usb_alloc_urb_5_~ldv_func_arg2#1;havoc usb_alloc_urb_#res#1.base, usb_alloc_urb_#res#1.offset;havoc usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset, usb_alloc_urb_~arg0#1, usb_alloc_urb_~arg1#1;usb_alloc_urb_~arg0#1 := usb_alloc_urb_#in~arg0#1;usb_alloc_urb_~arg1#1 := usb_alloc_urb_#in~arg1#1; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,420 INFO L272 TraceCheckUtils]: 125: Hoare triple {37703#(= ~ref_cnt~0 0)} call usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset := ldv_malloc(180); {37781#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:12,420 INFO L290 TraceCheckUtils]: 126: Hoare triple {37781#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {37687#true} is VALID [2022-02-20 22:07:12,420 INFO L290 TraceCheckUtils]: 127: Hoare triple {37687#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {37687#true} is VALID [2022-02-20 22:07:12,421 INFO L290 TraceCheckUtils]: 128: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:12,421 INFO L284 TraceCheckUtils]: 129: Hoare quadruple {37687#true} {37703#(= ~ref_cnt~0 0)} #575#return; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,421 INFO L290 TraceCheckUtils]: 130: Hoare triple {37703#(= ~ref_cnt~0 0)} usb_alloc_urb_#res#1.base, usb_alloc_urb_#res#1.offset := usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset;havoc usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,422 INFO L290 TraceCheckUtils]: 131: Hoare triple {37703#(= ~ref_cnt~0 0)} ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset := usb_alloc_urb_#res#1.base, usb_alloc_urb_#res#1.offset;assume { :end_inline_usb_alloc_urb } true;ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset := ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset;ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset := ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;assume { :begin_inline_ldv_alloc_urb } true;ldv_alloc_urb_#in~res#1.base, ldv_alloc_urb_#in~res#1.offset := ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset;havoc ldv_alloc_urb_~res#1.base, ldv_alloc_urb_~res#1.offset;ldv_alloc_urb_~res#1.base, ldv_alloc_urb_~res#1.offset := ldv_alloc_urb_#in~res#1.base, ldv_alloc_urb_#in~res#1.offset; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,422 INFO L290 TraceCheckUtils]: 132: Hoare triple {37703#(= ~ref_cnt~0 0)} assume 0 != (ldv_alloc_urb_~res#1.base + ldv_alloc_urb_~res#1.offset) % 18446744073709551616;~URB_STATE~0 := 1 + ~URB_STATE~0; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,422 INFO L290 TraceCheckUtils]: 133: Hoare triple {37703#(= ~ref_cnt~0 0)} assume { :end_inline_ldv_alloc_urb } true;ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset := ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,422 INFO L290 TraceCheckUtils]: 134: Hoare triple {37703#(= ~ref_cnt~0 0)} usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset := ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;assume { :end_inline_ldv_usb_alloc_urb_5 } true;call write~$Pointer$(usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset, usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8);havoc usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset;call usb_acecad_probe_#t~mem143#1.base, usb_acecad_probe_#t~mem143#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8); {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,423 INFO L290 TraceCheckUtils]: 135: Hoare triple {37703#(= ~ref_cnt~0 0)} assume 0 == (usb_acecad_probe_#t~mem143#1.base + usb_acecad_probe_#t~mem143#1.offset) % 18446744073709551616;havoc usb_acecad_probe_#t~mem143#1.base, usb_acecad_probe_#t~mem143#1.offset;usb_acecad_probe_~err~0#1 := -12; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,423 INFO L290 TraceCheckUtils]: 136: Hoare triple {37703#(= ~ref_cnt~0 0)} call usb_acecad_probe_#t~mem175#1.base, usb_acecad_probe_#t~mem175#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem176#1 := read~int(usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset, 8); {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,423 INFO L272 TraceCheckUtils]: 137: Hoare triple {37703#(= ~ref_cnt~0 0)} call usb_free_coherent(usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, 8, usb_acecad_probe_#t~mem175#1.base, usb_acecad_probe_#t~mem175#1.offset, usb_acecad_probe_#t~mem176#1); {37687#true} is VALID [2022-02-20 22:07:12,423 INFO L290 TraceCheckUtils]: 138: Hoare triple {37687#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1 := #in~arg1;~arg2.base, ~arg2.offset := #in~arg2.base, #in~arg2.offset;~arg3 := #in~arg3; {37687#true} is VALID [2022-02-20 22:07:12,423 INFO L290 TraceCheckUtils]: 139: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:12,424 INFO L284 TraceCheckUtils]: 140: Hoare quadruple {37687#true} {37703#(= ~ref_cnt~0 0)} #603#return; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,424 INFO L290 TraceCheckUtils]: 141: Hoare triple {37703#(= ~ref_cnt~0 0)} havoc usb_acecad_probe_#t~mem175#1.base, usb_acecad_probe_#t~mem175#1.offset;havoc usb_acecad_probe_#t~mem176#1; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,424 INFO L290 TraceCheckUtils]: 142: Hoare triple {37703#(= ~ref_cnt~0 0)} assume { :begin_inline_input_free_device } true;input_free_device_#in~arg0#1.base, input_free_device_#in~arg0#1.offset := usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset;havoc input_free_device_~arg0#1.base, input_free_device_~arg0#1.offset;input_free_device_~arg0#1.base, input_free_device_~arg0#1.offset := input_free_device_#in~arg0#1.base, input_free_device_#in~arg0#1.offset; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,425 INFO L290 TraceCheckUtils]: 143: Hoare triple {37703#(= ~ref_cnt~0 0)} assume { :end_inline_input_free_device } true; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,425 INFO L272 TraceCheckUtils]: 144: Hoare triple {37703#(= ~ref_cnt~0 0)} call kfree(usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset); {37790#(= |old(#valid)| |#valid|)} is VALID [2022-02-20 22:07:12,425 INFO L290 TraceCheckUtils]: 145: Hoare triple {37790#(= |old(#valid)| |#valid|)} ~p.base, ~p.offset := #in~p.base, #in~p.offset;call ULTIMATE.dealloc(~p.base, ~p.offset); {37687#true} is VALID [2022-02-20 22:07:12,425 INFO L290 TraceCheckUtils]: 146: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:12,426 INFO L284 TraceCheckUtils]: 147: Hoare quadruple {37687#true} {37703#(= ~ref_cnt~0 0)} #605#return; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,426 INFO L290 TraceCheckUtils]: 148: Hoare triple {37703#(= ~ref_cnt~0 0)} usb_acecad_probe_#res#1 := usb_acecad_probe_~err~0#1; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,426 INFO L290 TraceCheckUtils]: 149: Hoare triple {37703#(= ~ref_cnt~0 0)} main_#t~ret191#1 := usb_acecad_probe_#res#1;assume { :end_inline_usb_acecad_probe } true;assume -2147483648 <= main_#t~ret191#1 && main_#t~ret191#1 <= 2147483647;~ldv_retval_0~0 := main_#t~ret191#1;havoc main_#t~ret191#1; {37703#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:12,427 INFO L290 TraceCheckUtils]: 150: Hoare triple {37703#(= ~ref_cnt~0 0)} assume 0 == ~ldv_retval_0~0;~ldv_state_variable_1~0 := 2;~ref_cnt~0 := 1 + ~ref_cnt~0; {37764#(<= 1 ~ref_cnt~0)} is VALID [2022-02-20 22:07:12,427 INFO L290 TraceCheckUtils]: 151: Hoare triple {37764#(<= 1 ~ref_cnt~0)} assume -2147483648 <= main_#t~nondet187#1 && main_#t~nondet187#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet187#1;havoc main_#t~nondet187#1;main_#t~switch188#1 := 0 == main_~tmp___0~6#1; {37764#(<= 1 ~ref_cnt~0)} is VALID [2022-02-20 22:07:12,427 INFO L290 TraceCheckUtils]: 152: Hoare triple {37764#(<= 1 ~ref_cnt~0)} assume !main_#t~switch188#1;main_#t~switch188#1 := main_#t~switch188#1 || 1 == main_~tmp___0~6#1; {37764#(<= 1 ~ref_cnt~0)} is VALID [2022-02-20 22:07:12,428 INFO L290 TraceCheckUtils]: 153: Hoare triple {37764#(<= 1 ~ref_cnt~0)} assume main_#t~switch188#1; {37764#(<= 1 ~ref_cnt~0)} is VALID [2022-02-20 22:07:12,428 INFO L290 TraceCheckUtils]: 154: Hoare triple {37764#(<= 1 ~ref_cnt~0)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet192#1 && main_#t~nondet192#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet192#1;havoc main_#t~nondet192#1;main_#t~switch193#1 := 0 == main_~tmp___2~1#1; {37764#(<= 1 ~ref_cnt~0)} is VALID [2022-02-20 22:07:12,428 INFO L290 TraceCheckUtils]: 155: Hoare triple {37764#(<= 1 ~ref_cnt~0)} assume main_#t~switch193#1; {37764#(<= 1 ~ref_cnt~0)} is VALID [2022-02-20 22:07:12,429 INFO L290 TraceCheckUtils]: 156: Hoare triple {37764#(<= 1 ~ref_cnt~0)} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0;assume { :begin_inline_usb_acecad_exit } true;assume { :begin_inline_ldv_usb_deregister_11 } true;ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset := ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset;assume { :begin_inline_usb_deregister } true;usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset := ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;havoc usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset;usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset := usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset; {37688#false} is VALID [2022-02-20 22:07:12,429 INFO L290 TraceCheckUtils]: 157: Hoare triple {37688#false} assume { :end_inline_usb_deregister } true;~ldv_state_variable_1~0 := 0; {37688#false} is VALID [2022-02-20 22:07:12,429 INFO L290 TraceCheckUtils]: 158: Hoare triple {37688#false} assume { :end_inline_ldv_usb_deregister_11 } true; {37688#false} is VALID [2022-02-20 22:07:12,429 INFO L290 TraceCheckUtils]: 159: Hoare triple {37688#false} assume { :end_inline_usb_acecad_exit } true;~ldv_state_variable_0~0 := 2; {37688#false} is VALID [2022-02-20 22:07:12,429 INFO L290 TraceCheckUtils]: 160: Hoare triple {37688#false} assume { :begin_inline_ldv_check_final_state } true; {37688#false} is VALID [2022-02-20 22:07:12,429 INFO L290 TraceCheckUtils]: 161: Hoare triple {37688#false} assume 0 != ~URB_STATE~0; {37688#false} is VALID [2022-02-20 22:07:12,429 INFO L272 TraceCheckUtils]: 162: Hoare triple {37688#false} call ldv_error(); {37688#false} is VALID [2022-02-20 22:07:12,429 INFO L290 TraceCheckUtils]: 163: Hoare triple {37688#false} assume !false; {37688#false} is VALID [2022-02-20 22:07:12,430 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2022-02-20 22:07:12,430 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:07:12,430 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1366173370] [2022-02-20 22:07:12,431 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1366173370] provided 0 perfect and 1 imperfect interpolant sequences [2022-02-20 22:07:12,431 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1742250011] [2022-02-20 22:07:12,431 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:07:12,431 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-20 22:07:12,431 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-20 22:07:12,433 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-02-20 22:07:12,436 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-02-20 22:07:12,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:12,714 INFO L263 TraceCheckSpWp]: Trace formula consists of 1317 conjuncts, 4 conjunts are in the unsatisfiable core [2022-02-20 22:07:12,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:12,781 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-02-20 22:07:13,119 INFO L290 TraceCheckUtils]: 0: Hoare triple {37687#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(99, 2);call #Ultimate.allocInit(10, 3);call #Ultimate.allocInit(7, 4);call write~init~int(97, 4, 0, 1);call write~init~int(99, 4, 1, 1);call write~init~int(101, 4, 2, 1);call write~init~int(99, 4, 3, 1);call write~init~int(97, 4, 4, 1);call write~init~int(100, 4, 5, 1);call write~init~int(0, 4, 6, 1);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(20, 6);call #Ultimate.allocInit(57, 7);call #Ultimate.allocInit(2, 8);call write~init~int(32, 8, 0, 1);call write~init~int(0, 8, 1, 1);call #Ultimate.allocInit(8, 9);call #Ultimate.allocInit(34, 10);call #Ultimate.allocInit(32, 11);call #Ultimate.allocInit(11, 12);call #Ultimate.allocInit(48, 13);~LDV_IN_INTERRUPT~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset := 14, 0;call #Ultimate.allocInit(72, 14);call write~init~int(3, ~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 2 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(4, ~#usb_acecad_id_table~0.base, 4 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 6 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 8 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 10 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 11 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 12 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 13 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 14 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 15 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 16 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(3, ~#usb_acecad_id_table~0.base, 24 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 26 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(8, ~#usb_acecad_id_table~0.base, 28 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 30 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 32 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 34 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 35 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 36 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 37 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 38 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 39 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(1, ~#usb_acecad_id_table~0.base, 40 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(0, ~#usb_acecad_id_table~0.base, 48 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 50 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 52 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 54 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 56 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 58 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 59 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 60 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 61 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 62 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 63 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 64 + ~#usb_acecad_id_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.driver_info := 0;~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset := 15, 0;call #Ultimate.allocInit(264, 15);call write~init~$Pointer$(12, 0, ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_probe.base, #funAddr~usb_acecad_probe.offset, ~#usb_acecad_driver~0.base, 8 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_disconnect.base, #funAddr~usb_acecad_disconnect.offset, ~#usb_acecad_driver~0.base, 16 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 24 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 32 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 40 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 48 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 56 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 64 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, ~#usb_acecad_driver~0.base, 72 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 80 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 84 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 88 + ~#usb_acecad_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 92 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 100 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 108 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 116 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 124 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 132 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 136 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 144 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 152 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 160 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 168 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 176 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 184 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 192 + ~#usb_acecad_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 193 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 201 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 209 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 217 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 225 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 233 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 241 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 249 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 257 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 261 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 262 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 263 + ~#usb_acecad_driver~0.offset, 1);~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~URB_STATE~0 := 0;~DEV_STATE~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~int_urb~0.base, ~int_urb~0.offset := 0, 0;~bulk_urb~0.base, ~bulk_urb~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {37687#true} is VALID [2022-02-20 22:07:13,119 INFO L290 TraceCheckUtils]: 1: Hoare triple {37687#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret186#1.base, main_#t~ret186#1.offset, main_#t~nondet187#1, main_#t~switch188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~ret191#1, main_#t~nondet192#1, main_#t~switch193#1, main_#t~ret194#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~17#1.base, main_~tmp~17#1.offset, main_~tmp___0~6#1, main_~tmp___1~3#1, main_~tmp___2~1#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~17#1.base, main_~tmp~17#1.offset;havoc main_~tmp___0~6#1;havoc main_~tmp___1~3#1;havoc main_~tmp___2~1#1; {37687#true} is VALID [2022-02-20 22:07:13,120 INFO L272 TraceCheckUtils]: 2: Hoare triple {37687#true} call main_#t~ret186#1.base, main_#t~ret186#1.offset := ldv_init_zalloc(24); {37687#true} is VALID [2022-02-20 22:07:13,120 INFO L290 TraceCheckUtils]: 3: Hoare triple {37687#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {37687#true} is VALID [2022-02-20 22:07:13,120 INFO L272 TraceCheckUtils]: 4: Hoare triple {37687#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {37687#true} is VALID [2022-02-20 22:07:13,120 INFO L290 TraceCheckUtils]: 5: Hoare triple {37687#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {37687#true} is VALID [2022-02-20 22:07:13,120 INFO L290 TraceCheckUtils]: 6: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:13,120 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {37687#true} {37687#true} #547#return; {37687#true} is VALID [2022-02-20 22:07:13,120 INFO L290 TraceCheckUtils]: 8: Hoare triple {37687#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {37687#true} is VALID [2022-02-20 22:07:13,120 INFO L272 TraceCheckUtils]: 9: Hoare triple {37687#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {37687#true} is VALID [2022-02-20 22:07:13,121 INFO L290 TraceCheckUtils]: 10: Hoare triple {37687#true} ~cond := #in~cond; {37687#true} is VALID [2022-02-20 22:07:13,121 INFO L290 TraceCheckUtils]: 11: Hoare triple {37687#true} assume !(0 == ~cond); {37687#true} is VALID [2022-02-20 22:07:13,121 INFO L290 TraceCheckUtils]: 12: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:13,121 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {37687#true} {37687#true} #549#return; {37687#true} is VALID [2022-02-20 22:07:13,121 INFO L290 TraceCheckUtils]: 14: Hoare triple {37687#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {37687#true} is VALID [2022-02-20 22:07:13,121 INFO L290 TraceCheckUtils]: 15: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:13,121 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {37687#true} {37687#true} #553#return; {37687#true} is VALID [2022-02-20 22:07:13,121 INFO L290 TraceCheckUtils]: 17: Hoare triple {37687#true} main_~tmp~17#1.base, main_~tmp~17#1.offset := main_#t~ret186#1.base, main_#t~ret186#1.offset;havoc main_#t~ret186#1.base, main_#t~ret186#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~17#1.base, main_~tmp~17#1.offset;assume { :begin_inline_ldv_initialize } true; {37687#true} is VALID [2022-02-20 22:07:13,122 INFO L290 TraceCheckUtils]: 18: Hoare triple {37687#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1; {37687#true} is VALID [2022-02-20 22:07:13,122 INFO L290 TraceCheckUtils]: 19: Hoare triple {37687#true} assume -2147483648 <= main_#t~nondet187#1 && main_#t~nondet187#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet187#1;havoc main_#t~nondet187#1;main_#t~switch188#1 := 0 == main_~tmp___0~6#1; {37687#true} is VALID [2022-02-20 22:07:13,122 INFO L290 TraceCheckUtils]: 20: Hoare triple {37687#true} assume !main_#t~switch188#1;main_#t~switch188#1 := main_#t~switch188#1 || 1 == main_~tmp___0~6#1; {37687#true} is VALID [2022-02-20 22:07:13,122 INFO L290 TraceCheckUtils]: 21: Hoare triple {37687#true} assume main_#t~switch188#1; {37687#true} is VALID [2022-02-20 22:07:13,122 INFO L290 TraceCheckUtils]: 22: Hoare triple {37687#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet192#1 && main_#t~nondet192#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet192#1;havoc main_#t~nondet192#1;main_#t~switch193#1 := 0 == main_~tmp___2~1#1; {37687#true} is VALID [2022-02-20 22:07:13,122 INFO L290 TraceCheckUtils]: 23: Hoare triple {37687#true} assume !main_#t~switch193#1;main_#t~switch193#1 := main_#t~switch193#1 || 1 == main_~tmp___2~1#1; {37687#true} is VALID [2022-02-20 22:07:13,122 INFO L290 TraceCheckUtils]: 24: Hoare triple {37687#true} assume main_#t~switch193#1; {37687#true} is VALID [2022-02-20 22:07:13,122 INFO L290 TraceCheckUtils]: 25: Hoare triple {37687#true} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_usb_acecad_init } true;havoc usb_acecad_init_#res#1;havoc usb_acecad_init_#t~ret183#1, usb_acecad_init_#t~nondet184#1, usb_acecad_init_~result~0#1, usb_acecad_init_~tmp~15#1;havoc usb_acecad_init_~result~0#1;havoc usb_acecad_init_~tmp~15#1;assume { :begin_inline_usb_register } true;usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc usb_register_#res#1;havoc usb_register_#t~ret31#1, usb_register_~driver#1.base, usb_register_~driver#1.offset, usb_register_~tmp~1#1;usb_register_~driver#1.base, usb_register_~driver#1.offset := usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset;havoc usb_register_~tmp~1#1;assume { :begin_inline_ldv_usb_register_driver_2 } true;ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset := usb_register_~driver#1.base, usb_register_~driver#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 4, 0;havoc ldv_usb_register_driver_2_#res#1;havoc ldv_usb_register_driver_2_#t~ret196#1, ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset, ldv_usb_register_driver_2_~ldv_func_res~0#1, ldv_usb_register_driver_2_~tmp~19#1;ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_2_~ldv_func_res~0#1;havoc ldv_usb_register_driver_2_~tmp~19#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet217#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet217#1 && usb_register_driver_#t~nondet217#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet217#1;havoc usb_register_driver_#t~nondet217#1; {37687#true} is VALID [2022-02-20 22:07:13,123 INFO L290 TraceCheckUtils]: 26: Hoare triple {37687#true} ldv_usb_register_driver_2_#t~ret196#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_2_#t~ret196#1 && ldv_usb_register_driver_2_#t~ret196#1 <= 2147483647;ldv_usb_register_driver_2_~tmp~19#1 := ldv_usb_register_driver_2_#t~ret196#1;havoc ldv_usb_register_driver_2_#t~ret196#1;ldv_usb_register_driver_2_~ldv_func_res~0#1 := ldv_usb_register_driver_2_~tmp~19#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset, ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset;havoc ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {37687#true} is VALID [2022-02-20 22:07:13,123 INFO L272 TraceCheckUtils]: 27: Hoare triple {37687#true} call ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset := ldv_init_zalloc(1248); {37687#true} is VALID [2022-02-20 22:07:13,123 INFO L290 TraceCheckUtils]: 28: Hoare triple {37687#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {37687#true} is VALID [2022-02-20 22:07:13,123 INFO L272 TraceCheckUtils]: 29: Hoare triple {37687#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {37687#true} is VALID [2022-02-20 22:07:13,123 INFO L290 TraceCheckUtils]: 30: Hoare triple {37687#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {37687#true} is VALID [2022-02-20 22:07:13,123 INFO L290 TraceCheckUtils]: 31: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:13,123 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {37687#true} {37687#true} #547#return; {37687#true} is VALID [2022-02-20 22:07:13,123 INFO L290 TraceCheckUtils]: 33: Hoare triple {37687#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {37687#true} is VALID [2022-02-20 22:07:13,124 INFO L272 TraceCheckUtils]: 34: Hoare triple {37687#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {37687#true} is VALID [2022-02-20 22:07:13,124 INFO L290 TraceCheckUtils]: 35: Hoare triple {37687#true} ~cond := #in~cond; {37687#true} is VALID [2022-02-20 22:07:13,124 INFO L290 TraceCheckUtils]: 36: Hoare triple {37687#true} assume !(0 == ~cond); {37687#true} is VALID [2022-02-20 22:07:13,124 INFO L290 TraceCheckUtils]: 37: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:13,124 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {37687#true} {37687#true} #549#return; {37687#true} is VALID [2022-02-20 22:07:13,124 INFO L290 TraceCheckUtils]: 39: Hoare triple {37687#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {37687#true} is VALID [2022-02-20 22:07:13,124 INFO L290 TraceCheckUtils]: 40: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:13,125 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {37687#true} {37687#true} #611#return; {37687#true} is VALID [2022-02-20 22:07:13,125 INFO L290 TraceCheckUtils]: 42: Hoare triple {37687#true} ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset := ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset;havoc ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {37687#true} is VALID [2022-02-20 22:07:13,125 INFO L290 TraceCheckUtils]: 43: Hoare triple {37687#true} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_2_#res#1 := ldv_usb_register_driver_2_~ldv_func_res~0#1; {37687#true} is VALID [2022-02-20 22:07:13,125 INFO L290 TraceCheckUtils]: 44: Hoare triple {37687#true} usb_register_#t~ret31#1 := ldv_usb_register_driver_2_#res#1;assume { :end_inline_ldv_usb_register_driver_2 } true;assume -2147483648 <= usb_register_#t~ret31#1 && usb_register_#t~ret31#1 <= 2147483647;usb_register_~tmp~1#1 := usb_register_#t~ret31#1;havoc usb_register_#t~ret31#1;usb_register_#res#1 := usb_register_~tmp~1#1; {37687#true} is VALID [2022-02-20 22:07:13,125 INFO L290 TraceCheckUtils]: 45: Hoare triple {37687#true} usb_acecad_init_#t~ret183#1 := usb_register_#res#1;assume { :end_inline_usb_register } true;assume -2147483648 <= usb_acecad_init_#t~ret183#1 && usb_acecad_init_#t~ret183#1 <= 2147483647;usb_acecad_init_~tmp~15#1 := usb_acecad_init_#t~ret183#1;havoc usb_acecad_init_#t~ret183#1;usb_acecad_init_~result~0#1 := usb_acecad_init_~tmp~15#1; {37687#true} is VALID [2022-02-20 22:07:13,125 INFO L290 TraceCheckUtils]: 46: Hoare triple {37687#true} assume 0 == usb_acecad_init_~result~0#1;havoc usb_acecad_init_#t~nondet184#1; {37687#true} is VALID [2022-02-20 22:07:13,125 INFO L290 TraceCheckUtils]: 47: Hoare triple {37687#true} usb_acecad_init_#res#1 := usb_acecad_init_~result~0#1; {37687#true} is VALID [2022-02-20 22:07:13,125 INFO L290 TraceCheckUtils]: 48: Hoare triple {37687#true} main_#t~ret194#1 := usb_acecad_init_#res#1;assume { :end_inline_usb_acecad_init } true;assume -2147483648 <= main_#t~ret194#1 && main_#t~ret194#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret194#1;havoc main_#t~ret194#1; {37687#true} is VALID [2022-02-20 22:07:13,126 INFO L290 TraceCheckUtils]: 49: Hoare triple {37687#true} assume 0 == ~ldv_retval_1~0;~ldv_state_variable_0~0 := 3; {37687#true} is VALID [2022-02-20 22:07:13,126 INFO L290 TraceCheckUtils]: 50: Hoare triple {37687#true} assume !(0 != ~ldv_retval_1~0); {37687#true} is VALID [2022-02-20 22:07:13,126 INFO L290 TraceCheckUtils]: 51: Hoare triple {37687#true} assume -2147483648 <= main_#t~nondet187#1 && main_#t~nondet187#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet187#1;havoc main_#t~nondet187#1;main_#t~switch188#1 := 0 == main_~tmp___0~6#1; {37687#true} is VALID [2022-02-20 22:07:13,126 INFO L290 TraceCheckUtils]: 52: Hoare triple {37687#true} assume main_#t~switch188#1; {37687#true} is VALID [2022-02-20 22:07:13,126 INFO L290 TraceCheckUtils]: 53: Hoare triple {37687#true} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= main_#t~nondet189#1 && main_#t~nondet189#1 <= 2147483647;main_~tmp___1~3#1 := main_#t~nondet189#1;havoc main_#t~nondet189#1;main_#t~switch190#1 := 0 == main_~tmp___1~3#1; {37687#true} is VALID [2022-02-20 22:07:13,126 INFO L290 TraceCheckUtils]: 54: Hoare triple {37687#true} assume main_#t~switch190#1; {37687#true} is VALID [2022-02-20 22:07:13,126 INFO L290 TraceCheckUtils]: 55: Hoare triple {37687#true} assume 1 == ~ldv_state_variable_1~0;assume { :begin_inline_usb_acecad_probe } true;usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset, usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset := ~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc usb_acecad_probe_#res#1;havoc usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset, usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset, usb_acecad_probe_#t~mem132#1, usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset, usb_acecad_probe_#t~ret134#1, usb_acecad_probe_#t~mem135#1, usb_acecad_probe_#t~ret136#1, usb_acecad_probe_#t~ret137#1, usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset, usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset, usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset, usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset, usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset, usb_acecad_probe_#t~mem143#1.base, usb_acecad_probe_#t~mem143#1.offset, usb_acecad_probe_#t~mem144#1.base, usb_acecad_probe_#t~mem144#1.offset, usb_acecad_probe_#t~mem145#1.base, usb_acecad_probe_#t~mem145#1.offset, usb_acecad_probe_#t~ret146#1, usb_acecad_probe_#t~mem147#1.base, usb_acecad_probe_#t~mem147#1.offset, usb_acecad_probe_#t~mem148#1.base, usb_acecad_probe_#t~mem148#1.offset, usb_acecad_probe_#t~ret149#1, usb_acecad_probe_#t~mem150#1.base, usb_acecad_probe_#t~mem150#1.offset, usb_acecad_probe_#t~ret151#1, usb_acecad_probe_#t~ret152#1, usb_acecad_probe_#t~ret153#1, usb_acecad_probe_#t~mem154#1, usb_acecad_probe_#t~switch155#1, usb_acecad_probe_#t~nondet156#1, usb_acecad_probe_#t~nondet157#1, usb_acecad_probe_#t~mem158#1, usb_acecad_probe_#t~mem159#1, usb_acecad_probe_#t~nondet160#1, usb_acecad_probe_#t~nondet161#1, usb_acecad_probe_#t~mem162#1, usb_acecad_probe_#t~mem163#1, usb_acecad_probe_#t~mem164#1.base, usb_acecad_probe_#t~mem164#1.offset, usb_acecad_probe_#t~mem165#1.base, usb_acecad_probe_#t~mem165#1.offset, usb_acecad_probe_#t~ite166#1, usb_acecad_probe_#t~mem167#1, usb_acecad_probe_#t~mem168#1.base, usb_acecad_probe_#t~mem168#1.offset, usb_acecad_probe_#t~mem169#1, usb_acecad_probe_#t~mem170#1.base, usb_acecad_probe_#t~mem170#1.offset, usb_acecad_probe_#t~mem171#1.base, usb_acecad_probe_#t~mem171#1.offset, usb_acecad_probe_#t~mem172#1, usb_acecad_probe_#t~mem173#1.base, usb_acecad_probe_#t~mem173#1.offset, usb_acecad_probe_#t~ret174#1, usb_acecad_probe_#t~mem175#1.base, usb_acecad_probe_#t~mem175#1.offset, usb_acecad_probe_#t~mem176#1, usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset, usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset, usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset, usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset, usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset, usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset, usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset, usb_acecad_probe_~pipe~0#1, usb_acecad_probe_~maxp~0#1, usb_acecad_probe_~err~0#1, usb_acecad_probe_~tmp___0~5#1, usb_acecad_probe_~tmp___1~2#1, usb_acecad_probe_~tmp___2~0#1, usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset, usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~tmp___5~0#1, usb_acecad_probe_~tmp___6~0#1;usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset := usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset;usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset := usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset;havoc usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset;havoc usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;havoc usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset;havoc usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset;havoc usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset;havoc usb_acecad_probe_~pipe~0#1;havoc usb_acecad_probe_~maxp~0#1;havoc usb_acecad_probe_~err~0#1;havoc usb_acecad_probe_~tmp___0~5#1;havoc usb_acecad_probe_~tmp___1~2#1;havoc usb_acecad_probe_~tmp___2~0#1;havoc usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;havoc usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset;havoc usb_acecad_probe_~tmp___5~0#1;havoc usb_acecad_probe_~tmp___6~0#1;assume { :begin_inline_interface_to_usbdev } true;interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset := usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset;havoc interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;havoc interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset, interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset, interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset := interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset;havoc interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;assume { :begin_inline_ldv_interface_to_usbdev } true;havoc ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;havoc ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset, ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset;havoc ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset; {37687#true} is VALID [2022-02-20 22:07:13,126 INFO L272 TraceCheckUtils]: 56: Hoare triple {37687#true} call ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset := ldv_malloc(1822); {37687#true} is VALID [2022-02-20 22:07:13,127 INFO L290 TraceCheckUtils]: 57: Hoare triple {37687#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {37687#true} is VALID [2022-02-20 22:07:13,127 INFO L290 TraceCheckUtils]: 58: Hoare triple {37687#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {37687#true} is VALID [2022-02-20 22:07:13,127 INFO L290 TraceCheckUtils]: 59: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:13,127 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {37687#true} {37687#true} #555#return; {37687#true} is VALID [2022-02-20 22:07:13,127 INFO L290 TraceCheckUtils]: 61: Hoare triple {37687#true} ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset := ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset;havoc ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset; {37687#true} is VALID [2022-02-20 22:07:13,128 INFO L290 TraceCheckUtils]: 62: Hoare triple {37687#true} assume !(0 == (ldv_interface_to_usbdev_~result~1#1.base + ldv_interface_to_usbdev_~result~1#1.offset) % 18446744073709551616);ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset := ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset; {37687#true} is VALID [2022-02-20 22:07:13,128 INFO L290 TraceCheckUtils]: 63: Hoare triple {37687#true} interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset := ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;assume { :end_inline_ldv_interface_to_usbdev } true;interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset := interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset;havoc interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset;interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset := interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset; {37687#true} is VALID [2022-02-20 22:07:13,128 INFO L290 TraceCheckUtils]: 64: Hoare triple {37687#true} usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset := interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;assume { :end_inline_interface_to_usbdev } true;usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset := usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset;havoc usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset;usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset := usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;call usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset := read~$Pointer$(usb_acecad_probe_~intf#1.base, 8 + usb_acecad_probe_~intf#1.offset, 8);usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset := usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset;havoc usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset;call usb_acecad_probe_#t~mem132#1 := read~int(usb_acecad_probe_~interface~0#1.base, 4 + usb_acecad_probe_~interface~0#1.offset, 1); {37687#true} is VALID [2022-02-20 22:07:13,128 INFO L290 TraceCheckUtils]: 65: Hoare triple {37687#true} assume !(1 != usb_acecad_probe_#t~mem132#1 % 256 % 4294967296);havoc usb_acecad_probe_#t~mem132#1;call usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset := read~$Pointer$(usb_acecad_probe_~interface~0#1.base, 9 + usb_acecad_probe_~interface~0#1.offset, 8);usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset := usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset;havoc usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset;assume { :begin_inline_usb_endpoint_is_int_in } true;usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset := usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_endpoint_is_int_in_#res#1;havoc usb_endpoint_is_int_in_#t~ret3#1, usb_endpoint_is_int_in_#t~ret4#1, usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset, usb_endpoint_is_int_in_~tmp~0#1, usb_endpoint_is_int_in_~tmp___0~0#1, usb_endpoint_is_int_in_~tmp___1~0#1;usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset := usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset;havoc usb_endpoint_is_int_in_~tmp~0#1;havoc usb_endpoint_is_int_in_~tmp___0~0#1;havoc usb_endpoint_is_int_in_~tmp___1~0#1;assume { :begin_inline_usb_endpoint_xfer_int } true;usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset := usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset;havoc usb_endpoint_xfer_int_#res#1;havoc usb_endpoint_xfer_int_#t~mem2#1, usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset;usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset := usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset;call usb_endpoint_xfer_int_#t~mem2#1 := read~int(usb_endpoint_xfer_int_~epd#1.base, 3 + usb_endpoint_xfer_int_~epd#1.offset, 1);usb_endpoint_xfer_int_#res#1 := (if 3 == (if 0 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 0 else (if 1 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 1 else ~bitwiseAnd(usb_endpoint_xfer_int_#t~mem2#1 % 256, 3))) then 1 else 0);havoc usb_endpoint_xfer_int_#t~mem2#1; {37687#true} is VALID [2022-02-20 22:07:13,128 INFO L290 TraceCheckUtils]: 66: Hoare triple {37687#true} usb_endpoint_is_int_in_#t~ret3#1 := usb_endpoint_xfer_int_#res#1;assume { :end_inline_usb_endpoint_xfer_int } true;assume -2147483648 <= usb_endpoint_is_int_in_#t~ret3#1 && usb_endpoint_is_int_in_#t~ret3#1 <= 2147483647;usb_endpoint_is_int_in_~tmp~0#1 := usb_endpoint_is_int_in_#t~ret3#1;havoc usb_endpoint_is_int_in_#t~ret3#1; {37687#true} is VALID [2022-02-20 22:07:13,128 INFO L290 TraceCheckUtils]: 67: Hoare triple {37687#true} assume 0 != usb_endpoint_is_int_in_~tmp~0#1;assume { :begin_inline_usb_endpoint_dir_in } true;usb_endpoint_dir_in_#in~epd#1.base, usb_endpoint_dir_in_#in~epd#1.offset := usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset;havoc usb_endpoint_dir_in_#res#1;havoc usb_endpoint_dir_in_#t~mem1#1, usb_endpoint_dir_in_~epd#1.base, usb_endpoint_dir_in_~epd#1.offset;usb_endpoint_dir_in_~epd#1.base, usb_endpoint_dir_in_~epd#1.offset := usb_endpoint_dir_in_#in~epd#1.base, usb_endpoint_dir_in_#in~epd#1.offset;call usb_endpoint_dir_in_#t~mem1#1 := read~int(usb_endpoint_dir_in_~epd#1.base, 2 + usb_endpoint_dir_in_~epd#1.offset, 1);usb_endpoint_dir_in_#res#1 := (if (if usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 <= 127 then usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 else usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 - 256) < 0 then 1 else 0);havoc usb_endpoint_dir_in_#t~mem1#1; {37687#true} is VALID [2022-02-20 22:07:13,128 INFO L290 TraceCheckUtils]: 68: Hoare triple {37687#true} usb_endpoint_is_int_in_#t~ret4#1 := usb_endpoint_dir_in_#res#1;assume { :end_inline_usb_endpoint_dir_in } true;assume -2147483648 <= usb_endpoint_is_int_in_#t~ret4#1 && usb_endpoint_is_int_in_#t~ret4#1 <= 2147483647;usb_endpoint_is_int_in_~tmp___0~0#1 := usb_endpoint_is_int_in_#t~ret4#1;havoc usb_endpoint_is_int_in_#t~ret4#1; {37687#true} is VALID [2022-02-20 22:07:13,129 INFO L290 TraceCheckUtils]: 69: Hoare triple {37687#true} assume 0 != usb_endpoint_is_int_in_~tmp___0~0#1;usb_endpoint_is_int_in_~tmp___1~0#1 := 1; {37687#true} is VALID [2022-02-20 22:07:13,129 INFO L290 TraceCheckUtils]: 70: Hoare triple {37687#true} usb_endpoint_is_int_in_#res#1 := usb_endpoint_is_int_in_~tmp___1~0#1; {37687#true} is VALID [2022-02-20 22:07:13,129 INFO L290 TraceCheckUtils]: 71: Hoare triple {37687#true} usb_acecad_probe_#t~ret134#1 := usb_endpoint_is_int_in_#res#1;assume { :end_inline_usb_endpoint_is_int_in } true;assume -2147483648 <= usb_acecad_probe_#t~ret134#1 && usb_acecad_probe_#t~ret134#1 <= 2147483647;usb_acecad_probe_~tmp___0~5#1 := usb_acecad_probe_#t~ret134#1;havoc usb_acecad_probe_#t~ret134#1; {37687#true} is VALID [2022-02-20 22:07:13,129 INFO L290 TraceCheckUtils]: 72: Hoare triple {37687#true} assume !(0 == usb_acecad_probe_~tmp___0~5#1);call usb_acecad_probe_#t~mem135#1 := read~int(usb_acecad_probe_~endpoint~0#1.base, 2 + usb_acecad_probe_~endpoint~0#1.offset, 1);assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_#t~mem135#1 % 256;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem45#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem45#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := (if (1 == 256 * __create_pipe_#t~mem45#1 || 0 == 256 * __create_pipe_#t~mem45#1) && 0 == 32768 * __create_pipe_~endpoint#1 then 256 * __create_pipe_#t~mem45#1 else (if 0 == 256 * __create_pipe_#t~mem45#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1) then 32768 * __create_pipe_~endpoint#1 else (if (1 == 256 * __create_pipe_#t~mem45#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1)) || ((1 == 256 * __create_pipe_#t~mem45#1 || 0 == 256 * __create_pipe_#t~mem45#1) && 1 == 32768 * __create_pipe_~endpoint#1) then 1 else ~bitwiseOr(256 * __create_pipe_#t~mem45#1, 32768 * __create_pipe_~endpoint#1))));havoc __create_pipe_#t~mem45#1; {37687#true} is VALID [2022-02-20 22:07:13,129 INFO L290 TraceCheckUtils]: 73: Hoare triple {37687#true} usb_acecad_probe_#t~ret136#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;usb_acecad_probe_~tmp___1~2#1 := usb_acecad_probe_#t~ret136#1;havoc usb_acecad_probe_#t~mem135#1;havoc usb_acecad_probe_#t~ret136#1;usb_acecad_probe_~pipe~0#1 := (if ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 else ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 - 4294967296);assume { :begin_inline_usb_maxpacket } true;usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset, usb_maxpacket_#in~pipe#1, usb_maxpacket_#in~is_out#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~pipe~0#1, (if 0 == (if 0 == usb_acecad_probe_~pipe~0#1 then 0 else (if 1 == usb_acecad_probe_~pipe~0#1 then 0 else ~bitwiseAnd(usb_acecad_probe_~pipe~0#1, 128))) then 1 else 0);havoc usb_maxpacket_#res#1;havoc usb_maxpacket_#t~ret47#1, usb_maxpacket_#t~ret48#1, usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset, usb_maxpacket_#t~ret50#1, usb_maxpacket_#t~ret51#1, usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset, usb_maxpacket_#t~mem53#1, usb_maxpacket_#t~nondet46#1, usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset, usb_maxpacket_~pipe#1, usb_maxpacket_~is_out#1, usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset, usb_maxpacket_~epnum~0#1, usb_maxpacket_~__ret_warn_on~0#1, usb_maxpacket_~tmp~2#1, usb_maxpacket_~__ret_warn_on___0~0#1, usb_maxpacket_~tmp___0~1#1;usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset := usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset;usb_maxpacket_~pipe#1 := usb_maxpacket_#in~pipe#1;usb_maxpacket_~is_out#1 := usb_maxpacket_#in~is_out#1;havoc usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset;havoc usb_maxpacket_~epnum~0#1;havoc usb_maxpacket_~__ret_warn_on~0#1;havoc usb_maxpacket_~tmp~2#1;havoc usb_maxpacket_~__ret_warn_on___0~0#1;havoc usb_maxpacket_~tmp___0~1#1; {37687#true} is VALID [2022-02-20 22:07:13,129 INFO L290 TraceCheckUtils]: 74: Hoare triple {37687#true} assume 0 == usb_maxpacket_~pipe#1 / 32768;usb_maxpacket_~epnum~0#1 := 0; {37687#true} is VALID [2022-02-20 22:07:13,129 INFO L290 TraceCheckUtils]: 75: Hoare triple {37687#true} assume !(0 != usb_maxpacket_~is_out#1);usb_maxpacket_~__ret_warn_on___0~0#1 := (if 0 == (if 0 == usb_maxpacket_~pipe#1 then 0 else (if 1 == usb_maxpacket_~pipe#1 then 0 else ~bitwiseAnd(usb_maxpacket_~pipe#1, 128))) then 1 else 0); {37687#true} is VALID [2022-02-20 22:07:13,130 INFO L272 TraceCheckUtils]: 76: Hoare triple {37687#true} call usb_maxpacket_#t~ret50#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {37687#true} is VALID [2022-02-20 22:07:13,130 INFO L290 TraceCheckUtils]: 77: Hoare triple {37687#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {37687#true} is VALID [2022-02-20 22:07:13,130 INFO L290 TraceCheckUtils]: 78: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:13,130 INFO L284 TraceCheckUtils]: 79: Hoare quadruple {37687#true} {37687#true} #563#return; {37687#true} is VALID [2022-02-20 22:07:13,130 INFO L290 TraceCheckUtils]: 80: Hoare triple {37687#true} assume -9223372036854775808 <= usb_maxpacket_#t~ret50#1 && usb_maxpacket_#t~ret50#1 <= 9223372036854775807;usb_maxpacket_~tmp___0~1#1 := usb_maxpacket_#t~ret50#1;havoc usb_maxpacket_#t~ret50#1; {37687#true} is VALID [2022-02-20 22:07:13,130 INFO L290 TraceCheckUtils]: 81: Hoare triple {37687#true} assume !(0 != usb_maxpacket_~tmp___0~1#1); {37687#true} is VALID [2022-02-20 22:07:13,130 INFO L272 TraceCheckUtils]: 82: Hoare triple {37687#true} call usb_maxpacket_#t~ret51#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {37687#true} is VALID [2022-02-20 22:07:13,130 INFO L290 TraceCheckUtils]: 83: Hoare triple {37687#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {37687#true} is VALID [2022-02-20 22:07:13,130 INFO L290 TraceCheckUtils]: 84: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:13,131 INFO L284 TraceCheckUtils]: 85: Hoare quadruple {37687#true} {37687#true} #567#return; {37687#true} is VALID [2022-02-20 22:07:13,131 INFO L290 TraceCheckUtils]: 86: Hoare triple {37687#true} assume -9223372036854775808 <= usb_maxpacket_#t~ret51#1 && usb_maxpacket_#t~ret51#1 <= 9223372036854775807;havoc usb_maxpacket_#t~ret51#1;call usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset := read~$Pointer$(usb_maxpacket_~udev#1.base, 1186 + usb_maxpacket_~udev#1.offset + 8 * (usb_maxpacket_~epnum~0#1 % 4294967296), 8);usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset := usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset;havoc usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset; {37687#true} is VALID [2022-02-20 22:07:13,131 INFO L290 TraceCheckUtils]: 87: Hoare triple {37687#true} assume 0 == (usb_maxpacket_~ep~0#1.base + usb_maxpacket_~ep~0#1.offset) % 18446744073709551616;usb_maxpacket_#res#1 := 0; {37687#true} is VALID [2022-02-20 22:07:13,131 INFO L290 TraceCheckUtils]: 88: Hoare triple {37687#true} usb_acecad_probe_#t~ret137#1 := usb_maxpacket_#res#1;assume { :end_inline_usb_maxpacket } true;usb_acecad_probe_~tmp___2~0#1 := usb_acecad_probe_#t~ret137#1;havoc usb_acecad_probe_#t~ret137#1;usb_acecad_probe_~maxp~0#1 := usb_acecad_probe_~tmp___2~0#1 % 65536; {37687#true} is VALID [2022-02-20 22:07:13,131 INFO L272 TraceCheckUtils]: 89: Hoare triple {37687#true} call usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset := kzalloc(232, 208); {37687#true} is VALID [2022-02-20 22:07:13,131 INFO L290 TraceCheckUtils]: 90: Hoare triple {37687#true} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {37687#true} is VALID [2022-02-20 22:07:13,131 INFO L272 TraceCheckUtils]: 91: Hoare triple {37687#true} call __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset := ldv_malloc(__kmalloc_~size#1); {37687#true} is VALID [2022-02-20 22:07:13,132 INFO L290 TraceCheckUtils]: 92: Hoare triple {37687#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {37687#true} is VALID [2022-02-20 22:07:13,132 INFO L290 TraceCheckUtils]: 93: Hoare triple {37687#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {37687#true} is VALID [2022-02-20 22:07:13,132 INFO L290 TraceCheckUtils]: 94: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:13,132 INFO L284 TraceCheckUtils]: 95: Hoare quadruple {37687#true} {37687#true} #539#return; {37687#true} is VALID [2022-02-20 22:07:13,132 INFO L290 TraceCheckUtils]: 96: Hoare triple {37687#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset; {37687#true} is VALID [2022-02-20 22:07:13,132 INFO L290 TraceCheckUtils]: 97: Hoare triple {37687#true} kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {37687#true} is VALID [2022-02-20 22:07:13,132 INFO L290 TraceCheckUtils]: 98: Hoare triple {37687#true} #t~ret58#1.base, #t~ret58#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret58#1.base, #t~ret58#1.offset;havoc #t~ret58#1.base, #t~ret58#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {37687#true} is VALID [2022-02-20 22:07:13,132 INFO L290 TraceCheckUtils]: 99: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:13,133 INFO L284 TraceCheckUtils]: 100: Hoare quadruple {37687#true} {37687#true} #569#return; {37687#true} is VALID [2022-02-20 22:07:13,133 INFO L290 TraceCheckUtils]: 101: Hoare triple {37687#true} usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset := usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset;havoc usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset;usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset := usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;assume { :begin_inline_input_allocate_device } true;havoc input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;havoc input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset; {37687#true} is VALID [2022-02-20 22:07:13,133 INFO L272 TraceCheckUtils]: 102: Hoare triple {37687#true} call input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset := kzalloc(1855, ~bitwiseOr(~bitwiseOr(16, 64), 128)); {37687#true} is VALID [2022-02-20 22:07:13,133 INFO L290 TraceCheckUtils]: 103: Hoare triple {37687#true} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {37687#true} is VALID [2022-02-20 22:07:13,133 INFO L272 TraceCheckUtils]: 104: Hoare triple {37687#true} call __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset := ldv_malloc(__kmalloc_~size#1); {37687#true} is VALID [2022-02-20 22:07:13,133 INFO L290 TraceCheckUtils]: 105: Hoare triple {37687#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {37687#true} is VALID [2022-02-20 22:07:13,133 INFO L290 TraceCheckUtils]: 106: Hoare triple {37687#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {37687#true} is VALID [2022-02-20 22:07:13,133 INFO L290 TraceCheckUtils]: 107: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:13,134 INFO L284 TraceCheckUtils]: 108: Hoare quadruple {37687#true} {37687#true} #539#return; {37687#true} is VALID [2022-02-20 22:07:13,134 INFO L290 TraceCheckUtils]: 109: Hoare triple {37687#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset; {37687#true} is VALID [2022-02-20 22:07:13,134 INFO L290 TraceCheckUtils]: 110: Hoare triple {37687#true} kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {37687#true} is VALID [2022-02-20 22:07:13,134 INFO L290 TraceCheckUtils]: 111: Hoare triple {37687#true} #t~ret58#1.base, #t~ret58#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret58#1.base, #t~ret58#1.offset;havoc #t~ret58#1.base, #t~ret58#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {37687#true} is VALID [2022-02-20 22:07:13,134 INFO L290 TraceCheckUtils]: 112: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:13,134 INFO L284 TraceCheckUtils]: 113: Hoare quadruple {37687#true} {37687#true} #571#return; {37687#true} is VALID [2022-02-20 22:07:13,134 INFO L290 TraceCheckUtils]: 114: Hoare triple {37687#true} input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset := input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset;havoc input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset; {37687#true} is VALID [2022-02-20 22:07:13,134 INFO L290 TraceCheckUtils]: 115: Hoare triple {37687#true} usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset := input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;assume { :end_inline_input_allocate_device } true;usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset := usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset;havoc usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset; {37687#true} is VALID [2022-02-20 22:07:13,135 INFO L290 TraceCheckUtils]: 116: Hoare triple {37687#true} assume !(0 == (usb_acecad_probe_~acecad~3#1.base + usb_acecad_probe_~acecad~3#1.offset) % 18446744073709551616 || 0 == (usb_acecad_probe_~input_dev~0#1.base + usb_acecad_probe_~input_dev~0#1.offset) % 18446744073709551616);assume { :begin_inline_usb_alloc_coherent } true;usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset, usb_alloc_coherent_#in~arg1#1, usb_alloc_coherent_#in~arg2#1, usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, 8, 208, usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset;havoc usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;havoc usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset, usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset, usb_alloc_coherent_~arg1#1, usb_alloc_coherent_~arg2#1, usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset;usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset := usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset;usb_alloc_coherent_~arg1#1 := usb_alloc_coherent_#in~arg1#1;usb_alloc_coherent_~arg2#1 := usb_alloc_coherent_#in~arg2#1;usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset := usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset; {37687#true} is VALID [2022-02-20 22:07:13,135 INFO L272 TraceCheckUtils]: 117: Hoare triple {37687#true} call usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset := ldv_malloc(0); {37687#true} is VALID [2022-02-20 22:07:13,135 INFO L290 TraceCheckUtils]: 118: Hoare triple {37687#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {37687#true} is VALID [2022-02-20 22:07:13,135 INFO L290 TraceCheckUtils]: 119: Hoare triple {37687#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {37687#true} is VALID [2022-02-20 22:07:13,135 INFO L290 TraceCheckUtils]: 120: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:13,135 INFO L284 TraceCheckUtils]: 121: Hoare quadruple {37687#true} {37687#true} #573#return; {37687#true} is VALID [2022-02-20 22:07:13,135 INFO L290 TraceCheckUtils]: 122: Hoare triple {37687#true} usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset := usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset;havoc usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset; {37687#true} is VALID [2022-02-20 22:07:13,135 INFO L290 TraceCheckUtils]: 123: Hoare triple {37687#true} usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset := usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;assume { :end_inline_usb_alloc_coherent } true;usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset := usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset;havoc usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset;call write~$Pointer$(usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8); {37687#true} is VALID [2022-02-20 22:07:13,136 INFO L290 TraceCheckUtils]: 124: Hoare triple {37687#true} assume !(0 == (usb_acecad_probe_#t~mem141#1.base + usb_acecad_probe_#t~mem141#1.offset) % 18446744073709551616);havoc usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset;assume { :begin_inline_ldv_usb_alloc_urb_5 } true;ldv_usb_alloc_urb_5_#in~ldv_func_arg1#1, ldv_usb_alloc_urb_5_#in~ldv_func_arg2#1 := 0, 208;havoc ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset, ldv_usb_alloc_urb_5_~ldv_func_arg1#1, ldv_usb_alloc_urb_5_~ldv_func_arg2#1, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset, ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;ldv_usb_alloc_urb_5_~ldv_func_arg1#1 := ldv_usb_alloc_urb_5_#in~ldv_func_arg1#1;ldv_usb_alloc_urb_5_~ldv_func_arg2#1 := ldv_usb_alloc_urb_5_#in~ldv_func_arg2#1;havoc ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset;havoc ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;assume { :begin_inline_usb_alloc_urb } true;usb_alloc_urb_#in~arg0#1, usb_alloc_urb_#in~arg1#1 := ldv_usb_alloc_urb_5_~ldv_func_arg1#1, ldv_usb_alloc_urb_5_~ldv_func_arg2#1;havoc usb_alloc_urb_#res#1.base, usb_alloc_urb_#res#1.offset;havoc usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset, usb_alloc_urb_~arg0#1, usb_alloc_urb_~arg1#1;usb_alloc_urb_~arg0#1 := usb_alloc_urb_#in~arg0#1;usb_alloc_urb_~arg1#1 := usb_alloc_urb_#in~arg1#1; {37687#true} is VALID [2022-02-20 22:07:13,136 INFO L272 TraceCheckUtils]: 125: Hoare triple {37687#true} call usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset := ldv_malloc(180); {37687#true} is VALID [2022-02-20 22:07:13,136 INFO L290 TraceCheckUtils]: 126: Hoare triple {37687#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {37687#true} is VALID [2022-02-20 22:07:13,136 INFO L290 TraceCheckUtils]: 127: Hoare triple {37687#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {37687#true} is VALID [2022-02-20 22:07:13,136 INFO L290 TraceCheckUtils]: 128: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:13,136 INFO L284 TraceCheckUtils]: 129: Hoare quadruple {37687#true} {37687#true} #575#return; {37687#true} is VALID [2022-02-20 22:07:13,136 INFO L290 TraceCheckUtils]: 130: Hoare triple {37687#true} usb_alloc_urb_#res#1.base, usb_alloc_urb_#res#1.offset := usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset;havoc usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset; {37687#true} is VALID [2022-02-20 22:07:13,137 INFO L290 TraceCheckUtils]: 131: Hoare triple {37687#true} ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset := usb_alloc_urb_#res#1.base, usb_alloc_urb_#res#1.offset;assume { :end_inline_usb_alloc_urb } true;ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset := ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset;ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset := ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;assume { :begin_inline_ldv_alloc_urb } true;ldv_alloc_urb_#in~res#1.base, ldv_alloc_urb_#in~res#1.offset := ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset;havoc ldv_alloc_urb_~res#1.base, ldv_alloc_urb_~res#1.offset;ldv_alloc_urb_~res#1.base, ldv_alloc_urb_~res#1.offset := ldv_alloc_urb_#in~res#1.base, ldv_alloc_urb_#in~res#1.offset; {37687#true} is VALID [2022-02-20 22:07:13,137 INFO L290 TraceCheckUtils]: 132: Hoare triple {37687#true} assume 0 != (ldv_alloc_urb_~res#1.base + ldv_alloc_urb_~res#1.offset) % 18446744073709551616;~URB_STATE~0 := 1 + ~URB_STATE~0; {37687#true} is VALID [2022-02-20 22:07:13,137 INFO L290 TraceCheckUtils]: 133: Hoare triple {37687#true} assume { :end_inline_ldv_alloc_urb } true;ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset := ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset; {37687#true} is VALID [2022-02-20 22:07:13,137 INFO L290 TraceCheckUtils]: 134: Hoare triple {37687#true} usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset := ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;assume { :end_inline_ldv_usb_alloc_urb_5 } true;call write~$Pointer$(usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset, usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8);havoc usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset;call usb_acecad_probe_#t~mem143#1.base, usb_acecad_probe_#t~mem143#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8); {37687#true} is VALID [2022-02-20 22:07:13,137 INFO L290 TraceCheckUtils]: 135: Hoare triple {37687#true} assume 0 == (usb_acecad_probe_#t~mem143#1.base + usb_acecad_probe_#t~mem143#1.offset) % 18446744073709551616;havoc usb_acecad_probe_#t~mem143#1.base, usb_acecad_probe_#t~mem143#1.offset;usb_acecad_probe_~err~0#1 := -12; {38199#(<= (+ |ULTIMATE.start_usb_acecad_probe_~err~0#1| 12) 0)} is VALID [2022-02-20 22:07:13,138 INFO L290 TraceCheckUtils]: 136: Hoare triple {38199#(<= (+ |ULTIMATE.start_usb_acecad_probe_~err~0#1| 12) 0)} call usb_acecad_probe_#t~mem175#1.base, usb_acecad_probe_#t~mem175#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem176#1 := read~int(usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset, 8); {38199#(<= (+ |ULTIMATE.start_usb_acecad_probe_~err~0#1| 12) 0)} is VALID [2022-02-20 22:07:13,138 INFO L272 TraceCheckUtils]: 137: Hoare triple {38199#(<= (+ |ULTIMATE.start_usb_acecad_probe_~err~0#1| 12) 0)} call usb_free_coherent(usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, 8, usb_acecad_probe_#t~mem175#1.base, usb_acecad_probe_#t~mem175#1.offset, usb_acecad_probe_#t~mem176#1); {37687#true} is VALID [2022-02-20 22:07:13,138 INFO L290 TraceCheckUtils]: 138: Hoare triple {37687#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1 := #in~arg1;~arg2.base, ~arg2.offset := #in~arg2.base, #in~arg2.offset;~arg3 := #in~arg3; {37687#true} is VALID [2022-02-20 22:07:13,138 INFO L290 TraceCheckUtils]: 139: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:13,139 INFO L284 TraceCheckUtils]: 140: Hoare quadruple {37687#true} {38199#(<= (+ |ULTIMATE.start_usb_acecad_probe_~err~0#1| 12) 0)} #603#return; {38199#(<= (+ |ULTIMATE.start_usb_acecad_probe_~err~0#1| 12) 0)} is VALID [2022-02-20 22:07:13,139 INFO L290 TraceCheckUtils]: 141: Hoare triple {38199#(<= (+ |ULTIMATE.start_usb_acecad_probe_~err~0#1| 12) 0)} havoc usb_acecad_probe_#t~mem175#1.base, usb_acecad_probe_#t~mem175#1.offset;havoc usb_acecad_probe_#t~mem176#1; {38199#(<= (+ |ULTIMATE.start_usb_acecad_probe_~err~0#1| 12) 0)} is VALID [2022-02-20 22:07:13,139 INFO L290 TraceCheckUtils]: 142: Hoare triple {38199#(<= (+ |ULTIMATE.start_usb_acecad_probe_~err~0#1| 12) 0)} assume { :begin_inline_input_free_device } true;input_free_device_#in~arg0#1.base, input_free_device_#in~arg0#1.offset := usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset;havoc input_free_device_~arg0#1.base, input_free_device_~arg0#1.offset;input_free_device_~arg0#1.base, input_free_device_~arg0#1.offset := input_free_device_#in~arg0#1.base, input_free_device_#in~arg0#1.offset; {38199#(<= (+ |ULTIMATE.start_usb_acecad_probe_~err~0#1| 12) 0)} is VALID [2022-02-20 22:07:13,140 INFO L290 TraceCheckUtils]: 143: Hoare triple {38199#(<= (+ |ULTIMATE.start_usb_acecad_probe_~err~0#1| 12) 0)} assume { :end_inline_input_free_device } true; {38199#(<= (+ |ULTIMATE.start_usb_acecad_probe_~err~0#1| 12) 0)} is VALID [2022-02-20 22:07:13,140 INFO L272 TraceCheckUtils]: 144: Hoare triple {38199#(<= (+ |ULTIMATE.start_usb_acecad_probe_~err~0#1| 12) 0)} call kfree(usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset); {37687#true} is VALID [2022-02-20 22:07:13,140 INFO L290 TraceCheckUtils]: 145: Hoare triple {37687#true} ~p.base, ~p.offset := #in~p.base, #in~p.offset;call ULTIMATE.dealloc(~p.base, ~p.offset); {37687#true} is VALID [2022-02-20 22:07:13,140 INFO L290 TraceCheckUtils]: 146: Hoare triple {37687#true} assume true; {37687#true} is VALID [2022-02-20 22:07:13,141 INFO L284 TraceCheckUtils]: 147: Hoare quadruple {37687#true} {38199#(<= (+ |ULTIMATE.start_usb_acecad_probe_~err~0#1| 12) 0)} #605#return; {38199#(<= (+ |ULTIMATE.start_usb_acecad_probe_~err~0#1| 12) 0)} is VALID [2022-02-20 22:07:13,141 INFO L290 TraceCheckUtils]: 148: Hoare triple {38199#(<= (+ |ULTIMATE.start_usb_acecad_probe_~err~0#1| 12) 0)} usb_acecad_probe_#res#1 := usb_acecad_probe_~err~0#1; {38239#(<= (+ |ULTIMATE.start_usb_acecad_probe_#res#1| 12) 0)} is VALID [2022-02-20 22:07:13,141 INFO L290 TraceCheckUtils]: 149: Hoare triple {38239#(<= (+ |ULTIMATE.start_usb_acecad_probe_#res#1| 12) 0)} main_#t~ret191#1 := usb_acecad_probe_#res#1;assume { :end_inline_usb_acecad_probe } true;assume -2147483648 <= main_#t~ret191#1 && main_#t~ret191#1 <= 2147483647;~ldv_retval_0~0 := main_#t~ret191#1;havoc main_#t~ret191#1; {38243#(<= (+ ~ldv_retval_0~0 12) 0)} is VALID [2022-02-20 22:07:13,142 INFO L290 TraceCheckUtils]: 150: Hoare triple {38243#(<= (+ ~ldv_retval_0~0 12) 0)} assume 0 == ~ldv_retval_0~0;~ldv_state_variable_1~0 := 2;~ref_cnt~0 := 1 + ~ref_cnt~0; {37688#false} is VALID [2022-02-20 22:07:13,142 INFO L290 TraceCheckUtils]: 151: Hoare triple {37688#false} assume -2147483648 <= main_#t~nondet187#1 && main_#t~nondet187#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet187#1;havoc main_#t~nondet187#1;main_#t~switch188#1 := 0 == main_~tmp___0~6#1; {37688#false} is VALID [2022-02-20 22:07:13,142 INFO L290 TraceCheckUtils]: 152: Hoare triple {37688#false} assume !main_#t~switch188#1;main_#t~switch188#1 := main_#t~switch188#1 || 1 == main_~tmp___0~6#1; {37688#false} is VALID [2022-02-20 22:07:13,142 INFO L290 TraceCheckUtils]: 153: Hoare triple {37688#false} assume main_#t~switch188#1; {37688#false} is VALID [2022-02-20 22:07:13,142 INFO L290 TraceCheckUtils]: 154: Hoare triple {37688#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet192#1 && main_#t~nondet192#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet192#1;havoc main_#t~nondet192#1;main_#t~switch193#1 := 0 == main_~tmp___2~1#1; {37688#false} is VALID [2022-02-20 22:07:13,142 INFO L290 TraceCheckUtils]: 155: Hoare triple {37688#false} assume main_#t~switch193#1; {37688#false} is VALID [2022-02-20 22:07:13,142 INFO L290 TraceCheckUtils]: 156: Hoare triple {37688#false} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0;assume { :begin_inline_usb_acecad_exit } true;assume { :begin_inline_ldv_usb_deregister_11 } true;ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset := ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset;assume { :begin_inline_usb_deregister } true;usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset := ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;havoc usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset;usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset := usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset; {37688#false} is VALID [2022-02-20 22:07:13,143 INFO L290 TraceCheckUtils]: 157: Hoare triple {37688#false} assume { :end_inline_usb_deregister } true;~ldv_state_variable_1~0 := 0; {37688#false} is VALID [2022-02-20 22:07:13,143 INFO L290 TraceCheckUtils]: 158: Hoare triple {37688#false} assume { :end_inline_ldv_usb_deregister_11 } true; {37688#false} is VALID [2022-02-20 22:07:13,143 INFO L290 TraceCheckUtils]: 159: Hoare triple {37688#false} assume { :end_inline_usb_acecad_exit } true;~ldv_state_variable_0~0 := 2; {37688#false} is VALID [2022-02-20 22:07:13,143 INFO L290 TraceCheckUtils]: 160: Hoare triple {37688#false} assume { :begin_inline_ldv_check_final_state } true; {37688#false} is VALID [2022-02-20 22:07:13,143 INFO L290 TraceCheckUtils]: 161: Hoare triple {37688#false} assume 0 != ~URB_STATE~0; {37688#false} is VALID [2022-02-20 22:07:13,143 INFO L272 TraceCheckUtils]: 162: Hoare triple {37688#false} call ldv_error(); {37688#false} is VALID [2022-02-20 22:07:13,143 INFO L290 TraceCheckUtils]: 163: Hoare triple {37688#false} assume !false; {37688#false} is VALID [2022-02-20 22:07:13,144 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2022-02-20 22:07:13,144 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-02-20 22:07:13,144 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1742250011] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:07:13,144 INFO L191 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-02-20 22:07:13,144 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [8] total 11 [2022-02-20 22:07:13,145 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1232735095] [2022-02-20 22:07:13,145 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:07:13,145 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 20.0) internal successors, (100), 5 states have internal predecessors, (100), 3 states have call successors, (15), 2 states have call predecessors, (15), 1 states have return successors, (14), 2 states have call predecessors, (14), 2 states have call successors, (14) Word has length 164 [2022-02-20 22:07:13,146 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:07:13,146 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 20.0) internal successors, (100), 5 states have internal predecessors, (100), 3 states have call successors, (15), 2 states have call predecessors, (15), 1 states have return successors, (14), 2 states have call predecessors, (14), 2 states have call successors, (14) [2022-02-20 22:07:13,225 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 129 edges. 129 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:13,226 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-02-20 22:07:13,226 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:07:13,227 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-02-20 22:07:13,227 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2022-02-20 22:07:13,227 INFO L87 Difference]: Start difference. First operand 883 states and 1147 transitions. Second operand has 5 states, 5 states have (on average 20.0) internal successors, (100), 5 states have internal predecessors, (100), 3 states have call successors, (15), 2 states have call predecessors, (15), 1 states have return successors, (14), 2 states have call predecessors, (14), 2 states have call successors, (14) [2022-02-20 22:07:15,054 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:15,054 INFO L93 Difference]: Finished difference Result 2857 states and 3742 transitions. [2022-02-20 22:07:15,055 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-02-20 22:07:15,055 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 20.0) internal successors, (100), 5 states have internal predecessors, (100), 3 states have call successors, (15), 2 states have call predecessors, (15), 1 states have return successors, (14), 2 states have call predecessors, (14), 2 states have call successors, (14) Word has length 164 [2022-02-20 22:07:15,055 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 22:07:15,055 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 20.0) internal successors, (100), 5 states have internal predecessors, (100), 3 states have call successors, (15), 2 states have call predecessors, (15), 1 states have return successors, (14), 2 states have call predecessors, (14), 2 states have call successors, (14) [2022-02-20 22:07:15,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 925 transitions. [2022-02-20 22:07:15,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 20.0) internal successors, (100), 5 states have internal predecessors, (100), 3 states have call successors, (15), 2 states have call predecessors, (15), 1 states have return successors, (14), 2 states have call predecessors, (14), 2 states have call successors, (14) [2022-02-20 22:07:15,065 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 925 transitions. [2022-02-20 22:07:15,065 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 9 states and 925 transitions. [2022-02-20 22:07:15,639 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 925 edges. 925 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:15,811 INFO L225 Difference]: With dead ends: 2857 [2022-02-20 22:07:15,812 INFO L226 Difference]: Without dead ends: 1993 [2022-02-20 22:07:15,813 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 207 GetRequests, 194 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=167, Unknown=0, NotChecked=0, Total=210 [2022-02-20 22:07:15,814 INFO L933 BasicCegarLoop]: 594 mSDtfsCounter, 401 mSDsluCounter, 1321 mSDsCounter, 0 mSdLazyCounter, 47 mSolverCounterSat, 16 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 401 SdHoareTripleChecker+Valid, 1915 SdHoareTripleChecker+Invalid, 63 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 16 IncrementalHoareTripleChecker+Valid, 47 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-02-20 22:07:15,814 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [401 Valid, 1915 Invalid, 63 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [16 Valid, 47 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-02-20 22:07:15,815 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1993 states. [2022-02-20 22:07:16,031 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1993 to 919. [2022-02-20 22:07:16,031 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 22:07:16,033 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1993 states. Second operand has 919 states, 721 states have (on average 1.259361997226075) internal successors, (908), 729 states have internal predecessors, (908), 142 states have call successors, (142), 56 states have call predecessors, (142), 55 states have return successors, (141), 141 states have call predecessors, (141), 141 states have call successors, (141) [2022-02-20 22:07:16,035 INFO L74 IsIncluded]: Start isIncluded. First operand 1993 states. Second operand has 919 states, 721 states have (on average 1.259361997226075) internal successors, (908), 729 states have internal predecessors, (908), 142 states have call successors, (142), 56 states have call predecessors, (142), 55 states have return successors, (141), 141 states have call predecessors, (141), 141 states have call successors, (141) [2022-02-20 22:07:16,037 INFO L87 Difference]: Start difference. First operand 1993 states. Second operand has 919 states, 721 states have (on average 1.259361997226075) internal successors, (908), 729 states have internal predecessors, (908), 142 states have call successors, (142), 56 states have call predecessors, (142), 55 states have return successors, (141), 141 states have call predecessors, (141), 141 states have call successors, (141) [2022-02-20 22:07:16,158 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:16,158 INFO L93 Difference]: Finished difference Result 1993 states and 2606 transitions. [2022-02-20 22:07:16,159 INFO L276 IsEmpty]: Start isEmpty. Operand 1993 states and 2606 transitions. [2022-02-20 22:07:16,166 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:16,166 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:16,168 INFO L74 IsIncluded]: Start isIncluded. First operand has 919 states, 721 states have (on average 1.259361997226075) internal successors, (908), 729 states have internal predecessors, (908), 142 states have call successors, (142), 56 states have call predecessors, (142), 55 states have return successors, (141), 141 states have call predecessors, (141), 141 states have call successors, (141) Second operand 1993 states. [2022-02-20 22:07:16,168 INFO L87 Difference]: Start difference. First operand has 919 states, 721 states have (on average 1.259361997226075) internal successors, (908), 729 states have internal predecessors, (908), 142 states have call successors, (142), 56 states have call predecessors, (142), 55 states have return successors, (141), 141 states have call predecessors, (141), 141 states have call successors, (141) Second operand 1993 states. [2022-02-20 22:07:16,284 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:16,284 INFO L93 Difference]: Finished difference Result 1993 states and 2606 transitions. [2022-02-20 22:07:16,285 INFO L276 IsEmpty]: Start isEmpty. Operand 1993 states and 2606 transitions. [2022-02-20 22:07:16,288 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:16,288 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:16,288 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 22:07:16,288 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 22:07:16,290 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 919 states, 721 states have (on average 1.259361997226075) internal successors, (908), 729 states have internal predecessors, (908), 142 states have call successors, (142), 56 states have call predecessors, (142), 55 states have return successors, (141), 141 states have call predecessors, (141), 141 states have call successors, (141) [2022-02-20 22:07:16,325 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 919 states to 919 states and 1191 transitions. [2022-02-20 22:07:16,325 INFO L78 Accepts]: Start accepts. Automaton has 919 states and 1191 transitions. Word has length 164 [2022-02-20 22:07:16,326 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 22:07:16,326 INFO L470 AbstractCegarLoop]: Abstraction has 919 states and 1191 transitions. [2022-02-20 22:07:16,326 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 20.0) internal successors, (100), 5 states have internal predecessors, (100), 3 states have call successors, (15), 2 states have call predecessors, (15), 1 states have return successors, (14), 2 states have call predecessors, (14), 2 states have call successors, (14) [2022-02-20 22:07:16,326 INFO L276 IsEmpty]: Start isEmpty. Operand 919 states and 1191 transitions. [2022-02-20 22:07:16,328 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 165 [2022-02-20 22:07:16,328 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:07:16,328 INFO L514 BasicCegarLoop]: trace histogram [5, 5, 5, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:07:16,350 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-02-20 22:07:16,543 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2022-02-20 22:07:16,543 INFO L402 AbstractCegarLoop]: === Iteration 11 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:07:16,544 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:07:16,544 INFO L85 PathProgramCache]: Analyzing trace with hash -2078941115, now seen corresponding path program 1 times [2022-02-20 22:07:16,544 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:07:16,544 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1938826771] [2022-02-20 22:07:16,544 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:07:16,544 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:07:16,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:16,685 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 22:07:16,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:16,695 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:16,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:16,699 INFO L290 TraceCheckUtils]: 0: Hoare triple {47660#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {47574#true} is VALID [2022-02-20 22:07:16,700 INFO L290 TraceCheckUtils]: 1: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:16,700 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {47574#true} {47574#true} #547#return; {47574#true} is VALID [2022-02-20 22:07:16,700 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:16,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:16,703 INFO L290 TraceCheckUtils]: 0: Hoare triple {47574#true} ~cond := #in~cond; {47574#true} is VALID [2022-02-20 22:07:16,703 INFO L290 TraceCheckUtils]: 1: Hoare triple {47574#true} assume !(0 == ~cond); {47574#true} is VALID [2022-02-20 22:07:16,704 INFO L290 TraceCheckUtils]: 2: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:16,704 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {47574#true} {47574#true} #549#return; {47574#true} is VALID [2022-02-20 22:07:16,704 INFO L290 TraceCheckUtils]: 0: Hoare triple {47652#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {47574#true} is VALID [2022-02-20 22:07:16,705 INFO L272 TraceCheckUtils]: 1: Hoare triple {47574#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {47660#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:16,705 INFO L290 TraceCheckUtils]: 2: Hoare triple {47660#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {47574#true} is VALID [2022-02-20 22:07:16,705 INFO L290 TraceCheckUtils]: 3: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:16,705 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {47574#true} {47574#true} #547#return; {47574#true} is VALID [2022-02-20 22:07:16,705 INFO L290 TraceCheckUtils]: 5: Hoare triple {47574#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {47574#true} is VALID [2022-02-20 22:07:16,705 INFO L272 TraceCheckUtils]: 6: Hoare triple {47574#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {47574#true} is VALID [2022-02-20 22:07:16,705 INFO L290 TraceCheckUtils]: 7: Hoare triple {47574#true} ~cond := #in~cond; {47574#true} is VALID [2022-02-20 22:07:16,705 INFO L290 TraceCheckUtils]: 8: Hoare triple {47574#true} assume !(0 == ~cond); {47574#true} is VALID [2022-02-20 22:07:16,706 INFO L290 TraceCheckUtils]: 9: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:16,706 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {47574#true} {47574#true} #549#return; {47574#true} is VALID [2022-02-20 22:07:16,706 INFO L290 TraceCheckUtils]: 11: Hoare triple {47574#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {47574#true} is VALID [2022-02-20 22:07:16,706 INFO L290 TraceCheckUtils]: 12: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:16,706 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {47574#true} {47574#true} #553#return; {47574#true} is VALID [2022-02-20 22:07:16,706 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 27 [2022-02-20 22:07:16,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:16,715 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:16,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:16,719 INFO L290 TraceCheckUtils]: 0: Hoare triple {47660#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {47574#true} is VALID [2022-02-20 22:07:16,719 INFO L290 TraceCheckUtils]: 1: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:16,719 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {47574#true} {47574#true} #547#return; {47574#true} is VALID [2022-02-20 22:07:16,720 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:16,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:16,724 INFO L290 TraceCheckUtils]: 0: Hoare triple {47574#true} ~cond := #in~cond; {47574#true} is VALID [2022-02-20 22:07:16,724 INFO L290 TraceCheckUtils]: 1: Hoare triple {47574#true} assume !(0 == ~cond); {47574#true} is VALID [2022-02-20 22:07:16,724 INFO L290 TraceCheckUtils]: 2: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:16,724 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {47574#true} {47574#true} #549#return; {47574#true} is VALID [2022-02-20 22:07:16,724 INFO L290 TraceCheckUtils]: 0: Hoare triple {47652#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {47574#true} is VALID [2022-02-20 22:07:16,725 INFO L272 TraceCheckUtils]: 1: Hoare triple {47574#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {47660#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:16,725 INFO L290 TraceCheckUtils]: 2: Hoare triple {47660#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {47574#true} is VALID [2022-02-20 22:07:16,725 INFO L290 TraceCheckUtils]: 3: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:16,725 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {47574#true} {47574#true} #547#return; {47574#true} is VALID [2022-02-20 22:07:16,726 INFO L290 TraceCheckUtils]: 5: Hoare triple {47574#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {47574#true} is VALID [2022-02-20 22:07:16,726 INFO L272 TraceCheckUtils]: 6: Hoare triple {47574#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {47574#true} is VALID [2022-02-20 22:07:16,726 INFO L290 TraceCheckUtils]: 7: Hoare triple {47574#true} ~cond := #in~cond; {47574#true} is VALID [2022-02-20 22:07:16,726 INFO L290 TraceCheckUtils]: 8: Hoare triple {47574#true} assume !(0 == ~cond); {47574#true} is VALID [2022-02-20 22:07:16,726 INFO L290 TraceCheckUtils]: 9: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:16,726 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {47574#true} {47574#true} #549#return; {47574#true} is VALID [2022-02-20 22:07:16,726 INFO L290 TraceCheckUtils]: 11: Hoare triple {47574#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {47574#true} is VALID [2022-02-20 22:07:16,726 INFO L290 TraceCheckUtils]: 12: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:16,727 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {47574#true} {47574#true} #611#return; {47574#true} is VALID [2022-02-20 22:07:16,732 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 56 [2022-02-20 22:07:16,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:16,760 INFO L290 TraceCheckUtils]: 0: Hoare triple {47668#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {47574#true} is VALID [2022-02-20 22:07:16,760 INFO L290 TraceCheckUtils]: 1: Hoare triple {47574#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {47669#(and (<= 0 |ldv_malloc_#res.base|) (<= |ldv_malloc_#res.offset| 0) (<= |ldv_malloc_#res.base| 0) (<= 0 |ldv_malloc_#res.offset|))} is VALID [2022-02-20 22:07:16,761 INFO L290 TraceCheckUtils]: 2: Hoare triple {47669#(and (<= 0 |ldv_malloc_#res.base|) (<= |ldv_malloc_#res.offset| 0) (<= |ldv_malloc_#res.base| 0) (<= 0 |ldv_malloc_#res.offset|))} assume true; {47669#(and (<= 0 |ldv_malloc_#res.base|) (<= |ldv_malloc_#res.offset| 0) (<= |ldv_malloc_#res.base| 0) (<= 0 |ldv_malloc_#res.offset|))} is VALID [2022-02-20 22:07:16,761 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {47669#(and (<= 0 |ldv_malloc_#res.base|) (<= |ldv_malloc_#res.offset| 0) (<= |ldv_malloc_#res.base| 0) (<= 0 |ldv_malloc_#res.offset|))} {47574#true} #555#return; {47608#(and (= |ULTIMATE.start_ldv_interface_to_usbdev_#t~ret208#1.offset| 0) (= |ULTIMATE.start_ldv_interface_to_usbdev_#t~ret208#1.base| 0))} is VALID [2022-02-20 22:07:16,762 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 76 [2022-02-20 22:07:16,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:16,766 INFO L290 TraceCheckUtils]: 0: Hoare triple {47574#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {47574#true} is VALID [2022-02-20 22:07:16,767 INFO L290 TraceCheckUtils]: 1: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:16,767 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {47574#true} {47575#false} #563#return; {47575#false} is VALID [2022-02-20 22:07:16,767 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 82 [2022-02-20 22:07:16,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:16,771 INFO L290 TraceCheckUtils]: 0: Hoare triple {47574#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {47574#true} is VALID [2022-02-20 22:07:16,772 INFO L290 TraceCheckUtils]: 1: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:16,772 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {47574#true} {47575#false} #567#return; {47575#false} is VALID [2022-02-20 22:07:16,772 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 89 [2022-02-20 22:07:16,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:16,778 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:16,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:16,782 INFO L290 TraceCheckUtils]: 0: Hoare triple {47668#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {47574#true} is VALID [2022-02-20 22:07:16,782 INFO L290 TraceCheckUtils]: 1: Hoare triple {47574#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {47574#true} is VALID [2022-02-20 22:07:16,782 INFO L290 TraceCheckUtils]: 2: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:16,782 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {47574#true} {47574#true} #539#return; {47574#true} is VALID [2022-02-20 22:07:16,783 INFO L290 TraceCheckUtils]: 0: Hoare triple {47668#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {47574#true} is VALID [2022-02-20 22:07:16,783 INFO L272 TraceCheckUtils]: 1: Hoare triple {47574#true} call __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset := ldv_malloc(__kmalloc_~size#1); {47668#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:16,783 INFO L290 TraceCheckUtils]: 2: Hoare triple {47668#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {47574#true} is VALID [2022-02-20 22:07:16,784 INFO L290 TraceCheckUtils]: 3: Hoare triple {47574#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {47574#true} is VALID [2022-02-20 22:07:16,784 INFO L290 TraceCheckUtils]: 4: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:16,784 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {47574#true} {47574#true} #539#return; {47574#true} is VALID [2022-02-20 22:07:16,784 INFO L290 TraceCheckUtils]: 6: Hoare triple {47574#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset; {47574#true} is VALID [2022-02-20 22:07:16,784 INFO L290 TraceCheckUtils]: 7: Hoare triple {47574#true} kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {47574#true} is VALID [2022-02-20 22:07:16,784 INFO L290 TraceCheckUtils]: 8: Hoare triple {47574#true} #t~ret58#1.base, #t~ret58#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret58#1.base, #t~ret58#1.offset;havoc #t~ret58#1.base, #t~ret58#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {47574#true} is VALID [2022-02-20 22:07:16,784 INFO L290 TraceCheckUtils]: 9: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:16,785 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {47574#true} {47575#false} #569#return; {47575#false} is VALID [2022-02-20 22:07:16,785 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 102 [2022-02-20 22:07:16,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:16,792 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:16,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:16,796 INFO L290 TraceCheckUtils]: 0: Hoare triple {47668#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {47574#true} is VALID [2022-02-20 22:07:16,797 INFO L290 TraceCheckUtils]: 1: Hoare triple {47574#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {47574#true} is VALID [2022-02-20 22:07:16,797 INFO L290 TraceCheckUtils]: 2: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:16,797 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {47574#true} {47574#true} #539#return; {47574#true} is VALID [2022-02-20 22:07:16,797 INFO L290 TraceCheckUtils]: 0: Hoare triple {47668#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {47574#true} is VALID [2022-02-20 22:07:16,798 INFO L272 TraceCheckUtils]: 1: Hoare triple {47574#true} call __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset := ldv_malloc(__kmalloc_~size#1); {47668#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:16,798 INFO L290 TraceCheckUtils]: 2: Hoare triple {47668#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {47574#true} is VALID [2022-02-20 22:07:16,798 INFO L290 TraceCheckUtils]: 3: Hoare triple {47574#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {47574#true} is VALID [2022-02-20 22:07:16,798 INFO L290 TraceCheckUtils]: 4: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:16,798 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {47574#true} {47574#true} #539#return; {47574#true} is VALID [2022-02-20 22:07:16,798 INFO L290 TraceCheckUtils]: 6: Hoare triple {47574#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset; {47574#true} is VALID [2022-02-20 22:07:16,798 INFO L290 TraceCheckUtils]: 7: Hoare triple {47574#true} kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {47574#true} is VALID [2022-02-20 22:07:16,799 INFO L290 TraceCheckUtils]: 8: Hoare triple {47574#true} #t~ret58#1.base, #t~ret58#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret58#1.base, #t~ret58#1.offset;havoc #t~ret58#1.base, #t~ret58#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {47574#true} is VALID [2022-02-20 22:07:16,799 INFO L290 TraceCheckUtils]: 9: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:16,799 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {47574#true} {47575#false} #571#return; {47575#false} is VALID [2022-02-20 22:07:16,800 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 117 [2022-02-20 22:07:16,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:16,804 INFO L290 TraceCheckUtils]: 0: Hoare triple {47668#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {47574#true} is VALID [2022-02-20 22:07:16,805 INFO L290 TraceCheckUtils]: 1: Hoare triple {47574#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {47574#true} is VALID [2022-02-20 22:07:16,805 INFO L290 TraceCheckUtils]: 2: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:16,805 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {47574#true} {47575#false} #573#return; {47575#false} is VALID [2022-02-20 22:07:16,805 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 125 [2022-02-20 22:07:16,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:16,823 INFO L290 TraceCheckUtils]: 0: Hoare triple {47668#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {47574#true} is VALID [2022-02-20 22:07:16,823 INFO L290 TraceCheckUtils]: 1: Hoare triple {47574#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {47574#true} is VALID [2022-02-20 22:07:16,823 INFO L290 TraceCheckUtils]: 2: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:16,823 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {47574#true} {47575#false} #575#return; {47575#false} is VALID [2022-02-20 22:07:16,823 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 137 [2022-02-20 22:07:16,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:16,828 INFO L290 TraceCheckUtils]: 0: Hoare triple {47574#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1 := #in~arg1;~arg2.base, ~arg2.offset := #in~arg2.base, #in~arg2.offset;~arg3 := #in~arg3; {47574#true} is VALID [2022-02-20 22:07:16,828 INFO L290 TraceCheckUtils]: 1: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:16,828 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {47574#true} {47575#false} #603#return; {47575#false} is VALID [2022-02-20 22:07:16,834 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 144 [2022-02-20 22:07:16,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:16,839 INFO L290 TraceCheckUtils]: 0: Hoare triple {47678#(= |old(#valid)| |#valid|)} ~p.base, ~p.offset := #in~p.base, #in~p.offset;call ULTIMATE.dealloc(~p.base, ~p.offset); {47574#true} is VALID [2022-02-20 22:07:16,839 INFO L290 TraceCheckUtils]: 1: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:16,840 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {47574#true} {47575#false} #605#return; {47575#false} is VALID [2022-02-20 22:07:16,840 INFO L290 TraceCheckUtils]: 0: Hoare triple {47574#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(99, 2);call #Ultimate.allocInit(10, 3);call #Ultimate.allocInit(7, 4);call write~init~int(97, 4, 0, 1);call write~init~int(99, 4, 1, 1);call write~init~int(101, 4, 2, 1);call write~init~int(99, 4, 3, 1);call write~init~int(97, 4, 4, 1);call write~init~int(100, 4, 5, 1);call write~init~int(0, 4, 6, 1);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(20, 6);call #Ultimate.allocInit(57, 7);call #Ultimate.allocInit(2, 8);call write~init~int(32, 8, 0, 1);call write~init~int(0, 8, 1, 1);call #Ultimate.allocInit(8, 9);call #Ultimate.allocInit(34, 10);call #Ultimate.allocInit(32, 11);call #Ultimate.allocInit(11, 12);call #Ultimate.allocInit(48, 13);~LDV_IN_INTERRUPT~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset := 14, 0;call #Ultimate.allocInit(72, 14);call write~init~int(3, ~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 2 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(4, ~#usb_acecad_id_table~0.base, 4 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 6 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 8 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 10 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 11 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 12 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 13 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 14 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 15 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 16 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(3, ~#usb_acecad_id_table~0.base, 24 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 26 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(8, ~#usb_acecad_id_table~0.base, 28 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 30 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 32 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 34 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 35 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 36 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 37 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 38 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 39 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(1, ~#usb_acecad_id_table~0.base, 40 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(0, ~#usb_acecad_id_table~0.base, 48 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 50 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 52 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 54 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 56 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 58 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 59 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 60 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 61 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 62 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 63 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 64 + ~#usb_acecad_id_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.driver_info := 0;~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset := 15, 0;call #Ultimate.allocInit(264, 15);call write~init~$Pointer$(12, 0, ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_probe.base, #funAddr~usb_acecad_probe.offset, ~#usb_acecad_driver~0.base, 8 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_disconnect.base, #funAddr~usb_acecad_disconnect.offset, ~#usb_acecad_driver~0.base, 16 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 24 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 32 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 40 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 48 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 56 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 64 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, ~#usb_acecad_driver~0.base, 72 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 80 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 84 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 88 + ~#usb_acecad_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 92 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 100 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 108 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 116 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 124 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 132 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 136 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 144 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 152 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 160 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 168 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 176 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 184 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 192 + ~#usb_acecad_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 193 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 201 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 209 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 217 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 225 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 233 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 241 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 249 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 257 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 261 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 262 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 263 + ~#usb_acecad_driver~0.offset, 1);~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~URB_STATE~0 := 0;~DEV_STATE~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~int_urb~0.base, ~int_urb~0.offset := 0, 0;~bulk_urb~0.base, ~bulk_urb~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {47574#true} is VALID [2022-02-20 22:07:16,840 INFO L290 TraceCheckUtils]: 1: Hoare triple {47574#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret186#1.base, main_#t~ret186#1.offset, main_#t~nondet187#1, main_#t~switch188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~ret191#1, main_#t~nondet192#1, main_#t~switch193#1, main_#t~ret194#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~17#1.base, main_~tmp~17#1.offset, main_~tmp___0~6#1, main_~tmp___1~3#1, main_~tmp___2~1#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~17#1.base, main_~tmp~17#1.offset;havoc main_~tmp___0~6#1;havoc main_~tmp___1~3#1;havoc main_~tmp___2~1#1; {47574#true} is VALID [2022-02-20 22:07:16,841 INFO L272 TraceCheckUtils]: 2: Hoare triple {47574#true} call main_#t~ret186#1.base, main_#t~ret186#1.offset := ldv_init_zalloc(24); {47652#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:16,841 INFO L290 TraceCheckUtils]: 3: Hoare triple {47652#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {47574#true} is VALID [2022-02-20 22:07:16,842 INFO L272 TraceCheckUtils]: 4: Hoare triple {47574#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {47660#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:16,842 INFO L290 TraceCheckUtils]: 5: Hoare triple {47660#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {47574#true} is VALID [2022-02-20 22:07:16,842 INFO L290 TraceCheckUtils]: 6: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:16,842 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {47574#true} {47574#true} #547#return; {47574#true} is VALID [2022-02-20 22:07:16,842 INFO L290 TraceCheckUtils]: 8: Hoare triple {47574#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {47574#true} is VALID [2022-02-20 22:07:16,843 INFO L272 TraceCheckUtils]: 9: Hoare triple {47574#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {47574#true} is VALID [2022-02-20 22:07:16,843 INFO L290 TraceCheckUtils]: 10: Hoare triple {47574#true} ~cond := #in~cond; {47574#true} is VALID [2022-02-20 22:07:16,843 INFO L290 TraceCheckUtils]: 11: Hoare triple {47574#true} assume !(0 == ~cond); {47574#true} is VALID [2022-02-20 22:07:16,843 INFO L290 TraceCheckUtils]: 12: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:16,843 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {47574#true} {47574#true} #549#return; {47574#true} is VALID [2022-02-20 22:07:16,843 INFO L290 TraceCheckUtils]: 14: Hoare triple {47574#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {47574#true} is VALID [2022-02-20 22:07:16,843 INFO L290 TraceCheckUtils]: 15: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:16,843 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {47574#true} {47574#true} #553#return; {47574#true} is VALID [2022-02-20 22:07:16,844 INFO L290 TraceCheckUtils]: 17: Hoare triple {47574#true} main_~tmp~17#1.base, main_~tmp~17#1.offset := main_#t~ret186#1.base, main_#t~ret186#1.offset;havoc main_#t~ret186#1.base, main_#t~ret186#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~17#1.base, main_~tmp~17#1.offset;assume { :begin_inline_ldv_initialize } true; {47574#true} is VALID [2022-02-20 22:07:16,844 INFO L290 TraceCheckUtils]: 18: Hoare triple {47574#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1; {47574#true} is VALID [2022-02-20 22:07:16,844 INFO L290 TraceCheckUtils]: 19: Hoare triple {47574#true} assume -2147483648 <= main_#t~nondet187#1 && main_#t~nondet187#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet187#1;havoc main_#t~nondet187#1;main_#t~switch188#1 := 0 == main_~tmp___0~6#1; {47574#true} is VALID [2022-02-20 22:07:16,844 INFO L290 TraceCheckUtils]: 20: Hoare triple {47574#true} assume !main_#t~switch188#1;main_#t~switch188#1 := main_#t~switch188#1 || 1 == main_~tmp___0~6#1; {47574#true} is VALID [2022-02-20 22:07:16,844 INFO L290 TraceCheckUtils]: 21: Hoare triple {47574#true} assume main_#t~switch188#1; {47574#true} is VALID [2022-02-20 22:07:16,844 INFO L290 TraceCheckUtils]: 22: Hoare triple {47574#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet192#1 && main_#t~nondet192#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet192#1;havoc main_#t~nondet192#1;main_#t~switch193#1 := 0 == main_~tmp___2~1#1; {47574#true} is VALID [2022-02-20 22:07:16,844 INFO L290 TraceCheckUtils]: 23: Hoare triple {47574#true} assume !main_#t~switch193#1;main_#t~switch193#1 := main_#t~switch193#1 || 1 == main_~tmp___2~1#1; {47574#true} is VALID [2022-02-20 22:07:16,844 INFO L290 TraceCheckUtils]: 24: Hoare triple {47574#true} assume main_#t~switch193#1; {47574#true} is VALID [2022-02-20 22:07:16,845 INFO L290 TraceCheckUtils]: 25: Hoare triple {47574#true} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_usb_acecad_init } true;havoc usb_acecad_init_#res#1;havoc usb_acecad_init_#t~ret183#1, usb_acecad_init_#t~nondet184#1, usb_acecad_init_~result~0#1, usb_acecad_init_~tmp~15#1;havoc usb_acecad_init_~result~0#1;havoc usb_acecad_init_~tmp~15#1;assume { :begin_inline_usb_register } true;usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc usb_register_#res#1;havoc usb_register_#t~ret31#1, usb_register_~driver#1.base, usb_register_~driver#1.offset, usb_register_~tmp~1#1;usb_register_~driver#1.base, usb_register_~driver#1.offset := usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset;havoc usb_register_~tmp~1#1;assume { :begin_inline_ldv_usb_register_driver_2 } true;ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset := usb_register_~driver#1.base, usb_register_~driver#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 4, 0;havoc ldv_usb_register_driver_2_#res#1;havoc ldv_usb_register_driver_2_#t~ret196#1, ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset, ldv_usb_register_driver_2_~ldv_func_res~0#1, ldv_usb_register_driver_2_~tmp~19#1;ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_2_~ldv_func_res~0#1;havoc ldv_usb_register_driver_2_~tmp~19#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet217#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet217#1 && usb_register_driver_#t~nondet217#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet217#1;havoc usb_register_driver_#t~nondet217#1; {47574#true} is VALID [2022-02-20 22:07:16,845 INFO L290 TraceCheckUtils]: 26: Hoare triple {47574#true} ldv_usb_register_driver_2_#t~ret196#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_2_#t~ret196#1 && ldv_usb_register_driver_2_#t~ret196#1 <= 2147483647;ldv_usb_register_driver_2_~tmp~19#1 := ldv_usb_register_driver_2_#t~ret196#1;havoc ldv_usb_register_driver_2_#t~ret196#1;ldv_usb_register_driver_2_~ldv_func_res~0#1 := ldv_usb_register_driver_2_~tmp~19#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset, ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset;havoc ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {47574#true} is VALID [2022-02-20 22:07:16,845 INFO L272 TraceCheckUtils]: 27: Hoare triple {47574#true} call ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset := ldv_init_zalloc(1248); {47652#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:16,846 INFO L290 TraceCheckUtils]: 28: Hoare triple {47652#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {47574#true} is VALID [2022-02-20 22:07:16,846 INFO L272 TraceCheckUtils]: 29: Hoare triple {47574#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {47660#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:16,847 INFO L290 TraceCheckUtils]: 30: Hoare triple {47660#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {47574#true} is VALID [2022-02-20 22:07:16,847 INFO L290 TraceCheckUtils]: 31: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:16,847 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {47574#true} {47574#true} #547#return; {47574#true} is VALID [2022-02-20 22:07:16,847 INFO L290 TraceCheckUtils]: 33: Hoare triple {47574#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {47574#true} is VALID [2022-02-20 22:07:16,847 INFO L272 TraceCheckUtils]: 34: Hoare triple {47574#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {47574#true} is VALID [2022-02-20 22:07:16,847 INFO L290 TraceCheckUtils]: 35: Hoare triple {47574#true} ~cond := #in~cond; {47574#true} is VALID [2022-02-20 22:07:16,847 INFO L290 TraceCheckUtils]: 36: Hoare triple {47574#true} assume !(0 == ~cond); {47574#true} is VALID [2022-02-20 22:07:16,847 INFO L290 TraceCheckUtils]: 37: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:16,848 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {47574#true} {47574#true} #549#return; {47574#true} is VALID [2022-02-20 22:07:16,848 INFO L290 TraceCheckUtils]: 39: Hoare triple {47574#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {47574#true} is VALID [2022-02-20 22:07:16,848 INFO L290 TraceCheckUtils]: 40: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:16,848 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {47574#true} {47574#true} #611#return; {47574#true} is VALID [2022-02-20 22:07:16,848 INFO L290 TraceCheckUtils]: 42: Hoare triple {47574#true} ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset := ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset;havoc ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {47574#true} is VALID [2022-02-20 22:07:16,848 INFO L290 TraceCheckUtils]: 43: Hoare triple {47574#true} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_2_#res#1 := ldv_usb_register_driver_2_~ldv_func_res~0#1; {47574#true} is VALID [2022-02-20 22:07:16,848 INFO L290 TraceCheckUtils]: 44: Hoare triple {47574#true} usb_register_#t~ret31#1 := ldv_usb_register_driver_2_#res#1;assume { :end_inline_ldv_usb_register_driver_2 } true;assume -2147483648 <= usb_register_#t~ret31#1 && usb_register_#t~ret31#1 <= 2147483647;usb_register_~tmp~1#1 := usb_register_#t~ret31#1;havoc usb_register_#t~ret31#1;usb_register_#res#1 := usb_register_~tmp~1#1; {47574#true} is VALID [2022-02-20 22:07:16,848 INFO L290 TraceCheckUtils]: 45: Hoare triple {47574#true} usb_acecad_init_#t~ret183#1 := usb_register_#res#1;assume { :end_inline_usb_register } true;assume -2147483648 <= usb_acecad_init_#t~ret183#1 && usb_acecad_init_#t~ret183#1 <= 2147483647;usb_acecad_init_~tmp~15#1 := usb_acecad_init_#t~ret183#1;havoc usb_acecad_init_#t~ret183#1;usb_acecad_init_~result~0#1 := usb_acecad_init_~tmp~15#1; {47574#true} is VALID [2022-02-20 22:07:16,848 INFO L290 TraceCheckUtils]: 46: Hoare triple {47574#true} assume 0 == usb_acecad_init_~result~0#1;havoc usb_acecad_init_#t~nondet184#1; {47574#true} is VALID [2022-02-20 22:07:16,849 INFO L290 TraceCheckUtils]: 47: Hoare triple {47574#true} usb_acecad_init_#res#1 := usb_acecad_init_~result~0#1; {47574#true} is VALID [2022-02-20 22:07:16,849 INFO L290 TraceCheckUtils]: 48: Hoare triple {47574#true} main_#t~ret194#1 := usb_acecad_init_#res#1;assume { :end_inline_usb_acecad_init } true;assume -2147483648 <= main_#t~ret194#1 && main_#t~ret194#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret194#1;havoc main_#t~ret194#1; {47574#true} is VALID [2022-02-20 22:07:16,849 INFO L290 TraceCheckUtils]: 49: Hoare triple {47574#true} assume 0 == ~ldv_retval_1~0;~ldv_state_variable_0~0 := 3; {47574#true} is VALID [2022-02-20 22:07:16,849 INFO L290 TraceCheckUtils]: 50: Hoare triple {47574#true} assume !(0 != ~ldv_retval_1~0); {47574#true} is VALID [2022-02-20 22:07:16,849 INFO L290 TraceCheckUtils]: 51: Hoare triple {47574#true} assume -2147483648 <= main_#t~nondet187#1 && main_#t~nondet187#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet187#1;havoc main_#t~nondet187#1;main_#t~switch188#1 := 0 == main_~tmp___0~6#1; {47574#true} is VALID [2022-02-20 22:07:16,849 INFO L290 TraceCheckUtils]: 52: Hoare triple {47574#true} assume main_#t~switch188#1; {47574#true} is VALID [2022-02-20 22:07:16,849 INFO L290 TraceCheckUtils]: 53: Hoare triple {47574#true} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= main_#t~nondet189#1 && main_#t~nondet189#1 <= 2147483647;main_~tmp___1~3#1 := main_#t~nondet189#1;havoc main_#t~nondet189#1;main_#t~switch190#1 := 0 == main_~tmp___1~3#1; {47574#true} is VALID [2022-02-20 22:07:16,849 INFO L290 TraceCheckUtils]: 54: Hoare triple {47574#true} assume main_#t~switch190#1; {47574#true} is VALID [2022-02-20 22:07:16,850 INFO L290 TraceCheckUtils]: 55: Hoare triple {47574#true} assume 1 == ~ldv_state_variable_1~0;assume { :begin_inline_usb_acecad_probe } true;usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset, usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset := ~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc usb_acecad_probe_#res#1;havoc usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset, usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset, usb_acecad_probe_#t~mem132#1, usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset, usb_acecad_probe_#t~ret134#1, usb_acecad_probe_#t~mem135#1, usb_acecad_probe_#t~ret136#1, usb_acecad_probe_#t~ret137#1, usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset, usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset, usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset, usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset, usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset, usb_acecad_probe_#t~mem143#1.base, usb_acecad_probe_#t~mem143#1.offset, usb_acecad_probe_#t~mem144#1.base, usb_acecad_probe_#t~mem144#1.offset, usb_acecad_probe_#t~mem145#1.base, usb_acecad_probe_#t~mem145#1.offset, usb_acecad_probe_#t~ret146#1, usb_acecad_probe_#t~mem147#1.base, usb_acecad_probe_#t~mem147#1.offset, usb_acecad_probe_#t~mem148#1.base, usb_acecad_probe_#t~mem148#1.offset, usb_acecad_probe_#t~ret149#1, usb_acecad_probe_#t~mem150#1.base, usb_acecad_probe_#t~mem150#1.offset, usb_acecad_probe_#t~ret151#1, usb_acecad_probe_#t~ret152#1, usb_acecad_probe_#t~ret153#1, usb_acecad_probe_#t~mem154#1, usb_acecad_probe_#t~switch155#1, usb_acecad_probe_#t~nondet156#1, usb_acecad_probe_#t~nondet157#1, usb_acecad_probe_#t~mem158#1, usb_acecad_probe_#t~mem159#1, usb_acecad_probe_#t~nondet160#1, usb_acecad_probe_#t~nondet161#1, usb_acecad_probe_#t~mem162#1, usb_acecad_probe_#t~mem163#1, usb_acecad_probe_#t~mem164#1.base, usb_acecad_probe_#t~mem164#1.offset, usb_acecad_probe_#t~mem165#1.base, usb_acecad_probe_#t~mem165#1.offset, usb_acecad_probe_#t~ite166#1, usb_acecad_probe_#t~mem167#1, usb_acecad_probe_#t~mem168#1.base, usb_acecad_probe_#t~mem168#1.offset, usb_acecad_probe_#t~mem169#1, usb_acecad_probe_#t~mem170#1.base, usb_acecad_probe_#t~mem170#1.offset, usb_acecad_probe_#t~mem171#1.base, usb_acecad_probe_#t~mem171#1.offset, usb_acecad_probe_#t~mem172#1, usb_acecad_probe_#t~mem173#1.base, usb_acecad_probe_#t~mem173#1.offset, usb_acecad_probe_#t~ret174#1, usb_acecad_probe_#t~mem175#1.base, usb_acecad_probe_#t~mem175#1.offset, usb_acecad_probe_#t~mem176#1, usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset, usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset, usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset, usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset, usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset, usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset, usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset, usb_acecad_probe_~pipe~0#1, usb_acecad_probe_~maxp~0#1, usb_acecad_probe_~err~0#1, usb_acecad_probe_~tmp___0~5#1, usb_acecad_probe_~tmp___1~2#1, usb_acecad_probe_~tmp___2~0#1, usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset, usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~tmp___5~0#1, usb_acecad_probe_~tmp___6~0#1;usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset := usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset;usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset := usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset;havoc usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset;havoc usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;havoc usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset;havoc usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset;havoc usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset;havoc usb_acecad_probe_~pipe~0#1;havoc usb_acecad_probe_~maxp~0#1;havoc usb_acecad_probe_~err~0#1;havoc usb_acecad_probe_~tmp___0~5#1;havoc usb_acecad_probe_~tmp___1~2#1;havoc usb_acecad_probe_~tmp___2~0#1;havoc usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;havoc usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset;havoc usb_acecad_probe_~tmp___5~0#1;havoc usb_acecad_probe_~tmp___6~0#1;assume { :begin_inline_interface_to_usbdev } true;interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset := usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset;havoc interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;havoc interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset, interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset, interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset := interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset;havoc interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;assume { :begin_inline_ldv_interface_to_usbdev } true;havoc ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;havoc ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset, ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset;havoc ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset; {47574#true} is VALID [2022-02-20 22:07:16,850 INFO L272 TraceCheckUtils]: 56: Hoare triple {47574#true} call ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset := ldv_malloc(1822); {47668#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:16,850 INFO L290 TraceCheckUtils]: 57: Hoare triple {47668#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {47574#true} is VALID [2022-02-20 22:07:16,851 INFO L290 TraceCheckUtils]: 58: Hoare triple {47574#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {47669#(and (<= 0 |ldv_malloc_#res.base|) (<= |ldv_malloc_#res.offset| 0) (<= |ldv_malloc_#res.base| 0) (<= 0 |ldv_malloc_#res.offset|))} is VALID [2022-02-20 22:07:16,851 INFO L290 TraceCheckUtils]: 59: Hoare triple {47669#(and (<= 0 |ldv_malloc_#res.base|) (<= |ldv_malloc_#res.offset| 0) (<= |ldv_malloc_#res.base| 0) (<= 0 |ldv_malloc_#res.offset|))} assume true; {47669#(and (<= 0 |ldv_malloc_#res.base|) (<= |ldv_malloc_#res.offset| 0) (<= |ldv_malloc_#res.base| 0) (<= 0 |ldv_malloc_#res.offset|))} is VALID [2022-02-20 22:07:16,852 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {47669#(and (<= 0 |ldv_malloc_#res.base|) (<= |ldv_malloc_#res.offset| 0) (<= |ldv_malloc_#res.base| 0) (<= 0 |ldv_malloc_#res.offset|))} {47574#true} #555#return; {47608#(and (= |ULTIMATE.start_ldv_interface_to_usbdev_#t~ret208#1.offset| 0) (= |ULTIMATE.start_ldv_interface_to_usbdev_#t~ret208#1.base| 0))} is VALID [2022-02-20 22:07:16,852 INFO L290 TraceCheckUtils]: 61: Hoare triple {47608#(and (= |ULTIMATE.start_ldv_interface_to_usbdev_#t~ret208#1.offset| 0) (= |ULTIMATE.start_ldv_interface_to_usbdev_#t~ret208#1.base| 0))} ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset := ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset;havoc ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset; {47609#(and (= |ULTIMATE.start_ldv_interface_to_usbdev_~result~1#1.offset| 0) (= |ULTIMATE.start_ldv_interface_to_usbdev_~result~1#1.base| 0))} is VALID [2022-02-20 22:07:16,853 INFO L290 TraceCheckUtils]: 62: Hoare triple {47609#(and (= |ULTIMATE.start_ldv_interface_to_usbdev_~result~1#1.offset| 0) (= |ULTIMATE.start_ldv_interface_to_usbdev_~result~1#1.base| 0))} assume !(0 == (ldv_interface_to_usbdev_~result~1#1.base + ldv_interface_to_usbdev_~result~1#1.offset) % 18446744073709551616);ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset := ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset; {47575#false} is VALID [2022-02-20 22:07:16,853 INFO L290 TraceCheckUtils]: 63: Hoare triple {47575#false} interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset := ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;assume { :end_inline_ldv_interface_to_usbdev } true;interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset := interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset;havoc interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset;interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset := interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset; {47575#false} is VALID [2022-02-20 22:07:16,853 INFO L290 TraceCheckUtils]: 64: Hoare triple {47575#false} usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset := interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;assume { :end_inline_interface_to_usbdev } true;usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset := usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset;havoc usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset;usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset := usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;call usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset := read~$Pointer$(usb_acecad_probe_~intf#1.base, 8 + usb_acecad_probe_~intf#1.offset, 8);usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset := usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset;havoc usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset;call usb_acecad_probe_#t~mem132#1 := read~int(usb_acecad_probe_~interface~0#1.base, 4 + usb_acecad_probe_~interface~0#1.offset, 1); {47575#false} is VALID [2022-02-20 22:07:16,853 INFO L290 TraceCheckUtils]: 65: Hoare triple {47575#false} assume !(1 != usb_acecad_probe_#t~mem132#1 % 256 % 4294967296);havoc usb_acecad_probe_#t~mem132#1;call usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset := read~$Pointer$(usb_acecad_probe_~interface~0#1.base, 9 + usb_acecad_probe_~interface~0#1.offset, 8);usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset := usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset;havoc usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset;assume { :begin_inline_usb_endpoint_is_int_in } true;usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset := usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_endpoint_is_int_in_#res#1;havoc usb_endpoint_is_int_in_#t~ret3#1, usb_endpoint_is_int_in_#t~ret4#1, usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset, usb_endpoint_is_int_in_~tmp~0#1, usb_endpoint_is_int_in_~tmp___0~0#1, usb_endpoint_is_int_in_~tmp___1~0#1;usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset := usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset;havoc usb_endpoint_is_int_in_~tmp~0#1;havoc usb_endpoint_is_int_in_~tmp___0~0#1;havoc usb_endpoint_is_int_in_~tmp___1~0#1;assume { :begin_inline_usb_endpoint_xfer_int } true;usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset := usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset;havoc usb_endpoint_xfer_int_#res#1;havoc usb_endpoint_xfer_int_#t~mem2#1, usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset;usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset := usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset;call usb_endpoint_xfer_int_#t~mem2#1 := read~int(usb_endpoint_xfer_int_~epd#1.base, 3 + usb_endpoint_xfer_int_~epd#1.offset, 1);usb_endpoint_xfer_int_#res#1 := (if 3 == (if 0 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 0 else (if 1 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 1 else ~bitwiseAnd(usb_endpoint_xfer_int_#t~mem2#1 % 256, 3))) then 1 else 0);havoc usb_endpoint_xfer_int_#t~mem2#1; {47575#false} is VALID [2022-02-20 22:07:16,853 INFO L290 TraceCheckUtils]: 66: Hoare triple {47575#false} usb_endpoint_is_int_in_#t~ret3#1 := usb_endpoint_xfer_int_#res#1;assume { :end_inline_usb_endpoint_xfer_int } true;assume -2147483648 <= usb_endpoint_is_int_in_#t~ret3#1 && usb_endpoint_is_int_in_#t~ret3#1 <= 2147483647;usb_endpoint_is_int_in_~tmp~0#1 := usb_endpoint_is_int_in_#t~ret3#1;havoc usb_endpoint_is_int_in_#t~ret3#1; {47575#false} is VALID [2022-02-20 22:07:16,853 INFO L290 TraceCheckUtils]: 67: Hoare triple {47575#false} assume 0 != usb_endpoint_is_int_in_~tmp~0#1;assume { :begin_inline_usb_endpoint_dir_in } true;usb_endpoint_dir_in_#in~epd#1.base, usb_endpoint_dir_in_#in~epd#1.offset := usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset;havoc usb_endpoint_dir_in_#res#1;havoc usb_endpoint_dir_in_#t~mem1#1, usb_endpoint_dir_in_~epd#1.base, usb_endpoint_dir_in_~epd#1.offset;usb_endpoint_dir_in_~epd#1.base, usb_endpoint_dir_in_~epd#1.offset := usb_endpoint_dir_in_#in~epd#1.base, usb_endpoint_dir_in_#in~epd#1.offset;call usb_endpoint_dir_in_#t~mem1#1 := read~int(usb_endpoint_dir_in_~epd#1.base, 2 + usb_endpoint_dir_in_~epd#1.offset, 1);usb_endpoint_dir_in_#res#1 := (if (if usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 <= 127 then usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 else usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 - 256) < 0 then 1 else 0);havoc usb_endpoint_dir_in_#t~mem1#1; {47575#false} is VALID [2022-02-20 22:07:16,854 INFO L290 TraceCheckUtils]: 68: Hoare triple {47575#false} usb_endpoint_is_int_in_#t~ret4#1 := usb_endpoint_dir_in_#res#1;assume { :end_inline_usb_endpoint_dir_in } true;assume -2147483648 <= usb_endpoint_is_int_in_#t~ret4#1 && usb_endpoint_is_int_in_#t~ret4#1 <= 2147483647;usb_endpoint_is_int_in_~tmp___0~0#1 := usb_endpoint_is_int_in_#t~ret4#1;havoc usb_endpoint_is_int_in_#t~ret4#1; {47575#false} is VALID [2022-02-20 22:07:16,854 INFO L290 TraceCheckUtils]: 69: Hoare triple {47575#false} assume 0 != usb_endpoint_is_int_in_~tmp___0~0#1;usb_endpoint_is_int_in_~tmp___1~0#1 := 1; {47575#false} is VALID [2022-02-20 22:07:16,854 INFO L290 TraceCheckUtils]: 70: Hoare triple {47575#false} usb_endpoint_is_int_in_#res#1 := usb_endpoint_is_int_in_~tmp___1~0#1; {47575#false} is VALID [2022-02-20 22:07:16,854 INFO L290 TraceCheckUtils]: 71: Hoare triple {47575#false} usb_acecad_probe_#t~ret134#1 := usb_endpoint_is_int_in_#res#1;assume { :end_inline_usb_endpoint_is_int_in } true;assume -2147483648 <= usb_acecad_probe_#t~ret134#1 && usb_acecad_probe_#t~ret134#1 <= 2147483647;usb_acecad_probe_~tmp___0~5#1 := usb_acecad_probe_#t~ret134#1;havoc usb_acecad_probe_#t~ret134#1; {47575#false} is VALID [2022-02-20 22:07:16,854 INFO L290 TraceCheckUtils]: 72: Hoare triple {47575#false} assume !(0 == usb_acecad_probe_~tmp___0~5#1);call usb_acecad_probe_#t~mem135#1 := read~int(usb_acecad_probe_~endpoint~0#1.base, 2 + usb_acecad_probe_~endpoint~0#1.offset, 1);assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_#t~mem135#1 % 256;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem45#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem45#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := (if (1 == 256 * __create_pipe_#t~mem45#1 || 0 == 256 * __create_pipe_#t~mem45#1) && 0 == 32768 * __create_pipe_~endpoint#1 then 256 * __create_pipe_#t~mem45#1 else (if 0 == 256 * __create_pipe_#t~mem45#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1) then 32768 * __create_pipe_~endpoint#1 else (if (1 == 256 * __create_pipe_#t~mem45#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1)) || ((1 == 256 * __create_pipe_#t~mem45#1 || 0 == 256 * __create_pipe_#t~mem45#1) && 1 == 32768 * __create_pipe_~endpoint#1) then 1 else ~bitwiseOr(256 * __create_pipe_#t~mem45#1, 32768 * __create_pipe_~endpoint#1))));havoc __create_pipe_#t~mem45#1; {47575#false} is VALID [2022-02-20 22:07:16,854 INFO L290 TraceCheckUtils]: 73: Hoare triple {47575#false} usb_acecad_probe_#t~ret136#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;usb_acecad_probe_~tmp___1~2#1 := usb_acecad_probe_#t~ret136#1;havoc usb_acecad_probe_#t~mem135#1;havoc usb_acecad_probe_#t~ret136#1;usb_acecad_probe_~pipe~0#1 := (if ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 else ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 - 4294967296);assume { :begin_inline_usb_maxpacket } true;usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset, usb_maxpacket_#in~pipe#1, usb_maxpacket_#in~is_out#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~pipe~0#1, (if 0 == (if 0 == usb_acecad_probe_~pipe~0#1 then 0 else (if 1 == usb_acecad_probe_~pipe~0#1 then 0 else ~bitwiseAnd(usb_acecad_probe_~pipe~0#1, 128))) then 1 else 0);havoc usb_maxpacket_#res#1;havoc usb_maxpacket_#t~ret47#1, usb_maxpacket_#t~ret48#1, usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset, usb_maxpacket_#t~ret50#1, usb_maxpacket_#t~ret51#1, usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset, usb_maxpacket_#t~mem53#1, usb_maxpacket_#t~nondet46#1, usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset, usb_maxpacket_~pipe#1, usb_maxpacket_~is_out#1, usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset, usb_maxpacket_~epnum~0#1, usb_maxpacket_~__ret_warn_on~0#1, usb_maxpacket_~tmp~2#1, usb_maxpacket_~__ret_warn_on___0~0#1, usb_maxpacket_~tmp___0~1#1;usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset := usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset;usb_maxpacket_~pipe#1 := usb_maxpacket_#in~pipe#1;usb_maxpacket_~is_out#1 := usb_maxpacket_#in~is_out#1;havoc usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset;havoc usb_maxpacket_~epnum~0#1;havoc usb_maxpacket_~__ret_warn_on~0#1;havoc usb_maxpacket_~tmp~2#1;havoc usb_maxpacket_~__ret_warn_on___0~0#1;havoc usb_maxpacket_~tmp___0~1#1; {47575#false} is VALID [2022-02-20 22:07:16,854 INFO L290 TraceCheckUtils]: 74: Hoare triple {47575#false} assume 0 == usb_maxpacket_~pipe#1 / 32768;usb_maxpacket_~epnum~0#1 := 0; {47575#false} is VALID [2022-02-20 22:07:16,854 INFO L290 TraceCheckUtils]: 75: Hoare triple {47575#false} assume !(0 != usb_maxpacket_~is_out#1);usb_maxpacket_~__ret_warn_on___0~0#1 := (if 0 == (if 0 == usb_maxpacket_~pipe#1 then 0 else (if 1 == usb_maxpacket_~pipe#1 then 0 else ~bitwiseAnd(usb_maxpacket_~pipe#1, 128))) then 1 else 0); {47575#false} is VALID [2022-02-20 22:07:16,855 INFO L272 TraceCheckUtils]: 76: Hoare triple {47575#false} call usb_maxpacket_#t~ret50#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {47574#true} is VALID [2022-02-20 22:07:16,855 INFO L290 TraceCheckUtils]: 77: Hoare triple {47574#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {47574#true} is VALID [2022-02-20 22:07:16,855 INFO L290 TraceCheckUtils]: 78: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:16,855 INFO L284 TraceCheckUtils]: 79: Hoare quadruple {47574#true} {47575#false} #563#return; {47575#false} is VALID [2022-02-20 22:07:16,855 INFO L290 TraceCheckUtils]: 80: Hoare triple {47575#false} assume -9223372036854775808 <= usb_maxpacket_#t~ret50#1 && usb_maxpacket_#t~ret50#1 <= 9223372036854775807;usb_maxpacket_~tmp___0~1#1 := usb_maxpacket_#t~ret50#1;havoc usb_maxpacket_#t~ret50#1; {47575#false} is VALID [2022-02-20 22:07:16,855 INFO L290 TraceCheckUtils]: 81: Hoare triple {47575#false} assume !(0 != usb_maxpacket_~tmp___0~1#1); {47575#false} is VALID [2022-02-20 22:07:16,855 INFO L272 TraceCheckUtils]: 82: Hoare triple {47575#false} call usb_maxpacket_#t~ret51#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {47574#true} is VALID [2022-02-20 22:07:16,855 INFO L290 TraceCheckUtils]: 83: Hoare triple {47574#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {47574#true} is VALID [2022-02-20 22:07:16,856 INFO L290 TraceCheckUtils]: 84: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:16,856 INFO L284 TraceCheckUtils]: 85: Hoare quadruple {47574#true} {47575#false} #567#return; {47575#false} is VALID [2022-02-20 22:07:16,856 INFO L290 TraceCheckUtils]: 86: Hoare triple {47575#false} assume -9223372036854775808 <= usb_maxpacket_#t~ret51#1 && usb_maxpacket_#t~ret51#1 <= 9223372036854775807;havoc usb_maxpacket_#t~ret51#1;call usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset := read~$Pointer$(usb_maxpacket_~udev#1.base, 1186 + usb_maxpacket_~udev#1.offset + 8 * (usb_maxpacket_~epnum~0#1 % 4294967296), 8);usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset := usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset;havoc usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset; {47575#false} is VALID [2022-02-20 22:07:16,856 INFO L290 TraceCheckUtils]: 87: Hoare triple {47575#false} assume 0 == (usb_maxpacket_~ep~0#1.base + usb_maxpacket_~ep~0#1.offset) % 18446744073709551616;usb_maxpacket_#res#1 := 0; {47575#false} is VALID [2022-02-20 22:07:16,856 INFO L290 TraceCheckUtils]: 88: Hoare triple {47575#false} usb_acecad_probe_#t~ret137#1 := usb_maxpacket_#res#1;assume { :end_inline_usb_maxpacket } true;usb_acecad_probe_~tmp___2~0#1 := usb_acecad_probe_#t~ret137#1;havoc usb_acecad_probe_#t~ret137#1;usb_acecad_probe_~maxp~0#1 := usb_acecad_probe_~tmp___2~0#1 % 65536; {47575#false} is VALID [2022-02-20 22:07:16,856 INFO L272 TraceCheckUtils]: 89: Hoare triple {47575#false} call usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset := kzalloc(232, 208); {47668#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:16,856 INFO L290 TraceCheckUtils]: 90: Hoare triple {47668#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {47574#true} is VALID [2022-02-20 22:07:16,857 INFO L272 TraceCheckUtils]: 91: Hoare triple {47574#true} call __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset := ldv_malloc(__kmalloc_~size#1); {47668#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:16,857 INFO L290 TraceCheckUtils]: 92: Hoare triple {47668#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {47574#true} is VALID [2022-02-20 22:07:16,857 INFO L290 TraceCheckUtils]: 93: Hoare triple {47574#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {47574#true} is VALID [2022-02-20 22:07:16,857 INFO L290 TraceCheckUtils]: 94: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:16,858 INFO L284 TraceCheckUtils]: 95: Hoare quadruple {47574#true} {47574#true} #539#return; {47574#true} is VALID [2022-02-20 22:07:16,858 INFO L290 TraceCheckUtils]: 96: Hoare triple {47574#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset; {47574#true} is VALID [2022-02-20 22:07:16,858 INFO L290 TraceCheckUtils]: 97: Hoare triple {47574#true} kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {47574#true} is VALID [2022-02-20 22:07:16,858 INFO L290 TraceCheckUtils]: 98: Hoare triple {47574#true} #t~ret58#1.base, #t~ret58#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret58#1.base, #t~ret58#1.offset;havoc #t~ret58#1.base, #t~ret58#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {47574#true} is VALID [2022-02-20 22:07:16,858 INFO L290 TraceCheckUtils]: 99: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:16,858 INFO L284 TraceCheckUtils]: 100: Hoare quadruple {47574#true} {47575#false} #569#return; {47575#false} is VALID [2022-02-20 22:07:16,858 INFO L290 TraceCheckUtils]: 101: Hoare triple {47575#false} usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset := usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset;havoc usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset;usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset := usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;assume { :begin_inline_input_allocate_device } true;havoc input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;havoc input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset; {47575#false} is VALID [2022-02-20 22:07:16,858 INFO L272 TraceCheckUtils]: 102: Hoare triple {47575#false} call input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset := kzalloc(1855, ~bitwiseOr(~bitwiseOr(16, 64), 128)); {47668#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:16,859 INFO L290 TraceCheckUtils]: 103: Hoare triple {47668#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {47574#true} is VALID [2022-02-20 22:07:16,859 INFO L272 TraceCheckUtils]: 104: Hoare triple {47574#true} call __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset := ldv_malloc(__kmalloc_~size#1); {47668#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:16,859 INFO L290 TraceCheckUtils]: 105: Hoare triple {47668#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {47574#true} is VALID [2022-02-20 22:07:16,859 INFO L290 TraceCheckUtils]: 106: Hoare triple {47574#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {47574#true} is VALID [2022-02-20 22:07:16,860 INFO L290 TraceCheckUtils]: 107: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:16,860 INFO L284 TraceCheckUtils]: 108: Hoare quadruple {47574#true} {47574#true} #539#return; {47574#true} is VALID [2022-02-20 22:07:16,860 INFO L290 TraceCheckUtils]: 109: Hoare triple {47574#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset; {47574#true} is VALID [2022-02-20 22:07:16,860 INFO L290 TraceCheckUtils]: 110: Hoare triple {47574#true} kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {47574#true} is VALID [2022-02-20 22:07:16,860 INFO L290 TraceCheckUtils]: 111: Hoare triple {47574#true} #t~ret58#1.base, #t~ret58#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret58#1.base, #t~ret58#1.offset;havoc #t~ret58#1.base, #t~ret58#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {47574#true} is VALID [2022-02-20 22:07:16,860 INFO L290 TraceCheckUtils]: 112: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:16,860 INFO L284 TraceCheckUtils]: 113: Hoare quadruple {47574#true} {47575#false} #571#return; {47575#false} is VALID [2022-02-20 22:07:16,860 INFO L290 TraceCheckUtils]: 114: Hoare triple {47575#false} input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset := input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset;havoc input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset; {47575#false} is VALID [2022-02-20 22:07:16,860 INFO L290 TraceCheckUtils]: 115: Hoare triple {47575#false} usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset := input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;assume { :end_inline_input_allocate_device } true;usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset := usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset;havoc usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset; {47575#false} is VALID [2022-02-20 22:07:16,861 INFO L290 TraceCheckUtils]: 116: Hoare triple {47575#false} assume !(0 == (usb_acecad_probe_~acecad~3#1.base + usb_acecad_probe_~acecad~3#1.offset) % 18446744073709551616 || 0 == (usb_acecad_probe_~input_dev~0#1.base + usb_acecad_probe_~input_dev~0#1.offset) % 18446744073709551616);assume { :begin_inline_usb_alloc_coherent } true;usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset, usb_alloc_coherent_#in~arg1#1, usb_alloc_coherent_#in~arg2#1, usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, 8, 208, usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset;havoc usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;havoc usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset, usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset, usb_alloc_coherent_~arg1#1, usb_alloc_coherent_~arg2#1, usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset;usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset := usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset;usb_alloc_coherent_~arg1#1 := usb_alloc_coherent_#in~arg1#1;usb_alloc_coherent_~arg2#1 := usb_alloc_coherent_#in~arg2#1;usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset := usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset; {47575#false} is VALID [2022-02-20 22:07:16,861 INFO L272 TraceCheckUtils]: 117: Hoare triple {47575#false} call usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset := ldv_malloc(0); {47668#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:16,861 INFO L290 TraceCheckUtils]: 118: Hoare triple {47668#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {47574#true} is VALID [2022-02-20 22:07:16,861 INFO L290 TraceCheckUtils]: 119: Hoare triple {47574#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {47574#true} is VALID [2022-02-20 22:07:16,861 INFO L290 TraceCheckUtils]: 120: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:16,861 INFO L284 TraceCheckUtils]: 121: Hoare quadruple {47574#true} {47575#false} #573#return; {47575#false} is VALID [2022-02-20 22:07:16,861 INFO L290 TraceCheckUtils]: 122: Hoare triple {47575#false} usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset := usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset;havoc usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset; {47575#false} is VALID [2022-02-20 22:07:16,861 INFO L290 TraceCheckUtils]: 123: Hoare triple {47575#false} usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset := usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;assume { :end_inline_usb_alloc_coherent } true;usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset := usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset;havoc usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset;call write~$Pointer$(usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8); {47575#false} is VALID [2022-02-20 22:07:16,862 INFO L290 TraceCheckUtils]: 124: Hoare triple {47575#false} assume !(0 == (usb_acecad_probe_#t~mem141#1.base + usb_acecad_probe_#t~mem141#1.offset) % 18446744073709551616);havoc usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset;assume { :begin_inline_ldv_usb_alloc_urb_5 } true;ldv_usb_alloc_urb_5_#in~ldv_func_arg1#1, ldv_usb_alloc_urb_5_#in~ldv_func_arg2#1 := 0, 208;havoc ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset, ldv_usb_alloc_urb_5_~ldv_func_arg1#1, ldv_usb_alloc_urb_5_~ldv_func_arg2#1, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset, ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;ldv_usb_alloc_urb_5_~ldv_func_arg1#1 := ldv_usb_alloc_urb_5_#in~ldv_func_arg1#1;ldv_usb_alloc_urb_5_~ldv_func_arg2#1 := ldv_usb_alloc_urb_5_#in~ldv_func_arg2#1;havoc ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset;havoc ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;assume { :begin_inline_usb_alloc_urb } true;usb_alloc_urb_#in~arg0#1, usb_alloc_urb_#in~arg1#1 := ldv_usb_alloc_urb_5_~ldv_func_arg1#1, ldv_usb_alloc_urb_5_~ldv_func_arg2#1;havoc usb_alloc_urb_#res#1.base, usb_alloc_urb_#res#1.offset;havoc usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset, usb_alloc_urb_~arg0#1, usb_alloc_urb_~arg1#1;usb_alloc_urb_~arg0#1 := usb_alloc_urb_#in~arg0#1;usb_alloc_urb_~arg1#1 := usb_alloc_urb_#in~arg1#1; {47575#false} is VALID [2022-02-20 22:07:16,862 INFO L272 TraceCheckUtils]: 125: Hoare triple {47575#false} call usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset := ldv_malloc(180); {47668#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:16,862 INFO L290 TraceCheckUtils]: 126: Hoare triple {47668#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {47574#true} is VALID [2022-02-20 22:07:16,862 INFO L290 TraceCheckUtils]: 127: Hoare triple {47574#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {47574#true} is VALID [2022-02-20 22:07:16,862 INFO L290 TraceCheckUtils]: 128: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:16,862 INFO L284 TraceCheckUtils]: 129: Hoare quadruple {47574#true} {47575#false} #575#return; {47575#false} is VALID [2022-02-20 22:07:16,862 INFO L290 TraceCheckUtils]: 130: Hoare triple {47575#false} usb_alloc_urb_#res#1.base, usb_alloc_urb_#res#1.offset := usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset;havoc usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset; {47575#false} is VALID [2022-02-20 22:07:16,862 INFO L290 TraceCheckUtils]: 131: Hoare triple {47575#false} ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset := usb_alloc_urb_#res#1.base, usb_alloc_urb_#res#1.offset;assume { :end_inline_usb_alloc_urb } true;ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset := ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset;ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset := ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;assume { :begin_inline_ldv_alloc_urb } true;ldv_alloc_urb_#in~res#1.base, ldv_alloc_urb_#in~res#1.offset := ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset;havoc ldv_alloc_urb_~res#1.base, ldv_alloc_urb_~res#1.offset;ldv_alloc_urb_~res#1.base, ldv_alloc_urb_~res#1.offset := ldv_alloc_urb_#in~res#1.base, ldv_alloc_urb_#in~res#1.offset; {47575#false} is VALID [2022-02-20 22:07:16,863 INFO L290 TraceCheckUtils]: 132: Hoare triple {47575#false} assume 0 != (ldv_alloc_urb_~res#1.base + ldv_alloc_urb_~res#1.offset) % 18446744073709551616;~URB_STATE~0 := 1 + ~URB_STATE~0; {47575#false} is VALID [2022-02-20 22:07:16,863 INFO L290 TraceCheckUtils]: 133: Hoare triple {47575#false} assume { :end_inline_ldv_alloc_urb } true;ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset := ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset; {47575#false} is VALID [2022-02-20 22:07:16,863 INFO L290 TraceCheckUtils]: 134: Hoare triple {47575#false} usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset := ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;assume { :end_inline_ldv_usb_alloc_urb_5 } true;call write~$Pointer$(usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset, usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8);havoc usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset;call usb_acecad_probe_#t~mem143#1.base, usb_acecad_probe_#t~mem143#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8); {47575#false} is VALID [2022-02-20 22:07:16,863 INFO L290 TraceCheckUtils]: 135: Hoare triple {47575#false} assume 0 == (usb_acecad_probe_#t~mem143#1.base + usb_acecad_probe_#t~mem143#1.offset) % 18446744073709551616;havoc usb_acecad_probe_#t~mem143#1.base, usb_acecad_probe_#t~mem143#1.offset;usb_acecad_probe_~err~0#1 := -12; {47575#false} is VALID [2022-02-20 22:07:16,863 INFO L290 TraceCheckUtils]: 136: Hoare triple {47575#false} call usb_acecad_probe_#t~mem175#1.base, usb_acecad_probe_#t~mem175#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem176#1 := read~int(usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset, 8); {47575#false} is VALID [2022-02-20 22:07:16,863 INFO L272 TraceCheckUtils]: 137: Hoare triple {47575#false} call usb_free_coherent(usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, 8, usb_acecad_probe_#t~mem175#1.base, usb_acecad_probe_#t~mem175#1.offset, usb_acecad_probe_#t~mem176#1); {47574#true} is VALID [2022-02-20 22:07:16,863 INFO L290 TraceCheckUtils]: 138: Hoare triple {47574#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1 := #in~arg1;~arg2.base, ~arg2.offset := #in~arg2.base, #in~arg2.offset;~arg3 := #in~arg3; {47574#true} is VALID [2022-02-20 22:07:16,863 INFO L290 TraceCheckUtils]: 139: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:16,864 INFO L284 TraceCheckUtils]: 140: Hoare quadruple {47574#true} {47575#false} #603#return; {47575#false} is VALID [2022-02-20 22:07:16,864 INFO L290 TraceCheckUtils]: 141: Hoare triple {47575#false} havoc usb_acecad_probe_#t~mem175#1.base, usb_acecad_probe_#t~mem175#1.offset;havoc usb_acecad_probe_#t~mem176#1; {47575#false} is VALID [2022-02-20 22:07:16,864 INFO L290 TraceCheckUtils]: 142: Hoare triple {47575#false} assume { :begin_inline_input_free_device } true;input_free_device_#in~arg0#1.base, input_free_device_#in~arg0#1.offset := usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset;havoc input_free_device_~arg0#1.base, input_free_device_~arg0#1.offset;input_free_device_~arg0#1.base, input_free_device_~arg0#1.offset := input_free_device_#in~arg0#1.base, input_free_device_#in~arg0#1.offset; {47575#false} is VALID [2022-02-20 22:07:16,864 INFO L290 TraceCheckUtils]: 143: Hoare triple {47575#false} assume { :end_inline_input_free_device } true; {47575#false} is VALID [2022-02-20 22:07:16,864 INFO L272 TraceCheckUtils]: 144: Hoare triple {47575#false} call kfree(usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset); {47678#(= |old(#valid)| |#valid|)} is VALID [2022-02-20 22:07:16,864 INFO L290 TraceCheckUtils]: 145: Hoare triple {47678#(= |old(#valid)| |#valid|)} ~p.base, ~p.offset := #in~p.base, #in~p.offset;call ULTIMATE.dealloc(~p.base, ~p.offset); {47574#true} is VALID [2022-02-20 22:07:16,864 INFO L290 TraceCheckUtils]: 146: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:16,864 INFO L284 TraceCheckUtils]: 147: Hoare quadruple {47574#true} {47575#false} #605#return; {47575#false} is VALID [2022-02-20 22:07:16,865 INFO L290 TraceCheckUtils]: 148: Hoare triple {47575#false} usb_acecad_probe_#res#1 := usb_acecad_probe_~err~0#1; {47575#false} is VALID [2022-02-20 22:07:16,865 INFO L290 TraceCheckUtils]: 149: Hoare triple {47575#false} main_#t~ret191#1 := usb_acecad_probe_#res#1;assume { :end_inline_usb_acecad_probe } true;assume -2147483648 <= main_#t~ret191#1 && main_#t~ret191#1 <= 2147483647;~ldv_retval_0~0 := main_#t~ret191#1;havoc main_#t~ret191#1; {47575#false} is VALID [2022-02-20 22:07:16,865 INFO L290 TraceCheckUtils]: 150: Hoare triple {47575#false} assume !(0 == ~ldv_retval_0~0); {47575#false} is VALID [2022-02-20 22:07:16,865 INFO L290 TraceCheckUtils]: 151: Hoare triple {47575#false} assume -2147483648 <= main_#t~nondet187#1 && main_#t~nondet187#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet187#1;havoc main_#t~nondet187#1;main_#t~switch188#1 := 0 == main_~tmp___0~6#1; {47575#false} is VALID [2022-02-20 22:07:16,865 INFO L290 TraceCheckUtils]: 152: Hoare triple {47575#false} assume !main_#t~switch188#1;main_#t~switch188#1 := main_#t~switch188#1 || 1 == main_~tmp___0~6#1; {47575#false} is VALID [2022-02-20 22:07:16,865 INFO L290 TraceCheckUtils]: 153: Hoare triple {47575#false} assume main_#t~switch188#1; {47575#false} is VALID [2022-02-20 22:07:16,865 INFO L290 TraceCheckUtils]: 154: Hoare triple {47575#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet192#1 && main_#t~nondet192#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet192#1;havoc main_#t~nondet192#1;main_#t~switch193#1 := 0 == main_~tmp___2~1#1; {47575#false} is VALID [2022-02-20 22:07:16,865 INFO L290 TraceCheckUtils]: 155: Hoare triple {47575#false} assume main_#t~switch193#1; {47575#false} is VALID [2022-02-20 22:07:16,866 INFO L290 TraceCheckUtils]: 156: Hoare triple {47575#false} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0;assume { :begin_inline_usb_acecad_exit } true;assume { :begin_inline_ldv_usb_deregister_11 } true;ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset := ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset;assume { :begin_inline_usb_deregister } true;usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset := ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;havoc usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset;usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset := usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset; {47575#false} is VALID [2022-02-20 22:07:16,866 INFO L290 TraceCheckUtils]: 157: Hoare triple {47575#false} assume { :end_inline_usb_deregister } true;~ldv_state_variable_1~0 := 0; {47575#false} is VALID [2022-02-20 22:07:16,866 INFO L290 TraceCheckUtils]: 158: Hoare triple {47575#false} assume { :end_inline_ldv_usb_deregister_11 } true; {47575#false} is VALID [2022-02-20 22:07:16,866 INFO L290 TraceCheckUtils]: 159: Hoare triple {47575#false} assume { :end_inline_usb_acecad_exit } true;~ldv_state_variable_0~0 := 2; {47575#false} is VALID [2022-02-20 22:07:16,866 INFO L290 TraceCheckUtils]: 160: Hoare triple {47575#false} assume { :begin_inline_ldv_check_final_state } true; {47575#false} is VALID [2022-02-20 22:07:16,866 INFO L290 TraceCheckUtils]: 161: Hoare triple {47575#false} assume 0 != ~URB_STATE~0; {47575#false} is VALID [2022-02-20 22:07:16,866 INFO L272 TraceCheckUtils]: 162: Hoare triple {47575#false} call ldv_error(); {47575#false} is VALID [2022-02-20 22:07:16,866 INFO L290 TraceCheckUtils]: 163: Hoare triple {47575#false} assume !false; {47575#false} is VALID [2022-02-20 22:07:16,867 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 7 proven. 8 refuted. 0 times theorem prover too weak. 58 trivial. 0 not checked. [2022-02-20 22:07:16,867 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:07:16,867 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1938826771] [2022-02-20 22:07:16,867 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1938826771] provided 0 perfect and 1 imperfect interpolant sequences [2022-02-20 22:07:16,867 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1789972704] [2022-02-20 22:07:16,868 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:07:16,868 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-20 22:07:16,868 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-20 22:07:16,869 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-02-20 22:07:16,870 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-02-20 22:07:17,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:17,140 INFO L263 TraceCheckSpWp]: Trace formula consists of 1312 conjuncts, 29 conjunts are in the unsatisfiable core [2022-02-20 22:07:17,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:17,203 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-02-20 22:07:18,006 INFO L290 TraceCheckUtils]: 0: Hoare triple {47574#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(99, 2);call #Ultimate.allocInit(10, 3);call #Ultimate.allocInit(7, 4);call write~init~int(97, 4, 0, 1);call write~init~int(99, 4, 1, 1);call write~init~int(101, 4, 2, 1);call write~init~int(99, 4, 3, 1);call write~init~int(97, 4, 4, 1);call write~init~int(100, 4, 5, 1);call write~init~int(0, 4, 6, 1);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(20, 6);call #Ultimate.allocInit(57, 7);call #Ultimate.allocInit(2, 8);call write~init~int(32, 8, 0, 1);call write~init~int(0, 8, 1, 1);call #Ultimate.allocInit(8, 9);call #Ultimate.allocInit(34, 10);call #Ultimate.allocInit(32, 11);call #Ultimate.allocInit(11, 12);call #Ultimate.allocInit(48, 13);~LDV_IN_INTERRUPT~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset := 14, 0;call #Ultimate.allocInit(72, 14);call write~init~int(3, ~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 2 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(4, ~#usb_acecad_id_table~0.base, 4 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 6 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 8 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 10 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 11 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 12 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 13 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 14 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 15 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 16 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(3, ~#usb_acecad_id_table~0.base, 24 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 26 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(8, ~#usb_acecad_id_table~0.base, 28 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 30 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 32 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 34 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 35 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 36 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 37 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 38 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 39 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(1, ~#usb_acecad_id_table~0.base, 40 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(0, ~#usb_acecad_id_table~0.base, 48 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 50 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 52 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 54 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 56 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 58 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 59 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 60 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 61 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 62 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 63 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 64 + ~#usb_acecad_id_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.driver_info := 0;~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset := 15, 0;call #Ultimate.allocInit(264, 15);call write~init~$Pointer$(12, 0, ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_probe.base, #funAddr~usb_acecad_probe.offset, ~#usb_acecad_driver~0.base, 8 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_disconnect.base, #funAddr~usb_acecad_disconnect.offset, ~#usb_acecad_driver~0.base, 16 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 24 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 32 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 40 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 48 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 56 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 64 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, ~#usb_acecad_driver~0.base, 72 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 80 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 84 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 88 + ~#usb_acecad_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 92 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 100 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 108 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 116 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 124 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 132 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 136 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 144 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 152 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 160 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 168 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 176 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 184 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 192 + ~#usb_acecad_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 193 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 201 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 209 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 217 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 225 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 233 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 241 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 249 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 257 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 261 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 262 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 263 + ~#usb_acecad_driver~0.offset, 1);~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~URB_STATE~0 := 0;~DEV_STATE~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~int_urb~0.base, ~int_urb~0.offset := 0, 0;~bulk_urb~0.base, ~bulk_urb~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {47574#true} is VALID [2022-02-20 22:07:18,006 INFO L290 TraceCheckUtils]: 1: Hoare triple {47574#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret186#1.base, main_#t~ret186#1.offset, main_#t~nondet187#1, main_#t~switch188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~ret191#1, main_#t~nondet192#1, main_#t~switch193#1, main_#t~ret194#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~17#1.base, main_~tmp~17#1.offset, main_~tmp___0~6#1, main_~tmp___1~3#1, main_~tmp___2~1#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~17#1.base, main_~tmp~17#1.offset;havoc main_~tmp___0~6#1;havoc main_~tmp___1~3#1;havoc main_~tmp___2~1#1; {47574#true} is VALID [2022-02-20 22:07:18,006 INFO L272 TraceCheckUtils]: 2: Hoare triple {47574#true} call main_#t~ret186#1.base, main_#t~ret186#1.offset := ldv_init_zalloc(24); {47574#true} is VALID [2022-02-20 22:07:18,007 INFO L290 TraceCheckUtils]: 3: Hoare triple {47574#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {47574#true} is VALID [2022-02-20 22:07:18,007 INFO L272 TraceCheckUtils]: 4: Hoare triple {47574#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {47574#true} is VALID [2022-02-20 22:07:18,007 INFO L290 TraceCheckUtils]: 5: Hoare triple {47574#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {47574#true} is VALID [2022-02-20 22:07:18,007 INFO L290 TraceCheckUtils]: 6: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:18,007 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {47574#true} {47574#true} #547#return; {47574#true} is VALID [2022-02-20 22:07:18,007 INFO L290 TraceCheckUtils]: 8: Hoare triple {47574#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {47574#true} is VALID [2022-02-20 22:07:18,007 INFO L272 TraceCheckUtils]: 9: Hoare triple {47574#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {47574#true} is VALID [2022-02-20 22:07:18,007 INFO L290 TraceCheckUtils]: 10: Hoare triple {47574#true} ~cond := #in~cond; {47574#true} is VALID [2022-02-20 22:07:18,007 INFO L290 TraceCheckUtils]: 11: Hoare triple {47574#true} assume !(0 == ~cond); {47574#true} is VALID [2022-02-20 22:07:18,007 INFO L290 TraceCheckUtils]: 12: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:18,007 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {47574#true} {47574#true} #549#return; {47574#true} is VALID [2022-02-20 22:07:18,007 INFO L290 TraceCheckUtils]: 14: Hoare triple {47574#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {47574#true} is VALID [2022-02-20 22:07:18,007 INFO L290 TraceCheckUtils]: 15: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:18,007 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {47574#true} {47574#true} #553#return; {47574#true} is VALID [2022-02-20 22:07:18,008 INFO L290 TraceCheckUtils]: 17: Hoare triple {47574#true} main_~tmp~17#1.base, main_~tmp~17#1.offset := main_#t~ret186#1.base, main_#t~ret186#1.offset;havoc main_#t~ret186#1.base, main_#t~ret186#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~17#1.base, main_~tmp~17#1.offset;assume { :begin_inline_ldv_initialize } true; {47574#true} is VALID [2022-02-20 22:07:18,008 INFO L290 TraceCheckUtils]: 18: Hoare triple {47574#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1; {47574#true} is VALID [2022-02-20 22:07:18,008 INFO L290 TraceCheckUtils]: 19: Hoare triple {47574#true} assume -2147483648 <= main_#t~nondet187#1 && main_#t~nondet187#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet187#1;havoc main_#t~nondet187#1;main_#t~switch188#1 := 0 == main_~tmp___0~6#1; {47574#true} is VALID [2022-02-20 22:07:18,008 INFO L290 TraceCheckUtils]: 20: Hoare triple {47574#true} assume !main_#t~switch188#1;main_#t~switch188#1 := main_#t~switch188#1 || 1 == main_~tmp___0~6#1; {47574#true} is VALID [2022-02-20 22:07:18,008 INFO L290 TraceCheckUtils]: 21: Hoare triple {47574#true} assume main_#t~switch188#1; {47574#true} is VALID [2022-02-20 22:07:18,008 INFO L290 TraceCheckUtils]: 22: Hoare triple {47574#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet192#1 && main_#t~nondet192#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet192#1;havoc main_#t~nondet192#1;main_#t~switch193#1 := 0 == main_~tmp___2~1#1; {47574#true} is VALID [2022-02-20 22:07:18,008 INFO L290 TraceCheckUtils]: 23: Hoare triple {47574#true} assume !main_#t~switch193#1;main_#t~switch193#1 := main_#t~switch193#1 || 1 == main_~tmp___2~1#1; {47574#true} is VALID [2022-02-20 22:07:18,009 INFO L290 TraceCheckUtils]: 24: Hoare triple {47574#true} assume main_#t~switch193#1; {47574#true} is VALID [2022-02-20 22:07:18,009 INFO L290 TraceCheckUtils]: 25: Hoare triple {47574#true} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_usb_acecad_init } true;havoc usb_acecad_init_#res#1;havoc usb_acecad_init_#t~ret183#1, usb_acecad_init_#t~nondet184#1, usb_acecad_init_~result~0#1, usb_acecad_init_~tmp~15#1;havoc usb_acecad_init_~result~0#1;havoc usb_acecad_init_~tmp~15#1;assume { :begin_inline_usb_register } true;usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc usb_register_#res#1;havoc usb_register_#t~ret31#1, usb_register_~driver#1.base, usb_register_~driver#1.offset, usb_register_~tmp~1#1;usb_register_~driver#1.base, usb_register_~driver#1.offset := usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset;havoc usb_register_~tmp~1#1;assume { :begin_inline_ldv_usb_register_driver_2 } true;ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset := usb_register_~driver#1.base, usb_register_~driver#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 4, 0;havoc ldv_usb_register_driver_2_#res#1;havoc ldv_usb_register_driver_2_#t~ret196#1, ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset, ldv_usb_register_driver_2_~ldv_func_res~0#1, ldv_usb_register_driver_2_~tmp~19#1;ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_2_~ldv_func_res~0#1;havoc ldv_usb_register_driver_2_~tmp~19#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet217#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet217#1 && usb_register_driver_#t~nondet217#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet217#1;havoc usb_register_driver_#t~nondet217#1; {47574#true} is VALID [2022-02-20 22:07:18,009 INFO L290 TraceCheckUtils]: 26: Hoare triple {47574#true} ldv_usb_register_driver_2_#t~ret196#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_2_#t~ret196#1 && ldv_usb_register_driver_2_#t~ret196#1 <= 2147483647;ldv_usb_register_driver_2_~tmp~19#1 := ldv_usb_register_driver_2_#t~ret196#1;havoc ldv_usb_register_driver_2_#t~ret196#1;ldv_usb_register_driver_2_~ldv_func_res~0#1 := ldv_usb_register_driver_2_~tmp~19#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset, ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset;havoc ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {47574#true} is VALID [2022-02-20 22:07:18,009 INFO L272 TraceCheckUtils]: 27: Hoare triple {47574#true} call ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset := ldv_init_zalloc(1248); {47574#true} is VALID [2022-02-20 22:07:18,009 INFO L290 TraceCheckUtils]: 28: Hoare triple {47574#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {47574#true} is VALID [2022-02-20 22:07:18,009 INFO L272 TraceCheckUtils]: 29: Hoare triple {47574#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {47574#true} is VALID [2022-02-20 22:07:18,009 INFO L290 TraceCheckUtils]: 30: Hoare triple {47574#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {47574#true} is VALID [2022-02-20 22:07:18,009 INFO L290 TraceCheckUtils]: 31: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:18,010 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {47574#true} {47574#true} #547#return; {47574#true} is VALID [2022-02-20 22:07:18,010 INFO L290 TraceCheckUtils]: 33: Hoare triple {47574#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {47574#true} is VALID [2022-02-20 22:07:18,010 INFO L272 TraceCheckUtils]: 34: Hoare triple {47574#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {47574#true} is VALID [2022-02-20 22:07:18,010 INFO L290 TraceCheckUtils]: 35: Hoare triple {47574#true} ~cond := #in~cond; {47574#true} is VALID [2022-02-20 22:07:18,010 INFO L290 TraceCheckUtils]: 36: Hoare triple {47574#true} assume !(0 == ~cond); {47574#true} is VALID [2022-02-20 22:07:18,010 INFO L290 TraceCheckUtils]: 37: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:18,010 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {47574#true} {47574#true} #549#return; {47574#true} is VALID [2022-02-20 22:07:18,010 INFO L290 TraceCheckUtils]: 39: Hoare triple {47574#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {47574#true} is VALID [2022-02-20 22:07:18,011 INFO L290 TraceCheckUtils]: 40: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:18,011 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {47574#true} {47574#true} #611#return; {47574#true} is VALID [2022-02-20 22:07:18,011 INFO L290 TraceCheckUtils]: 42: Hoare triple {47574#true} ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset := ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset;havoc ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {47574#true} is VALID [2022-02-20 22:07:18,011 INFO L290 TraceCheckUtils]: 43: Hoare triple {47574#true} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_2_#res#1 := ldv_usb_register_driver_2_~ldv_func_res~0#1; {47574#true} is VALID [2022-02-20 22:07:18,011 INFO L290 TraceCheckUtils]: 44: Hoare triple {47574#true} usb_register_#t~ret31#1 := ldv_usb_register_driver_2_#res#1;assume { :end_inline_ldv_usb_register_driver_2 } true;assume -2147483648 <= usb_register_#t~ret31#1 && usb_register_#t~ret31#1 <= 2147483647;usb_register_~tmp~1#1 := usb_register_#t~ret31#1;havoc usb_register_#t~ret31#1;usb_register_#res#1 := usb_register_~tmp~1#1; {47574#true} is VALID [2022-02-20 22:07:18,011 INFO L290 TraceCheckUtils]: 45: Hoare triple {47574#true} usb_acecad_init_#t~ret183#1 := usb_register_#res#1;assume { :end_inline_usb_register } true;assume -2147483648 <= usb_acecad_init_#t~ret183#1 && usb_acecad_init_#t~ret183#1 <= 2147483647;usb_acecad_init_~tmp~15#1 := usb_acecad_init_#t~ret183#1;havoc usb_acecad_init_#t~ret183#1;usb_acecad_init_~result~0#1 := usb_acecad_init_~tmp~15#1; {47574#true} is VALID [2022-02-20 22:07:18,011 INFO L290 TraceCheckUtils]: 46: Hoare triple {47574#true} assume 0 == usb_acecad_init_~result~0#1;havoc usb_acecad_init_#t~nondet184#1; {47574#true} is VALID [2022-02-20 22:07:18,012 INFO L290 TraceCheckUtils]: 47: Hoare triple {47574#true} usb_acecad_init_#res#1 := usb_acecad_init_~result~0#1; {47574#true} is VALID [2022-02-20 22:07:18,012 INFO L290 TraceCheckUtils]: 48: Hoare triple {47574#true} main_#t~ret194#1 := usb_acecad_init_#res#1;assume { :end_inline_usb_acecad_init } true;assume -2147483648 <= main_#t~ret194#1 && main_#t~ret194#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret194#1;havoc main_#t~ret194#1; {47574#true} is VALID [2022-02-20 22:07:18,012 INFO L290 TraceCheckUtils]: 49: Hoare triple {47574#true} assume 0 == ~ldv_retval_1~0;~ldv_state_variable_0~0 := 3; {47574#true} is VALID [2022-02-20 22:07:18,012 INFO L290 TraceCheckUtils]: 50: Hoare triple {47574#true} assume !(0 != ~ldv_retval_1~0); {47574#true} is VALID [2022-02-20 22:07:18,012 INFO L290 TraceCheckUtils]: 51: Hoare triple {47574#true} assume -2147483648 <= main_#t~nondet187#1 && main_#t~nondet187#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet187#1;havoc main_#t~nondet187#1;main_#t~switch188#1 := 0 == main_~tmp___0~6#1; {47574#true} is VALID [2022-02-20 22:07:18,012 INFO L290 TraceCheckUtils]: 52: Hoare triple {47574#true} assume main_#t~switch188#1; {47574#true} is VALID [2022-02-20 22:07:18,012 INFO L290 TraceCheckUtils]: 53: Hoare triple {47574#true} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= main_#t~nondet189#1 && main_#t~nondet189#1 <= 2147483647;main_~tmp___1~3#1 := main_#t~nondet189#1;havoc main_#t~nondet189#1;main_#t~switch190#1 := 0 == main_~tmp___1~3#1; {47574#true} is VALID [2022-02-20 22:07:18,012 INFO L290 TraceCheckUtils]: 54: Hoare triple {47574#true} assume main_#t~switch190#1; {47574#true} is VALID [2022-02-20 22:07:18,013 INFO L290 TraceCheckUtils]: 55: Hoare triple {47574#true} assume 1 == ~ldv_state_variable_1~0;assume { :begin_inline_usb_acecad_probe } true;usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset, usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset := ~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc usb_acecad_probe_#res#1;havoc usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset, usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset, usb_acecad_probe_#t~mem132#1, usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset, usb_acecad_probe_#t~ret134#1, usb_acecad_probe_#t~mem135#1, usb_acecad_probe_#t~ret136#1, usb_acecad_probe_#t~ret137#1, usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset, usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset, usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset, usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset, usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset, usb_acecad_probe_#t~mem143#1.base, usb_acecad_probe_#t~mem143#1.offset, usb_acecad_probe_#t~mem144#1.base, usb_acecad_probe_#t~mem144#1.offset, usb_acecad_probe_#t~mem145#1.base, usb_acecad_probe_#t~mem145#1.offset, usb_acecad_probe_#t~ret146#1, usb_acecad_probe_#t~mem147#1.base, usb_acecad_probe_#t~mem147#1.offset, usb_acecad_probe_#t~mem148#1.base, usb_acecad_probe_#t~mem148#1.offset, usb_acecad_probe_#t~ret149#1, usb_acecad_probe_#t~mem150#1.base, usb_acecad_probe_#t~mem150#1.offset, usb_acecad_probe_#t~ret151#1, usb_acecad_probe_#t~ret152#1, usb_acecad_probe_#t~ret153#1, usb_acecad_probe_#t~mem154#1, usb_acecad_probe_#t~switch155#1, usb_acecad_probe_#t~nondet156#1, usb_acecad_probe_#t~nondet157#1, usb_acecad_probe_#t~mem158#1, usb_acecad_probe_#t~mem159#1, usb_acecad_probe_#t~nondet160#1, usb_acecad_probe_#t~nondet161#1, usb_acecad_probe_#t~mem162#1, usb_acecad_probe_#t~mem163#1, usb_acecad_probe_#t~mem164#1.base, usb_acecad_probe_#t~mem164#1.offset, usb_acecad_probe_#t~mem165#1.base, usb_acecad_probe_#t~mem165#1.offset, usb_acecad_probe_#t~ite166#1, usb_acecad_probe_#t~mem167#1, usb_acecad_probe_#t~mem168#1.base, usb_acecad_probe_#t~mem168#1.offset, usb_acecad_probe_#t~mem169#1, usb_acecad_probe_#t~mem170#1.base, usb_acecad_probe_#t~mem170#1.offset, usb_acecad_probe_#t~mem171#1.base, usb_acecad_probe_#t~mem171#1.offset, usb_acecad_probe_#t~mem172#1, usb_acecad_probe_#t~mem173#1.base, usb_acecad_probe_#t~mem173#1.offset, usb_acecad_probe_#t~ret174#1, usb_acecad_probe_#t~mem175#1.base, usb_acecad_probe_#t~mem175#1.offset, usb_acecad_probe_#t~mem176#1, usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset, usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset, usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset, usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset, usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset, usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset, usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset, usb_acecad_probe_~pipe~0#1, usb_acecad_probe_~maxp~0#1, usb_acecad_probe_~err~0#1, usb_acecad_probe_~tmp___0~5#1, usb_acecad_probe_~tmp___1~2#1, usb_acecad_probe_~tmp___2~0#1, usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset, usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~tmp___5~0#1, usb_acecad_probe_~tmp___6~0#1;usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset := usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset;usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset := usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset;havoc usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset;havoc usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;havoc usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset;havoc usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset;havoc usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset;havoc usb_acecad_probe_~pipe~0#1;havoc usb_acecad_probe_~maxp~0#1;havoc usb_acecad_probe_~err~0#1;havoc usb_acecad_probe_~tmp___0~5#1;havoc usb_acecad_probe_~tmp___1~2#1;havoc usb_acecad_probe_~tmp___2~0#1;havoc usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;havoc usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset;havoc usb_acecad_probe_~tmp___5~0#1;havoc usb_acecad_probe_~tmp___6~0#1;assume { :begin_inline_interface_to_usbdev } true;interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset := usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset;havoc interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;havoc interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset, interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset, interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset := interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset;havoc interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;assume { :begin_inline_ldv_interface_to_usbdev } true;havoc ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;havoc ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset, ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset;havoc ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset; {47574#true} is VALID [2022-02-20 22:07:18,013 INFO L272 TraceCheckUtils]: 56: Hoare triple {47574#true} call ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset := ldv_malloc(1822); {47574#true} is VALID [2022-02-20 22:07:18,013 INFO L290 TraceCheckUtils]: 57: Hoare triple {47574#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {47574#true} is VALID [2022-02-20 22:07:18,013 INFO L290 TraceCheckUtils]: 58: Hoare triple {47574#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {47574#true} is VALID [2022-02-20 22:07:18,013 INFO L290 TraceCheckUtils]: 59: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:18,013 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {47574#true} {47574#true} #555#return; {47574#true} is VALID [2022-02-20 22:07:18,013 INFO L290 TraceCheckUtils]: 61: Hoare triple {47574#true} ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset := ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset;havoc ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset; {47574#true} is VALID [2022-02-20 22:07:18,014 INFO L290 TraceCheckUtils]: 62: Hoare triple {47574#true} assume !(0 == (ldv_interface_to_usbdev_~result~1#1.base + ldv_interface_to_usbdev_~result~1#1.offset) % 18446744073709551616);ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset := ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset; {47574#true} is VALID [2022-02-20 22:07:18,014 INFO L290 TraceCheckUtils]: 63: Hoare triple {47574#true} interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset := ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;assume { :end_inline_ldv_interface_to_usbdev } true;interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset := interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset;havoc interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset;interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset := interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset; {47574#true} is VALID [2022-02-20 22:07:18,014 INFO L290 TraceCheckUtils]: 64: Hoare triple {47574#true} usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset := interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;assume { :end_inline_interface_to_usbdev } true;usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset := usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset;havoc usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset;usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset := usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;call usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset := read~$Pointer$(usb_acecad_probe_~intf#1.base, 8 + usb_acecad_probe_~intf#1.offset, 8);usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset := usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset;havoc usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset;call usb_acecad_probe_#t~mem132#1 := read~int(usb_acecad_probe_~interface~0#1.base, 4 + usb_acecad_probe_~interface~0#1.offset, 1); {47574#true} is VALID [2022-02-20 22:07:18,014 INFO L290 TraceCheckUtils]: 65: Hoare triple {47574#true} assume !(1 != usb_acecad_probe_#t~mem132#1 % 256 % 4294967296);havoc usb_acecad_probe_#t~mem132#1;call usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset := read~$Pointer$(usb_acecad_probe_~interface~0#1.base, 9 + usb_acecad_probe_~interface~0#1.offset, 8);usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset := usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset;havoc usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset;assume { :begin_inline_usb_endpoint_is_int_in } true;usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset := usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_endpoint_is_int_in_#res#1;havoc usb_endpoint_is_int_in_#t~ret3#1, usb_endpoint_is_int_in_#t~ret4#1, usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset, usb_endpoint_is_int_in_~tmp~0#1, usb_endpoint_is_int_in_~tmp___0~0#1, usb_endpoint_is_int_in_~tmp___1~0#1;usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset := usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset;havoc usb_endpoint_is_int_in_~tmp~0#1;havoc usb_endpoint_is_int_in_~tmp___0~0#1;havoc usb_endpoint_is_int_in_~tmp___1~0#1;assume { :begin_inline_usb_endpoint_xfer_int } true;usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset := usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset;havoc usb_endpoint_xfer_int_#res#1;havoc usb_endpoint_xfer_int_#t~mem2#1, usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset;usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset := usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset;call usb_endpoint_xfer_int_#t~mem2#1 := read~int(usb_endpoint_xfer_int_~epd#1.base, 3 + usb_endpoint_xfer_int_~epd#1.offset, 1);usb_endpoint_xfer_int_#res#1 := (if 3 == (if 0 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 0 else (if 1 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 1 else ~bitwiseAnd(usb_endpoint_xfer_int_#t~mem2#1 % 256, 3))) then 1 else 0);havoc usb_endpoint_xfer_int_#t~mem2#1; {47574#true} is VALID [2022-02-20 22:07:18,014 INFO L290 TraceCheckUtils]: 66: Hoare triple {47574#true} usb_endpoint_is_int_in_#t~ret3#1 := usb_endpoint_xfer_int_#res#1;assume { :end_inline_usb_endpoint_xfer_int } true;assume -2147483648 <= usb_endpoint_is_int_in_#t~ret3#1 && usb_endpoint_is_int_in_#t~ret3#1 <= 2147483647;usb_endpoint_is_int_in_~tmp~0#1 := usb_endpoint_is_int_in_#t~ret3#1;havoc usb_endpoint_is_int_in_#t~ret3#1; {47574#true} is VALID [2022-02-20 22:07:18,014 INFO L290 TraceCheckUtils]: 67: Hoare triple {47574#true} assume 0 != usb_endpoint_is_int_in_~tmp~0#1;assume { :begin_inline_usb_endpoint_dir_in } true;usb_endpoint_dir_in_#in~epd#1.base, usb_endpoint_dir_in_#in~epd#1.offset := usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset;havoc usb_endpoint_dir_in_#res#1;havoc usb_endpoint_dir_in_#t~mem1#1, usb_endpoint_dir_in_~epd#1.base, usb_endpoint_dir_in_~epd#1.offset;usb_endpoint_dir_in_~epd#1.base, usb_endpoint_dir_in_~epd#1.offset := usb_endpoint_dir_in_#in~epd#1.base, usb_endpoint_dir_in_#in~epd#1.offset;call usb_endpoint_dir_in_#t~mem1#1 := read~int(usb_endpoint_dir_in_~epd#1.base, 2 + usb_endpoint_dir_in_~epd#1.offset, 1);usb_endpoint_dir_in_#res#1 := (if (if usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 <= 127 then usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 else usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 - 256) < 0 then 1 else 0);havoc usb_endpoint_dir_in_#t~mem1#1; {47574#true} is VALID [2022-02-20 22:07:18,014 INFO L290 TraceCheckUtils]: 68: Hoare triple {47574#true} usb_endpoint_is_int_in_#t~ret4#1 := usb_endpoint_dir_in_#res#1;assume { :end_inline_usb_endpoint_dir_in } true;assume -2147483648 <= usb_endpoint_is_int_in_#t~ret4#1 && usb_endpoint_is_int_in_#t~ret4#1 <= 2147483647;usb_endpoint_is_int_in_~tmp___0~0#1 := usb_endpoint_is_int_in_#t~ret4#1;havoc usb_endpoint_is_int_in_#t~ret4#1; {47574#true} is VALID [2022-02-20 22:07:18,014 INFO L290 TraceCheckUtils]: 69: Hoare triple {47574#true} assume 0 != usb_endpoint_is_int_in_~tmp___0~0#1;usb_endpoint_is_int_in_~tmp___1~0#1 := 1; {47574#true} is VALID [2022-02-20 22:07:18,015 INFO L290 TraceCheckUtils]: 70: Hoare triple {47574#true} usb_endpoint_is_int_in_#res#1 := usb_endpoint_is_int_in_~tmp___1~0#1; {47574#true} is VALID [2022-02-20 22:07:18,015 INFO L290 TraceCheckUtils]: 71: Hoare triple {47574#true} usb_acecad_probe_#t~ret134#1 := usb_endpoint_is_int_in_#res#1;assume { :end_inline_usb_endpoint_is_int_in } true;assume -2147483648 <= usb_acecad_probe_#t~ret134#1 && usb_acecad_probe_#t~ret134#1 <= 2147483647;usb_acecad_probe_~tmp___0~5#1 := usb_acecad_probe_#t~ret134#1;havoc usb_acecad_probe_#t~ret134#1; {47574#true} is VALID [2022-02-20 22:07:18,015 INFO L290 TraceCheckUtils]: 72: Hoare triple {47574#true} assume !(0 == usb_acecad_probe_~tmp___0~5#1);call usb_acecad_probe_#t~mem135#1 := read~int(usb_acecad_probe_~endpoint~0#1.base, 2 + usb_acecad_probe_~endpoint~0#1.offset, 1);assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_#t~mem135#1 % 256;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem45#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem45#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := (if (1 == 256 * __create_pipe_#t~mem45#1 || 0 == 256 * __create_pipe_#t~mem45#1) && 0 == 32768 * __create_pipe_~endpoint#1 then 256 * __create_pipe_#t~mem45#1 else (if 0 == 256 * __create_pipe_#t~mem45#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1) then 32768 * __create_pipe_~endpoint#1 else (if (1 == 256 * __create_pipe_#t~mem45#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1)) || ((1 == 256 * __create_pipe_#t~mem45#1 || 0 == 256 * __create_pipe_#t~mem45#1) && 1 == 32768 * __create_pipe_~endpoint#1) then 1 else ~bitwiseOr(256 * __create_pipe_#t~mem45#1, 32768 * __create_pipe_~endpoint#1))));havoc __create_pipe_#t~mem45#1; {47574#true} is VALID [2022-02-20 22:07:18,015 INFO L290 TraceCheckUtils]: 73: Hoare triple {47574#true} usb_acecad_probe_#t~ret136#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;usb_acecad_probe_~tmp___1~2#1 := usb_acecad_probe_#t~ret136#1;havoc usb_acecad_probe_#t~mem135#1;havoc usb_acecad_probe_#t~ret136#1;usb_acecad_probe_~pipe~0#1 := (if ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 else ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 - 4294967296);assume { :begin_inline_usb_maxpacket } true;usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset, usb_maxpacket_#in~pipe#1, usb_maxpacket_#in~is_out#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~pipe~0#1, (if 0 == (if 0 == usb_acecad_probe_~pipe~0#1 then 0 else (if 1 == usb_acecad_probe_~pipe~0#1 then 0 else ~bitwiseAnd(usb_acecad_probe_~pipe~0#1, 128))) then 1 else 0);havoc usb_maxpacket_#res#1;havoc usb_maxpacket_#t~ret47#1, usb_maxpacket_#t~ret48#1, usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset, usb_maxpacket_#t~ret50#1, usb_maxpacket_#t~ret51#1, usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset, usb_maxpacket_#t~mem53#1, usb_maxpacket_#t~nondet46#1, usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset, usb_maxpacket_~pipe#1, usb_maxpacket_~is_out#1, usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset, usb_maxpacket_~epnum~0#1, usb_maxpacket_~__ret_warn_on~0#1, usb_maxpacket_~tmp~2#1, usb_maxpacket_~__ret_warn_on___0~0#1, usb_maxpacket_~tmp___0~1#1;usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset := usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset;usb_maxpacket_~pipe#1 := usb_maxpacket_#in~pipe#1;usb_maxpacket_~is_out#1 := usb_maxpacket_#in~is_out#1;havoc usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset;havoc usb_maxpacket_~epnum~0#1;havoc usb_maxpacket_~__ret_warn_on~0#1;havoc usb_maxpacket_~tmp~2#1;havoc usb_maxpacket_~__ret_warn_on___0~0#1;havoc usb_maxpacket_~tmp___0~1#1; {47574#true} is VALID [2022-02-20 22:07:18,015 INFO L290 TraceCheckUtils]: 74: Hoare triple {47574#true} assume 0 == usb_maxpacket_~pipe#1 / 32768;usb_maxpacket_~epnum~0#1 := 0; {47574#true} is VALID [2022-02-20 22:07:18,015 INFO L290 TraceCheckUtils]: 75: Hoare triple {47574#true} assume !(0 != usb_maxpacket_~is_out#1);usb_maxpacket_~__ret_warn_on___0~0#1 := (if 0 == (if 0 == usb_maxpacket_~pipe#1 then 0 else (if 1 == usb_maxpacket_~pipe#1 then 0 else ~bitwiseAnd(usb_maxpacket_~pipe#1, 128))) then 1 else 0); {47574#true} is VALID [2022-02-20 22:07:18,015 INFO L272 TraceCheckUtils]: 76: Hoare triple {47574#true} call usb_maxpacket_#t~ret50#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {47574#true} is VALID [2022-02-20 22:07:18,016 INFO L290 TraceCheckUtils]: 77: Hoare triple {47574#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {47574#true} is VALID [2022-02-20 22:07:18,016 INFO L290 TraceCheckUtils]: 78: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:18,016 INFO L284 TraceCheckUtils]: 79: Hoare quadruple {47574#true} {47574#true} #563#return; {47574#true} is VALID [2022-02-20 22:07:18,016 INFO L290 TraceCheckUtils]: 80: Hoare triple {47574#true} assume -9223372036854775808 <= usb_maxpacket_#t~ret50#1 && usb_maxpacket_#t~ret50#1 <= 9223372036854775807;usb_maxpacket_~tmp___0~1#1 := usb_maxpacket_#t~ret50#1;havoc usb_maxpacket_#t~ret50#1; {47574#true} is VALID [2022-02-20 22:07:18,016 INFO L290 TraceCheckUtils]: 81: Hoare triple {47574#true} assume !(0 != usb_maxpacket_~tmp___0~1#1); {47574#true} is VALID [2022-02-20 22:07:18,016 INFO L272 TraceCheckUtils]: 82: Hoare triple {47574#true} call usb_maxpacket_#t~ret51#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {47574#true} is VALID [2022-02-20 22:07:18,016 INFO L290 TraceCheckUtils]: 83: Hoare triple {47574#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {47574#true} is VALID [2022-02-20 22:07:18,016 INFO L290 TraceCheckUtils]: 84: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:18,016 INFO L284 TraceCheckUtils]: 85: Hoare quadruple {47574#true} {47574#true} #567#return; {47574#true} is VALID [2022-02-20 22:07:18,017 INFO L290 TraceCheckUtils]: 86: Hoare triple {47574#true} assume -9223372036854775808 <= usb_maxpacket_#t~ret51#1 && usb_maxpacket_#t~ret51#1 <= 9223372036854775807;havoc usb_maxpacket_#t~ret51#1;call usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset := read~$Pointer$(usb_maxpacket_~udev#1.base, 1186 + usb_maxpacket_~udev#1.offset + 8 * (usb_maxpacket_~epnum~0#1 % 4294967296), 8);usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset := usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset;havoc usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset; {47574#true} is VALID [2022-02-20 22:07:18,017 INFO L290 TraceCheckUtils]: 87: Hoare triple {47574#true} assume 0 == (usb_maxpacket_~ep~0#1.base + usb_maxpacket_~ep~0#1.offset) % 18446744073709551616;usb_maxpacket_#res#1 := 0; {47574#true} is VALID [2022-02-20 22:07:18,017 INFO L290 TraceCheckUtils]: 88: Hoare triple {47574#true} usb_acecad_probe_#t~ret137#1 := usb_maxpacket_#res#1;assume { :end_inline_usb_maxpacket } true;usb_acecad_probe_~tmp___2~0#1 := usb_acecad_probe_#t~ret137#1;havoc usb_acecad_probe_#t~ret137#1;usb_acecad_probe_~maxp~0#1 := usb_acecad_probe_~tmp___2~0#1 % 65536; {47574#true} is VALID [2022-02-20 22:07:18,017 INFO L272 TraceCheckUtils]: 89: Hoare triple {47574#true} call usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset := kzalloc(232, 208); {47574#true} is VALID [2022-02-20 22:07:18,017 INFO L290 TraceCheckUtils]: 90: Hoare triple {47574#true} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {47574#true} is VALID [2022-02-20 22:07:18,017 INFO L272 TraceCheckUtils]: 91: Hoare triple {47574#true} call __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset := ldv_malloc(__kmalloc_~size#1); {47574#true} is VALID [2022-02-20 22:07:18,017 INFO L290 TraceCheckUtils]: 92: Hoare triple {47574#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {47574#true} is VALID [2022-02-20 22:07:18,017 INFO L290 TraceCheckUtils]: 93: Hoare triple {47574#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {47574#true} is VALID [2022-02-20 22:07:18,018 INFO L290 TraceCheckUtils]: 94: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:18,018 INFO L284 TraceCheckUtils]: 95: Hoare quadruple {47574#true} {47574#true} #539#return; {47574#true} is VALID [2022-02-20 22:07:18,018 INFO L290 TraceCheckUtils]: 96: Hoare triple {47574#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset; {47574#true} is VALID [2022-02-20 22:07:18,018 INFO L290 TraceCheckUtils]: 97: Hoare triple {47574#true} kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {47574#true} is VALID [2022-02-20 22:07:18,018 INFO L290 TraceCheckUtils]: 98: Hoare triple {47574#true} #t~ret58#1.base, #t~ret58#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret58#1.base, #t~ret58#1.offset;havoc #t~ret58#1.base, #t~ret58#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {47574#true} is VALID [2022-02-20 22:07:18,018 INFO L290 TraceCheckUtils]: 99: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:18,018 INFO L284 TraceCheckUtils]: 100: Hoare quadruple {47574#true} {47574#true} #569#return; {47574#true} is VALID [2022-02-20 22:07:18,018 INFO L290 TraceCheckUtils]: 101: Hoare triple {47574#true} usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset := usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset;havoc usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset;usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset := usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;assume { :begin_inline_input_allocate_device } true;havoc input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;havoc input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset; {47574#true} is VALID [2022-02-20 22:07:18,019 INFO L272 TraceCheckUtils]: 102: Hoare triple {47574#true} call input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset := kzalloc(1855, ~bitwiseOr(~bitwiseOr(16, 64), 128)); {47574#true} is VALID [2022-02-20 22:07:18,019 INFO L290 TraceCheckUtils]: 103: Hoare triple {47574#true} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {47574#true} is VALID [2022-02-20 22:07:18,019 INFO L272 TraceCheckUtils]: 104: Hoare triple {47574#true} call __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset := ldv_malloc(__kmalloc_~size#1); {47574#true} is VALID [2022-02-20 22:07:18,019 INFO L290 TraceCheckUtils]: 105: Hoare triple {47574#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {47574#true} is VALID [2022-02-20 22:07:18,019 INFO L290 TraceCheckUtils]: 106: Hoare triple {47574#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {47574#true} is VALID [2022-02-20 22:07:18,019 INFO L290 TraceCheckUtils]: 107: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:18,019 INFO L284 TraceCheckUtils]: 108: Hoare quadruple {47574#true} {47574#true} #539#return; {47574#true} is VALID [2022-02-20 22:07:18,019 INFO L290 TraceCheckUtils]: 109: Hoare triple {47574#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset; {47574#true} is VALID [2022-02-20 22:07:18,020 INFO L290 TraceCheckUtils]: 110: Hoare triple {47574#true} kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {47574#true} is VALID [2022-02-20 22:07:18,020 INFO L290 TraceCheckUtils]: 111: Hoare triple {47574#true} #t~ret58#1.base, #t~ret58#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret58#1.base, #t~ret58#1.offset;havoc #t~ret58#1.base, #t~ret58#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {47574#true} is VALID [2022-02-20 22:07:18,020 INFO L290 TraceCheckUtils]: 112: Hoare triple {47574#true} assume true; {47574#true} is VALID [2022-02-20 22:07:18,020 INFO L284 TraceCheckUtils]: 113: Hoare quadruple {47574#true} {47574#true} #571#return; {47574#true} is VALID [2022-02-20 22:07:18,020 INFO L290 TraceCheckUtils]: 114: Hoare triple {47574#true} input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset := input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset;havoc input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset; {47574#true} is VALID [2022-02-20 22:07:18,020 INFO L290 TraceCheckUtils]: 115: Hoare triple {47574#true} usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset := input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;assume { :end_inline_input_allocate_device } true;usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset := usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset;havoc usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset; {47574#true} is VALID [2022-02-20 22:07:18,020 INFO L290 TraceCheckUtils]: 116: Hoare triple {47574#true} assume !(0 == (usb_acecad_probe_~acecad~3#1.base + usb_acecad_probe_~acecad~3#1.offset) % 18446744073709551616 || 0 == (usb_acecad_probe_~input_dev~0#1.base + usb_acecad_probe_~input_dev~0#1.offset) % 18446744073709551616);assume { :begin_inline_usb_alloc_coherent } true;usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset, usb_alloc_coherent_#in~arg1#1, usb_alloc_coherent_#in~arg2#1, usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, 8, 208, usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset;havoc usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;havoc usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset, usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset, usb_alloc_coherent_~arg1#1, usb_alloc_coherent_~arg2#1, usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset;usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset := usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset;usb_alloc_coherent_~arg1#1 := usb_alloc_coherent_#in~arg1#1;usb_alloc_coherent_~arg2#1 := usb_alloc_coherent_#in~arg2#1;usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset := usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset; {47574#true} is VALID [2022-02-20 22:07:18,020 INFO L272 TraceCheckUtils]: 117: Hoare triple {47574#true} call usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset := ldv_malloc(0); {47574#true} is VALID [2022-02-20 22:07:18,021 INFO L290 TraceCheckUtils]: 118: Hoare triple {47574#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {47574#true} is VALID [2022-02-20 22:07:18,021 INFO L290 TraceCheckUtils]: 119: Hoare triple {47574#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {47669#(and (<= 0 |ldv_malloc_#res.base|) (<= |ldv_malloc_#res.offset| 0) (<= |ldv_malloc_#res.base| 0) (<= 0 |ldv_malloc_#res.offset|))} is VALID [2022-02-20 22:07:18,022 INFO L290 TraceCheckUtils]: 120: Hoare triple {47669#(and (<= 0 |ldv_malloc_#res.base|) (<= |ldv_malloc_#res.offset| 0) (<= |ldv_malloc_#res.base| 0) (<= 0 |ldv_malloc_#res.offset|))} assume true; {47669#(and (<= 0 |ldv_malloc_#res.base|) (<= |ldv_malloc_#res.offset| 0) (<= |ldv_malloc_#res.base| 0) (<= 0 |ldv_malloc_#res.offset|))} is VALID [2022-02-20 22:07:18,022 INFO L284 TraceCheckUtils]: 121: Hoare quadruple {47669#(and (<= 0 |ldv_malloc_#res.base|) (<= |ldv_malloc_#res.offset| 0) (<= |ldv_malloc_#res.base| 0) (<= 0 |ldv_malloc_#res.offset|))} {47574#true} #573#return; {48045#(and (<= 0 |ULTIMATE.start_usb_alloc_coherent_#t~ret215#1.base|) (<= |ULTIMATE.start_usb_alloc_coherent_#t~ret215#1.offset| 0) (<= |ULTIMATE.start_usb_alloc_coherent_#t~ret215#1.base| 0) (<= 0 |ULTIMATE.start_usb_alloc_coherent_#t~ret215#1.offset|))} is VALID [2022-02-20 22:07:18,023 INFO L290 TraceCheckUtils]: 122: Hoare triple {48045#(and (<= 0 |ULTIMATE.start_usb_alloc_coherent_#t~ret215#1.base|) (<= |ULTIMATE.start_usb_alloc_coherent_#t~ret215#1.offset| 0) (<= |ULTIMATE.start_usb_alloc_coherent_#t~ret215#1.base| 0) (<= 0 |ULTIMATE.start_usb_alloc_coherent_#t~ret215#1.offset|))} usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset := usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset;havoc usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset; {48049#(and (<= 0 |ULTIMATE.start_usb_alloc_coherent_#res#1.offset|) (<= |ULTIMATE.start_usb_alloc_coherent_#res#1.base| 0) (<= |ULTIMATE.start_usb_alloc_coherent_#res#1.offset| 0) (<= 0 |ULTIMATE.start_usb_alloc_coherent_#res#1.base|))} is VALID [2022-02-20 22:07:18,024 INFO L290 TraceCheckUtils]: 123: Hoare triple {48049#(and (<= 0 |ULTIMATE.start_usb_alloc_coherent_#res#1.offset|) (<= |ULTIMATE.start_usb_alloc_coherent_#res#1.base| 0) (<= |ULTIMATE.start_usb_alloc_coherent_#res#1.offset| 0) (<= 0 |ULTIMATE.start_usb_alloc_coherent_#res#1.base|))} usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset := usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;assume { :end_inline_usb_alloc_coherent } true;usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset := usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset;havoc usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset;call write~$Pointer$(usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8); {48053#(and (<= |ULTIMATE.start_usb_acecad_probe_#t~mem141#1.offset| 0) (<= 0 |ULTIMATE.start_usb_acecad_probe_#t~mem141#1.base|) (<= 0 |ULTIMATE.start_usb_acecad_probe_#t~mem141#1.offset|) (<= |ULTIMATE.start_usb_acecad_probe_#t~mem141#1.base| 0))} is VALID [2022-02-20 22:07:18,024 INFO L290 TraceCheckUtils]: 124: Hoare triple {48053#(and (<= |ULTIMATE.start_usb_acecad_probe_#t~mem141#1.offset| 0) (<= 0 |ULTIMATE.start_usb_acecad_probe_#t~mem141#1.base|) (<= 0 |ULTIMATE.start_usb_acecad_probe_#t~mem141#1.offset|) (<= |ULTIMATE.start_usb_acecad_probe_#t~mem141#1.base| 0))} assume !(0 == (usb_acecad_probe_#t~mem141#1.base + usb_acecad_probe_#t~mem141#1.offset) % 18446744073709551616);havoc usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset;assume { :begin_inline_ldv_usb_alloc_urb_5 } true;ldv_usb_alloc_urb_5_#in~ldv_func_arg1#1, ldv_usb_alloc_urb_5_#in~ldv_func_arg2#1 := 0, 208;havoc ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset, ldv_usb_alloc_urb_5_~ldv_func_arg1#1, ldv_usb_alloc_urb_5_~ldv_func_arg2#1, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset, ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;ldv_usb_alloc_urb_5_~ldv_func_arg1#1 := ldv_usb_alloc_urb_5_#in~ldv_func_arg1#1;ldv_usb_alloc_urb_5_~ldv_func_arg2#1 := ldv_usb_alloc_urb_5_#in~ldv_func_arg2#1;havoc ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset;havoc ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;assume { :begin_inline_usb_alloc_urb } true;usb_alloc_urb_#in~arg0#1, usb_alloc_urb_#in~arg1#1 := ldv_usb_alloc_urb_5_~ldv_func_arg1#1, ldv_usb_alloc_urb_5_~ldv_func_arg2#1;havoc usb_alloc_urb_#res#1.base, usb_alloc_urb_#res#1.offset;havoc usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset, usb_alloc_urb_~arg0#1, usb_alloc_urb_~arg1#1;usb_alloc_urb_~arg0#1 := usb_alloc_urb_#in~arg0#1;usb_alloc_urb_~arg1#1 := usb_alloc_urb_#in~arg1#1; {47575#false} is VALID [2022-02-20 22:07:18,024 INFO L272 TraceCheckUtils]: 125: Hoare triple {47575#false} call usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset := ldv_malloc(180); {47575#false} is VALID [2022-02-20 22:07:18,025 INFO L290 TraceCheckUtils]: 126: Hoare triple {47575#false} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {47575#false} is VALID [2022-02-20 22:07:18,025 INFO L290 TraceCheckUtils]: 127: Hoare triple {47575#false} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {47575#false} is VALID [2022-02-20 22:07:18,025 INFO L290 TraceCheckUtils]: 128: Hoare triple {47575#false} assume true; {47575#false} is VALID [2022-02-20 22:07:18,025 INFO L284 TraceCheckUtils]: 129: Hoare quadruple {47575#false} {47575#false} #575#return; {47575#false} is VALID [2022-02-20 22:07:18,025 INFO L290 TraceCheckUtils]: 130: Hoare triple {47575#false} usb_alloc_urb_#res#1.base, usb_alloc_urb_#res#1.offset := usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset;havoc usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset; {47575#false} is VALID [2022-02-20 22:07:18,025 INFO L290 TraceCheckUtils]: 131: Hoare triple {47575#false} ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset := usb_alloc_urb_#res#1.base, usb_alloc_urb_#res#1.offset;assume { :end_inline_usb_alloc_urb } true;ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset := ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset;ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset := ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;assume { :begin_inline_ldv_alloc_urb } true;ldv_alloc_urb_#in~res#1.base, ldv_alloc_urb_#in~res#1.offset := ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset;havoc ldv_alloc_urb_~res#1.base, ldv_alloc_urb_~res#1.offset;ldv_alloc_urb_~res#1.base, ldv_alloc_urb_~res#1.offset := ldv_alloc_urb_#in~res#1.base, ldv_alloc_urb_#in~res#1.offset; {47575#false} is VALID [2022-02-20 22:07:18,025 INFO L290 TraceCheckUtils]: 132: Hoare triple {47575#false} assume 0 != (ldv_alloc_urb_~res#1.base + ldv_alloc_urb_~res#1.offset) % 18446744073709551616;~URB_STATE~0 := 1 + ~URB_STATE~0; {47575#false} is VALID [2022-02-20 22:07:18,025 INFO L290 TraceCheckUtils]: 133: Hoare triple {47575#false} assume { :end_inline_ldv_alloc_urb } true;ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset := ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset; {47575#false} is VALID [2022-02-20 22:07:18,026 INFO L290 TraceCheckUtils]: 134: Hoare triple {47575#false} usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset := ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;assume { :end_inline_ldv_usb_alloc_urb_5 } true;call write~$Pointer$(usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset, usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8);havoc usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset;call usb_acecad_probe_#t~mem143#1.base, usb_acecad_probe_#t~mem143#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8); {47575#false} is VALID [2022-02-20 22:07:18,026 INFO L290 TraceCheckUtils]: 135: Hoare triple {47575#false} assume 0 == (usb_acecad_probe_#t~mem143#1.base + usb_acecad_probe_#t~mem143#1.offset) % 18446744073709551616;havoc usb_acecad_probe_#t~mem143#1.base, usb_acecad_probe_#t~mem143#1.offset;usb_acecad_probe_~err~0#1 := -12; {47575#false} is VALID [2022-02-20 22:07:18,026 INFO L290 TraceCheckUtils]: 136: Hoare triple {47575#false} call usb_acecad_probe_#t~mem175#1.base, usb_acecad_probe_#t~mem175#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem176#1 := read~int(usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset, 8); {47575#false} is VALID [2022-02-20 22:07:18,026 INFO L272 TraceCheckUtils]: 137: Hoare triple {47575#false} call usb_free_coherent(usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, 8, usb_acecad_probe_#t~mem175#1.base, usb_acecad_probe_#t~mem175#1.offset, usb_acecad_probe_#t~mem176#1); {47575#false} is VALID [2022-02-20 22:07:18,026 INFO L290 TraceCheckUtils]: 138: Hoare triple {47575#false} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1 := #in~arg1;~arg2.base, ~arg2.offset := #in~arg2.base, #in~arg2.offset;~arg3 := #in~arg3; {47575#false} is VALID [2022-02-20 22:07:18,026 INFO L290 TraceCheckUtils]: 139: Hoare triple {47575#false} assume true; {47575#false} is VALID [2022-02-20 22:07:18,026 INFO L284 TraceCheckUtils]: 140: Hoare quadruple {47575#false} {47575#false} #603#return; {47575#false} is VALID [2022-02-20 22:07:18,026 INFO L290 TraceCheckUtils]: 141: Hoare triple {47575#false} havoc usb_acecad_probe_#t~mem175#1.base, usb_acecad_probe_#t~mem175#1.offset;havoc usb_acecad_probe_#t~mem176#1; {47575#false} is VALID [2022-02-20 22:07:18,027 INFO L290 TraceCheckUtils]: 142: Hoare triple {47575#false} assume { :begin_inline_input_free_device } true;input_free_device_#in~arg0#1.base, input_free_device_#in~arg0#1.offset := usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset;havoc input_free_device_~arg0#1.base, input_free_device_~arg0#1.offset;input_free_device_~arg0#1.base, input_free_device_~arg0#1.offset := input_free_device_#in~arg0#1.base, input_free_device_#in~arg0#1.offset; {47575#false} is VALID [2022-02-20 22:07:18,027 INFO L290 TraceCheckUtils]: 143: Hoare triple {47575#false} assume { :end_inline_input_free_device } true; {47575#false} is VALID [2022-02-20 22:07:18,027 INFO L272 TraceCheckUtils]: 144: Hoare triple {47575#false} call kfree(usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset); {47575#false} is VALID [2022-02-20 22:07:18,027 INFO L290 TraceCheckUtils]: 145: Hoare triple {47575#false} ~p.base, ~p.offset := #in~p.base, #in~p.offset;call ULTIMATE.dealloc(~p.base, ~p.offset); {47575#false} is VALID [2022-02-20 22:07:18,027 INFO L290 TraceCheckUtils]: 146: Hoare triple {47575#false} assume true; {47575#false} is VALID [2022-02-20 22:07:18,027 INFO L284 TraceCheckUtils]: 147: Hoare quadruple {47575#false} {47575#false} #605#return; {47575#false} is VALID [2022-02-20 22:07:18,027 INFO L290 TraceCheckUtils]: 148: Hoare triple {47575#false} usb_acecad_probe_#res#1 := usb_acecad_probe_~err~0#1; {47575#false} is VALID [2022-02-20 22:07:18,027 INFO L290 TraceCheckUtils]: 149: Hoare triple {47575#false} main_#t~ret191#1 := usb_acecad_probe_#res#1;assume { :end_inline_usb_acecad_probe } true;assume -2147483648 <= main_#t~ret191#1 && main_#t~ret191#1 <= 2147483647;~ldv_retval_0~0 := main_#t~ret191#1;havoc main_#t~ret191#1; {47575#false} is VALID [2022-02-20 22:07:18,028 INFO L290 TraceCheckUtils]: 150: Hoare triple {47575#false} assume !(0 == ~ldv_retval_0~0); {47575#false} is VALID [2022-02-20 22:07:18,028 INFO L290 TraceCheckUtils]: 151: Hoare triple {47575#false} assume -2147483648 <= main_#t~nondet187#1 && main_#t~nondet187#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet187#1;havoc main_#t~nondet187#1;main_#t~switch188#1 := 0 == main_~tmp___0~6#1; {47575#false} is VALID [2022-02-20 22:07:18,028 INFO L290 TraceCheckUtils]: 152: Hoare triple {47575#false} assume !main_#t~switch188#1;main_#t~switch188#1 := main_#t~switch188#1 || 1 == main_~tmp___0~6#1; {47575#false} is VALID [2022-02-20 22:07:18,028 INFO L290 TraceCheckUtils]: 153: Hoare triple {47575#false} assume main_#t~switch188#1; {47575#false} is VALID [2022-02-20 22:07:18,028 INFO L290 TraceCheckUtils]: 154: Hoare triple {47575#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet192#1 && main_#t~nondet192#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet192#1;havoc main_#t~nondet192#1;main_#t~switch193#1 := 0 == main_~tmp___2~1#1; {47575#false} is VALID [2022-02-20 22:07:18,028 INFO L290 TraceCheckUtils]: 155: Hoare triple {47575#false} assume main_#t~switch193#1; {47575#false} is VALID [2022-02-20 22:07:18,028 INFO L290 TraceCheckUtils]: 156: Hoare triple {47575#false} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0;assume { :begin_inline_usb_acecad_exit } true;assume { :begin_inline_ldv_usb_deregister_11 } true;ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset := ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset;assume { :begin_inline_usb_deregister } true;usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset := ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;havoc usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset;usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset := usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset; {47575#false} is VALID [2022-02-20 22:07:18,028 INFO L290 TraceCheckUtils]: 157: Hoare triple {47575#false} assume { :end_inline_usb_deregister } true;~ldv_state_variable_1~0 := 0; {47575#false} is VALID [2022-02-20 22:07:18,028 INFO L290 TraceCheckUtils]: 158: Hoare triple {47575#false} assume { :end_inline_ldv_usb_deregister_11 } true; {47575#false} is VALID [2022-02-20 22:07:18,029 INFO L290 TraceCheckUtils]: 159: Hoare triple {47575#false} assume { :end_inline_usb_acecad_exit } true;~ldv_state_variable_0~0 := 2; {47575#false} is VALID [2022-02-20 22:07:18,029 INFO L290 TraceCheckUtils]: 160: Hoare triple {47575#false} assume { :begin_inline_ldv_check_final_state } true; {47575#false} is VALID [2022-02-20 22:07:18,029 INFO L290 TraceCheckUtils]: 161: Hoare triple {47575#false} assume 0 != ~URB_STATE~0; {47575#false} is VALID [2022-02-20 22:07:18,029 INFO L272 TraceCheckUtils]: 162: Hoare triple {47575#false} call ldv_error(); {47575#false} is VALID [2022-02-20 22:07:18,029 INFO L290 TraceCheckUtils]: 163: Hoare triple {47575#false} assume !false; {47575#false} is VALID [2022-02-20 22:07:18,029 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 29 proven. 0 refuted. 0 times theorem prover too weak. 44 trivial. 0 not checked. [2022-02-20 22:07:18,030 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-02-20 22:07:18,030 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1789972704] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:07:18,030 INFO L191 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-02-20 22:07:18,030 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [9] total 12 [2022-02-20 22:07:18,030 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [875719464] [2022-02-20 22:07:18,030 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:07:18,031 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 17.5) internal successors, (105), 5 states have internal predecessors, (105), 2 states have call successors, (15), 2 states have call predecessors, (15), 3 states have return successors, (14), 3 states have call predecessors, (14), 2 states have call successors, (14) Word has length 164 [2022-02-20 22:07:18,031 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:07:18,031 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 17.5) internal successors, (105), 5 states have internal predecessors, (105), 2 states have call successors, (15), 2 states have call predecessors, (15), 3 states have return successors, (14), 3 states have call predecessors, (14), 2 states have call successors, (14) [2022-02-20 22:07:18,111 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 134 edges. 134 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:18,111 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-02-20 22:07:18,111 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:07:18,112 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-02-20 22:07:18,112 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2022-02-20 22:07:18,112 INFO L87 Difference]: Start difference. First operand 919 states and 1191 transitions. Second operand has 6 states, 6 states have (on average 17.5) internal successors, (105), 5 states have internal predecessors, (105), 2 states have call successors, (15), 2 states have call predecessors, (15), 3 states have return successors, (14), 3 states have call predecessors, (14), 2 states have call successors, (14) [2022-02-20 22:07:20,035 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:20,036 INFO L93 Difference]: Finished difference Result 2201 states and 2930 transitions. [2022-02-20 22:07:20,036 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-02-20 22:07:20,036 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 17.5) internal successors, (105), 5 states have internal predecessors, (105), 2 states have call successors, (15), 2 states have call predecessors, (15), 3 states have return successors, (14), 3 states have call predecessors, (14), 2 states have call successors, (14) Word has length 164 [2022-02-20 22:07:20,036 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 22:07:20,036 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 17.5) internal successors, (105), 5 states have internal predecessors, (105), 2 states have call successors, (15), 2 states have call predecessors, (15), 3 states have return successors, (14), 3 states have call predecessors, (14), 2 states have call successors, (14) [2022-02-20 22:07:20,040 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 699 transitions. [2022-02-20 22:07:20,040 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 17.5) internal successors, (105), 5 states have internal predecessors, (105), 2 states have call successors, (15), 2 states have call predecessors, (15), 3 states have return successors, (14), 3 states have call predecessors, (14), 2 states have call successors, (14) [2022-02-20 22:07:20,044 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 699 transitions. [2022-02-20 22:07:20,044 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states and 699 transitions. [2022-02-20 22:07:20,490 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 699 edges. 699 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:20,568 INFO L225 Difference]: With dead ends: 2201 [2022-02-20 22:07:20,568 INFO L226 Difference]: Without dead ends: 1301 [2022-02-20 22:07:20,569 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 203 GetRequests, 191 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2022-02-20 22:07:20,570 INFO L933 BasicCegarLoop]: 405 mSDtfsCounter, 97 mSDsluCounter, 1504 mSDsCounter, 0 mSdLazyCounter, 22 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 110 SdHoareTripleChecker+Valid, 1909 SdHoareTripleChecker+Invalid, 23 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 22 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-02-20 22:07:20,570 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [110 Valid, 1909 Invalid, 23 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 22 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-02-20 22:07:20,571 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1301 states. [2022-02-20 22:07:21,023 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1301 to 939. [2022-02-20 22:07:21,023 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 22:07:21,025 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1301 states. Second operand has 939 states, 737 states have (on average 1.2537313432835822) internal successors, (924), 745 states have internal predecessors, (924), 142 states have call successors, (142), 56 states have call predecessors, (142), 59 states have return successors, (161), 145 states have call predecessors, (161), 141 states have call successors, (161) [2022-02-20 22:07:21,026 INFO L74 IsIncluded]: Start isIncluded. First operand 1301 states. Second operand has 939 states, 737 states have (on average 1.2537313432835822) internal successors, (924), 745 states have internal predecessors, (924), 142 states have call successors, (142), 56 states have call predecessors, (142), 59 states have return successors, (161), 145 states have call predecessors, (161), 141 states have call successors, (161) [2022-02-20 22:07:21,027 INFO L87 Difference]: Start difference. First operand 1301 states. Second operand has 939 states, 737 states have (on average 1.2537313432835822) internal successors, (924), 745 states have internal predecessors, (924), 142 states have call successors, (142), 56 states have call predecessors, (142), 59 states have return successors, (161), 145 states have call predecessors, (161), 141 states have call successors, (161) [2022-02-20 22:07:21,075 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:21,075 INFO L93 Difference]: Finished difference Result 1301 states and 1754 transitions. [2022-02-20 22:07:21,075 INFO L276 IsEmpty]: Start isEmpty. Operand 1301 states and 1754 transitions. [2022-02-20 22:07:21,078 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:21,078 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:21,079 INFO L74 IsIncluded]: Start isIncluded. First operand has 939 states, 737 states have (on average 1.2537313432835822) internal successors, (924), 745 states have internal predecessors, (924), 142 states have call successors, (142), 56 states have call predecessors, (142), 59 states have return successors, (161), 145 states have call predecessors, (161), 141 states have call successors, (161) Second operand 1301 states. [2022-02-20 22:07:21,080 INFO L87 Difference]: Start difference. First operand has 939 states, 737 states have (on average 1.2537313432835822) internal successors, (924), 745 states have internal predecessors, (924), 142 states have call successors, (142), 56 states have call predecessors, (142), 59 states have return successors, (161), 145 states have call predecessors, (161), 141 states have call successors, (161) Second operand 1301 states. [2022-02-20 22:07:21,145 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:21,145 INFO L93 Difference]: Finished difference Result 1301 states and 1754 transitions. [2022-02-20 22:07:21,145 INFO L276 IsEmpty]: Start isEmpty. Operand 1301 states and 1754 transitions. [2022-02-20 22:07:21,148 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:21,148 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:21,148 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 22:07:21,148 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 22:07:21,150 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 939 states, 737 states have (on average 1.2537313432835822) internal successors, (924), 745 states have internal predecessors, (924), 142 states have call successors, (142), 56 states have call predecessors, (142), 59 states have return successors, (161), 145 states have call predecessors, (161), 141 states have call successors, (161) [2022-02-20 22:07:21,190 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 939 states to 939 states and 1227 transitions. [2022-02-20 22:07:21,191 INFO L78 Accepts]: Start accepts. Automaton has 939 states and 1227 transitions. Word has length 164 [2022-02-20 22:07:21,191 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 22:07:21,191 INFO L470 AbstractCegarLoop]: Abstraction has 939 states and 1227 transitions. [2022-02-20 22:07:21,192 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 17.5) internal successors, (105), 5 states have internal predecessors, (105), 2 states have call successors, (15), 2 states have call predecessors, (15), 3 states have return successors, (14), 3 states have call predecessors, (14), 2 states have call successors, (14) [2022-02-20 22:07:21,192 INFO L276 IsEmpty]: Start isEmpty. Operand 939 states and 1227 transitions. [2022-02-20 22:07:21,194 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 171 [2022-02-20 22:07:21,194 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:07:21,194 INFO L514 BasicCegarLoop]: trace histogram [5, 5, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:07:21,217 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-02-20 22:07:21,395 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable10 [2022-02-20 22:07:21,395 INFO L402 AbstractCegarLoop]: === Iteration 12 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:07:21,396 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:07:21,396 INFO L85 PathProgramCache]: Analyzing trace with hash -1954792649, now seen corresponding path program 1 times [2022-02-20 22:07:21,396 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:07:21,396 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1474779370] [2022-02-20 22:07:21,396 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:07:21,396 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:07:21,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:21,502 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 22:07:21,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:21,514 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:21,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:21,518 INFO L290 TraceCheckUtils]: 0: Hoare triple {55266#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {55174#true} is VALID [2022-02-20 22:07:21,518 INFO L290 TraceCheckUtils]: 1: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:21,518 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {55174#true} {55174#true} #547#return; {55174#true} is VALID [2022-02-20 22:07:21,518 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:21,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:21,521 INFO L290 TraceCheckUtils]: 0: Hoare triple {55174#true} ~cond := #in~cond; {55174#true} is VALID [2022-02-20 22:07:21,521 INFO L290 TraceCheckUtils]: 1: Hoare triple {55174#true} assume !(0 == ~cond); {55174#true} is VALID [2022-02-20 22:07:21,521 INFO L290 TraceCheckUtils]: 2: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:21,521 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {55174#true} {55174#true} #549#return; {55174#true} is VALID [2022-02-20 22:07:21,521 INFO L290 TraceCheckUtils]: 0: Hoare triple {55258#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {55174#true} is VALID [2022-02-20 22:07:21,522 INFO L272 TraceCheckUtils]: 1: Hoare triple {55174#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {55266#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:21,522 INFO L290 TraceCheckUtils]: 2: Hoare triple {55266#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {55174#true} is VALID [2022-02-20 22:07:21,522 INFO L290 TraceCheckUtils]: 3: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:21,522 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {55174#true} {55174#true} #547#return; {55174#true} is VALID [2022-02-20 22:07:21,523 INFO L290 TraceCheckUtils]: 5: Hoare triple {55174#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {55174#true} is VALID [2022-02-20 22:07:21,523 INFO L272 TraceCheckUtils]: 6: Hoare triple {55174#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {55174#true} is VALID [2022-02-20 22:07:21,523 INFO L290 TraceCheckUtils]: 7: Hoare triple {55174#true} ~cond := #in~cond; {55174#true} is VALID [2022-02-20 22:07:21,523 INFO L290 TraceCheckUtils]: 8: Hoare triple {55174#true} assume !(0 == ~cond); {55174#true} is VALID [2022-02-20 22:07:21,523 INFO L290 TraceCheckUtils]: 9: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:21,523 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {55174#true} {55174#true} #549#return; {55174#true} is VALID [2022-02-20 22:07:21,523 INFO L290 TraceCheckUtils]: 11: Hoare triple {55174#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {55174#true} is VALID [2022-02-20 22:07:21,523 INFO L290 TraceCheckUtils]: 12: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:21,524 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {55174#true} {55174#true} #553#return; {55174#true} is VALID [2022-02-20 22:07:21,524 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 27 [2022-02-20 22:07:21,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:21,528 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:21,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:21,531 INFO L290 TraceCheckUtils]: 0: Hoare triple {55266#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {55174#true} is VALID [2022-02-20 22:07:21,531 INFO L290 TraceCheckUtils]: 1: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:21,531 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {55174#true} {55174#true} #547#return; {55174#true} is VALID [2022-02-20 22:07:21,531 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:21,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:21,534 INFO L290 TraceCheckUtils]: 0: Hoare triple {55174#true} ~cond := #in~cond; {55174#true} is VALID [2022-02-20 22:07:21,534 INFO L290 TraceCheckUtils]: 1: Hoare triple {55174#true} assume !(0 == ~cond); {55174#true} is VALID [2022-02-20 22:07:21,534 INFO L290 TraceCheckUtils]: 2: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:21,534 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {55174#true} {55174#true} #549#return; {55174#true} is VALID [2022-02-20 22:07:21,535 INFO L290 TraceCheckUtils]: 0: Hoare triple {55258#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {55174#true} is VALID [2022-02-20 22:07:21,535 INFO L272 TraceCheckUtils]: 1: Hoare triple {55174#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {55266#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:21,535 INFO L290 TraceCheckUtils]: 2: Hoare triple {55266#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {55174#true} is VALID [2022-02-20 22:07:21,536 INFO L290 TraceCheckUtils]: 3: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:21,536 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {55174#true} {55174#true} #547#return; {55174#true} is VALID [2022-02-20 22:07:21,536 INFO L290 TraceCheckUtils]: 5: Hoare triple {55174#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {55174#true} is VALID [2022-02-20 22:07:21,536 INFO L272 TraceCheckUtils]: 6: Hoare triple {55174#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {55174#true} is VALID [2022-02-20 22:07:21,536 INFO L290 TraceCheckUtils]: 7: Hoare triple {55174#true} ~cond := #in~cond; {55174#true} is VALID [2022-02-20 22:07:21,536 INFO L290 TraceCheckUtils]: 8: Hoare triple {55174#true} assume !(0 == ~cond); {55174#true} is VALID [2022-02-20 22:07:21,536 INFO L290 TraceCheckUtils]: 9: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:21,536 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {55174#true} {55174#true} #549#return; {55174#true} is VALID [2022-02-20 22:07:21,537 INFO L290 TraceCheckUtils]: 11: Hoare triple {55174#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {55174#true} is VALID [2022-02-20 22:07:21,537 INFO L290 TraceCheckUtils]: 12: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:21,537 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {55174#true} {55174#true} #611#return; {55174#true} is VALID [2022-02-20 22:07:21,542 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 56 [2022-02-20 22:07:21,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:21,572 INFO L290 TraceCheckUtils]: 0: Hoare triple {55274#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {55174#true} is VALID [2022-02-20 22:07:21,573 INFO L290 TraceCheckUtils]: 1: Hoare triple {55174#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {55275#(and (<= 0 |ldv_malloc_#res.base|) (<= |ldv_malloc_#res.offset| 0) (<= |ldv_malloc_#res.base| 0) (<= 0 |ldv_malloc_#res.offset|))} is VALID [2022-02-20 22:07:21,573 INFO L290 TraceCheckUtils]: 2: Hoare triple {55275#(and (<= 0 |ldv_malloc_#res.base|) (<= |ldv_malloc_#res.offset| 0) (<= |ldv_malloc_#res.base| 0) (<= 0 |ldv_malloc_#res.offset|))} assume true; {55275#(and (<= 0 |ldv_malloc_#res.base|) (<= |ldv_malloc_#res.offset| 0) (<= |ldv_malloc_#res.base| 0) (<= 0 |ldv_malloc_#res.offset|))} is VALID [2022-02-20 22:07:21,574 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {55275#(and (<= 0 |ldv_malloc_#res.base|) (<= |ldv_malloc_#res.offset| 0) (<= |ldv_malloc_#res.base| 0) (<= 0 |ldv_malloc_#res.offset|))} {55174#true} #555#return; {55208#(and (= |ULTIMATE.start_ldv_interface_to_usbdev_#t~ret208#1.offset| 0) (= |ULTIMATE.start_ldv_interface_to_usbdev_#t~ret208#1.base| 0))} is VALID [2022-02-20 22:07:21,574 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 76 [2022-02-20 22:07:21,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:21,579 INFO L290 TraceCheckUtils]: 0: Hoare triple {55174#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {55174#true} is VALID [2022-02-20 22:07:21,579 INFO L290 TraceCheckUtils]: 1: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:21,579 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {55174#true} {55175#false} #563#return; {55175#false} is VALID [2022-02-20 22:07:21,579 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 82 [2022-02-20 22:07:21,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:21,582 INFO L290 TraceCheckUtils]: 0: Hoare triple {55174#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {55174#true} is VALID [2022-02-20 22:07:21,583 INFO L290 TraceCheckUtils]: 1: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:21,583 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {55174#true} {55175#false} #567#return; {55175#false} is VALID [2022-02-20 22:07:21,583 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 89 [2022-02-20 22:07:21,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:21,589 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:21,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:21,593 INFO L290 TraceCheckUtils]: 0: Hoare triple {55274#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {55174#true} is VALID [2022-02-20 22:07:21,593 INFO L290 TraceCheckUtils]: 1: Hoare triple {55174#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {55174#true} is VALID [2022-02-20 22:07:21,593 INFO L290 TraceCheckUtils]: 2: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:21,593 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {55174#true} {55174#true} #539#return; {55174#true} is VALID [2022-02-20 22:07:21,594 INFO L290 TraceCheckUtils]: 0: Hoare triple {55274#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {55174#true} is VALID [2022-02-20 22:07:21,595 INFO L272 TraceCheckUtils]: 1: Hoare triple {55174#true} call __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset := ldv_malloc(__kmalloc_~size#1); {55274#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:21,595 INFO L290 TraceCheckUtils]: 2: Hoare triple {55274#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {55174#true} is VALID [2022-02-20 22:07:21,595 INFO L290 TraceCheckUtils]: 3: Hoare triple {55174#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {55174#true} is VALID [2022-02-20 22:07:21,595 INFO L290 TraceCheckUtils]: 4: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:21,595 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {55174#true} {55174#true} #539#return; {55174#true} is VALID [2022-02-20 22:07:21,595 INFO L290 TraceCheckUtils]: 6: Hoare triple {55174#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset; {55174#true} is VALID [2022-02-20 22:07:21,595 INFO L290 TraceCheckUtils]: 7: Hoare triple {55174#true} kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {55174#true} is VALID [2022-02-20 22:07:21,596 INFO L290 TraceCheckUtils]: 8: Hoare triple {55174#true} #t~ret58#1.base, #t~ret58#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret58#1.base, #t~ret58#1.offset;havoc #t~ret58#1.base, #t~ret58#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {55174#true} is VALID [2022-02-20 22:07:21,596 INFO L290 TraceCheckUtils]: 9: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:21,596 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {55174#true} {55175#false} #569#return; {55175#false} is VALID [2022-02-20 22:07:21,596 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 102 [2022-02-20 22:07:21,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:21,601 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:21,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:21,605 INFO L290 TraceCheckUtils]: 0: Hoare triple {55274#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {55174#true} is VALID [2022-02-20 22:07:21,605 INFO L290 TraceCheckUtils]: 1: Hoare triple {55174#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {55174#true} is VALID [2022-02-20 22:07:21,605 INFO L290 TraceCheckUtils]: 2: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:21,605 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {55174#true} {55174#true} #539#return; {55174#true} is VALID [2022-02-20 22:07:21,605 INFO L290 TraceCheckUtils]: 0: Hoare triple {55274#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {55174#true} is VALID [2022-02-20 22:07:21,606 INFO L272 TraceCheckUtils]: 1: Hoare triple {55174#true} call __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset := ldv_malloc(__kmalloc_~size#1); {55274#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:21,606 INFO L290 TraceCheckUtils]: 2: Hoare triple {55274#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {55174#true} is VALID [2022-02-20 22:07:21,606 INFO L290 TraceCheckUtils]: 3: Hoare triple {55174#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {55174#true} is VALID [2022-02-20 22:07:21,606 INFO L290 TraceCheckUtils]: 4: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:21,606 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {55174#true} {55174#true} #539#return; {55174#true} is VALID [2022-02-20 22:07:21,606 INFO L290 TraceCheckUtils]: 6: Hoare triple {55174#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset; {55174#true} is VALID [2022-02-20 22:07:21,607 INFO L290 TraceCheckUtils]: 7: Hoare triple {55174#true} kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {55174#true} is VALID [2022-02-20 22:07:21,607 INFO L290 TraceCheckUtils]: 8: Hoare triple {55174#true} #t~ret58#1.base, #t~ret58#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret58#1.base, #t~ret58#1.offset;havoc #t~ret58#1.base, #t~ret58#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {55174#true} is VALID [2022-02-20 22:07:21,607 INFO L290 TraceCheckUtils]: 9: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:21,607 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {55174#true} {55175#false} #571#return; {55175#false} is VALID [2022-02-20 22:07:21,607 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 117 [2022-02-20 22:07:21,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:21,615 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 22:07:21,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:21,618 INFO L290 TraceCheckUtils]: 0: Hoare triple {55174#true} ~cond := #in~cond; {55174#true} is VALID [2022-02-20 22:07:21,618 INFO L290 TraceCheckUtils]: 1: Hoare triple {55174#true} assume !(0 == ~cond); {55174#true} is VALID [2022-02-20 22:07:21,618 INFO L290 TraceCheckUtils]: 2: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:21,618 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {55174#true} {55174#true} #551#return; {55174#true} is VALID [2022-02-20 22:07:21,618 INFO L290 TraceCheckUtils]: 0: Hoare triple {55274#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {55174#true} is VALID [2022-02-20 22:07:21,618 INFO L290 TraceCheckUtils]: 1: Hoare triple {55174#true} assume !(0 != ~tmp___0~2);call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size);~tmp~4.base, ~tmp~4.offset := #t~malloc63.base, #t~malloc63.offset;havoc #t~malloc63.base, #t~malloc63.offset;~p~0.base, ~p~0.offset := ~tmp~4.base, ~tmp~4.offset; {55174#true} is VALID [2022-02-20 22:07:21,618 INFO L272 TraceCheckUtils]: 2: Hoare triple {55174#true} call assume_abort_if_not((if 0 != (~p~0.base + ~p~0.offset) % 18446744073709551616 then 1 else 0)); {55174#true} is VALID [2022-02-20 22:07:21,619 INFO L290 TraceCheckUtils]: 3: Hoare triple {55174#true} ~cond := #in~cond; {55174#true} is VALID [2022-02-20 22:07:21,619 INFO L290 TraceCheckUtils]: 4: Hoare triple {55174#true} assume !(0 == ~cond); {55174#true} is VALID [2022-02-20 22:07:21,619 INFO L290 TraceCheckUtils]: 5: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:21,619 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {55174#true} {55174#true} #551#return; {55174#true} is VALID [2022-02-20 22:07:21,619 INFO L290 TraceCheckUtils]: 7: Hoare triple {55174#true} #res.base, #res.offset := ~p~0.base, ~p~0.offset; {55174#true} is VALID [2022-02-20 22:07:21,619 INFO L290 TraceCheckUtils]: 8: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:21,619 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {55174#true} {55175#false} #573#return; {55175#false} is VALID [2022-02-20 22:07:21,619 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 131 [2022-02-20 22:07:21,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:21,623 INFO L290 TraceCheckUtils]: 0: Hoare triple {55274#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {55174#true} is VALID [2022-02-20 22:07:21,623 INFO L290 TraceCheckUtils]: 1: Hoare triple {55174#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {55174#true} is VALID [2022-02-20 22:07:21,623 INFO L290 TraceCheckUtils]: 2: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:21,624 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {55174#true} {55175#false} #575#return; {55175#false} is VALID [2022-02-20 22:07:21,624 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 143 [2022-02-20 22:07:21,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:21,628 INFO L290 TraceCheckUtils]: 0: Hoare triple {55174#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1 := #in~arg1;~arg2.base, ~arg2.offset := #in~arg2.base, #in~arg2.offset;~arg3 := #in~arg3; {55174#true} is VALID [2022-02-20 22:07:21,628 INFO L290 TraceCheckUtils]: 1: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:21,628 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {55174#true} {55175#false} #603#return; {55175#false} is VALID [2022-02-20 22:07:21,633 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 150 [2022-02-20 22:07:21,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:21,636 INFO L290 TraceCheckUtils]: 0: Hoare triple {55288#(= |old(#valid)| |#valid|)} ~p.base, ~p.offset := #in~p.base, #in~p.offset;call ULTIMATE.dealloc(~p.base, ~p.offset); {55174#true} is VALID [2022-02-20 22:07:21,636 INFO L290 TraceCheckUtils]: 1: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:21,636 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {55174#true} {55175#false} #605#return; {55175#false} is VALID [2022-02-20 22:07:21,637 INFO L290 TraceCheckUtils]: 0: Hoare triple {55174#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(99, 2);call #Ultimate.allocInit(10, 3);call #Ultimate.allocInit(7, 4);call write~init~int(97, 4, 0, 1);call write~init~int(99, 4, 1, 1);call write~init~int(101, 4, 2, 1);call write~init~int(99, 4, 3, 1);call write~init~int(97, 4, 4, 1);call write~init~int(100, 4, 5, 1);call write~init~int(0, 4, 6, 1);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(20, 6);call #Ultimate.allocInit(57, 7);call #Ultimate.allocInit(2, 8);call write~init~int(32, 8, 0, 1);call write~init~int(0, 8, 1, 1);call #Ultimate.allocInit(8, 9);call #Ultimate.allocInit(34, 10);call #Ultimate.allocInit(32, 11);call #Ultimate.allocInit(11, 12);call #Ultimate.allocInit(48, 13);~LDV_IN_INTERRUPT~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset := 14, 0;call #Ultimate.allocInit(72, 14);call write~init~int(3, ~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 2 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(4, ~#usb_acecad_id_table~0.base, 4 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 6 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 8 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 10 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 11 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 12 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 13 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 14 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 15 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 16 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(3, ~#usb_acecad_id_table~0.base, 24 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 26 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(8, ~#usb_acecad_id_table~0.base, 28 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 30 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 32 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 34 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 35 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 36 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 37 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 38 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 39 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(1, ~#usb_acecad_id_table~0.base, 40 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(0, ~#usb_acecad_id_table~0.base, 48 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 50 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 52 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 54 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 56 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 58 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 59 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 60 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 61 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 62 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 63 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 64 + ~#usb_acecad_id_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.driver_info := 0;~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset := 15, 0;call #Ultimate.allocInit(264, 15);call write~init~$Pointer$(12, 0, ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_probe.base, #funAddr~usb_acecad_probe.offset, ~#usb_acecad_driver~0.base, 8 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_disconnect.base, #funAddr~usb_acecad_disconnect.offset, ~#usb_acecad_driver~0.base, 16 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 24 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 32 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 40 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 48 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 56 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 64 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, ~#usb_acecad_driver~0.base, 72 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 80 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 84 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 88 + ~#usb_acecad_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 92 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 100 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 108 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 116 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 124 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 132 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 136 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 144 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 152 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 160 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 168 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 176 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 184 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 192 + ~#usb_acecad_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 193 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 201 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 209 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 217 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 225 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 233 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 241 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 249 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 257 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 261 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 262 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 263 + ~#usb_acecad_driver~0.offset, 1);~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~URB_STATE~0 := 0;~DEV_STATE~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~int_urb~0.base, ~int_urb~0.offset := 0, 0;~bulk_urb~0.base, ~bulk_urb~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {55174#true} is VALID [2022-02-20 22:07:21,637 INFO L290 TraceCheckUtils]: 1: Hoare triple {55174#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret186#1.base, main_#t~ret186#1.offset, main_#t~nondet187#1, main_#t~switch188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~ret191#1, main_#t~nondet192#1, main_#t~switch193#1, main_#t~ret194#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~17#1.base, main_~tmp~17#1.offset, main_~tmp___0~6#1, main_~tmp___1~3#1, main_~tmp___2~1#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~17#1.base, main_~tmp~17#1.offset;havoc main_~tmp___0~6#1;havoc main_~tmp___1~3#1;havoc main_~tmp___2~1#1; {55174#true} is VALID [2022-02-20 22:07:21,637 INFO L272 TraceCheckUtils]: 2: Hoare triple {55174#true} call main_#t~ret186#1.base, main_#t~ret186#1.offset := ldv_init_zalloc(24); {55258#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:21,637 INFO L290 TraceCheckUtils]: 3: Hoare triple {55258#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {55174#true} is VALID [2022-02-20 22:07:21,638 INFO L272 TraceCheckUtils]: 4: Hoare triple {55174#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {55266#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:21,638 INFO L290 TraceCheckUtils]: 5: Hoare triple {55266#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {55174#true} is VALID [2022-02-20 22:07:21,638 INFO L290 TraceCheckUtils]: 6: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:21,639 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {55174#true} {55174#true} #547#return; {55174#true} is VALID [2022-02-20 22:07:21,639 INFO L290 TraceCheckUtils]: 8: Hoare triple {55174#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {55174#true} is VALID [2022-02-20 22:07:21,639 INFO L272 TraceCheckUtils]: 9: Hoare triple {55174#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {55174#true} is VALID [2022-02-20 22:07:21,639 INFO L290 TraceCheckUtils]: 10: Hoare triple {55174#true} ~cond := #in~cond; {55174#true} is VALID [2022-02-20 22:07:21,639 INFO L290 TraceCheckUtils]: 11: Hoare triple {55174#true} assume !(0 == ~cond); {55174#true} is VALID [2022-02-20 22:07:21,639 INFO L290 TraceCheckUtils]: 12: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:21,639 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {55174#true} {55174#true} #549#return; {55174#true} is VALID [2022-02-20 22:07:21,639 INFO L290 TraceCheckUtils]: 14: Hoare triple {55174#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {55174#true} is VALID [2022-02-20 22:07:21,639 INFO L290 TraceCheckUtils]: 15: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:21,640 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {55174#true} {55174#true} #553#return; {55174#true} is VALID [2022-02-20 22:07:21,640 INFO L290 TraceCheckUtils]: 17: Hoare triple {55174#true} main_~tmp~17#1.base, main_~tmp~17#1.offset := main_#t~ret186#1.base, main_#t~ret186#1.offset;havoc main_#t~ret186#1.base, main_#t~ret186#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~17#1.base, main_~tmp~17#1.offset;assume { :begin_inline_ldv_initialize } true; {55174#true} is VALID [2022-02-20 22:07:21,640 INFO L290 TraceCheckUtils]: 18: Hoare triple {55174#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1; {55174#true} is VALID [2022-02-20 22:07:21,640 INFO L290 TraceCheckUtils]: 19: Hoare triple {55174#true} assume -2147483648 <= main_#t~nondet187#1 && main_#t~nondet187#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet187#1;havoc main_#t~nondet187#1;main_#t~switch188#1 := 0 == main_~tmp___0~6#1; {55174#true} is VALID [2022-02-20 22:07:21,640 INFO L290 TraceCheckUtils]: 20: Hoare triple {55174#true} assume !main_#t~switch188#1;main_#t~switch188#1 := main_#t~switch188#1 || 1 == main_~tmp___0~6#1; {55174#true} is VALID [2022-02-20 22:07:21,640 INFO L290 TraceCheckUtils]: 21: Hoare triple {55174#true} assume main_#t~switch188#1; {55174#true} is VALID [2022-02-20 22:07:21,640 INFO L290 TraceCheckUtils]: 22: Hoare triple {55174#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet192#1 && main_#t~nondet192#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet192#1;havoc main_#t~nondet192#1;main_#t~switch193#1 := 0 == main_~tmp___2~1#1; {55174#true} is VALID [2022-02-20 22:07:21,640 INFO L290 TraceCheckUtils]: 23: Hoare triple {55174#true} assume !main_#t~switch193#1;main_#t~switch193#1 := main_#t~switch193#1 || 1 == main_~tmp___2~1#1; {55174#true} is VALID [2022-02-20 22:07:21,641 INFO L290 TraceCheckUtils]: 24: Hoare triple {55174#true} assume main_#t~switch193#1; {55174#true} is VALID [2022-02-20 22:07:21,641 INFO L290 TraceCheckUtils]: 25: Hoare triple {55174#true} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_usb_acecad_init } true;havoc usb_acecad_init_#res#1;havoc usb_acecad_init_#t~ret183#1, usb_acecad_init_#t~nondet184#1, usb_acecad_init_~result~0#1, usb_acecad_init_~tmp~15#1;havoc usb_acecad_init_~result~0#1;havoc usb_acecad_init_~tmp~15#1;assume { :begin_inline_usb_register } true;usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc usb_register_#res#1;havoc usb_register_#t~ret31#1, usb_register_~driver#1.base, usb_register_~driver#1.offset, usb_register_~tmp~1#1;usb_register_~driver#1.base, usb_register_~driver#1.offset := usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset;havoc usb_register_~tmp~1#1;assume { :begin_inline_ldv_usb_register_driver_2 } true;ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset := usb_register_~driver#1.base, usb_register_~driver#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 4, 0;havoc ldv_usb_register_driver_2_#res#1;havoc ldv_usb_register_driver_2_#t~ret196#1, ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset, ldv_usb_register_driver_2_~ldv_func_res~0#1, ldv_usb_register_driver_2_~tmp~19#1;ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_2_~ldv_func_res~0#1;havoc ldv_usb_register_driver_2_~tmp~19#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet217#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet217#1 && usb_register_driver_#t~nondet217#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet217#1;havoc usb_register_driver_#t~nondet217#1; {55174#true} is VALID [2022-02-20 22:07:21,641 INFO L290 TraceCheckUtils]: 26: Hoare triple {55174#true} ldv_usb_register_driver_2_#t~ret196#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_2_#t~ret196#1 && ldv_usb_register_driver_2_#t~ret196#1 <= 2147483647;ldv_usb_register_driver_2_~tmp~19#1 := ldv_usb_register_driver_2_#t~ret196#1;havoc ldv_usb_register_driver_2_#t~ret196#1;ldv_usb_register_driver_2_~ldv_func_res~0#1 := ldv_usb_register_driver_2_~tmp~19#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset, ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset;havoc ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {55174#true} is VALID [2022-02-20 22:07:21,641 INFO L272 TraceCheckUtils]: 27: Hoare triple {55174#true} call ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset := ldv_init_zalloc(1248); {55258#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:21,641 INFO L290 TraceCheckUtils]: 28: Hoare triple {55258#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {55174#true} is VALID [2022-02-20 22:07:21,642 INFO L272 TraceCheckUtils]: 29: Hoare triple {55174#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {55266#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:21,642 INFO L290 TraceCheckUtils]: 30: Hoare triple {55266#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {55174#true} is VALID [2022-02-20 22:07:21,642 INFO L290 TraceCheckUtils]: 31: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:21,642 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {55174#true} {55174#true} #547#return; {55174#true} is VALID [2022-02-20 22:07:21,643 INFO L290 TraceCheckUtils]: 33: Hoare triple {55174#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {55174#true} is VALID [2022-02-20 22:07:21,643 INFO L272 TraceCheckUtils]: 34: Hoare triple {55174#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {55174#true} is VALID [2022-02-20 22:07:21,643 INFO L290 TraceCheckUtils]: 35: Hoare triple {55174#true} ~cond := #in~cond; {55174#true} is VALID [2022-02-20 22:07:21,643 INFO L290 TraceCheckUtils]: 36: Hoare triple {55174#true} assume !(0 == ~cond); {55174#true} is VALID [2022-02-20 22:07:21,643 INFO L290 TraceCheckUtils]: 37: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:21,643 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {55174#true} {55174#true} #549#return; {55174#true} is VALID [2022-02-20 22:07:21,643 INFO L290 TraceCheckUtils]: 39: Hoare triple {55174#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {55174#true} is VALID [2022-02-20 22:07:21,643 INFO L290 TraceCheckUtils]: 40: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:21,644 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {55174#true} {55174#true} #611#return; {55174#true} is VALID [2022-02-20 22:07:21,644 INFO L290 TraceCheckUtils]: 42: Hoare triple {55174#true} ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset := ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset;havoc ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {55174#true} is VALID [2022-02-20 22:07:21,644 INFO L290 TraceCheckUtils]: 43: Hoare triple {55174#true} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_2_#res#1 := ldv_usb_register_driver_2_~ldv_func_res~0#1; {55174#true} is VALID [2022-02-20 22:07:21,644 INFO L290 TraceCheckUtils]: 44: Hoare triple {55174#true} usb_register_#t~ret31#1 := ldv_usb_register_driver_2_#res#1;assume { :end_inline_ldv_usb_register_driver_2 } true;assume -2147483648 <= usb_register_#t~ret31#1 && usb_register_#t~ret31#1 <= 2147483647;usb_register_~tmp~1#1 := usb_register_#t~ret31#1;havoc usb_register_#t~ret31#1;usb_register_#res#1 := usb_register_~tmp~1#1; {55174#true} is VALID [2022-02-20 22:07:21,644 INFO L290 TraceCheckUtils]: 45: Hoare triple {55174#true} usb_acecad_init_#t~ret183#1 := usb_register_#res#1;assume { :end_inline_usb_register } true;assume -2147483648 <= usb_acecad_init_#t~ret183#1 && usb_acecad_init_#t~ret183#1 <= 2147483647;usb_acecad_init_~tmp~15#1 := usb_acecad_init_#t~ret183#1;havoc usb_acecad_init_#t~ret183#1;usb_acecad_init_~result~0#1 := usb_acecad_init_~tmp~15#1; {55174#true} is VALID [2022-02-20 22:07:21,644 INFO L290 TraceCheckUtils]: 46: Hoare triple {55174#true} assume 0 == usb_acecad_init_~result~0#1;havoc usb_acecad_init_#t~nondet184#1; {55174#true} is VALID [2022-02-20 22:07:21,644 INFO L290 TraceCheckUtils]: 47: Hoare triple {55174#true} usb_acecad_init_#res#1 := usb_acecad_init_~result~0#1; {55174#true} is VALID [2022-02-20 22:07:21,644 INFO L290 TraceCheckUtils]: 48: Hoare triple {55174#true} main_#t~ret194#1 := usb_acecad_init_#res#1;assume { :end_inline_usb_acecad_init } true;assume -2147483648 <= main_#t~ret194#1 && main_#t~ret194#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret194#1;havoc main_#t~ret194#1; {55174#true} is VALID [2022-02-20 22:07:21,644 INFO L290 TraceCheckUtils]: 49: Hoare triple {55174#true} assume 0 == ~ldv_retval_1~0;~ldv_state_variable_0~0 := 3; {55174#true} is VALID [2022-02-20 22:07:21,645 INFO L290 TraceCheckUtils]: 50: Hoare triple {55174#true} assume !(0 != ~ldv_retval_1~0); {55174#true} is VALID [2022-02-20 22:07:21,645 INFO L290 TraceCheckUtils]: 51: Hoare triple {55174#true} assume -2147483648 <= main_#t~nondet187#1 && main_#t~nondet187#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet187#1;havoc main_#t~nondet187#1;main_#t~switch188#1 := 0 == main_~tmp___0~6#1; {55174#true} is VALID [2022-02-20 22:07:21,645 INFO L290 TraceCheckUtils]: 52: Hoare triple {55174#true} assume main_#t~switch188#1; {55174#true} is VALID [2022-02-20 22:07:21,645 INFO L290 TraceCheckUtils]: 53: Hoare triple {55174#true} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= main_#t~nondet189#1 && main_#t~nondet189#1 <= 2147483647;main_~tmp___1~3#1 := main_#t~nondet189#1;havoc main_#t~nondet189#1;main_#t~switch190#1 := 0 == main_~tmp___1~3#1; {55174#true} is VALID [2022-02-20 22:07:21,645 INFO L290 TraceCheckUtils]: 54: Hoare triple {55174#true} assume main_#t~switch190#1; {55174#true} is VALID [2022-02-20 22:07:21,645 INFO L290 TraceCheckUtils]: 55: Hoare triple {55174#true} assume 1 == ~ldv_state_variable_1~0;assume { :begin_inline_usb_acecad_probe } true;usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset, usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset := ~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc usb_acecad_probe_#res#1;havoc usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset, usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset, usb_acecad_probe_#t~mem132#1, usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset, usb_acecad_probe_#t~ret134#1, usb_acecad_probe_#t~mem135#1, usb_acecad_probe_#t~ret136#1, usb_acecad_probe_#t~ret137#1, usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset, usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset, usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset, usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset, usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset, usb_acecad_probe_#t~mem143#1.base, usb_acecad_probe_#t~mem143#1.offset, usb_acecad_probe_#t~mem144#1.base, usb_acecad_probe_#t~mem144#1.offset, usb_acecad_probe_#t~mem145#1.base, usb_acecad_probe_#t~mem145#1.offset, usb_acecad_probe_#t~ret146#1, usb_acecad_probe_#t~mem147#1.base, usb_acecad_probe_#t~mem147#1.offset, usb_acecad_probe_#t~mem148#1.base, usb_acecad_probe_#t~mem148#1.offset, usb_acecad_probe_#t~ret149#1, usb_acecad_probe_#t~mem150#1.base, usb_acecad_probe_#t~mem150#1.offset, usb_acecad_probe_#t~ret151#1, usb_acecad_probe_#t~ret152#1, usb_acecad_probe_#t~ret153#1, usb_acecad_probe_#t~mem154#1, usb_acecad_probe_#t~switch155#1, usb_acecad_probe_#t~nondet156#1, usb_acecad_probe_#t~nondet157#1, usb_acecad_probe_#t~mem158#1, usb_acecad_probe_#t~mem159#1, usb_acecad_probe_#t~nondet160#1, usb_acecad_probe_#t~nondet161#1, usb_acecad_probe_#t~mem162#1, usb_acecad_probe_#t~mem163#1, usb_acecad_probe_#t~mem164#1.base, usb_acecad_probe_#t~mem164#1.offset, usb_acecad_probe_#t~mem165#1.base, usb_acecad_probe_#t~mem165#1.offset, usb_acecad_probe_#t~ite166#1, usb_acecad_probe_#t~mem167#1, usb_acecad_probe_#t~mem168#1.base, usb_acecad_probe_#t~mem168#1.offset, usb_acecad_probe_#t~mem169#1, usb_acecad_probe_#t~mem170#1.base, usb_acecad_probe_#t~mem170#1.offset, usb_acecad_probe_#t~mem171#1.base, usb_acecad_probe_#t~mem171#1.offset, usb_acecad_probe_#t~mem172#1, usb_acecad_probe_#t~mem173#1.base, usb_acecad_probe_#t~mem173#1.offset, usb_acecad_probe_#t~ret174#1, usb_acecad_probe_#t~mem175#1.base, usb_acecad_probe_#t~mem175#1.offset, usb_acecad_probe_#t~mem176#1, usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset, usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset, usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset, usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset, usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset, usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset, usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset, usb_acecad_probe_~pipe~0#1, usb_acecad_probe_~maxp~0#1, usb_acecad_probe_~err~0#1, usb_acecad_probe_~tmp___0~5#1, usb_acecad_probe_~tmp___1~2#1, usb_acecad_probe_~tmp___2~0#1, usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset, usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~tmp___5~0#1, usb_acecad_probe_~tmp___6~0#1;usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset := usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset;usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset := usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset;havoc usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset;havoc usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;havoc usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset;havoc usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset;havoc usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset;havoc usb_acecad_probe_~pipe~0#1;havoc usb_acecad_probe_~maxp~0#1;havoc usb_acecad_probe_~err~0#1;havoc usb_acecad_probe_~tmp___0~5#1;havoc usb_acecad_probe_~tmp___1~2#1;havoc usb_acecad_probe_~tmp___2~0#1;havoc usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;havoc usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset;havoc usb_acecad_probe_~tmp___5~0#1;havoc usb_acecad_probe_~tmp___6~0#1;assume { :begin_inline_interface_to_usbdev } true;interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset := usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset;havoc interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;havoc interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset, interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset, interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset := interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset;havoc interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;assume { :begin_inline_ldv_interface_to_usbdev } true;havoc ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;havoc ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset, ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset;havoc ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset; {55174#true} is VALID [2022-02-20 22:07:21,646 INFO L272 TraceCheckUtils]: 56: Hoare triple {55174#true} call ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset := ldv_malloc(1822); {55274#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:21,646 INFO L290 TraceCheckUtils]: 57: Hoare triple {55274#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {55174#true} is VALID [2022-02-20 22:07:21,646 INFO L290 TraceCheckUtils]: 58: Hoare triple {55174#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {55275#(and (<= 0 |ldv_malloc_#res.base|) (<= |ldv_malloc_#res.offset| 0) (<= |ldv_malloc_#res.base| 0) (<= 0 |ldv_malloc_#res.offset|))} is VALID [2022-02-20 22:07:21,647 INFO L290 TraceCheckUtils]: 59: Hoare triple {55275#(and (<= 0 |ldv_malloc_#res.base|) (<= |ldv_malloc_#res.offset| 0) (<= |ldv_malloc_#res.base| 0) (<= 0 |ldv_malloc_#res.offset|))} assume true; {55275#(and (<= 0 |ldv_malloc_#res.base|) (<= |ldv_malloc_#res.offset| 0) (<= |ldv_malloc_#res.base| 0) (<= 0 |ldv_malloc_#res.offset|))} is VALID [2022-02-20 22:07:21,647 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {55275#(and (<= 0 |ldv_malloc_#res.base|) (<= |ldv_malloc_#res.offset| 0) (<= |ldv_malloc_#res.base| 0) (<= 0 |ldv_malloc_#res.offset|))} {55174#true} #555#return; {55208#(and (= |ULTIMATE.start_ldv_interface_to_usbdev_#t~ret208#1.offset| 0) (= |ULTIMATE.start_ldv_interface_to_usbdev_#t~ret208#1.base| 0))} is VALID [2022-02-20 22:07:21,648 INFO L290 TraceCheckUtils]: 61: Hoare triple {55208#(and (= |ULTIMATE.start_ldv_interface_to_usbdev_#t~ret208#1.offset| 0) (= |ULTIMATE.start_ldv_interface_to_usbdev_#t~ret208#1.base| 0))} ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset := ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset;havoc ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset; {55209#(and (= |ULTIMATE.start_ldv_interface_to_usbdev_~result~1#1.offset| 0) (= |ULTIMATE.start_ldv_interface_to_usbdev_~result~1#1.base| 0))} is VALID [2022-02-20 22:07:21,648 INFO L290 TraceCheckUtils]: 62: Hoare triple {55209#(and (= |ULTIMATE.start_ldv_interface_to_usbdev_~result~1#1.offset| 0) (= |ULTIMATE.start_ldv_interface_to_usbdev_~result~1#1.base| 0))} assume !(0 == (ldv_interface_to_usbdev_~result~1#1.base + ldv_interface_to_usbdev_~result~1#1.offset) % 18446744073709551616);ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset := ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset; {55175#false} is VALID [2022-02-20 22:07:21,648 INFO L290 TraceCheckUtils]: 63: Hoare triple {55175#false} interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset := ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;assume { :end_inline_ldv_interface_to_usbdev } true;interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset := interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset;havoc interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset;interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset := interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset; {55175#false} is VALID [2022-02-20 22:07:21,648 INFO L290 TraceCheckUtils]: 64: Hoare triple {55175#false} usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset := interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;assume { :end_inline_interface_to_usbdev } true;usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset := usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset;havoc usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset;usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset := usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;call usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset := read~$Pointer$(usb_acecad_probe_~intf#1.base, 8 + usb_acecad_probe_~intf#1.offset, 8);usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset := usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset;havoc usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset;call usb_acecad_probe_#t~mem132#1 := read~int(usb_acecad_probe_~interface~0#1.base, 4 + usb_acecad_probe_~interface~0#1.offset, 1); {55175#false} is VALID [2022-02-20 22:07:21,649 INFO L290 TraceCheckUtils]: 65: Hoare triple {55175#false} assume !(1 != usb_acecad_probe_#t~mem132#1 % 256 % 4294967296);havoc usb_acecad_probe_#t~mem132#1;call usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset := read~$Pointer$(usb_acecad_probe_~interface~0#1.base, 9 + usb_acecad_probe_~interface~0#1.offset, 8);usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset := usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset;havoc usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset;assume { :begin_inline_usb_endpoint_is_int_in } true;usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset := usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_endpoint_is_int_in_#res#1;havoc usb_endpoint_is_int_in_#t~ret3#1, usb_endpoint_is_int_in_#t~ret4#1, usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset, usb_endpoint_is_int_in_~tmp~0#1, usb_endpoint_is_int_in_~tmp___0~0#1, usb_endpoint_is_int_in_~tmp___1~0#1;usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset := usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset;havoc usb_endpoint_is_int_in_~tmp~0#1;havoc usb_endpoint_is_int_in_~tmp___0~0#1;havoc usb_endpoint_is_int_in_~tmp___1~0#1;assume { :begin_inline_usb_endpoint_xfer_int } true;usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset := usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset;havoc usb_endpoint_xfer_int_#res#1;havoc usb_endpoint_xfer_int_#t~mem2#1, usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset;usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset := usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset;call usb_endpoint_xfer_int_#t~mem2#1 := read~int(usb_endpoint_xfer_int_~epd#1.base, 3 + usb_endpoint_xfer_int_~epd#1.offset, 1);usb_endpoint_xfer_int_#res#1 := (if 3 == (if 0 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 0 else (if 1 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 1 else ~bitwiseAnd(usb_endpoint_xfer_int_#t~mem2#1 % 256, 3))) then 1 else 0);havoc usb_endpoint_xfer_int_#t~mem2#1; {55175#false} is VALID [2022-02-20 22:07:21,649 INFO L290 TraceCheckUtils]: 66: Hoare triple {55175#false} usb_endpoint_is_int_in_#t~ret3#1 := usb_endpoint_xfer_int_#res#1;assume { :end_inline_usb_endpoint_xfer_int } true;assume -2147483648 <= usb_endpoint_is_int_in_#t~ret3#1 && usb_endpoint_is_int_in_#t~ret3#1 <= 2147483647;usb_endpoint_is_int_in_~tmp~0#1 := usb_endpoint_is_int_in_#t~ret3#1;havoc usb_endpoint_is_int_in_#t~ret3#1; {55175#false} is VALID [2022-02-20 22:07:21,649 INFO L290 TraceCheckUtils]: 67: Hoare triple {55175#false} assume 0 != usb_endpoint_is_int_in_~tmp~0#1;assume { :begin_inline_usb_endpoint_dir_in } true;usb_endpoint_dir_in_#in~epd#1.base, usb_endpoint_dir_in_#in~epd#1.offset := usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset;havoc usb_endpoint_dir_in_#res#1;havoc usb_endpoint_dir_in_#t~mem1#1, usb_endpoint_dir_in_~epd#1.base, usb_endpoint_dir_in_~epd#1.offset;usb_endpoint_dir_in_~epd#1.base, usb_endpoint_dir_in_~epd#1.offset := usb_endpoint_dir_in_#in~epd#1.base, usb_endpoint_dir_in_#in~epd#1.offset;call usb_endpoint_dir_in_#t~mem1#1 := read~int(usb_endpoint_dir_in_~epd#1.base, 2 + usb_endpoint_dir_in_~epd#1.offset, 1);usb_endpoint_dir_in_#res#1 := (if (if usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 <= 127 then usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 else usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 - 256) < 0 then 1 else 0);havoc usb_endpoint_dir_in_#t~mem1#1; {55175#false} is VALID [2022-02-20 22:07:21,649 INFO L290 TraceCheckUtils]: 68: Hoare triple {55175#false} usb_endpoint_is_int_in_#t~ret4#1 := usb_endpoint_dir_in_#res#1;assume { :end_inline_usb_endpoint_dir_in } true;assume -2147483648 <= usb_endpoint_is_int_in_#t~ret4#1 && usb_endpoint_is_int_in_#t~ret4#1 <= 2147483647;usb_endpoint_is_int_in_~tmp___0~0#1 := usb_endpoint_is_int_in_#t~ret4#1;havoc usb_endpoint_is_int_in_#t~ret4#1; {55175#false} is VALID [2022-02-20 22:07:21,649 INFO L290 TraceCheckUtils]: 69: Hoare triple {55175#false} assume 0 != usb_endpoint_is_int_in_~tmp___0~0#1;usb_endpoint_is_int_in_~tmp___1~0#1 := 1; {55175#false} is VALID [2022-02-20 22:07:21,649 INFO L290 TraceCheckUtils]: 70: Hoare triple {55175#false} usb_endpoint_is_int_in_#res#1 := usb_endpoint_is_int_in_~tmp___1~0#1; {55175#false} is VALID [2022-02-20 22:07:21,649 INFO L290 TraceCheckUtils]: 71: Hoare triple {55175#false} usb_acecad_probe_#t~ret134#1 := usb_endpoint_is_int_in_#res#1;assume { :end_inline_usb_endpoint_is_int_in } true;assume -2147483648 <= usb_acecad_probe_#t~ret134#1 && usb_acecad_probe_#t~ret134#1 <= 2147483647;usb_acecad_probe_~tmp___0~5#1 := usb_acecad_probe_#t~ret134#1;havoc usb_acecad_probe_#t~ret134#1; {55175#false} is VALID [2022-02-20 22:07:21,649 INFO L290 TraceCheckUtils]: 72: Hoare triple {55175#false} assume !(0 == usb_acecad_probe_~tmp___0~5#1);call usb_acecad_probe_#t~mem135#1 := read~int(usb_acecad_probe_~endpoint~0#1.base, 2 + usb_acecad_probe_~endpoint~0#1.offset, 1);assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_#t~mem135#1 % 256;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem45#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem45#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := (if (1 == 256 * __create_pipe_#t~mem45#1 || 0 == 256 * __create_pipe_#t~mem45#1) && 0 == 32768 * __create_pipe_~endpoint#1 then 256 * __create_pipe_#t~mem45#1 else (if 0 == 256 * __create_pipe_#t~mem45#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1) then 32768 * __create_pipe_~endpoint#1 else (if (1 == 256 * __create_pipe_#t~mem45#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1)) || ((1 == 256 * __create_pipe_#t~mem45#1 || 0 == 256 * __create_pipe_#t~mem45#1) && 1 == 32768 * __create_pipe_~endpoint#1) then 1 else ~bitwiseOr(256 * __create_pipe_#t~mem45#1, 32768 * __create_pipe_~endpoint#1))));havoc __create_pipe_#t~mem45#1; {55175#false} is VALID [2022-02-20 22:07:21,650 INFO L290 TraceCheckUtils]: 73: Hoare triple {55175#false} usb_acecad_probe_#t~ret136#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;usb_acecad_probe_~tmp___1~2#1 := usb_acecad_probe_#t~ret136#1;havoc usb_acecad_probe_#t~mem135#1;havoc usb_acecad_probe_#t~ret136#1;usb_acecad_probe_~pipe~0#1 := (if ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 else ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 - 4294967296);assume { :begin_inline_usb_maxpacket } true;usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset, usb_maxpacket_#in~pipe#1, usb_maxpacket_#in~is_out#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~pipe~0#1, (if 0 == (if 0 == usb_acecad_probe_~pipe~0#1 then 0 else (if 1 == usb_acecad_probe_~pipe~0#1 then 0 else ~bitwiseAnd(usb_acecad_probe_~pipe~0#1, 128))) then 1 else 0);havoc usb_maxpacket_#res#1;havoc usb_maxpacket_#t~ret47#1, usb_maxpacket_#t~ret48#1, usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset, usb_maxpacket_#t~ret50#1, usb_maxpacket_#t~ret51#1, usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset, usb_maxpacket_#t~mem53#1, usb_maxpacket_#t~nondet46#1, usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset, usb_maxpacket_~pipe#1, usb_maxpacket_~is_out#1, usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset, usb_maxpacket_~epnum~0#1, usb_maxpacket_~__ret_warn_on~0#1, usb_maxpacket_~tmp~2#1, usb_maxpacket_~__ret_warn_on___0~0#1, usb_maxpacket_~tmp___0~1#1;usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset := usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset;usb_maxpacket_~pipe#1 := usb_maxpacket_#in~pipe#1;usb_maxpacket_~is_out#1 := usb_maxpacket_#in~is_out#1;havoc usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset;havoc usb_maxpacket_~epnum~0#1;havoc usb_maxpacket_~__ret_warn_on~0#1;havoc usb_maxpacket_~tmp~2#1;havoc usb_maxpacket_~__ret_warn_on___0~0#1;havoc usb_maxpacket_~tmp___0~1#1; {55175#false} is VALID [2022-02-20 22:07:21,650 INFO L290 TraceCheckUtils]: 74: Hoare triple {55175#false} assume 0 == usb_maxpacket_~pipe#1 / 32768;usb_maxpacket_~epnum~0#1 := 0; {55175#false} is VALID [2022-02-20 22:07:21,650 INFO L290 TraceCheckUtils]: 75: Hoare triple {55175#false} assume !(0 != usb_maxpacket_~is_out#1);usb_maxpacket_~__ret_warn_on___0~0#1 := (if 0 == (if 0 == usb_maxpacket_~pipe#1 then 0 else (if 1 == usb_maxpacket_~pipe#1 then 0 else ~bitwiseAnd(usb_maxpacket_~pipe#1, 128))) then 1 else 0); {55175#false} is VALID [2022-02-20 22:07:21,650 INFO L272 TraceCheckUtils]: 76: Hoare triple {55175#false} call usb_maxpacket_#t~ret50#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {55174#true} is VALID [2022-02-20 22:07:21,650 INFO L290 TraceCheckUtils]: 77: Hoare triple {55174#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {55174#true} is VALID [2022-02-20 22:07:21,650 INFO L290 TraceCheckUtils]: 78: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:21,650 INFO L284 TraceCheckUtils]: 79: Hoare quadruple {55174#true} {55175#false} #563#return; {55175#false} is VALID [2022-02-20 22:07:21,650 INFO L290 TraceCheckUtils]: 80: Hoare triple {55175#false} assume -9223372036854775808 <= usb_maxpacket_#t~ret50#1 && usb_maxpacket_#t~ret50#1 <= 9223372036854775807;usb_maxpacket_~tmp___0~1#1 := usb_maxpacket_#t~ret50#1;havoc usb_maxpacket_#t~ret50#1; {55175#false} is VALID [2022-02-20 22:07:21,651 INFO L290 TraceCheckUtils]: 81: Hoare triple {55175#false} assume !(0 != usb_maxpacket_~tmp___0~1#1); {55175#false} is VALID [2022-02-20 22:07:21,651 INFO L272 TraceCheckUtils]: 82: Hoare triple {55175#false} call usb_maxpacket_#t~ret51#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {55174#true} is VALID [2022-02-20 22:07:21,651 INFO L290 TraceCheckUtils]: 83: Hoare triple {55174#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {55174#true} is VALID [2022-02-20 22:07:21,651 INFO L290 TraceCheckUtils]: 84: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:21,651 INFO L284 TraceCheckUtils]: 85: Hoare quadruple {55174#true} {55175#false} #567#return; {55175#false} is VALID [2022-02-20 22:07:21,651 INFO L290 TraceCheckUtils]: 86: Hoare triple {55175#false} assume -9223372036854775808 <= usb_maxpacket_#t~ret51#1 && usb_maxpacket_#t~ret51#1 <= 9223372036854775807;havoc usb_maxpacket_#t~ret51#1;call usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset := read~$Pointer$(usb_maxpacket_~udev#1.base, 1186 + usb_maxpacket_~udev#1.offset + 8 * (usb_maxpacket_~epnum~0#1 % 4294967296), 8);usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset := usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset;havoc usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset; {55175#false} is VALID [2022-02-20 22:07:21,651 INFO L290 TraceCheckUtils]: 87: Hoare triple {55175#false} assume 0 == (usb_maxpacket_~ep~0#1.base + usb_maxpacket_~ep~0#1.offset) % 18446744073709551616;usb_maxpacket_#res#1 := 0; {55175#false} is VALID [2022-02-20 22:07:21,651 INFO L290 TraceCheckUtils]: 88: Hoare triple {55175#false} usb_acecad_probe_#t~ret137#1 := usb_maxpacket_#res#1;assume { :end_inline_usb_maxpacket } true;usb_acecad_probe_~tmp___2~0#1 := usb_acecad_probe_#t~ret137#1;havoc usb_acecad_probe_#t~ret137#1;usb_acecad_probe_~maxp~0#1 := usb_acecad_probe_~tmp___2~0#1 % 65536; {55175#false} is VALID [2022-02-20 22:07:21,651 INFO L272 TraceCheckUtils]: 89: Hoare triple {55175#false} call usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset := kzalloc(232, 208); {55274#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:21,652 INFO L290 TraceCheckUtils]: 90: Hoare triple {55274#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {55174#true} is VALID [2022-02-20 22:07:21,652 INFO L272 TraceCheckUtils]: 91: Hoare triple {55174#true} call __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset := ldv_malloc(__kmalloc_~size#1); {55274#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:21,652 INFO L290 TraceCheckUtils]: 92: Hoare triple {55274#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {55174#true} is VALID [2022-02-20 22:07:21,652 INFO L290 TraceCheckUtils]: 93: Hoare triple {55174#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {55174#true} is VALID [2022-02-20 22:07:21,653 INFO L290 TraceCheckUtils]: 94: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:21,653 INFO L284 TraceCheckUtils]: 95: Hoare quadruple {55174#true} {55174#true} #539#return; {55174#true} is VALID [2022-02-20 22:07:21,653 INFO L290 TraceCheckUtils]: 96: Hoare triple {55174#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset; {55174#true} is VALID [2022-02-20 22:07:21,653 INFO L290 TraceCheckUtils]: 97: Hoare triple {55174#true} kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {55174#true} is VALID [2022-02-20 22:07:21,653 INFO L290 TraceCheckUtils]: 98: Hoare triple {55174#true} #t~ret58#1.base, #t~ret58#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret58#1.base, #t~ret58#1.offset;havoc #t~ret58#1.base, #t~ret58#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {55174#true} is VALID [2022-02-20 22:07:21,653 INFO L290 TraceCheckUtils]: 99: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:21,653 INFO L284 TraceCheckUtils]: 100: Hoare quadruple {55174#true} {55175#false} #569#return; {55175#false} is VALID [2022-02-20 22:07:21,653 INFO L290 TraceCheckUtils]: 101: Hoare triple {55175#false} usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset := usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset;havoc usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset;usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset := usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;assume { :begin_inline_input_allocate_device } true;havoc input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;havoc input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset; {55175#false} is VALID [2022-02-20 22:07:21,653 INFO L272 TraceCheckUtils]: 102: Hoare triple {55175#false} call input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset := kzalloc(1855, ~bitwiseOr(~bitwiseOr(16, 64), 128)); {55274#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:21,654 INFO L290 TraceCheckUtils]: 103: Hoare triple {55274#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {55174#true} is VALID [2022-02-20 22:07:21,654 INFO L272 TraceCheckUtils]: 104: Hoare triple {55174#true} call __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset := ldv_malloc(__kmalloc_~size#1); {55274#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:21,664 INFO L290 TraceCheckUtils]: 105: Hoare triple {55274#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {55174#true} is VALID [2022-02-20 22:07:21,665 INFO L290 TraceCheckUtils]: 106: Hoare triple {55174#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {55174#true} is VALID [2022-02-20 22:07:21,665 INFO L290 TraceCheckUtils]: 107: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:21,665 INFO L284 TraceCheckUtils]: 108: Hoare quadruple {55174#true} {55174#true} #539#return; {55174#true} is VALID [2022-02-20 22:07:21,665 INFO L290 TraceCheckUtils]: 109: Hoare triple {55174#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset; {55174#true} is VALID [2022-02-20 22:07:21,665 INFO L290 TraceCheckUtils]: 110: Hoare triple {55174#true} kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {55174#true} is VALID [2022-02-20 22:07:21,665 INFO L290 TraceCheckUtils]: 111: Hoare triple {55174#true} #t~ret58#1.base, #t~ret58#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret58#1.base, #t~ret58#1.offset;havoc #t~ret58#1.base, #t~ret58#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {55174#true} is VALID [2022-02-20 22:07:21,665 INFO L290 TraceCheckUtils]: 112: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:21,666 INFO L284 TraceCheckUtils]: 113: Hoare quadruple {55174#true} {55175#false} #571#return; {55175#false} is VALID [2022-02-20 22:07:21,666 INFO L290 TraceCheckUtils]: 114: Hoare triple {55175#false} input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset := input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset;havoc input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset; {55175#false} is VALID [2022-02-20 22:07:21,666 INFO L290 TraceCheckUtils]: 115: Hoare triple {55175#false} usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset := input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;assume { :end_inline_input_allocate_device } true;usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset := usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset;havoc usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset; {55175#false} is VALID [2022-02-20 22:07:21,666 INFO L290 TraceCheckUtils]: 116: Hoare triple {55175#false} assume !(0 == (usb_acecad_probe_~acecad~3#1.base + usb_acecad_probe_~acecad~3#1.offset) % 18446744073709551616 || 0 == (usb_acecad_probe_~input_dev~0#1.base + usb_acecad_probe_~input_dev~0#1.offset) % 18446744073709551616);assume { :begin_inline_usb_alloc_coherent } true;usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset, usb_alloc_coherent_#in~arg1#1, usb_alloc_coherent_#in~arg2#1, usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, 8, 208, usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset;havoc usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;havoc usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset, usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset, usb_alloc_coherent_~arg1#1, usb_alloc_coherent_~arg2#1, usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset;usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset := usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset;usb_alloc_coherent_~arg1#1 := usb_alloc_coherent_#in~arg1#1;usb_alloc_coherent_~arg2#1 := usb_alloc_coherent_#in~arg2#1;usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset := usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset; {55175#false} is VALID [2022-02-20 22:07:21,666 INFO L272 TraceCheckUtils]: 117: Hoare triple {55175#false} call usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset := ldv_malloc(0); {55274#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:21,666 INFO L290 TraceCheckUtils]: 118: Hoare triple {55274#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {55174#true} is VALID [2022-02-20 22:07:21,666 INFO L290 TraceCheckUtils]: 119: Hoare triple {55174#true} assume !(0 != ~tmp___0~2);call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size);~tmp~4.base, ~tmp~4.offset := #t~malloc63.base, #t~malloc63.offset;havoc #t~malloc63.base, #t~malloc63.offset;~p~0.base, ~p~0.offset := ~tmp~4.base, ~tmp~4.offset; {55174#true} is VALID [2022-02-20 22:07:21,666 INFO L272 TraceCheckUtils]: 120: Hoare triple {55174#true} call assume_abort_if_not((if 0 != (~p~0.base + ~p~0.offset) % 18446744073709551616 then 1 else 0)); {55174#true} is VALID [2022-02-20 22:07:21,667 INFO L290 TraceCheckUtils]: 121: Hoare triple {55174#true} ~cond := #in~cond; {55174#true} is VALID [2022-02-20 22:07:21,667 INFO L290 TraceCheckUtils]: 122: Hoare triple {55174#true} assume !(0 == ~cond); {55174#true} is VALID [2022-02-20 22:07:21,667 INFO L290 TraceCheckUtils]: 123: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:21,667 INFO L284 TraceCheckUtils]: 124: Hoare quadruple {55174#true} {55174#true} #551#return; {55174#true} is VALID [2022-02-20 22:07:21,667 INFO L290 TraceCheckUtils]: 125: Hoare triple {55174#true} #res.base, #res.offset := ~p~0.base, ~p~0.offset; {55174#true} is VALID [2022-02-20 22:07:21,667 INFO L290 TraceCheckUtils]: 126: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:21,667 INFO L284 TraceCheckUtils]: 127: Hoare quadruple {55174#true} {55175#false} #573#return; {55175#false} is VALID [2022-02-20 22:07:21,667 INFO L290 TraceCheckUtils]: 128: Hoare triple {55175#false} usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset := usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset;havoc usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset; {55175#false} is VALID [2022-02-20 22:07:21,668 INFO L290 TraceCheckUtils]: 129: Hoare triple {55175#false} usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset := usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;assume { :end_inline_usb_alloc_coherent } true;usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset := usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset;havoc usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset;call write~$Pointer$(usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8); {55175#false} is VALID [2022-02-20 22:07:21,668 INFO L290 TraceCheckUtils]: 130: Hoare triple {55175#false} assume !(0 == (usb_acecad_probe_#t~mem141#1.base + usb_acecad_probe_#t~mem141#1.offset) % 18446744073709551616);havoc usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset;assume { :begin_inline_ldv_usb_alloc_urb_5 } true;ldv_usb_alloc_urb_5_#in~ldv_func_arg1#1, ldv_usb_alloc_urb_5_#in~ldv_func_arg2#1 := 0, 208;havoc ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset, ldv_usb_alloc_urb_5_~ldv_func_arg1#1, ldv_usb_alloc_urb_5_~ldv_func_arg2#1, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset, ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;ldv_usb_alloc_urb_5_~ldv_func_arg1#1 := ldv_usb_alloc_urb_5_#in~ldv_func_arg1#1;ldv_usb_alloc_urb_5_~ldv_func_arg2#1 := ldv_usb_alloc_urb_5_#in~ldv_func_arg2#1;havoc ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset;havoc ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;assume { :begin_inline_usb_alloc_urb } true;usb_alloc_urb_#in~arg0#1, usb_alloc_urb_#in~arg1#1 := ldv_usb_alloc_urb_5_~ldv_func_arg1#1, ldv_usb_alloc_urb_5_~ldv_func_arg2#1;havoc usb_alloc_urb_#res#1.base, usb_alloc_urb_#res#1.offset;havoc usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset, usb_alloc_urb_~arg0#1, usb_alloc_urb_~arg1#1;usb_alloc_urb_~arg0#1 := usb_alloc_urb_#in~arg0#1;usb_alloc_urb_~arg1#1 := usb_alloc_urb_#in~arg1#1; {55175#false} is VALID [2022-02-20 22:07:21,668 INFO L272 TraceCheckUtils]: 131: Hoare triple {55175#false} call usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset := ldv_malloc(180); {55274#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:21,668 INFO L290 TraceCheckUtils]: 132: Hoare triple {55274#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {55174#true} is VALID [2022-02-20 22:07:21,668 INFO L290 TraceCheckUtils]: 133: Hoare triple {55174#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {55174#true} is VALID [2022-02-20 22:07:21,668 INFO L290 TraceCheckUtils]: 134: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:21,668 INFO L284 TraceCheckUtils]: 135: Hoare quadruple {55174#true} {55175#false} #575#return; {55175#false} is VALID [2022-02-20 22:07:21,668 INFO L290 TraceCheckUtils]: 136: Hoare triple {55175#false} usb_alloc_urb_#res#1.base, usb_alloc_urb_#res#1.offset := usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset;havoc usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset; {55175#false} is VALID [2022-02-20 22:07:21,669 INFO L290 TraceCheckUtils]: 137: Hoare triple {55175#false} ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset := usb_alloc_urb_#res#1.base, usb_alloc_urb_#res#1.offset;assume { :end_inline_usb_alloc_urb } true;ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset := ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset;ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset := ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;assume { :begin_inline_ldv_alloc_urb } true;ldv_alloc_urb_#in~res#1.base, ldv_alloc_urb_#in~res#1.offset := ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset;havoc ldv_alloc_urb_~res#1.base, ldv_alloc_urb_~res#1.offset;ldv_alloc_urb_~res#1.base, ldv_alloc_urb_~res#1.offset := ldv_alloc_urb_#in~res#1.base, ldv_alloc_urb_#in~res#1.offset; {55175#false} is VALID [2022-02-20 22:07:21,669 INFO L290 TraceCheckUtils]: 138: Hoare triple {55175#false} assume 0 != (ldv_alloc_urb_~res#1.base + ldv_alloc_urb_~res#1.offset) % 18446744073709551616;~URB_STATE~0 := 1 + ~URB_STATE~0; {55175#false} is VALID [2022-02-20 22:07:21,669 INFO L290 TraceCheckUtils]: 139: Hoare triple {55175#false} assume { :end_inline_ldv_alloc_urb } true;ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset := ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset; {55175#false} is VALID [2022-02-20 22:07:21,669 INFO L290 TraceCheckUtils]: 140: Hoare triple {55175#false} usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset := ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;assume { :end_inline_ldv_usb_alloc_urb_5 } true;call write~$Pointer$(usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset, usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8);havoc usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset;call usb_acecad_probe_#t~mem143#1.base, usb_acecad_probe_#t~mem143#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8); {55175#false} is VALID [2022-02-20 22:07:21,669 INFO L290 TraceCheckUtils]: 141: Hoare triple {55175#false} assume 0 == (usb_acecad_probe_#t~mem143#1.base + usb_acecad_probe_#t~mem143#1.offset) % 18446744073709551616;havoc usb_acecad_probe_#t~mem143#1.base, usb_acecad_probe_#t~mem143#1.offset;usb_acecad_probe_~err~0#1 := -12; {55175#false} is VALID [2022-02-20 22:07:21,669 INFO L290 TraceCheckUtils]: 142: Hoare triple {55175#false} call usb_acecad_probe_#t~mem175#1.base, usb_acecad_probe_#t~mem175#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem176#1 := read~int(usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset, 8); {55175#false} is VALID [2022-02-20 22:07:21,669 INFO L272 TraceCheckUtils]: 143: Hoare triple {55175#false} call usb_free_coherent(usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, 8, usb_acecad_probe_#t~mem175#1.base, usb_acecad_probe_#t~mem175#1.offset, usb_acecad_probe_#t~mem176#1); {55174#true} is VALID [2022-02-20 22:07:21,669 INFO L290 TraceCheckUtils]: 144: Hoare triple {55174#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1 := #in~arg1;~arg2.base, ~arg2.offset := #in~arg2.base, #in~arg2.offset;~arg3 := #in~arg3; {55174#true} is VALID [2022-02-20 22:07:21,669 INFO L290 TraceCheckUtils]: 145: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:21,670 INFO L284 TraceCheckUtils]: 146: Hoare quadruple {55174#true} {55175#false} #603#return; {55175#false} is VALID [2022-02-20 22:07:21,670 INFO L290 TraceCheckUtils]: 147: Hoare triple {55175#false} havoc usb_acecad_probe_#t~mem175#1.base, usb_acecad_probe_#t~mem175#1.offset;havoc usb_acecad_probe_#t~mem176#1; {55175#false} is VALID [2022-02-20 22:07:21,670 INFO L290 TraceCheckUtils]: 148: Hoare triple {55175#false} assume { :begin_inline_input_free_device } true;input_free_device_#in~arg0#1.base, input_free_device_#in~arg0#1.offset := usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset;havoc input_free_device_~arg0#1.base, input_free_device_~arg0#1.offset;input_free_device_~arg0#1.base, input_free_device_~arg0#1.offset := input_free_device_#in~arg0#1.base, input_free_device_#in~arg0#1.offset; {55175#false} is VALID [2022-02-20 22:07:21,670 INFO L290 TraceCheckUtils]: 149: Hoare triple {55175#false} assume { :end_inline_input_free_device } true; {55175#false} is VALID [2022-02-20 22:07:21,670 INFO L272 TraceCheckUtils]: 150: Hoare triple {55175#false} call kfree(usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset); {55288#(= |old(#valid)| |#valid|)} is VALID [2022-02-20 22:07:21,670 INFO L290 TraceCheckUtils]: 151: Hoare triple {55288#(= |old(#valid)| |#valid|)} ~p.base, ~p.offset := #in~p.base, #in~p.offset;call ULTIMATE.dealloc(~p.base, ~p.offset); {55174#true} is VALID [2022-02-20 22:07:21,670 INFO L290 TraceCheckUtils]: 152: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:21,670 INFO L284 TraceCheckUtils]: 153: Hoare quadruple {55174#true} {55175#false} #605#return; {55175#false} is VALID [2022-02-20 22:07:21,671 INFO L290 TraceCheckUtils]: 154: Hoare triple {55175#false} usb_acecad_probe_#res#1 := usb_acecad_probe_~err~0#1; {55175#false} is VALID [2022-02-20 22:07:21,671 INFO L290 TraceCheckUtils]: 155: Hoare triple {55175#false} main_#t~ret191#1 := usb_acecad_probe_#res#1;assume { :end_inline_usb_acecad_probe } true;assume -2147483648 <= main_#t~ret191#1 && main_#t~ret191#1 <= 2147483647;~ldv_retval_0~0 := main_#t~ret191#1;havoc main_#t~ret191#1; {55175#false} is VALID [2022-02-20 22:07:21,671 INFO L290 TraceCheckUtils]: 156: Hoare triple {55175#false} assume !(0 == ~ldv_retval_0~0); {55175#false} is VALID [2022-02-20 22:07:21,671 INFO L290 TraceCheckUtils]: 157: Hoare triple {55175#false} assume -2147483648 <= main_#t~nondet187#1 && main_#t~nondet187#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet187#1;havoc main_#t~nondet187#1;main_#t~switch188#1 := 0 == main_~tmp___0~6#1; {55175#false} is VALID [2022-02-20 22:07:21,671 INFO L290 TraceCheckUtils]: 158: Hoare triple {55175#false} assume !main_#t~switch188#1;main_#t~switch188#1 := main_#t~switch188#1 || 1 == main_~tmp___0~6#1; {55175#false} is VALID [2022-02-20 22:07:21,671 INFO L290 TraceCheckUtils]: 159: Hoare triple {55175#false} assume main_#t~switch188#1; {55175#false} is VALID [2022-02-20 22:07:21,671 INFO L290 TraceCheckUtils]: 160: Hoare triple {55175#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet192#1 && main_#t~nondet192#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet192#1;havoc main_#t~nondet192#1;main_#t~switch193#1 := 0 == main_~tmp___2~1#1; {55175#false} is VALID [2022-02-20 22:07:21,671 INFO L290 TraceCheckUtils]: 161: Hoare triple {55175#false} assume main_#t~switch193#1; {55175#false} is VALID [2022-02-20 22:07:21,672 INFO L290 TraceCheckUtils]: 162: Hoare triple {55175#false} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0;assume { :begin_inline_usb_acecad_exit } true;assume { :begin_inline_ldv_usb_deregister_11 } true;ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset := ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset;assume { :begin_inline_usb_deregister } true;usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset := ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;havoc usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset;usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset := usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset; {55175#false} is VALID [2022-02-20 22:07:21,672 INFO L290 TraceCheckUtils]: 163: Hoare triple {55175#false} assume { :end_inline_usb_deregister } true;~ldv_state_variable_1~0 := 0; {55175#false} is VALID [2022-02-20 22:07:21,672 INFO L290 TraceCheckUtils]: 164: Hoare triple {55175#false} assume { :end_inline_ldv_usb_deregister_11 } true; {55175#false} is VALID [2022-02-20 22:07:21,672 INFO L290 TraceCheckUtils]: 165: Hoare triple {55175#false} assume { :end_inline_usb_acecad_exit } true;~ldv_state_variable_0~0 := 2; {55175#false} is VALID [2022-02-20 22:07:21,672 INFO L290 TraceCheckUtils]: 166: Hoare triple {55175#false} assume { :begin_inline_ldv_check_final_state } true; {55175#false} is VALID [2022-02-20 22:07:21,672 INFO L290 TraceCheckUtils]: 167: Hoare triple {55175#false} assume 0 != ~URB_STATE~0; {55175#false} is VALID [2022-02-20 22:07:21,672 INFO L272 TraceCheckUtils]: 168: Hoare triple {55175#false} call ldv_error(); {55175#false} is VALID [2022-02-20 22:07:21,672 INFO L290 TraceCheckUtils]: 169: Hoare triple {55175#false} assume !false; {55175#false} is VALID [2022-02-20 22:07:21,673 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 7 proven. 8 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2022-02-20 22:07:21,673 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:07:21,673 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1474779370] [2022-02-20 22:07:21,673 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1474779370] provided 0 perfect and 1 imperfect interpolant sequences [2022-02-20 22:07:21,673 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [38676128] [2022-02-20 22:07:21,673 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:07:21,674 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-20 22:07:21,674 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-20 22:07:21,675 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-02-20 22:07:21,676 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-02-20 22:07:21,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:21,957 INFO L263 TraceCheckSpWp]: Trace formula consists of 1338 conjuncts, 13 conjunts are in the unsatisfiable core [2022-02-20 22:07:21,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:21,999 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-02-20 22:07:22,305 INFO L290 TraceCheckUtils]: 0: Hoare triple {55174#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(99, 2);call #Ultimate.allocInit(10, 3);call #Ultimate.allocInit(7, 4);call write~init~int(97, 4, 0, 1);call write~init~int(99, 4, 1, 1);call write~init~int(101, 4, 2, 1);call write~init~int(99, 4, 3, 1);call write~init~int(97, 4, 4, 1);call write~init~int(100, 4, 5, 1);call write~init~int(0, 4, 6, 1);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(20, 6);call #Ultimate.allocInit(57, 7);call #Ultimate.allocInit(2, 8);call write~init~int(32, 8, 0, 1);call write~init~int(0, 8, 1, 1);call #Ultimate.allocInit(8, 9);call #Ultimate.allocInit(34, 10);call #Ultimate.allocInit(32, 11);call #Ultimate.allocInit(11, 12);call #Ultimate.allocInit(48, 13);~LDV_IN_INTERRUPT~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset := 14, 0;call #Ultimate.allocInit(72, 14);call write~init~int(3, ~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 2 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(4, ~#usb_acecad_id_table~0.base, 4 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 6 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 8 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 10 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 11 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 12 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 13 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 14 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 15 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 16 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(3, ~#usb_acecad_id_table~0.base, 24 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 26 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(8, ~#usb_acecad_id_table~0.base, 28 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 30 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 32 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 34 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 35 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 36 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 37 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 38 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 39 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(1, ~#usb_acecad_id_table~0.base, 40 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(0, ~#usb_acecad_id_table~0.base, 48 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 50 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 52 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 54 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 56 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 58 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 59 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 60 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 61 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 62 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 63 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 64 + ~#usb_acecad_id_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.driver_info := 0;~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset := 15, 0;call #Ultimate.allocInit(264, 15);call write~init~$Pointer$(12, 0, ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_probe.base, #funAddr~usb_acecad_probe.offset, ~#usb_acecad_driver~0.base, 8 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_disconnect.base, #funAddr~usb_acecad_disconnect.offset, ~#usb_acecad_driver~0.base, 16 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 24 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 32 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 40 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 48 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 56 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 64 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, ~#usb_acecad_driver~0.base, 72 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 80 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 84 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 88 + ~#usb_acecad_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 92 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 100 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 108 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 116 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 124 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 132 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 136 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 144 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 152 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 160 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 168 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 176 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 184 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 192 + ~#usb_acecad_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 193 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 201 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 209 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 217 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 225 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 233 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 241 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 249 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 257 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 261 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 262 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 263 + ~#usb_acecad_driver~0.offset, 1);~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~URB_STATE~0 := 0;~DEV_STATE~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~int_urb~0.base, ~int_urb~0.offset := 0, 0;~bulk_urb~0.base, ~bulk_urb~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {55174#true} is VALID [2022-02-20 22:07:22,305 INFO L290 TraceCheckUtils]: 1: Hoare triple {55174#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret186#1.base, main_#t~ret186#1.offset, main_#t~nondet187#1, main_#t~switch188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~ret191#1, main_#t~nondet192#1, main_#t~switch193#1, main_#t~ret194#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~17#1.base, main_~tmp~17#1.offset, main_~tmp___0~6#1, main_~tmp___1~3#1, main_~tmp___2~1#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~17#1.base, main_~tmp~17#1.offset;havoc main_~tmp___0~6#1;havoc main_~tmp___1~3#1;havoc main_~tmp___2~1#1; {55174#true} is VALID [2022-02-20 22:07:22,305 INFO L272 TraceCheckUtils]: 2: Hoare triple {55174#true} call main_#t~ret186#1.base, main_#t~ret186#1.offset := ldv_init_zalloc(24); {55174#true} is VALID [2022-02-20 22:07:22,306 INFO L290 TraceCheckUtils]: 3: Hoare triple {55174#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {55174#true} is VALID [2022-02-20 22:07:22,306 INFO L272 TraceCheckUtils]: 4: Hoare triple {55174#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {55174#true} is VALID [2022-02-20 22:07:22,306 INFO L290 TraceCheckUtils]: 5: Hoare triple {55174#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {55174#true} is VALID [2022-02-20 22:07:22,306 INFO L290 TraceCheckUtils]: 6: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:22,306 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {55174#true} {55174#true} #547#return; {55174#true} is VALID [2022-02-20 22:07:22,306 INFO L290 TraceCheckUtils]: 8: Hoare triple {55174#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {55174#true} is VALID [2022-02-20 22:07:22,306 INFO L272 TraceCheckUtils]: 9: Hoare triple {55174#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {55174#true} is VALID [2022-02-20 22:07:22,307 INFO L290 TraceCheckUtils]: 10: Hoare triple {55174#true} ~cond := #in~cond; {55174#true} is VALID [2022-02-20 22:07:22,307 INFO L290 TraceCheckUtils]: 11: Hoare triple {55174#true} assume !(0 == ~cond); {55174#true} is VALID [2022-02-20 22:07:22,307 INFO L290 TraceCheckUtils]: 12: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:22,307 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {55174#true} {55174#true} #549#return; {55174#true} is VALID [2022-02-20 22:07:22,307 INFO L290 TraceCheckUtils]: 14: Hoare triple {55174#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {55174#true} is VALID [2022-02-20 22:07:22,307 INFO L290 TraceCheckUtils]: 15: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:22,307 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {55174#true} {55174#true} #553#return; {55174#true} is VALID [2022-02-20 22:07:22,307 INFO L290 TraceCheckUtils]: 17: Hoare triple {55174#true} main_~tmp~17#1.base, main_~tmp~17#1.offset := main_#t~ret186#1.base, main_#t~ret186#1.offset;havoc main_#t~ret186#1.base, main_#t~ret186#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~17#1.base, main_~tmp~17#1.offset;assume { :begin_inline_ldv_initialize } true; {55174#true} is VALID [2022-02-20 22:07:22,308 INFO L290 TraceCheckUtils]: 18: Hoare triple {55174#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1; {55174#true} is VALID [2022-02-20 22:07:22,308 INFO L290 TraceCheckUtils]: 19: Hoare triple {55174#true} assume -2147483648 <= main_#t~nondet187#1 && main_#t~nondet187#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet187#1;havoc main_#t~nondet187#1;main_#t~switch188#1 := 0 == main_~tmp___0~6#1; {55174#true} is VALID [2022-02-20 22:07:22,308 INFO L290 TraceCheckUtils]: 20: Hoare triple {55174#true} assume !main_#t~switch188#1;main_#t~switch188#1 := main_#t~switch188#1 || 1 == main_~tmp___0~6#1; {55174#true} is VALID [2022-02-20 22:07:22,308 INFO L290 TraceCheckUtils]: 21: Hoare triple {55174#true} assume main_#t~switch188#1; {55174#true} is VALID [2022-02-20 22:07:22,308 INFO L290 TraceCheckUtils]: 22: Hoare triple {55174#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet192#1 && main_#t~nondet192#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet192#1;havoc main_#t~nondet192#1;main_#t~switch193#1 := 0 == main_~tmp___2~1#1; {55174#true} is VALID [2022-02-20 22:07:22,308 INFO L290 TraceCheckUtils]: 23: Hoare triple {55174#true} assume !main_#t~switch193#1;main_#t~switch193#1 := main_#t~switch193#1 || 1 == main_~tmp___2~1#1; {55174#true} is VALID [2022-02-20 22:07:22,308 INFO L290 TraceCheckUtils]: 24: Hoare triple {55174#true} assume main_#t~switch193#1; {55174#true} is VALID [2022-02-20 22:07:22,308 INFO L290 TraceCheckUtils]: 25: Hoare triple {55174#true} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_usb_acecad_init } true;havoc usb_acecad_init_#res#1;havoc usb_acecad_init_#t~ret183#1, usb_acecad_init_#t~nondet184#1, usb_acecad_init_~result~0#1, usb_acecad_init_~tmp~15#1;havoc usb_acecad_init_~result~0#1;havoc usb_acecad_init_~tmp~15#1;assume { :begin_inline_usb_register } true;usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc usb_register_#res#1;havoc usb_register_#t~ret31#1, usb_register_~driver#1.base, usb_register_~driver#1.offset, usb_register_~tmp~1#1;usb_register_~driver#1.base, usb_register_~driver#1.offset := usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset;havoc usb_register_~tmp~1#1;assume { :begin_inline_ldv_usb_register_driver_2 } true;ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset := usb_register_~driver#1.base, usb_register_~driver#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 4, 0;havoc ldv_usb_register_driver_2_#res#1;havoc ldv_usb_register_driver_2_#t~ret196#1, ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset, ldv_usb_register_driver_2_~ldv_func_res~0#1, ldv_usb_register_driver_2_~tmp~19#1;ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_2_~ldv_func_res~0#1;havoc ldv_usb_register_driver_2_~tmp~19#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet217#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet217#1 && usb_register_driver_#t~nondet217#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet217#1;havoc usb_register_driver_#t~nondet217#1; {55174#true} is VALID [2022-02-20 22:07:22,309 INFO L290 TraceCheckUtils]: 26: Hoare triple {55174#true} ldv_usb_register_driver_2_#t~ret196#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_2_#t~ret196#1 && ldv_usb_register_driver_2_#t~ret196#1 <= 2147483647;ldv_usb_register_driver_2_~tmp~19#1 := ldv_usb_register_driver_2_#t~ret196#1;havoc ldv_usb_register_driver_2_#t~ret196#1;ldv_usb_register_driver_2_~ldv_func_res~0#1 := ldv_usb_register_driver_2_~tmp~19#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset, ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset;havoc ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {55174#true} is VALID [2022-02-20 22:07:22,309 INFO L272 TraceCheckUtils]: 27: Hoare triple {55174#true} call ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset := ldv_init_zalloc(1248); {55174#true} is VALID [2022-02-20 22:07:22,309 INFO L290 TraceCheckUtils]: 28: Hoare triple {55174#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {55174#true} is VALID [2022-02-20 22:07:22,309 INFO L272 TraceCheckUtils]: 29: Hoare triple {55174#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {55174#true} is VALID [2022-02-20 22:07:22,309 INFO L290 TraceCheckUtils]: 30: Hoare triple {55174#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {55174#true} is VALID [2022-02-20 22:07:22,309 INFO L290 TraceCheckUtils]: 31: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:22,309 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {55174#true} {55174#true} #547#return; {55174#true} is VALID [2022-02-20 22:07:22,309 INFO L290 TraceCheckUtils]: 33: Hoare triple {55174#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {55174#true} is VALID [2022-02-20 22:07:22,310 INFO L272 TraceCheckUtils]: 34: Hoare triple {55174#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {55174#true} is VALID [2022-02-20 22:07:22,310 INFO L290 TraceCheckUtils]: 35: Hoare triple {55174#true} ~cond := #in~cond; {55174#true} is VALID [2022-02-20 22:07:22,310 INFO L290 TraceCheckUtils]: 36: Hoare triple {55174#true} assume !(0 == ~cond); {55174#true} is VALID [2022-02-20 22:07:22,310 INFO L290 TraceCheckUtils]: 37: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:22,310 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {55174#true} {55174#true} #549#return; {55174#true} is VALID [2022-02-20 22:07:22,310 INFO L290 TraceCheckUtils]: 39: Hoare triple {55174#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {55174#true} is VALID [2022-02-20 22:07:22,310 INFO L290 TraceCheckUtils]: 40: Hoare triple {55174#true} assume true; {55174#true} is VALID [2022-02-20 22:07:22,310 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {55174#true} {55174#true} #611#return; {55174#true} is VALID [2022-02-20 22:07:22,310 INFO L290 TraceCheckUtils]: 42: Hoare triple {55174#true} ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset := ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset;havoc ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {55174#true} is VALID [2022-02-20 22:07:22,311 INFO L290 TraceCheckUtils]: 43: Hoare triple {55174#true} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_2_#res#1 := ldv_usb_register_driver_2_~ldv_func_res~0#1; {55174#true} is VALID [2022-02-20 22:07:22,311 INFO L290 TraceCheckUtils]: 44: Hoare triple {55174#true} usb_register_#t~ret31#1 := ldv_usb_register_driver_2_#res#1;assume { :end_inline_ldv_usb_register_driver_2 } true;assume -2147483648 <= usb_register_#t~ret31#1 && usb_register_#t~ret31#1 <= 2147483647;usb_register_~tmp~1#1 := usb_register_#t~ret31#1;havoc usb_register_#t~ret31#1;usb_register_#res#1 := usb_register_~tmp~1#1; {55174#true} is VALID [2022-02-20 22:07:22,311 INFO L290 TraceCheckUtils]: 45: Hoare triple {55174#true} usb_acecad_init_#t~ret183#1 := usb_register_#res#1;assume { :end_inline_usb_register } true;assume -2147483648 <= usb_acecad_init_#t~ret183#1 && usb_acecad_init_#t~ret183#1 <= 2147483647;usb_acecad_init_~tmp~15#1 := usb_acecad_init_#t~ret183#1;havoc usb_acecad_init_#t~ret183#1;usb_acecad_init_~result~0#1 := usb_acecad_init_~tmp~15#1; {55174#true} is VALID [2022-02-20 22:07:22,311 INFO L290 TraceCheckUtils]: 46: Hoare triple {55174#true} assume 0 == usb_acecad_init_~result~0#1;havoc usb_acecad_init_#t~nondet184#1; {55174#true} is VALID [2022-02-20 22:07:22,311 INFO L290 TraceCheckUtils]: 47: Hoare triple {55174#true} usb_acecad_init_#res#1 := usb_acecad_init_~result~0#1; {55174#true} is VALID [2022-02-20 22:07:22,311 INFO L290 TraceCheckUtils]: 48: Hoare triple {55174#true} main_#t~ret194#1 := usb_acecad_init_#res#1;assume { :end_inline_usb_acecad_init } true;assume -2147483648 <= main_#t~ret194#1 && main_#t~ret194#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret194#1;havoc main_#t~ret194#1; {55174#true} is VALID [2022-02-20 22:07:22,311 INFO L290 TraceCheckUtils]: 49: Hoare triple {55174#true} assume 0 == ~ldv_retval_1~0;~ldv_state_variable_0~0 := 3; {55174#true} is VALID [2022-02-20 22:07:22,311 INFO L290 TraceCheckUtils]: 50: Hoare triple {55174#true} assume !(0 != ~ldv_retval_1~0); {55174#true} is VALID [2022-02-20 22:07:22,312 INFO L290 TraceCheckUtils]: 51: Hoare triple {55174#true} assume -2147483648 <= main_#t~nondet187#1 && main_#t~nondet187#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet187#1;havoc main_#t~nondet187#1;main_#t~switch188#1 := 0 == main_~tmp___0~6#1; {55174#true} is VALID [2022-02-20 22:07:22,312 INFO L290 TraceCheckUtils]: 52: Hoare triple {55174#true} assume main_#t~switch188#1; {55174#true} is VALID [2022-02-20 22:07:22,312 INFO L290 TraceCheckUtils]: 53: Hoare triple {55174#true} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= main_#t~nondet189#1 && main_#t~nondet189#1 <= 2147483647;main_~tmp___1~3#1 := main_#t~nondet189#1;havoc main_#t~nondet189#1;main_#t~switch190#1 := 0 == main_~tmp___1~3#1; {55174#true} is VALID [2022-02-20 22:07:22,312 INFO L290 TraceCheckUtils]: 54: Hoare triple {55174#true} assume main_#t~switch190#1; {55174#true} is VALID [2022-02-20 22:07:22,312 INFO L290 TraceCheckUtils]: 55: Hoare triple {55174#true} assume 1 == ~ldv_state_variable_1~0;assume { :begin_inline_usb_acecad_probe } true;usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset, usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset := ~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc usb_acecad_probe_#res#1;havoc usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset, usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset, usb_acecad_probe_#t~mem132#1, usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset, usb_acecad_probe_#t~ret134#1, usb_acecad_probe_#t~mem135#1, usb_acecad_probe_#t~ret136#1, usb_acecad_probe_#t~ret137#1, usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset, usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset, usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset, usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset, usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset, usb_acecad_probe_#t~mem143#1.base, usb_acecad_probe_#t~mem143#1.offset, usb_acecad_probe_#t~mem144#1.base, usb_acecad_probe_#t~mem144#1.offset, usb_acecad_probe_#t~mem145#1.base, usb_acecad_probe_#t~mem145#1.offset, usb_acecad_probe_#t~ret146#1, usb_acecad_probe_#t~mem147#1.base, usb_acecad_probe_#t~mem147#1.offset, usb_acecad_probe_#t~mem148#1.base, usb_acecad_probe_#t~mem148#1.offset, usb_acecad_probe_#t~ret149#1, usb_acecad_probe_#t~mem150#1.base, usb_acecad_probe_#t~mem150#1.offset, usb_acecad_probe_#t~ret151#1, usb_acecad_probe_#t~ret152#1, usb_acecad_probe_#t~ret153#1, usb_acecad_probe_#t~mem154#1, usb_acecad_probe_#t~switch155#1, usb_acecad_probe_#t~nondet156#1, usb_acecad_probe_#t~nondet157#1, usb_acecad_probe_#t~mem158#1, usb_acecad_probe_#t~mem159#1, usb_acecad_probe_#t~nondet160#1, usb_acecad_probe_#t~nondet161#1, usb_acecad_probe_#t~mem162#1, usb_acecad_probe_#t~mem163#1, usb_acecad_probe_#t~mem164#1.base, usb_acecad_probe_#t~mem164#1.offset, usb_acecad_probe_#t~mem165#1.base, usb_acecad_probe_#t~mem165#1.offset, usb_acecad_probe_#t~ite166#1, usb_acecad_probe_#t~mem167#1, usb_acecad_probe_#t~mem168#1.base, usb_acecad_probe_#t~mem168#1.offset, usb_acecad_probe_#t~mem169#1, usb_acecad_probe_#t~mem170#1.base, usb_acecad_probe_#t~mem170#1.offset, usb_acecad_probe_#t~mem171#1.base, usb_acecad_probe_#t~mem171#1.offset, usb_acecad_probe_#t~mem172#1, usb_acecad_probe_#t~mem173#1.base, usb_acecad_probe_#t~mem173#1.offset, usb_acecad_probe_#t~ret174#1, usb_acecad_probe_#t~mem175#1.base, usb_acecad_probe_#t~mem175#1.offset, usb_acecad_probe_#t~mem176#1, usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset, usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset, usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset, usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset, usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset, usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset, usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset, usb_acecad_probe_~pipe~0#1, usb_acecad_probe_~maxp~0#1, usb_acecad_probe_~err~0#1, usb_acecad_probe_~tmp___0~5#1, usb_acecad_probe_~tmp___1~2#1, usb_acecad_probe_~tmp___2~0#1, usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset, usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~tmp___5~0#1, usb_acecad_probe_~tmp___6~0#1;usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset := usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset;usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset := usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset;havoc usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset;havoc usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;havoc usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset;havoc usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset;havoc usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset;havoc usb_acecad_probe_~pipe~0#1;havoc usb_acecad_probe_~maxp~0#1;havoc usb_acecad_probe_~err~0#1;havoc usb_acecad_probe_~tmp___0~5#1;havoc usb_acecad_probe_~tmp___1~2#1;havoc usb_acecad_probe_~tmp___2~0#1;havoc usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;havoc usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset;havoc usb_acecad_probe_~tmp___5~0#1;havoc usb_acecad_probe_~tmp___6~0#1;assume { :begin_inline_interface_to_usbdev } true;interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset := usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset;havoc interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;havoc interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset, interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset, interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset := interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset;havoc interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;assume { :begin_inline_ldv_interface_to_usbdev } true;havoc ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;havoc ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset, ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset;havoc ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset; {55174#true} is VALID [2022-02-20 22:07:22,312 INFO L272 TraceCheckUtils]: 56: Hoare triple {55174#true} call ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset := ldv_malloc(1822); {55174#true} is VALID [2022-02-20 22:07:22,312 INFO L290 TraceCheckUtils]: 57: Hoare triple {55174#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {55174#true} is VALID [2022-02-20 22:07:22,313 INFO L290 TraceCheckUtils]: 58: Hoare triple {55174#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {55275#(and (<= 0 |ldv_malloc_#res.base|) (<= |ldv_malloc_#res.offset| 0) (<= |ldv_malloc_#res.base| 0) (<= 0 |ldv_malloc_#res.offset|))} is VALID [2022-02-20 22:07:22,313 INFO L290 TraceCheckUtils]: 59: Hoare triple {55275#(and (<= 0 |ldv_malloc_#res.base|) (<= |ldv_malloc_#res.offset| 0) (<= |ldv_malloc_#res.base| 0) (<= 0 |ldv_malloc_#res.offset|))} assume true; {55275#(and (<= 0 |ldv_malloc_#res.base|) (<= |ldv_malloc_#res.offset| 0) (<= |ldv_malloc_#res.base| 0) (<= 0 |ldv_malloc_#res.offset|))} is VALID [2022-02-20 22:07:22,314 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {55275#(and (<= 0 |ldv_malloc_#res.base|) (<= |ldv_malloc_#res.offset| 0) (<= |ldv_malloc_#res.base| 0) (<= 0 |ldv_malloc_#res.offset|))} {55174#true} #555#return; {55208#(and (= |ULTIMATE.start_ldv_interface_to_usbdev_#t~ret208#1.offset| 0) (= |ULTIMATE.start_ldv_interface_to_usbdev_#t~ret208#1.base| 0))} is VALID [2022-02-20 22:07:22,314 INFO L290 TraceCheckUtils]: 61: Hoare triple {55208#(and (= |ULTIMATE.start_ldv_interface_to_usbdev_#t~ret208#1.offset| 0) (= |ULTIMATE.start_ldv_interface_to_usbdev_#t~ret208#1.base| 0))} ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset := ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset;havoc ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset; {55209#(and (= |ULTIMATE.start_ldv_interface_to_usbdev_~result~1#1.offset| 0) (= |ULTIMATE.start_ldv_interface_to_usbdev_~result~1#1.base| 0))} is VALID [2022-02-20 22:07:22,315 INFO L290 TraceCheckUtils]: 62: Hoare triple {55209#(and (= |ULTIMATE.start_ldv_interface_to_usbdev_~result~1#1.offset| 0) (= |ULTIMATE.start_ldv_interface_to_usbdev_~result~1#1.base| 0))} assume !(0 == (ldv_interface_to_usbdev_~result~1#1.base + ldv_interface_to_usbdev_~result~1#1.offset) % 18446744073709551616);ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset := ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset; {55175#false} is VALID [2022-02-20 22:07:22,315 INFO L290 TraceCheckUtils]: 63: Hoare triple {55175#false} interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset := ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;assume { :end_inline_ldv_interface_to_usbdev } true;interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset := interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset;havoc interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset;interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset := interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset; {55175#false} is VALID [2022-02-20 22:07:22,315 INFO L290 TraceCheckUtils]: 64: Hoare triple {55175#false} usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset := interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;assume { :end_inline_interface_to_usbdev } true;usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset := usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset;havoc usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset;usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset := usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;call usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset := read~$Pointer$(usb_acecad_probe_~intf#1.base, 8 + usb_acecad_probe_~intf#1.offset, 8);usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset := usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset;havoc usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset;call usb_acecad_probe_#t~mem132#1 := read~int(usb_acecad_probe_~interface~0#1.base, 4 + usb_acecad_probe_~interface~0#1.offset, 1); {55175#false} is VALID [2022-02-20 22:07:22,315 INFO L290 TraceCheckUtils]: 65: Hoare triple {55175#false} assume !(1 != usb_acecad_probe_#t~mem132#1 % 256 % 4294967296);havoc usb_acecad_probe_#t~mem132#1;call usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset := read~$Pointer$(usb_acecad_probe_~interface~0#1.base, 9 + usb_acecad_probe_~interface~0#1.offset, 8);usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset := usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset;havoc usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset;assume { :begin_inline_usb_endpoint_is_int_in } true;usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset := usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_endpoint_is_int_in_#res#1;havoc usb_endpoint_is_int_in_#t~ret3#1, usb_endpoint_is_int_in_#t~ret4#1, usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset, usb_endpoint_is_int_in_~tmp~0#1, usb_endpoint_is_int_in_~tmp___0~0#1, usb_endpoint_is_int_in_~tmp___1~0#1;usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset := usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset;havoc usb_endpoint_is_int_in_~tmp~0#1;havoc usb_endpoint_is_int_in_~tmp___0~0#1;havoc usb_endpoint_is_int_in_~tmp___1~0#1;assume { :begin_inline_usb_endpoint_xfer_int } true;usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset := usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset;havoc usb_endpoint_xfer_int_#res#1;havoc usb_endpoint_xfer_int_#t~mem2#1, usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset;usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset := usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset;call usb_endpoint_xfer_int_#t~mem2#1 := read~int(usb_endpoint_xfer_int_~epd#1.base, 3 + usb_endpoint_xfer_int_~epd#1.offset, 1);usb_endpoint_xfer_int_#res#1 := (if 3 == (if 0 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 0 else (if 1 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 1 else ~bitwiseAnd(usb_endpoint_xfer_int_#t~mem2#1 % 256, 3))) then 1 else 0);havoc usb_endpoint_xfer_int_#t~mem2#1; {55175#false} is VALID [2022-02-20 22:07:22,315 INFO L290 TraceCheckUtils]: 66: Hoare triple {55175#false} usb_endpoint_is_int_in_#t~ret3#1 := usb_endpoint_xfer_int_#res#1;assume { :end_inline_usb_endpoint_xfer_int } true;assume -2147483648 <= usb_endpoint_is_int_in_#t~ret3#1 && usb_endpoint_is_int_in_#t~ret3#1 <= 2147483647;usb_endpoint_is_int_in_~tmp~0#1 := usb_endpoint_is_int_in_#t~ret3#1;havoc usb_endpoint_is_int_in_#t~ret3#1; {55175#false} is VALID [2022-02-20 22:07:22,316 INFO L290 TraceCheckUtils]: 67: Hoare triple {55175#false} assume 0 != usb_endpoint_is_int_in_~tmp~0#1;assume { :begin_inline_usb_endpoint_dir_in } true;usb_endpoint_dir_in_#in~epd#1.base, usb_endpoint_dir_in_#in~epd#1.offset := usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset;havoc usb_endpoint_dir_in_#res#1;havoc usb_endpoint_dir_in_#t~mem1#1, usb_endpoint_dir_in_~epd#1.base, usb_endpoint_dir_in_~epd#1.offset;usb_endpoint_dir_in_~epd#1.base, usb_endpoint_dir_in_~epd#1.offset := usb_endpoint_dir_in_#in~epd#1.base, usb_endpoint_dir_in_#in~epd#1.offset;call usb_endpoint_dir_in_#t~mem1#1 := read~int(usb_endpoint_dir_in_~epd#1.base, 2 + usb_endpoint_dir_in_~epd#1.offset, 1);usb_endpoint_dir_in_#res#1 := (if (if usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 <= 127 then usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 else usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 - 256) < 0 then 1 else 0);havoc usb_endpoint_dir_in_#t~mem1#1; {55175#false} is VALID [2022-02-20 22:07:22,316 INFO L290 TraceCheckUtils]: 68: Hoare triple {55175#false} usb_endpoint_is_int_in_#t~ret4#1 := usb_endpoint_dir_in_#res#1;assume { :end_inline_usb_endpoint_dir_in } true;assume -2147483648 <= usb_endpoint_is_int_in_#t~ret4#1 && usb_endpoint_is_int_in_#t~ret4#1 <= 2147483647;usb_endpoint_is_int_in_~tmp___0~0#1 := usb_endpoint_is_int_in_#t~ret4#1;havoc usb_endpoint_is_int_in_#t~ret4#1; {55175#false} is VALID [2022-02-20 22:07:22,316 INFO L290 TraceCheckUtils]: 69: Hoare triple {55175#false} assume 0 != usb_endpoint_is_int_in_~tmp___0~0#1;usb_endpoint_is_int_in_~tmp___1~0#1 := 1; {55175#false} is VALID [2022-02-20 22:07:22,316 INFO L290 TraceCheckUtils]: 70: Hoare triple {55175#false} usb_endpoint_is_int_in_#res#1 := usb_endpoint_is_int_in_~tmp___1~0#1; {55175#false} is VALID [2022-02-20 22:07:22,316 INFO L290 TraceCheckUtils]: 71: Hoare triple {55175#false} usb_acecad_probe_#t~ret134#1 := usb_endpoint_is_int_in_#res#1;assume { :end_inline_usb_endpoint_is_int_in } true;assume -2147483648 <= usb_acecad_probe_#t~ret134#1 && usb_acecad_probe_#t~ret134#1 <= 2147483647;usb_acecad_probe_~tmp___0~5#1 := usb_acecad_probe_#t~ret134#1;havoc usb_acecad_probe_#t~ret134#1; {55175#false} is VALID [2022-02-20 22:07:22,316 INFO L290 TraceCheckUtils]: 72: Hoare triple {55175#false} assume !(0 == usb_acecad_probe_~tmp___0~5#1);call usb_acecad_probe_#t~mem135#1 := read~int(usb_acecad_probe_~endpoint~0#1.base, 2 + usb_acecad_probe_~endpoint~0#1.offset, 1);assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_#t~mem135#1 % 256;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem45#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem45#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := (if (1 == 256 * __create_pipe_#t~mem45#1 || 0 == 256 * __create_pipe_#t~mem45#1) && 0 == 32768 * __create_pipe_~endpoint#1 then 256 * __create_pipe_#t~mem45#1 else (if 0 == 256 * __create_pipe_#t~mem45#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1) then 32768 * __create_pipe_~endpoint#1 else (if (1 == 256 * __create_pipe_#t~mem45#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1)) || ((1 == 256 * __create_pipe_#t~mem45#1 || 0 == 256 * __create_pipe_#t~mem45#1) && 1 == 32768 * __create_pipe_~endpoint#1) then 1 else ~bitwiseOr(256 * __create_pipe_#t~mem45#1, 32768 * __create_pipe_~endpoint#1))));havoc __create_pipe_#t~mem45#1; {55175#false} is VALID [2022-02-20 22:07:22,316 INFO L290 TraceCheckUtils]: 73: Hoare triple {55175#false} usb_acecad_probe_#t~ret136#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;usb_acecad_probe_~tmp___1~2#1 := usb_acecad_probe_#t~ret136#1;havoc usb_acecad_probe_#t~mem135#1;havoc usb_acecad_probe_#t~ret136#1;usb_acecad_probe_~pipe~0#1 := (if ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 else ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 - 4294967296);assume { :begin_inline_usb_maxpacket } true;usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset, usb_maxpacket_#in~pipe#1, usb_maxpacket_#in~is_out#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~pipe~0#1, (if 0 == (if 0 == usb_acecad_probe_~pipe~0#1 then 0 else (if 1 == usb_acecad_probe_~pipe~0#1 then 0 else ~bitwiseAnd(usb_acecad_probe_~pipe~0#1, 128))) then 1 else 0);havoc usb_maxpacket_#res#1;havoc usb_maxpacket_#t~ret47#1, usb_maxpacket_#t~ret48#1, usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset, usb_maxpacket_#t~ret50#1, usb_maxpacket_#t~ret51#1, usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset, usb_maxpacket_#t~mem53#1, usb_maxpacket_#t~nondet46#1, usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset, usb_maxpacket_~pipe#1, usb_maxpacket_~is_out#1, usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset, usb_maxpacket_~epnum~0#1, usb_maxpacket_~__ret_warn_on~0#1, usb_maxpacket_~tmp~2#1, usb_maxpacket_~__ret_warn_on___0~0#1, usb_maxpacket_~tmp___0~1#1;usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset := usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset;usb_maxpacket_~pipe#1 := usb_maxpacket_#in~pipe#1;usb_maxpacket_~is_out#1 := usb_maxpacket_#in~is_out#1;havoc usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset;havoc usb_maxpacket_~epnum~0#1;havoc usb_maxpacket_~__ret_warn_on~0#1;havoc usb_maxpacket_~tmp~2#1;havoc usb_maxpacket_~__ret_warn_on___0~0#1;havoc usb_maxpacket_~tmp___0~1#1; {55175#false} is VALID [2022-02-20 22:07:22,317 INFO L290 TraceCheckUtils]: 74: Hoare triple {55175#false} assume 0 == usb_maxpacket_~pipe#1 / 32768;usb_maxpacket_~epnum~0#1 := 0; {55175#false} is VALID [2022-02-20 22:07:22,317 INFO L290 TraceCheckUtils]: 75: Hoare triple {55175#false} assume !(0 != usb_maxpacket_~is_out#1);usb_maxpacket_~__ret_warn_on___0~0#1 := (if 0 == (if 0 == usb_maxpacket_~pipe#1 then 0 else (if 1 == usb_maxpacket_~pipe#1 then 0 else ~bitwiseAnd(usb_maxpacket_~pipe#1, 128))) then 1 else 0); {55175#false} is VALID [2022-02-20 22:07:22,317 INFO L272 TraceCheckUtils]: 76: Hoare triple {55175#false} call usb_maxpacket_#t~ret50#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {55175#false} is VALID [2022-02-20 22:07:22,317 INFO L290 TraceCheckUtils]: 77: Hoare triple {55175#false} ~exp := #in~exp;~c := #in~c;#res := ~exp; {55175#false} is VALID [2022-02-20 22:07:22,317 INFO L290 TraceCheckUtils]: 78: Hoare triple {55175#false} assume true; {55175#false} is VALID [2022-02-20 22:07:22,317 INFO L284 TraceCheckUtils]: 79: Hoare quadruple {55175#false} {55175#false} #563#return; {55175#false} is VALID [2022-02-20 22:07:22,317 INFO L290 TraceCheckUtils]: 80: Hoare triple {55175#false} assume -9223372036854775808 <= usb_maxpacket_#t~ret50#1 && usb_maxpacket_#t~ret50#1 <= 9223372036854775807;usb_maxpacket_~tmp___0~1#1 := usb_maxpacket_#t~ret50#1;havoc usb_maxpacket_#t~ret50#1; {55175#false} is VALID [2022-02-20 22:07:22,317 INFO L290 TraceCheckUtils]: 81: Hoare triple {55175#false} assume !(0 != usb_maxpacket_~tmp___0~1#1); {55175#false} is VALID [2022-02-20 22:07:22,318 INFO L272 TraceCheckUtils]: 82: Hoare triple {55175#false} call usb_maxpacket_#t~ret51#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {55175#false} is VALID [2022-02-20 22:07:22,318 INFO L290 TraceCheckUtils]: 83: Hoare triple {55175#false} ~exp := #in~exp;~c := #in~c;#res := ~exp; {55175#false} is VALID [2022-02-20 22:07:22,318 INFO L290 TraceCheckUtils]: 84: Hoare triple {55175#false} assume true; {55175#false} is VALID [2022-02-20 22:07:22,318 INFO L284 TraceCheckUtils]: 85: Hoare quadruple {55175#false} {55175#false} #567#return; {55175#false} is VALID [2022-02-20 22:07:22,318 INFO L290 TraceCheckUtils]: 86: Hoare triple {55175#false} assume -9223372036854775808 <= usb_maxpacket_#t~ret51#1 && usb_maxpacket_#t~ret51#1 <= 9223372036854775807;havoc usb_maxpacket_#t~ret51#1;call usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset := read~$Pointer$(usb_maxpacket_~udev#1.base, 1186 + usb_maxpacket_~udev#1.offset + 8 * (usb_maxpacket_~epnum~0#1 % 4294967296), 8);usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset := usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset;havoc usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset; {55175#false} is VALID [2022-02-20 22:07:22,318 INFO L290 TraceCheckUtils]: 87: Hoare triple {55175#false} assume 0 == (usb_maxpacket_~ep~0#1.base + usb_maxpacket_~ep~0#1.offset) % 18446744073709551616;usb_maxpacket_#res#1 := 0; {55175#false} is VALID [2022-02-20 22:07:22,318 INFO L290 TraceCheckUtils]: 88: Hoare triple {55175#false} usb_acecad_probe_#t~ret137#1 := usb_maxpacket_#res#1;assume { :end_inline_usb_maxpacket } true;usb_acecad_probe_~tmp___2~0#1 := usb_acecad_probe_#t~ret137#1;havoc usb_acecad_probe_#t~ret137#1;usb_acecad_probe_~maxp~0#1 := usb_acecad_probe_~tmp___2~0#1 % 65536; {55175#false} is VALID [2022-02-20 22:07:22,318 INFO L272 TraceCheckUtils]: 89: Hoare triple {55175#false} call usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset := kzalloc(232, 208); {55175#false} is VALID [2022-02-20 22:07:22,319 INFO L290 TraceCheckUtils]: 90: Hoare triple {55175#false} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {55175#false} is VALID [2022-02-20 22:07:22,319 INFO L272 TraceCheckUtils]: 91: Hoare triple {55175#false} call __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset := ldv_malloc(__kmalloc_~size#1); {55175#false} is VALID [2022-02-20 22:07:22,319 INFO L290 TraceCheckUtils]: 92: Hoare triple {55175#false} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {55175#false} is VALID [2022-02-20 22:07:22,319 INFO L290 TraceCheckUtils]: 93: Hoare triple {55175#false} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {55175#false} is VALID [2022-02-20 22:07:22,319 INFO L290 TraceCheckUtils]: 94: Hoare triple {55175#false} assume true; {55175#false} is VALID [2022-02-20 22:07:22,319 INFO L284 TraceCheckUtils]: 95: Hoare quadruple {55175#false} {55175#false} #539#return; {55175#false} is VALID [2022-02-20 22:07:22,319 INFO L290 TraceCheckUtils]: 96: Hoare triple {55175#false} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset; {55175#false} is VALID [2022-02-20 22:07:22,320 INFO L290 TraceCheckUtils]: 97: Hoare triple {55175#false} kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {55175#false} is VALID [2022-02-20 22:07:22,320 INFO L290 TraceCheckUtils]: 98: Hoare triple {55175#false} #t~ret58#1.base, #t~ret58#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret58#1.base, #t~ret58#1.offset;havoc #t~ret58#1.base, #t~ret58#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {55175#false} is VALID [2022-02-20 22:07:22,320 INFO L290 TraceCheckUtils]: 99: Hoare triple {55175#false} assume true; {55175#false} is VALID [2022-02-20 22:07:22,320 INFO L284 TraceCheckUtils]: 100: Hoare quadruple {55175#false} {55175#false} #569#return; {55175#false} is VALID [2022-02-20 22:07:22,320 INFO L290 TraceCheckUtils]: 101: Hoare triple {55175#false} usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset := usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset;havoc usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset;usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset := usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;assume { :begin_inline_input_allocate_device } true;havoc input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;havoc input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset; {55175#false} is VALID [2022-02-20 22:07:22,320 INFO L272 TraceCheckUtils]: 102: Hoare triple {55175#false} call input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset := kzalloc(1855, ~bitwiseOr(~bitwiseOr(16, 64), 128)); {55175#false} is VALID [2022-02-20 22:07:22,320 INFO L290 TraceCheckUtils]: 103: Hoare triple {55175#false} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {55175#false} is VALID [2022-02-20 22:07:22,321 INFO L272 TraceCheckUtils]: 104: Hoare triple {55175#false} call __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset := ldv_malloc(__kmalloc_~size#1); {55175#false} is VALID [2022-02-20 22:07:22,321 INFO L290 TraceCheckUtils]: 105: Hoare triple {55175#false} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {55175#false} is VALID [2022-02-20 22:07:22,321 INFO L290 TraceCheckUtils]: 106: Hoare triple {55175#false} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {55175#false} is VALID [2022-02-20 22:07:22,321 INFO L290 TraceCheckUtils]: 107: Hoare triple {55175#false} assume true; {55175#false} is VALID [2022-02-20 22:07:22,321 INFO L284 TraceCheckUtils]: 108: Hoare quadruple {55175#false} {55175#false} #539#return; {55175#false} is VALID [2022-02-20 22:07:22,321 INFO L290 TraceCheckUtils]: 109: Hoare triple {55175#false} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset; {55175#false} is VALID [2022-02-20 22:07:22,321 INFO L290 TraceCheckUtils]: 110: Hoare triple {55175#false} kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {55175#false} is VALID [2022-02-20 22:07:22,321 INFO L290 TraceCheckUtils]: 111: Hoare triple {55175#false} #t~ret58#1.base, #t~ret58#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret58#1.base, #t~ret58#1.offset;havoc #t~ret58#1.base, #t~ret58#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {55175#false} is VALID [2022-02-20 22:07:22,321 INFO L290 TraceCheckUtils]: 112: Hoare triple {55175#false} assume true; {55175#false} is VALID [2022-02-20 22:07:22,322 INFO L284 TraceCheckUtils]: 113: Hoare quadruple {55175#false} {55175#false} #571#return; {55175#false} is VALID [2022-02-20 22:07:22,322 INFO L290 TraceCheckUtils]: 114: Hoare triple {55175#false} input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset := input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset;havoc input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset; {55175#false} is VALID [2022-02-20 22:07:22,322 INFO L290 TraceCheckUtils]: 115: Hoare triple {55175#false} usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset := input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;assume { :end_inline_input_allocate_device } true;usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset := usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset;havoc usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset; {55175#false} is VALID [2022-02-20 22:07:22,322 INFO L290 TraceCheckUtils]: 116: Hoare triple {55175#false} assume !(0 == (usb_acecad_probe_~acecad~3#1.base + usb_acecad_probe_~acecad~3#1.offset) % 18446744073709551616 || 0 == (usb_acecad_probe_~input_dev~0#1.base + usb_acecad_probe_~input_dev~0#1.offset) % 18446744073709551616);assume { :begin_inline_usb_alloc_coherent } true;usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset, usb_alloc_coherent_#in~arg1#1, usb_alloc_coherent_#in~arg2#1, usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, 8, 208, usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset;havoc usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;havoc usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset, usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset, usb_alloc_coherent_~arg1#1, usb_alloc_coherent_~arg2#1, usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset;usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset := usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset;usb_alloc_coherent_~arg1#1 := usb_alloc_coherent_#in~arg1#1;usb_alloc_coherent_~arg2#1 := usb_alloc_coherent_#in~arg2#1;usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset := usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset; {55175#false} is VALID [2022-02-20 22:07:22,322 INFO L272 TraceCheckUtils]: 117: Hoare triple {55175#false} call usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset := ldv_malloc(0); {55175#false} is VALID [2022-02-20 22:07:22,322 INFO L290 TraceCheckUtils]: 118: Hoare triple {55175#false} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {55175#false} is VALID [2022-02-20 22:07:22,322 INFO L290 TraceCheckUtils]: 119: Hoare triple {55175#false} assume !(0 != ~tmp___0~2);call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size);~tmp~4.base, ~tmp~4.offset := #t~malloc63.base, #t~malloc63.offset;havoc #t~malloc63.base, #t~malloc63.offset;~p~0.base, ~p~0.offset := ~tmp~4.base, ~tmp~4.offset; {55175#false} is VALID [2022-02-20 22:07:22,322 INFO L272 TraceCheckUtils]: 120: Hoare triple {55175#false} call assume_abort_if_not((if 0 != (~p~0.base + ~p~0.offset) % 18446744073709551616 then 1 else 0)); {55175#false} is VALID [2022-02-20 22:07:22,323 INFO L290 TraceCheckUtils]: 121: Hoare triple {55175#false} ~cond := #in~cond; {55175#false} is VALID [2022-02-20 22:07:22,323 INFO L290 TraceCheckUtils]: 122: Hoare triple {55175#false} assume !(0 == ~cond); {55175#false} is VALID [2022-02-20 22:07:22,323 INFO L290 TraceCheckUtils]: 123: Hoare triple {55175#false} assume true; {55175#false} is VALID [2022-02-20 22:07:22,323 INFO L284 TraceCheckUtils]: 124: Hoare quadruple {55175#false} {55175#false} #551#return; {55175#false} is VALID [2022-02-20 22:07:22,323 INFO L290 TraceCheckUtils]: 125: Hoare triple {55175#false} #res.base, #res.offset := ~p~0.base, ~p~0.offset; {55175#false} is VALID [2022-02-20 22:07:22,323 INFO L290 TraceCheckUtils]: 126: Hoare triple {55175#false} assume true; {55175#false} is VALID [2022-02-20 22:07:22,323 INFO L284 TraceCheckUtils]: 127: Hoare quadruple {55175#false} {55175#false} #573#return; {55175#false} is VALID [2022-02-20 22:07:22,323 INFO L290 TraceCheckUtils]: 128: Hoare triple {55175#false} usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset := usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset;havoc usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset; {55175#false} is VALID [2022-02-20 22:07:22,324 INFO L290 TraceCheckUtils]: 129: Hoare triple {55175#false} usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset := usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;assume { :end_inline_usb_alloc_coherent } true;usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset := usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset;havoc usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset;call write~$Pointer$(usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8); {55175#false} is VALID [2022-02-20 22:07:22,324 INFO L290 TraceCheckUtils]: 130: Hoare triple {55175#false} assume !(0 == (usb_acecad_probe_#t~mem141#1.base + usb_acecad_probe_#t~mem141#1.offset) % 18446744073709551616);havoc usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset;assume { :begin_inline_ldv_usb_alloc_urb_5 } true;ldv_usb_alloc_urb_5_#in~ldv_func_arg1#1, ldv_usb_alloc_urb_5_#in~ldv_func_arg2#1 := 0, 208;havoc ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset, ldv_usb_alloc_urb_5_~ldv_func_arg1#1, ldv_usb_alloc_urb_5_~ldv_func_arg2#1, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset, ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;ldv_usb_alloc_urb_5_~ldv_func_arg1#1 := ldv_usb_alloc_urb_5_#in~ldv_func_arg1#1;ldv_usb_alloc_urb_5_~ldv_func_arg2#1 := ldv_usb_alloc_urb_5_#in~ldv_func_arg2#1;havoc ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset;havoc ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;assume { :begin_inline_usb_alloc_urb } true;usb_alloc_urb_#in~arg0#1, usb_alloc_urb_#in~arg1#1 := ldv_usb_alloc_urb_5_~ldv_func_arg1#1, ldv_usb_alloc_urb_5_~ldv_func_arg2#1;havoc usb_alloc_urb_#res#1.base, usb_alloc_urb_#res#1.offset;havoc usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset, usb_alloc_urb_~arg0#1, usb_alloc_urb_~arg1#1;usb_alloc_urb_~arg0#1 := usb_alloc_urb_#in~arg0#1;usb_alloc_urb_~arg1#1 := usb_alloc_urb_#in~arg1#1; {55175#false} is VALID [2022-02-20 22:07:22,324 INFO L272 TraceCheckUtils]: 131: Hoare triple {55175#false} call usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset := ldv_malloc(180); {55175#false} is VALID [2022-02-20 22:07:22,324 INFO L290 TraceCheckUtils]: 132: Hoare triple {55175#false} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {55175#false} is VALID [2022-02-20 22:07:22,324 INFO L290 TraceCheckUtils]: 133: Hoare triple {55175#false} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {55175#false} is VALID [2022-02-20 22:07:22,324 INFO L290 TraceCheckUtils]: 134: Hoare triple {55175#false} assume true; {55175#false} is VALID [2022-02-20 22:07:22,324 INFO L284 TraceCheckUtils]: 135: Hoare quadruple {55175#false} {55175#false} #575#return; {55175#false} is VALID [2022-02-20 22:07:22,324 INFO L290 TraceCheckUtils]: 136: Hoare triple {55175#false} usb_alloc_urb_#res#1.base, usb_alloc_urb_#res#1.offset := usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset;havoc usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset; {55175#false} is VALID [2022-02-20 22:07:22,325 INFO L290 TraceCheckUtils]: 137: Hoare triple {55175#false} ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset := usb_alloc_urb_#res#1.base, usb_alloc_urb_#res#1.offset;assume { :end_inline_usb_alloc_urb } true;ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset := ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset;ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset := ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;assume { :begin_inline_ldv_alloc_urb } true;ldv_alloc_urb_#in~res#1.base, ldv_alloc_urb_#in~res#1.offset := ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset;havoc ldv_alloc_urb_~res#1.base, ldv_alloc_urb_~res#1.offset;ldv_alloc_urb_~res#1.base, ldv_alloc_urb_~res#1.offset := ldv_alloc_urb_#in~res#1.base, ldv_alloc_urb_#in~res#1.offset; {55175#false} is VALID [2022-02-20 22:07:22,325 INFO L290 TraceCheckUtils]: 138: Hoare triple {55175#false} assume 0 != (ldv_alloc_urb_~res#1.base + ldv_alloc_urb_~res#1.offset) % 18446744073709551616;~URB_STATE~0 := 1 + ~URB_STATE~0; {55175#false} is VALID [2022-02-20 22:07:22,325 INFO L290 TraceCheckUtils]: 139: Hoare triple {55175#false} assume { :end_inline_ldv_alloc_urb } true;ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset := ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset; {55175#false} is VALID [2022-02-20 22:07:22,325 INFO L290 TraceCheckUtils]: 140: Hoare triple {55175#false} usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset := ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;assume { :end_inline_ldv_usb_alloc_urb_5 } true;call write~$Pointer$(usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset, usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8);havoc usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset;call usb_acecad_probe_#t~mem143#1.base, usb_acecad_probe_#t~mem143#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8); {55175#false} is VALID [2022-02-20 22:07:22,325 INFO L290 TraceCheckUtils]: 141: Hoare triple {55175#false} assume 0 == (usb_acecad_probe_#t~mem143#1.base + usb_acecad_probe_#t~mem143#1.offset) % 18446744073709551616;havoc usb_acecad_probe_#t~mem143#1.base, usb_acecad_probe_#t~mem143#1.offset;usb_acecad_probe_~err~0#1 := -12; {55175#false} is VALID [2022-02-20 22:07:22,325 INFO L290 TraceCheckUtils]: 142: Hoare triple {55175#false} call usb_acecad_probe_#t~mem175#1.base, usb_acecad_probe_#t~mem175#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem176#1 := read~int(usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset, 8); {55175#false} is VALID [2022-02-20 22:07:22,325 INFO L272 TraceCheckUtils]: 143: Hoare triple {55175#false} call usb_free_coherent(usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, 8, usb_acecad_probe_#t~mem175#1.base, usb_acecad_probe_#t~mem175#1.offset, usb_acecad_probe_#t~mem176#1); {55175#false} is VALID [2022-02-20 22:07:22,325 INFO L290 TraceCheckUtils]: 144: Hoare triple {55175#false} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1 := #in~arg1;~arg2.base, ~arg2.offset := #in~arg2.base, #in~arg2.offset;~arg3 := #in~arg3; {55175#false} is VALID [2022-02-20 22:07:22,326 INFO L290 TraceCheckUtils]: 145: Hoare triple {55175#false} assume true; {55175#false} is VALID [2022-02-20 22:07:22,326 INFO L284 TraceCheckUtils]: 146: Hoare quadruple {55175#false} {55175#false} #603#return; {55175#false} is VALID [2022-02-20 22:07:22,326 INFO L290 TraceCheckUtils]: 147: Hoare triple {55175#false} havoc usb_acecad_probe_#t~mem175#1.base, usb_acecad_probe_#t~mem175#1.offset;havoc usb_acecad_probe_#t~mem176#1; {55175#false} is VALID [2022-02-20 22:07:22,326 INFO L290 TraceCheckUtils]: 148: Hoare triple {55175#false} assume { :begin_inline_input_free_device } true;input_free_device_#in~arg0#1.base, input_free_device_#in~arg0#1.offset := usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset;havoc input_free_device_~arg0#1.base, input_free_device_~arg0#1.offset;input_free_device_~arg0#1.base, input_free_device_~arg0#1.offset := input_free_device_#in~arg0#1.base, input_free_device_#in~arg0#1.offset; {55175#false} is VALID [2022-02-20 22:07:22,326 INFO L290 TraceCheckUtils]: 149: Hoare triple {55175#false} assume { :end_inline_input_free_device } true; {55175#false} is VALID [2022-02-20 22:07:22,326 INFO L272 TraceCheckUtils]: 150: Hoare triple {55175#false} call kfree(usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset); {55175#false} is VALID [2022-02-20 22:07:22,326 INFO L290 TraceCheckUtils]: 151: Hoare triple {55175#false} ~p.base, ~p.offset := #in~p.base, #in~p.offset;call ULTIMATE.dealloc(~p.base, ~p.offset); {55175#false} is VALID [2022-02-20 22:07:22,326 INFO L290 TraceCheckUtils]: 152: Hoare triple {55175#false} assume true; {55175#false} is VALID [2022-02-20 22:07:22,327 INFO L284 TraceCheckUtils]: 153: Hoare quadruple {55175#false} {55175#false} #605#return; {55175#false} is VALID [2022-02-20 22:07:22,327 INFO L290 TraceCheckUtils]: 154: Hoare triple {55175#false} usb_acecad_probe_#res#1 := usb_acecad_probe_~err~0#1; {55175#false} is VALID [2022-02-20 22:07:22,327 INFO L290 TraceCheckUtils]: 155: Hoare triple {55175#false} main_#t~ret191#1 := usb_acecad_probe_#res#1;assume { :end_inline_usb_acecad_probe } true;assume -2147483648 <= main_#t~ret191#1 && main_#t~ret191#1 <= 2147483647;~ldv_retval_0~0 := main_#t~ret191#1;havoc main_#t~ret191#1; {55175#false} is VALID [2022-02-20 22:07:22,327 INFO L290 TraceCheckUtils]: 156: Hoare triple {55175#false} assume !(0 == ~ldv_retval_0~0); {55175#false} is VALID [2022-02-20 22:07:22,327 INFO L290 TraceCheckUtils]: 157: Hoare triple {55175#false} assume -2147483648 <= main_#t~nondet187#1 && main_#t~nondet187#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet187#1;havoc main_#t~nondet187#1;main_#t~switch188#1 := 0 == main_~tmp___0~6#1; {55175#false} is VALID [2022-02-20 22:07:22,327 INFO L290 TraceCheckUtils]: 158: Hoare triple {55175#false} assume !main_#t~switch188#1;main_#t~switch188#1 := main_#t~switch188#1 || 1 == main_~tmp___0~6#1; {55175#false} is VALID [2022-02-20 22:07:22,327 INFO L290 TraceCheckUtils]: 159: Hoare triple {55175#false} assume main_#t~switch188#1; {55175#false} is VALID [2022-02-20 22:07:22,327 INFO L290 TraceCheckUtils]: 160: Hoare triple {55175#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet192#1 && main_#t~nondet192#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet192#1;havoc main_#t~nondet192#1;main_#t~switch193#1 := 0 == main_~tmp___2~1#1; {55175#false} is VALID [2022-02-20 22:07:22,328 INFO L290 TraceCheckUtils]: 161: Hoare triple {55175#false} assume main_#t~switch193#1; {55175#false} is VALID [2022-02-20 22:07:22,328 INFO L290 TraceCheckUtils]: 162: Hoare triple {55175#false} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0;assume { :begin_inline_usb_acecad_exit } true;assume { :begin_inline_ldv_usb_deregister_11 } true;ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset := ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset;assume { :begin_inline_usb_deregister } true;usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset := ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;havoc usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset;usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset := usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset; {55175#false} is VALID [2022-02-20 22:07:22,328 INFO L290 TraceCheckUtils]: 163: Hoare triple {55175#false} assume { :end_inline_usb_deregister } true;~ldv_state_variable_1~0 := 0; {55175#false} is VALID [2022-02-20 22:07:22,328 INFO L290 TraceCheckUtils]: 164: Hoare triple {55175#false} assume { :end_inline_ldv_usb_deregister_11 } true; {55175#false} is VALID [2022-02-20 22:07:22,328 INFO L290 TraceCheckUtils]: 165: Hoare triple {55175#false} assume { :end_inline_usb_acecad_exit } true;~ldv_state_variable_0~0 := 2; {55175#false} is VALID [2022-02-20 22:07:22,328 INFO L290 TraceCheckUtils]: 166: Hoare triple {55175#false} assume { :begin_inline_ldv_check_final_state } true; {55175#false} is VALID [2022-02-20 22:07:22,328 INFO L290 TraceCheckUtils]: 167: Hoare triple {55175#false} assume 0 != ~URB_STATE~0; {55175#false} is VALID [2022-02-20 22:07:22,328 INFO L272 TraceCheckUtils]: 168: Hoare triple {55175#false} call ldv_error(); {55175#false} is VALID [2022-02-20 22:07:22,329 INFO L290 TraceCheckUtils]: 169: Hoare triple {55175#false} assume !false; {55175#false} is VALID [2022-02-20 22:07:22,329 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 31 proven. 0 refuted. 0 times theorem prover too weak. 50 trivial. 0 not checked. [2022-02-20 22:07:22,329 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-02-20 22:07:22,329 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [38676128] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:07:22,329 INFO L191 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-02-20 22:07:22,329 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [9] total 9 [2022-02-20 22:07:22,330 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [761931423] [2022-02-20 22:07:22,330 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:07:22,330 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 21.6) internal successors, (108), 4 states have internal predecessors, (108), 2 states have call successors, (16), 2 states have call predecessors, (16), 3 states have return successors, (15), 3 states have call predecessors, (15), 2 states have call successors, (15) Word has length 170 [2022-02-20 22:07:22,331 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:07:22,331 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 21.6) internal successors, (108), 4 states have internal predecessors, (108), 2 states have call successors, (16), 2 states have call predecessors, (16), 3 states have return successors, (15), 3 states have call predecessors, (15), 2 states have call successors, (15) [2022-02-20 22:07:22,416 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 139 edges. 139 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:22,417 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-02-20 22:07:22,417 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:07:22,417 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-02-20 22:07:22,417 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2022-02-20 22:07:22,418 INFO L87 Difference]: Start difference. First operand 939 states and 1227 transitions. Second operand has 5 states, 5 states have (on average 21.6) internal successors, (108), 4 states have internal predecessors, (108), 2 states have call successors, (16), 2 states have call predecessors, (16), 3 states have return successors, (15), 3 states have call predecessors, (15), 2 states have call successors, (15) [2022-02-20 22:07:23,692 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:23,693 INFO L93 Difference]: Finished difference Result 1879 states and 2467 transitions. [2022-02-20 22:07:23,693 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-02-20 22:07:23,693 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 21.6) internal successors, (108), 4 states have internal predecessors, (108), 2 states have call successors, (16), 2 states have call predecessors, (16), 3 states have return successors, (15), 3 states have call predecessors, (15), 2 states have call successors, (15) Word has length 170 [2022-02-20 22:07:23,694 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 22:07:23,694 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 21.6) internal successors, (108), 4 states have internal predecessors, (108), 2 states have call successors, (16), 2 states have call predecessors, (16), 3 states have return successors, (15), 3 states have call predecessors, (15), 2 states have call successors, (15) [2022-02-20 22:07:23,697 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 580 transitions. [2022-02-20 22:07:23,697 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 21.6) internal successors, (108), 4 states have internal predecessors, (108), 2 states have call successors, (16), 2 states have call predecessors, (16), 3 states have return successors, (15), 3 states have call predecessors, (15), 2 states have call successors, (15) [2022-02-20 22:07:23,700 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 580 transitions. [2022-02-20 22:07:23,701 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states and 580 transitions. [2022-02-20 22:07:24,123 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 580 edges. 580 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:24,164 INFO L225 Difference]: With dead ends: 1879 [2022-02-20 22:07:24,165 INFO L226 Difference]: Without dead ends: 959 [2022-02-20 22:07:24,166 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 211 GetRequests, 201 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2022-02-20 22:07:24,167 INFO L933 BasicCegarLoop]: 288 mSDtfsCounter, 1 mSDsluCounter, 854 mSDsCounter, 0 mSdLazyCounter, 17 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 1142 SdHoareTripleChecker+Invalid, 17 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 17 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-02-20 22:07:24,167 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [2 Valid, 1142 Invalid, 17 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 17 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-02-20 22:07:24,168 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 959 states. [2022-02-20 22:07:24,636 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 959 to 947. [2022-02-20 22:07:24,636 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 22:07:24,637 INFO L82 GeneralOperation]: Start isEquivalent. First operand 959 states. Second operand has 947 states, 745 states have (on average 1.251006711409396) internal successors, (932), 749 states have internal predecessors, (932), 142 states have call successors, (142), 56 states have call predecessors, (142), 59 states have return successors, (161), 149 states have call predecessors, (161), 141 states have call successors, (161) [2022-02-20 22:07:24,638 INFO L74 IsIncluded]: Start isIncluded. First operand 959 states. Second operand has 947 states, 745 states have (on average 1.251006711409396) internal successors, (932), 749 states have internal predecessors, (932), 142 states have call successors, (142), 56 states have call predecessors, (142), 59 states have return successors, (161), 149 states have call predecessors, (161), 141 states have call successors, (161) [2022-02-20 22:07:24,639 INFO L87 Difference]: Start difference. First operand 959 states. Second operand has 947 states, 745 states have (on average 1.251006711409396) internal successors, (932), 749 states have internal predecessors, (932), 142 states have call successors, (142), 56 states have call predecessors, (142), 59 states have return successors, (161), 149 states have call predecessors, (161), 141 states have call successors, (161) [2022-02-20 22:07:24,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:24,669 INFO L93 Difference]: Finished difference Result 959 states and 1255 transitions. [2022-02-20 22:07:24,669 INFO L276 IsEmpty]: Start isEmpty. Operand 959 states and 1255 transitions. [2022-02-20 22:07:24,671 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:24,671 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:24,672 INFO L74 IsIncluded]: Start isIncluded. First operand has 947 states, 745 states have (on average 1.251006711409396) internal successors, (932), 749 states have internal predecessors, (932), 142 states have call successors, (142), 56 states have call predecessors, (142), 59 states have return successors, (161), 149 states have call predecessors, (161), 141 states have call successors, (161) Second operand 959 states. [2022-02-20 22:07:24,673 INFO L87 Difference]: Start difference. First operand has 947 states, 745 states have (on average 1.251006711409396) internal successors, (932), 749 states have internal predecessors, (932), 142 states have call successors, (142), 56 states have call predecessors, (142), 59 states have return successors, (161), 149 states have call predecessors, (161), 141 states have call successors, (161) Second operand 959 states. [2022-02-20 22:07:24,703 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:24,703 INFO L93 Difference]: Finished difference Result 959 states and 1255 transitions. [2022-02-20 22:07:24,703 INFO L276 IsEmpty]: Start isEmpty. Operand 959 states and 1255 transitions. [2022-02-20 22:07:24,705 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:24,705 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:24,705 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 22:07:24,705 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 22:07:24,706 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 947 states, 745 states have (on average 1.251006711409396) internal successors, (932), 749 states have internal predecessors, (932), 142 states have call successors, (142), 56 states have call predecessors, (142), 59 states have return successors, (161), 149 states have call predecessors, (161), 141 states have call successors, (161) [2022-02-20 22:07:24,744 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 947 states to 947 states and 1235 transitions. [2022-02-20 22:07:24,745 INFO L78 Accepts]: Start accepts. Automaton has 947 states and 1235 transitions. Word has length 170 [2022-02-20 22:07:24,745 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 22:07:24,745 INFO L470 AbstractCegarLoop]: Abstraction has 947 states and 1235 transitions. [2022-02-20 22:07:24,746 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 21.6) internal successors, (108), 4 states have internal predecessors, (108), 2 states have call successors, (16), 2 states have call predecessors, (16), 3 states have return successors, (15), 3 states have call predecessors, (15), 2 states have call successors, (15) [2022-02-20 22:07:24,746 INFO L276 IsEmpty]: Start isEmpty. Operand 947 states and 1235 transitions. [2022-02-20 22:07:24,748 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 177 [2022-02-20 22:07:24,748 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:07:24,748 INFO L514 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:07:24,773 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-02-20 22:07:24,963 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-20 22:07:24,964 INFO L402 AbstractCegarLoop]: === Iteration 13 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:07:24,964 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:07:24,964 INFO L85 PathProgramCache]: Analyzing trace with hash -794500219, now seen corresponding path program 2 times [2022-02-20 22:07:24,964 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:07:24,964 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1054455509] [2022-02-20 22:07:24,964 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:07:24,964 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:07:25,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:25,113 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 22:07:25,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:25,121 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:25,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:25,125 INFO L290 TraceCheckUtils]: 0: Hoare triple {61788#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {61690#true} is VALID [2022-02-20 22:07:25,125 INFO L290 TraceCheckUtils]: 1: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:25,125 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {61690#true} {61690#true} #547#return; {61690#true} is VALID [2022-02-20 22:07:25,125 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:25,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:25,128 INFO L290 TraceCheckUtils]: 0: Hoare triple {61690#true} ~cond := #in~cond; {61690#true} is VALID [2022-02-20 22:07:25,129 INFO L290 TraceCheckUtils]: 1: Hoare triple {61690#true} assume !(0 == ~cond); {61690#true} is VALID [2022-02-20 22:07:25,129 INFO L290 TraceCheckUtils]: 2: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:25,129 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {61690#true} {61690#true} #549#return; {61690#true} is VALID [2022-02-20 22:07:25,129 INFO L290 TraceCheckUtils]: 0: Hoare triple {61780#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {61690#true} is VALID [2022-02-20 22:07:25,130 INFO L272 TraceCheckUtils]: 1: Hoare triple {61690#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {61788#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:25,130 INFO L290 TraceCheckUtils]: 2: Hoare triple {61788#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {61690#true} is VALID [2022-02-20 22:07:25,130 INFO L290 TraceCheckUtils]: 3: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:25,130 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {61690#true} {61690#true} #547#return; {61690#true} is VALID [2022-02-20 22:07:25,130 INFO L290 TraceCheckUtils]: 5: Hoare triple {61690#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {61690#true} is VALID [2022-02-20 22:07:25,130 INFO L272 TraceCheckUtils]: 6: Hoare triple {61690#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {61690#true} is VALID [2022-02-20 22:07:25,130 INFO L290 TraceCheckUtils]: 7: Hoare triple {61690#true} ~cond := #in~cond; {61690#true} is VALID [2022-02-20 22:07:25,131 INFO L290 TraceCheckUtils]: 8: Hoare triple {61690#true} assume !(0 == ~cond); {61690#true} is VALID [2022-02-20 22:07:25,131 INFO L290 TraceCheckUtils]: 9: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:25,131 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {61690#true} {61690#true} #549#return; {61690#true} is VALID [2022-02-20 22:07:25,131 INFO L290 TraceCheckUtils]: 11: Hoare triple {61690#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {61690#true} is VALID [2022-02-20 22:07:25,131 INFO L290 TraceCheckUtils]: 12: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:25,131 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {61690#true} {61690#true} #553#return; {61690#true} is VALID [2022-02-20 22:07:25,131 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 27 [2022-02-20 22:07:25,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:25,138 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:25,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:25,147 INFO L290 TraceCheckUtils]: 0: Hoare triple {61788#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {61690#true} is VALID [2022-02-20 22:07:25,147 INFO L290 TraceCheckUtils]: 1: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:25,147 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {61690#true} {61690#true} #547#return; {61690#true} is VALID [2022-02-20 22:07:25,148 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:25,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:25,151 INFO L290 TraceCheckUtils]: 0: Hoare triple {61690#true} ~cond := #in~cond; {61690#true} is VALID [2022-02-20 22:07:25,152 INFO L290 TraceCheckUtils]: 1: Hoare triple {61690#true} assume !(0 == ~cond); {61690#true} is VALID [2022-02-20 22:07:25,152 INFO L290 TraceCheckUtils]: 2: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:25,152 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {61690#true} {61690#true} #549#return; {61690#true} is VALID [2022-02-20 22:07:25,152 INFO L290 TraceCheckUtils]: 0: Hoare triple {61780#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {61690#true} is VALID [2022-02-20 22:07:25,153 INFO L272 TraceCheckUtils]: 1: Hoare triple {61690#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {61788#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:25,153 INFO L290 TraceCheckUtils]: 2: Hoare triple {61788#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {61690#true} is VALID [2022-02-20 22:07:25,153 INFO L290 TraceCheckUtils]: 3: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:25,153 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {61690#true} {61690#true} #547#return; {61690#true} is VALID [2022-02-20 22:07:25,153 INFO L290 TraceCheckUtils]: 5: Hoare triple {61690#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {61690#true} is VALID [2022-02-20 22:07:25,153 INFO L272 TraceCheckUtils]: 6: Hoare triple {61690#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {61690#true} is VALID [2022-02-20 22:07:25,153 INFO L290 TraceCheckUtils]: 7: Hoare triple {61690#true} ~cond := #in~cond; {61690#true} is VALID [2022-02-20 22:07:25,154 INFO L290 TraceCheckUtils]: 8: Hoare triple {61690#true} assume !(0 == ~cond); {61690#true} is VALID [2022-02-20 22:07:25,154 INFO L290 TraceCheckUtils]: 9: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:25,154 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {61690#true} {61690#true} #549#return; {61690#true} is VALID [2022-02-20 22:07:25,154 INFO L290 TraceCheckUtils]: 11: Hoare triple {61690#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {61690#true} is VALID [2022-02-20 22:07:25,154 INFO L290 TraceCheckUtils]: 12: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:25,154 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {61690#true} {61690#true} #611#return; {61690#true} is VALID [2022-02-20 22:07:25,159 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 56 [2022-02-20 22:07:25,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:25,164 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 22:07:25,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:25,169 INFO L290 TraceCheckUtils]: 0: Hoare triple {61690#true} ~cond := #in~cond; {61690#true} is VALID [2022-02-20 22:07:25,170 INFO L290 TraceCheckUtils]: 1: Hoare triple {61690#true} assume !(0 == ~cond); {61690#true} is VALID [2022-02-20 22:07:25,170 INFO L290 TraceCheckUtils]: 2: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:25,170 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {61690#true} {61690#true} #551#return; {61690#true} is VALID [2022-02-20 22:07:25,170 INFO L290 TraceCheckUtils]: 0: Hoare triple {61796#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {61690#true} is VALID [2022-02-20 22:07:25,170 INFO L290 TraceCheckUtils]: 1: Hoare triple {61690#true} assume !(0 != ~tmp___0~2);call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size);~tmp~4.base, ~tmp~4.offset := #t~malloc63.base, #t~malloc63.offset;havoc #t~malloc63.base, #t~malloc63.offset;~p~0.base, ~p~0.offset := ~tmp~4.base, ~tmp~4.offset; {61690#true} is VALID [2022-02-20 22:07:25,170 INFO L272 TraceCheckUtils]: 2: Hoare triple {61690#true} call assume_abort_if_not((if 0 != (~p~0.base + ~p~0.offset) % 18446744073709551616 then 1 else 0)); {61690#true} is VALID [2022-02-20 22:07:25,170 INFO L290 TraceCheckUtils]: 3: Hoare triple {61690#true} ~cond := #in~cond; {61690#true} is VALID [2022-02-20 22:07:25,171 INFO L290 TraceCheckUtils]: 4: Hoare triple {61690#true} assume !(0 == ~cond); {61690#true} is VALID [2022-02-20 22:07:25,171 INFO L290 TraceCheckUtils]: 5: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:25,171 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {61690#true} {61690#true} #551#return; {61690#true} is VALID [2022-02-20 22:07:25,171 INFO L290 TraceCheckUtils]: 7: Hoare triple {61690#true} #res.base, #res.offset := ~p~0.base, ~p~0.offset; {61690#true} is VALID [2022-02-20 22:07:25,171 INFO L290 TraceCheckUtils]: 8: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:25,171 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {61690#true} {61690#true} #555#return; {61690#true} is VALID [2022-02-20 22:07:25,171 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 82 [2022-02-20 22:07:25,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:25,176 INFO L290 TraceCheckUtils]: 0: Hoare triple {61690#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {61690#true} is VALID [2022-02-20 22:07:25,176 INFO L290 TraceCheckUtils]: 1: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:25,176 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {61690#true} {61690#true} #563#return; {61690#true} is VALID [2022-02-20 22:07:25,176 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 88 [2022-02-20 22:07:25,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:25,181 INFO L290 TraceCheckUtils]: 0: Hoare triple {61690#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {61690#true} is VALID [2022-02-20 22:07:25,181 INFO L290 TraceCheckUtils]: 1: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:25,182 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {61690#true} {61690#true} #567#return; {61690#true} is VALID [2022-02-20 22:07:25,182 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 95 [2022-02-20 22:07:25,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:25,285 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:25,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:25,312 INFO L290 TraceCheckUtils]: 0: Hoare triple {61796#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {61690#true} is VALID [2022-02-20 22:07:25,312 INFO L290 TraceCheckUtils]: 1: Hoare triple {61690#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {61809#(and (<= 0 |ldv_malloc_#res.base|) (<= |ldv_malloc_#res.offset| 0) (<= |ldv_malloc_#res.base| 0) (<= 0 |ldv_malloc_#res.offset|))} is VALID [2022-02-20 22:07:25,313 INFO L290 TraceCheckUtils]: 2: Hoare triple {61809#(and (<= 0 |ldv_malloc_#res.base|) (<= |ldv_malloc_#res.offset| 0) (<= |ldv_malloc_#res.base| 0) (<= 0 |ldv_malloc_#res.offset|))} assume true; {61809#(and (<= 0 |ldv_malloc_#res.base|) (<= |ldv_malloc_#res.offset| 0) (<= |ldv_malloc_#res.base| 0) (<= 0 |ldv_malloc_#res.offset|))} is VALID [2022-02-20 22:07:25,313 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {61809#(and (<= 0 |ldv_malloc_#res.base|) (<= |ldv_malloc_#res.offset| 0) (<= |ldv_malloc_#res.base| 0) (<= 0 |ldv_malloc_#res.offset|))} {61690#true} #539#return; {61805#(and (<= 0 |kzalloc___kmalloc_#t~ret56#1.offset|) (<= 0 |kzalloc___kmalloc_#t~ret56#1.base|) (<= |kzalloc___kmalloc_#t~ret56#1.offset| 0) (<= |kzalloc___kmalloc_#t~ret56#1.base| 0))} is VALID [2022-02-20 22:07:25,313 INFO L290 TraceCheckUtils]: 0: Hoare triple {61796#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {61690#true} is VALID [2022-02-20 22:07:25,314 INFO L272 TraceCheckUtils]: 1: Hoare triple {61690#true} call __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset := ldv_malloc(__kmalloc_~size#1); {61796#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:25,314 INFO L290 TraceCheckUtils]: 2: Hoare triple {61796#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {61690#true} is VALID [2022-02-20 22:07:25,314 INFO L290 TraceCheckUtils]: 3: Hoare triple {61690#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {61809#(and (<= 0 |ldv_malloc_#res.base|) (<= |ldv_malloc_#res.offset| 0) (<= |ldv_malloc_#res.base| 0) (<= 0 |ldv_malloc_#res.offset|))} is VALID [2022-02-20 22:07:25,315 INFO L290 TraceCheckUtils]: 4: Hoare triple {61809#(and (<= 0 |ldv_malloc_#res.base|) (<= |ldv_malloc_#res.offset| 0) (<= |ldv_malloc_#res.base| 0) (<= 0 |ldv_malloc_#res.offset|))} assume true; {61809#(and (<= 0 |ldv_malloc_#res.base|) (<= |ldv_malloc_#res.offset| 0) (<= |ldv_malloc_#res.base| 0) (<= 0 |ldv_malloc_#res.offset|))} is VALID [2022-02-20 22:07:25,315 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {61809#(and (<= 0 |ldv_malloc_#res.base|) (<= |ldv_malloc_#res.offset| 0) (<= |ldv_malloc_#res.base| 0) (<= 0 |ldv_malloc_#res.offset|))} {61690#true} #539#return; {61805#(and (<= 0 |kzalloc___kmalloc_#t~ret56#1.offset|) (<= 0 |kzalloc___kmalloc_#t~ret56#1.base|) (<= |kzalloc___kmalloc_#t~ret56#1.offset| 0) (<= |kzalloc___kmalloc_#t~ret56#1.base| 0))} is VALID [2022-02-20 22:07:25,316 INFO L290 TraceCheckUtils]: 6: Hoare triple {61805#(and (<= 0 |kzalloc___kmalloc_#t~ret56#1.offset|) (<= 0 |kzalloc___kmalloc_#t~ret56#1.base|) (<= |kzalloc___kmalloc_#t~ret56#1.offset| 0) (<= |kzalloc___kmalloc_#t~ret56#1.base| 0))} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset; {61806#(and (<= |kzalloc___kmalloc_#res#1.offset| 0) (<= |kzalloc___kmalloc_#res#1.base| 0) (<= 0 |kzalloc___kmalloc_#res#1.offset|) (<= 0 |kzalloc___kmalloc_#res#1.base|))} is VALID [2022-02-20 22:07:25,316 INFO L290 TraceCheckUtils]: 7: Hoare triple {61806#(and (<= |kzalloc___kmalloc_#res#1.offset| 0) (<= |kzalloc___kmalloc_#res#1.base| 0) (<= 0 |kzalloc___kmalloc_#res#1.offset|) (<= 0 |kzalloc___kmalloc_#res#1.base|))} kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {61807#(and (<= |kzalloc_kmalloc_#res#1.offset| 0) (<= |kzalloc_kmalloc_#res#1.base| 0) (<= 0 |kzalloc_kmalloc_#res#1.base|) (<= 0 |kzalloc_kmalloc_#res#1.offset|))} is VALID [2022-02-20 22:07:25,317 INFO L290 TraceCheckUtils]: 8: Hoare triple {61807#(and (<= |kzalloc_kmalloc_#res#1.offset| 0) (<= |kzalloc_kmalloc_#res#1.base| 0) (<= 0 |kzalloc_kmalloc_#res#1.base|) (<= 0 |kzalloc_kmalloc_#res#1.offset|))} #t~ret58#1.base, #t~ret58#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret58#1.base, #t~ret58#1.offset;havoc #t~ret58#1.base, #t~ret58#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {61808#(and (<= |kzalloc_#res#1.offset| 0) (<= 0 |kzalloc_#res#1.offset|) (<= |kzalloc_#res#1.base| 0) (<= 0 |kzalloc_#res#1.base|))} is VALID [2022-02-20 22:07:25,317 INFO L290 TraceCheckUtils]: 9: Hoare triple {61808#(and (<= |kzalloc_#res#1.offset| 0) (<= 0 |kzalloc_#res#1.offset|) (<= |kzalloc_#res#1.base| 0) (<= 0 |kzalloc_#res#1.base|))} assume true; {61808#(and (<= |kzalloc_#res#1.offset| 0) (<= 0 |kzalloc_#res#1.offset|) (<= |kzalloc_#res#1.base| 0) (<= 0 |kzalloc_#res#1.base|))} is VALID [2022-02-20 22:07:25,318 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {61808#(and (<= |kzalloc_#res#1.offset| 0) (<= 0 |kzalloc_#res#1.offset|) (<= |kzalloc_#res#1.base| 0) (<= 0 |kzalloc_#res#1.base|))} {61690#true} #569#return; {61747#(and (= |ULTIMATE.start_usb_acecad_probe_#t~ret138#1.offset| 0) (= |ULTIMATE.start_usb_acecad_probe_#t~ret138#1.base| 0))} is VALID [2022-02-20 22:07:25,318 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 108 [2022-02-20 22:07:25,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:25,324 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:25,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:25,328 INFO L290 TraceCheckUtils]: 0: Hoare triple {61796#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {61690#true} is VALID [2022-02-20 22:07:25,329 INFO L290 TraceCheckUtils]: 1: Hoare triple {61690#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {61690#true} is VALID [2022-02-20 22:07:25,329 INFO L290 TraceCheckUtils]: 2: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:25,329 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {61690#true} {61690#true} #539#return; {61690#true} is VALID [2022-02-20 22:07:25,329 INFO L290 TraceCheckUtils]: 0: Hoare triple {61796#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {61690#true} is VALID [2022-02-20 22:07:25,330 INFO L272 TraceCheckUtils]: 1: Hoare triple {61690#true} call __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset := ldv_malloc(__kmalloc_~size#1); {61796#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:25,330 INFO L290 TraceCheckUtils]: 2: Hoare triple {61796#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {61690#true} is VALID [2022-02-20 22:07:25,330 INFO L290 TraceCheckUtils]: 3: Hoare triple {61690#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {61690#true} is VALID [2022-02-20 22:07:25,330 INFO L290 TraceCheckUtils]: 4: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:25,330 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {61690#true} {61690#true} #539#return; {61690#true} is VALID [2022-02-20 22:07:25,330 INFO L290 TraceCheckUtils]: 6: Hoare triple {61690#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset; {61690#true} is VALID [2022-02-20 22:07:25,330 INFO L290 TraceCheckUtils]: 7: Hoare triple {61690#true} kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {61690#true} is VALID [2022-02-20 22:07:25,330 INFO L290 TraceCheckUtils]: 8: Hoare triple {61690#true} #t~ret58#1.base, #t~ret58#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret58#1.base, #t~ret58#1.offset;havoc #t~ret58#1.base, #t~ret58#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {61690#true} is VALID [2022-02-20 22:07:25,331 INFO L290 TraceCheckUtils]: 9: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:25,331 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {61690#true} {61748#(and (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.offset| 0) (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.base| 0))} #571#return; {61748#(and (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.offset| 0) (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.base| 0))} is VALID [2022-02-20 22:07:25,331 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 123 [2022-02-20 22:07:25,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:25,339 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 22:07:25,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:25,342 INFO L290 TraceCheckUtils]: 0: Hoare triple {61690#true} ~cond := #in~cond; {61690#true} is VALID [2022-02-20 22:07:25,342 INFO L290 TraceCheckUtils]: 1: Hoare triple {61690#true} assume !(0 == ~cond); {61690#true} is VALID [2022-02-20 22:07:25,343 INFO L290 TraceCheckUtils]: 2: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:25,343 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {61690#true} {61690#true} #551#return; {61690#true} is VALID [2022-02-20 22:07:25,343 INFO L290 TraceCheckUtils]: 0: Hoare triple {61796#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {61690#true} is VALID [2022-02-20 22:07:25,343 INFO L290 TraceCheckUtils]: 1: Hoare triple {61690#true} assume !(0 != ~tmp___0~2);call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size);~tmp~4.base, ~tmp~4.offset := #t~malloc63.base, #t~malloc63.offset;havoc #t~malloc63.base, #t~malloc63.offset;~p~0.base, ~p~0.offset := ~tmp~4.base, ~tmp~4.offset; {61690#true} is VALID [2022-02-20 22:07:25,343 INFO L272 TraceCheckUtils]: 2: Hoare triple {61690#true} call assume_abort_if_not((if 0 != (~p~0.base + ~p~0.offset) % 18446744073709551616 then 1 else 0)); {61690#true} is VALID [2022-02-20 22:07:25,343 INFO L290 TraceCheckUtils]: 3: Hoare triple {61690#true} ~cond := #in~cond; {61690#true} is VALID [2022-02-20 22:07:25,343 INFO L290 TraceCheckUtils]: 4: Hoare triple {61690#true} assume !(0 == ~cond); {61690#true} is VALID [2022-02-20 22:07:25,344 INFO L290 TraceCheckUtils]: 5: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:25,344 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {61690#true} {61690#true} #551#return; {61690#true} is VALID [2022-02-20 22:07:25,344 INFO L290 TraceCheckUtils]: 7: Hoare triple {61690#true} #res.base, #res.offset := ~p~0.base, ~p~0.offset; {61690#true} is VALID [2022-02-20 22:07:25,344 INFO L290 TraceCheckUtils]: 8: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:25,344 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {61690#true} {61691#false} #573#return; {61691#false} is VALID [2022-02-20 22:07:25,344 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 137 [2022-02-20 22:07:25,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:25,349 INFO L290 TraceCheckUtils]: 0: Hoare triple {61796#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {61690#true} is VALID [2022-02-20 22:07:25,349 INFO L290 TraceCheckUtils]: 1: Hoare triple {61690#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {61690#true} is VALID [2022-02-20 22:07:25,349 INFO L290 TraceCheckUtils]: 2: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:25,349 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {61690#true} {61691#false} #575#return; {61691#false} is VALID [2022-02-20 22:07:25,350 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 149 [2022-02-20 22:07:25,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:25,353 INFO L290 TraceCheckUtils]: 0: Hoare triple {61690#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1 := #in~arg1;~arg2.base, ~arg2.offset := #in~arg2.base, #in~arg2.offset;~arg3 := #in~arg3; {61690#true} is VALID [2022-02-20 22:07:25,353 INFO L290 TraceCheckUtils]: 1: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:25,353 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {61690#true} {61691#false} #603#return; {61691#false} is VALID [2022-02-20 22:07:25,360 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 156 [2022-02-20 22:07:25,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:25,364 INFO L290 TraceCheckUtils]: 0: Hoare triple {61818#(= |old(#valid)| |#valid|)} ~p.base, ~p.offset := #in~p.base, #in~p.offset;call ULTIMATE.dealloc(~p.base, ~p.offset); {61690#true} is VALID [2022-02-20 22:07:25,365 INFO L290 TraceCheckUtils]: 1: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:25,365 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {61690#true} {61691#false} #605#return; {61691#false} is VALID [2022-02-20 22:07:25,365 INFO L290 TraceCheckUtils]: 0: Hoare triple {61690#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(99, 2);call #Ultimate.allocInit(10, 3);call #Ultimate.allocInit(7, 4);call write~init~int(97, 4, 0, 1);call write~init~int(99, 4, 1, 1);call write~init~int(101, 4, 2, 1);call write~init~int(99, 4, 3, 1);call write~init~int(97, 4, 4, 1);call write~init~int(100, 4, 5, 1);call write~init~int(0, 4, 6, 1);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(20, 6);call #Ultimate.allocInit(57, 7);call #Ultimate.allocInit(2, 8);call write~init~int(32, 8, 0, 1);call write~init~int(0, 8, 1, 1);call #Ultimate.allocInit(8, 9);call #Ultimate.allocInit(34, 10);call #Ultimate.allocInit(32, 11);call #Ultimate.allocInit(11, 12);call #Ultimate.allocInit(48, 13);~LDV_IN_INTERRUPT~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset := 14, 0;call #Ultimate.allocInit(72, 14);call write~init~int(3, ~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 2 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(4, ~#usb_acecad_id_table~0.base, 4 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 6 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 8 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 10 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 11 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 12 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 13 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 14 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 15 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 16 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(3, ~#usb_acecad_id_table~0.base, 24 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 26 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(8, ~#usb_acecad_id_table~0.base, 28 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 30 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 32 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 34 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 35 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 36 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 37 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 38 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 39 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(1, ~#usb_acecad_id_table~0.base, 40 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(0, ~#usb_acecad_id_table~0.base, 48 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 50 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 52 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 54 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 56 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 58 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 59 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 60 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 61 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 62 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 63 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 64 + ~#usb_acecad_id_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.driver_info := 0;~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset := 15, 0;call #Ultimate.allocInit(264, 15);call write~init~$Pointer$(12, 0, ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_probe.base, #funAddr~usb_acecad_probe.offset, ~#usb_acecad_driver~0.base, 8 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_disconnect.base, #funAddr~usb_acecad_disconnect.offset, ~#usb_acecad_driver~0.base, 16 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 24 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 32 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 40 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 48 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 56 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 64 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, ~#usb_acecad_driver~0.base, 72 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 80 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 84 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 88 + ~#usb_acecad_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 92 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 100 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 108 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 116 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 124 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 132 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 136 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 144 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 152 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 160 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 168 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 176 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 184 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 192 + ~#usb_acecad_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 193 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 201 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 209 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 217 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 225 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 233 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 241 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 249 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 257 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 261 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 262 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 263 + ~#usb_acecad_driver~0.offset, 1);~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~URB_STATE~0 := 0;~DEV_STATE~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~int_urb~0.base, ~int_urb~0.offset := 0, 0;~bulk_urb~0.base, ~bulk_urb~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {61690#true} is VALID [2022-02-20 22:07:25,365 INFO L290 TraceCheckUtils]: 1: Hoare triple {61690#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret186#1.base, main_#t~ret186#1.offset, main_#t~nondet187#1, main_#t~switch188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~ret191#1, main_#t~nondet192#1, main_#t~switch193#1, main_#t~ret194#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~17#1.base, main_~tmp~17#1.offset, main_~tmp___0~6#1, main_~tmp___1~3#1, main_~tmp___2~1#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~17#1.base, main_~tmp~17#1.offset;havoc main_~tmp___0~6#1;havoc main_~tmp___1~3#1;havoc main_~tmp___2~1#1; {61690#true} is VALID [2022-02-20 22:07:25,366 INFO L272 TraceCheckUtils]: 2: Hoare triple {61690#true} call main_#t~ret186#1.base, main_#t~ret186#1.offset := ldv_init_zalloc(24); {61780#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:25,366 INFO L290 TraceCheckUtils]: 3: Hoare triple {61780#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {61690#true} is VALID [2022-02-20 22:07:25,366 INFO L272 TraceCheckUtils]: 4: Hoare triple {61690#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {61788#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:25,366 INFO L290 TraceCheckUtils]: 5: Hoare triple {61788#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {61690#true} is VALID [2022-02-20 22:07:25,367 INFO L290 TraceCheckUtils]: 6: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:25,367 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {61690#true} {61690#true} #547#return; {61690#true} is VALID [2022-02-20 22:07:25,367 INFO L290 TraceCheckUtils]: 8: Hoare triple {61690#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {61690#true} is VALID [2022-02-20 22:07:25,367 INFO L272 TraceCheckUtils]: 9: Hoare triple {61690#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {61690#true} is VALID [2022-02-20 22:07:25,367 INFO L290 TraceCheckUtils]: 10: Hoare triple {61690#true} ~cond := #in~cond; {61690#true} is VALID [2022-02-20 22:07:25,367 INFO L290 TraceCheckUtils]: 11: Hoare triple {61690#true} assume !(0 == ~cond); {61690#true} is VALID [2022-02-20 22:07:25,367 INFO L290 TraceCheckUtils]: 12: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:25,367 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {61690#true} {61690#true} #549#return; {61690#true} is VALID [2022-02-20 22:07:25,368 INFO L290 TraceCheckUtils]: 14: Hoare triple {61690#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {61690#true} is VALID [2022-02-20 22:07:25,368 INFO L290 TraceCheckUtils]: 15: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:25,368 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {61690#true} {61690#true} #553#return; {61690#true} is VALID [2022-02-20 22:07:25,368 INFO L290 TraceCheckUtils]: 17: Hoare triple {61690#true} main_~tmp~17#1.base, main_~tmp~17#1.offset := main_#t~ret186#1.base, main_#t~ret186#1.offset;havoc main_#t~ret186#1.base, main_#t~ret186#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~17#1.base, main_~tmp~17#1.offset;assume { :begin_inline_ldv_initialize } true; {61690#true} is VALID [2022-02-20 22:07:25,368 INFO L290 TraceCheckUtils]: 18: Hoare triple {61690#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1; {61690#true} is VALID [2022-02-20 22:07:25,368 INFO L290 TraceCheckUtils]: 19: Hoare triple {61690#true} assume -2147483648 <= main_#t~nondet187#1 && main_#t~nondet187#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet187#1;havoc main_#t~nondet187#1;main_#t~switch188#1 := 0 == main_~tmp___0~6#1; {61690#true} is VALID [2022-02-20 22:07:25,368 INFO L290 TraceCheckUtils]: 20: Hoare triple {61690#true} assume !main_#t~switch188#1;main_#t~switch188#1 := main_#t~switch188#1 || 1 == main_~tmp___0~6#1; {61690#true} is VALID [2022-02-20 22:07:25,368 INFO L290 TraceCheckUtils]: 21: Hoare triple {61690#true} assume main_#t~switch188#1; {61690#true} is VALID [2022-02-20 22:07:25,369 INFO L290 TraceCheckUtils]: 22: Hoare triple {61690#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet192#1 && main_#t~nondet192#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet192#1;havoc main_#t~nondet192#1;main_#t~switch193#1 := 0 == main_~tmp___2~1#1; {61690#true} is VALID [2022-02-20 22:07:25,369 INFO L290 TraceCheckUtils]: 23: Hoare triple {61690#true} assume !main_#t~switch193#1;main_#t~switch193#1 := main_#t~switch193#1 || 1 == main_~tmp___2~1#1; {61690#true} is VALID [2022-02-20 22:07:25,369 INFO L290 TraceCheckUtils]: 24: Hoare triple {61690#true} assume main_#t~switch193#1; {61690#true} is VALID [2022-02-20 22:07:25,369 INFO L290 TraceCheckUtils]: 25: Hoare triple {61690#true} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_usb_acecad_init } true;havoc usb_acecad_init_#res#1;havoc usb_acecad_init_#t~ret183#1, usb_acecad_init_#t~nondet184#1, usb_acecad_init_~result~0#1, usb_acecad_init_~tmp~15#1;havoc usb_acecad_init_~result~0#1;havoc usb_acecad_init_~tmp~15#1;assume { :begin_inline_usb_register } true;usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc usb_register_#res#1;havoc usb_register_#t~ret31#1, usb_register_~driver#1.base, usb_register_~driver#1.offset, usb_register_~tmp~1#1;usb_register_~driver#1.base, usb_register_~driver#1.offset := usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset;havoc usb_register_~tmp~1#1;assume { :begin_inline_ldv_usb_register_driver_2 } true;ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset := usb_register_~driver#1.base, usb_register_~driver#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 4, 0;havoc ldv_usb_register_driver_2_#res#1;havoc ldv_usb_register_driver_2_#t~ret196#1, ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset, ldv_usb_register_driver_2_~ldv_func_res~0#1, ldv_usb_register_driver_2_~tmp~19#1;ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_2_~ldv_func_res~0#1;havoc ldv_usb_register_driver_2_~tmp~19#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet217#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet217#1 && usb_register_driver_#t~nondet217#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet217#1;havoc usb_register_driver_#t~nondet217#1; {61690#true} is VALID [2022-02-20 22:07:25,369 INFO L290 TraceCheckUtils]: 26: Hoare triple {61690#true} ldv_usb_register_driver_2_#t~ret196#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_2_#t~ret196#1 && ldv_usb_register_driver_2_#t~ret196#1 <= 2147483647;ldv_usb_register_driver_2_~tmp~19#1 := ldv_usb_register_driver_2_#t~ret196#1;havoc ldv_usb_register_driver_2_#t~ret196#1;ldv_usb_register_driver_2_~ldv_func_res~0#1 := ldv_usb_register_driver_2_~tmp~19#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset, ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset;havoc ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {61690#true} is VALID [2022-02-20 22:07:25,370 INFO L272 TraceCheckUtils]: 27: Hoare triple {61690#true} call ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset := ldv_init_zalloc(1248); {61780#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:25,370 INFO L290 TraceCheckUtils]: 28: Hoare triple {61780#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {61690#true} is VALID [2022-02-20 22:07:25,371 INFO L272 TraceCheckUtils]: 29: Hoare triple {61690#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {61788#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:25,371 INFO L290 TraceCheckUtils]: 30: Hoare triple {61788#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {61690#true} is VALID [2022-02-20 22:07:25,371 INFO L290 TraceCheckUtils]: 31: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:25,371 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {61690#true} {61690#true} #547#return; {61690#true} is VALID [2022-02-20 22:07:25,371 INFO L290 TraceCheckUtils]: 33: Hoare triple {61690#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {61690#true} is VALID [2022-02-20 22:07:25,371 INFO L272 TraceCheckUtils]: 34: Hoare triple {61690#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {61690#true} is VALID [2022-02-20 22:07:25,371 INFO L290 TraceCheckUtils]: 35: Hoare triple {61690#true} ~cond := #in~cond; {61690#true} is VALID [2022-02-20 22:07:25,372 INFO L290 TraceCheckUtils]: 36: Hoare triple {61690#true} assume !(0 == ~cond); {61690#true} is VALID [2022-02-20 22:07:25,372 INFO L290 TraceCheckUtils]: 37: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:25,372 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {61690#true} {61690#true} #549#return; {61690#true} is VALID [2022-02-20 22:07:25,372 INFO L290 TraceCheckUtils]: 39: Hoare triple {61690#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {61690#true} is VALID [2022-02-20 22:07:25,372 INFO L290 TraceCheckUtils]: 40: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:25,372 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {61690#true} {61690#true} #611#return; {61690#true} is VALID [2022-02-20 22:07:25,372 INFO L290 TraceCheckUtils]: 42: Hoare triple {61690#true} ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset := ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset;havoc ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {61690#true} is VALID [2022-02-20 22:07:25,372 INFO L290 TraceCheckUtils]: 43: Hoare triple {61690#true} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_2_#res#1 := ldv_usb_register_driver_2_~ldv_func_res~0#1; {61690#true} is VALID [2022-02-20 22:07:25,373 INFO L290 TraceCheckUtils]: 44: Hoare triple {61690#true} usb_register_#t~ret31#1 := ldv_usb_register_driver_2_#res#1;assume { :end_inline_ldv_usb_register_driver_2 } true;assume -2147483648 <= usb_register_#t~ret31#1 && usb_register_#t~ret31#1 <= 2147483647;usb_register_~tmp~1#1 := usb_register_#t~ret31#1;havoc usb_register_#t~ret31#1;usb_register_#res#1 := usb_register_~tmp~1#1; {61690#true} is VALID [2022-02-20 22:07:25,373 INFO L290 TraceCheckUtils]: 45: Hoare triple {61690#true} usb_acecad_init_#t~ret183#1 := usb_register_#res#1;assume { :end_inline_usb_register } true;assume -2147483648 <= usb_acecad_init_#t~ret183#1 && usb_acecad_init_#t~ret183#1 <= 2147483647;usb_acecad_init_~tmp~15#1 := usb_acecad_init_#t~ret183#1;havoc usb_acecad_init_#t~ret183#1;usb_acecad_init_~result~0#1 := usb_acecad_init_~tmp~15#1; {61690#true} is VALID [2022-02-20 22:07:25,373 INFO L290 TraceCheckUtils]: 46: Hoare triple {61690#true} assume 0 == usb_acecad_init_~result~0#1;havoc usb_acecad_init_#t~nondet184#1; {61690#true} is VALID [2022-02-20 22:07:25,373 INFO L290 TraceCheckUtils]: 47: Hoare triple {61690#true} usb_acecad_init_#res#1 := usb_acecad_init_~result~0#1; {61690#true} is VALID [2022-02-20 22:07:25,373 INFO L290 TraceCheckUtils]: 48: Hoare triple {61690#true} main_#t~ret194#1 := usb_acecad_init_#res#1;assume { :end_inline_usb_acecad_init } true;assume -2147483648 <= main_#t~ret194#1 && main_#t~ret194#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret194#1;havoc main_#t~ret194#1; {61690#true} is VALID [2022-02-20 22:07:25,373 INFO L290 TraceCheckUtils]: 49: Hoare triple {61690#true} assume 0 == ~ldv_retval_1~0;~ldv_state_variable_0~0 := 3; {61690#true} is VALID [2022-02-20 22:07:25,373 INFO L290 TraceCheckUtils]: 50: Hoare triple {61690#true} assume !(0 != ~ldv_retval_1~0); {61690#true} is VALID [2022-02-20 22:07:25,373 INFO L290 TraceCheckUtils]: 51: Hoare triple {61690#true} assume -2147483648 <= main_#t~nondet187#1 && main_#t~nondet187#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet187#1;havoc main_#t~nondet187#1;main_#t~switch188#1 := 0 == main_~tmp___0~6#1; {61690#true} is VALID [2022-02-20 22:07:25,374 INFO L290 TraceCheckUtils]: 52: Hoare triple {61690#true} assume main_#t~switch188#1; {61690#true} is VALID [2022-02-20 22:07:25,374 INFO L290 TraceCheckUtils]: 53: Hoare triple {61690#true} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= main_#t~nondet189#1 && main_#t~nondet189#1 <= 2147483647;main_~tmp___1~3#1 := main_#t~nondet189#1;havoc main_#t~nondet189#1;main_#t~switch190#1 := 0 == main_~tmp___1~3#1; {61690#true} is VALID [2022-02-20 22:07:25,374 INFO L290 TraceCheckUtils]: 54: Hoare triple {61690#true} assume main_#t~switch190#1; {61690#true} is VALID [2022-02-20 22:07:25,374 INFO L290 TraceCheckUtils]: 55: Hoare triple {61690#true} assume 1 == ~ldv_state_variable_1~0;assume { :begin_inline_usb_acecad_probe } true;usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset, usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset := ~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc usb_acecad_probe_#res#1;havoc usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset, usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset, usb_acecad_probe_#t~mem132#1, usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset, usb_acecad_probe_#t~ret134#1, usb_acecad_probe_#t~mem135#1, usb_acecad_probe_#t~ret136#1, usb_acecad_probe_#t~ret137#1, usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset, usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset, usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset, usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset, usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset, usb_acecad_probe_#t~mem143#1.base, usb_acecad_probe_#t~mem143#1.offset, usb_acecad_probe_#t~mem144#1.base, usb_acecad_probe_#t~mem144#1.offset, usb_acecad_probe_#t~mem145#1.base, usb_acecad_probe_#t~mem145#1.offset, usb_acecad_probe_#t~ret146#1, usb_acecad_probe_#t~mem147#1.base, usb_acecad_probe_#t~mem147#1.offset, usb_acecad_probe_#t~mem148#1.base, usb_acecad_probe_#t~mem148#1.offset, usb_acecad_probe_#t~ret149#1, usb_acecad_probe_#t~mem150#1.base, usb_acecad_probe_#t~mem150#1.offset, usb_acecad_probe_#t~ret151#1, usb_acecad_probe_#t~ret152#1, usb_acecad_probe_#t~ret153#1, usb_acecad_probe_#t~mem154#1, usb_acecad_probe_#t~switch155#1, usb_acecad_probe_#t~nondet156#1, usb_acecad_probe_#t~nondet157#1, usb_acecad_probe_#t~mem158#1, usb_acecad_probe_#t~mem159#1, usb_acecad_probe_#t~nondet160#1, usb_acecad_probe_#t~nondet161#1, usb_acecad_probe_#t~mem162#1, usb_acecad_probe_#t~mem163#1, usb_acecad_probe_#t~mem164#1.base, usb_acecad_probe_#t~mem164#1.offset, usb_acecad_probe_#t~mem165#1.base, usb_acecad_probe_#t~mem165#1.offset, usb_acecad_probe_#t~ite166#1, usb_acecad_probe_#t~mem167#1, usb_acecad_probe_#t~mem168#1.base, usb_acecad_probe_#t~mem168#1.offset, usb_acecad_probe_#t~mem169#1, usb_acecad_probe_#t~mem170#1.base, usb_acecad_probe_#t~mem170#1.offset, usb_acecad_probe_#t~mem171#1.base, usb_acecad_probe_#t~mem171#1.offset, usb_acecad_probe_#t~mem172#1, usb_acecad_probe_#t~mem173#1.base, usb_acecad_probe_#t~mem173#1.offset, usb_acecad_probe_#t~ret174#1, usb_acecad_probe_#t~mem175#1.base, usb_acecad_probe_#t~mem175#1.offset, usb_acecad_probe_#t~mem176#1, usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset, usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset, usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset, usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset, usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset, usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset, usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset, usb_acecad_probe_~pipe~0#1, usb_acecad_probe_~maxp~0#1, usb_acecad_probe_~err~0#1, usb_acecad_probe_~tmp___0~5#1, usb_acecad_probe_~tmp___1~2#1, usb_acecad_probe_~tmp___2~0#1, usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset, usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~tmp___5~0#1, usb_acecad_probe_~tmp___6~0#1;usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset := usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset;usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset := usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset;havoc usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset;havoc usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;havoc usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset;havoc usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset;havoc usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset;havoc usb_acecad_probe_~pipe~0#1;havoc usb_acecad_probe_~maxp~0#1;havoc usb_acecad_probe_~err~0#1;havoc usb_acecad_probe_~tmp___0~5#1;havoc usb_acecad_probe_~tmp___1~2#1;havoc usb_acecad_probe_~tmp___2~0#1;havoc usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;havoc usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset;havoc usb_acecad_probe_~tmp___5~0#1;havoc usb_acecad_probe_~tmp___6~0#1;assume { :begin_inline_interface_to_usbdev } true;interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset := usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset;havoc interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;havoc interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset, interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset, interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset := interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset;havoc interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;assume { :begin_inline_ldv_interface_to_usbdev } true;havoc ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;havoc ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset, ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset;havoc ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset; {61690#true} is VALID [2022-02-20 22:07:25,374 INFO L272 TraceCheckUtils]: 56: Hoare triple {61690#true} call ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset := ldv_malloc(1822); {61796#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:25,375 INFO L290 TraceCheckUtils]: 57: Hoare triple {61796#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {61690#true} is VALID [2022-02-20 22:07:25,375 INFO L290 TraceCheckUtils]: 58: Hoare triple {61690#true} assume !(0 != ~tmp___0~2);call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size);~tmp~4.base, ~tmp~4.offset := #t~malloc63.base, #t~malloc63.offset;havoc #t~malloc63.base, #t~malloc63.offset;~p~0.base, ~p~0.offset := ~tmp~4.base, ~tmp~4.offset; {61690#true} is VALID [2022-02-20 22:07:25,375 INFO L272 TraceCheckUtils]: 59: Hoare triple {61690#true} call assume_abort_if_not((if 0 != (~p~0.base + ~p~0.offset) % 18446744073709551616 then 1 else 0)); {61690#true} is VALID [2022-02-20 22:07:25,375 INFO L290 TraceCheckUtils]: 60: Hoare triple {61690#true} ~cond := #in~cond; {61690#true} is VALID [2022-02-20 22:07:25,375 INFO L290 TraceCheckUtils]: 61: Hoare triple {61690#true} assume !(0 == ~cond); {61690#true} is VALID [2022-02-20 22:07:25,375 INFO L290 TraceCheckUtils]: 62: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:25,375 INFO L284 TraceCheckUtils]: 63: Hoare quadruple {61690#true} {61690#true} #551#return; {61690#true} is VALID [2022-02-20 22:07:25,375 INFO L290 TraceCheckUtils]: 64: Hoare triple {61690#true} #res.base, #res.offset := ~p~0.base, ~p~0.offset; {61690#true} is VALID [2022-02-20 22:07:25,376 INFO L290 TraceCheckUtils]: 65: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:25,376 INFO L284 TraceCheckUtils]: 66: Hoare quadruple {61690#true} {61690#true} #555#return; {61690#true} is VALID [2022-02-20 22:07:25,376 INFO L290 TraceCheckUtils]: 67: Hoare triple {61690#true} ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset := ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset;havoc ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset; {61690#true} is VALID [2022-02-20 22:07:25,376 INFO L290 TraceCheckUtils]: 68: Hoare triple {61690#true} assume !(0 == (ldv_interface_to_usbdev_~result~1#1.base + ldv_interface_to_usbdev_~result~1#1.offset) % 18446744073709551616);ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset := ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset; {61690#true} is VALID [2022-02-20 22:07:25,376 INFO L290 TraceCheckUtils]: 69: Hoare triple {61690#true} interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset := ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;assume { :end_inline_ldv_interface_to_usbdev } true;interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset := interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset;havoc interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset;interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset := interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset; {61690#true} is VALID [2022-02-20 22:07:25,376 INFO L290 TraceCheckUtils]: 70: Hoare triple {61690#true} usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset := interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;assume { :end_inline_interface_to_usbdev } true;usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset := usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset;havoc usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset;usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset := usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;call usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset := read~$Pointer$(usb_acecad_probe_~intf#1.base, 8 + usb_acecad_probe_~intf#1.offset, 8);usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset := usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset;havoc usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset;call usb_acecad_probe_#t~mem132#1 := read~int(usb_acecad_probe_~interface~0#1.base, 4 + usb_acecad_probe_~interface~0#1.offset, 1); {61690#true} is VALID [2022-02-20 22:07:25,376 INFO L290 TraceCheckUtils]: 71: Hoare triple {61690#true} assume !(1 != usb_acecad_probe_#t~mem132#1 % 256 % 4294967296);havoc usb_acecad_probe_#t~mem132#1;call usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset := read~$Pointer$(usb_acecad_probe_~interface~0#1.base, 9 + usb_acecad_probe_~interface~0#1.offset, 8);usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset := usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset;havoc usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset;assume { :begin_inline_usb_endpoint_is_int_in } true;usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset := usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_endpoint_is_int_in_#res#1;havoc usb_endpoint_is_int_in_#t~ret3#1, usb_endpoint_is_int_in_#t~ret4#1, usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset, usb_endpoint_is_int_in_~tmp~0#1, usb_endpoint_is_int_in_~tmp___0~0#1, usb_endpoint_is_int_in_~tmp___1~0#1;usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset := usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset;havoc usb_endpoint_is_int_in_~tmp~0#1;havoc usb_endpoint_is_int_in_~tmp___0~0#1;havoc usb_endpoint_is_int_in_~tmp___1~0#1;assume { :begin_inline_usb_endpoint_xfer_int } true;usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset := usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset;havoc usb_endpoint_xfer_int_#res#1;havoc usb_endpoint_xfer_int_#t~mem2#1, usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset;usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset := usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset;call usb_endpoint_xfer_int_#t~mem2#1 := read~int(usb_endpoint_xfer_int_~epd#1.base, 3 + usb_endpoint_xfer_int_~epd#1.offset, 1);usb_endpoint_xfer_int_#res#1 := (if 3 == (if 0 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 0 else (if 1 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 1 else ~bitwiseAnd(usb_endpoint_xfer_int_#t~mem2#1 % 256, 3))) then 1 else 0);havoc usb_endpoint_xfer_int_#t~mem2#1; {61690#true} is VALID [2022-02-20 22:07:25,376 INFO L290 TraceCheckUtils]: 72: Hoare triple {61690#true} usb_endpoint_is_int_in_#t~ret3#1 := usb_endpoint_xfer_int_#res#1;assume { :end_inline_usb_endpoint_xfer_int } true;assume -2147483648 <= usb_endpoint_is_int_in_#t~ret3#1 && usb_endpoint_is_int_in_#t~ret3#1 <= 2147483647;usb_endpoint_is_int_in_~tmp~0#1 := usb_endpoint_is_int_in_#t~ret3#1;havoc usb_endpoint_is_int_in_#t~ret3#1; {61690#true} is VALID [2022-02-20 22:07:25,377 INFO L290 TraceCheckUtils]: 73: Hoare triple {61690#true} assume 0 != usb_endpoint_is_int_in_~tmp~0#1;assume { :begin_inline_usb_endpoint_dir_in } true;usb_endpoint_dir_in_#in~epd#1.base, usb_endpoint_dir_in_#in~epd#1.offset := usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset;havoc usb_endpoint_dir_in_#res#1;havoc usb_endpoint_dir_in_#t~mem1#1, usb_endpoint_dir_in_~epd#1.base, usb_endpoint_dir_in_~epd#1.offset;usb_endpoint_dir_in_~epd#1.base, usb_endpoint_dir_in_~epd#1.offset := usb_endpoint_dir_in_#in~epd#1.base, usb_endpoint_dir_in_#in~epd#1.offset;call usb_endpoint_dir_in_#t~mem1#1 := read~int(usb_endpoint_dir_in_~epd#1.base, 2 + usb_endpoint_dir_in_~epd#1.offset, 1);usb_endpoint_dir_in_#res#1 := (if (if usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 <= 127 then usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 else usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 - 256) < 0 then 1 else 0);havoc usb_endpoint_dir_in_#t~mem1#1; {61690#true} is VALID [2022-02-20 22:07:25,377 INFO L290 TraceCheckUtils]: 74: Hoare triple {61690#true} usb_endpoint_is_int_in_#t~ret4#1 := usb_endpoint_dir_in_#res#1;assume { :end_inline_usb_endpoint_dir_in } true;assume -2147483648 <= usb_endpoint_is_int_in_#t~ret4#1 && usb_endpoint_is_int_in_#t~ret4#1 <= 2147483647;usb_endpoint_is_int_in_~tmp___0~0#1 := usb_endpoint_is_int_in_#t~ret4#1;havoc usb_endpoint_is_int_in_#t~ret4#1; {61690#true} is VALID [2022-02-20 22:07:25,377 INFO L290 TraceCheckUtils]: 75: Hoare triple {61690#true} assume 0 != usb_endpoint_is_int_in_~tmp___0~0#1;usb_endpoint_is_int_in_~tmp___1~0#1 := 1; {61690#true} is VALID [2022-02-20 22:07:25,377 INFO L290 TraceCheckUtils]: 76: Hoare triple {61690#true} usb_endpoint_is_int_in_#res#1 := usb_endpoint_is_int_in_~tmp___1~0#1; {61690#true} is VALID [2022-02-20 22:07:25,377 INFO L290 TraceCheckUtils]: 77: Hoare triple {61690#true} usb_acecad_probe_#t~ret134#1 := usb_endpoint_is_int_in_#res#1;assume { :end_inline_usb_endpoint_is_int_in } true;assume -2147483648 <= usb_acecad_probe_#t~ret134#1 && usb_acecad_probe_#t~ret134#1 <= 2147483647;usb_acecad_probe_~tmp___0~5#1 := usb_acecad_probe_#t~ret134#1;havoc usb_acecad_probe_#t~ret134#1; {61690#true} is VALID [2022-02-20 22:07:25,377 INFO L290 TraceCheckUtils]: 78: Hoare triple {61690#true} assume !(0 == usb_acecad_probe_~tmp___0~5#1);call usb_acecad_probe_#t~mem135#1 := read~int(usb_acecad_probe_~endpoint~0#1.base, 2 + usb_acecad_probe_~endpoint~0#1.offset, 1);assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_#t~mem135#1 % 256;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem45#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem45#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := (if (1 == 256 * __create_pipe_#t~mem45#1 || 0 == 256 * __create_pipe_#t~mem45#1) && 0 == 32768 * __create_pipe_~endpoint#1 then 256 * __create_pipe_#t~mem45#1 else (if 0 == 256 * __create_pipe_#t~mem45#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1) then 32768 * __create_pipe_~endpoint#1 else (if (1 == 256 * __create_pipe_#t~mem45#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1)) || ((1 == 256 * __create_pipe_#t~mem45#1 || 0 == 256 * __create_pipe_#t~mem45#1) && 1 == 32768 * __create_pipe_~endpoint#1) then 1 else ~bitwiseOr(256 * __create_pipe_#t~mem45#1, 32768 * __create_pipe_~endpoint#1))));havoc __create_pipe_#t~mem45#1; {61690#true} is VALID [2022-02-20 22:07:25,377 INFO L290 TraceCheckUtils]: 79: Hoare triple {61690#true} usb_acecad_probe_#t~ret136#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;usb_acecad_probe_~tmp___1~2#1 := usb_acecad_probe_#t~ret136#1;havoc usb_acecad_probe_#t~mem135#1;havoc usb_acecad_probe_#t~ret136#1;usb_acecad_probe_~pipe~0#1 := (if ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 else ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 - 4294967296);assume { :begin_inline_usb_maxpacket } true;usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset, usb_maxpacket_#in~pipe#1, usb_maxpacket_#in~is_out#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~pipe~0#1, (if 0 == (if 0 == usb_acecad_probe_~pipe~0#1 then 0 else (if 1 == usb_acecad_probe_~pipe~0#1 then 0 else ~bitwiseAnd(usb_acecad_probe_~pipe~0#1, 128))) then 1 else 0);havoc usb_maxpacket_#res#1;havoc usb_maxpacket_#t~ret47#1, usb_maxpacket_#t~ret48#1, usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset, usb_maxpacket_#t~ret50#1, usb_maxpacket_#t~ret51#1, usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset, usb_maxpacket_#t~mem53#1, usb_maxpacket_#t~nondet46#1, usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset, usb_maxpacket_~pipe#1, usb_maxpacket_~is_out#1, usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset, usb_maxpacket_~epnum~0#1, usb_maxpacket_~__ret_warn_on~0#1, usb_maxpacket_~tmp~2#1, usb_maxpacket_~__ret_warn_on___0~0#1, usb_maxpacket_~tmp___0~1#1;usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset := usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset;usb_maxpacket_~pipe#1 := usb_maxpacket_#in~pipe#1;usb_maxpacket_~is_out#1 := usb_maxpacket_#in~is_out#1;havoc usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset;havoc usb_maxpacket_~epnum~0#1;havoc usb_maxpacket_~__ret_warn_on~0#1;havoc usb_maxpacket_~tmp~2#1;havoc usb_maxpacket_~__ret_warn_on___0~0#1;havoc usb_maxpacket_~tmp___0~1#1; {61690#true} is VALID [2022-02-20 22:07:25,377 INFO L290 TraceCheckUtils]: 80: Hoare triple {61690#true} assume 0 == usb_maxpacket_~pipe#1 / 32768;usb_maxpacket_~epnum~0#1 := 0; {61690#true} is VALID [2022-02-20 22:07:25,378 INFO L290 TraceCheckUtils]: 81: Hoare triple {61690#true} assume !(0 != usb_maxpacket_~is_out#1);usb_maxpacket_~__ret_warn_on___0~0#1 := (if 0 == (if 0 == usb_maxpacket_~pipe#1 then 0 else (if 1 == usb_maxpacket_~pipe#1 then 0 else ~bitwiseAnd(usb_maxpacket_~pipe#1, 128))) then 1 else 0); {61690#true} is VALID [2022-02-20 22:07:25,378 INFO L272 TraceCheckUtils]: 82: Hoare triple {61690#true} call usb_maxpacket_#t~ret50#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {61690#true} is VALID [2022-02-20 22:07:25,378 INFO L290 TraceCheckUtils]: 83: Hoare triple {61690#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {61690#true} is VALID [2022-02-20 22:07:25,378 INFO L290 TraceCheckUtils]: 84: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:25,378 INFO L284 TraceCheckUtils]: 85: Hoare quadruple {61690#true} {61690#true} #563#return; {61690#true} is VALID [2022-02-20 22:07:25,378 INFO L290 TraceCheckUtils]: 86: Hoare triple {61690#true} assume -9223372036854775808 <= usb_maxpacket_#t~ret50#1 && usb_maxpacket_#t~ret50#1 <= 9223372036854775807;usb_maxpacket_~tmp___0~1#1 := usb_maxpacket_#t~ret50#1;havoc usb_maxpacket_#t~ret50#1; {61690#true} is VALID [2022-02-20 22:07:25,378 INFO L290 TraceCheckUtils]: 87: Hoare triple {61690#true} assume !(0 != usb_maxpacket_~tmp___0~1#1); {61690#true} is VALID [2022-02-20 22:07:25,378 INFO L272 TraceCheckUtils]: 88: Hoare triple {61690#true} call usb_maxpacket_#t~ret51#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {61690#true} is VALID [2022-02-20 22:07:25,378 INFO L290 TraceCheckUtils]: 89: Hoare triple {61690#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {61690#true} is VALID [2022-02-20 22:07:25,379 INFO L290 TraceCheckUtils]: 90: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:25,379 INFO L284 TraceCheckUtils]: 91: Hoare quadruple {61690#true} {61690#true} #567#return; {61690#true} is VALID [2022-02-20 22:07:25,379 INFO L290 TraceCheckUtils]: 92: Hoare triple {61690#true} assume -9223372036854775808 <= usb_maxpacket_#t~ret51#1 && usb_maxpacket_#t~ret51#1 <= 9223372036854775807;havoc usb_maxpacket_#t~ret51#1;call usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset := read~$Pointer$(usb_maxpacket_~udev#1.base, 1186 + usb_maxpacket_~udev#1.offset + 8 * (usb_maxpacket_~epnum~0#1 % 4294967296), 8);usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset := usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset;havoc usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset; {61690#true} is VALID [2022-02-20 22:07:25,379 INFO L290 TraceCheckUtils]: 93: Hoare triple {61690#true} assume 0 == (usb_maxpacket_~ep~0#1.base + usb_maxpacket_~ep~0#1.offset) % 18446744073709551616;usb_maxpacket_#res#1 := 0; {61690#true} is VALID [2022-02-20 22:07:25,379 INFO L290 TraceCheckUtils]: 94: Hoare triple {61690#true} usb_acecad_probe_#t~ret137#1 := usb_maxpacket_#res#1;assume { :end_inline_usb_maxpacket } true;usb_acecad_probe_~tmp___2~0#1 := usb_acecad_probe_#t~ret137#1;havoc usb_acecad_probe_#t~ret137#1;usb_acecad_probe_~maxp~0#1 := usb_acecad_probe_~tmp___2~0#1 % 65536; {61690#true} is VALID [2022-02-20 22:07:25,380 INFO L272 TraceCheckUtils]: 95: Hoare triple {61690#true} call usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset := kzalloc(232, 208); {61796#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:25,380 INFO L290 TraceCheckUtils]: 96: Hoare triple {61796#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {61690#true} is VALID [2022-02-20 22:07:25,380 INFO L272 TraceCheckUtils]: 97: Hoare triple {61690#true} call __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset := ldv_malloc(__kmalloc_~size#1); {61796#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:25,380 INFO L290 TraceCheckUtils]: 98: Hoare triple {61796#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {61690#true} is VALID [2022-02-20 22:07:25,381 INFO L290 TraceCheckUtils]: 99: Hoare triple {61690#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {61809#(and (<= 0 |ldv_malloc_#res.base|) (<= |ldv_malloc_#res.offset| 0) (<= |ldv_malloc_#res.base| 0) (<= 0 |ldv_malloc_#res.offset|))} is VALID [2022-02-20 22:07:25,381 INFO L290 TraceCheckUtils]: 100: Hoare triple {61809#(and (<= 0 |ldv_malloc_#res.base|) (<= |ldv_malloc_#res.offset| 0) (<= |ldv_malloc_#res.base| 0) (<= 0 |ldv_malloc_#res.offset|))} assume true; {61809#(and (<= 0 |ldv_malloc_#res.base|) (<= |ldv_malloc_#res.offset| 0) (<= |ldv_malloc_#res.base| 0) (<= 0 |ldv_malloc_#res.offset|))} is VALID [2022-02-20 22:07:25,382 INFO L284 TraceCheckUtils]: 101: Hoare quadruple {61809#(and (<= 0 |ldv_malloc_#res.base|) (<= |ldv_malloc_#res.offset| 0) (<= |ldv_malloc_#res.base| 0) (<= 0 |ldv_malloc_#res.offset|))} {61690#true} #539#return; {61805#(and (<= 0 |kzalloc___kmalloc_#t~ret56#1.offset|) (<= 0 |kzalloc___kmalloc_#t~ret56#1.base|) (<= |kzalloc___kmalloc_#t~ret56#1.offset| 0) (<= |kzalloc___kmalloc_#t~ret56#1.base| 0))} is VALID [2022-02-20 22:07:25,382 INFO L290 TraceCheckUtils]: 102: Hoare triple {61805#(and (<= 0 |kzalloc___kmalloc_#t~ret56#1.offset|) (<= 0 |kzalloc___kmalloc_#t~ret56#1.base|) (<= |kzalloc___kmalloc_#t~ret56#1.offset| 0) (<= |kzalloc___kmalloc_#t~ret56#1.base| 0))} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset; {61806#(and (<= |kzalloc___kmalloc_#res#1.offset| 0) (<= |kzalloc___kmalloc_#res#1.base| 0) (<= 0 |kzalloc___kmalloc_#res#1.offset|) (<= 0 |kzalloc___kmalloc_#res#1.base|))} is VALID [2022-02-20 22:07:25,383 INFO L290 TraceCheckUtils]: 103: Hoare triple {61806#(and (<= |kzalloc___kmalloc_#res#1.offset| 0) (<= |kzalloc___kmalloc_#res#1.base| 0) (<= 0 |kzalloc___kmalloc_#res#1.offset|) (<= 0 |kzalloc___kmalloc_#res#1.base|))} kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {61807#(and (<= |kzalloc_kmalloc_#res#1.offset| 0) (<= |kzalloc_kmalloc_#res#1.base| 0) (<= 0 |kzalloc_kmalloc_#res#1.base|) (<= 0 |kzalloc_kmalloc_#res#1.offset|))} is VALID [2022-02-20 22:07:25,383 INFO L290 TraceCheckUtils]: 104: Hoare triple {61807#(and (<= |kzalloc_kmalloc_#res#1.offset| 0) (<= |kzalloc_kmalloc_#res#1.base| 0) (<= 0 |kzalloc_kmalloc_#res#1.base|) (<= 0 |kzalloc_kmalloc_#res#1.offset|))} #t~ret58#1.base, #t~ret58#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret58#1.base, #t~ret58#1.offset;havoc #t~ret58#1.base, #t~ret58#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {61808#(and (<= |kzalloc_#res#1.offset| 0) (<= 0 |kzalloc_#res#1.offset|) (<= |kzalloc_#res#1.base| 0) (<= 0 |kzalloc_#res#1.base|))} is VALID [2022-02-20 22:07:25,383 INFO L290 TraceCheckUtils]: 105: Hoare triple {61808#(and (<= |kzalloc_#res#1.offset| 0) (<= 0 |kzalloc_#res#1.offset|) (<= |kzalloc_#res#1.base| 0) (<= 0 |kzalloc_#res#1.base|))} assume true; {61808#(and (<= |kzalloc_#res#1.offset| 0) (<= 0 |kzalloc_#res#1.offset|) (<= |kzalloc_#res#1.base| 0) (<= 0 |kzalloc_#res#1.base|))} is VALID [2022-02-20 22:07:25,384 INFO L284 TraceCheckUtils]: 106: Hoare quadruple {61808#(and (<= |kzalloc_#res#1.offset| 0) (<= 0 |kzalloc_#res#1.offset|) (<= |kzalloc_#res#1.base| 0) (<= 0 |kzalloc_#res#1.base|))} {61690#true} #569#return; {61747#(and (= |ULTIMATE.start_usb_acecad_probe_#t~ret138#1.offset| 0) (= |ULTIMATE.start_usb_acecad_probe_#t~ret138#1.base| 0))} is VALID [2022-02-20 22:07:25,384 INFO L290 TraceCheckUtils]: 107: Hoare triple {61747#(and (= |ULTIMATE.start_usb_acecad_probe_#t~ret138#1.offset| 0) (= |ULTIMATE.start_usb_acecad_probe_#t~ret138#1.base| 0))} usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset := usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset;havoc usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset;usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset := usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;assume { :begin_inline_input_allocate_device } true;havoc input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;havoc input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset; {61748#(and (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.offset| 0) (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.base| 0))} is VALID [2022-02-20 22:07:25,385 INFO L272 TraceCheckUtils]: 108: Hoare triple {61748#(and (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.offset| 0) (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.base| 0))} call input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset := kzalloc(1855, ~bitwiseOr(~bitwiseOr(16, 64), 128)); {61796#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:25,385 INFO L290 TraceCheckUtils]: 109: Hoare triple {61796#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {61690#true} is VALID [2022-02-20 22:07:25,385 INFO L272 TraceCheckUtils]: 110: Hoare triple {61690#true} call __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset := ldv_malloc(__kmalloc_~size#1); {61796#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:25,386 INFO L290 TraceCheckUtils]: 111: Hoare triple {61796#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {61690#true} is VALID [2022-02-20 22:07:25,386 INFO L290 TraceCheckUtils]: 112: Hoare triple {61690#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {61690#true} is VALID [2022-02-20 22:07:25,386 INFO L290 TraceCheckUtils]: 113: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:25,386 INFO L284 TraceCheckUtils]: 114: Hoare quadruple {61690#true} {61690#true} #539#return; {61690#true} is VALID [2022-02-20 22:07:25,386 INFO L290 TraceCheckUtils]: 115: Hoare triple {61690#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset; {61690#true} is VALID [2022-02-20 22:07:25,386 INFO L290 TraceCheckUtils]: 116: Hoare triple {61690#true} kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {61690#true} is VALID [2022-02-20 22:07:25,386 INFO L290 TraceCheckUtils]: 117: Hoare triple {61690#true} #t~ret58#1.base, #t~ret58#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret58#1.base, #t~ret58#1.offset;havoc #t~ret58#1.base, #t~ret58#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {61690#true} is VALID [2022-02-20 22:07:25,386 INFO L290 TraceCheckUtils]: 118: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:25,387 INFO L284 TraceCheckUtils]: 119: Hoare quadruple {61690#true} {61748#(and (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.offset| 0) (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.base| 0))} #571#return; {61748#(and (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.offset| 0) (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.base| 0))} is VALID [2022-02-20 22:07:25,387 INFO L290 TraceCheckUtils]: 120: Hoare triple {61748#(and (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.offset| 0) (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.base| 0))} input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset := input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset;havoc input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset; {61748#(and (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.offset| 0) (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.base| 0))} is VALID [2022-02-20 22:07:25,388 INFO L290 TraceCheckUtils]: 121: Hoare triple {61748#(and (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.offset| 0) (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.base| 0))} usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset := input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;assume { :end_inline_input_allocate_device } true;usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset := usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset;havoc usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset; {61748#(and (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.offset| 0) (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.base| 0))} is VALID [2022-02-20 22:07:25,388 INFO L290 TraceCheckUtils]: 122: Hoare triple {61748#(and (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.offset| 0) (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.base| 0))} assume !(0 == (usb_acecad_probe_~acecad~3#1.base + usb_acecad_probe_~acecad~3#1.offset) % 18446744073709551616 || 0 == (usb_acecad_probe_~input_dev~0#1.base + usb_acecad_probe_~input_dev~0#1.offset) % 18446744073709551616);assume { :begin_inline_usb_alloc_coherent } true;usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset, usb_alloc_coherent_#in~arg1#1, usb_alloc_coherent_#in~arg2#1, usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, 8, 208, usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset;havoc usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;havoc usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset, usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset, usb_alloc_coherent_~arg1#1, usb_alloc_coherent_~arg2#1, usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset;usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset := usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset;usb_alloc_coherent_~arg1#1 := usb_alloc_coherent_#in~arg1#1;usb_alloc_coherent_~arg2#1 := usb_alloc_coherent_#in~arg2#1;usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset := usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset; {61691#false} is VALID [2022-02-20 22:07:25,388 INFO L272 TraceCheckUtils]: 123: Hoare triple {61691#false} call usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset := ldv_malloc(0); {61796#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:25,388 INFO L290 TraceCheckUtils]: 124: Hoare triple {61796#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {61690#true} is VALID [2022-02-20 22:07:25,389 INFO L290 TraceCheckUtils]: 125: Hoare triple {61690#true} assume !(0 != ~tmp___0~2);call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size);~tmp~4.base, ~tmp~4.offset := #t~malloc63.base, #t~malloc63.offset;havoc #t~malloc63.base, #t~malloc63.offset;~p~0.base, ~p~0.offset := ~tmp~4.base, ~tmp~4.offset; {61690#true} is VALID [2022-02-20 22:07:25,389 INFO L272 TraceCheckUtils]: 126: Hoare triple {61690#true} call assume_abort_if_not((if 0 != (~p~0.base + ~p~0.offset) % 18446744073709551616 then 1 else 0)); {61690#true} is VALID [2022-02-20 22:07:25,389 INFO L290 TraceCheckUtils]: 127: Hoare triple {61690#true} ~cond := #in~cond; {61690#true} is VALID [2022-02-20 22:07:25,389 INFO L290 TraceCheckUtils]: 128: Hoare triple {61690#true} assume !(0 == ~cond); {61690#true} is VALID [2022-02-20 22:07:25,389 INFO L290 TraceCheckUtils]: 129: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:25,389 INFO L284 TraceCheckUtils]: 130: Hoare quadruple {61690#true} {61690#true} #551#return; {61690#true} is VALID [2022-02-20 22:07:25,389 INFO L290 TraceCheckUtils]: 131: Hoare triple {61690#true} #res.base, #res.offset := ~p~0.base, ~p~0.offset; {61690#true} is VALID [2022-02-20 22:07:25,389 INFO L290 TraceCheckUtils]: 132: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:25,390 INFO L284 TraceCheckUtils]: 133: Hoare quadruple {61690#true} {61691#false} #573#return; {61691#false} is VALID [2022-02-20 22:07:25,390 INFO L290 TraceCheckUtils]: 134: Hoare triple {61691#false} usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset := usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset;havoc usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset; {61691#false} is VALID [2022-02-20 22:07:25,390 INFO L290 TraceCheckUtils]: 135: Hoare triple {61691#false} usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset := usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;assume { :end_inline_usb_alloc_coherent } true;usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset := usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset;havoc usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset;call write~$Pointer$(usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8); {61691#false} is VALID [2022-02-20 22:07:25,390 INFO L290 TraceCheckUtils]: 136: Hoare triple {61691#false} assume !(0 == (usb_acecad_probe_#t~mem141#1.base + usb_acecad_probe_#t~mem141#1.offset) % 18446744073709551616);havoc usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset;assume { :begin_inline_ldv_usb_alloc_urb_5 } true;ldv_usb_alloc_urb_5_#in~ldv_func_arg1#1, ldv_usb_alloc_urb_5_#in~ldv_func_arg2#1 := 0, 208;havoc ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset, ldv_usb_alloc_urb_5_~ldv_func_arg1#1, ldv_usb_alloc_urb_5_~ldv_func_arg2#1, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset, ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;ldv_usb_alloc_urb_5_~ldv_func_arg1#1 := ldv_usb_alloc_urb_5_#in~ldv_func_arg1#1;ldv_usb_alloc_urb_5_~ldv_func_arg2#1 := ldv_usb_alloc_urb_5_#in~ldv_func_arg2#1;havoc ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset;havoc ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;assume { :begin_inline_usb_alloc_urb } true;usb_alloc_urb_#in~arg0#1, usb_alloc_urb_#in~arg1#1 := ldv_usb_alloc_urb_5_~ldv_func_arg1#1, ldv_usb_alloc_urb_5_~ldv_func_arg2#1;havoc usb_alloc_urb_#res#1.base, usb_alloc_urb_#res#1.offset;havoc usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset, usb_alloc_urb_~arg0#1, usb_alloc_urb_~arg1#1;usb_alloc_urb_~arg0#1 := usb_alloc_urb_#in~arg0#1;usb_alloc_urb_~arg1#1 := usb_alloc_urb_#in~arg1#1; {61691#false} is VALID [2022-02-20 22:07:25,390 INFO L272 TraceCheckUtils]: 137: Hoare triple {61691#false} call usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset := ldv_malloc(180); {61796#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:25,390 INFO L290 TraceCheckUtils]: 138: Hoare triple {61796#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {61690#true} is VALID [2022-02-20 22:07:25,390 INFO L290 TraceCheckUtils]: 139: Hoare triple {61690#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {61690#true} is VALID [2022-02-20 22:07:25,390 INFO L290 TraceCheckUtils]: 140: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:25,390 INFO L284 TraceCheckUtils]: 141: Hoare quadruple {61690#true} {61691#false} #575#return; {61691#false} is VALID [2022-02-20 22:07:25,391 INFO L290 TraceCheckUtils]: 142: Hoare triple {61691#false} usb_alloc_urb_#res#1.base, usb_alloc_urb_#res#1.offset := usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset;havoc usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset; {61691#false} is VALID [2022-02-20 22:07:25,391 INFO L290 TraceCheckUtils]: 143: Hoare triple {61691#false} ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset := usb_alloc_urb_#res#1.base, usb_alloc_urb_#res#1.offset;assume { :end_inline_usb_alloc_urb } true;ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset := ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset;ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset := ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;assume { :begin_inline_ldv_alloc_urb } true;ldv_alloc_urb_#in~res#1.base, ldv_alloc_urb_#in~res#1.offset := ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset;havoc ldv_alloc_urb_~res#1.base, ldv_alloc_urb_~res#1.offset;ldv_alloc_urb_~res#1.base, ldv_alloc_urb_~res#1.offset := ldv_alloc_urb_#in~res#1.base, ldv_alloc_urb_#in~res#1.offset; {61691#false} is VALID [2022-02-20 22:07:25,391 INFO L290 TraceCheckUtils]: 144: Hoare triple {61691#false} assume 0 != (ldv_alloc_urb_~res#1.base + ldv_alloc_urb_~res#1.offset) % 18446744073709551616;~URB_STATE~0 := 1 + ~URB_STATE~0; {61691#false} is VALID [2022-02-20 22:07:25,391 INFO L290 TraceCheckUtils]: 145: Hoare triple {61691#false} assume { :end_inline_ldv_alloc_urb } true;ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset := ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset; {61691#false} is VALID [2022-02-20 22:07:25,391 INFO L290 TraceCheckUtils]: 146: Hoare triple {61691#false} usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset := ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;assume { :end_inline_ldv_usb_alloc_urb_5 } true;call write~$Pointer$(usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset, usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8);havoc usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset;call usb_acecad_probe_#t~mem143#1.base, usb_acecad_probe_#t~mem143#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8); {61691#false} is VALID [2022-02-20 22:07:25,391 INFO L290 TraceCheckUtils]: 147: Hoare triple {61691#false} assume 0 == (usb_acecad_probe_#t~mem143#1.base + usb_acecad_probe_#t~mem143#1.offset) % 18446744073709551616;havoc usb_acecad_probe_#t~mem143#1.base, usb_acecad_probe_#t~mem143#1.offset;usb_acecad_probe_~err~0#1 := -12; {61691#false} is VALID [2022-02-20 22:07:25,391 INFO L290 TraceCheckUtils]: 148: Hoare triple {61691#false} call usb_acecad_probe_#t~mem175#1.base, usb_acecad_probe_#t~mem175#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem176#1 := read~int(usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset, 8); {61691#false} is VALID [2022-02-20 22:07:25,392 INFO L272 TraceCheckUtils]: 149: Hoare triple {61691#false} call usb_free_coherent(usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, 8, usb_acecad_probe_#t~mem175#1.base, usb_acecad_probe_#t~mem175#1.offset, usb_acecad_probe_#t~mem176#1); {61690#true} is VALID [2022-02-20 22:07:25,392 INFO L290 TraceCheckUtils]: 150: Hoare triple {61690#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1 := #in~arg1;~arg2.base, ~arg2.offset := #in~arg2.base, #in~arg2.offset;~arg3 := #in~arg3; {61690#true} is VALID [2022-02-20 22:07:25,392 INFO L290 TraceCheckUtils]: 151: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:25,392 INFO L284 TraceCheckUtils]: 152: Hoare quadruple {61690#true} {61691#false} #603#return; {61691#false} is VALID [2022-02-20 22:07:25,392 INFO L290 TraceCheckUtils]: 153: Hoare triple {61691#false} havoc usb_acecad_probe_#t~mem175#1.base, usb_acecad_probe_#t~mem175#1.offset;havoc usb_acecad_probe_#t~mem176#1; {61691#false} is VALID [2022-02-20 22:07:25,392 INFO L290 TraceCheckUtils]: 154: Hoare triple {61691#false} assume { :begin_inline_input_free_device } true;input_free_device_#in~arg0#1.base, input_free_device_#in~arg0#1.offset := usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset;havoc input_free_device_~arg0#1.base, input_free_device_~arg0#1.offset;input_free_device_~arg0#1.base, input_free_device_~arg0#1.offset := input_free_device_#in~arg0#1.base, input_free_device_#in~arg0#1.offset; {61691#false} is VALID [2022-02-20 22:07:25,392 INFO L290 TraceCheckUtils]: 155: Hoare triple {61691#false} assume { :end_inline_input_free_device } true; {61691#false} is VALID [2022-02-20 22:07:25,392 INFO L272 TraceCheckUtils]: 156: Hoare triple {61691#false} call kfree(usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset); {61818#(= |old(#valid)| |#valid|)} is VALID [2022-02-20 22:07:25,392 INFO L290 TraceCheckUtils]: 157: Hoare triple {61818#(= |old(#valid)| |#valid|)} ~p.base, ~p.offset := #in~p.base, #in~p.offset;call ULTIMATE.dealloc(~p.base, ~p.offset); {61690#true} is VALID [2022-02-20 22:07:25,393 INFO L290 TraceCheckUtils]: 158: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:25,393 INFO L284 TraceCheckUtils]: 159: Hoare quadruple {61690#true} {61691#false} #605#return; {61691#false} is VALID [2022-02-20 22:07:25,393 INFO L290 TraceCheckUtils]: 160: Hoare triple {61691#false} usb_acecad_probe_#res#1 := usb_acecad_probe_~err~0#1; {61691#false} is VALID [2022-02-20 22:07:25,393 INFO L290 TraceCheckUtils]: 161: Hoare triple {61691#false} main_#t~ret191#1 := usb_acecad_probe_#res#1;assume { :end_inline_usb_acecad_probe } true;assume -2147483648 <= main_#t~ret191#1 && main_#t~ret191#1 <= 2147483647;~ldv_retval_0~0 := main_#t~ret191#1;havoc main_#t~ret191#1; {61691#false} is VALID [2022-02-20 22:07:25,393 INFO L290 TraceCheckUtils]: 162: Hoare triple {61691#false} assume !(0 == ~ldv_retval_0~0); {61691#false} is VALID [2022-02-20 22:07:25,393 INFO L290 TraceCheckUtils]: 163: Hoare triple {61691#false} assume -2147483648 <= main_#t~nondet187#1 && main_#t~nondet187#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet187#1;havoc main_#t~nondet187#1;main_#t~switch188#1 := 0 == main_~tmp___0~6#1; {61691#false} is VALID [2022-02-20 22:07:25,393 INFO L290 TraceCheckUtils]: 164: Hoare triple {61691#false} assume !main_#t~switch188#1;main_#t~switch188#1 := main_#t~switch188#1 || 1 == main_~tmp___0~6#1; {61691#false} is VALID [2022-02-20 22:07:25,393 INFO L290 TraceCheckUtils]: 165: Hoare triple {61691#false} assume main_#t~switch188#1; {61691#false} is VALID [2022-02-20 22:07:25,394 INFO L290 TraceCheckUtils]: 166: Hoare triple {61691#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet192#1 && main_#t~nondet192#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet192#1;havoc main_#t~nondet192#1;main_#t~switch193#1 := 0 == main_~tmp___2~1#1; {61691#false} is VALID [2022-02-20 22:07:25,394 INFO L290 TraceCheckUtils]: 167: Hoare triple {61691#false} assume main_#t~switch193#1; {61691#false} is VALID [2022-02-20 22:07:25,394 INFO L290 TraceCheckUtils]: 168: Hoare triple {61691#false} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0;assume { :begin_inline_usb_acecad_exit } true;assume { :begin_inline_ldv_usb_deregister_11 } true;ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset := ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset;assume { :begin_inline_usb_deregister } true;usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset := ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;havoc usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset;usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset := usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset; {61691#false} is VALID [2022-02-20 22:07:25,394 INFO L290 TraceCheckUtils]: 169: Hoare triple {61691#false} assume { :end_inline_usb_deregister } true;~ldv_state_variable_1~0 := 0; {61691#false} is VALID [2022-02-20 22:07:25,394 INFO L290 TraceCheckUtils]: 170: Hoare triple {61691#false} assume { :end_inline_ldv_usb_deregister_11 } true; {61691#false} is VALID [2022-02-20 22:07:25,394 INFO L290 TraceCheckUtils]: 171: Hoare triple {61691#false} assume { :end_inline_usb_acecad_exit } true;~ldv_state_variable_0~0 := 2; {61691#false} is VALID [2022-02-20 22:07:25,394 INFO L290 TraceCheckUtils]: 172: Hoare triple {61691#false} assume { :begin_inline_ldv_check_final_state } true; {61691#false} is VALID [2022-02-20 22:07:25,394 INFO L290 TraceCheckUtils]: 173: Hoare triple {61691#false} assume 0 != ~URB_STATE~0; {61691#false} is VALID [2022-02-20 22:07:25,395 INFO L272 TraceCheckUtils]: 174: Hoare triple {61691#false} call ldv_error(); {61691#false} is VALID [2022-02-20 22:07:25,395 INFO L290 TraceCheckUtils]: 175: Hoare triple {61691#false} assume !false; {61691#false} is VALID [2022-02-20 22:07:25,395 INFO L134 CoverageAnalysis]: Checked inductivity of 95 backedges. 9 proven. 11 refuted. 0 times theorem prover too weak. 75 trivial. 0 not checked. [2022-02-20 22:07:25,395 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:07:25,395 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1054455509] [2022-02-20 22:07:25,396 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1054455509] provided 0 perfect and 1 imperfect interpolant sequences [2022-02-20 22:07:25,396 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1095667359] [2022-02-20 22:07:25,396 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-02-20 22:07:25,396 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-20 22:07:25,396 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-20 22:07:25,398 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-02-20 22:07:25,399 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-02-20 22:07:25,623 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-02-20 22:07:25,623 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-02-20 22:07:25,626 INFO L263 TraceCheckSpWp]: Trace formula consists of 601 conjuncts, 26 conjunts are in the unsatisfiable core [2022-02-20 22:07:25,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:25,665 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-02-20 22:07:26,353 INFO L290 TraceCheckUtils]: 0: Hoare triple {61690#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(99, 2);call #Ultimate.allocInit(10, 3);call #Ultimate.allocInit(7, 4);call write~init~int(97, 4, 0, 1);call write~init~int(99, 4, 1, 1);call write~init~int(101, 4, 2, 1);call write~init~int(99, 4, 3, 1);call write~init~int(97, 4, 4, 1);call write~init~int(100, 4, 5, 1);call write~init~int(0, 4, 6, 1);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(20, 6);call #Ultimate.allocInit(57, 7);call #Ultimate.allocInit(2, 8);call write~init~int(32, 8, 0, 1);call write~init~int(0, 8, 1, 1);call #Ultimate.allocInit(8, 9);call #Ultimate.allocInit(34, 10);call #Ultimate.allocInit(32, 11);call #Ultimate.allocInit(11, 12);call #Ultimate.allocInit(48, 13);~LDV_IN_INTERRUPT~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset := 14, 0;call #Ultimate.allocInit(72, 14);call write~init~int(3, ~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 2 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(4, ~#usb_acecad_id_table~0.base, 4 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 6 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 8 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 10 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 11 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 12 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 13 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 14 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 15 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 16 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(3, ~#usb_acecad_id_table~0.base, 24 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 26 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(8, ~#usb_acecad_id_table~0.base, 28 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 30 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 32 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 34 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 35 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 36 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 37 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 38 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 39 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(1, ~#usb_acecad_id_table~0.base, 40 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(0, ~#usb_acecad_id_table~0.base, 48 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 50 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 52 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 54 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 56 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 58 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 59 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 60 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 61 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 62 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 63 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 64 + ~#usb_acecad_id_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.driver_info := 0;~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset := 15, 0;call #Ultimate.allocInit(264, 15);call write~init~$Pointer$(12, 0, ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_probe.base, #funAddr~usb_acecad_probe.offset, ~#usb_acecad_driver~0.base, 8 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_disconnect.base, #funAddr~usb_acecad_disconnect.offset, ~#usb_acecad_driver~0.base, 16 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 24 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 32 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 40 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 48 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 56 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 64 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, ~#usb_acecad_driver~0.base, 72 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 80 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 84 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 88 + ~#usb_acecad_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 92 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 100 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 108 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 116 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 124 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 132 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 136 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 144 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 152 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 160 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 168 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 176 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 184 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 192 + ~#usb_acecad_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 193 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 201 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 209 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 217 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 225 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 233 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 241 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 249 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 257 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 261 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 262 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 263 + ~#usb_acecad_driver~0.offset, 1);~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~URB_STATE~0 := 0;~DEV_STATE~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~int_urb~0.base, ~int_urb~0.offset := 0, 0;~bulk_urb~0.base, ~bulk_urb~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {61690#true} is VALID [2022-02-20 22:07:26,353 INFO L290 TraceCheckUtils]: 1: Hoare triple {61690#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret186#1.base, main_#t~ret186#1.offset, main_#t~nondet187#1, main_#t~switch188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~ret191#1, main_#t~nondet192#1, main_#t~switch193#1, main_#t~ret194#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~17#1.base, main_~tmp~17#1.offset, main_~tmp___0~6#1, main_~tmp___1~3#1, main_~tmp___2~1#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~17#1.base, main_~tmp~17#1.offset;havoc main_~tmp___0~6#1;havoc main_~tmp___1~3#1;havoc main_~tmp___2~1#1; {61690#true} is VALID [2022-02-20 22:07:26,353 INFO L272 TraceCheckUtils]: 2: Hoare triple {61690#true} call main_#t~ret186#1.base, main_#t~ret186#1.offset := ldv_init_zalloc(24); {61690#true} is VALID [2022-02-20 22:07:26,354 INFO L290 TraceCheckUtils]: 3: Hoare triple {61690#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {61690#true} is VALID [2022-02-20 22:07:26,354 INFO L272 TraceCheckUtils]: 4: Hoare triple {61690#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {61690#true} is VALID [2022-02-20 22:07:26,354 INFO L290 TraceCheckUtils]: 5: Hoare triple {61690#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {61690#true} is VALID [2022-02-20 22:07:26,354 INFO L290 TraceCheckUtils]: 6: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:26,354 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {61690#true} {61690#true} #547#return; {61690#true} is VALID [2022-02-20 22:07:26,354 INFO L290 TraceCheckUtils]: 8: Hoare triple {61690#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {61690#true} is VALID [2022-02-20 22:07:26,354 INFO L272 TraceCheckUtils]: 9: Hoare triple {61690#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {61690#true} is VALID [2022-02-20 22:07:26,354 INFO L290 TraceCheckUtils]: 10: Hoare triple {61690#true} ~cond := #in~cond; {61690#true} is VALID [2022-02-20 22:07:26,355 INFO L290 TraceCheckUtils]: 11: Hoare triple {61690#true} assume !(0 == ~cond); {61690#true} is VALID [2022-02-20 22:07:26,355 INFO L290 TraceCheckUtils]: 12: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:26,355 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {61690#true} {61690#true} #549#return; {61690#true} is VALID [2022-02-20 22:07:26,355 INFO L290 TraceCheckUtils]: 14: Hoare triple {61690#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {61690#true} is VALID [2022-02-20 22:07:26,355 INFO L290 TraceCheckUtils]: 15: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:26,355 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {61690#true} {61690#true} #553#return; {61690#true} is VALID [2022-02-20 22:07:26,355 INFO L290 TraceCheckUtils]: 17: Hoare triple {61690#true} main_~tmp~17#1.base, main_~tmp~17#1.offset := main_#t~ret186#1.base, main_#t~ret186#1.offset;havoc main_#t~ret186#1.base, main_#t~ret186#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~17#1.base, main_~tmp~17#1.offset;assume { :begin_inline_ldv_initialize } true; {61690#true} is VALID [2022-02-20 22:07:26,355 INFO L290 TraceCheckUtils]: 18: Hoare triple {61690#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1; {61690#true} is VALID [2022-02-20 22:07:26,356 INFO L290 TraceCheckUtils]: 19: Hoare triple {61690#true} assume -2147483648 <= main_#t~nondet187#1 && main_#t~nondet187#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet187#1;havoc main_#t~nondet187#1;main_#t~switch188#1 := 0 == main_~tmp___0~6#1; {61690#true} is VALID [2022-02-20 22:07:26,356 INFO L290 TraceCheckUtils]: 20: Hoare triple {61690#true} assume !main_#t~switch188#1;main_#t~switch188#1 := main_#t~switch188#1 || 1 == main_~tmp___0~6#1; {61690#true} is VALID [2022-02-20 22:07:26,356 INFO L290 TraceCheckUtils]: 21: Hoare triple {61690#true} assume main_#t~switch188#1; {61690#true} is VALID [2022-02-20 22:07:26,356 INFO L290 TraceCheckUtils]: 22: Hoare triple {61690#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet192#1 && main_#t~nondet192#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet192#1;havoc main_#t~nondet192#1;main_#t~switch193#1 := 0 == main_~tmp___2~1#1; {61690#true} is VALID [2022-02-20 22:07:26,356 INFO L290 TraceCheckUtils]: 23: Hoare triple {61690#true} assume !main_#t~switch193#1;main_#t~switch193#1 := main_#t~switch193#1 || 1 == main_~tmp___2~1#1; {61690#true} is VALID [2022-02-20 22:07:26,356 INFO L290 TraceCheckUtils]: 24: Hoare triple {61690#true} assume main_#t~switch193#1; {61690#true} is VALID [2022-02-20 22:07:26,356 INFO L290 TraceCheckUtils]: 25: Hoare triple {61690#true} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_usb_acecad_init } true;havoc usb_acecad_init_#res#1;havoc usb_acecad_init_#t~ret183#1, usb_acecad_init_#t~nondet184#1, usb_acecad_init_~result~0#1, usb_acecad_init_~tmp~15#1;havoc usb_acecad_init_~result~0#1;havoc usb_acecad_init_~tmp~15#1;assume { :begin_inline_usb_register } true;usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc usb_register_#res#1;havoc usb_register_#t~ret31#1, usb_register_~driver#1.base, usb_register_~driver#1.offset, usb_register_~tmp~1#1;usb_register_~driver#1.base, usb_register_~driver#1.offset := usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset;havoc usb_register_~tmp~1#1;assume { :begin_inline_ldv_usb_register_driver_2 } true;ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset := usb_register_~driver#1.base, usb_register_~driver#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 4, 0;havoc ldv_usb_register_driver_2_#res#1;havoc ldv_usb_register_driver_2_#t~ret196#1, ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset, ldv_usb_register_driver_2_~ldv_func_res~0#1, ldv_usb_register_driver_2_~tmp~19#1;ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_2_~ldv_func_res~0#1;havoc ldv_usb_register_driver_2_~tmp~19#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet217#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet217#1 && usb_register_driver_#t~nondet217#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet217#1;havoc usb_register_driver_#t~nondet217#1; {61690#true} is VALID [2022-02-20 22:07:26,357 INFO L290 TraceCheckUtils]: 26: Hoare triple {61690#true} ldv_usb_register_driver_2_#t~ret196#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_2_#t~ret196#1 && ldv_usb_register_driver_2_#t~ret196#1 <= 2147483647;ldv_usb_register_driver_2_~tmp~19#1 := ldv_usb_register_driver_2_#t~ret196#1;havoc ldv_usb_register_driver_2_#t~ret196#1;ldv_usb_register_driver_2_~ldv_func_res~0#1 := ldv_usb_register_driver_2_~tmp~19#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset, ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset;havoc ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {61690#true} is VALID [2022-02-20 22:07:26,357 INFO L272 TraceCheckUtils]: 27: Hoare triple {61690#true} call ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset := ldv_init_zalloc(1248); {61690#true} is VALID [2022-02-20 22:07:26,357 INFO L290 TraceCheckUtils]: 28: Hoare triple {61690#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {61690#true} is VALID [2022-02-20 22:07:26,357 INFO L272 TraceCheckUtils]: 29: Hoare triple {61690#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {61690#true} is VALID [2022-02-20 22:07:26,357 INFO L290 TraceCheckUtils]: 30: Hoare triple {61690#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {61690#true} is VALID [2022-02-20 22:07:26,357 INFO L290 TraceCheckUtils]: 31: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:26,357 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {61690#true} {61690#true} #547#return; {61690#true} is VALID [2022-02-20 22:07:26,357 INFO L290 TraceCheckUtils]: 33: Hoare triple {61690#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {61690#true} is VALID [2022-02-20 22:07:26,358 INFO L272 TraceCheckUtils]: 34: Hoare triple {61690#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {61690#true} is VALID [2022-02-20 22:07:26,358 INFO L290 TraceCheckUtils]: 35: Hoare triple {61690#true} ~cond := #in~cond; {61690#true} is VALID [2022-02-20 22:07:26,358 INFO L290 TraceCheckUtils]: 36: Hoare triple {61690#true} assume !(0 == ~cond); {61690#true} is VALID [2022-02-20 22:07:26,358 INFO L290 TraceCheckUtils]: 37: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:26,358 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {61690#true} {61690#true} #549#return; {61690#true} is VALID [2022-02-20 22:07:26,358 INFO L290 TraceCheckUtils]: 39: Hoare triple {61690#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {61690#true} is VALID [2022-02-20 22:07:26,358 INFO L290 TraceCheckUtils]: 40: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:26,358 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {61690#true} {61690#true} #611#return; {61690#true} is VALID [2022-02-20 22:07:26,358 INFO L290 TraceCheckUtils]: 42: Hoare triple {61690#true} ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset := ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset;havoc ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {61690#true} is VALID [2022-02-20 22:07:26,359 INFO L290 TraceCheckUtils]: 43: Hoare triple {61690#true} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_2_#res#1 := ldv_usb_register_driver_2_~ldv_func_res~0#1; {61690#true} is VALID [2022-02-20 22:07:26,359 INFO L290 TraceCheckUtils]: 44: Hoare triple {61690#true} usb_register_#t~ret31#1 := ldv_usb_register_driver_2_#res#1;assume { :end_inline_ldv_usb_register_driver_2 } true;assume -2147483648 <= usb_register_#t~ret31#1 && usb_register_#t~ret31#1 <= 2147483647;usb_register_~tmp~1#1 := usb_register_#t~ret31#1;havoc usb_register_#t~ret31#1;usb_register_#res#1 := usb_register_~tmp~1#1; {61690#true} is VALID [2022-02-20 22:07:26,359 INFO L290 TraceCheckUtils]: 45: Hoare triple {61690#true} usb_acecad_init_#t~ret183#1 := usb_register_#res#1;assume { :end_inline_usb_register } true;assume -2147483648 <= usb_acecad_init_#t~ret183#1 && usb_acecad_init_#t~ret183#1 <= 2147483647;usb_acecad_init_~tmp~15#1 := usb_acecad_init_#t~ret183#1;havoc usb_acecad_init_#t~ret183#1;usb_acecad_init_~result~0#1 := usb_acecad_init_~tmp~15#1; {61690#true} is VALID [2022-02-20 22:07:26,359 INFO L290 TraceCheckUtils]: 46: Hoare triple {61690#true} assume 0 == usb_acecad_init_~result~0#1;havoc usb_acecad_init_#t~nondet184#1; {61690#true} is VALID [2022-02-20 22:07:26,359 INFO L290 TraceCheckUtils]: 47: Hoare triple {61690#true} usb_acecad_init_#res#1 := usb_acecad_init_~result~0#1; {61690#true} is VALID [2022-02-20 22:07:26,359 INFO L290 TraceCheckUtils]: 48: Hoare triple {61690#true} main_#t~ret194#1 := usb_acecad_init_#res#1;assume { :end_inline_usb_acecad_init } true;assume -2147483648 <= main_#t~ret194#1 && main_#t~ret194#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret194#1;havoc main_#t~ret194#1; {61690#true} is VALID [2022-02-20 22:07:26,359 INFO L290 TraceCheckUtils]: 49: Hoare triple {61690#true} assume 0 == ~ldv_retval_1~0;~ldv_state_variable_0~0 := 3; {61690#true} is VALID [2022-02-20 22:07:26,359 INFO L290 TraceCheckUtils]: 50: Hoare triple {61690#true} assume !(0 != ~ldv_retval_1~0); {61690#true} is VALID [2022-02-20 22:07:26,360 INFO L290 TraceCheckUtils]: 51: Hoare triple {61690#true} assume -2147483648 <= main_#t~nondet187#1 && main_#t~nondet187#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet187#1;havoc main_#t~nondet187#1;main_#t~switch188#1 := 0 == main_~tmp___0~6#1; {61690#true} is VALID [2022-02-20 22:07:26,360 INFO L290 TraceCheckUtils]: 52: Hoare triple {61690#true} assume main_#t~switch188#1; {61690#true} is VALID [2022-02-20 22:07:26,360 INFO L290 TraceCheckUtils]: 53: Hoare triple {61690#true} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= main_#t~nondet189#1 && main_#t~nondet189#1 <= 2147483647;main_~tmp___1~3#1 := main_#t~nondet189#1;havoc main_#t~nondet189#1;main_#t~switch190#1 := 0 == main_~tmp___1~3#1; {61690#true} is VALID [2022-02-20 22:07:26,360 INFO L290 TraceCheckUtils]: 54: Hoare triple {61690#true} assume main_#t~switch190#1; {61690#true} is VALID [2022-02-20 22:07:26,360 INFO L290 TraceCheckUtils]: 55: Hoare triple {61690#true} assume 1 == ~ldv_state_variable_1~0;assume { :begin_inline_usb_acecad_probe } true;usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset, usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset := ~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc usb_acecad_probe_#res#1;havoc usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset, usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset, usb_acecad_probe_#t~mem132#1, usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset, usb_acecad_probe_#t~ret134#1, usb_acecad_probe_#t~mem135#1, usb_acecad_probe_#t~ret136#1, usb_acecad_probe_#t~ret137#1, usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset, usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset, usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset, usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset, usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset, usb_acecad_probe_#t~mem143#1.base, usb_acecad_probe_#t~mem143#1.offset, usb_acecad_probe_#t~mem144#1.base, usb_acecad_probe_#t~mem144#1.offset, usb_acecad_probe_#t~mem145#1.base, usb_acecad_probe_#t~mem145#1.offset, usb_acecad_probe_#t~ret146#1, usb_acecad_probe_#t~mem147#1.base, usb_acecad_probe_#t~mem147#1.offset, usb_acecad_probe_#t~mem148#1.base, usb_acecad_probe_#t~mem148#1.offset, usb_acecad_probe_#t~ret149#1, usb_acecad_probe_#t~mem150#1.base, usb_acecad_probe_#t~mem150#1.offset, usb_acecad_probe_#t~ret151#1, usb_acecad_probe_#t~ret152#1, usb_acecad_probe_#t~ret153#1, usb_acecad_probe_#t~mem154#1, usb_acecad_probe_#t~switch155#1, usb_acecad_probe_#t~nondet156#1, usb_acecad_probe_#t~nondet157#1, usb_acecad_probe_#t~mem158#1, usb_acecad_probe_#t~mem159#1, usb_acecad_probe_#t~nondet160#1, usb_acecad_probe_#t~nondet161#1, usb_acecad_probe_#t~mem162#1, usb_acecad_probe_#t~mem163#1, usb_acecad_probe_#t~mem164#1.base, usb_acecad_probe_#t~mem164#1.offset, usb_acecad_probe_#t~mem165#1.base, usb_acecad_probe_#t~mem165#1.offset, usb_acecad_probe_#t~ite166#1, usb_acecad_probe_#t~mem167#1, usb_acecad_probe_#t~mem168#1.base, usb_acecad_probe_#t~mem168#1.offset, usb_acecad_probe_#t~mem169#1, usb_acecad_probe_#t~mem170#1.base, usb_acecad_probe_#t~mem170#1.offset, usb_acecad_probe_#t~mem171#1.base, usb_acecad_probe_#t~mem171#1.offset, usb_acecad_probe_#t~mem172#1, usb_acecad_probe_#t~mem173#1.base, usb_acecad_probe_#t~mem173#1.offset, usb_acecad_probe_#t~ret174#1, usb_acecad_probe_#t~mem175#1.base, usb_acecad_probe_#t~mem175#1.offset, usb_acecad_probe_#t~mem176#1, usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset, usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset, usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset, usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset, usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset, usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset, usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset, usb_acecad_probe_~pipe~0#1, usb_acecad_probe_~maxp~0#1, usb_acecad_probe_~err~0#1, usb_acecad_probe_~tmp___0~5#1, usb_acecad_probe_~tmp___1~2#1, usb_acecad_probe_~tmp___2~0#1, usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset, usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~tmp___5~0#1, usb_acecad_probe_~tmp___6~0#1;usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset := usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset;usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset := usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset;havoc usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset;havoc usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;havoc usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset;havoc usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset;havoc usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset;havoc usb_acecad_probe_~pipe~0#1;havoc usb_acecad_probe_~maxp~0#1;havoc usb_acecad_probe_~err~0#1;havoc usb_acecad_probe_~tmp___0~5#1;havoc usb_acecad_probe_~tmp___1~2#1;havoc usb_acecad_probe_~tmp___2~0#1;havoc usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;havoc usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset;havoc usb_acecad_probe_~tmp___5~0#1;havoc usb_acecad_probe_~tmp___6~0#1;assume { :begin_inline_interface_to_usbdev } true;interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset := usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset;havoc interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;havoc interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset, interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset, interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset := interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset;havoc interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;assume { :begin_inline_ldv_interface_to_usbdev } true;havoc ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;havoc ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset, ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset;havoc ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset; {61690#true} is VALID [2022-02-20 22:07:26,360 INFO L272 TraceCheckUtils]: 56: Hoare triple {61690#true} call ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset := ldv_malloc(1822); {61690#true} is VALID [2022-02-20 22:07:26,360 INFO L290 TraceCheckUtils]: 57: Hoare triple {61690#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {61690#true} is VALID [2022-02-20 22:07:26,361 INFO L290 TraceCheckUtils]: 58: Hoare triple {61690#true} assume !(0 != ~tmp___0~2);call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size);~tmp~4.base, ~tmp~4.offset := #t~malloc63.base, #t~malloc63.offset;havoc #t~malloc63.base, #t~malloc63.offset;~p~0.base, ~p~0.offset := ~tmp~4.base, ~tmp~4.offset; {61690#true} is VALID [2022-02-20 22:07:26,361 INFO L272 TraceCheckUtils]: 59: Hoare triple {61690#true} call assume_abort_if_not((if 0 != (~p~0.base + ~p~0.offset) % 18446744073709551616 then 1 else 0)); {61690#true} is VALID [2022-02-20 22:07:26,361 INFO L290 TraceCheckUtils]: 60: Hoare triple {61690#true} ~cond := #in~cond; {61690#true} is VALID [2022-02-20 22:07:26,361 INFO L290 TraceCheckUtils]: 61: Hoare triple {61690#true} assume !(0 == ~cond); {61690#true} is VALID [2022-02-20 22:07:26,361 INFO L290 TraceCheckUtils]: 62: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:26,361 INFO L284 TraceCheckUtils]: 63: Hoare quadruple {61690#true} {61690#true} #551#return; {61690#true} is VALID [2022-02-20 22:07:26,361 INFO L290 TraceCheckUtils]: 64: Hoare triple {61690#true} #res.base, #res.offset := ~p~0.base, ~p~0.offset; {61690#true} is VALID [2022-02-20 22:07:26,361 INFO L290 TraceCheckUtils]: 65: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:26,362 INFO L284 TraceCheckUtils]: 66: Hoare quadruple {61690#true} {61690#true} #555#return; {61690#true} is VALID [2022-02-20 22:07:26,362 INFO L290 TraceCheckUtils]: 67: Hoare triple {61690#true} ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset := ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset;havoc ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset; {61690#true} is VALID [2022-02-20 22:07:26,362 INFO L290 TraceCheckUtils]: 68: Hoare triple {61690#true} assume !(0 == (ldv_interface_to_usbdev_~result~1#1.base + ldv_interface_to_usbdev_~result~1#1.offset) % 18446744073709551616);ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset := ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset; {61690#true} is VALID [2022-02-20 22:07:26,362 INFO L290 TraceCheckUtils]: 69: Hoare triple {61690#true} interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset := ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;assume { :end_inline_ldv_interface_to_usbdev } true;interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset := interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset;havoc interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset;interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset := interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset; {61690#true} is VALID [2022-02-20 22:07:26,362 INFO L290 TraceCheckUtils]: 70: Hoare triple {61690#true} usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset := interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;assume { :end_inline_interface_to_usbdev } true;usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset := usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset;havoc usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset;usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset := usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;call usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset := read~$Pointer$(usb_acecad_probe_~intf#1.base, 8 + usb_acecad_probe_~intf#1.offset, 8);usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset := usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset;havoc usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset;call usb_acecad_probe_#t~mem132#1 := read~int(usb_acecad_probe_~interface~0#1.base, 4 + usb_acecad_probe_~interface~0#1.offset, 1); {61690#true} is VALID [2022-02-20 22:07:26,362 INFO L290 TraceCheckUtils]: 71: Hoare triple {61690#true} assume !(1 != usb_acecad_probe_#t~mem132#1 % 256 % 4294967296);havoc usb_acecad_probe_#t~mem132#1;call usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset := read~$Pointer$(usb_acecad_probe_~interface~0#1.base, 9 + usb_acecad_probe_~interface~0#1.offset, 8);usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset := usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset;havoc usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset;assume { :begin_inline_usb_endpoint_is_int_in } true;usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset := usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_endpoint_is_int_in_#res#1;havoc usb_endpoint_is_int_in_#t~ret3#1, usb_endpoint_is_int_in_#t~ret4#1, usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset, usb_endpoint_is_int_in_~tmp~0#1, usb_endpoint_is_int_in_~tmp___0~0#1, usb_endpoint_is_int_in_~tmp___1~0#1;usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset := usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset;havoc usb_endpoint_is_int_in_~tmp~0#1;havoc usb_endpoint_is_int_in_~tmp___0~0#1;havoc usb_endpoint_is_int_in_~tmp___1~0#1;assume { :begin_inline_usb_endpoint_xfer_int } true;usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset := usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset;havoc usb_endpoint_xfer_int_#res#1;havoc usb_endpoint_xfer_int_#t~mem2#1, usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset;usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset := usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset;call usb_endpoint_xfer_int_#t~mem2#1 := read~int(usb_endpoint_xfer_int_~epd#1.base, 3 + usb_endpoint_xfer_int_~epd#1.offset, 1);usb_endpoint_xfer_int_#res#1 := (if 3 == (if 0 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 0 else (if 1 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 1 else ~bitwiseAnd(usb_endpoint_xfer_int_#t~mem2#1 % 256, 3))) then 1 else 0);havoc usb_endpoint_xfer_int_#t~mem2#1; {61690#true} is VALID [2022-02-20 22:07:26,362 INFO L290 TraceCheckUtils]: 72: Hoare triple {61690#true} usb_endpoint_is_int_in_#t~ret3#1 := usb_endpoint_xfer_int_#res#1;assume { :end_inline_usb_endpoint_xfer_int } true;assume -2147483648 <= usb_endpoint_is_int_in_#t~ret3#1 && usb_endpoint_is_int_in_#t~ret3#1 <= 2147483647;usb_endpoint_is_int_in_~tmp~0#1 := usb_endpoint_is_int_in_#t~ret3#1;havoc usb_endpoint_is_int_in_#t~ret3#1; {61690#true} is VALID [2022-02-20 22:07:26,362 INFO L290 TraceCheckUtils]: 73: Hoare triple {61690#true} assume 0 != usb_endpoint_is_int_in_~tmp~0#1;assume { :begin_inline_usb_endpoint_dir_in } true;usb_endpoint_dir_in_#in~epd#1.base, usb_endpoint_dir_in_#in~epd#1.offset := usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset;havoc usb_endpoint_dir_in_#res#1;havoc usb_endpoint_dir_in_#t~mem1#1, usb_endpoint_dir_in_~epd#1.base, usb_endpoint_dir_in_~epd#1.offset;usb_endpoint_dir_in_~epd#1.base, usb_endpoint_dir_in_~epd#1.offset := usb_endpoint_dir_in_#in~epd#1.base, usb_endpoint_dir_in_#in~epd#1.offset;call usb_endpoint_dir_in_#t~mem1#1 := read~int(usb_endpoint_dir_in_~epd#1.base, 2 + usb_endpoint_dir_in_~epd#1.offset, 1);usb_endpoint_dir_in_#res#1 := (if (if usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 <= 127 then usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 else usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 - 256) < 0 then 1 else 0);havoc usb_endpoint_dir_in_#t~mem1#1; {61690#true} is VALID [2022-02-20 22:07:26,363 INFO L290 TraceCheckUtils]: 74: Hoare triple {61690#true} usb_endpoint_is_int_in_#t~ret4#1 := usb_endpoint_dir_in_#res#1;assume { :end_inline_usb_endpoint_dir_in } true;assume -2147483648 <= usb_endpoint_is_int_in_#t~ret4#1 && usb_endpoint_is_int_in_#t~ret4#1 <= 2147483647;usb_endpoint_is_int_in_~tmp___0~0#1 := usb_endpoint_is_int_in_#t~ret4#1;havoc usb_endpoint_is_int_in_#t~ret4#1; {61690#true} is VALID [2022-02-20 22:07:26,363 INFO L290 TraceCheckUtils]: 75: Hoare triple {61690#true} assume 0 != usb_endpoint_is_int_in_~tmp___0~0#1;usb_endpoint_is_int_in_~tmp___1~0#1 := 1; {61690#true} is VALID [2022-02-20 22:07:26,363 INFO L290 TraceCheckUtils]: 76: Hoare triple {61690#true} usb_endpoint_is_int_in_#res#1 := usb_endpoint_is_int_in_~tmp___1~0#1; {61690#true} is VALID [2022-02-20 22:07:26,363 INFO L290 TraceCheckUtils]: 77: Hoare triple {61690#true} usb_acecad_probe_#t~ret134#1 := usb_endpoint_is_int_in_#res#1;assume { :end_inline_usb_endpoint_is_int_in } true;assume -2147483648 <= usb_acecad_probe_#t~ret134#1 && usb_acecad_probe_#t~ret134#1 <= 2147483647;usb_acecad_probe_~tmp___0~5#1 := usb_acecad_probe_#t~ret134#1;havoc usb_acecad_probe_#t~ret134#1; {61690#true} is VALID [2022-02-20 22:07:26,363 INFO L290 TraceCheckUtils]: 78: Hoare triple {61690#true} assume !(0 == usb_acecad_probe_~tmp___0~5#1);call usb_acecad_probe_#t~mem135#1 := read~int(usb_acecad_probe_~endpoint~0#1.base, 2 + usb_acecad_probe_~endpoint~0#1.offset, 1);assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_#t~mem135#1 % 256;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem45#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem45#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := (if (1 == 256 * __create_pipe_#t~mem45#1 || 0 == 256 * __create_pipe_#t~mem45#1) && 0 == 32768 * __create_pipe_~endpoint#1 then 256 * __create_pipe_#t~mem45#1 else (if 0 == 256 * __create_pipe_#t~mem45#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1) then 32768 * __create_pipe_~endpoint#1 else (if (1 == 256 * __create_pipe_#t~mem45#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1)) || ((1 == 256 * __create_pipe_#t~mem45#1 || 0 == 256 * __create_pipe_#t~mem45#1) && 1 == 32768 * __create_pipe_~endpoint#1) then 1 else ~bitwiseOr(256 * __create_pipe_#t~mem45#1, 32768 * __create_pipe_~endpoint#1))));havoc __create_pipe_#t~mem45#1; {61690#true} is VALID [2022-02-20 22:07:26,363 INFO L290 TraceCheckUtils]: 79: Hoare triple {61690#true} usb_acecad_probe_#t~ret136#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;usb_acecad_probe_~tmp___1~2#1 := usb_acecad_probe_#t~ret136#1;havoc usb_acecad_probe_#t~mem135#1;havoc usb_acecad_probe_#t~ret136#1;usb_acecad_probe_~pipe~0#1 := (if ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 else ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 - 4294967296);assume { :begin_inline_usb_maxpacket } true;usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset, usb_maxpacket_#in~pipe#1, usb_maxpacket_#in~is_out#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~pipe~0#1, (if 0 == (if 0 == usb_acecad_probe_~pipe~0#1 then 0 else (if 1 == usb_acecad_probe_~pipe~0#1 then 0 else ~bitwiseAnd(usb_acecad_probe_~pipe~0#1, 128))) then 1 else 0);havoc usb_maxpacket_#res#1;havoc usb_maxpacket_#t~ret47#1, usb_maxpacket_#t~ret48#1, usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset, usb_maxpacket_#t~ret50#1, usb_maxpacket_#t~ret51#1, usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset, usb_maxpacket_#t~mem53#1, usb_maxpacket_#t~nondet46#1, usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset, usb_maxpacket_~pipe#1, usb_maxpacket_~is_out#1, usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset, usb_maxpacket_~epnum~0#1, usb_maxpacket_~__ret_warn_on~0#1, usb_maxpacket_~tmp~2#1, usb_maxpacket_~__ret_warn_on___0~0#1, usb_maxpacket_~tmp___0~1#1;usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset := usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset;usb_maxpacket_~pipe#1 := usb_maxpacket_#in~pipe#1;usb_maxpacket_~is_out#1 := usb_maxpacket_#in~is_out#1;havoc usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset;havoc usb_maxpacket_~epnum~0#1;havoc usb_maxpacket_~__ret_warn_on~0#1;havoc usb_maxpacket_~tmp~2#1;havoc usb_maxpacket_~__ret_warn_on___0~0#1;havoc usb_maxpacket_~tmp___0~1#1; {61690#true} is VALID [2022-02-20 22:07:26,363 INFO L290 TraceCheckUtils]: 80: Hoare triple {61690#true} assume 0 == usb_maxpacket_~pipe#1 / 32768;usb_maxpacket_~epnum~0#1 := 0; {61690#true} is VALID [2022-02-20 22:07:26,363 INFO L290 TraceCheckUtils]: 81: Hoare triple {61690#true} assume !(0 != usb_maxpacket_~is_out#1);usb_maxpacket_~__ret_warn_on___0~0#1 := (if 0 == (if 0 == usb_maxpacket_~pipe#1 then 0 else (if 1 == usb_maxpacket_~pipe#1 then 0 else ~bitwiseAnd(usb_maxpacket_~pipe#1, 128))) then 1 else 0); {61690#true} is VALID [2022-02-20 22:07:26,364 INFO L272 TraceCheckUtils]: 82: Hoare triple {61690#true} call usb_maxpacket_#t~ret50#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {61690#true} is VALID [2022-02-20 22:07:26,364 INFO L290 TraceCheckUtils]: 83: Hoare triple {61690#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {61690#true} is VALID [2022-02-20 22:07:26,364 INFO L290 TraceCheckUtils]: 84: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:26,364 INFO L284 TraceCheckUtils]: 85: Hoare quadruple {61690#true} {61690#true} #563#return; {61690#true} is VALID [2022-02-20 22:07:26,364 INFO L290 TraceCheckUtils]: 86: Hoare triple {61690#true} assume -9223372036854775808 <= usb_maxpacket_#t~ret50#1 && usb_maxpacket_#t~ret50#1 <= 9223372036854775807;usb_maxpacket_~tmp___0~1#1 := usb_maxpacket_#t~ret50#1;havoc usb_maxpacket_#t~ret50#1; {61690#true} is VALID [2022-02-20 22:07:26,364 INFO L290 TraceCheckUtils]: 87: Hoare triple {61690#true} assume !(0 != usb_maxpacket_~tmp___0~1#1); {61690#true} is VALID [2022-02-20 22:07:26,364 INFO L272 TraceCheckUtils]: 88: Hoare triple {61690#true} call usb_maxpacket_#t~ret51#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {61690#true} is VALID [2022-02-20 22:07:26,364 INFO L290 TraceCheckUtils]: 89: Hoare triple {61690#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {61690#true} is VALID [2022-02-20 22:07:26,365 INFO L290 TraceCheckUtils]: 90: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:26,365 INFO L284 TraceCheckUtils]: 91: Hoare quadruple {61690#true} {61690#true} #567#return; {61690#true} is VALID [2022-02-20 22:07:26,365 INFO L290 TraceCheckUtils]: 92: Hoare triple {61690#true} assume -9223372036854775808 <= usb_maxpacket_#t~ret51#1 && usb_maxpacket_#t~ret51#1 <= 9223372036854775807;havoc usb_maxpacket_#t~ret51#1;call usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset := read~$Pointer$(usb_maxpacket_~udev#1.base, 1186 + usb_maxpacket_~udev#1.offset + 8 * (usb_maxpacket_~epnum~0#1 % 4294967296), 8);usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset := usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset;havoc usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset; {61690#true} is VALID [2022-02-20 22:07:26,365 INFO L290 TraceCheckUtils]: 93: Hoare triple {61690#true} assume 0 == (usb_maxpacket_~ep~0#1.base + usb_maxpacket_~ep~0#1.offset) % 18446744073709551616;usb_maxpacket_#res#1 := 0; {61690#true} is VALID [2022-02-20 22:07:26,365 INFO L290 TraceCheckUtils]: 94: Hoare triple {61690#true} usb_acecad_probe_#t~ret137#1 := usb_maxpacket_#res#1;assume { :end_inline_usb_maxpacket } true;usb_acecad_probe_~tmp___2~0#1 := usb_acecad_probe_#t~ret137#1;havoc usb_acecad_probe_#t~ret137#1;usb_acecad_probe_~maxp~0#1 := usb_acecad_probe_~tmp___2~0#1 % 65536; {61690#true} is VALID [2022-02-20 22:07:26,365 INFO L272 TraceCheckUtils]: 95: Hoare triple {61690#true} call usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset := kzalloc(232, 208); {61690#true} is VALID [2022-02-20 22:07:26,365 INFO L290 TraceCheckUtils]: 96: Hoare triple {61690#true} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {61690#true} is VALID [2022-02-20 22:07:26,365 INFO L272 TraceCheckUtils]: 97: Hoare triple {61690#true} call __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset := ldv_malloc(__kmalloc_~size#1); {61690#true} is VALID [2022-02-20 22:07:26,366 INFO L290 TraceCheckUtils]: 98: Hoare triple {61690#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {61690#true} is VALID [2022-02-20 22:07:26,366 INFO L290 TraceCheckUtils]: 99: Hoare triple {61690#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {61690#true} is VALID [2022-02-20 22:07:26,366 INFO L290 TraceCheckUtils]: 100: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:26,366 INFO L284 TraceCheckUtils]: 101: Hoare quadruple {61690#true} {61690#true} #539#return; {61690#true} is VALID [2022-02-20 22:07:26,366 INFO L290 TraceCheckUtils]: 102: Hoare triple {61690#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset; {61690#true} is VALID [2022-02-20 22:07:26,366 INFO L290 TraceCheckUtils]: 103: Hoare triple {61690#true} kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {61690#true} is VALID [2022-02-20 22:07:26,366 INFO L290 TraceCheckUtils]: 104: Hoare triple {61690#true} #t~ret58#1.base, #t~ret58#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret58#1.base, #t~ret58#1.offset;havoc #t~ret58#1.base, #t~ret58#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {61690#true} is VALID [2022-02-20 22:07:26,366 INFO L290 TraceCheckUtils]: 105: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:26,367 INFO L284 TraceCheckUtils]: 106: Hoare quadruple {61690#true} {61690#true} #569#return; {61690#true} is VALID [2022-02-20 22:07:26,367 INFO L290 TraceCheckUtils]: 107: Hoare triple {61690#true} usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset := usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset;havoc usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset;usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset := usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;assume { :begin_inline_input_allocate_device } true;havoc input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;havoc input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset; {61690#true} is VALID [2022-02-20 22:07:26,367 INFO L272 TraceCheckUtils]: 108: Hoare triple {61690#true} call input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset := kzalloc(1855, ~bitwiseOr(~bitwiseOr(16, 64), 128)); {61690#true} is VALID [2022-02-20 22:07:26,367 INFO L290 TraceCheckUtils]: 109: Hoare triple {61690#true} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {61690#true} is VALID [2022-02-20 22:07:26,367 INFO L272 TraceCheckUtils]: 110: Hoare triple {61690#true} call __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset := ldv_malloc(__kmalloc_~size#1); {61690#true} is VALID [2022-02-20 22:07:26,367 INFO L290 TraceCheckUtils]: 111: Hoare triple {61690#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {61690#true} is VALID [2022-02-20 22:07:26,367 INFO L290 TraceCheckUtils]: 112: Hoare triple {61690#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {61690#true} is VALID [2022-02-20 22:07:26,367 INFO L290 TraceCheckUtils]: 113: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:26,368 INFO L284 TraceCheckUtils]: 114: Hoare quadruple {61690#true} {61690#true} #539#return; {61690#true} is VALID [2022-02-20 22:07:26,368 INFO L290 TraceCheckUtils]: 115: Hoare triple {61690#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset; {61690#true} is VALID [2022-02-20 22:07:26,368 INFO L290 TraceCheckUtils]: 116: Hoare triple {61690#true} kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {61690#true} is VALID [2022-02-20 22:07:26,368 INFO L290 TraceCheckUtils]: 117: Hoare triple {61690#true} #t~ret58#1.base, #t~ret58#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret58#1.base, #t~ret58#1.offset;havoc #t~ret58#1.base, #t~ret58#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {61690#true} is VALID [2022-02-20 22:07:26,368 INFO L290 TraceCheckUtils]: 118: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:26,368 INFO L284 TraceCheckUtils]: 119: Hoare quadruple {61690#true} {61690#true} #571#return; {61690#true} is VALID [2022-02-20 22:07:26,368 INFO L290 TraceCheckUtils]: 120: Hoare triple {61690#true} input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset := input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset;havoc input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset; {61690#true} is VALID [2022-02-20 22:07:26,368 INFO L290 TraceCheckUtils]: 121: Hoare triple {61690#true} usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset := input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;assume { :end_inline_input_allocate_device } true;usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset := usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset;havoc usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset; {61690#true} is VALID [2022-02-20 22:07:26,369 INFO L290 TraceCheckUtils]: 122: Hoare triple {61690#true} assume !(0 == (usb_acecad_probe_~acecad~3#1.base + usb_acecad_probe_~acecad~3#1.offset) % 18446744073709551616 || 0 == (usb_acecad_probe_~input_dev~0#1.base + usb_acecad_probe_~input_dev~0#1.offset) % 18446744073709551616);assume { :begin_inline_usb_alloc_coherent } true;usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset, usb_alloc_coherent_#in~arg1#1, usb_alloc_coherent_#in~arg2#1, usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, 8, 208, usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset;havoc usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;havoc usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset, usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset, usb_alloc_coherent_~arg1#1, usb_alloc_coherent_~arg2#1, usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset;usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset := usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset;usb_alloc_coherent_~arg1#1 := usb_alloc_coherent_#in~arg1#1;usb_alloc_coherent_~arg2#1 := usb_alloc_coherent_#in~arg2#1;usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset := usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset; {61690#true} is VALID [2022-02-20 22:07:26,369 INFO L272 TraceCheckUtils]: 123: Hoare triple {61690#true} call usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset := ldv_malloc(0); {61690#true} is VALID [2022-02-20 22:07:26,369 INFO L290 TraceCheckUtils]: 124: Hoare triple {61690#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {61690#true} is VALID [2022-02-20 22:07:26,369 INFO L290 TraceCheckUtils]: 125: Hoare triple {61690#true} assume !(0 != ~tmp___0~2);call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size);~tmp~4.base, ~tmp~4.offset := #t~malloc63.base, #t~malloc63.offset;havoc #t~malloc63.base, #t~malloc63.offset;~p~0.base, ~p~0.offset := ~tmp~4.base, ~tmp~4.offset; {61690#true} is VALID [2022-02-20 22:07:26,369 INFO L272 TraceCheckUtils]: 126: Hoare triple {61690#true} call assume_abort_if_not((if 0 != (~p~0.base + ~p~0.offset) % 18446744073709551616 then 1 else 0)); {61690#true} is VALID [2022-02-20 22:07:26,369 INFO L290 TraceCheckUtils]: 127: Hoare triple {61690#true} ~cond := #in~cond; {61690#true} is VALID [2022-02-20 22:07:26,369 INFO L290 TraceCheckUtils]: 128: Hoare triple {61690#true} assume !(0 == ~cond); {61690#true} is VALID [2022-02-20 22:07:26,369 INFO L290 TraceCheckUtils]: 129: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:26,370 INFO L284 TraceCheckUtils]: 130: Hoare quadruple {61690#true} {61690#true} #551#return; {61690#true} is VALID [2022-02-20 22:07:26,370 INFO L290 TraceCheckUtils]: 131: Hoare triple {61690#true} #res.base, #res.offset := ~p~0.base, ~p~0.offset; {61690#true} is VALID [2022-02-20 22:07:26,370 INFO L290 TraceCheckUtils]: 132: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:26,370 INFO L284 TraceCheckUtils]: 133: Hoare quadruple {61690#true} {61690#true} #573#return; {61690#true} is VALID [2022-02-20 22:07:26,370 INFO L290 TraceCheckUtils]: 134: Hoare triple {61690#true} usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset := usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset;havoc usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset; {61690#true} is VALID [2022-02-20 22:07:26,370 INFO L290 TraceCheckUtils]: 135: Hoare triple {61690#true} usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset := usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;assume { :end_inline_usb_alloc_coherent } true;usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset := usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset;havoc usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset;call write~$Pointer$(usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8); {61690#true} is VALID [2022-02-20 22:07:26,370 INFO L290 TraceCheckUtils]: 136: Hoare triple {61690#true} assume !(0 == (usb_acecad_probe_#t~mem141#1.base + usb_acecad_probe_#t~mem141#1.offset) % 18446744073709551616);havoc usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset;assume { :begin_inline_ldv_usb_alloc_urb_5 } true;ldv_usb_alloc_urb_5_#in~ldv_func_arg1#1, ldv_usb_alloc_urb_5_#in~ldv_func_arg2#1 := 0, 208;havoc ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset, ldv_usb_alloc_urb_5_~ldv_func_arg1#1, ldv_usb_alloc_urb_5_~ldv_func_arg2#1, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset, ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;ldv_usb_alloc_urb_5_~ldv_func_arg1#1 := ldv_usb_alloc_urb_5_#in~ldv_func_arg1#1;ldv_usb_alloc_urb_5_~ldv_func_arg2#1 := ldv_usb_alloc_urb_5_#in~ldv_func_arg2#1;havoc ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset;havoc ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;assume { :begin_inline_usb_alloc_urb } true;usb_alloc_urb_#in~arg0#1, usb_alloc_urb_#in~arg1#1 := ldv_usb_alloc_urb_5_~ldv_func_arg1#1, ldv_usb_alloc_urb_5_~ldv_func_arg2#1;havoc usb_alloc_urb_#res#1.base, usb_alloc_urb_#res#1.offset;havoc usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset, usb_alloc_urb_~arg0#1, usb_alloc_urb_~arg1#1;usb_alloc_urb_~arg0#1 := usb_alloc_urb_#in~arg0#1;usb_alloc_urb_~arg1#1 := usb_alloc_urb_#in~arg1#1; {61690#true} is VALID [2022-02-20 22:07:26,371 INFO L272 TraceCheckUtils]: 137: Hoare triple {61690#true} call usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset := ldv_malloc(180); {61690#true} is VALID [2022-02-20 22:07:26,371 INFO L290 TraceCheckUtils]: 138: Hoare triple {61690#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {61690#true} is VALID [2022-02-20 22:07:26,371 INFO L290 TraceCheckUtils]: 139: Hoare triple {61690#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {61690#true} is VALID [2022-02-20 22:07:26,371 INFO L290 TraceCheckUtils]: 140: Hoare triple {61690#true} assume true; {61690#true} is VALID [2022-02-20 22:07:26,371 INFO L284 TraceCheckUtils]: 141: Hoare quadruple {61690#true} {61690#true} #575#return; {61690#true} is VALID [2022-02-20 22:07:26,371 INFO L290 TraceCheckUtils]: 142: Hoare triple {61690#true} usb_alloc_urb_#res#1.base, usb_alloc_urb_#res#1.offset := usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset;havoc usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset; {61690#true} is VALID [2022-02-20 22:07:26,372 INFO L290 TraceCheckUtils]: 143: Hoare triple {61690#true} ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset := usb_alloc_urb_#res#1.base, usb_alloc_urb_#res#1.offset;assume { :end_inline_usb_alloc_urb } true;ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset := ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset;ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset := ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;assume { :begin_inline_ldv_alloc_urb } true;ldv_alloc_urb_#in~res#1.base, ldv_alloc_urb_#in~res#1.offset := ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset;havoc ldv_alloc_urb_~res#1.base, ldv_alloc_urb_~res#1.offset;ldv_alloc_urb_~res#1.base, ldv_alloc_urb_~res#1.offset := ldv_alloc_urb_#in~res#1.base, ldv_alloc_urb_#in~res#1.offset; {62251#(and (= |ULTIMATE.start_ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset| |ULTIMATE.start_ldv_alloc_urb_~res#1.offset|) (= |ULTIMATE.start_ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base| |ULTIMATE.start_ldv_alloc_urb_~res#1.base|))} is VALID [2022-02-20 22:07:26,372 INFO L290 TraceCheckUtils]: 144: Hoare triple {62251#(and (= |ULTIMATE.start_ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset| |ULTIMATE.start_ldv_alloc_urb_~res#1.offset|) (= |ULTIMATE.start_ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base| |ULTIMATE.start_ldv_alloc_urb_~res#1.base|))} assume 0 != (ldv_alloc_urb_~res#1.base + ldv_alloc_urb_~res#1.offset) % 18446744073709551616;~URB_STATE~0 := 1 + ~URB_STATE~0; {62255#(not (= (mod (+ |ULTIMATE.start_ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base| |ULTIMATE.start_ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset|) 18446744073709551616) 0))} is VALID [2022-02-20 22:07:26,373 INFO L290 TraceCheckUtils]: 145: Hoare triple {62255#(not (= (mod (+ |ULTIMATE.start_ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base| |ULTIMATE.start_ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset|) 18446744073709551616) 0))} assume { :end_inline_ldv_alloc_urb } true;ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset := ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset; {62259#(not (= (mod (+ |ULTIMATE.start_ldv_usb_alloc_urb_5_#res#1.base| |ULTIMATE.start_ldv_usb_alloc_urb_5_#res#1.offset|) 18446744073709551616) 0))} is VALID [2022-02-20 22:07:26,374 INFO L290 TraceCheckUtils]: 146: Hoare triple {62259#(not (= (mod (+ |ULTIMATE.start_ldv_usb_alloc_urb_5_#res#1.base| |ULTIMATE.start_ldv_usb_alloc_urb_5_#res#1.offset|) 18446744073709551616) 0))} usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset := ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;assume { :end_inline_ldv_usb_alloc_urb_5 } true;call write~$Pointer$(usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset, usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8);havoc usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset;call usb_acecad_probe_#t~mem143#1.base, usb_acecad_probe_#t~mem143#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8); {62263#(not (= (mod (+ |ULTIMATE.start_usb_acecad_probe_#t~mem143#1.base| |ULTIMATE.start_usb_acecad_probe_#t~mem143#1.offset|) 18446744073709551616) 0))} is VALID [2022-02-20 22:07:26,374 INFO L290 TraceCheckUtils]: 147: Hoare triple {62263#(not (= (mod (+ |ULTIMATE.start_usb_acecad_probe_#t~mem143#1.base| |ULTIMATE.start_usb_acecad_probe_#t~mem143#1.offset|) 18446744073709551616) 0))} assume 0 == (usb_acecad_probe_#t~mem143#1.base + usb_acecad_probe_#t~mem143#1.offset) % 18446744073709551616;havoc usb_acecad_probe_#t~mem143#1.base, usb_acecad_probe_#t~mem143#1.offset;usb_acecad_probe_~err~0#1 := -12; {61691#false} is VALID [2022-02-20 22:07:26,374 INFO L290 TraceCheckUtils]: 148: Hoare triple {61691#false} call usb_acecad_probe_#t~mem175#1.base, usb_acecad_probe_#t~mem175#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem176#1 := read~int(usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset, 8); {61691#false} is VALID [2022-02-20 22:07:26,374 INFO L272 TraceCheckUtils]: 149: Hoare triple {61691#false} call usb_free_coherent(usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, 8, usb_acecad_probe_#t~mem175#1.base, usb_acecad_probe_#t~mem175#1.offset, usb_acecad_probe_#t~mem176#1); {61691#false} is VALID [2022-02-20 22:07:26,375 INFO L290 TraceCheckUtils]: 150: Hoare triple {61691#false} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1 := #in~arg1;~arg2.base, ~arg2.offset := #in~arg2.base, #in~arg2.offset;~arg3 := #in~arg3; {61691#false} is VALID [2022-02-20 22:07:26,375 INFO L290 TraceCheckUtils]: 151: Hoare triple {61691#false} assume true; {61691#false} is VALID [2022-02-20 22:07:26,375 INFO L284 TraceCheckUtils]: 152: Hoare quadruple {61691#false} {61691#false} #603#return; {61691#false} is VALID [2022-02-20 22:07:26,375 INFO L290 TraceCheckUtils]: 153: Hoare triple {61691#false} havoc usb_acecad_probe_#t~mem175#1.base, usb_acecad_probe_#t~mem175#1.offset;havoc usb_acecad_probe_#t~mem176#1; {61691#false} is VALID [2022-02-20 22:07:26,375 INFO L290 TraceCheckUtils]: 154: Hoare triple {61691#false} assume { :begin_inline_input_free_device } true;input_free_device_#in~arg0#1.base, input_free_device_#in~arg0#1.offset := usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset;havoc input_free_device_~arg0#1.base, input_free_device_~arg0#1.offset;input_free_device_~arg0#1.base, input_free_device_~arg0#1.offset := input_free_device_#in~arg0#1.base, input_free_device_#in~arg0#1.offset; {61691#false} is VALID [2022-02-20 22:07:26,375 INFO L290 TraceCheckUtils]: 155: Hoare triple {61691#false} assume { :end_inline_input_free_device } true; {61691#false} is VALID [2022-02-20 22:07:26,375 INFO L272 TraceCheckUtils]: 156: Hoare triple {61691#false} call kfree(usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset); {61691#false} is VALID [2022-02-20 22:07:26,376 INFO L290 TraceCheckUtils]: 157: Hoare triple {61691#false} ~p.base, ~p.offset := #in~p.base, #in~p.offset;call ULTIMATE.dealloc(~p.base, ~p.offset); {61691#false} is VALID [2022-02-20 22:07:26,376 INFO L290 TraceCheckUtils]: 158: Hoare triple {61691#false} assume true; {61691#false} is VALID [2022-02-20 22:07:26,376 INFO L284 TraceCheckUtils]: 159: Hoare quadruple {61691#false} {61691#false} #605#return; {61691#false} is VALID [2022-02-20 22:07:26,376 INFO L290 TraceCheckUtils]: 160: Hoare triple {61691#false} usb_acecad_probe_#res#1 := usb_acecad_probe_~err~0#1; {61691#false} is VALID [2022-02-20 22:07:26,376 INFO L290 TraceCheckUtils]: 161: Hoare triple {61691#false} main_#t~ret191#1 := usb_acecad_probe_#res#1;assume { :end_inline_usb_acecad_probe } true;assume -2147483648 <= main_#t~ret191#1 && main_#t~ret191#1 <= 2147483647;~ldv_retval_0~0 := main_#t~ret191#1;havoc main_#t~ret191#1; {61691#false} is VALID [2022-02-20 22:07:26,376 INFO L290 TraceCheckUtils]: 162: Hoare triple {61691#false} assume !(0 == ~ldv_retval_0~0); {61691#false} is VALID [2022-02-20 22:07:26,376 INFO L290 TraceCheckUtils]: 163: Hoare triple {61691#false} assume -2147483648 <= main_#t~nondet187#1 && main_#t~nondet187#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet187#1;havoc main_#t~nondet187#1;main_#t~switch188#1 := 0 == main_~tmp___0~6#1; {61691#false} is VALID [2022-02-20 22:07:26,376 INFO L290 TraceCheckUtils]: 164: Hoare triple {61691#false} assume !main_#t~switch188#1;main_#t~switch188#1 := main_#t~switch188#1 || 1 == main_~tmp___0~6#1; {61691#false} is VALID [2022-02-20 22:07:26,376 INFO L290 TraceCheckUtils]: 165: Hoare triple {61691#false} assume main_#t~switch188#1; {61691#false} is VALID [2022-02-20 22:07:26,377 INFO L290 TraceCheckUtils]: 166: Hoare triple {61691#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet192#1 && main_#t~nondet192#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet192#1;havoc main_#t~nondet192#1;main_#t~switch193#1 := 0 == main_~tmp___2~1#1; {61691#false} is VALID [2022-02-20 22:07:26,377 INFO L290 TraceCheckUtils]: 167: Hoare triple {61691#false} assume main_#t~switch193#1; {61691#false} is VALID [2022-02-20 22:07:26,377 INFO L290 TraceCheckUtils]: 168: Hoare triple {61691#false} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0;assume { :begin_inline_usb_acecad_exit } true;assume { :begin_inline_ldv_usb_deregister_11 } true;ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset := ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset;assume { :begin_inline_usb_deregister } true;usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset := ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;havoc usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset;usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset := usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset; {61691#false} is VALID [2022-02-20 22:07:26,377 INFO L290 TraceCheckUtils]: 169: Hoare triple {61691#false} assume { :end_inline_usb_deregister } true;~ldv_state_variable_1~0 := 0; {61691#false} is VALID [2022-02-20 22:07:26,377 INFO L290 TraceCheckUtils]: 170: Hoare triple {61691#false} assume { :end_inline_ldv_usb_deregister_11 } true; {61691#false} is VALID [2022-02-20 22:07:26,377 INFO L290 TraceCheckUtils]: 171: Hoare triple {61691#false} assume { :end_inline_usb_acecad_exit } true;~ldv_state_variable_0~0 := 2; {61691#false} is VALID [2022-02-20 22:07:26,377 INFO L290 TraceCheckUtils]: 172: Hoare triple {61691#false} assume { :begin_inline_ldv_check_final_state } true; {61691#false} is VALID [2022-02-20 22:07:26,377 INFO L290 TraceCheckUtils]: 173: Hoare triple {61691#false} assume 0 != ~URB_STATE~0; {61691#false} is VALID [2022-02-20 22:07:26,378 INFO L272 TraceCheckUtils]: 174: Hoare triple {61691#false} call ldv_error(); {61691#false} is VALID [2022-02-20 22:07:26,378 INFO L290 TraceCheckUtils]: 175: Hoare triple {61691#false} assume !false; {61691#false} is VALID [2022-02-20 22:07:26,378 INFO L134 CoverageAnalysis]: Checked inductivity of 95 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 88 trivial. 0 not checked. [2022-02-20 22:07:26,378 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-02-20 22:07:26,378 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1095667359] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:07:26,379 INFO L191 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-02-20 22:07:26,379 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [13] total 17 [2022-02-20 22:07:26,379 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [780121429] [2022-02-20 22:07:26,379 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:07:26,380 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 17.0) internal successors, (102), 6 states have internal predecessors, (102), 2 states have call successors, (16), 2 states have call predecessors, (16), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) Word has length 176 [2022-02-20 22:07:26,380 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:07:26,380 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 17.0) internal successors, (102), 6 states have internal predecessors, (102), 2 states have call successors, (16), 2 states have call predecessors, (16), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2022-02-20 22:07:26,466 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 133 edges. 133 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:26,467 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-02-20 22:07:26,467 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:07:26,467 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-02-20 22:07:26,467 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=237, Unknown=0, NotChecked=0, Total=272 [2022-02-20 22:07:26,468 INFO L87 Difference]: Start difference. First operand 947 states and 1235 transitions. Second operand has 6 states, 6 states have (on average 17.0) internal successors, (102), 6 states have internal predecessors, (102), 2 states have call successors, (16), 2 states have call predecessors, (16), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2022-02-20 22:07:29,142 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:29,142 INFO L93 Difference]: Finished difference Result 1933 states and 2603 transitions. [2022-02-20 22:07:29,142 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-02-20 22:07:29,142 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 17.0) internal successors, (102), 6 states have internal predecessors, (102), 2 states have call successors, (16), 2 states have call predecessors, (16), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) Word has length 176 [2022-02-20 22:07:29,142 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 22:07:29,143 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 17.0) internal successors, (102), 6 states have internal predecessors, (102), 2 states have call successors, (16), 2 states have call predecessors, (16), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2022-02-20 22:07:29,148 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 895 transitions. [2022-02-20 22:07:29,148 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 17.0) internal successors, (102), 6 states have internal predecessors, (102), 2 states have call successors, (16), 2 states have call predecessors, (16), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2022-02-20 22:07:29,153 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 895 transitions. [2022-02-20 22:07:29,153 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states and 895 transitions. [2022-02-20 22:07:29,753 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 895 edges. 895 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:29,843 INFO L225 Difference]: With dead ends: 1933 [2022-02-20 22:07:29,843 INFO L226 Difference]: Without dead ends: 1465 [2022-02-20 22:07:29,844 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 227 GetRequests, 209 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=53, Invalid=327, Unknown=0, NotChecked=0, Total=380 [2022-02-20 22:07:29,844 INFO L933 BasicCegarLoop]: 433 mSDtfsCounter, 611 mSDsluCounter, 1430 mSDsCounter, 0 mSdLazyCounter, 52 mSolverCounterSat, 81 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 637 SdHoareTripleChecker+Valid, 1863 SdHoareTripleChecker+Invalid, 133 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 81 IncrementalHoareTripleChecker+Valid, 52 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-02-20 22:07:29,844 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [637 Valid, 1863 Invalid, 133 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [81 Valid, 52 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-02-20 22:07:29,845 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1465 states. [2022-02-20 22:07:30,255 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1465 to 953. [2022-02-20 22:07:30,255 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 22:07:30,257 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1465 states. Second operand has 953 states, 751 states have (on average 1.2490013315579227) internal successors, (938), 755 states have internal predecessors, (938), 142 states have call successors, (142), 56 states have call predecessors, (142), 59 states have return successors, (161), 149 states have call predecessors, (161), 141 states have call successors, (161) [2022-02-20 22:07:30,257 INFO L74 IsIncluded]: Start isIncluded. First operand 1465 states. Second operand has 953 states, 751 states have (on average 1.2490013315579227) internal successors, (938), 755 states have internal predecessors, (938), 142 states have call successors, (142), 56 states have call predecessors, (142), 59 states have return successors, (161), 149 states have call predecessors, (161), 141 states have call successors, (161) [2022-02-20 22:07:30,258 INFO L87 Difference]: Start difference. First operand 1465 states. Second operand has 953 states, 751 states have (on average 1.2490013315579227) internal successors, (938), 755 states have internal predecessors, (938), 142 states have call successors, (142), 56 states have call predecessors, (142), 59 states have return successors, (161), 149 states have call predecessors, (161), 141 states have call successors, (161) [2022-02-20 22:07:30,321 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:30,322 INFO L93 Difference]: Finished difference Result 1465 states and 1986 transitions. [2022-02-20 22:07:30,322 INFO L276 IsEmpty]: Start isEmpty. Operand 1465 states and 1986 transitions. [2022-02-20 22:07:30,324 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:30,324 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:30,326 INFO L74 IsIncluded]: Start isIncluded. First operand has 953 states, 751 states have (on average 1.2490013315579227) internal successors, (938), 755 states have internal predecessors, (938), 142 states have call successors, (142), 56 states have call predecessors, (142), 59 states have return successors, (161), 149 states have call predecessors, (161), 141 states have call successors, (161) Second operand 1465 states. [2022-02-20 22:07:30,326 INFO L87 Difference]: Start difference. First operand has 953 states, 751 states have (on average 1.2490013315579227) internal successors, (938), 755 states have internal predecessors, (938), 142 states have call successors, (142), 56 states have call predecessors, (142), 59 states have return successors, (161), 149 states have call predecessors, (161), 141 states have call successors, (161) Second operand 1465 states. [2022-02-20 22:07:30,386 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:30,387 INFO L93 Difference]: Finished difference Result 1465 states and 1986 transitions. [2022-02-20 22:07:30,387 INFO L276 IsEmpty]: Start isEmpty. Operand 1465 states and 1986 transitions. [2022-02-20 22:07:30,389 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:30,389 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:30,389 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 22:07:30,389 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 22:07:30,391 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 953 states, 751 states have (on average 1.2490013315579227) internal successors, (938), 755 states have internal predecessors, (938), 142 states have call successors, (142), 56 states have call predecessors, (142), 59 states have return successors, (161), 149 states have call predecessors, (161), 141 states have call successors, (161) [2022-02-20 22:07:30,429 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 953 states to 953 states and 1241 transitions. [2022-02-20 22:07:30,430 INFO L78 Accepts]: Start accepts. Automaton has 953 states and 1241 transitions. Word has length 176 [2022-02-20 22:07:30,430 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 22:07:30,430 INFO L470 AbstractCegarLoop]: Abstraction has 953 states and 1241 transitions. [2022-02-20 22:07:30,431 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 17.0) internal successors, (102), 6 states have internal predecessors, (102), 2 states have call successors, (16), 2 states have call predecessors, (16), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2022-02-20 22:07:30,431 INFO L276 IsEmpty]: Start isEmpty. Operand 953 states and 1241 transitions. [2022-02-20 22:07:30,433 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 208 [2022-02-20 22:07:30,433 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:07:30,433 INFO L514 BasicCegarLoop]: trace histogram [6, 6, 4, 4, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:07:30,458 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-02-20 22:07:30,639 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-20 22:07:30,639 INFO L402 AbstractCegarLoop]: === Iteration 14 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:07:30,640 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:07:30,640 INFO L85 PathProgramCache]: Analyzing trace with hash 1273770335, now seen corresponding path program 1 times [2022-02-20 22:07:30,640 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:07:30,640 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1997513644] [2022-02-20 22:07:30,640 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:07:30,640 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:07:30,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:30,783 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 22:07:30,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:30,791 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:30,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:30,794 INFO L290 TraceCheckUtils]: 0: Hoare triple {69429#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {69323#true} is VALID [2022-02-20 22:07:30,794 INFO L290 TraceCheckUtils]: 1: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,794 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {69323#true} {69323#true} #547#return; {69323#true} is VALID [2022-02-20 22:07:30,795 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:30,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:30,797 INFO L290 TraceCheckUtils]: 0: Hoare triple {69323#true} ~cond := #in~cond; {69323#true} is VALID [2022-02-20 22:07:30,797 INFO L290 TraceCheckUtils]: 1: Hoare triple {69323#true} assume !(0 == ~cond); {69323#true} is VALID [2022-02-20 22:07:30,797 INFO L290 TraceCheckUtils]: 2: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,798 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {69323#true} {69323#true} #549#return; {69323#true} is VALID [2022-02-20 22:07:30,798 INFO L290 TraceCheckUtils]: 0: Hoare triple {69421#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {69323#true} is VALID [2022-02-20 22:07:30,798 INFO L272 TraceCheckUtils]: 1: Hoare triple {69323#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {69429#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:30,798 INFO L290 TraceCheckUtils]: 2: Hoare triple {69429#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {69323#true} is VALID [2022-02-20 22:07:30,799 INFO L290 TraceCheckUtils]: 3: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,799 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {69323#true} {69323#true} #547#return; {69323#true} is VALID [2022-02-20 22:07:30,799 INFO L290 TraceCheckUtils]: 5: Hoare triple {69323#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {69323#true} is VALID [2022-02-20 22:07:30,799 INFO L272 TraceCheckUtils]: 6: Hoare triple {69323#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {69323#true} is VALID [2022-02-20 22:07:30,799 INFO L290 TraceCheckUtils]: 7: Hoare triple {69323#true} ~cond := #in~cond; {69323#true} is VALID [2022-02-20 22:07:30,799 INFO L290 TraceCheckUtils]: 8: Hoare triple {69323#true} assume !(0 == ~cond); {69323#true} is VALID [2022-02-20 22:07:30,799 INFO L290 TraceCheckUtils]: 9: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,799 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {69323#true} {69323#true} #549#return; {69323#true} is VALID [2022-02-20 22:07:30,800 INFO L290 TraceCheckUtils]: 11: Hoare triple {69323#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {69323#true} is VALID [2022-02-20 22:07:30,800 INFO L290 TraceCheckUtils]: 12: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,800 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {69323#true} {69323#true} #553#return; {69323#true} is VALID [2022-02-20 22:07:30,800 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 27 [2022-02-20 22:07:30,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:30,806 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:30,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:30,809 INFO L290 TraceCheckUtils]: 0: Hoare triple {69429#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {69323#true} is VALID [2022-02-20 22:07:30,809 INFO L290 TraceCheckUtils]: 1: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,809 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {69323#true} {69323#true} #547#return; {69323#true} is VALID [2022-02-20 22:07:30,809 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:30,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:30,811 INFO L290 TraceCheckUtils]: 0: Hoare triple {69323#true} ~cond := #in~cond; {69323#true} is VALID [2022-02-20 22:07:30,812 INFO L290 TraceCheckUtils]: 1: Hoare triple {69323#true} assume !(0 == ~cond); {69323#true} is VALID [2022-02-20 22:07:30,812 INFO L290 TraceCheckUtils]: 2: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,812 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {69323#true} {69323#true} #549#return; {69323#true} is VALID [2022-02-20 22:07:30,812 INFO L290 TraceCheckUtils]: 0: Hoare triple {69421#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {69323#true} is VALID [2022-02-20 22:07:30,813 INFO L272 TraceCheckUtils]: 1: Hoare triple {69323#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {69429#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:30,813 INFO L290 TraceCheckUtils]: 2: Hoare triple {69429#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {69323#true} is VALID [2022-02-20 22:07:30,813 INFO L290 TraceCheckUtils]: 3: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,813 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {69323#true} {69323#true} #547#return; {69323#true} is VALID [2022-02-20 22:07:30,813 INFO L290 TraceCheckUtils]: 5: Hoare triple {69323#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {69323#true} is VALID [2022-02-20 22:07:30,813 INFO L272 TraceCheckUtils]: 6: Hoare triple {69323#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {69323#true} is VALID [2022-02-20 22:07:30,813 INFO L290 TraceCheckUtils]: 7: Hoare triple {69323#true} ~cond := #in~cond; {69323#true} is VALID [2022-02-20 22:07:30,813 INFO L290 TraceCheckUtils]: 8: Hoare triple {69323#true} assume !(0 == ~cond); {69323#true} is VALID [2022-02-20 22:07:30,813 INFO L290 TraceCheckUtils]: 9: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,814 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {69323#true} {69323#true} #549#return; {69323#true} is VALID [2022-02-20 22:07:30,814 INFO L290 TraceCheckUtils]: 11: Hoare triple {69323#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {69323#true} is VALID [2022-02-20 22:07:30,814 INFO L290 TraceCheckUtils]: 12: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,814 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {69323#true} {69339#(= ~ref_cnt~0 0)} #611#return; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,819 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 56 [2022-02-20 22:07:30,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:30,826 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 22:07:30,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:30,828 INFO L290 TraceCheckUtils]: 0: Hoare triple {69323#true} ~cond := #in~cond; {69323#true} is VALID [2022-02-20 22:07:30,828 INFO L290 TraceCheckUtils]: 1: Hoare triple {69323#true} assume !(0 == ~cond); {69323#true} is VALID [2022-02-20 22:07:30,828 INFO L290 TraceCheckUtils]: 2: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,829 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {69323#true} {69323#true} #551#return; {69323#true} is VALID [2022-02-20 22:07:30,829 INFO L290 TraceCheckUtils]: 0: Hoare triple {69437#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {69323#true} is VALID [2022-02-20 22:07:30,829 INFO L290 TraceCheckUtils]: 1: Hoare triple {69323#true} assume !(0 != ~tmp___0~2);call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size);~tmp~4.base, ~tmp~4.offset := #t~malloc63.base, #t~malloc63.offset;havoc #t~malloc63.base, #t~malloc63.offset;~p~0.base, ~p~0.offset := ~tmp~4.base, ~tmp~4.offset; {69323#true} is VALID [2022-02-20 22:07:30,829 INFO L272 TraceCheckUtils]: 2: Hoare triple {69323#true} call assume_abort_if_not((if 0 != (~p~0.base + ~p~0.offset) % 18446744073709551616 then 1 else 0)); {69323#true} is VALID [2022-02-20 22:07:30,829 INFO L290 TraceCheckUtils]: 3: Hoare triple {69323#true} ~cond := #in~cond; {69323#true} is VALID [2022-02-20 22:07:30,829 INFO L290 TraceCheckUtils]: 4: Hoare triple {69323#true} assume !(0 == ~cond); {69323#true} is VALID [2022-02-20 22:07:30,829 INFO L290 TraceCheckUtils]: 5: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,829 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {69323#true} {69323#true} #551#return; {69323#true} is VALID [2022-02-20 22:07:30,830 INFO L290 TraceCheckUtils]: 7: Hoare triple {69323#true} #res.base, #res.offset := ~p~0.base, ~p~0.offset; {69323#true} is VALID [2022-02-20 22:07:30,830 INFO L290 TraceCheckUtils]: 8: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,830 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {69323#true} {69339#(= ~ref_cnt~0 0)} #555#return; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,830 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 82 [2022-02-20 22:07:30,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:30,833 INFO L290 TraceCheckUtils]: 0: Hoare triple {69323#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {69323#true} is VALID [2022-02-20 22:07:30,833 INFO L290 TraceCheckUtils]: 1: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,834 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {69323#true} {69339#(= ~ref_cnt~0 0)} #563#return; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,834 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 88 [2022-02-20 22:07:30,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:30,838 INFO L290 TraceCheckUtils]: 0: Hoare triple {69323#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {69323#true} is VALID [2022-02-20 22:07:30,838 INFO L290 TraceCheckUtils]: 1: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,839 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {69323#true} {69339#(= ~ref_cnt~0 0)} #567#return; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,839 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 95 [2022-02-20 22:07:30,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:30,844 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:30,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:30,847 INFO L290 TraceCheckUtils]: 0: Hoare triple {69437#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {69323#true} is VALID [2022-02-20 22:07:30,847 INFO L290 TraceCheckUtils]: 1: Hoare triple {69323#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {69323#true} is VALID [2022-02-20 22:07:30,847 INFO L290 TraceCheckUtils]: 2: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,847 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {69323#true} {69323#true} #539#return; {69323#true} is VALID [2022-02-20 22:07:30,847 INFO L290 TraceCheckUtils]: 0: Hoare triple {69437#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {69323#true} is VALID [2022-02-20 22:07:30,848 INFO L272 TraceCheckUtils]: 1: Hoare triple {69323#true} call __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset := ldv_malloc(__kmalloc_~size#1); {69437#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:30,848 INFO L290 TraceCheckUtils]: 2: Hoare triple {69437#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {69323#true} is VALID [2022-02-20 22:07:30,848 INFO L290 TraceCheckUtils]: 3: Hoare triple {69323#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {69323#true} is VALID [2022-02-20 22:07:30,848 INFO L290 TraceCheckUtils]: 4: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,848 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {69323#true} {69323#true} #539#return; {69323#true} is VALID [2022-02-20 22:07:30,848 INFO L290 TraceCheckUtils]: 6: Hoare triple {69323#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset; {69323#true} is VALID [2022-02-20 22:07:30,848 INFO L290 TraceCheckUtils]: 7: Hoare triple {69323#true} kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {69323#true} is VALID [2022-02-20 22:07:30,848 INFO L290 TraceCheckUtils]: 8: Hoare triple {69323#true} #t~ret58#1.base, #t~ret58#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret58#1.base, #t~ret58#1.offset;havoc #t~ret58#1.base, #t~ret58#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {69323#true} is VALID [2022-02-20 22:07:30,849 INFO L290 TraceCheckUtils]: 9: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,849 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {69323#true} {69339#(= ~ref_cnt~0 0)} #569#return; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,849 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 108 [2022-02-20 22:07:30,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:30,855 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:30,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:30,858 INFO L290 TraceCheckUtils]: 0: Hoare triple {69437#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {69323#true} is VALID [2022-02-20 22:07:30,858 INFO L290 TraceCheckUtils]: 1: Hoare triple {69323#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {69323#true} is VALID [2022-02-20 22:07:30,858 INFO L290 TraceCheckUtils]: 2: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,858 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {69323#true} {69323#true} #539#return; {69323#true} is VALID [2022-02-20 22:07:30,858 INFO L290 TraceCheckUtils]: 0: Hoare triple {69437#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {69323#true} is VALID [2022-02-20 22:07:30,859 INFO L272 TraceCheckUtils]: 1: Hoare triple {69323#true} call __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset := ldv_malloc(__kmalloc_~size#1); {69437#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:30,859 INFO L290 TraceCheckUtils]: 2: Hoare triple {69437#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {69323#true} is VALID [2022-02-20 22:07:30,859 INFO L290 TraceCheckUtils]: 3: Hoare triple {69323#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {69323#true} is VALID [2022-02-20 22:07:30,859 INFO L290 TraceCheckUtils]: 4: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,859 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {69323#true} {69323#true} #539#return; {69323#true} is VALID [2022-02-20 22:07:30,859 INFO L290 TraceCheckUtils]: 6: Hoare triple {69323#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset; {69323#true} is VALID [2022-02-20 22:07:30,859 INFO L290 TraceCheckUtils]: 7: Hoare triple {69323#true} kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {69323#true} is VALID [2022-02-20 22:07:30,859 INFO L290 TraceCheckUtils]: 8: Hoare triple {69323#true} #t~ret58#1.base, #t~ret58#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret58#1.base, #t~ret58#1.offset;havoc #t~ret58#1.base, #t~ret58#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {69323#true} is VALID [2022-02-20 22:07:30,860 INFO L290 TraceCheckUtils]: 9: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,860 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {69323#true} {69339#(= ~ref_cnt~0 0)} #571#return; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,860 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 123 [2022-02-20 22:07:30,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:30,867 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 22:07:30,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:30,869 INFO L290 TraceCheckUtils]: 0: Hoare triple {69323#true} ~cond := #in~cond; {69323#true} is VALID [2022-02-20 22:07:30,869 INFO L290 TraceCheckUtils]: 1: Hoare triple {69323#true} assume !(0 == ~cond); {69323#true} is VALID [2022-02-20 22:07:30,870 INFO L290 TraceCheckUtils]: 2: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,870 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {69323#true} {69323#true} #551#return; {69323#true} is VALID [2022-02-20 22:07:30,870 INFO L290 TraceCheckUtils]: 0: Hoare triple {69437#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {69323#true} is VALID [2022-02-20 22:07:30,870 INFO L290 TraceCheckUtils]: 1: Hoare triple {69323#true} assume !(0 != ~tmp___0~2);call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size);~tmp~4.base, ~tmp~4.offset := #t~malloc63.base, #t~malloc63.offset;havoc #t~malloc63.base, #t~malloc63.offset;~p~0.base, ~p~0.offset := ~tmp~4.base, ~tmp~4.offset; {69323#true} is VALID [2022-02-20 22:07:30,870 INFO L272 TraceCheckUtils]: 2: Hoare triple {69323#true} call assume_abort_if_not((if 0 != (~p~0.base + ~p~0.offset) % 18446744073709551616 then 1 else 0)); {69323#true} is VALID [2022-02-20 22:07:30,870 INFO L290 TraceCheckUtils]: 3: Hoare triple {69323#true} ~cond := #in~cond; {69323#true} is VALID [2022-02-20 22:07:30,870 INFO L290 TraceCheckUtils]: 4: Hoare triple {69323#true} assume !(0 == ~cond); {69323#true} is VALID [2022-02-20 22:07:30,870 INFO L290 TraceCheckUtils]: 5: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,871 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {69323#true} {69323#true} #551#return; {69323#true} is VALID [2022-02-20 22:07:30,871 INFO L290 TraceCheckUtils]: 7: Hoare triple {69323#true} #res.base, #res.offset := ~p~0.base, ~p~0.offset; {69323#true} is VALID [2022-02-20 22:07:30,871 INFO L290 TraceCheckUtils]: 8: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,871 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {69323#true} {69339#(= ~ref_cnt~0 0)} #573#return; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,871 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 137 [2022-02-20 22:07:30,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:30,876 INFO L290 TraceCheckUtils]: 0: Hoare triple {69437#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {69323#true} is VALID [2022-02-20 22:07:30,876 INFO L290 TraceCheckUtils]: 1: Hoare triple {69323#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {69323#true} is VALID [2022-02-20 22:07:30,876 INFO L290 TraceCheckUtils]: 2: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,876 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {69323#true} {69339#(= ~ref_cnt~0 0)} #575#return; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,876 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 155 [2022-02-20 22:07:30,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:30,881 INFO L290 TraceCheckUtils]: 0: Hoare triple {69323#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1.base, ~arg1.offset := #in~arg1.base, #in~arg1.offset;~arg2 := #in~arg2;#res := #t~nondet213;havoc #t~nondet213; {69323#true} is VALID [2022-02-20 22:07:30,881 INFO L290 TraceCheckUtils]: 1: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,881 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {69323#true} {69339#(= ~ref_cnt~0 0)} #581#return; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,881 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 169 [2022-02-20 22:07:30,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:30,886 INFO L290 TraceCheckUtils]: 0: Hoare triple {69437#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {69323#true} is VALID [2022-02-20 22:07:30,886 INFO L290 TraceCheckUtils]: 1: Hoare triple {69323#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {69323#true} is VALID [2022-02-20 22:07:30,886 INFO L290 TraceCheckUtils]: 2: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,887 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {69323#true} {69339#(= ~ref_cnt~0 0)} #595#return; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,887 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 176 [2022-02-20 22:07:30,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:30,895 INFO L290 TraceCheckUtils]: 0: Hoare triple {69323#true} havoc ~tmp~8;assume -2147483648 <= #t~nondet68 && #t~nondet68 <= 2147483647;~tmp~8 := #t~nondet68;havoc #t~nondet68;#res := ~tmp~8; {69323#true} is VALID [2022-02-20 22:07:30,895 INFO L290 TraceCheckUtils]: 1: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,896 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {69323#true} {69339#(= ~ref_cnt~0 0)} #599#return; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,901 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 186 [2022-02-20 22:07:30,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:30,905 INFO L290 TraceCheckUtils]: 0: Hoare triple {69454#(and (= ~usb_intfdata~0.offset |old(~usb_intfdata~0.offset)|) (= ~usb_intfdata~0.base |old(~usb_intfdata~0.base)|))} ~intf#1.base, ~intf#1.offset := #in~intf#1.base, #in~intf#1.offset;~data#1.base, ~data#1.offset := #in~data#1.base, #in~data#1.offset;assume { :begin_inline_ldv_usb_set_intfdata } true;ldv_usb_set_intfdata_#in~data#1.base, ldv_usb_set_intfdata_#in~data#1.offset := ~data#1.base, ~data#1.offset;havoc ldv_usb_set_intfdata_~data#1.base, ldv_usb_set_intfdata_~data#1.offset;ldv_usb_set_intfdata_~data#1.base, ldv_usb_set_intfdata_~data#1.offset := ldv_usb_set_intfdata_#in~data#1.base, ldv_usb_set_intfdata_#in~data#1.offset;~usb_intfdata~0.base, ~usb_intfdata~0.offset := ldv_usb_set_intfdata_~data#1.base, ldv_usb_set_intfdata_~data#1.offset; {69323#true} is VALID [2022-02-20 22:07:30,905 INFO L290 TraceCheckUtils]: 1: Hoare triple {69323#true} assume { :end_inline_ldv_usb_set_intfdata } true; {69323#true} is VALID [2022-02-20 22:07:30,906 INFO L290 TraceCheckUtils]: 2: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,906 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {69323#true} {69339#(= ~ref_cnt~0 0)} #601#return; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,906 INFO L290 TraceCheckUtils]: 0: Hoare triple {69323#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(99, 2);call #Ultimate.allocInit(10, 3);call #Ultimate.allocInit(7, 4);call write~init~int(97, 4, 0, 1);call write~init~int(99, 4, 1, 1);call write~init~int(101, 4, 2, 1);call write~init~int(99, 4, 3, 1);call write~init~int(97, 4, 4, 1);call write~init~int(100, 4, 5, 1);call write~init~int(0, 4, 6, 1);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(20, 6);call #Ultimate.allocInit(57, 7);call #Ultimate.allocInit(2, 8);call write~init~int(32, 8, 0, 1);call write~init~int(0, 8, 1, 1);call #Ultimate.allocInit(8, 9);call #Ultimate.allocInit(34, 10);call #Ultimate.allocInit(32, 11);call #Ultimate.allocInit(11, 12);call #Ultimate.allocInit(48, 13);~LDV_IN_INTERRUPT~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset := 14, 0;call #Ultimate.allocInit(72, 14);call write~init~int(3, ~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 2 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(4, ~#usb_acecad_id_table~0.base, 4 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 6 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 8 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 10 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 11 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 12 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 13 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 14 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 15 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 16 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(3, ~#usb_acecad_id_table~0.base, 24 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 26 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(8, ~#usb_acecad_id_table~0.base, 28 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 30 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 32 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 34 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 35 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 36 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 37 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 38 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 39 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(1, ~#usb_acecad_id_table~0.base, 40 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(0, ~#usb_acecad_id_table~0.base, 48 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 50 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 52 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 54 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 56 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 58 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 59 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 60 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 61 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 62 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 63 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 64 + ~#usb_acecad_id_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.driver_info := 0;~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset := 15, 0;call #Ultimate.allocInit(264, 15);call write~init~$Pointer$(12, 0, ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_probe.base, #funAddr~usb_acecad_probe.offset, ~#usb_acecad_driver~0.base, 8 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_disconnect.base, #funAddr~usb_acecad_disconnect.offset, ~#usb_acecad_driver~0.base, 16 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 24 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 32 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 40 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 48 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 56 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 64 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, ~#usb_acecad_driver~0.base, 72 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 80 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 84 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 88 + ~#usb_acecad_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 92 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 100 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 108 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 116 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 124 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 132 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 136 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 144 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 152 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 160 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 168 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 176 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 184 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 192 + ~#usb_acecad_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 193 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 201 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 209 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 217 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 225 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 233 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 241 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 249 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 257 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 261 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 262 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 263 + ~#usb_acecad_driver~0.offset, 1);~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~URB_STATE~0 := 0;~DEV_STATE~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~int_urb~0.base, ~int_urb~0.offset := 0, 0;~bulk_urb~0.base, ~bulk_urb~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {69323#true} is VALID [2022-02-20 22:07:30,907 INFO L290 TraceCheckUtils]: 1: Hoare triple {69323#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret186#1.base, main_#t~ret186#1.offset, main_#t~nondet187#1, main_#t~switch188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~ret191#1, main_#t~nondet192#1, main_#t~switch193#1, main_#t~ret194#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~17#1.base, main_~tmp~17#1.offset, main_~tmp___0~6#1, main_~tmp___1~3#1, main_~tmp___2~1#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~17#1.base, main_~tmp~17#1.offset;havoc main_~tmp___0~6#1;havoc main_~tmp___1~3#1;havoc main_~tmp___2~1#1; {69323#true} is VALID [2022-02-20 22:07:30,907 INFO L272 TraceCheckUtils]: 2: Hoare triple {69323#true} call main_#t~ret186#1.base, main_#t~ret186#1.offset := ldv_init_zalloc(24); {69421#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:30,907 INFO L290 TraceCheckUtils]: 3: Hoare triple {69421#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {69323#true} is VALID [2022-02-20 22:07:30,908 INFO L272 TraceCheckUtils]: 4: Hoare triple {69323#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {69429#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:30,908 INFO L290 TraceCheckUtils]: 5: Hoare triple {69429#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {69323#true} is VALID [2022-02-20 22:07:30,908 INFO L290 TraceCheckUtils]: 6: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,908 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {69323#true} {69323#true} #547#return; {69323#true} is VALID [2022-02-20 22:07:30,908 INFO L290 TraceCheckUtils]: 8: Hoare triple {69323#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {69323#true} is VALID [2022-02-20 22:07:30,908 INFO L272 TraceCheckUtils]: 9: Hoare triple {69323#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {69323#true} is VALID [2022-02-20 22:07:30,908 INFO L290 TraceCheckUtils]: 10: Hoare triple {69323#true} ~cond := #in~cond; {69323#true} is VALID [2022-02-20 22:07:30,909 INFO L290 TraceCheckUtils]: 11: Hoare triple {69323#true} assume !(0 == ~cond); {69323#true} is VALID [2022-02-20 22:07:30,909 INFO L290 TraceCheckUtils]: 12: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,909 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {69323#true} {69323#true} #549#return; {69323#true} is VALID [2022-02-20 22:07:30,909 INFO L290 TraceCheckUtils]: 14: Hoare triple {69323#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {69323#true} is VALID [2022-02-20 22:07:30,909 INFO L290 TraceCheckUtils]: 15: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,909 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {69323#true} {69323#true} #553#return; {69323#true} is VALID [2022-02-20 22:07:30,909 INFO L290 TraceCheckUtils]: 17: Hoare triple {69323#true} main_~tmp~17#1.base, main_~tmp~17#1.offset := main_#t~ret186#1.base, main_#t~ret186#1.offset;havoc main_#t~ret186#1.base, main_#t~ret186#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~17#1.base, main_~tmp~17#1.offset;assume { :begin_inline_ldv_initialize } true; {69323#true} is VALID [2022-02-20 22:07:30,910 INFO L290 TraceCheckUtils]: 18: Hoare triple {69323#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,910 INFO L290 TraceCheckUtils]: 19: Hoare triple {69339#(= ~ref_cnt~0 0)} assume -2147483648 <= main_#t~nondet187#1 && main_#t~nondet187#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet187#1;havoc main_#t~nondet187#1;main_#t~switch188#1 := 0 == main_~tmp___0~6#1; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,910 INFO L290 TraceCheckUtils]: 20: Hoare triple {69339#(= ~ref_cnt~0 0)} assume !main_#t~switch188#1;main_#t~switch188#1 := main_#t~switch188#1 || 1 == main_~tmp___0~6#1; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,910 INFO L290 TraceCheckUtils]: 21: Hoare triple {69339#(= ~ref_cnt~0 0)} assume main_#t~switch188#1; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,911 INFO L290 TraceCheckUtils]: 22: Hoare triple {69339#(= ~ref_cnt~0 0)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet192#1 && main_#t~nondet192#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet192#1;havoc main_#t~nondet192#1;main_#t~switch193#1 := 0 == main_~tmp___2~1#1; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,911 INFO L290 TraceCheckUtils]: 23: Hoare triple {69339#(= ~ref_cnt~0 0)} assume !main_#t~switch193#1;main_#t~switch193#1 := main_#t~switch193#1 || 1 == main_~tmp___2~1#1; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,911 INFO L290 TraceCheckUtils]: 24: Hoare triple {69339#(= ~ref_cnt~0 0)} assume main_#t~switch193#1; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,911 INFO L290 TraceCheckUtils]: 25: Hoare triple {69339#(= ~ref_cnt~0 0)} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_usb_acecad_init } true;havoc usb_acecad_init_#res#1;havoc usb_acecad_init_#t~ret183#1, usb_acecad_init_#t~nondet184#1, usb_acecad_init_~result~0#1, usb_acecad_init_~tmp~15#1;havoc usb_acecad_init_~result~0#1;havoc usb_acecad_init_~tmp~15#1;assume { :begin_inline_usb_register } true;usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc usb_register_#res#1;havoc usb_register_#t~ret31#1, usb_register_~driver#1.base, usb_register_~driver#1.offset, usb_register_~tmp~1#1;usb_register_~driver#1.base, usb_register_~driver#1.offset := usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset;havoc usb_register_~tmp~1#1;assume { :begin_inline_ldv_usb_register_driver_2 } true;ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset := usb_register_~driver#1.base, usb_register_~driver#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 4, 0;havoc ldv_usb_register_driver_2_#res#1;havoc ldv_usb_register_driver_2_#t~ret196#1, ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset, ldv_usb_register_driver_2_~ldv_func_res~0#1, ldv_usb_register_driver_2_~tmp~19#1;ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_2_~ldv_func_res~0#1;havoc ldv_usb_register_driver_2_~tmp~19#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet217#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet217#1 && usb_register_driver_#t~nondet217#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet217#1;havoc usb_register_driver_#t~nondet217#1; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,912 INFO L290 TraceCheckUtils]: 26: Hoare triple {69339#(= ~ref_cnt~0 0)} ldv_usb_register_driver_2_#t~ret196#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_2_#t~ret196#1 && ldv_usb_register_driver_2_#t~ret196#1 <= 2147483647;ldv_usb_register_driver_2_~tmp~19#1 := ldv_usb_register_driver_2_#t~ret196#1;havoc ldv_usb_register_driver_2_#t~ret196#1;ldv_usb_register_driver_2_~ldv_func_res~0#1 := ldv_usb_register_driver_2_~tmp~19#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset, ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset;havoc ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,912 INFO L272 TraceCheckUtils]: 27: Hoare triple {69339#(= ~ref_cnt~0 0)} call ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset := ldv_init_zalloc(1248); {69421#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:30,912 INFO L290 TraceCheckUtils]: 28: Hoare triple {69421#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {69323#true} is VALID [2022-02-20 22:07:30,913 INFO L272 TraceCheckUtils]: 29: Hoare triple {69323#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {69429#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:30,913 INFO L290 TraceCheckUtils]: 30: Hoare triple {69429#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {69323#true} is VALID [2022-02-20 22:07:30,913 INFO L290 TraceCheckUtils]: 31: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,913 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {69323#true} {69323#true} #547#return; {69323#true} is VALID [2022-02-20 22:07:30,913 INFO L290 TraceCheckUtils]: 33: Hoare triple {69323#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {69323#true} is VALID [2022-02-20 22:07:30,913 INFO L272 TraceCheckUtils]: 34: Hoare triple {69323#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {69323#true} is VALID [2022-02-20 22:07:30,914 INFO L290 TraceCheckUtils]: 35: Hoare triple {69323#true} ~cond := #in~cond; {69323#true} is VALID [2022-02-20 22:07:30,914 INFO L290 TraceCheckUtils]: 36: Hoare triple {69323#true} assume !(0 == ~cond); {69323#true} is VALID [2022-02-20 22:07:30,914 INFO L290 TraceCheckUtils]: 37: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,914 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {69323#true} {69323#true} #549#return; {69323#true} is VALID [2022-02-20 22:07:30,914 INFO L290 TraceCheckUtils]: 39: Hoare triple {69323#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {69323#true} is VALID [2022-02-20 22:07:30,914 INFO L290 TraceCheckUtils]: 40: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,915 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {69323#true} {69339#(= ~ref_cnt~0 0)} #611#return; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,915 INFO L290 TraceCheckUtils]: 42: Hoare triple {69339#(= ~ref_cnt~0 0)} ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset := ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset;havoc ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,915 INFO L290 TraceCheckUtils]: 43: Hoare triple {69339#(= ~ref_cnt~0 0)} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_2_#res#1 := ldv_usb_register_driver_2_~ldv_func_res~0#1; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,915 INFO L290 TraceCheckUtils]: 44: Hoare triple {69339#(= ~ref_cnt~0 0)} usb_register_#t~ret31#1 := ldv_usb_register_driver_2_#res#1;assume { :end_inline_ldv_usb_register_driver_2 } true;assume -2147483648 <= usb_register_#t~ret31#1 && usb_register_#t~ret31#1 <= 2147483647;usb_register_~tmp~1#1 := usb_register_#t~ret31#1;havoc usb_register_#t~ret31#1;usb_register_#res#1 := usb_register_~tmp~1#1; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,916 INFO L290 TraceCheckUtils]: 45: Hoare triple {69339#(= ~ref_cnt~0 0)} usb_acecad_init_#t~ret183#1 := usb_register_#res#1;assume { :end_inline_usb_register } true;assume -2147483648 <= usb_acecad_init_#t~ret183#1 && usb_acecad_init_#t~ret183#1 <= 2147483647;usb_acecad_init_~tmp~15#1 := usb_acecad_init_#t~ret183#1;havoc usb_acecad_init_#t~ret183#1;usb_acecad_init_~result~0#1 := usb_acecad_init_~tmp~15#1; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,916 INFO L290 TraceCheckUtils]: 46: Hoare triple {69339#(= ~ref_cnt~0 0)} assume 0 == usb_acecad_init_~result~0#1;havoc usb_acecad_init_#t~nondet184#1; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,916 INFO L290 TraceCheckUtils]: 47: Hoare triple {69339#(= ~ref_cnt~0 0)} usb_acecad_init_#res#1 := usb_acecad_init_~result~0#1; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,916 INFO L290 TraceCheckUtils]: 48: Hoare triple {69339#(= ~ref_cnt~0 0)} main_#t~ret194#1 := usb_acecad_init_#res#1;assume { :end_inline_usb_acecad_init } true;assume -2147483648 <= main_#t~ret194#1 && main_#t~ret194#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret194#1;havoc main_#t~ret194#1; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,917 INFO L290 TraceCheckUtils]: 49: Hoare triple {69339#(= ~ref_cnt~0 0)} assume 0 == ~ldv_retval_1~0;~ldv_state_variable_0~0 := 3; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,917 INFO L290 TraceCheckUtils]: 50: Hoare triple {69339#(= ~ref_cnt~0 0)} assume !(0 != ~ldv_retval_1~0); {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,917 INFO L290 TraceCheckUtils]: 51: Hoare triple {69339#(= ~ref_cnt~0 0)} assume -2147483648 <= main_#t~nondet187#1 && main_#t~nondet187#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet187#1;havoc main_#t~nondet187#1;main_#t~switch188#1 := 0 == main_~tmp___0~6#1; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,917 INFO L290 TraceCheckUtils]: 52: Hoare triple {69339#(= ~ref_cnt~0 0)} assume main_#t~switch188#1; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,918 INFO L290 TraceCheckUtils]: 53: Hoare triple {69339#(= ~ref_cnt~0 0)} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= main_#t~nondet189#1 && main_#t~nondet189#1 <= 2147483647;main_~tmp___1~3#1 := main_#t~nondet189#1;havoc main_#t~nondet189#1;main_#t~switch190#1 := 0 == main_~tmp___1~3#1; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,918 INFO L290 TraceCheckUtils]: 54: Hoare triple {69339#(= ~ref_cnt~0 0)} assume main_#t~switch190#1; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,918 INFO L290 TraceCheckUtils]: 55: Hoare triple {69339#(= ~ref_cnt~0 0)} assume 1 == ~ldv_state_variable_1~0;assume { :begin_inline_usb_acecad_probe } true;usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset, usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset := ~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc usb_acecad_probe_#res#1;havoc usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset, usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset, usb_acecad_probe_#t~mem132#1, usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset, usb_acecad_probe_#t~ret134#1, usb_acecad_probe_#t~mem135#1, usb_acecad_probe_#t~ret136#1, usb_acecad_probe_#t~ret137#1, usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset, usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset, usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset, usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset, usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset, usb_acecad_probe_#t~mem143#1.base, usb_acecad_probe_#t~mem143#1.offset, usb_acecad_probe_#t~mem144#1.base, usb_acecad_probe_#t~mem144#1.offset, usb_acecad_probe_#t~mem145#1.base, usb_acecad_probe_#t~mem145#1.offset, usb_acecad_probe_#t~ret146#1, usb_acecad_probe_#t~mem147#1.base, usb_acecad_probe_#t~mem147#1.offset, usb_acecad_probe_#t~mem148#1.base, usb_acecad_probe_#t~mem148#1.offset, usb_acecad_probe_#t~ret149#1, usb_acecad_probe_#t~mem150#1.base, usb_acecad_probe_#t~mem150#1.offset, usb_acecad_probe_#t~ret151#1, usb_acecad_probe_#t~ret152#1, usb_acecad_probe_#t~ret153#1, usb_acecad_probe_#t~mem154#1, usb_acecad_probe_#t~switch155#1, usb_acecad_probe_#t~nondet156#1, usb_acecad_probe_#t~nondet157#1, usb_acecad_probe_#t~mem158#1, usb_acecad_probe_#t~mem159#1, usb_acecad_probe_#t~nondet160#1, usb_acecad_probe_#t~nondet161#1, usb_acecad_probe_#t~mem162#1, usb_acecad_probe_#t~mem163#1, usb_acecad_probe_#t~mem164#1.base, usb_acecad_probe_#t~mem164#1.offset, usb_acecad_probe_#t~mem165#1.base, usb_acecad_probe_#t~mem165#1.offset, usb_acecad_probe_#t~ite166#1, usb_acecad_probe_#t~mem167#1, usb_acecad_probe_#t~mem168#1.base, usb_acecad_probe_#t~mem168#1.offset, usb_acecad_probe_#t~mem169#1, usb_acecad_probe_#t~mem170#1.base, usb_acecad_probe_#t~mem170#1.offset, usb_acecad_probe_#t~mem171#1.base, usb_acecad_probe_#t~mem171#1.offset, usb_acecad_probe_#t~mem172#1, usb_acecad_probe_#t~mem173#1.base, usb_acecad_probe_#t~mem173#1.offset, usb_acecad_probe_#t~ret174#1, usb_acecad_probe_#t~mem175#1.base, usb_acecad_probe_#t~mem175#1.offset, usb_acecad_probe_#t~mem176#1, usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset, usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset, usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset, usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset, usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset, usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset, usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset, usb_acecad_probe_~pipe~0#1, usb_acecad_probe_~maxp~0#1, usb_acecad_probe_~err~0#1, usb_acecad_probe_~tmp___0~5#1, usb_acecad_probe_~tmp___1~2#1, usb_acecad_probe_~tmp___2~0#1, usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset, usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~tmp___5~0#1, usb_acecad_probe_~tmp___6~0#1;usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset := usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset;usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset := usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset;havoc usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset;havoc usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;havoc usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset;havoc usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset;havoc usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset;havoc usb_acecad_probe_~pipe~0#1;havoc usb_acecad_probe_~maxp~0#1;havoc usb_acecad_probe_~err~0#1;havoc usb_acecad_probe_~tmp___0~5#1;havoc usb_acecad_probe_~tmp___1~2#1;havoc usb_acecad_probe_~tmp___2~0#1;havoc usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;havoc usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset;havoc usb_acecad_probe_~tmp___5~0#1;havoc usb_acecad_probe_~tmp___6~0#1;assume { :begin_inline_interface_to_usbdev } true;interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset := usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset;havoc interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;havoc interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset, interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset, interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset := interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset;havoc interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;assume { :begin_inline_ldv_interface_to_usbdev } true;havoc ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;havoc ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset, ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset;havoc ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,919 INFO L272 TraceCheckUtils]: 56: Hoare triple {69339#(= ~ref_cnt~0 0)} call ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset := ldv_malloc(1822); {69437#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:30,919 INFO L290 TraceCheckUtils]: 57: Hoare triple {69437#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {69323#true} is VALID [2022-02-20 22:07:30,919 INFO L290 TraceCheckUtils]: 58: Hoare triple {69323#true} assume !(0 != ~tmp___0~2);call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size);~tmp~4.base, ~tmp~4.offset := #t~malloc63.base, #t~malloc63.offset;havoc #t~malloc63.base, #t~malloc63.offset;~p~0.base, ~p~0.offset := ~tmp~4.base, ~tmp~4.offset; {69323#true} is VALID [2022-02-20 22:07:30,919 INFO L272 TraceCheckUtils]: 59: Hoare triple {69323#true} call assume_abort_if_not((if 0 != (~p~0.base + ~p~0.offset) % 18446744073709551616 then 1 else 0)); {69323#true} is VALID [2022-02-20 22:07:30,919 INFO L290 TraceCheckUtils]: 60: Hoare triple {69323#true} ~cond := #in~cond; {69323#true} is VALID [2022-02-20 22:07:30,919 INFO L290 TraceCheckUtils]: 61: Hoare triple {69323#true} assume !(0 == ~cond); {69323#true} is VALID [2022-02-20 22:07:30,920 INFO L290 TraceCheckUtils]: 62: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,920 INFO L284 TraceCheckUtils]: 63: Hoare quadruple {69323#true} {69323#true} #551#return; {69323#true} is VALID [2022-02-20 22:07:30,920 INFO L290 TraceCheckUtils]: 64: Hoare triple {69323#true} #res.base, #res.offset := ~p~0.base, ~p~0.offset; {69323#true} is VALID [2022-02-20 22:07:30,920 INFO L290 TraceCheckUtils]: 65: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,920 INFO L284 TraceCheckUtils]: 66: Hoare quadruple {69323#true} {69339#(= ~ref_cnt~0 0)} #555#return; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,921 INFO L290 TraceCheckUtils]: 67: Hoare triple {69339#(= ~ref_cnt~0 0)} ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset := ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset;havoc ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,921 INFO L290 TraceCheckUtils]: 68: Hoare triple {69339#(= ~ref_cnt~0 0)} assume !(0 == (ldv_interface_to_usbdev_~result~1#1.base + ldv_interface_to_usbdev_~result~1#1.offset) % 18446744073709551616);ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset := ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,921 INFO L290 TraceCheckUtils]: 69: Hoare triple {69339#(= ~ref_cnt~0 0)} interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset := ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;assume { :end_inline_ldv_interface_to_usbdev } true;interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset := interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset;havoc interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset;interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset := interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,921 INFO L290 TraceCheckUtils]: 70: Hoare triple {69339#(= ~ref_cnt~0 0)} usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset := interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;assume { :end_inline_interface_to_usbdev } true;usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset := usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset;havoc usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset;usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset := usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;call usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset := read~$Pointer$(usb_acecad_probe_~intf#1.base, 8 + usb_acecad_probe_~intf#1.offset, 8);usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset := usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset;havoc usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset;call usb_acecad_probe_#t~mem132#1 := read~int(usb_acecad_probe_~interface~0#1.base, 4 + usb_acecad_probe_~interface~0#1.offset, 1); {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,922 INFO L290 TraceCheckUtils]: 71: Hoare triple {69339#(= ~ref_cnt~0 0)} assume !(1 != usb_acecad_probe_#t~mem132#1 % 256 % 4294967296);havoc usb_acecad_probe_#t~mem132#1;call usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset := read~$Pointer$(usb_acecad_probe_~interface~0#1.base, 9 + usb_acecad_probe_~interface~0#1.offset, 8);usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset := usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset;havoc usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset;assume { :begin_inline_usb_endpoint_is_int_in } true;usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset := usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_endpoint_is_int_in_#res#1;havoc usb_endpoint_is_int_in_#t~ret3#1, usb_endpoint_is_int_in_#t~ret4#1, usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset, usb_endpoint_is_int_in_~tmp~0#1, usb_endpoint_is_int_in_~tmp___0~0#1, usb_endpoint_is_int_in_~tmp___1~0#1;usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset := usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset;havoc usb_endpoint_is_int_in_~tmp~0#1;havoc usb_endpoint_is_int_in_~tmp___0~0#1;havoc usb_endpoint_is_int_in_~tmp___1~0#1;assume { :begin_inline_usb_endpoint_xfer_int } true;usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset := usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset;havoc usb_endpoint_xfer_int_#res#1;havoc usb_endpoint_xfer_int_#t~mem2#1, usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset;usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset := usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset;call usb_endpoint_xfer_int_#t~mem2#1 := read~int(usb_endpoint_xfer_int_~epd#1.base, 3 + usb_endpoint_xfer_int_~epd#1.offset, 1);usb_endpoint_xfer_int_#res#1 := (if 3 == (if 0 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 0 else (if 1 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 1 else ~bitwiseAnd(usb_endpoint_xfer_int_#t~mem2#1 % 256, 3))) then 1 else 0);havoc usb_endpoint_xfer_int_#t~mem2#1; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,922 INFO L290 TraceCheckUtils]: 72: Hoare triple {69339#(= ~ref_cnt~0 0)} usb_endpoint_is_int_in_#t~ret3#1 := usb_endpoint_xfer_int_#res#1;assume { :end_inline_usb_endpoint_xfer_int } true;assume -2147483648 <= usb_endpoint_is_int_in_#t~ret3#1 && usb_endpoint_is_int_in_#t~ret3#1 <= 2147483647;usb_endpoint_is_int_in_~tmp~0#1 := usb_endpoint_is_int_in_#t~ret3#1;havoc usb_endpoint_is_int_in_#t~ret3#1; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,922 INFO L290 TraceCheckUtils]: 73: Hoare triple {69339#(= ~ref_cnt~0 0)} assume 0 != usb_endpoint_is_int_in_~tmp~0#1;assume { :begin_inline_usb_endpoint_dir_in } true;usb_endpoint_dir_in_#in~epd#1.base, usb_endpoint_dir_in_#in~epd#1.offset := usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset;havoc usb_endpoint_dir_in_#res#1;havoc usb_endpoint_dir_in_#t~mem1#1, usb_endpoint_dir_in_~epd#1.base, usb_endpoint_dir_in_~epd#1.offset;usb_endpoint_dir_in_~epd#1.base, usb_endpoint_dir_in_~epd#1.offset := usb_endpoint_dir_in_#in~epd#1.base, usb_endpoint_dir_in_#in~epd#1.offset;call usb_endpoint_dir_in_#t~mem1#1 := read~int(usb_endpoint_dir_in_~epd#1.base, 2 + usb_endpoint_dir_in_~epd#1.offset, 1);usb_endpoint_dir_in_#res#1 := (if (if usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 <= 127 then usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 else usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 - 256) < 0 then 1 else 0);havoc usb_endpoint_dir_in_#t~mem1#1; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,923 INFO L290 TraceCheckUtils]: 74: Hoare triple {69339#(= ~ref_cnt~0 0)} usb_endpoint_is_int_in_#t~ret4#1 := usb_endpoint_dir_in_#res#1;assume { :end_inline_usb_endpoint_dir_in } true;assume -2147483648 <= usb_endpoint_is_int_in_#t~ret4#1 && usb_endpoint_is_int_in_#t~ret4#1 <= 2147483647;usb_endpoint_is_int_in_~tmp___0~0#1 := usb_endpoint_is_int_in_#t~ret4#1;havoc usb_endpoint_is_int_in_#t~ret4#1; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,923 INFO L290 TraceCheckUtils]: 75: Hoare triple {69339#(= ~ref_cnt~0 0)} assume 0 != usb_endpoint_is_int_in_~tmp___0~0#1;usb_endpoint_is_int_in_~tmp___1~0#1 := 1; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,923 INFO L290 TraceCheckUtils]: 76: Hoare triple {69339#(= ~ref_cnt~0 0)} usb_endpoint_is_int_in_#res#1 := usb_endpoint_is_int_in_~tmp___1~0#1; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,923 INFO L290 TraceCheckUtils]: 77: Hoare triple {69339#(= ~ref_cnt~0 0)} usb_acecad_probe_#t~ret134#1 := usb_endpoint_is_int_in_#res#1;assume { :end_inline_usb_endpoint_is_int_in } true;assume -2147483648 <= usb_acecad_probe_#t~ret134#1 && usb_acecad_probe_#t~ret134#1 <= 2147483647;usb_acecad_probe_~tmp___0~5#1 := usb_acecad_probe_#t~ret134#1;havoc usb_acecad_probe_#t~ret134#1; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,924 INFO L290 TraceCheckUtils]: 78: Hoare triple {69339#(= ~ref_cnt~0 0)} assume !(0 == usb_acecad_probe_~tmp___0~5#1);call usb_acecad_probe_#t~mem135#1 := read~int(usb_acecad_probe_~endpoint~0#1.base, 2 + usb_acecad_probe_~endpoint~0#1.offset, 1);assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_#t~mem135#1 % 256;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem45#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem45#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := (if (1 == 256 * __create_pipe_#t~mem45#1 || 0 == 256 * __create_pipe_#t~mem45#1) && 0 == 32768 * __create_pipe_~endpoint#1 then 256 * __create_pipe_#t~mem45#1 else (if 0 == 256 * __create_pipe_#t~mem45#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1) then 32768 * __create_pipe_~endpoint#1 else (if (1 == 256 * __create_pipe_#t~mem45#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1)) || ((1 == 256 * __create_pipe_#t~mem45#1 || 0 == 256 * __create_pipe_#t~mem45#1) && 1 == 32768 * __create_pipe_~endpoint#1) then 1 else ~bitwiseOr(256 * __create_pipe_#t~mem45#1, 32768 * __create_pipe_~endpoint#1))));havoc __create_pipe_#t~mem45#1; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,924 INFO L290 TraceCheckUtils]: 79: Hoare triple {69339#(= ~ref_cnt~0 0)} usb_acecad_probe_#t~ret136#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;usb_acecad_probe_~tmp___1~2#1 := usb_acecad_probe_#t~ret136#1;havoc usb_acecad_probe_#t~mem135#1;havoc usb_acecad_probe_#t~ret136#1;usb_acecad_probe_~pipe~0#1 := (if ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 else ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 - 4294967296);assume { :begin_inline_usb_maxpacket } true;usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset, usb_maxpacket_#in~pipe#1, usb_maxpacket_#in~is_out#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~pipe~0#1, (if 0 == (if 0 == usb_acecad_probe_~pipe~0#1 then 0 else (if 1 == usb_acecad_probe_~pipe~0#1 then 0 else ~bitwiseAnd(usb_acecad_probe_~pipe~0#1, 128))) then 1 else 0);havoc usb_maxpacket_#res#1;havoc usb_maxpacket_#t~ret47#1, usb_maxpacket_#t~ret48#1, usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset, usb_maxpacket_#t~ret50#1, usb_maxpacket_#t~ret51#1, usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset, usb_maxpacket_#t~mem53#1, usb_maxpacket_#t~nondet46#1, usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset, usb_maxpacket_~pipe#1, usb_maxpacket_~is_out#1, usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset, usb_maxpacket_~epnum~0#1, usb_maxpacket_~__ret_warn_on~0#1, usb_maxpacket_~tmp~2#1, usb_maxpacket_~__ret_warn_on___0~0#1, usb_maxpacket_~tmp___0~1#1;usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset := usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset;usb_maxpacket_~pipe#1 := usb_maxpacket_#in~pipe#1;usb_maxpacket_~is_out#1 := usb_maxpacket_#in~is_out#1;havoc usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset;havoc usb_maxpacket_~epnum~0#1;havoc usb_maxpacket_~__ret_warn_on~0#1;havoc usb_maxpacket_~tmp~2#1;havoc usb_maxpacket_~__ret_warn_on___0~0#1;havoc usb_maxpacket_~tmp___0~1#1; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,924 INFO L290 TraceCheckUtils]: 80: Hoare triple {69339#(= ~ref_cnt~0 0)} assume 0 == usb_maxpacket_~pipe#1 / 32768;usb_maxpacket_~epnum~0#1 := 0; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,925 INFO L290 TraceCheckUtils]: 81: Hoare triple {69339#(= ~ref_cnt~0 0)} assume !(0 != usb_maxpacket_~is_out#1);usb_maxpacket_~__ret_warn_on___0~0#1 := (if 0 == (if 0 == usb_maxpacket_~pipe#1 then 0 else (if 1 == usb_maxpacket_~pipe#1 then 0 else ~bitwiseAnd(usb_maxpacket_~pipe#1, 128))) then 1 else 0); {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,925 INFO L272 TraceCheckUtils]: 82: Hoare triple {69339#(= ~ref_cnt~0 0)} call usb_maxpacket_#t~ret50#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {69323#true} is VALID [2022-02-20 22:07:30,925 INFO L290 TraceCheckUtils]: 83: Hoare triple {69323#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {69323#true} is VALID [2022-02-20 22:07:30,925 INFO L290 TraceCheckUtils]: 84: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,925 INFO L284 TraceCheckUtils]: 85: Hoare quadruple {69323#true} {69339#(= ~ref_cnt~0 0)} #563#return; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,926 INFO L290 TraceCheckUtils]: 86: Hoare triple {69339#(= ~ref_cnt~0 0)} assume -9223372036854775808 <= usb_maxpacket_#t~ret50#1 && usb_maxpacket_#t~ret50#1 <= 9223372036854775807;usb_maxpacket_~tmp___0~1#1 := usb_maxpacket_#t~ret50#1;havoc usb_maxpacket_#t~ret50#1; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,926 INFO L290 TraceCheckUtils]: 87: Hoare triple {69339#(= ~ref_cnt~0 0)} assume !(0 != usb_maxpacket_~tmp___0~1#1); {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,926 INFO L272 TraceCheckUtils]: 88: Hoare triple {69339#(= ~ref_cnt~0 0)} call usb_maxpacket_#t~ret51#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {69323#true} is VALID [2022-02-20 22:07:30,926 INFO L290 TraceCheckUtils]: 89: Hoare triple {69323#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {69323#true} is VALID [2022-02-20 22:07:30,926 INFO L290 TraceCheckUtils]: 90: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,927 INFO L284 TraceCheckUtils]: 91: Hoare quadruple {69323#true} {69339#(= ~ref_cnt~0 0)} #567#return; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,927 INFO L290 TraceCheckUtils]: 92: Hoare triple {69339#(= ~ref_cnt~0 0)} assume -9223372036854775808 <= usb_maxpacket_#t~ret51#1 && usb_maxpacket_#t~ret51#1 <= 9223372036854775807;havoc usb_maxpacket_#t~ret51#1;call usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset := read~$Pointer$(usb_maxpacket_~udev#1.base, 1186 + usb_maxpacket_~udev#1.offset + 8 * (usb_maxpacket_~epnum~0#1 % 4294967296), 8);usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset := usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset;havoc usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,927 INFO L290 TraceCheckUtils]: 93: Hoare triple {69339#(= ~ref_cnt~0 0)} assume 0 == (usb_maxpacket_~ep~0#1.base + usb_maxpacket_~ep~0#1.offset) % 18446744073709551616;usb_maxpacket_#res#1 := 0; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,927 INFO L290 TraceCheckUtils]: 94: Hoare triple {69339#(= ~ref_cnt~0 0)} usb_acecad_probe_#t~ret137#1 := usb_maxpacket_#res#1;assume { :end_inline_usb_maxpacket } true;usb_acecad_probe_~tmp___2~0#1 := usb_acecad_probe_#t~ret137#1;havoc usb_acecad_probe_#t~ret137#1;usb_acecad_probe_~maxp~0#1 := usb_acecad_probe_~tmp___2~0#1 % 65536; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,928 INFO L272 TraceCheckUtils]: 95: Hoare triple {69339#(= ~ref_cnt~0 0)} call usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset := kzalloc(232, 208); {69437#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:30,928 INFO L290 TraceCheckUtils]: 96: Hoare triple {69437#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {69323#true} is VALID [2022-02-20 22:07:30,929 INFO L272 TraceCheckUtils]: 97: Hoare triple {69323#true} call __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset := ldv_malloc(__kmalloc_~size#1); {69437#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:30,929 INFO L290 TraceCheckUtils]: 98: Hoare triple {69437#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {69323#true} is VALID [2022-02-20 22:07:30,929 INFO L290 TraceCheckUtils]: 99: Hoare triple {69323#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {69323#true} is VALID [2022-02-20 22:07:30,929 INFO L290 TraceCheckUtils]: 100: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,929 INFO L284 TraceCheckUtils]: 101: Hoare quadruple {69323#true} {69323#true} #539#return; {69323#true} is VALID [2022-02-20 22:07:30,929 INFO L290 TraceCheckUtils]: 102: Hoare triple {69323#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset; {69323#true} is VALID [2022-02-20 22:07:30,929 INFO L290 TraceCheckUtils]: 103: Hoare triple {69323#true} kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {69323#true} is VALID [2022-02-20 22:07:30,929 INFO L290 TraceCheckUtils]: 104: Hoare triple {69323#true} #t~ret58#1.base, #t~ret58#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret58#1.base, #t~ret58#1.offset;havoc #t~ret58#1.base, #t~ret58#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {69323#true} is VALID [2022-02-20 22:07:30,930 INFO L290 TraceCheckUtils]: 105: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,930 INFO L284 TraceCheckUtils]: 106: Hoare quadruple {69323#true} {69339#(= ~ref_cnt~0 0)} #569#return; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,930 INFO L290 TraceCheckUtils]: 107: Hoare triple {69339#(= ~ref_cnt~0 0)} usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset := usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset;havoc usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset;usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset := usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;assume { :begin_inline_input_allocate_device } true;havoc input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;havoc input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,931 INFO L272 TraceCheckUtils]: 108: Hoare triple {69339#(= ~ref_cnt~0 0)} call input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset := kzalloc(1855, ~bitwiseOr(~bitwiseOr(16, 64), 128)); {69437#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:30,931 INFO L290 TraceCheckUtils]: 109: Hoare triple {69437#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {69323#true} is VALID [2022-02-20 22:07:30,931 INFO L272 TraceCheckUtils]: 110: Hoare triple {69323#true} call __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset := ldv_malloc(__kmalloc_~size#1); {69437#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:30,931 INFO L290 TraceCheckUtils]: 111: Hoare triple {69437#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {69323#true} is VALID [2022-02-20 22:07:30,932 INFO L290 TraceCheckUtils]: 112: Hoare triple {69323#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {69323#true} is VALID [2022-02-20 22:07:30,932 INFO L290 TraceCheckUtils]: 113: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,932 INFO L284 TraceCheckUtils]: 114: Hoare quadruple {69323#true} {69323#true} #539#return; {69323#true} is VALID [2022-02-20 22:07:30,932 INFO L290 TraceCheckUtils]: 115: Hoare triple {69323#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset; {69323#true} is VALID [2022-02-20 22:07:30,932 INFO L290 TraceCheckUtils]: 116: Hoare triple {69323#true} kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {69323#true} is VALID [2022-02-20 22:07:30,932 INFO L290 TraceCheckUtils]: 117: Hoare triple {69323#true} #t~ret58#1.base, #t~ret58#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret58#1.base, #t~ret58#1.offset;havoc #t~ret58#1.base, #t~ret58#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {69323#true} is VALID [2022-02-20 22:07:30,932 INFO L290 TraceCheckUtils]: 118: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,933 INFO L284 TraceCheckUtils]: 119: Hoare quadruple {69323#true} {69339#(= ~ref_cnt~0 0)} #571#return; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,933 INFO L290 TraceCheckUtils]: 120: Hoare triple {69339#(= ~ref_cnt~0 0)} input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset := input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset;havoc input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,933 INFO L290 TraceCheckUtils]: 121: Hoare triple {69339#(= ~ref_cnt~0 0)} usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset := input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;assume { :end_inline_input_allocate_device } true;usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset := usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset;havoc usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,933 INFO L290 TraceCheckUtils]: 122: Hoare triple {69339#(= ~ref_cnt~0 0)} assume !(0 == (usb_acecad_probe_~acecad~3#1.base + usb_acecad_probe_~acecad~3#1.offset) % 18446744073709551616 || 0 == (usb_acecad_probe_~input_dev~0#1.base + usb_acecad_probe_~input_dev~0#1.offset) % 18446744073709551616);assume { :begin_inline_usb_alloc_coherent } true;usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset, usb_alloc_coherent_#in~arg1#1, usb_alloc_coherent_#in~arg2#1, usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, 8, 208, usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset;havoc usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;havoc usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset, usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset, usb_alloc_coherent_~arg1#1, usb_alloc_coherent_~arg2#1, usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset;usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset := usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset;usb_alloc_coherent_~arg1#1 := usb_alloc_coherent_#in~arg1#1;usb_alloc_coherent_~arg2#1 := usb_alloc_coherent_#in~arg2#1;usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset := usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,934 INFO L272 TraceCheckUtils]: 123: Hoare triple {69339#(= ~ref_cnt~0 0)} call usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset := ldv_malloc(0); {69437#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:30,934 INFO L290 TraceCheckUtils]: 124: Hoare triple {69437#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {69323#true} is VALID [2022-02-20 22:07:30,934 INFO L290 TraceCheckUtils]: 125: Hoare triple {69323#true} assume !(0 != ~tmp___0~2);call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size);~tmp~4.base, ~tmp~4.offset := #t~malloc63.base, #t~malloc63.offset;havoc #t~malloc63.base, #t~malloc63.offset;~p~0.base, ~p~0.offset := ~tmp~4.base, ~tmp~4.offset; {69323#true} is VALID [2022-02-20 22:07:30,934 INFO L272 TraceCheckUtils]: 126: Hoare triple {69323#true} call assume_abort_if_not((if 0 != (~p~0.base + ~p~0.offset) % 18446744073709551616 then 1 else 0)); {69323#true} is VALID [2022-02-20 22:07:30,934 INFO L290 TraceCheckUtils]: 127: Hoare triple {69323#true} ~cond := #in~cond; {69323#true} is VALID [2022-02-20 22:07:30,935 INFO L290 TraceCheckUtils]: 128: Hoare triple {69323#true} assume !(0 == ~cond); {69323#true} is VALID [2022-02-20 22:07:30,935 INFO L290 TraceCheckUtils]: 129: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,935 INFO L284 TraceCheckUtils]: 130: Hoare quadruple {69323#true} {69323#true} #551#return; {69323#true} is VALID [2022-02-20 22:07:30,935 INFO L290 TraceCheckUtils]: 131: Hoare triple {69323#true} #res.base, #res.offset := ~p~0.base, ~p~0.offset; {69323#true} is VALID [2022-02-20 22:07:30,935 INFO L290 TraceCheckUtils]: 132: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,936 INFO L284 TraceCheckUtils]: 133: Hoare quadruple {69323#true} {69339#(= ~ref_cnt~0 0)} #573#return; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,936 INFO L290 TraceCheckUtils]: 134: Hoare triple {69339#(= ~ref_cnt~0 0)} usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset := usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset;havoc usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,936 INFO L290 TraceCheckUtils]: 135: Hoare triple {69339#(= ~ref_cnt~0 0)} usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset := usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;assume { :end_inline_usb_alloc_coherent } true;usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset := usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset;havoc usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset;call write~$Pointer$(usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8); {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,937 INFO L290 TraceCheckUtils]: 136: Hoare triple {69339#(= ~ref_cnt~0 0)} assume !(0 == (usb_acecad_probe_#t~mem141#1.base + usb_acecad_probe_#t~mem141#1.offset) % 18446744073709551616);havoc usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset;assume { :begin_inline_ldv_usb_alloc_urb_5 } true;ldv_usb_alloc_urb_5_#in~ldv_func_arg1#1, ldv_usb_alloc_urb_5_#in~ldv_func_arg2#1 := 0, 208;havoc ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset, ldv_usb_alloc_urb_5_~ldv_func_arg1#1, ldv_usb_alloc_urb_5_~ldv_func_arg2#1, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset, ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;ldv_usb_alloc_urb_5_~ldv_func_arg1#1 := ldv_usb_alloc_urb_5_#in~ldv_func_arg1#1;ldv_usb_alloc_urb_5_~ldv_func_arg2#1 := ldv_usb_alloc_urb_5_#in~ldv_func_arg2#1;havoc ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset;havoc ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;assume { :begin_inline_usb_alloc_urb } true;usb_alloc_urb_#in~arg0#1, usb_alloc_urb_#in~arg1#1 := ldv_usb_alloc_urb_5_~ldv_func_arg1#1, ldv_usb_alloc_urb_5_~ldv_func_arg2#1;havoc usb_alloc_urb_#res#1.base, usb_alloc_urb_#res#1.offset;havoc usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset, usb_alloc_urb_~arg0#1, usb_alloc_urb_~arg1#1;usb_alloc_urb_~arg0#1 := usb_alloc_urb_#in~arg0#1;usb_alloc_urb_~arg1#1 := usb_alloc_urb_#in~arg1#1; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,937 INFO L272 TraceCheckUtils]: 137: Hoare triple {69339#(= ~ref_cnt~0 0)} call usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset := ldv_malloc(180); {69437#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:30,937 INFO L290 TraceCheckUtils]: 138: Hoare triple {69437#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {69323#true} is VALID [2022-02-20 22:07:30,937 INFO L290 TraceCheckUtils]: 139: Hoare triple {69323#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {69323#true} is VALID [2022-02-20 22:07:30,937 INFO L290 TraceCheckUtils]: 140: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,938 INFO L284 TraceCheckUtils]: 141: Hoare quadruple {69323#true} {69339#(= ~ref_cnt~0 0)} #575#return; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,938 INFO L290 TraceCheckUtils]: 142: Hoare triple {69339#(= ~ref_cnt~0 0)} usb_alloc_urb_#res#1.base, usb_alloc_urb_#res#1.offset := usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset;havoc usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,938 INFO L290 TraceCheckUtils]: 143: Hoare triple {69339#(= ~ref_cnt~0 0)} ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset := usb_alloc_urb_#res#1.base, usb_alloc_urb_#res#1.offset;assume { :end_inline_usb_alloc_urb } true;ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset := ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset;ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset := ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;assume { :begin_inline_ldv_alloc_urb } true;ldv_alloc_urb_#in~res#1.base, ldv_alloc_urb_#in~res#1.offset := ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset;havoc ldv_alloc_urb_~res#1.base, ldv_alloc_urb_~res#1.offset;ldv_alloc_urb_~res#1.base, ldv_alloc_urb_~res#1.offset := ldv_alloc_urb_#in~res#1.base, ldv_alloc_urb_#in~res#1.offset; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,939 INFO L290 TraceCheckUtils]: 144: Hoare triple {69339#(= ~ref_cnt~0 0)} assume 0 != (ldv_alloc_urb_~res#1.base + ldv_alloc_urb_~res#1.offset) % 18446744073709551616;~URB_STATE~0 := 1 + ~URB_STATE~0; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,939 INFO L290 TraceCheckUtils]: 145: Hoare triple {69339#(= ~ref_cnt~0 0)} assume { :end_inline_ldv_alloc_urb } true;ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset := ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,939 INFO L290 TraceCheckUtils]: 146: Hoare triple {69339#(= ~ref_cnt~0 0)} usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset := ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;assume { :end_inline_ldv_usb_alloc_urb_5 } true;call write~$Pointer$(usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset, usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8);havoc usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset;call usb_acecad_probe_#t~mem143#1.base, usb_acecad_probe_#t~mem143#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8); {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,940 INFO L290 TraceCheckUtils]: 147: Hoare triple {69339#(= ~ref_cnt~0 0)} assume !(0 == (usb_acecad_probe_#t~mem143#1.base + usb_acecad_probe_#t~mem143#1.offset) % 18446744073709551616);havoc usb_acecad_probe_#t~mem143#1.base, usb_acecad_probe_#t~mem143#1.offset;call write~$Pointer$(usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~acecad~3#1.base, 192 + usb_acecad_probe_~acecad~3#1.offset, 8);call write~$Pointer$(usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset, usb_acecad_probe_~acecad~3#1.base, 200 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem144#1.base, usb_acecad_probe_#t~mem144#1.offset := read~$Pointer$(usb_acecad_probe_~dev~1#1.base, 1472 + usb_acecad_probe_~dev~1#1.offset, 8); {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,940 INFO L290 TraceCheckUtils]: 148: Hoare triple {69339#(= ~ref_cnt~0 0)} assume !(0 != (usb_acecad_probe_#t~mem144#1.base + usb_acecad_probe_#t~mem144#1.offset) % 18446744073709551616);havoc usb_acecad_probe_#t~mem144#1.base, usb_acecad_probe_#t~mem144#1.offset; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,940 INFO L290 TraceCheckUtils]: 149: Hoare triple {69339#(= ~ref_cnt~0 0)} call usb_acecad_probe_#t~mem147#1.base, usb_acecad_probe_#t~mem147#1.offset := read~$Pointer$(usb_acecad_probe_~dev~1#1.base, 1464 + usb_acecad_probe_~dev~1#1.offset, 8); {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,940 INFO L290 TraceCheckUtils]: 150: Hoare triple {69339#(= ~ref_cnt~0 0)} assume !(0 != (usb_acecad_probe_#t~mem147#1.base + usb_acecad_probe_#t~mem147#1.offset) % 18446744073709551616);havoc usb_acecad_probe_#t~mem147#1.base, usb_acecad_probe_#t~mem147#1.offset; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,941 INFO L290 TraceCheckUtils]: 151: Hoare triple {69339#(= ~ref_cnt~0 0)} assume { :begin_inline_usb_make_path } true;usb_make_path_#in~dev#1.base, usb_make_path_#in~dev#1.offset, usb_make_path_#in~buf#1.base, usb_make_path_#in~buf#1.offset, usb_make_path_#in~size#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~acecad~3#1.base, 128 + usb_acecad_probe_~acecad~3#1.offset, 64;havoc usb_make_path_#res#1;havoc usb_make_path_#t~nondet24#1, usb_make_path_#t~mem25#1.base, usb_make_path_#t~mem25#1.offset, usb_make_path_#t~mem26#1.base, usb_make_path_#t~mem26#1.offset, usb_make_path_#t~ite27#1, usb_make_path_~dev#1.base, usb_make_path_~dev#1.offset, usb_make_path_~buf#1.base, usb_make_path_~buf#1.offset, usb_make_path_~size#1, usb_make_path_~actual~0#1;usb_make_path_~dev#1.base, usb_make_path_~dev#1.offset := usb_make_path_#in~dev#1.base, usb_make_path_#in~dev#1.offset;usb_make_path_~buf#1.base, usb_make_path_~buf#1.offset := usb_make_path_#in~buf#1.base, usb_make_path_#in~buf#1.offset;usb_make_path_~size#1 := usb_make_path_#in~size#1;havoc usb_make_path_~actual~0#1;havoc usb_make_path_#t~nondet24#1;call usb_make_path_#t~mem25#1.base, usb_make_path_#t~mem25#1.offset := read~$Pointer$(usb_make_path_~dev#1.base, 60 + usb_make_path_~dev#1.offset, 8);call usb_make_path_#t~mem26#1.base, usb_make_path_#t~mem26#1.offset := read~$Pointer$(usb_make_path_#t~mem25#1.base, 12 + usb_make_path_#t~mem25#1.offset, 8);usb_make_path_~actual~0#1 := usb_make_path_#t~nondet24#1;havoc usb_make_path_#t~mem25#1.base, usb_make_path_#t~mem25#1.offset;havoc usb_make_path_#t~mem26#1.base, usb_make_path_#t~mem26#1.offset; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,941 INFO L290 TraceCheckUtils]: 152: Hoare triple {69339#(= ~ref_cnt~0 0)} assume (if usb_make_path_~size#1 % 18446744073709551616 % 4294967296 <= 2147483647 then usb_make_path_~size#1 % 18446744073709551616 % 4294967296 else usb_make_path_~size#1 % 18446744073709551616 % 4294967296 - 4294967296) > usb_make_path_~actual~0#1;usb_make_path_#t~ite27#1 := usb_make_path_~actual~0#1; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,941 INFO L290 TraceCheckUtils]: 153: Hoare triple {69339#(= ~ref_cnt~0 0)} usb_make_path_#res#1 := usb_make_path_#t~ite27#1;havoc usb_make_path_#t~ite27#1; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,942 INFO L290 TraceCheckUtils]: 154: Hoare triple {69339#(= ~ref_cnt~0 0)} usb_acecad_probe_#t~ret152#1 := usb_make_path_#res#1;assume { :end_inline_usb_make_path } true;assume -2147483648 <= usb_acecad_probe_#t~ret152#1 && usb_acecad_probe_#t~ret152#1 <= 2147483647;havoc usb_acecad_probe_#t~ret152#1; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,942 INFO L272 TraceCheckUtils]: 155: Hoare triple {69339#(= ~ref_cnt~0 0)} call usb_acecad_probe_#t~ret153#1 := strlcat(usb_acecad_probe_~acecad~3#1.base, 128 + usb_acecad_probe_~acecad~3#1.offset, 9, 0, 64); {69323#true} is VALID [2022-02-20 22:07:30,942 INFO L290 TraceCheckUtils]: 156: Hoare triple {69323#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1.base, ~arg1.offset := #in~arg1.base, #in~arg1.offset;~arg2 := #in~arg2;#res := #t~nondet213;havoc #t~nondet213; {69323#true} is VALID [2022-02-20 22:07:30,942 INFO L290 TraceCheckUtils]: 157: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,942 INFO L284 TraceCheckUtils]: 158: Hoare quadruple {69323#true} {69339#(= ~ref_cnt~0 0)} #581#return; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,943 INFO L290 TraceCheckUtils]: 159: Hoare triple {69339#(= ~ref_cnt~0 0)} havoc usb_acecad_probe_#t~ret153#1;call write~$Pointer$(usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset, usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset, 8);call write~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 128 + usb_acecad_probe_~acecad~3#1.offset, usb_acecad_probe_~input_dev~0#1.base, 8 + usb_acecad_probe_~input_dev~0#1.offset, 8);assume { :begin_inline_usb_to_input_id } true;usb_to_input_id_#in~dev#1.base, usb_to_input_id_#in~dev#1.offset, usb_to_input_id_#in~id#1.base, usb_to_input_id_#in~id#1.offset := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~input_dev~0#1.base, 24 + usb_acecad_probe_~input_dev~0#1.offset;havoc usb_to_input_id_#t~mem85#1, usb_to_input_id_#t~mem86#1, usb_to_input_id_#t~mem87#1, usb_to_input_id_~dev#1.base, usb_to_input_id_~dev#1.offset, usb_to_input_id_~id#1.base, usb_to_input_id_~id#1.offset;usb_to_input_id_~dev#1.base, usb_to_input_id_~dev#1.offset := usb_to_input_id_#in~dev#1.base, usb_to_input_id_#in~dev#1.offset;usb_to_input_id_~id#1.base, usb_to_input_id_~id#1.offset := usb_to_input_id_#in~id#1.base, usb_to_input_id_#in~id#1.offset;call write~int(3, usb_to_input_id_~id#1.base, usb_to_input_id_~id#1.offset, 2);call usb_to_input_id_#t~mem85#1 := read~int(usb_to_input_id_~dev#1.base, 1160 + usb_to_input_id_~dev#1.offset, 2);call write~int(usb_to_input_id_#t~mem85#1, usb_to_input_id_~id#1.base, 2 + usb_to_input_id_~id#1.offset, 2);havoc usb_to_input_id_#t~mem85#1;call usb_to_input_id_#t~mem86#1 := read~int(usb_to_input_id_~dev#1.base, 1162 + usb_to_input_id_~dev#1.offset, 2);call write~int(usb_to_input_id_#t~mem86#1, usb_to_input_id_~id#1.base, 4 + usb_to_input_id_~id#1.offset, 2);havoc usb_to_input_id_#t~mem86#1;call usb_to_input_id_#t~mem87#1 := read~int(usb_to_input_id_~dev#1.base, 1164 + usb_to_input_id_~dev#1.offset, 2);call write~int(usb_to_input_id_#t~mem87#1, usb_to_input_id_~id#1.base, 6 + usb_to_input_id_~id#1.offset, 2);havoc usb_to_input_id_#t~mem87#1; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,943 INFO L290 TraceCheckUtils]: 160: Hoare triple {69339#(= ~ref_cnt~0 0)} assume { :end_inline_usb_to_input_id } true;call write~$Pointer$(usb_acecad_probe_~intf#1.base, 44 + usb_acecad_probe_~intf#1.offset, usb_acecad_probe_~input_dev~0#1.base, 802 + usb_acecad_probe_~input_dev~0#1.offset, 8);assume { :begin_inline_input_set_drvdata } true;input_set_drvdata_#in~dev#1.base, input_set_drvdata_#in~dev#1.offset, input_set_drvdata_#in~data#1.base, input_set_drvdata_#in~data#1.offset := usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset, usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset;havoc input_set_drvdata_~dev#1.base, input_set_drvdata_~dev#1.offset, input_set_drvdata_~data#1.base, input_set_drvdata_~data#1.offset;input_set_drvdata_~dev#1.base, input_set_drvdata_~dev#1.offset := input_set_drvdata_#in~dev#1.base, input_set_drvdata_#in~dev#1.offset;input_set_drvdata_~data#1.base, input_set_drvdata_~data#1.offset := input_set_drvdata_#in~data#1.base, input_set_drvdata_#in~data#1.offset;assume { :begin_inline_dev_set_drvdata } true;dev_set_drvdata_#in~arg0#1.base, dev_set_drvdata_#in~arg0#1.offset, dev_set_drvdata_#in~arg1#1.base, dev_set_drvdata_#in~arg1#1.offset := input_set_drvdata_~dev#1.base, 802 + input_set_drvdata_~dev#1.offset, input_set_drvdata_~data#1.base, input_set_drvdata_~data#1.offset;havoc dev_set_drvdata_~arg0#1.base, dev_set_drvdata_~arg0#1.offset, dev_set_drvdata_~arg1#1.base, dev_set_drvdata_~arg1#1.offset;dev_set_drvdata_~arg0#1.base, dev_set_drvdata_~arg0#1.offset := dev_set_drvdata_#in~arg0#1.base, dev_set_drvdata_#in~arg0#1.offset;dev_set_drvdata_~arg1#1.base, dev_set_drvdata_~arg1#1.offset := dev_set_drvdata_#in~arg1#1.base, dev_set_drvdata_#in~arg1#1.offset; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,943 INFO L290 TraceCheckUtils]: 161: Hoare triple {69339#(= ~ref_cnt~0 0)} assume { :end_inline_dev_set_drvdata } true; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,944 INFO L290 TraceCheckUtils]: 162: Hoare triple {69339#(= ~ref_cnt~0 0)} assume { :end_inline_input_set_drvdata } true;call write~$Pointer$(#funAddr~usb_acecad_open.base, #funAddr~usb_acecad_open.offset, usb_acecad_probe_~input_dev~0#1.base, 540 + usb_acecad_probe_~input_dev~0#1.offset, 8);call write~$Pointer$(#funAddr~usb_acecad_close.base, #funAddr~usb_acecad_close.offset, usb_acecad_probe_~input_dev~0#1.base, 548 + usb_acecad_probe_~input_dev~0#1.offset, 8);call write~int(10, usb_acecad_probe_~input_dev~0#1.base, 32 + usb_acecad_probe_~input_dev~0#1.offset, 8);call write~int(7169, usb_acecad_probe_~input_dev~0#1.base, 80 + usb_acecad_probe_~input_dev~0#1.offset, 8);call usb_acecad_probe_#t~mem154#1 := read~int(usb_acecad_probe_~id#1.base, 16 + usb_acecad_probe_~id#1.offset, 8);usb_acecad_probe_#t~switch155#1 := 0 == usb_acecad_probe_#t~mem154#1; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,944 INFO L290 TraceCheckUtils]: 163: Hoare triple {69339#(= ~ref_cnt~0 0)} assume !usb_acecad_probe_#t~switch155#1;usb_acecad_probe_#t~switch155#1 := usb_acecad_probe_#t~switch155#1 || 1 == usb_acecad_probe_#t~mem154#1; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,944 INFO L290 TraceCheckUtils]: 164: Hoare triple {69339#(= ~ref_cnt~0 0)} assume !usb_acecad_probe_#t~switch155#1; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,945 INFO L290 TraceCheckUtils]: 165: Hoare triple {69339#(= ~ref_cnt~0 0)} havoc usb_acecad_probe_#t~mem154#1;havoc usb_acecad_probe_#t~switch155#1; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,945 INFO L290 TraceCheckUtils]: 166: Hoare triple {69339#(= ~ref_cnt~0 0)} call usb_acecad_probe_#t~mem164#1.base, usb_acecad_probe_#t~mem164#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem165#1.base, usb_acecad_probe_#t~mem165#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8); {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,945 INFO L290 TraceCheckUtils]: 167: Hoare triple {69339#(= ~ref_cnt~0 0)} assume 8 < usb_acecad_probe_~maxp~0#1;usb_acecad_probe_#t~ite166#1 := 8; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,946 INFO L290 TraceCheckUtils]: 168: Hoare triple {69339#(= ~ref_cnt~0 0)} call usb_acecad_probe_#t~mem167#1 := read~int(usb_acecad_probe_~endpoint~0#1.base, 6 + usb_acecad_probe_~endpoint~0#1.offset, 1);assume { :begin_inline_ldv_usb_fill_int_urb_6 } true;ldv_usb_fill_int_urb_6_#in~urb#1.base, ldv_usb_fill_int_urb_6_#in~urb#1.offset, ldv_usb_fill_int_urb_6_#in~dev#1.base, ldv_usb_fill_int_urb_6_#in~dev#1.offset, ldv_usb_fill_int_urb_6_#in~pipe#1, ldv_usb_fill_int_urb_6_#in~transfer_buffer#1.base, ldv_usb_fill_int_urb_6_#in~transfer_buffer#1.offset, ldv_usb_fill_int_urb_6_#in~buffer_length#1, ldv_usb_fill_int_urb_6_#in~complete_fn#1.base, ldv_usb_fill_int_urb_6_#in~complete_fn#1.offset, ldv_usb_fill_int_urb_6_#in~context#1.base, ldv_usb_fill_int_urb_6_#in~context#1.offset, ldv_usb_fill_int_urb_6_#in~interval#1 := usb_acecad_probe_#t~mem164#1.base, usb_acecad_probe_#t~mem164#1.offset, usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~pipe~0#1, usb_acecad_probe_#t~mem165#1.base, usb_acecad_probe_#t~mem165#1.offset, usb_acecad_probe_#t~ite166#1, #funAddr~usb_acecad_irq.base, #funAddr~usb_acecad_irq.offset, usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset, usb_acecad_probe_#t~mem167#1 % 256;havoc ldv_usb_fill_int_urb_6_~urb#1.base, ldv_usb_fill_int_urb_6_~urb#1.offset, ldv_usb_fill_int_urb_6_~dev#1.base, ldv_usb_fill_int_urb_6_~dev#1.offset, ldv_usb_fill_int_urb_6_~pipe#1, ldv_usb_fill_int_urb_6_~transfer_buffer#1.base, ldv_usb_fill_int_urb_6_~transfer_buffer#1.offset, ldv_usb_fill_int_urb_6_~buffer_length#1, ldv_usb_fill_int_urb_6_~complete_fn#1.base, ldv_usb_fill_int_urb_6_~complete_fn#1.offset, ldv_usb_fill_int_urb_6_~context#1.base, ldv_usb_fill_int_urb_6_~context#1.offset, ldv_usb_fill_int_urb_6_~interval#1;ldv_usb_fill_int_urb_6_~urb#1.base, ldv_usb_fill_int_urb_6_~urb#1.offset := ldv_usb_fill_int_urb_6_#in~urb#1.base, ldv_usb_fill_int_urb_6_#in~urb#1.offset;ldv_usb_fill_int_urb_6_~dev#1.base, ldv_usb_fill_int_urb_6_~dev#1.offset := ldv_usb_fill_int_urb_6_#in~dev#1.base, ldv_usb_fill_int_urb_6_#in~dev#1.offset;ldv_usb_fill_int_urb_6_~pipe#1 := ldv_usb_fill_int_urb_6_#in~pipe#1;ldv_usb_fill_int_urb_6_~transfer_buffer#1.base, ldv_usb_fill_int_urb_6_~transfer_buffer#1.offset := ldv_usb_fill_int_urb_6_#in~transfer_buffer#1.base, ldv_usb_fill_int_urb_6_#in~transfer_buffer#1.offset;ldv_usb_fill_int_urb_6_~buffer_length#1 := ldv_usb_fill_int_urb_6_#in~buffer_length#1;ldv_usb_fill_int_urb_6_~complete_fn#1.base, ldv_usb_fill_int_urb_6_~complete_fn#1.offset := ldv_usb_fill_int_urb_6_#in~complete_fn#1.base, ldv_usb_fill_int_urb_6_#in~complete_fn#1.offset;ldv_usb_fill_int_urb_6_~context#1.base, ldv_usb_fill_int_urb_6_~context#1.offset := ldv_usb_fill_int_urb_6_#in~context#1.base, ldv_usb_fill_int_urb_6_#in~context#1.offset;ldv_usb_fill_int_urb_6_~interval#1 := ldv_usb_fill_int_urb_6_#in~interval#1;assume { :begin_inline_ldv_fill_int_urb } true;ldv_fill_int_urb_#in~complete_fn#1.base, ldv_fill_int_urb_#in~complete_fn#1.offset := ldv_usb_fill_int_urb_6_~complete_fn#1.base, ldv_usb_fill_int_urb_6_~complete_fn#1.offset;havoc ldv_fill_int_urb_#t~ret201#1.base, ldv_fill_int_urb_#t~ret201#1.offset, ldv_fill_int_urb_#t~ret202#1, ldv_fill_int_urb_~complete_fn#1.base, ldv_fill_int_urb_~complete_fn#1.offset, ldv_fill_int_urb_~value~0#1.base, ldv_fill_int_urb_~value~0#1.offset, ldv_fill_int_urb_~tmp___0~7#1;ldv_fill_int_urb_~complete_fn#1.base, ldv_fill_int_urb_~complete_fn#1.offset := ldv_fill_int_urb_#in~complete_fn#1.base, ldv_fill_int_urb_#in~complete_fn#1.offset;havoc ldv_fill_int_urb_~value~0#1.base, ldv_fill_int_urb_~value~0#1.offset;havoc ldv_fill_int_urb_~tmp___0~7#1; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,946 INFO L272 TraceCheckUtils]: 169: Hoare triple {69339#(= ~ref_cnt~0 0)} call ldv_fill_int_urb_#t~ret201#1.base, ldv_fill_int_urb_#t~ret201#1.offset := ldv_malloc(180); {69437#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:30,946 INFO L290 TraceCheckUtils]: 170: Hoare triple {69437#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {69323#true} is VALID [2022-02-20 22:07:30,946 INFO L290 TraceCheckUtils]: 171: Hoare triple {69323#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {69323#true} is VALID [2022-02-20 22:07:30,946 INFO L290 TraceCheckUtils]: 172: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,947 INFO L284 TraceCheckUtils]: 173: Hoare quadruple {69323#true} {69339#(= ~ref_cnt~0 0)} #595#return; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,947 INFO L290 TraceCheckUtils]: 174: Hoare triple {69339#(= ~ref_cnt~0 0)} ldv_fill_int_urb_~value~0#1.base, ldv_fill_int_urb_~value~0#1.offset := ldv_fill_int_urb_#t~ret201#1.base, ldv_fill_int_urb_#t~ret201#1.offset;havoc ldv_fill_int_urb_#t~ret201#1.base, ldv_fill_int_urb_#t~ret201#1.offset; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,947 INFO L290 TraceCheckUtils]: 175: Hoare triple {69339#(= ~ref_cnt~0 0)} assume !(0 == (ldv_fill_int_urb_~value~0#1.base + ldv_fill_int_urb_~value~0#1.offset) % 18446744073709551616); {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,947 INFO L272 TraceCheckUtils]: 176: Hoare triple {69339#(= ~ref_cnt~0 0)} call ldv_fill_int_urb_#t~ret202#1 := ldv_undef_int(); {69323#true} is VALID [2022-02-20 22:07:30,948 INFO L290 TraceCheckUtils]: 177: Hoare triple {69323#true} havoc ~tmp~8;assume -2147483648 <= #t~nondet68 && #t~nondet68 <= 2147483647;~tmp~8 := #t~nondet68;havoc #t~nondet68;#res := ~tmp~8; {69323#true} is VALID [2022-02-20 22:07:30,948 INFO L290 TraceCheckUtils]: 178: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,948 INFO L284 TraceCheckUtils]: 179: Hoare quadruple {69323#true} {69339#(= ~ref_cnt~0 0)} #599#return; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,948 INFO L290 TraceCheckUtils]: 180: Hoare triple {69339#(= ~ref_cnt~0 0)} assume -2147483648 <= ldv_fill_int_urb_#t~ret202#1 && ldv_fill_int_urb_#t~ret202#1 <= 2147483647;ldv_fill_int_urb_~tmp___0~7#1 := ldv_fill_int_urb_#t~ret202#1;havoc ldv_fill_int_urb_#t~ret202#1; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,949 INFO L290 TraceCheckUtils]: 181: Hoare triple {69339#(= ~ref_cnt~0 0)} assume !(0 != ldv_fill_int_urb_~tmp___0~7#1); {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,949 INFO L290 TraceCheckUtils]: 182: Hoare triple {69339#(= ~ref_cnt~0 0)} assume { :end_inline_ldv_fill_int_urb } true; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,949 INFO L290 TraceCheckUtils]: 183: Hoare triple {69339#(= ~ref_cnt~0 0)} assume { :end_inline_ldv_usb_fill_int_urb_6 } true;havoc usb_acecad_probe_#t~mem164#1.base, usb_acecad_probe_#t~mem164#1.offset;havoc usb_acecad_probe_#t~mem165#1.base, usb_acecad_probe_#t~mem165#1.offset;havoc usb_acecad_probe_#t~ite166#1;havoc usb_acecad_probe_#t~mem167#1;call usb_acecad_probe_#t~mem168#1.base, usb_acecad_probe_#t~mem168#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem169#1 := read~int(usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset, 8);call write~int(usb_acecad_probe_#t~mem169#1, usb_acecad_probe_#t~mem168#1.base, 104 + usb_acecad_probe_#t~mem168#1.offset, 8);havoc usb_acecad_probe_#t~mem168#1.base, usb_acecad_probe_#t~mem168#1.offset;havoc usb_acecad_probe_#t~mem169#1;call usb_acecad_probe_#t~mem170#1.base, usb_acecad_probe_#t~mem170#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem171#1.base, usb_acecad_probe_#t~mem171#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem172#1 := read~int(usb_acecad_probe_#t~mem171#1.base, 92 + usb_acecad_probe_#t~mem171#1.offset, 4);call write~int(~bitwiseOr(usb_acecad_probe_#t~mem172#1, 4), usb_acecad_probe_#t~mem170#1.base, 92 + usb_acecad_probe_#t~mem170#1.offset, 4);havoc usb_acecad_probe_#t~mem170#1.base, usb_acecad_probe_#t~mem170#1.offset;havoc usb_acecad_probe_#t~mem171#1.base, usb_acecad_probe_#t~mem171#1.offset;havoc usb_acecad_probe_#t~mem172#1;call usb_acecad_probe_#t~mem173#1.base, usb_acecad_probe_#t~mem173#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 200 + usb_acecad_probe_~acecad~3#1.offset, 8);assume { :begin_inline_input_register_device } true;input_register_device_#in~arg0#1.base, input_register_device_#in~arg0#1.offset := usb_acecad_probe_#t~mem173#1.base, usb_acecad_probe_#t~mem173#1.offset;havoc input_register_device_#res#1;havoc input_register_device_#t~nondet211#1, input_register_device_~arg0#1.base, input_register_device_~arg0#1.offset;input_register_device_~arg0#1.base, input_register_device_~arg0#1.offset := input_register_device_#in~arg0#1.base, input_register_device_#in~arg0#1.offset;assume -2147483648 <= input_register_device_#t~nondet211#1 && input_register_device_#t~nondet211#1 <= 2147483647;input_register_device_#res#1 := input_register_device_#t~nondet211#1;havoc input_register_device_#t~nondet211#1; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,950 INFO L290 TraceCheckUtils]: 184: Hoare triple {69339#(= ~ref_cnt~0 0)} usb_acecad_probe_#t~ret174#1 := input_register_device_#res#1;assume { :end_inline_input_register_device } true;assume -2147483648 <= usb_acecad_probe_#t~ret174#1 && usb_acecad_probe_#t~ret174#1 <= 2147483647;usb_acecad_probe_~err~0#1 := usb_acecad_probe_#t~ret174#1;havoc usb_acecad_probe_#t~mem173#1.base, usb_acecad_probe_#t~mem173#1.offset;havoc usb_acecad_probe_#t~ret174#1; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,950 INFO L290 TraceCheckUtils]: 185: Hoare triple {69339#(= ~ref_cnt~0 0)} assume !(0 != usb_acecad_probe_~err~0#1); {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,951 INFO L272 TraceCheckUtils]: 186: Hoare triple {69339#(= ~ref_cnt~0 0)} call ldv_usb_set_intfdata_7(usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset, usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset); {69454#(and (= ~usb_intfdata~0.offset |old(~usb_intfdata~0.offset)|) (= ~usb_intfdata~0.base |old(~usb_intfdata~0.base)|))} is VALID [2022-02-20 22:07:30,951 INFO L290 TraceCheckUtils]: 187: Hoare triple {69454#(and (= ~usb_intfdata~0.offset |old(~usb_intfdata~0.offset)|) (= ~usb_intfdata~0.base |old(~usb_intfdata~0.base)|))} ~intf#1.base, ~intf#1.offset := #in~intf#1.base, #in~intf#1.offset;~data#1.base, ~data#1.offset := #in~data#1.base, #in~data#1.offset;assume { :begin_inline_ldv_usb_set_intfdata } true;ldv_usb_set_intfdata_#in~data#1.base, ldv_usb_set_intfdata_#in~data#1.offset := ~data#1.base, ~data#1.offset;havoc ldv_usb_set_intfdata_~data#1.base, ldv_usb_set_intfdata_~data#1.offset;ldv_usb_set_intfdata_~data#1.base, ldv_usb_set_intfdata_~data#1.offset := ldv_usb_set_intfdata_#in~data#1.base, ldv_usb_set_intfdata_#in~data#1.offset;~usb_intfdata~0.base, ~usb_intfdata~0.offset := ldv_usb_set_intfdata_~data#1.base, ldv_usb_set_intfdata_~data#1.offset; {69323#true} is VALID [2022-02-20 22:07:30,951 INFO L290 TraceCheckUtils]: 188: Hoare triple {69323#true} assume { :end_inline_ldv_usb_set_intfdata } true; {69323#true} is VALID [2022-02-20 22:07:30,951 INFO L290 TraceCheckUtils]: 189: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:30,951 INFO L284 TraceCheckUtils]: 190: Hoare quadruple {69323#true} {69339#(= ~ref_cnt~0 0)} #601#return; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,952 INFO L290 TraceCheckUtils]: 191: Hoare triple {69339#(= ~ref_cnt~0 0)} usb_acecad_probe_#res#1 := 0; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,959 INFO L290 TraceCheckUtils]: 192: Hoare triple {69339#(= ~ref_cnt~0 0)} main_#t~ret191#1 := usb_acecad_probe_#res#1;assume { :end_inline_usb_acecad_probe } true;assume -2147483648 <= main_#t~ret191#1 && main_#t~ret191#1 <= 2147483647;~ldv_retval_0~0 := main_#t~ret191#1;havoc main_#t~ret191#1; {69339#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:30,960 INFO L290 TraceCheckUtils]: 193: Hoare triple {69339#(= ~ref_cnt~0 0)} assume 0 == ~ldv_retval_0~0;~ldv_state_variable_1~0 := 2;~ref_cnt~0 := 1 + ~ref_cnt~0; {69420#(<= 1 ~ref_cnt~0)} is VALID [2022-02-20 22:07:30,960 INFO L290 TraceCheckUtils]: 194: Hoare triple {69420#(<= 1 ~ref_cnt~0)} assume -2147483648 <= main_#t~nondet187#1 && main_#t~nondet187#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet187#1;havoc main_#t~nondet187#1;main_#t~switch188#1 := 0 == main_~tmp___0~6#1; {69420#(<= 1 ~ref_cnt~0)} is VALID [2022-02-20 22:07:30,960 INFO L290 TraceCheckUtils]: 195: Hoare triple {69420#(<= 1 ~ref_cnt~0)} assume !main_#t~switch188#1;main_#t~switch188#1 := main_#t~switch188#1 || 1 == main_~tmp___0~6#1; {69420#(<= 1 ~ref_cnt~0)} is VALID [2022-02-20 22:07:30,960 INFO L290 TraceCheckUtils]: 196: Hoare triple {69420#(<= 1 ~ref_cnt~0)} assume main_#t~switch188#1; {69420#(<= 1 ~ref_cnt~0)} is VALID [2022-02-20 22:07:30,961 INFO L290 TraceCheckUtils]: 197: Hoare triple {69420#(<= 1 ~ref_cnt~0)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet192#1 && main_#t~nondet192#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet192#1;havoc main_#t~nondet192#1;main_#t~switch193#1 := 0 == main_~tmp___2~1#1; {69420#(<= 1 ~ref_cnt~0)} is VALID [2022-02-20 22:07:30,961 INFO L290 TraceCheckUtils]: 198: Hoare triple {69420#(<= 1 ~ref_cnt~0)} assume main_#t~switch193#1; {69420#(<= 1 ~ref_cnt~0)} is VALID [2022-02-20 22:07:30,961 INFO L290 TraceCheckUtils]: 199: Hoare triple {69420#(<= 1 ~ref_cnt~0)} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0;assume { :begin_inline_usb_acecad_exit } true;assume { :begin_inline_ldv_usb_deregister_11 } true;ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset := ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset;assume { :begin_inline_usb_deregister } true;usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset := ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;havoc usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset;usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset := usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset; {69324#false} is VALID [2022-02-20 22:07:30,962 INFO L290 TraceCheckUtils]: 200: Hoare triple {69324#false} assume { :end_inline_usb_deregister } true;~ldv_state_variable_1~0 := 0; {69324#false} is VALID [2022-02-20 22:07:30,962 INFO L290 TraceCheckUtils]: 201: Hoare triple {69324#false} assume { :end_inline_ldv_usb_deregister_11 } true; {69324#false} is VALID [2022-02-20 22:07:30,962 INFO L290 TraceCheckUtils]: 202: Hoare triple {69324#false} assume { :end_inline_usb_acecad_exit } true;~ldv_state_variable_0~0 := 2; {69324#false} is VALID [2022-02-20 22:07:30,962 INFO L290 TraceCheckUtils]: 203: Hoare triple {69324#false} assume { :begin_inline_ldv_check_final_state } true; {69324#false} is VALID [2022-02-20 22:07:30,962 INFO L290 TraceCheckUtils]: 204: Hoare triple {69324#false} assume 0 != ~URB_STATE~0; {69324#false} is VALID [2022-02-20 22:07:30,962 INFO L272 TraceCheckUtils]: 205: Hoare triple {69324#false} call ldv_error(); {69324#false} is VALID [2022-02-20 22:07:30,962 INFO L290 TraceCheckUtils]: 206: Hoare triple {69324#false} assume !false; {69324#false} is VALID [2022-02-20 22:07:30,963 INFO L134 CoverageAnalysis]: Checked inductivity of 115 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 108 trivial. 0 not checked. [2022-02-20 22:07:30,963 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:07:30,963 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1997513644] [2022-02-20 22:07:30,964 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1997513644] provided 0 perfect and 1 imperfect interpolant sequences [2022-02-20 22:07:30,964 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1630957727] [2022-02-20 22:07:30,964 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:07:30,964 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-20 22:07:30,964 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-20 22:07:30,965 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-02-20 22:07:30,995 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-02-20 22:07:31,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:31,324 INFO L263 TraceCheckSpWp]: Trace formula consists of 1804 conjuncts, 3 conjunts are in the unsatisfiable core [2022-02-20 22:07:31,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:31,385 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-02-20 22:07:31,991 INFO L290 TraceCheckUtils]: 0: Hoare triple {69323#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(99, 2);call #Ultimate.allocInit(10, 3);call #Ultimate.allocInit(7, 4);call write~init~int(97, 4, 0, 1);call write~init~int(99, 4, 1, 1);call write~init~int(101, 4, 2, 1);call write~init~int(99, 4, 3, 1);call write~init~int(97, 4, 4, 1);call write~init~int(100, 4, 5, 1);call write~init~int(0, 4, 6, 1);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(20, 6);call #Ultimate.allocInit(57, 7);call #Ultimate.allocInit(2, 8);call write~init~int(32, 8, 0, 1);call write~init~int(0, 8, 1, 1);call #Ultimate.allocInit(8, 9);call #Ultimate.allocInit(34, 10);call #Ultimate.allocInit(32, 11);call #Ultimate.allocInit(11, 12);call #Ultimate.allocInit(48, 13);~LDV_IN_INTERRUPT~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset := 14, 0;call #Ultimate.allocInit(72, 14);call write~init~int(3, ~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 2 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(4, ~#usb_acecad_id_table~0.base, 4 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 6 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 8 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 10 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 11 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 12 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 13 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 14 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 15 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 16 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(3, ~#usb_acecad_id_table~0.base, 24 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 26 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(8, ~#usb_acecad_id_table~0.base, 28 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 30 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 32 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 34 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 35 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 36 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 37 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 38 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 39 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(1, ~#usb_acecad_id_table~0.base, 40 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(0, ~#usb_acecad_id_table~0.base, 48 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 50 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 52 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 54 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 56 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 58 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 59 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 60 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 61 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 62 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 63 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 64 + ~#usb_acecad_id_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.driver_info := 0;~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset := 15, 0;call #Ultimate.allocInit(264, 15);call write~init~$Pointer$(12, 0, ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_probe.base, #funAddr~usb_acecad_probe.offset, ~#usb_acecad_driver~0.base, 8 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_disconnect.base, #funAddr~usb_acecad_disconnect.offset, ~#usb_acecad_driver~0.base, 16 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 24 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 32 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 40 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 48 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 56 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 64 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, ~#usb_acecad_driver~0.base, 72 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 80 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 84 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 88 + ~#usb_acecad_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 92 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 100 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 108 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 116 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 124 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 132 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 136 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 144 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 152 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 160 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 168 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 176 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 184 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 192 + ~#usb_acecad_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 193 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 201 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 209 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 217 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 225 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 233 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 241 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 249 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 257 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 261 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 262 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 263 + ~#usb_acecad_driver~0.offset, 1);~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~URB_STATE~0 := 0;~DEV_STATE~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~int_urb~0.base, ~int_urb~0.offset := 0, 0;~bulk_urb~0.base, ~bulk_urb~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {69323#true} is VALID [2022-02-20 22:07:31,991 INFO L290 TraceCheckUtils]: 1: Hoare triple {69323#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret186#1.base, main_#t~ret186#1.offset, main_#t~nondet187#1, main_#t~switch188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~ret191#1, main_#t~nondet192#1, main_#t~switch193#1, main_#t~ret194#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~17#1.base, main_~tmp~17#1.offset, main_~tmp___0~6#1, main_~tmp___1~3#1, main_~tmp___2~1#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~17#1.base, main_~tmp~17#1.offset;havoc main_~tmp___0~6#1;havoc main_~tmp___1~3#1;havoc main_~tmp___2~1#1; {69323#true} is VALID [2022-02-20 22:07:31,991 INFO L272 TraceCheckUtils]: 2: Hoare triple {69323#true} call main_#t~ret186#1.base, main_#t~ret186#1.offset := ldv_init_zalloc(24); {69323#true} is VALID [2022-02-20 22:07:31,992 INFO L290 TraceCheckUtils]: 3: Hoare triple {69323#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {69323#true} is VALID [2022-02-20 22:07:31,992 INFO L272 TraceCheckUtils]: 4: Hoare triple {69323#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {69323#true} is VALID [2022-02-20 22:07:31,992 INFO L290 TraceCheckUtils]: 5: Hoare triple {69323#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {69323#true} is VALID [2022-02-20 22:07:31,992 INFO L290 TraceCheckUtils]: 6: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:31,992 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {69323#true} {69323#true} #547#return; {69323#true} is VALID [2022-02-20 22:07:31,992 INFO L290 TraceCheckUtils]: 8: Hoare triple {69323#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {69323#true} is VALID [2022-02-20 22:07:31,992 INFO L272 TraceCheckUtils]: 9: Hoare triple {69323#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {69323#true} is VALID [2022-02-20 22:07:31,992 INFO L290 TraceCheckUtils]: 10: Hoare triple {69323#true} ~cond := #in~cond; {69323#true} is VALID [2022-02-20 22:07:31,993 INFO L290 TraceCheckUtils]: 11: Hoare triple {69323#true} assume !(0 == ~cond); {69323#true} is VALID [2022-02-20 22:07:31,993 INFO L290 TraceCheckUtils]: 12: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:31,993 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {69323#true} {69323#true} #549#return; {69323#true} is VALID [2022-02-20 22:07:31,993 INFO L290 TraceCheckUtils]: 14: Hoare triple {69323#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {69323#true} is VALID [2022-02-20 22:07:31,993 INFO L290 TraceCheckUtils]: 15: Hoare triple {69323#true} assume true; {69323#true} is VALID [2022-02-20 22:07:31,993 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {69323#true} {69323#true} #553#return; {69323#true} is VALID [2022-02-20 22:07:31,993 INFO L290 TraceCheckUtils]: 17: Hoare triple {69323#true} main_~tmp~17#1.base, main_~tmp~17#1.offset := main_#t~ret186#1.base, main_#t~ret186#1.offset;havoc main_#t~ret186#1.base, main_#t~ret186#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~17#1.base, main_~tmp~17#1.offset;assume { :begin_inline_ldv_initialize } true; {69323#true} is VALID [2022-02-20 22:07:31,994 INFO L290 TraceCheckUtils]: 18: Hoare triple {69323#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:31,994 INFO L290 TraceCheckUtils]: 19: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume -2147483648 <= main_#t~nondet187#1 && main_#t~nondet187#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet187#1;havoc main_#t~nondet187#1;main_#t~switch188#1 := 0 == main_~tmp___0~6#1; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:31,994 INFO L290 TraceCheckUtils]: 20: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume !main_#t~switch188#1;main_#t~switch188#1 := main_#t~switch188#1 || 1 == main_~tmp___0~6#1; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:31,995 INFO L290 TraceCheckUtils]: 21: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume main_#t~switch188#1; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:31,995 INFO L290 TraceCheckUtils]: 22: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet192#1 && main_#t~nondet192#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet192#1;havoc main_#t~nondet192#1;main_#t~switch193#1 := 0 == main_~tmp___2~1#1; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:31,995 INFO L290 TraceCheckUtils]: 23: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume !main_#t~switch193#1;main_#t~switch193#1 := main_#t~switch193#1 || 1 == main_~tmp___2~1#1; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:31,996 INFO L290 TraceCheckUtils]: 24: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume main_#t~switch193#1; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:31,996 INFO L290 TraceCheckUtils]: 25: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_usb_acecad_init } true;havoc usb_acecad_init_#res#1;havoc usb_acecad_init_#t~ret183#1, usb_acecad_init_#t~nondet184#1, usb_acecad_init_~result~0#1, usb_acecad_init_~tmp~15#1;havoc usb_acecad_init_~result~0#1;havoc usb_acecad_init_~tmp~15#1;assume { :begin_inline_usb_register } true;usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc usb_register_#res#1;havoc usb_register_#t~ret31#1, usb_register_~driver#1.base, usb_register_~driver#1.offset, usb_register_~tmp~1#1;usb_register_~driver#1.base, usb_register_~driver#1.offset := usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset;havoc usb_register_~tmp~1#1;assume { :begin_inline_ldv_usb_register_driver_2 } true;ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset := usb_register_~driver#1.base, usb_register_~driver#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 4, 0;havoc ldv_usb_register_driver_2_#res#1;havoc ldv_usb_register_driver_2_#t~ret196#1, ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset, ldv_usb_register_driver_2_~ldv_func_res~0#1, ldv_usb_register_driver_2_~tmp~19#1;ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_2_~ldv_func_res~0#1;havoc ldv_usb_register_driver_2_~tmp~19#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet217#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet217#1 && usb_register_driver_#t~nondet217#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet217#1;havoc usb_register_driver_#t~nondet217#1; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:31,996 INFO L290 TraceCheckUtils]: 26: Hoare triple {69512#(<= 0 ~ref_cnt~0)} ldv_usb_register_driver_2_#t~ret196#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_2_#t~ret196#1 && ldv_usb_register_driver_2_#t~ret196#1 <= 2147483647;ldv_usb_register_driver_2_~tmp~19#1 := ldv_usb_register_driver_2_#t~ret196#1;havoc ldv_usb_register_driver_2_#t~ret196#1;ldv_usb_register_driver_2_~ldv_func_res~0#1 := ldv_usb_register_driver_2_~tmp~19#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset, ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset;havoc ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:31,997 INFO L272 TraceCheckUtils]: 27: Hoare triple {69512#(<= 0 ~ref_cnt~0)} call ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset := ldv_init_zalloc(1248); {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:31,997 INFO L290 TraceCheckUtils]: 28: Hoare triple {69512#(<= 0 ~ref_cnt~0)} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:31,998 INFO L272 TraceCheckUtils]: 29: Hoare triple {69512#(<= 0 ~ref_cnt~0)} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:31,998 INFO L290 TraceCheckUtils]: 30: Hoare triple {69512#(<= 0 ~ref_cnt~0)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:31,999 INFO L290 TraceCheckUtils]: 31: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume true; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:31,999 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {69512#(<= 0 ~ref_cnt~0)} {69512#(<= 0 ~ref_cnt~0)} #547#return; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,000 INFO L290 TraceCheckUtils]: 33: Hoare triple {69512#(<= 0 ~ref_cnt~0)} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,000 INFO L272 TraceCheckUtils]: 34: Hoare triple {69512#(<= 0 ~ref_cnt~0)} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,001 INFO L290 TraceCheckUtils]: 35: Hoare triple {69512#(<= 0 ~ref_cnt~0)} ~cond := #in~cond; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,001 INFO L290 TraceCheckUtils]: 36: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume !(0 == ~cond); {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,001 INFO L290 TraceCheckUtils]: 37: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume true; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,002 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {69512#(<= 0 ~ref_cnt~0)} {69512#(<= 0 ~ref_cnt~0)} #549#return; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,002 INFO L290 TraceCheckUtils]: 39: Hoare triple {69512#(<= 0 ~ref_cnt~0)} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,003 INFO L290 TraceCheckUtils]: 40: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume true; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,003 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {69512#(<= 0 ~ref_cnt~0)} {69512#(<= 0 ~ref_cnt~0)} #611#return; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,004 INFO L290 TraceCheckUtils]: 42: Hoare triple {69512#(<= 0 ~ref_cnt~0)} ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset := ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset;havoc ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,004 INFO L290 TraceCheckUtils]: 43: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_2_#res#1 := ldv_usb_register_driver_2_~ldv_func_res~0#1; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,004 INFO L290 TraceCheckUtils]: 44: Hoare triple {69512#(<= 0 ~ref_cnt~0)} usb_register_#t~ret31#1 := ldv_usb_register_driver_2_#res#1;assume { :end_inline_ldv_usb_register_driver_2 } true;assume -2147483648 <= usb_register_#t~ret31#1 && usb_register_#t~ret31#1 <= 2147483647;usb_register_~tmp~1#1 := usb_register_#t~ret31#1;havoc usb_register_#t~ret31#1;usb_register_#res#1 := usb_register_~tmp~1#1; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,005 INFO L290 TraceCheckUtils]: 45: Hoare triple {69512#(<= 0 ~ref_cnt~0)} usb_acecad_init_#t~ret183#1 := usb_register_#res#1;assume { :end_inline_usb_register } true;assume -2147483648 <= usb_acecad_init_#t~ret183#1 && usb_acecad_init_#t~ret183#1 <= 2147483647;usb_acecad_init_~tmp~15#1 := usb_acecad_init_#t~ret183#1;havoc usb_acecad_init_#t~ret183#1;usb_acecad_init_~result~0#1 := usb_acecad_init_~tmp~15#1; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,005 INFO L290 TraceCheckUtils]: 46: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume 0 == usb_acecad_init_~result~0#1;havoc usb_acecad_init_#t~nondet184#1; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,005 INFO L290 TraceCheckUtils]: 47: Hoare triple {69512#(<= 0 ~ref_cnt~0)} usb_acecad_init_#res#1 := usb_acecad_init_~result~0#1; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,006 INFO L290 TraceCheckUtils]: 48: Hoare triple {69512#(<= 0 ~ref_cnt~0)} main_#t~ret194#1 := usb_acecad_init_#res#1;assume { :end_inline_usb_acecad_init } true;assume -2147483648 <= main_#t~ret194#1 && main_#t~ret194#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret194#1;havoc main_#t~ret194#1; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,006 INFO L290 TraceCheckUtils]: 49: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume 0 == ~ldv_retval_1~0;~ldv_state_variable_0~0 := 3; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,006 INFO L290 TraceCheckUtils]: 50: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume !(0 != ~ldv_retval_1~0); {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,007 INFO L290 TraceCheckUtils]: 51: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume -2147483648 <= main_#t~nondet187#1 && main_#t~nondet187#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet187#1;havoc main_#t~nondet187#1;main_#t~switch188#1 := 0 == main_~tmp___0~6#1; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,007 INFO L290 TraceCheckUtils]: 52: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume main_#t~switch188#1; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,007 INFO L290 TraceCheckUtils]: 53: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= main_#t~nondet189#1 && main_#t~nondet189#1 <= 2147483647;main_~tmp___1~3#1 := main_#t~nondet189#1;havoc main_#t~nondet189#1;main_#t~switch190#1 := 0 == main_~tmp___1~3#1; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,008 INFO L290 TraceCheckUtils]: 54: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume main_#t~switch190#1; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,008 INFO L290 TraceCheckUtils]: 55: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume 1 == ~ldv_state_variable_1~0;assume { :begin_inline_usb_acecad_probe } true;usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset, usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset := ~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc usb_acecad_probe_#res#1;havoc usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset, usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset, usb_acecad_probe_#t~mem132#1, usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset, usb_acecad_probe_#t~ret134#1, usb_acecad_probe_#t~mem135#1, usb_acecad_probe_#t~ret136#1, usb_acecad_probe_#t~ret137#1, usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset, usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset, usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset, usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset, usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset, usb_acecad_probe_#t~mem143#1.base, usb_acecad_probe_#t~mem143#1.offset, usb_acecad_probe_#t~mem144#1.base, usb_acecad_probe_#t~mem144#1.offset, usb_acecad_probe_#t~mem145#1.base, usb_acecad_probe_#t~mem145#1.offset, usb_acecad_probe_#t~ret146#1, usb_acecad_probe_#t~mem147#1.base, usb_acecad_probe_#t~mem147#1.offset, usb_acecad_probe_#t~mem148#1.base, usb_acecad_probe_#t~mem148#1.offset, usb_acecad_probe_#t~ret149#1, usb_acecad_probe_#t~mem150#1.base, usb_acecad_probe_#t~mem150#1.offset, usb_acecad_probe_#t~ret151#1, usb_acecad_probe_#t~ret152#1, usb_acecad_probe_#t~ret153#1, usb_acecad_probe_#t~mem154#1, usb_acecad_probe_#t~switch155#1, usb_acecad_probe_#t~nondet156#1, usb_acecad_probe_#t~nondet157#1, usb_acecad_probe_#t~mem158#1, usb_acecad_probe_#t~mem159#1, usb_acecad_probe_#t~nondet160#1, usb_acecad_probe_#t~nondet161#1, usb_acecad_probe_#t~mem162#1, usb_acecad_probe_#t~mem163#1, usb_acecad_probe_#t~mem164#1.base, usb_acecad_probe_#t~mem164#1.offset, usb_acecad_probe_#t~mem165#1.base, usb_acecad_probe_#t~mem165#1.offset, usb_acecad_probe_#t~ite166#1, usb_acecad_probe_#t~mem167#1, usb_acecad_probe_#t~mem168#1.base, usb_acecad_probe_#t~mem168#1.offset, usb_acecad_probe_#t~mem169#1, usb_acecad_probe_#t~mem170#1.base, usb_acecad_probe_#t~mem170#1.offset, usb_acecad_probe_#t~mem171#1.base, usb_acecad_probe_#t~mem171#1.offset, usb_acecad_probe_#t~mem172#1, usb_acecad_probe_#t~mem173#1.base, usb_acecad_probe_#t~mem173#1.offset, usb_acecad_probe_#t~ret174#1, usb_acecad_probe_#t~mem175#1.base, usb_acecad_probe_#t~mem175#1.offset, usb_acecad_probe_#t~mem176#1, usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset, usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset, usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset, usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset, usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset, usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset, usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset, usb_acecad_probe_~pipe~0#1, usb_acecad_probe_~maxp~0#1, usb_acecad_probe_~err~0#1, usb_acecad_probe_~tmp___0~5#1, usb_acecad_probe_~tmp___1~2#1, usb_acecad_probe_~tmp___2~0#1, usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset, usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~tmp___5~0#1, usb_acecad_probe_~tmp___6~0#1;usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset := usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset;usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset := usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset;havoc usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset;havoc usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;havoc usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset;havoc usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset;havoc usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset;havoc usb_acecad_probe_~pipe~0#1;havoc usb_acecad_probe_~maxp~0#1;havoc usb_acecad_probe_~err~0#1;havoc usb_acecad_probe_~tmp___0~5#1;havoc usb_acecad_probe_~tmp___1~2#1;havoc usb_acecad_probe_~tmp___2~0#1;havoc usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;havoc usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset;havoc usb_acecad_probe_~tmp___5~0#1;havoc usb_acecad_probe_~tmp___6~0#1;assume { :begin_inline_interface_to_usbdev } true;interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset := usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset;havoc interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;havoc interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset, interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset, interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset := interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset;havoc interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;assume { :begin_inline_ldv_interface_to_usbdev } true;havoc ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;havoc ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset, ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset;havoc ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,008 INFO L272 TraceCheckUtils]: 56: Hoare triple {69512#(<= 0 ~ref_cnt~0)} call ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset := ldv_malloc(1822); {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,009 INFO L290 TraceCheckUtils]: 57: Hoare triple {69512#(<= 0 ~ref_cnt~0)} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,009 INFO L290 TraceCheckUtils]: 58: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume !(0 != ~tmp___0~2);call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size);~tmp~4.base, ~tmp~4.offset := #t~malloc63.base, #t~malloc63.offset;havoc #t~malloc63.base, #t~malloc63.offset;~p~0.base, ~p~0.offset := ~tmp~4.base, ~tmp~4.offset; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,009 INFO L272 TraceCheckUtils]: 59: Hoare triple {69512#(<= 0 ~ref_cnt~0)} call assume_abort_if_not((if 0 != (~p~0.base + ~p~0.offset) % 18446744073709551616 then 1 else 0)); {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,010 INFO L290 TraceCheckUtils]: 60: Hoare triple {69512#(<= 0 ~ref_cnt~0)} ~cond := #in~cond; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,010 INFO L290 TraceCheckUtils]: 61: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume !(0 == ~cond); {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,010 INFO L290 TraceCheckUtils]: 62: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume true; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,011 INFO L284 TraceCheckUtils]: 63: Hoare quadruple {69512#(<= 0 ~ref_cnt~0)} {69512#(<= 0 ~ref_cnt~0)} #551#return; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,011 INFO L290 TraceCheckUtils]: 64: Hoare triple {69512#(<= 0 ~ref_cnt~0)} #res.base, #res.offset := ~p~0.base, ~p~0.offset; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,011 INFO L290 TraceCheckUtils]: 65: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume true; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,012 INFO L284 TraceCheckUtils]: 66: Hoare quadruple {69512#(<= 0 ~ref_cnt~0)} {69512#(<= 0 ~ref_cnt~0)} #555#return; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,012 INFO L290 TraceCheckUtils]: 67: Hoare triple {69512#(<= 0 ~ref_cnt~0)} ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset := ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset;havoc ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,012 INFO L290 TraceCheckUtils]: 68: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume !(0 == (ldv_interface_to_usbdev_~result~1#1.base + ldv_interface_to_usbdev_~result~1#1.offset) % 18446744073709551616);ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset := ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,012 INFO L290 TraceCheckUtils]: 69: Hoare triple {69512#(<= 0 ~ref_cnt~0)} interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset := ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;assume { :end_inline_ldv_interface_to_usbdev } true;interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset := interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset;havoc interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset;interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset := interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,013 INFO L290 TraceCheckUtils]: 70: Hoare triple {69512#(<= 0 ~ref_cnt~0)} usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset := interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;assume { :end_inline_interface_to_usbdev } true;usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset := usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset;havoc usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset;usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset := usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;call usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset := read~$Pointer$(usb_acecad_probe_~intf#1.base, 8 + usb_acecad_probe_~intf#1.offset, 8);usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset := usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset;havoc usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset;call usb_acecad_probe_#t~mem132#1 := read~int(usb_acecad_probe_~interface~0#1.base, 4 + usb_acecad_probe_~interface~0#1.offset, 1); {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,013 INFO L290 TraceCheckUtils]: 71: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume !(1 != usb_acecad_probe_#t~mem132#1 % 256 % 4294967296);havoc usb_acecad_probe_#t~mem132#1;call usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset := read~$Pointer$(usb_acecad_probe_~interface~0#1.base, 9 + usb_acecad_probe_~interface~0#1.offset, 8);usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset := usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset;havoc usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset;assume { :begin_inline_usb_endpoint_is_int_in } true;usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset := usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_endpoint_is_int_in_#res#1;havoc usb_endpoint_is_int_in_#t~ret3#1, usb_endpoint_is_int_in_#t~ret4#1, usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset, usb_endpoint_is_int_in_~tmp~0#1, usb_endpoint_is_int_in_~tmp___0~0#1, usb_endpoint_is_int_in_~tmp___1~0#1;usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset := usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset;havoc usb_endpoint_is_int_in_~tmp~0#1;havoc usb_endpoint_is_int_in_~tmp___0~0#1;havoc usb_endpoint_is_int_in_~tmp___1~0#1;assume { :begin_inline_usb_endpoint_xfer_int } true;usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset := usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset;havoc usb_endpoint_xfer_int_#res#1;havoc usb_endpoint_xfer_int_#t~mem2#1, usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset;usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset := usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset;call usb_endpoint_xfer_int_#t~mem2#1 := read~int(usb_endpoint_xfer_int_~epd#1.base, 3 + usb_endpoint_xfer_int_~epd#1.offset, 1);usb_endpoint_xfer_int_#res#1 := (if 3 == (if 0 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 0 else (if 1 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 1 else ~bitwiseAnd(usb_endpoint_xfer_int_#t~mem2#1 % 256, 3))) then 1 else 0);havoc usb_endpoint_xfer_int_#t~mem2#1; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,013 INFO L290 TraceCheckUtils]: 72: Hoare triple {69512#(<= 0 ~ref_cnt~0)} usb_endpoint_is_int_in_#t~ret3#1 := usb_endpoint_xfer_int_#res#1;assume { :end_inline_usb_endpoint_xfer_int } true;assume -2147483648 <= usb_endpoint_is_int_in_#t~ret3#1 && usb_endpoint_is_int_in_#t~ret3#1 <= 2147483647;usb_endpoint_is_int_in_~tmp~0#1 := usb_endpoint_is_int_in_#t~ret3#1;havoc usb_endpoint_is_int_in_#t~ret3#1; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,014 INFO L290 TraceCheckUtils]: 73: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume 0 != usb_endpoint_is_int_in_~tmp~0#1;assume { :begin_inline_usb_endpoint_dir_in } true;usb_endpoint_dir_in_#in~epd#1.base, usb_endpoint_dir_in_#in~epd#1.offset := usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset;havoc usb_endpoint_dir_in_#res#1;havoc usb_endpoint_dir_in_#t~mem1#1, usb_endpoint_dir_in_~epd#1.base, usb_endpoint_dir_in_~epd#1.offset;usb_endpoint_dir_in_~epd#1.base, usb_endpoint_dir_in_~epd#1.offset := usb_endpoint_dir_in_#in~epd#1.base, usb_endpoint_dir_in_#in~epd#1.offset;call usb_endpoint_dir_in_#t~mem1#1 := read~int(usb_endpoint_dir_in_~epd#1.base, 2 + usb_endpoint_dir_in_~epd#1.offset, 1);usb_endpoint_dir_in_#res#1 := (if (if usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 <= 127 then usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 else usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 - 256) < 0 then 1 else 0);havoc usb_endpoint_dir_in_#t~mem1#1; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,014 INFO L290 TraceCheckUtils]: 74: Hoare triple {69512#(<= 0 ~ref_cnt~0)} usb_endpoint_is_int_in_#t~ret4#1 := usb_endpoint_dir_in_#res#1;assume { :end_inline_usb_endpoint_dir_in } true;assume -2147483648 <= usb_endpoint_is_int_in_#t~ret4#1 && usb_endpoint_is_int_in_#t~ret4#1 <= 2147483647;usb_endpoint_is_int_in_~tmp___0~0#1 := usb_endpoint_is_int_in_#t~ret4#1;havoc usb_endpoint_is_int_in_#t~ret4#1; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,014 INFO L290 TraceCheckUtils]: 75: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume 0 != usb_endpoint_is_int_in_~tmp___0~0#1;usb_endpoint_is_int_in_~tmp___1~0#1 := 1; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,014 INFO L290 TraceCheckUtils]: 76: Hoare triple {69512#(<= 0 ~ref_cnt~0)} usb_endpoint_is_int_in_#res#1 := usb_endpoint_is_int_in_~tmp___1~0#1; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,015 INFO L290 TraceCheckUtils]: 77: Hoare triple {69512#(<= 0 ~ref_cnt~0)} usb_acecad_probe_#t~ret134#1 := usb_endpoint_is_int_in_#res#1;assume { :end_inline_usb_endpoint_is_int_in } true;assume -2147483648 <= usb_acecad_probe_#t~ret134#1 && usb_acecad_probe_#t~ret134#1 <= 2147483647;usb_acecad_probe_~tmp___0~5#1 := usb_acecad_probe_#t~ret134#1;havoc usb_acecad_probe_#t~ret134#1; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,015 INFO L290 TraceCheckUtils]: 78: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume !(0 == usb_acecad_probe_~tmp___0~5#1);call usb_acecad_probe_#t~mem135#1 := read~int(usb_acecad_probe_~endpoint~0#1.base, 2 + usb_acecad_probe_~endpoint~0#1.offset, 1);assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_#t~mem135#1 % 256;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem45#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem45#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := (if (1 == 256 * __create_pipe_#t~mem45#1 || 0 == 256 * __create_pipe_#t~mem45#1) && 0 == 32768 * __create_pipe_~endpoint#1 then 256 * __create_pipe_#t~mem45#1 else (if 0 == 256 * __create_pipe_#t~mem45#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1) then 32768 * __create_pipe_~endpoint#1 else (if (1 == 256 * __create_pipe_#t~mem45#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1)) || ((1 == 256 * __create_pipe_#t~mem45#1 || 0 == 256 * __create_pipe_#t~mem45#1) && 1 == 32768 * __create_pipe_~endpoint#1) then 1 else ~bitwiseOr(256 * __create_pipe_#t~mem45#1, 32768 * __create_pipe_~endpoint#1))));havoc __create_pipe_#t~mem45#1; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,015 INFO L290 TraceCheckUtils]: 79: Hoare triple {69512#(<= 0 ~ref_cnt~0)} usb_acecad_probe_#t~ret136#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;usb_acecad_probe_~tmp___1~2#1 := usb_acecad_probe_#t~ret136#1;havoc usb_acecad_probe_#t~mem135#1;havoc usb_acecad_probe_#t~ret136#1;usb_acecad_probe_~pipe~0#1 := (if ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 else ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 - 4294967296);assume { :begin_inline_usb_maxpacket } true;usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset, usb_maxpacket_#in~pipe#1, usb_maxpacket_#in~is_out#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~pipe~0#1, (if 0 == (if 0 == usb_acecad_probe_~pipe~0#1 then 0 else (if 1 == usb_acecad_probe_~pipe~0#1 then 0 else ~bitwiseAnd(usb_acecad_probe_~pipe~0#1, 128))) then 1 else 0);havoc usb_maxpacket_#res#1;havoc usb_maxpacket_#t~ret47#1, usb_maxpacket_#t~ret48#1, usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset, usb_maxpacket_#t~ret50#1, usb_maxpacket_#t~ret51#1, usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset, usb_maxpacket_#t~mem53#1, usb_maxpacket_#t~nondet46#1, usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset, usb_maxpacket_~pipe#1, usb_maxpacket_~is_out#1, usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset, usb_maxpacket_~epnum~0#1, usb_maxpacket_~__ret_warn_on~0#1, usb_maxpacket_~tmp~2#1, usb_maxpacket_~__ret_warn_on___0~0#1, usb_maxpacket_~tmp___0~1#1;usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset := usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset;usb_maxpacket_~pipe#1 := usb_maxpacket_#in~pipe#1;usb_maxpacket_~is_out#1 := usb_maxpacket_#in~is_out#1;havoc usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset;havoc usb_maxpacket_~epnum~0#1;havoc usb_maxpacket_~__ret_warn_on~0#1;havoc usb_maxpacket_~tmp~2#1;havoc usb_maxpacket_~__ret_warn_on___0~0#1;havoc usb_maxpacket_~tmp___0~1#1; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,016 INFO L290 TraceCheckUtils]: 80: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume 0 == usb_maxpacket_~pipe#1 / 32768;usb_maxpacket_~epnum~0#1 := 0; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,016 INFO L290 TraceCheckUtils]: 81: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume !(0 != usb_maxpacket_~is_out#1);usb_maxpacket_~__ret_warn_on___0~0#1 := (if 0 == (if 0 == usb_maxpacket_~pipe#1 then 0 else (if 1 == usb_maxpacket_~pipe#1 then 0 else ~bitwiseAnd(usb_maxpacket_~pipe#1, 128))) then 1 else 0); {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,016 INFO L272 TraceCheckUtils]: 82: Hoare triple {69512#(<= 0 ~ref_cnt~0)} call usb_maxpacket_#t~ret50#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,017 INFO L290 TraceCheckUtils]: 83: Hoare triple {69512#(<= 0 ~ref_cnt~0)} ~exp := #in~exp;~c := #in~c;#res := ~exp; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,017 INFO L290 TraceCheckUtils]: 84: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume true; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,017 INFO L284 TraceCheckUtils]: 85: Hoare quadruple {69512#(<= 0 ~ref_cnt~0)} {69512#(<= 0 ~ref_cnt~0)} #563#return; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,017 INFO L290 TraceCheckUtils]: 86: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume -9223372036854775808 <= usb_maxpacket_#t~ret50#1 && usb_maxpacket_#t~ret50#1 <= 9223372036854775807;usb_maxpacket_~tmp___0~1#1 := usb_maxpacket_#t~ret50#1;havoc usb_maxpacket_#t~ret50#1; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,018 INFO L290 TraceCheckUtils]: 87: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume !(0 != usb_maxpacket_~tmp___0~1#1); {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,018 INFO L272 TraceCheckUtils]: 88: Hoare triple {69512#(<= 0 ~ref_cnt~0)} call usb_maxpacket_#t~ret51#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,018 INFO L290 TraceCheckUtils]: 89: Hoare triple {69512#(<= 0 ~ref_cnt~0)} ~exp := #in~exp;~c := #in~c;#res := ~exp; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,019 INFO L290 TraceCheckUtils]: 90: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume true; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,019 INFO L284 TraceCheckUtils]: 91: Hoare quadruple {69512#(<= 0 ~ref_cnt~0)} {69512#(<= 0 ~ref_cnt~0)} #567#return; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,019 INFO L290 TraceCheckUtils]: 92: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume -9223372036854775808 <= usb_maxpacket_#t~ret51#1 && usb_maxpacket_#t~ret51#1 <= 9223372036854775807;havoc usb_maxpacket_#t~ret51#1;call usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset := read~$Pointer$(usb_maxpacket_~udev#1.base, 1186 + usb_maxpacket_~udev#1.offset + 8 * (usb_maxpacket_~epnum~0#1 % 4294967296), 8);usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset := usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset;havoc usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,020 INFO L290 TraceCheckUtils]: 93: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume 0 == (usb_maxpacket_~ep~0#1.base + usb_maxpacket_~ep~0#1.offset) % 18446744073709551616;usb_maxpacket_#res#1 := 0; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,020 INFO L290 TraceCheckUtils]: 94: Hoare triple {69512#(<= 0 ~ref_cnt~0)} usb_acecad_probe_#t~ret137#1 := usb_maxpacket_#res#1;assume { :end_inline_usb_maxpacket } true;usb_acecad_probe_~tmp___2~0#1 := usb_acecad_probe_#t~ret137#1;havoc usb_acecad_probe_#t~ret137#1;usb_acecad_probe_~maxp~0#1 := usb_acecad_probe_~tmp___2~0#1 % 65536; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,020 INFO L272 TraceCheckUtils]: 95: Hoare triple {69512#(<= 0 ~ref_cnt~0)} call usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset := kzalloc(232, 208); {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,021 INFO L290 TraceCheckUtils]: 96: Hoare triple {69512#(<= 0 ~ref_cnt~0)} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,021 INFO L272 TraceCheckUtils]: 97: Hoare triple {69512#(<= 0 ~ref_cnt~0)} call __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset := ldv_malloc(__kmalloc_~size#1); {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,021 INFO L290 TraceCheckUtils]: 98: Hoare triple {69512#(<= 0 ~ref_cnt~0)} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,021 INFO L290 TraceCheckUtils]: 99: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,022 INFO L290 TraceCheckUtils]: 100: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume true; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,022 INFO L284 TraceCheckUtils]: 101: Hoare quadruple {69512#(<= 0 ~ref_cnt~0)} {69512#(<= 0 ~ref_cnt~0)} #539#return; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,022 INFO L290 TraceCheckUtils]: 102: Hoare triple {69512#(<= 0 ~ref_cnt~0)} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,023 INFO L290 TraceCheckUtils]: 103: Hoare triple {69512#(<= 0 ~ref_cnt~0)} kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,023 INFO L290 TraceCheckUtils]: 104: Hoare triple {69512#(<= 0 ~ref_cnt~0)} #t~ret58#1.base, #t~ret58#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret58#1.base, #t~ret58#1.offset;havoc #t~ret58#1.base, #t~ret58#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,023 INFO L290 TraceCheckUtils]: 105: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume true; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,024 INFO L284 TraceCheckUtils]: 106: Hoare quadruple {69512#(<= 0 ~ref_cnt~0)} {69512#(<= 0 ~ref_cnt~0)} #569#return; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,024 INFO L290 TraceCheckUtils]: 107: Hoare triple {69512#(<= 0 ~ref_cnt~0)} usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset := usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset;havoc usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset;usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset := usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;assume { :begin_inline_input_allocate_device } true;havoc input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;havoc input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,024 INFO L272 TraceCheckUtils]: 108: Hoare triple {69512#(<= 0 ~ref_cnt~0)} call input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset := kzalloc(1855, ~bitwiseOr(~bitwiseOr(16, 64), 128)); {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,025 INFO L290 TraceCheckUtils]: 109: Hoare triple {69512#(<= 0 ~ref_cnt~0)} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,025 INFO L272 TraceCheckUtils]: 110: Hoare triple {69512#(<= 0 ~ref_cnt~0)} call __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset := ldv_malloc(__kmalloc_~size#1); {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,025 INFO L290 TraceCheckUtils]: 111: Hoare triple {69512#(<= 0 ~ref_cnt~0)} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,026 INFO L290 TraceCheckUtils]: 112: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,026 INFO L290 TraceCheckUtils]: 113: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume true; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,026 INFO L284 TraceCheckUtils]: 114: Hoare quadruple {69512#(<= 0 ~ref_cnt~0)} {69512#(<= 0 ~ref_cnt~0)} #539#return; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,027 INFO L290 TraceCheckUtils]: 115: Hoare triple {69512#(<= 0 ~ref_cnt~0)} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,027 INFO L290 TraceCheckUtils]: 116: Hoare triple {69512#(<= 0 ~ref_cnt~0)} kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,027 INFO L290 TraceCheckUtils]: 117: Hoare triple {69512#(<= 0 ~ref_cnt~0)} #t~ret58#1.base, #t~ret58#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret58#1.base, #t~ret58#1.offset;havoc #t~ret58#1.base, #t~ret58#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,027 INFO L290 TraceCheckUtils]: 118: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume true; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,028 INFO L284 TraceCheckUtils]: 119: Hoare quadruple {69512#(<= 0 ~ref_cnt~0)} {69512#(<= 0 ~ref_cnt~0)} #571#return; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,028 INFO L290 TraceCheckUtils]: 120: Hoare triple {69512#(<= 0 ~ref_cnt~0)} input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset := input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset;havoc input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,028 INFO L290 TraceCheckUtils]: 121: Hoare triple {69512#(<= 0 ~ref_cnt~0)} usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset := input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;assume { :end_inline_input_allocate_device } true;usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset := usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset;havoc usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,029 INFO L290 TraceCheckUtils]: 122: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume !(0 == (usb_acecad_probe_~acecad~3#1.base + usb_acecad_probe_~acecad~3#1.offset) % 18446744073709551616 || 0 == (usb_acecad_probe_~input_dev~0#1.base + usb_acecad_probe_~input_dev~0#1.offset) % 18446744073709551616);assume { :begin_inline_usb_alloc_coherent } true;usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset, usb_alloc_coherent_#in~arg1#1, usb_alloc_coherent_#in~arg2#1, usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, 8, 208, usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset;havoc usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;havoc usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset, usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset, usb_alloc_coherent_~arg1#1, usb_alloc_coherent_~arg2#1, usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset;usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset := usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset;usb_alloc_coherent_~arg1#1 := usb_alloc_coherent_#in~arg1#1;usb_alloc_coherent_~arg2#1 := usb_alloc_coherent_#in~arg2#1;usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset := usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,029 INFO L272 TraceCheckUtils]: 123: Hoare triple {69512#(<= 0 ~ref_cnt~0)} call usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset := ldv_malloc(0); {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,029 INFO L290 TraceCheckUtils]: 124: Hoare triple {69512#(<= 0 ~ref_cnt~0)} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,030 INFO L290 TraceCheckUtils]: 125: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume !(0 != ~tmp___0~2);call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size);~tmp~4.base, ~tmp~4.offset := #t~malloc63.base, #t~malloc63.offset;havoc #t~malloc63.base, #t~malloc63.offset;~p~0.base, ~p~0.offset := ~tmp~4.base, ~tmp~4.offset; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,030 INFO L272 TraceCheckUtils]: 126: Hoare triple {69512#(<= 0 ~ref_cnt~0)} call assume_abort_if_not((if 0 != (~p~0.base + ~p~0.offset) % 18446744073709551616 then 1 else 0)); {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,030 INFO L290 TraceCheckUtils]: 127: Hoare triple {69512#(<= 0 ~ref_cnt~0)} ~cond := #in~cond; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,030 INFO L290 TraceCheckUtils]: 128: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume !(0 == ~cond); {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,031 INFO L290 TraceCheckUtils]: 129: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume true; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,031 INFO L284 TraceCheckUtils]: 130: Hoare quadruple {69512#(<= 0 ~ref_cnt~0)} {69512#(<= 0 ~ref_cnt~0)} #551#return; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,031 INFO L290 TraceCheckUtils]: 131: Hoare triple {69512#(<= 0 ~ref_cnt~0)} #res.base, #res.offset := ~p~0.base, ~p~0.offset; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,032 INFO L290 TraceCheckUtils]: 132: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume true; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,032 INFO L284 TraceCheckUtils]: 133: Hoare quadruple {69512#(<= 0 ~ref_cnt~0)} {69512#(<= 0 ~ref_cnt~0)} #573#return; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,032 INFO L290 TraceCheckUtils]: 134: Hoare triple {69512#(<= 0 ~ref_cnt~0)} usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset := usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset;havoc usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,032 INFO L290 TraceCheckUtils]: 135: Hoare triple {69512#(<= 0 ~ref_cnt~0)} usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset := usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;assume { :end_inline_usb_alloc_coherent } true;usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset := usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset;havoc usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset;call write~$Pointer$(usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8); {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,033 INFO L290 TraceCheckUtils]: 136: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume !(0 == (usb_acecad_probe_#t~mem141#1.base + usb_acecad_probe_#t~mem141#1.offset) % 18446744073709551616);havoc usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset;assume { :begin_inline_ldv_usb_alloc_urb_5 } true;ldv_usb_alloc_urb_5_#in~ldv_func_arg1#1, ldv_usb_alloc_urb_5_#in~ldv_func_arg2#1 := 0, 208;havoc ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset, ldv_usb_alloc_urb_5_~ldv_func_arg1#1, ldv_usb_alloc_urb_5_~ldv_func_arg2#1, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset, ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;ldv_usb_alloc_urb_5_~ldv_func_arg1#1 := ldv_usb_alloc_urb_5_#in~ldv_func_arg1#1;ldv_usb_alloc_urb_5_~ldv_func_arg2#1 := ldv_usb_alloc_urb_5_#in~ldv_func_arg2#1;havoc ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset;havoc ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;assume { :begin_inline_usb_alloc_urb } true;usb_alloc_urb_#in~arg0#1, usb_alloc_urb_#in~arg1#1 := ldv_usb_alloc_urb_5_~ldv_func_arg1#1, ldv_usb_alloc_urb_5_~ldv_func_arg2#1;havoc usb_alloc_urb_#res#1.base, usb_alloc_urb_#res#1.offset;havoc usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset, usb_alloc_urb_~arg0#1, usb_alloc_urb_~arg1#1;usb_alloc_urb_~arg0#1 := usb_alloc_urb_#in~arg0#1;usb_alloc_urb_~arg1#1 := usb_alloc_urb_#in~arg1#1; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,033 INFO L272 TraceCheckUtils]: 137: Hoare triple {69512#(<= 0 ~ref_cnt~0)} call usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset := ldv_malloc(180); {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,033 INFO L290 TraceCheckUtils]: 138: Hoare triple {69512#(<= 0 ~ref_cnt~0)} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,034 INFO L290 TraceCheckUtils]: 139: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,034 INFO L290 TraceCheckUtils]: 140: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume true; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,034 INFO L284 TraceCheckUtils]: 141: Hoare quadruple {69512#(<= 0 ~ref_cnt~0)} {69512#(<= 0 ~ref_cnt~0)} #575#return; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,035 INFO L290 TraceCheckUtils]: 142: Hoare triple {69512#(<= 0 ~ref_cnt~0)} usb_alloc_urb_#res#1.base, usb_alloc_urb_#res#1.offset := usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset;havoc usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,035 INFO L290 TraceCheckUtils]: 143: Hoare triple {69512#(<= 0 ~ref_cnt~0)} ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset := usb_alloc_urb_#res#1.base, usb_alloc_urb_#res#1.offset;assume { :end_inline_usb_alloc_urb } true;ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset := ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset;ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset := ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;assume { :begin_inline_ldv_alloc_urb } true;ldv_alloc_urb_#in~res#1.base, ldv_alloc_urb_#in~res#1.offset := ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset;havoc ldv_alloc_urb_~res#1.base, ldv_alloc_urb_~res#1.offset;ldv_alloc_urb_~res#1.base, ldv_alloc_urb_~res#1.offset := ldv_alloc_urb_#in~res#1.base, ldv_alloc_urb_#in~res#1.offset; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,035 INFO L290 TraceCheckUtils]: 144: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume 0 != (ldv_alloc_urb_~res#1.base + ldv_alloc_urb_~res#1.offset) % 18446744073709551616;~URB_STATE~0 := 1 + ~URB_STATE~0; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,035 INFO L290 TraceCheckUtils]: 145: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume { :end_inline_ldv_alloc_urb } true;ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset := ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,036 INFO L290 TraceCheckUtils]: 146: Hoare triple {69512#(<= 0 ~ref_cnt~0)} usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset := ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;assume { :end_inline_ldv_usb_alloc_urb_5 } true;call write~$Pointer$(usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset, usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8);havoc usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset;call usb_acecad_probe_#t~mem143#1.base, usb_acecad_probe_#t~mem143#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8); {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,036 INFO L290 TraceCheckUtils]: 147: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume !(0 == (usb_acecad_probe_#t~mem143#1.base + usb_acecad_probe_#t~mem143#1.offset) % 18446744073709551616);havoc usb_acecad_probe_#t~mem143#1.base, usb_acecad_probe_#t~mem143#1.offset;call write~$Pointer$(usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~acecad~3#1.base, 192 + usb_acecad_probe_~acecad~3#1.offset, 8);call write~$Pointer$(usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset, usb_acecad_probe_~acecad~3#1.base, 200 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem144#1.base, usb_acecad_probe_#t~mem144#1.offset := read~$Pointer$(usb_acecad_probe_~dev~1#1.base, 1472 + usb_acecad_probe_~dev~1#1.offset, 8); {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,036 INFO L290 TraceCheckUtils]: 148: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume !(0 != (usb_acecad_probe_#t~mem144#1.base + usb_acecad_probe_#t~mem144#1.offset) % 18446744073709551616);havoc usb_acecad_probe_#t~mem144#1.base, usb_acecad_probe_#t~mem144#1.offset; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,036 INFO L290 TraceCheckUtils]: 149: Hoare triple {69512#(<= 0 ~ref_cnt~0)} call usb_acecad_probe_#t~mem147#1.base, usb_acecad_probe_#t~mem147#1.offset := read~$Pointer$(usb_acecad_probe_~dev~1#1.base, 1464 + usb_acecad_probe_~dev~1#1.offset, 8); {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,037 INFO L290 TraceCheckUtils]: 150: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume !(0 != (usb_acecad_probe_#t~mem147#1.base + usb_acecad_probe_#t~mem147#1.offset) % 18446744073709551616);havoc usb_acecad_probe_#t~mem147#1.base, usb_acecad_probe_#t~mem147#1.offset; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,037 INFO L290 TraceCheckUtils]: 151: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume { :begin_inline_usb_make_path } true;usb_make_path_#in~dev#1.base, usb_make_path_#in~dev#1.offset, usb_make_path_#in~buf#1.base, usb_make_path_#in~buf#1.offset, usb_make_path_#in~size#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~acecad~3#1.base, 128 + usb_acecad_probe_~acecad~3#1.offset, 64;havoc usb_make_path_#res#1;havoc usb_make_path_#t~nondet24#1, usb_make_path_#t~mem25#1.base, usb_make_path_#t~mem25#1.offset, usb_make_path_#t~mem26#1.base, usb_make_path_#t~mem26#1.offset, usb_make_path_#t~ite27#1, usb_make_path_~dev#1.base, usb_make_path_~dev#1.offset, usb_make_path_~buf#1.base, usb_make_path_~buf#1.offset, usb_make_path_~size#1, usb_make_path_~actual~0#1;usb_make_path_~dev#1.base, usb_make_path_~dev#1.offset := usb_make_path_#in~dev#1.base, usb_make_path_#in~dev#1.offset;usb_make_path_~buf#1.base, usb_make_path_~buf#1.offset := usb_make_path_#in~buf#1.base, usb_make_path_#in~buf#1.offset;usb_make_path_~size#1 := usb_make_path_#in~size#1;havoc usb_make_path_~actual~0#1;havoc usb_make_path_#t~nondet24#1;call usb_make_path_#t~mem25#1.base, usb_make_path_#t~mem25#1.offset := read~$Pointer$(usb_make_path_~dev#1.base, 60 + usb_make_path_~dev#1.offset, 8);call usb_make_path_#t~mem26#1.base, usb_make_path_#t~mem26#1.offset := read~$Pointer$(usb_make_path_#t~mem25#1.base, 12 + usb_make_path_#t~mem25#1.offset, 8);usb_make_path_~actual~0#1 := usb_make_path_#t~nondet24#1;havoc usb_make_path_#t~mem25#1.base, usb_make_path_#t~mem25#1.offset;havoc usb_make_path_#t~mem26#1.base, usb_make_path_#t~mem26#1.offset; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,037 INFO L290 TraceCheckUtils]: 152: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume (if usb_make_path_~size#1 % 18446744073709551616 % 4294967296 <= 2147483647 then usb_make_path_~size#1 % 18446744073709551616 % 4294967296 else usb_make_path_~size#1 % 18446744073709551616 % 4294967296 - 4294967296) > usb_make_path_~actual~0#1;usb_make_path_#t~ite27#1 := usb_make_path_~actual~0#1; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,037 INFO L290 TraceCheckUtils]: 153: Hoare triple {69512#(<= 0 ~ref_cnt~0)} usb_make_path_#res#1 := usb_make_path_#t~ite27#1;havoc usb_make_path_#t~ite27#1; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,038 INFO L290 TraceCheckUtils]: 154: Hoare triple {69512#(<= 0 ~ref_cnt~0)} usb_acecad_probe_#t~ret152#1 := usb_make_path_#res#1;assume { :end_inline_usb_make_path } true;assume -2147483648 <= usb_acecad_probe_#t~ret152#1 && usb_acecad_probe_#t~ret152#1 <= 2147483647;havoc usb_acecad_probe_#t~ret152#1; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,038 INFO L272 TraceCheckUtils]: 155: Hoare triple {69512#(<= 0 ~ref_cnt~0)} call usb_acecad_probe_#t~ret153#1 := strlcat(usb_acecad_probe_~acecad~3#1.base, 128 + usb_acecad_probe_~acecad~3#1.offset, 9, 0, 64); {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,039 INFO L290 TraceCheckUtils]: 156: Hoare triple {69512#(<= 0 ~ref_cnt~0)} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1.base, ~arg1.offset := #in~arg1.base, #in~arg1.offset;~arg2 := #in~arg2;#res := #t~nondet213;havoc #t~nondet213; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,039 INFO L290 TraceCheckUtils]: 157: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume true; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,039 INFO L284 TraceCheckUtils]: 158: Hoare quadruple {69512#(<= 0 ~ref_cnt~0)} {69512#(<= 0 ~ref_cnt~0)} #581#return; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,040 INFO L290 TraceCheckUtils]: 159: Hoare triple {69512#(<= 0 ~ref_cnt~0)} havoc usb_acecad_probe_#t~ret153#1;call write~$Pointer$(usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset, usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset, 8);call write~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 128 + usb_acecad_probe_~acecad~3#1.offset, usb_acecad_probe_~input_dev~0#1.base, 8 + usb_acecad_probe_~input_dev~0#1.offset, 8);assume { :begin_inline_usb_to_input_id } true;usb_to_input_id_#in~dev#1.base, usb_to_input_id_#in~dev#1.offset, usb_to_input_id_#in~id#1.base, usb_to_input_id_#in~id#1.offset := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~input_dev~0#1.base, 24 + usb_acecad_probe_~input_dev~0#1.offset;havoc usb_to_input_id_#t~mem85#1, usb_to_input_id_#t~mem86#1, usb_to_input_id_#t~mem87#1, usb_to_input_id_~dev#1.base, usb_to_input_id_~dev#1.offset, usb_to_input_id_~id#1.base, usb_to_input_id_~id#1.offset;usb_to_input_id_~dev#1.base, usb_to_input_id_~dev#1.offset := usb_to_input_id_#in~dev#1.base, usb_to_input_id_#in~dev#1.offset;usb_to_input_id_~id#1.base, usb_to_input_id_~id#1.offset := usb_to_input_id_#in~id#1.base, usb_to_input_id_#in~id#1.offset;call write~int(3, usb_to_input_id_~id#1.base, usb_to_input_id_~id#1.offset, 2);call usb_to_input_id_#t~mem85#1 := read~int(usb_to_input_id_~dev#1.base, 1160 + usb_to_input_id_~dev#1.offset, 2);call write~int(usb_to_input_id_#t~mem85#1, usb_to_input_id_~id#1.base, 2 + usb_to_input_id_~id#1.offset, 2);havoc usb_to_input_id_#t~mem85#1;call usb_to_input_id_#t~mem86#1 := read~int(usb_to_input_id_~dev#1.base, 1162 + usb_to_input_id_~dev#1.offset, 2);call write~int(usb_to_input_id_#t~mem86#1, usb_to_input_id_~id#1.base, 4 + usb_to_input_id_~id#1.offset, 2);havoc usb_to_input_id_#t~mem86#1;call usb_to_input_id_#t~mem87#1 := read~int(usb_to_input_id_~dev#1.base, 1164 + usb_to_input_id_~dev#1.offset, 2);call write~int(usb_to_input_id_#t~mem87#1, usb_to_input_id_~id#1.base, 6 + usb_to_input_id_~id#1.offset, 2);havoc usb_to_input_id_#t~mem87#1; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,040 INFO L290 TraceCheckUtils]: 160: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume { :end_inline_usb_to_input_id } true;call write~$Pointer$(usb_acecad_probe_~intf#1.base, 44 + usb_acecad_probe_~intf#1.offset, usb_acecad_probe_~input_dev~0#1.base, 802 + usb_acecad_probe_~input_dev~0#1.offset, 8);assume { :begin_inline_input_set_drvdata } true;input_set_drvdata_#in~dev#1.base, input_set_drvdata_#in~dev#1.offset, input_set_drvdata_#in~data#1.base, input_set_drvdata_#in~data#1.offset := usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset, usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset;havoc input_set_drvdata_~dev#1.base, input_set_drvdata_~dev#1.offset, input_set_drvdata_~data#1.base, input_set_drvdata_~data#1.offset;input_set_drvdata_~dev#1.base, input_set_drvdata_~dev#1.offset := input_set_drvdata_#in~dev#1.base, input_set_drvdata_#in~dev#1.offset;input_set_drvdata_~data#1.base, input_set_drvdata_~data#1.offset := input_set_drvdata_#in~data#1.base, input_set_drvdata_#in~data#1.offset;assume { :begin_inline_dev_set_drvdata } true;dev_set_drvdata_#in~arg0#1.base, dev_set_drvdata_#in~arg0#1.offset, dev_set_drvdata_#in~arg1#1.base, dev_set_drvdata_#in~arg1#1.offset := input_set_drvdata_~dev#1.base, 802 + input_set_drvdata_~dev#1.offset, input_set_drvdata_~data#1.base, input_set_drvdata_~data#1.offset;havoc dev_set_drvdata_~arg0#1.base, dev_set_drvdata_~arg0#1.offset, dev_set_drvdata_~arg1#1.base, dev_set_drvdata_~arg1#1.offset;dev_set_drvdata_~arg0#1.base, dev_set_drvdata_~arg0#1.offset := dev_set_drvdata_#in~arg0#1.base, dev_set_drvdata_#in~arg0#1.offset;dev_set_drvdata_~arg1#1.base, dev_set_drvdata_~arg1#1.offset := dev_set_drvdata_#in~arg1#1.base, dev_set_drvdata_#in~arg1#1.offset; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,040 INFO L290 TraceCheckUtils]: 161: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume { :end_inline_dev_set_drvdata } true; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,041 INFO L290 TraceCheckUtils]: 162: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume { :end_inline_input_set_drvdata } true;call write~$Pointer$(#funAddr~usb_acecad_open.base, #funAddr~usb_acecad_open.offset, usb_acecad_probe_~input_dev~0#1.base, 540 + usb_acecad_probe_~input_dev~0#1.offset, 8);call write~$Pointer$(#funAddr~usb_acecad_close.base, #funAddr~usb_acecad_close.offset, usb_acecad_probe_~input_dev~0#1.base, 548 + usb_acecad_probe_~input_dev~0#1.offset, 8);call write~int(10, usb_acecad_probe_~input_dev~0#1.base, 32 + usb_acecad_probe_~input_dev~0#1.offset, 8);call write~int(7169, usb_acecad_probe_~input_dev~0#1.base, 80 + usb_acecad_probe_~input_dev~0#1.offset, 8);call usb_acecad_probe_#t~mem154#1 := read~int(usb_acecad_probe_~id#1.base, 16 + usb_acecad_probe_~id#1.offset, 8);usb_acecad_probe_#t~switch155#1 := 0 == usb_acecad_probe_#t~mem154#1; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,041 INFO L290 TraceCheckUtils]: 163: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume !usb_acecad_probe_#t~switch155#1;usb_acecad_probe_#t~switch155#1 := usb_acecad_probe_#t~switch155#1 || 1 == usb_acecad_probe_#t~mem154#1; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,041 INFO L290 TraceCheckUtils]: 164: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume !usb_acecad_probe_#t~switch155#1; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,041 INFO L290 TraceCheckUtils]: 165: Hoare triple {69512#(<= 0 ~ref_cnt~0)} havoc usb_acecad_probe_#t~mem154#1;havoc usb_acecad_probe_#t~switch155#1; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,042 INFO L290 TraceCheckUtils]: 166: Hoare triple {69512#(<= 0 ~ref_cnt~0)} call usb_acecad_probe_#t~mem164#1.base, usb_acecad_probe_#t~mem164#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem165#1.base, usb_acecad_probe_#t~mem165#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8); {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,042 INFO L290 TraceCheckUtils]: 167: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume 8 < usb_acecad_probe_~maxp~0#1;usb_acecad_probe_#t~ite166#1 := 8; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,042 INFO L290 TraceCheckUtils]: 168: Hoare triple {69512#(<= 0 ~ref_cnt~0)} call usb_acecad_probe_#t~mem167#1 := read~int(usb_acecad_probe_~endpoint~0#1.base, 6 + usb_acecad_probe_~endpoint~0#1.offset, 1);assume { :begin_inline_ldv_usb_fill_int_urb_6 } true;ldv_usb_fill_int_urb_6_#in~urb#1.base, ldv_usb_fill_int_urb_6_#in~urb#1.offset, ldv_usb_fill_int_urb_6_#in~dev#1.base, ldv_usb_fill_int_urb_6_#in~dev#1.offset, ldv_usb_fill_int_urb_6_#in~pipe#1, ldv_usb_fill_int_urb_6_#in~transfer_buffer#1.base, ldv_usb_fill_int_urb_6_#in~transfer_buffer#1.offset, ldv_usb_fill_int_urb_6_#in~buffer_length#1, ldv_usb_fill_int_urb_6_#in~complete_fn#1.base, ldv_usb_fill_int_urb_6_#in~complete_fn#1.offset, ldv_usb_fill_int_urb_6_#in~context#1.base, ldv_usb_fill_int_urb_6_#in~context#1.offset, ldv_usb_fill_int_urb_6_#in~interval#1 := usb_acecad_probe_#t~mem164#1.base, usb_acecad_probe_#t~mem164#1.offset, usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~pipe~0#1, usb_acecad_probe_#t~mem165#1.base, usb_acecad_probe_#t~mem165#1.offset, usb_acecad_probe_#t~ite166#1, #funAddr~usb_acecad_irq.base, #funAddr~usb_acecad_irq.offset, usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset, usb_acecad_probe_#t~mem167#1 % 256;havoc ldv_usb_fill_int_urb_6_~urb#1.base, ldv_usb_fill_int_urb_6_~urb#1.offset, ldv_usb_fill_int_urb_6_~dev#1.base, ldv_usb_fill_int_urb_6_~dev#1.offset, ldv_usb_fill_int_urb_6_~pipe#1, ldv_usb_fill_int_urb_6_~transfer_buffer#1.base, ldv_usb_fill_int_urb_6_~transfer_buffer#1.offset, ldv_usb_fill_int_urb_6_~buffer_length#1, ldv_usb_fill_int_urb_6_~complete_fn#1.base, ldv_usb_fill_int_urb_6_~complete_fn#1.offset, ldv_usb_fill_int_urb_6_~context#1.base, ldv_usb_fill_int_urb_6_~context#1.offset, ldv_usb_fill_int_urb_6_~interval#1;ldv_usb_fill_int_urb_6_~urb#1.base, ldv_usb_fill_int_urb_6_~urb#1.offset := ldv_usb_fill_int_urb_6_#in~urb#1.base, ldv_usb_fill_int_urb_6_#in~urb#1.offset;ldv_usb_fill_int_urb_6_~dev#1.base, ldv_usb_fill_int_urb_6_~dev#1.offset := ldv_usb_fill_int_urb_6_#in~dev#1.base, ldv_usb_fill_int_urb_6_#in~dev#1.offset;ldv_usb_fill_int_urb_6_~pipe#1 := ldv_usb_fill_int_urb_6_#in~pipe#1;ldv_usb_fill_int_urb_6_~transfer_buffer#1.base, ldv_usb_fill_int_urb_6_~transfer_buffer#1.offset := ldv_usb_fill_int_urb_6_#in~transfer_buffer#1.base, ldv_usb_fill_int_urb_6_#in~transfer_buffer#1.offset;ldv_usb_fill_int_urb_6_~buffer_length#1 := ldv_usb_fill_int_urb_6_#in~buffer_length#1;ldv_usb_fill_int_urb_6_~complete_fn#1.base, ldv_usb_fill_int_urb_6_~complete_fn#1.offset := ldv_usb_fill_int_urb_6_#in~complete_fn#1.base, ldv_usb_fill_int_urb_6_#in~complete_fn#1.offset;ldv_usb_fill_int_urb_6_~context#1.base, ldv_usb_fill_int_urb_6_~context#1.offset := ldv_usb_fill_int_urb_6_#in~context#1.base, ldv_usb_fill_int_urb_6_#in~context#1.offset;ldv_usb_fill_int_urb_6_~interval#1 := ldv_usb_fill_int_urb_6_#in~interval#1;assume { :begin_inline_ldv_fill_int_urb } true;ldv_fill_int_urb_#in~complete_fn#1.base, ldv_fill_int_urb_#in~complete_fn#1.offset := ldv_usb_fill_int_urb_6_~complete_fn#1.base, ldv_usb_fill_int_urb_6_~complete_fn#1.offset;havoc ldv_fill_int_urb_#t~ret201#1.base, ldv_fill_int_urb_#t~ret201#1.offset, ldv_fill_int_urb_#t~ret202#1, ldv_fill_int_urb_~complete_fn#1.base, ldv_fill_int_urb_~complete_fn#1.offset, ldv_fill_int_urb_~value~0#1.base, ldv_fill_int_urb_~value~0#1.offset, ldv_fill_int_urb_~tmp___0~7#1;ldv_fill_int_urb_~complete_fn#1.base, ldv_fill_int_urb_~complete_fn#1.offset := ldv_fill_int_urb_#in~complete_fn#1.base, ldv_fill_int_urb_#in~complete_fn#1.offset;havoc ldv_fill_int_urb_~value~0#1.base, ldv_fill_int_urb_~value~0#1.offset;havoc ldv_fill_int_urb_~tmp___0~7#1; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,042 INFO L272 TraceCheckUtils]: 169: Hoare triple {69512#(<= 0 ~ref_cnt~0)} call ldv_fill_int_urb_#t~ret201#1.base, ldv_fill_int_urb_#t~ret201#1.offset := ldv_malloc(180); {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,043 INFO L290 TraceCheckUtils]: 170: Hoare triple {69512#(<= 0 ~ref_cnt~0)} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,043 INFO L290 TraceCheckUtils]: 171: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,043 INFO L290 TraceCheckUtils]: 172: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume true; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,044 INFO L284 TraceCheckUtils]: 173: Hoare quadruple {69512#(<= 0 ~ref_cnt~0)} {69512#(<= 0 ~ref_cnt~0)} #595#return; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,044 INFO L290 TraceCheckUtils]: 174: Hoare triple {69512#(<= 0 ~ref_cnt~0)} ldv_fill_int_urb_~value~0#1.base, ldv_fill_int_urb_~value~0#1.offset := ldv_fill_int_urb_#t~ret201#1.base, ldv_fill_int_urb_#t~ret201#1.offset;havoc ldv_fill_int_urb_#t~ret201#1.base, ldv_fill_int_urb_#t~ret201#1.offset; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,044 INFO L290 TraceCheckUtils]: 175: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume !(0 == (ldv_fill_int_urb_~value~0#1.base + ldv_fill_int_urb_~value~0#1.offset) % 18446744073709551616); {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,044 INFO L272 TraceCheckUtils]: 176: Hoare triple {69512#(<= 0 ~ref_cnt~0)} call ldv_fill_int_urb_#t~ret202#1 := ldv_undef_int(); {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,045 INFO L290 TraceCheckUtils]: 177: Hoare triple {69512#(<= 0 ~ref_cnt~0)} havoc ~tmp~8;assume -2147483648 <= #t~nondet68 && #t~nondet68 <= 2147483647;~tmp~8 := #t~nondet68;havoc #t~nondet68;#res := ~tmp~8; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,045 INFO L290 TraceCheckUtils]: 178: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume true; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,045 INFO L284 TraceCheckUtils]: 179: Hoare quadruple {69512#(<= 0 ~ref_cnt~0)} {69512#(<= 0 ~ref_cnt~0)} #599#return; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,046 INFO L290 TraceCheckUtils]: 180: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume -2147483648 <= ldv_fill_int_urb_#t~ret202#1 && ldv_fill_int_urb_#t~ret202#1 <= 2147483647;ldv_fill_int_urb_~tmp___0~7#1 := ldv_fill_int_urb_#t~ret202#1;havoc ldv_fill_int_urb_#t~ret202#1; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,046 INFO L290 TraceCheckUtils]: 181: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume !(0 != ldv_fill_int_urb_~tmp___0~7#1); {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,046 INFO L290 TraceCheckUtils]: 182: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume { :end_inline_ldv_fill_int_urb } true; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,046 INFO L290 TraceCheckUtils]: 183: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume { :end_inline_ldv_usb_fill_int_urb_6 } true;havoc usb_acecad_probe_#t~mem164#1.base, usb_acecad_probe_#t~mem164#1.offset;havoc usb_acecad_probe_#t~mem165#1.base, usb_acecad_probe_#t~mem165#1.offset;havoc usb_acecad_probe_#t~ite166#1;havoc usb_acecad_probe_#t~mem167#1;call usb_acecad_probe_#t~mem168#1.base, usb_acecad_probe_#t~mem168#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem169#1 := read~int(usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset, 8);call write~int(usb_acecad_probe_#t~mem169#1, usb_acecad_probe_#t~mem168#1.base, 104 + usb_acecad_probe_#t~mem168#1.offset, 8);havoc usb_acecad_probe_#t~mem168#1.base, usb_acecad_probe_#t~mem168#1.offset;havoc usb_acecad_probe_#t~mem169#1;call usb_acecad_probe_#t~mem170#1.base, usb_acecad_probe_#t~mem170#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem171#1.base, usb_acecad_probe_#t~mem171#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem172#1 := read~int(usb_acecad_probe_#t~mem171#1.base, 92 + usb_acecad_probe_#t~mem171#1.offset, 4);call write~int(~bitwiseOr(usb_acecad_probe_#t~mem172#1, 4), usb_acecad_probe_#t~mem170#1.base, 92 + usb_acecad_probe_#t~mem170#1.offset, 4);havoc usb_acecad_probe_#t~mem170#1.base, usb_acecad_probe_#t~mem170#1.offset;havoc usb_acecad_probe_#t~mem171#1.base, usb_acecad_probe_#t~mem171#1.offset;havoc usb_acecad_probe_#t~mem172#1;call usb_acecad_probe_#t~mem173#1.base, usb_acecad_probe_#t~mem173#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 200 + usb_acecad_probe_~acecad~3#1.offset, 8);assume { :begin_inline_input_register_device } true;input_register_device_#in~arg0#1.base, input_register_device_#in~arg0#1.offset := usb_acecad_probe_#t~mem173#1.base, usb_acecad_probe_#t~mem173#1.offset;havoc input_register_device_#res#1;havoc input_register_device_#t~nondet211#1, input_register_device_~arg0#1.base, input_register_device_~arg0#1.offset;input_register_device_~arg0#1.base, input_register_device_~arg0#1.offset := input_register_device_#in~arg0#1.base, input_register_device_#in~arg0#1.offset;assume -2147483648 <= input_register_device_#t~nondet211#1 && input_register_device_#t~nondet211#1 <= 2147483647;input_register_device_#res#1 := input_register_device_#t~nondet211#1;havoc input_register_device_#t~nondet211#1; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,047 INFO L290 TraceCheckUtils]: 184: Hoare triple {69512#(<= 0 ~ref_cnt~0)} usb_acecad_probe_#t~ret174#1 := input_register_device_#res#1;assume { :end_inline_input_register_device } true;assume -2147483648 <= usb_acecad_probe_#t~ret174#1 && usb_acecad_probe_#t~ret174#1 <= 2147483647;usb_acecad_probe_~err~0#1 := usb_acecad_probe_#t~ret174#1;havoc usb_acecad_probe_#t~mem173#1.base, usb_acecad_probe_#t~mem173#1.offset;havoc usb_acecad_probe_#t~ret174#1; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,047 INFO L290 TraceCheckUtils]: 185: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume !(0 != usb_acecad_probe_~err~0#1); {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,047 INFO L272 TraceCheckUtils]: 186: Hoare triple {69512#(<= 0 ~ref_cnt~0)} call ldv_usb_set_intfdata_7(usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset, usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset); {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,048 INFO L290 TraceCheckUtils]: 187: Hoare triple {69512#(<= 0 ~ref_cnt~0)} ~intf#1.base, ~intf#1.offset := #in~intf#1.base, #in~intf#1.offset;~data#1.base, ~data#1.offset := #in~data#1.base, #in~data#1.offset;assume { :begin_inline_ldv_usb_set_intfdata } true;ldv_usb_set_intfdata_#in~data#1.base, ldv_usb_set_intfdata_#in~data#1.offset := ~data#1.base, ~data#1.offset;havoc ldv_usb_set_intfdata_~data#1.base, ldv_usb_set_intfdata_~data#1.offset;ldv_usb_set_intfdata_~data#1.base, ldv_usb_set_intfdata_~data#1.offset := ldv_usb_set_intfdata_#in~data#1.base, ldv_usb_set_intfdata_#in~data#1.offset;~usb_intfdata~0.base, ~usb_intfdata~0.offset := ldv_usb_set_intfdata_~data#1.base, ldv_usb_set_intfdata_~data#1.offset; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,048 INFO L290 TraceCheckUtils]: 188: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume { :end_inline_ldv_usb_set_intfdata } true; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,048 INFO L290 TraceCheckUtils]: 189: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume true; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,049 INFO L284 TraceCheckUtils]: 190: Hoare quadruple {69512#(<= 0 ~ref_cnt~0)} {69512#(<= 0 ~ref_cnt~0)} #601#return; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,049 INFO L290 TraceCheckUtils]: 191: Hoare triple {69512#(<= 0 ~ref_cnt~0)} usb_acecad_probe_#res#1 := 0; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,049 INFO L290 TraceCheckUtils]: 192: Hoare triple {69512#(<= 0 ~ref_cnt~0)} main_#t~ret191#1 := usb_acecad_probe_#res#1;assume { :end_inline_usb_acecad_probe } true;assume -2147483648 <= main_#t~ret191#1 && main_#t~ret191#1 <= 2147483647;~ldv_retval_0~0 := main_#t~ret191#1;havoc main_#t~ret191#1; {69512#(<= 0 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,050 INFO L290 TraceCheckUtils]: 193: Hoare triple {69512#(<= 0 ~ref_cnt~0)} assume 0 == ~ldv_retval_0~0;~ldv_state_variable_1~0 := 2;~ref_cnt~0 := 1 + ~ref_cnt~0; {69420#(<= 1 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,050 INFO L290 TraceCheckUtils]: 194: Hoare triple {69420#(<= 1 ~ref_cnt~0)} assume -2147483648 <= main_#t~nondet187#1 && main_#t~nondet187#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet187#1;havoc main_#t~nondet187#1;main_#t~switch188#1 := 0 == main_~tmp___0~6#1; {69420#(<= 1 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,050 INFO L290 TraceCheckUtils]: 195: Hoare triple {69420#(<= 1 ~ref_cnt~0)} assume !main_#t~switch188#1;main_#t~switch188#1 := main_#t~switch188#1 || 1 == main_~tmp___0~6#1; {69420#(<= 1 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,051 INFO L290 TraceCheckUtils]: 196: Hoare triple {69420#(<= 1 ~ref_cnt~0)} assume main_#t~switch188#1; {69420#(<= 1 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,051 INFO L290 TraceCheckUtils]: 197: Hoare triple {69420#(<= 1 ~ref_cnt~0)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet192#1 && main_#t~nondet192#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet192#1;havoc main_#t~nondet192#1;main_#t~switch193#1 := 0 == main_~tmp___2~1#1; {69420#(<= 1 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,051 INFO L290 TraceCheckUtils]: 198: Hoare triple {69420#(<= 1 ~ref_cnt~0)} assume main_#t~switch193#1; {69420#(<= 1 ~ref_cnt~0)} is VALID [2022-02-20 22:07:32,051 INFO L290 TraceCheckUtils]: 199: Hoare triple {69420#(<= 1 ~ref_cnt~0)} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0;assume { :begin_inline_usb_acecad_exit } true;assume { :begin_inline_ldv_usb_deregister_11 } true;ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset := ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset;assume { :begin_inline_usb_deregister } true;usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset := ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;havoc usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset;usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset := usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset; {69324#false} is VALID [2022-02-20 22:07:32,052 INFO L290 TraceCheckUtils]: 200: Hoare triple {69324#false} assume { :end_inline_usb_deregister } true;~ldv_state_variable_1~0 := 0; {69324#false} is VALID [2022-02-20 22:07:32,052 INFO L290 TraceCheckUtils]: 201: Hoare triple {69324#false} assume { :end_inline_ldv_usb_deregister_11 } true; {69324#false} is VALID [2022-02-20 22:07:32,052 INFO L290 TraceCheckUtils]: 202: Hoare triple {69324#false} assume { :end_inline_usb_acecad_exit } true;~ldv_state_variable_0~0 := 2; {69324#false} is VALID [2022-02-20 22:07:32,052 INFO L290 TraceCheckUtils]: 203: Hoare triple {69324#false} assume { :begin_inline_ldv_check_final_state } true; {69324#false} is VALID [2022-02-20 22:07:32,052 INFO L290 TraceCheckUtils]: 204: Hoare triple {69324#false} assume 0 != ~URB_STATE~0; {69324#false} is VALID [2022-02-20 22:07:32,052 INFO L272 TraceCheckUtils]: 205: Hoare triple {69324#false} call ldv_error(); {69324#false} is VALID [2022-02-20 22:07:32,052 INFO L290 TraceCheckUtils]: 206: Hoare triple {69324#false} assume !false; {69324#false} is VALID [2022-02-20 22:07:32,053 INFO L134 CoverageAnalysis]: Checked inductivity of 115 backedges. 29 proven. 0 refuted. 0 times theorem prover too weak. 86 trivial. 0 not checked. [2022-02-20 22:07:32,053 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-02-20 22:07:32,053 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1630957727] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:07:32,053 INFO L191 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-02-20 22:07:32,053 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [8] total 9 [2022-02-20 22:07:32,054 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2074093730] [2022-02-20 22:07:32,054 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:07:32,054 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 33.75) internal successors, (135), 4 states have internal predecessors, (135), 3 states have call successors, (20), 3 states have call predecessors, (20), 2 states have return successors, (19), 2 states have call predecessors, (19), 2 states have call successors, (19) Word has length 207 [2022-02-20 22:07:32,055 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:07:32,055 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 33.75) internal successors, (135), 4 states have internal predecessors, (135), 3 states have call successors, (20), 3 states have call predecessors, (20), 2 states have return successors, (19), 2 states have call predecessors, (19), 2 states have call successors, (19) [2022-02-20 22:07:32,168 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 174 edges. 174 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:32,169 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-02-20 22:07:32,170 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:07:32,170 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-02-20 22:07:32,170 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2022-02-20 22:07:32,171 INFO L87 Difference]: Start difference. First operand 953 states and 1241 transitions. Second operand has 4 states, 4 states have (on average 33.75) internal successors, (135), 4 states have internal predecessors, (135), 3 states have call successors, (20), 3 states have call predecessors, (20), 2 states have return successors, (19), 2 states have call predecessors, (19), 2 states have call successors, (19) [2022-02-20 22:07:34,903 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:34,903 INFO L93 Difference]: Finished difference Result 2823 states and 3686 transitions. [2022-02-20 22:07:34,903 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-02-20 22:07:34,904 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 33.75) internal successors, (135), 4 states have internal predecessors, (135), 3 states have call successors, (20), 3 states have call predecessors, (20), 2 states have return successors, (19), 2 states have call predecessors, (19), 2 states have call successors, (19) Word has length 207 [2022-02-20 22:07:34,904 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 22:07:34,904 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 33.75) internal successors, (135), 4 states have internal predecessors, (135), 3 states have call successors, (20), 3 states have call predecessors, (20), 2 states have return successors, (19), 2 states have call predecessors, (19), 2 states have call successors, (19) [2022-02-20 22:07:34,908 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 847 transitions. [2022-02-20 22:07:34,908 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 33.75) internal successors, (135), 4 states have internal predecessors, (135), 3 states have call successors, (20), 3 states have call predecessors, (20), 2 states have return successors, (19), 2 states have call predecessors, (19), 2 states have call successors, (19) [2022-02-20 22:07:34,912 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 847 transitions. [2022-02-20 22:07:34,912 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states and 847 transitions. [2022-02-20 22:07:35,453 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 847 edges. 847 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:35,799 INFO L225 Difference]: With dead ends: 2823 [2022-02-20 22:07:35,799 INFO L226 Difference]: Without dead ends: 2815 [2022-02-20 22:07:35,800 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 252 GetRequests, 245 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2022-02-20 22:07:35,800 INFO L933 BasicCegarLoop]: 587 mSDtfsCounter, 410 mSDsluCounter, 516 mSDsCounter, 0 mSdLazyCounter, 88 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 410 SdHoareTripleChecker+Valid, 1103 SdHoareTripleChecker+Invalid, 92 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 88 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-02-20 22:07:35,800 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [410 Valid, 1103 Invalid, 92 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 88 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-02-20 22:07:35,802 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2815 states. [2022-02-20 22:07:37,469 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2815 to 2801. [2022-02-20 22:07:37,469 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 22:07:37,472 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2815 states. Second operand has 2801 states, 2211 states have (on average 1.252826775214835) internal successors, (2770), 2227 states have internal predecessors, (2770), 418 states have call successors, (418), 160 states have call predecessors, (418), 171 states have return successors, (477), 437 states have call predecessors, (477), 417 states have call successors, (477) [2022-02-20 22:07:37,474 INFO L74 IsIncluded]: Start isIncluded. First operand 2815 states. Second operand has 2801 states, 2211 states have (on average 1.252826775214835) internal successors, (2770), 2227 states have internal predecessors, (2770), 418 states have call successors, (418), 160 states have call predecessors, (418), 171 states have return successors, (477), 437 states have call predecessors, (477), 417 states have call successors, (477) [2022-02-20 22:07:37,475 INFO L87 Difference]: Start difference. First operand 2815 states. Second operand has 2801 states, 2211 states have (on average 1.252826775214835) internal successors, (2770), 2227 states have internal predecessors, (2770), 418 states have call successors, (418), 160 states have call predecessors, (418), 171 states have return successors, (477), 437 states have call predecessors, (477), 417 states have call successors, (477) [2022-02-20 22:07:37,680 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:37,680 INFO L93 Difference]: Finished difference Result 2815 states and 3677 transitions. [2022-02-20 22:07:37,680 INFO L276 IsEmpty]: Start isEmpty. Operand 2815 states and 3677 transitions. [2022-02-20 22:07:37,684 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:37,684 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:37,687 INFO L74 IsIncluded]: Start isIncluded. First operand has 2801 states, 2211 states have (on average 1.252826775214835) internal successors, (2770), 2227 states have internal predecessors, (2770), 418 states have call successors, (418), 160 states have call predecessors, (418), 171 states have return successors, (477), 437 states have call predecessors, (477), 417 states have call successors, (477) Second operand 2815 states. [2022-02-20 22:07:37,688 INFO L87 Difference]: Start difference. First operand has 2801 states, 2211 states have (on average 1.252826775214835) internal successors, (2770), 2227 states have internal predecessors, (2770), 418 states have call successors, (418), 160 states have call predecessors, (418), 171 states have return successors, (477), 437 states have call predecessors, (477), 417 states have call successors, (477) Second operand 2815 states. [2022-02-20 22:07:37,894 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:37,895 INFO L93 Difference]: Finished difference Result 2815 states and 3677 transitions. [2022-02-20 22:07:37,895 INFO L276 IsEmpty]: Start isEmpty. Operand 2815 states and 3677 transitions. [2022-02-20 22:07:37,898 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:37,898 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:37,898 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 22:07:37,898 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 22:07:37,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2801 states, 2211 states have (on average 1.252826775214835) internal successors, (2770), 2227 states have internal predecessors, (2770), 418 states have call successors, (418), 160 states have call predecessors, (418), 171 states have return successors, (477), 437 states have call predecessors, (477), 417 states have call successors, (477) [2022-02-20 22:07:38,222 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2801 states to 2801 states and 3665 transitions. [2022-02-20 22:07:38,222 INFO L78 Accepts]: Start accepts. Automaton has 2801 states and 3665 transitions. Word has length 207 [2022-02-20 22:07:38,223 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 22:07:38,223 INFO L470 AbstractCegarLoop]: Abstraction has 2801 states and 3665 transitions. [2022-02-20 22:07:38,223 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 33.75) internal successors, (135), 4 states have internal predecessors, (135), 3 states have call successors, (20), 3 states have call predecessors, (20), 2 states have return successors, (19), 2 states have call predecessors, (19), 2 states have call successors, (19) [2022-02-20 22:07:38,223 INFO L276 IsEmpty]: Start isEmpty. Operand 2801 states and 3665 transitions. [2022-02-20 22:07:38,226 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 208 [2022-02-20 22:07:38,226 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:07:38,226 INFO L514 BasicCegarLoop]: trace histogram [6, 6, 4, 4, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:07:38,249 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-02-20 22:07:38,439 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2022-02-20 22:07:38,439 INFO L402 AbstractCegarLoop]: === Iteration 15 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:07:38,440 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:07:38,440 INFO L85 PathProgramCache]: Analyzing trace with hash 262653085, now seen corresponding path program 1 times [2022-02-20 22:07:38,440 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:07:38,440 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1138094751] [2022-02-20 22:07:38,440 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:07:38,440 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:07:38,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:38,564 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 22:07:38,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:38,572 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:38,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:38,575 INFO L290 TraceCheckUtils]: 0: Hoare triple {83718#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {83612#true} is VALID [2022-02-20 22:07:38,575 INFO L290 TraceCheckUtils]: 1: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,575 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {83612#true} {83612#true} #547#return; {83612#true} is VALID [2022-02-20 22:07:38,576 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:38,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:38,578 INFO L290 TraceCheckUtils]: 0: Hoare triple {83612#true} ~cond := #in~cond; {83612#true} is VALID [2022-02-20 22:07:38,578 INFO L290 TraceCheckUtils]: 1: Hoare triple {83612#true} assume !(0 == ~cond); {83612#true} is VALID [2022-02-20 22:07:38,579 INFO L290 TraceCheckUtils]: 2: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,579 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {83612#true} {83612#true} #549#return; {83612#true} is VALID [2022-02-20 22:07:38,579 INFO L290 TraceCheckUtils]: 0: Hoare triple {83710#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {83612#true} is VALID [2022-02-20 22:07:38,579 INFO L272 TraceCheckUtils]: 1: Hoare triple {83612#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {83718#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:38,580 INFO L290 TraceCheckUtils]: 2: Hoare triple {83718#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {83612#true} is VALID [2022-02-20 22:07:38,580 INFO L290 TraceCheckUtils]: 3: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,580 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {83612#true} {83612#true} #547#return; {83612#true} is VALID [2022-02-20 22:07:38,580 INFO L290 TraceCheckUtils]: 5: Hoare triple {83612#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {83612#true} is VALID [2022-02-20 22:07:38,580 INFO L272 TraceCheckUtils]: 6: Hoare triple {83612#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {83612#true} is VALID [2022-02-20 22:07:38,580 INFO L290 TraceCheckUtils]: 7: Hoare triple {83612#true} ~cond := #in~cond; {83612#true} is VALID [2022-02-20 22:07:38,580 INFO L290 TraceCheckUtils]: 8: Hoare triple {83612#true} assume !(0 == ~cond); {83612#true} is VALID [2022-02-20 22:07:38,581 INFO L290 TraceCheckUtils]: 9: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,581 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {83612#true} {83612#true} #549#return; {83612#true} is VALID [2022-02-20 22:07:38,581 INFO L290 TraceCheckUtils]: 11: Hoare triple {83612#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {83612#true} is VALID [2022-02-20 22:07:38,581 INFO L290 TraceCheckUtils]: 12: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,581 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {83612#true} {83612#true} #553#return; {83612#true} is VALID [2022-02-20 22:07:38,581 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 27 [2022-02-20 22:07:38,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:38,587 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:38,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:38,590 INFO L290 TraceCheckUtils]: 0: Hoare triple {83718#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {83612#true} is VALID [2022-02-20 22:07:38,590 INFO L290 TraceCheckUtils]: 1: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,590 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {83612#true} {83612#true} #547#return; {83612#true} is VALID [2022-02-20 22:07:38,590 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:38,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:38,593 INFO L290 TraceCheckUtils]: 0: Hoare triple {83612#true} ~cond := #in~cond; {83612#true} is VALID [2022-02-20 22:07:38,594 INFO L290 TraceCheckUtils]: 1: Hoare triple {83612#true} assume !(0 == ~cond); {83612#true} is VALID [2022-02-20 22:07:38,594 INFO L290 TraceCheckUtils]: 2: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,594 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {83612#true} {83612#true} #549#return; {83612#true} is VALID [2022-02-20 22:07:38,594 INFO L290 TraceCheckUtils]: 0: Hoare triple {83710#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {83612#true} is VALID [2022-02-20 22:07:38,595 INFO L272 TraceCheckUtils]: 1: Hoare triple {83612#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {83718#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:38,595 INFO L290 TraceCheckUtils]: 2: Hoare triple {83718#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {83612#true} is VALID [2022-02-20 22:07:38,595 INFO L290 TraceCheckUtils]: 3: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,595 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {83612#true} {83612#true} #547#return; {83612#true} is VALID [2022-02-20 22:07:38,595 INFO L290 TraceCheckUtils]: 5: Hoare triple {83612#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {83612#true} is VALID [2022-02-20 22:07:38,595 INFO L272 TraceCheckUtils]: 6: Hoare triple {83612#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {83612#true} is VALID [2022-02-20 22:07:38,595 INFO L290 TraceCheckUtils]: 7: Hoare triple {83612#true} ~cond := #in~cond; {83612#true} is VALID [2022-02-20 22:07:38,596 INFO L290 TraceCheckUtils]: 8: Hoare triple {83612#true} assume !(0 == ~cond); {83612#true} is VALID [2022-02-20 22:07:38,596 INFO L290 TraceCheckUtils]: 9: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,596 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {83612#true} {83612#true} #549#return; {83612#true} is VALID [2022-02-20 22:07:38,596 INFO L290 TraceCheckUtils]: 11: Hoare triple {83612#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {83612#true} is VALID [2022-02-20 22:07:38,596 INFO L290 TraceCheckUtils]: 12: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,596 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {83612#true} {83612#true} #611#return; {83612#true} is VALID [2022-02-20 22:07:38,601 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 56 [2022-02-20 22:07:38,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:38,606 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 22:07:38,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:38,610 INFO L290 TraceCheckUtils]: 0: Hoare triple {83612#true} ~cond := #in~cond; {83612#true} is VALID [2022-02-20 22:07:38,610 INFO L290 TraceCheckUtils]: 1: Hoare triple {83612#true} assume !(0 == ~cond); {83612#true} is VALID [2022-02-20 22:07:38,610 INFO L290 TraceCheckUtils]: 2: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,610 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {83612#true} {83612#true} #551#return; {83612#true} is VALID [2022-02-20 22:07:38,610 INFO L290 TraceCheckUtils]: 0: Hoare triple {83726#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {83612#true} is VALID [2022-02-20 22:07:38,610 INFO L290 TraceCheckUtils]: 1: Hoare triple {83612#true} assume !(0 != ~tmp___0~2);call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size);~tmp~4.base, ~tmp~4.offset := #t~malloc63.base, #t~malloc63.offset;havoc #t~malloc63.base, #t~malloc63.offset;~p~0.base, ~p~0.offset := ~tmp~4.base, ~tmp~4.offset; {83612#true} is VALID [2022-02-20 22:07:38,611 INFO L272 TraceCheckUtils]: 2: Hoare triple {83612#true} call assume_abort_if_not((if 0 != (~p~0.base + ~p~0.offset) % 18446744073709551616 then 1 else 0)); {83612#true} is VALID [2022-02-20 22:07:38,611 INFO L290 TraceCheckUtils]: 3: Hoare triple {83612#true} ~cond := #in~cond; {83612#true} is VALID [2022-02-20 22:07:38,611 INFO L290 TraceCheckUtils]: 4: Hoare triple {83612#true} assume !(0 == ~cond); {83612#true} is VALID [2022-02-20 22:07:38,611 INFO L290 TraceCheckUtils]: 5: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,611 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {83612#true} {83612#true} #551#return; {83612#true} is VALID [2022-02-20 22:07:38,611 INFO L290 TraceCheckUtils]: 7: Hoare triple {83612#true} #res.base, #res.offset := ~p~0.base, ~p~0.offset; {83612#true} is VALID [2022-02-20 22:07:38,611 INFO L290 TraceCheckUtils]: 8: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,612 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {83612#true} {83612#true} #555#return; {83612#true} is VALID [2022-02-20 22:07:38,612 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 82 [2022-02-20 22:07:38,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:38,615 INFO L290 TraceCheckUtils]: 0: Hoare triple {83612#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {83612#true} is VALID [2022-02-20 22:07:38,615 INFO L290 TraceCheckUtils]: 1: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,615 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {83612#true} {83612#true} #563#return; {83612#true} is VALID [2022-02-20 22:07:38,616 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 88 [2022-02-20 22:07:38,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:38,618 INFO L290 TraceCheckUtils]: 0: Hoare triple {83612#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {83612#true} is VALID [2022-02-20 22:07:38,618 INFO L290 TraceCheckUtils]: 1: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,619 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {83612#true} {83612#true} #567#return; {83612#true} is VALID [2022-02-20 22:07:38,619 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 95 [2022-02-20 22:07:38,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:38,623 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:38,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:38,626 INFO L290 TraceCheckUtils]: 0: Hoare triple {83726#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {83612#true} is VALID [2022-02-20 22:07:38,627 INFO L290 TraceCheckUtils]: 1: Hoare triple {83612#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {83612#true} is VALID [2022-02-20 22:07:38,627 INFO L290 TraceCheckUtils]: 2: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,627 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {83612#true} {83612#true} #539#return; {83612#true} is VALID [2022-02-20 22:07:38,627 INFO L290 TraceCheckUtils]: 0: Hoare triple {83726#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {83612#true} is VALID [2022-02-20 22:07:38,628 INFO L272 TraceCheckUtils]: 1: Hoare triple {83612#true} call __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset := ldv_malloc(__kmalloc_~size#1); {83726#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:38,628 INFO L290 TraceCheckUtils]: 2: Hoare triple {83726#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {83612#true} is VALID [2022-02-20 22:07:38,628 INFO L290 TraceCheckUtils]: 3: Hoare triple {83612#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {83612#true} is VALID [2022-02-20 22:07:38,628 INFO L290 TraceCheckUtils]: 4: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,628 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {83612#true} {83612#true} #539#return; {83612#true} is VALID [2022-02-20 22:07:38,628 INFO L290 TraceCheckUtils]: 6: Hoare triple {83612#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset; {83612#true} is VALID [2022-02-20 22:07:38,628 INFO L290 TraceCheckUtils]: 7: Hoare triple {83612#true} kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {83612#true} is VALID [2022-02-20 22:07:38,629 INFO L290 TraceCheckUtils]: 8: Hoare triple {83612#true} #t~ret58#1.base, #t~ret58#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret58#1.base, #t~ret58#1.offset;havoc #t~ret58#1.base, #t~ret58#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {83612#true} is VALID [2022-02-20 22:07:38,629 INFO L290 TraceCheckUtils]: 9: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,629 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {83612#true} {83612#true} #569#return; {83612#true} is VALID [2022-02-20 22:07:38,629 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 108 [2022-02-20 22:07:38,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:38,633 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:38,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:38,637 INFO L290 TraceCheckUtils]: 0: Hoare triple {83726#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {83612#true} is VALID [2022-02-20 22:07:38,637 INFO L290 TraceCheckUtils]: 1: Hoare triple {83612#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {83612#true} is VALID [2022-02-20 22:07:38,637 INFO L290 TraceCheckUtils]: 2: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,637 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {83612#true} {83612#true} #539#return; {83612#true} is VALID [2022-02-20 22:07:38,637 INFO L290 TraceCheckUtils]: 0: Hoare triple {83726#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {83612#true} is VALID [2022-02-20 22:07:38,638 INFO L272 TraceCheckUtils]: 1: Hoare triple {83612#true} call __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset := ldv_malloc(__kmalloc_~size#1); {83726#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:38,638 INFO L290 TraceCheckUtils]: 2: Hoare triple {83726#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {83612#true} is VALID [2022-02-20 22:07:38,638 INFO L290 TraceCheckUtils]: 3: Hoare triple {83612#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {83612#true} is VALID [2022-02-20 22:07:38,638 INFO L290 TraceCheckUtils]: 4: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,638 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {83612#true} {83612#true} #539#return; {83612#true} is VALID [2022-02-20 22:07:38,638 INFO L290 TraceCheckUtils]: 6: Hoare triple {83612#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset; {83612#true} is VALID [2022-02-20 22:07:38,638 INFO L290 TraceCheckUtils]: 7: Hoare triple {83612#true} kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {83612#true} is VALID [2022-02-20 22:07:38,639 INFO L290 TraceCheckUtils]: 8: Hoare triple {83612#true} #t~ret58#1.base, #t~ret58#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret58#1.base, #t~ret58#1.offset;havoc #t~ret58#1.base, #t~ret58#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {83612#true} is VALID [2022-02-20 22:07:38,639 INFO L290 TraceCheckUtils]: 9: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,639 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {83612#true} {83612#true} #571#return; {83612#true} is VALID [2022-02-20 22:07:38,639 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 123 [2022-02-20 22:07:38,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:38,644 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 22:07:38,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:38,647 INFO L290 TraceCheckUtils]: 0: Hoare triple {83612#true} ~cond := #in~cond; {83612#true} is VALID [2022-02-20 22:07:38,647 INFO L290 TraceCheckUtils]: 1: Hoare triple {83612#true} assume !(0 == ~cond); {83612#true} is VALID [2022-02-20 22:07:38,647 INFO L290 TraceCheckUtils]: 2: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,647 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {83612#true} {83612#true} #551#return; {83612#true} is VALID [2022-02-20 22:07:38,647 INFO L290 TraceCheckUtils]: 0: Hoare triple {83726#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {83612#true} is VALID [2022-02-20 22:07:38,648 INFO L290 TraceCheckUtils]: 1: Hoare triple {83612#true} assume !(0 != ~tmp___0~2);call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size);~tmp~4.base, ~tmp~4.offset := #t~malloc63.base, #t~malloc63.offset;havoc #t~malloc63.base, #t~malloc63.offset;~p~0.base, ~p~0.offset := ~tmp~4.base, ~tmp~4.offset; {83612#true} is VALID [2022-02-20 22:07:38,648 INFO L272 TraceCheckUtils]: 2: Hoare triple {83612#true} call assume_abort_if_not((if 0 != (~p~0.base + ~p~0.offset) % 18446744073709551616 then 1 else 0)); {83612#true} is VALID [2022-02-20 22:07:38,648 INFO L290 TraceCheckUtils]: 3: Hoare triple {83612#true} ~cond := #in~cond; {83612#true} is VALID [2022-02-20 22:07:38,648 INFO L290 TraceCheckUtils]: 4: Hoare triple {83612#true} assume !(0 == ~cond); {83612#true} is VALID [2022-02-20 22:07:38,648 INFO L290 TraceCheckUtils]: 5: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,648 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {83612#true} {83612#true} #551#return; {83612#true} is VALID [2022-02-20 22:07:38,648 INFO L290 TraceCheckUtils]: 7: Hoare triple {83612#true} #res.base, #res.offset := ~p~0.base, ~p~0.offset; {83612#true} is VALID [2022-02-20 22:07:38,648 INFO L290 TraceCheckUtils]: 8: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,649 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {83612#true} {83612#true} #573#return; {83612#true} is VALID [2022-02-20 22:07:38,649 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 137 [2022-02-20 22:07:38,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:38,652 INFO L290 TraceCheckUtils]: 0: Hoare triple {83726#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {83612#true} is VALID [2022-02-20 22:07:38,653 INFO L290 TraceCheckUtils]: 1: Hoare triple {83612#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {83612#true} is VALID [2022-02-20 22:07:38,653 INFO L290 TraceCheckUtils]: 2: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,653 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {83612#true} {83612#true} #575#return; {83612#true} is VALID [2022-02-20 22:07:38,653 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 155 [2022-02-20 22:07:38,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:38,656 INFO L290 TraceCheckUtils]: 0: Hoare triple {83612#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1.base, ~arg1.offset := #in~arg1.base, #in~arg1.offset;~arg2 := #in~arg2;#res := #t~nondet213;havoc #t~nondet213; {83612#true} is VALID [2022-02-20 22:07:38,656 INFO L290 TraceCheckUtils]: 1: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,656 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {83612#true} {83612#true} #581#return; {83612#true} is VALID [2022-02-20 22:07:38,657 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 169 [2022-02-20 22:07:38,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:38,661 INFO L290 TraceCheckUtils]: 0: Hoare triple {83726#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {83612#true} is VALID [2022-02-20 22:07:38,661 INFO L290 TraceCheckUtils]: 1: Hoare triple {83612#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {83612#true} is VALID [2022-02-20 22:07:38,661 INFO L290 TraceCheckUtils]: 2: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,662 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {83612#true} {83612#true} #595#return; {83612#true} is VALID [2022-02-20 22:07:38,662 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 176 [2022-02-20 22:07:38,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:38,665 INFO L290 TraceCheckUtils]: 0: Hoare triple {83612#true} havoc ~tmp~8;assume -2147483648 <= #t~nondet68 && #t~nondet68 <= 2147483647;~tmp~8 := #t~nondet68;havoc #t~nondet68;#res := ~tmp~8; {83612#true} is VALID [2022-02-20 22:07:38,665 INFO L290 TraceCheckUtils]: 1: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,665 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {83612#true} {83612#true} #599#return; {83612#true} is VALID [2022-02-20 22:07:38,670 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 186 [2022-02-20 22:07:38,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:38,674 INFO L290 TraceCheckUtils]: 0: Hoare triple {83743#(and (= ~usb_intfdata~0.offset |old(~usb_intfdata~0.offset)|) (= ~usb_intfdata~0.base |old(~usb_intfdata~0.base)|))} ~intf#1.base, ~intf#1.offset := #in~intf#1.base, #in~intf#1.offset;~data#1.base, ~data#1.offset := #in~data#1.base, #in~data#1.offset;assume { :begin_inline_ldv_usb_set_intfdata } true;ldv_usb_set_intfdata_#in~data#1.base, ldv_usb_set_intfdata_#in~data#1.offset := ~data#1.base, ~data#1.offset;havoc ldv_usb_set_intfdata_~data#1.base, ldv_usb_set_intfdata_~data#1.offset;ldv_usb_set_intfdata_~data#1.base, ldv_usb_set_intfdata_~data#1.offset := ldv_usb_set_intfdata_#in~data#1.base, ldv_usb_set_intfdata_#in~data#1.offset;~usb_intfdata~0.base, ~usb_intfdata~0.offset := ldv_usb_set_intfdata_~data#1.base, ldv_usb_set_intfdata_~data#1.offset; {83612#true} is VALID [2022-02-20 22:07:38,674 INFO L290 TraceCheckUtils]: 1: Hoare triple {83612#true} assume { :end_inline_ldv_usb_set_intfdata } true; {83612#true} is VALID [2022-02-20 22:07:38,674 INFO L290 TraceCheckUtils]: 2: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,674 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {83612#true} {83612#true} #601#return; {83612#true} is VALID [2022-02-20 22:07:38,675 INFO L290 TraceCheckUtils]: 0: Hoare triple {83612#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(99, 2);call #Ultimate.allocInit(10, 3);call #Ultimate.allocInit(7, 4);call write~init~int(97, 4, 0, 1);call write~init~int(99, 4, 1, 1);call write~init~int(101, 4, 2, 1);call write~init~int(99, 4, 3, 1);call write~init~int(97, 4, 4, 1);call write~init~int(100, 4, 5, 1);call write~init~int(0, 4, 6, 1);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(20, 6);call #Ultimate.allocInit(57, 7);call #Ultimate.allocInit(2, 8);call write~init~int(32, 8, 0, 1);call write~init~int(0, 8, 1, 1);call #Ultimate.allocInit(8, 9);call #Ultimate.allocInit(34, 10);call #Ultimate.allocInit(32, 11);call #Ultimate.allocInit(11, 12);call #Ultimate.allocInit(48, 13);~LDV_IN_INTERRUPT~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset := 14, 0;call #Ultimate.allocInit(72, 14);call write~init~int(3, ~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 2 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(4, ~#usb_acecad_id_table~0.base, 4 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 6 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 8 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 10 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 11 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 12 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 13 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 14 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 15 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 16 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(3, ~#usb_acecad_id_table~0.base, 24 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 26 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(8, ~#usb_acecad_id_table~0.base, 28 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 30 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 32 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 34 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 35 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 36 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 37 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 38 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 39 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(1, ~#usb_acecad_id_table~0.base, 40 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(0, ~#usb_acecad_id_table~0.base, 48 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 50 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 52 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 54 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 56 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 58 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 59 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 60 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 61 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 62 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 63 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 64 + ~#usb_acecad_id_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.driver_info := 0;~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset := 15, 0;call #Ultimate.allocInit(264, 15);call write~init~$Pointer$(12, 0, ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_probe.base, #funAddr~usb_acecad_probe.offset, ~#usb_acecad_driver~0.base, 8 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_disconnect.base, #funAddr~usb_acecad_disconnect.offset, ~#usb_acecad_driver~0.base, 16 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 24 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 32 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 40 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 48 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 56 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 64 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, ~#usb_acecad_driver~0.base, 72 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 80 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 84 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 88 + ~#usb_acecad_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 92 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 100 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 108 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 116 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 124 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 132 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 136 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 144 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 152 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 160 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 168 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 176 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 184 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 192 + ~#usb_acecad_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 193 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 201 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 209 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 217 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 225 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 233 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 241 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 249 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 257 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 261 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 262 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 263 + ~#usb_acecad_driver~0.offset, 1);~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~URB_STATE~0 := 0;~DEV_STATE~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~int_urb~0.base, ~int_urb~0.offset := 0, 0;~bulk_urb~0.base, ~bulk_urb~0.offset := 0, 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {83612#true} is VALID [2022-02-20 22:07:38,675 INFO L290 TraceCheckUtils]: 1: Hoare triple {83612#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret186#1.base, main_#t~ret186#1.offset, main_#t~nondet187#1, main_#t~switch188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~ret191#1, main_#t~nondet192#1, main_#t~switch193#1, main_#t~ret194#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~17#1.base, main_~tmp~17#1.offset, main_~tmp___0~6#1, main_~tmp___1~3#1, main_~tmp___2~1#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~17#1.base, main_~tmp~17#1.offset;havoc main_~tmp___0~6#1;havoc main_~tmp___1~3#1;havoc main_~tmp___2~1#1; {83612#true} is VALID [2022-02-20 22:07:38,675 INFO L272 TraceCheckUtils]: 2: Hoare triple {83612#true} call main_#t~ret186#1.base, main_#t~ret186#1.offset := ldv_init_zalloc(24); {83710#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:38,675 INFO L290 TraceCheckUtils]: 3: Hoare triple {83710#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {83612#true} is VALID [2022-02-20 22:07:38,676 INFO L272 TraceCheckUtils]: 4: Hoare triple {83612#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {83718#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:38,676 INFO L290 TraceCheckUtils]: 5: Hoare triple {83718#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {83612#true} is VALID [2022-02-20 22:07:38,676 INFO L290 TraceCheckUtils]: 6: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,676 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {83612#true} {83612#true} #547#return; {83612#true} is VALID [2022-02-20 22:07:38,677 INFO L290 TraceCheckUtils]: 8: Hoare triple {83612#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {83612#true} is VALID [2022-02-20 22:07:38,677 INFO L272 TraceCheckUtils]: 9: Hoare triple {83612#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {83612#true} is VALID [2022-02-20 22:07:38,677 INFO L290 TraceCheckUtils]: 10: Hoare triple {83612#true} ~cond := #in~cond; {83612#true} is VALID [2022-02-20 22:07:38,677 INFO L290 TraceCheckUtils]: 11: Hoare triple {83612#true} assume !(0 == ~cond); {83612#true} is VALID [2022-02-20 22:07:38,677 INFO L290 TraceCheckUtils]: 12: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,677 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {83612#true} {83612#true} #549#return; {83612#true} is VALID [2022-02-20 22:07:38,677 INFO L290 TraceCheckUtils]: 14: Hoare triple {83612#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {83612#true} is VALID [2022-02-20 22:07:38,677 INFO L290 TraceCheckUtils]: 15: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,678 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {83612#true} {83612#true} #553#return; {83612#true} is VALID [2022-02-20 22:07:38,678 INFO L290 TraceCheckUtils]: 17: Hoare triple {83612#true} main_~tmp~17#1.base, main_~tmp~17#1.offset := main_#t~ret186#1.base, main_#t~ret186#1.offset;havoc main_#t~ret186#1.base, main_#t~ret186#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~17#1.base, main_~tmp~17#1.offset;assume { :begin_inline_ldv_initialize } true; {83612#true} is VALID [2022-02-20 22:07:38,678 INFO L290 TraceCheckUtils]: 18: Hoare triple {83612#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1; {83612#true} is VALID [2022-02-20 22:07:38,678 INFO L290 TraceCheckUtils]: 19: Hoare triple {83612#true} assume -2147483648 <= main_#t~nondet187#1 && main_#t~nondet187#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet187#1;havoc main_#t~nondet187#1;main_#t~switch188#1 := 0 == main_~tmp___0~6#1; {83612#true} is VALID [2022-02-20 22:07:38,678 INFO L290 TraceCheckUtils]: 20: Hoare triple {83612#true} assume !main_#t~switch188#1;main_#t~switch188#1 := main_#t~switch188#1 || 1 == main_~tmp___0~6#1; {83612#true} is VALID [2022-02-20 22:07:38,678 INFO L290 TraceCheckUtils]: 21: Hoare triple {83612#true} assume main_#t~switch188#1; {83612#true} is VALID [2022-02-20 22:07:38,678 INFO L290 TraceCheckUtils]: 22: Hoare triple {83612#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet192#1 && main_#t~nondet192#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet192#1;havoc main_#t~nondet192#1;main_#t~switch193#1 := 0 == main_~tmp___2~1#1; {83612#true} is VALID [2022-02-20 22:07:38,678 INFO L290 TraceCheckUtils]: 23: Hoare triple {83612#true} assume !main_#t~switch193#1;main_#t~switch193#1 := main_#t~switch193#1 || 1 == main_~tmp___2~1#1; {83612#true} is VALID [2022-02-20 22:07:38,679 INFO L290 TraceCheckUtils]: 24: Hoare triple {83612#true} assume main_#t~switch193#1; {83612#true} is VALID [2022-02-20 22:07:38,679 INFO L290 TraceCheckUtils]: 25: Hoare triple {83612#true} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_usb_acecad_init } true;havoc usb_acecad_init_#res#1;havoc usb_acecad_init_#t~ret183#1, usb_acecad_init_#t~nondet184#1, usb_acecad_init_~result~0#1, usb_acecad_init_~tmp~15#1;havoc usb_acecad_init_~result~0#1;havoc usb_acecad_init_~tmp~15#1;assume { :begin_inline_usb_register } true;usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc usb_register_#res#1;havoc usb_register_#t~ret31#1, usb_register_~driver#1.base, usb_register_~driver#1.offset, usb_register_~tmp~1#1;usb_register_~driver#1.base, usb_register_~driver#1.offset := usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset;havoc usb_register_~tmp~1#1;assume { :begin_inline_ldv_usb_register_driver_2 } true;ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset := usb_register_~driver#1.base, usb_register_~driver#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 4, 0;havoc ldv_usb_register_driver_2_#res#1;havoc ldv_usb_register_driver_2_#t~ret196#1, ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset, ldv_usb_register_driver_2_~ldv_func_res~0#1, ldv_usb_register_driver_2_~tmp~19#1;ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_2_~ldv_func_res~0#1;havoc ldv_usb_register_driver_2_~tmp~19#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet217#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet217#1 && usb_register_driver_#t~nondet217#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet217#1;havoc usb_register_driver_#t~nondet217#1; {83612#true} is VALID [2022-02-20 22:07:38,679 INFO L290 TraceCheckUtils]: 26: Hoare triple {83612#true} ldv_usb_register_driver_2_#t~ret196#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_2_#t~ret196#1 && ldv_usb_register_driver_2_#t~ret196#1 <= 2147483647;ldv_usb_register_driver_2_~tmp~19#1 := ldv_usb_register_driver_2_#t~ret196#1;havoc ldv_usb_register_driver_2_#t~ret196#1;ldv_usb_register_driver_2_~ldv_func_res~0#1 := ldv_usb_register_driver_2_~tmp~19#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset, ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset;havoc ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {83612#true} is VALID [2022-02-20 22:07:38,679 INFO L272 TraceCheckUtils]: 27: Hoare triple {83612#true} call ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset := ldv_init_zalloc(1248); {83710#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:38,679 INFO L290 TraceCheckUtils]: 28: Hoare triple {83710#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc66.base, #t~malloc66.offset := #Ultimate.allocOnHeap(~size); {83612#true} is VALID [2022-02-20 22:07:38,680 INFO L272 TraceCheckUtils]: 29: Hoare triple {83612#true} call #Ultimate.meminit(#t~malloc66.base, #t~malloc66.offset, 1, ~size, ~size); {83718#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:38,680 INFO L290 TraceCheckUtils]: 30: Hoare triple {83718#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {83612#true} is VALID [2022-02-20 22:07:38,680 INFO L290 TraceCheckUtils]: 31: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,680 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {83612#true} {83612#true} #547#return; {83612#true} is VALID [2022-02-20 22:07:38,681 INFO L290 TraceCheckUtils]: 33: Hoare triple {83612#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc66.base, #t~malloc66.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {83612#true} is VALID [2022-02-20 22:07:38,681 INFO L272 TraceCheckUtils]: 34: Hoare triple {83612#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {83612#true} is VALID [2022-02-20 22:07:38,681 INFO L290 TraceCheckUtils]: 35: Hoare triple {83612#true} ~cond := #in~cond; {83612#true} is VALID [2022-02-20 22:07:38,681 INFO L290 TraceCheckUtils]: 36: Hoare triple {83612#true} assume !(0 == ~cond); {83612#true} is VALID [2022-02-20 22:07:38,681 INFO L290 TraceCheckUtils]: 37: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,681 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {83612#true} {83612#true} #549#return; {83612#true} is VALID [2022-02-20 22:07:38,681 INFO L290 TraceCheckUtils]: 39: Hoare triple {83612#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {83612#true} is VALID [2022-02-20 22:07:38,681 INFO L290 TraceCheckUtils]: 40: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,682 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {83612#true} {83612#true} #611#return; {83612#true} is VALID [2022-02-20 22:07:38,682 INFO L290 TraceCheckUtils]: 42: Hoare triple {83612#true} ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset := ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset;havoc ldv_usb_driver_1_#t~ret185#1.base, ldv_usb_driver_1_#t~ret185#1.offset;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {83612#true} is VALID [2022-02-20 22:07:38,682 INFO L290 TraceCheckUtils]: 43: Hoare triple {83612#true} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_2_#res#1 := ldv_usb_register_driver_2_~ldv_func_res~0#1; {83612#true} is VALID [2022-02-20 22:07:38,682 INFO L290 TraceCheckUtils]: 44: Hoare triple {83612#true} usb_register_#t~ret31#1 := ldv_usb_register_driver_2_#res#1;assume { :end_inline_ldv_usb_register_driver_2 } true;assume -2147483648 <= usb_register_#t~ret31#1 && usb_register_#t~ret31#1 <= 2147483647;usb_register_~tmp~1#1 := usb_register_#t~ret31#1;havoc usb_register_#t~ret31#1;usb_register_#res#1 := usb_register_~tmp~1#1; {83612#true} is VALID [2022-02-20 22:07:38,682 INFO L290 TraceCheckUtils]: 45: Hoare triple {83612#true} usb_acecad_init_#t~ret183#1 := usb_register_#res#1;assume { :end_inline_usb_register } true;assume -2147483648 <= usb_acecad_init_#t~ret183#1 && usb_acecad_init_#t~ret183#1 <= 2147483647;usb_acecad_init_~tmp~15#1 := usb_acecad_init_#t~ret183#1;havoc usb_acecad_init_#t~ret183#1;usb_acecad_init_~result~0#1 := usb_acecad_init_~tmp~15#1; {83612#true} is VALID [2022-02-20 22:07:38,682 INFO L290 TraceCheckUtils]: 46: Hoare triple {83612#true} assume 0 == usb_acecad_init_~result~0#1;havoc usb_acecad_init_#t~nondet184#1; {83612#true} is VALID [2022-02-20 22:07:38,682 INFO L290 TraceCheckUtils]: 47: Hoare triple {83612#true} usb_acecad_init_#res#1 := usb_acecad_init_~result~0#1; {83612#true} is VALID [2022-02-20 22:07:38,682 INFO L290 TraceCheckUtils]: 48: Hoare triple {83612#true} main_#t~ret194#1 := usb_acecad_init_#res#1;assume { :end_inline_usb_acecad_init } true;assume -2147483648 <= main_#t~ret194#1 && main_#t~ret194#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret194#1;havoc main_#t~ret194#1; {83612#true} is VALID [2022-02-20 22:07:38,683 INFO L290 TraceCheckUtils]: 49: Hoare triple {83612#true} assume 0 == ~ldv_retval_1~0;~ldv_state_variable_0~0 := 3; {83612#true} is VALID [2022-02-20 22:07:38,683 INFO L290 TraceCheckUtils]: 50: Hoare triple {83612#true} assume !(0 != ~ldv_retval_1~0); {83612#true} is VALID [2022-02-20 22:07:38,683 INFO L290 TraceCheckUtils]: 51: Hoare triple {83612#true} assume -2147483648 <= main_#t~nondet187#1 && main_#t~nondet187#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet187#1;havoc main_#t~nondet187#1;main_#t~switch188#1 := 0 == main_~tmp___0~6#1; {83612#true} is VALID [2022-02-20 22:07:38,683 INFO L290 TraceCheckUtils]: 52: Hoare triple {83612#true} assume main_#t~switch188#1; {83612#true} is VALID [2022-02-20 22:07:38,683 INFO L290 TraceCheckUtils]: 53: Hoare triple {83612#true} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= main_#t~nondet189#1 && main_#t~nondet189#1 <= 2147483647;main_~tmp___1~3#1 := main_#t~nondet189#1;havoc main_#t~nondet189#1;main_#t~switch190#1 := 0 == main_~tmp___1~3#1; {83612#true} is VALID [2022-02-20 22:07:38,683 INFO L290 TraceCheckUtils]: 54: Hoare triple {83612#true} assume main_#t~switch190#1; {83612#true} is VALID [2022-02-20 22:07:38,683 INFO L290 TraceCheckUtils]: 55: Hoare triple {83612#true} assume 1 == ~ldv_state_variable_1~0;assume { :begin_inline_usb_acecad_probe } true;usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset, usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset := ~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc usb_acecad_probe_#res#1;havoc usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset, usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset, usb_acecad_probe_#t~mem132#1, usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset, usb_acecad_probe_#t~ret134#1, usb_acecad_probe_#t~mem135#1, usb_acecad_probe_#t~ret136#1, usb_acecad_probe_#t~ret137#1, usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset, usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset, usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset, usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset, usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset, usb_acecad_probe_#t~mem143#1.base, usb_acecad_probe_#t~mem143#1.offset, usb_acecad_probe_#t~mem144#1.base, usb_acecad_probe_#t~mem144#1.offset, usb_acecad_probe_#t~mem145#1.base, usb_acecad_probe_#t~mem145#1.offset, usb_acecad_probe_#t~ret146#1, usb_acecad_probe_#t~mem147#1.base, usb_acecad_probe_#t~mem147#1.offset, usb_acecad_probe_#t~mem148#1.base, usb_acecad_probe_#t~mem148#1.offset, usb_acecad_probe_#t~ret149#1, usb_acecad_probe_#t~mem150#1.base, usb_acecad_probe_#t~mem150#1.offset, usb_acecad_probe_#t~ret151#1, usb_acecad_probe_#t~ret152#1, usb_acecad_probe_#t~ret153#1, usb_acecad_probe_#t~mem154#1, usb_acecad_probe_#t~switch155#1, usb_acecad_probe_#t~nondet156#1, usb_acecad_probe_#t~nondet157#1, usb_acecad_probe_#t~mem158#1, usb_acecad_probe_#t~mem159#1, usb_acecad_probe_#t~nondet160#1, usb_acecad_probe_#t~nondet161#1, usb_acecad_probe_#t~mem162#1, usb_acecad_probe_#t~mem163#1, usb_acecad_probe_#t~mem164#1.base, usb_acecad_probe_#t~mem164#1.offset, usb_acecad_probe_#t~mem165#1.base, usb_acecad_probe_#t~mem165#1.offset, usb_acecad_probe_#t~ite166#1, usb_acecad_probe_#t~mem167#1, usb_acecad_probe_#t~mem168#1.base, usb_acecad_probe_#t~mem168#1.offset, usb_acecad_probe_#t~mem169#1, usb_acecad_probe_#t~mem170#1.base, usb_acecad_probe_#t~mem170#1.offset, usb_acecad_probe_#t~mem171#1.base, usb_acecad_probe_#t~mem171#1.offset, usb_acecad_probe_#t~mem172#1, usb_acecad_probe_#t~mem173#1.base, usb_acecad_probe_#t~mem173#1.offset, usb_acecad_probe_#t~ret174#1, usb_acecad_probe_#t~mem175#1.base, usb_acecad_probe_#t~mem175#1.offset, usb_acecad_probe_#t~mem176#1, usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset, usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset, usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset, usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset, usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset, usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset, usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset, usb_acecad_probe_~pipe~0#1, usb_acecad_probe_~maxp~0#1, usb_acecad_probe_~err~0#1, usb_acecad_probe_~tmp___0~5#1, usb_acecad_probe_~tmp___1~2#1, usb_acecad_probe_~tmp___2~0#1, usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset, usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~tmp___5~0#1, usb_acecad_probe_~tmp___6~0#1;usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset := usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset;usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset := usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset;havoc usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset;havoc usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;havoc usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset;havoc usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset;havoc usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset;havoc usb_acecad_probe_~pipe~0#1;havoc usb_acecad_probe_~maxp~0#1;havoc usb_acecad_probe_~err~0#1;havoc usb_acecad_probe_~tmp___0~5#1;havoc usb_acecad_probe_~tmp___1~2#1;havoc usb_acecad_probe_~tmp___2~0#1;havoc usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;havoc usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset;havoc usb_acecad_probe_~tmp___5~0#1;havoc usb_acecad_probe_~tmp___6~0#1;assume { :begin_inline_interface_to_usbdev } true;interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset := usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset;havoc interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;havoc interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset, interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset, interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset := interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset;havoc interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;assume { :begin_inline_ldv_interface_to_usbdev } true;havoc ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;havoc ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset, ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset;havoc ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset; {83612#true} is VALID [2022-02-20 22:07:38,684 INFO L272 TraceCheckUtils]: 56: Hoare triple {83612#true} call ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset := ldv_malloc(1822); {83726#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:38,684 INFO L290 TraceCheckUtils]: 57: Hoare triple {83726#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {83612#true} is VALID [2022-02-20 22:07:38,684 INFO L290 TraceCheckUtils]: 58: Hoare triple {83612#true} assume !(0 != ~tmp___0~2);call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size);~tmp~4.base, ~tmp~4.offset := #t~malloc63.base, #t~malloc63.offset;havoc #t~malloc63.base, #t~malloc63.offset;~p~0.base, ~p~0.offset := ~tmp~4.base, ~tmp~4.offset; {83612#true} is VALID [2022-02-20 22:07:38,684 INFO L272 TraceCheckUtils]: 59: Hoare triple {83612#true} call assume_abort_if_not((if 0 != (~p~0.base + ~p~0.offset) % 18446744073709551616 then 1 else 0)); {83612#true} is VALID [2022-02-20 22:07:38,684 INFO L290 TraceCheckUtils]: 60: Hoare triple {83612#true} ~cond := #in~cond; {83612#true} is VALID [2022-02-20 22:07:38,684 INFO L290 TraceCheckUtils]: 61: Hoare triple {83612#true} assume !(0 == ~cond); {83612#true} is VALID [2022-02-20 22:07:38,685 INFO L290 TraceCheckUtils]: 62: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,685 INFO L284 TraceCheckUtils]: 63: Hoare quadruple {83612#true} {83612#true} #551#return; {83612#true} is VALID [2022-02-20 22:07:38,685 INFO L290 TraceCheckUtils]: 64: Hoare triple {83612#true} #res.base, #res.offset := ~p~0.base, ~p~0.offset; {83612#true} is VALID [2022-02-20 22:07:38,685 INFO L290 TraceCheckUtils]: 65: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,685 INFO L284 TraceCheckUtils]: 66: Hoare quadruple {83612#true} {83612#true} #555#return; {83612#true} is VALID [2022-02-20 22:07:38,685 INFO L290 TraceCheckUtils]: 67: Hoare triple {83612#true} ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset := ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset;havoc ldv_interface_to_usbdev_#t~ret208#1.base, ldv_interface_to_usbdev_#t~ret208#1.offset; {83612#true} is VALID [2022-02-20 22:07:38,685 INFO L290 TraceCheckUtils]: 68: Hoare triple {83612#true} assume !(0 == (ldv_interface_to_usbdev_~result~1#1.base + ldv_interface_to_usbdev_~result~1#1.offset) % 18446744073709551616);ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset := ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset; {83612#true} is VALID [2022-02-20 22:07:38,686 INFO L290 TraceCheckUtils]: 69: Hoare triple {83612#true} interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset := ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;assume { :end_inline_ldv_interface_to_usbdev } true;interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset := interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset;havoc interface_to_usbdev_#t~ret195#1.base, interface_to_usbdev_#t~ret195#1.offset;interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset := interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset; {83612#true} is VALID [2022-02-20 22:07:38,686 INFO L290 TraceCheckUtils]: 70: Hoare triple {83612#true} usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset := interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;assume { :end_inline_interface_to_usbdev } true;usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset := usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset;havoc usb_acecad_probe_#t~ret130#1.base, usb_acecad_probe_#t~ret130#1.offset;usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset := usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;call usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset := read~$Pointer$(usb_acecad_probe_~intf#1.base, 8 + usb_acecad_probe_~intf#1.offset, 8);usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset := usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset;havoc usb_acecad_probe_#t~mem131#1.base, usb_acecad_probe_#t~mem131#1.offset;call usb_acecad_probe_#t~mem132#1 := read~int(usb_acecad_probe_~interface~0#1.base, 4 + usb_acecad_probe_~interface~0#1.offset, 1); {83612#true} is VALID [2022-02-20 22:07:38,686 INFO L290 TraceCheckUtils]: 71: Hoare triple {83612#true} assume !(1 != usb_acecad_probe_#t~mem132#1 % 256 % 4294967296);havoc usb_acecad_probe_#t~mem132#1;call usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset := read~$Pointer$(usb_acecad_probe_~interface~0#1.base, 9 + usb_acecad_probe_~interface~0#1.offset, 8);usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset := usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset;havoc usb_acecad_probe_#t~mem133#1.base, usb_acecad_probe_#t~mem133#1.offset;assume { :begin_inline_usb_endpoint_is_int_in } true;usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset := usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_endpoint_is_int_in_#res#1;havoc usb_endpoint_is_int_in_#t~ret3#1, usb_endpoint_is_int_in_#t~ret4#1, usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset, usb_endpoint_is_int_in_~tmp~0#1, usb_endpoint_is_int_in_~tmp___0~0#1, usb_endpoint_is_int_in_~tmp___1~0#1;usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset := usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset;havoc usb_endpoint_is_int_in_~tmp~0#1;havoc usb_endpoint_is_int_in_~tmp___0~0#1;havoc usb_endpoint_is_int_in_~tmp___1~0#1;assume { :begin_inline_usb_endpoint_xfer_int } true;usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset := usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset;havoc usb_endpoint_xfer_int_#res#1;havoc usb_endpoint_xfer_int_#t~mem2#1, usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset;usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset := usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset;call usb_endpoint_xfer_int_#t~mem2#1 := read~int(usb_endpoint_xfer_int_~epd#1.base, 3 + usb_endpoint_xfer_int_~epd#1.offset, 1);usb_endpoint_xfer_int_#res#1 := (if 3 == (if 0 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 0 else (if 1 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 1 else ~bitwiseAnd(usb_endpoint_xfer_int_#t~mem2#1 % 256, 3))) then 1 else 0);havoc usb_endpoint_xfer_int_#t~mem2#1; {83612#true} is VALID [2022-02-20 22:07:38,686 INFO L290 TraceCheckUtils]: 72: Hoare triple {83612#true} usb_endpoint_is_int_in_#t~ret3#1 := usb_endpoint_xfer_int_#res#1;assume { :end_inline_usb_endpoint_xfer_int } true;assume -2147483648 <= usb_endpoint_is_int_in_#t~ret3#1 && usb_endpoint_is_int_in_#t~ret3#1 <= 2147483647;usb_endpoint_is_int_in_~tmp~0#1 := usb_endpoint_is_int_in_#t~ret3#1;havoc usb_endpoint_is_int_in_#t~ret3#1; {83612#true} is VALID [2022-02-20 22:07:38,686 INFO L290 TraceCheckUtils]: 73: Hoare triple {83612#true} assume 0 != usb_endpoint_is_int_in_~tmp~0#1;assume { :begin_inline_usb_endpoint_dir_in } true;usb_endpoint_dir_in_#in~epd#1.base, usb_endpoint_dir_in_#in~epd#1.offset := usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset;havoc usb_endpoint_dir_in_#res#1;havoc usb_endpoint_dir_in_#t~mem1#1, usb_endpoint_dir_in_~epd#1.base, usb_endpoint_dir_in_~epd#1.offset;usb_endpoint_dir_in_~epd#1.base, usb_endpoint_dir_in_~epd#1.offset := usb_endpoint_dir_in_#in~epd#1.base, usb_endpoint_dir_in_#in~epd#1.offset;call usb_endpoint_dir_in_#t~mem1#1 := read~int(usb_endpoint_dir_in_~epd#1.base, 2 + usb_endpoint_dir_in_~epd#1.offset, 1);usb_endpoint_dir_in_#res#1 := (if (if usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 <= 127 then usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 else usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 - 256) < 0 then 1 else 0);havoc usb_endpoint_dir_in_#t~mem1#1; {83612#true} is VALID [2022-02-20 22:07:38,686 INFO L290 TraceCheckUtils]: 74: Hoare triple {83612#true} usb_endpoint_is_int_in_#t~ret4#1 := usb_endpoint_dir_in_#res#1;assume { :end_inline_usb_endpoint_dir_in } true;assume -2147483648 <= usb_endpoint_is_int_in_#t~ret4#1 && usb_endpoint_is_int_in_#t~ret4#1 <= 2147483647;usb_endpoint_is_int_in_~tmp___0~0#1 := usb_endpoint_is_int_in_#t~ret4#1;havoc usb_endpoint_is_int_in_#t~ret4#1; {83612#true} is VALID [2022-02-20 22:07:38,686 INFO L290 TraceCheckUtils]: 75: Hoare triple {83612#true} assume 0 != usb_endpoint_is_int_in_~tmp___0~0#1;usb_endpoint_is_int_in_~tmp___1~0#1 := 1; {83612#true} is VALID [2022-02-20 22:07:38,686 INFO L290 TraceCheckUtils]: 76: Hoare triple {83612#true} usb_endpoint_is_int_in_#res#1 := usb_endpoint_is_int_in_~tmp___1~0#1; {83612#true} is VALID [2022-02-20 22:07:38,687 INFO L290 TraceCheckUtils]: 77: Hoare triple {83612#true} usb_acecad_probe_#t~ret134#1 := usb_endpoint_is_int_in_#res#1;assume { :end_inline_usb_endpoint_is_int_in } true;assume -2147483648 <= usb_acecad_probe_#t~ret134#1 && usb_acecad_probe_#t~ret134#1 <= 2147483647;usb_acecad_probe_~tmp___0~5#1 := usb_acecad_probe_#t~ret134#1;havoc usb_acecad_probe_#t~ret134#1; {83612#true} is VALID [2022-02-20 22:07:38,687 INFO L290 TraceCheckUtils]: 78: Hoare triple {83612#true} assume !(0 == usb_acecad_probe_~tmp___0~5#1);call usb_acecad_probe_#t~mem135#1 := read~int(usb_acecad_probe_~endpoint~0#1.base, 2 + usb_acecad_probe_~endpoint~0#1.offset, 1);assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_#t~mem135#1 % 256;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem45#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem45#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := (if (1 == 256 * __create_pipe_#t~mem45#1 || 0 == 256 * __create_pipe_#t~mem45#1) && 0 == 32768 * __create_pipe_~endpoint#1 then 256 * __create_pipe_#t~mem45#1 else (if 0 == 256 * __create_pipe_#t~mem45#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1) then 32768 * __create_pipe_~endpoint#1 else (if (1 == 256 * __create_pipe_#t~mem45#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1)) || ((1 == 256 * __create_pipe_#t~mem45#1 || 0 == 256 * __create_pipe_#t~mem45#1) && 1 == 32768 * __create_pipe_~endpoint#1) then 1 else ~bitwiseOr(256 * __create_pipe_#t~mem45#1, 32768 * __create_pipe_~endpoint#1))));havoc __create_pipe_#t~mem45#1; {83612#true} is VALID [2022-02-20 22:07:38,687 INFO L290 TraceCheckUtils]: 79: Hoare triple {83612#true} usb_acecad_probe_#t~ret136#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;usb_acecad_probe_~tmp___1~2#1 := usb_acecad_probe_#t~ret136#1;havoc usb_acecad_probe_#t~mem135#1;havoc usb_acecad_probe_#t~ret136#1;usb_acecad_probe_~pipe~0#1 := (if ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 else ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 - 4294967296);assume { :begin_inline_usb_maxpacket } true;usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset, usb_maxpacket_#in~pipe#1, usb_maxpacket_#in~is_out#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~pipe~0#1, (if 0 == (if 0 == usb_acecad_probe_~pipe~0#1 then 0 else (if 1 == usb_acecad_probe_~pipe~0#1 then 0 else ~bitwiseAnd(usb_acecad_probe_~pipe~0#1, 128))) then 1 else 0);havoc usb_maxpacket_#res#1;havoc usb_maxpacket_#t~ret47#1, usb_maxpacket_#t~ret48#1, usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset, usb_maxpacket_#t~ret50#1, usb_maxpacket_#t~ret51#1, usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset, usb_maxpacket_#t~mem53#1, usb_maxpacket_#t~nondet46#1, usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset, usb_maxpacket_~pipe#1, usb_maxpacket_~is_out#1, usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset, usb_maxpacket_~epnum~0#1, usb_maxpacket_~__ret_warn_on~0#1, usb_maxpacket_~tmp~2#1, usb_maxpacket_~__ret_warn_on___0~0#1, usb_maxpacket_~tmp___0~1#1;usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset := usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset;usb_maxpacket_~pipe#1 := usb_maxpacket_#in~pipe#1;usb_maxpacket_~is_out#1 := usb_maxpacket_#in~is_out#1;havoc usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset;havoc usb_maxpacket_~epnum~0#1;havoc usb_maxpacket_~__ret_warn_on~0#1;havoc usb_maxpacket_~tmp~2#1;havoc usb_maxpacket_~__ret_warn_on___0~0#1;havoc usb_maxpacket_~tmp___0~1#1; {83612#true} is VALID [2022-02-20 22:07:38,687 INFO L290 TraceCheckUtils]: 80: Hoare triple {83612#true} assume 0 == usb_maxpacket_~pipe#1 / 32768;usb_maxpacket_~epnum~0#1 := 0; {83612#true} is VALID [2022-02-20 22:07:38,687 INFO L290 TraceCheckUtils]: 81: Hoare triple {83612#true} assume !(0 != usb_maxpacket_~is_out#1);usb_maxpacket_~__ret_warn_on___0~0#1 := (if 0 == (if 0 == usb_maxpacket_~pipe#1 then 0 else (if 1 == usb_maxpacket_~pipe#1 then 0 else ~bitwiseAnd(usb_maxpacket_~pipe#1, 128))) then 1 else 0); {83612#true} is VALID [2022-02-20 22:07:38,687 INFO L272 TraceCheckUtils]: 82: Hoare triple {83612#true} call usb_maxpacket_#t~ret50#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {83612#true} is VALID [2022-02-20 22:07:38,687 INFO L290 TraceCheckUtils]: 83: Hoare triple {83612#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {83612#true} is VALID [2022-02-20 22:07:38,688 INFO L290 TraceCheckUtils]: 84: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,688 INFO L284 TraceCheckUtils]: 85: Hoare quadruple {83612#true} {83612#true} #563#return; {83612#true} is VALID [2022-02-20 22:07:38,688 INFO L290 TraceCheckUtils]: 86: Hoare triple {83612#true} assume -9223372036854775808 <= usb_maxpacket_#t~ret50#1 && usb_maxpacket_#t~ret50#1 <= 9223372036854775807;usb_maxpacket_~tmp___0~1#1 := usb_maxpacket_#t~ret50#1;havoc usb_maxpacket_#t~ret50#1; {83612#true} is VALID [2022-02-20 22:07:38,688 INFO L290 TraceCheckUtils]: 87: Hoare triple {83612#true} assume !(0 != usb_maxpacket_~tmp___0~1#1); {83612#true} is VALID [2022-02-20 22:07:38,688 INFO L272 TraceCheckUtils]: 88: Hoare triple {83612#true} call usb_maxpacket_#t~ret51#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {83612#true} is VALID [2022-02-20 22:07:38,688 INFO L290 TraceCheckUtils]: 89: Hoare triple {83612#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {83612#true} is VALID [2022-02-20 22:07:38,688 INFO L290 TraceCheckUtils]: 90: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,688 INFO L284 TraceCheckUtils]: 91: Hoare quadruple {83612#true} {83612#true} #567#return; {83612#true} is VALID [2022-02-20 22:07:38,689 INFO L290 TraceCheckUtils]: 92: Hoare triple {83612#true} assume -9223372036854775808 <= usb_maxpacket_#t~ret51#1 && usb_maxpacket_#t~ret51#1 <= 9223372036854775807;havoc usb_maxpacket_#t~ret51#1;call usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset := read~$Pointer$(usb_maxpacket_~udev#1.base, 1186 + usb_maxpacket_~udev#1.offset + 8 * (usb_maxpacket_~epnum~0#1 % 4294967296), 8);usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset := usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset;havoc usb_maxpacket_#t~mem52#1.base, usb_maxpacket_#t~mem52#1.offset; {83612#true} is VALID [2022-02-20 22:07:38,689 INFO L290 TraceCheckUtils]: 93: Hoare triple {83612#true} assume 0 == (usb_maxpacket_~ep~0#1.base + usb_maxpacket_~ep~0#1.offset) % 18446744073709551616;usb_maxpacket_#res#1 := 0; {83612#true} is VALID [2022-02-20 22:07:38,689 INFO L290 TraceCheckUtils]: 94: Hoare triple {83612#true} usb_acecad_probe_#t~ret137#1 := usb_maxpacket_#res#1;assume { :end_inline_usb_maxpacket } true;usb_acecad_probe_~tmp___2~0#1 := usb_acecad_probe_#t~ret137#1;havoc usb_acecad_probe_#t~ret137#1;usb_acecad_probe_~maxp~0#1 := usb_acecad_probe_~tmp___2~0#1 % 65536; {83612#true} is VALID [2022-02-20 22:07:38,689 INFO L272 TraceCheckUtils]: 95: Hoare triple {83612#true} call usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset := kzalloc(232, 208); {83726#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:38,689 INFO L290 TraceCheckUtils]: 96: Hoare triple {83726#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {83612#true} is VALID [2022-02-20 22:07:38,690 INFO L272 TraceCheckUtils]: 97: Hoare triple {83612#true} call __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset := ldv_malloc(__kmalloc_~size#1); {83726#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:38,690 INFO L290 TraceCheckUtils]: 98: Hoare triple {83726#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {83612#true} is VALID [2022-02-20 22:07:38,690 INFO L290 TraceCheckUtils]: 99: Hoare triple {83612#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {83612#true} is VALID [2022-02-20 22:07:38,690 INFO L290 TraceCheckUtils]: 100: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,690 INFO L284 TraceCheckUtils]: 101: Hoare quadruple {83612#true} {83612#true} #539#return; {83612#true} is VALID [2022-02-20 22:07:38,690 INFO L290 TraceCheckUtils]: 102: Hoare triple {83612#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset; {83612#true} is VALID [2022-02-20 22:07:38,691 INFO L290 TraceCheckUtils]: 103: Hoare triple {83612#true} kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {83612#true} is VALID [2022-02-20 22:07:38,691 INFO L290 TraceCheckUtils]: 104: Hoare triple {83612#true} #t~ret58#1.base, #t~ret58#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret58#1.base, #t~ret58#1.offset;havoc #t~ret58#1.base, #t~ret58#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {83612#true} is VALID [2022-02-20 22:07:38,691 INFO L290 TraceCheckUtils]: 105: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,691 INFO L284 TraceCheckUtils]: 106: Hoare quadruple {83612#true} {83612#true} #569#return; {83612#true} is VALID [2022-02-20 22:07:38,691 INFO L290 TraceCheckUtils]: 107: Hoare triple {83612#true} usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset := usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset;havoc usb_acecad_probe_#t~ret138#1.base, usb_acecad_probe_#t~ret138#1.offset;usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset := usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;assume { :begin_inline_input_allocate_device } true;havoc input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;havoc input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset; {83612#true} is VALID [2022-02-20 22:07:38,692 INFO L272 TraceCheckUtils]: 108: Hoare triple {83612#true} call input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset := kzalloc(1855, ~bitwiseOr(~bitwiseOr(16, 64), 128)); {83726#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:38,692 INFO L290 TraceCheckUtils]: 109: Hoare triple {83726#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {83612#true} is VALID [2022-02-20 22:07:38,692 INFO L272 TraceCheckUtils]: 110: Hoare triple {83612#true} call __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset := ldv_malloc(__kmalloc_~size#1); {83726#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:38,692 INFO L290 TraceCheckUtils]: 111: Hoare triple {83726#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {83612#true} is VALID [2022-02-20 22:07:38,692 INFO L290 TraceCheckUtils]: 112: Hoare triple {83612#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {83612#true} is VALID [2022-02-20 22:07:38,693 INFO L290 TraceCheckUtils]: 113: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,693 INFO L284 TraceCheckUtils]: 114: Hoare quadruple {83612#true} {83612#true} #539#return; {83612#true} is VALID [2022-02-20 22:07:38,693 INFO L290 TraceCheckUtils]: 115: Hoare triple {83612#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset;havoc __kmalloc_#t~ret56#1.base, __kmalloc_#t~ret56#1.offset; {83612#true} is VALID [2022-02-20 22:07:38,693 INFO L290 TraceCheckUtils]: 116: Hoare triple {83612#true} kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;havoc kmalloc_#t~ret57#1.base, kmalloc_#t~ret57#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {83612#true} is VALID [2022-02-20 22:07:38,693 INFO L290 TraceCheckUtils]: 117: Hoare triple {83612#true} #t~ret58#1.base, #t~ret58#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret58#1.base, #t~ret58#1.offset;havoc #t~ret58#1.base, #t~ret58#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {83612#true} is VALID [2022-02-20 22:07:38,693 INFO L290 TraceCheckUtils]: 118: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,693 INFO L284 TraceCheckUtils]: 119: Hoare quadruple {83612#true} {83612#true} #571#return; {83612#true} is VALID [2022-02-20 22:07:38,693 INFO L290 TraceCheckUtils]: 120: Hoare triple {83612#true} input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset := input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset;havoc input_allocate_device_#t~ret70#1.base, input_allocate_device_#t~ret70#1.offset; {83612#true} is VALID [2022-02-20 22:07:38,693 INFO L290 TraceCheckUtils]: 121: Hoare triple {83612#true} usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset := input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;assume { :end_inline_input_allocate_device } true;usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset := usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset;havoc usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset; {83612#true} is VALID [2022-02-20 22:07:38,694 INFO L290 TraceCheckUtils]: 122: Hoare triple {83612#true} assume !(0 == (usb_acecad_probe_~acecad~3#1.base + usb_acecad_probe_~acecad~3#1.offset) % 18446744073709551616 || 0 == (usb_acecad_probe_~input_dev~0#1.base + usb_acecad_probe_~input_dev~0#1.offset) % 18446744073709551616);assume { :begin_inline_usb_alloc_coherent } true;usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset, usb_alloc_coherent_#in~arg1#1, usb_alloc_coherent_#in~arg2#1, usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, 8, 208, usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset;havoc usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;havoc usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset, usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset, usb_alloc_coherent_~arg1#1, usb_alloc_coherent_~arg2#1, usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset;usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset := usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset;usb_alloc_coherent_~arg1#1 := usb_alloc_coherent_#in~arg1#1;usb_alloc_coherent_~arg2#1 := usb_alloc_coherent_#in~arg2#1;usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset := usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset; {83612#true} is VALID [2022-02-20 22:07:38,694 INFO L272 TraceCheckUtils]: 123: Hoare triple {83612#true} call usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset := ldv_malloc(0); {83726#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:38,694 INFO L290 TraceCheckUtils]: 124: Hoare triple {83726#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {83612#true} is VALID [2022-02-20 22:07:38,694 INFO L290 TraceCheckUtils]: 125: Hoare triple {83612#true} assume !(0 != ~tmp___0~2);call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size);~tmp~4.base, ~tmp~4.offset := #t~malloc63.base, #t~malloc63.offset;havoc #t~malloc63.base, #t~malloc63.offset;~p~0.base, ~p~0.offset := ~tmp~4.base, ~tmp~4.offset; {83612#true} is VALID [2022-02-20 22:07:38,694 INFO L272 TraceCheckUtils]: 126: Hoare triple {83612#true} call assume_abort_if_not((if 0 != (~p~0.base + ~p~0.offset) % 18446744073709551616 then 1 else 0)); {83612#true} is VALID [2022-02-20 22:07:38,694 INFO L290 TraceCheckUtils]: 127: Hoare triple {83612#true} ~cond := #in~cond; {83612#true} is VALID [2022-02-20 22:07:38,695 INFO L290 TraceCheckUtils]: 128: Hoare triple {83612#true} assume !(0 == ~cond); {83612#true} is VALID [2022-02-20 22:07:38,695 INFO L290 TraceCheckUtils]: 129: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,695 INFO L284 TraceCheckUtils]: 130: Hoare quadruple {83612#true} {83612#true} #551#return; {83612#true} is VALID [2022-02-20 22:07:38,695 INFO L290 TraceCheckUtils]: 131: Hoare triple {83612#true} #res.base, #res.offset := ~p~0.base, ~p~0.offset; {83612#true} is VALID [2022-02-20 22:07:38,695 INFO L290 TraceCheckUtils]: 132: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,695 INFO L284 TraceCheckUtils]: 133: Hoare quadruple {83612#true} {83612#true} #573#return; {83612#true} is VALID [2022-02-20 22:07:38,695 INFO L290 TraceCheckUtils]: 134: Hoare triple {83612#true} usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset := usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset;havoc usb_alloc_coherent_#t~ret215#1.base, usb_alloc_coherent_#t~ret215#1.offset; {83612#true} is VALID [2022-02-20 22:07:38,695 INFO L290 TraceCheckUtils]: 135: Hoare triple {83612#true} usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset := usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;assume { :end_inline_usb_alloc_coherent } true;usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset := usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset;havoc usb_acecad_probe_#t~ret140#1.base, usb_acecad_probe_#t~ret140#1.offset;call write~$Pointer$(usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8); {83612#true} is VALID [2022-02-20 22:07:38,695 INFO L290 TraceCheckUtils]: 136: Hoare triple {83612#true} assume !(0 == (usb_acecad_probe_#t~mem141#1.base + usb_acecad_probe_#t~mem141#1.offset) % 18446744073709551616);havoc usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset;assume { :begin_inline_ldv_usb_alloc_urb_5 } true;ldv_usb_alloc_urb_5_#in~ldv_func_arg1#1, ldv_usb_alloc_urb_5_#in~ldv_func_arg2#1 := 0, 208;havoc ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset, ldv_usb_alloc_urb_5_~ldv_func_arg1#1, ldv_usb_alloc_urb_5_~ldv_func_arg2#1, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset, ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;ldv_usb_alloc_urb_5_~ldv_func_arg1#1 := ldv_usb_alloc_urb_5_#in~ldv_func_arg1#1;ldv_usb_alloc_urb_5_~ldv_func_arg2#1 := ldv_usb_alloc_urb_5_#in~ldv_func_arg2#1;havoc ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset;havoc ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;assume { :begin_inline_usb_alloc_urb } true;usb_alloc_urb_#in~arg0#1, usb_alloc_urb_#in~arg1#1 := ldv_usb_alloc_urb_5_~ldv_func_arg1#1, ldv_usb_alloc_urb_5_~ldv_func_arg2#1;havoc usb_alloc_urb_#res#1.base, usb_alloc_urb_#res#1.offset;havoc usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset, usb_alloc_urb_~arg0#1, usb_alloc_urb_~arg1#1;usb_alloc_urb_~arg0#1 := usb_alloc_urb_#in~arg0#1;usb_alloc_urb_~arg1#1 := usb_alloc_urb_#in~arg1#1; {83612#true} is VALID [2022-02-20 22:07:38,696 INFO L272 TraceCheckUtils]: 137: Hoare triple {83612#true} call usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset := ldv_malloc(180); {83726#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:38,696 INFO L290 TraceCheckUtils]: 138: Hoare triple {83726#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {83612#true} is VALID [2022-02-20 22:07:38,696 INFO L290 TraceCheckUtils]: 139: Hoare triple {83612#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {83612#true} is VALID [2022-02-20 22:07:38,696 INFO L290 TraceCheckUtils]: 140: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,696 INFO L284 TraceCheckUtils]: 141: Hoare quadruple {83612#true} {83612#true} #575#return; {83612#true} is VALID [2022-02-20 22:07:38,696 INFO L290 TraceCheckUtils]: 142: Hoare triple {83612#true} usb_alloc_urb_#res#1.base, usb_alloc_urb_#res#1.offset := usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset;havoc usb_alloc_urb_#t~ret216#1.base, usb_alloc_urb_#t~ret216#1.offset; {83612#true} is VALID [2022-02-20 22:07:38,696 INFO L290 TraceCheckUtils]: 143: Hoare triple {83612#true} ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset := usb_alloc_urb_#res#1.base, usb_alloc_urb_#res#1.offset;assume { :end_inline_usb_alloc_urb } true;ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset := ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret199#1.base, ldv_usb_alloc_urb_5_#t~ret199#1.offset;ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset := ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;assume { :begin_inline_ldv_alloc_urb } true;ldv_alloc_urb_#in~res#1.base, ldv_alloc_urb_#in~res#1.offset := ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset;havoc ldv_alloc_urb_~res#1.base, ldv_alloc_urb_~res#1.offset;ldv_alloc_urb_~res#1.base, ldv_alloc_urb_~res#1.offset := ldv_alloc_urb_#in~res#1.base, ldv_alloc_urb_#in~res#1.offset; {83612#true} is VALID [2022-02-20 22:07:38,697 INFO L290 TraceCheckUtils]: 144: Hoare triple {83612#true} assume 0 != (ldv_alloc_urb_~res#1.base + ldv_alloc_urb_~res#1.offset) % 18446744073709551616;~URB_STATE~0 := 1 + ~URB_STATE~0; {83612#true} is VALID [2022-02-20 22:07:38,697 INFO L290 TraceCheckUtils]: 145: Hoare triple {83612#true} assume { :end_inline_ldv_alloc_urb } true;ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset := ldv_usb_alloc_urb_5_~ldv_func_res~1#1.base, ldv_usb_alloc_urb_5_~ldv_func_res~1#1.offset; {83612#true} is VALID [2022-02-20 22:07:38,697 INFO L290 TraceCheckUtils]: 146: Hoare triple {83612#true} usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset := ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;assume { :end_inline_ldv_usb_alloc_urb_5 } true;call write~$Pointer$(usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset, usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8);havoc usb_acecad_probe_#t~ret142#1.base, usb_acecad_probe_#t~ret142#1.offset;call usb_acecad_probe_#t~mem143#1.base, usb_acecad_probe_#t~mem143#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8); {83612#true} is VALID [2022-02-20 22:07:38,697 INFO L290 TraceCheckUtils]: 147: Hoare triple {83612#true} assume !(0 == (usb_acecad_probe_#t~mem143#1.base + usb_acecad_probe_#t~mem143#1.offset) % 18446744073709551616);havoc usb_acecad_probe_#t~mem143#1.base, usb_acecad_probe_#t~mem143#1.offset;call write~$Pointer$(usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~acecad~3#1.base, 192 + usb_acecad_probe_~acecad~3#1.offset, 8);call write~$Pointer$(usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset, usb_acecad_probe_~acecad~3#1.base, 200 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem144#1.base, usb_acecad_probe_#t~mem144#1.offset := read~$Pointer$(usb_acecad_probe_~dev~1#1.base, 1472 + usb_acecad_probe_~dev~1#1.offset, 8); {83612#true} is VALID [2022-02-20 22:07:38,697 INFO L290 TraceCheckUtils]: 148: Hoare triple {83612#true} assume !(0 != (usb_acecad_probe_#t~mem144#1.base + usb_acecad_probe_#t~mem144#1.offset) % 18446744073709551616);havoc usb_acecad_probe_#t~mem144#1.base, usb_acecad_probe_#t~mem144#1.offset; {83612#true} is VALID [2022-02-20 22:07:38,697 INFO L290 TraceCheckUtils]: 149: Hoare triple {83612#true} call usb_acecad_probe_#t~mem147#1.base, usb_acecad_probe_#t~mem147#1.offset := read~$Pointer$(usb_acecad_probe_~dev~1#1.base, 1464 + usb_acecad_probe_~dev~1#1.offset, 8); {83612#true} is VALID [2022-02-20 22:07:38,697 INFO L290 TraceCheckUtils]: 150: Hoare triple {83612#true} assume !(0 != (usb_acecad_probe_#t~mem147#1.base + usb_acecad_probe_#t~mem147#1.offset) % 18446744073709551616);havoc usb_acecad_probe_#t~mem147#1.base, usb_acecad_probe_#t~mem147#1.offset; {83612#true} is VALID [2022-02-20 22:07:38,697 INFO L290 TraceCheckUtils]: 151: Hoare triple {83612#true} assume { :begin_inline_usb_make_path } true;usb_make_path_#in~dev#1.base, usb_make_path_#in~dev#1.offset, usb_make_path_#in~buf#1.base, usb_make_path_#in~buf#1.offset, usb_make_path_#in~size#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~acecad~3#1.base, 128 + usb_acecad_probe_~acecad~3#1.offset, 64;havoc usb_make_path_#res#1;havoc usb_make_path_#t~nondet24#1, usb_make_path_#t~mem25#1.base, usb_make_path_#t~mem25#1.offset, usb_make_path_#t~mem26#1.base, usb_make_path_#t~mem26#1.offset, usb_make_path_#t~ite27#1, usb_make_path_~dev#1.base, usb_make_path_~dev#1.offset, usb_make_path_~buf#1.base, usb_make_path_~buf#1.offset, usb_make_path_~size#1, usb_make_path_~actual~0#1;usb_make_path_~dev#1.base, usb_make_path_~dev#1.offset := usb_make_path_#in~dev#1.base, usb_make_path_#in~dev#1.offset;usb_make_path_~buf#1.base, usb_make_path_~buf#1.offset := usb_make_path_#in~buf#1.base, usb_make_path_#in~buf#1.offset;usb_make_path_~size#1 := usb_make_path_#in~size#1;havoc usb_make_path_~actual~0#1;havoc usb_make_path_#t~nondet24#1;call usb_make_path_#t~mem25#1.base, usb_make_path_#t~mem25#1.offset := read~$Pointer$(usb_make_path_~dev#1.base, 60 + usb_make_path_~dev#1.offset, 8);call usb_make_path_#t~mem26#1.base, usb_make_path_#t~mem26#1.offset := read~$Pointer$(usb_make_path_#t~mem25#1.base, 12 + usb_make_path_#t~mem25#1.offset, 8);usb_make_path_~actual~0#1 := usb_make_path_#t~nondet24#1;havoc usb_make_path_#t~mem25#1.base, usb_make_path_#t~mem25#1.offset;havoc usb_make_path_#t~mem26#1.base, usb_make_path_#t~mem26#1.offset; {83612#true} is VALID [2022-02-20 22:07:38,698 INFO L290 TraceCheckUtils]: 152: Hoare triple {83612#true} assume (if usb_make_path_~size#1 % 18446744073709551616 % 4294967296 <= 2147483647 then usb_make_path_~size#1 % 18446744073709551616 % 4294967296 else usb_make_path_~size#1 % 18446744073709551616 % 4294967296 - 4294967296) > usb_make_path_~actual~0#1;usb_make_path_#t~ite27#1 := usb_make_path_~actual~0#1; {83612#true} is VALID [2022-02-20 22:07:38,698 INFO L290 TraceCheckUtils]: 153: Hoare triple {83612#true} usb_make_path_#res#1 := usb_make_path_#t~ite27#1;havoc usb_make_path_#t~ite27#1; {83612#true} is VALID [2022-02-20 22:07:38,698 INFO L290 TraceCheckUtils]: 154: Hoare triple {83612#true} usb_acecad_probe_#t~ret152#1 := usb_make_path_#res#1;assume { :end_inline_usb_make_path } true;assume -2147483648 <= usb_acecad_probe_#t~ret152#1 && usb_acecad_probe_#t~ret152#1 <= 2147483647;havoc usb_acecad_probe_#t~ret152#1; {83612#true} is VALID [2022-02-20 22:07:38,698 INFO L272 TraceCheckUtils]: 155: Hoare triple {83612#true} call usb_acecad_probe_#t~ret153#1 := strlcat(usb_acecad_probe_~acecad~3#1.base, 128 + usb_acecad_probe_~acecad~3#1.offset, 9, 0, 64); {83612#true} is VALID [2022-02-20 22:07:38,698 INFO L290 TraceCheckUtils]: 156: Hoare triple {83612#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1.base, ~arg1.offset := #in~arg1.base, #in~arg1.offset;~arg2 := #in~arg2;#res := #t~nondet213;havoc #t~nondet213; {83612#true} is VALID [2022-02-20 22:07:38,698 INFO L290 TraceCheckUtils]: 157: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,698 INFO L284 TraceCheckUtils]: 158: Hoare quadruple {83612#true} {83612#true} #581#return; {83612#true} is VALID [2022-02-20 22:07:38,698 INFO L290 TraceCheckUtils]: 159: Hoare triple {83612#true} havoc usb_acecad_probe_#t~ret153#1;call write~$Pointer$(usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset, usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset, 8);call write~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 128 + usb_acecad_probe_~acecad~3#1.offset, usb_acecad_probe_~input_dev~0#1.base, 8 + usb_acecad_probe_~input_dev~0#1.offset, 8);assume { :begin_inline_usb_to_input_id } true;usb_to_input_id_#in~dev#1.base, usb_to_input_id_#in~dev#1.offset, usb_to_input_id_#in~id#1.base, usb_to_input_id_#in~id#1.offset := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~input_dev~0#1.base, 24 + usb_acecad_probe_~input_dev~0#1.offset;havoc usb_to_input_id_#t~mem85#1, usb_to_input_id_#t~mem86#1, usb_to_input_id_#t~mem87#1, usb_to_input_id_~dev#1.base, usb_to_input_id_~dev#1.offset, usb_to_input_id_~id#1.base, usb_to_input_id_~id#1.offset;usb_to_input_id_~dev#1.base, usb_to_input_id_~dev#1.offset := usb_to_input_id_#in~dev#1.base, usb_to_input_id_#in~dev#1.offset;usb_to_input_id_~id#1.base, usb_to_input_id_~id#1.offset := usb_to_input_id_#in~id#1.base, usb_to_input_id_#in~id#1.offset;call write~int(3, usb_to_input_id_~id#1.base, usb_to_input_id_~id#1.offset, 2);call usb_to_input_id_#t~mem85#1 := read~int(usb_to_input_id_~dev#1.base, 1160 + usb_to_input_id_~dev#1.offset, 2);call write~int(usb_to_input_id_#t~mem85#1, usb_to_input_id_~id#1.base, 2 + usb_to_input_id_~id#1.offset, 2);havoc usb_to_input_id_#t~mem85#1;call usb_to_input_id_#t~mem86#1 := read~int(usb_to_input_id_~dev#1.base, 1162 + usb_to_input_id_~dev#1.offset, 2);call write~int(usb_to_input_id_#t~mem86#1, usb_to_input_id_~id#1.base, 4 + usb_to_input_id_~id#1.offset, 2);havoc usb_to_input_id_#t~mem86#1;call usb_to_input_id_#t~mem87#1 := read~int(usb_to_input_id_~dev#1.base, 1164 + usb_to_input_id_~dev#1.offset, 2);call write~int(usb_to_input_id_#t~mem87#1, usb_to_input_id_~id#1.base, 6 + usb_to_input_id_~id#1.offset, 2);havoc usb_to_input_id_#t~mem87#1; {83612#true} is VALID [2022-02-20 22:07:38,698 INFO L290 TraceCheckUtils]: 160: Hoare triple {83612#true} assume { :end_inline_usb_to_input_id } true;call write~$Pointer$(usb_acecad_probe_~intf#1.base, 44 + usb_acecad_probe_~intf#1.offset, usb_acecad_probe_~input_dev~0#1.base, 802 + usb_acecad_probe_~input_dev~0#1.offset, 8);assume { :begin_inline_input_set_drvdata } true;input_set_drvdata_#in~dev#1.base, input_set_drvdata_#in~dev#1.offset, input_set_drvdata_#in~data#1.base, input_set_drvdata_#in~data#1.offset := usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset, usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset;havoc input_set_drvdata_~dev#1.base, input_set_drvdata_~dev#1.offset, input_set_drvdata_~data#1.base, input_set_drvdata_~data#1.offset;input_set_drvdata_~dev#1.base, input_set_drvdata_~dev#1.offset := input_set_drvdata_#in~dev#1.base, input_set_drvdata_#in~dev#1.offset;input_set_drvdata_~data#1.base, input_set_drvdata_~data#1.offset := input_set_drvdata_#in~data#1.base, input_set_drvdata_#in~data#1.offset;assume { :begin_inline_dev_set_drvdata } true;dev_set_drvdata_#in~arg0#1.base, dev_set_drvdata_#in~arg0#1.offset, dev_set_drvdata_#in~arg1#1.base, dev_set_drvdata_#in~arg1#1.offset := input_set_drvdata_~dev#1.base, 802 + input_set_drvdata_~dev#1.offset, input_set_drvdata_~data#1.base, input_set_drvdata_~data#1.offset;havoc dev_set_drvdata_~arg0#1.base, dev_set_drvdata_~arg0#1.offset, dev_set_drvdata_~arg1#1.base, dev_set_drvdata_~arg1#1.offset;dev_set_drvdata_~arg0#1.base, dev_set_drvdata_~arg0#1.offset := dev_set_drvdata_#in~arg0#1.base, dev_set_drvdata_#in~arg0#1.offset;dev_set_drvdata_~arg1#1.base, dev_set_drvdata_~arg1#1.offset := dev_set_drvdata_#in~arg1#1.base, dev_set_drvdata_#in~arg1#1.offset; {83612#true} is VALID [2022-02-20 22:07:38,699 INFO L290 TraceCheckUtils]: 161: Hoare triple {83612#true} assume { :end_inline_dev_set_drvdata } true; {83612#true} is VALID [2022-02-20 22:07:38,699 INFO L290 TraceCheckUtils]: 162: Hoare triple {83612#true} assume { :end_inline_input_set_drvdata } true;call write~$Pointer$(#funAddr~usb_acecad_open.base, #funAddr~usb_acecad_open.offset, usb_acecad_probe_~input_dev~0#1.base, 540 + usb_acecad_probe_~input_dev~0#1.offset, 8);call write~$Pointer$(#funAddr~usb_acecad_close.base, #funAddr~usb_acecad_close.offset, usb_acecad_probe_~input_dev~0#1.base, 548 + usb_acecad_probe_~input_dev~0#1.offset, 8);call write~int(10, usb_acecad_probe_~input_dev~0#1.base, 32 + usb_acecad_probe_~input_dev~0#1.offset, 8);call write~int(7169, usb_acecad_probe_~input_dev~0#1.base, 80 + usb_acecad_probe_~input_dev~0#1.offset, 8);call usb_acecad_probe_#t~mem154#1 := read~int(usb_acecad_probe_~id#1.base, 16 + usb_acecad_probe_~id#1.offset, 8);usb_acecad_probe_#t~switch155#1 := 0 == usb_acecad_probe_#t~mem154#1; {83612#true} is VALID [2022-02-20 22:07:38,699 INFO L290 TraceCheckUtils]: 163: Hoare triple {83612#true} assume !usb_acecad_probe_#t~switch155#1;usb_acecad_probe_#t~switch155#1 := usb_acecad_probe_#t~switch155#1 || 1 == usb_acecad_probe_#t~mem154#1; {83612#true} is VALID [2022-02-20 22:07:38,699 INFO L290 TraceCheckUtils]: 164: Hoare triple {83612#true} assume !usb_acecad_probe_#t~switch155#1; {83612#true} is VALID [2022-02-20 22:07:38,699 INFO L290 TraceCheckUtils]: 165: Hoare triple {83612#true} havoc usb_acecad_probe_#t~mem154#1;havoc usb_acecad_probe_#t~switch155#1; {83612#true} is VALID [2022-02-20 22:07:38,699 INFO L290 TraceCheckUtils]: 166: Hoare triple {83612#true} call usb_acecad_probe_#t~mem164#1.base, usb_acecad_probe_#t~mem164#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem165#1.base, usb_acecad_probe_#t~mem165#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8); {83612#true} is VALID [2022-02-20 22:07:38,699 INFO L290 TraceCheckUtils]: 167: Hoare triple {83612#true} assume 8 < usb_acecad_probe_~maxp~0#1;usb_acecad_probe_#t~ite166#1 := 8; {83612#true} is VALID [2022-02-20 22:07:38,699 INFO L290 TraceCheckUtils]: 168: Hoare triple {83612#true} call usb_acecad_probe_#t~mem167#1 := read~int(usb_acecad_probe_~endpoint~0#1.base, 6 + usb_acecad_probe_~endpoint~0#1.offset, 1);assume { :begin_inline_ldv_usb_fill_int_urb_6 } true;ldv_usb_fill_int_urb_6_#in~urb#1.base, ldv_usb_fill_int_urb_6_#in~urb#1.offset, ldv_usb_fill_int_urb_6_#in~dev#1.base, ldv_usb_fill_int_urb_6_#in~dev#1.offset, ldv_usb_fill_int_urb_6_#in~pipe#1, ldv_usb_fill_int_urb_6_#in~transfer_buffer#1.base, ldv_usb_fill_int_urb_6_#in~transfer_buffer#1.offset, ldv_usb_fill_int_urb_6_#in~buffer_length#1, ldv_usb_fill_int_urb_6_#in~complete_fn#1.base, ldv_usb_fill_int_urb_6_#in~complete_fn#1.offset, ldv_usb_fill_int_urb_6_#in~context#1.base, ldv_usb_fill_int_urb_6_#in~context#1.offset, ldv_usb_fill_int_urb_6_#in~interval#1 := usb_acecad_probe_#t~mem164#1.base, usb_acecad_probe_#t~mem164#1.offset, usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~pipe~0#1, usb_acecad_probe_#t~mem165#1.base, usb_acecad_probe_#t~mem165#1.offset, usb_acecad_probe_#t~ite166#1, #funAddr~usb_acecad_irq.base, #funAddr~usb_acecad_irq.offset, usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset, usb_acecad_probe_#t~mem167#1 % 256;havoc ldv_usb_fill_int_urb_6_~urb#1.base, ldv_usb_fill_int_urb_6_~urb#1.offset, ldv_usb_fill_int_urb_6_~dev#1.base, ldv_usb_fill_int_urb_6_~dev#1.offset, ldv_usb_fill_int_urb_6_~pipe#1, ldv_usb_fill_int_urb_6_~transfer_buffer#1.base, ldv_usb_fill_int_urb_6_~transfer_buffer#1.offset, ldv_usb_fill_int_urb_6_~buffer_length#1, ldv_usb_fill_int_urb_6_~complete_fn#1.base, ldv_usb_fill_int_urb_6_~complete_fn#1.offset, ldv_usb_fill_int_urb_6_~context#1.base, ldv_usb_fill_int_urb_6_~context#1.offset, ldv_usb_fill_int_urb_6_~interval#1;ldv_usb_fill_int_urb_6_~urb#1.base, ldv_usb_fill_int_urb_6_~urb#1.offset := ldv_usb_fill_int_urb_6_#in~urb#1.base, ldv_usb_fill_int_urb_6_#in~urb#1.offset;ldv_usb_fill_int_urb_6_~dev#1.base, ldv_usb_fill_int_urb_6_~dev#1.offset := ldv_usb_fill_int_urb_6_#in~dev#1.base, ldv_usb_fill_int_urb_6_#in~dev#1.offset;ldv_usb_fill_int_urb_6_~pipe#1 := ldv_usb_fill_int_urb_6_#in~pipe#1;ldv_usb_fill_int_urb_6_~transfer_buffer#1.base, ldv_usb_fill_int_urb_6_~transfer_buffer#1.offset := ldv_usb_fill_int_urb_6_#in~transfer_buffer#1.base, ldv_usb_fill_int_urb_6_#in~transfer_buffer#1.offset;ldv_usb_fill_int_urb_6_~buffer_length#1 := ldv_usb_fill_int_urb_6_#in~buffer_length#1;ldv_usb_fill_int_urb_6_~complete_fn#1.base, ldv_usb_fill_int_urb_6_~complete_fn#1.offset := ldv_usb_fill_int_urb_6_#in~complete_fn#1.base, ldv_usb_fill_int_urb_6_#in~complete_fn#1.offset;ldv_usb_fill_int_urb_6_~context#1.base, ldv_usb_fill_int_urb_6_~context#1.offset := ldv_usb_fill_int_urb_6_#in~context#1.base, ldv_usb_fill_int_urb_6_#in~context#1.offset;ldv_usb_fill_int_urb_6_~interval#1 := ldv_usb_fill_int_urb_6_#in~interval#1;assume { :begin_inline_ldv_fill_int_urb } true;ldv_fill_int_urb_#in~complete_fn#1.base, ldv_fill_int_urb_#in~complete_fn#1.offset := ldv_usb_fill_int_urb_6_~complete_fn#1.base, ldv_usb_fill_int_urb_6_~complete_fn#1.offset;havoc ldv_fill_int_urb_#t~ret201#1.base, ldv_fill_int_urb_#t~ret201#1.offset, ldv_fill_int_urb_#t~ret202#1, ldv_fill_int_urb_~complete_fn#1.base, ldv_fill_int_urb_~complete_fn#1.offset, ldv_fill_int_urb_~value~0#1.base, ldv_fill_int_urb_~value~0#1.offset, ldv_fill_int_urb_~tmp___0~7#1;ldv_fill_int_urb_~complete_fn#1.base, ldv_fill_int_urb_~complete_fn#1.offset := ldv_fill_int_urb_#in~complete_fn#1.base, ldv_fill_int_urb_#in~complete_fn#1.offset;havoc ldv_fill_int_urb_~value~0#1.base, ldv_fill_int_urb_~value~0#1.offset;havoc ldv_fill_int_urb_~tmp___0~7#1; {83612#true} is VALID [2022-02-20 22:07:38,700 INFO L272 TraceCheckUtils]: 169: Hoare triple {83612#true} call ldv_fill_int_urb_#t~ret201#1.base, ldv_fill_int_urb_#t~ret201#1.offset := ldv_malloc(180); {83726#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:38,700 INFO L290 TraceCheckUtils]: 170: Hoare triple {83726#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet62 && #t~nondet62 <= 2147483647;~tmp___0~2 := #t~nondet62;havoc #t~nondet62; {83612#true} is VALID [2022-02-20 22:07:38,700 INFO L290 TraceCheckUtils]: 171: Hoare triple {83612#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {83612#true} is VALID [2022-02-20 22:07:38,700 INFO L290 TraceCheckUtils]: 172: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,700 INFO L284 TraceCheckUtils]: 173: Hoare quadruple {83612#true} {83612#true} #595#return; {83612#true} is VALID [2022-02-20 22:07:38,700 INFO L290 TraceCheckUtils]: 174: Hoare triple {83612#true} ldv_fill_int_urb_~value~0#1.base, ldv_fill_int_urb_~value~0#1.offset := ldv_fill_int_urb_#t~ret201#1.base, ldv_fill_int_urb_#t~ret201#1.offset;havoc ldv_fill_int_urb_#t~ret201#1.base, ldv_fill_int_urb_#t~ret201#1.offset; {83612#true} is VALID [2022-02-20 22:07:38,701 INFO L290 TraceCheckUtils]: 175: Hoare triple {83612#true} assume !(0 == (ldv_fill_int_urb_~value~0#1.base + ldv_fill_int_urb_~value~0#1.offset) % 18446744073709551616); {83612#true} is VALID [2022-02-20 22:07:38,701 INFO L272 TraceCheckUtils]: 176: Hoare triple {83612#true} call ldv_fill_int_urb_#t~ret202#1 := ldv_undef_int(); {83612#true} is VALID [2022-02-20 22:07:38,701 INFO L290 TraceCheckUtils]: 177: Hoare triple {83612#true} havoc ~tmp~8;assume -2147483648 <= #t~nondet68 && #t~nondet68 <= 2147483647;~tmp~8 := #t~nondet68;havoc #t~nondet68;#res := ~tmp~8; {83612#true} is VALID [2022-02-20 22:07:38,701 INFO L290 TraceCheckUtils]: 178: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,701 INFO L284 TraceCheckUtils]: 179: Hoare quadruple {83612#true} {83612#true} #599#return; {83612#true} is VALID [2022-02-20 22:07:38,701 INFO L290 TraceCheckUtils]: 180: Hoare triple {83612#true} assume -2147483648 <= ldv_fill_int_urb_#t~ret202#1 && ldv_fill_int_urb_#t~ret202#1 <= 2147483647;ldv_fill_int_urb_~tmp___0~7#1 := ldv_fill_int_urb_#t~ret202#1;havoc ldv_fill_int_urb_#t~ret202#1; {83612#true} is VALID [2022-02-20 22:07:38,701 INFO L290 TraceCheckUtils]: 181: Hoare triple {83612#true} assume !(0 != ldv_fill_int_urb_~tmp___0~7#1); {83612#true} is VALID [2022-02-20 22:07:38,701 INFO L290 TraceCheckUtils]: 182: Hoare triple {83612#true} assume { :end_inline_ldv_fill_int_urb } true; {83612#true} is VALID [2022-02-20 22:07:38,702 INFO L290 TraceCheckUtils]: 183: Hoare triple {83612#true} assume { :end_inline_ldv_usb_fill_int_urb_6 } true;havoc usb_acecad_probe_#t~mem164#1.base, usb_acecad_probe_#t~mem164#1.offset;havoc usb_acecad_probe_#t~mem165#1.base, usb_acecad_probe_#t~mem165#1.offset;havoc usb_acecad_probe_#t~ite166#1;havoc usb_acecad_probe_#t~mem167#1;call usb_acecad_probe_#t~mem168#1.base, usb_acecad_probe_#t~mem168#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem169#1 := read~int(usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset, 8);call write~int(usb_acecad_probe_#t~mem169#1, usb_acecad_probe_#t~mem168#1.base, 104 + usb_acecad_probe_#t~mem168#1.offset, 8);havoc usb_acecad_probe_#t~mem168#1.base, usb_acecad_probe_#t~mem168#1.offset;havoc usb_acecad_probe_#t~mem169#1;call usb_acecad_probe_#t~mem170#1.base, usb_acecad_probe_#t~mem170#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem171#1.base, usb_acecad_probe_#t~mem171#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem172#1 := read~int(usb_acecad_probe_#t~mem171#1.base, 92 + usb_acecad_probe_#t~mem171#1.offset, 4);call write~int(~bitwiseOr(usb_acecad_probe_#t~mem172#1, 4), usb_acecad_probe_#t~mem170#1.base, 92 + usb_acecad_probe_#t~mem170#1.offset, 4);havoc usb_acecad_probe_#t~mem170#1.base, usb_acecad_probe_#t~mem170#1.offset;havoc usb_acecad_probe_#t~mem171#1.base, usb_acecad_probe_#t~mem171#1.offset;havoc usb_acecad_probe_#t~mem172#1;call usb_acecad_probe_#t~mem173#1.base, usb_acecad_probe_#t~mem173#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 200 + usb_acecad_probe_~acecad~3#1.offset, 8);assume { :begin_inline_input_register_device } true;input_register_device_#in~arg0#1.base, input_register_device_#in~arg0#1.offset := usb_acecad_probe_#t~mem173#1.base, usb_acecad_probe_#t~mem173#1.offset;havoc input_register_device_#res#1;havoc input_register_device_#t~nondet211#1, input_register_device_~arg0#1.base, input_register_device_~arg0#1.offset;input_register_device_~arg0#1.base, input_register_device_~arg0#1.offset := input_register_device_#in~arg0#1.base, input_register_device_#in~arg0#1.offset;assume -2147483648 <= input_register_device_#t~nondet211#1 && input_register_device_#t~nondet211#1 <= 2147483647;input_register_device_#res#1 := input_register_device_#t~nondet211#1;havoc input_register_device_#t~nondet211#1; {83612#true} is VALID [2022-02-20 22:07:38,702 INFO L290 TraceCheckUtils]: 184: Hoare triple {83612#true} usb_acecad_probe_#t~ret174#1 := input_register_device_#res#1;assume { :end_inline_input_register_device } true;assume -2147483648 <= usb_acecad_probe_#t~ret174#1 && usb_acecad_probe_#t~ret174#1 <= 2147483647;usb_acecad_probe_~err~0#1 := usb_acecad_probe_#t~ret174#1;havoc usb_acecad_probe_#t~mem173#1.base, usb_acecad_probe_#t~mem173#1.offset;havoc usb_acecad_probe_#t~ret174#1; {83612#true} is VALID [2022-02-20 22:07:38,702 INFO L290 TraceCheckUtils]: 185: Hoare triple {83612#true} assume !(0 != usb_acecad_probe_~err~0#1); {83612#true} is VALID [2022-02-20 22:07:38,702 INFO L272 TraceCheckUtils]: 186: Hoare triple {83612#true} call ldv_usb_set_intfdata_7(usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset, usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset); {83743#(and (= ~usb_intfdata~0.offset |old(~usb_intfdata~0.offset)|) (= ~usb_intfdata~0.base |old(~usb_intfdata~0.base)|))} is VALID [2022-02-20 22:07:38,703 INFO L290 TraceCheckUtils]: 187: Hoare triple {83743#(and (= ~usb_intfdata~0.offset |old(~usb_intfdata~0.offset)|) (= ~usb_intfdata~0.base |old(~usb_intfdata~0.base)|))} ~intf#1.base, ~intf#1.offset := #in~intf#1.base, #in~intf#1.offset;~data#1.base, ~data#1.offset := #in~data#1.base, #in~data#1.offset;assume { :begin_inline_ldv_usb_set_intfdata } true;ldv_usb_set_intfdata_#in~data#1.base, ldv_usb_set_intfdata_#in~data#1.offset := ~data#1.base, ~data#1.offset;havoc ldv_usb_set_intfdata_~data#1.base, ldv_usb_set_intfdata_~data#1.offset;ldv_usb_set_intfdata_~data#1.base, ldv_usb_set_intfdata_~data#1.offset := ldv_usb_set_intfdata_#in~data#1.base, ldv_usb_set_intfdata_#in~data#1.offset;~usb_intfdata~0.base, ~usb_intfdata~0.offset := ldv_usb_set_intfdata_~data#1.base, ldv_usb_set_intfdata_~data#1.offset; {83612#true} is VALID [2022-02-20 22:07:38,703 INFO L290 TraceCheckUtils]: 188: Hoare triple {83612#true} assume { :end_inline_ldv_usb_set_intfdata } true; {83612#true} is VALID [2022-02-20 22:07:38,703 INFO L290 TraceCheckUtils]: 189: Hoare triple {83612#true} assume true; {83612#true} is VALID [2022-02-20 22:07:38,703 INFO L284 TraceCheckUtils]: 190: Hoare quadruple {83612#true} {83612#true} #601#return; {83612#true} is VALID [2022-02-20 22:07:38,703 INFO L290 TraceCheckUtils]: 191: Hoare triple {83612#true} usb_acecad_probe_#res#1 := 0; {83708#(= |ULTIMATE.start_usb_acecad_probe_#res#1| 0)} is VALID [2022-02-20 22:07:38,704 INFO L290 TraceCheckUtils]: 192: Hoare triple {83708#(= |ULTIMATE.start_usb_acecad_probe_#res#1| 0)} main_#t~ret191#1 := usb_acecad_probe_#res#1;assume { :end_inline_usb_acecad_probe } true;assume -2147483648 <= main_#t~ret191#1 && main_#t~ret191#1 <= 2147483647;~ldv_retval_0~0 := main_#t~ret191#1;havoc main_#t~ret191#1; {83709#(= ~ldv_retval_0~0 0)} is VALID [2022-02-20 22:07:38,704 INFO L290 TraceCheckUtils]: 193: Hoare triple {83709#(= ~ldv_retval_0~0 0)} assume !(0 == ~ldv_retval_0~0); {83613#false} is VALID [2022-02-20 22:07:38,704 INFO L290 TraceCheckUtils]: 194: Hoare triple {83613#false} assume -2147483648 <= main_#t~nondet187#1 && main_#t~nondet187#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet187#1;havoc main_#t~nondet187#1;main_#t~switch188#1 := 0 == main_~tmp___0~6#1; {83613#false} is VALID [2022-02-20 22:07:38,704 INFO L290 TraceCheckUtils]: 195: Hoare triple {83613#false} assume !main_#t~switch188#1;main_#t~switch188#1 := main_#t~switch188#1 || 1 == main_~tmp___0~6#1; {83613#false} is VALID [2022-02-20 22:07:38,704 INFO L290 TraceCheckUtils]: 196: Hoare triple {83613#false} assume main_#t~switch188#1; {83613#false} is VALID [2022-02-20 22:07:38,704 INFO L290 TraceCheckUtils]: 197: Hoare triple {83613#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet192#1 && main_#t~nondet192#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet192#1;havoc main_#t~nondet192#1;main_#t~switch193#1 := 0 == main_~tmp___2~1#1; {83613#false} is VALID [2022-02-20 22:07:38,704 INFO L290 TraceCheckUtils]: 198: Hoare triple {83613#false} assume main_#t~switch193#1; {83613#false} is VALID [2022-02-20 22:07:38,705 INFO L290 TraceCheckUtils]: 199: Hoare triple {83613#false} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0;assume { :begin_inline_usb_acecad_exit } true;assume { :begin_inline_ldv_usb_deregister_11 } true;ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset := ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset;assume { :begin_inline_usb_deregister } true;usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset := ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;havoc usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset;usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset := usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset; {83613#false} is VALID [2022-02-20 22:07:38,705 INFO L290 TraceCheckUtils]: 200: Hoare triple {83613#false} assume { :end_inline_usb_deregister } true;~ldv_state_variable_1~0 := 0; {83613#false} is VALID [2022-02-20 22:07:38,705 INFO L290 TraceCheckUtils]: 201: Hoare triple {83613#false} assume { :end_inline_ldv_usb_deregister_11 } true; {83613#false} is VALID [2022-02-20 22:07:38,705 INFO L290 TraceCheckUtils]: 202: Hoare triple {83613#false} assume { :end_inline_usb_acecad_exit } true;~ldv_state_variable_0~0 := 2; {83613#false} is VALID [2022-02-20 22:07:38,705 INFO L290 TraceCheckUtils]: 203: Hoare triple {83613#false} assume { :begin_inline_ldv_check_final_state } true; {83613#false} is VALID [2022-02-20 22:07:38,705 INFO L290 TraceCheckUtils]: 204: Hoare triple {83613#false} assume 0 != ~URB_STATE~0; {83613#false} is VALID [2022-02-20 22:07:38,705 INFO L272 TraceCheckUtils]: 205: Hoare triple {83613#false} call ldv_error(); {83613#false} is VALID [2022-02-20 22:07:38,705 INFO L290 TraceCheckUtils]: 206: Hoare triple {83613#false} assume !false; {83613#false} is VALID [2022-02-20 22:07:38,706 INFO L134 CoverageAnalysis]: Checked inductivity of 115 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 108 trivial. 0 not checked. [2022-02-20 22:07:38,706 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:07:38,706 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1138094751] [2022-02-20 22:07:38,706 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1138094751] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:07:38,706 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 22:07:38,706 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-02-20 22:07:38,706 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1047138044] [2022-02-20 22:07:38,707 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:07:38,707 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 15.75) internal successors, (126), 4 states have internal predecessors, (126), 2 states have call successors, (18), 6 states have call predecessors, (18), 1 states have return successors, (17), 1 states have call predecessors, (17), 1 states have call successors, (17) Word has length 207 [2022-02-20 22:07:38,707 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:07:38,708 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 8 states, 8 states have (on average 15.75) internal successors, (126), 4 states have internal predecessors, (126), 2 states have call successors, (18), 6 states have call predecessors, (18), 1 states have return successors, (17), 1 states have call predecessors, (17), 1 states have call successors, (17) [2022-02-20 22:07:38,807 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 161 edges. 161 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:38,808 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-02-20 22:07:38,808 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:07:38,808 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-02-20 22:07:38,808 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-02-20 22:07:38,808 INFO L87 Difference]: Start difference. First operand 2801 states and 3665 transitions. Second operand has 8 states, 8 states have (on average 15.75) internal successors, (126), 4 states have internal predecessors, (126), 2 states have call successors, (18), 6 states have call predecessors, (18), 1 states have return successors, (17), 1 states have call predecessors, (17), 1 states have call successors, (17)