./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/ldv-validator-v0.8/linux-stable-a450319-1-144_2a-drivers--input--tablet--acecad.ko-entry_point_ldv-val-v0.8.cil.out.i --full-output -ea --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 03d7b7b3 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -ea -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/ldv-validator-v0.8/linux-stable-a450319-1-144_2a-drivers--input--tablet--acecad.ko-entry_point_ldv-val-v0.8.cil.out.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 07ae4eb392cc9822cbd398c1edf107cccc60d6668bc59dbf5a692a6b9350873b --- Real Ultimate output --- This is Ultimate 0.2.2-dev-03d7b7b [2022-02-20 22:06:52,237 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-02-20 22:06:52,240 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-02-20 22:06:52,290 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-02-20 22:06:52,291 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-02-20 22:06:52,294 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-02-20 22:06:52,296 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-02-20 22:06:52,299 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-02-20 22:06:52,301 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-02-20 22:06:52,307 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-02-20 22:06:52,308 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-02-20 22:06:52,309 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-02-20 22:06:52,309 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-02-20 22:06:52,312 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-02-20 22:06:52,313 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-02-20 22:06:52,317 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-02-20 22:06:52,318 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-02-20 22:06:52,319 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-02-20 22:06:52,321 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-02-20 22:06:52,325 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-02-20 22:06:52,327 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-02-20 22:06:52,328 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-02-20 22:06:52,330 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-02-20 22:06:52,330 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-02-20 22:06:52,334 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-02-20 22:06:52,335 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-02-20 22:06:52,335 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-02-20 22:06:52,336 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-02-20 22:06:52,337 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-02-20 22:06:52,338 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-02-20 22:06:52,338 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-02-20 22:06:52,339 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-02-20 22:06:52,340 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-02-20 22:06:52,341 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-02-20 22:06:52,342 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-02-20 22:06:52,343 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-02-20 22:06:52,343 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-02-20 22:06:52,343 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-02-20 22:06:52,344 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-02-20 22:06:52,344 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-02-20 22:06:52,345 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-02-20 22:06:52,346 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2022-02-20 22:06:52,379 INFO L113 SettingsManager]: Loading preferences was successful [2022-02-20 22:06:52,379 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-02-20 22:06:52,380 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-02-20 22:06:52,380 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-02-20 22:06:52,381 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-02-20 22:06:52,381 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-02-20 22:06:52,381 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-02-20 22:06:52,382 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-02-20 22:06:52,382 INFO L138 SettingsManager]: * Use SBE=true [2022-02-20 22:06:52,382 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-02-20 22:06:52,383 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-02-20 22:06:52,383 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-02-20 22:06:52,383 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-02-20 22:06:52,383 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-02-20 22:06:52,384 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-02-20 22:06:52,384 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-02-20 22:06:52,384 INFO L138 SettingsManager]: * Use constant arrays=true [2022-02-20 22:06:52,384 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-02-20 22:06:52,384 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-02-20 22:06:52,385 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-02-20 22:06:52,385 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-02-20 22:06:52,385 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-02-20 22:06:52,385 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-02-20 22:06:52,385 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-02-20 22:06:52,386 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-02-20 22:06:52,386 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-02-20 22:06:52,386 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-02-20 22:06:52,386 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2022-02-20 22:06:52,386 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2022-02-20 22:06:52,387 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-02-20 22:06:52,387 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 07ae4eb392cc9822cbd398c1edf107cccc60d6668bc59dbf5a692a6b9350873b [2022-02-20 22:06:52,605 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-02-20 22:06:52,623 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-02-20 22:06:52,626 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-02-20 22:06:52,627 INFO L271 PluginConnector]: Initializing CDTParser... [2022-02-20 22:06:52,628 INFO L275 PluginConnector]: CDTParser initialized [2022-02-20 22:06:52,629 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/ldv-validator-v0.8/linux-stable-a450319-1-144_2a-drivers--input--tablet--acecad.ko-entry_point_ldv-val-v0.8.cil.out.i [2022-02-20 22:06:52,682 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/e7f5c6ba1/db0a6b18113843b4ad09714572f96732/FLAGbcce4ea64 [2022-02-20 22:06:53,233 INFO L306 CDTParser]: Found 1 translation units. [2022-02-20 22:06:53,235 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-validator-v0.8/linux-stable-a450319-1-144_2a-drivers--input--tablet--acecad.ko-entry_point_ldv-val-v0.8.cil.out.i [2022-02-20 22:06:53,265 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/e7f5c6ba1/db0a6b18113843b4ad09714572f96732/FLAGbcce4ea64 [2022-02-20 22:06:53,490 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/e7f5c6ba1/db0a6b18113843b4ad09714572f96732 [2022-02-20 22:06:53,492 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-02-20 22:06:53,493 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-02-20 22:06:53,495 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-02-20 22:06:53,495 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-02-20 22:06:53,497 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-02-20 22:06:53,498 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.02 10:06:53" (1/1) ... [2022-02-20 22:06:53,499 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7da66db1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:06:53, skipping insertion in model container [2022-02-20 22:06:53,499 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.02 10:06:53" (1/1) ... [2022-02-20 22:06:53,505 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-02-20 22:06:53,557 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-02-20 22:06:54,262 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-validator-v0.8/linux-stable-a450319-1-144_2a-drivers--input--tablet--acecad.ko-entry_point_ldv-val-v0.8.cil.out.i[113497,113510] [2022-02-20 22:06:54,318 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-20 22:06:54,341 INFO L203 MainTranslator]: Completed pre-run [2022-02-20 22:06:54,519 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-validator-v0.8/linux-stable-a450319-1-144_2a-drivers--input--tablet--acecad.ko-entry_point_ldv-val-v0.8.cil.out.i[113497,113510] [2022-02-20 22:06:54,541 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-20 22:06:54,571 INFO L208 MainTranslator]: Completed translation [2022-02-20 22:06:54,572 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:06:54 WrapperNode [2022-02-20 22:06:54,573 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-02-20 22:06:54,574 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-02-20 22:06:54,574 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-02-20 22:06:54,575 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-02-20 22:06:54,580 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:06:54" (1/1) ... [2022-02-20 22:06:54,618 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:06:54" (1/1) ... [2022-02-20 22:06:54,697 INFO L137 Inliner]: procedures = 107, calls = 312, calls flagged for inlining = 47, calls inlined = 41, statements flattened = 771 [2022-02-20 22:06:54,697 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-02-20 22:06:54,698 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-02-20 22:06:54,698 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-02-20 22:06:54,698 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-02-20 22:06:54,706 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:06:54" (1/1) ... [2022-02-20 22:06:54,714 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:06:54" (1/1) ... [2022-02-20 22:06:54,721 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:06:54" (1/1) ... [2022-02-20 22:06:54,721 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:06:54" (1/1) ... [2022-02-20 22:06:54,761 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:06:54" (1/1) ... [2022-02-20 22:06:54,765 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:06:54" (1/1) ... [2022-02-20 22:06:54,771 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:06:54" (1/1) ... [2022-02-20 22:06:54,781 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-02-20 22:06:54,803 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-02-20 22:06:54,803 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-02-20 22:06:54,804 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-02-20 22:06:54,805 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:06:54" (1/1) ... [2022-02-20 22:06:54,810 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-02-20 22:06:54,821 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-20 22:06:54,845 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-02-20 22:06:54,872 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-02-20 22:06:54,887 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_stop [2022-02-20 22:06:54,888 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_stop [2022-02-20 22:06:54,888 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-02-20 22:06:54,888 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.meminit [2022-02-20 22:06:54,888 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.meminit [2022-02-20 22:06:54,889 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2022-02-20 22:06:54,889 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2022-02-20 22:06:54,889 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2022-02-20 22:06:54,889 INFO L138 BoogieDeclarations]: Found implementation of procedure kfree [2022-02-20 22:06:54,889 INFO L130 BoogieDeclarations]: Found specification of procedure strlcat [2022-02-20 22:06:54,889 INFO L138 BoogieDeclarations]: Found implementation of procedure strlcat [2022-02-20 22:06:54,889 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-02-20 22:06:54,890 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_error [2022-02-20 22:06:54,890 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_error [2022-02-20 22:06:54,890 INFO L130 BoogieDeclarations]: Found specification of procedure ldv__builtin_expect [2022-02-20 22:06:54,890 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv__builtin_expect [2022-02-20 22:06:54,890 INFO L130 BoogieDeclarations]: Found specification of procedure usb_acecad_disconnect [2022-02-20 22:06:54,890 INFO L138 BoogieDeclarations]: Found implementation of procedure usb_acecad_disconnect [2022-02-20 22:06:54,890 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_init_zalloc [2022-02-20 22:06:54,891 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_init_zalloc [2022-02-20 22:06:54,891 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2022-02-20 22:06:54,891 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2022-02-20 22:06:54,891 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-02-20 22:06:54,891 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-02-20 22:06:54,891 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_undef_int [2022-02-20 22:06:54,891 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_undef_int [2022-02-20 22:06:54,892 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-02-20 22:06:54,892 INFO L130 BoogieDeclarations]: Found specification of procedure input_set_abs_params [2022-02-20 22:06:54,892 INFO L138 BoogieDeclarations]: Found implementation of procedure input_set_abs_params [2022-02-20 22:06:54,892 INFO L130 BoogieDeclarations]: Found specification of procedure usb_free_coherent [2022-02-20 22:06:54,892 INFO L138 BoogieDeclarations]: Found implementation of procedure usb_free_coherent [2022-02-20 22:06:54,892 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_usb_set_intfdata_7 [2022-02-20 22:06:54,892 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_usb_set_intfdata_7 [2022-02-20 22:06:54,893 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-02-20 22:06:54,893 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-02-20 22:06:54,893 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2022-02-20 22:06:54,893 INFO L130 BoogieDeclarations]: Found specification of procedure warn_slowpath_null [2022-02-20 22:06:54,893 INFO L138 BoogieDeclarations]: Found implementation of procedure warn_slowpath_null [2022-02-20 22:06:54,894 INFO L130 BoogieDeclarations]: Found specification of procedure kzalloc [2022-02-20 22:06:54,894 INFO L138 BoogieDeclarations]: Found implementation of procedure kzalloc [2022-02-20 22:06:54,894 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-02-20 22:06:54,894 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-02-20 22:06:54,894 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-02-20 22:06:55,203 INFO L234 CfgBuilder]: Building ICFG [2022-02-20 22:06:55,205 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-02-20 22:06:55,289 INFO L766 $ProcedureCfgBuilder]: dead code at ProgramPoint ldv_stopFINAL: assume true; [2022-02-20 22:06:56,114 INFO L275 CfgBuilder]: Performing block encoding [2022-02-20 22:06:56,131 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-02-20 22:06:56,131 INFO L299 CfgBuilder]: Removed 0 assume(true) statements. [2022-02-20 22:06:56,134 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 10:06:56 BoogieIcfgContainer [2022-02-20 22:06:56,134 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-02-20 22:06:56,137 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-02-20 22:06:56,137 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-02-20 22:06:56,139 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-02-20 22:06:56,140 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 20.02 10:06:53" (1/3) ... [2022-02-20 22:06:56,141 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5b8e24f6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.02 10:06:56, skipping insertion in model container [2022-02-20 22:06:56,141 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:06:54" (2/3) ... [2022-02-20 22:06:56,141 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5b8e24f6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.02 10:06:56, skipping insertion in model container [2022-02-20 22:06:56,142 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 10:06:56" (3/3) ... [2022-02-20 22:06:56,143 INFO L111 eAbstractionObserver]: Analyzing ICFG linux-stable-a450319-1-144_2a-drivers--input--tablet--acecad.ko-entry_point_ldv-val-v0.8.cil.out.i [2022-02-20 22:06:56,147 INFO L205 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-02-20 22:06:56,148 INFO L164 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-02-20 22:06:56,199 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-02-20 22:06:56,205 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2022-02-20 22:06:56,206 INFO L340 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-02-20 22:06:56,231 INFO L276 IsEmpty]: Start isEmpty. Operand has 235 states, 175 states have (on average 1.3257142857142856) internal successors, (232), 187 states have internal predecessors, (232), 43 states have call successors, (43), 16 states have call predecessors, (43), 15 states have return successors, (39), 39 states have call predecessors, (39), 39 states have call successors, (39) [2022-02-20 22:06:56,238 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-02-20 22:06:56,239 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:06:56,239 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:06:56,240 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:06:56,244 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:06:56,245 INFO L85 PathProgramCache]: Analyzing trace with hash -1083564762, now seen corresponding path program 1 times [2022-02-20 22:06:56,266 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:06:56,267 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1794600516] [2022-02-20 22:06:56,268 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:06:56,268 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:06:56,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:06:56,583 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 22:06:56,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:06:56,659 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:06:56,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:06:56,687 INFO L290 TraceCheckUtils]: 0: Hoare triple {262#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {238#true} is VALID [2022-02-20 22:06:56,689 INFO L290 TraceCheckUtils]: 1: Hoare triple {238#true} assume true; {238#true} is VALID [2022-02-20 22:06:56,689 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {238#true} {238#true} #538#return; {238#true} is VALID [2022-02-20 22:06:56,691 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:06:56,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:06:56,711 INFO L290 TraceCheckUtils]: 0: Hoare triple {238#true} ~cond := #in~cond; {238#true} is VALID [2022-02-20 22:06:56,713 INFO L290 TraceCheckUtils]: 1: Hoare triple {238#true} assume 0 == ~cond;assume false; {239#false} is VALID [2022-02-20 22:06:56,714 INFO L290 TraceCheckUtils]: 2: Hoare triple {239#false} assume true; {239#false} is VALID [2022-02-20 22:06:56,714 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {239#false} {238#true} #540#return; {239#false} is VALID [2022-02-20 22:06:56,714 INFO L290 TraceCheckUtils]: 0: Hoare triple {254#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {238#true} is VALID [2022-02-20 22:06:56,716 INFO L272 TraceCheckUtils]: 1: Hoare triple {238#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {262#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:06:56,716 INFO L290 TraceCheckUtils]: 2: Hoare triple {262#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {238#true} is VALID [2022-02-20 22:06:56,717 INFO L290 TraceCheckUtils]: 3: Hoare triple {238#true} assume true; {238#true} is VALID [2022-02-20 22:06:56,717 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {238#true} {238#true} #538#return; {238#true} is VALID [2022-02-20 22:06:56,717 INFO L290 TraceCheckUtils]: 5: Hoare triple {238#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {238#true} is VALID [2022-02-20 22:06:56,717 INFO L272 TraceCheckUtils]: 6: Hoare triple {238#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {238#true} is VALID [2022-02-20 22:06:56,718 INFO L290 TraceCheckUtils]: 7: Hoare triple {238#true} ~cond := #in~cond; {238#true} is VALID [2022-02-20 22:06:56,718 INFO L290 TraceCheckUtils]: 8: Hoare triple {238#true} assume 0 == ~cond;assume false; {239#false} is VALID [2022-02-20 22:06:56,718 INFO L290 TraceCheckUtils]: 9: Hoare triple {239#false} assume true; {239#false} is VALID [2022-02-20 22:06:56,719 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {239#false} {238#true} #540#return; {239#false} is VALID [2022-02-20 22:06:56,719 INFO L290 TraceCheckUtils]: 11: Hoare triple {239#false} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {239#false} is VALID [2022-02-20 22:06:56,719 INFO L290 TraceCheckUtils]: 12: Hoare triple {239#false} assume true; {239#false} is VALID [2022-02-20 22:06:56,719 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {239#false} {238#true} #544#return; {239#false} is VALID [2022-02-20 22:06:56,721 INFO L290 TraceCheckUtils]: 0: Hoare triple {238#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(99, 2);call #Ultimate.allocInit(10, 3);call #Ultimate.allocInit(7, 4);call write~init~int(97, 4, 0, 1);call write~init~int(99, 4, 1, 1);call write~init~int(101, 4, 2, 1);call write~init~int(99, 4, 3, 1);call write~init~int(97, 4, 4, 1);call write~init~int(100, 4, 5, 1);call write~init~int(0, 4, 6, 1);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(20, 6);call #Ultimate.allocInit(57, 7);call #Ultimate.allocInit(2, 8);call write~init~int(32, 8, 0, 1);call write~init~int(0, 8, 1, 1);call #Ultimate.allocInit(8, 9);call #Ultimate.allocInit(34, 10);call #Ultimate.allocInit(32, 11);call #Ultimate.allocInit(11, 12);call #Ultimate.allocInit(48, 13);~LDV_IN_INTERRUPT~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset := 14, 0;call #Ultimate.allocInit(72, 14);call write~init~int(3, ~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 2 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(4, ~#usb_acecad_id_table~0.base, 4 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 6 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 8 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 10 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 11 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 12 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 13 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 14 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 15 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 16 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(3, ~#usb_acecad_id_table~0.base, 24 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 26 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(8, ~#usb_acecad_id_table~0.base, 28 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 30 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 32 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 34 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 35 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 36 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 37 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 38 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 39 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(1, ~#usb_acecad_id_table~0.base, 40 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(0, ~#usb_acecad_id_table~0.base, 48 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 50 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 52 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 54 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 56 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 58 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 59 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 60 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 61 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 62 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 63 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 64 + ~#usb_acecad_id_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.driver_info := 0;~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset := 15, 0;call #Ultimate.allocInit(264, 15);call write~init~$Pointer$(12, 0, ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_probe.base, #funAddr~usb_acecad_probe.offset, ~#usb_acecad_driver~0.base, 8 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_disconnect.base, #funAddr~usb_acecad_disconnect.offset, ~#usb_acecad_driver~0.base, 16 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 24 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 32 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 40 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 48 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 56 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 64 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, ~#usb_acecad_driver~0.base, 72 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 80 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 84 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 88 + ~#usb_acecad_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 92 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 100 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 108 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 116 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 124 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 132 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 136 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 144 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 152 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 160 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 168 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 176 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 184 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 192 + ~#usb_acecad_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 193 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 201 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 209 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 217 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 225 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 233 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 241 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 249 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 257 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 261 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 262 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 263 + ~#usb_acecad_driver~0.offset, 1);~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {238#true} is VALID [2022-02-20 22:06:56,722 INFO L290 TraceCheckUtils]: 1: Hoare triple {238#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret183#1.base, main_#t~ret183#1.offset, main_#t~nondet184#1, main_#t~switch185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~ret188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~ret191#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~17#1.base, main_~tmp~17#1.offset, main_~tmp___0~6#1, main_~tmp___1~3#1, main_~tmp___2~1#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~17#1.base, main_~tmp~17#1.offset;havoc main_~tmp___0~6#1;havoc main_~tmp___1~3#1;havoc main_~tmp___2~1#1; {238#true} is VALID [2022-02-20 22:06:56,726 INFO L272 TraceCheckUtils]: 2: Hoare triple {238#true} call main_#t~ret183#1.base, main_#t~ret183#1.offset := ldv_init_zalloc(24); {254#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:06:56,726 INFO L290 TraceCheckUtils]: 3: Hoare triple {254#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {238#true} is VALID [2022-02-20 22:06:56,728 INFO L272 TraceCheckUtils]: 4: Hoare triple {238#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {262#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:06:56,728 INFO L290 TraceCheckUtils]: 5: Hoare triple {262#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {238#true} is VALID [2022-02-20 22:06:56,728 INFO L290 TraceCheckUtils]: 6: Hoare triple {238#true} assume true; {238#true} is VALID [2022-02-20 22:06:56,728 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {238#true} {238#true} #538#return; {238#true} is VALID [2022-02-20 22:06:56,729 INFO L290 TraceCheckUtils]: 8: Hoare triple {238#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {238#true} is VALID [2022-02-20 22:06:56,729 INFO L272 TraceCheckUtils]: 9: Hoare triple {238#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {238#true} is VALID [2022-02-20 22:06:56,729 INFO L290 TraceCheckUtils]: 10: Hoare triple {238#true} ~cond := #in~cond; {238#true} is VALID [2022-02-20 22:06:56,733 INFO L290 TraceCheckUtils]: 11: Hoare triple {238#true} assume 0 == ~cond;assume false; {239#false} is VALID [2022-02-20 22:06:56,734 INFO L290 TraceCheckUtils]: 12: Hoare triple {239#false} assume true; {239#false} is VALID [2022-02-20 22:06:56,734 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {239#false} {238#true} #540#return; {239#false} is VALID [2022-02-20 22:06:56,734 INFO L290 TraceCheckUtils]: 14: Hoare triple {239#false} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {239#false} is VALID [2022-02-20 22:06:56,735 INFO L290 TraceCheckUtils]: 15: Hoare triple {239#false} assume true; {239#false} is VALID [2022-02-20 22:06:56,735 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {239#false} {238#true} #544#return; {239#false} is VALID [2022-02-20 22:06:56,735 INFO L290 TraceCheckUtils]: 17: Hoare triple {239#false} main_~tmp~17#1.base, main_~tmp~17#1.offset := main_#t~ret183#1.base, main_#t~ret183#1.offset;havoc main_#t~ret183#1.base, main_#t~ret183#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~17#1.base, main_~tmp~17#1.offset;assume { :begin_inline_ldv_initialize } true; {239#false} is VALID [2022-02-20 22:06:56,735 INFO L290 TraceCheckUtils]: 18: Hoare triple {239#false} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1; {239#false} is VALID [2022-02-20 22:06:56,736 INFO L290 TraceCheckUtils]: 19: Hoare triple {239#false} assume -2147483648 <= main_#t~nondet184#1 && main_#t~nondet184#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet184#1;havoc main_#t~nondet184#1;main_#t~switch185#1 := 0 == main_~tmp___0~6#1; {239#false} is VALID [2022-02-20 22:06:56,736 INFO L290 TraceCheckUtils]: 20: Hoare triple {239#false} assume !main_#t~switch185#1;main_#t~switch185#1 := main_#t~switch185#1 || 1 == main_~tmp___0~6#1; {239#false} is VALID [2022-02-20 22:06:56,736 INFO L290 TraceCheckUtils]: 21: Hoare triple {239#false} assume main_#t~switch185#1; {239#false} is VALID [2022-02-20 22:06:56,736 INFO L290 TraceCheckUtils]: 22: Hoare triple {239#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet189#1 && main_#t~nondet189#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet189#1;havoc main_#t~nondet189#1;main_#t~switch190#1 := 0 == main_~tmp___2~1#1; {239#false} is VALID [2022-02-20 22:06:56,737 INFO L290 TraceCheckUtils]: 23: Hoare triple {239#false} assume main_#t~switch190#1; {239#false} is VALID [2022-02-20 22:06:56,737 INFO L290 TraceCheckUtils]: 24: Hoare triple {239#false} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0;assume { :begin_inline_usb_acecad_exit } true;assume { :begin_inline_ldv_usb_deregister_11 } true;ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset := ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset;assume { :begin_inline_usb_deregister } true;usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset := ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;havoc usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset;usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset := usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset; {239#false} is VALID [2022-02-20 22:06:56,737 INFO L290 TraceCheckUtils]: 25: Hoare triple {239#false} assume { :end_inline_usb_deregister } true;~ldv_state_variable_1~0 := 0; {239#false} is VALID [2022-02-20 22:06:56,737 INFO L290 TraceCheckUtils]: 26: Hoare triple {239#false} assume { :end_inline_ldv_usb_deregister_11 } true; {239#false} is VALID [2022-02-20 22:06:56,738 INFO L290 TraceCheckUtils]: 27: Hoare triple {239#false} assume { :end_inline_usb_acecad_exit } true;~ldv_state_variable_0~0 := 2; {239#false} is VALID [2022-02-20 22:06:56,740 INFO L290 TraceCheckUtils]: 28: Hoare triple {239#false} assume { :begin_inline_ldv_check_final_state } true; {239#false} is VALID [2022-02-20 22:06:56,740 INFO L290 TraceCheckUtils]: 29: Hoare triple {239#false} assume 0 != (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616; {239#false} is VALID [2022-02-20 22:06:56,740 INFO L272 TraceCheckUtils]: 30: Hoare triple {239#false} call ldv_error(); {239#false} is VALID [2022-02-20 22:06:56,740 INFO L290 TraceCheckUtils]: 31: Hoare triple {239#false} assume !false; {239#false} is VALID [2022-02-20 22:06:56,741 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-20 22:06:56,741 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:06:56,742 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1794600516] [2022-02-20 22:06:56,743 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1794600516] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:06:56,743 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 22:06:56,743 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-02-20 22:06:56,745 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2032473286] [2022-02-20 22:06:56,745 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:06:56,753 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 2 states have internal predecessors, (25), 2 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) Word has length 32 [2022-02-20 22:06:56,756 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:06:56,759 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.25) internal successors, (25), 2 states have internal predecessors, (25), 2 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) [2022-02-20 22:06:56,799 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:06:56,800 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-02-20 22:06:56,800 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:06:56,824 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-02-20 22:06:56,826 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2022-02-20 22:06:56,833 INFO L87 Difference]: Start difference. First operand has 235 states, 175 states have (on average 1.3257142857142856) internal successors, (232), 187 states have internal predecessors, (232), 43 states have call successors, (43), 16 states have call predecessors, (43), 15 states have return successors, (39), 39 states have call predecessors, (39), 39 states have call successors, (39) Second operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 2 states have internal predecessors, (25), 2 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) [2022-02-20 22:06:57,840 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:06:57,841 INFO L93 Difference]: Finished difference Result 472 states and 644 transitions. [2022-02-20 22:06:57,841 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-02-20 22:06:57,841 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 2 states have internal predecessors, (25), 2 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) Word has length 32 [2022-02-20 22:06:57,841 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 22:06:57,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 2 states have internal predecessors, (25), 2 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) [2022-02-20 22:06:57,861 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 644 transitions. [2022-02-20 22:06:57,862 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 2 states have internal predecessors, (25), 2 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) [2022-02-20 22:06:57,876 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 644 transitions. [2022-02-20 22:06:57,876 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states and 644 transitions. [2022-02-20 22:06:58,421 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 644 edges. 644 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:06:58,439 INFO L225 Difference]: With dead ends: 472 [2022-02-20 22:06:58,440 INFO L226 Difference]: Without dead ends: 231 [2022-02-20 22:06:58,444 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2022-02-20 22:06:58,446 INFO L933 BasicCegarLoop]: 295 mSDtfsCounter, 84 mSDsluCounter, 169 mSDsCounter, 0 mSdLazyCounter, 68 mSolverCounterSat, 93 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 464 SdHoareTripleChecker+Invalid, 161 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 93 IncrementalHoareTripleChecker+Valid, 68 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-02-20 22:06:58,447 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [87 Valid, 464 Invalid, 161 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [93 Valid, 68 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-02-20 22:06:58,462 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 231 states. [2022-02-20 22:06:58,487 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 231 to 224. [2022-02-20 22:06:58,488 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 22:06:58,490 INFO L82 GeneralOperation]: Start isEquivalent. First operand 231 states. Second operand has 224 states, 170 states have (on average 1.2823529411764707) internal successors, (218), 176 states have internal predecessors, (218), 39 states have call successors, (39), 15 states have call predecessors, (39), 14 states have return successors, (34), 34 states have call predecessors, (34), 34 states have call successors, (34) [2022-02-20 22:06:58,492 INFO L74 IsIncluded]: Start isIncluded. First operand 231 states. Second operand has 224 states, 170 states have (on average 1.2823529411764707) internal successors, (218), 176 states have internal predecessors, (218), 39 states have call successors, (39), 15 states have call predecessors, (39), 14 states have return successors, (34), 34 states have call predecessors, (34), 34 states have call successors, (34) [2022-02-20 22:06:58,493 INFO L87 Difference]: Start difference. First operand 231 states. Second operand has 224 states, 170 states have (on average 1.2823529411764707) internal successors, (218), 176 states have internal predecessors, (218), 39 states have call successors, (39), 15 states have call predecessors, (39), 14 states have return successors, (34), 34 states have call predecessors, (34), 34 states have call successors, (34) [2022-02-20 22:06:58,506 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:06:58,507 INFO L93 Difference]: Finished difference Result 231 states and 302 transitions. [2022-02-20 22:06:58,507 INFO L276 IsEmpty]: Start isEmpty. Operand 231 states and 302 transitions. [2022-02-20 22:06:58,510 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:06:58,510 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:06:58,511 INFO L74 IsIncluded]: Start isIncluded. First operand has 224 states, 170 states have (on average 1.2823529411764707) internal successors, (218), 176 states have internal predecessors, (218), 39 states have call successors, (39), 15 states have call predecessors, (39), 14 states have return successors, (34), 34 states have call predecessors, (34), 34 states have call successors, (34) Second operand 231 states. [2022-02-20 22:06:58,512 INFO L87 Difference]: Start difference. First operand has 224 states, 170 states have (on average 1.2823529411764707) internal successors, (218), 176 states have internal predecessors, (218), 39 states have call successors, (39), 15 states have call predecessors, (39), 14 states have return successors, (34), 34 states have call predecessors, (34), 34 states have call successors, (34) Second operand 231 states. [2022-02-20 22:06:58,524 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:06:58,525 INFO L93 Difference]: Finished difference Result 231 states and 302 transitions. [2022-02-20 22:06:58,525 INFO L276 IsEmpty]: Start isEmpty. Operand 231 states and 302 transitions. [2022-02-20 22:06:58,527 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:06:58,527 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:06:58,527 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 22:06:58,527 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 22:06:58,528 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 224 states, 170 states have (on average 1.2823529411764707) internal successors, (218), 176 states have internal predecessors, (218), 39 states have call successors, (39), 15 states have call predecessors, (39), 14 states have return successors, (34), 34 states have call predecessors, (34), 34 states have call successors, (34) [2022-02-20 22:06:58,539 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 224 states to 224 states and 291 transitions. [2022-02-20 22:06:58,541 INFO L78 Accepts]: Start accepts. Automaton has 224 states and 291 transitions. Word has length 32 [2022-02-20 22:06:58,541 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 22:06:58,542 INFO L470 AbstractCegarLoop]: Abstraction has 224 states and 291 transitions. [2022-02-20 22:06:58,542 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 2 states have internal predecessors, (25), 2 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) [2022-02-20 22:06:58,542 INFO L276 IsEmpty]: Start isEmpty. Operand 224 states and 291 transitions. [2022-02-20 22:06:58,543 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-02-20 22:06:58,543 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:06:58,544 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:06:58,544 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-02-20 22:06:58,544 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:06:58,545 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:06:58,545 INFO L85 PathProgramCache]: Analyzing trace with hash -660862936, now seen corresponding path program 1 times [2022-02-20 22:06:58,545 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:06:58,545 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [414866183] [2022-02-20 22:06:58,545 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:06:58,546 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:06:58,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:06:58,636 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 22:06:58,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:06:58,651 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:06:58,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:06:58,657 INFO L290 TraceCheckUtils]: 0: Hoare triple {1754#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {1729#true} is VALID [2022-02-20 22:06:58,658 INFO L290 TraceCheckUtils]: 1: Hoare triple {1729#true} assume true; {1729#true} is VALID [2022-02-20 22:06:58,658 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1729#true} {1729#true} #538#return; {1729#true} is VALID [2022-02-20 22:06:58,658 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:06:58,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:06:58,669 INFO L290 TraceCheckUtils]: 0: Hoare triple {1729#true} ~cond := #in~cond; {1729#true} is VALID [2022-02-20 22:06:58,669 INFO L290 TraceCheckUtils]: 1: Hoare triple {1729#true} assume !(0 == ~cond); {1729#true} is VALID [2022-02-20 22:06:58,670 INFO L290 TraceCheckUtils]: 2: Hoare triple {1729#true} assume true; {1729#true} is VALID [2022-02-20 22:06:58,670 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1729#true} {1729#true} #540#return; {1729#true} is VALID [2022-02-20 22:06:58,670 INFO L290 TraceCheckUtils]: 0: Hoare triple {1746#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {1729#true} is VALID [2022-02-20 22:06:58,671 INFO L272 TraceCheckUtils]: 1: Hoare triple {1729#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {1754#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:06:58,672 INFO L290 TraceCheckUtils]: 2: Hoare triple {1754#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {1729#true} is VALID [2022-02-20 22:06:58,672 INFO L290 TraceCheckUtils]: 3: Hoare triple {1729#true} assume true; {1729#true} is VALID [2022-02-20 22:06:58,672 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {1729#true} {1729#true} #538#return; {1729#true} is VALID [2022-02-20 22:06:58,672 INFO L290 TraceCheckUtils]: 5: Hoare triple {1729#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {1729#true} is VALID [2022-02-20 22:06:58,673 INFO L272 TraceCheckUtils]: 6: Hoare triple {1729#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {1729#true} is VALID [2022-02-20 22:06:58,673 INFO L290 TraceCheckUtils]: 7: Hoare triple {1729#true} ~cond := #in~cond; {1729#true} is VALID [2022-02-20 22:06:58,673 INFO L290 TraceCheckUtils]: 8: Hoare triple {1729#true} assume !(0 == ~cond); {1729#true} is VALID [2022-02-20 22:06:58,675 INFO L290 TraceCheckUtils]: 9: Hoare triple {1729#true} assume true; {1729#true} is VALID [2022-02-20 22:06:58,675 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {1729#true} {1729#true} #540#return; {1729#true} is VALID [2022-02-20 22:06:58,675 INFO L290 TraceCheckUtils]: 11: Hoare triple {1729#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {1729#true} is VALID [2022-02-20 22:06:58,676 INFO L290 TraceCheckUtils]: 12: Hoare triple {1729#true} assume true; {1729#true} is VALID [2022-02-20 22:06:58,676 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {1729#true} {1729#true} #544#return; {1729#true} is VALID [2022-02-20 22:06:58,681 INFO L290 TraceCheckUtils]: 0: Hoare triple {1729#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(99, 2);call #Ultimate.allocInit(10, 3);call #Ultimate.allocInit(7, 4);call write~init~int(97, 4, 0, 1);call write~init~int(99, 4, 1, 1);call write~init~int(101, 4, 2, 1);call write~init~int(99, 4, 3, 1);call write~init~int(97, 4, 4, 1);call write~init~int(100, 4, 5, 1);call write~init~int(0, 4, 6, 1);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(20, 6);call #Ultimate.allocInit(57, 7);call #Ultimate.allocInit(2, 8);call write~init~int(32, 8, 0, 1);call write~init~int(0, 8, 1, 1);call #Ultimate.allocInit(8, 9);call #Ultimate.allocInit(34, 10);call #Ultimate.allocInit(32, 11);call #Ultimate.allocInit(11, 12);call #Ultimate.allocInit(48, 13);~LDV_IN_INTERRUPT~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset := 14, 0;call #Ultimate.allocInit(72, 14);call write~init~int(3, ~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 2 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(4, ~#usb_acecad_id_table~0.base, 4 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 6 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 8 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 10 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 11 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 12 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 13 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 14 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 15 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 16 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(3, ~#usb_acecad_id_table~0.base, 24 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 26 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(8, ~#usb_acecad_id_table~0.base, 28 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 30 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 32 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 34 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 35 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 36 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 37 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 38 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 39 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(1, ~#usb_acecad_id_table~0.base, 40 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(0, ~#usb_acecad_id_table~0.base, 48 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 50 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 52 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 54 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 56 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 58 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 59 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 60 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 61 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 62 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 63 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 64 + ~#usb_acecad_id_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.driver_info := 0;~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset := 15, 0;call #Ultimate.allocInit(264, 15);call write~init~$Pointer$(12, 0, ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_probe.base, #funAddr~usb_acecad_probe.offset, ~#usb_acecad_driver~0.base, 8 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_disconnect.base, #funAddr~usb_acecad_disconnect.offset, ~#usb_acecad_driver~0.base, 16 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 24 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 32 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 40 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 48 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 56 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 64 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, ~#usb_acecad_driver~0.base, 72 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 80 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 84 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 88 + ~#usb_acecad_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 92 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 100 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 108 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 116 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 124 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 132 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 136 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 144 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 152 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 160 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 168 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 176 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 184 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 192 + ~#usb_acecad_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 193 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 201 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 209 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 217 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 225 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 233 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 241 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 249 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 257 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 261 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 262 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 263 + ~#usb_acecad_driver~0.offset, 1);~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {1729#true} is VALID [2022-02-20 22:06:58,682 INFO L290 TraceCheckUtils]: 1: Hoare triple {1729#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret183#1.base, main_#t~ret183#1.offset, main_#t~nondet184#1, main_#t~switch185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~ret188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~ret191#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~17#1.base, main_~tmp~17#1.offset, main_~tmp___0~6#1, main_~tmp___1~3#1, main_~tmp___2~1#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~17#1.base, main_~tmp~17#1.offset;havoc main_~tmp___0~6#1;havoc main_~tmp___1~3#1;havoc main_~tmp___2~1#1; {1729#true} is VALID [2022-02-20 22:06:58,682 INFO L272 TraceCheckUtils]: 2: Hoare triple {1729#true} call main_#t~ret183#1.base, main_#t~ret183#1.offset := ldv_init_zalloc(24); {1746#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:06:58,682 INFO L290 TraceCheckUtils]: 3: Hoare triple {1746#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {1729#true} is VALID [2022-02-20 22:06:58,683 INFO L272 TraceCheckUtils]: 4: Hoare triple {1729#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {1754#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:06:58,683 INFO L290 TraceCheckUtils]: 5: Hoare triple {1754#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {1729#true} is VALID [2022-02-20 22:06:58,684 INFO L290 TraceCheckUtils]: 6: Hoare triple {1729#true} assume true; {1729#true} is VALID [2022-02-20 22:06:58,684 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {1729#true} {1729#true} #538#return; {1729#true} is VALID [2022-02-20 22:06:58,684 INFO L290 TraceCheckUtils]: 8: Hoare triple {1729#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {1729#true} is VALID [2022-02-20 22:06:58,684 INFO L272 TraceCheckUtils]: 9: Hoare triple {1729#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {1729#true} is VALID [2022-02-20 22:06:58,684 INFO L290 TraceCheckUtils]: 10: Hoare triple {1729#true} ~cond := #in~cond; {1729#true} is VALID [2022-02-20 22:06:58,684 INFO L290 TraceCheckUtils]: 11: Hoare triple {1729#true} assume !(0 == ~cond); {1729#true} is VALID [2022-02-20 22:06:58,685 INFO L290 TraceCheckUtils]: 12: Hoare triple {1729#true} assume true; {1729#true} is VALID [2022-02-20 22:06:58,685 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {1729#true} {1729#true} #540#return; {1729#true} is VALID [2022-02-20 22:06:58,685 INFO L290 TraceCheckUtils]: 14: Hoare triple {1729#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {1729#true} is VALID [2022-02-20 22:06:58,685 INFO L290 TraceCheckUtils]: 15: Hoare triple {1729#true} assume true; {1729#true} is VALID [2022-02-20 22:06:58,685 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {1729#true} {1729#true} #544#return; {1729#true} is VALID [2022-02-20 22:06:58,686 INFO L290 TraceCheckUtils]: 17: Hoare triple {1729#true} main_~tmp~17#1.base, main_~tmp~17#1.offset := main_#t~ret183#1.base, main_#t~ret183#1.offset;havoc main_#t~ret183#1.base, main_#t~ret183#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~17#1.base, main_~tmp~17#1.offset;assume { :begin_inline_ldv_initialize } true; {1729#true} is VALID [2022-02-20 22:06:58,686 INFO L290 TraceCheckUtils]: 18: Hoare triple {1729#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1; {1745#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 22:06:58,686 INFO L290 TraceCheckUtils]: 19: Hoare triple {1745#(= ~ldv_state_variable_0~0 1)} assume -2147483648 <= main_#t~nondet184#1 && main_#t~nondet184#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet184#1;havoc main_#t~nondet184#1;main_#t~switch185#1 := 0 == main_~tmp___0~6#1; {1745#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 22:06:58,687 INFO L290 TraceCheckUtils]: 20: Hoare triple {1745#(= ~ldv_state_variable_0~0 1)} assume !main_#t~switch185#1;main_#t~switch185#1 := main_#t~switch185#1 || 1 == main_~tmp___0~6#1; {1745#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 22:06:58,687 INFO L290 TraceCheckUtils]: 21: Hoare triple {1745#(= ~ldv_state_variable_0~0 1)} assume main_#t~switch185#1; {1745#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 22:06:58,688 INFO L290 TraceCheckUtils]: 22: Hoare triple {1745#(= ~ldv_state_variable_0~0 1)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet189#1 && main_#t~nondet189#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet189#1;havoc main_#t~nondet189#1;main_#t~switch190#1 := 0 == main_~tmp___2~1#1; {1745#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 22:06:58,688 INFO L290 TraceCheckUtils]: 23: Hoare triple {1745#(= ~ldv_state_variable_0~0 1)} assume main_#t~switch190#1; {1745#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 22:06:58,689 INFO L290 TraceCheckUtils]: 24: Hoare triple {1745#(= ~ldv_state_variable_0~0 1)} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0;assume { :begin_inline_usb_acecad_exit } true;assume { :begin_inline_ldv_usb_deregister_11 } true;ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset := ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset;assume { :begin_inline_usb_deregister } true;usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset := ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;havoc usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset;usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset := usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset; {1730#false} is VALID [2022-02-20 22:06:58,689 INFO L290 TraceCheckUtils]: 25: Hoare triple {1730#false} assume { :end_inline_usb_deregister } true;~ldv_state_variable_1~0 := 0; {1730#false} is VALID [2022-02-20 22:06:58,689 INFO L290 TraceCheckUtils]: 26: Hoare triple {1730#false} assume { :end_inline_ldv_usb_deregister_11 } true; {1730#false} is VALID [2022-02-20 22:06:58,689 INFO L290 TraceCheckUtils]: 27: Hoare triple {1730#false} assume { :end_inline_usb_acecad_exit } true;~ldv_state_variable_0~0 := 2; {1730#false} is VALID [2022-02-20 22:06:58,690 INFO L290 TraceCheckUtils]: 28: Hoare triple {1730#false} assume { :begin_inline_ldv_check_final_state } true; {1730#false} is VALID [2022-02-20 22:06:58,690 INFO L290 TraceCheckUtils]: 29: Hoare triple {1730#false} assume 0 != (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616; {1730#false} is VALID [2022-02-20 22:06:58,690 INFO L272 TraceCheckUtils]: 30: Hoare triple {1730#false} call ldv_error(); {1730#false} is VALID [2022-02-20 22:06:58,690 INFO L290 TraceCheckUtils]: 31: Hoare triple {1730#false} assume !false; {1730#false} is VALID [2022-02-20 22:06:58,691 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-20 22:06:58,691 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:06:58,691 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [414866183] [2022-02-20 22:06:58,691 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [414866183] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:06:58,691 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 22:06:58,692 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-02-20 22:06:58,692 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2062225662] [2022-02-20 22:06:58,692 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:06:58,693 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 5.0) internal successors, (25), 3 states have internal predecessors, (25), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 32 [2022-02-20 22:06:58,694 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:06:58,694 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 5.0) internal successors, (25), 3 states have internal predecessors, (25), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-02-20 22:06:58,725 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:06:58,725 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-02-20 22:06:58,725 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:06:58,726 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-02-20 22:06:58,726 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-02-20 22:06:58,726 INFO L87 Difference]: Start difference. First operand 224 states and 291 transitions. Second operand has 5 states, 5 states have (on average 5.0) internal successors, (25), 3 states have internal predecessors, (25), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-02-20 22:07:00,248 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:00,249 INFO L93 Difference]: Finished difference Result 650 states and 851 transitions. [2022-02-20 22:07:00,249 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-02-20 22:07:00,249 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 5.0) internal successors, (25), 3 states have internal predecessors, (25), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 32 [2022-02-20 22:07:00,250 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 22:07:00,250 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 5.0) internal successors, (25), 3 states have internal predecessors, (25), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-02-20 22:07:00,264 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 851 transitions. [2022-02-20 22:07:00,264 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 5.0) internal successors, (25), 3 states have internal predecessors, (25), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-02-20 22:07:00,277 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 851 transitions. [2022-02-20 22:07:00,277 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 7 states and 851 transitions. [2022-02-20 22:07:00,968 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 851 edges. 851 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:00,985 INFO L225 Difference]: With dead ends: 650 [2022-02-20 22:07:00,986 INFO L226 Difference]: Without dead ends: 431 [2022-02-20 22:07:00,987 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2022-02-20 22:07:00,988 INFO L933 BasicCegarLoop]: 317 mSDtfsCounter, 376 mSDsluCounter, 352 mSDsCounter, 0 mSdLazyCounter, 206 mSolverCounterSat, 175 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 409 SdHoareTripleChecker+Valid, 669 SdHoareTripleChecker+Invalid, 381 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 175 IncrementalHoareTripleChecker+Valid, 206 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-02-20 22:07:00,988 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [409 Valid, 669 Invalid, 381 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [175 Valid, 206 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-02-20 22:07:00,990 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 431 states. [2022-02-20 22:07:01,013 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 431 to 417. [2022-02-20 22:07:01,013 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 22:07:01,015 INFO L82 GeneralOperation]: Start isEquivalent. First operand 431 states. Second operand has 417 states, 317 states have (on average 1.274447949526814) internal successors, (404), 325 states have internal predecessors, (404), 71 states have call successors, (71), 29 states have call predecessors, (71), 28 states have return successors, (66), 66 states have call predecessors, (66), 66 states have call successors, (66) [2022-02-20 22:07:01,016 INFO L74 IsIncluded]: Start isIncluded. First operand 431 states. Second operand has 417 states, 317 states have (on average 1.274447949526814) internal successors, (404), 325 states have internal predecessors, (404), 71 states have call successors, (71), 29 states have call predecessors, (71), 28 states have return successors, (66), 66 states have call predecessors, (66), 66 states have call successors, (66) [2022-02-20 22:07:01,018 INFO L87 Difference]: Start difference. First operand 431 states. Second operand has 417 states, 317 states have (on average 1.274447949526814) internal successors, (404), 325 states have internal predecessors, (404), 71 states have call successors, (71), 29 states have call predecessors, (71), 28 states have return successors, (66), 66 states have call predecessors, (66), 66 states have call successors, (66) [2022-02-20 22:07:01,036 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:01,037 INFO L93 Difference]: Finished difference Result 431 states and 563 transitions. [2022-02-20 22:07:01,037 INFO L276 IsEmpty]: Start isEmpty. Operand 431 states and 563 transitions. [2022-02-20 22:07:01,039 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:01,039 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:01,041 INFO L74 IsIncluded]: Start isIncluded. First operand has 417 states, 317 states have (on average 1.274447949526814) internal successors, (404), 325 states have internal predecessors, (404), 71 states have call successors, (71), 29 states have call predecessors, (71), 28 states have return successors, (66), 66 states have call predecessors, (66), 66 states have call successors, (66) Second operand 431 states. [2022-02-20 22:07:01,042 INFO L87 Difference]: Start difference. First operand has 417 states, 317 states have (on average 1.274447949526814) internal successors, (404), 325 states have internal predecessors, (404), 71 states have call successors, (71), 29 states have call predecessors, (71), 28 states have return successors, (66), 66 states have call predecessors, (66), 66 states have call successors, (66) Second operand 431 states. [2022-02-20 22:07:01,061 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:01,061 INFO L93 Difference]: Finished difference Result 431 states and 563 transitions. [2022-02-20 22:07:01,061 INFO L276 IsEmpty]: Start isEmpty. Operand 431 states and 563 transitions. [2022-02-20 22:07:01,063 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:01,063 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:01,063 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 22:07:01,063 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 22:07:01,065 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 417 states, 317 states have (on average 1.274447949526814) internal successors, (404), 325 states have internal predecessors, (404), 71 states have call successors, (71), 29 states have call predecessors, (71), 28 states have return successors, (66), 66 states have call predecessors, (66), 66 states have call successors, (66) [2022-02-20 22:07:01,084 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 417 states to 417 states and 541 transitions. [2022-02-20 22:07:01,084 INFO L78 Accepts]: Start accepts. Automaton has 417 states and 541 transitions. Word has length 32 [2022-02-20 22:07:01,085 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 22:07:01,085 INFO L470 AbstractCegarLoop]: Abstraction has 417 states and 541 transitions. [2022-02-20 22:07:01,085 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 5.0) internal successors, (25), 3 states have internal predecessors, (25), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-02-20 22:07:01,085 INFO L276 IsEmpty]: Start isEmpty. Operand 417 states and 541 transitions. [2022-02-20 22:07:01,086 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2022-02-20 22:07:01,087 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:07:01,087 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:07:01,087 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-02-20 22:07:01,088 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:07:01,088 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:07:01,088 INFO L85 PathProgramCache]: Analyzing trace with hash 748866141, now seen corresponding path program 1 times [2022-02-20 22:07:01,088 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:07:01,089 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1635266188] [2022-02-20 22:07:01,089 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:07:01,089 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:07:01,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:01,223 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 22:07:01,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:01,239 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:01,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:01,247 INFO L290 TraceCheckUtils]: 0: Hoare triple {4184#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {4143#true} is VALID [2022-02-20 22:07:01,247 INFO L290 TraceCheckUtils]: 1: Hoare triple {4143#true} assume true; {4143#true} is VALID [2022-02-20 22:07:01,247 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4143#true} {4143#true} #538#return; {4143#true} is VALID [2022-02-20 22:07:01,248 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:01,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:01,253 INFO L290 TraceCheckUtils]: 0: Hoare triple {4143#true} ~cond := #in~cond; {4143#true} is VALID [2022-02-20 22:07:01,254 INFO L290 TraceCheckUtils]: 1: Hoare triple {4143#true} assume !(0 == ~cond); {4143#true} is VALID [2022-02-20 22:07:01,254 INFO L290 TraceCheckUtils]: 2: Hoare triple {4143#true} assume true; {4143#true} is VALID [2022-02-20 22:07:01,254 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4143#true} {4143#true} #540#return; {4143#true} is VALID [2022-02-20 22:07:01,254 INFO L290 TraceCheckUtils]: 0: Hoare triple {4176#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {4143#true} is VALID [2022-02-20 22:07:01,255 INFO L272 TraceCheckUtils]: 1: Hoare triple {4143#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {4184#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:01,256 INFO L290 TraceCheckUtils]: 2: Hoare triple {4184#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {4143#true} is VALID [2022-02-20 22:07:01,256 INFO L290 TraceCheckUtils]: 3: Hoare triple {4143#true} assume true; {4143#true} is VALID [2022-02-20 22:07:01,256 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {4143#true} {4143#true} #538#return; {4143#true} is VALID [2022-02-20 22:07:01,256 INFO L290 TraceCheckUtils]: 5: Hoare triple {4143#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {4143#true} is VALID [2022-02-20 22:07:01,257 INFO L272 TraceCheckUtils]: 6: Hoare triple {4143#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {4143#true} is VALID [2022-02-20 22:07:01,257 INFO L290 TraceCheckUtils]: 7: Hoare triple {4143#true} ~cond := #in~cond; {4143#true} is VALID [2022-02-20 22:07:01,257 INFO L290 TraceCheckUtils]: 8: Hoare triple {4143#true} assume !(0 == ~cond); {4143#true} is VALID [2022-02-20 22:07:01,257 INFO L290 TraceCheckUtils]: 9: Hoare triple {4143#true} assume true; {4143#true} is VALID [2022-02-20 22:07:01,258 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {4143#true} {4143#true} #540#return; {4143#true} is VALID [2022-02-20 22:07:01,258 INFO L290 TraceCheckUtils]: 11: Hoare triple {4143#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {4143#true} is VALID [2022-02-20 22:07:01,258 INFO L290 TraceCheckUtils]: 12: Hoare triple {4143#true} assume true; {4143#true} is VALID [2022-02-20 22:07:01,258 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {4143#true} {4143#true} #544#return; {4143#true} is VALID [2022-02-20 22:07:01,259 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 27 [2022-02-20 22:07:01,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:01,269 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:01,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:01,275 INFO L290 TraceCheckUtils]: 0: Hoare triple {4184#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {4143#true} is VALID [2022-02-20 22:07:01,276 INFO L290 TraceCheckUtils]: 1: Hoare triple {4143#true} assume true; {4143#true} is VALID [2022-02-20 22:07:01,276 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4143#true} {4143#true} #538#return; {4143#true} is VALID [2022-02-20 22:07:01,276 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:01,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:01,282 INFO L290 TraceCheckUtils]: 0: Hoare triple {4143#true} ~cond := #in~cond; {4143#true} is VALID [2022-02-20 22:07:01,282 INFO L290 TraceCheckUtils]: 1: Hoare triple {4143#true} assume !(0 == ~cond); {4143#true} is VALID [2022-02-20 22:07:01,283 INFO L290 TraceCheckUtils]: 2: Hoare triple {4143#true} assume true; {4143#true} is VALID [2022-02-20 22:07:01,283 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4143#true} {4143#true} #540#return; {4143#true} is VALID [2022-02-20 22:07:01,283 INFO L290 TraceCheckUtils]: 0: Hoare triple {4176#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {4143#true} is VALID [2022-02-20 22:07:01,284 INFO L272 TraceCheckUtils]: 1: Hoare triple {4143#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {4184#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:01,284 INFO L290 TraceCheckUtils]: 2: Hoare triple {4184#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {4143#true} is VALID [2022-02-20 22:07:01,285 INFO L290 TraceCheckUtils]: 3: Hoare triple {4143#true} assume true; {4143#true} is VALID [2022-02-20 22:07:01,285 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {4143#true} {4143#true} #538#return; {4143#true} is VALID [2022-02-20 22:07:01,285 INFO L290 TraceCheckUtils]: 5: Hoare triple {4143#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {4143#true} is VALID [2022-02-20 22:07:01,285 INFO L272 TraceCheckUtils]: 6: Hoare triple {4143#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {4143#true} is VALID [2022-02-20 22:07:01,286 INFO L290 TraceCheckUtils]: 7: Hoare triple {4143#true} ~cond := #in~cond; {4143#true} is VALID [2022-02-20 22:07:01,286 INFO L290 TraceCheckUtils]: 8: Hoare triple {4143#true} assume !(0 == ~cond); {4143#true} is VALID [2022-02-20 22:07:01,286 INFO L290 TraceCheckUtils]: 9: Hoare triple {4143#true} assume true; {4143#true} is VALID [2022-02-20 22:07:01,286 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {4143#true} {4143#true} #540#return; {4143#true} is VALID [2022-02-20 22:07:01,286 INFO L290 TraceCheckUtils]: 11: Hoare triple {4143#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {4143#true} is VALID [2022-02-20 22:07:01,287 INFO L290 TraceCheckUtils]: 12: Hoare triple {4143#true} assume true; {4143#true} is VALID [2022-02-20 22:07:01,287 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {4143#true} {4143#true} #600#return; {4143#true} is VALID [2022-02-20 22:07:01,287 INFO L290 TraceCheckUtils]: 0: Hoare triple {4143#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(99, 2);call #Ultimate.allocInit(10, 3);call #Ultimate.allocInit(7, 4);call write~init~int(97, 4, 0, 1);call write~init~int(99, 4, 1, 1);call write~init~int(101, 4, 2, 1);call write~init~int(99, 4, 3, 1);call write~init~int(97, 4, 4, 1);call write~init~int(100, 4, 5, 1);call write~init~int(0, 4, 6, 1);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(20, 6);call #Ultimate.allocInit(57, 7);call #Ultimate.allocInit(2, 8);call write~init~int(32, 8, 0, 1);call write~init~int(0, 8, 1, 1);call #Ultimate.allocInit(8, 9);call #Ultimate.allocInit(34, 10);call #Ultimate.allocInit(32, 11);call #Ultimate.allocInit(11, 12);call #Ultimate.allocInit(48, 13);~LDV_IN_INTERRUPT~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset := 14, 0;call #Ultimate.allocInit(72, 14);call write~init~int(3, ~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 2 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(4, ~#usb_acecad_id_table~0.base, 4 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 6 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 8 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 10 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 11 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 12 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 13 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 14 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 15 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 16 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(3, ~#usb_acecad_id_table~0.base, 24 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 26 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(8, ~#usb_acecad_id_table~0.base, 28 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 30 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 32 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 34 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 35 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 36 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 37 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 38 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 39 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(1, ~#usb_acecad_id_table~0.base, 40 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(0, ~#usb_acecad_id_table~0.base, 48 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 50 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 52 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 54 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 56 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 58 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 59 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 60 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 61 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 62 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 63 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 64 + ~#usb_acecad_id_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.driver_info := 0;~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset := 15, 0;call #Ultimate.allocInit(264, 15);call write~init~$Pointer$(12, 0, ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_probe.base, #funAddr~usb_acecad_probe.offset, ~#usb_acecad_driver~0.base, 8 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_disconnect.base, #funAddr~usb_acecad_disconnect.offset, ~#usb_acecad_driver~0.base, 16 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 24 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 32 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 40 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 48 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 56 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 64 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, ~#usb_acecad_driver~0.base, 72 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 80 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 84 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 88 + ~#usb_acecad_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 92 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 100 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 108 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 116 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 124 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 132 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 136 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 144 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 152 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 160 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 168 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 176 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 184 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 192 + ~#usb_acecad_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 193 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 201 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 209 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 217 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 225 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 233 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 241 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 249 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 257 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 261 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 262 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 263 + ~#usb_acecad_driver~0.offset, 1);~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {4143#true} is VALID [2022-02-20 22:07:01,288 INFO L290 TraceCheckUtils]: 1: Hoare triple {4143#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret183#1.base, main_#t~ret183#1.offset, main_#t~nondet184#1, main_#t~switch185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~ret188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~ret191#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~17#1.base, main_~tmp~17#1.offset, main_~tmp___0~6#1, main_~tmp___1~3#1, main_~tmp___2~1#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~17#1.base, main_~tmp~17#1.offset;havoc main_~tmp___0~6#1;havoc main_~tmp___1~3#1;havoc main_~tmp___2~1#1; {4143#true} is VALID [2022-02-20 22:07:01,288 INFO L272 TraceCheckUtils]: 2: Hoare triple {4143#true} call main_#t~ret183#1.base, main_#t~ret183#1.offset := ldv_init_zalloc(24); {4176#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:01,289 INFO L290 TraceCheckUtils]: 3: Hoare triple {4176#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {4143#true} is VALID [2022-02-20 22:07:01,289 INFO L272 TraceCheckUtils]: 4: Hoare triple {4143#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {4184#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:01,290 INFO L290 TraceCheckUtils]: 5: Hoare triple {4184#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {4143#true} is VALID [2022-02-20 22:07:01,290 INFO L290 TraceCheckUtils]: 6: Hoare triple {4143#true} assume true; {4143#true} is VALID [2022-02-20 22:07:01,290 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {4143#true} {4143#true} #538#return; {4143#true} is VALID [2022-02-20 22:07:01,290 INFO L290 TraceCheckUtils]: 8: Hoare triple {4143#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {4143#true} is VALID [2022-02-20 22:07:01,291 INFO L272 TraceCheckUtils]: 9: Hoare triple {4143#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {4143#true} is VALID [2022-02-20 22:07:01,291 INFO L290 TraceCheckUtils]: 10: Hoare triple {4143#true} ~cond := #in~cond; {4143#true} is VALID [2022-02-20 22:07:01,291 INFO L290 TraceCheckUtils]: 11: Hoare triple {4143#true} assume !(0 == ~cond); {4143#true} is VALID [2022-02-20 22:07:01,291 INFO L290 TraceCheckUtils]: 12: Hoare triple {4143#true} assume true; {4143#true} is VALID [2022-02-20 22:07:01,292 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {4143#true} {4143#true} #540#return; {4143#true} is VALID [2022-02-20 22:07:01,292 INFO L290 TraceCheckUtils]: 14: Hoare triple {4143#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {4143#true} is VALID [2022-02-20 22:07:01,292 INFO L290 TraceCheckUtils]: 15: Hoare triple {4143#true} assume true; {4143#true} is VALID [2022-02-20 22:07:01,292 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {4143#true} {4143#true} #544#return; {4143#true} is VALID [2022-02-20 22:07:01,292 INFO L290 TraceCheckUtils]: 17: Hoare triple {4143#true} main_~tmp~17#1.base, main_~tmp~17#1.offset := main_#t~ret183#1.base, main_#t~ret183#1.offset;havoc main_#t~ret183#1.base, main_#t~ret183#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~17#1.base, main_~tmp~17#1.offset;assume { :begin_inline_ldv_initialize } true; {4143#true} is VALID [2022-02-20 22:07:01,293 INFO L290 TraceCheckUtils]: 18: Hoare triple {4143#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1; {4143#true} is VALID [2022-02-20 22:07:01,293 INFO L290 TraceCheckUtils]: 19: Hoare triple {4143#true} assume -2147483648 <= main_#t~nondet184#1 && main_#t~nondet184#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet184#1;havoc main_#t~nondet184#1;main_#t~switch185#1 := 0 == main_~tmp___0~6#1; {4143#true} is VALID [2022-02-20 22:07:01,293 INFO L290 TraceCheckUtils]: 20: Hoare triple {4143#true} assume !main_#t~switch185#1;main_#t~switch185#1 := main_#t~switch185#1 || 1 == main_~tmp___0~6#1; {4143#true} is VALID [2022-02-20 22:07:01,293 INFO L290 TraceCheckUtils]: 21: Hoare triple {4143#true} assume main_#t~switch185#1; {4143#true} is VALID [2022-02-20 22:07:01,293 INFO L290 TraceCheckUtils]: 22: Hoare triple {4143#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet189#1 && main_#t~nondet189#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet189#1;havoc main_#t~nondet189#1;main_#t~switch190#1 := 0 == main_~tmp___2~1#1; {4143#true} is VALID [2022-02-20 22:07:01,294 INFO L290 TraceCheckUtils]: 23: Hoare triple {4143#true} assume !main_#t~switch190#1;main_#t~switch190#1 := main_#t~switch190#1 || 1 == main_~tmp___2~1#1; {4143#true} is VALID [2022-02-20 22:07:01,294 INFO L290 TraceCheckUtils]: 24: Hoare triple {4143#true} assume main_#t~switch190#1; {4143#true} is VALID [2022-02-20 22:07:01,294 INFO L290 TraceCheckUtils]: 25: Hoare triple {4143#true} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_usb_acecad_init } true;havoc usb_acecad_init_#res#1;havoc usb_acecad_init_#t~ret180#1, usb_acecad_init_#t~nondet181#1, usb_acecad_init_~result~0#1, usb_acecad_init_~tmp~15#1;havoc usb_acecad_init_~result~0#1;havoc usb_acecad_init_~tmp~15#1;assume { :begin_inline_usb_register } true;usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc usb_register_#res#1;havoc usb_register_#t~ret31#1, usb_register_~driver#1.base, usb_register_~driver#1.offset, usb_register_~tmp~1#1;usb_register_~driver#1.base, usb_register_~driver#1.offset := usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset;havoc usb_register_~tmp~1#1;assume { :begin_inline_ldv_usb_register_driver_2 } true;ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset := usb_register_~driver#1.base, usb_register_~driver#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 4, 0;havoc ldv_usb_register_driver_2_#res#1;havoc ldv_usb_register_driver_2_#t~ret193#1, ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset, ldv_usb_register_driver_2_~ldv_func_res~0#1, ldv_usb_register_driver_2_~tmp~19#1;ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_2_~ldv_func_res~0#1;havoc ldv_usb_register_driver_2_~tmp~19#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet213#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet213#1 && usb_register_driver_#t~nondet213#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet213#1;havoc usb_register_driver_#t~nondet213#1; {4143#true} is VALID [2022-02-20 22:07:01,295 INFO L290 TraceCheckUtils]: 26: Hoare triple {4143#true} ldv_usb_register_driver_2_#t~ret193#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_2_#t~ret193#1 && ldv_usb_register_driver_2_#t~ret193#1 <= 2147483647;ldv_usb_register_driver_2_~tmp~19#1 := ldv_usb_register_driver_2_#t~ret193#1;havoc ldv_usb_register_driver_2_#t~ret193#1;ldv_usb_register_driver_2_~ldv_func_res~0#1 := ldv_usb_register_driver_2_~tmp~19#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset, ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset;havoc ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {4143#true} is VALID [2022-02-20 22:07:01,295 INFO L272 TraceCheckUtils]: 27: Hoare triple {4143#true} call ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset := ldv_init_zalloc(1248); {4176#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:01,296 INFO L290 TraceCheckUtils]: 28: Hoare triple {4176#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {4143#true} is VALID [2022-02-20 22:07:01,297 INFO L272 TraceCheckUtils]: 29: Hoare triple {4143#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {4184#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:01,297 INFO L290 TraceCheckUtils]: 30: Hoare triple {4184#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {4143#true} is VALID [2022-02-20 22:07:01,297 INFO L290 TraceCheckUtils]: 31: Hoare triple {4143#true} assume true; {4143#true} is VALID [2022-02-20 22:07:01,297 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {4143#true} {4143#true} #538#return; {4143#true} is VALID [2022-02-20 22:07:01,297 INFO L290 TraceCheckUtils]: 33: Hoare triple {4143#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {4143#true} is VALID [2022-02-20 22:07:01,298 INFO L272 TraceCheckUtils]: 34: Hoare triple {4143#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {4143#true} is VALID [2022-02-20 22:07:01,298 INFO L290 TraceCheckUtils]: 35: Hoare triple {4143#true} ~cond := #in~cond; {4143#true} is VALID [2022-02-20 22:07:01,298 INFO L290 TraceCheckUtils]: 36: Hoare triple {4143#true} assume !(0 == ~cond); {4143#true} is VALID [2022-02-20 22:07:01,298 INFO L290 TraceCheckUtils]: 37: Hoare triple {4143#true} assume true; {4143#true} is VALID [2022-02-20 22:07:01,298 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {4143#true} {4143#true} #540#return; {4143#true} is VALID [2022-02-20 22:07:01,298 INFO L290 TraceCheckUtils]: 39: Hoare triple {4143#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {4143#true} is VALID [2022-02-20 22:07:01,299 INFO L290 TraceCheckUtils]: 40: Hoare triple {4143#true} assume true; {4143#true} is VALID [2022-02-20 22:07:01,299 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {4143#true} {4143#true} #600#return; {4143#true} is VALID [2022-02-20 22:07:01,299 INFO L290 TraceCheckUtils]: 42: Hoare triple {4143#true} ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset := ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset;havoc ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {4143#true} is VALID [2022-02-20 22:07:01,299 INFO L290 TraceCheckUtils]: 43: Hoare triple {4143#true} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_2_#res#1 := ldv_usb_register_driver_2_~ldv_func_res~0#1; {4143#true} is VALID [2022-02-20 22:07:01,300 INFO L290 TraceCheckUtils]: 44: Hoare triple {4143#true} usb_register_#t~ret31#1 := ldv_usb_register_driver_2_#res#1;assume { :end_inline_ldv_usb_register_driver_2 } true;assume -2147483648 <= usb_register_#t~ret31#1 && usb_register_#t~ret31#1 <= 2147483647;usb_register_~tmp~1#1 := usb_register_#t~ret31#1;havoc usb_register_#t~ret31#1;usb_register_#res#1 := usb_register_~tmp~1#1; {4143#true} is VALID [2022-02-20 22:07:01,300 INFO L290 TraceCheckUtils]: 45: Hoare triple {4143#true} usb_acecad_init_#t~ret180#1 := usb_register_#res#1;assume { :end_inline_usb_register } true;assume -2147483648 <= usb_acecad_init_#t~ret180#1 && usb_acecad_init_#t~ret180#1 <= 2147483647;usb_acecad_init_~tmp~15#1 := usb_acecad_init_#t~ret180#1;havoc usb_acecad_init_#t~ret180#1;usb_acecad_init_~result~0#1 := usb_acecad_init_~tmp~15#1; {4143#true} is VALID [2022-02-20 22:07:01,300 INFO L290 TraceCheckUtils]: 46: Hoare triple {4143#true} assume 0 == usb_acecad_init_~result~0#1;havoc usb_acecad_init_#t~nondet181#1; {4173#(= |ULTIMATE.start_usb_acecad_init_~result~0#1| 0)} is VALID [2022-02-20 22:07:01,301 INFO L290 TraceCheckUtils]: 47: Hoare triple {4173#(= |ULTIMATE.start_usb_acecad_init_~result~0#1| 0)} usb_acecad_init_#res#1 := usb_acecad_init_~result~0#1; {4174#(= |ULTIMATE.start_usb_acecad_init_#res#1| 0)} is VALID [2022-02-20 22:07:01,301 INFO L290 TraceCheckUtils]: 48: Hoare triple {4174#(= |ULTIMATE.start_usb_acecad_init_#res#1| 0)} main_#t~ret191#1 := usb_acecad_init_#res#1;assume { :end_inline_usb_acecad_init } true;assume -2147483648 <= main_#t~ret191#1 && main_#t~ret191#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret191#1;havoc main_#t~ret191#1; {4175#(= ~ldv_retval_1~0 0)} is VALID [2022-02-20 22:07:01,302 INFO L290 TraceCheckUtils]: 49: Hoare triple {4175#(= ~ldv_retval_1~0 0)} assume 0 == ~ldv_retval_1~0;~ldv_state_variable_0~0 := 3; {4175#(= ~ldv_retval_1~0 0)} is VALID [2022-02-20 22:07:01,302 INFO L290 TraceCheckUtils]: 50: Hoare triple {4175#(= ~ldv_retval_1~0 0)} assume 0 != ~ldv_retval_1~0;~ldv_state_variable_0~0 := 2; {4144#false} is VALID [2022-02-20 22:07:01,302 INFO L290 TraceCheckUtils]: 51: Hoare triple {4144#false} assume { :begin_inline_ldv_check_final_state } true; {4144#false} is VALID [2022-02-20 22:07:01,303 INFO L290 TraceCheckUtils]: 52: Hoare triple {4144#false} assume 0 != (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616; {4144#false} is VALID [2022-02-20 22:07:01,303 INFO L272 TraceCheckUtils]: 53: Hoare triple {4144#false} call ldv_error(); {4144#false} is VALID [2022-02-20 22:07:01,303 INFO L290 TraceCheckUtils]: 54: Hoare triple {4144#false} assume !false; {4144#false} is VALID [2022-02-20 22:07:01,303 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2022-02-20 22:07:01,304 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:07:01,304 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1635266188] [2022-02-20 22:07:01,304 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1635266188] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:07:01,304 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 22:07:01,304 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-02-20 22:07:01,305 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [241338992] [2022-02-20 22:07:01,305 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:07:01,305 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 4.714285714285714) internal successors, (33), 5 states have internal predecessors, (33), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 55 [2022-02-20 22:07:01,306 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:07:01,306 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 4.714285714285714) internal successors, (33), 5 states have internal predecessors, (33), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 22:07:01,340 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 42 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:01,340 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-02-20 22:07:01,340 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:07:01,340 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-02-20 22:07:01,341 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2022-02-20 22:07:01,341 INFO L87 Difference]: Start difference. First operand 417 states and 541 transitions. Second operand has 7 states, 7 states have (on average 4.714285714285714) internal successors, (33), 5 states have internal predecessors, (33), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 22:07:03,639 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:03,639 INFO L93 Difference]: Finished difference Result 990 states and 1323 transitions. [2022-02-20 22:07:03,639 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-02-20 22:07:03,640 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 4.714285714285714) internal successors, (33), 5 states have internal predecessors, (33), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 55 [2022-02-20 22:07:03,640 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 22:07:03,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 4.714285714285714) internal successors, (33), 5 states have internal predecessors, (33), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 22:07:03,653 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 824 transitions. [2022-02-20 22:07:03,653 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 4.714285714285714) internal successors, (33), 5 states have internal predecessors, (33), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 22:07:03,662 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 824 transitions. [2022-02-20 22:07:03,662 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 8 states and 824 transitions. [2022-02-20 22:07:04,251 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 824 edges. 824 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:04,278 INFO L225 Difference]: With dead ends: 990 [2022-02-20 22:07:04,279 INFO L226 Difference]: Without dead ends: 588 [2022-02-20 22:07:04,280 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2022-02-20 22:07:04,281 INFO L933 BasicCegarLoop]: 455 mSDtfsCounter, 659 mSDsluCounter, 795 mSDsCounter, 0 mSdLazyCounter, 324 mSolverCounterSat, 201 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 689 SdHoareTripleChecker+Valid, 1250 SdHoareTripleChecker+Invalid, 525 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 201 IncrementalHoareTripleChecker+Valid, 324 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-02-20 22:07:04,281 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [689 Valid, 1250 Invalid, 525 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [201 Valid, 324 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-02-20 22:07:04,283 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 588 states. [2022-02-20 22:07:04,302 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 588 to 420. [2022-02-20 22:07:04,302 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 22:07:04,303 INFO L82 GeneralOperation]: Start isEquivalent. First operand 588 states. Second operand has 420 states, 320 states have (on average 1.26875) internal successors, (406), 328 states have internal predecessors, (406), 71 states have call successors, (71), 29 states have call predecessors, (71), 28 states have return successors, (66), 66 states have call predecessors, (66), 66 states have call successors, (66) [2022-02-20 22:07:04,304 INFO L74 IsIncluded]: Start isIncluded. First operand 588 states. Second operand has 420 states, 320 states have (on average 1.26875) internal successors, (406), 328 states have internal predecessors, (406), 71 states have call successors, (71), 29 states have call predecessors, (71), 28 states have return successors, (66), 66 states have call predecessors, (66), 66 states have call successors, (66) [2022-02-20 22:07:04,305 INFO L87 Difference]: Start difference. First operand 588 states. Second operand has 420 states, 320 states have (on average 1.26875) internal successors, (406), 328 states have internal predecessors, (406), 71 states have call successors, (71), 29 states have call predecessors, (71), 28 states have return successors, (66), 66 states have call predecessors, (66), 66 states have call successors, (66) [2022-02-20 22:07:04,328 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:04,328 INFO L93 Difference]: Finished difference Result 588 states and 795 transitions. [2022-02-20 22:07:04,328 INFO L276 IsEmpty]: Start isEmpty. Operand 588 states and 795 transitions. [2022-02-20 22:07:04,343 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:04,343 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:04,345 INFO L74 IsIncluded]: Start isIncluded. First operand has 420 states, 320 states have (on average 1.26875) internal successors, (406), 328 states have internal predecessors, (406), 71 states have call successors, (71), 29 states have call predecessors, (71), 28 states have return successors, (66), 66 states have call predecessors, (66), 66 states have call successors, (66) Second operand 588 states. [2022-02-20 22:07:04,346 INFO L87 Difference]: Start difference. First operand has 420 states, 320 states have (on average 1.26875) internal successors, (406), 328 states have internal predecessors, (406), 71 states have call successors, (71), 29 states have call predecessors, (71), 28 states have return successors, (66), 66 states have call predecessors, (66), 66 states have call successors, (66) Second operand 588 states. [2022-02-20 22:07:04,369 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:04,369 INFO L93 Difference]: Finished difference Result 588 states and 795 transitions. [2022-02-20 22:07:04,369 INFO L276 IsEmpty]: Start isEmpty. Operand 588 states and 795 transitions. [2022-02-20 22:07:04,371 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:04,371 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:04,371 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 22:07:04,371 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 22:07:04,372 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 420 states, 320 states have (on average 1.26875) internal successors, (406), 328 states have internal predecessors, (406), 71 states have call successors, (71), 29 states have call predecessors, (71), 28 states have return successors, (66), 66 states have call predecessors, (66), 66 states have call successors, (66) [2022-02-20 22:07:04,387 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 420 states to 420 states and 543 transitions. [2022-02-20 22:07:04,387 INFO L78 Accepts]: Start accepts. Automaton has 420 states and 543 transitions. Word has length 55 [2022-02-20 22:07:04,388 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 22:07:04,388 INFO L470 AbstractCegarLoop]: Abstraction has 420 states and 543 transitions. [2022-02-20 22:07:04,388 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 4.714285714285714) internal successors, (33), 5 states have internal predecessors, (33), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 22:07:04,388 INFO L276 IsEmpty]: Start isEmpty. Operand 420 states and 543 transitions. [2022-02-20 22:07:04,389 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2022-02-20 22:07:04,389 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:07:04,389 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:07:04,390 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-02-20 22:07:04,390 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:07:04,391 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:07:04,391 INFO L85 PathProgramCache]: Analyzing trace with hash 1486182813, now seen corresponding path program 1 times [2022-02-20 22:07:04,391 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:07:04,391 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [664717858] [2022-02-20 22:07:04,391 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:07:04,391 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:07:04,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:04,496 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 22:07:04,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:04,513 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:04,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:04,520 INFO L290 TraceCheckUtils]: 0: Hoare triple {7424#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {7385#true} is VALID [2022-02-20 22:07:04,520 INFO L290 TraceCheckUtils]: 1: Hoare triple {7385#true} assume true; {7385#true} is VALID [2022-02-20 22:07:04,521 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {7385#true} {7385#true} #538#return; {7385#true} is VALID [2022-02-20 22:07:04,521 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:04,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:04,533 INFO L290 TraceCheckUtils]: 0: Hoare triple {7385#true} ~cond := #in~cond; {7385#true} is VALID [2022-02-20 22:07:04,533 INFO L290 TraceCheckUtils]: 1: Hoare triple {7385#true} assume !(0 == ~cond); {7385#true} is VALID [2022-02-20 22:07:04,533 INFO L290 TraceCheckUtils]: 2: Hoare triple {7385#true} assume true; {7385#true} is VALID [2022-02-20 22:07:04,533 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7385#true} {7385#true} #540#return; {7385#true} is VALID [2022-02-20 22:07:04,534 INFO L290 TraceCheckUtils]: 0: Hoare triple {7416#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {7385#true} is VALID [2022-02-20 22:07:04,534 INFO L272 TraceCheckUtils]: 1: Hoare triple {7385#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {7424#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:04,535 INFO L290 TraceCheckUtils]: 2: Hoare triple {7424#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {7385#true} is VALID [2022-02-20 22:07:04,535 INFO L290 TraceCheckUtils]: 3: Hoare triple {7385#true} assume true; {7385#true} is VALID [2022-02-20 22:07:04,535 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {7385#true} {7385#true} #538#return; {7385#true} is VALID [2022-02-20 22:07:04,535 INFO L290 TraceCheckUtils]: 5: Hoare triple {7385#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {7385#true} is VALID [2022-02-20 22:07:04,535 INFO L272 TraceCheckUtils]: 6: Hoare triple {7385#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {7385#true} is VALID [2022-02-20 22:07:04,535 INFO L290 TraceCheckUtils]: 7: Hoare triple {7385#true} ~cond := #in~cond; {7385#true} is VALID [2022-02-20 22:07:04,536 INFO L290 TraceCheckUtils]: 8: Hoare triple {7385#true} assume !(0 == ~cond); {7385#true} is VALID [2022-02-20 22:07:04,536 INFO L290 TraceCheckUtils]: 9: Hoare triple {7385#true} assume true; {7385#true} is VALID [2022-02-20 22:07:04,536 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {7385#true} {7385#true} #540#return; {7385#true} is VALID [2022-02-20 22:07:04,536 INFO L290 TraceCheckUtils]: 11: Hoare triple {7385#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {7385#true} is VALID [2022-02-20 22:07:04,536 INFO L290 TraceCheckUtils]: 12: Hoare triple {7385#true} assume true; {7385#true} is VALID [2022-02-20 22:07:04,537 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {7385#true} {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #544#return; {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 22:07:04,537 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 27 [2022-02-20 22:07:04,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:04,555 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:04,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:04,569 INFO L290 TraceCheckUtils]: 0: Hoare triple {7424#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {7385#true} is VALID [2022-02-20 22:07:04,569 INFO L290 TraceCheckUtils]: 1: Hoare triple {7385#true} assume true; {7385#true} is VALID [2022-02-20 22:07:04,570 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {7385#true} {7385#true} #538#return; {7385#true} is VALID [2022-02-20 22:07:04,570 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:04,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:04,576 INFO L290 TraceCheckUtils]: 0: Hoare triple {7385#true} ~cond := #in~cond; {7385#true} is VALID [2022-02-20 22:07:04,577 INFO L290 TraceCheckUtils]: 1: Hoare triple {7385#true} assume !(0 == ~cond); {7385#true} is VALID [2022-02-20 22:07:04,577 INFO L290 TraceCheckUtils]: 2: Hoare triple {7385#true} assume true; {7385#true} is VALID [2022-02-20 22:07:04,577 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7385#true} {7385#true} #540#return; {7385#true} is VALID [2022-02-20 22:07:04,578 INFO L290 TraceCheckUtils]: 0: Hoare triple {7416#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {7385#true} is VALID [2022-02-20 22:07:04,579 INFO L272 TraceCheckUtils]: 1: Hoare triple {7385#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {7424#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:04,579 INFO L290 TraceCheckUtils]: 2: Hoare triple {7424#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {7385#true} is VALID [2022-02-20 22:07:04,579 INFO L290 TraceCheckUtils]: 3: Hoare triple {7385#true} assume true; {7385#true} is VALID [2022-02-20 22:07:04,579 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {7385#true} {7385#true} #538#return; {7385#true} is VALID [2022-02-20 22:07:04,579 INFO L290 TraceCheckUtils]: 5: Hoare triple {7385#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {7385#true} is VALID [2022-02-20 22:07:04,579 INFO L272 TraceCheckUtils]: 6: Hoare triple {7385#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {7385#true} is VALID [2022-02-20 22:07:04,580 INFO L290 TraceCheckUtils]: 7: Hoare triple {7385#true} ~cond := #in~cond; {7385#true} is VALID [2022-02-20 22:07:04,580 INFO L290 TraceCheckUtils]: 8: Hoare triple {7385#true} assume !(0 == ~cond); {7385#true} is VALID [2022-02-20 22:07:04,580 INFO L290 TraceCheckUtils]: 9: Hoare triple {7385#true} assume true; {7385#true} is VALID [2022-02-20 22:07:04,580 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {7385#true} {7385#true} #540#return; {7385#true} is VALID [2022-02-20 22:07:04,580 INFO L290 TraceCheckUtils]: 11: Hoare triple {7385#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {7385#true} is VALID [2022-02-20 22:07:04,580 INFO L290 TraceCheckUtils]: 12: Hoare triple {7385#true} assume true; {7385#true} is VALID [2022-02-20 22:07:04,581 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {7385#true} {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #600#return; {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 22:07:04,586 INFO L290 TraceCheckUtils]: 0: Hoare triple {7385#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(99, 2);call #Ultimate.allocInit(10, 3);call #Ultimate.allocInit(7, 4);call write~init~int(97, 4, 0, 1);call write~init~int(99, 4, 1, 1);call write~init~int(101, 4, 2, 1);call write~init~int(99, 4, 3, 1);call write~init~int(97, 4, 4, 1);call write~init~int(100, 4, 5, 1);call write~init~int(0, 4, 6, 1);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(20, 6);call #Ultimate.allocInit(57, 7);call #Ultimate.allocInit(2, 8);call write~init~int(32, 8, 0, 1);call write~init~int(0, 8, 1, 1);call #Ultimate.allocInit(8, 9);call #Ultimate.allocInit(34, 10);call #Ultimate.allocInit(32, 11);call #Ultimate.allocInit(11, 12);call #Ultimate.allocInit(48, 13);~LDV_IN_INTERRUPT~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset := 14, 0;call #Ultimate.allocInit(72, 14);call write~init~int(3, ~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 2 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(4, ~#usb_acecad_id_table~0.base, 4 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 6 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 8 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 10 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 11 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 12 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 13 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 14 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 15 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 16 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(3, ~#usb_acecad_id_table~0.base, 24 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 26 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(8, ~#usb_acecad_id_table~0.base, 28 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 30 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 32 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 34 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 35 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 36 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 37 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 38 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 39 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(1, ~#usb_acecad_id_table~0.base, 40 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(0, ~#usb_acecad_id_table~0.base, 48 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 50 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 52 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 54 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 56 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 58 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 59 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 60 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 61 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 62 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 63 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 64 + ~#usb_acecad_id_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.driver_info := 0;~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset := 15, 0;call #Ultimate.allocInit(264, 15);call write~init~$Pointer$(12, 0, ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_probe.base, #funAddr~usb_acecad_probe.offset, ~#usb_acecad_driver~0.base, 8 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_disconnect.base, #funAddr~usb_acecad_disconnect.offset, ~#usb_acecad_driver~0.base, 16 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 24 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 32 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 40 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 48 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 56 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 64 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, ~#usb_acecad_driver~0.base, 72 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 80 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 84 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 88 + ~#usb_acecad_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 92 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 100 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 108 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 116 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 124 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 132 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 136 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 144 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 152 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 160 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 168 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 176 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 184 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 192 + ~#usb_acecad_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 193 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 201 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 209 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 217 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 225 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 233 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 241 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 249 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 257 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 261 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 262 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 263 + ~#usb_acecad_driver~0.offset, 1);~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 22:07:04,590 INFO L290 TraceCheckUtils]: 1: Hoare triple {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret183#1.base, main_#t~ret183#1.offset, main_#t~nondet184#1, main_#t~switch185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~ret188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~ret191#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~17#1.base, main_~tmp~17#1.offset, main_~tmp___0~6#1, main_~tmp___1~3#1, main_~tmp___2~1#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~17#1.base, main_~tmp~17#1.offset;havoc main_~tmp___0~6#1;havoc main_~tmp___1~3#1;havoc main_~tmp___2~1#1; {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 22:07:04,592 INFO L272 TraceCheckUtils]: 2: Hoare triple {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} call main_#t~ret183#1.base, main_#t~ret183#1.offset := ldv_init_zalloc(24); {7416#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:04,597 INFO L290 TraceCheckUtils]: 3: Hoare triple {7416#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {7385#true} is VALID [2022-02-20 22:07:04,600 INFO L272 TraceCheckUtils]: 4: Hoare triple {7385#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {7424#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:04,600 INFO L290 TraceCheckUtils]: 5: Hoare triple {7424#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {7385#true} is VALID [2022-02-20 22:07:04,600 INFO L290 TraceCheckUtils]: 6: Hoare triple {7385#true} assume true; {7385#true} is VALID [2022-02-20 22:07:04,600 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {7385#true} {7385#true} #538#return; {7385#true} is VALID [2022-02-20 22:07:04,603 INFO L290 TraceCheckUtils]: 8: Hoare triple {7385#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {7385#true} is VALID [2022-02-20 22:07:04,604 INFO L272 TraceCheckUtils]: 9: Hoare triple {7385#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {7385#true} is VALID [2022-02-20 22:07:04,604 INFO L290 TraceCheckUtils]: 10: Hoare triple {7385#true} ~cond := #in~cond; {7385#true} is VALID [2022-02-20 22:07:04,606 INFO L290 TraceCheckUtils]: 11: Hoare triple {7385#true} assume !(0 == ~cond); {7385#true} is VALID [2022-02-20 22:07:04,606 INFO L290 TraceCheckUtils]: 12: Hoare triple {7385#true} assume true; {7385#true} is VALID [2022-02-20 22:07:04,606 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {7385#true} {7385#true} #540#return; {7385#true} is VALID [2022-02-20 22:07:04,607 INFO L290 TraceCheckUtils]: 14: Hoare triple {7385#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {7385#true} is VALID [2022-02-20 22:07:04,607 INFO L290 TraceCheckUtils]: 15: Hoare triple {7385#true} assume true; {7385#true} is VALID [2022-02-20 22:07:04,608 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {7385#true} {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #544#return; {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 22:07:04,608 INFO L290 TraceCheckUtils]: 17: Hoare triple {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} main_~tmp~17#1.base, main_~tmp~17#1.offset := main_#t~ret183#1.base, main_#t~ret183#1.offset;havoc main_#t~ret183#1.base, main_#t~ret183#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~17#1.base, main_~tmp~17#1.offset;assume { :begin_inline_ldv_initialize } true; {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 22:07:04,608 INFO L290 TraceCheckUtils]: 18: Hoare triple {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1; {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 22:07:04,609 INFO L290 TraceCheckUtils]: 19: Hoare triple {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume -2147483648 <= main_#t~nondet184#1 && main_#t~nondet184#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet184#1;havoc main_#t~nondet184#1;main_#t~switch185#1 := 0 == main_~tmp___0~6#1; {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 22:07:04,609 INFO L290 TraceCheckUtils]: 20: Hoare triple {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume !main_#t~switch185#1;main_#t~switch185#1 := main_#t~switch185#1 || 1 == main_~tmp___0~6#1; {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 22:07:04,610 INFO L290 TraceCheckUtils]: 21: Hoare triple {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume main_#t~switch185#1; {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 22:07:04,610 INFO L290 TraceCheckUtils]: 22: Hoare triple {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet189#1 && main_#t~nondet189#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet189#1;havoc main_#t~nondet189#1;main_#t~switch190#1 := 0 == main_~tmp___2~1#1; {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 22:07:04,611 INFO L290 TraceCheckUtils]: 23: Hoare triple {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume !main_#t~switch190#1;main_#t~switch190#1 := main_#t~switch190#1 || 1 == main_~tmp___2~1#1; {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 22:07:04,611 INFO L290 TraceCheckUtils]: 24: Hoare triple {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume main_#t~switch190#1; {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 22:07:04,612 INFO L290 TraceCheckUtils]: 25: Hoare triple {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_usb_acecad_init } true;havoc usb_acecad_init_#res#1;havoc usb_acecad_init_#t~ret180#1, usb_acecad_init_#t~nondet181#1, usb_acecad_init_~result~0#1, usb_acecad_init_~tmp~15#1;havoc usb_acecad_init_~result~0#1;havoc usb_acecad_init_~tmp~15#1;assume { :begin_inline_usb_register } true;usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc usb_register_#res#1;havoc usb_register_#t~ret31#1, usb_register_~driver#1.base, usb_register_~driver#1.offset, usb_register_~tmp~1#1;usb_register_~driver#1.base, usb_register_~driver#1.offset := usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset;havoc usb_register_~tmp~1#1;assume { :begin_inline_ldv_usb_register_driver_2 } true;ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset := usb_register_~driver#1.base, usb_register_~driver#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 4, 0;havoc ldv_usb_register_driver_2_#res#1;havoc ldv_usb_register_driver_2_#t~ret193#1, ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset, ldv_usb_register_driver_2_~ldv_func_res~0#1, ldv_usb_register_driver_2_~tmp~19#1;ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_2_~ldv_func_res~0#1;havoc ldv_usb_register_driver_2_~tmp~19#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet213#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet213#1 && usb_register_driver_#t~nondet213#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet213#1;havoc usb_register_driver_#t~nondet213#1; {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 22:07:04,615 INFO L290 TraceCheckUtils]: 26: Hoare triple {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} ldv_usb_register_driver_2_#t~ret193#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_2_#t~ret193#1 && ldv_usb_register_driver_2_#t~ret193#1 <= 2147483647;ldv_usb_register_driver_2_~tmp~19#1 := ldv_usb_register_driver_2_#t~ret193#1;havoc ldv_usb_register_driver_2_#t~ret193#1;ldv_usb_register_driver_2_~ldv_func_res~0#1 := ldv_usb_register_driver_2_~tmp~19#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset, ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset;havoc ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 22:07:04,616 INFO L272 TraceCheckUtils]: 27: Hoare triple {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} call ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset := ldv_init_zalloc(1248); {7416#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:04,616 INFO L290 TraceCheckUtils]: 28: Hoare triple {7416#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {7385#true} is VALID [2022-02-20 22:07:04,617 INFO L272 TraceCheckUtils]: 29: Hoare triple {7385#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {7424#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:04,617 INFO L290 TraceCheckUtils]: 30: Hoare triple {7424#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {7385#true} is VALID [2022-02-20 22:07:04,618 INFO L290 TraceCheckUtils]: 31: Hoare triple {7385#true} assume true; {7385#true} is VALID [2022-02-20 22:07:04,618 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {7385#true} {7385#true} #538#return; {7385#true} is VALID [2022-02-20 22:07:04,618 INFO L290 TraceCheckUtils]: 33: Hoare triple {7385#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {7385#true} is VALID [2022-02-20 22:07:04,618 INFO L272 TraceCheckUtils]: 34: Hoare triple {7385#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {7385#true} is VALID [2022-02-20 22:07:04,618 INFO L290 TraceCheckUtils]: 35: Hoare triple {7385#true} ~cond := #in~cond; {7385#true} is VALID [2022-02-20 22:07:04,618 INFO L290 TraceCheckUtils]: 36: Hoare triple {7385#true} assume !(0 == ~cond); {7385#true} is VALID [2022-02-20 22:07:04,618 INFO L290 TraceCheckUtils]: 37: Hoare triple {7385#true} assume true; {7385#true} is VALID [2022-02-20 22:07:04,619 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {7385#true} {7385#true} #540#return; {7385#true} is VALID [2022-02-20 22:07:04,619 INFO L290 TraceCheckUtils]: 39: Hoare triple {7385#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {7385#true} is VALID [2022-02-20 22:07:04,619 INFO L290 TraceCheckUtils]: 40: Hoare triple {7385#true} assume true; {7385#true} is VALID [2022-02-20 22:07:04,620 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {7385#true} {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} #600#return; {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 22:07:04,620 INFO L290 TraceCheckUtils]: 42: Hoare triple {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset := ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset;havoc ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 22:07:04,620 INFO L290 TraceCheckUtils]: 43: Hoare triple {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_2_#res#1 := ldv_usb_register_driver_2_~ldv_func_res~0#1; {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 22:07:04,621 INFO L290 TraceCheckUtils]: 44: Hoare triple {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} usb_register_#t~ret31#1 := ldv_usb_register_driver_2_#res#1;assume { :end_inline_ldv_usb_register_driver_2 } true;assume -2147483648 <= usb_register_#t~ret31#1 && usb_register_#t~ret31#1 <= 2147483647;usb_register_~tmp~1#1 := usb_register_#t~ret31#1;havoc usb_register_#t~ret31#1;usb_register_#res#1 := usb_register_~tmp~1#1; {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 22:07:04,621 INFO L290 TraceCheckUtils]: 45: Hoare triple {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} usb_acecad_init_#t~ret180#1 := usb_register_#res#1;assume { :end_inline_usb_register } true;assume -2147483648 <= usb_acecad_init_#t~ret180#1 && usb_acecad_init_#t~ret180#1 <= 2147483647;usb_acecad_init_~tmp~15#1 := usb_acecad_init_#t~ret180#1;havoc usb_acecad_init_#t~ret180#1;usb_acecad_init_~result~0#1 := usb_acecad_init_~tmp~15#1; {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 22:07:04,622 INFO L290 TraceCheckUtils]: 46: Hoare triple {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume !(0 == usb_acecad_init_~result~0#1); {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 22:07:04,622 INFO L290 TraceCheckUtils]: 47: Hoare triple {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} usb_acecad_init_#res#1 := usb_acecad_init_~result~0#1; {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 22:07:04,623 INFO L290 TraceCheckUtils]: 48: Hoare triple {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} main_#t~ret191#1 := usb_acecad_init_#res#1;assume { :end_inline_usb_acecad_init } true;assume -2147483648 <= main_#t~ret191#1 && main_#t~ret191#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret191#1;havoc main_#t~ret191#1; {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 22:07:04,623 INFO L290 TraceCheckUtils]: 49: Hoare triple {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume !(0 == ~ldv_retval_1~0); {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 22:07:04,623 INFO L290 TraceCheckUtils]: 50: Hoare triple {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume 0 != ~ldv_retval_1~0;~ldv_state_variable_0~0 := 2; {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 22:07:04,624 INFO L290 TraceCheckUtils]: 51: Hoare triple {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume { :begin_inline_ldv_check_final_state } true; {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} is VALID [2022-02-20 22:07:04,624 INFO L290 TraceCheckUtils]: 52: Hoare triple {7387#(and (= ~usb_urb~0.base 0) (= ~usb_urb~0.offset 0))} assume 0 != (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616; {7386#false} is VALID [2022-02-20 22:07:04,624 INFO L272 TraceCheckUtils]: 53: Hoare triple {7386#false} call ldv_error(); {7386#false} is VALID [2022-02-20 22:07:04,625 INFO L290 TraceCheckUtils]: 54: Hoare triple {7386#false} assume !false; {7386#false} is VALID [2022-02-20 22:07:04,627 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2022-02-20 22:07:04,627 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:07:04,628 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [664717858] [2022-02-20 22:07:04,628 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [664717858] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:07:04,628 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 22:07:04,628 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-02-20 22:07:04,628 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1734986904] [2022-02-20 22:07:04,628 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:07:04,629 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 55 [2022-02-20 22:07:04,629 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:07:04,629 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 22:07:04,677 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 42 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:04,677 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-02-20 22:07:04,678 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:07:04,679 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-02-20 22:07:04,679 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-02-20 22:07:04,679 INFO L87 Difference]: Start difference. First operand 420 states and 543 transitions. Second operand has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 22:07:06,330 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:06,331 INFO L93 Difference]: Finished difference Result 1257 states and 1644 transitions. [2022-02-20 22:07:06,331 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-02-20 22:07:06,331 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 55 [2022-02-20 22:07:06,332 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 22:07:06,332 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 22:07:06,341 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 884 transitions. [2022-02-20 22:07:06,341 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 22:07:06,350 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 884 transitions. [2022-02-20 22:07:06,351 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 7 states and 884 transitions. [2022-02-20 22:07:07,074 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 884 edges. 884 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:07,125 INFO L225 Difference]: With dead ends: 1257 [2022-02-20 22:07:07,126 INFO L226 Difference]: Without dead ends: 852 [2022-02-20 22:07:07,127 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2022-02-20 22:07:07,128 INFO L933 BasicCegarLoop]: 307 mSDtfsCounter, 389 mSDsluCounter, 358 mSDsCounter, 0 mSdLazyCounter, 201 mSolverCounterSat, 189 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 421 SdHoareTripleChecker+Valid, 665 SdHoareTripleChecker+Invalid, 390 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 189 IncrementalHoareTripleChecker+Valid, 201 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-02-20 22:07:07,128 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [421 Valid, 665 Invalid, 390 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [189 Valid, 201 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-02-20 22:07:07,129 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 852 states. [2022-02-20 22:07:07,158 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 852 to 814. [2022-02-20 22:07:07,158 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 22:07:07,160 INFO L82 GeneralOperation]: Start isEquivalent. First operand 852 states. Second operand has 814 states, 625 states have (on average 1.2656) internal successors, (791), 637 states have internal predecessors, (791), 134 states have call successors, (134), 55 states have call predecessors, (134), 54 states have return successors, (131), 129 states have call predecessors, (131), 129 states have call successors, (131) [2022-02-20 22:07:07,162 INFO L74 IsIncluded]: Start isIncluded. First operand 852 states. Second operand has 814 states, 625 states have (on average 1.2656) internal successors, (791), 637 states have internal predecessors, (791), 134 states have call successors, (134), 55 states have call predecessors, (134), 54 states have return successors, (131), 129 states have call predecessors, (131), 129 states have call successors, (131) [2022-02-20 22:07:07,164 INFO L87 Difference]: Start difference. First operand 852 states. Second operand has 814 states, 625 states have (on average 1.2656) internal successors, (791), 637 states have internal predecessors, (791), 134 states have call successors, (134), 55 states have call predecessors, (134), 54 states have return successors, (131), 129 states have call predecessors, (131), 129 states have call successors, (131) [2022-02-20 22:07:07,203 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:07,203 INFO L93 Difference]: Finished difference Result 852 states and 1112 transitions. [2022-02-20 22:07:07,204 INFO L276 IsEmpty]: Start isEmpty. Operand 852 states and 1112 transitions. [2022-02-20 22:07:07,206 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:07,206 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:07,208 INFO L74 IsIncluded]: Start isIncluded. First operand has 814 states, 625 states have (on average 1.2656) internal successors, (791), 637 states have internal predecessors, (791), 134 states have call successors, (134), 55 states have call predecessors, (134), 54 states have return successors, (131), 129 states have call predecessors, (131), 129 states have call successors, (131) Second operand 852 states. [2022-02-20 22:07:07,210 INFO L87 Difference]: Start difference. First operand has 814 states, 625 states have (on average 1.2656) internal successors, (791), 637 states have internal predecessors, (791), 134 states have call successors, (134), 55 states have call predecessors, (134), 54 states have return successors, (131), 129 states have call predecessors, (131), 129 states have call successors, (131) Second operand 852 states. [2022-02-20 22:07:07,251 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:07,252 INFO L93 Difference]: Finished difference Result 852 states and 1112 transitions. [2022-02-20 22:07:07,252 INFO L276 IsEmpty]: Start isEmpty. Operand 852 states and 1112 transitions. [2022-02-20 22:07:07,254 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:07,254 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:07,254 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 22:07:07,254 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 22:07:07,257 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 814 states, 625 states have (on average 1.2656) internal successors, (791), 637 states have internal predecessors, (791), 134 states have call successors, (134), 55 states have call predecessors, (134), 54 states have return successors, (131), 129 states have call predecessors, (131), 129 states have call successors, (131) [2022-02-20 22:07:07,306 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 814 states to 814 states and 1056 transitions. [2022-02-20 22:07:07,307 INFO L78 Accepts]: Start accepts. Automaton has 814 states and 1056 transitions. Word has length 55 [2022-02-20 22:07:07,307 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 22:07:07,307 INFO L470 AbstractCegarLoop]: Abstraction has 814 states and 1056 transitions. [2022-02-20 22:07:07,307 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 22:07:07,307 INFO L276 IsEmpty]: Start isEmpty. Operand 814 states and 1056 transitions. [2022-02-20 22:07:07,308 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2022-02-20 22:07:07,308 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:07:07,308 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:07:07,309 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-02-20 22:07:07,309 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:07:07,309 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:07:07,309 INFO L85 PathProgramCache]: Analyzing trace with hash -1172967990, now seen corresponding path program 1 times [2022-02-20 22:07:07,309 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:07:07,310 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [963869517] [2022-02-20 22:07:07,310 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:07:07,310 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:07:07,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:07,383 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 22:07:07,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:07,399 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:07,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:07,404 INFO L290 TraceCheckUtils]: 0: Hoare triple {12122#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {12083#true} is VALID [2022-02-20 22:07:07,404 INFO L290 TraceCheckUtils]: 1: Hoare triple {12083#true} assume true; {12083#true} is VALID [2022-02-20 22:07:07,405 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {12083#true} {12083#true} #538#return; {12083#true} is VALID [2022-02-20 22:07:07,405 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:07,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:07,410 INFO L290 TraceCheckUtils]: 0: Hoare triple {12083#true} ~cond := #in~cond; {12083#true} is VALID [2022-02-20 22:07:07,410 INFO L290 TraceCheckUtils]: 1: Hoare triple {12083#true} assume !(0 == ~cond); {12083#true} is VALID [2022-02-20 22:07:07,410 INFO L290 TraceCheckUtils]: 2: Hoare triple {12083#true} assume true; {12083#true} is VALID [2022-02-20 22:07:07,410 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12083#true} {12083#true} #540#return; {12083#true} is VALID [2022-02-20 22:07:07,410 INFO L290 TraceCheckUtils]: 0: Hoare triple {12114#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {12083#true} is VALID [2022-02-20 22:07:07,411 INFO L272 TraceCheckUtils]: 1: Hoare triple {12083#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {12122#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:07,411 INFO L290 TraceCheckUtils]: 2: Hoare triple {12122#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {12083#true} is VALID [2022-02-20 22:07:07,412 INFO L290 TraceCheckUtils]: 3: Hoare triple {12083#true} assume true; {12083#true} is VALID [2022-02-20 22:07:07,412 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {12083#true} {12083#true} #538#return; {12083#true} is VALID [2022-02-20 22:07:07,412 INFO L290 TraceCheckUtils]: 5: Hoare triple {12083#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {12083#true} is VALID [2022-02-20 22:07:07,412 INFO L272 TraceCheckUtils]: 6: Hoare triple {12083#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {12083#true} is VALID [2022-02-20 22:07:07,412 INFO L290 TraceCheckUtils]: 7: Hoare triple {12083#true} ~cond := #in~cond; {12083#true} is VALID [2022-02-20 22:07:07,412 INFO L290 TraceCheckUtils]: 8: Hoare triple {12083#true} assume !(0 == ~cond); {12083#true} is VALID [2022-02-20 22:07:07,412 INFO L290 TraceCheckUtils]: 9: Hoare triple {12083#true} assume true; {12083#true} is VALID [2022-02-20 22:07:07,413 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {12083#true} {12083#true} #540#return; {12083#true} is VALID [2022-02-20 22:07:07,413 INFO L290 TraceCheckUtils]: 11: Hoare triple {12083#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {12083#true} is VALID [2022-02-20 22:07:07,413 INFO L290 TraceCheckUtils]: 12: Hoare triple {12083#true} assume true; {12083#true} is VALID [2022-02-20 22:07:07,414 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {12083#true} {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #544#return; {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 22:07:07,414 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 27 [2022-02-20 22:07:07,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:07,424 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:07,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:07,430 INFO L290 TraceCheckUtils]: 0: Hoare triple {12122#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {12083#true} is VALID [2022-02-20 22:07:07,430 INFO L290 TraceCheckUtils]: 1: Hoare triple {12083#true} assume true; {12083#true} is VALID [2022-02-20 22:07:07,431 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {12083#true} {12083#true} #538#return; {12083#true} is VALID [2022-02-20 22:07:07,431 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:07,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:07,435 INFO L290 TraceCheckUtils]: 0: Hoare triple {12083#true} ~cond := #in~cond; {12083#true} is VALID [2022-02-20 22:07:07,436 INFO L290 TraceCheckUtils]: 1: Hoare triple {12083#true} assume !(0 == ~cond); {12083#true} is VALID [2022-02-20 22:07:07,436 INFO L290 TraceCheckUtils]: 2: Hoare triple {12083#true} assume true; {12083#true} is VALID [2022-02-20 22:07:07,436 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12083#true} {12083#true} #540#return; {12083#true} is VALID [2022-02-20 22:07:07,436 INFO L290 TraceCheckUtils]: 0: Hoare triple {12114#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {12083#true} is VALID [2022-02-20 22:07:07,437 INFO L272 TraceCheckUtils]: 1: Hoare triple {12083#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {12122#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:07,437 INFO L290 TraceCheckUtils]: 2: Hoare triple {12122#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {12083#true} is VALID [2022-02-20 22:07:07,437 INFO L290 TraceCheckUtils]: 3: Hoare triple {12083#true} assume true; {12083#true} is VALID [2022-02-20 22:07:07,438 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {12083#true} {12083#true} #538#return; {12083#true} is VALID [2022-02-20 22:07:07,438 INFO L290 TraceCheckUtils]: 5: Hoare triple {12083#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {12083#true} is VALID [2022-02-20 22:07:07,438 INFO L272 TraceCheckUtils]: 6: Hoare triple {12083#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {12083#true} is VALID [2022-02-20 22:07:07,438 INFO L290 TraceCheckUtils]: 7: Hoare triple {12083#true} ~cond := #in~cond; {12083#true} is VALID [2022-02-20 22:07:07,438 INFO L290 TraceCheckUtils]: 8: Hoare triple {12083#true} assume !(0 == ~cond); {12083#true} is VALID [2022-02-20 22:07:07,438 INFO L290 TraceCheckUtils]: 9: Hoare triple {12083#true} assume true; {12083#true} is VALID [2022-02-20 22:07:07,439 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {12083#true} {12083#true} #540#return; {12083#true} is VALID [2022-02-20 22:07:07,439 INFO L290 TraceCheckUtils]: 11: Hoare triple {12083#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {12083#true} is VALID [2022-02-20 22:07:07,439 INFO L290 TraceCheckUtils]: 12: Hoare triple {12083#true} assume true; {12083#true} is VALID [2022-02-20 22:07:07,441 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {12083#true} {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #600#return; {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 22:07:07,445 INFO L290 TraceCheckUtils]: 0: Hoare triple {12083#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(99, 2);call #Ultimate.allocInit(10, 3);call #Ultimate.allocInit(7, 4);call write~init~int(97, 4, 0, 1);call write~init~int(99, 4, 1, 1);call write~init~int(101, 4, 2, 1);call write~init~int(99, 4, 3, 1);call write~init~int(97, 4, 4, 1);call write~init~int(100, 4, 5, 1);call write~init~int(0, 4, 6, 1);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(20, 6);call #Ultimate.allocInit(57, 7);call #Ultimate.allocInit(2, 8);call write~init~int(32, 8, 0, 1);call write~init~int(0, 8, 1, 1);call #Ultimate.allocInit(8, 9);call #Ultimate.allocInit(34, 10);call #Ultimate.allocInit(32, 11);call #Ultimate.allocInit(11, 12);call #Ultimate.allocInit(48, 13);~LDV_IN_INTERRUPT~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset := 14, 0;call #Ultimate.allocInit(72, 14);call write~init~int(3, ~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 2 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(4, ~#usb_acecad_id_table~0.base, 4 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 6 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 8 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 10 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 11 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 12 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 13 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 14 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 15 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 16 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(3, ~#usb_acecad_id_table~0.base, 24 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 26 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(8, ~#usb_acecad_id_table~0.base, 28 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 30 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 32 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 34 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 35 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 36 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 37 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 38 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 39 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(1, ~#usb_acecad_id_table~0.base, 40 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(0, ~#usb_acecad_id_table~0.base, 48 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 50 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 52 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 54 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 56 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 58 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 59 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 60 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 61 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 62 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 63 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 64 + ~#usb_acecad_id_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.driver_info := 0;~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset := 15, 0;call #Ultimate.allocInit(264, 15);call write~init~$Pointer$(12, 0, ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_probe.base, #funAddr~usb_acecad_probe.offset, ~#usb_acecad_driver~0.base, 8 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_disconnect.base, #funAddr~usb_acecad_disconnect.offset, ~#usb_acecad_driver~0.base, 16 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 24 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 32 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 40 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 48 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 56 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 64 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, ~#usb_acecad_driver~0.base, 72 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 80 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 84 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 88 + ~#usb_acecad_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 92 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 100 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 108 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 116 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 124 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 132 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 136 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 144 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 152 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 160 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 168 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 176 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 184 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 192 + ~#usb_acecad_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 193 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 201 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 209 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 217 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 225 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 233 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 241 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 249 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 257 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 261 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 262 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 263 + ~#usb_acecad_driver~0.offset, 1);~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 22:07:07,446 INFO L290 TraceCheckUtils]: 1: Hoare triple {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret183#1.base, main_#t~ret183#1.offset, main_#t~nondet184#1, main_#t~switch185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~ret188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~ret191#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~17#1.base, main_~tmp~17#1.offset, main_~tmp___0~6#1, main_~tmp___1~3#1, main_~tmp___2~1#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~17#1.base, main_~tmp~17#1.offset;havoc main_~tmp___0~6#1;havoc main_~tmp___1~3#1;havoc main_~tmp___2~1#1; {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 22:07:07,446 INFO L272 TraceCheckUtils]: 2: Hoare triple {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} call main_#t~ret183#1.base, main_#t~ret183#1.offset := ldv_init_zalloc(24); {12114#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:07,446 INFO L290 TraceCheckUtils]: 3: Hoare triple {12114#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {12083#true} is VALID [2022-02-20 22:07:07,447 INFO L272 TraceCheckUtils]: 4: Hoare triple {12083#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {12122#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:07,447 INFO L290 TraceCheckUtils]: 5: Hoare triple {12122#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {12083#true} is VALID [2022-02-20 22:07:07,447 INFO L290 TraceCheckUtils]: 6: Hoare triple {12083#true} assume true; {12083#true} is VALID [2022-02-20 22:07:07,448 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {12083#true} {12083#true} #538#return; {12083#true} is VALID [2022-02-20 22:07:07,448 INFO L290 TraceCheckUtils]: 8: Hoare triple {12083#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {12083#true} is VALID [2022-02-20 22:07:07,448 INFO L272 TraceCheckUtils]: 9: Hoare triple {12083#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {12083#true} is VALID [2022-02-20 22:07:07,448 INFO L290 TraceCheckUtils]: 10: Hoare triple {12083#true} ~cond := #in~cond; {12083#true} is VALID [2022-02-20 22:07:07,448 INFO L290 TraceCheckUtils]: 11: Hoare triple {12083#true} assume !(0 == ~cond); {12083#true} is VALID [2022-02-20 22:07:07,448 INFO L290 TraceCheckUtils]: 12: Hoare triple {12083#true} assume true; {12083#true} is VALID [2022-02-20 22:07:07,448 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {12083#true} {12083#true} #540#return; {12083#true} is VALID [2022-02-20 22:07:07,449 INFO L290 TraceCheckUtils]: 14: Hoare triple {12083#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {12083#true} is VALID [2022-02-20 22:07:07,449 INFO L290 TraceCheckUtils]: 15: Hoare triple {12083#true} assume true; {12083#true} is VALID [2022-02-20 22:07:07,450 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {12083#true} {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #544#return; {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 22:07:07,450 INFO L290 TraceCheckUtils]: 17: Hoare triple {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} main_~tmp~17#1.base, main_~tmp~17#1.offset := main_#t~ret183#1.base, main_#t~ret183#1.offset;havoc main_#t~ret183#1.base, main_#t~ret183#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~17#1.base, main_~tmp~17#1.offset;assume { :begin_inline_ldv_initialize } true; {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 22:07:07,451 INFO L290 TraceCheckUtils]: 18: Hoare triple {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1; {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 22:07:07,451 INFO L290 TraceCheckUtils]: 19: Hoare triple {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume -2147483648 <= main_#t~nondet184#1 && main_#t~nondet184#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet184#1;havoc main_#t~nondet184#1;main_#t~switch185#1 := 0 == main_~tmp___0~6#1; {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 22:07:07,452 INFO L290 TraceCheckUtils]: 20: Hoare triple {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume !main_#t~switch185#1;main_#t~switch185#1 := main_#t~switch185#1 || 1 == main_~tmp___0~6#1; {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 22:07:07,452 INFO L290 TraceCheckUtils]: 21: Hoare triple {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume main_#t~switch185#1; {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 22:07:07,453 INFO L290 TraceCheckUtils]: 22: Hoare triple {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet189#1 && main_#t~nondet189#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet189#1;havoc main_#t~nondet189#1;main_#t~switch190#1 := 0 == main_~tmp___2~1#1; {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 22:07:07,453 INFO L290 TraceCheckUtils]: 23: Hoare triple {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume !main_#t~switch190#1;main_#t~switch190#1 := main_#t~switch190#1 || 1 == main_~tmp___2~1#1; {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 22:07:07,453 INFO L290 TraceCheckUtils]: 24: Hoare triple {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume main_#t~switch190#1; {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 22:07:07,454 INFO L290 TraceCheckUtils]: 25: Hoare triple {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_usb_acecad_init } true;havoc usb_acecad_init_#res#1;havoc usb_acecad_init_#t~ret180#1, usb_acecad_init_#t~nondet181#1, usb_acecad_init_~result~0#1, usb_acecad_init_~tmp~15#1;havoc usb_acecad_init_~result~0#1;havoc usb_acecad_init_~tmp~15#1;assume { :begin_inline_usb_register } true;usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc usb_register_#res#1;havoc usb_register_#t~ret31#1, usb_register_~driver#1.base, usb_register_~driver#1.offset, usb_register_~tmp~1#1;usb_register_~driver#1.base, usb_register_~driver#1.offset := usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset;havoc usb_register_~tmp~1#1;assume { :begin_inline_ldv_usb_register_driver_2 } true;ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset := usb_register_~driver#1.base, usb_register_~driver#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 4, 0;havoc ldv_usb_register_driver_2_#res#1;havoc ldv_usb_register_driver_2_#t~ret193#1, ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset, ldv_usb_register_driver_2_~ldv_func_res~0#1, ldv_usb_register_driver_2_~tmp~19#1;ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_2_~ldv_func_res~0#1;havoc ldv_usb_register_driver_2_~tmp~19#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet213#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet213#1 && usb_register_driver_#t~nondet213#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet213#1;havoc usb_register_driver_#t~nondet213#1; {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 22:07:07,455 INFO L290 TraceCheckUtils]: 26: Hoare triple {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} ldv_usb_register_driver_2_#t~ret193#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_2_#t~ret193#1 && ldv_usb_register_driver_2_#t~ret193#1 <= 2147483647;ldv_usb_register_driver_2_~tmp~19#1 := ldv_usb_register_driver_2_#t~ret193#1;havoc ldv_usb_register_driver_2_#t~ret193#1;ldv_usb_register_driver_2_~ldv_func_res~0#1 := ldv_usb_register_driver_2_~tmp~19#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset, ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset;havoc ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 22:07:07,455 INFO L272 TraceCheckUtils]: 27: Hoare triple {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} call ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset := ldv_init_zalloc(1248); {12114#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:07,456 INFO L290 TraceCheckUtils]: 28: Hoare triple {12114#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {12083#true} is VALID [2022-02-20 22:07:07,456 INFO L272 TraceCheckUtils]: 29: Hoare triple {12083#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {12122#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:07,457 INFO L290 TraceCheckUtils]: 30: Hoare triple {12122#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {12083#true} is VALID [2022-02-20 22:07:07,457 INFO L290 TraceCheckUtils]: 31: Hoare triple {12083#true} assume true; {12083#true} is VALID [2022-02-20 22:07:07,457 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {12083#true} {12083#true} #538#return; {12083#true} is VALID [2022-02-20 22:07:07,457 INFO L290 TraceCheckUtils]: 33: Hoare triple {12083#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {12083#true} is VALID [2022-02-20 22:07:07,457 INFO L272 TraceCheckUtils]: 34: Hoare triple {12083#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {12083#true} is VALID [2022-02-20 22:07:07,457 INFO L290 TraceCheckUtils]: 35: Hoare triple {12083#true} ~cond := #in~cond; {12083#true} is VALID [2022-02-20 22:07:07,457 INFO L290 TraceCheckUtils]: 36: Hoare triple {12083#true} assume !(0 == ~cond); {12083#true} is VALID [2022-02-20 22:07:07,458 INFO L290 TraceCheckUtils]: 37: Hoare triple {12083#true} assume true; {12083#true} is VALID [2022-02-20 22:07:07,458 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {12083#true} {12083#true} #540#return; {12083#true} is VALID [2022-02-20 22:07:07,458 INFO L290 TraceCheckUtils]: 39: Hoare triple {12083#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {12083#true} is VALID [2022-02-20 22:07:07,458 INFO L290 TraceCheckUtils]: 40: Hoare triple {12083#true} assume true; {12083#true} is VALID [2022-02-20 22:07:07,461 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {12083#true} {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} #600#return; {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 22:07:07,462 INFO L290 TraceCheckUtils]: 42: Hoare triple {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset := ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset;havoc ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 22:07:07,462 INFO L290 TraceCheckUtils]: 43: Hoare triple {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_2_#res#1 := ldv_usb_register_driver_2_~ldv_func_res~0#1; {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 22:07:07,463 INFO L290 TraceCheckUtils]: 44: Hoare triple {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} usb_register_#t~ret31#1 := ldv_usb_register_driver_2_#res#1;assume { :end_inline_ldv_usb_register_driver_2 } true;assume -2147483648 <= usb_register_#t~ret31#1 && usb_register_#t~ret31#1 <= 2147483647;usb_register_~tmp~1#1 := usb_register_#t~ret31#1;havoc usb_register_#t~ret31#1;usb_register_#res#1 := usb_register_~tmp~1#1; {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 22:07:07,463 INFO L290 TraceCheckUtils]: 45: Hoare triple {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} usb_acecad_init_#t~ret180#1 := usb_register_#res#1;assume { :end_inline_usb_register } true;assume -2147483648 <= usb_acecad_init_#t~ret180#1 && usb_acecad_init_#t~ret180#1 <= 2147483647;usb_acecad_init_~tmp~15#1 := usb_acecad_init_#t~ret180#1;havoc usb_acecad_init_#t~ret180#1;usb_acecad_init_~result~0#1 := usb_acecad_init_~tmp~15#1; {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 22:07:07,463 INFO L290 TraceCheckUtils]: 46: Hoare triple {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume !(0 == usb_acecad_init_~result~0#1); {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 22:07:07,464 INFO L290 TraceCheckUtils]: 47: Hoare triple {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} usb_acecad_init_#res#1 := usb_acecad_init_~result~0#1; {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 22:07:07,464 INFO L290 TraceCheckUtils]: 48: Hoare triple {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} main_#t~ret191#1 := usb_acecad_init_#res#1;assume { :end_inline_usb_acecad_init } true;assume -2147483648 <= main_#t~ret191#1 && main_#t~ret191#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret191#1;havoc main_#t~ret191#1; {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 22:07:07,465 INFO L290 TraceCheckUtils]: 49: Hoare triple {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume !(0 == ~ldv_retval_1~0); {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 22:07:07,465 INFO L290 TraceCheckUtils]: 50: Hoare triple {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume 0 != ~ldv_retval_1~0;~ldv_state_variable_0~0 := 2; {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 22:07:07,465 INFO L290 TraceCheckUtils]: 51: Hoare triple {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume { :begin_inline_ldv_check_final_state } true; {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 22:07:07,466 INFO L290 TraceCheckUtils]: 52: Hoare triple {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume !(0 != (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616); {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} is VALID [2022-02-20 22:07:07,466 INFO L290 TraceCheckUtils]: 53: Hoare triple {12085#(and (= ~usb_dev~0.base 0) (= ~usb_dev~0.offset 0))} assume 0 != (~usb_dev~0.base + ~usb_dev~0.offset) % 18446744073709551616; {12084#false} is VALID [2022-02-20 22:07:07,467 INFO L272 TraceCheckUtils]: 54: Hoare triple {12084#false} call ldv_error(); {12084#false} is VALID [2022-02-20 22:07:07,467 INFO L290 TraceCheckUtils]: 55: Hoare triple {12084#false} assume !false; {12084#false} is VALID [2022-02-20 22:07:07,467 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2022-02-20 22:07:07,467 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:07:07,468 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [963869517] [2022-02-20 22:07:07,468 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [963869517] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:07:07,468 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 22:07:07,468 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-02-20 22:07:07,468 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [703191523] [2022-02-20 22:07:07,468 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:07:07,469 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 6.8) internal successors, (34), 3 states have internal predecessors, (34), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 56 [2022-02-20 22:07:07,469 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:07:07,469 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 6.8) internal successors, (34), 3 states have internal predecessors, (34), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 22:07:07,506 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 43 edges. 43 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:07,506 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-02-20 22:07:07,506 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:07:07,507 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-02-20 22:07:07,507 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-02-20 22:07:07,507 INFO L87 Difference]: Start difference. First operand 814 states and 1056 transitions. Second operand has 5 states, 5 states have (on average 6.8) internal successors, (34), 3 states have internal predecessors, (34), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 22:07:08,595 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:08,596 INFO L93 Difference]: Finished difference Result 844 states and 1101 transitions. [2022-02-20 22:07:08,596 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-02-20 22:07:08,596 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 6.8) internal successors, (34), 3 states have internal predecessors, (34), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 56 [2022-02-20 22:07:08,596 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 22:07:08,596 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 6.8) internal successors, (34), 3 states have internal predecessors, (34), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 22:07:08,599 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 303 transitions. [2022-02-20 22:07:08,600 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 6.8) internal successors, (34), 3 states have internal predecessors, (34), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 22:07:08,603 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 303 transitions. [2022-02-20 22:07:08,603 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 303 transitions. [2022-02-20 22:07:08,882 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 303 edges. 303 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:08,935 INFO L225 Difference]: With dead ends: 844 [2022-02-20 22:07:08,935 INFO L226 Difference]: Without dead ends: 841 [2022-02-20 22:07:08,936 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2022-02-20 22:07:08,937 INFO L933 BasicCegarLoop]: 278 mSDtfsCounter, 273 mSDsluCounter, 317 mSDsCounter, 0 mSdLazyCounter, 117 mSolverCounterSat, 63 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 303 SdHoareTripleChecker+Valid, 595 SdHoareTripleChecker+Invalid, 180 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 63 IncrementalHoareTripleChecker+Valid, 117 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-02-20 22:07:08,937 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [303 Valid, 595 Invalid, 180 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [63 Valid, 117 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-02-20 22:07:08,939 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 841 states. [2022-02-20 22:07:08,988 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 841 to 813. [2022-02-20 22:07:08,989 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 22:07:08,991 INFO L82 GeneralOperation]: Start isEquivalent. First operand 841 states. Second operand has 813 states, 625 states have (on average 1.264) internal successors, (790), 636 states have internal predecessors, (790), 133 states have call successors, (133), 55 states have call predecessors, (133), 54 states have return successors, (131), 129 states have call predecessors, (131), 129 states have call successors, (131) [2022-02-20 22:07:08,993 INFO L74 IsIncluded]: Start isIncluded. First operand 841 states. Second operand has 813 states, 625 states have (on average 1.264) internal successors, (790), 636 states have internal predecessors, (790), 133 states have call successors, (133), 55 states have call predecessors, (133), 54 states have return successors, (131), 129 states have call predecessors, (131), 129 states have call successors, (131) [2022-02-20 22:07:08,995 INFO L87 Difference]: Start difference. First operand 841 states. Second operand has 813 states, 625 states have (on average 1.264) internal successors, (790), 636 states have internal predecessors, (790), 133 states have call successors, (133), 55 states have call predecessors, (133), 54 states have return successors, (131), 129 states have call predecessors, (131), 129 states have call successors, (131) [2022-02-20 22:07:09,037 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:09,037 INFO L93 Difference]: Finished difference Result 841 states and 1098 transitions. [2022-02-20 22:07:09,037 INFO L276 IsEmpty]: Start isEmpty. Operand 841 states and 1098 transitions. [2022-02-20 22:07:09,039 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:09,039 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:09,042 INFO L74 IsIncluded]: Start isIncluded. First operand has 813 states, 625 states have (on average 1.264) internal successors, (790), 636 states have internal predecessors, (790), 133 states have call successors, (133), 55 states have call predecessors, (133), 54 states have return successors, (131), 129 states have call predecessors, (131), 129 states have call successors, (131) Second operand 841 states. [2022-02-20 22:07:09,043 INFO L87 Difference]: Start difference. First operand has 813 states, 625 states have (on average 1.264) internal successors, (790), 636 states have internal predecessors, (790), 133 states have call successors, (133), 55 states have call predecessors, (133), 54 states have return successors, (131), 129 states have call predecessors, (131), 129 states have call successors, (131) Second operand 841 states. [2022-02-20 22:07:09,083 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:09,084 INFO L93 Difference]: Finished difference Result 841 states and 1098 transitions. [2022-02-20 22:07:09,084 INFO L276 IsEmpty]: Start isEmpty. Operand 841 states and 1098 transitions. [2022-02-20 22:07:09,086 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:09,086 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:09,086 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 22:07:09,086 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 22:07:09,089 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 813 states, 625 states have (on average 1.264) internal successors, (790), 636 states have internal predecessors, (790), 133 states have call successors, (133), 55 states have call predecessors, (133), 54 states have return successors, (131), 129 states have call predecessors, (131), 129 states have call successors, (131) [2022-02-20 22:07:09,137 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 813 states to 813 states and 1054 transitions. [2022-02-20 22:07:09,138 INFO L78 Accepts]: Start accepts. Automaton has 813 states and 1054 transitions. Word has length 56 [2022-02-20 22:07:09,138 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 22:07:09,138 INFO L470 AbstractCegarLoop]: Abstraction has 813 states and 1054 transitions. [2022-02-20 22:07:09,138 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 6.8) internal successors, (34), 3 states have internal predecessors, (34), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 22:07:09,139 INFO L276 IsEmpty]: Start isEmpty. Operand 813 states and 1054 transitions. [2022-02-20 22:07:09,142 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2022-02-20 22:07:09,142 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:07:09,142 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:07:09,142 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2022-02-20 22:07:09,142 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:07:09,143 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:07:09,143 INFO L85 PathProgramCache]: Analyzing trace with hash -2002259392, now seen corresponding path program 1 times [2022-02-20 22:07:09,143 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:07:09,143 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1925631732] [2022-02-20 22:07:09,143 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:07:09,143 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:07:09,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:09,217 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 22:07:09,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:09,232 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:09,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:09,237 INFO L290 TraceCheckUtils]: 0: Hoare triple {16208#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {16169#true} is VALID [2022-02-20 22:07:09,238 INFO L290 TraceCheckUtils]: 1: Hoare triple {16169#true} assume true; {16169#true} is VALID [2022-02-20 22:07:09,238 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {16169#true} {16169#true} #538#return; {16169#true} is VALID [2022-02-20 22:07:09,238 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:09,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:09,243 INFO L290 TraceCheckUtils]: 0: Hoare triple {16169#true} ~cond := #in~cond; {16169#true} is VALID [2022-02-20 22:07:09,244 INFO L290 TraceCheckUtils]: 1: Hoare triple {16169#true} assume !(0 == ~cond); {16169#true} is VALID [2022-02-20 22:07:09,244 INFO L290 TraceCheckUtils]: 2: Hoare triple {16169#true} assume true; {16169#true} is VALID [2022-02-20 22:07:09,244 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16169#true} {16169#true} #540#return; {16169#true} is VALID [2022-02-20 22:07:09,244 INFO L290 TraceCheckUtils]: 0: Hoare triple {16200#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {16169#true} is VALID [2022-02-20 22:07:09,245 INFO L272 TraceCheckUtils]: 1: Hoare triple {16169#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {16208#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:09,245 INFO L290 TraceCheckUtils]: 2: Hoare triple {16208#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {16169#true} is VALID [2022-02-20 22:07:09,245 INFO L290 TraceCheckUtils]: 3: Hoare triple {16169#true} assume true; {16169#true} is VALID [2022-02-20 22:07:09,245 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {16169#true} {16169#true} #538#return; {16169#true} is VALID [2022-02-20 22:07:09,246 INFO L290 TraceCheckUtils]: 5: Hoare triple {16169#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {16169#true} is VALID [2022-02-20 22:07:09,246 INFO L272 TraceCheckUtils]: 6: Hoare triple {16169#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {16169#true} is VALID [2022-02-20 22:07:09,246 INFO L290 TraceCheckUtils]: 7: Hoare triple {16169#true} ~cond := #in~cond; {16169#true} is VALID [2022-02-20 22:07:09,246 INFO L290 TraceCheckUtils]: 8: Hoare triple {16169#true} assume !(0 == ~cond); {16169#true} is VALID [2022-02-20 22:07:09,246 INFO L290 TraceCheckUtils]: 9: Hoare triple {16169#true} assume true; {16169#true} is VALID [2022-02-20 22:07:09,246 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {16169#true} {16169#true} #540#return; {16169#true} is VALID [2022-02-20 22:07:09,246 INFO L290 TraceCheckUtils]: 11: Hoare triple {16169#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {16169#true} is VALID [2022-02-20 22:07:09,246 INFO L290 TraceCheckUtils]: 12: Hoare triple {16169#true} assume true; {16169#true} is VALID [2022-02-20 22:07:09,247 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {16169#true} {16171#(= ~dev_counter~0 0)} #544#return; {16171#(= ~dev_counter~0 0)} is VALID [2022-02-20 22:07:09,248 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 27 [2022-02-20 22:07:09,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:09,261 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:09,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:09,269 INFO L290 TraceCheckUtils]: 0: Hoare triple {16208#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {16169#true} is VALID [2022-02-20 22:07:09,269 INFO L290 TraceCheckUtils]: 1: Hoare triple {16169#true} assume true; {16169#true} is VALID [2022-02-20 22:07:09,269 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {16169#true} {16169#true} #538#return; {16169#true} is VALID [2022-02-20 22:07:09,270 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:09,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:09,275 INFO L290 TraceCheckUtils]: 0: Hoare triple {16169#true} ~cond := #in~cond; {16169#true} is VALID [2022-02-20 22:07:09,275 INFO L290 TraceCheckUtils]: 1: Hoare triple {16169#true} assume !(0 == ~cond); {16169#true} is VALID [2022-02-20 22:07:09,275 INFO L290 TraceCheckUtils]: 2: Hoare triple {16169#true} assume true; {16169#true} is VALID [2022-02-20 22:07:09,275 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16169#true} {16169#true} #540#return; {16169#true} is VALID [2022-02-20 22:07:09,276 INFO L290 TraceCheckUtils]: 0: Hoare triple {16200#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {16169#true} is VALID [2022-02-20 22:07:09,276 INFO L272 TraceCheckUtils]: 1: Hoare triple {16169#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {16208#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:09,277 INFO L290 TraceCheckUtils]: 2: Hoare triple {16208#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {16169#true} is VALID [2022-02-20 22:07:09,277 INFO L290 TraceCheckUtils]: 3: Hoare triple {16169#true} assume true; {16169#true} is VALID [2022-02-20 22:07:09,277 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {16169#true} {16169#true} #538#return; {16169#true} is VALID [2022-02-20 22:07:09,277 INFO L290 TraceCheckUtils]: 5: Hoare triple {16169#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {16169#true} is VALID [2022-02-20 22:07:09,277 INFO L272 TraceCheckUtils]: 6: Hoare triple {16169#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {16169#true} is VALID [2022-02-20 22:07:09,277 INFO L290 TraceCheckUtils]: 7: Hoare triple {16169#true} ~cond := #in~cond; {16169#true} is VALID [2022-02-20 22:07:09,277 INFO L290 TraceCheckUtils]: 8: Hoare triple {16169#true} assume !(0 == ~cond); {16169#true} is VALID [2022-02-20 22:07:09,278 INFO L290 TraceCheckUtils]: 9: Hoare triple {16169#true} assume true; {16169#true} is VALID [2022-02-20 22:07:09,278 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {16169#true} {16169#true} #540#return; {16169#true} is VALID [2022-02-20 22:07:09,278 INFO L290 TraceCheckUtils]: 11: Hoare triple {16169#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {16169#true} is VALID [2022-02-20 22:07:09,278 INFO L290 TraceCheckUtils]: 12: Hoare triple {16169#true} assume true; {16169#true} is VALID [2022-02-20 22:07:09,279 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {16169#true} {16171#(= ~dev_counter~0 0)} #600#return; {16171#(= ~dev_counter~0 0)} is VALID [2022-02-20 22:07:09,282 INFO L290 TraceCheckUtils]: 0: Hoare triple {16169#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(99, 2);call #Ultimate.allocInit(10, 3);call #Ultimate.allocInit(7, 4);call write~init~int(97, 4, 0, 1);call write~init~int(99, 4, 1, 1);call write~init~int(101, 4, 2, 1);call write~init~int(99, 4, 3, 1);call write~init~int(97, 4, 4, 1);call write~init~int(100, 4, 5, 1);call write~init~int(0, 4, 6, 1);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(20, 6);call #Ultimate.allocInit(57, 7);call #Ultimate.allocInit(2, 8);call write~init~int(32, 8, 0, 1);call write~init~int(0, 8, 1, 1);call #Ultimate.allocInit(8, 9);call #Ultimate.allocInit(34, 10);call #Ultimate.allocInit(32, 11);call #Ultimate.allocInit(11, 12);call #Ultimate.allocInit(48, 13);~LDV_IN_INTERRUPT~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset := 14, 0;call #Ultimate.allocInit(72, 14);call write~init~int(3, ~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 2 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(4, ~#usb_acecad_id_table~0.base, 4 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 6 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 8 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 10 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 11 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 12 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 13 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 14 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 15 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 16 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(3, ~#usb_acecad_id_table~0.base, 24 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 26 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(8, ~#usb_acecad_id_table~0.base, 28 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 30 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 32 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 34 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 35 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 36 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 37 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 38 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 39 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(1, ~#usb_acecad_id_table~0.base, 40 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(0, ~#usb_acecad_id_table~0.base, 48 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 50 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 52 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 54 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 56 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 58 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 59 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 60 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 61 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 62 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 63 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 64 + ~#usb_acecad_id_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.driver_info := 0;~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset := 15, 0;call #Ultimate.allocInit(264, 15);call write~init~$Pointer$(12, 0, ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_probe.base, #funAddr~usb_acecad_probe.offset, ~#usb_acecad_driver~0.base, 8 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_disconnect.base, #funAddr~usb_acecad_disconnect.offset, ~#usb_acecad_driver~0.base, 16 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 24 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 32 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 40 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 48 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 56 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 64 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, ~#usb_acecad_driver~0.base, 72 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 80 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 84 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 88 + ~#usb_acecad_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 92 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 100 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 108 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 116 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 124 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 132 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 136 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 144 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 152 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 160 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 168 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 176 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 184 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 192 + ~#usb_acecad_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 193 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 201 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 209 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 217 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 225 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 233 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 241 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 249 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 257 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 261 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 262 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 263 + ~#usb_acecad_driver~0.offset, 1);~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {16171#(= ~dev_counter~0 0)} is VALID [2022-02-20 22:07:09,283 INFO L290 TraceCheckUtils]: 1: Hoare triple {16171#(= ~dev_counter~0 0)} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret183#1.base, main_#t~ret183#1.offset, main_#t~nondet184#1, main_#t~switch185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~ret188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~ret191#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~17#1.base, main_~tmp~17#1.offset, main_~tmp___0~6#1, main_~tmp___1~3#1, main_~tmp___2~1#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~17#1.base, main_~tmp~17#1.offset;havoc main_~tmp___0~6#1;havoc main_~tmp___1~3#1;havoc main_~tmp___2~1#1; {16171#(= ~dev_counter~0 0)} is VALID [2022-02-20 22:07:09,283 INFO L272 TraceCheckUtils]: 2: Hoare triple {16171#(= ~dev_counter~0 0)} call main_#t~ret183#1.base, main_#t~ret183#1.offset := ldv_init_zalloc(24); {16200#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:09,284 INFO L290 TraceCheckUtils]: 3: Hoare triple {16200#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {16169#true} is VALID [2022-02-20 22:07:09,284 INFO L272 TraceCheckUtils]: 4: Hoare triple {16169#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {16208#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:09,285 INFO L290 TraceCheckUtils]: 5: Hoare triple {16208#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {16169#true} is VALID [2022-02-20 22:07:09,285 INFO L290 TraceCheckUtils]: 6: Hoare triple {16169#true} assume true; {16169#true} is VALID [2022-02-20 22:07:09,285 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {16169#true} {16169#true} #538#return; {16169#true} is VALID [2022-02-20 22:07:09,285 INFO L290 TraceCheckUtils]: 8: Hoare triple {16169#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {16169#true} is VALID [2022-02-20 22:07:09,285 INFO L272 TraceCheckUtils]: 9: Hoare triple {16169#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {16169#true} is VALID [2022-02-20 22:07:09,285 INFO L290 TraceCheckUtils]: 10: Hoare triple {16169#true} ~cond := #in~cond; {16169#true} is VALID [2022-02-20 22:07:09,285 INFO L290 TraceCheckUtils]: 11: Hoare triple {16169#true} assume !(0 == ~cond); {16169#true} is VALID [2022-02-20 22:07:09,286 INFO L290 TraceCheckUtils]: 12: Hoare triple {16169#true} assume true; {16169#true} is VALID [2022-02-20 22:07:09,286 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {16169#true} {16169#true} #540#return; {16169#true} is VALID [2022-02-20 22:07:09,286 INFO L290 TraceCheckUtils]: 14: Hoare triple {16169#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {16169#true} is VALID [2022-02-20 22:07:09,286 INFO L290 TraceCheckUtils]: 15: Hoare triple {16169#true} assume true; {16169#true} is VALID [2022-02-20 22:07:09,286 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {16169#true} {16171#(= ~dev_counter~0 0)} #544#return; {16171#(= ~dev_counter~0 0)} is VALID [2022-02-20 22:07:09,287 INFO L290 TraceCheckUtils]: 17: Hoare triple {16171#(= ~dev_counter~0 0)} main_~tmp~17#1.base, main_~tmp~17#1.offset := main_#t~ret183#1.base, main_#t~ret183#1.offset;havoc main_#t~ret183#1.base, main_#t~ret183#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~17#1.base, main_~tmp~17#1.offset;assume { :begin_inline_ldv_initialize } true; {16171#(= ~dev_counter~0 0)} is VALID [2022-02-20 22:07:09,287 INFO L290 TraceCheckUtils]: 18: Hoare triple {16171#(= ~dev_counter~0 0)} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1; {16171#(= ~dev_counter~0 0)} is VALID [2022-02-20 22:07:09,288 INFO L290 TraceCheckUtils]: 19: Hoare triple {16171#(= ~dev_counter~0 0)} assume -2147483648 <= main_#t~nondet184#1 && main_#t~nondet184#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet184#1;havoc main_#t~nondet184#1;main_#t~switch185#1 := 0 == main_~tmp___0~6#1; {16171#(= ~dev_counter~0 0)} is VALID [2022-02-20 22:07:09,288 INFO L290 TraceCheckUtils]: 20: Hoare triple {16171#(= ~dev_counter~0 0)} assume !main_#t~switch185#1;main_#t~switch185#1 := main_#t~switch185#1 || 1 == main_~tmp___0~6#1; {16171#(= ~dev_counter~0 0)} is VALID [2022-02-20 22:07:09,288 INFO L290 TraceCheckUtils]: 21: Hoare triple {16171#(= ~dev_counter~0 0)} assume main_#t~switch185#1; {16171#(= ~dev_counter~0 0)} is VALID [2022-02-20 22:07:09,289 INFO L290 TraceCheckUtils]: 22: Hoare triple {16171#(= ~dev_counter~0 0)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet189#1 && main_#t~nondet189#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet189#1;havoc main_#t~nondet189#1;main_#t~switch190#1 := 0 == main_~tmp___2~1#1; {16171#(= ~dev_counter~0 0)} is VALID [2022-02-20 22:07:09,289 INFO L290 TraceCheckUtils]: 23: Hoare triple {16171#(= ~dev_counter~0 0)} assume !main_#t~switch190#1;main_#t~switch190#1 := main_#t~switch190#1 || 1 == main_~tmp___2~1#1; {16171#(= ~dev_counter~0 0)} is VALID [2022-02-20 22:07:09,289 INFO L290 TraceCheckUtils]: 24: Hoare triple {16171#(= ~dev_counter~0 0)} assume main_#t~switch190#1; {16171#(= ~dev_counter~0 0)} is VALID [2022-02-20 22:07:09,290 INFO L290 TraceCheckUtils]: 25: Hoare triple {16171#(= ~dev_counter~0 0)} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_usb_acecad_init } true;havoc usb_acecad_init_#res#1;havoc usb_acecad_init_#t~ret180#1, usb_acecad_init_#t~nondet181#1, usb_acecad_init_~result~0#1, usb_acecad_init_~tmp~15#1;havoc usb_acecad_init_~result~0#1;havoc usb_acecad_init_~tmp~15#1;assume { :begin_inline_usb_register } true;usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc usb_register_#res#1;havoc usb_register_#t~ret31#1, usb_register_~driver#1.base, usb_register_~driver#1.offset, usb_register_~tmp~1#1;usb_register_~driver#1.base, usb_register_~driver#1.offset := usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset;havoc usb_register_~tmp~1#1;assume { :begin_inline_ldv_usb_register_driver_2 } true;ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset := usb_register_~driver#1.base, usb_register_~driver#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 4, 0;havoc ldv_usb_register_driver_2_#res#1;havoc ldv_usb_register_driver_2_#t~ret193#1, ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset, ldv_usb_register_driver_2_~ldv_func_res~0#1, ldv_usb_register_driver_2_~tmp~19#1;ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_2_~ldv_func_res~0#1;havoc ldv_usb_register_driver_2_~tmp~19#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet213#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet213#1 && usb_register_driver_#t~nondet213#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet213#1;havoc usb_register_driver_#t~nondet213#1; {16171#(= ~dev_counter~0 0)} is VALID [2022-02-20 22:07:09,290 INFO L290 TraceCheckUtils]: 26: Hoare triple {16171#(= ~dev_counter~0 0)} ldv_usb_register_driver_2_#t~ret193#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_2_#t~ret193#1 && ldv_usb_register_driver_2_#t~ret193#1 <= 2147483647;ldv_usb_register_driver_2_~tmp~19#1 := ldv_usb_register_driver_2_#t~ret193#1;havoc ldv_usb_register_driver_2_#t~ret193#1;ldv_usb_register_driver_2_~ldv_func_res~0#1 := ldv_usb_register_driver_2_~tmp~19#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset, ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset;havoc ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {16171#(= ~dev_counter~0 0)} is VALID [2022-02-20 22:07:09,291 INFO L272 TraceCheckUtils]: 27: Hoare triple {16171#(= ~dev_counter~0 0)} call ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset := ldv_init_zalloc(1248); {16200#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:09,291 INFO L290 TraceCheckUtils]: 28: Hoare triple {16200#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {16169#true} is VALID [2022-02-20 22:07:09,292 INFO L272 TraceCheckUtils]: 29: Hoare triple {16169#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {16208#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:09,292 INFO L290 TraceCheckUtils]: 30: Hoare triple {16208#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {16169#true} is VALID [2022-02-20 22:07:09,292 INFO L290 TraceCheckUtils]: 31: Hoare triple {16169#true} assume true; {16169#true} is VALID [2022-02-20 22:07:09,292 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {16169#true} {16169#true} #538#return; {16169#true} is VALID [2022-02-20 22:07:09,292 INFO L290 TraceCheckUtils]: 33: Hoare triple {16169#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {16169#true} is VALID [2022-02-20 22:07:09,292 INFO L272 TraceCheckUtils]: 34: Hoare triple {16169#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {16169#true} is VALID [2022-02-20 22:07:09,292 INFO L290 TraceCheckUtils]: 35: Hoare triple {16169#true} ~cond := #in~cond; {16169#true} is VALID [2022-02-20 22:07:09,293 INFO L290 TraceCheckUtils]: 36: Hoare triple {16169#true} assume !(0 == ~cond); {16169#true} is VALID [2022-02-20 22:07:09,293 INFO L290 TraceCheckUtils]: 37: Hoare triple {16169#true} assume true; {16169#true} is VALID [2022-02-20 22:07:09,293 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {16169#true} {16169#true} #540#return; {16169#true} is VALID [2022-02-20 22:07:09,293 INFO L290 TraceCheckUtils]: 39: Hoare triple {16169#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {16169#true} is VALID [2022-02-20 22:07:09,293 INFO L290 TraceCheckUtils]: 40: Hoare triple {16169#true} assume true; {16169#true} is VALID [2022-02-20 22:07:09,294 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {16169#true} {16171#(= ~dev_counter~0 0)} #600#return; {16171#(= ~dev_counter~0 0)} is VALID [2022-02-20 22:07:09,294 INFO L290 TraceCheckUtils]: 42: Hoare triple {16171#(= ~dev_counter~0 0)} ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset := ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset;havoc ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {16171#(= ~dev_counter~0 0)} is VALID [2022-02-20 22:07:09,294 INFO L290 TraceCheckUtils]: 43: Hoare triple {16171#(= ~dev_counter~0 0)} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_2_#res#1 := ldv_usb_register_driver_2_~ldv_func_res~0#1; {16171#(= ~dev_counter~0 0)} is VALID [2022-02-20 22:07:09,295 INFO L290 TraceCheckUtils]: 44: Hoare triple {16171#(= ~dev_counter~0 0)} usb_register_#t~ret31#1 := ldv_usb_register_driver_2_#res#1;assume { :end_inline_ldv_usb_register_driver_2 } true;assume -2147483648 <= usb_register_#t~ret31#1 && usb_register_#t~ret31#1 <= 2147483647;usb_register_~tmp~1#1 := usb_register_#t~ret31#1;havoc usb_register_#t~ret31#1;usb_register_#res#1 := usb_register_~tmp~1#1; {16171#(= ~dev_counter~0 0)} is VALID [2022-02-20 22:07:09,295 INFO L290 TraceCheckUtils]: 45: Hoare triple {16171#(= ~dev_counter~0 0)} usb_acecad_init_#t~ret180#1 := usb_register_#res#1;assume { :end_inline_usb_register } true;assume -2147483648 <= usb_acecad_init_#t~ret180#1 && usb_acecad_init_#t~ret180#1 <= 2147483647;usb_acecad_init_~tmp~15#1 := usb_acecad_init_#t~ret180#1;havoc usb_acecad_init_#t~ret180#1;usb_acecad_init_~result~0#1 := usb_acecad_init_~tmp~15#1; {16171#(= ~dev_counter~0 0)} is VALID [2022-02-20 22:07:09,295 INFO L290 TraceCheckUtils]: 46: Hoare triple {16171#(= ~dev_counter~0 0)} assume !(0 == usb_acecad_init_~result~0#1); {16171#(= ~dev_counter~0 0)} is VALID [2022-02-20 22:07:09,296 INFO L290 TraceCheckUtils]: 47: Hoare triple {16171#(= ~dev_counter~0 0)} usb_acecad_init_#res#1 := usb_acecad_init_~result~0#1; {16171#(= ~dev_counter~0 0)} is VALID [2022-02-20 22:07:09,296 INFO L290 TraceCheckUtils]: 48: Hoare triple {16171#(= ~dev_counter~0 0)} main_#t~ret191#1 := usb_acecad_init_#res#1;assume { :end_inline_usb_acecad_init } true;assume -2147483648 <= main_#t~ret191#1 && main_#t~ret191#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret191#1;havoc main_#t~ret191#1; {16171#(= ~dev_counter~0 0)} is VALID [2022-02-20 22:07:09,296 INFO L290 TraceCheckUtils]: 49: Hoare triple {16171#(= ~dev_counter~0 0)} assume !(0 == ~ldv_retval_1~0); {16171#(= ~dev_counter~0 0)} is VALID [2022-02-20 22:07:09,297 INFO L290 TraceCheckUtils]: 50: Hoare triple {16171#(= ~dev_counter~0 0)} assume 0 != ~ldv_retval_1~0;~ldv_state_variable_0~0 := 2; {16171#(= ~dev_counter~0 0)} is VALID [2022-02-20 22:07:09,297 INFO L290 TraceCheckUtils]: 51: Hoare triple {16171#(= ~dev_counter~0 0)} assume { :begin_inline_ldv_check_final_state } true; {16171#(= ~dev_counter~0 0)} is VALID [2022-02-20 22:07:09,297 INFO L290 TraceCheckUtils]: 52: Hoare triple {16171#(= ~dev_counter~0 0)} assume !(0 != (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616); {16171#(= ~dev_counter~0 0)} is VALID [2022-02-20 22:07:09,298 INFO L290 TraceCheckUtils]: 53: Hoare triple {16171#(= ~dev_counter~0 0)} assume !(0 != (~usb_dev~0.base + ~usb_dev~0.offset) % 18446744073709551616); {16171#(= ~dev_counter~0 0)} is VALID [2022-02-20 22:07:09,298 INFO L290 TraceCheckUtils]: 54: Hoare triple {16171#(= ~dev_counter~0 0)} assume 0 != ~dev_counter~0; {16170#false} is VALID [2022-02-20 22:07:09,298 INFO L272 TraceCheckUtils]: 55: Hoare triple {16170#false} call ldv_error(); {16170#false} is VALID [2022-02-20 22:07:09,298 INFO L290 TraceCheckUtils]: 56: Hoare triple {16170#false} assume !false; {16170#false} is VALID [2022-02-20 22:07:09,299 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2022-02-20 22:07:09,301 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:07:09,302 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1925631732] [2022-02-20 22:07:09,302 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1925631732] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:07:09,302 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 22:07:09,302 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-02-20 22:07:09,302 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1071980718] [2022-02-20 22:07:09,302 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:07:09,304 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 7.0) internal successors, (35), 3 states have internal predecessors, (35), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 57 [2022-02-20 22:07:09,304 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:07:09,304 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 7.0) internal successors, (35), 3 states have internal predecessors, (35), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 22:07:09,338 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 44 edges. 44 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:09,338 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-02-20 22:07:09,338 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:07:09,339 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-02-20 22:07:09,339 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-02-20 22:07:09,339 INFO L87 Difference]: Start difference. First operand 813 states and 1054 transitions. Second operand has 5 states, 5 states have (on average 7.0) internal successors, (35), 3 states have internal predecessors, (35), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 22:07:10,397 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:10,397 INFO L93 Difference]: Finished difference Result 843 states and 1099 transitions. [2022-02-20 22:07:10,398 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-02-20 22:07:10,398 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 7.0) internal successors, (35), 3 states have internal predecessors, (35), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 57 [2022-02-20 22:07:10,398 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 22:07:10,398 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 7.0) internal successors, (35), 3 states have internal predecessors, (35), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 22:07:10,402 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 301 transitions. [2022-02-20 22:07:10,402 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 7.0) internal successors, (35), 3 states have internal predecessors, (35), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 22:07:10,406 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 301 transitions. [2022-02-20 22:07:10,406 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 301 transitions. [2022-02-20 22:07:10,693 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 301 edges. 301 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:10,743 INFO L225 Difference]: With dead ends: 843 [2022-02-20 22:07:10,743 INFO L226 Difference]: Without dead ends: 840 [2022-02-20 22:07:10,744 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2022-02-20 22:07:10,745 INFO L933 BasicCegarLoop]: 276 mSDtfsCounter, 270 mSDsluCounter, 315 mSDsCounter, 0 mSdLazyCounter, 117 mSolverCounterSat, 62 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 300 SdHoareTripleChecker+Valid, 591 SdHoareTripleChecker+Invalid, 179 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 62 IncrementalHoareTripleChecker+Valid, 117 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-02-20 22:07:10,745 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [300 Valid, 591 Invalid, 179 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [62 Valid, 117 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-02-20 22:07:10,747 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 840 states. [2022-02-20 22:07:10,773 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 840 to 812. [2022-02-20 22:07:10,773 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 22:07:10,776 INFO L82 GeneralOperation]: Start isEquivalent. First operand 840 states. Second operand has 812 states, 625 states have (on average 1.2624) internal successors, (789), 635 states have internal predecessors, (789), 132 states have call successors, (132), 55 states have call predecessors, (132), 54 states have return successors, (131), 129 states have call predecessors, (131), 129 states have call successors, (131) [2022-02-20 22:07:10,778 INFO L74 IsIncluded]: Start isIncluded. First operand 840 states. Second operand has 812 states, 625 states have (on average 1.2624) internal successors, (789), 635 states have internal predecessors, (789), 132 states have call successors, (132), 55 states have call predecessors, (132), 54 states have return successors, (131), 129 states have call predecessors, (131), 129 states have call successors, (131) [2022-02-20 22:07:10,780 INFO L87 Difference]: Start difference. First operand 840 states. Second operand has 812 states, 625 states have (on average 1.2624) internal successors, (789), 635 states have internal predecessors, (789), 132 states have call successors, (132), 55 states have call predecessors, (132), 54 states have return successors, (131), 129 states have call predecessors, (131), 129 states have call successors, (131) [2022-02-20 22:07:10,821 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:10,821 INFO L93 Difference]: Finished difference Result 840 states and 1096 transitions. [2022-02-20 22:07:10,821 INFO L276 IsEmpty]: Start isEmpty. Operand 840 states and 1096 transitions. [2022-02-20 22:07:10,824 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:10,824 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:10,840 INFO L74 IsIncluded]: Start isIncluded. First operand has 812 states, 625 states have (on average 1.2624) internal successors, (789), 635 states have internal predecessors, (789), 132 states have call successors, (132), 55 states have call predecessors, (132), 54 states have return successors, (131), 129 states have call predecessors, (131), 129 states have call successors, (131) Second operand 840 states. [2022-02-20 22:07:10,844 INFO L87 Difference]: Start difference. First operand has 812 states, 625 states have (on average 1.2624) internal successors, (789), 635 states have internal predecessors, (789), 132 states have call successors, (132), 55 states have call predecessors, (132), 54 states have return successors, (131), 129 states have call predecessors, (131), 129 states have call successors, (131) Second operand 840 states. [2022-02-20 22:07:10,883 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:10,884 INFO L93 Difference]: Finished difference Result 840 states and 1096 transitions. [2022-02-20 22:07:10,884 INFO L276 IsEmpty]: Start isEmpty. Operand 840 states and 1096 transitions. [2022-02-20 22:07:10,886 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:10,886 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:10,886 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 22:07:10,886 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 22:07:10,888 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 812 states, 625 states have (on average 1.2624) internal successors, (789), 635 states have internal predecessors, (789), 132 states have call successors, (132), 55 states have call predecessors, (132), 54 states have return successors, (131), 129 states have call predecessors, (131), 129 states have call successors, (131) [2022-02-20 22:07:10,937 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 812 states to 812 states and 1052 transitions. [2022-02-20 22:07:10,938 INFO L78 Accepts]: Start accepts. Automaton has 812 states and 1052 transitions. Word has length 57 [2022-02-20 22:07:10,938 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 22:07:10,939 INFO L470 AbstractCegarLoop]: Abstraction has 812 states and 1052 transitions. [2022-02-20 22:07:10,939 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 7.0) internal successors, (35), 3 states have internal predecessors, (35), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 22:07:10,940 INFO L276 IsEmpty]: Start isEmpty. Operand 812 states and 1052 transitions. [2022-02-20 22:07:10,940 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2022-02-20 22:07:10,940 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:07:10,941 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:07:10,941 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2022-02-20 22:07:10,941 INFO L402 AbstractCegarLoop]: === Iteration 7 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:07:10,942 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:07:10,942 INFO L85 PathProgramCache]: Analyzing trace with hash -1940484211, now seen corresponding path program 1 times [2022-02-20 22:07:10,942 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:07:10,942 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1983188371] [2022-02-20 22:07:10,942 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:07:10,943 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:07:10,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:11,040 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 22:07:11,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:11,056 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:11,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:11,062 INFO L290 TraceCheckUtils]: 0: Hoare triple {20288#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {20249#true} is VALID [2022-02-20 22:07:11,062 INFO L290 TraceCheckUtils]: 1: Hoare triple {20249#true} assume true; {20249#true} is VALID [2022-02-20 22:07:11,062 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {20249#true} {20249#true} #538#return; {20249#true} is VALID [2022-02-20 22:07:11,062 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:11,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:11,067 INFO L290 TraceCheckUtils]: 0: Hoare triple {20249#true} ~cond := #in~cond; {20249#true} is VALID [2022-02-20 22:07:11,067 INFO L290 TraceCheckUtils]: 1: Hoare triple {20249#true} assume !(0 == ~cond); {20249#true} is VALID [2022-02-20 22:07:11,067 INFO L290 TraceCheckUtils]: 2: Hoare triple {20249#true} assume true; {20249#true} is VALID [2022-02-20 22:07:11,067 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20249#true} {20249#true} #540#return; {20249#true} is VALID [2022-02-20 22:07:11,067 INFO L290 TraceCheckUtils]: 0: Hoare triple {20280#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {20249#true} is VALID [2022-02-20 22:07:11,068 INFO L272 TraceCheckUtils]: 1: Hoare triple {20249#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {20288#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:11,069 INFO L290 TraceCheckUtils]: 2: Hoare triple {20288#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {20249#true} is VALID [2022-02-20 22:07:11,069 INFO L290 TraceCheckUtils]: 3: Hoare triple {20249#true} assume true; {20249#true} is VALID [2022-02-20 22:07:11,069 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {20249#true} {20249#true} #538#return; {20249#true} is VALID [2022-02-20 22:07:11,069 INFO L290 TraceCheckUtils]: 5: Hoare triple {20249#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {20249#true} is VALID [2022-02-20 22:07:11,069 INFO L272 TraceCheckUtils]: 6: Hoare triple {20249#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {20249#true} is VALID [2022-02-20 22:07:11,069 INFO L290 TraceCheckUtils]: 7: Hoare triple {20249#true} ~cond := #in~cond; {20249#true} is VALID [2022-02-20 22:07:11,070 INFO L290 TraceCheckUtils]: 8: Hoare triple {20249#true} assume !(0 == ~cond); {20249#true} is VALID [2022-02-20 22:07:11,070 INFO L290 TraceCheckUtils]: 9: Hoare triple {20249#true} assume true; {20249#true} is VALID [2022-02-20 22:07:11,070 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {20249#true} {20249#true} #540#return; {20249#true} is VALID [2022-02-20 22:07:11,070 INFO L290 TraceCheckUtils]: 11: Hoare triple {20249#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {20249#true} is VALID [2022-02-20 22:07:11,070 INFO L290 TraceCheckUtils]: 12: Hoare triple {20249#true} assume true; {20249#true} is VALID [2022-02-20 22:07:11,071 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {20249#true} {20251#(= ~INTERF_STATE~0 0)} #544#return; {20251#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:11,071 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 27 [2022-02-20 22:07:11,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:11,082 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:11,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:11,090 INFO L290 TraceCheckUtils]: 0: Hoare triple {20288#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {20249#true} is VALID [2022-02-20 22:07:11,090 INFO L290 TraceCheckUtils]: 1: Hoare triple {20249#true} assume true; {20249#true} is VALID [2022-02-20 22:07:11,090 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {20249#true} {20249#true} #538#return; {20249#true} is VALID [2022-02-20 22:07:11,091 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:11,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:11,101 INFO L290 TraceCheckUtils]: 0: Hoare triple {20249#true} ~cond := #in~cond; {20249#true} is VALID [2022-02-20 22:07:11,101 INFO L290 TraceCheckUtils]: 1: Hoare triple {20249#true} assume !(0 == ~cond); {20249#true} is VALID [2022-02-20 22:07:11,101 INFO L290 TraceCheckUtils]: 2: Hoare triple {20249#true} assume true; {20249#true} is VALID [2022-02-20 22:07:11,101 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20249#true} {20249#true} #540#return; {20249#true} is VALID [2022-02-20 22:07:11,102 INFO L290 TraceCheckUtils]: 0: Hoare triple {20280#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {20249#true} is VALID [2022-02-20 22:07:11,103 INFO L272 TraceCheckUtils]: 1: Hoare triple {20249#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {20288#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:11,103 INFO L290 TraceCheckUtils]: 2: Hoare triple {20288#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {20249#true} is VALID [2022-02-20 22:07:11,103 INFO L290 TraceCheckUtils]: 3: Hoare triple {20249#true} assume true; {20249#true} is VALID [2022-02-20 22:07:11,103 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {20249#true} {20249#true} #538#return; {20249#true} is VALID [2022-02-20 22:07:11,103 INFO L290 TraceCheckUtils]: 5: Hoare triple {20249#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {20249#true} is VALID [2022-02-20 22:07:11,104 INFO L272 TraceCheckUtils]: 6: Hoare triple {20249#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {20249#true} is VALID [2022-02-20 22:07:11,104 INFO L290 TraceCheckUtils]: 7: Hoare triple {20249#true} ~cond := #in~cond; {20249#true} is VALID [2022-02-20 22:07:11,104 INFO L290 TraceCheckUtils]: 8: Hoare triple {20249#true} assume !(0 == ~cond); {20249#true} is VALID [2022-02-20 22:07:11,104 INFO L290 TraceCheckUtils]: 9: Hoare triple {20249#true} assume true; {20249#true} is VALID [2022-02-20 22:07:11,104 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {20249#true} {20249#true} #540#return; {20249#true} is VALID [2022-02-20 22:07:11,104 INFO L290 TraceCheckUtils]: 11: Hoare triple {20249#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {20249#true} is VALID [2022-02-20 22:07:11,104 INFO L290 TraceCheckUtils]: 12: Hoare triple {20249#true} assume true; {20249#true} is VALID [2022-02-20 22:07:11,105 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {20249#true} {20251#(= ~INTERF_STATE~0 0)} #600#return; {20251#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:11,106 INFO L290 TraceCheckUtils]: 0: Hoare triple {20249#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(99, 2);call #Ultimate.allocInit(10, 3);call #Ultimate.allocInit(7, 4);call write~init~int(97, 4, 0, 1);call write~init~int(99, 4, 1, 1);call write~init~int(101, 4, 2, 1);call write~init~int(99, 4, 3, 1);call write~init~int(97, 4, 4, 1);call write~init~int(100, 4, 5, 1);call write~init~int(0, 4, 6, 1);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(20, 6);call #Ultimate.allocInit(57, 7);call #Ultimate.allocInit(2, 8);call write~init~int(32, 8, 0, 1);call write~init~int(0, 8, 1, 1);call #Ultimate.allocInit(8, 9);call #Ultimate.allocInit(34, 10);call #Ultimate.allocInit(32, 11);call #Ultimate.allocInit(11, 12);call #Ultimate.allocInit(48, 13);~LDV_IN_INTERRUPT~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset := 14, 0;call #Ultimate.allocInit(72, 14);call write~init~int(3, ~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 2 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(4, ~#usb_acecad_id_table~0.base, 4 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 6 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 8 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 10 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 11 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 12 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 13 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 14 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 15 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 16 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(3, ~#usb_acecad_id_table~0.base, 24 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 26 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(8, ~#usb_acecad_id_table~0.base, 28 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 30 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 32 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 34 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 35 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 36 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 37 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 38 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 39 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(1, ~#usb_acecad_id_table~0.base, 40 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(0, ~#usb_acecad_id_table~0.base, 48 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 50 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 52 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 54 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 56 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 58 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 59 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 60 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 61 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 62 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 63 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 64 + ~#usb_acecad_id_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.driver_info := 0;~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset := 15, 0;call #Ultimate.allocInit(264, 15);call write~init~$Pointer$(12, 0, ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_probe.base, #funAddr~usb_acecad_probe.offset, ~#usb_acecad_driver~0.base, 8 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_disconnect.base, #funAddr~usb_acecad_disconnect.offset, ~#usb_acecad_driver~0.base, 16 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 24 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 32 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 40 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 48 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 56 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 64 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, ~#usb_acecad_driver~0.base, 72 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 80 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 84 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 88 + ~#usb_acecad_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 92 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 100 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 108 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 116 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 124 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 132 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 136 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 144 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 152 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 160 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 168 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 176 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 184 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 192 + ~#usb_acecad_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 193 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 201 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 209 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 217 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 225 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 233 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 241 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 249 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 257 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 261 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 262 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 263 + ~#usb_acecad_driver~0.offset, 1);~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {20251#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:11,106 INFO L290 TraceCheckUtils]: 1: Hoare triple {20251#(= ~INTERF_STATE~0 0)} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret183#1.base, main_#t~ret183#1.offset, main_#t~nondet184#1, main_#t~switch185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~ret188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~ret191#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~17#1.base, main_~tmp~17#1.offset, main_~tmp___0~6#1, main_~tmp___1~3#1, main_~tmp___2~1#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~17#1.base, main_~tmp~17#1.offset;havoc main_~tmp___0~6#1;havoc main_~tmp___1~3#1;havoc main_~tmp___2~1#1; {20251#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:11,107 INFO L272 TraceCheckUtils]: 2: Hoare triple {20251#(= ~INTERF_STATE~0 0)} call main_#t~ret183#1.base, main_#t~ret183#1.offset := ldv_init_zalloc(24); {20280#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:11,107 INFO L290 TraceCheckUtils]: 3: Hoare triple {20280#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {20249#true} is VALID [2022-02-20 22:07:11,108 INFO L272 TraceCheckUtils]: 4: Hoare triple {20249#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {20288#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:11,108 INFO L290 TraceCheckUtils]: 5: Hoare triple {20288#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {20249#true} is VALID [2022-02-20 22:07:11,108 INFO L290 TraceCheckUtils]: 6: Hoare triple {20249#true} assume true; {20249#true} is VALID [2022-02-20 22:07:11,108 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {20249#true} {20249#true} #538#return; {20249#true} is VALID [2022-02-20 22:07:11,108 INFO L290 TraceCheckUtils]: 8: Hoare triple {20249#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {20249#true} is VALID [2022-02-20 22:07:11,108 INFO L272 TraceCheckUtils]: 9: Hoare triple {20249#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {20249#true} is VALID [2022-02-20 22:07:11,109 INFO L290 TraceCheckUtils]: 10: Hoare triple {20249#true} ~cond := #in~cond; {20249#true} is VALID [2022-02-20 22:07:11,109 INFO L290 TraceCheckUtils]: 11: Hoare triple {20249#true} assume !(0 == ~cond); {20249#true} is VALID [2022-02-20 22:07:11,109 INFO L290 TraceCheckUtils]: 12: Hoare triple {20249#true} assume true; {20249#true} is VALID [2022-02-20 22:07:11,109 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {20249#true} {20249#true} #540#return; {20249#true} is VALID [2022-02-20 22:07:11,109 INFO L290 TraceCheckUtils]: 14: Hoare triple {20249#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {20249#true} is VALID [2022-02-20 22:07:11,109 INFO L290 TraceCheckUtils]: 15: Hoare triple {20249#true} assume true; {20249#true} is VALID [2022-02-20 22:07:11,110 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {20249#true} {20251#(= ~INTERF_STATE~0 0)} #544#return; {20251#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:11,110 INFO L290 TraceCheckUtils]: 17: Hoare triple {20251#(= ~INTERF_STATE~0 0)} main_~tmp~17#1.base, main_~tmp~17#1.offset := main_#t~ret183#1.base, main_#t~ret183#1.offset;havoc main_#t~ret183#1.base, main_#t~ret183#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~17#1.base, main_~tmp~17#1.offset;assume { :begin_inline_ldv_initialize } true; {20251#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:11,111 INFO L290 TraceCheckUtils]: 18: Hoare triple {20251#(= ~INTERF_STATE~0 0)} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1; {20251#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:11,111 INFO L290 TraceCheckUtils]: 19: Hoare triple {20251#(= ~INTERF_STATE~0 0)} assume -2147483648 <= main_#t~nondet184#1 && main_#t~nondet184#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet184#1;havoc main_#t~nondet184#1;main_#t~switch185#1 := 0 == main_~tmp___0~6#1; {20251#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:11,112 INFO L290 TraceCheckUtils]: 20: Hoare triple {20251#(= ~INTERF_STATE~0 0)} assume !main_#t~switch185#1;main_#t~switch185#1 := main_#t~switch185#1 || 1 == main_~tmp___0~6#1; {20251#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:11,112 INFO L290 TraceCheckUtils]: 21: Hoare triple {20251#(= ~INTERF_STATE~0 0)} assume main_#t~switch185#1; {20251#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:11,112 INFO L290 TraceCheckUtils]: 22: Hoare triple {20251#(= ~INTERF_STATE~0 0)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet189#1 && main_#t~nondet189#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet189#1;havoc main_#t~nondet189#1;main_#t~switch190#1 := 0 == main_~tmp___2~1#1; {20251#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:11,113 INFO L290 TraceCheckUtils]: 23: Hoare triple {20251#(= ~INTERF_STATE~0 0)} assume !main_#t~switch190#1;main_#t~switch190#1 := main_#t~switch190#1 || 1 == main_~tmp___2~1#1; {20251#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:11,113 INFO L290 TraceCheckUtils]: 24: Hoare triple {20251#(= ~INTERF_STATE~0 0)} assume main_#t~switch190#1; {20251#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:11,114 INFO L290 TraceCheckUtils]: 25: Hoare triple {20251#(= ~INTERF_STATE~0 0)} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_usb_acecad_init } true;havoc usb_acecad_init_#res#1;havoc usb_acecad_init_#t~ret180#1, usb_acecad_init_#t~nondet181#1, usb_acecad_init_~result~0#1, usb_acecad_init_~tmp~15#1;havoc usb_acecad_init_~result~0#1;havoc usb_acecad_init_~tmp~15#1;assume { :begin_inline_usb_register } true;usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc usb_register_#res#1;havoc usb_register_#t~ret31#1, usb_register_~driver#1.base, usb_register_~driver#1.offset, usb_register_~tmp~1#1;usb_register_~driver#1.base, usb_register_~driver#1.offset := usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset;havoc usb_register_~tmp~1#1;assume { :begin_inline_ldv_usb_register_driver_2 } true;ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset := usb_register_~driver#1.base, usb_register_~driver#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 4, 0;havoc ldv_usb_register_driver_2_#res#1;havoc ldv_usb_register_driver_2_#t~ret193#1, ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset, ldv_usb_register_driver_2_~ldv_func_res~0#1, ldv_usb_register_driver_2_~tmp~19#1;ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_2_~ldv_func_res~0#1;havoc ldv_usb_register_driver_2_~tmp~19#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet213#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet213#1 && usb_register_driver_#t~nondet213#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet213#1;havoc usb_register_driver_#t~nondet213#1; {20251#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:11,114 INFO L290 TraceCheckUtils]: 26: Hoare triple {20251#(= ~INTERF_STATE~0 0)} ldv_usb_register_driver_2_#t~ret193#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_2_#t~ret193#1 && ldv_usb_register_driver_2_#t~ret193#1 <= 2147483647;ldv_usb_register_driver_2_~tmp~19#1 := ldv_usb_register_driver_2_#t~ret193#1;havoc ldv_usb_register_driver_2_#t~ret193#1;ldv_usb_register_driver_2_~ldv_func_res~0#1 := ldv_usb_register_driver_2_~tmp~19#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset, ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset;havoc ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {20251#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:11,115 INFO L272 TraceCheckUtils]: 27: Hoare triple {20251#(= ~INTERF_STATE~0 0)} call ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset := ldv_init_zalloc(1248); {20280#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:11,115 INFO L290 TraceCheckUtils]: 28: Hoare triple {20280#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {20249#true} is VALID [2022-02-20 22:07:11,116 INFO L272 TraceCheckUtils]: 29: Hoare triple {20249#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {20288#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:11,116 INFO L290 TraceCheckUtils]: 30: Hoare triple {20288#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {20249#true} is VALID [2022-02-20 22:07:11,116 INFO L290 TraceCheckUtils]: 31: Hoare triple {20249#true} assume true; {20249#true} is VALID [2022-02-20 22:07:11,116 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {20249#true} {20249#true} #538#return; {20249#true} is VALID [2022-02-20 22:07:11,117 INFO L290 TraceCheckUtils]: 33: Hoare triple {20249#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {20249#true} is VALID [2022-02-20 22:07:11,117 INFO L272 TraceCheckUtils]: 34: Hoare triple {20249#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {20249#true} is VALID [2022-02-20 22:07:11,117 INFO L290 TraceCheckUtils]: 35: Hoare triple {20249#true} ~cond := #in~cond; {20249#true} is VALID [2022-02-20 22:07:11,117 INFO L290 TraceCheckUtils]: 36: Hoare triple {20249#true} assume !(0 == ~cond); {20249#true} is VALID [2022-02-20 22:07:11,117 INFO L290 TraceCheckUtils]: 37: Hoare triple {20249#true} assume true; {20249#true} is VALID [2022-02-20 22:07:11,117 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {20249#true} {20249#true} #540#return; {20249#true} is VALID [2022-02-20 22:07:11,117 INFO L290 TraceCheckUtils]: 39: Hoare triple {20249#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {20249#true} is VALID [2022-02-20 22:07:11,118 INFO L290 TraceCheckUtils]: 40: Hoare triple {20249#true} assume true; {20249#true} is VALID [2022-02-20 22:07:11,118 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {20249#true} {20251#(= ~INTERF_STATE~0 0)} #600#return; {20251#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:11,119 INFO L290 TraceCheckUtils]: 42: Hoare triple {20251#(= ~INTERF_STATE~0 0)} ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset := ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset;havoc ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {20251#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:11,119 INFO L290 TraceCheckUtils]: 43: Hoare triple {20251#(= ~INTERF_STATE~0 0)} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_2_#res#1 := ldv_usb_register_driver_2_~ldv_func_res~0#1; {20251#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:11,119 INFO L290 TraceCheckUtils]: 44: Hoare triple {20251#(= ~INTERF_STATE~0 0)} usb_register_#t~ret31#1 := ldv_usb_register_driver_2_#res#1;assume { :end_inline_ldv_usb_register_driver_2 } true;assume -2147483648 <= usb_register_#t~ret31#1 && usb_register_#t~ret31#1 <= 2147483647;usb_register_~tmp~1#1 := usb_register_#t~ret31#1;havoc usb_register_#t~ret31#1;usb_register_#res#1 := usb_register_~tmp~1#1; {20251#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:11,120 INFO L290 TraceCheckUtils]: 45: Hoare triple {20251#(= ~INTERF_STATE~0 0)} usb_acecad_init_#t~ret180#1 := usb_register_#res#1;assume { :end_inline_usb_register } true;assume -2147483648 <= usb_acecad_init_#t~ret180#1 && usb_acecad_init_#t~ret180#1 <= 2147483647;usb_acecad_init_~tmp~15#1 := usb_acecad_init_#t~ret180#1;havoc usb_acecad_init_#t~ret180#1;usb_acecad_init_~result~0#1 := usb_acecad_init_~tmp~15#1; {20251#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:11,120 INFO L290 TraceCheckUtils]: 46: Hoare triple {20251#(= ~INTERF_STATE~0 0)} assume !(0 == usb_acecad_init_~result~0#1); {20251#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:11,121 INFO L290 TraceCheckUtils]: 47: Hoare triple {20251#(= ~INTERF_STATE~0 0)} usb_acecad_init_#res#1 := usb_acecad_init_~result~0#1; {20251#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:11,121 INFO L290 TraceCheckUtils]: 48: Hoare triple {20251#(= ~INTERF_STATE~0 0)} main_#t~ret191#1 := usb_acecad_init_#res#1;assume { :end_inline_usb_acecad_init } true;assume -2147483648 <= main_#t~ret191#1 && main_#t~ret191#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret191#1;havoc main_#t~ret191#1; {20251#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:11,121 INFO L290 TraceCheckUtils]: 49: Hoare triple {20251#(= ~INTERF_STATE~0 0)} assume !(0 == ~ldv_retval_1~0); {20251#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:11,122 INFO L290 TraceCheckUtils]: 50: Hoare triple {20251#(= ~INTERF_STATE~0 0)} assume 0 != ~ldv_retval_1~0;~ldv_state_variable_0~0 := 2; {20251#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:11,122 INFO L290 TraceCheckUtils]: 51: Hoare triple {20251#(= ~INTERF_STATE~0 0)} assume { :begin_inline_ldv_check_final_state } true; {20251#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:11,122 INFO L290 TraceCheckUtils]: 52: Hoare triple {20251#(= ~INTERF_STATE~0 0)} assume !(0 != (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616); {20251#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:11,123 INFO L290 TraceCheckUtils]: 53: Hoare triple {20251#(= ~INTERF_STATE~0 0)} assume !(0 != (~usb_dev~0.base + ~usb_dev~0.offset) % 18446744073709551616); {20251#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:11,123 INFO L290 TraceCheckUtils]: 54: Hoare triple {20251#(= ~INTERF_STATE~0 0)} assume !(0 != ~dev_counter~0); {20251#(= ~INTERF_STATE~0 0)} is VALID [2022-02-20 22:07:11,123 INFO L290 TraceCheckUtils]: 55: Hoare triple {20251#(= ~INTERF_STATE~0 0)} assume 0 != ~INTERF_STATE~0; {20250#false} is VALID [2022-02-20 22:07:11,124 INFO L272 TraceCheckUtils]: 56: Hoare triple {20250#false} call ldv_error(); {20250#false} is VALID [2022-02-20 22:07:11,124 INFO L290 TraceCheckUtils]: 57: Hoare triple {20250#false} assume !false; {20250#false} is VALID [2022-02-20 22:07:11,124 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2022-02-20 22:07:11,125 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:07:11,125 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1983188371] [2022-02-20 22:07:11,125 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1983188371] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:07:11,125 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 22:07:11,125 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-02-20 22:07:11,125 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [673867403] [2022-02-20 22:07:11,125 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:07:11,126 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 7.2) internal successors, (36), 3 states have internal predecessors, (36), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 58 [2022-02-20 22:07:11,126 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:07:11,126 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 7.2) internal successors, (36), 3 states have internal predecessors, (36), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 22:07:11,171 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 45 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:11,172 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-02-20 22:07:11,172 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:07:11,172 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-02-20 22:07:11,172 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-02-20 22:07:11,173 INFO L87 Difference]: Start difference. First operand 812 states and 1052 transitions. Second operand has 5 states, 5 states have (on average 7.2) internal successors, (36), 3 states have internal predecessors, (36), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 22:07:12,010 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:12,011 INFO L93 Difference]: Finished difference Result 842 states and 1097 transitions. [2022-02-20 22:07:12,011 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-02-20 22:07:12,011 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 7.2) internal successors, (36), 3 states have internal predecessors, (36), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 58 [2022-02-20 22:07:12,011 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 22:07:12,011 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 7.2) internal successors, (36), 3 states have internal predecessors, (36), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 22:07:12,014 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 299 transitions. [2022-02-20 22:07:12,015 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 7.2) internal successors, (36), 3 states have internal predecessors, (36), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 22:07:12,018 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 299 transitions. [2022-02-20 22:07:12,018 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 299 transitions. [2022-02-20 22:07:12,288 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 299 edges. 299 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:12,338 INFO L225 Difference]: With dead ends: 842 [2022-02-20 22:07:12,338 INFO L226 Difference]: Without dead ends: 839 [2022-02-20 22:07:12,339 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2022-02-20 22:07:12,340 INFO L933 BasicCegarLoop]: 274 mSDtfsCounter, 304 mSDsluCounter, 157 mSDsCounter, 0 mSdLazyCounter, 71 mSolverCounterSat, 97 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 334 SdHoareTripleChecker+Valid, 431 SdHoareTripleChecker+Invalid, 168 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 97 IncrementalHoareTripleChecker+Valid, 71 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-02-20 22:07:12,340 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [334 Valid, 431 Invalid, 168 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [97 Valid, 71 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-02-20 22:07:12,341 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 839 states. [2022-02-20 22:07:12,370 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 839 to 811. [2022-02-20 22:07:12,370 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 22:07:12,372 INFO L82 GeneralOperation]: Start isEquivalent. First operand 839 states. Second operand has 811 states, 625 states have (on average 1.2608) internal successors, (788), 634 states have internal predecessors, (788), 131 states have call successors, (131), 55 states have call predecessors, (131), 54 states have return successors, (131), 129 states have call predecessors, (131), 129 states have call successors, (131) [2022-02-20 22:07:12,373 INFO L74 IsIncluded]: Start isIncluded. First operand 839 states. Second operand has 811 states, 625 states have (on average 1.2608) internal successors, (788), 634 states have internal predecessors, (788), 131 states have call successors, (131), 55 states have call predecessors, (131), 54 states have return successors, (131), 129 states have call predecessors, (131), 129 states have call successors, (131) [2022-02-20 22:07:12,374 INFO L87 Difference]: Start difference. First operand 839 states. Second operand has 811 states, 625 states have (on average 1.2608) internal successors, (788), 634 states have internal predecessors, (788), 131 states have call successors, (131), 55 states have call predecessors, (131), 54 states have return successors, (131), 129 states have call predecessors, (131), 129 states have call successors, (131) [2022-02-20 22:07:12,418 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:12,418 INFO L93 Difference]: Finished difference Result 839 states and 1094 transitions. [2022-02-20 22:07:12,418 INFO L276 IsEmpty]: Start isEmpty. Operand 839 states and 1094 transitions. [2022-02-20 22:07:12,420 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:12,420 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:12,422 INFO L74 IsIncluded]: Start isIncluded. First operand has 811 states, 625 states have (on average 1.2608) internal successors, (788), 634 states have internal predecessors, (788), 131 states have call successors, (131), 55 states have call predecessors, (131), 54 states have return successors, (131), 129 states have call predecessors, (131), 129 states have call successors, (131) Second operand 839 states. [2022-02-20 22:07:12,424 INFO L87 Difference]: Start difference. First operand has 811 states, 625 states have (on average 1.2608) internal successors, (788), 634 states have internal predecessors, (788), 131 states have call successors, (131), 55 states have call predecessors, (131), 54 states have return successors, (131), 129 states have call predecessors, (131), 129 states have call successors, (131) Second operand 839 states. [2022-02-20 22:07:12,463 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:12,463 INFO L93 Difference]: Finished difference Result 839 states and 1094 transitions. [2022-02-20 22:07:12,463 INFO L276 IsEmpty]: Start isEmpty. Operand 839 states and 1094 transitions. [2022-02-20 22:07:12,465 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:12,465 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:12,466 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 22:07:12,466 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 22:07:12,468 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 811 states, 625 states have (on average 1.2608) internal successors, (788), 634 states have internal predecessors, (788), 131 states have call successors, (131), 55 states have call predecessors, (131), 54 states have return successors, (131), 129 states have call predecessors, (131), 129 states have call successors, (131) [2022-02-20 22:07:12,514 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 811 states to 811 states and 1050 transitions. [2022-02-20 22:07:12,514 INFO L78 Accepts]: Start accepts. Automaton has 811 states and 1050 transitions. Word has length 58 [2022-02-20 22:07:12,514 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 22:07:12,514 INFO L470 AbstractCegarLoop]: Abstraction has 811 states and 1050 transitions. [2022-02-20 22:07:12,515 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 7.2) internal successors, (36), 3 states have internal predecessors, (36), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 22:07:12,515 INFO L276 IsEmpty]: Start isEmpty. Operand 811 states and 1050 transitions. [2022-02-20 22:07:12,516 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2022-02-20 22:07:12,516 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:07:12,516 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:07:12,516 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2022-02-20 22:07:12,517 INFO L402 AbstractCegarLoop]: === Iteration 8 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:07:12,517 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:07:12,517 INFO L85 PathProgramCache]: Analyzing trace with hash -25448733, now seen corresponding path program 1 times [2022-02-20 22:07:12,517 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:07:12,517 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [698184489] [2022-02-20 22:07:12,517 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:07:12,518 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:07:12,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:12,599 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 22:07:12,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:12,613 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:12,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:12,633 INFO L290 TraceCheckUtils]: 0: Hoare triple {24362#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {24323#true} is VALID [2022-02-20 22:07:12,633 INFO L290 TraceCheckUtils]: 1: Hoare triple {24323#true} assume true; {24323#true} is VALID [2022-02-20 22:07:12,633 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {24323#true} {24323#true} #538#return; {24323#true} is VALID [2022-02-20 22:07:12,633 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:12,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:12,639 INFO L290 TraceCheckUtils]: 0: Hoare triple {24323#true} ~cond := #in~cond; {24323#true} is VALID [2022-02-20 22:07:12,640 INFO L290 TraceCheckUtils]: 1: Hoare triple {24323#true} assume !(0 == ~cond); {24323#true} is VALID [2022-02-20 22:07:12,640 INFO L290 TraceCheckUtils]: 2: Hoare triple {24323#true} assume true; {24323#true} is VALID [2022-02-20 22:07:12,640 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {24323#true} {24323#true} #540#return; {24323#true} is VALID [2022-02-20 22:07:12,640 INFO L290 TraceCheckUtils]: 0: Hoare triple {24354#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {24323#true} is VALID [2022-02-20 22:07:12,641 INFO L272 TraceCheckUtils]: 1: Hoare triple {24323#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {24362#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:12,642 INFO L290 TraceCheckUtils]: 2: Hoare triple {24362#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {24323#true} is VALID [2022-02-20 22:07:12,642 INFO L290 TraceCheckUtils]: 3: Hoare triple {24323#true} assume true; {24323#true} is VALID [2022-02-20 22:07:12,642 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {24323#true} {24323#true} #538#return; {24323#true} is VALID [2022-02-20 22:07:12,642 INFO L290 TraceCheckUtils]: 5: Hoare triple {24323#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {24323#true} is VALID [2022-02-20 22:07:12,642 INFO L272 TraceCheckUtils]: 6: Hoare triple {24323#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {24323#true} is VALID [2022-02-20 22:07:12,642 INFO L290 TraceCheckUtils]: 7: Hoare triple {24323#true} ~cond := #in~cond; {24323#true} is VALID [2022-02-20 22:07:12,642 INFO L290 TraceCheckUtils]: 8: Hoare triple {24323#true} assume !(0 == ~cond); {24323#true} is VALID [2022-02-20 22:07:12,643 INFO L290 TraceCheckUtils]: 9: Hoare triple {24323#true} assume true; {24323#true} is VALID [2022-02-20 22:07:12,643 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {24323#true} {24323#true} #540#return; {24323#true} is VALID [2022-02-20 22:07:12,643 INFO L290 TraceCheckUtils]: 11: Hoare triple {24323#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {24323#true} is VALID [2022-02-20 22:07:12,643 INFO L290 TraceCheckUtils]: 12: Hoare triple {24323#true} assume true; {24323#true} is VALID [2022-02-20 22:07:12,644 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {24323#true} {24325#(= ~SERIAL_STATE~0 0)} #544#return; {24325#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:12,644 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 27 [2022-02-20 22:07:12,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:12,656 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:12,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:12,663 INFO L290 TraceCheckUtils]: 0: Hoare triple {24362#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {24323#true} is VALID [2022-02-20 22:07:12,663 INFO L290 TraceCheckUtils]: 1: Hoare triple {24323#true} assume true; {24323#true} is VALID [2022-02-20 22:07:12,663 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {24323#true} {24323#true} #538#return; {24323#true} is VALID [2022-02-20 22:07:12,664 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:12,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:12,668 INFO L290 TraceCheckUtils]: 0: Hoare triple {24323#true} ~cond := #in~cond; {24323#true} is VALID [2022-02-20 22:07:12,669 INFO L290 TraceCheckUtils]: 1: Hoare triple {24323#true} assume !(0 == ~cond); {24323#true} is VALID [2022-02-20 22:07:12,669 INFO L290 TraceCheckUtils]: 2: Hoare triple {24323#true} assume true; {24323#true} is VALID [2022-02-20 22:07:12,669 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {24323#true} {24323#true} #540#return; {24323#true} is VALID [2022-02-20 22:07:12,669 INFO L290 TraceCheckUtils]: 0: Hoare triple {24354#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {24323#true} is VALID [2022-02-20 22:07:12,670 INFO L272 TraceCheckUtils]: 1: Hoare triple {24323#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {24362#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:12,670 INFO L290 TraceCheckUtils]: 2: Hoare triple {24362#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {24323#true} is VALID [2022-02-20 22:07:12,670 INFO L290 TraceCheckUtils]: 3: Hoare triple {24323#true} assume true; {24323#true} is VALID [2022-02-20 22:07:12,671 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {24323#true} {24323#true} #538#return; {24323#true} is VALID [2022-02-20 22:07:12,671 INFO L290 TraceCheckUtils]: 5: Hoare triple {24323#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {24323#true} is VALID [2022-02-20 22:07:12,671 INFO L272 TraceCheckUtils]: 6: Hoare triple {24323#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {24323#true} is VALID [2022-02-20 22:07:12,671 INFO L290 TraceCheckUtils]: 7: Hoare triple {24323#true} ~cond := #in~cond; {24323#true} is VALID [2022-02-20 22:07:12,671 INFO L290 TraceCheckUtils]: 8: Hoare triple {24323#true} assume !(0 == ~cond); {24323#true} is VALID [2022-02-20 22:07:12,671 INFO L290 TraceCheckUtils]: 9: Hoare triple {24323#true} assume true; {24323#true} is VALID [2022-02-20 22:07:12,671 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {24323#true} {24323#true} #540#return; {24323#true} is VALID [2022-02-20 22:07:12,672 INFO L290 TraceCheckUtils]: 11: Hoare triple {24323#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {24323#true} is VALID [2022-02-20 22:07:12,672 INFO L290 TraceCheckUtils]: 12: Hoare triple {24323#true} assume true; {24323#true} is VALID [2022-02-20 22:07:12,672 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {24323#true} {24325#(= ~SERIAL_STATE~0 0)} #600#return; {24325#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:12,673 INFO L290 TraceCheckUtils]: 0: Hoare triple {24323#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(99, 2);call #Ultimate.allocInit(10, 3);call #Ultimate.allocInit(7, 4);call write~init~int(97, 4, 0, 1);call write~init~int(99, 4, 1, 1);call write~init~int(101, 4, 2, 1);call write~init~int(99, 4, 3, 1);call write~init~int(97, 4, 4, 1);call write~init~int(100, 4, 5, 1);call write~init~int(0, 4, 6, 1);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(20, 6);call #Ultimate.allocInit(57, 7);call #Ultimate.allocInit(2, 8);call write~init~int(32, 8, 0, 1);call write~init~int(0, 8, 1, 1);call #Ultimate.allocInit(8, 9);call #Ultimate.allocInit(34, 10);call #Ultimate.allocInit(32, 11);call #Ultimate.allocInit(11, 12);call #Ultimate.allocInit(48, 13);~LDV_IN_INTERRUPT~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset := 14, 0;call #Ultimate.allocInit(72, 14);call write~init~int(3, ~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 2 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(4, ~#usb_acecad_id_table~0.base, 4 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 6 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 8 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 10 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 11 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 12 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 13 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 14 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 15 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 16 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(3, ~#usb_acecad_id_table~0.base, 24 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 26 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(8, ~#usb_acecad_id_table~0.base, 28 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 30 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 32 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 34 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 35 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 36 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 37 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 38 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 39 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(1, ~#usb_acecad_id_table~0.base, 40 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(0, ~#usb_acecad_id_table~0.base, 48 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 50 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 52 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 54 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 56 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 58 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 59 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 60 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 61 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 62 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 63 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 64 + ~#usb_acecad_id_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.driver_info := 0;~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset := 15, 0;call #Ultimate.allocInit(264, 15);call write~init~$Pointer$(12, 0, ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_probe.base, #funAddr~usb_acecad_probe.offset, ~#usb_acecad_driver~0.base, 8 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_disconnect.base, #funAddr~usb_acecad_disconnect.offset, ~#usb_acecad_driver~0.base, 16 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 24 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 32 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 40 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 48 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 56 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 64 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, ~#usb_acecad_driver~0.base, 72 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 80 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 84 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 88 + ~#usb_acecad_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 92 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 100 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 108 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 116 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 124 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 132 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 136 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 144 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 152 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 160 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 168 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 176 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 184 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 192 + ~#usb_acecad_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 193 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 201 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 209 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 217 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 225 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 233 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 241 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 249 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 257 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 261 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 262 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 263 + ~#usb_acecad_driver~0.offset, 1);~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {24325#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:12,673 INFO L290 TraceCheckUtils]: 1: Hoare triple {24325#(= ~SERIAL_STATE~0 0)} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret183#1.base, main_#t~ret183#1.offset, main_#t~nondet184#1, main_#t~switch185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~ret188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~ret191#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~17#1.base, main_~tmp~17#1.offset, main_~tmp___0~6#1, main_~tmp___1~3#1, main_~tmp___2~1#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~17#1.base, main_~tmp~17#1.offset;havoc main_~tmp___0~6#1;havoc main_~tmp___1~3#1;havoc main_~tmp___2~1#1; {24325#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:12,674 INFO L272 TraceCheckUtils]: 2: Hoare triple {24325#(= ~SERIAL_STATE~0 0)} call main_#t~ret183#1.base, main_#t~ret183#1.offset := ldv_init_zalloc(24); {24354#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:12,674 INFO L290 TraceCheckUtils]: 3: Hoare triple {24354#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {24323#true} is VALID [2022-02-20 22:07:12,675 INFO L272 TraceCheckUtils]: 4: Hoare triple {24323#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {24362#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:12,675 INFO L290 TraceCheckUtils]: 5: Hoare triple {24362#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {24323#true} is VALID [2022-02-20 22:07:12,675 INFO L290 TraceCheckUtils]: 6: Hoare triple {24323#true} assume true; {24323#true} is VALID [2022-02-20 22:07:12,675 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {24323#true} {24323#true} #538#return; {24323#true} is VALID [2022-02-20 22:07:12,675 INFO L290 TraceCheckUtils]: 8: Hoare triple {24323#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {24323#true} is VALID [2022-02-20 22:07:12,676 INFO L272 TraceCheckUtils]: 9: Hoare triple {24323#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {24323#true} is VALID [2022-02-20 22:07:12,676 INFO L290 TraceCheckUtils]: 10: Hoare triple {24323#true} ~cond := #in~cond; {24323#true} is VALID [2022-02-20 22:07:12,676 INFO L290 TraceCheckUtils]: 11: Hoare triple {24323#true} assume !(0 == ~cond); {24323#true} is VALID [2022-02-20 22:07:12,676 INFO L290 TraceCheckUtils]: 12: Hoare triple {24323#true} assume true; {24323#true} is VALID [2022-02-20 22:07:12,676 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {24323#true} {24323#true} #540#return; {24323#true} is VALID [2022-02-20 22:07:12,676 INFO L290 TraceCheckUtils]: 14: Hoare triple {24323#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {24323#true} is VALID [2022-02-20 22:07:12,676 INFO L290 TraceCheckUtils]: 15: Hoare triple {24323#true} assume true; {24323#true} is VALID [2022-02-20 22:07:12,677 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {24323#true} {24325#(= ~SERIAL_STATE~0 0)} #544#return; {24325#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:12,677 INFO L290 TraceCheckUtils]: 17: Hoare triple {24325#(= ~SERIAL_STATE~0 0)} main_~tmp~17#1.base, main_~tmp~17#1.offset := main_#t~ret183#1.base, main_#t~ret183#1.offset;havoc main_#t~ret183#1.base, main_#t~ret183#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~17#1.base, main_~tmp~17#1.offset;assume { :begin_inline_ldv_initialize } true; {24325#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:12,678 INFO L290 TraceCheckUtils]: 18: Hoare triple {24325#(= ~SERIAL_STATE~0 0)} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1; {24325#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:12,678 INFO L290 TraceCheckUtils]: 19: Hoare triple {24325#(= ~SERIAL_STATE~0 0)} assume -2147483648 <= main_#t~nondet184#1 && main_#t~nondet184#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet184#1;havoc main_#t~nondet184#1;main_#t~switch185#1 := 0 == main_~tmp___0~6#1; {24325#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:12,678 INFO L290 TraceCheckUtils]: 20: Hoare triple {24325#(= ~SERIAL_STATE~0 0)} assume !main_#t~switch185#1;main_#t~switch185#1 := main_#t~switch185#1 || 1 == main_~tmp___0~6#1; {24325#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:12,681 INFO L290 TraceCheckUtils]: 21: Hoare triple {24325#(= ~SERIAL_STATE~0 0)} assume main_#t~switch185#1; {24325#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:12,682 INFO L290 TraceCheckUtils]: 22: Hoare triple {24325#(= ~SERIAL_STATE~0 0)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet189#1 && main_#t~nondet189#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet189#1;havoc main_#t~nondet189#1;main_#t~switch190#1 := 0 == main_~tmp___2~1#1; {24325#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:12,682 INFO L290 TraceCheckUtils]: 23: Hoare triple {24325#(= ~SERIAL_STATE~0 0)} assume !main_#t~switch190#1;main_#t~switch190#1 := main_#t~switch190#1 || 1 == main_~tmp___2~1#1; {24325#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:12,683 INFO L290 TraceCheckUtils]: 24: Hoare triple {24325#(= ~SERIAL_STATE~0 0)} assume main_#t~switch190#1; {24325#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:12,683 INFO L290 TraceCheckUtils]: 25: Hoare triple {24325#(= ~SERIAL_STATE~0 0)} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_usb_acecad_init } true;havoc usb_acecad_init_#res#1;havoc usb_acecad_init_#t~ret180#1, usb_acecad_init_#t~nondet181#1, usb_acecad_init_~result~0#1, usb_acecad_init_~tmp~15#1;havoc usb_acecad_init_~result~0#1;havoc usb_acecad_init_~tmp~15#1;assume { :begin_inline_usb_register } true;usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc usb_register_#res#1;havoc usb_register_#t~ret31#1, usb_register_~driver#1.base, usb_register_~driver#1.offset, usb_register_~tmp~1#1;usb_register_~driver#1.base, usb_register_~driver#1.offset := usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset;havoc usb_register_~tmp~1#1;assume { :begin_inline_ldv_usb_register_driver_2 } true;ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset := usb_register_~driver#1.base, usb_register_~driver#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 4, 0;havoc ldv_usb_register_driver_2_#res#1;havoc ldv_usb_register_driver_2_#t~ret193#1, ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset, ldv_usb_register_driver_2_~ldv_func_res~0#1, ldv_usb_register_driver_2_~tmp~19#1;ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_2_~ldv_func_res~0#1;havoc ldv_usb_register_driver_2_~tmp~19#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet213#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet213#1 && usb_register_driver_#t~nondet213#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet213#1;havoc usb_register_driver_#t~nondet213#1; {24325#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:12,683 INFO L290 TraceCheckUtils]: 26: Hoare triple {24325#(= ~SERIAL_STATE~0 0)} ldv_usb_register_driver_2_#t~ret193#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_2_#t~ret193#1 && ldv_usb_register_driver_2_#t~ret193#1 <= 2147483647;ldv_usb_register_driver_2_~tmp~19#1 := ldv_usb_register_driver_2_#t~ret193#1;havoc ldv_usb_register_driver_2_#t~ret193#1;ldv_usb_register_driver_2_~ldv_func_res~0#1 := ldv_usb_register_driver_2_~tmp~19#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset, ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset;havoc ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {24325#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:12,684 INFO L272 TraceCheckUtils]: 27: Hoare triple {24325#(= ~SERIAL_STATE~0 0)} call ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset := ldv_init_zalloc(1248); {24354#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:12,684 INFO L290 TraceCheckUtils]: 28: Hoare triple {24354#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {24323#true} is VALID [2022-02-20 22:07:12,685 INFO L272 TraceCheckUtils]: 29: Hoare triple {24323#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {24362#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:12,685 INFO L290 TraceCheckUtils]: 30: Hoare triple {24362#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {24323#true} is VALID [2022-02-20 22:07:12,685 INFO L290 TraceCheckUtils]: 31: Hoare triple {24323#true} assume true; {24323#true} is VALID [2022-02-20 22:07:12,685 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {24323#true} {24323#true} #538#return; {24323#true} is VALID [2022-02-20 22:07:12,686 INFO L290 TraceCheckUtils]: 33: Hoare triple {24323#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {24323#true} is VALID [2022-02-20 22:07:12,686 INFO L272 TraceCheckUtils]: 34: Hoare triple {24323#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {24323#true} is VALID [2022-02-20 22:07:12,686 INFO L290 TraceCheckUtils]: 35: Hoare triple {24323#true} ~cond := #in~cond; {24323#true} is VALID [2022-02-20 22:07:12,686 INFO L290 TraceCheckUtils]: 36: Hoare triple {24323#true} assume !(0 == ~cond); {24323#true} is VALID [2022-02-20 22:07:12,686 INFO L290 TraceCheckUtils]: 37: Hoare triple {24323#true} assume true; {24323#true} is VALID [2022-02-20 22:07:12,686 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {24323#true} {24323#true} #540#return; {24323#true} is VALID [2022-02-20 22:07:12,686 INFO L290 TraceCheckUtils]: 39: Hoare triple {24323#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {24323#true} is VALID [2022-02-20 22:07:12,687 INFO L290 TraceCheckUtils]: 40: Hoare triple {24323#true} assume true; {24323#true} is VALID [2022-02-20 22:07:12,687 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {24323#true} {24325#(= ~SERIAL_STATE~0 0)} #600#return; {24325#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:12,688 INFO L290 TraceCheckUtils]: 42: Hoare triple {24325#(= ~SERIAL_STATE~0 0)} ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset := ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset;havoc ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {24325#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:12,688 INFO L290 TraceCheckUtils]: 43: Hoare triple {24325#(= ~SERIAL_STATE~0 0)} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_2_#res#1 := ldv_usb_register_driver_2_~ldv_func_res~0#1; {24325#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:12,688 INFO L290 TraceCheckUtils]: 44: Hoare triple {24325#(= ~SERIAL_STATE~0 0)} usb_register_#t~ret31#1 := ldv_usb_register_driver_2_#res#1;assume { :end_inline_ldv_usb_register_driver_2 } true;assume -2147483648 <= usb_register_#t~ret31#1 && usb_register_#t~ret31#1 <= 2147483647;usb_register_~tmp~1#1 := usb_register_#t~ret31#1;havoc usb_register_#t~ret31#1;usb_register_#res#1 := usb_register_~tmp~1#1; {24325#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:12,689 INFO L290 TraceCheckUtils]: 45: Hoare triple {24325#(= ~SERIAL_STATE~0 0)} usb_acecad_init_#t~ret180#1 := usb_register_#res#1;assume { :end_inline_usb_register } true;assume -2147483648 <= usb_acecad_init_#t~ret180#1 && usb_acecad_init_#t~ret180#1 <= 2147483647;usb_acecad_init_~tmp~15#1 := usb_acecad_init_#t~ret180#1;havoc usb_acecad_init_#t~ret180#1;usb_acecad_init_~result~0#1 := usb_acecad_init_~tmp~15#1; {24325#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:12,689 INFO L290 TraceCheckUtils]: 46: Hoare triple {24325#(= ~SERIAL_STATE~0 0)} assume !(0 == usb_acecad_init_~result~0#1); {24325#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:12,689 INFO L290 TraceCheckUtils]: 47: Hoare triple {24325#(= ~SERIAL_STATE~0 0)} usb_acecad_init_#res#1 := usb_acecad_init_~result~0#1; {24325#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:12,690 INFO L290 TraceCheckUtils]: 48: Hoare triple {24325#(= ~SERIAL_STATE~0 0)} main_#t~ret191#1 := usb_acecad_init_#res#1;assume { :end_inline_usb_acecad_init } true;assume -2147483648 <= main_#t~ret191#1 && main_#t~ret191#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret191#1;havoc main_#t~ret191#1; {24325#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:12,690 INFO L290 TraceCheckUtils]: 49: Hoare triple {24325#(= ~SERIAL_STATE~0 0)} assume !(0 == ~ldv_retval_1~0); {24325#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:12,690 INFO L290 TraceCheckUtils]: 50: Hoare triple {24325#(= ~SERIAL_STATE~0 0)} assume 0 != ~ldv_retval_1~0;~ldv_state_variable_0~0 := 2; {24325#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:12,691 INFO L290 TraceCheckUtils]: 51: Hoare triple {24325#(= ~SERIAL_STATE~0 0)} assume { :begin_inline_ldv_check_final_state } true; {24325#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:12,691 INFO L290 TraceCheckUtils]: 52: Hoare triple {24325#(= ~SERIAL_STATE~0 0)} assume !(0 != (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616); {24325#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:12,691 INFO L290 TraceCheckUtils]: 53: Hoare triple {24325#(= ~SERIAL_STATE~0 0)} assume !(0 != (~usb_dev~0.base + ~usb_dev~0.offset) % 18446744073709551616); {24325#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:12,692 INFO L290 TraceCheckUtils]: 54: Hoare triple {24325#(= ~SERIAL_STATE~0 0)} assume !(0 != ~dev_counter~0); {24325#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:12,692 INFO L290 TraceCheckUtils]: 55: Hoare triple {24325#(= ~SERIAL_STATE~0 0)} assume !(0 != ~INTERF_STATE~0); {24325#(= ~SERIAL_STATE~0 0)} is VALID [2022-02-20 22:07:12,692 INFO L290 TraceCheckUtils]: 56: Hoare triple {24325#(= ~SERIAL_STATE~0 0)} assume 0 != ~SERIAL_STATE~0; {24324#false} is VALID [2022-02-20 22:07:12,692 INFO L272 TraceCheckUtils]: 57: Hoare triple {24324#false} call ldv_error(); {24324#false} is VALID [2022-02-20 22:07:12,694 INFO L290 TraceCheckUtils]: 58: Hoare triple {24324#false} assume !false; {24324#false} is VALID [2022-02-20 22:07:12,694 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2022-02-20 22:07:12,694 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:07:12,694 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [698184489] [2022-02-20 22:07:12,695 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [698184489] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:07:12,695 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 22:07:12,695 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-02-20 22:07:12,695 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [213139426] [2022-02-20 22:07:12,695 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:07:12,696 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 7.4) internal successors, (37), 3 states have internal predecessors, (37), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 59 [2022-02-20 22:07:12,696 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:07:12,696 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 7.4) internal successors, (37), 3 states have internal predecessors, (37), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 22:07:12,737 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:12,737 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-02-20 22:07:12,738 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:07:12,738 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-02-20 22:07:12,739 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-02-20 22:07:12,739 INFO L87 Difference]: Start difference. First operand 811 states and 1050 transitions. Second operand has 5 states, 5 states have (on average 7.4) internal successors, (37), 3 states have internal predecessors, (37), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 22:07:13,462 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:13,462 INFO L93 Difference]: Finished difference Result 841 states and 1095 transitions. [2022-02-20 22:07:13,462 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-02-20 22:07:13,463 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 7.4) internal successors, (37), 3 states have internal predecessors, (37), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 59 [2022-02-20 22:07:13,463 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 22:07:13,463 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 7.4) internal successors, (37), 3 states have internal predecessors, (37), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 22:07:13,466 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 297 transitions. [2022-02-20 22:07:13,466 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 7.4) internal successors, (37), 3 states have internal predecessors, (37), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 22:07:13,469 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 297 transitions. [2022-02-20 22:07:13,469 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 297 transitions. [2022-02-20 22:07:13,731 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 297 edges. 297 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:13,772 INFO L225 Difference]: With dead ends: 841 [2022-02-20 22:07:13,772 INFO L226 Difference]: Without dead ends: 829 [2022-02-20 22:07:13,773 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2022-02-20 22:07:13,773 INFO L933 BasicCegarLoop]: 273 mSDtfsCounter, 301 mSDsluCounter, 157 mSDsCounter, 0 mSdLazyCounter, 69 mSolverCounterSat, 95 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 331 SdHoareTripleChecker+Valid, 430 SdHoareTripleChecker+Invalid, 164 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 95 IncrementalHoareTripleChecker+Valid, 69 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-02-20 22:07:13,775 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [331 Valid, 430 Invalid, 164 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [95 Valid, 69 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-02-20 22:07:13,776 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 829 states. [2022-02-20 22:07:13,804 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 829 to 801. [2022-02-20 22:07:13,804 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 22:07:13,806 INFO L82 GeneralOperation]: Start isEquivalent. First operand 829 states. Second operand has 801 states, 616 states have (on average 1.2597402597402598) internal successors, (776), 624 states have internal predecessors, (776), 130 states have call successors, (130), 55 states have call predecessors, (130), 54 states have return successors, (131), 129 states have call predecessors, (131), 129 states have call successors, (131) [2022-02-20 22:07:13,807 INFO L74 IsIncluded]: Start isIncluded. First operand 829 states. Second operand has 801 states, 616 states have (on average 1.2597402597402598) internal successors, (776), 624 states have internal predecessors, (776), 130 states have call successors, (130), 55 states have call predecessors, (130), 54 states have return successors, (131), 129 states have call predecessors, (131), 129 states have call successors, (131) [2022-02-20 22:07:13,809 INFO L87 Difference]: Start difference. First operand 829 states. Second operand has 801 states, 616 states have (on average 1.2597402597402598) internal successors, (776), 624 states have internal predecessors, (776), 130 states have call successors, (130), 55 states have call predecessors, (130), 54 states have return successors, (131), 129 states have call predecessors, (131), 129 states have call successors, (131) [2022-02-20 22:07:13,846 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:13,846 INFO L93 Difference]: Finished difference Result 829 states and 1081 transitions. [2022-02-20 22:07:13,846 INFO L276 IsEmpty]: Start isEmpty. Operand 829 states and 1081 transitions. [2022-02-20 22:07:13,848 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:13,848 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:13,850 INFO L74 IsIncluded]: Start isIncluded. First operand has 801 states, 616 states have (on average 1.2597402597402598) internal successors, (776), 624 states have internal predecessors, (776), 130 states have call successors, (130), 55 states have call predecessors, (130), 54 states have return successors, (131), 129 states have call predecessors, (131), 129 states have call successors, (131) Second operand 829 states. [2022-02-20 22:07:13,851 INFO L87 Difference]: Start difference. First operand has 801 states, 616 states have (on average 1.2597402597402598) internal successors, (776), 624 states have internal predecessors, (776), 130 states have call successors, (130), 55 states have call predecessors, (130), 54 states have return successors, (131), 129 states have call predecessors, (131), 129 states have call successors, (131) Second operand 829 states. [2022-02-20 22:07:13,888 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:13,888 INFO L93 Difference]: Finished difference Result 829 states and 1081 transitions. [2022-02-20 22:07:13,889 INFO L276 IsEmpty]: Start isEmpty. Operand 829 states and 1081 transitions. [2022-02-20 22:07:13,908 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:13,908 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:13,909 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 22:07:13,909 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 22:07:13,910 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 801 states, 616 states have (on average 1.2597402597402598) internal successors, (776), 624 states have internal predecessors, (776), 130 states have call successors, (130), 55 states have call predecessors, (130), 54 states have return successors, (131), 129 states have call predecessors, (131), 129 states have call successors, (131) [2022-02-20 22:07:13,954 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 801 states to 801 states and 1037 transitions. [2022-02-20 22:07:13,954 INFO L78 Accepts]: Start accepts. Automaton has 801 states and 1037 transitions. Word has length 59 [2022-02-20 22:07:13,954 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 22:07:13,954 INFO L470 AbstractCegarLoop]: Abstraction has 801 states and 1037 transitions. [2022-02-20 22:07:13,955 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 7.4) internal successors, (37), 3 states have internal predecessors, (37), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 22:07:13,955 INFO L276 IsEmpty]: Start isEmpty. Operand 801 states and 1037 transitions. [2022-02-20 22:07:13,957 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 161 [2022-02-20 22:07:13,958 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:07:13,958 INFO L514 BasicCegarLoop]: trace histogram [5, 5, 5, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:07:13,958 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2022-02-20 22:07:13,958 INFO L402 AbstractCegarLoop]: === Iteration 9 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:07:13,959 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:07:13,959 INFO L85 PathProgramCache]: Analyzing trace with hash 1150661192, now seen corresponding path program 1 times [2022-02-20 22:07:13,959 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:07:13,959 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [420384611] [2022-02-20 22:07:13,960 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:07:13,960 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:07:14,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:14,049 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 22:07:14,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:14,061 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:14,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:14,065 INFO L290 TraceCheckUtils]: 0: Hoare triple {28448#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {28360#true} is VALID [2022-02-20 22:07:14,065 INFO L290 TraceCheckUtils]: 1: Hoare triple {28360#true} assume true; {28360#true} is VALID [2022-02-20 22:07:14,066 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {28360#true} {28360#true} #538#return; {28360#true} is VALID [2022-02-20 22:07:14,066 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:14,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:14,070 INFO L290 TraceCheckUtils]: 0: Hoare triple {28360#true} ~cond := #in~cond; {28360#true} is VALID [2022-02-20 22:07:14,070 INFO L290 TraceCheckUtils]: 1: Hoare triple {28360#true} assume !(0 == ~cond); {28360#true} is VALID [2022-02-20 22:07:14,070 INFO L290 TraceCheckUtils]: 2: Hoare triple {28360#true} assume true; {28360#true} is VALID [2022-02-20 22:07:14,070 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {28360#true} {28360#true} #540#return; {28360#true} is VALID [2022-02-20 22:07:14,070 INFO L290 TraceCheckUtils]: 0: Hoare triple {28440#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {28360#true} is VALID [2022-02-20 22:07:14,071 INFO L272 TraceCheckUtils]: 1: Hoare triple {28360#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {28448#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:14,071 INFO L290 TraceCheckUtils]: 2: Hoare triple {28448#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {28360#true} is VALID [2022-02-20 22:07:14,071 INFO L290 TraceCheckUtils]: 3: Hoare triple {28360#true} assume true; {28360#true} is VALID [2022-02-20 22:07:14,072 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {28360#true} {28360#true} #538#return; {28360#true} is VALID [2022-02-20 22:07:14,072 INFO L290 TraceCheckUtils]: 5: Hoare triple {28360#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {28360#true} is VALID [2022-02-20 22:07:14,072 INFO L272 TraceCheckUtils]: 6: Hoare triple {28360#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {28360#true} is VALID [2022-02-20 22:07:14,072 INFO L290 TraceCheckUtils]: 7: Hoare triple {28360#true} ~cond := #in~cond; {28360#true} is VALID [2022-02-20 22:07:14,072 INFO L290 TraceCheckUtils]: 8: Hoare triple {28360#true} assume !(0 == ~cond); {28360#true} is VALID [2022-02-20 22:07:14,072 INFO L290 TraceCheckUtils]: 9: Hoare triple {28360#true} assume true; {28360#true} is VALID [2022-02-20 22:07:14,072 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {28360#true} {28360#true} #540#return; {28360#true} is VALID [2022-02-20 22:07:14,073 INFO L290 TraceCheckUtils]: 11: Hoare triple {28360#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {28360#true} is VALID [2022-02-20 22:07:14,073 INFO L290 TraceCheckUtils]: 12: Hoare triple {28360#true} assume true; {28360#true} is VALID [2022-02-20 22:07:14,073 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {28360#true} {28360#true} #544#return; {28360#true} is VALID [2022-02-20 22:07:14,078 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 24 [2022-02-20 22:07:14,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:14,085 INFO L290 TraceCheckUtils]: 0: Hoare triple {28449#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {28360#true} is VALID [2022-02-20 22:07:14,085 INFO L290 TraceCheckUtils]: 1: Hoare triple {28360#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {28360#true} is VALID [2022-02-20 22:07:14,086 INFO L290 TraceCheckUtils]: 2: Hoare triple {28360#true} assume true; {28360#true} is VALID [2022-02-20 22:07:14,086 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {28360#true} {28361#false} #546#return; {28361#false} is VALID [2022-02-20 22:07:14,086 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2022-02-20 22:07:14,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:14,090 INFO L290 TraceCheckUtils]: 0: Hoare triple {28360#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {28360#true} is VALID [2022-02-20 22:07:14,090 INFO L290 TraceCheckUtils]: 1: Hoare triple {28360#true} assume true; {28360#true} is VALID [2022-02-20 22:07:14,090 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {28360#true} {28361#false} #556#return; {28361#false} is VALID [2022-02-20 22:07:14,090 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 49 [2022-02-20 22:07:14,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:14,096 INFO L290 TraceCheckUtils]: 0: Hoare triple {28360#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {28360#true} is VALID [2022-02-20 22:07:14,096 INFO L290 TraceCheckUtils]: 1: Hoare triple {28360#true} assume true; {28360#true} is VALID [2022-02-20 22:07:14,096 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {28360#true} {28361#false} #560#return; {28361#false} is VALID [2022-02-20 22:07:14,096 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 56 [2022-02-20 22:07:14,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:14,103 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:14,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:14,108 INFO L290 TraceCheckUtils]: 0: Hoare triple {28449#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {28360#true} is VALID [2022-02-20 22:07:14,108 INFO L290 TraceCheckUtils]: 1: Hoare triple {28360#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {28360#true} is VALID [2022-02-20 22:07:14,108 INFO L290 TraceCheckUtils]: 2: Hoare triple {28360#true} assume true; {28360#true} is VALID [2022-02-20 22:07:14,109 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {28360#true} {28360#true} #530#return; {28360#true} is VALID [2022-02-20 22:07:14,109 INFO L290 TraceCheckUtils]: 0: Hoare triple {28449#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {28360#true} is VALID [2022-02-20 22:07:14,110 INFO L272 TraceCheckUtils]: 1: Hoare triple {28360#true} call __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset := ldv_malloc(__kmalloc_~size#1); {28449#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:14,110 INFO L290 TraceCheckUtils]: 2: Hoare triple {28449#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {28360#true} is VALID [2022-02-20 22:07:14,122 INFO L290 TraceCheckUtils]: 3: Hoare triple {28360#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {28360#true} is VALID [2022-02-20 22:07:14,123 INFO L290 TraceCheckUtils]: 4: Hoare triple {28360#true} assume true; {28360#true} is VALID [2022-02-20 22:07:14,134 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {28360#true} {28360#true} #530#return; {28360#true} is VALID [2022-02-20 22:07:14,135 INFO L290 TraceCheckUtils]: 6: Hoare triple {28360#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset; {28360#true} is VALID [2022-02-20 22:07:14,135 INFO L290 TraceCheckUtils]: 7: Hoare triple {28360#true} kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {28360#true} is VALID [2022-02-20 22:07:14,135 INFO L290 TraceCheckUtils]: 8: Hoare triple {28360#true} #t~ret55#1.base, #t~ret55#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret55#1.base, #t~ret55#1.offset;havoc #t~ret55#1.base, #t~ret55#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {28360#true} is VALID [2022-02-20 22:07:14,135 INFO L290 TraceCheckUtils]: 9: Hoare triple {28360#true} assume true; {28360#true} is VALID [2022-02-20 22:07:14,135 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {28360#true} {28361#false} #562#return; {28361#false} is VALID [2022-02-20 22:07:14,136 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 69 [2022-02-20 22:07:14,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:14,143 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:14,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:14,147 INFO L290 TraceCheckUtils]: 0: Hoare triple {28449#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {28360#true} is VALID [2022-02-20 22:07:14,148 INFO L290 TraceCheckUtils]: 1: Hoare triple {28360#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {28360#true} is VALID [2022-02-20 22:07:14,148 INFO L290 TraceCheckUtils]: 2: Hoare triple {28360#true} assume true; {28360#true} is VALID [2022-02-20 22:07:14,148 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {28360#true} {28360#true} #530#return; {28360#true} is VALID [2022-02-20 22:07:14,148 INFO L290 TraceCheckUtils]: 0: Hoare triple {28449#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {28360#true} is VALID [2022-02-20 22:07:14,149 INFO L272 TraceCheckUtils]: 1: Hoare triple {28360#true} call __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset := ldv_malloc(__kmalloc_~size#1); {28449#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:14,149 INFO L290 TraceCheckUtils]: 2: Hoare triple {28449#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {28360#true} is VALID [2022-02-20 22:07:14,149 INFO L290 TraceCheckUtils]: 3: Hoare triple {28360#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {28360#true} is VALID [2022-02-20 22:07:14,149 INFO L290 TraceCheckUtils]: 4: Hoare triple {28360#true} assume true; {28360#true} is VALID [2022-02-20 22:07:14,149 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {28360#true} {28360#true} #530#return; {28360#true} is VALID [2022-02-20 22:07:14,149 INFO L290 TraceCheckUtils]: 6: Hoare triple {28360#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset; {28360#true} is VALID [2022-02-20 22:07:14,150 INFO L290 TraceCheckUtils]: 7: Hoare triple {28360#true} kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {28360#true} is VALID [2022-02-20 22:07:14,150 INFO L290 TraceCheckUtils]: 8: Hoare triple {28360#true} #t~ret55#1.base, #t~ret55#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret55#1.base, #t~ret55#1.offset;havoc #t~ret55#1.base, #t~ret55#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {28360#true} is VALID [2022-02-20 22:07:14,150 INFO L290 TraceCheckUtils]: 9: Hoare triple {28360#true} assume true; {28360#true} is VALID [2022-02-20 22:07:14,150 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {28360#true} {28361#false} #564#return; {28361#false} is VALID [2022-02-20 22:07:14,150 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 84 [2022-02-20 22:07:14,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:14,156 INFO L290 TraceCheckUtils]: 0: Hoare triple {28449#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {28360#true} is VALID [2022-02-20 22:07:14,157 INFO L290 TraceCheckUtils]: 1: Hoare triple {28360#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {28360#true} is VALID [2022-02-20 22:07:14,157 INFO L290 TraceCheckUtils]: 2: Hoare triple {28360#true} assume true; {28360#true} is VALID [2022-02-20 22:07:14,157 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {28360#true} {28361#false} #566#return; {28361#false} is VALID [2022-02-20 22:07:14,157 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 92 [2022-02-20 22:07:14,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:14,164 INFO L290 TraceCheckUtils]: 0: Hoare triple {28449#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {28360#true} is VALID [2022-02-20 22:07:14,165 INFO L290 TraceCheckUtils]: 1: Hoare triple {28360#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {28360#true} is VALID [2022-02-20 22:07:14,165 INFO L290 TraceCheckUtils]: 2: Hoare triple {28360#true} assume true; {28360#true} is VALID [2022-02-20 22:07:14,165 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {28360#true} {28361#false} #568#return; {28361#false} is VALID [2022-02-20 22:07:14,165 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 98 [2022-02-20 22:07:14,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:14,170 INFO L290 TraceCheckUtils]: 0: Hoare triple {28360#true} havoc ~tmp~8;assume -2147483648 <= #t~nondet65 && #t~nondet65 <= 2147483647;~tmp~8 := #t~nondet65;havoc #t~nondet65;#res := ~tmp~8; {28360#true} is VALID [2022-02-20 22:07:14,171 INFO L290 TraceCheckUtils]: 1: Hoare triple {28360#true} assume true; {28360#true} is VALID [2022-02-20 22:07:14,171 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {28360#true} {28361#false} #570#return; {28361#false} is VALID [2022-02-20 22:07:14,171 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 110 [2022-02-20 22:07:14,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:14,175 INFO L290 TraceCheckUtils]: 0: Hoare triple {28360#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1 := #in~arg1;~arg2.base, ~arg2.offset := #in~arg2.base, #in~arg2.offset;~arg3 := #in~arg3; {28360#true} is VALID [2022-02-20 22:07:14,175 INFO L290 TraceCheckUtils]: 1: Hoare triple {28360#true} assume true; {28360#true} is VALID [2022-02-20 22:07:14,176 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {28360#true} {28361#false} #592#return; {28361#false} is VALID [2022-02-20 22:07:14,180 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 117 [2022-02-20 22:07:14,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:14,185 INFO L290 TraceCheckUtils]: 0: Hoare triple {28458#(= |old(#valid)| |#valid|)} ~p.base, ~p.offset := #in~p.base, #in~p.offset;call ULTIMATE.dealloc(~p.base, ~p.offset); {28360#true} is VALID [2022-02-20 22:07:14,186 INFO L290 TraceCheckUtils]: 1: Hoare triple {28360#true} assume true; {28360#true} is VALID [2022-02-20 22:07:14,186 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {28360#true} {28361#false} #594#return; {28361#false} is VALID [2022-02-20 22:07:14,186 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 132 [2022-02-20 22:07:14,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:14,197 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:14,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:14,204 INFO L290 TraceCheckUtils]: 0: Hoare triple {28448#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {28360#true} is VALID [2022-02-20 22:07:14,204 INFO L290 TraceCheckUtils]: 1: Hoare triple {28360#true} assume true; {28360#true} is VALID [2022-02-20 22:07:14,204 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {28360#true} {28360#true} #538#return; {28360#true} is VALID [2022-02-20 22:07:14,205 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:14,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:14,209 INFO L290 TraceCheckUtils]: 0: Hoare triple {28360#true} ~cond := #in~cond; {28360#true} is VALID [2022-02-20 22:07:14,209 INFO L290 TraceCheckUtils]: 1: Hoare triple {28360#true} assume !(0 == ~cond); {28360#true} is VALID [2022-02-20 22:07:14,209 INFO L290 TraceCheckUtils]: 2: Hoare triple {28360#true} assume true; {28360#true} is VALID [2022-02-20 22:07:14,209 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {28360#true} {28360#true} #540#return; {28360#true} is VALID [2022-02-20 22:07:14,209 INFO L290 TraceCheckUtils]: 0: Hoare triple {28440#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {28360#true} is VALID [2022-02-20 22:07:14,210 INFO L272 TraceCheckUtils]: 1: Hoare triple {28360#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {28448#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:14,211 INFO L290 TraceCheckUtils]: 2: Hoare triple {28448#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {28360#true} is VALID [2022-02-20 22:07:14,211 INFO L290 TraceCheckUtils]: 3: Hoare triple {28360#true} assume true; {28360#true} is VALID [2022-02-20 22:07:14,211 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {28360#true} {28360#true} #538#return; {28360#true} is VALID [2022-02-20 22:07:14,211 INFO L290 TraceCheckUtils]: 5: Hoare triple {28360#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {28360#true} is VALID [2022-02-20 22:07:14,211 INFO L272 TraceCheckUtils]: 6: Hoare triple {28360#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {28360#true} is VALID [2022-02-20 22:07:14,211 INFO L290 TraceCheckUtils]: 7: Hoare triple {28360#true} ~cond := #in~cond; {28360#true} is VALID [2022-02-20 22:07:14,211 INFO L290 TraceCheckUtils]: 8: Hoare triple {28360#true} assume !(0 == ~cond); {28360#true} is VALID [2022-02-20 22:07:14,212 INFO L290 TraceCheckUtils]: 9: Hoare triple {28360#true} assume true; {28360#true} is VALID [2022-02-20 22:07:14,212 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {28360#true} {28360#true} #540#return; {28360#true} is VALID [2022-02-20 22:07:14,212 INFO L290 TraceCheckUtils]: 11: Hoare triple {28360#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {28360#true} is VALID [2022-02-20 22:07:14,212 INFO L290 TraceCheckUtils]: 12: Hoare triple {28360#true} assume true; {28360#true} is VALID [2022-02-20 22:07:14,212 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {28360#true} {28361#false} #600#return; {28361#false} is VALID [2022-02-20 22:07:14,212 INFO L290 TraceCheckUtils]: 0: Hoare triple {28360#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(99, 2);call #Ultimate.allocInit(10, 3);call #Ultimate.allocInit(7, 4);call write~init~int(97, 4, 0, 1);call write~init~int(99, 4, 1, 1);call write~init~int(101, 4, 2, 1);call write~init~int(99, 4, 3, 1);call write~init~int(97, 4, 4, 1);call write~init~int(100, 4, 5, 1);call write~init~int(0, 4, 6, 1);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(20, 6);call #Ultimate.allocInit(57, 7);call #Ultimate.allocInit(2, 8);call write~init~int(32, 8, 0, 1);call write~init~int(0, 8, 1, 1);call #Ultimate.allocInit(8, 9);call #Ultimate.allocInit(34, 10);call #Ultimate.allocInit(32, 11);call #Ultimate.allocInit(11, 12);call #Ultimate.allocInit(48, 13);~LDV_IN_INTERRUPT~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset := 14, 0;call #Ultimate.allocInit(72, 14);call write~init~int(3, ~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 2 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(4, ~#usb_acecad_id_table~0.base, 4 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 6 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 8 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 10 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 11 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 12 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 13 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 14 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 15 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 16 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(3, ~#usb_acecad_id_table~0.base, 24 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 26 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(8, ~#usb_acecad_id_table~0.base, 28 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 30 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 32 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 34 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 35 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 36 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 37 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 38 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 39 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(1, ~#usb_acecad_id_table~0.base, 40 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(0, ~#usb_acecad_id_table~0.base, 48 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 50 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 52 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 54 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 56 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 58 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 59 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 60 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 61 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 62 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 63 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 64 + ~#usb_acecad_id_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.driver_info := 0;~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset := 15, 0;call #Ultimate.allocInit(264, 15);call write~init~$Pointer$(12, 0, ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_probe.base, #funAddr~usb_acecad_probe.offset, ~#usb_acecad_driver~0.base, 8 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_disconnect.base, #funAddr~usb_acecad_disconnect.offset, ~#usb_acecad_driver~0.base, 16 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 24 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 32 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 40 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 48 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 56 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 64 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, ~#usb_acecad_driver~0.base, 72 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 80 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 84 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 88 + ~#usb_acecad_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 92 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 100 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 108 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 116 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 124 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 132 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 136 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 144 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 152 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 160 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 168 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 176 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 184 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 192 + ~#usb_acecad_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 193 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 201 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 209 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 217 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 225 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 233 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 241 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 249 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 257 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 261 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 262 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 263 + ~#usb_acecad_driver~0.offset, 1);~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {28360#true} is VALID [2022-02-20 22:07:14,213 INFO L290 TraceCheckUtils]: 1: Hoare triple {28360#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret183#1.base, main_#t~ret183#1.offset, main_#t~nondet184#1, main_#t~switch185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~ret188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~ret191#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~17#1.base, main_~tmp~17#1.offset, main_~tmp___0~6#1, main_~tmp___1~3#1, main_~tmp___2~1#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~17#1.base, main_~tmp~17#1.offset;havoc main_~tmp___0~6#1;havoc main_~tmp___1~3#1;havoc main_~tmp___2~1#1; {28360#true} is VALID [2022-02-20 22:07:14,213 INFO L272 TraceCheckUtils]: 2: Hoare triple {28360#true} call main_#t~ret183#1.base, main_#t~ret183#1.offset := ldv_init_zalloc(24); {28440#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:14,214 INFO L290 TraceCheckUtils]: 3: Hoare triple {28440#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {28360#true} is VALID [2022-02-20 22:07:14,214 INFO L272 TraceCheckUtils]: 4: Hoare triple {28360#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {28448#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:14,215 INFO L290 TraceCheckUtils]: 5: Hoare triple {28448#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {28360#true} is VALID [2022-02-20 22:07:14,215 INFO L290 TraceCheckUtils]: 6: Hoare triple {28360#true} assume true; {28360#true} is VALID [2022-02-20 22:07:14,215 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {28360#true} {28360#true} #538#return; {28360#true} is VALID [2022-02-20 22:07:14,215 INFO L290 TraceCheckUtils]: 8: Hoare triple {28360#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {28360#true} is VALID [2022-02-20 22:07:14,215 INFO L272 TraceCheckUtils]: 9: Hoare triple {28360#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {28360#true} is VALID [2022-02-20 22:07:14,215 INFO L290 TraceCheckUtils]: 10: Hoare triple {28360#true} ~cond := #in~cond; {28360#true} is VALID [2022-02-20 22:07:14,215 INFO L290 TraceCheckUtils]: 11: Hoare triple {28360#true} assume !(0 == ~cond); {28360#true} is VALID [2022-02-20 22:07:14,216 INFO L290 TraceCheckUtils]: 12: Hoare triple {28360#true} assume true; {28360#true} is VALID [2022-02-20 22:07:14,216 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {28360#true} {28360#true} #540#return; {28360#true} is VALID [2022-02-20 22:07:14,216 INFO L290 TraceCheckUtils]: 14: Hoare triple {28360#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {28360#true} is VALID [2022-02-20 22:07:14,216 INFO L290 TraceCheckUtils]: 15: Hoare triple {28360#true} assume true; {28360#true} is VALID [2022-02-20 22:07:14,216 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {28360#true} {28360#true} #544#return; {28360#true} is VALID [2022-02-20 22:07:14,216 INFO L290 TraceCheckUtils]: 17: Hoare triple {28360#true} main_~tmp~17#1.base, main_~tmp~17#1.offset := main_#t~ret183#1.base, main_#t~ret183#1.offset;havoc main_#t~ret183#1.base, main_#t~ret183#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~17#1.base, main_~tmp~17#1.offset;assume { :begin_inline_ldv_initialize } true; {28360#true} is VALID [2022-02-20 22:07:14,217 INFO L290 TraceCheckUtils]: 18: Hoare triple {28360#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1; {28376#(= ~ldv_state_variable_1~0 0)} is VALID [2022-02-20 22:07:14,217 INFO L290 TraceCheckUtils]: 19: Hoare triple {28376#(= ~ldv_state_variable_1~0 0)} assume -2147483648 <= main_#t~nondet184#1 && main_#t~nondet184#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet184#1;havoc main_#t~nondet184#1;main_#t~switch185#1 := 0 == main_~tmp___0~6#1; {28376#(= ~ldv_state_variable_1~0 0)} is VALID [2022-02-20 22:07:14,217 INFO L290 TraceCheckUtils]: 20: Hoare triple {28376#(= ~ldv_state_variable_1~0 0)} assume main_#t~switch185#1; {28376#(= ~ldv_state_variable_1~0 0)} is VALID [2022-02-20 22:07:14,218 INFO L290 TraceCheckUtils]: 21: Hoare triple {28376#(= ~ldv_state_variable_1~0 0)} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= main_#t~nondet186#1 && main_#t~nondet186#1 <= 2147483647;main_~tmp___1~3#1 := main_#t~nondet186#1;havoc main_#t~nondet186#1;main_#t~switch187#1 := 0 == main_~tmp___1~3#1; {28361#false} is VALID [2022-02-20 22:07:14,218 INFO L290 TraceCheckUtils]: 22: Hoare triple {28361#false} assume main_#t~switch187#1; {28361#false} is VALID [2022-02-20 22:07:14,219 INFO L290 TraceCheckUtils]: 23: Hoare triple {28361#false} assume 1 == ~ldv_state_variable_1~0;assume { :begin_inline_usb_acecad_probe } true;usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset, usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset := ~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc usb_acecad_probe_#res#1;havoc usb_acecad_probe_#t~ret127#1.base, usb_acecad_probe_#t~ret127#1.offset, usb_acecad_probe_#t~mem128#1.base, usb_acecad_probe_#t~mem128#1.offset, usb_acecad_probe_#t~mem129#1, usb_acecad_probe_#t~mem130#1.base, usb_acecad_probe_#t~mem130#1.offset, usb_acecad_probe_#t~ret131#1, usb_acecad_probe_#t~mem132#1, usb_acecad_probe_#t~ret133#1, usb_acecad_probe_#t~ret134#1, usb_acecad_probe_#t~ret135#1.base, usb_acecad_probe_#t~ret135#1.offset, usb_acecad_probe_#t~ret136#1.base, usb_acecad_probe_#t~ret136#1.offset, usb_acecad_probe_#t~ret137#1.base, usb_acecad_probe_#t~ret137#1.offset, usb_acecad_probe_#t~mem138#1.base, usb_acecad_probe_#t~mem138#1.offset, usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset, usb_acecad_probe_#t~mem140#1.base, usb_acecad_probe_#t~mem140#1.offset, usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset, usb_acecad_probe_#t~mem142#1.base, usb_acecad_probe_#t~mem142#1.offset, usb_acecad_probe_#t~ret143#1, usb_acecad_probe_#t~mem144#1.base, usb_acecad_probe_#t~mem144#1.offset, usb_acecad_probe_#t~mem145#1.base, usb_acecad_probe_#t~mem145#1.offset, usb_acecad_probe_#t~ret146#1, usb_acecad_probe_#t~mem147#1.base, usb_acecad_probe_#t~mem147#1.offset, usb_acecad_probe_#t~ret148#1, usb_acecad_probe_#t~ret149#1, usb_acecad_probe_#t~ret150#1, usb_acecad_probe_#t~mem151#1, usb_acecad_probe_#t~switch152#1, usb_acecad_probe_#t~nondet153#1, usb_acecad_probe_#t~nondet154#1, usb_acecad_probe_#t~mem155#1, usb_acecad_probe_#t~mem156#1, usb_acecad_probe_#t~nondet157#1, usb_acecad_probe_#t~nondet158#1, usb_acecad_probe_#t~mem159#1, usb_acecad_probe_#t~mem160#1, usb_acecad_probe_#t~mem161#1.base, usb_acecad_probe_#t~mem161#1.offset, usb_acecad_probe_#t~mem162#1.base, usb_acecad_probe_#t~mem162#1.offset, usb_acecad_probe_#t~ite163#1, usb_acecad_probe_#t~mem164#1, usb_acecad_probe_#t~mem165#1.base, usb_acecad_probe_#t~mem165#1.offset, usb_acecad_probe_#t~mem166#1, usb_acecad_probe_#t~mem167#1.base, usb_acecad_probe_#t~mem167#1.offset, usb_acecad_probe_#t~mem168#1.base, usb_acecad_probe_#t~mem168#1.offset, usb_acecad_probe_#t~mem169#1, usb_acecad_probe_#t~mem170#1.base, usb_acecad_probe_#t~mem170#1.offset, usb_acecad_probe_#t~ret171#1, usb_acecad_probe_#t~mem172#1.base, usb_acecad_probe_#t~mem172#1.offset, usb_acecad_probe_#t~mem173#1, usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset, usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset, usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset, usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset, usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset, usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset, usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset, usb_acecad_probe_~pipe~0#1, usb_acecad_probe_~maxp~0#1, usb_acecad_probe_~err~0#1, usb_acecad_probe_~tmp___0~5#1, usb_acecad_probe_~tmp___1~2#1, usb_acecad_probe_~tmp___2~0#1, usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset, usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~tmp___5~0#1, usb_acecad_probe_~tmp___6~0#1;usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset := usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset;usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset := usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset;havoc usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset;havoc usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;havoc usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset;havoc usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset;havoc usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset;havoc usb_acecad_probe_~pipe~0#1;havoc usb_acecad_probe_~maxp~0#1;havoc usb_acecad_probe_~err~0#1;havoc usb_acecad_probe_~tmp___0~5#1;havoc usb_acecad_probe_~tmp___1~2#1;havoc usb_acecad_probe_~tmp___2~0#1;havoc usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;havoc usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset;havoc usb_acecad_probe_~tmp___5~0#1;havoc usb_acecad_probe_~tmp___6~0#1;assume { :begin_inline_interface_to_usbdev } true;interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset := usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset;havoc interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;havoc interface_to_usbdev_#t~ret192#1.base, interface_to_usbdev_#t~ret192#1.offset, interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset, interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset := interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset;havoc interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;assume { :begin_inline_ldv_interface_to_usbdev } true;havoc ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;havoc ldv_interface_to_usbdev_#t~ret203#1.base, ldv_interface_to_usbdev_#t~ret203#1.offset, ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset, ldv_interface_to_usbdev_~tmp~26#1.base, ldv_interface_to_usbdev_~tmp~26#1.offset;havoc ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset;havoc ldv_interface_to_usbdev_~tmp~26#1.base, ldv_interface_to_usbdev_~tmp~26#1.offset; {28361#false} is VALID [2022-02-20 22:07:14,219 INFO L272 TraceCheckUtils]: 24: Hoare triple {28361#false} call ldv_interface_to_usbdev_#t~ret203#1.base, ldv_interface_to_usbdev_#t~ret203#1.offset := ldv_malloc(1822); {28449#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:14,219 INFO L290 TraceCheckUtils]: 25: Hoare triple {28449#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {28360#true} is VALID [2022-02-20 22:07:14,219 INFO L290 TraceCheckUtils]: 26: Hoare triple {28360#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {28360#true} is VALID [2022-02-20 22:07:14,219 INFO L290 TraceCheckUtils]: 27: Hoare triple {28360#true} assume true; {28360#true} is VALID [2022-02-20 22:07:14,220 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {28360#true} {28361#false} #546#return; {28361#false} is VALID [2022-02-20 22:07:14,220 INFO L290 TraceCheckUtils]: 29: Hoare triple {28361#false} ldv_interface_to_usbdev_~tmp~26#1.base, ldv_interface_to_usbdev_~tmp~26#1.offset := ldv_interface_to_usbdev_#t~ret203#1.base, ldv_interface_to_usbdev_#t~ret203#1.offset;havoc ldv_interface_to_usbdev_#t~ret203#1.base, ldv_interface_to_usbdev_#t~ret203#1.offset;ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset := ldv_interface_to_usbdev_~tmp~26#1.base, ldv_interface_to_usbdev_~tmp~26#1.offset; {28361#false} is VALID [2022-02-20 22:07:14,220 INFO L290 TraceCheckUtils]: 30: Hoare triple {28361#false} assume !(0 == (ldv_interface_to_usbdev_~result~1#1.base + ldv_interface_to_usbdev_~result~1#1.offset) % 18446744073709551616); {28361#false} is VALID [2022-02-20 22:07:14,220 INFO L290 TraceCheckUtils]: 31: Hoare triple {28361#false} ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset := ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset; {28361#false} is VALID [2022-02-20 22:07:14,220 INFO L290 TraceCheckUtils]: 32: Hoare triple {28361#false} interface_to_usbdev_#t~ret192#1.base, interface_to_usbdev_#t~ret192#1.offset := ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;assume { :end_inline_ldv_interface_to_usbdev } true;interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset := interface_to_usbdev_#t~ret192#1.base, interface_to_usbdev_#t~ret192#1.offset;havoc interface_to_usbdev_#t~ret192#1.base, interface_to_usbdev_#t~ret192#1.offset;interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset := interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset; {28361#false} is VALID [2022-02-20 22:07:14,225 INFO L290 TraceCheckUtils]: 33: Hoare triple {28361#false} usb_acecad_probe_#t~ret127#1.base, usb_acecad_probe_#t~ret127#1.offset := interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;assume { :end_inline_interface_to_usbdev } true;usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset := usb_acecad_probe_#t~ret127#1.base, usb_acecad_probe_#t~ret127#1.offset;havoc usb_acecad_probe_#t~ret127#1.base, usb_acecad_probe_#t~ret127#1.offset;usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset := usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;call usb_acecad_probe_#t~mem128#1.base, usb_acecad_probe_#t~mem128#1.offset := read~$Pointer$(usb_acecad_probe_~intf#1.base, 8 + usb_acecad_probe_~intf#1.offset, 8);usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset := usb_acecad_probe_#t~mem128#1.base, usb_acecad_probe_#t~mem128#1.offset;havoc usb_acecad_probe_#t~mem128#1.base, usb_acecad_probe_#t~mem128#1.offset;call usb_acecad_probe_#t~mem129#1 := read~int(usb_acecad_probe_~interface~0#1.base, 4 + usb_acecad_probe_~interface~0#1.offset, 1); {28361#false} is VALID [2022-02-20 22:07:14,226 INFO L290 TraceCheckUtils]: 34: Hoare triple {28361#false} assume !(1 != usb_acecad_probe_#t~mem129#1 % 256 % 4294967296);havoc usb_acecad_probe_#t~mem129#1;call usb_acecad_probe_#t~mem130#1.base, usb_acecad_probe_#t~mem130#1.offset := read~$Pointer$(usb_acecad_probe_~interface~0#1.base, 9 + usb_acecad_probe_~interface~0#1.offset, 8);usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset := usb_acecad_probe_#t~mem130#1.base, usb_acecad_probe_#t~mem130#1.offset;havoc usb_acecad_probe_#t~mem130#1.base, usb_acecad_probe_#t~mem130#1.offset;assume { :begin_inline_usb_endpoint_is_int_in } true;usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset := usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_endpoint_is_int_in_#res#1;havoc usb_endpoint_is_int_in_#t~ret3#1, usb_endpoint_is_int_in_#t~ret4#1, usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset, usb_endpoint_is_int_in_~tmp~0#1, usb_endpoint_is_int_in_~tmp___0~0#1, usb_endpoint_is_int_in_~tmp___1~0#1;usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset := usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset;havoc usb_endpoint_is_int_in_~tmp~0#1;havoc usb_endpoint_is_int_in_~tmp___0~0#1;havoc usb_endpoint_is_int_in_~tmp___1~0#1;assume { :begin_inline_usb_endpoint_xfer_int } true;usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset := usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset;havoc usb_endpoint_xfer_int_#res#1;havoc usb_endpoint_xfer_int_#t~mem2#1, usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset;usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset := usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset;call usb_endpoint_xfer_int_#t~mem2#1 := read~int(usb_endpoint_xfer_int_~epd#1.base, 3 + usb_endpoint_xfer_int_~epd#1.offset, 1);usb_endpoint_xfer_int_#res#1 := (if 3 == (if 0 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 0 else (if 1 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 1 else ~bitwiseAnd(usb_endpoint_xfer_int_#t~mem2#1 % 256, 3))) then 1 else 0);havoc usb_endpoint_xfer_int_#t~mem2#1; {28361#false} is VALID [2022-02-20 22:07:14,226 INFO L290 TraceCheckUtils]: 35: Hoare triple {28361#false} usb_endpoint_is_int_in_#t~ret3#1 := usb_endpoint_xfer_int_#res#1;assume { :end_inline_usb_endpoint_xfer_int } true;assume -2147483648 <= usb_endpoint_is_int_in_#t~ret3#1 && usb_endpoint_is_int_in_#t~ret3#1 <= 2147483647;usb_endpoint_is_int_in_~tmp~0#1 := usb_endpoint_is_int_in_#t~ret3#1;havoc usb_endpoint_is_int_in_#t~ret3#1; {28361#false} is VALID [2022-02-20 22:07:14,226 INFO L290 TraceCheckUtils]: 36: Hoare triple {28361#false} assume !(0 != usb_endpoint_is_int_in_~tmp~0#1);usb_endpoint_is_int_in_~tmp___1~0#1 := 0; {28361#false} is VALID [2022-02-20 22:07:14,226 INFO L290 TraceCheckUtils]: 37: Hoare triple {28361#false} usb_endpoint_is_int_in_#res#1 := usb_endpoint_is_int_in_~tmp___1~0#1; {28361#false} is VALID [2022-02-20 22:07:14,226 INFO L290 TraceCheckUtils]: 38: Hoare triple {28361#false} usb_acecad_probe_#t~ret131#1 := usb_endpoint_is_int_in_#res#1;assume { :end_inline_usb_endpoint_is_int_in } true;assume -2147483648 <= usb_acecad_probe_#t~ret131#1 && usb_acecad_probe_#t~ret131#1 <= 2147483647;usb_acecad_probe_~tmp___0~5#1 := usb_acecad_probe_#t~ret131#1;havoc usb_acecad_probe_#t~ret131#1; {28361#false} is VALID [2022-02-20 22:07:14,227 INFO L290 TraceCheckUtils]: 39: Hoare triple {28361#false} assume !(0 == usb_acecad_probe_~tmp___0~5#1);call usb_acecad_probe_#t~mem132#1 := read~int(usb_acecad_probe_~endpoint~0#1.base, 2 + usb_acecad_probe_~endpoint~0#1.offset, 1);assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_#t~mem132#1 % 256;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem42#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem42#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := (if (1 == 256 * __create_pipe_#t~mem42#1 || 0 == 256 * __create_pipe_#t~mem42#1) && 0 == 32768 * __create_pipe_~endpoint#1 then 256 * __create_pipe_#t~mem42#1 else (if 0 == 256 * __create_pipe_#t~mem42#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1) then 32768 * __create_pipe_~endpoint#1 else (if (1 == 256 * __create_pipe_#t~mem42#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1)) || ((1 == 256 * __create_pipe_#t~mem42#1 || 0 == 256 * __create_pipe_#t~mem42#1) && 1 == 32768 * __create_pipe_~endpoint#1) then 1 else ~bitwiseOr(256 * __create_pipe_#t~mem42#1, 32768 * __create_pipe_~endpoint#1))));havoc __create_pipe_#t~mem42#1; {28361#false} is VALID [2022-02-20 22:07:14,228 INFO L290 TraceCheckUtils]: 40: Hoare triple {28361#false} usb_acecad_probe_#t~ret133#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;usb_acecad_probe_~tmp___1~2#1 := usb_acecad_probe_#t~ret133#1;havoc usb_acecad_probe_#t~mem132#1;havoc usb_acecad_probe_#t~ret133#1;usb_acecad_probe_~pipe~0#1 := (if ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 else ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 - 4294967296);assume { :begin_inline_usb_maxpacket } true;usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset, usb_maxpacket_#in~pipe#1, usb_maxpacket_#in~is_out#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~pipe~0#1, (if 0 == (if 0 == usb_acecad_probe_~pipe~0#1 then 0 else (if 1 == usb_acecad_probe_~pipe~0#1 then 0 else ~bitwiseAnd(usb_acecad_probe_~pipe~0#1, 128))) then 1 else 0);havoc usb_maxpacket_#res#1;havoc usb_maxpacket_#t~ret44#1, usb_maxpacket_#t~ret45#1, usb_maxpacket_#t~mem46#1.base, usb_maxpacket_#t~mem46#1.offset, usb_maxpacket_#t~ret47#1, usb_maxpacket_#t~ret48#1, usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset, usb_maxpacket_#t~mem50#1, usb_maxpacket_#t~nondet43#1, usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset, usb_maxpacket_~pipe#1, usb_maxpacket_~is_out#1, usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset, usb_maxpacket_~epnum~0#1, usb_maxpacket_~__ret_warn_on~0#1, usb_maxpacket_~tmp~2#1, usb_maxpacket_~__ret_warn_on___0~0#1, usb_maxpacket_~tmp___0~1#1;usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset := usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset;usb_maxpacket_~pipe#1 := usb_maxpacket_#in~pipe#1;usb_maxpacket_~is_out#1 := usb_maxpacket_#in~is_out#1;havoc usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset;havoc usb_maxpacket_~epnum~0#1;havoc usb_maxpacket_~__ret_warn_on~0#1;havoc usb_maxpacket_~tmp~2#1;havoc usb_maxpacket_~__ret_warn_on___0~0#1;havoc usb_maxpacket_~tmp___0~1#1; {28361#false} is VALID [2022-02-20 22:07:14,228 INFO L290 TraceCheckUtils]: 41: Hoare triple {28361#false} assume 0 == usb_maxpacket_~pipe#1 / 32768;usb_maxpacket_~epnum~0#1 := 0; {28361#false} is VALID [2022-02-20 22:07:14,228 INFO L290 TraceCheckUtils]: 42: Hoare triple {28361#false} assume !(0 != usb_maxpacket_~is_out#1);usb_maxpacket_~__ret_warn_on___0~0#1 := (if 0 == (if 0 == usb_maxpacket_~pipe#1 then 0 else (if 1 == usb_maxpacket_~pipe#1 then 0 else ~bitwiseAnd(usb_maxpacket_~pipe#1, 128))) then 1 else 0); {28361#false} is VALID [2022-02-20 22:07:14,228 INFO L272 TraceCheckUtils]: 43: Hoare triple {28361#false} call usb_maxpacket_#t~ret47#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {28360#true} is VALID [2022-02-20 22:07:14,228 INFO L290 TraceCheckUtils]: 44: Hoare triple {28360#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {28360#true} is VALID [2022-02-20 22:07:14,228 INFO L290 TraceCheckUtils]: 45: Hoare triple {28360#true} assume true; {28360#true} is VALID [2022-02-20 22:07:14,228 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {28360#true} {28361#false} #556#return; {28361#false} is VALID [2022-02-20 22:07:14,229 INFO L290 TraceCheckUtils]: 47: Hoare triple {28361#false} assume -9223372036854775808 <= usb_maxpacket_#t~ret47#1 && usb_maxpacket_#t~ret47#1 <= 9223372036854775807;usb_maxpacket_~tmp___0~1#1 := usb_maxpacket_#t~ret47#1;havoc usb_maxpacket_#t~ret47#1; {28361#false} is VALID [2022-02-20 22:07:14,229 INFO L290 TraceCheckUtils]: 48: Hoare triple {28361#false} assume !(0 != usb_maxpacket_~tmp___0~1#1); {28361#false} is VALID [2022-02-20 22:07:14,229 INFO L272 TraceCheckUtils]: 49: Hoare triple {28361#false} call usb_maxpacket_#t~ret48#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {28360#true} is VALID [2022-02-20 22:07:14,229 INFO L290 TraceCheckUtils]: 50: Hoare triple {28360#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {28360#true} is VALID [2022-02-20 22:07:14,229 INFO L290 TraceCheckUtils]: 51: Hoare triple {28360#true} assume true; {28360#true} is VALID [2022-02-20 22:07:14,229 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {28360#true} {28361#false} #560#return; {28361#false} is VALID [2022-02-20 22:07:14,229 INFO L290 TraceCheckUtils]: 53: Hoare triple {28361#false} assume -9223372036854775808 <= usb_maxpacket_#t~ret48#1 && usb_maxpacket_#t~ret48#1 <= 9223372036854775807;havoc usb_maxpacket_#t~ret48#1;call usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset := read~$Pointer$(usb_maxpacket_~udev#1.base, 1186 + usb_maxpacket_~udev#1.offset + 8 * (usb_maxpacket_~epnum~0#1 % 4294967296), 8);usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset := usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset;havoc usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset; {28361#false} is VALID [2022-02-20 22:07:14,230 INFO L290 TraceCheckUtils]: 54: Hoare triple {28361#false} assume 0 == (usb_maxpacket_~ep~0#1.base + usb_maxpacket_~ep~0#1.offset) % 18446744073709551616;usb_maxpacket_#res#1 := 0; {28361#false} is VALID [2022-02-20 22:07:14,230 INFO L290 TraceCheckUtils]: 55: Hoare triple {28361#false} usb_acecad_probe_#t~ret134#1 := usb_maxpacket_#res#1;assume { :end_inline_usb_maxpacket } true;usb_acecad_probe_~tmp___2~0#1 := usb_acecad_probe_#t~ret134#1;havoc usb_acecad_probe_#t~ret134#1;usb_acecad_probe_~maxp~0#1 := usb_acecad_probe_~tmp___2~0#1 % 65536; {28361#false} is VALID [2022-02-20 22:07:14,230 INFO L272 TraceCheckUtils]: 56: Hoare triple {28361#false} call usb_acecad_probe_#t~ret135#1.base, usb_acecad_probe_#t~ret135#1.offset := kzalloc(232, 208); {28449#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:14,230 INFO L290 TraceCheckUtils]: 57: Hoare triple {28449#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {28360#true} is VALID [2022-02-20 22:07:14,231 INFO L272 TraceCheckUtils]: 58: Hoare triple {28360#true} call __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset := ldv_malloc(__kmalloc_~size#1); {28449#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:14,231 INFO L290 TraceCheckUtils]: 59: Hoare triple {28449#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {28360#true} is VALID [2022-02-20 22:07:14,231 INFO L290 TraceCheckUtils]: 60: Hoare triple {28360#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {28360#true} is VALID [2022-02-20 22:07:14,231 INFO L290 TraceCheckUtils]: 61: Hoare triple {28360#true} assume true; {28360#true} is VALID [2022-02-20 22:07:14,231 INFO L284 TraceCheckUtils]: 62: Hoare quadruple {28360#true} {28360#true} #530#return; {28360#true} is VALID [2022-02-20 22:07:14,232 INFO L290 TraceCheckUtils]: 63: Hoare triple {28360#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset; {28360#true} is VALID [2022-02-20 22:07:14,232 INFO L290 TraceCheckUtils]: 64: Hoare triple {28360#true} kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {28360#true} is VALID [2022-02-20 22:07:14,232 INFO L290 TraceCheckUtils]: 65: Hoare triple {28360#true} #t~ret55#1.base, #t~ret55#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret55#1.base, #t~ret55#1.offset;havoc #t~ret55#1.base, #t~ret55#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {28360#true} is VALID [2022-02-20 22:07:14,232 INFO L290 TraceCheckUtils]: 66: Hoare triple {28360#true} assume true; {28360#true} is VALID [2022-02-20 22:07:14,232 INFO L284 TraceCheckUtils]: 67: Hoare quadruple {28360#true} {28361#false} #562#return; {28361#false} is VALID [2022-02-20 22:07:14,232 INFO L290 TraceCheckUtils]: 68: Hoare triple {28361#false} usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset := usb_acecad_probe_#t~ret135#1.base, usb_acecad_probe_#t~ret135#1.offset;havoc usb_acecad_probe_#t~ret135#1.base, usb_acecad_probe_#t~ret135#1.offset;usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset := usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;assume { :begin_inline_input_allocate_device } true;havoc input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;havoc input_allocate_device_#t~ret67#1.base, input_allocate_device_#t~ret67#1.offset; {28361#false} is VALID [2022-02-20 22:07:14,232 INFO L272 TraceCheckUtils]: 69: Hoare triple {28361#false} call input_allocate_device_#t~ret67#1.base, input_allocate_device_#t~ret67#1.offset := kzalloc(1855, ~bitwiseOr(~bitwiseOr(16, 64), 128)); {28449#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:14,233 INFO L290 TraceCheckUtils]: 70: Hoare triple {28449#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {28360#true} is VALID [2022-02-20 22:07:14,233 INFO L272 TraceCheckUtils]: 71: Hoare triple {28360#true} call __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset := ldv_malloc(__kmalloc_~size#1); {28449#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:14,233 INFO L290 TraceCheckUtils]: 72: Hoare triple {28449#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {28360#true} is VALID [2022-02-20 22:07:14,233 INFO L290 TraceCheckUtils]: 73: Hoare triple {28360#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {28360#true} is VALID [2022-02-20 22:07:14,234 INFO L290 TraceCheckUtils]: 74: Hoare triple {28360#true} assume true; {28360#true} is VALID [2022-02-20 22:07:14,234 INFO L284 TraceCheckUtils]: 75: Hoare quadruple {28360#true} {28360#true} #530#return; {28360#true} is VALID [2022-02-20 22:07:14,234 INFO L290 TraceCheckUtils]: 76: Hoare triple {28360#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset; {28360#true} is VALID [2022-02-20 22:07:14,234 INFO L290 TraceCheckUtils]: 77: Hoare triple {28360#true} kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {28360#true} is VALID [2022-02-20 22:07:14,234 INFO L290 TraceCheckUtils]: 78: Hoare triple {28360#true} #t~ret55#1.base, #t~ret55#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret55#1.base, #t~ret55#1.offset;havoc #t~ret55#1.base, #t~ret55#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {28360#true} is VALID [2022-02-20 22:07:14,234 INFO L290 TraceCheckUtils]: 79: Hoare triple {28360#true} assume true; {28360#true} is VALID [2022-02-20 22:07:14,234 INFO L284 TraceCheckUtils]: 80: Hoare quadruple {28360#true} {28361#false} #564#return; {28361#false} is VALID [2022-02-20 22:07:14,235 INFO L290 TraceCheckUtils]: 81: Hoare triple {28361#false} input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset := input_allocate_device_#t~ret67#1.base, input_allocate_device_#t~ret67#1.offset;havoc input_allocate_device_#t~ret67#1.base, input_allocate_device_#t~ret67#1.offset; {28361#false} is VALID [2022-02-20 22:07:14,235 INFO L290 TraceCheckUtils]: 82: Hoare triple {28361#false} usb_acecad_probe_#t~ret136#1.base, usb_acecad_probe_#t~ret136#1.offset := input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;assume { :end_inline_input_allocate_device } true;usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset := usb_acecad_probe_#t~ret136#1.base, usb_acecad_probe_#t~ret136#1.offset;havoc usb_acecad_probe_#t~ret136#1.base, usb_acecad_probe_#t~ret136#1.offset; {28361#false} is VALID [2022-02-20 22:07:14,235 INFO L290 TraceCheckUtils]: 83: Hoare triple {28361#false} assume !(0 == (usb_acecad_probe_~acecad~3#1.base + usb_acecad_probe_~acecad~3#1.offset) % 18446744073709551616 || 0 == (usb_acecad_probe_~input_dev~0#1.base + usb_acecad_probe_~input_dev~0#1.offset) % 18446744073709551616);assume { :begin_inline_usb_alloc_coherent } true;usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset, usb_alloc_coherent_#in~arg1#1, usb_alloc_coherent_#in~arg2#1, usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, 8, 208, usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset;havoc usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;havoc usb_alloc_coherent_#t~ret212#1.base, usb_alloc_coherent_#t~ret212#1.offset, usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset, usb_alloc_coherent_~arg1#1, usb_alloc_coherent_~arg2#1, usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset;usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset := usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset;usb_alloc_coherent_~arg1#1 := usb_alloc_coherent_#in~arg1#1;usb_alloc_coherent_~arg2#1 := usb_alloc_coherent_#in~arg2#1;usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset := usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset; {28361#false} is VALID [2022-02-20 22:07:14,235 INFO L272 TraceCheckUtils]: 84: Hoare triple {28361#false} call usb_alloc_coherent_#t~ret212#1.base, usb_alloc_coherent_#t~ret212#1.offset := ldv_malloc(0); {28449#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:14,236 INFO L290 TraceCheckUtils]: 85: Hoare triple {28449#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {28360#true} is VALID [2022-02-20 22:07:14,236 INFO L290 TraceCheckUtils]: 86: Hoare triple {28360#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {28360#true} is VALID [2022-02-20 22:07:14,236 INFO L290 TraceCheckUtils]: 87: Hoare triple {28360#true} assume true; {28360#true} is VALID [2022-02-20 22:07:14,236 INFO L284 TraceCheckUtils]: 88: Hoare quadruple {28360#true} {28361#false} #566#return; {28361#false} is VALID [2022-02-20 22:07:14,236 INFO L290 TraceCheckUtils]: 89: Hoare triple {28361#false} usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset := usb_alloc_coherent_#t~ret212#1.base, usb_alloc_coherent_#t~ret212#1.offset;havoc usb_alloc_coherent_#t~ret212#1.base, usb_alloc_coherent_#t~ret212#1.offset; {28361#false} is VALID [2022-02-20 22:07:14,236 INFO L290 TraceCheckUtils]: 90: Hoare triple {28361#false} usb_acecad_probe_#t~ret137#1.base, usb_acecad_probe_#t~ret137#1.offset := usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;assume { :end_inline_usb_alloc_coherent } true;usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset := usb_acecad_probe_#t~ret137#1.base, usb_acecad_probe_#t~ret137#1.offset;havoc usb_acecad_probe_#t~ret137#1.base, usb_acecad_probe_#t~ret137#1.offset;call write~$Pointer$(usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem138#1.base, usb_acecad_probe_#t~mem138#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8); {28361#false} is VALID [2022-02-20 22:07:14,237 INFO L290 TraceCheckUtils]: 91: Hoare triple {28361#false} assume !(0 == (usb_acecad_probe_#t~mem138#1.base + usb_acecad_probe_#t~mem138#1.offset) % 18446744073709551616);havoc usb_acecad_probe_#t~mem138#1.base, usb_acecad_probe_#t~mem138#1.offset;assume { :begin_inline_ldv_usb_alloc_urb_5 } true;ldv_usb_alloc_urb_5_#in~iso_packets#1, ldv_usb_alloc_urb_5_#in~mem_flags#1 := 0, 208;havoc ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret196#1.base, ldv_usb_alloc_urb_5_#t~ret196#1.offset, ldv_usb_alloc_urb_5_~iso_packets#1, ldv_usb_alloc_urb_5_~mem_flags#1, ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;ldv_usb_alloc_urb_5_~iso_packets#1 := ldv_usb_alloc_urb_5_#in~iso_packets#1;ldv_usb_alloc_urb_5_~mem_flags#1 := ldv_usb_alloc_urb_5_#in~mem_flags#1;havoc ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;assume { :begin_inline_ldv_alloc_urb } true;havoc ldv_alloc_urb_#res#1.base, ldv_alloc_urb_#res#1.offset;havoc ldv_alloc_urb_#t~ret198#1.base, ldv_alloc_urb_#t~ret198#1.offset, ldv_alloc_urb_#t~ret199#1, ldv_alloc_urb_~value~0#1.base, ldv_alloc_urb_~value~0#1.offset, ldv_alloc_urb_~tmp~24#1.base, ldv_alloc_urb_~tmp~24#1.offset, ldv_alloc_urb_~tmp___0~7#1;havoc ldv_alloc_urb_~value~0#1.base, ldv_alloc_urb_~value~0#1.offset;havoc ldv_alloc_urb_~tmp~24#1.base, ldv_alloc_urb_~tmp~24#1.offset;havoc ldv_alloc_urb_~tmp___0~7#1; {28361#false} is VALID [2022-02-20 22:07:14,237 INFO L272 TraceCheckUtils]: 92: Hoare triple {28361#false} call ldv_alloc_urb_#t~ret198#1.base, ldv_alloc_urb_#t~ret198#1.offset := ldv_malloc(180); {28449#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:14,237 INFO L290 TraceCheckUtils]: 93: Hoare triple {28449#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {28360#true} is VALID [2022-02-20 22:07:14,237 INFO L290 TraceCheckUtils]: 94: Hoare triple {28360#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {28360#true} is VALID [2022-02-20 22:07:14,237 INFO L290 TraceCheckUtils]: 95: Hoare triple {28360#true} assume true; {28360#true} is VALID [2022-02-20 22:07:14,237 INFO L284 TraceCheckUtils]: 96: Hoare quadruple {28360#true} {28361#false} #568#return; {28361#false} is VALID [2022-02-20 22:07:14,237 INFO L290 TraceCheckUtils]: 97: Hoare triple {28361#false} ldv_alloc_urb_~tmp~24#1.base, ldv_alloc_urb_~tmp~24#1.offset := ldv_alloc_urb_#t~ret198#1.base, ldv_alloc_urb_#t~ret198#1.offset;havoc ldv_alloc_urb_#t~ret198#1.base, ldv_alloc_urb_#t~ret198#1.offset;ldv_alloc_urb_~value~0#1.base, ldv_alloc_urb_~value~0#1.offset := ldv_alloc_urb_~tmp~24#1.base, ldv_alloc_urb_~tmp~24#1.offset; {28361#false} is VALID [2022-02-20 22:07:14,238 INFO L272 TraceCheckUtils]: 98: Hoare triple {28361#false} call ldv_alloc_urb_#t~ret199#1 := ldv_undef_int(); {28360#true} is VALID [2022-02-20 22:07:14,238 INFO L290 TraceCheckUtils]: 99: Hoare triple {28360#true} havoc ~tmp~8;assume -2147483648 <= #t~nondet65 && #t~nondet65 <= 2147483647;~tmp~8 := #t~nondet65;havoc #t~nondet65;#res := ~tmp~8; {28360#true} is VALID [2022-02-20 22:07:14,238 INFO L290 TraceCheckUtils]: 100: Hoare triple {28360#true} assume true; {28360#true} is VALID [2022-02-20 22:07:14,238 INFO L284 TraceCheckUtils]: 101: Hoare quadruple {28360#true} {28361#false} #570#return; {28361#false} is VALID [2022-02-20 22:07:14,239 INFO L290 TraceCheckUtils]: 102: Hoare triple {28361#false} assume -2147483648 <= ldv_alloc_urb_#t~ret199#1 && ldv_alloc_urb_#t~ret199#1 <= 2147483647;ldv_alloc_urb_~tmp___0~7#1 := ldv_alloc_urb_#t~ret199#1;havoc ldv_alloc_urb_#t~ret199#1; {28361#false} is VALID [2022-02-20 22:07:14,239 INFO L290 TraceCheckUtils]: 103: Hoare triple {28361#false} assume 0 != ldv_alloc_urb_~tmp___0~7#1; {28361#false} is VALID [2022-02-20 22:07:14,239 INFO L290 TraceCheckUtils]: 104: Hoare triple {28361#false} assume 0 != (ldv_alloc_urb_~value~0#1.base + ldv_alloc_urb_~value~0#1.offset) % 18446744073709551616;~usb_urb~0.base, ~usb_urb~0.offset := ldv_alloc_urb_~value~0#1.base, ldv_alloc_urb_~value~0#1.offset; {28361#false} is VALID [2022-02-20 22:07:14,239 INFO L290 TraceCheckUtils]: 105: Hoare triple {28361#false} ldv_alloc_urb_#res#1.base, ldv_alloc_urb_#res#1.offset := ~usb_urb~0.base, ~usb_urb~0.offset; {28361#false} is VALID [2022-02-20 22:07:14,239 INFO L290 TraceCheckUtils]: 106: Hoare triple {28361#false} ldv_usb_alloc_urb_5_#t~ret196#1.base, ldv_usb_alloc_urb_5_#t~ret196#1.offset := ldv_alloc_urb_#res#1.base, ldv_alloc_urb_#res#1.offset;assume { :end_inline_ldv_alloc_urb } true;ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset := ldv_usb_alloc_urb_5_#t~ret196#1.base, ldv_usb_alloc_urb_5_#t~ret196#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret196#1.base, ldv_usb_alloc_urb_5_#t~ret196#1.offset;ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset := ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset; {28361#false} is VALID [2022-02-20 22:07:14,240 INFO L290 TraceCheckUtils]: 107: Hoare triple {28361#false} usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset := ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;assume { :end_inline_ldv_usb_alloc_urb_5 } true;call write~$Pointer$(usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset, usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8);havoc usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset;call usb_acecad_probe_#t~mem140#1.base, usb_acecad_probe_#t~mem140#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8); {28361#false} is VALID [2022-02-20 22:07:14,240 INFO L290 TraceCheckUtils]: 108: Hoare triple {28361#false} assume 0 == (usb_acecad_probe_#t~mem140#1.base + usb_acecad_probe_#t~mem140#1.offset) % 18446744073709551616;havoc usb_acecad_probe_#t~mem140#1.base, usb_acecad_probe_#t~mem140#1.offset;usb_acecad_probe_~err~0#1 := -12; {28361#false} is VALID [2022-02-20 22:07:14,240 INFO L290 TraceCheckUtils]: 109: Hoare triple {28361#false} call usb_acecad_probe_#t~mem172#1.base, usb_acecad_probe_#t~mem172#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem173#1 := read~int(usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset, 8); {28361#false} is VALID [2022-02-20 22:07:14,240 INFO L272 TraceCheckUtils]: 110: Hoare triple {28361#false} call usb_free_coherent(usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, 8, usb_acecad_probe_#t~mem172#1.base, usb_acecad_probe_#t~mem172#1.offset, usb_acecad_probe_#t~mem173#1); {28360#true} is VALID [2022-02-20 22:07:14,240 INFO L290 TraceCheckUtils]: 111: Hoare triple {28360#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1 := #in~arg1;~arg2.base, ~arg2.offset := #in~arg2.base, #in~arg2.offset;~arg3 := #in~arg3; {28360#true} is VALID [2022-02-20 22:07:14,240 INFO L290 TraceCheckUtils]: 112: Hoare triple {28360#true} assume true; {28360#true} is VALID [2022-02-20 22:07:14,240 INFO L284 TraceCheckUtils]: 113: Hoare quadruple {28360#true} {28361#false} #592#return; {28361#false} is VALID [2022-02-20 22:07:14,241 INFO L290 TraceCheckUtils]: 114: Hoare triple {28361#false} havoc usb_acecad_probe_#t~mem172#1.base, usb_acecad_probe_#t~mem172#1.offset;havoc usb_acecad_probe_#t~mem173#1; {28361#false} is VALID [2022-02-20 22:07:14,241 INFO L290 TraceCheckUtils]: 115: Hoare triple {28361#false} assume { :begin_inline_input_free_device } true;input_free_device_#in~arg0#1.base, input_free_device_#in~arg0#1.offset := usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset;havoc input_free_device_~arg0#1.base, input_free_device_~arg0#1.offset;input_free_device_~arg0#1.base, input_free_device_~arg0#1.offset := input_free_device_#in~arg0#1.base, input_free_device_#in~arg0#1.offset; {28361#false} is VALID [2022-02-20 22:07:14,241 INFO L290 TraceCheckUtils]: 116: Hoare triple {28361#false} assume { :end_inline_input_free_device } true; {28361#false} is VALID [2022-02-20 22:07:14,241 INFO L272 TraceCheckUtils]: 117: Hoare triple {28361#false} call kfree(usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset); {28458#(= |old(#valid)| |#valid|)} is VALID [2022-02-20 22:07:14,241 INFO L290 TraceCheckUtils]: 118: Hoare triple {28458#(= |old(#valid)| |#valid|)} ~p.base, ~p.offset := #in~p.base, #in~p.offset;call ULTIMATE.dealloc(~p.base, ~p.offset); {28360#true} is VALID [2022-02-20 22:07:14,241 INFO L290 TraceCheckUtils]: 119: Hoare triple {28360#true} assume true; {28360#true} is VALID [2022-02-20 22:07:14,241 INFO L284 TraceCheckUtils]: 120: Hoare quadruple {28360#true} {28361#false} #594#return; {28361#false} is VALID [2022-02-20 22:07:14,242 INFO L290 TraceCheckUtils]: 121: Hoare triple {28361#false} usb_acecad_probe_#res#1 := usb_acecad_probe_~err~0#1; {28361#false} is VALID [2022-02-20 22:07:14,242 INFO L290 TraceCheckUtils]: 122: Hoare triple {28361#false} main_#t~ret188#1 := usb_acecad_probe_#res#1;assume { :end_inline_usb_acecad_probe } true;assume -2147483648 <= main_#t~ret188#1 && main_#t~ret188#1 <= 2147483647;~ldv_retval_0~0 := main_#t~ret188#1;havoc main_#t~ret188#1; {28361#false} is VALID [2022-02-20 22:07:14,242 INFO L290 TraceCheckUtils]: 123: Hoare triple {28361#false} assume 0 == ~ldv_retval_0~0;~ldv_state_variable_1~0 := 2;~ref_cnt~0 := 1 + ~ref_cnt~0; {28361#false} is VALID [2022-02-20 22:07:14,242 INFO L290 TraceCheckUtils]: 124: Hoare triple {28361#false} assume -2147483648 <= main_#t~nondet184#1 && main_#t~nondet184#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet184#1;havoc main_#t~nondet184#1;main_#t~switch185#1 := 0 == main_~tmp___0~6#1; {28361#false} is VALID [2022-02-20 22:07:14,242 INFO L290 TraceCheckUtils]: 125: Hoare triple {28361#false} assume !main_#t~switch185#1;main_#t~switch185#1 := main_#t~switch185#1 || 1 == main_~tmp___0~6#1; {28361#false} is VALID [2022-02-20 22:07:14,242 INFO L290 TraceCheckUtils]: 126: Hoare triple {28361#false} assume main_#t~switch185#1; {28361#false} is VALID [2022-02-20 22:07:14,242 INFO L290 TraceCheckUtils]: 127: Hoare triple {28361#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet189#1 && main_#t~nondet189#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet189#1;havoc main_#t~nondet189#1;main_#t~switch190#1 := 0 == main_~tmp___2~1#1; {28361#false} is VALID [2022-02-20 22:07:14,243 INFO L290 TraceCheckUtils]: 128: Hoare triple {28361#false} assume !main_#t~switch190#1;main_#t~switch190#1 := main_#t~switch190#1 || 1 == main_~tmp___2~1#1; {28361#false} is VALID [2022-02-20 22:07:14,243 INFO L290 TraceCheckUtils]: 129: Hoare triple {28361#false} assume main_#t~switch190#1; {28361#false} is VALID [2022-02-20 22:07:14,243 INFO L290 TraceCheckUtils]: 130: Hoare triple {28361#false} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_usb_acecad_init } true;havoc usb_acecad_init_#res#1;havoc usb_acecad_init_#t~ret180#1, usb_acecad_init_#t~nondet181#1, usb_acecad_init_~result~0#1, usb_acecad_init_~tmp~15#1;havoc usb_acecad_init_~result~0#1;havoc usb_acecad_init_~tmp~15#1;assume { :begin_inline_usb_register } true;usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc usb_register_#res#1;havoc usb_register_#t~ret31#1, usb_register_~driver#1.base, usb_register_~driver#1.offset, usb_register_~tmp~1#1;usb_register_~driver#1.base, usb_register_~driver#1.offset := usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset;havoc usb_register_~tmp~1#1;assume { :begin_inline_ldv_usb_register_driver_2 } true;ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset := usb_register_~driver#1.base, usb_register_~driver#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 4, 0;havoc ldv_usb_register_driver_2_#res#1;havoc ldv_usb_register_driver_2_#t~ret193#1, ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset, ldv_usb_register_driver_2_~ldv_func_res~0#1, ldv_usb_register_driver_2_~tmp~19#1;ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_2_~ldv_func_res~0#1;havoc ldv_usb_register_driver_2_~tmp~19#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet213#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet213#1 && usb_register_driver_#t~nondet213#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet213#1;havoc usb_register_driver_#t~nondet213#1; {28361#false} is VALID [2022-02-20 22:07:14,243 INFO L290 TraceCheckUtils]: 131: Hoare triple {28361#false} ldv_usb_register_driver_2_#t~ret193#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_2_#t~ret193#1 && ldv_usb_register_driver_2_#t~ret193#1 <= 2147483647;ldv_usb_register_driver_2_~tmp~19#1 := ldv_usb_register_driver_2_#t~ret193#1;havoc ldv_usb_register_driver_2_#t~ret193#1;ldv_usb_register_driver_2_~ldv_func_res~0#1 := ldv_usb_register_driver_2_~tmp~19#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset, ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset;havoc ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {28361#false} is VALID [2022-02-20 22:07:14,243 INFO L272 TraceCheckUtils]: 132: Hoare triple {28361#false} call ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset := ldv_init_zalloc(1248); {28440#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:14,243 INFO L290 TraceCheckUtils]: 133: Hoare triple {28440#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {28360#true} is VALID [2022-02-20 22:07:14,244 INFO L272 TraceCheckUtils]: 134: Hoare triple {28360#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {28448#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:14,244 INFO L290 TraceCheckUtils]: 135: Hoare triple {28448#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {28360#true} is VALID [2022-02-20 22:07:14,244 INFO L290 TraceCheckUtils]: 136: Hoare triple {28360#true} assume true; {28360#true} is VALID [2022-02-20 22:07:14,245 INFO L284 TraceCheckUtils]: 137: Hoare quadruple {28360#true} {28360#true} #538#return; {28360#true} is VALID [2022-02-20 22:07:14,245 INFO L290 TraceCheckUtils]: 138: Hoare triple {28360#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {28360#true} is VALID [2022-02-20 22:07:14,245 INFO L272 TraceCheckUtils]: 139: Hoare triple {28360#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {28360#true} is VALID [2022-02-20 22:07:14,245 INFO L290 TraceCheckUtils]: 140: Hoare triple {28360#true} ~cond := #in~cond; {28360#true} is VALID [2022-02-20 22:07:14,245 INFO L290 TraceCheckUtils]: 141: Hoare triple {28360#true} assume !(0 == ~cond); {28360#true} is VALID [2022-02-20 22:07:14,245 INFO L290 TraceCheckUtils]: 142: Hoare triple {28360#true} assume true; {28360#true} is VALID [2022-02-20 22:07:14,245 INFO L284 TraceCheckUtils]: 143: Hoare quadruple {28360#true} {28360#true} #540#return; {28360#true} is VALID [2022-02-20 22:07:14,246 INFO L290 TraceCheckUtils]: 144: Hoare triple {28360#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {28360#true} is VALID [2022-02-20 22:07:14,246 INFO L290 TraceCheckUtils]: 145: Hoare triple {28360#true} assume true; {28360#true} is VALID [2022-02-20 22:07:14,246 INFO L284 TraceCheckUtils]: 146: Hoare quadruple {28360#true} {28361#false} #600#return; {28361#false} is VALID [2022-02-20 22:07:14,246 INFO L290 TraceCheckUtils]: 147: Hoare triple {28361#false} ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset := ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset;havoc ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {28361#false} is VALID [2022-02-20 22:07:14,246 INFO L290 TraceCheckUtils]: 148: Hoare triple {28361#false} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_2_#res#1 := ldv_usb_register_driver_2_~ldv_func_res~0#1; {28361#false} is VALID [2022-02-20 22:07:14,246 INFO L290 TraceCheckUtils]: 149: Hoare triple {28361#false} usb_register_#t~ret31#1 := ldv_usb_register_driver_2_#res#1;assume { :end_inline_ldv_usb_register_driver_2 } true;assume -2147483648 <= usb_register_#t~ret31#1 && usb_register_#t~ret31#1 <= 2147483647;usb_register_~tmp~1#1 := usb_register_#t~ret31#1;havoc usb_register_#t~ret31#1;usb_register_#res#1 := usb_register_~tmp~1#1; {28361#false} is VALID [2022-02-20 22:07:14,246 INFO L290 TraceCheckUtils]: 150: Hoare triple {28361#false} usb_acecad_init_#t~ret180#1 := usb_register_#res#1;assume { :end_inline_usb_register } true;assume -2147483648 <= usb_acecad_init_#t~ret180#1 && usb_acecad_init_#t~ret180#1 <= 2147483647;usb_acecad_init_~tmp~15#1 := usb_acecad_init_#t~ret180#1;havoc usb_acecad_init_#t~ret180#1;usb_acecad_init_~result~0#1 := usb_acecad_init_~tmp~15#1; {28361#false} is VALID [2022-02-20 22:07:14,247 INFO L290 TraceCheckUtils]: 151: Hoare triple {28361#false} assume !(0 == usb_acecad_init_~result~0#1); {28361#false} is VALID [2022-02-20 22:07:14,247 INFO L290 TraceCheckUtils]: 152: Hoare triple {28361#false} usb_acecad_init_#res#1 := usb_acecad_init_~result~0#1; {28361#false} is VALID [2022-02-20 22:07:14,247 INFO L290 TraceCheckUtils]: 153: Hoare triple {28361#false} main_#t~ret191#1 := usb_acecad_init_#res#1;assume { :end_inline_usb_acecad_init } true;assume -2147483648 <= main_#t~ret191#1 && main_#t~ret191#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret191#1;havoc main_#t~ret191#1; {28361#false} is VALID [2022-02-20 22:07:14,247 INFO L290 TraceCheckUtils]: 154: Hoare triple {28361#false} assume !(0 == ~ldv_retval_1~0); {28361#false} is VALID [2022-02-20 22:07:14,247 INFO L290 TraceCheckUtils]: 155: Hoare triple {28361#false} assume 0 != ~ldv_retval_1~0;~ldv_state_variable_0~0 := 2; {28361#false} is VALID [2022-02-20 22:07:14,247 INFO L290 TraceCheckUtils]: 156: Hoare triple {28361#false} assume { :begin_inline_ldv_check_final_state } true; {28361#false} is VALID [2022-02-20 22:07:14,247 INFO L290 TraceCheckUtils]: 157: Hoare triple {28361#false} assume 0 != (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616; {28361#false} is VALID [2022-02-20 22:07:14,248 INFO L272 TraceCheckUtils]: 158: Hoare triple {28361#false} call ldv_error(); {28361#false} is VALID [2022-02-20 22:07:14,248 INFO L290 TraceCheckUtils]: 159: Hoare triple {28361#false} assume !false; {28361#false} is VALID [2022-02-20 22:07:14,248 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2022-02-20 22:07:14,249 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:07:14,249 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [420384611] [2022-02-20 22:07:14,249 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [420384611] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:07:14,249 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 22:07:14,249 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-02-20 22:07:14,249 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [364127744] [2022-02-20 22:07:14,249 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:07:14,251 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 13.571428571428571) internal successors, (95), 3 states have internal predecessors, (95), 2 states have call successors, (16), 6 states have call predecessors, (16), 1 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) Word has length 160 [2022-02-20 22:07:14,251 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:07:14,251 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 13.571428571428571) internal successors, (95), 3 states have internal predecessors, (95), 2 states have call successors, (16), 6 states have call predecessors, (16), 1 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2022-02-20 22:07:14,358 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 126 edges. 126 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:14,359 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-02-20 22:07:14,359 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:07:14,359 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-02-20 22:07:14,359 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2022-02-20 22:07:14,359 INFO L87 Difference]: Start difference. First operand 801 states and 1037 transitions. Second operand has 7 states, 7 states have (on average 13.571428571428571) internal successors, (95), 3 states have internal predecessors, (95), 2 states have call successors, (16), 6 states have call predecessors, (16), 1 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2022-02-20 22:07:15,812 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:15,812 INFO L93 Difference]: Finished difference Result 1679 states and 2189 transitions. [2022-02-20 22:07:15,812 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-02-20 22:07:15,813 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 13.571428571428571) internal successors, (95), 3 states have internal predecessors, (95), 2 states have call successors, (16), 6 states have call predecessors, (16), 1 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) Word has length 160 [2022-02-20 22:07:15,813 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 22:07:15,813 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 13.571428571428571) internal successors, (95), 3 states have internal predecessors, (95), 2 states have call successors, (16), 6 states have call predecessors, (16), 1 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2022-02-20 22:07:15,818 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 603 transitions. [2022-02-20 22:07:15,818 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 13.571428571428571) internal successors, (95), 3 states have internal predecessors, (95), 2 states have call successors, (16), 6 states have call predecessors, (16), 1 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2022-02-20 22:07:15,823 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 603 transitions. [2022-02-20 22:07:15,823 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 9 states and 603 transitions. [2022-02-20 22:07:16,300 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 603 edges. 603 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:16,354 INFO L225 Difference]: With dead ends: 1679 [2022-02-20 22:07:16,354 INFO L226 Difference]: Without dead ends: 893 [2022-02-20 22:07:16,356 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2022-02-20 22:07:16,358 INFO L933 BasicCegarLoop]: 274 mSDtfsCounter, 212 mSDsluCounter, 503 mSDsCounter, 0 mSdLazyCounter, 197 mSolverCounterSat, 175 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 216 SdHoareTripleChecker+Valid, 777 SdHoareTripleChecker+Invalid, 372 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 175 IncrementalHoareTripleChecker+Valid, 197 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-02-20 22:07:16,359 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [216 Valid, 777 Invalid, 372 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [175 Valid, 197 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-02-20 22:07:16,360 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 893 states. [2022-02-20 22:07:16,387 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 893 to 855. [2022-02-20 22:07:16,387 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 22:07:16,389 INFO L82 GeneralOperation]: Start isEquivalent. First operand 893 states. Second operand has 855 states, 669 states have (on average 1.2705530642750373) internal successors, (850), 677 states have internal predecessors, (850), 130 states have call successors, (130), 56 states have call predecessors, (130), 55 states have return successors, (131), 129 states have call predecessors, (131), 129 states have call successors, (131) [2022-02-20 22:07:16,390 INFO L74 IsIncluded]: Start isIncluded. First operand 893 states. Second operand has 855 states, 669 states have (on average 1.2705530642750373) internal successors, (850), 677 states have internal predecessors, (850), 130 states have call successors, (130), 56 states have call predecessors, (130), 55 states have return successors, (131), 129 states have call predecessors, (131), 129 states have call successors, (131) [2022-02-20 22:07:16,391 INFO L87 Difference]: Start difference. First operand 893 states. Second operand has 855 states, 669 states have (on average 1.2705530642750373) internal successors, (850), 677 states have internal predecessors, (850), 130 states have call successors, (130), 56 states have call predecessors, (130), 55 states have return successors, (131), 129 states have call predecessors, (131), 129 states have call successors, (131) [2022-02-20 22:07:16,438 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:16,438 INFO L93 Difference]: Finished difference Result 893 states and 1164 transitions. [2022-02-20 22:07:16,439 INFO L276 IsEmpty]: Start isEmpty. Operand 893 states and 1164 transitions. [2022-02-20 22:07:16,442 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:16,442 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:16,444 INFO L74 IsIncluded]: Start isIncluded. First operand has 855 states, 669 states have (on average 1.2705530642750373) internal successors, (850), 677 states have internal predecessors, (850), 130 states have call successors, (130), 56 states have call predecessors, (130), 55 states have return successors, (131), 129 states have call predecessors, (131), 129 states have call successors, (131) Second operand 893 states. [2022-02-20 22:07:16,446 INFO L87 Difference]: Start difference. First operand has 855 states, 669 states have (on average 1.2705530642750373) internal successors, (850), 677 states have internal predecessors, (850), 130 states have call successors, (130), 56 states have call predecessors, (130), 55 states have return successors, (131), 129 states have call predecessors, (131), 129 states have call successors, (131) Second operand 893 states. [2022-02-20 22:07:16,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:16,496 INFO L93 Difference]: Finished difference Result 893 states and 1164 transitions. [2022-02-20 22:07:16,496 INFO L276 IsEmpty]: Start isEmpty. Operand 893 states and 1164 transitions. [2022-02-20 22:07:16,498 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:16,499 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:16,499 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 22:07:16,499 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 22:07:16,500 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 855 states, 669 states have (on average 1.2705530642750373) internal successors, (850), 677 states have internal predecessors, (850), 130 states have call successors, (130), 56 states have call predecessors, (130), 55 states have return successors, (131), 129 states have call predecessors, (131), 129 states have call successors, (131) [2022-02-20 22:07:16,548 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 855 states to 855 states and 1111 transitions. [2022-02-20 22:07:16,548 INFO L78 Accepts]: Start accepts. Automaton has 855 states and 1111 transitions. Word has length 160 [2022-02-20 22:07:16,548 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 22:07:16,549 INFO L470 AbstractCegarLoop]: Abstraction has 855 states and 1111 transitions. [2022-02-20 22:07:16,549 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 13.571428571428571) internal successors, (95), 3 states have internal predecessors, (95), 2 states have call successors, (16), 6 states have call predecessors, (16), 1 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2022-02-20 22:07:16,549 INFO L276 IsEmpty]: Start isEmpty. Operand 855 states and 1111 transitions. [2022-02-20 22:07:16,552 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 170 [2022-02-20 22:07:16,552 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:07:16,552 INFO L514 BasicCegarLoop]: trace histogram [5, 5, 5, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:07:16,553 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2022-02-20 22:07:16,553 INFO L402 AbstractCegarLoop]: === Iteration 10 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:07:16,553 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:07:16,554 INFO L85 PathProgramCache]: Analyzing trace with hash -1334474301, now seen corresponding path program 1 times [2022-02-20 22:07:16,554 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:07:16,554 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [444362409] [2022-02-20 22:07:16,554 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:07:16,554 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:07:16,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:16,672 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 22:07:16,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:16,685 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:16,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:16,690 INFO L290 TraceCheckUtils]: 0: Hoare triple {33905#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {33815#true} is VALID [2022-02-20 22:07:16,690 INFO L290 TraceCheckUtils]: 1: Hoare triple {33815#true} assume true; {33815#true} is VALID [2022-02-20 22:07:16,690 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {33815#true} {33815#true} #538#return; {33815#true} is VALID [2022-02-20 22:07:16,690 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:16,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:16,695 INFO L290 TraceCheckUtils]: 0: Hoare triple {33815#true} ~cond := #in~cond; {33815#true} is VALID [2022-02-20 22:07:16,695 INFO L290 TraceCheckUtils]: 1: Hoare triple {33815#true} assume !(0 == ~cond); {33815#true} is VALID [2022-02-20 22:07:16,696 INFO L290 TraceCheckUtils]: 2: Hoare triple {33815#true} assume true; {33815#true} is VALID [2022-02-20 22:07:16,696 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {33815#true} {33815#true} #540#return; {33815#true} is VALID [2022-02-20 22:07:16,696 INFO L290 TraceCheckUtils]: 0: Hoare triple {33897#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {33815#true} is VALID [2022-02-20 22:07:16,697 INFO L272 TraceCheckUtils]: 1: Hoare triple {33815#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {33905#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:16,697 INFO L290 TraceCheckUtils]: 2: Hoare triple {33905#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {33815#true} is VALID [2022-02-20 22:07:16,697 INFO L290 TraceCheckUtils]: 3: Hoare triple {33815#true} assume true; {33815#true} is VALID [2022-02-20 22:07:16,697 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {33815#true} {33815#true} #538#return; {33815#true} is VALID [2022-02-20 22:07:16,698 INFO L290 TraceCheckUtils]: 5: Hoare triple {33815#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {33815#true} is VALID [2022-02-20 22:07:16,698 INFO L272 TraceCheckUtils]: 6: Hoare triple {33815#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {33815#true} is VALID [2022-02-20 22:07:16,698 INFO L290 TraceCheckUtils]: 7: Hoare triple {33815#true} ~cond := #in~cond; {33815#true} is VALID [2022-02-20 22:07:16,698 INFO L290 TraceCheckUtils]: 8: Hoare triple {33815#true} assume !(0 == ~cond); {33815#true} is VALID [2022-02-20 22:07:16,698 INFO L290 TraceCheckUtils]: 9: Hoare triple {33815#true} assume true; {33815#true} is VALID [2022-02-20 22:07:16,698 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {33815#true} {33815#true} #540#return; {33815#true} is VALID [2022-02-20 22:07:16,698 INFO L290 TraceCheckUtils]: 11: Hoare triple {33815#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {33815#true} is VALID [2022-02-20 22:07:16,699 INFO L290 TraceCheckUtils]: 12: Hoare triple {33815#true} assume true; {33815#true} is VALID [2022-02-20 22:07:16,699 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {33815#true} {33815#true} #544#return; {33815#true} is VALID [2022-02-20 22:07:16,699 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 27 [2022-02-20 22:07:16,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:16,707 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:16,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:16,711 INFO L290 TraceCheckUtils]: 0: Hoare triple {33905#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {33815#true} is VALID [2022-02-20 22:07:16,711 INFO L290 TraceCheckUtils]: 1: Hoare triple {33815#true} assume true; {33815#true} is VALID [2022-02-20 22:07:16,711 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {33815#true} {33815#true} #538#return; {33815#true} is VALID [2022-02-20 22:07:16,712 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:16,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:16,715 INFO L290 TraceCheckUtils]: 0: Hoare triple {33815#true} ~cond := #in~cond; {33815#true} is VALID [2022-02-20 22:07:16,716 INFO L290 TraceCheckUtils]: 1: Hoare triple {33815#true} assume !(0 == ~cond); {33815#true} is VALID [2022-02-20 22:07:16,716 INFO L290 TraceCheckUtils]: 2: Hoare triple {33815#true} assume true; {33815#true} is VALID [2022-02-20 22:07:16,716 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {33815#true} {33815#true} #540#return; {33815#true} is VALID [2022-02-20 22:07:16,716 INFO L290 TraceCheckUtils]: 0: Hoare triple {33897#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {33815#true} is VALID [2022-02-20 22:07:16,717 INFO L272 TraceCheckUtils]: 1: Hoare triple {33815#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {33905#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:16,717 INFO L290 TraceCheckUtils]: 2: Hoare triple {33905#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {33815#true} is VALID [2022-02-20 22:07:16,717 INFO L290 TraceCheckUtils]: 3: Hoare triple {33815#true} assume true; {33815#true} is VALID [2022-02-20 22:07:16,717 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {33815#true} {33815#true} #538#return; {33815#true} is VALID [2022-02-20 22:07:16,717 INFO L290 TraceCheckUtils]: 5: Hoare triple {33815#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {33815#true} is VALID [2022-02-20 22:07:16,718 INFO L272 TraceCheckUtils]: 6: Hoare triple {33815#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {33815#true} is VALID [2022-02-20 22:07:16,718 INFO L290 TraceCheckUtils]: 7: Hoare triple {33815#true} ~cond := #in~cond; {33815#true} is VALID [2022-02-20 22:07:16,718 INFO L290 TraceCheckUtils]: 8: Hoare triple {33815#true} assume !(0 == ~cond); {33815#true} is VALID [2022-02-20 22:07:16,718 INFO L290 TraceCheckUtils]: 9: Hoare triple {33815#true} assume true; {33815#true} is VALID [2022-02-20 22:07:16,718 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {33815#true} {33815#true} #540#return; {33815#true} is VALID [2022-02-20 22:07:16,718 INFO L290 TraceCheckUtils]: 11: Hoare triple {33815#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {33815#true} is VALID [2022-02-20 22:07:16,718 INFO L290 TraceCheckUtils]: 12: Hoare triple {33815#true} assume true; {33815#true} is VALID [2022-02-20 22:07:16,719 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {33815#true} {33815#true} #600#return; {33815#true} is VALID [2022-02-20 22:07:16,726 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 56 [2022-02-20 22:07:16,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:16,736 INFO L290 TraceCheckUtils]: 0: Hoare triple {33913#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {33815#true} is VALID [2022-02-20 22:07:16,736 INFO L290 TraceCheckUtils]: 1: Hoare triple {33815#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {33815#true} is VALID [2022-02-20 22:07:16,737 INFO L290 TraceCheckUtils]: 2: Hoare triple {33815#true} assume true; {33815#true} is VALID [2022-02-20 22:07:16,737 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {33815#true} {33815#true} #546#return; {33815#true} is VALID [2022-02-20 22:07:16,737 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2022-02-20 22:07:16,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:16,742 INFO L290 TraceCheckUtils]: 0: Hoare triple {33815#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {33815#true} is VALID [2022-02-20 22:07:16,742 INFO L290 TraceCheckUtils]: 1: Hoare triple {33815#true} assume true; {33815#true} is VALID [2022-02-20 22:07:16,742 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {33815#true} {33816#false} #556#return; {33816#false} is VALID [2022-02-20 22:07:16,742 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 81 [2022-02-20 22:07:16,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:16,747 INFO L290 TraceCheckUtils]: 0: Hoare triple {33815#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {33815#true} is VALID [2022-02-20 22:07:16,748 INFO L290 TraceCheckUtils]: 1: Hoare triple {33815#true} assume true; {33815#true} is VALID [2022-02-20 22:07:16,748 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {33815#true} {33816#false} #560#return; {33816#false} is VALID [2022-02-20 22:07:16,749 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 88 [2022-02-20 22:07:16,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:16,756 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:16,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:16,764 INFO L290 TraceCheckUtils]: 0: Hoare triple {33913#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {33815#true} is VALID [2022-02-20 22:07:16,765 INFO L290 TraceCheckUtils]: 1: Hoare triple {33815#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {33815#true} is VALID [2022-02-20 22:07:16,765 INFO L290 TraceCheckUtils]: 2: Hoare triple {33815#true} assume true; {33815#true} is VALID [2022-02-20 22:07:16,765 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {33815#true} {33815#true} #530#return; {33815#true} is VALID [2022-02-20 22:07:16,765 INFO L290 TraceCheckUtils]: 0: Hoare triple {33913#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {33815#true} is VALID [2022-02-20 22:07:16,766 INFO L272 TraceCheckUtils]: 1: Hoare triple {33815#true} call __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset := ldv_malloc(__kmalloc_~size#1); {33913#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:16,766 INFO L290 TraceCheckUtils]: 2: Hoare triple {33913#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {33815#true} is VALID [2022-02-20 22:07:16,766 INFO L290 TraceCheckUtils]: 3: Hoare triple {33815#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {33815#true} is VALID [2022-02-20 22:07:16,766 INFO L290 TraceCheckUtils]: 4: Hoare triple {33815#true} assume true; {33815#true} is VALID [2022-02-20 22:07:16,766 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {33815#true} {33815#true} #530#return; {33815#true} is VALID [2022-02-20 22:07:16,767 INFO L290 TraceCheckUtils]: 6: Hoare triple {33815#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset; {33815#true} is VALID [2022-02-20 22:07:16,767 INFO L290 TraceCheckUtils]: 7: Hoare triple {33815#true} kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {33815#true} is VALID [2022-02-20 22:07:16,767 INFO L290 TraceCheckUtils]: 8: Hoare triple {33815#true} #t~ret55#1.base, #t~ret55#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret55#1.base, #t~ret55#1.offset;havoc #t~ret55#1.base, #t~ret55#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {33815#true} is VALID [2022-02-20 22:07:16,767 INFO L290 TraceCheckUtils]: 9: Hoare triple {33815#true} assume true; {33815#true} is VALID [2022-02-20 22:07:16,767 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {33815#true} {33816#false} #562#return; {33816#false} is VALID [2022-02-20 22:07:16,767 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 101 [2022-02-20 22:07:16,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:16,774 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:16,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:16,778 INFO L290 TraceCheckUtils]: 0: Hoare triple {33913#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {33815#true} is VALID [2022-02-20 22:07:16,778 INFO L290 TraceCheckUtils]: 1: Hoare triple {33815#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {33815#true} is VALID [2022-02-20 22:07:16,778 INFO L290 TraceCheckUtils]: 2: Hoare triple {33815#true} assume true; {33815#true} is VALID [2022-02-20 22:07:16,778 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {33815#true} {33815#true} #530#return; {33815#true} is VALID [2022-02-20 22:07:16,779 INFO L290 TraceCheckUtils]: 0: Hoare triple {33913#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {33815#true} is VALID [2022-02-20 22:07:16,779 INFO L272 TraceCheckUtils]: 1: Hoare triple {33815#true} call __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset := ldv_malloc(__kmalloc_~size#1); {33913#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:16,779 INFO L290 TraceCheckUtils]: 2: Hoare triple {33913#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {33815#true} is VALID [2022-02-20 22:07:16,780 INFO L290 TraceCheckUtils]: 3: Hoare triple {33815#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {33815#true} is VALID [2022-02-20 22:07:16,780 INFO L290 TraceCheckUtils]: 4: Hoare triple {33815#true} assume true; {33815#true} is VALID [2022-02-20 22:07:16,780 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {33815#true} {33815#true} #530#return; {33815#true} is VALID [2022-02-20 22:07:16,780 INFO L290 TraceCheckUtils]: 6: Hoare triple {33815#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset; {33815#true} is VALID [2022-02-20 22:07:16,780 INFO L290 TraceCheckUtils]: 7: Hoare triple {33815#true} kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {33815#true} is VALID [2022-02-20 22:07:16,780 INFO L290 TraceCheckUtils]: 8: Hoare triple {33815#true} #t~ret55#1.base, #t~ret55#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret55#1.base, #t~ret55#1.offset;havoc #t~ret55#1.base, #t~ret55#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {33815#true} is VALID [2022-02-20 22:07:16,780 INFO L290 TraceCheckUtils]: 9: Hoare triple {33815#true} assume true; {33815#true} is VALID [2022-02-20 22:07:16,781 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {33815#true} {33816#false} #564#return; {33816#false} is VALID [2022-02-20 22:07:16,781 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 116 [2022-02-20 22:07:16,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:16,786 INFO L290 TraceCheckUtils]: 0: Hoare triple {33913#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {33815#true} is VALID [2022-02-20 22:07:16,786 INFO L290 TraceCheckUtils]: 1: Hoare triple {33815#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {33815#true} is VALID [2022-02-20 22:07:16,787 INFO L290 TraceCheckUtils]: 2: Hoare triple {33815#true} assume true; {33815#true} is VALID [2022-02-20 22:07:16,787 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {33815#true} {33816#false} #566#return; {33816#false} is VALID [2022-02-20 22:07:16,787 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 124 [2022-02-20 22:07:16,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:16,793 INFO L290 TraceCheckUtils]: 0: Hoare triple {33913#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {33815#true} is VALID [2022-02-20 22:07:16,793 INFO L290 TraceCheckUtils]: 1: Hoare triple {33815#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {33815#true} is VALID [2022-02-20 22:07:16,793 INFO L290 TraceCheckUtils]: 2: Hoare triple {33815#true} assume true; {33815#true} is VALID [2022-02-20 22:07:16,793 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {33815#true} {33816#false} #568#return; {33816#false} is VALID [2022-02-20 22:07:16,793 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 130 [2022-02-20 22:07:16,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:16,805 INFO L290 TraceCheckUtils]: 0: Hoare triple {33815#true} havoc ~tmp~8;assume -2147483648 <= #t~nondet65 && #t~nondet65 <= 2147483647;~tmp~8 := #t~nondet65;havoc #t~nondet65;#res := ~tmp~8; {33815#true} is VALID [2022-02-20 22:07:16,806 INFO L290 TraceCheckUtils]: 1: Hoare triple {33815#true} assume true; {33815#true} is VALID [2022-02-20 22:07:16,806 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {33815#true} {33816#false} #570#return; {33816#false} is VALID [2022-02-20 22:07:16,806 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 142 [2022-02-20 22:07:16,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:16,810 INFO L290 TraceCheckUtils]: 0: Hoare triple {33815#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1 := #in~arg1;~arg2.base, ~arg2.offset := #in~arg2.base, #in~arg2.offset;~arg3 := #in~arg3; {33815#true} is VALID [2022-02-20 22:07:16,810 INFO L290 TraceCheckUtils]: 1: Hoare triple {33815#true} assume true; {33815#true} is VALID [2022-02-20 22:07:16,811 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {33815#true} {33816#false} #592#return; {33816#false} is VALID [2022-02-20 22:07:16,817 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 149 [2022-02-20 22:07:16,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:16,822 INFO L290 TraceCheckUtils]: 0: Hoare triple {33922#(= |old(#valid)| |#valid|)} ~p.base, ~p.offset := #in~p.base, #in~p.offset;call ULTIMATE.dealloc(~p.base, ~p.offset); {33815#true} is VALID [2022-02-20 22:07:16,822 INFO L290 TraceCheckUtils]: 1: Hoare triple {33815#true} assume true; {33815#true} is VALID [2022-02-20 22:07:16,822 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {33815#true} {33816#false} #594#return; {33816#false} is VALID [2022-02-20 22:07:16,823 INFO L290 TraceCheckUtils]: 0: Hoare triple {33815#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(99, 2);call #Ultimate.allocInit(10, 3);call #Ultimate.allocInit(7, 4);call write~init~int(97, 4, 0, 1);call write~init~int(99, 4, 1, 1);call write~init~int(101, 4, 2, 1);call write~init~int(99, 4, 3, 1);call write~init~int(97, 4, 4, 1);call write~init~int(100, 4, 5, 1);call write~init~int(0, 4, 6, 1);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(20, 6);call #Ultimate.allocInit(57, 7);call #Ultimate.allocInit(2, 8);call write~init~int(32, 8, 0, 1);call write~init~int(0, 8, 1, 1);call #Ultimate.allocInit(8, 9);call #Ultimate.allocInit(34, 10);call #Ultimate.allocInit(32, 11);call #Ultimate.allocInit(11, 12);call #Ultimate.allocInit(48, 13);~LDV_IN_INTERRUPT~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset := 14, 0;call #Ultimate.allocInit(72, 14);call write~init~int(3, ~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 2 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(4, ~#usb_acecad_id_table~0.base, 4 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 6 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 8 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 10 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 11 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 12 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 13 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 14 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 15 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 16 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(3, ~#usb_acecad_id_table~0.base, 24 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 26 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(8, ~#usb_acecad_id_table~0.base, 28 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 30 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 32 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 34 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 35 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 36 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 37 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 38 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 39 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(1, ~#usb_acecad_id_table~0.base, 40 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(0, ~#usb_acecad_id_table~0.base, 48 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 50 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 52 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 54 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 56 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 58 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 59 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 60 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 61 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 62 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 63 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 64 + ~#usb_acecad_id_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.driver_info := 0;~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset := 15, 0;call #Ultimate.allocInit(264, 15);call write~init~$Pointer$(12, 0, ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_probe.base, #funAddr~usb_acecad_probe.offset, ~#usb_acecad_driver~0.base, 8 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_disconnect.base, #funAddr~usb_acecad_disconnect.offset, ~#usb_acecad_driver~0.base, 16 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 24 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 32 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 40 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 48 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 56 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 64 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, ~#usb_acecad_driver~0.base, 72 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 80 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 84 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 88 + ~#usb_acecad_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 92 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 100 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 108 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 116 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 124 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 132 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 136 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 144 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 152 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 160 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 168 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 176 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 184 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 192 + ~#usb_acecad_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 193 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 201 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 209 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 217 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 225 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 233 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 241 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 249 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 257 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 261 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 262 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 263 + ~#usb_acecad_driver~0.offset, 1);~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {33815#true} is VALID [2022-02-20 22:07:16,823 INFO L290 TraceCheckUtils]: 1: Hoare triple {33815#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret183#1.base, main_#t~ret183#1.offset, main_#t~nondet184#1, main_#t~switch185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~ret188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~ret191#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~17#1.base, main_~tmp~17#1.offset, main_~tmp___0~6#1, main_~tmp___1~3#1, main_~tmp___2~1#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~17#1.base, main_~tmp~17#1.offset;havoc main_~tmp___0~6#1;havoc main_~tmp___1~3#1;havoc main_~tmp___2~1#1; {33815#true} is VALID [2022-02-20 22:07:16,823 INFO L272 TraceCheckUtils]: 2: Hoare triple {33815#true} call main_#t~ret183#1.base, main_#t~ret183#1.offset := ldv_init_zalloc(24); {33897#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:16,823 INFO L290 TraceCheckUtils]: 3: Hoare triple {33897#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {33815#true} is VALID [2022-02-20 22:07:16,824 INFO L272 TraceCheckUtils]: 4: Hoare triple {33815#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {33905#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:16,824 INFO L290 TraceCheckUtils]: 5: Hoare triple {33905#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {33815#true} is VALID [2022-02-20 22:07:16,825 INFO L290 TraceCheckUtils]: 6: Hoare triple {33815#true} assume true; {33815#true} is VALID [2022-02-20 22:07:16,825 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {33815#true} {33815#true} #538#return; {33815#true} is VALID [2022-02-20 22:07:16,825 INFO L290 TraceCheckUtils]: 8: Hoare triple {33815#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {33815#true} is VALID [2022-02-20 22:07:16,825 INFO L272 TraceCheckUtils]: 9: Hoare triple {33815#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {33815#true} is VALID [2022-02-20 22:07:16,825 INFO L290 TraceCheckUtils]: 10: Hoare triple {33815#true} ~cond := #in~cond; {33815#true} is VALID [2022-02-20 22:07:16,825 INFO L290 TraceCheckUtils]: 11: Hoare triple {33815#true} assume !(0 == ~cond); {33815#true} is VALID [2022-02-20 22:07:16,825 INFO L290 TraceCheckUtils]: 12: Hoare triple {33815#true} assume true; {33815#true} is VALID [2022-02-20 22:07:16,826 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {33815#true} {33815#true} #540#return; {33815#true} is VALID [2022-02-20 22:07:16,826 INFO L290 TraceCheckUtils]: 14: Hoare triple {33815#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {33815#true} is VALID [2022-02-20 22:07:16,826 INFO L290 TraceCheckUtils]: 15: Hoare triple {33815#true} assume true; {33815#true} is VALID [2022-02-20 22:07:16,826 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {33815#true} {33815#true} #544#return; {33815#true} is VALID [2022-02-20 22:07:16,826 INFO L290 TraceCheckUtils]: 17: Hoare triple {33815#true} main_~tmp~17#1.base, main_~tmp~17#1.offset := main_#t~ret183#1.base, main_#t~ret183#1.offset;havoc main_#t~ret183#1.base, main_#t~ret183#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~17#1.base, main_~tmp~17#1.offset;assume { :begin_inline_ldv_initialize } true; {33815#true} is VALID [2022-02-20 22:07:16,826 INFO L290 TraceCheckUtils]: 18: Hoare triple {33815#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1; {33815#true} is VALID [2022-02-20 22:07:16,826 INFO L290 TraceCheckUtils]: 19: Hoare triple {33815#true} assume -2147483648 <= main_#t~nondet184#1 && main_#t~nondet184#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet184#1;havoc main_#t~nondet184#1;main_#t~switch185#1 := 0 == main_~tmp___0~6#1; {33815#true} is VALID [2022-02-20 22:07:16,827 INFO L290 TraceCheckUtils]: 20: Hoare triple {33815#true} assume !main_#t~switch185#1;main_#t~switch185#1 := main_#t~switch185#1 || 1 == main_~tmp___0~6#1; {33815#true} is VALID [2022-02-20 22:07:16,827 INFO L290 TraceCheckUtils]: 21: Hoare triple {33815#true} assume main_#t~switch185#1; {33815#true} is VALID [2022-02-20 22:07:16,827 INFO L290 TraceCheckUtils]: 22: Hoare triple {33815#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet189#1 && main_#t~nondet189#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet189#1;havoc main_#t~nondet189#1;main_#t~switch190#1 := 0 == main_~tmp___2~1#1; {33815#true} is VALID [2022-02-20 22:07:16,827 INFO L290 TraceCheckUtils]: 23: Hoare triple {33815#true} assume !main_#t~switch190#1;main_#t~switch190#1 := main_#t~switch190#1 || 1 == main_~tmp___2~1#1; {33815#true} is VALID [2022-02-20 22:07:16,827 INFO L290 TraceCheckUtils]: 24: Hoare triple {33815#true} assume main_#t~switch190#1; {33815#true} is VALID [2022-02-20 22:07:16,827 INFO L290 TraceCheckUtils]: 25: Hoare triple {33815#true} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_usb_acecad_init } true;havoc usb_acecad_init_#res#1;havoc usb_acecad_init_#t~ret180#1, usb_acecad_init_#t~nondet181#1, usb_acecad_init_~result~0#1, usb_acecad_init_~tmp~15#1;havoc usb_acecad_init_~result~0#1;havoc usb_acecad_init_~tmp~15#1;assume { :begin_inline_usb_register } true;usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc usb_register_#res#1;havoc usb_register_#t~ret31#1, usb_register_~driver#1.base, usb_register_~driver#1.offset, usb_register_~tmp~1#1;usb_register_~driver#1.base, usb_register_~driver#1.offset := usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset;havoc usb_register_~tmp~1#1;assume { :begin_inline_ldv_usb_register_driver_2 } true;ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset := usb_register_~driver#1.base, usb_register_~driver#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 4, 0;havoc ldv_usb_register_driver_2_#res#1;havoc ldv_usb_register_driver_2_#t~ret193#1, ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset, ldv_usb_register_driver_2_~ldv_func_res~0#1, ldv_usb_register_driver_2_~tmp~19#1;ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_2_~ldv_func_res~0#1;havoc ldv_usb_register_driver_2_~tmp~19#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet213#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet213#1 && usb_register_driver_#t~nondet213#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet213#1;havoc usb_register_driver_#t~nondet213#1; {33815#true} is VALID [2022-02-20 22:07:16,827 INFO L290 TraceCheckUtils]: 26: Hoare triple {33815#true} ldv_usb_register_driver_2_#t~ret193#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_2_#t~ret193#1 && ldv_usb_register_driver_2_#t~ret193#1 <= 2147483647;ldv_usb_register_driver_2_~tmp~19#1 := ldv_usb_register_driver_2_#t~ret193#1;havoc ldv_usb_register_driver_2_#t~ret193#1;ldv_usb_register_driver_2_~ldv_func_res~0#1 := ldv_usb_register_driver_2_~tmp~19#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset, ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset;havoc ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {33815#true} is VALID [2022-02-20 22:07:16,828 INFO L272 TraceCheckUtils]: 27: Hoare triple {33815#true} call ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset := ldv_init_zalloc(1248); {33897#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:16,828 INFO L290 TraceCheckUtils]: 28: Hoare triple {33897#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {33815#true} is VALID [2022-02-20 22:07:16,829 INFO L272 TraceCheckUtils]: 29: Hoare triple {33815#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {33905#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:16,829 INFO L290 TraceCheckUtils]: 30: Hoare triple {33905#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {33815#true} is VALID [2022-02-20 22:07:16,829 INFO L290 TraceCheckUtils]: 31: Hoare triple {33815#true} assume true; {33815#true} is VALID [2022-02-20 22:07:16,829 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {33815#true} {33815#true} #538#return; {33815#true} is VALID [2022-02-20 22:07:16,829 INFO L290 TraceCheckUtils]: 33: Hoare triple {33815#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {33815#true} is VALID [2022-02-20 22:07:16,830 INFO L272 TraceCheckUtils]: 34: Hoare triple {33815#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {33815#true} is VALID [2022-02-20 22:07:16,830 INFO L290 TraceCheckUtils]: 35: Hoare triple {33815#true} ~cond := #in~cond; {33815#true} is VALID [2022-02-20 22:07:16,830 INFO L290 TraceCheckUtils]: 36: Hoare triple {33815#true} assume !(0 == ~cond); {33815#true} is VALID [2022-02-20 22:07:16,830 INFO L290 TraceCheckUtils]: 37: Hoare triple {33815#true} assume true; {33815#true} is VALID [2022-02-20 22:07:16,830 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {33815#true} {33815#true} #540#return; {33815#true} is VALID [2022-02-20 22:07:16,830 INFO L290 TraceCheckUtils]: 39: Hoare triple {33815#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {33815#true} is VALID [2022-02-20 22:07:16,830 INFO L290 TraceCheckUtils]: 40: Hoare triple {33815#true} assume true; {33815#true} is VALID [2022-02-20 22:07:16,831 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {33815#true} {33815#true} #600#return; {33815#true} is VALID [2022-02-20 22:07:16,831 INFO L290 TraceCheckUtils]: 42: Hoare triple {33815#true} ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset := ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset;havoc ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {33815#true} is VALID [2022-02-20 22:07:16,831 INFO L290 TraceCheckUtils]: 43: Hoare triple {33815#true} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_2_#res#1 := ldv_usb_register_driver_2_~ldv_func_res~0#1; {33815#true} is VALID [2022-02-20 22:07:16,831 INFO L290 TraceCheckUtils]: 44: Hoare triple {33815#true} usb_register_#t~ret31#1 := ldv_usb_register_driver_2_#res#1;assume { :end_inline_ldv_usb_register_driver_2 } true;assume -2147483648 <= usb_register_#t~ret31#1 && usb_register_#t~ret31#1 <= 2147483647;usb_register_~tmp~1#1 := usb_register_#t~ret31#1;havoc usb_register_#t~ret31#1;usb_register_#res#1 := usb_register_~tmp~1#1; {33815#true} is VALID [2022-02-20 22:07:16,831 INFO L290 TraceCheckUtils]: 45: Hoare triple {33815#true} usb_acecad_init_#t~ret180#1 := usb_register_#res#1;assume { :end_inline_usb_register } true;assume -2147483648 <= usb_acecad_init_#t~ret180#1 && usb_acecad_init_#t~ret180#1 <= 2147483647;usb_acecad_init_~tmp~15#1 := usb_acecad_init_#t~ret180#1;havoc usb_acecad_init_#t~ret180#1;usb_acecad_init_~result~0#1 := usb_acecad_init_~tmp~15#1; {33815#true} is VALID [2022-02-20 22:07:16,831 INFO L290 TraceCheckUtils]: 46: Hoare triple {33815#true} assume 0 == usb_acecad_init_~result~0#1;havoc usb_acecad_init_#t~nondet181#1; {33815#true} is VALID [2022-02-20 22:07:16,831 INFO L290 TraceCheckUtils]: 47: Hoare triple {33815#true} usb_acecad_init_#res#1 := usb_acecad_init_~result~0#1; {33815#true} is VALID [2022-02-20 22:07:16,831 INFO L290 TraceCheckUtils]: 48: Hoare triple {33815#true} main_#t~ret191#1 := usb_acecad_init_#res#1;assume { :end_inline_usb_acecad_init } true;assume -2147483648 <= main_#t~ret191#1 && main_#t~ret191#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret191#1;havoc main_#t~ret191#1; {33815#true} is VALID [2022-02-20 22:07:16,832 INFO L290 TraceCheckUtils]: 49: Hoare triple {33815#true} assume 0 == ~ldv_retval_1~0;~ldv_state_variable_0~0 := 3; {33815#true} is VALID [2022-02-20 22:07:16,832 INFO L290 TraceCheckUtils]: 50: Hoare triple {33815#true} assume !(0 != ~ldv_retval_1~0); {33815#true} is VALID [2022-02-20 22:07:16,832 INFO L290 TraceCheckUtils]: 51: Hoare triple {33815#true} assume -2147483648 <= main_#t~nondet184#1 && main_#t~nondet184#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet184#1;havoc main_#t~nondet184#1;main_#t~switch185#1 := 0 == main_~tmp___0~6#1; {33815#true} is VALID [2022-02-20 22:07:16,832 INFO L290 TraceCheckUtils]: 52: Hoare triple {33815#true} assume main_#t~switch185#1; {33815#true} is VALID [2022-02-20 22:07:16,832 INFO L290 TraceCheckUtils]: 53: Hoare triple {33815#true} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= main_#t~nondet186#1 && main_#t~nondet186#1 <= 2147483647;main_~tmp___1~3#1 := main_#t~nondet186#1;havoc main_#t~nondet186#1;main_#t~switch187#1 := 0 == main_~tmp___1~3#1; {33815#true} is VALID [2022-02-20 22:07:16,832 INFO L290 TraceCheckUtils]: 54: Hoare triple {33815#true} assume main_#t~switch187#1; {33815#true} is VALID [2022-02-20 22:07:16,832 INFO L290 TraceCheckUtils]: 55: Hoare triple {33815#true} assume 1 == ~ldv_state_variable_1~0;assume { :begin_inline_usb_acecad_probe } true;usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset, usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset := ~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc usb_acecad_probe_#res#1;havoc usb_acecad_probe_#t~ret127#1.base, usb_acecad_probe_#t~ret127#1.offset, usb_acecad_probe_#t~mem128#1.base, usb_acecad_probe_#t~mem128#1.offset, usb_acecad_probe_#t~mem129#1, usb_acecad_probe_#t~mem130#1.base, usb_acecad_probe_#t~mem130#1.offset, usb_acecad_probe_#t~ret131#1, usb_acecad_probe_#t~mem132#1, usb_acecad_probe_#t~ret133#1, usb_acecad_probe_#t~ret134#1, usb_acecad_probe_#t~ret135#1.base, usb_acecad_probe_#t~ret135#1.offset, usb_acecad_probe_#t~ret136#1.base, usb_acecad_probe_#t~ret136#1.offset, usb_acecad_probe_#t~ret137#1.base, usb_acecad_probe_#t~ret137#1.offset, usb_acecad_probe_#t~mem138#1.base, usb_acecad_probe_#t~mem138#1.offset, usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset, usb_acecad_probe_#t~mem140#1.base, usb_acecad_probe_#t~mem140#1.offset, usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset, usb_acecad_probe_#t~mem142#1.base, usb_acecad_probe_#t~mem142#1.offset, usb_acecad_probe_#t~ret143#1, usb_acecad_probe_#t~mem144#1.base, usb_acecad_probe_#t~mem144#1.offset, usb_acecad_probe_#t~mem145#1.base, usb_acecad_probe_#t~mem145#1.offset, usb_acecad_probe_#t~ret146#1, usb_acecad_probe_#t~mem147#1.base, usb_acecad_probe_#t~mem147#1.offset, usb_acecad_probe_#t~ret148#1, usb_acecad_probe_#t~ret149#1, usb_acecad_probe_#t~ret150#1, usb_acecad_probe_#t~mem151#1, usb_acecad_probe_#t~switch152#1, usb_acecad_probe_#t~nondet153#1, usb_acecad_probe_#t~nondet154#1, usb_acecad_probe_#t~mem155#1, usb_acecad_probe_#t~mem156#1, usb_acecad_probe_#t~nondet157#1, usb_acecad_probe_#t~nondet158#1, usb_acecad_probe_#t~mem159#1, usb_acecad_probe_#t~mem160#1, usb_acecad_probe_#t~mem161#1.base, usb_acecad_probe_#t~mem161#1.offset, usb_acecad_probe_#t~mem162#1.base, usb_acecad_probe_#t~mem162#1.offset, usb_acecad_probe_#t~ite163#1, usb_acecad_probe_#t~mem164#1, usb_acecad_probe_#t~mem165#1.base, usb_acecad_probe_#t~mem165#1.offset, usb_acecad_probe_#t~mem166#1, usb_acecad_probe_#t~mem167#1.base, usb_acecad_probe_#t~mem167#1.offset, usb_acecad_probe_#t~mem168#1.base, usb_acecad_probe_#t~mem168#1.offset, usb_acecad_probe_#t~mem169#1, usb_acecad_probe_#t~mem170#1.base, usb_acecad_probe_#t~mem170#1.offset, usb_acecad_probe_#t~ret171#1, usb_acecad_probe_#t~mem172#1.base, usb_acecad_probe_#t~mem172#1.offset, usb_acecad_probe_#t~mem173#1, usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset, usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset, usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset, usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset, usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset, usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset, usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset, usb_acecad_probe_~pipe~0#1, usb_acecad_probe_~maxp~0#1, usb_acecad_probe_~err~0#1, usb_acecad_probe_~tmp___0~5#1, usb_acecad_probe_~tmp___1~2#1, usb_acecad_probe_~tmp___2~0#1, usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset, usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~tmp___5~0#1, usb_acecad_probe_~tmp___6~0#1;usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset := usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset;usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset := usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset;havoc usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset;havoc usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;havoc usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset;havoc usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset;havoc usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset;havoc usb_acecad_probe_~pipe~0#1;havoc usb_acecad_probe_~maxp~0#1;havoc usb_acecad_probe_~err~0#1;havoc usb_acecad_probe_~tmp___0~5#1;havoc usb_acecad_probe_~tmp___1~2#1;havoc usb_acecad_probe_~tmp___2~0#1;havoc usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;havoc usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset;havoc usb_acecad_probe_~tmp___5~0#1;havoc usb_acecad_probe_~tmp___6~0#1;assume { :begin_inline_interface_to_usbdev } true;interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset := usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset;havoc interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;havoc interface_to_usbdev_#t~ret192#1.base, interface_to_usbdev_#t~ret192#1.offset, interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset, interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset := interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset;havoc interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;assume { :begin_inline_ldv_interface_to_usbdev } true;havoc ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;havoc ldv_interface_to_usbdev_#t~ret203#1.base, ldv_interface_to_usbdev_#t~ret203#1.offset, ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset, ldv_interface_to_usbdev_~tmp~26#1.base, ldv_interface_to_usbdev_~tmp~26#1.offset;havoc ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset;havoc ldv_interface_to_usbdev_~tmp~26#1.base, ldv_interface_to_usbdev_~tmp~26#1.offset; {33815#true} is VALID [2022-02-20 22:07:16,833 INFO L272 TraceCheckUtils]: 56: Hoare triple {33815#true} call ldv_interface_to_usbdev_#t~ret203#1.base, ldv_interface_to_usbdev_#t~ret203#1.offset := ldv_malloc(1822); {33913#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:16,833 INFO L290 TraceCheckUtils]: 57: Hoare triple {33913#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {33815#true} is VALID [2022-02-20 22:07:16,833 INFO L290 TraceCheckUtils]: 58: Hoare triple {33815#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {33815#true} is VALID [2022-02-20 22:07:16,833 INFO L290 TraceCheckUtils]: 59: Hoare triple {33815#true} assume true; {33815#true} is VALID [2022-02-20 22:07:16,834 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {33815#true} {33815#true} #546#return; {33815#true} is VALID [2022-02-20 22:07:16,834 INFO L290 TraceCheckUtils]: 61: Hoare triple {33815#true} ldv_interface_to_usbdev_~tmp~26#1.base, ldv_interface_to_usbdev_~tmp~26#1.offset := ldv_interface_to_usbdev_#t~ret203#1.base, ldv_interface_to_usbdev_#t~ret203#1.offset;havoc ldv_interface_to_usbdev_#t~ret203#1.base, ldv_interface_to_usbdev_#t~ret203#1.offset;ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset := ldv_interface_to_usbdev_~tmp~26#1.base, ldv_interface_to_usbdev_~tmp~26#1.offset; {33815#true} is VALID [2022-02-20 22:07:16,834 INFO L290 TraceCheckUtils]: 62: Hoare triple {33815#true} assume !(0 == (ldv_interface_to_usbdev_~result~1#1.base + ldv_interface_to_usbdev_~result~1#1.offset) % 18446744073709551616); {33815#true} is VALID [2022-02-20 22:07:16,834 INFO L290 TraceCheckUtils]: 63: Hoare triple {33815#true} ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset := ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset; {33815#true} is VALID [2022-02-20 22:07:16,834 INFO L290 TraceCheckUtils]: 64: Hoare triple {33815#true} interface_to_usbdev_#t~ret192#1.base, interface_to_usbdev_#t~ret192#1.offset := ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;assume { :end_inline_ldv_interface_to_usbdev } true;interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset := interface_to_usbdev_#t~ret192#1.base, interface_to_usbdev_#t~ret192#1.offset;havoc interface_to_usbdev_#t~ret192#1.base, interface_to_usbdev_#t~ret192#1.offset;interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset := interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset; {33815#true} is VALID [2022-02-20 22:07:16,834 INFO L290 TraceCheckUtils]: 65: Hoare triple {33815#true} usb_acecad_probe_#t~ret127#1.base, usb_acecad_probe_#t~ret127#1.offset := interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;assume { :end_inline_interface_to_usbdev } true;usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset := usb_acecad_probe_#t~ret127#1.base, usb_acecad_probe_#t~ret127#1.offset;havoc usb_acecad_probe_#t~ret127#1.base, usb_acecad_probe_#t~ret127#1.offset;usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset := usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;call usb_acecad_probe_#t~mem128#1.base, usb_acecad_probe_#t~mem128#1.offset := read~$Pointer$(usb_acecad_probe_~intf#1.base, 8 + usb_acecad_probe_~intf#1.offset, 8);usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset := usb_acecad_probe_#t~mem128#1.base, usb_acecad_probe_#t~mem128#1.offset;havoc usb_acecad_probe_#t~mem128#1.base, usb_acecad_probe_#t~mem128#1.offset;call usb_acecad_probe_#t~mem129#1 := read~int(usb_acecad_probe_~interface~0#1.base, 4 + usb_acecad_probe_~interface~0#1.offset, 1); {33815#true} is VALID [2022-02-20 22:07:16,834 INFO L290 TraceCheckUtils]: 66: Hoare triple {33815#true} assume !(1 != usb_acecad_probe_#t~mem129#1 % 256 % 4294967296);havoc usb_acecad_probe_#t~mem129#1;call usb_acecad_probe_#t~mem130#1.base, usb_acecad_probe_#t~mem130#1.offset := read~$Pointer$(usb_acecad_probe_~interface~0#1.base, 9 + usb_acecad_probe_~interface~0#1.offset, 8);usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset := usb_acecad_probe_#t~mem130#1.base, usb_acecad_probe_#t~mem130#1.offset;havoc usb_acecad_probe_#t~mem130#1.base, usb_acecad_probe_#t~mem130#1.offset;assume { :begin_inline_usb_endpoint_is_int_in } true;usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset := usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_endpoint_is_int_in_#res#1;havoc usb_endpoint_is_int_in_#t~ret3#1, usb_endpoint_is_int_in_#t~ret4#1, usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset, usb_endpoint_is_int_in_~tmp~0#1, usb_endpoint_is_int_in_~tmp___0~0#1, usb_endpoint_is_int_in_~tmp___1~0#1;usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset := usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset;havoc usb_endpoint_is_int_in_~tmp~0#1;havoc usb_endpoint_is_int_in_~tmp___0~0#1;havoc usb_endpoint_is_int_in_~tmp___1~0#1;assume { :begin_inline_usb_endpoint_xfer_int } true;usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset := usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset;havoc usb_endpoint_xfer_int_#res#1;havoc usb_endpoint_xfer_int_#t~mem2#1, usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset;usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset := usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset;call usb_endpoint_xfer_int_#t~mem2#1 := read~int(usb_endpoint_xfer_int_~epd#1.base, 3 + usb_endpoint_xfer_int_~epd#1.offset, 1);usb_endpoint_xfer_int_#res#1 := (if 3 == (if 0 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 0 else (if 1 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 1 else ~bitwiseAnd(usb_endpoint_xfer_int_#t~mem2#1 % 256, 3))) then 1 else 0);havoc usb_endpoint_xfer_int_#t~mem2#1; {33815#true} is VALID [2022-02-20 22:07:16,835 INFO L290 TraceCheckUtils]: 67: Hoare triple {33815#true} usb_endpoint_is_int_in_#t~ret3#1 := usb_endpoint_xfer_int_#res#1;assume { :end_inline_usb_endpoint_xfer_int } true;assume -2147483648 <= usb_endpoint_is_int_in_#t~ret3#1 && usb_endpoint_is_int_in_#t~ret3#1 <= 2147483647;usb_endpoint_is_int_in_~tmp~0#1 := usb_endpoint_is_int_in_#t~ret3#1;havoc usb_endpoint_is_int_in_#t~ret3#1; {33815#true} is VALID [2022-02-20 22:07:16,835 INFO L290 TraceCheckUtils]: 68: Hoare triple {33815#true} assume !(0 != usb_endpoint_is_int_in_~tmp~0#1);usb_endpoint_is_int_in_~tmp___1~0#1 := 0; {33849#(= 0 |ULTIMATE.start_usb_endpoint_is_int_in_~tmp___1~0#1|)} is VALID [2022-02-20 22:07:16,835 INFO L290 TraceCheckUtils]: 69: Hoare triple {33849#(= 0 |ULTIMATE.start_usb_endpoint_is_int_in_~tmp___1~0#1|)} usb_endpoint_is_int_in_#res#1 := usb_endpoint_is_int_in_~tmp___1~0#1; {33850#(= |ULTIMATE.start_usb_endpoint_is_int_in_#res#1| 0)} is VALID [2022-02-20 22:07:16,836 INFO L290 TraceCheckUtils]: 70: Hoare triple {33850#(= |ULTIMATE.start_usb_endpoint_is_int_in_#res#1| 0)} usb_acecad_probe_#t~ret131#1 := usb_endpoint_is_int_in_#res#1;assume { :end_inline_usb_endpoint_is_int_in } true;assume -2147483648 <= usb_acecad_probe_#t~ret131#1 && usb_acecad_probe_#t~ret131#1 <= 2147483647;usb_acecad_probe_~tmp___0~5#1 := usb_acecad_probe_#t~ret131#1;havoc usb_acecad_probe_#t~ret131#1; {33851#(= |ULTIMATE.start_usb_acecad_probe_~tmp___0~5#1| 0)} is VALID [2022-02-20 22:07:16,836 INFO L290 TraceCheckUtils]: 71: Hoare triple {33851#(= |ULTIMATE.start_usb_acecad_probe_~tmp___0~5#1| 0)} assume !(0 == usb_acecad_probe_~tmp___0~5#1);call usb_acecad_probe_#t~mem132#1 := read~int(usb_acecad_probe_~endpoint~0#1.base, 2 + usb_acecad_probe_~endpoint~0#1.offset, 1);assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_#t~mem132#1 % 256;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem42#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem42#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := (if (1 == 256 * __create_pipe_#t~mem42#1 || 0 == 256 * __create_pipe_#t~mem42#1) && 0 == 32768 * __create_pipe_~endpoint#1 then 256 * __create_pipe_#t~mem42#1 else (if 0 == 256 * __create_pipe_#t~mem42#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1) then 32768 * __create_pipe_~endpoint#1 else (if (1 == 256 * __create_pipe_#t~mem42#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1)) || ((1 == 256 * __create_pipe_#t~mem42#1 || 0 == 256 * __create_pipe_#t~mem42#1) && 1 == 32768 * __create_pipe_~endpoint#1) then 1 else ~bitwiseOr(256 * __create_pipe_#t~mem42#1, 32768 * __create_pipe_~endpoint#1))));havoc __create_pipe_#t~mem42#1; {33816#false} is VALID [2022-02-20 22:07:16,836 INFO L290 TraceCheckUtils]: 72: Hoare triple {33816#false} usb_acecad_probe_#t~ret133#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;usb_acecad_probe_~tmp___1~2#1 := usb_acecad_probe_#t~ret133#1;havoc usb_acecad_probe_#t~mem132#1;havoc usb_acecad_probe_#t~ret133#1;usb_acecad_probe_~pipe~0#1 := (if ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 else ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 - 4294967296);assume { :begin_inline_usb_maxpacket } true;usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset, usb_maxpacket_#in~pipe#1, usb_maxpacket_#in~is_out#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~pipe~0#1, (if 0 == (if 0 == usb_acecad_probe_~pipe~0#1 then 0 else (if 1 == usb_acecad_probe_~pipe~0#1 then 0 else ~bitwiseAnd(usb_acecad_probe_~pipe~0#1, 128))) then 1 else 0);havoc usb_maxpacket_#res#1;havoc usb_maxpacket_#t~ret44#1, usb_maxpacket_#t~ret45#1, usb_maxpacket_#t~mem46#1.base, usb_maxpacket_#t~mem46#1.offset, usb_maxpacket_#t~ret47#1, usb_maxpacket_#t~ret48#1, usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset, usb_maxpacket_#t~mem50#1, usb_maxpacket_#t~nondet43#1, usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset, usb_maxpacket_~pipe#1, usb_maxpacket_~is_out#1, usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset, usb_maxpacket_~epnum~0#1, usb_maxpacket_~__ret_warn_on~0#1, usb_maxpacket_~tmp~2#1, usb_maxpacket_~__ret_warn_on___0~0#1, usb_maxpacket_~tmp___0~1#1;usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset := usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset;usb_maxpacket_~pipe#1 := usb_maxpacket_#in~pipe#1;usb_maxpacket_~is_out#1 := usb_maxpacket_#in~is_out#1;havoc usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset;havoc usb_maxpacket_~epnum~0#1;havoc usb_maxpacket_~__ret_warn_on~0#1;havoc usb_maxpacket_~tmp~2#1;havoc usb_maxpacket_~__ret_warn_on___0~0#1;havoc usb_maxpacket_~tmp___0~1#1; {33816#false} is VALID [2022-02-20 22:07:16,837 INFO L290 TraceCheckUtils]: 73: Hoare triple {33816#false} assume 0 == usb_maxpacket_~pipe#1 / 32768;usb_maxpacket_~epnum~0#1 := 0; {33816#false} is VALID [2022-02-20 22:07:16,837 INFO L290 TraceCheckUtils]: 74: Hoare triple {33816#false} assume !(0 != usb_maxpacket_~is_out#1);usb_maxpacket_~__ret_warn_on___0~0#1 := (if 0 == (if 0 == usb_maxpacket_~pipe#1 then 0 else (if 1 == usb_maxpacket_~pipe#1 then 0 else ~bitwiseAnd(usb_maxpacket_~pipe#1, 128))) then 1 else 0); {33816#false} is VALID [2022-02-20 22:07:16,837 INFO L272 TraceCheckUtils]: 75: Hoare triple {33816#false} call usb_maxpacket_#t~ret47#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {33815#true} is VALID [2022-02-20 22:07:16,837 INFO L290 TraceCheckUtils]: 76: Hoare triple {33815#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {33815#true} is VALID [2022-02-20 22:07:16,837 INFO L290 TraceCheckUtils]: 77: Hoare triple {33815#true} assume true; {33815#true} is VALID [2022-02-20 22:07:16,837 INFO L284 TraceCheckUtils]: 78: Hoare quadruple {33815#true} {33816#false} #556#return; {33816#false} is VALID [2022-02-20 22:07:16,837 INFO L290 TraceCheckUtils]: 79: Hoare triple {33816#false} assume -9223372036854775808 <= usb_maxpacket_#t~ret47#1 && usb_maxpacket_#t~ret47#1 <= 9223372036854775807;usb_maxpacket_~tmp___0~1#1 := usb_maxpacket_#t~ret47#1;havoc usb_maxpacket_#t~ret47#1; {33816#false} is VALID [2022-02-20 22:07:16,837 INFO L290 TraceCheckUtils]: 80: Hoare triple {33816#false} assume !(0 != usb_maxpacket_~tmp___0~1#1); {33816#false} is VALID [2022-02-20 22:07:16,838 INFO L272 TraceCheckUtils]: 81: Hoare triple {33816#false} call usb_maxpacket_#t~ret48#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {33815#true} is VALID [2022-02-20 22:07:16,838 INFO L290 TraceCheckUtils]: 82: Hoare triple {33815#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {33815#true} is VALID [2022-02-20 22:07:16,838 INFO L290 TraceCheckUtils]: 83: Hoare triple {33815#true} assume true; {33815#true} is VALID [2022-02-20 22:07:16,838 INFO L284 TraceCheckUtils]: 84: Hoare quadruple {33815#true} {33816#false} #560#return; {33816#false} is VALID [2022-02-20 22:07:16,838 INFO L290 TraceCheckUtils]: 85: Hoare triple {33816#false} assume -9223372036854775808 <= usb_maxpacket_#t~ret48#1 && usb_maxpacket_#t~ret48#1 <= 9223372036854775807;havoc usb_maxpacket_#t~ret48#1;call usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset := read~$Pointer$(usb_maxpacket_~udev#1.base, 1186 + usb_maxpacket_~udev#1.offset + 8 * (usb_maxpacket_~epnum~0#1 % 4294967296), 8);usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset := usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset;havoc usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset; {33816#false} is VALID [2022-02-20 22:07:16,838 INFO L290 TraceCheckUtils]: 86: Hoare triple {33816#false} assume 0 == (usb_maxpacket_~ep~0#1.base + usb_maxpacket_~ep~0#1.offset) % 18446744073709551616;usb_maxpacket_#res#1 := 0; {33816#false} is VALID [2022-02-20 22:07:16,838 INFO L290 TraceCheckUtils]: 87: Hoare triple {33816#false} usb_acecad_probe_#t~ret134#1 := usb_maxpacket_#res#1;assume { :end_inline_usb_maxpacket } true;usb_acecad_probe_~tmp___2~0#1 := usb_acecad_probe_#t~ret134#1;havoc usb_acecad_probe_#t~ret134#1;usb_acecad_probe_~maxp~0#1 := usb_acecad_probe_~tmp___2~0#1 % 65536; {33816#false} is VALID [2022-02-20 22:07:16,839 INFO L272 TraceCheckUtils]: 88: Hoare triple {33816#false} call usb_acecad_probe_#t~ret135#1.base, usb_acecad_probe_#t~ret135#1.offset := kzalloc(232, 208); {33913#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:16,839 INFO L290 TraceCheckUtils]: 89: Hoare triple {33913#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {33815#true} is VALID [2022-02-20 22:07:16,839 INFO L272 TraceCheckUtils]: 90: Hoare triple {33815#true} call __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset := ldv_malloc(__kmalloc_~size#1); {33913#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:16,839 INFO L290 TraceCheckUtils]: 91: Hoare triple {33913#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {33815#true} is VALID [2022-02-20 22:07:16,840 INFO L290 TraceCheckUtils]: 92: Hoare triple {33815#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {33815#true} is VALID [2022-02-20 22:07:16,840 INFO L290 TraceCheckUtils]: 93: Hoare triple {33815#true} assume true; {33815#true} is VALID [2022-02-20 22:07:16,840 INFO L284 TraceCheckUtils]: 94: Hoare quadruple {33815#true} {33815#true} #530#return; {33815#true} is VALID [2022-02-20 22:07:16,840 INFO L290 TraceCheckUtils]: 95: Hoare triple {33815#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset; {33815#true} is VALID [2022-02-20 22:07:16,840 INFO L290 TraceCheckUtils]: 96: Hoare triple {33815#true} kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {33815#true} is VALID [2022-02-20 22:07:16,840 INFO L290 TraceCheckUtils]: 97: Hoare triple {33815#true} #t~ret55#1.base, #t~ret55#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret55#1.base, #t~ret55#1.offset;havoc #t~ret55#1.base, #t~ret55#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {33815#true} is VALID [2022-02-20 22:07:16,840 INFO L290 TraceCheckUtils]: 98: Hoare triple {33815#true} assume true; {33815#true} is VALID [2022-02-20 22:07:16,841 INFO L284 TraceCheckUtils]: 99: Hoare quadruple {33815#true} {33816#false} #562#return; {33816#false} is VALID [2022-02-20 22:07:16,841 INFO L290 TraceCheckUtils]: 100: Hoare triple {33816#false} usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset := usb_acecad_probe_#t~ret135#1.base, usb_acecad_probe_#t~ret135#1.offset;havoc usb_acecad_probe_#t~ret135#1.base, usb_acecad_probe_#t~ret135#1.offset;usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset := usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;assume { :begin_inline_input_allocate_device } true;havoc input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;havoc input_allocate_device_#t~ret67#1.base, input_allocate_device_#t~ret67#1.offset; {33816#false} is VALID [2022-02-20 22:07:16,841 INFO L272 TraceCheckUtils]: 101: Hoare triple {33816#false} call input_allocate_device_#t~ret67#1.base, input_allocate_device_#t~ret67#1.offset := kzalloc(1855, ~bitwiseOr(~bitwiseOr(16, 64), 128)); {33913#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:16,841 INFO L290 TraceCheckUtils]: 102: Hoare triple {33913#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {33815#true} is VALID [2022-02-20 22:07:16,841 INFO L272 TraceCheckUtils]: 103: Hoare triple {33815#true} call __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset := ldv_malloc(__kmalloc_~size#1); {33913#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:16,842 INFO L290 TraceCheckUtils]: 104: Hoare triple {33913#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {33815#true} is VALID [2022-02-20 22:07:16,842 INFO L290 TraceCheckUtils]: 105: Hoare triple {33815#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {33815#true} is VALID [2022-02-20 22:07:16,842 INFO L290 TraceCheckUtils]: 106: Hoare triple {33815#true} assume true; {33815#true} is VALID [2022-02-20 22:07:16,842 INFO L284 TraceCheckUtils]: 107: Hoare quadruple {33815#true} {33815#true} #530#return; {33815#true} is VALID [2022-02-20 22:07:16,842 INFO L290 TraceCheckUtils]: 108: Hoare triple {33815#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset; {33815#true} is VALID [2022-02-20 22:07:16,842 INFO L290 TraceCheckUtils]: 109: Hoare triple {33815#true} kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {33815#true} is VALID [2022-02-20 22:07:16,842 INFO L290 TraceCheckUtils]: 110: Hoare triple {33815#true} #t~ret55#1.base, #t~ret55#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret55#1.base, #t~ret55#1.offset;havoc #t~ret55#1.base, #t~ret55#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {33815#true} is VALID [2022-02-20 22:07:16,843 INFO L290 TraceCheckUtils]: 111: Hoare triple {33815#true} assume true; {33815#true} is VALID [2022-02-20 22:07:16,843 INFO L284 TraceCheckUtils]: 112: Hoare quadruple {33815#true} {33816#false} #564#return; {33816#false} is VALID [2022-02-20 22:07:16,843 INFO L290 TraceCheckUtils]: 113: Hoare triple {33816#false} input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset := input_allocate_device_#t~ret67#1.base, input_allocate_device_#t~ret67#1.offset;havoc input_allocate_device_#t~ret67#1.base, input_allocate_device_#t~ret67#1.offset; {33816#false} is VALID [2022-02-20 22:07:16,843 INFO L290 TraceCheckUtils]: 114: Hoare triple {33816#false} usb_acecad_probe_#t~ret136#1.base, usb_acecad_probe_#t~ret136#1.offset := input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;assume { :end_inline_input_allocate_device } true;usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset := usb_acecad_probe_#t~ret136#1.base, usb_acecad_probe_#t~ret136#1.offset;havoc usb_acecad_probe_#t~ret136#1.base, usb_acecad_probe_#t~ret136#1.offset; {33816#false} is VALID [2022-02-20 22:07:16,843 INFO L290 TraceCheckUtils]: 115: Hoare triple {33816#false} assume !(0 == (usb_acecad_probe_~acecad~3#1.base + usb_acecad_probe_~acecad~3#1.offset) % 18446744073709551616 || 0 == (usb_acecad_probe_~input_dev~0#1.base + usb_acecad_probe_~input_dev~0#1.offset) % 18446744073709551616);assume { :begin_inline_usb_alloc_coherent } true;usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset, usb_alloc_coherent_#in~arg1#1, usb_alloc_coherent_#in~arg2#1, usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, 8, 208, usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset;havoc usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;havoc usb_alloc_coherent_#t~ret212#1.base, usb_alloc_coherent_#t~ret212#1.offset, usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset, usb_alloc_coherent_~arg1#1, usb_alloc_coherent_~arg2#1, usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset;usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset := usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset;usb_alloc_coherent_~arg1#1 := usb_alloc_coherent_#in~arg1#1;usb_alloc_coherent_~arg2#1 := usb_alloc_coherent_#in~arg2#1;usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset := usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset; {33816#false} is VALID [2022-02-20 22:07:16,843 INFO L272 TraceCheckUtils]: 116: Hoare triple {33816#false} call usb_alloc_coherent_#t~ret212#1.base, usb_alloc_coherent_#t~ret212#1.offset := ldv_malloc(0); {33913#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:16,843 INFO L290 TraceCheckUtils]: 117: Hoare triple {33913#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {33815#true} is VALID [2022-02-20 22:07:16,844 INFO L290 TraceCheckUtils]: 118: Hoare triple {33815#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {33815#true} is VALID [2022-02-20 22:07:16,844 INFO L290 TraceCheckUtils]: 119: Hoare triple {33815#true} assume true; {33815#true} is VALID [2022-02-20 22:07:16,844 INFO L284 TraceCheckUtils]: 120: Hoare quadruple {33815#true} {33816#false} #566#return; {33816#false} is VALID [2022-02-20 22:07:16,844 INFO L290 TraceCheckUtils]: 121: Hoare triple {33816#false} usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset := usb_alloc_coherent_#t~ret212#1.base, usb_alloc_coherent_#t~ret212#1.offset;havoc usb_alloc_coherent_#t~ret212#1.base, usb_alloc_coherent_#t~ret212#1.offset; {33816#false} is VALID [2022-02-20 22:07:16,844 INFO L290 TraceCheckUtils]: 122: Hoare triple {33816#false} usb_acecad_probe_#t~ret137#1.base, usb_acecad_probe_#t~ret137#1.offset := usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;assume { :end_inline_usb_alloc_coherent } true;usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset := usb_acecad_probe_#t~ret137#1.base, usb_acecad_probe_#t~ret137#1.offset;havoc usb_acecad_probe_#t~ret137#1.base, usb_acecad_probe_#t~ret137#1.offset;call write~$Pointer$(usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem138#1.base, usb_acecad_probe_#t~mem138#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8); {33816#false} is VALID [2022-02-20 22:07:16,844 INFO L290 TraceCheckUtils]: 123: Hoare triple {33816#false} assume !(0 == (usb_acecad_probe_#t~mem138#1.base + usb_acecad_probe_#t~mem138#1.offset) % 18446744073709551616);havoc usb_acecad_probe_#t~mem138#1.base, usb_acecad_probe_#t~mem138#1.offset;assume { :begin_inline_ldv_usb_alloc_urb_5 } true;ldv_usb_alloc_urb_5_#in~iso_packets#1, ldv_usb_alloc_urb_5_#in~mem_flags#1 := 0, 208;havoc ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret196#1.base, ldv_usb_alloc_urb_5_#t~ret196#1.offset, ldv_usb_alloc_urb_5_~iso_packets#1, ldv_usb_alloc_urb_5_~mem_flags#1, ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;ldv_usb_alloc_urb_5_~iso_packets#1 := ldv_usb_alloc_urb_5_#in~iso_packets#1;ldv_usb_alloc_urb_5_~mem_flags#1 := ldv_usb_alloc_urb_5_#in~mem_flags#1;havoc ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;assume { :begin_inline_ldv_alloc_urb } true;havoc ldv_alloc_urb_#res#1.base, ldv_alloc_urb_#res#1.offset;havoc ldv_alloc_urb_#t~ret198#1.base, ldv_alloc_urb_#t~ret198#1.offset, ldv_alloc_urb_#t~ret199#1, ldv_alloc_urb_~value~0#1.base, ldv_alloc_urb_~value~0#1.offset, ldv_alloc_urb_~tmp~24#1.base, ldv_alloc_urb_~tmp~24#1.offset, ldv_alloc_urb_~tmp___0~7#1;havoc ldv_alloc_urb_~value~0#1.base, ldv_alloc_urb_~value~0#1.offset;havoc ldv_alloc_urb_~tmp~24#1.base, ldv_alloc_urb_~tmp~24#1.offset;havoc ldv_alloc_urb_~tmp___0~7#1; {33816#false} is VALID [2022-02-20 22:07:16,845 INFO L272 TraceCheckUtils]: 124: Hoare triple {33816#false} call ldv_alloc_urb_#t~ret198#1.base, ldv_alloc_urb_#t~ret198#1.offset := ldv_malloc(180); {33913#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:16,845 INFO L290 TraceCheckUtils]: 125: Hoare triple {33913#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {33815#true} is VALID [2022-02-20 22:07:16,845 INFO L290 TraceCheckUtils]: 126: Hoare triple {33815#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {33815#true} is VALID [2022-02-20 22:07:16,845 INFO L290 TraceCheckUtils]: 127: Hoare triple {33815#true} assume true; {33815#true} is VALID [2022-02-20 22:07:16,845 INFO L284 TraceCheckUtils]: 128: Hoare quadruple {33815#true} {33816#false} #568#return; {33816#false} is VALID [2022-02-20 22:07:16,845 INFO L290 TraceCheckUtils]: 129: Hoare triple {33816#false} ldv_alloc_urb_~tmp~24#1.base, ldv_alloc_urb_~tmp~24#1.offset := ldv_alloc_urb_#t~ret198#1.base, ldv_alloc_urb_#t~ret198#1.offset;havoc ldv_alloc_urb_#t~ret198#1.base, ldv_alloc_urb_#t~ret198#1.offset;ldv_alloc_urb_~value~0#1.base, ldv_alloc_urb_~value~0#1.offset := ldv_alloc_urb_~tmp~24#1.base, ldv_alloc_urb_~tmp~24#1.offset; {33816#false} is VALID [2022-02-20 22:07:16,845 INFO L272 TraceCheckUtils]: 130: Hoare triple {33816#false} call ldv_alloc_urb_#t~ret199#1 := ldv_undef_int(); {33815#true} is VALID [2022-02-20 22:07:16,845 INFO L290 TraceCheckUtils]: 131: Hoare triple {33815#true} havoc ~tmp~8;assume -2147483648 <= #t~nondet65 && #t~nondet65 <= 2147483647;~tmp~8 := #t~nondet65;havoc #t~nondet65;#res := ~tmp~8; {33815#true} is VALID [2022-02-20 22:07:16,846 INFO L290 TraceCheckUtils]: 132: Hoare triple {33815#true} assume true; {33815#true} is VALID [2022-02-20 22:07:16,846 INFO L284 TraceCheckUtils]: 133: Hoare quadruple {33815#true} {33816#false} #570#return; {33816#false} is VALID [2022-02-20 22:07:16,846 INFO L290 TraceCheckUtils]: 134: Hoare triple {33816#false} assume -2147483648 <= ldv_alloc_urb_#t~ret199#1 && ldv_alloc_urb_#t~ret199#1 <= 2147483647;ldv_alloc_urb_~tmp___0~7#1 := ldv_alloc_urb_#t~ret199#1;havoc ldv_alloc_urb_#t~ret199#1; {33816#false} is VALID [2022-02-20 22:07:16,846 INFO L290 TraceCheckUtils]: 135: Hoare triple {33816#false} assume 0 != ldv_alloc_urb_~tmp___0~7#1; {33816#false} is VALID [2022-02-20 22:07:16,846 INFO L290 TraceCheckUtils]: 136: Hoare triple {33816#false} assume 0 != (ldv_alloc_urb_~value~0#1.base + ldv_alloc_urb_~value~0#1.offset) % 18446744073709551616;~usb_urb~0.base, ~usb_urb~0.offset := ldv_alloc_urb_~value~0#1.base, ldv_alloc_urb_~value~0#1.offset; {33816#false} is VALID [2022-02-20 22:07:16,846 INFO L290 TraceCheckUtils]: 137: Hoare triple {33816#false} ldv_alloc_urb_#res#1.base, ldv_alloc_urb_#res#1.offset := ~usb_urb~0.base, ~usb_urb~0.offset; {33816#false} is VALID [2022-02-20 22:07:16,846 INFO L290 TraceCheckUtils]: 138: Hoare triple {33816#false} ldv_usb_alloc_urb_5_#t~ret196#1.base, ldv_usb_alloc_urb_5_#t~ret196#1.offset := ldv_alloc_urb_#res#1.base, ldv_alloc_urb_#res#1.offset;assume { :end_inline_ldv_alloc_urb } true;ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset := ldv_usb_alloc_urb_5_#t~ret196#1.base, ldv_usb_alloc_urb_5_#t~ret196#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret196#1.base, ldv_usb_alloc_urb_5_#t~ret196#1.offset;ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset := ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset; {33816#false} is VALID [2022-02-20 22:07:16,847 INFO L290 TraceCheckUtils]: 139: Hoare triple {33816#false} usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset := ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;assume { :end_inline_ldv_usb_alloc_urb_5 } true;call write~$Pointer$(usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset, usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8);havoc usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset;call usb_acecad_probe_#t~mem140#1.base, usb_acecad_probe_#t~mem140#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8); {33816#false} is VALID [2022-02-20 22:07:16,847 INFO L290 TraceCheckUtils]: 140: Hoare triple {33816#false} assume 0 == (usb_acecad_probe_#t~mem140#1.base + usb_acecad_probe_#t~mem140#1.offset) % 18446744073709551616;havoc usb_acecad_probe_#t~mem140#1.base, usb_acecad_probe_#t~mem140#1.offset;usb_acecad_probe_~err~0#1 := -12; {33816#false} is VALID [2022-02-20 22:07:16,847 INFO L290 TraceCheckUtils]: 141: Hoare triple {33816#false} call usb_acecad_probe_#t~mem172#1.base, usb_acecad_probe_#t~mem172#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem173#1 := read~int(usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset, 8); {33816#false} is VALID [2022-02-20 22:07:16,847 INFO L272 TraceCheckUtils]: 142: Hoare triple {33816#false} call usb_free_coherent(usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, 8, usb_acecad_probe_#t~mem172#1.base, usb_acecad_probe_#t~mem172#1.offset, usb_acecad_probe_#t~mem173#1); {33815#true} is VALID [2022-02-20 22:07:16,847 INFO L290 TraceCheckUtils]: 143: Hoare triple {33815#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1 := #in~arg1;~arg2.base, ~arg2.offset := #in~arg2.base, #in~arg2.offset;~arg3 := #in~arg3; {33815#true} is VALID [2022-02-20 22:07:16,847 INFO L290 TraceCheckUtils]: 144: Hoare triple {33815#true} assume true; {33815#true} is VALID [2022-02-20 22:07:16,847 INFO L284 TraceCheckUtils]: 145: Hoare quadruple {33815#true} {33816#false} #592#return; {33816#false} is VALID [2022-02-20 22:07:16,848 INFO L290 TraceCheckUtils]: 146: Hoare triple {33816#false} havoc usb_acecad_probe_#t~mem172#1.base, usb_acecad_probe_#t~mem172#1.offset;havoc usb_acecad_probe_#t~mem173#1; {33816#false} is VALID [2022-02-20 22:07:16,848 INFO L290 TraceCheckUtils]: 147: Hoare triple {33816#false} assume { :begin_inline_input_free_device } true;input_free_device_#in~arg0#1.base, input_free_device_#in~arg0#1.offset := usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset;havoc input_free_device_~arg0#1.base, input_free_device_~arg0#1.offset;input_free_device_~arg0#1.base, input_free_device_~arg0#1.offset := input_free_device_#in~arg0#1.base, input_free_device_#in~arg0#1.offset; {33816#false} is VALID [2022-02-20 22:07:16,848 INFO L290 TraceCheckUtils]: 148: Hoare triple {33816#false} assume { :end_inline_input_free_device } true; {33816#false} is VALID [2022-02-20 22:07:16,848 INFO L272 TraceCheckUtils]: 149: Hoare triple {33816#false} call kfree(usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset); {33922#(= |old(#valid)| |#valid|)} is VALID [2022-02-20 22:07:16,848 INFO L290 TraceCheckUtils]: 150: Hoare triple {33922#(= |old(#valid)| |#valid|)} ~p.base, ~p.offset := #in~p.base, #in~p.offset;call ULTIMATE.dealloc(~p.base, ~p.offset); {33815#true} is VALID [2022-02-20 22:07:16,848 INFO L290 TraceCheckUtils]: 151: Hoare triple {33815#true} assume true; {33815#true} is VALID [2022-02-20 22:07:16,848 INFO L284 TraceCheckUtils]: 152: Hoare quadruple {33815#true} {33816#false} #594#return; {33816#false} is VALID [2022-02-20 22:07:16,849 INFO L290 TraceCheckUtils]: 153: Hoare triple {33816#false} usb_acecad_probe_#res#1 := usb_acecad_probe_~err~0#1; {33816#false} is VALID [2022-02-20 22:07:16,849 INFO L290 TraceCheckUtils]: 154: Hoare triple {33816#false} main_#t~ret188#1 := usb_acecad_probe_#res#1;assume { :end_inline_usb_acecad_probe } true;assume -2147483648 <= main_#t~ret188#1 && main_#t~ret188#1 <= 2147483647;~ldv_retval_0~0 := main_#t~ret188#1;havoc main_#t~ret188#1; {33816#false} is VALID [2022-02-20 22:07:16,849 INFO L290 TraceCheckUtils]: 155: Hoare triple {33816#false} assume 0 == ~ldv_retval_0~0;~ldv_state_variable_1~0 := 2;~ref_cnt~0 := 1 + ~ref_cnt~0; {33816#false} is VALID [2022-02-20 22:07:16,849 INFO L290 TraceCheckUtils]: 156: Hoare triple {33816#false} assume -2147483648 <= main_#t~nondet184#1 && main_#t~nondet184#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet184#1;havoc main_#t~nondet184#1;main_#t~switch185#1 := 0 == main_~tmp___0~6#1; {33816#false} is VALID [2022-02-20 22:07:16,849 INFO L290 TraceCheckUtils]: 157: Hoare triple {33816#false} assume !main_#t~switch185#1;main_#t~switch185#1 := main_#t~switch185#1 || 1 == main_~tmp___0~6#1; {33816#false} is VALID [2022-02-20 22:07:16,849 INFO L290 TraceCheckUtils]: 158: Hoare triple {33816#false} assume main_#t~switch185#1; {33816#false} is VALID [2022-02-20 22:07:16,849 INFO L290 TraceCheckUtils]: 159: Hoare triple {33816#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet189#1 && main_#t~nondet189#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet189#1;havoc main_#t~nondet189#1;main_#t~switch190#1 := 0 == main_~tmp___2~1#1; {33816#false} is VALID [2022-02-20 22:07:16,850 INFO L290 TraceCheckUtils]: 160: Hoare triple {33816#false} assume main_#t~switch190#1; {33816#false} is VALID [2022-02-20 22:07:16,850 INFO L290 TraceCheckUtils]: 161: Hoare triple {33816#false} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0;assume { :begin_inline_usb_acecad_exit } true;assume { :begin_inline_ldv_usb_deregister_11 } true;ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset := ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset;assume { :begin_inline_usb_deregister } true;usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset := ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;havoc usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset;usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset := usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset; {33816#false} is VALID [2022-02-20 22:07:16,850 INFO L290 TraceCheckUtils]: 162: Hoare triple {33816#false} assume { :end_inline_usb_deregister } true;~ldv_state_variable_1~0 := 0; {33816#false} is VALID [2022-02-20 22:07:16,850 INFO L290 TraceCheckUtils]: 163: Hoare triple {33816#false} assume { :end_inline_ldv_usb_deregister_11 } true; {33816#false} is VALID [2022-02-20 22:07:16,850 INFO L290 TraceCheckUtils]: 164: Hoare triple {33816#false} assume { :end_inline_usb_acecad_exit } true;~ldv_state_variable_0~0 := 2; {33816#false} is VALID [2022-02-20 22:07:16,850 INFO L290 TraceCheckUtils]: 165: Hoare triple {33816#false} assume { :begin_inline_ldv_check_final_state } true; {33816#false} is VALID [2022-02-20 22:07:16,850 INFO L290 TraceCheckUtils]: 166: Hoare triple {33816#false} assume 0 != (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616; {33816#false} is VALID [2022-02-20 22:07:16,851 INFO L272 TraceCheckUtils]: 167: Hoare triple {33816#false} call ldv_error(); {33816#false} is VALID [2022-02-20 22:07:16,851 INFO L290 TraceCheckUtils]: 168: Hoare triple {33816#false} assume !false; {33816#false} is VALID [2022-02-20 22:07:16,851 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2022-02-20 22:07:16,851 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:07:16,851 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [444362409] [2022-02-20 22:07:16,852 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [444362409] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:07:16,852 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 22:07:16,852 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2022-02-20 22:07:16,852 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1493771470] [2022-02-20 22:07:16,852 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:07:16,853 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 11.444444444444445) internal successors, (103), 5 states have internal predecessors, (103), 2 states have call successors, (16), 6 states have call predecessors, (16), 1 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) Word has length 169 [2022-02-20 22:07:16,853 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:07:16,853 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 9 states, 9 states have (on average 11.444444444444445) internal successors, (103), 5 states have internal predecessors, (103), 2 states have call successors, (16), 6 states have call predecessors, (16), 1 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2022-02-20 22:07:16,957 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 134 edges. 134 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:16,957 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-02-20 22:07:16,958 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:07:16,958 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-02-20 22:07:16,958 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2022-02-20 22:07:16,958 INFO L87 Difference]: Start difference. First operand 855 states and 1111 transitions. Second operand has 9 states, 9 states have (on average 11.444444444444445) internal successors, (103), 5 states have internal predecessors, (103), 2 states have call successors, (16), 6 states have call predecessors, (16), 1 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2022-02-20 22:07:19,089 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:19,090 INFO L93 Difference]: Finished difference Result 2293 states and 3074 transitions. [2022-02-20 22:07:19,090 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-02-20 22:07:19,090 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 11.444444444444445) internal successors, (103), 5 states have internal predecessors, (103), 2 states have call successors, (16), 6 states have call predecessors, (16), 1 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) Word has length 169 [2022-02-20 22:07:19,091 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 22:07:19,091 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 11.444444444444445) internal successors, (103), 5 states have internal predecessors, (103), 2 states have call successors, (16), 6 states have call predecessors, (16), 1 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2022-02-20 22:07:19,097 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 751 transitions. [2022-02-20 22:07:19,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 11.444444444444445) internal successors, (103), 5 states have internal predecessors, (103), 2 states have call successors, (16), 6 states have call predecessors, (16), 1 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2022-02-20 22:07:19,103 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 751 transitions. [2022-02-20 22:07:19,103 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 9 states and 751 transitions. [2022-02-20 22:07:19,649 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 751 edges. 751 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:19,747 INFO L225 Difference]: With dead ends: 2293 [2022-02-20 22:07:19,748 INFO L226 Difference]: Without dead ends: 1457 [2022-02-20 22:07:19,749 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 36 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=81, Unknown=0, NotChecked=0, Total=110 [2022-02-20 22:07:19,750 INFO L933 BasicCegarLoop]: 340 mSDtfsCounter, 491 mSDsluCounter, 1196 mSDsCounter, 0 mSdLazyCounter, 386 mSolverCounterSat, 166 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 496 SdHoareTripleChecker+Valid, 1536 SdHoareTripleChecker+Invalid, 552 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 166 IncrementalHoareTripleChecker+Valid, 386 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-02-20 22:07:19,750 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [496 Valid, 1536 Invalid, 552 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [166 Valid, 386 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-02-20 22:07:19,752 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1457 states. [2022-02-20 22:07:19,791 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1457 to 867. [2022-02-20 22:07:19,791 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 22:07:19,793 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1457 states. Second operand has 867 states, 681 states have (on average 1.2657856093979443) internal successors, (862), 689 states have internal predecessors, (862), 130 states have call successors, (130), 56 states have call predecessors, (130), 55 states have return successors, (131), 129 states have call predecessors, (131), 129 states have call successors, (131) [2022-02-20 22:07:19,794 INFO L74 IsIncluded]: Start isIncluded. First operand 1457 states. Second operand has 867 states, 681 states have (on average 1.2657856093979443) internal successors, (862), 689 states have internal predecessors, (862), 130 states have call successors, (130), 56 states have call predecessors, (130), 55 states have return successors, (131), 129 states have call predecessors, (131), 129 states have call successors, (131) [2022-02-20 22:07:19,795 INFO L87 Difference]: Start difference. First operand 1457 states. Second operand has 867 states, 681 states have (on average 1.2657856093979443) internal successors, (862), 689 states have internal predecessors, (862), 130 states have call successors, (130), 56 states have call predecessors, (130), 55 states have return successors, (131), 129 states have call predecessors, (131), 129 states have call successors, (131) [2022-02-20 22:07:19,892 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:19,892 INFO L93 Difference]: Finished difference Result 1457 states and 1978 transitions. [2022-02-20 22:07:19,892 INFO L276 IsEmpty]: Start isEmpty. Operand 1457 states and 1978 transitions. [2022-02-20 22:07:19,896 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:19,896 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:19,898 INFO L74 IsIncluded]: Start isIncluded. First operand has 867 states, 681 states have (on average 1.2657856093979443) internal successors, (862), 689 states have internal predecessors, (862), 130 states have call successors, (130), 56 states have call predecessors, (130), 55 states have return successors, (131), 129 states have call predecessors, (131), 129 states have call successors, (131) Second operand 1457 states. [2022-02-20 22:07:19,899 INFO L87 Difference]: Start difference. First operand has 867 states, 681 states have (on average 1.2657856093979443) internal successors, (862), 689 states have internal predecessors, (862), 130 states have call successors, (130), 56 states have call predecessors, (130), 55 states have return successors, (131), 129 states have call predecessors, (131), 129 states have call successors, (131) Second operand 1457 states. [2022-02-20 22:07:19,971 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:19,971 INFO L93 Difference]: Finished difference Result 1457 states and 1978 transitions. [2022-02-20 22:07:19,971 INFO L276 IsEmpty]: Start isEmpty. Operand 1457 states and 1978 transitions. [2022-02-20 22:07:19,975 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:19,975 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:19,975 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 22:07:19,975 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 22:07:19,977 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 867 states, 681 states have (on average 1.2657856093979443) internal successors, (862), 689 states have internal predecessors, (862), 130 states have call successors, (130), 56 states have call predecessors, (130), 55 states have return successors, (131), 129 states have call predecessors, (131), 129 states have call successors, (131) [2022-02-20 22:07:20,027 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 867 states to 867 states and 1123 transitions. [2022-02-20 22:07:20,028 INFO L78 Accepts]: Start accepts. Automaton has 867 states and 1123 transitions. Word has length 169 [2022-02-20 22:07:20,028 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 22:07:20,029 INFO L470 AbstractCegarLoop]: Abstraction has 867 states and 1123 transitions. [2022-02-20 22:07:20,029 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 11.444444444444445) internal successors, (103), 5 states have internal predecessors, (103), 2 states have call successors, (16), 6 states have call predecessors, (16), 1 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2022-02-20 22:07:20,029 INFO L276 IsEmpty]: Start isEmpty. Operand 867 states and 1123 transitions. [2022-02-20 22:07:20,032 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 172 [2022-02-20 22:07:20,032 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:07:20,032 INFO L514 BasicCegarLoop]: trace histogram [5, 5, 5, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:07:20,033 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2022-02-20 22:07:20,033 INFO L402 AbstractCegarLoop]: === Iteration 11 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:07:20,033 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:07:20,034 INFO L85 PathProgramCache]: Analyzing trace with hash -1080620452, now seen corresponding path program 1 times [2022-02-20 22:07:20,034 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:07:20,035 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1491717881] [2022-02-20 22:07:20,035 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:07:20,035 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:07:20,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:20,194 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 22:07:20,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:20,207 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:20,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:20,211 INFO L290 TraceCheckUtils]: 0: Hoare triple {41237#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {41148#true} is VALID [2022-02-20 22:07:20,212 INFO L290 TraceCheckUtils]: 1: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:20,212 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {41148#true} {41148#true} #538#return; {41148#true} is VALID [2022-02-20 22:07:20,212 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:20,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:20,216 INFO L290 TraceCheckUtils]: 0: Hoare triple {41148#true} ~cond := #in~cond; {41148#true} is VALID [2022-02-20 22:07:20,216 INFO L290 TraceCheckUtils]: 1: Hoare triple {41148#true} assume !(0 == ~cond); {41148#true} is VALID [2022-02-20 22:07:20,216 INFO L290 TraceCheckUtils]: 2: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:20,216 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {41148#true} {41148#true} #540#return; {41148#true} is VALID [2022-02-20 22:07:20,216 INFO L290 TraceCheckUtils]: 0: Hoare triple {41229#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {41148#true} is VALID [2022-02-20 22:07:20,217 INFO L272 TraceCheckUtils]: 1: Hoare triple {41148#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {41237#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:20,217 INFO L290 TraceCheckUtils]: 2: Hoare triple {41237#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {41148#true} is VALID [2022-02-20 22:07:20,218 INFO L290 TraceCheckUtils]: 3: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:20,218 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {41148#true} {41148#true} #538#return; {41148#true} is VALID [2022-02-20 22:07:20,218 INFO L290 TraceCheckUtils]: 5: Hoare triple {41148#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {41148#true} is VALID [2022-02-20 22:07:20,218 INFO L272 TraceCheckUtils]: 6: Hoare triple {41148#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {41148#true} is VALID [2022-02-20 22:07:20,218 INFO L290 TraceCheckUtils]: 7: Hoare triple {41148#true} ~cond := #in~cond; {41148#true} is VALID [2022-02-20 22:07:20,218 INFO L290 TraceCheckUtils]: 8: Hoare triple {41148#true} assume !(0 == ~cond); {41148#true} is VALID [2022-02-20 22:07:20,218 INFO L290 TraceCheckUtils]: 9: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:20,219 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {41148#true} {41148#true} #540#return; {41148#true} is VALID [2022-02-20 22:07:20,219 INFO L290 TraceCheckUtils]: 11: Hoare triple {41148#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {41148#true} is VALID [2022-02-20 22:07:20,219 INFO L290 TraceCheckUtils]: 12: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:20,219 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {41148#true} {41148#true} #544#return; {41148#true} is VALID [2022-02-20 22:07:20,219 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 27 [2022-02-20 22:07:20,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:20,229 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:20,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:20,233 INFO L290 TraceCheckUtils]: 0: Hoare triple {41237#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {41148#true} is VALID [2022-02-20 22:07:20,233 INFO L290 TraceCheckUtils]: 1: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:20,233 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {41148#true} {41148#true} #538#return; {41148#true} is VALID [2022-02-20 22:07:20,233 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:20,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:20,237 INFO L290 TraceCheckUtils]: 0: Hoare triple {41148#true} ~cond := #in~cond; {41148#true} is VALID [2022-02-20 22:07:20,238 INFO L290 TraceCheckUtils]: 1: Hoare triple {41148#true} assume !(0 == ~cond); {41148#true} is VALID [2022-02-20 22:07:20,238 INFO L290 TraceCheckUtils]: 2: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:20,238 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {41148#true} {41148#true} #540#return; {41148#true} is VALID [2022-02-20 22:07:20,238 INFO L290 TraceCheckUtils]: 0: Hoare triple {41229#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {41148#true} is VALID [2022-02-20 22:07:20,239 INFO L272 TraceCheckUtils]: 1: Hoare triple {41148#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {41237#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:20,239 INFO L290 TraceCheckUtils]: 2: Hoare triple {41237#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {41148#true} is VALID [2022-02-20 22:07:20,239 INFO L290 TraceCheckUtils]: 3: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:20,239 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {41148#true} {41148#true} #538#return; {41148#true} is VALID [2022-02-20 22:07:20,240 INFO L290 TraceCheckUtils]: 5: Hoare triple {41148#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {41148#true} is VALID [2022-02-20 22:07:20,240 INFO L272 TraceCheckUtils]: 6: Hoare triple {41148#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {41148#true} is VALID [2022-02-20 22:07:20,240 INFO L290 TraceCheckUtils]: 7: Hoare triple {41148#true} ~cond := #in~cond; {41148#true} is VALID [2022-02-20 22:07:20,240 INFO L290 TraceCheckUtils]: 8: Hoare triple {41148#true} assume !(0 == ~cond); {41148#true} is VALID [2022-02-20 22:07:20,240 INFO L290 TraceCheckUtils]: 9: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:20,240 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {41148#true} {41148#true} #540#return; {41148#true} is VALID [2022-02-20 22:07:20,240 INFO L290 TraceCheckUtils]: 11: Hoare triple {41148#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {41148#true} is VALID [2022-02-20 22:07:20,241 INFO L290 TraceCheckUtils]: 12: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:20,241 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {41148#true} {41164#(= ~ref_cnt~0 0)} #600#return; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,247 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 56 [2022-02-20 22:07:20,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:20,253 INFO L290 TraceCheckUtils]: 0: Hoare triple {41245#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {41148#true} is VALID [2022-02-20 22:07:20,253 INFO L290 TraceCheckUtils]: 1: Hoare triple {41148#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {41148#true} is VALID [2022-02-20 22:07:20,253 INFO L290 TraceCheckUtils]: 2: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:20,254 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {41148#true} {41164#(= ~ref_cnt~0 0)} #546#return; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,254 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 77 [2022-02-20 22:07:20,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:20,260 INFO L290 TraceCheckUtils]: 0: Hoare triple {41148#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {41148#true} is VALID [2022-02-20 22:07:20,261 INFO L290 TraceCheckUtils]: 1: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:20,261 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {41148#true} {41164#(= ~ref_cnt~0 0)} #556#return; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,262 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 83 [2022-02-20 22:07:20,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:20,292 INFO L290 TraceCheckUtils]: 0: Hoare triple {41148#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {41148#true} is VALID [2022-02-20 22:07:20,293 INFO L290 TraceCheckUtils]: 1: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:20,293 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {41148#true} {41164#(= ~ref_cnt~0 0)} #560#return; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,294 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 90 [2022-02-20 22:07:20,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:20,303 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:20,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:20,313 INFO L290 TraceCheckUtils]: 0: Hoare triple {41245#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {41148#true} is VALID [2022-02-20 22:07:20,313 INFO L290 TraceCheckUtils]: 1: Hoare triple {41148#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {41148#true} is VALID [2022-02-20 22:07:20,313 INFO L290 TraceCheckUtils]: 2: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:20,313 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {41148#true} {41148#true} #530#return; {41148#true} is VALID [2022-02-20 22:07:20,314 INFO L290 TraceCheckUtils]: 0: Hoare triple {41245#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {41148#true} is VALID [2022-02-20 22:07:20,314 INFO L272 TraceCheckUtils]: 1: Hoare triple {41148#true} call __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset := ldv_malloc(__kmalloc_~size#1); {41245#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:20,314 INFO L290 TraceCheckUtils]: 2: Hoare triple {41245#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {41148#true} is VALID [2022-02-20 22:07:20,314 INFO L290 TraceCheckUtils]: 3: Hoare triple {41148#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {41148#true} is VALID [2022-02-20 22:07:20,315 INFO L290 TraceCheckUtils]: 4: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:20,315 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {41148#true} {41148#true} #530#return; {41148#true} is VALID [2022-02-20 22:07:20,315 INFO L290 TraceCheckUtils]: 6: Hoare triple {41148#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset; {41148#true} is VALID [2022-02-20 22:07:20,315 INFO L290 TraceCheckUtils]: 7: Hoare triple {41148#true} kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {41148#true} is VALID [2022-02-20 22:07:20,315 INFO L290 TraceCheckUtils]: 8: Hoare triple {41148#true} #t~ret55#1.base, #t~ret55#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret55#1.base, #t~ret55#1.offset;havoc #t~ret55#1.base, #t~ret55#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {41148#true} is VALID [2022-02-20 22:07:20,315 INFO L290 TraceCheckUtils]: 9: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:20,316 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {41148#true} {41164#(= ~ref_cnt~0 0)} #562#return; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,316 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 103 [2022-02-20 22:07:20,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:20,326 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:20,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:20,334 INFO L290 TraceCheckUtils]: 0: Hoare triple {41245#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {41148#true} is VALID [2022-02-20 22:07:20,334 INFO L290 TraceCheckUtils]: 1: Hoare triple {41148#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {41148#true} is VALID [2022-02-20 22:07:20,334 INFO L290 TraceCheckUtils]: 2: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:20,334 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {41148#true} {41148#true} #530#return; {41148#true} is VALID [2022-02-20 22:07:20,335 INFO L290 TraceCheckUtils]: 0: Hoare triple {41245#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {41148#true} is VALID [2022-02-20 22:07:20,335 INFO L272 TraceCheckUtils]: 1: Hoare triple {41148#true} call __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset := ldv_malloc(__kmalloc_~size#1); {41245#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:20,335 INFO L290 TraceCheckUtils]: 2: Hoare triple {41245#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {41148#true} is VALID [2022-02-20 22:07:20,335 INFO L290 TraceCheckUtils]: 3: Hoare triple {41148#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {41148#true} is VALID [2022-02-20 22:07:20,336 INFO L290 TraceCheckUtils]: 4: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:20,336 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {41148#true} {41148#true} #530#return; {41148#true} is VALID [2022-02-20 22:07:20,336 INFO L290 TraceCheckUtils]: 6: Hoare triple {41148#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset; {41148#true} is VALID [2022-02-20 22:07:20,336 INFO L290 TraceCheckUtils]: 7: Hoare triple {41148#true} kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {41148#true} is VALID [2022-02-20 22:07:20,336 INFO L290 TraceCheckUtils]: 8: Hoare triple {41148#true} #t~ret55#1.base, #t~ret55#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret55#1.base, #t~ret55#1.offset;havoc #t~ret55#1.base, #t~ret55#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {41148#true} is VALID [2022-02-20 22:07:20,336 INFO L290 TraceCheckUtils]: 9: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:20,337 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {41148#true} {41164#(= ~ref_cnt~0 0)} #564#return; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,341 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 118 [2022-02-20 22:07:20,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:20,349 INFO L290 TraceCheckUtils]: 0: Hoare triple {41245#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {41148#true} is VALID [2022-02-20 22:07:20,349 INFO L290 TraceCheckUtils]: 1: Hoare triple {41148#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {41148#true} is VALID [2022-02-20 22:07:20,349 INFO L290 TraceCheckUtils]: 2: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:20,350 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {41148#true} {41164#(= ~ref_cnt~0 0)} #566#return; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,350 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 126 [2022-02-20 22:07:20,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:20,363 INFO L290 TraceCheckUtils]: 0: Hoare triple {41245#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {41148#true} is VALID [2022-02-20 22:07:20,365 INFO L290 TraceCheckUtils]: 1: Hoare triple {41148#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {41148#true} is VALID [2022-02-20 22:07:20,365 INFO L290 TraceCheckUtils]: 2: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:20,366 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {41148#true} {41164#(= ~ref_cnt~0 0)} #568#return; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,366 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 132 [2022-02-20 22:07:20,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:20,373 INFO L290 TraceCheckUtils]: 0: Hoare triple {41148#true} havoc ~tmp~8;assume -2147483648 <= #t~nondet65 && #t~nondet65 <= 2147483647;~tmp~8 := #t~nondet65;havoc #t~nondet65;#res := ~tmp~8; {41148#true} is VALID [2022-02-20 22:07:20,373 INFO L290 TraceCheckUtils]: 1: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:20,373 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {41148#true} {41164#(= ~ref_cnt~0 0)} #570#return; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,373 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 144 [2022-02-20 22:07:20,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:20,378 INFO L290 TraceCheckUtils]: 0: Hoare triple {41148#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1 := #in~arg1;~arg2.base, ~arg2.offset := #in~arg2.base, #in~arg2.offset;~arg3 := #in~arg3; {41148#true} is VALID [2022-02-20 22:07:20,379 INFO L290 TraceCheckUtils]: 1: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:20,380 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {41148#true} {41164#(= ~ref_cnt~0 0)} #592#return; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,385 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 151 [2022-02-20 22:07:20,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:20,393 INFO L290 TraceCheckUtils]: 0: Hoare triple {41254#(= |old(#valid)| |#valid|)} ~p.base, ~p.offset := #in~p.base, #in~p.offset;call ULTIMATE.dealloc(~p.base, ~p.offset); {41148#true} is VALID [2022-02-20 22:07:20,393 INFO L290 TraceCheckUtils]: 1: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:20,394 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {41148#true} {41164#(= ~ref_cnt~0 0)} #594#return; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,394 INFO L290 TraceCheckUtils]: 0: Hoare triple {41148#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(99, 2);call #Ultimate.allocInit(10, 3);call #Ultimate.allocInit(7, 4);call write~init~int(97, 4, 0, 1);call write~init~int(99, 4, 1, 1);call write~init~int(101, 4, 2, 1);call write~init~int(99, 4, 3, 1);call write~init~int(97, 4, 4, 1);call write~init~int(100, 4, 5, 1);call write~init~int(0, 4, 6, 1);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(20, 6);call #Ultimate.allocInit(57, 7);call #Ultimate.allocInit(2, 8);call write~init~int(32, 8, 0, 1);call write~init~int(0, 8, 1, 1);call #Ultimate.allocInit(8, 9);call #Ultimate.allocInit(34, 10);call #Ultimate.allocInit(32, 11);call #Ultimate.allocInit(11, 12);call #Ultimate.allocInit(48, 13);~LDV_IN_INTERRUPT~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset := 14, 0;call #Ultimate.allocInit(72, 14);call write~init~int(3, ~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 2 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(4, ~#usb_acecad_id_table~0.base, 4 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 6 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 8 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 10 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 11 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 12 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 13 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 14 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 15 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 16 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(3, ~#usb_acecad_id_table~0.base, 24 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 26 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(8, ~#usb_acecad_id_table~0.base, 28 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 30 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 32 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 34 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 35 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 36 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 37 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 38 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 39 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(1, ~#usb_acecad_id_table~0.base, 40 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(0, ~#usb_acecad_id_table~0.base, 48 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 50 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 52 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 54 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 56 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 58 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 59 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 60 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 61 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 62 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 63 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 64 + ~#usb_acecad_id_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.driver_info := 0;~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset := 15, 0;call #Ultimate.allocInit(264, 15);call write~init~$Pointer$(12, 0, ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_probe.base, #funAddr~usb_acecad_probe.offset, ~#usb_acecad_driver~0.base, 8 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_disconnect.base, #funAddr~usb_acecad_disconnect.offset, ~#usb_acecad_driver~0.base, 16 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 24 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 32 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 40 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 48 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 56 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 64 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, ~#usb_acecad_driver~0.base, 72 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 80 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 84 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 88 + ~#usb_acecad_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 92 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 100 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 108 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 116 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 124 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 132 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 136 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 144 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 152 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 160 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 168 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 176 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 184 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 192 + ~#usb_acecad_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 193 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 201 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 209 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 217 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 225 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 233 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 241 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 249 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 257 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 261 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 262 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 263 + ~#usb_acecad_driver~0.offset, 1);~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {41148#true} is VALID [2022-02-20 22:07:20,394 INFO L290 TraceCheckUtils]: 1: Hoare triple {41148#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret183#1.base, main_#t~ret183#1.offset, main_#t~nondet184#1, main_#t~switch185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~ret188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~ret191#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~17#1.base, main_~tmp~17#1.offset, main_~tmp___0~6#1, main_~tmp___1~3#1, main_~tmp___2~1#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~17#1.base, main_~tmp~17#1.offset;havoc main_~tmp___0~6#1;havoc main_~tmp___1~3#1;havoc main_~tmp___2~1#1; {41148#true} is VALID [2022-02-20 22:07:20,395 INFO L272 TraceCheckUtils]: 2: Hoare triple {41148#true} call main_#t~ret183#1.base, main_#t~ret183#1.offset := ldv_init_zalloc(24); {41229#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:20,395 INFO L290 TraceCheckUtils]: 3: Hoare triple {41229#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {41148#true} is VALID [2022-02-20 22:07:20,396 INFO L272 TraceCheckUtils]: 4: Hoare triple {41148#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {41237#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:20,396 INFO L290 TraceCheckUtils]: 5: Hoare triple {41237#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {41148#true} is VALID [2022-02-20 22:07:20,396 INFO L290 TraceCheckUtils]: 6: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:20,396 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {41148#true} {41148#true} #538#return; {41148#true} is VALID [2022-02-20 22:07:20,396 INFO L290 TraceCheckUtils]: 8: Hoare triple {41148#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {41148#true} is VALID [2022-02-20 22:07:20,396 INFO L272 TraceCheckUtils]: 9: Hoare triple {41148#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {41148#true} is VALID [2022-02-20 22:07:20,397 INFO L290 TraceCheckUtils]: 10: Hoare triple {41148#true} ~cond := #in~cond; {41148#true} is VALID [2022-02-20 22:07:20,397 INFO L290 TraceCheckUtils]: 11: Hoare triple {41148#true} assume !(0 == ~cond); {41148#true} is VALID [2022-02-20 22:07:20,397 INFO L290 TraceCheckUtils]: 12: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:20,397 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {41148#true} {41148#true} #540#return; {41148#true} is VALID [2022-02-20 22:07:20,397 INFO L290 TraceCheckUtils]: 14: Hoare triple {41148#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {41148#true} is VALID [2022-02-20 22:07:20,397 INFO L290 TraceCheckUtils]: 15: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:20,397 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {41148#true} {41148#true} #544#return; {41148#true} is VALID [2022-02-20 22:07:20,398 INFO L290 TraceCheckUtils]: 17: Hoare triple {41148#true} main_~tmp~17#1.base, main_~tmp~17#1.offset := main_#t~ret183#1.base, main_#t~ret183#1.offset;havoc main_#t~ret183#1.base, main_#t~ret183#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~17#1.base, main_~tmp~17#1.offset;assume { :begin_inline_ldv_initialize } true; {41148#true} is VALID [2022-02-20 22:07:20,398 INFO L290 TraceCheckUtils]: 18: Hoare triple {41148#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,398 INFO L290 TraceCheckUtils]: 19: Hoare triple {41164#(= ~ref_cnt~0 0)} assume -2147483648 <= main_#t~nondet184#1 && main_#t~nondet184#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet184#1;havoc main_#t~nondet184#1;main_#t~switch185#1 := 0 == main_~tmp___0~6#1; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,398 INFO L290 TraceCheckUtils]: 20: Hoare triple {41164#(= ~ref_cnt~0 0)} assume !main_#t~switch185#1;main_#t~switch185#1 := main_#t~switch185#1 || 1 == main_~tmp___0~6#1; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,399 INFO L290 TraceCheckUtils]: 21: Hoare triple {41164#(= ~ref_cnt~0 0)} assume main_#t~switch185#1; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,399 INFO L290 TraceCheckUtils]: 22: Hoare triple {41164#(= ~ref_cnt~0 0)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet189#1 && main_#t~nondet189#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet189#1;havoc main_#t~nondet189#1;main_#t~switch190#1 := 0 == main_~tmp___2~1#1; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,399 INFO L290 TraceCheckUtils]: 23: Hoare triple {41164#(= ~ref_cnt~0 0)} assume !main_#t~switch190#1;main_#t~switch190#1 := main_#t~switch190#1 || 1 == main_~tmp___2~1#1; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,400 INFO L290 TraceCheckUtils]: 24: Hoare triple {41164#(= ~ref_cnt~0 0)} assume main_#t~switch190#1; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,400 INFO L290 TraceCheckUtils]: 25: Hoare triple {41164#(= ~ref_cnt~0 0)} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_usb_acecad_init } true;havoc usb_acecad_init_#res#1;havoc usb_acecad_init_#t~ret180#1, usb_acecad_init_#t~nondet181#1, usb_acecad_init_~result~0#1, usb_acecad_init_~tmp~15#1;havoc usb_acecad_init_~result~0#1;havoc usb_acecad_init_~tmp~15#1;assume { :begin_inline_usb_register } true;usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc usb_register_#res#1;havoc usb_register_#t~ret31#1, usb_register_~driver#1.base, usb_register_~driver#1.offset, usb_register_~tmp~1#1;usb_register_~driver#1.base, usb_register_~driver#1.offset := usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset;havoc usb_register_~tmp~1#1;assume { :begin_inline_ldv_usb_register_driver_2 } true;ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset := usb_register_~driver#1.base, usb_register_~driver#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 4, 0;havoc ldv_usb_register_driver_2_#res#1;havoc ldv_usb_register_driver_2_#t~ret193#1, ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset, ldv_usb_register_driver_2_~ldv_func_res~0#1, ldv_usb_register_driver_2_~tmp~19#1;ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_2_~ldv_func_res~0#1;havoc ldv_usb_register_driver_2_~tmp~19#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet213#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet213#1 && usb_register_driver_#t~nondet213#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet213#1;havoc usb_register_driver_#t~nondet213#1; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,400 INFO L290 TraceCheckUtils]: 26: Hoare triple {41164#(= ~ref_cnt~0 0)} ldv_usb_register_driver_2_#t~ret193#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_2_#t~ret193#1 && ldv_usb_register_driver_2_#t~ret193#1 <= 2147483647;ldv_usb_register_driver_2_~tmp~19#1 := ldv_usb_register_driver_2_#t~ret193#1;havoc ldv_usb_register_driver_2_#t~ret193#1;ldv_usb_register_driver_2_~ldv_func_res~0#1 := ldv_usb_register_driver_2_~tmp~19#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset, ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset;havoc ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,401 INFO L272 TraceCheckUtils]: 27: Hoare triple {41164#(= ~ref_cnt~0 0)} call ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset := ldv_init_zalloc(1248); {41229#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:20,401 INFO L290 TraceCheckUtils]: 28: Hoare triple {41229#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {41148#true} is VALID [2022-02-20 22:07:20,402 INFO L272 TraceCheckUtils]: 29: Hoare triple {41148#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {41237#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:20,402 INFO L290 TraceCheckUtils]: 30: Hoare triple {41237#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {41148#true} is VALID [2022-02-20 22:07:20,402 INFO L290 TraceCheckUtils]: 31: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:20,402 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {41148#true} {41148#true} #538#return; {41148#true} is VALID [2022-02-20 22:07:20,403 INFO L290 TraceCheckUtils]: 33: Hoare triple {41148#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {41148#true} is VALID [2022-02-20 22:07:20,403 INFO L272 TraceCheckUtils]: 34: Hoare triple {41148#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {41148#true} is VALID [2022-02-20 22:07:20,403 INFO L290 TraceCheckUtils]: 35: Hoare triple {41148#true} ~cond := #in~cond; {41148#true} is VALID [2022-02-20 22:07:20,403 INFO L290 TraceCheckUtils]: 36: Hoare triple {41148#true} assume !(0 == ~cond); {41148#true} is VALID [2022-02-20 22:07:20,403 INFO L290 TraceCheckUtils]: 37: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:20,403 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {41148#true} {41148#true} #540#return; {41148#true} is VALID [2022-02-20 22:07:20,403 INFO L290 TraceCheckUtils]: 39: Hoare triple {41148#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {41148#true} is VALID [2022-02-20 22:07:20,403 INFO L290 TraceCheckUtils]: 40: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:20,404 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {41148#true} {41164#(= ~ref_cnt~0 0)} #600#return; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,404 INFO L290 TraceCheckUtils]: 42: Hoare triple {41164#(= ~ref_cnt~0 0)} ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset := ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset;havoc ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,405 INFO L290 TraceCheckUtils]: 43: Hoare triple {41164#(= ~ref_cnt~0 0)} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_2_#res#1 := ldv_usb_register_driver_2_~ldv_func_res~0#1; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,405 INFO L290 TraceCheckUtils]: 44: Hoare triple {41164#(= ~ref_cnt~0 0)} usb_register_#t~ret31#1 := ldv_usb_register_driver_2_#res#1;assume { :end_inline_ldv_usb_register_driver_2 } true;assume -2147483648 <= usb_register_#t~ret31#1 && usb_register_#t~ret31#1 <= 2147483647;usb_register_~tmp~1#1 := usb_register_#t~ret31#1;havoc usb_register_#t~ret31#1;usb_register_#res#1 := usb_register_~tmp~1#1; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,405 INFO L290 TraceCheckUtils]: 45: Hoare triple {41164#(= ~ref_cnt~0 0)} usb_acecad_init_#t~ret180#1 := usb_register_#res#1;assume { :end_inline_usb_register } true;assume -2147483648 <= usb_acecad_init_#t~ret180#1 && usb_acecad_init_#t~ret180#1 <= 2147483647;usb_acecad_init_~tmp~15#1 := usb_acecad_init_#t~ret180#1;havoc usb_acecad_init_#t~ret180#1;usb_acecad_init_~result~0#1 := usb_acecad_init_~tmp~15#1; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,406 INFO L290 TraceCheckUtils]: 46: Hoare triple {41164#(= ~ref_cnt~0 0)} assume 0 == usb_acecad_init_~result~0#1;havoc usb_acecad_init_#t~nondet181#1; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,406 INFO L290 TraceCheckUtils]: 47: Hoare triple {41164#(= ~ref_cnt~0 0)} usb_acecad_init_#res#1 := usb_acecad_init_~result~0#1; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,406 INFO L290 TraceCheckUtils]: 48: Hoare triple {41164#(= ~ref_cnt~0 0)} main_#t~ret191#1 := usb_acecad_init_#res#1;assume { :end_inline_usb_acecad_init } true;assume -2147483648 <= main_#t~ret191#1 && main_#t~ret191#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret191#1;havoc main_#t~ret191#1; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,407 INFO L290 TraceCheckUtils]: 49: Hoare triple {41164#(= ~ref_cnt~0 0)} assume 0 == ~ldv_retval_1~0;~ldv_state_variable_0~0 := 3; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,407 INFO L290 TraceCheckUtils]: 50: Hoare triple {41164#(= ~ref_cnt~0 0)} assume !(0 != ~ldv_retval_1~0); {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,407 INFO L290 TraceCheckUtils]: 51: Hoare triple {41164#(= ~ref_cnt~0 0)} assume -2147483648 <= main_#t~nondet184#1 && main_#t~nondet184#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet184#1;havoc main_#t~nondet184#1;main_#t~switch185#1 := 0 == main_~tmp___0~6#1; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,408 INFO L290 TraceCheckUtils]: 52: Hoare triple {41164#(= ~ref_cnt~0 0)} assume main_#t~switch185#1; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,408 INFO L290 TraceCheckUtils]: 53: Hoare triple {41164#(= ~ref_cnt~0 0)} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= main_#t~nondet186#1 && main_#t~nondet186#1 <= 2147483647;main_~tmp___1~3#1 := main_#t~nondet186#1;havoc main_#t~nondet186#1;main_#t~switch187#1 := 0 == main_~tmp___1~3#1; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,408 INFO L290 TraceCheckUtils]: 54: Hoare triple {41164#(= ~ref_cnt~0 0)} assume main_#t~switch187#1; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,409 INFO L290 TraceCheckUtils]: 55: Hoare triple {41164#(= ~ref_cnt~0 0)} assume 1 == ~ldv_state_variable_1~0;assume { :begin_inline_usb_acecad_probe } true;usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset, usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset := ~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc usb_acecad_probe_#res#1;havoc usb_acecad_probe_#t~ret127#1.base, usb_acecad_probe_#t~ret127#1.offset, usb_acecad_probe_#t~mem128#1.base, usb_acecad_probe_#t~mem128#1.offset, usb_acecad_probe_#t~mem129#1, usb_acecad_probe_#t~mem130#1.base, usb_acecad_probe_#t~mem130#1.offset, usb_acecad_probe_#t~ret131#1, usb_acecad_probe_#t~mem132#1, usb_acecad_probe_#t~ret133#1, usb_acecad_probe_#t~ret134#1, usb_acecad_probe_#t~ret135#1.base, usb_acecad_probe_#t~ret135#1.offset, usb_acecad_probe_#t~ret136#1.base, usb_acecad_probe_#t~ret136#1.offset, usb_acecad_probe_#t~ret137#1.base, usb_acecad_probe_#t~ret137#1.offset, usb_acecad_probe_#t~mem138#1.base, usb_acecad_probe_#t~mem138#1.offset, usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset, usb_acecad_probe_#t~mem140#1.base, usb_acecad_probe_#t~mem140#1.offset, usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset, usb_acecad_probe_#t~mem142#1.base, usb_acecad_probe_#t~mem142#1.offset, usb_acecad_probe_#t~ret143#1, usb_acecad_probe_#t~mem144#1.base, usb_acecad_probe_#t~mem144#1.offset, usb_acecad_probe_#t~mem145#1.base, usb_acecad_probe_#t~mem145#1.offset, usb_acecad_probe_#t~ret146#1, usb_acecad_probe_#t~mem147#1.base, usb_acecad_probe_#t~mem147#1.offset, usb_acecad_probe_#t~ret148#1, usb_acecad_probe_#t~ret149#1, usb_acecad_probe_#t~ret150#1, usb_acecad_probe_#t~mem151#1, usb_acecad_probe_#t~switch152#1, usb_acecad_probe_#t~nondet153#1, usb_acecad_probe_#t~nondet154#1, usb_acecad_probe_#t~mem155#1, usb_acecad_probe_#t~mem156#1, usb_acecad_probe_#t~nondet157#1, usb_acecad_probe_#t~nondet158#1, usb_acecad_probe_#t~mem159#1, usb_acecad_probe_#t~mem160#1, usb_acecad_probe_#t~mem161#1.base, usb_acecad_probe_#t~mem161#1.offset, usb_acecad_probe_#t~mem162#1.base, usb_acecad_probe_#t~mem162#1.offset, usb_acecad_probe_#t~ite163#1, usb_acecad_probe_#t~mem164#1, usb_acecad_probe_#t~mem165#1.base, usb_acecad_probe_#t~mem165#1.offset, usb_acecad_probe_#t~mem166#1, usb_acecad_probe_#t~mem167#1.base, usb_acecad_probe_#t~mem167#1.offset, usb_acecad_probe_#t~mem168#1.base, usb_acecad_probe_#t~mem168#1.offset, usb_acecad_probe_#t~mem169#1, usb_acecad_probe_#t~mem170#1.base, usb_acecad_probe_#t~mem170#1.offset, usb_acecad_probe_#t~ret171#1, usb_acecad_probe_#t~mem172#1.base, usb_acecad_probe_#t~mem172#1.offset, usb_acecad_probe_#t~mem173#1, usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset, usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset, usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset, usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset, usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset, usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset, usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset, usb_acecad_probe_~pipe~0#1, usb_acecad_probe_~maxp~0#1, usb_acecad_probe_~err~0#1, usb_acecad_probe_~tmp___0~5#1, usb_acecad_probe_~tmp___1~2#1, usb_acecad_probe_~tmp___2~0#1, usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset, usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~tmp___5~0#1, usb_acecad_probe_~tmp___6~0#1;usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset := usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset;usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset := usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset;havoc usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset;havoc usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;havoc usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset;havoc usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset;havoc usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset;havoc usb_acecad_probe_~pipe~0#1;havoc usb_acecad_probe_~maxp~0#1;havoc usb_acecad_probe_~err~0#1;havoc usb_acecad_probe_~tmp___0~5#1;havoc usb_acecad_probe_~tmp___1~2#1;havoc usb_acecad_probe_~tmp___2~0#1;havoc usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;havoc usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset;havoc usb_acecad_probe_~tmp___5~0#1;havoc usb_acecad_probe_~tmp___6~0#1;assume { :begin_inline_interface_to_usbdev } true;interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset := usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset;havoc interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;havoc interface_to_usbdev_#t~ret192#1.base, interface_to_usbdev_#t~ret192#1.offset, interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset, interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset := interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset;havoc interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;assume { :begin_inline_ldv_interface_to_usbdev } true;havoc ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;havoc ldv_interface_to_usbdev_#t~ret203#1.base, ldv_interface_to_usbdev_#t~ret203#1.offset, ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset, ldv_interface_to_usbdev_~tmp~26#1.base, ldv_interface_to_usbdev_~tmp~26#1.offset;havoc ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset;havoc ldv_interface_to_usbdev_~tmp~26#1.base, ldv_interface_to_usbdev_~tmp~26#1.offset; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,409 INFO L272 TraceCheckUtils]: 56: Hoare triple {41164#(= ~ref_cnt~0 0)} call ldv_interface_to_usbdev_#t~ret203#1.base, ldv_interface_to_usbdev_#t~ret203#1.offset := ldv_malloc(1822); {41245#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:20,409 INFO L290 TraceCheckUtils]: 57: Hoare triple {41245#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {41148#true} is VALID [2022-02-20 22:07:20,409 INFO L290 TraceCheckUtils]: 58: Hoare triple {41148#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {41148#true} is VALID [2022-02-20 22:07:20,410 INFO L290 TraceCheckUtils]: 59: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:20,410 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {41148#true} {41164#(= ~ref_cnt~0 0)} #546#return; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,410 INFO L290 TraceCheckUtils]: 61: Hoare triple {41164#(= ~ref_cnt~0 0)} ldv_interface_to_usbdev_~tmp~26#1.base, ldv_interface_to_usbdev_~tmp~26#1.offset := ldv_interface_to_usbdev_#t~ret203#1.base, ldv_interface_to_usbdev_#t~ret203#1.offset;havoc ldv_interface_to_usbdev_#t~ret203#1.base, ldv_interface_to_usbdev_#t~ret203#1.offset;ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset := ldv_interface_to_usbdev_~tmp~26#1.base, ldv_interface_to_usbdev_~tmp~26#1.offset; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,411 INFO L290 TraceCheckUtils]: 62: Hoare triple {41164#(= ~ref_cnt~0 0)} assume !(0 == (ldv_interface_to_usbdev_~result~1#1.base + ldv_interface_to_usbdev_~result~1#1.offset) % 18446744073709551616); {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,411 INFO L290 TraceCheckUtils]: 63: Hoare triple {41164#(= ~ref_cnt~0 0)} ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset := ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,411 INFO L290 TraceCheckUtils]: 64: Hoare triple {41164#(= ~ref_cnt~0 0)} interface_to_usbdev_#t~ret192#1.base, interface_to_usbdev_#t~ret192#1.offset := ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;assume { :end_inline_ldv_interface_to_usbdev } true;interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset := interface_to_usbdev_#t~ret192#1.base, interface_to_usbdev_#t~ret192#1.offset;havoc interface_to_usbdev_#t~ret192#1.base, interface_to_usbdev_#t~ret192#1.offset;interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset := interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,412 INFO L290 TraceCheckUtils]: 65: Hoare triple {41164#(= ~ref_cnt~0 0)} usb_acecad_probe_#t~ret127#1.base, usb_acecad_probe_#t~ret127#1.offset := interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;assume { :end_inline_interface_to_usbdev } true;usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset := usb_acecad_probe_#t~ret127#1.base, usb_acecad_probe_#t~ret127#1.offset;havoc usb_acecad_probe_#t~ret127#1.base, usb_acecad_probe_#t~ret127#1.offset;usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset := usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;call usb_acecad_probe_#t~mem128#1.base, usb_acecad_probe_#t~mem128#1.offset := read~$Pointer$(usb_acecad_probe_~intf#1.base, 8 + usb_acecad_probe_~intf#1.offset, 8);usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset := usb_acecad_probe_#t~mem128#1.base, usb_acecad_probe_#t~mem128#1.offset;havoc usb_acecad_probe_#t~mem128#1.base, usb_acecad_probe_#t~mem128#1.offset;call usb_acecad_probe_#t~mem129#1 := read~int(usb_acecad_probe_~interface~0#1.base, 4 + usb_acecad_probe_~interface~0#1.offset, 1); {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,412 INFO L290 TraceCheckUtils]: 66: Hoare triple {41164#(= ~ref_cnt~0 0)} assume !(1 != usb_acecad_probe_#t~mem129#1 % 256 % 4294967296);havoc usb_acecad_probe_#t~mem129#1;call usb_acecad_probe_#t~mem130#1.base, usb_acecad_probe_#t~mem130#1.offset := read~$Pointer$(usb_acecad_probe_~interface~0#1.base, 9 + usb_acecad_probe_~interface~0#1.offset, 8);usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset := usb_acecad_probe_#t~mem130#1.base, usb_acecad_probe_#t~mem130#1.offset;havoc usb_acecad_probe_#t~mem130#1.base, usb_acecad_probe_#t~mem130#1.offset;assume { :begin_inline_usb_endpoint_is_int_in } true;usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset := usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_endpoint_is_int_in_#res#1;havoc usb_endpoint_is_int_in_#t~ret3#1, usb_endpoint_is_int_in_#t~ret4#1, usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset, usb_endpoint_is_int_in_~tmp~0#1, usb_endpoint_is_int_in_~tmp___0~0#1, usb_endpoint_is_int_in_~tmp___1~0#1;usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset := usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset;havoc usb_endpoint_is_int_in_~tmp~0#1;havoc usb_endpoint_is_int_in_~tmp___0~0#1;havoc usb_endpoint_is_int_in_~tmp___1~0#1;assume { :begin_inline_usb_endpoint_xfer_int } true;usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset := usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset;havoc usb_endpoint_xfer_int_#res#1;havoc usb_endpoint_xfer_int_#t~mem2#1, usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset;usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset := usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset;call usb_endpoint_xfer_int_#t~mem2#1 := read~int(usb_endpoint_xfer_int_~epd#1.base, 3 + usb_endpoint_xfer_int_~epd#1.offset, 1);usb_endpoint_xfer_int_#res#1 := (if 3 == (if 0 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 0 else (if 1 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 1 else ~bitwiseAnd(usb_endpoint_xfer_int_#t~mem2#1 % 256, 3))) then 1 else 0);havoc usb_endpoint_xfer_int_#t~mem2#1; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,412 INFO L290 TraceCheckUtils]: 67: Hoare triple {41164#(= ~ref_cnt~0 0)} usb_endpoint_is_int_in_#t~ret3#1 := usb_endpoint_xfer_int_#res#1;assume { :end_inline_usb_endpoint_xfer_int } true;assume -2147483648 <= usb_endpoint_is_int_in_#t~ret3#1 && usb_endpoint_is_int_in_#t~ret3#1 <= 2147483647;usb_endpoint_is_int_in_~tmp~0#1 := usb_endpoint_is_int_in_#t~ret3#1;havoc usb_endpoint_is_int_in_#t~ret3#1; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,413 INFO L290 TraceCheckUtils]: 68: Hoare triple {41164#(= ~ref_cnt~0 0)} assume 0 != usb_endpoint_is_int_in_~tmp~0#1;assume { :begin_inline_usb_endpoint_dir_in } true;usb_endpoint_dir_in_#in~epd#1.base, usb_endpoint_dir_in_#in~epd#1.offset := usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset;havoc usb_endpoint_dir_in_#res#1;havoc usb_endpoint_dir_in_#t~mem1#1, usb_endpoint_dir_in_~epd#1.base, usb_endpoint_dir_in_~epd#1.offset;usb_endpoint_dir_in_~epd#1.base, usb_endpoint_dir_in_~epd#1.offset := usb_endpoint_dir_in_#in~epd#1.base, usb_endpoint_dir_in_#in~epd#1.offset;call usb_endpoint_dir_in_#t~mem1#1 := read~int(usb_endpoint_dir_in_~epd#1.base, 2 + usb_endpoint_dir_in_~epd#1.offset, 1);usb_endpoint_dir_in_#res#1 := (if (if usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 <= 127 then usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 else usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 - 256) < 0 then 1 else 0);havoc usb_endpoint_dir_in_#t~mem1#1; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,413 INFO L290 TraceCheckUtils]: 69: Hoare triple {41164#(= ~ref_cnt~0 0)} usb_endpoint_is_int_in_#t~ret4#1 := usb_endpoint_dir_in_#res#1;assume { :end_inline_usb_endpoint_dir_in } true;assume -2147483648 <= usb_endpoint_is_int_in_#t~ret4#1 && usb_endpoint_is_int_in_#t~ret4#1 <= 2147483647;usb_endpoint_is_int_in_~tmp___0~0#1 := usb_endpoint_is_int_in_#t~ret4#1;havoc usb_endpoint_is_int_in_#t~ret4#1; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,414 INFO L290 TraceCheckUtils]: 70: Hoare triple {41164#(= ~ref_cnt~0 0)} assume 0 != usb_endpoint_is_int_in_~tmp___0~0#1;usb_endpoint_is_int_in_~tmp___1~0#1 := 1; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,414 INFO L290 TraceCheckUtils]: 71: Hoare triple {41164#(= ~ref_cnt~0 0)} usb_endpoint_is_int_in_#res#1 := usb_endpoint_is_int_in_~tmp___1~0#1; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,414 INFO L290 TraceCheckUtils]: 72: Hoare triple {41164#(= ~ref_cnt~0 0)} usb_acecad_probe_#t~ret131#1 := usb_endpoint_is_int_in_#res#1;assume { :end_inline_usb_endpoint_is_int_in } true;assume -2147483648 <= usb_acecad_probe_#t~ret131#1 && usb_acecad_probe_#t~ret131#1 <= 2147483647;usb_acecad_probe_~tmp___0~5#1 := usb_acecad_probe_#t~ret131#1;havoc usb_acecad_probe_#t~ret131#1; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,415 INFO L290 TraceCheckUtils]: 73: Hoare triple {41164#(= ~ref_cnt~0 0)} assume !(0 == usb_acecad_probe_~tmp___0~5#1);call usb_acecad_probe_#t~mem132#1 := read~int(usb_acecad_probe_~endpoint~0#1.base, 2 + usb_acecad_probe_~endpoint~0#1.offset, 1);assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_#t~mem132#1 % 256;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem42#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem42#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := (if (1 == 256 * __create_pipe_#t~mem42#1 || 0 == 256 * __create_pipe_#t~mem42#1) && 0 == 32768 * __create_pipe_~endpoint#1 then 256 * __create_pipe_#t~mem42#1 else (if 0 == 256 * __create_pipe_#t~mem42#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1) then 32768 * __create_pipe_~endpoint#1 else (if (1 == 256 * __create_pipe_#t~mem42#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1)) || ((1 == 256 * __create_pipe_#t~mem42#1 || 0 == 256 * __create_pipe_#t~mem42#1) && 1 == 32768 * __create_pipe_~endpoint#1) then 1 else ~bitwiseOr(256 * __create_pipe_#t~mem42#1, 32768 * __create_pipe_~endpoint#1))));havoc __create_pipe_#t~mem42#1; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,415 INFO L290 TraceCheckUtils]: 74: Hoare triple {41164#(= ~ref_cnt~0 0)} usb_acecad_probe_#t~ret133#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;usb_acecad_probe_~tmp___1~2#1 := usb_acecad_probe_#t~ret133#1;havoc usb_acecad_probe_#t~mem132#1;havoc usb_acecad_probe_#t~ret133#1;usb_acecad_probe_~pipe~0#1 := (if ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 else ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 - 4294967296);assume { :begin_inline_usb_maxpacket } true;usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset, usb_maxpacket_#in~pipe#1, usb_maxpacket_#in~is_out#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~pipe~0#1, (if 0 == (if 0 == usb_acecad_probe_~pipe~0#1 then 0 else (if 1 == usb_acecad_probe_~pipe~0#1 then 0 else ~bitwiseAnd(usb_acecad_probe_~pipe~0#1, 128))) then 1 else 0);havoc usb_maxpacket_#res#1;havoc usb_maxpacket_#t~ret44#1, usb_maxpacket_#t~ret45#1, usb_maxpacket_#t~mem46#1.base, usb_maxpacket_#t~mem46#1.offset, usb_maxpacket_#t~ret47#1, usb_maxpacket_#t~ret48#1, usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset, usb_maxpacket_#t~mem50#1, usb_maxpacket_#t~nondet43#1, usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset, usb_maxpacket_~pipe#1, usb_maxpacket_~is_out#1, usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset, usb_maxpacket_~epnum~0#1, usb_maxpacket_~__ret_warn_on~0#1, usb_maxpacket_~tmp~2#1, usb_maxpacket_~__ret_warn_on___0~0#1, usb_maxpacket_~tmp___0~1#1;usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset := usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset;usb_maxpacket_~pipe#1 := usb_maxpacket_#in~pipe#1;usb_maxpacket_~is_out#1 := usb_maxpacket_#in~is_out#1;havoc usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset;havoc usb_maxpacket_~epnum~0#1;havoc usb_maxpacket_~__ret_warn_on~0#1;havoc usb_maxpacket_~tmp~2#1;havoc usb_maxpacket_~__ret_warn_on___0~0#1;havoc usb_maxpacket_~tmp___0~1#1; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,415 INFO L290 TraceCheckUtils]: 75: Hoare triple {41164#(= ~ref_cnt~0 0)} assume 0 == usb_maxpacket_~pipe#1 / 32768;usb_maxpacket_~epnum~0#1 := 0; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,416 INFO L290 TraceCheckUtils]: 76: Hoare triple {41164#(= ~ref_cnt~0 0)} assume !(0 != usb_maxpacket_~is_out#1);usb_maxpacket_~__ret_warn_on___0~0#1 := (if 0 == (if 0 == usb_maxpacket_~pipe#1 then 0 else (if 1 == usb_maxpacket_~pipe#1 then 0 else ~bitwiseAnd(usb_maxpacket_~pipe#1, 128))) then 1 else 0); {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,416 INFO L272 TraceCheckUtils]: 77: Hoare triple {41164#(= ~ref_cnt~0 0)} call usb_maxpacket_#t~ret47#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {41148#true} is VALID [2022-02-20 22:07:20,416 INFO L290 TraceCheckUtils]: 78: Hoare triple {41148#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {41148#true} is VALID [2022-02-20 22:07:20,416 INFO L290 TraceCheckUtils]: 79: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:20,417 INFO L284 TraceCheckUtils]: 80: Hoare quadruple {41148#true} {41164#(= ~ref_cnt~0 0)} #556#return; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,417 INFO L290 TraceCheckUtils]: 81: Hoare triple {41164#(= ~ref_cnt~0 0)} assume -9223372036854775808 <= usb_maxpacket_#t~ret47#1 && usb_maxpacket_#t~ret47#1 <= 9223372036854775807;usb_maxpacket_~tmp___0~1#1 := usb_maxpacket_#t~ret47#1;havoc usb_maxpacket_#t~ret47#1; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,417 INFO L290 TraceCheckUtils]: 82: Hoare triple {41164#(= ~ref_cnt~0 0)} assume !(0 != usb_maxpacket_~tmp___0~1#1); {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,417 INFO L272 TraceCheckUtils]: 83: Hoare triple {41164#(= ~ref_cnt~0 0)} call usb_maxpacket_#t~ret48#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {41148#true} is VALID [2022-02-20 22:07:20,418 INFO L290 TraceCheckUtils]: 84: Hoare triple {41148#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {41148#true} is VALID [2022-02-20 22:07:20,418 INFO L290 TraceCheckUtils]: 85: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:20,418 INFO L284 TraceCheckUtils]: 86: Hoare quadruple {41148#true} {41164#(= ~ref_cnt~0 0)} #560#return; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,419 INFO L290 TraceCheckUtils]: 87: Hoare triple {41164#(= ~ref_cnt~0 0)} assume -9223372036854775808 <= usb_maxpacket_#t~ret48#1 && usb_maxpacket_#t~ret48#1 <= 9223372036854775807;havoc usb_maxpacket_#t~ret48#1;call usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset := read~$Pointer$(usb_maxpacket_~udev#1.base, 1186 + usb_maxpacket_~udev#1.offset + 8 * (usb_maxpacket_~epnum~0#1 % 4294967296), 8);usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset := usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset;havoc usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,419 INFO L290 TraceCheckUtils]: 88: Hoare triple {41164#(= ~ref_cnt~0 0)} assume 0 == (usb_maxpacket_~ep~0#1.base + usb_maxpacket_~ep~0#1.offset) % 18446744073709551616;usb_maxpacket_#res#1 := 0; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,419 INFO L290 TraceCheckUtils]: 89: Hoare triple {41164#(= ~ref_cnt~0 0)} usb_acecad_probe_#t~ret134#1 := usb_maxpacket_#res#1;assume { :end_inline_usb_maxpacket } true;usb_acecad_probe_~tmp___2~0#1 := usb_acecad_probe_#t~ret134#1;havoc usb_acecad_probe_#t~ret134#1;usb_acecad_probe_~maxp~0#1 := usb_acecad_probe_~tmp___2~0#1 % 65536; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,420 INFO L272 TraceCheckUtils]: 90: Hoare triple {41164#(= ~ref_cnt~0 0)} call usb_acecad_probe_#t~ret135#1.base, usb_acecad_probe_#t~ret135#1.offset := kzalloc(232, 208); {41245#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:20,420 INFO L290 TraceCheckUtils]: 91: Hoare triple {41245#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {41148#true} is VALID [2022-02-20 22:07:20,421 INFO L272 TraceCheckUtils]: 92: Hoare triple {41148#true} call __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset := ldv_malloc(__kmalloc_~size#1); {41245#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:20,421 INFO L290 TraceCheckUtils]: 93: Hoare triple {41245#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {41148#true} is VALID [2022-02-20 22:07:20,421 INFO L290 TraceCheckUtils]: 94: Hoare triple {41148#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {41148#true} is VALID [2022-02-20 22:07:20,421 INFO L290 TraceCheckUtils]: 95: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:20,421 INFO L284 TraceCheckUtils]: 96: Hoare quadruple {41148#true} {41148#true} #530#return; {41148#true} is VALID [2022-02-20 22:07:20,421 INFO L290 TraceCheckUtils]: 97: Hoare triple {41148#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset; {41148#true} is VALID [2022-02-20 22:07:20,421 INFO L290 TraceCheckUtils]: 98: Hoare triple {41148#true} kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {41148#true} is VALID [2022-02-20 22:07:20,422 INFO L290 TraceCheckUtils]: 99: Hoare triple {41148#true} #t~ret55#1.base, #t~ret55#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret55#1.base, #t~ret55#1.offset;havoc #t~ret55#1.base, #t~ret55#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {41148#true} is VALID [2022-02-20 22:07:20,422 INFO L290 TraceCheckUtils]: 100: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:20,422 INFO L284 TraceCheckUtils]: 101: Hoare quadruple {41148#true} {41164#(= ~ref_cnt~0 0)} #562#return; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,423 INFO L290 TraceCheckUtils]: 102: Hoare triple {41164#(= ~ref_cnt~0 0)} usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset := usb_acecad_probe_#t~ret135#1.base, usb_acecad_probe_#t~ret135#1.offset;havoc usb_acecad_probe_#t~ret135#1.base, usb_acecad_probe_#t~ret135#1.offset;usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset := usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;assume { :begin_inline_input_allocate_device } true;havoc input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;havoc input_allocate_device_#t~ret67#1.base, input_allocate_device_#t~ret67#1.offset; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,423 INFO L272 TraceCheckUtils]: 103: Hoare triple {41164#(= ~ref_cnt~0 0)} call input_allocate_device_#t~ret67#1.base, input_allocate_device_#t~ret67#1.offset := kzalloc(1855, ~bitwiseOr(~bitwiseOr(16, 64), 128)); {41245#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:20,423 INFO L290 TraceCheckUtils]: 104: Hoare triple {41245#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {41148#true} is VALID [2022-02-20 22:07:20,424 INFO L272 TraceCheckUtils]: 105: Hoare triple {41148#true} call __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset := ldv_malloc(__kmalloc_~size#1); {41245#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:20,424 INFO L290 TraceCheckUtils]: 106: Hoare triple {41245#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {41148#true} is VALID [2022-02-20 22:07:20,424 INFO L290 TraceCheckUtils]: 107: Hoare triple {41148#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {41148#true} is VALID [2022-02-20 22:07:20,424 INFO L290 TraceCheckUtils]: 108: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:20,425 INFO L284 TraceCheckUtils]: 109: Hoare quadruple {41148#true} {41148#true} #530#return; {41148#true} is VALID [2022-02-20 22:07:20,425 INFO L290 TraceCheckUtils]: 110: Hoare triple {41148#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset; {41148#true} is VALID [2022-02-20 22:07:20,425 INFO L290 TraceCheckUtils]: 111: Hoare triple {41148#true} kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {41148#true} is VALID [2022-02-20 22:07:20,425 INFO L290 TraceCheckUtils]: 112: Hoare triple {41148#true} #t~ret55#1.base, #t~ret55#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret55#1.base, #t~ret55#1.offset;havoc #t~ret55#1.base, #t~ret55#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {41148#true} is VALID [2022-02-20 22:07:20,425 INFO L290 TraceCheckUtils]: 113: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:20,426 INFO L284 TraceCheckUtils]: 114: Hoare quadruple {41148#true} {41164#(= ~ref_cnt~0 0)} #564#return; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,426 INFO L290 TraceCheckUtils]: 115: Hoare triple {41164#(= ~ref_cnt~0 0)} input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset := input_allocate_device_#t~ret67#1.base, input_allocate_device_#t~ret67#1.offset;havoc input_allocate_device_#t~ret67#1.base, input_allocate_device_#t~ret67#1.offset; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,426 INFO L290 TraceCheckUtils]: 116: Hoare triple {41164#(= ~ref_cnt~0 0)} usb_acecad_probe_#t~ret136#1.base, usb_acecad_probe_#t~ret136#1.offset := input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;assume { :end_inline_input_allocate_device } true;usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset := usb_acecad_probe_#t~ret136#1.base, usb_acecad_probe_#t~ret136#1.offset;havoc usb_acecad_probe_#t~ret136#1.base, usb_acecad_probe_#t~ret136#1.offset; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,427 INFO L290 TraceCheckUtils]: 117: Hoare triple {41164#(= ~ref_cnt~0 0)} assume !(0 == (usb_acecad_probe_~acecad~3#1.base + usb_acecad_probe_~acecad~3#1.offset) % 18446744073709551616 || 0 == (usb_acecad_probe_~input_dev~0#1.base + usb_acecad_probe_~input_dev~0#1.offset) % 18446744073709551616);assume { :begin_inline_usb_alloc_coherent } true;usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset, usb_alloc_coherent_#in~arg1#1, usb_alloc_coherent_#in~arg2#1, usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, 8, 208, usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset;havoc usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;havoc usb_alloc_coherent_#t~ret212#1.base, usb_alloc_coherent_#t~ret212#1.offset, usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset, usb_alloc_coherent_~arg1#1, usb_alloc_coherent_~arg2#1, usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset;usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset := usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset;usb_alloc_coherent_~arg1#1 := usb_alloc_coherent_#in~arg1#1;usb_alloc_coherent_~arg2#1 := usb_alloc_coherent_#in~arg2#1;usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset := usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,427 INFO L272 TraceCheckUtils]: 118: Hoare triple {41164#(= ~ref_cnt~0 0)} call usb_alloc_coherent_#t~ret212#1.base, usb_alloc_coherent_#t~ret212#1.offset := ldv_malloc(0); {41245#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:20,428 INFO L290 TraceCheckUtils]: 119: Hoare triple {41245#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {41148#true} is VALID [2022-02-20 22:07:20,428 INFO L290 TraceCheckUtils]: 120: Hoare triple {41148#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {41148#true} is VALID [2022-02-20 22:07:20,428 INFO L290 TraceCheckUtils]: 121: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:20,428 INFO L284 TraceCheckUtils]: 122: Hoare quadruple {41148#true} {41164#(= ~ref_cnt~0 0)} #566#return; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,429 INFO L290 TraceCheckUtils]: 123: Hoare triple {41164#(= ~ref_cnt~0 0)} usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset := usb_alloc_coherent_#t~ret212#1.base, usb_alloc_coherent_#t~ret212#1.offset;havoc usb_alloc_coherent_#t~ret212#1.base, usb_alloc_coherent_#t~ret212#1.offset; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,429 INFO L290 TraceCheckUtils]: 124: Hoare triple {41164#(= ~ref_cnt~0 0)} usb_acecad_probe_#t~ret137#1.base, usb_acecad_probe_#t~ret137#1.offset := usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;assume { :end_inline_usb_alloc_coherent } true;usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset := usb_acecad_probe_#t~ret137#1.base, usb_acecad_probe_#t~ret137#1.offset;havoc usb_acecad_probe_#t~ret137#1.base, usb_acecad_probe_#t~ret137#1.offset;call write~$Pointer$(usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem138#1.base, usb_acecad_probe_#t~mem138#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8); {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,429 INFO L290 TraceCheckUtils]: 125: Hoare triple {41164#(= ~ref_cnt~0 0)} assume !(0 == (usb_acecad_probe_#t~mem138#1.base + usb_acecad_probe_#t~mem138#1.offset) % 18446744073709551616);havoc usb_acecad_probe_#t~mem138#1.base, usb_acecad_probe_#t~mem138#1.offset;assume { :begin_inline_ldv_usb_alloc_urb_5 } true;ldv_usb_alloc_urb_5_#in~iso_packets#1, ldv_usb_alloc_urb_5_#in~mem_flags#1 := 0, 208;havoc ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret196#1.base, ldv_usb_alloc_urb_5_#t~ret196#1.offset, ldv_usb_alloc_urb_5_~iso_packets#1, ldv_usb_alloc_urb_5_~mem_flags#1, ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;ldv_usb_alloc_urb_5_~iso_packets#1 := ldv_usb_alloc_urb_5_#in~iso_packets#1;ldv_usb_alloc_urb_5_~mem_flags#1 := ldv_usb_alloc_urb_5_#in~mem_flags#1;havoc ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;assume { :begin_inline_ldv_alloc_urb } true;havoc ldv_alloc_urb_#res#1.base, ldv_alloc_urb_#res#1.offset;havoc ldv_alloc_urb_#t~ret198#1.base, ldv_alloc_urb_#t~ret198#1.offset, ldv_alloc_urb_#t~ret199#1, ldv_alloc_urb_~value~0#1.base, ldv_alloc_urb_~value~0#1.offset, ldv_alloc_urb_~tmp~24#1.base, ldv_alloc_urb_~tmp~24#1.offset, ldv_alloc_urb_~tmp___0~7#1;havoc ldv_alloc_urb_~value~0#1.base, ldv_alloc_urb_~value~0#1.offset;havoc ldv_alloc_urb_~tmp~24#1.base, ldv_alloc_urb_~tmp~24#1.offset;havoc ldv_alloc_urb_~tmp___0~7#1; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,430 INFO L272 TraceCheckUtils]: 126: Hoare triple {41164#(= ~ref_cnt~0 0)} call ldv_alloc_urb_#t~ret198#1.base, ldv_alloc_urb_#t~ret198#1.offset := ldv_malloc(180); {41245#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:20,430 INFO L290 TraceCheckUtils]: 127: Hoare triple {41245#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {41148#true} is VALID [2022-02-20 22:07:20,430 INFO L290 TraceCheckUtils]: 128: Hoare triple {41148#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {41148#true} is VALID [2022-02-20 22:07:20,430 INFO L290 TraceCheckUtils]: 129: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:20,431 INFO L284 TraceCheckUtils]: 130: Hoare quadruple {41148#true} {41164#(= ~ref_cnt~0 0)} #568#return; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,431 INFO L290 TraceCheckUtils]: 131: Hoare triple {41164#(= ~ref_cnt~0 0)} ldv_alloc_urb_~tmp~24#1.base, ldv_alloc_urb_~tmp~24#1.offset := ldv_alloc_urb_#t~ret198#1.base, ldv_alloc_urb_#t~ret198#1.offset;havoc ldv_alloc_urb_#t~ret198#1.base, ldv_alloc_urb_#t~ret198#1.offset;ldv_alloc_urb_~value~0#1.base, ldv_alloc_urb_~value~0#1.offset := ldv_alloc_urb_~tmp~24#1.base, ldv_alloc_urb_~tmp~24#1.offset; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,431 INFO L272 TraceCheckUtils]: 132: Hoare triple {41164#(= ~ref_cnt~0 0)} call ldv_alloc_urb_#t~ret199#1 := ldv_undef_int(); {41148#true} is VALID [2022-02-20 22:07:20,432 INFO L290 TraceCheckUtils]: 133: Hoare triple {41148#true} havoc ~tmp~8;assume -2147483648 <= #t~nondet65 && #t~nondet65 <= 2147483647;~tmp~8 := #t~nondet65;havoc #t~nondet65;#res := ~tmp~8; {41148#true} is VALID [2022-02-20 22:07:20,432 INFO L290 TraceCheckUtils]: 134: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:20,432 INFO L284 TraceCheckUtils]: 135: Hoare quadruple {41148#true} {41164#(= ~ref_cnt~0 0)} #570#return; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,432 INFO L290 TraceCheckUtils]: 136: Hoare triple {41164#(= ~ref_cnt~0 0)} assume -2147483648 <= ldv_alloc_urb_#t~ret199#1 && ldv_alloc_urb_#t~ret199#1 <= 2147483647;ldv_alloc_urb_~tmp___0~7#1 := ldv_alloc_urb_#t~ret199#1;havoc ldv_alloc_urb_#t~ret199#1; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,433 INFO L290 TraceCheckUtils]: 137: Hoare triple {41164#(= ~ref_cnt~0 0)} assume 0 != ldv_alloc_urb_~tmp___0~7#1; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,433 INFO L290 TraceCheckUtils]: 138: Hoare triple {41164#(= ~ref_cnt~0 0)} assume 0 != (ldv_alloc_urb_~value~0#1.base + ldv_alloc_urb_~value~0#1.offset) % 18446744073709551616;~usb_urb~0.base, ~usb_urb~0.offset := ldv_alloc_urb_~value~0#1.base, ldv_alloc_urb_~value~0#1.offset; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,433 INFO L290 TraceCheckUtils]: 139: Hoare triple {41164#(= ~ref_cnt~0 0)} ldv_alloc_urb_#res#1.base, ldv_alloc_urb_#res#1.offset := ~usb_urb~0.base, ~usb_urb~0.offset; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,434 INFO L290 TraceCheckUtils]: 140: Hoare triple {41164#(= ~ref_cnt~0 0)} ldv_usb_alloc_urb_5_#t~ret196#1.base, ldv_usb_alloc_urb_5_#t~ret196#1.offset := ldv_alloc_urb_#res#1.base, ldv_alloc_urb_#res#1.offset;assume { :end_inline_ldv_alloc_urb } true;ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset := ldv_usb_alloc_urb_5_#t~ret196#1.base, ldv_usb_alloc_urb_5_#t~ret196#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret196#1.base, ldv_usb_alloc_urb_5_#t~ret196#1.offset;ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset := ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,434 INFO L290 TraceCheckUtils]: 141: Hoare triple {41164#(= ~ref_cnt~0 0)} usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset := ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;assume { :end_inline_ldv_usb_alloc_urb_5 } true;call write~$Pointer$(usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset, usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8);havoc usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset;call usb_acecad_probe_#t~mem140#1.base, usb_acecad_probe_#t~mem140#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8); {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,434 INFO L290 TraceCheckUtils]: 142: Hoare triple {41164#(= ~ref_cnt~0 0)} assume 0 == (usb_acecad_probe_#t~mem140#1.base + usb_acecad_probe_#t~mem140#1.offset) % 18446744073709551616;havoc usb_acecad_probe_#t~mem140#1.base, usb_acecad_probe_#t~mem140#1.offset;usb_acecad_probe_~err~0#1 := -12; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,435 INFO L290 TraceCheckUtils]: 143: Hoare triple {41164#(= ~ref_cnt~0 0)} call usb_acecad_probe_#t~mem172#1.base, usb_acecad_probe_#t~mem172#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem173#1 := read~int(usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset, 8); {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,435 INFO L272 TraceCheckUtils]: 144: Hoare triple {41164#(= ~ref_cnt~0 0)} call usb_free_coherent(usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, 8, usb_acecad_probe_#t~mem172#1.base, usb_acecad_probe_#t~mem172#1.offset, usb_acecad_probe_#t~mem173#1); {41148#true} is VALID [2022-02-20 22:07:20,435 INFO L290 TraceCheckUtils]: 145: Hoare triple {41148#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1 := #in~arg1;~arg2.base, ~arg2.offset := #in~arg2.base, #in~arg2.offset;~arg3 := #in~arg3; {41148#true} is VALID [2022-02-20 22:07:20,435 INFO L290 TraceCheckUtils]: 146: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:20,436 INFO L284 TraceCheckUtils]: 147: Hoare quadruple {41148#true} {41164#(= ~ref_cnt~0 0)} #592#return; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,436 INFO L290 TraceCheckUtils]: 148: Hoare triple {41164#(= ~ref_cnt~0 0)} havoc usb_acecad_probe_#t~mem172#1.base, usb_acecad_probe_#t~mem172#1.offset;havoc usb_acecad_probe_#t~mem173#1; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,437 INFO L290 TraceCheckUtils]: 149: Hoare triple {41164#(= ~ref_cnt~0 0)} assume { :begin_inline_input_free_device } true;input_free_device_#in~arg0#1.base, input_free_device_#in~arg0#1.offset := usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset;havoc input_free_device_~arg0#1.base, input_free_device_~arg0#1.offset;input_free_device_~arg0#1.base, input_free_device_~arg0#1.offset := input_free_device_#in~arg0#1.base, input_free_device_#in~arg0#1.offset; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,437 INFO L290 TraceCheckUtils]: 150: Hoare triple {41164#(= ~ref_cnt~0 0)} assume { :end_inline_input_free_device } true; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,438 INFO L272 TraceCheckUtils]: 151: Hoare triple {41164#(= ~ref_cnt~0 0)} call kfree(usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset); {41254#(= |old(#valid)| |#valid|)} is VALID [2022-02-20 22:07:20,438 INFO L290 TraceCheckUtils]: 152: Hoare triple {41254#(= |old(#valid)| |#valid|)} ~p.base, ~p.offset := #in~p.base, #in~p.offset;call ULTIMATE.dealloc(~p.base, ~p.offset); {41148#true} is VALID [2022-02-20 22:07:20,438 INFO L290 TraceCheckUtils]: 153: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:20,438 INFO L284 TraceCheckUtils]: 154: Hoare quadruple {41148#true} {41164#(= ~ref_cnt~0 0)} #594#return; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,439 INFO L290 TraceCheckUtils]: 155: Hoare triple {41164#(= ~ref_cnt~0 0)} usb_acecad_probe_#res#1 := usb_acecad_probe_~err~0#1; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,439 INFO L290 TraceCheckUtils]: 156: Hoare triple {41164#(= ~ref_cnt~0 0)} main_#t~ret188#1 := usb_acecad_probe_#res#1;assume { :end_inline_usb_acecad_probe } true;assume -2147483648 <= main_#t~ret188#1 && main_#t~ret188#1 <= 2147483647;~ldv_retval_0~0 := main_#t~ret188#1;havoc main_#t~ret188#1; {41164#(= ~ref_cnt~0 0)} is VALID [2022-02-20 22:07:20,440 INFO L290 TraceCheckUtils]: 157: Hoare triple {41164#(= ~ref_cnt~0 0)} assume 0 == ~ldv_retval_0~0;~ldv_state_variable_1~0 := 2;~ref_cnt~0 := 1 + ~ref_cnt~0; {41228#(<= 1 ~ref_cnt~0)} is VALID [2022-02-20 22:07:20,440 INFO L290 TraceCheckUtils]: 158: Hoare triple {41228#(<= 1 ~ref_cnt~0)} assume -2147483648 <= main_#t~nondet184#1 && main_#t~nondet184#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet184#1;havoc main_#t~nondet184#1;main_#t~switch185#1 := 0 == main_~tmp___0~6#1; {41228#(<= 1 ~ref_cnt~0)} is VALID [2022-02-20 22:07:20,441 INFO L290 TraceCheckUtils]: 159: Hoare triple {41228#(<= 1 ~ref_cnt~0)} assume !main_#t~switch185#1;main_#t~switch185#1 := main_#t~switch185#1 || 1 == main_~tmp___0~6#1; {41228#(<= 1 ~ref_cnt~0)} is VALID [2022-02-20 22:07:20,441 INFO L290 TraceCheckUtils]: 160: Hoare triple {41228#(<= 1 ~ref_cnt~0)} assume main_#t~switch185#1; {41228#(<= 1 ~ref_cnt~0)} is VALID [2022-02-20 22:07:20,441 INFO L290 TraceCheckUtils]: 161: Hoare triple {41228#(<= 1 ~ref_cnt~0)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet189#1 && main_#t~nondet189#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet189#1;havoc main_#t~nondet189#1;main_#t~switch190#1 := 0 == main_~tmp___2~1#1; {41228#(<= 1 ~ref_cnt~0)} is VALID [2022-02-20 22:07:20,442 INFO L290 TraceCheckUtils]: 162: Hoare triple {41228#(<= 1 ~ref_cnt~0)} assume main_#t~switch190#1; {41228#(<= 1 ~ref_cnt~0)} is VALID [2022-02-20 22:07:20,442 INFO L290 TraceCheckUtils]: 163: Hoare triple {41228#(<= 1 ~ref_cnt~0)} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0;assume { :begin_inline_usb_acecad_exit } true;assume { :begin_inline_ldv_usb_deregister_11 } true;ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset := ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset;assume { :begin_inline_usb_deregister } true;usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset := ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;havoc usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset;usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset := usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset; {41149#false} is VALID [2022-02-20 22:07:20,442 INFO L290 TraceCheckUtils]: 164: Hoare triple {41149#false} assume { :end_inline_usb_deregister } true;~ldv_state_variable_1~0 := 0; {41149#false} is VALID [2022-02-20 22:07:20,442 INFO L290 TraceCheckUtils]: 165: Hoare triple {41149#false} assume { :end_inline_ldv_usb_deregister_11 } true; {41149#false} is VALID [2022-02-20 22:07:20,443 INFO L290 TraceCheckUtils]: 166: Hoare triple {41149#false} assume { :end_inline_usb_acecad_exit } true;~ldv_state_variable_0~0 := 2; {41149#false} is VALID [2022-02-20 22:07:20,443 INFO L290 TraceCheckUtils]: 167: Hoare triple {41149#false} assume { :begin_inline_ldv_check_final_state } true; {41149#false} is VALID [2022-02-20 22:07:20,443 INFO L290 TraceCheckUtils]: 168: Hoare triple {41149#false} assume 0 != (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616; {41149#false} is VALID [2022-02-20 22:07:20,443 INFO L272 TraceCheckUtils]: 169: Hoare triple {41149#false} call ldv_error(); {41149#false} is VALID [2022-02-20 22:07:20,443 INFO L290 TraceCheckUtils]: 170: Hoare triple {41149#false} assume !false; {41149#false} is VALID [2022-02-20 22:07:20,444 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2022-02-20 22:07:20,444 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:07:20,444 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1491717881] [2022-02-20 22:07:20,444 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1491717881] provided 0 perfect and 1 imperfect interpolant sequences [2022-02-20 22:07:20,444 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1567093342] [2022-02-20 22:07:20,445 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:07:20,445 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-20 22:07:20,445 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-20 22:07:20,451 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-02-20 22:07:20,471 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-02-20 22:07:20,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:20,793 INFO L263 TraceCheckSpWp]: Trace formula consists of 1330 conjuncts, 4 conjunts are in the unsatisfiable core [2022-02-20 22:07:20,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:20,874 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-02-20 22:07:21,401 INFO L290 TraceCheckUtils]: 0: Hoare triple {41148#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(99, 2);call #Ultimate.allocInit(10, 3);call #Ultimate.allocInit(7, 4);call write~init~int(97, 4, 0, 1);call write~init~int(99, 4, 1, 1);call write~init~int(101, 4, 2, 1);call write~init~int(99, 4, 3, 1);call write~init~int(97, 4, 4, 1);call write~init~int(100, 4, 5, 1);call write~init~int(0, 4, 6, 1);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(20, 6);call #Ultimate.allocInit(57, 7);call #Ultimate.allocInit(2, 8);call write~init~int(32, 8, 0, 1);call write~init~int(0, 8, 1, 1);call #Ultimate.allocInit(8, 9);call #Ultimate.allocInit(34, 10);call #Ultimate.allocInit(32, 11);call #Ultimate.allocInit(11, 12);call #Ultimate.allocInit(48, 13);~LDV_IN_INTERRUPT~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset := 14, 0;call #Ultimate.allocInit(72, 14);call write~init~int(3, ~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 2 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(4, ~#usb_acecad_id_table~0.base, 4 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 6 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 8 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 10 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 11 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 12 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 13 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 14 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 15 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 16 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(3, ~#usb_acecad_id_table~0.base, 24 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 26 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(8, ~#usb_acecad_id_table~0.base, 28 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 30 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 32 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 34 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 35 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 36 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 37 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 38 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 39 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(1, ~#usb_acecad_id_table~0.base, 40 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(0, ~#usb_acecad_id_table~0.base, 48 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 50 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 52 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 54 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 56 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 58 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 59 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 60 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 61 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 62 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 63 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 64 + ~#usb_acecad_id_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.driver_info := 0;~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset := 15, 0;call #Ultimate.allocInit(264, 15);call write~init~$Pointer$(12, 0, ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_probe.base, #funAddr~usb_acecad_probe.offset, ~#usb_acecad_driver~0.base, 8 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_disconnect.base, #funAddr~usb_acecad_disconnect.offset, ~#usb_acecad_driver~0.base, 16 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 24 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 32 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 40 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 48 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 56 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 64 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, ~#usb_acecad_driver~0.base, 72 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 80 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 84 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 88 + ~#usb_acecad_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 92 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 100 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 108 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 116 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 124 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 132 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 136 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 144 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 152 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 160 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 168 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 176 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 184 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 192 + ~#usb_acecad_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 193 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 201 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 209 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 217 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 225 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 233 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 241 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 249 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 257 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 261 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 262 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 263 + ~#usb_acecad_driver~0.offset, 1);~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {41148#true} is VALID [2022-02-20 22:07:21,401 INFO L290 TraceCheckUtils]: 1: Hoare triple {41148#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret183#1.base, main_#t~ret183#1.offset, main_#t~nondet184#1, main_#t~switch185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~ret188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~ret191#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~17#1.base, main_~tmp~17#1.offset, main_~tmp___0~6#1, main_~tmp___1~3#1, main_~tmp___2~1#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~17#1.base, main_~tmp~17#1.offset;havoc main_~tmp___0~6#1;havoc main_~tmp___1~3#1;havoc main_~tmp___2~1#1; {41148#true} is VALID [2022-02-20 22:07:21,401 INFO L272 TraceCheckUtils]: 2: Hoare triple {41148#true} call main_#t~ret183#1.base, main_#t~ret183#1.offset := ldv_init_zalloc(24); {41148#true} is VALID [2022-02-20 22:07:21,401 INFO L290 TraceCheckUtils]: 3: Hoare triple {41148#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {41148#true} is VALID [2022-02-20 22:07:21,402 INFO L272 TraceCheckUtils]: 4: Hoare triple {41148#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {41148#true} is VALID [2022-02-20 22:07:21,402 INFO L290 TraceCheckUtils]: 5: Hoare triple {41148#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {41148#true} is VALID [2022-02-20 22:07:21,402 INFO L290 TraceCheckUtils]: 6: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:21,402 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {41148#true} {41148#true} #538#return; {41148#true} is VALID [2022-02-20 22:07:21,402 INFO L290 TraceCheckUtils]: 8: Hoare triple {41148#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {41148#true} is VALID [2022-02-20 22:07:21,402 INFO L272 TraceCheckUtils]: 9: Hoare triple {41148#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {41148#true} is VALID [2022-02-20 22:07:21,402 INFO L290 TraceCheckUtils]: 10: Hoare triple {41148#true} ~cond := #in~cond; {41148#true} is VALID [2022-02-20 22:07:21,403 INFO L290 TraceCheckUtils]: 11: Hoare triple {41148#true} assume !(0 == ~cond); {41148#true} is VALID [2022-02-20 22:07:21,403 INFO L290 TraceCheckUtils]: 12: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:21,403 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {41148#true} {41148#true} #540#return; {41148#true} is VALID [2022-02-20 22:07:21,403 INFO L290 TraceCheckUtils]: 14: Hoare triple {41148#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {41148#true} is VALID [2022-02-20 22:07:21,403 INFO L290 TraceCheckUtils]: 15: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:21,403 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {41148#true} {41148#true} #544#return; {41148#true} is VALID [2022-02-20 22:07:21,403 INFO L290 TraceCheckUtils]: 17: Hoare triple {41148#true} main_~tmp~17#1.base, main_~tmp~17#1.offset := main_#t~ret183#1.base, main_#t~ret183#1.offset;havoc main_#t~ret183#1.base, main_#t~ret183#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~17#1.base, main_~tmp~17#1.offset;assume { :begin_inline_ldv_initialize } true; {41148#true} is VALID [2022-02-20 22:07:21,403 INFO L290 TraceCheckUtils]: 18: Hoare triple {41148#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1; {41148#true} is VALID [2022-02-20 22:07:21,404 INFO L290 TraceCheckUtils]: 19: Hoare triple {41148#true} assume -2147483648 <= main_#t~nondet184#1 && main_#t~nondet184#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet184#1;havoc main_#t~nondet184#1;main_#t~switch185#1 := 0 == main_~tmp___0~6#1; {41148#true} is VALID [2022-02-20 22:07:21,404 INFO L290 TraceCheckUtils]: 20: Hoare triple {41148#true} assume !main_#t~switch185#1;main_#t~switch185#1 := main_#t~switch185#1 || 1 == main_~tmp___0~6#1; {41148#true} is VALID [2022-02-20 22:07:21,404 INFO L290 TraceCheckUtils]: 21: Hoare triple {41148#true} assume main_#t~switch185#1; {41148#true} is VALID [2022-02-20 22:07:21,404 INFO L290 TraceCheckUtils]: 22: Hoare triple {41148#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet189#1 && main_#t~nondet189#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet189#1;havoc main_#t~nondet189#1;main_#t~switch190#1 := 0 == main_~tmp___2~1#1; {41148#true} is VALID [2022-02-20 22:07:21,404 INFO L290 TraceCheckUtils]: 23: Hoare triple {41148#true} assume !main_#t~switch190#1;main_#t~switch190#1 := main_#t~switch190#1 || 1 == main_~tmp___2~1#1; {41148#true} is VALID [2022-02-20 22:07:21,404 INFO L290 TraceCheckUtils]: 24: Hoare triple {41148#true} assume main_#t~switch190#1; {41148#true} is VALID [2022-02-20 22:07:21,405 INFO L290 TraceCheckUtils]: 25: Hoare triple {41148#true} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_usb_acecad_init } true;havoc usb_acecad_init_#res#1;havoc usb_acecad_init_#t~ret180#1, usb_acecad_init_#t~nondet181#1, usb_acecad_init_~result~0#1, usb_acecad_init_~tmp~15#1;havoc usb_acecad_init_~result~0#1;havoc usb_acecad_init_~tmp~15#1;assume { :begin_inline_usb_register } true;usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc usb_register_#res#1;havoc usb_register_#t~ret31#1, usb_register_~driver#1.base, usb_register_~driver#1.offset, usb_register_~tmp~1#1;usb_register_~driver#1.base, usb_register_~driver#1.offset := usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset;havoc usb_register_~tmp~1#1;assume { :begin_inline_ldv_usb_register_driver_2 } true;ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset := usb_register_~driver#1.base, usb_register_~driver#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 4, 0;havoc ldv_usb_register_driver_2_#res#1;havoc ldv_usb_register_driver_2_#t~ret193#1, ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset, ldv_usb_register_driver_2_~ldv_func_res~0#1, ldv_usb_register_driver_2_~tmp~19#1;ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_2_~ldv_func_res~0#1;havoc ldv_usb_register_driver_2_~tmp~19#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet213#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet213#1 && usb_register_driver_#t~nondet213#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet213#1;havoc usb_register_driver_#t~nondet213#1; {41148#true} is VALID [2022-02-20 22:07:21,405 INFO L290 TraceCheckUtils]: 26: Hoare triple {41148#true} ldv_usb_register_driver_2_#t~ret193#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_2_#t~ret193#1 && ldv_usb_register_driver_2_#t~ret193#1 <= 2147483647;ldv_usb_register_driver_2_~tmp~19#1 := ldv_usb_register_driver_2_#t~ret193#1;havoc ldv_usb_register_driver_2_#t~ret193#1;ldv_usb_register_driver_2_~ldv_func_res~0#1 := ldv_usb_register_driver_2_~tmp~19#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset, ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset;havoc ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {41148#true} is VALID [2022-02-20 22:07:21,405 INFO L272 TraceCheckUtils]: 27: Hoare triple {41148#true} call ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset := ldv_init_zalloc(1248); {41148#true} is VALID [2022-02-20 22:07:21,405 INFO L290 TraceCheckUtils]: 28: Hoare triple {41148#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {41148#true} is VALID [2022-02-20 22:07:21,405 INFO L272 TraceCheckUtils]: 29: Hoare triple {41148#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {41148#true} is VALID [2022-02-20 22:07:21,405 INFO L290 TraceCheckUtils]: 30: Hoare triple {41148#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {41148#true} is VALID [2022-02-20 22:07:21,405 INFO L290 TraceCheckUtils]: 31: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:21,406 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {41148#true} {41148#true} #538#return; {41148#true} is VALID [2022-02-20 22:07:21,406 INFO L290 TraceCheckUtils]: 33: Hoare triple {41148#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {41148#true} is VALID [2022-02-20 22:07:21,406 INFO L272 TraceCheckUtils]: 34: Hoare triple {41148#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {41148#true} is VALID [2022-02-20 22:07:21,406 INFO L290 TraceCheckUtils]: 35: Hoare triple {41148#true} ~cond := #in~cond; {41148#true} is VALID [2022-02-20 22:07:21,406 INFO L290 TraceCheckUtils]: 36: Hoare triple {41148#true} assume !(0 == ~cond); {41148#true} is VALID [2022-02-20 22:07:21,406 INFO L290 TraceCheckUtils]: 37: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:21,406 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {41148#true} {41148#true} #540#return; {41148#true} is VALID [2022-02-20 22:07:21,406 INFO L290 TraceCheckUtils]: 39: Hoare triple {41148#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {41148#true} is VALID [2022-02-20 22:07:21,407 INFO L290 TraceCheckUtils]: 40: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:21,407 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {41148#true} {41148#true} #600#return; {41148#true} is VALID [2022-02-20 22:07:21,407 INFO L290 TraceCheckUtils]: 42: Hoare triple {41148#true} ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset := ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset;havoc ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {41148#true} is VALID [2022-02-20 22:07:21,407 INFO L290 TraceCheckUtils]: 43: Hoare triple {41148#true} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_2_#res#1 := ldv_usb_register_driver_2_~ldv_func_res~0#1; {41148#true} is VALID [2022-02-20 22:07:21,407 INFO L290 TraceCheckUtils]: 44: Hoare triple {41148#true} usb_register_#t~ret31#1 := ldv_usb_register_driver_2_#res#1;assume { :end_inline_ldv_usb_register_driver_2 } true;assume -2147483648 <= usb_register_#t~ret31#1 && usb_register_#t~ret31#1 <= 2147483647;usb_register_~tmp~1#1 := usb_register_#t~ret31#1;havoc usb_register_#t~ret31#1;usb_register_#res#1 := usb_register_~tmp~1#1; {41148#true} is VALID [2022-02-20 22:07:21,407 INFO L290 TraceCheckUtils]: 45: Hoare triple {41148#true} usb_acecad_init_#t~ret180#1 := usb_register_#res#1;assume { :end_inline_usb_register } true;assume -2147483648 <= usb_acecad_init_#t~ret180#1 && usb_acecad_init_#t~ret180#1 <= 2147483647;usb_acecad_init_~tmp~15#1 := usb_acecad_init_#t~ret180#1;havoc usb_acecad_init_#t~ret180#1;usb_acecad_init_~result~0#1 := usb_acecad_init_~tmp~15#1; {41148#true} is VALID [2022-02-20 22:07:21,407 INFO L290 TraceCheckUtils]: 46: Hoare triple {41148#true} assume 0 == usb_acecad_init_~result~0#1;havoc usb_acecad_init_#t~nondet181#1; {41148#true} is VALID [2022-02-20 22:07:21,408 INFO L290 TraceCheckUtils]: 47: Hoare triple {41148#true} usb_acecad_init_#res#1 := usb_acecad_init_~result~0#1; {41148#true} is VALID [2022-02-20 22:07:21,408 INFO L290 TraceCheckUtils]: 48: Hoare triple {41148#true} main_#t~ret191#1 := usb_acecad_init_#res#1;assume { :end_inline_usb_acecad_init } true;assume -2147483648 <= main_#t~ret191#1 && main_#t~ret191#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret191#1;havoc main_#t~ret191#1; {41148#true} is VALID [2022-02-20 22:07:21,408 INFO L290 TraceCheckUtils]: 49: Hoare triple {41148#true} assume 0 == ~ldv_retval_1~0;~ldv_state_variable_0~0 := 3; {41148#true} is VALID [2022-02-20 22:07:21,408 INFO L290 TraceCheckUtils]: 50: Hoare triple {41148#true} assume !(0 != ~ldv_retval_1~0); {41148#true} is VALID [2022-02-20 22:07:21,408 INFO L290 TraceCheckUtils]: 51: Hoare triple {41148#true} assume -2147483648 <= main_#t~nondet184#1 && main_#t~nondet184#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet184#1;havoc main_#t~nondet184#1;main_#t~switch185#1 := 0 == main_~tmp___0~6#1; {41148#true} is VALID [2022-02-20 22:07:21,408 INFO L290 TraceCheckUtils]: 52: Hoare triple {41148#true} assume main_#t~switch185#1; {41148#true} is VALID [2022-02-20 22:07:21,408 INFO L290 TraceCheckUtils]: 53: Hoare triple {41148#true} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= main_#t~nondet186#1 && main_#t~nondet186#1 <= 2147483647;main_~tmp___1~3#1 := main_#t~nondet186#1;havoc main_#t~nondet186#1;main_#t~switch187#1 := 0 == main_~tmp___1~3#1; {41148#true} is VALID [2022-02-20 22:07:21,409 INFO L290 TraceCheckUtils]: 54: Hoare triple {41148#true} assume main_#t~switch187#1; {41148#true} is VALID [2022-02-20 22:07:21,409 INFO L290 TraceCheckUtils]: 55: Hoare triple {41148#true} assume 1 == ~ldv_state_variable_1~0;assume { :begin_inline_usb_acecad_probe } true;usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset, usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset := ~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc usb_acecad_probe_#res#1;havoc usb_acecad_probe_#t~ret127#1.base, usb_acecad_probe_#t~ret127#1.offset, usb_acecad_probe_#t~mem128#1.base, usb_acecad_probe_#t~mem128#1.offset, usb_acecad_probe_#t~mem129#1, usb_acecad_probe_#t~mem130#1.base, usb_acecad_probe_#t~mem130#1.offset, usb_acecad_probe_#t~ret131#1, usb_acecad_probe_#t~mem132#1, usb_acecad_probe_#t~ret133#1, usb_acecad_probe_#t~ret134#1, usb_acecad_probe_#t~ret135#1.base, usb_acecad_probe_#t~ret135#1.offset, usb_acecad_probe_#t~ret136#1.base, usb_acecad_probe_#t~ret136#1.offset, usb_acecad_probe_#t~ret137#1.base, usb_acecad_probe_#t~ret137#1.offset, usb_acecad_probe_#t~mem138#1.base, usb_acecad_probe_#t~mem138#1.offset, usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset, usb_acecad_probe_#t~mem140#1.base, usb_acecad_probe_#t~mem140#1.offset, usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset, usb_acecad_probe_#t~mem142#1.base, usb_acecad_probe_#t~mem142#1.offset, usb_acecad_probe_#t~ret143#1, usb_acecad_probe_#t~mem144#1.base, usb_acecad_probe_#t~mem144#1.offset, usb_acecad_probe_#t~mem145#1.base, usb_acecad_probe_#t~mem145#1.offset, usb_acecad_probe_#t~ret146#1, usb_acecad_probe_#t~mem147#1.base, usb_acecad_probe_#t~mem147#1.offset, usb_acecad_probe_#t~ret148#1, usb_acecad_probe_#t~ret149#1, usb_acecad_probe_#t~ret150#1, usb_acecad_probe_#t~mem151#1, usb_acecad_probe_#t~switch152#1, usb_acecad_probe_#t~nondet153#1, usb_acecad_probe_#t~nondet154#1, usb_acecad_probe_#t~mem155#1, usb_acecad_probe_#t~mem156#1, usb_acecad_probe_#t~nondet157#1, usb_acecad_probe_#t~nondet158#1, usb_acecad_probe_#t~mem159#1, usb_acecad_probe_#t~mem160#1, usb_acecad_probe_#t~mem161#1.base, usb_acecad_probe_#t~mem161#1.offset, usb_acecad_probe_#t~mem162#1.base, usb_acecad_probe_#t~mem162#1.offset, usb_acecad_probe_#t~ite163#1, usb_acecad_probe_#t~mem164#1, usb_acecad_probe_#t~mem165#1.base, usb_acecad_probe_#t~mem165#1.offset, usb_acecad_probe_#t~mem166#1, usb_acecad_probe_#t~mem167#1.base, usb_acecad_probe_#t~mem167#1.offset, usb_acecad_probe_#t~mem168#1.base, usb_acecad_probe_#t~mem168#1.offset, usb_acecad_probe_#t~mem169#1, usb_acecad_probe_#t~mem170#1.base, usb_acecad_probe_#t~mem170#1.offset, usb_acecad_probe_#t~ret171#1, usb_acecad_probe_#t~mem172#1.base, usb_acecad_probe_#t~mem172#1.offset, usb_acecad_probe_#t~mem173#1, usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset, usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset, usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset, usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset, usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset, usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset, usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset, usb_acecad_probe_~pipe~0#1, usb_acecad_probe_~maxp~0#1, usb_acecad_probe_~err~0#1, usb_acecad_probe_~tmp___0~5#1, usb_acecad_probe_~tmp___1~2#1, usb_acecad_probe_~tmp___2~0#1, usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset, usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~tmp___5~0#1, usb_acecad_probe_~tmp___6~0#1;usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset := usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset;usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset := usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset;havoc usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset;havoc usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;havoc usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset;havoc usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset;havoc usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset;havoc usb_acecad_probe_~pipe~0#1;havoc usb_acecad_probe_~maxp~0#1;havoc usb_acecad_probe_~err~0#1;havoc usb_acecad_probe_~tmp___0~5#1;havoc usb_acecad_probe_~tmp___1~2#1;havoc usb_acecad_probe_~tmp___2~0#1;havoc usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;havoc usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset;havoc usb_acecad_probe_~tmp___5~0#1;havoc usb_acecad_probe_~tmp___6~0#1;assume { :begin_inline_interface_to_usbdev } true;interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset := usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset;havoc interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;havoc interface_to_usbdev_#t~ret192#1.base, interface_to_usbdev_#t~ret192#1.offset, interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset, interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset := interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset;havoc interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;assume { :begin_inline_ldv_interface_to_usbdev } true;havoc ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;havoc ldv_interface_to_usbdev_#t~ret203#1.base, ldv_interface_to_usbdev_#t~ret203#1.offset, ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset, ldv_interface_to_usbdev_~tmp~26#1.base, ldv_interface_to_usbdev_~tmp~26#1.offset;havoc ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset;havoc ldv_interface_to_usbdev_~tmp~26#1.base, ldv_interface_to_usbdev_~tmp~26#1.offset; {41148#true} is VALID [2022-02-20 22:07:21,409 INFO L272 TraceCheckUtils]: 56: Hoare triple {41148#true} call ldv_interface_to_usbdev_#t~ret203#1.base, ldv_interface_to_usbdev_#t~ret203#1.offset := ldv_malloc(1822); {41148#true} is VALID [2022-02-20 22:07:21,409 INFO L290 TraceCheckUtils]: 57: Hoare triple {41148#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {41148#true} is VALID [2022-02-20 22:07:21,409 INFO L290 TraceCheckUtils]: 58: Hoare triple {41148#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {41148#true} is VALID [2022-02-20 22:07:21,409 INFO L290 TraceCheckUtils]: 59: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:21,410 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {41148#true} {41148#true} #546#return; {41148#true} is VALID [2022-02-20 22:07:21,410 INFO L290 TraceCheckUtils]: 61: Hoare triple {41148#true} ldv_interface_to_usbdev_~tmp~26#1.base, ldv_interface_to_usbdev_~tmp~26#1.offset := ldv_interface_to_usbdev_#t~ret203#1.base, ldv_interface_to_usbdev_#t~ret203#1.offset;havoc ldv_interface_to_usbdev_#t~ret203#1.base, ldv_interface_to_usbdev_#t~ret203#1.offset;ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset := ldv_interface_to_usbdev_~tmp~26#1.base, ldv_interface_to_usbdev_~tmp~26#1.offset; {41148#true} is VALID [2022-02-20 22:07:21,410 INFO L290 TraceCheckUtils]: 62: Hoare triple {41148#true} assume !(0 == (ldv_interface_to_usbdev_~result~1#1.base + ldv_interface_to_usbdev_~result~1#1.offset) % 18446744073709551616); {41148#true} is VALID [2022-02-20 22:07:21,410 INFO L290 TraceCheckUtils]: 63: Hoare triple {41148#true} ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset := ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset; {41148#true} is VALID [2022-02-20 22:07:21,410 INFO L290 TraceCheckUtils]: 64: Hoare triple {41148#true} interface_to_usbdev_#t~ret192#1.base, interface_to_usbdev_#t~ret192#1.offset := ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;assume { :end_inline_ldv_interface_to_usbdev } true;interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset := interface_to_usbdev_#t~ret192#1.base, interface_to_usbdev_#t~ret192#1.offset;havoc interface_to_usbdev_#t~ret192#1.base, interface_to_usbdev_#t~ret192#1.offset;interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset := interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset; {41148#true} is VALID [2022-02-20 22:07:21,410 INFO L290 TraceCheckUtils]: 65: Hoare triple {41148#true} usb_acecad_probe_#t~ret127#1.base, usb_acecad_probe_#t~ret127#1.offset := interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;assume { :end_inline_interface_to_usbdev } true;usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset := usb_acecad_probe_#t~ret127#1.base, usb_acecad_probe_#t~ret127#1.offset;havoc usb_acecad_probe_#t~ret127#1.base, usb_acecad_probe_#t~ret127#1.offset;usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset := usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;call usb_acecad_probe_#t~mem128#1.base, usb_acecad_probe_#t~mem128#1.offset := read~$Pointer$(usb_acecad_probe_~intf#1.base, 8 + usb_acecad_probe_~intf#1.offset, 8);usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset := usb_acecad_probe_#t~mem128#1.base, usb_acecad_probe_#t~mem128#1.offset;havoc usb_acecad_probe_#t~mem128#1.base, usb_acecad_probe_#t~mem128#1.offset;call usb_acecad_probe_#t~mem129#1 := read~int(usb_acecad_probe_~interface~0#1.base, 4 + usb_acecad_probe_~interface~0#1.offset, 1); {41148#true} is VALID [2022-02-20 22:07:21,410 INFO L290 TraceCheckUtils]: 66: Hoare triple {41148#true} assume !(1 != usb_acecad_probe_#t~mem129#1 % 256 % 4294967296);havoc usb_acecad_probe_#t~mem129#1;call usb_acecad_probe_#t~mem130#1.base, usb_acecad_probe_#t~mem130#1.offset := read~$Pointer$(usb_acecad_probe_~interface~0#1.base, 9 + usb_acecad_probe_~interface~0#1.offset, 8);usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset := usb_acecad_probe_#t~mem130#1.base, usb_acecad_probe_#t~mem130#1.offset;havoc usb_acecad_probe_#t~mem130#1.base, usb_acecad_probe_#t~mem130#1.offset;assume { :begin_inline_usb_endpoint_is_int_in } true;usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset := usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_endpoint_is_int_in_#res#1;havoc usb_endpoint_is_int_in_#t~ret3#1, usb_endpoint_is_int_in_#t~ret4#1, usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset, usb_endpoint_is_int_in_~tmp~0#1, usb_endpoint_is_int_in_~tmp___0~0#1, usb_endpoint_is_int_in_~tmp___1~0#1;usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset := usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset;havoc usb_endpoint_is_int_in_~tmp~0#1;havoc usb_endpoint_is_int_in_~tmp___0~0#1;havoc usb_endpoint_is_int_in_~tmp___1~0#1;assume { :begin_inline_usb_endpoint_xfer_int } true;usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset := usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset;havoc usb_endpoint_xfer_int_#res#1;havoc usb_endpoint_xfer_int_#t~mem2#1, usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset;usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset := usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset;call usb_endpoint_xfer_int_#t~mem2#1 := read~int(usb_endpoint_xfer_int_~epd#1.base, 3 + usb_endpoint_xfer_int_~epd#1.offset, 1);usb_endpoint_xfer_int_#res#1 := (if 3 == (if 0 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 0 else (if 1 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 1 else ~bitwiseAnd(usb_endpoint_xfer_int_#t~mem2#1 % 256, 3))) then 1 else 0);havoc usb_endpoint_xfer_int_#t~mem2#1; {41148#true} is VALID [2022-02-20 22:07:21,411 INFO L290 TraceCheckUtils]: 67: Hoare triple {41148#true} usb_endpoint_is_int_in_#t~ret3#1 := usb_endpoint_xfer_int_#res#1;assume { :end_inline_usb_endpoint_xfer_int } true;assume -2147483648 <= usb_endpoint_is_int_in_#t~ret3#1 && usb_endpoint_is_int_in_#t~ret3#1 <= 2147483647;usb_endpoint_is_int_in_~tmp~0#1 := usb_endpoint_is_int_in_#t~ret3#1;havoc usb_endpoint_is_int_in_#t~ret3#1; {41148#true} is VALID [2022-02-20 22:07:21,411 INFO L290 TraceCheckUtils]: 68: Hoare triple {41148#true} assume 0 != usb_endpoint_is_int_in_~tmp~0#1;assume { :begin_inline_usb_endpoint_dir_in } true;usb_endpoint_dir_in_#in~epd#1.base, usb_endpoint_dir_in_#in~epd#1.offset := usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset;havoc usb_endpoint_dir_in_#res#1;havoc usb_endpoint_dir_in_#t~mem1#1, usb_endpoint_dir_in_~epd#1.base, usb_endpoint_dir_in_~epd#1.offset;usb_endpoint_dir_in_~epd#1.base, usb_endpoint_dir_in_~epd#1.offset := usb_endpoint_dir_in_#in~epd#1.base, usb_endpoint_dir_in_#in~epd#1.offset;call usb_endpoint_dir_in_#t~mem1#1 := read~int(usb_endpoint_dir_in_~epd#1.base, 2 + usb_endpoint_dir_in_~epd#1.offset, 1);usb_endpoint_dir_in_#res#1 := (if (if usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 <= 127 then usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 else usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 - 256) < 0 then 1 else 0);havoc usb_endpoint_dir_in_#t~mem1#1; {41148#true} is VALID [2022-02-20 22:07:21,411 INFO L290 TraceCheckUtils]: 69: Hoare triple {41148#true} usb_endpoint_is_int_in_#t~ret4#1 := usb_endpoint_dir_in_#res#1;assume { :end_inline_usb_endpoint_dir_in } true;assume -2147483648 <= usb_endpoint_is_int_in_#t~ret4#1 && usb_endpoint_is_int_in_#t~ret4#1 <= 2147483647;usb_endpoint_is_int_in_~tmp___0~0#1 := usb_endpoint_is_int_in_#t~ret4#1;havoc usb_endpoint_is_int_in_#t~ret4#1; {41148#true} is VALID [2022-02-20 22:07:21,411 INFO L290 TraceCheckUtils]: 70: Hoare triple {41148#true} assume 0 != usb_endpoint_is_int_in_~tmp___0~0#1;usb_endpoint_is_int_in_~tmp___1~0#1 := 1; {41148#true} is VALID [2022-02-20 22:07:21,411 INFO L290 TraceCheckUtils]: 71: Hoare triple {41148#true} usb_endpoint_is_int_in_#res#1 := usb_endpoint_is_int_in_~tmp___1~0#1; {41148#true} is VALID [2022-02-20 22:07:21,411 INFO L290 TraceCheckUtils]: 72: Hoare triple {41148#true} usb_acecad_probe_#t~ret131#1 := usb_endpoint_is_int_in_#res#1;assume { :end_inline_usb_endpoint_is_int_in } true;assume -2147483648 <= usb_acecad_probe_#t~ret131#1 && usb_acecad_probe_#t~ret131#1 <= 2147483647;usb_acecad_probe_~tmp___0~5#1 := usb_acecad_probe_#t~ret131#1;havoc usb_acecad_probe_#t~ret131#1; {41148#true} is VALID [2022-02-20 22:07:21,411 INFO L290 TraceCheckUtils]: 73: Hoare triple {41148#true} assume !(0 == usb_acecad_probe_~tmp___0~5#1);call usb_acecad_probe_#t~mem132#1 := read~int(usb_acecad_probe_~endpoint~0#1.base, 2 + usb_acecad_probe_~endpoint~0#1.offset, 1);assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_#t~mem132#1 % 256;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem42#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem42#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := (if (1 == 256 * __create_pipe_#t~mem42#1 || 0 == 256 * __create_pipe_#t~mem42#1) && 0 == 32768 * __create_pipe_~endpoint#1 then 256 * __create_pipe_#t~mem42#1 else (if 0 == 256 * __create_pipe_#t~mem42#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1) then 32768 * __create_pipe_~endpoint#1 else (if (1 == 256 * __create_pipe_#t~mem42#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1)) || ((1 == 256 * __create_pipe_#t~mem42#1 || 0 == 256 * __create_pipe_#t~mem42#1) && 1 == 32768 * __create_pipe_~endpoint#1) then 1 else ~bitwiseOr(256 * __create_pipe_#t~mem42#1, 32768 * __create_pipe_~endpoint#1))));havoc __create_pipe_#t~mem42#1; {41148#true} is VALID [2022-02-20 22:07:21,412 INFO L290 TraceCheckUtils]: 74: Hoare triple {41148#true} usb_acecad_probe_#t~ret133#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;usb_acecad_probe_~tmp___1~2#1 := usb_acecad_probe_#t~ret133#1;havoc usb_acecad_probe_#t~mem132#1;havoc usb_acecad_probe_#t~ret133#1;usb_acecad_probe_~pipe~0#1 := (if ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 else ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 - 4294967296);assume { :begin_inline_usb_maxpacket } true;usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset, usb_maxpacket_#in~pipe#1, usb_maxpacket_#in~is_out#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~pipe~0#1, (if 0 == (if 0 == usb_acecad_probe_~pipe~0#1 then 0 else (if 1 == usb_acecad_probe_~pipe~0#1 then 0 else ~bitwiseAnd(usb_acecad_probe_~pipe~0#1, 128))) then 1 else 0);havoc usb_maxpacket_#res#1;havoc usb_maxpacket_#t~ret44#1, usb_maxpacket_#t~ret45#1, usb_maxpacket_#t~mem46#1.base, usb_maxpacket_#t~mem46#1.offset, usb_maxpacket_#t~ret47#1, usb_maxpacket_#t~ret48#1, usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset, usb_maxpacket_#t~mem50#1, usb_maxpacket_#t~nondet43#1, usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset, usb_maxpacket_~pipe#1, usb_maxpacket_~is_out#1, usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset, usb_maxpacket_~epnum~0#1, usb_maxpacket_~__ret_warn_on~0#1, usb_maxpacket_~tmp~2#1, usb_maxpacket_~__ret_warn_on___0~0#1, usb_maxpacket_~tmp___0~1#1;usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset := usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset;usb_maxpacket_~pipe#1 := usb_maxpacket_#in~pipe#1;usb_maxpacket_~is_out#1 := usb_maxpacket_#in~is_out#1;havoc usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset;havoc usb_maxpacket_~epnum~0#1;havoc usb_maxpacket_~__ret_warn_on~0#1;havoc usb_maxpacket_~tmp~2#1;havoc usb_maxpacket_~__ret_warn_on___0~0#1;havoc usb_maxpacket_~tmp___0~1#1; {41148#true} is VALID [2022-02-20 22:07:21,412 INFO L290 TraceCheckUtils]: 75: Hoare triple {41148#true} assume 0 == usb_maxpacket_~pipe#1 / 32768;usb_maxpacket_~epnum~0#1 := 0; {41148#true} is VALID [2022-02-20 22:07:21,412 INFO L290 TraceCheckUtils]: 76: Hoare triple {41148#true} assume !(0 != usb_maxpacket_~is_out#1);usb_maxpacket_~__ret_warn_on___0~0#1 := (if 0 == (if 0 == usb_maxpacket_~pipe#1 then 0 else (if 1 == usb_maxpacket_~pipe#1 then 0 else ~bitwiseAnd(usb_maxpacket_~pipe#1, 128))) then 1 else 0); {41148#true} is VALID [2022-02-20 22:07:21,412 INFO L272 TraceCheckUtils]: 77: Hoare triple {41148#true} call usb_maxpacket_#t~ret47#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {41148#true} is VALID [2022-02-20 22:07:21,412 INFO L290 TraceCheckUtils]: 78: Hoare triple {41148#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {41148#true} is VALID [2022-02-20 22:07:21,412 INFO L290 TraceCheckUtils]: 79: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:21,412 INFO L284 TraceCheckUtils]: 80: Hoare quadruple {41148#true} {41148#true} #556#return; {41148#true} is VALID [2022-02-20 22:07:21,413 INFO L290 TraceCheckUtils]: 81: Hoare triple {41148#true} assume -9223372036854775808 <= usb_maxpacket_#t~ret47#1 && usb_maxpacket_#t~ret47#1 <= 9223372036854775807;usb_maxpacket_~tmp___0~1#1 := usb_maxpacket_#t~ret47#1;havoc usb_maxpacket_#t~ret47#1; {41148#true} is VALID [2022-02-20 22:07:21,413 INFO L290 TraceCheckUtils]: 82: Hoare triple {41148#true} assume !(0 != usb_maxpacket_~tmp___0~1#1); {41148#true} is VALID [2022-02-20 22:07:21,413 INFO L272 TraceCheckUtils]: 83: Hoare triple {41148#true} call usb_maxpacket_#t~ret48#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {41148#true} is VALID [2022-02-20 22:07:21,413 INFO L290 TraceCheckUtils]: 84: Hoare triple {41148#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {41148#true} is VALID [2022-02-20 22:07:21,413 INFO L290 TraceCheckUtils]: 85: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:21,413 INFO L284 TraceCheckUtils]: 86: Hoare quadruple {41148#true} {41148#true} #560#return; {41148#true} is VALID [2022-02-20 22:07:21,413 INFO L290 TraceCheckUtils]: 87: Hoare triple {41148#true} assume -9223372036854775808 <= usb_maxpacket_#t~ret48#1 && usb_maxpacket_#t~ret48#1 <= 9223372036854775807;havoc usb_maxpacket_#t~ret48#1;call usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset := read~$Pointer$(usb_maxpacket_~udev#1.base, 1186 + usb_maxpacket_~udev#1.offset + 8 * (usb_maxpacket_~epnum~0#1 % 4294967296), 8);usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset := usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset;havoc usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset; {41148#true} is VALID [2022-02-20 22:07:21,414 INFO L290 TraceCheckUtils]: 88: Hoare triple {41148#true} assume 0 == (usb_maxpacket_~ep~0#1.base + usb_maxpacket_~ep~0#1.offset) % 18446744073709551616;usb_maxpacket_#res#1 := 0; {41148#true} is VALID [2022-02-20 22:07:21,414 INFO L290 TraceCheckUtils]: 89: Hoare triple {41148#true} usb_acecad_probe_#t~ret134#1 := usb_maxpacket_#res#1;assume { :end_inline_usb_maxpacket } true;usb_acecad_probe_~tmp___2~0#1 := usb_acecad_probe_#t~ret134#1;havoc usb_acecad_probe_#t~ret134#1;usb_acecad_probe_~maxp~0#1 := usb_acecad_probe_~tmp___2~0#1 % 65536; {41148#true} is VALID [2022-02-20 22:07:21,414 INFO L272 TraceCheckUtils]: 90: Hoare triple {41148#true} call usb_acecad_probe_#t~ret135#1.base, usb_acecad_probe_#t~ret135#1.offset := kzalloc(232, 208); {41148#true} is VALID [2022-02-20 22:07:21,414 INFO L290 TraceCheckUtils]: 91: Hoare triple {41148#true} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {41148#true} is VALID [2022-02-20 22:07:21,414 INFO L272 TraceCheckUtils]: 92: Hoare triple {41148#true} call __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset := ldv_malloc(__kmalloc_~size#1); {41148#true} is VALID [2022-02-20 22:07:21,414 INFO L290 TraceCheckUtils]: 93: Hoare triple {41148#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {41148#true} is VALID [2022-02-20 22:07:21,414 INFO L290 TraceCheckUtils]: 94: Hoare triple {41148#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {41148#true} is VALID [2022-02-20 22:07:21,415 INFO L290 TraceCheckUtils]: 95: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:21,415 INFO L284 TraceCheckUtils]: 96: Hoare quadruple {41148#true} {41148#true} #530#return; {41148#true} is VALID [2022-02-20 22:07:21,415 INFO L290 TraceCheckUtils]: 97: Hoare triple {41148#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset; {41148#true} is VALID [2022-02-20 22:07:21,415 INFO L290 TraceCheckUtils]: 98: Hoare triple {41148#true} kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {41148#true} is VALID [2022-02-20 22:07:21,415 INFO L290 TraceCheckUtils]: 99: Hoare triple {41148#true} #t~ret55#1.base, #t~ret55#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret55#1.base, #t~ret55#1.offset;havoc #t~ret55#1.base, #t~ret55#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {41148#true} is VALID [2022-02-20 22:07:21,415 INFO L290 TraceCheckUtils]: 100: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:21,415 INFO L284 TraceCheckUtils]: 101: Hoare quadruple {41148#true} {41148#true} #562#return; {41148#true} is VALID [2022-02-20 22:07:21,416 INFO L290 TraceCheckUtils]: 102: Hoare triple {41148#true} usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset := usb_acecad_probe_#t~ret135#1.base, usb_acecad_probe_#t~ret135#1.offset;havoc usb_acecad_probe_#t~ret135#1.base, usb_acecad_probe_#t~ret135#1.offset;usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset := usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;assume { :begin_inline_input_allocate_device } true;havoc input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;havoc input_allocate_device_#t~ret67#1.base, input_allocate_device_#t~ret67#1.offset; {41148#true} is VALID [2022-02-20 22:07:21,416 INFO L272 TraceCheckUtils]: 103: Hoare triple {41148#true} call input_allocate_device_#t~ret67#1.base, input_allocate_device_#t~ret67#1.offset := kzalloc(1855, ~bitwiseOr(~bitwiseOr(16, 64), 128)); {41148#true} is VALID [2022-02-20 22:07:21,416 INFO L290 TraceCheckUtils]: 104: Hoare triple {41148#true} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {41148#true} is VALID [2022-02-20 22:07:21,416 INFO L272 TraceCheckUtils]: 105: Hoare triple {41148#true} call __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset := ldv_malloc(__kmalloc_~size#1); {41148#true} is VALID [2022-02-20 22:07:21,416 INFO L290 TraceCheckUtils]: 106: Hoare triple {41148#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {41148#true} is VALID [2022-02-20 22:07:21,416 INFO L290 TraceCheckUtils]: 107: Hoare triple {41148#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {41148#true} is VALID [2022-02-20 22:07:21,416 INFO L290 TraceCheckUtils]: 108: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:21,416 INFO L284 TraceCheckUtils]: 109: Hoare quadruple {41148#true} {41148#true} #530#return; {41148#true} is VALID [2022-02-20 22:07:21,417 INFO L290 TraceCheckUtils]: 110: Hoare triple {41148#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset; {41148#true} is VALID [2022-02-20 22:07:21,417 INFO L290 TraceCheckUtils]: 111: Hoare triple {41148#true} kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {41148#true} is VALID [2022-02-20 22:07:21,417 INFO L290 TraceCheckUtils]: 112: Hoare triple {41148#true} #t~ret55#1.base, #t~ret55#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret55#1.base, #t~ret55#1.offset;havoc #t~ret55#1.base, #t~ret55#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {41148#true} is VALID [2022-02-20 22:07:21,417 INFO L290 TraceCheckUtils]: 113: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:21,417 INFO L284 TraceCheckUtils]: 114: Hoare quadruple {41148#true} {41148#true} #564#return; {41148#true} is VALID [2022-02-20 22:07:21,417 INFO L290 TraceCheckUtils]: 115: Hoare triple {41148#true} input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset := input_allocate_device_#t~ret67#1.base, input_allocate_device_#t~ret67#1.offset;havoc input_allocate_device_#t~ret67#1.base, input_allocate_device_#t~ret67#1.offset; {41148#true} is VALID [2022-02-20 22:07:21,417 INFO L290 TraceCheckUtils]: 116: Hoare triple {41148#true} usb_acecad_probe_#t~ret136#1.base, usb_acecad_probe_#t~ret136#1.offset := input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;assume { :end_inline_input_allocate_device } true;usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset := usb_acecad_probe_#t~ret136#1.base, usb_acecad_probe_#t~ret136#1.offset;havoc usb_acecad_probe_#t~ret136#1.base, usb_acecad_probe_#t~ret136#1.offset; {41148#true} is VALID [2022-02-20 22:07:21,418 INFO L290 TraceCheckUtils]: 117: Hoare triple {41148#true} assume !(0 == (usb_acecad_probe_~acecad~3#1.base + usb_acecad_probe_~acecad~3#1.offset) % 18446744073709551616 || 0 == (usb_acecad_probe_~input_dev~0#1.base + usb_acecad_probe_~input_dev~0#1.offset) % 18446744073709551616);assume { :begin_inline_usb_alloc_coherent } true;usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset, usb_alloc_coherent_#in~arg1#1, usb_alloc_coherent_#in~arg2#1, usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, 8, 208, usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset;havoc usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;havoc usb_alloc_coherent_#t~ret212#1.base, usb_alloc_coherent_#t~ret212#1.offset, usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset, usb_alloc_coherent_~arg1#1, usb_alloc_coherent_~arg2#1, usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset;usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset := usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset;usb_alloc_coherent_~arg1#1 := usb_alloc_coherent_#in~arg1#1;usb_alloc_coherent_~arg2#1 := usb_alloc_coherent_#in~arg2#1;usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset := usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset; {41148#true} is VALID [2022-02-20 22:07:21,418 INFO L272 TraceCheckUtils]: 118: Hoare triple {41148#true} call usb_alloc_coherent_#t~ret212#1.base, usb_alloc_coherent_#t~ret212#1.offset := ldv_malloc(0); {41148#true} is VALID [2022-02-20 22:07:21,418 INFO L290 TraceCheckUtils]: 119: Hoare triple {41148#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {41148#true} is VALID [2022-02-20 22:07:21,418 INFO L290 TraceCheckUtils]: 120: Hoare triple {41148#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {41148#true} is VALID [2022-02-20 22:07:21,418 INFO L290 TraceCheckUtils]: 121: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:21,418 INFO L284 TraceCheckUtils]: 122: Hoare quadruple {41148#true} {41148#true} #566#return; {41148#true} is VALID [2022-02-20 22:07:21,418 INFO L290 TraceCheckUtils]: 123: Hoare triple {41148#true} usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset := usb_alloc_coherent_#t~ret212#1.base, usb_alloc_coherent_#t~ret212#1.offset;havoc usb_alloc_coherent_#t~ret212#1.base, usb_alloc_coherent_#t~ret212#1.offset; {41148#true} is VALID [2022-02-20 22:07:21,418 INFO L290 TraceCheckUtils]: 124: Hoare triple {41148#true} usb_acecad_probe_#t~ret137#1.base, usb_acecad_probe_#t~ret137#1.offset := usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;assume { :end_inline_usb_alloc_coherent } true;usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset := usb_acecad_probe_#t~ret137#1.base, usb_acecad_probe_#t~ret137#1.offset;havoc usb_acecad_probe_#t~ret137#1.base, usb_acecad_probe_#t~ret137#1.offset;call write~$Pointer$(usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem138#1.base, usb_acecad_probe_#t~mem138#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8); {41148#true} is VALID [2022-02-20 22:07:21,419 INFO L290 TraceCheckUtils]: 125: Hoare triple {41148#true} assume !(0 == (usb_acecad_probe_#t~mem138#1.base + usb_acecad_probe_#t~mem138#1.offset) % 18446744073709551616);havoc usb_acecad_probe_#t~mem138#1.base, usb_acecad_probe_#t~mem138#1.offset;assume { :begin_inline_ldv_usb_alloc_urb_5 } true;ldv_usb_alloc_urb_5_#in~iso_packets#1, ldv_usb_alloc_urb_5_#in~mem_flags#1 := 0, 208;havoc ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret196#1.base, ldv_usb_alloc_urb_5_#t~ret196#1.offset, ldv_usb_alloc_urb_5_~iso_packets#1, ldv_usb_alloc_urb_5_~mem_flags#1, ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;ldv_usb_alloc_urb_5_~iso_packets#1 := ldv_usb_alloc_urb_5_#in~iso_packets#1;ldv_usb_alloc_urb_5_~mem_flags#1 := ldv_usb_alloc_urb_5_#in~mem_flags#1;havoc ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;assume { :begin_inline_ldv_alloc_urb } true;havoc ldv_alloc_urb_#res#1.base, ldv_alloc_urb_#res#1.offset;havoc ldv_alloc_urb_#t~ret198#1.base, ldv_alloc_urb_#t~ret198#1.offset, ldv_alloc_urb_#t~ret199#1, ldv_alloc_urb_~value~0#1.base, ldv_alloc_urb_~value~0#1.offset, ldv_alloc_urb_~tmp~24#1.base, ldv_alloc_urb_~tmp~24#1.offset, ldv_alloc_urb_~tmp___0~7#1;havoc ldv_alloc_urb_~value~0#1.base, ldv_alloc_urb_~value~0#1.offset;havoc ldv_alloc_urb_~tmp~24#1.base, ldv_alloc_urb_~tmp~24#1.offset;havoc ldv_alloc_urb_~tmp___0~7#1; {41148#true} is VALID [2022-02-20 22:07:21,419 INFO L272 TraceCheckUtils]: 126: Hoare triple {41148#true} call ldv_alloc_urb_#t~ret198#1.base, ldv_alloc_urb_#t~ret198#1.offset := ldv_malloc(180); {41148#true} is VALID [2022-02-20 22:07:21,419 INFO L290 TraceCheckUtils]: 127: Hoare triple {41148#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {41148#true} is VALID [2022-02-20 22:07:21,419 INFO L290 TraceCheckUtils]: 128: Hoare triple {41148#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {41148#true} is VALID [2022-02-20 22:07:21,419 INFO L290 TraceCheckUtils]: 129: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:21,419 INFO L284 TraceCheckUtils]: 130: Hoare quadruple {41148#true} {41148#true} #568#return; {41148#true} is VALID [2022-02-20 22:07:21,419 INFO L290 TraceCheckUtils]: 131: Hoare triple {41148#true} ldv_alloc_urb_~tmp~24#1.base, ldv_alloc_urb_~tmp~24#1.offset := ldv_alloc_urb_#t~ret198#1.base, ldv_alloc_urb_#t~ret198#1.offset;havoc ldv_alloc_urb_#t~ret198#1.base, ldv_alloc_urb_#t~ret198#1.offset;ldv_alloc_urb_~value~0#1.base, ldv_alloc_urb_~value~0#1.offset := ldv_alloc_urb_~tmp~24#1.base, ldv_alloc_urb_~tmp~24#1.offset; {41148#true} is VALID [2022-02-20 22:07:21,420 INFO L272 TraceCheckUtils]: 132: Hoare triple {41148#true} call ldv_alloc_urb_#t~ret199#1 := ldv_undef_int(); {41148#true} is VALID [2022-02-20 22:07:21,420 INFO L290 TraceCheckUtils]: 133: Hoare triple {41148#true} havoc ~tmp~8;assume -2147483648 <= #t~nondet65 && #t~nondet65 <= 2147483647;~tmp~8 := #t~nondet65;havoc #t~nondet65;#res := ~tmp~8; {41148#true} is VALID [2022-02-20 22:07:21,420 INFO L290 TraceCheckUtils]: 134: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:21,420 INFO L284 TraceCheckUtils]: 135: Hoare quadruple {41148#true} {41148#true} #570#return; {41148#true} is VALID [2022-02-20 22:07:21,420 INFO L290 TraceCheckUtils]: 136: Hoare triple {41148#true} assume -2147483648 <= ldv_alloc_urb_#t~ret199#1 && ldv_alloc_urb_#t~ret199#1 <= 2147483647;ldv_alloc_urb_~tmp___0~7#1 := ldv_alloc_urb_#t~ret199#1;havoc ldv_alloc_urb_#t~ret199#1; {41148#true} is VALID [2022-02-20 22:07:21,420 INFO L290 TraceCheckUtils]: 137: Hoare triple {41148#true} assume 0 != ldv_alloc_urb_~tmp___0~7#1; {41148#true} is VALID [2022-02-20 22:07:21,420 INFO L290 TraceCheckUtils]: 138: Hoare triple {41148#true} assume 0 != (ldv_alloc_urb_~value~0#1.base + ldv_alloc_urb_~value~0#1.offset) % 18446744073709551616;~usb_urb~0.base, ~usb_urb~0.offset := ldv_alloc_urb_~value~0#1.base, ldv_alloc_urb_~value~0#1.offset; {41148#true} is VALID [2022-02-20 22:07:21,420 INFO L290 TraceCheckUtils]: 139: Hoare triple {41148#true} ldv_alloc_urb_#res#1.base, ldv_alloc_urb_#res#1.offset := ~usb_urb~0.base, ~usb_urb~0.offset; {41148#true} is VALID [2022-02-20 22:07:21,421 INFO L290 TraceCheckUtils]: 140: Hoare triple {41148#true} ldv_usb_alloc_urb_5_#t~ret196#1.base, ldv_usb_alloc_urb_5_#t~ret196#1.offset := ldv_alloc_urb_#res#1.base, ldv_alloc_urb_#res#1.offset;assume { :end_inline_ldv_alloc_urb } true;ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset := ldv_usb_alloc_urb_5_#t~ret196#1.base, ldv_usb_alloc_urb_5_#t~ret196#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret196#1.base, ldv_usb_alloc_urb_5_#t~ret196#1.offset;ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset := ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset; {41148#true} is VALID [2022-02-20 22:07:21,421 INFO L290 TraceCheckUtils]: 141: Hoare triple {41148#true} usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset := ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;assume { :end_inline_ldv_usb_alloc_urb_5 } true;call write~$Pointer$(usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset, usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8);havoc usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset;call usb_acecad_probe_#t~mem140#1.base, usb_acecad_probe_#t~mem140#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8); {41148#true} is VALID [2022-02-20 22:07:21,421 INFO L290 TraceCheckUtils]: 142: Hoare triple {41148#true} assume 0 == (usb_acecad_probe_#t~mem140#1.base + usb_acecad_probe_#t~mem140#1.offset) % 18446744073709551616;havoc usb_acecad_probe_#t~mem140#1.base, usb_acecad_probe_#t~mem140#1.offset;usb_acecad_probe_~err~0#1 := -12; {41684#(<= (+ |ULTIMATE.start_usb_acecad_probe_~err~0#1| 12) 0)} is VALID [2022-02-20 22:07:21,422 INFO L290 TraceCheckUtils]: 143: Hoare triple {41684#(<= (+ |ULTIMATE.start_usb_acecad_probe_~err~0#1| 12) 0)} call usb_acecad_probe_#t~mem172#1.base, usb_acecad_probe_#t~mem172#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem173#1 := read~int(usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset, 8); {41684#(<= (+ |ULTIMATE.start_usb_acecad_probe_~err~0#1| 12) 0)} is VALID [2022-02-20 22:07:21,422 INFO L272 TraceCheckUtils]: 144: Hoare triple {41684#(<= (+ |ULTIMATE.start_usb_acecad_probe_~err~0#1| 12) 0)} call usb_free_coherent(usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, 8, usb_acecad_probe_#t~mem172#1.base, usb_acecad_probe_#t~mem172#1.offset, usb_acecad_probe_#t~mem173#1); {41148#true} is VALID [2022-02-20 22:07:21,422 INFO L290 TraceCheckUtils]: 145: Hoare triple {41148#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1 := #in~arg1;~arg2.base, ~arg2.offset := #in~arg2.base, #in~arg2.offset;~arg3 := #in~arg3; {41148#true} is VALID [2022-02-20 22:07:21,422 INFO L290 TraceCheckUtils]: 146: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:21,423 INFO L284 TraceCheckUtils]: 147: Hoare quadruple {41148#true} {41684#(<= (+ |ULTIMATE.start_usb_acecad_probe_~err~0#1| 12) 0)} #592#return; {41684#(<= (+ |ULTIMATE.start_usb_acecad_probe_~err~0#1| 12) 0)} is VALID [2022-02-20 22:07:21,423 INFO L290 TraceCheckUtils]: 148: Hoare triple {41684#(<= (+ |ULTIMATE.start_usb_acecad_probe_~err~0#1| 12) 0)} havoc usb_acecad_probe_#t~mem172#1.base, usb_acecad_probe_#t~mem172#1.offset;havoc usb_acecad_probe_#t~mem173#1; {41684#(<= (+ |ULTIMATE.start_usb_acecad_probe_~err~0#1| 12) 0)} is VALID [2022-02-20 22:07:21,424 INFO L290 TraceCheckUtils]: 149: Hoare triple {41684#(<= (+ |ULTIMATE.start_usb_acecad_probe_~err~0#1| 12) 0)} assume { :begin_inline_input_free_device } true;input_free_device_#in~arg0#1.base, input_free_device_#in~arg0#1.offset := usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset;havoc input_free_device_~arg0#1.base, input_free_device_~arg0#1.offset;input_free_device_~arg0#1.base, input_free_device_~arg0#1.offset := input_free_device_#in~arg0#1.base, input_free_device_#in~arg0#1.offset; {41684#(<= (+ |ULTIMATE.start_usb_acecad_probe_~err~0#1| 12) 0)} is VALID [2022-02-20 22:07:21,424 INFO L290 TraceCheckUtils]: 150: Hoare triple {41684#(<= (+ |ULTIMATE.start_usb_acecad_probe_~err~0#1| 12) 0)} assume { :end_inline_input_free_device } true; {41684#(<= (+ |ULTIMATE.start_usb_acecad_probe_~err~0#1| 12) 0)} is VALID [2022-02-20 22:07:21,424 INFO L272 TraceCheckUtils]: 151: Hoare triple {41684#(<= (+ |ULTIMATE.start_usb_acecad_probe_~err~0#1| 12) 0)} call kfree(usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset); {41148#true} is VALID [2022-02-20 22:07:21,424 INFO L290 TraceCheckUtils]: 152: Hoare triple {41148#true} ~p.base, ~p.offset := #in~p.base, #in~p.offset;call ULTIMATE.dealloc(~p.base, ~p.offset); {41148#true} is VALID [2022-02-20 22:07:21,425 INFO L290 TraceCheckUtils]: 153: Hoare triple {41148#true} assume true; {41148#true} is VALID [2022-02-20 22:07:21,425 INFO L284 TraceCheckUtils]: 154: Hoare quadruple {41148#true} {41684#(<= (+ |ULTIMATE.start_usb_acecad_probe_~err~0#1| 12) 0)} #594#return; {41684#(<= (+ |ULTIMATE.start_usb_acecad_probe_~err~0#1| 12) 0)} is VALID [2022-02-20 22:07:21,426 INFO L290 TraceCheckUtils]: 155: Hoare triple {41684#(<= (+ |ULTIMATE.start_usb_acecad_probe_~err~0#1| 12) 0)} usb_acecad_probe_#res#1 := usb_acecad_probe_~err~0#1; {41724#(<= (+ |ULTIMATE.start_usb_acecad_probe_#res#1| 12) 0)} is VALID [2022-02-20 22:07:21,426 INFO L290 TraceCheckUtils]: 156: Hoare triple {41724#(<= (+ |ULTIMATE.start_usb_acecad_probe_#res#1| 12) 0)} main_#t~ret188#1 := usb_acecad_probe_#res#1;assume { :end_inline_usb_acecad_probe } true;assume -2147483648 <= main_#t~ret188#1 && main_#t~ret188#1 <= 2147483647;~ldv_retval_0~0 := main_#t~ret188#1;havoc main_#t~ret188#1; {41728#(<= (+ ~ldv_retval_0~0 12) 0)} is VALID [2022-02-20 22:07:21,427 INFO L290 TraceCheckUtils]: 157: Hoare triple {41728#(<= (+ ~ldv_retval_0~0 12) 0)} assume 0 == ~ldv_retval_0~0;~ldv_state_variable_1~0 := 2;~ref_cnt~0 := 1 + ~ref_cnt~0; {41149#false} is VALID [2022-02-20 22:07:21,427 INFO L290 TraceCheckUtils]: 158: Hoare triple {41149#false} assume -2147483648 <= main_#t~nondet184#1 && main_#t~nondet184#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet184#1;havoc main_#t~nondet184#1;main_#t~switch185#1 := 0 == main_~tmp___0~6#1; {41149#false} is VALID [2022-02-20 22:07:21,427 INFO L290 TraceCheckUtils]: 159: Hoare triple {41149#false} assume !main_#t~switch185#1;main_#t~switch185#1 := main_#t~switch185#1 || 1 == main_~tmp___0~6#1; {41149#false} is VALID [2022-02-20 22:07:21,427 INFO L290 TraceCheckUtils]: 160: Hoare triple {41149#false} assume main_#t~switch185#1; {41149#false} is VALID [2022-02-20 22:07:21,427 INFO L290 TraceCheckUtils]: 161: Hoare triple {41149#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet189#1 && main_#t~nondet189#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet189#1;havoc main_#t~nondet189#1;main_#t~switch190#1 := 0 == main_~tmp___2~1#1; {41149#false} is VALID [2022-02-20 22:07:21,427 INFO L290 TraceCheckUtils]: 162: Hoare triple {41149#false} assume main_#t~switch190#1; {41149#false} is VALID [2022-02-20 22:07:21,428 INFO L290 TraceCheckUtils]: 163: Hoare triple {41149#false} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0;assume { :begin_inline_usb_acecad_exit } true;assume { :begin_inline_ldv_usb_deregister_11 } true;ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset := ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset;assume { :begin_inline_usb_deregister } true;usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset := ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;havoc usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset;usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset := usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset; {41149#false} is VALID [2022-02-20 22:07:21,428 INFO L290 TraceCheckUtils]: 164: Hoare triple {41149#false} assume { :end_inline_usb_deregister } true;~ldv_state_variable_1~0 := 0; {41149#false} is VALID [2022-02-20 22:07:21,428 INFO L290 TraceCheckUtils]: 165: Hoare triple {41149#false} assume { :end_inline_ldv_usb_deregister_11 } true; {41149#false} is VALID [2022-02-20 22:07:21,428 INFO L290 TraceCheckUtils]: 166: Hoare triple {41149#false} assume { :end_inline_usb_acecad_exit } true;~ldv_state_variable_0~0 := 2; {41149#false} is VALID [2022-02-20 22:07:21,428 INFO L290 TraceCheckUtils]: 167: Hoare triple {41149#false} assume { :begin_inline_ldv_check_final_state } true; {41149#false} is VALID [2022-02-20 22:07:21,428 INFO L290 TraceCheckUtils]: 168: Hoare triple {41149#false} assume 0 != (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616; {41149#false} is VALID [2022-02-20 22:07:21,428 INFO L272 TraceCheckUtils]: 169: Hoare triple {41149#false} call ldv_error(); {41149#false} is VALID [2022-02-20 22:07:21,429 INFO L290 TraceCheckUtils]: 170: Hoare triple {41149#false} assume !false; {41149#false} is VALID [2022-02-20 22:07:21,429 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2022-02-20 22:07:21,429 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-02-20 22:07:21,429 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1567093342] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:07:21,430 INFO L191 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-02-20 22:07:21,430 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [8] total 11 [2022-02-20 22:07:21,430 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1454738384] [2022-02-20 22:07:21,430 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:07:21,456 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 21.0) internal successors, (105), 5 states have internal predecessors, (105), 3 states have call successors, (16), 2 states have call predecessors, (16), 1 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) Word has length 171 [2022-02-20 22:07:21,456 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:07:21,457 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 21.0) internal successors, (105), 5 states have internal predecessors, (105), 3 states have call successors, (16), 2 states have call predecessors, (16), 1 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2022-02-20 22:07:21,564 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 136 edges. 136 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:21,564 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-02-20 22:07:21,564 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:07:21,565 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-02-20 22:07:21,565 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2022-02-20 22:07:21,565 INFO L87 Difference]: Start difference. First operand 867 states and 1123 transitions. Second operand has 5 states, 5 states have (on average 21.0) internal successors, (105), 5 states have internal predecessors, (105), 3 states have call successors, (16), 2 states have call predecessors, (16), 1 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2022-02-20 22:07:23,677 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:23,677 INFO L93 Difference]: Finished difference Result 2809 states and 3672 transitions. [2022-02-20 22:07:23,677 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-02-20 22:07:23,678 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 21.0) internal successors, (105), 5 states have internal predecessors, (105), 3 states have call successors, (16), 2 states have call predecessors, (16), 1 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) Word has length 171 [2022-02-20 22:07:23,678 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 22:07:23,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 21.0) internal successors, (105), 5 states have internal predecessors, (105), 3 states have call successors, (16), 2 states have call predecessors, (16), 1 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2022-02-20 22:07:23,686 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 904 transitions. [2022-02-20 22:07:23,687 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 21.0) internal successors, (105), 5 states have internal predecessors, (105), 3 states have call successors, (16), 2 states have call predecessors, (16), 1 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2022-02-20 22:07:23,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 904 transitions. [2022-02-20 22:07:23,692 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 9 states and 904 transitions. [2022-02-20 22:07:24,355 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 904 edges. 904 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:24,542 INFO L225 Difference]: With dead ends: 2809 [2022-02-20 22:07:24,543 INFO L226 Difference]: Without dead ends: 1961 [2022-02-20 22:07:24,544 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 216 GetRequests, 203 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=167, Unknown=0, NotChecked=0, Total=210 [2022-02-20 22:07:24,545 INFO L933 BasicCegarLoop]: 580 mSDtfsCounter, 394 mSDsluCounter, 1286 mSDsCounter, 0 mSdLazyCounter, 47 mSolverCounterSat, 16 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 394 SdHoareTripleChecker+Valid, 1866 SdHoareTripleChecker+Invalid, 63 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 16 IncrementalHoareTripleChecker+Valid, 47 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-02-20 22:07:24,545 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [394 Valid, 1866 Invalid, 63 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [16 Valid, 47 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-02-20 22:07:24,547 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1961 states. [2022-02-20 22:07:24,811 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1961 to 903. [2022-02-20 22:07:24,811 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 22:07:24,813 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1961 states. Second operand has 903 states, 709 states have (on average 1.2552891396332864) internal successors, (890), 717 states have internal predecessors, (890), 138 states have call successors, (138), 56 states have call predecessors, (138), 55 states have return successors, (139), 137 states have call predecessors, (139), 137 states have call successors, (139) [2022-02-20 22:07:24,814 INFO L74 IsIncluded]: Start isIncluded. First operand 1961 states. Second operand has 903 states, 709 states have (on average 1.2552891396332864) internal successors, (890), 717 states have internal predecessors, (890), 138 states have call successors, (138), 56 states have call predecessors, (138), 55 states have return successors, (139), 137 states have call predecessors, (139), 137 states have call successors, (139) [2022-02-20 22:07:24,815 INFO L87 Difference]: Start difference. First operand 1961 states. Second operand has 903 states, 709 states have (on average 1.2552891396332864) internal successors, (890), 717 states have internal predecessors, (890), 138 states have call successors, (138), 56 states have call predecessors, (138), 55 states have return successors, (139), 137 states have call predecessors, (139), 137 states have call successors, (139) [2022-02-20 22:07:24,945 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:24,945 INFO L93 Difference]: Finished difference Result 1961 states and 2560 transitions. [2022-02-20 22:07:24,945 INFO L276 IsEmpty]: Start isEmpty. Operand 1961 states and 2560 transitions. [2022-02-20 22:07:24,951 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:24,951 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:24,953 INFO L74 IsIncluded]: Start isIncluded. First operand has 903 states, 709 states have (on average 1.2552891396332864) internal successors, (890), 717 states have internal predecessors, (890), 138 states have call successors, (138), 56 states have call predecessors, (138), 55 states have return successors, (139), 137 states have call predecessors, (139), 137 states have call successors, (139) Second operand 1961 states. [2022-02-20 22:07:24,954 INFO L87 Difference]: Start difference. First operand has 903 states, 709 states have (on average 1.2552891396332864) internal successors, (890), 717 states have internal predecessors, (890), 138 states have call successors, (138), 56 states have call predecessors, (138), 55 states have return successors, (139), 137 states have call predecessors, (139), 137 states have call successors, (139) Second operand 1961 states. [2022-02-20 22:07:25,112 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:25,112 INFO L93 Difference]: Finished difference Result 1961 states and 2560 transitions. [2022-02-20 22:07:25,112 INFO L276 IsEmpty]: Start isEmpty. Operand 1961 states and 2560 transitions. [2022-02-20 22:07:25,116 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:25,117 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:25,117 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 22:07:25,117 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 22:07:25,119 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 903 states, 709 states have (on average 1.2552891396332864) internal successors, (890), 717 states have internal predecessors, (890), 138 states have call successors, (138), 56 states have call predecessors, (138), 55 states have return successors, (139), 137 states have call predecessors, (139), 137 states have call successors, (139) [2022-02-20 22:07:25,186 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 903 states to 903 states and 1167 transitions. [2022-02-20 22:07:25,188 INFO L78 Accepts]: Start accepts. Automaton has 903 states and 1167 transitions. Word has length 171 [2022-02-20 22:07:25,188 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 22:07:25,188 INFO L470 AbstractCegarLoop]: Abstraction has 903 states and 1167 transitions. [2022-02-20 22:07:25,188 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 21.0) internal successors, (105), 5 states have internal predecessors, (105), 3 states have call successors, (16), 2 states have call predecessors, (16), 1 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2022-02-20 22:07:25,189 INFO L276 IsEmpty]: Start isEmpty. Operand 903 states and 1167 transitions. [2022-02-20 22:07:25,191 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 172 [2022-02-20 22:07:25,191 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:07:25,191 INFO L514 BasicCegarLoop]: trace histogram [5, 5, 5, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:07:25,219 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2022-02-20 22:07:25,416 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable10 [2022-02-20 22:07:25,416 INFO L402 AbstractCegarLoop]: === Iteration 12 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:07:25,416 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:07:25,417 INFO L85 PathProgramCache]: Analyzing trace with hash -2091737702, now seen corresponding path program 1 times [2022-02-20 22:07:25,417 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:07:25,417 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1780817414] [2022-02-20 22:07:25,417 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:07:25,417 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:07:25,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:25,599 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 22:07:25,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:25,612 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:25,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:25,617 INFO L290 TraceCheckUtils]: 0: Hoare triple {50972#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {50883#true} is VALID [2022-02-20 22:07:25,618 INFO L290 TraceCheckUtils]: 1: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:25,618 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {50883#true} {50883#true} #538#return; {50883#true} is VALID [2022-02-20 22:07:25,618 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:25,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:25,622 INFO L290 TraceCheckUtils]: 0: Hoare triple {50883#true} ~cond := #in~cond; {50883#true} is VALID [2022-02-20 22:07:25,623 INFO L290 TraceCheckUtils]: 1: Hoare triple {50883#true} assume !(0 == ~cond); {50883#true} is VALID [2022-02-20 22:07:25,623 INFO L290 TraceCheckUtils]: 2: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:25,623 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {50883#true} {50883#true} #540#return; {50883#true} is VALID [2022-02-20 22:07:25,623 INFO L290 TraceCheckUtils]: 0: Hoare triple {50964#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {50883#true} is VALID [2022-02-20 22:07:25,624 INFO L272 TraceCheckUtils]: 1: Hoare triple {50883#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {50972#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:25,624 INFO L290 TraceCheckUtils]: 2: Hoare triple {50972#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {50883#true} is VALID [2022-02-20 22:07:25,625 INFO L290 TraceCheckUtils]: 3: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:25,625 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {50883#true} {50883#true} #538#return; {50883#true} is VALID [2022-02-20 22:07:25,625 INFO L290 TraceCheckUtils]: 5: Hoare triple {50883#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {50883#true} is VALID [2022-02-20 22:07:25,625 INFO L272 TraceCheckUtils]: 6: Hoare triple {50883#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {50883#true} is VALID [2022-02-20 22:07:25,625 INFO L290 TraceCheckUtils]: 7: Hoare triple {50883#true} ~cond := #in~cond; {50883#true} is VALID [2022-02-20 22:07:25,625 INFO L290 TraceCheckUtils]: 8: Hoare triple {50883#true} assume !(0 == ~cond); {50883#true} is VALID [2022-02-20 22:07:25,625 INFO L290 TraceCheckUtils]: 9: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:25,626 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {50883#true} {50883#true} #540#return; {50883#true} is VALID [2022-02-20 22:07:25,626 INFO L290 TraceCheckUtils]: 11: Hoare triple {50883#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {50883#true} is VALID [2022-02-20 22:07:25,626 INFO L290 TraceCheckUtils]: 12: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:25,626 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {50883#true} {50883#true} #544#return; {50883#true} is VALID [2022-02-20 22:07:25,626 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 27 [2022-02-20 22:07:25,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:25,634 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:25,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:25,640 INFO L290 TraceCheckUtils]: 0: Hoare triple {50972#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {50883#true} is VALID [2022-02-20 22:07:25,640 INFO L290 TraceCheckUtils]: 1: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:25,640 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {50883#true} {50883#true} #538#return; {50883#true} is VALID [2022-02-20 22:07:25,640 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:25,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:25,646 INFO L290 TraceCheckUtils]: 0: Hoare triple {50883#true} ~cond := #in~cond; {50883#true} is VALID [2022-02-20 22:07:25,647 INFO L290 TraceCheckUtils]: 1: Hoare triple {50883#true} assume !(0 == ~cond); {50883#true} is VALID [2022-02-20 22:07:25,647 INFO L290 TraceCheckUtils]: 2: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:25,647 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {50883#true} {50883#true} #540#return; {50883#true} is VALID [2022-02-20 22:07:25,647 INFO L290 TraceCheckUtils]: 0: Hoare triple {50964#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {50883#true} is VALID [2022-02-20 22:07:25,648 INFO L272 TraceCheckUtils]: 1: Hoare triple {50883#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {50972#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:25,648 INFO L290 TraceCheckUtils]: 2: Hoare triple {50972#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {50883#true} is VALID [2022-02-20 22:07:25,649 INFO L290 TraceCheckUtils]: 3: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:25,649 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {50883#true} {50883#true} #538#return; {50883#true} is VALID [2022-02-20 22:07:25,649 INFO L290 TraceCheckUtils]: 5: Hoare triple {50883#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {50883#true} is VALID [2022-02-20 22:07:25,649 INFO L272 TraceCheckUtils]: 6: Hoare triple {50883#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {50883#true} is VALID [2022-02-20 22:07:25,649 INFO L290 TraceCheckUtils]: 7: Hoare triple {50883#true} ~cond := #in~cond; {50883#true} is VALID [2022-02-20 22:07:25,649 INFO L290 TraceCheckUtils]: 8: Hoare triple {50883#true} assume !(0 == ~cond); {50883#true} is VALID [2022-02-20 22:07:25,649 INFO L290 TraceCheckUtils]: 9: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:25,650 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {50883#true} {50883#true} #540#return; {50883#true} is VALID [2022-02-20 22:07:25,650 INFO L290 TraceCheckUtils]: 11: Hoare triple {50883#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {50883#true} is VALID [2022-02-20 22:07:25,650 INFO L290 TraceCheckUtils]: 12: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:25,650 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {50883#true} {50883#true} #600#return; {50883#true} is VALID [2022-02-20 22:07:25,657 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 56 [2022-02-20 22:07:25,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:25,678 INFO L290 TraceCheckUtils]: 0: Hoare triple {50980#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {50883#true} is VALID [2022-02-20 22:07:25,679 INFO L290 TraceCheckUtils]: 1: Hoare triple {50883#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {50981#(and (= |ldv_malloc_#res.base| 0) (= |ldv_malloc_#res.offset| 0))} is VALID [2022-02-20 22:07:25,679 INFO L290 TraceCheckUtils]: 2: Hoare triple {50981#(and (= |ldv_malloc_#res.base| 0) (= |ldv_malloc_#res.offset| 0))} assume true; {50981#(and (= |ldv_malloc_#res.base| 0) (= |ldv_malloc_#res.offset| 0))} is VALID [2022-02-20 22:07:25,680 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {50981#(and (= |ldv_malloc_#res.base| 0) (= |ldv_malloc_#res.offset| 0))} {50883#true} #546#return; {50917#(and (= |ULTIMATE.start_ldv_interface_to_usbdev_#t~ret203#1.offset| 0) (= |ULTIMATE.start_ldv_interface_to_usbdev_#t~ret203#1.base| 0))} is VALID [2022-02-20 22:07:25,681 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 77 [2022-02-20 22:07:25,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:25,688 INFO L290 TraceCheckUtils]: 0: Hoare triple {50883#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {50883#true} is VALID [2022-02-20 22:07:25,688 INFO L290 TraceCheckUtils]: 1: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:25,688 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {50883#true} {50884#false} #556#return; {50884#false} is VALID [2022-02-20 22:07:25,688 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 83 [2022-02-20 22:07:25,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:25,693 INFO L290 TraceCheckUtils]: 0: Hoare triple {50883#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {50883#true} is VALID [2022-02-20 22:07:25,693 INFO L290 TraceCheckUtils]: 1: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:25,694 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {50883#true} {50884#false} #560#return; {50884#false} is VALID [2022-02-20 22:07:25,694 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 90 [2022-02-20 22:07:25,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:25,703 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:25,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:25,710 INFO L290 TraceCheckUtils]: 0: Hoare triple {50980#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {50883#true} is VALID [2022-02-20 22:07:25,710 INFO L290 TraceCheckUtils]: 1: Hoare triple {50883#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {50883#true} is VALID [2022-02-20 22:07:25,710 INFO L290 TraceCheckUtils]: 2: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:25,711 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {50883#true} {50883#true} #530#return; {50883#true} is VALID [2022-02-20 22:07:25,711 INFO L290 TraceCheckUtils]: 0: Hoare triple {50980#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {50883#true} is VALID [2022-02-20 22:07:25,712 INFO L272 TraceCheckUtils]: 1: Hoare triple {50883#true} call __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset := ldv_malloc(__kmalloc_~size#1); {50980#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:25,712 INFO L290 TraceCheckUtils]: 2: Hoare triple {50980#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {50883#true} is VALID [2022-02-20 22:07:25,712 INFO L290 TraceCheckUtils]: 3: Hoare triple {50883#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {50883#true} is VALID [2022-02-20 22:07:25,712 INFO L290 TraceCheckUtils]: 4: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:25,712 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {50883#true} {50883#true} #530#return; {50883#true} is VALID [2022-02-20 22:07:25,712 INFO L290 TraceCheckUtils]: 6: Hoare triple {50883#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset; {50883#true} is VALID [2022-02-20 22:07:25,713 INFO L290 TraceCheckUtils]: 7: Hoare triple {50883#true} kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {50883#true} is VALID [2022-02-20 22:07:25,713 INFO L290 TraceCheckUtils]: 8: Hoare triple {50883#true} #t~ret55#1.base, #t~ret55#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret55#1.base, #t~ret55#1.offset;havoc #t~ret55#1.base, #t~ret55#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {50883#true} is VALID [2022-02-20 22:07:25,713 INFO L290 TraceCheckUtils]: 9: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:25,713 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {50883#true} {50884#false} #562#return; {50884#false} is VALID [2022-02-20 22:07:25,713 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 103 [2022-02-20 22:07:25,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:25,723 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:25,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:25,729 INFO L290 TraceCheckUtils]: 0: Hoare triple {50980#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {50883#true} is VALID [2022-02-20 22:07:25,729 INFO L290 TraceCheckUtils]: 1: Hoare triple {50883#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {50883#true} is VALID [2022-02-20 22:07:25,729 INFO L290 TraceCheckUtils]: 2: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:25,729 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {50883#true} {50883#true} #530#return; {50883#true} is VALID [2022-02-20 22:07:25,730 INFO L290 TraceCheckUtils]: 0: Hoare triple {50980#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {50883#true} is VALID [2022-02-20 22:07:25,730 INFO L272 TraceCheckUtils]: 1: Hoare triple {50883#true} call __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset := ldv_malloc(__kmalloc_~size#1); {50980#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:25,731 INFO L290 TraceCheckUtils]: 2: Hoare triple {50980#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {50883#true} is VALID [2022-02-20 22:07:25,731 INFO L290 TraceCheckUtils]: 3: Hoare triple {50883#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {50883#true} is VALID [2022-02-20 22:07:25,731 INFO L290 TraceCheckUtils]: 4: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:25,731 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {50883#true} {50883#true} #530#return; {50883#true} is VALID [2022-02-20 22:07:25,731 INFO L290 TraceCheckUtils]: 6: Hoare triple {50883#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset; {50883#true} is VALID [2022-02-20 22:07:25,731 INFO L290 TraceCheckUtils]: 7: Hoare triple {50883#true} kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {50883#true} is VALID [2022-02-20 22:07:25,731 INFO L290 TraceCheckUtils]: 8: Hoare triple {50883#true} #t~ret55#1.base, #t~ret55#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret55#1.base, #t~ret55#1.offset;havoc #t~ret55#1.base, #t~ret55#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {50883#true} is VALID [2022-02-20 22:07:25,732 INFO L290 TraceCheckUtils]: 9: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:25,732 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {50883#true} {50884#false} #564#return; {50884#false} is VALID [2022-02-20 22:07:25,732 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 118 [2022-02-20 22:07:25,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:25,740 INFO L290 TraceCheckUtils]: 0: Hoare triple {50980#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {50883#true} is VALID [2022-02-20 22:07:25,740 INFO L290 TraceCheckUtils]: 1: Hoare triple {50883#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {50883#true} is VALID [2022-02-20 22:07:25,740 INFO L290 TraceCheckUtils]: 2: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:25,740 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {50883#true} {50884#false} #566#return; {50884#false} is VALID [2022-02-20 22:07:25,741 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 126 [2022-02-20 22:07:25,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:25,747 INFO L290 TraceCheckUtils]: 0: Hoare triple {50980#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {50883#true} is VALID [2022-02-20 22:07:25,747 INFO L290 TraceCheckUtils]: 1: Hoare triple {50883#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {50883#true} is VALID [2022-02-20 22:07:25,747 INFO L290 TraceCheckUtils]: 2: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:25,748 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {50883#true} {50884#false} #568#return; {50884#false} is VALID [2022-02-20 22:07:25,748 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 132 [2022-02-20 22:07:25,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:25,756 INFO L290 TraceCheckUtils]: 0: Hoare triple {50883#true} havoc ~tmp~8;assume -2147483648 <= #t~nondet65 && #t~nondet65 <= 2147483647;~tmp~8 := #t~nondet65;havoc #t~nondet65;#res := ~tmp~8; {50883#true} is VALID [2022-02-20 22:07:25,756 INFO L290 TraceCheckUtils]: 1: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:25,756 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {50883#true} {50884#false} #570#return; {50884#false} is VALID [2022-02-20 22:07:25,756 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 144 [2022-02-20 22:07:25,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:25,762 INFO L290 TraceCheckUtils]: 0: Hoare triple {50883#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1 := #in~arg1;~arg2.base, ~arg2.offset := #in~arg2.base, #in~arg2.offset;~arg3 := #in~arg3; {50883#true} is VALID [2022-02-20 22:07:25,762 INFO L290 TraceCheckUtils]: 1: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:25,763 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {50883#true} {50884#false} #592#return; {50884#false} is VALID [2022-02-20 22:07:25,770 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 151 [2022-02-20 22:07:25,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:25,778 INFO L290 TraceCheckUtils]: 0: Hoare triple {50990#(= |old(#valid)| |#valid|)} ~p.base, ~p.offset := #in~p.base, #in~p.offset;call ULTIMATE.dealloc(~p.base, ~p.offset); {50883#true} is VALID [2022-02-20 22:07:25,778 INFO L290 TraceCheckUtils]: 1: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:25,778 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {50883#true} {50884#false} #594#return; {50884#false} is VALID [2022-02-20 22:07:25,778 INFO L290 TraceCheckUtils]: 0: Hoare triple {50883#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(99, 2);call #Ultimate.allocInit(10, 3);call #Ultimate.allocInit(7, 4);call write~init~int(97, 4, 0, 1);call write~init~int(99, 4, 1, 1);call write~init~int(101, 4, 2, 1);call write~init~int(99, 4, 3, 1);call write~init~int(97, 4, 4, 1);call write~init~int(100, 4, 5, 1);call write~init~int(0, 4, 6, 1);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(20, 6);call #Ultimate.allocInit(57, 7);call #Ultimate.allocInit(2, 8);call write~init~int(32, 8, 0, 1);call write~init~int(0, 8, 1, 1);call #Ultimate.allocInit(8, 9);call #Ultimate.allocInit(34, 10);call #Ultimate.allocInit(32, 11);call #Ultimate.allocInit(11, 12);call #Ultimate.allocInit(48, 13);~LDV_IN_INTERRUPT~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset := 14, 0;call #Ultimate.allocInit(72, 14);call write~init~int(3, ~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 2 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(4, ~#usb_acecad_id_table~0.base, 4 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 6 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 8 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 10 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 11 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 12 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 13 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 14 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 15 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 16 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(3, ~#usb_acecad_id_table~0.base, 24 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 26 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(8, ~#usb_acecad_id_table~0.base, 28 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 30 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 32 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 34 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 35 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 36 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 37 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 38 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 39 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(1, ~#usb_acecad_id_table~0.base, 40 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(0, ~#usb_acecad_id_table~0.base, 48 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 50 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 52 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 54 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 56 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 58 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 59 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 60 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 61 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 62 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 63 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 64 + ~#usb_acecad_id_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.driver_info := 0;~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset := 15, 0;call #Ultimate.allocInit(264, 15);call write~init~$Pointer$(12, 0, ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_probe.base, #funAddr~usb_acecad_probe.offset, ~#usb_acecad_driver~0.base, 8 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_disconnect.base, #funAddr~usb_acecad_disconnect.offset, ~#usb_acecad_driver~0.base, 16 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 24 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 32 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 40 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 48 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 56 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 64 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, ~#usb_acecad_driver~0.base, 72 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 80 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 84 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 88 + ~#usb_acecad_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 92 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 100 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 108 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 116 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 124 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 132 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 136 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 144 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 152 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 160 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 168 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 176 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 184 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 192 + ~#usb_acecad_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 193 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 201 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 209 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 217 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 225 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 233 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 241 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 249 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 257 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 261 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 262 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 263 + ~#usb_acecad_driver~0.offset, 1);~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {50883#true} is VALID [2022-02-20 22:07:25,779 INFO L290 TraceCheckUtils]: 1: Hoare triple {50883#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret183#1.base, main_#t~ret183#1.offset, main_#t~nondet184#1, main_#t~switch185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~ret188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~ret191#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~17#1.base, main_~tmp~17#1.offset, main_~tmp___0~6#1, main_~tmp___1~3#1, main_~tmp___2~1#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~17#1.base, main_~tmp~17#1.offset;havoc main_~tmp___0~6#1;havoc main_~tmp___1~3#1;havoc main_~tmp___2~1#1; {50883#true} is VALID [2022-02-20 22:07:25,779 INFO L272 TraceCheckUtils]: 2: Hoare triple {50883#true} call main_#t~ret183#1.base, main_#t~ret183#1.offset := ldv_init_zalloc(24); {50964#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:25,780 INFO L290 TraceCheckUtils]: 3: Hoare triple {50964#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {50883#true} is VALID [2022-02-20 22:07:25,781 INFO L272 TraceCheckUtils]: 4: Hoare triple {50883#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {50972#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:25,781 INFO L290 TraceCheckUtils]: 5: Hoare triple {50972#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {50883#true} is VALID [2022-02-20 22:07:25,781 INFO L290 TraceCheckUtils]: 6: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:25,781 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {50883#true} {50883#true} #538#return; {50883#true} is VALID [2022-02-20 22:07:25,781 INFO L290 TraceCheckUtils]: 8: Hoare triple {50883#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {50883#true} is VALID [2022-02-20 22:07:25,781 INFO L272 TraceCheckUtils]: 9: Hoare triple {50883#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {50883#true} is VALID [2022-02-20 22:07:25,781 INFO L290 TraceCheckUtils]: 10: Hoare triple {50883#true} ~cond := #in~cond; {50883#true} is VALID [2022-02-20 22:07:25,781 INFO L290 TraceCheckUtils]: 11: Hoare triple {50883#true} assume !(0 == ~cond); {50883#true} is VALID [2022-02-20 22:07:25,782 INFO L290 TraceCheckUtils]: 12: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:25,782 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {50883#true} {50883#true} #540#return; {50883#true} is VALID [2022-02-20 22:07:25,782 INFO L290 TraceCheckUtils]: 14: Hoare triple {50883#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {50883#true} is VALID [2022-02-20 22:07:25,782 INFO L290 TraceCheckUtils]: 15: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:25,782 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {50883#true} {50883#true} #544#return; {50883#true} is VALID [2022-02-20 22:07:25,782 INFO L290 TraceCheckUtils]: 17: Hoare triple {50883#true} main_~tmp~17#1.base, main_~tmp~17#1.offset := main_#t~ret183#1.base, main_#t~ret183#1.offset;havoc main_#t~ret183#1.base, main_#t~ret183#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~17#1.base, main_~tmp~17#1.offset;assume { :begin_inline_ldv_initialize } true; {50883#true} is VALID [2022-02-20 22:07:25,782 INFO L290 TraceCheckUtils]: 18: Hoare triple {50883#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1; {50883#true} is VALID [2022-02-20 22:07:25,783 INFO L290 TraceCheckUtils]: 19: Hoare triple {50883#true} assume -2147483648 <= main_#t~nondet184#1 && main_#t~nondet184#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet184#1;havoc main_#t~nondet184#1;main_#t~switch185#1 := 0 == main_~tmp___0~6#1; {50883#true} is VALID [2022-02-20 22:07:25,783 INFO L290 TraceCheckUtils]: 20: Hoare triple {50883#true} assume !main_#t~switch185#1;main_#t~switch185#1 := main_#t~switch185#1 || 1 == main_~tmp___0~6#1; {50883#true} is VALID [2022-02-20 22:07:25,783 INFO L290 TraceCheckUtils]: 21: Hoare triple {50883#true} assume main_#t~switch185#1; {50883#true} is VALID [2022-02-20 22:07:25,783 INFO L290 TraceCheckUtils]: 22: Hoare triple {50883#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet189#1 && main_#t~nondet189#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet189#1;havoc main_#t~nondet189#1;main_#t~switch190#1 := 0 == main_~tmp___2~1#1; {50883#true} is VALID [2022-02-20 22:07:25,783 INFO L290 TraceCheckUtils]: 23: Hoare triple {50883#true} assume !main_#t~switch190#1;main_#t~switch190#1 := main_#t~switch190#1 || 1 == main_~tmp___2~1#1; {50883#true} is VALID [2022-02-20 22:07:25,783 INFO L290 TraceCheckUtils]: 24: Hoare triple {50883#true} assume main_#t~switch190#1; {50883#true} is VALID [2022-02-20 22:07:25,783 INFO L290 TraceCheckUtils]: 25: Hoare triple {50883#true} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_usb_acecad_init } true;havoc usb_acecad_init_#res#1;havoc usb_acecad_init_#t~ret180#1, usb_acecad_init_#t~nondet181#1, usb_acecad_init_~result~0#1, usb_acecad_init_~tmp~15#1;havoc usb_acecad_init_~result~0#1;havoc usb_acecad_init_~tmp~15#1;assume { :begin_inline_usb_register } true;usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc usb_register_#res#1;havoc usb_register_#t~ret31#1, usb_register_~driver#1.base, usb_register_~driver#1.offset, usb_register_~tmp~1#1;usb_register_~driver#1.base, usb_register_~driver#1.offset := usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset;havoc usb_register_~tmp~1#1;assume { :begin_inline_ldv_usb_register_driver_2 } true;ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset := usb_register_~driver#1.base, usb_register_~driver#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 4, 0;havoc ldv_usb_register_driver_2_#res#1;havoc ldv_usb_register_driver_2_#t~ret193#1, ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset, ldv_usb_register_driver_2_~ldv_func_res~0#1, ldv_usb_register_driver_2_~tmp~19#1;ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_2_~ldv_func_res~0#1;havoc ldv_usb_register_driver_2_~tmp~19#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet213#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet213#1 && usb_register_driver_#t~nondet213#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet213#1;havoc usb_register_driver_#t~nondet213#1; {50883#true} is VALID [2022-02-20 22:07:25,784 INFO L290 TraceCheckUtils]: 26: Hoare triple {50883#true} ldv_usb_register_driver_2_#t~ret193#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_2_#t~ret193#1 && ldv_usb_register_driver_2_#t~ret193#1 <= 2147483647;ldv_usb_register_driver_2_~tmp~19#1 := ldv_usb_register_driver_2_#t~ret193#1;havoc ldv_usb_register_driver_2_#t~ret193#1;ldv_usb_register_driver_2_~ldv_func_res~0#1 := ldv_usb_register_driver_2_~tmp~19#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset, ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset;havoc ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {50883#true} is VALID [2022-02-20 22:07:25,784 INFO L272 TraceCheckUtils]: 27: Hoare triple {50883#true} call ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset := ldv_init_zalloc(1248); {50964#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:25,785 INFO L290 TraceCheckUtils]: 28: Hoare triple {50964#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {50883#true} is VALID [2022-02-20 22:07:25,786 INFO L272 TraceCheckUtils]: 29: Hoare triple {50883#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {50972#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:25,786 INFO L290 TraceCheckUtils]: 30: Hoare triple {50972#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {50883#true} is VALID [2022-02-20 22:07:25,786 INFO L290 TraceCheckUtils]: 31: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:25,786 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {50883#true} {50883#true} #538#return; {50883#true} is VALID [2022-02-20 22:07:25,786 INFO L290 TraceCheckUtils]: 33: Hoare triple {50883#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {50883#true} is VALID [2022-02-20 22:07:25,786 INFO L272 TraceCheckUtils]: 34: Hoare triple {50883#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {50883#true} is VALID [2022-02-20 22:07:25,786 INFO L290 TraceCheckUtils]: 35: Hoare triple {50883#true} ~cond := #in~cond; {50883#true} is VALID [2022-02-20 22:07:25,787 INFO L290 TraceCheckUtils]: 36: Hoare triple {50883#true} assume !(0 == ~cond); {50883#true} is VALID [2022-02-20 22:07:25,787 INFO L290 TraceCheckUtils]: 37: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:25,787 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {50883#true} {50883#true} #540#return; {50883#true} is VALID [2022-02-20 22:07:25,787 INFO L290 TraceCheckUtils]: 39: Hoare triple {50883#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {50883#true} is VALID [2022-02-20 22:07:25,787 INFO L290 TraceCheckUtils]: 40: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:25,787 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {50883#true} {50883#true} #600#return; {50883#true} is VALID [2022-02-20 22:07:25,787 INFO L290 TraceCheckUtils]: 42: Hoare triple {50883#true} ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset := ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset;havoc ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {50883#true} is VALID [2022-02-20 22:07:25,787 INFO L290 TraceCheckUtils]: 43: Hoare triple {50883#true} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_2_#res#1 := ldv_usb_register_driver_2_~ldv_func_res~0#1; {50883#true} is VALID [2022-02-20 22:07:25,788 INFO L290 TraceCheckUtils]: 44: Hoare triple {50883#true} usb_register_#t~ret31#1 := ldv_usb_register_driver_2_#res#1;assume { :end_inline_ldv_usb_register_driver_2 } true;assume -2147483648 <= usb_register_#t~ret31#1 && usb_register_#t~ret31#1 <= 2147483647;usb_register_~tmp~1#1 := usb_register_#t~ret31#1;havoc usb_register_#t~ret31#1;usb_register_#res#1 := usb_register_~tmp~1#1; {50883#true} is VALID [2022-02-20 22:07:25,788 INFO L290 TraceCheckUtils]: 45: Hoare triple {50883#true} usb_acecad_init_#t~ret180#1 := usb_register_#res#1;assume { :end_inline_usb_register } true;assume -2147483648 <= usb_acecad_init_#t~ret180#1 && usb_acecad_init_#t~ret180#1 <= 2147483647;usb_acecad_init_~tmp~15#1 := usb_acecad_init_#t~ret180#1;havoc usb_acecad_init_#t~ret180#1;usb_acecad_init_~result~0#1 := usb_acecad_init_~tmp~15#1; {50883#true} is VALID [2022-02-20 22:07:25,788 INFO L290 TraceCheckUtils]: 46: Hoare triple {50883#true} assume 0 == usb_acecad_init_~result~0#1;havoc usb_acecad_init_#t~nondet181#1; {50883#true} is VALID [2022-02-20 22:07:25,788 INFO L290 TraceCheckUtils]: 47: Hoare triple {50883#true} usb_acecad_init_#res#1 := usb_acecad_init_~result~0#1; {50883#true} is VALID [2022-02-20 22:07:25,788 INFO L290 TraceCheckUtils]: 48: Hoare triple {50883#true} main_#t~ret191#1 := usb_acecad_init_#res#1;assume { :end_inline_usb_acecad_init } true;assume -2147483648 <= main_#t~ret191#1 && main_#t~ret191#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret191#1;havoc main_#t~ret191#1; {50883#true} is VALID [2022-02-20 22:07:25,788 INFO L290 TraceCheckUtils]: 49: Hoare triple {50883#true} assume 0 == ~ldv_retval_1~0;~ldv_state_variable_0~0 := 3; {50883#true} is VALID [2022-02-20 22:07:25,788 INFO L290 TraceCheckUtils]: 50: Hoare triple {50883#true} assume !(0 != ~ldv_retval_1~0); {50883#true} is VALID [2022-02-20 22:07:25,789 INFO L290 TraceCheckUtils]: 51: Hoare triple {50883#true} assume -2147483648 <= main_#t~nondet184#1 && main_#t~nondet184#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet184#1;havoc main_#t~nondet184#1;main_#t~switch185#1 := 0 == main_~tmp___0~6#1; {50883#true} is VALID [2022-02-20 22:07:25,789 INFO L290 TraceCheckUtils]: 52: Hoare triple {50883#true} assume main_#t~switch185#1; {50883#true} is VALID [2022-02-20 22:07:25,789 INFO L290 TraceCheckUtils]: 53: Hoare triple {50883#true} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= main_#t~nondet186#1 && main_#t~nondet186#1 <= 2147483647;main_~tmp___1~3#1 := main_#t~nondet186#1;havoc main_#t~nondet186#1;main_#t~switch187#1 := 0 == main_~tmp___1~3#1; {50883#true} is VALID [2022-02-20 22:07:25,789 INFO L290 TraceCheckUtils]: 54: Hoare triple {50883#true} assume main_#t~switch187#1; {50883#true} is VALID [2022-02-20 22:07:25,789 INFO L290 TraceCheckUtils]: 55: Hoare triple {50883#true} assume 1 == ~ldv_state_variable_1~0;assume { :begin_inline_usb_acecad_probe } true;usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset, usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset := ~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc usb_acecad_probe_#res#1;havoc usb_acecad_probe_#t~ret127#1.base, usb_acecad_probe_#t~ret127#1.offset, usb_acecad_probe_#t~mem128#1.base, usb_acecad_probe_#t~mem128#1.offset, usb_acecad_probe_#t~mem129#1, usb_acecad_probe_#t~mem130#1.base, usb_acecad_probe_#t~mem130#1.offset, usb_acecad_probe_#t~ret131#1, usb_acecad_probe_#t~mem132#1, usb_acecad_probe_#t~ret133#1, usb_acecad_probe_#t~ret134#1, usb_acecad_probe_#t~ret135#1.base, usb_acecad_probe_#t~ret135#1.offset, usb_acecad_probe_#t~ret136#1.base, usb_acecad_probe_#t~ret136#1.offset, usb_acecad_probe_#t~ret137#1.base, usb_acecad_probe_#t~ret137#1.offset, usb_acecad_probe_#t~mem138#1.base, usb_acecad_probe_#t~mem138#1.offset, usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset, usb_acecad_probe_#t~mem140#1.base, usb_acecad_probe_#t~mem140#1.offset, usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset, usb_acecad_probe_#t~mem142#1.base, usb_acecad_probe_#t~mem142#1.offset, usb_acecad_probe_#t~ret143#1, usb_acecad_probe_#t~mem144#1.base, usb_acecad_probe_#t~mem144#1.offset, usb_acecad_probe_#t~mem145#1.base, usb_acecad_probe_#t~mem145#1.offset, usb_acecad_probe_#t~ret146#1, usb_acecad_probe_#t~mem147#1.base, usb_acecad_probe_#t~mem147#1.offset, usb_acecad_probe_#t~ret148#1, usb_acecad_probe_#t~ret149#1, usb_acecad_probe_#t~ret150#1, usb_acecad_probe_#t~mem151#1, usb_acecad_probe_#t~switch152#1, usb_acecad_probe_#t~nondet153#1, usb_acecad_probe_#t~nondet154#1, usb_acecad_probe_#t~mem155#1, usb_acecad_probe_#t~mem156#1, usb_acecad_probe_#t~nondet157#1, usb_acecad_probe_#t~nondet158#1, usb_acecad_probe_#t~mem159#1, usb_acecad_probe_#t~mem160#1, usb_acecad_probe_#t~mem161#1.base, usb_acecad_probe_#t~mem161#1.offset, usb_acecad_probe_#t~mem162#1.base, usb_acecad_probe_#t~mem162#1.offset, usb_acecad_probe_#t~ite163#1, usb_acecad_probe_#t~mem164#1, usb_acecad_probe_#t~mem165#1.base, usb_acecad_probe_#t~mem165#1.offset, usb_acecad_probe_#t~mem166#1, usb_acecad_probe_#t~mem167#1.base, usb_acecad_probe_#t~mem167#1.offset, usb_acecad_probe_#t~mem168#1.base, usb_acecad_probe_#t~mem168#1.offset, usb_acecad_probe_#t~mem169#1, usb_acecad_probe_#t~mem170#1.base, usb_acecad_probe_#t~mem170#1.offset, usb_acecad_probe_#t~ret171#1, usb_acecad_probe_#t~mem172#1.base, usb_acecad_probe_#t~mem172#1.offset, usb_acecad_probe_#t~mem173#1, usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset, usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset, usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset, usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset, usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset, usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset, usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset, usb_acecad_probe_~pipe~0#1, usb_acecad_probe_~maxp~0#1, usb_acecad_probe_~err~0#1, usb_acecad_probe_~tmp___0~5#1, usb_acecad_probe_~tmp___1~2#1, usb_acecad_probe_~tmp___2~0#1, usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset, usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~tmp___5~0#1, usb_acecad_probe_~tmp___6~0#1;usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset := usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset;usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset := usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset;havoc usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset;havoc usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;havoc usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset;havoc usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset;havoc usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset;havoc usb_acecad_probe_~pipe~0#1;havoc usb_acecad_probe_~maxp~0#1;havoc usb_acecad_probe_~err~0#1;havoc usb_acecad_probe_~tmp___0~5#1;havoc usb_acecad_probe_~tmp___1~2#1;havoc usb_acecad_probe_~tmp___2~0#1;havoc usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;havoc usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset;havoc usb_acecad_probe_~tmp___5~0#1;havoc usb_acecad_probe_~tmp___6~0#1;assume { :begin_inline_interface_to_usbdev } true;interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset := usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset;havoc interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;havoc interface_to_usbdev_#t~ret192#1.base, interface_to_usbdev_#t~ret192#1.offset, interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset, interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset := interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset;havoc interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;assume { :begin_inline_ldv_interface_to_usbdev } true;havoc ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;havoc ldv_interface_to_usbdev_#t~ret203#1.base, ldv_interface_to_usbdev_#t~ret203#1.offset, ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset, ldv_interface_to_usbdev_~tmp~26#1.base, ldv_interface_to_usbdev_~tmp~26#1.offset;havoc ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset;havoc ldv_interface_to_usbdev_~tmp~26#1.base, ldv_interface_to_usbdev_~tmp~26#1.offset; {50883#true} is VALID [2022-02-20 22:07:25,791 INFO L272 TraceCheckUtils]: 56: Hoare triple {50883#true} call ldv_interface_to_usbdev_#t~ret203#1.base, ldv_interface_to_usbdev_#t~ret203#1.offset := ldv_malloc(1822); {50980#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:25,792 INFO L290 TraceCheckUtils]: 57: Hoare triple {50980#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {50883#true} is VALID [2022-02-20 22:07:25,792 INFO L290 TraceCheckUtils]: 58: Hoare triple {50883#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {50981#(and (= |ldv_malloc_#res.base| 0) (= |ldv_malloc_#res.offset| 0))} is VALID [2022-02-20 22:07:25,793 INFO L290 TraceCheckUtils]: 59: Hoare triple {50981#(and (= |ldv_malloc_#res.base| 0) (= |ldv_malloc_#res.offset| 0))} assume true; {50981#(and (= |ldv_malloc_#res.base| 0) (= |ldv_malloc_#res.offset| 0))} is VALID [2022-02-20 22:07:25,794 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {50981#(and (= |ldv_malloc_#res.base| 0) (= |ldv_malloc_#res.offset| 0))} {50883#true} #546#return; {50917#(and (= |ULTIMATE.start_ldv_interface_to_usbdev_#t~ret203#1.offset| 0) (= |ULTIMATE.start_ldv_interface_to_usbdev_#t~ret203#1.base| 0))} is VALID [2022-02-20 22:07:25,794 INFO L290 TraceCheckUtils]: 61: Hoare triple {50917#(and (= |ULTIMATE.start_ldv_interface_to_usbdev_#t~ret203#1.offset| 0) (= |ULTIMATE.start_ldv_interface_to_usbdev_#t~ret203#1.base| 0))} ldv_interface_to_usbdev_~tmp~26#1.base, ldv_interface_to_usbdev_~tmp~26#1.offset := ldv_interface_to_usbdev_#t~ret203#1.base, ldv_interface_to_usbdev_#t~ret203#1.offset;havoc ldv_interface_to_usbdev_#t~ret203#1.base, ldv_interface_to_usbdev_#t~ret203#1.offset;ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset := ldv_interface_to_usbdev_~tmp~26#1.base, ldv_interface_to_usbdev_~tmp~26#1.offset; {50918#(and (= |ULTIMATE.start_ldv_interface_to_usbdev_~result~1#1.offset| 0) (= |ULTIMATE.start_ldv_interface_to_usbdev_~result~1#1.base| 0))} is VALID [2022-02-20 22:07:25,795 INFO L290 TraceCheckUtils]: 62: Hoare triple {50918#(and (= |ULTIMATE.start_ldv_interface_to_usbdev_~result~1#1.offset| 0) (= |ULTIMATE.start_ldv_interface_to_usbdev_~result~1#1.base| 0))} assume !(0 == (ldv_interface_to_usbdev_~result~1#1.base + ldv_interface_to_usbdev_~result~1#1.offset) % 18446744073709551616); {50884#false} is VALID [2022-02-20 22:07:25,795 INFO L290 TraceCheckUtils]: 63: Hoare triple {50884#false} ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset := ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset; {50884#false} is VALID [2022-02-20 22:07:25,795 INFO L290 TraceCheckUtils]: 64: Hoare triple {50884#false} interface_to_usbdev_#t~ret192#1.base, interface_to_usbdev_#t~ret192#1.offset := ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;assume { :end_inline_ldv_interface_to_usbdev } true;interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset := interface_to_usbdev_#t~ret192#1.base, interface_to_usbdev_#t~ret192#1.offset;havoc interface_to_usbdev_#t~ret192#1.base, interface_to_usbdev_#t~ret192#1.offset;interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset := interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset; {50884#false} is VALID [2022-02-20 22:07:25,795 INFO L290 TraceCheckUtils]: 65: Hoare triple {50884#false} usb_acecad_probe_#t~ret127#1.base, usb_acecad_probe_#t~ret127#1.offset := interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;assume { :end_inline_interface_to_usbdev } true;usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset := usb_acecad_probe_#t~ret127#1.base, usb_acecad_probe_#t~ret127#1.offset;havoc usb_acecad_probe_#t~ret127#1.base, usb_acecad_probe_#t~ret127#1.offset;usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset := usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;call usb_acecad_probe_#t~mem128#1.base, usb_acecad_probe_#t~mem128#1.offset := read~$Pointer$(usb_acecad_probe_~intf#1.base, 8 + usb_acecad_probe_~intf#1.offset, 8);usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset := usb_acecad_probe_#t~mem128#1.base, usb_acecad_probe_#t~mem128#1.offset;havoc usb_acecad_probe_#t~mem128#1.base, usb_acecad_probe_#t~mem128#1.offset;call usb_acecad_probe_#t~mem129#1 := read~int(usb_acecad_probe_~interface~0#1.base, 4 + usb_acecad_probe_~interface~0#1.offset, 1); {50884#false} is VALID [2022-02-20 22:07:25,795 INFO L290 TraceCheckUtils]: 66: Hoare triple {50884#false} assume !(1 != usb_acecad_probe_#t~mem129#1 % 256 % 4294967296);havoc usb_acecad_probe_#t~mem129#1;call usb_acecad_probe_#t~mem130#1.base, usb_acecad_probe_#t~mem130#1.offset := read~$Pointer$(usb_acecad_probe_~interface~0#1.base, 9 + usb_acecad_probe_~interface~0#1.offset, 8);usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset := usb_acecad_probe_#t~mem130#1.base, usb_acecad_probe_#t~mem130#1.offset;havoc usb_acecad_probe_#t~mem130#1.base, usb_acecad_probe_#t~mem130#1.offset;assume { :begin_inline_usb_endpoint_is_int_in } true;usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset := usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_endpoint_is_int_in_#res#1;havoc usb_endpoint_is_int_in_#t~ret3#1, usb_endpoint_is_int_in_#t~ret4#1, usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset, usb_endpoint_is_int_in_~tmp~0#1, usb_endpoint_is_int_in_~tmp___0~0#1, usb_endpoint_is_int_in_~tmp___1~0#1;usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset := usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset;havoc usb_endpoint_is_int_in_~tmp~0#1;havoc usb_endpoint_is_int_in_~tmp___0~0#1;havoc usb_endpoint_is_int_in_~tmp___1~0#1;assume { :begin_inline_usb_endpoint_xfer_int } true;usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset := usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset;havoc usb_endpoint_xfer_int_#res#1;havoc usb_endpoint_xfer_int_#t~mem2#1, usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset;usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset := usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset;call usb_endpoint_xfer_int_#t~mem2#1 := read~int(usb_endpoint_xfer_int_~epd#1.base, 3 + usb_endpoint_xfer_int_~epd#1.offset, 1);usb_endpoint_xfer_int_#res#1 := (if 3 == (if 0 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 0 else (if 1 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 1 else ~bitwiseAnd(usb_endpoint_xfer_int_#t~mem2#1 % 256, 3))) then 1 else 0);havoc usb_endpoint_xfer_int_#t~mem2#1; {50884#false} is VALID [2022-02-20 22:07:25,795 INFO L290 TraceCheckUtils]: 67: Hoare triple {50884#false} usb_endpoint_is_int_in_#t~ret3#1 := usb_endpoint_xfer_int_#res#1;assume { :end_inline_usb_endpoint_xfer_int } true;assume -2147483648 <= usb_endpoint_is_int_in_#t~ret3#1 && usb_endpoint_is_int_in_#t~ret3#1 <= 2147483647;usb_endpoint_is_int_in_~tmp~0#1 := usb_endpoint_is_int_in_#t~ret3#1;havoc usb_endpoint_is_int_in_#t~ret3#1; {50884#false} is VALID [2022-02-20 22:07:25,795 INFO L290 TraceCheckUtils]: 68: Hoare triple {50884#false} assume 0 != usb_endpoint_is_int_in_~tmp~0#1;assume { :begin_inline_usb_endpoint_dir_in } true;usb_endpoint_dir_in_#in~epd#1.base, usb_endpoint_dir_in_#in~epd#1.offset := usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset;havoc usb_endpoint_dir_in_#res#1;havoc usb_endpoint_dir_in_#t~mem1#1, usb_endpoint_dir_in_~epd#1.base, usb_endpoint_dir_in_~epd#1.offset;usb_endpoint_dir_in_~epd#1.base, usb_endpoint_dir_in_~epd#1.offset := usb_endpoint_dir_in_#in~epd#1.base, usb_endpoint_dir_in_#in~epd#1.offset;call usb_endpoint_dir_in_#t~mem1#1 := read~int(usb_endpoint_dir_in_~epd#1.base, 2 + usb_endpoint_dir_in_~epd#1.offset, 1);usb_endpoint_dir_in_#res#1 := (if (if usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 <= 127 then usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 else usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 - 256) < 0 then 1 else 0);havoc usb_endpoint_dir_in_#t~mem1#1; {50884#false} is VALID [2022-02-20 22:07:25,796 INFO L290 TraceCheckUtils]: 69: Hoare triple {50884#false} usb_endpoint_is_int_in_#t~ret4#1 := usb_endpoint_dir_in_#res#1;assume { :end_inline_usb_endpoint_dir_in } true;assume -2147483648 <= usb_endpoint_is_int_in_#t~ret4#1 && usb_endpoint_is_int_in_#t~ret4#1 <= 2147483647;usb_endpoint_is_int_in_~tmp___0~0#1 := usb_endpoint_is_int_in_#t~ret4#1;havoc usb_endpoint_is_int_in_#t~ret4#1; {50884#false} is VALID [2022-02-20 22:07:25,796 INFO L290 TraceCheckUtils]: 70: Hoare triple {50884#false} assume 0 != usb_endpoint_is_int_in_~tmp___0~0#1;usb_endpoint_is_int_in_~tmp___1~0#1 := 1; {50884#false} is VALID [2022-02-20 22:07:25,796 INFO L290 TraceCheckUtils]: 71: Hoare triple {50884#false} usb_endpoint_is_int_in_#res#1 := usb_endpoint_is_int_in_~tmp___1~0#1; {50884#false} is VALID [2022-02-20 22:07:25,796 INFO L290 TraceCheckUtils]: 72: Hoare triple {50884#false} usb_acecad_probe_#t~ret131#1 := usb_endpoint_is_int_in_#res#1;assume { :end_inline_usb_endpoint_is_int_in } true;assume -2147483648 <= usb_acecad_probe_#t~ret131#1 && usb_acecad_probe_#t~ret131#1 <= 2147483647;usb_acecad_probe_~tmp___0~5#1 := usb_acecad_probe_#t~ret131#1;havoc usb_acecad_probe_#t~ret131#1; {50884#false} is VALID [2022-02-20 22:07:25,796 INFO L290 TraceCheckUtils]: 73: Hoare triple {50884#false} assume !(0 == usb_acecad_probe_~tmp___0~5#1);call usb_acecad_probe_#t~mem132#1 := read~int(usb_acecad_probe_~endpoint~0#1.base, 2 + usb_acecad_probe_~endpoint~0#1.offset, 1);assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_#t~mem132#1 % 256;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem42#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem42#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := (if (1 == 256 * __create_pipe_#t~mem42#1 || 0 == 256 * __create_pipe_#t~mem42#1) && 0 == 32768 * __create_pipe_~endpoint#1 then 256 * __create_pipe_#t~mem42#1 else (if 0 == 256 * __create_pipe_#t~mem42#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1) then 32768 * __create_pipe_~endpoint#1 else (if (1 == 256 * __create_pipe_#t~mem42#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1)) || ((1 == 256 * __create_pipe_#t~mem42#1 || 0 == 256 * __create_pipe_#t~mem42#1) && 1 == 32768 * __create_pipe_~endpoint#1) then 1 else ~bitwiseOr(256 * __create_pipe_#t~mem42#1, 32768 * __create_pipe_~endpoint#1))));havoc __create_pipe_#t~mem42#1; {50884#false} is VALID [2022-02-20 22:07:25,796 INFO L290 TraceCheckUtils]: 74: Hoare triple {50884#false} usb_acecad_probe_#t~ret133#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;usb_acecad_probe_~tmp___1~2#1 := usb_acecad_probe_#t~ret133#1;havoc usb_acecad_probe_#t~mem132#1;havoc usb_acecad_probe_#t~ret133#1;usb_acecad_probe_~pipe~0#1 := (if ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 else ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 - 4294967296);assume { :begin_inline_usb_maxpacket } true;usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset, usb_maxpacket_#in~pipe#1, usb_maxpacket_#in~is_out#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~pipe~0#1, (if 0 == (if 0 == usb_acecad_probe_~pipe~0#1 then 0 else (if 1 == usb_acecad_probe_~pipe~0#1 then 0 else ~bitwiseAnd(usb_acecad_probe_~pipe~0#1, 128))) then 1 else 0);havoc usb_maxpacket_#res#1;havoc usb_maxpacket_#t~ret44#1, usb_maxpacket_#t~ret45#1, usb_maxpacket_#t~mem46#1.base, usb_maxpacket_#t~mem46#1.offset, usb_maxpacket_#t~ret47#1, usb_maxpacket_#t~ret48#1, usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset, usb_maxpacket_#t~mem50#1, usb_maxpacket_#t~nondet43#1, usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset, usb_maxpacket_~pipe#1, usb_maxpacket_~is_out#1, usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset, usb_maxpacket_~epnum~0#1, usb_maxpacket_~__ret_warn_on~0#1, usb_maxpacket_~tmp~2#1, usb_maxpacket_~__ret_warn_on___0~0#1, usb_maxpacket_~tmp___0~1#1;usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset := usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset;usb_maxpacket_~pipe#1 := usb_maxpacket_#in~pipe#1;usb_maxpacket_~is_out#1 := usb_maxpacket_#in~is_out#1;havoc usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset;havoc usb_maxpacket_~epnum~0#1;havoc usb_maxpacket_~__ret_warn_on~0#1;havoc usb_maxpacket_~tmp~2#1;havoc usb_maxpacket_~__ret_warn_on___0~0#1;havoc usb_maxpacket_~tmp___0~1#1; {50884#false} is VALID [2022-02-20 22:07:25,796 INFO L290 TraceCheckUtils]: 75: Hoare triple {50884#false} assume 0 == usb_maxpacket_~pipe#1 / 32768;usb_maxpacket_~epnum~0#1 := 0; {50884#false} is VALID [2022-02-20 22:07:25,797 INFO L290 TraceCheckUtils]: 76: Hoare triple {50884#false} assume !(0 != usb_maxpacket_~is_out#1);usb_maxpacket_~__ret_warn_on___0~0#1 := (if 0 == (if 0 == usb_maxpacket_~pipe#1 then 0 else (if 1 == usb_maxpacket_~pipe#1 then 0 else ~bitwiseAnd(usb_maxpacket_~pipe#1, 128))) then 1 else 0); {50884#false} is VALID [2022-02-20 22:07:25,797 INFO L272 TraceCheckUtils]: 77: Hoare triple {50884#false} call usb_maxpacket_#t~ret47#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {50883#true} is VALID [2022-02-20 22:07:25,797 INFO L290 TraceCheckUtils]: 78: Hoare triple {50883#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {50883#true} is VALID [2022-02-20 22:07:25,797 INFO L290 TraceCheckUtils]: 79: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:25,797 INFO L284 TraceCheckUtils]: 80: Hoare quadruple {50883#true} {50884#false} #556#return; {50884#false} is VALID [2022-02-20 22:07:25,797 INFO L290 TraceCheckUtils]: 81: Hoare triple {50884#false} assume -9223372036854775808 <= usb_maxpacket_#t~ret47#1 && usb_maxpacket_#t~ret47#1 <= 9223372036854775807;usb_maxpacket_~tmp___0~1#1 := usb_maxpacket_#t~ret47#1;havoc usb_maxpacket_#t~ret47#1; {50884#false} is VALID [2022-02-20 22:07:25,797 INFO L290 TraceCheckUtils]: 82: Hoare triple {50884#false} assume !(0 != usb_maxpacket_~tmp___0~1#1); {50884#false} is VALID [2022-02-20 22:07:25,798 INFO L272 TraceCheckUtils]: 83: Hoare triple {50884#false} call usb_maxpacket_#t~ret48#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {50883#true} is VALID [2022-02-20 22:07:25,798 INFO L290 TraceCheckUtils]: 84: Hoare triple {50883#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {50883#true} is VALID [2022-02-20 22:07:25,798 INFO L290 TraceCheckUtils]: 85: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:25,798 INFO L284 TraceCheckUtils]: 86: Hoare quadruple {50883#true} {50884#false} #560#return; {50884#false} is VALID [2022-02-20 22:07:25,798 INFO L290 TraceCheckUtils]: 87: Hoare triple {50884#false} assume -9223372036854775808 <= usb_maxpacket_#t~ret48#1 && usb_maxpacket_#t~ret48#1 <= 9223372036854775807;havoc usb_maxpacket_#t~ret48#1;call usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset := read~$Pointer$(usb_maxpacket_~udev#1.base, 1186 + usb_maxpacket_~udev#1.offset + 8 * (usb_maxpacket_~epnum~0#1 % 4294967296), 8);usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset := usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset;havoc usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset; {50884#false} is VALID [2022-02-20 22:07:25,798 INFO L290 TraceCheckUtils]: 88: Hoare triple {50884#false} assume 0 == (usb_maxpacket_~ep~0#1.base + usb_maxpacket_~ep~0#1.offset) % 18446744073709551616;usb_maxpacket_#res#1 := 0; {50884#false} is VALID [2022-02-20 22:07:25,798 INFO L290 TraceCheckUtils]: 89: Hoare triple {50884#false} usb_acecad_probe_#t~ret134#1 := usb_maxpacket_#res#1;assume { :end_inline_usb_maxpacket } true;usb_acecad_probe_~tmp___2~0#1 := usb_acecad_probe_#t~ret134#1;havoc usb_acecad_probe_#t~ret134#1;usb_acecad_probe_~maxp~0#1 := usb_acecad_probe_~tmp___2~0#1 % 65536; {50884#false} is VALID [2022-02-20 22:07:25,799 INFO L272 TraceCheckUtils]: 90: Hoare triple {50884#false} call usb_acecad_probe_#t~ret135#1.base, usb_acecad_probe_#t~ret135#1.offset := kzalloc(232, 208); {50980#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:25,799 INFO L290 TraceCheckUtils]: 91: Hoare triple {50980#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {50883#true} is VALID [2022-02-20 22:07:25,800 INFO L272 TraceCheckUtils]: 92: Hoare triple {50883#true} call __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset := ldv_malloc(__kmalloc_~size#1); {50980#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:25,800 INFO L290 TraceCheckUtils]: 93: Hoare triple {50980#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {50883#true} is VALID [2022-02-20 22:07:25,800 INFO L290 TraceCheckUtils]: 94: Hoare triple {50883#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {50883#true} is VALID [2022-02-20 22:07:25,800 INFO L290 TraceCheckUtils]: 95: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:25,800 INFO L284 TraceCheckUtils]: 96: Hoare quadruple {50883#true} {50883#true} #530#return; {50883#true} is VALID [2022-02-20 22:07:25,800 INFO L290 TraceCheckUtils]: 97: Hoare triple {50883#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset; {50883#true} is VALID [2022-02-20 22:07:25,800 INFO L290 TraceCheckUtils]: 98: Hoare triple {50883#true} kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {50883#true} is VALID [2022-02-20 22:07:25,801 INFO L290 TraceCheckUtils]: 99: Hoare triple {50883#true} #t~ret55#1.base, #t~ret55#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret55#1.base, #t~ret55#1.offset;havoc #t~ret55#1.base, #t~ret55#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {50883#true} is VALID [2022-02-20 22:07:25,801 INFO L290 TraceCheckUtils]: 100: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:25,801 INFO L284 TraceCheckUtils]: 101: Hoare quadruple {50883#true} {50884#false} #562#return; {50884#false} is VALID [2022-02-20 22:07:25,801 INFO L290 TraceCheckUtils]: 102: Hoare triple {50884#false} usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset := usb_acecad_probe_#t~ret135#1.base, usb_acecad_probe_#t~ret135#1.offset;havoc usb_acecad_probe_#t~ret135#1.base, usb_acecad_probe_#t~ret135#1.offset;usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset := usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;assume { :begin_inline_input_allocate_device } true;havoc input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;havoc input_allocate_device_#t~ret67#1.base, input_allocate_device_#t~ret67#1.offset; {50884#false} is VALID [2022-02-20 22:07:25,801 INFO L272 TraceCheckUtils]: 103: Hoare triple {50884#false} call input_allocate_device_#t~ret67#1.base, input_allocate_device_#t~ret67#1.offset := kzalloc(1855, ~bitwiseOr(~bitwiseOr(16, 64), 128)); {50980#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:25,801 INFO L290 TraceCheckUtils]: 104: Hoare triple {50980#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {50883#true} is VALID [2022-02-20 22:07:25,802 INFO L272 TraceCheckUtils]: 105: Hoare triple {50883#true} call __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset := ldv_malloc(__kmalloc_~size#1); {50980#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:25,802 INFO L290 TraceCheckUtils]: 106: Hoare triple {50980#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {50883#true} is VALID [2022-02-20 22:07:25,802 INFO L290 TraceCheckUtils]: 107: Hoare triple {50883#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {50883#true} is VALID [2022-02-20 22:07:25,803 INFO L290 TraceCheckUtils]: 108: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:25,803 INFO L284 TraceCheckUtils]: 109: Hoare quadruple {50883#true} {50883#true} #530#return; {50883#true} is VALID [2022-02-20 22:07:25,803 INFO L290 TraceCheckUtils]: 110: Hoare triple {50883#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset; {50883#true} is VALID [2022-02-20 22:07:25,803 INFO L290 TraceCheckUtils]: 111: Hoare triple {50883#true} kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {50883#true} is VALID [2022-02-20 22:07:25,803 INFO L290 TraceCheckUtils]: 112: Hoare triple {50883#true} #t~ret55#1.base, #t~ret55#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret55#1.base, #t~ret55#1.offset;havoc #t~ret55#1.base, #t~ret55#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {50883#true} is VALID [2022-02-20 22:07:25,803 INFO L290 TraceCheckUtils]: 113: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:25,803 INFO L284 TraceCheckUtils]: 114: Hoare quadruple {50883#true} {50884#false} #564#return; {50884#false} is VALID [2022-02-20 22:07:25,804 INFO L290 TraceCheckUtils]: 115: Hoare triple {50884#false} input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset := input_allocate_device_#t~ret67#1.base, input_allocate_device_#t~ret67#1.offset;havoc input_allocate_device_#t~ret67#1.base, input_allocate_device_#t~ret67#1.offset; {50884#false} is VALID [2022-02-20 22:07:25,804 INFO L290 TraceCheckUtils]: 116: Hoare triple {50884#false} usb_acecad_probe_#t~ret136#1.base, usb_acecad_probe_#t~ret136#1.offset := input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;assume { :end_inline_input_allocate_device } true;usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset := usb_acecad_probe_#t~ret136#1.base, usb_acecad_probe_#t~ret136#1.offset;havoc usb_acecad_probe_#t~ret136#1.base, usb_acecad_probe_#t~ret136#1.offset; {50884#false} is VALID [2022-02-20 22:07:25,804 INFO L290 TraceCheckUtils]: 117: Hoare triple {50884#false} assume !(0 == (usb_acecad_probe_~acecad~3#1.base + usb_acecad_probe_~acecad~3#1.offset) % 18446744073709551616 || 0 == (usb_acecad_probe_~input_dev~0#1.base + usb_acecad_probe_~input_dev~0#1.offset) % 18446744073709551616);assume { :begin_inline_usb_alloc_coherent } true;usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset, usb_alloc_coherent_#in~arg1#1, usb_alloc_coherent_#in~arg2#1, usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, 8, 208, usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset;havoc usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;havoc usb_alloc_coherent_#t~ret212#1.base, usb_alloc_coherent_#t~ret212#1.offset, usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset, usb_alloc_coherent_~arg1#1, usb_alloc_coherent_~arg2#1, usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset;usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset := usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset;usb_alloc_coherent_~arg1#1 := usb_alloc_coherent_#in~arg1#1;usb_alloc_coherent_~arg2#1 := usb_alloc_coherent_#in~arg2#1;usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset := usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset; {50884#false} is VALID [2022-02-20 22:07:25,804 INFO L272 TraceCheckUtils]: 118: Hoare triple {50884#false} call usb_alloc_coherent_#t~ret212#1.base, usb_alloc_coherent_#t~ret212#1.offset := ldv_malloc(0); {50980#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:25,804 INFO L290 TraceCheckUtils]: 119: Hoare triple {50980#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {50883#true} is VALID [2022-02-20 22:07:25,804 INFO L290 TraceCheckUtils]: 120: Hoare triple {50883#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {50883#true} is VALID [2022-02-20 22:07:25,804 INFO L290 TraceCheckUtils]: 121: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:25,805 INFO L284 TraceCheckUtils]: 122: Hoare quadruple {50883#true} {50884#false} #566#return; {50884#false} is VALID [2022-02-20 22:07:25,805 INFO L290 TraceCheckUtils]: 123: Hoare triple {50884#false} usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset := usb_alloc_coherent_#t~ret212#1.base, usb_alloc_coherent_#t~ret212#1.offset;havoc usb_alloc_coherent_#t~ret212#1.base, usb_alloc_coherent_#t~ret212#1.offset; {50884#false} is VALID [2022-02-20 22:07:25,805 INFO L290 TraceCheckUtils]: 124: Hoare triple {50884#false} usb_acecad_probe_#t~ret137#1.base, usb_acecad_probe_#t~ret137#1.offset := usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;assume { :end_inline_usb_alloc_coherent } true;usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset := usb_acecad_probe_#t~ret137#1.base, usb_acecad_probe_#t~ret137#1.offset;havoc usb_acecad_probe_#t~ret137#1.base, usb_acecad_probe_#t~ret137#1.offset;call write~$Pointer$(usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem138#1.base, usb_acecad_probe_#t~mem138#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8); {50884#false} is VALID [2022-02-20 22:07:25,805 INFO L290 TraceCheckUtils]: 125: Hoare triple {50884#false} assume !(0 == (usb_acecad_probe_#t~mem138#1.base + usb_acecad_probe_#t~mem138#1.offset) % 18446744073709551616);havoc usb_acecad_probe_#t~mem138#1.base, usb_acecad_probe_#t~mem138#1.offset;assume { :begin_inline_ldv_usb_alloc_urb_5 } true;ldv_usb_alloc_urb_5_#in~iso_packets#1, ldv_usb_alloc_urb_5_#in~mem_flags#1 := 0, 208;havoc ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret196#1.base, ldv_usb_alloc_urb_5_#t~ret196#1.offset, ldv_usb_alloc_urb_5_~iso_packets#1, ldv_usb_alloc_urb_5_~mem_flags#1, ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;ldv_usb_alloc_urb_5_~iso_packets#1 := ldv_usb_alloc_urb_5_#in~iso_packets#1;ldv_usb_alloc_urb_5_~mem_flags#1 := ldv_usb_alloc_urb_5_#in~mem_flags#1;havoc ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;assume { :begin_inline_ldv_alloc_urb } true;havoc ldv_alloc_urb_#res#1.base, ldv_alloc_urb_#res#1.offset;havoc ldv_alloc_urb_#t~ret198#1.base, ldv_alloc_urb_#t~ret198#1.offset, ldv_alloc_urb_#t~ret199#1, ldv_alloc_urb_~value~0#1.base, ldv_alloc_urb_~value~0#1.offset, ldv_alloc_urb_~tmp~24#1.base, ldv_alloc_urb_~tmp~24#1.offset, ldv_alloc_urb_~tmp___0~7#1;havoc ldv_alloc_urb_~value~0#1.base, ldv_alloc_urb_~value~0#1.offset;havoc ldv_alloc_urb_~tmp~24#1.base, ldv_alloc_urb_~tmp~24#1.offset;havoc ldv_alloc_urb_~tmp___0~7#1; {50884#false} is VALID [2022-02-20 22:07:25,805 INFO L272 TraceCheckUtils]: 126: Hoare triple {50884#false} call ldv_alloc_urb_#t~ret198#1.base, ldv_alloc_urb_#t~ret198#1.offset := ldv_malloc(180); {50980#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:25,805 INFO L290 TraceCheckUtils]: 127: Hoare triple {50980#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {50883#true} is VALID [2022-02-20 22:07:25,805 INFO L290 TraceCheckUtils]: 128: Hoare triple {50883#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {50883#true} is VALID [2022-02-20 22:07:25,805 INFO L290 TraceCheckUtils]: 129: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:25,806 INFO L284 TraceCheckUtils]: 130: Hoare quadruple {50883#true} {50884#false} #568#return; {50884#false} is VALID [2022-02-20 22:07:25,806 INFO L290 TraceCheckUtils]: 131: Hoare triple {50884#false} ldv_alloc_urb_~tmp~24#1.base, ldv_alloc_urb_~tmp~24#1.offset := ldv_alloc_urb_#t~ret198#1.base, ldv_alloc_urb_#t~ret198#1.offset;havoc ldv_alloc_urb_#t~ret198#1.base, ldv_alloc_urb_#t~ret198#1.offset;ldv_alloc_urb_~value~0#1.base, ldv_alloc_urb_~value~0#1.offset := ldv_alloc_urb_~tmp~24#1.base, ldv_alloc_urb_~tmp~24#1.offset; {50884#false} is VALID [2022-02-20 22:07:25,806 INFO L272 TraceCheckUtils]: 132: Hoare triple {50884#false} call ldv_alloc_urb_#t~ret199#1 := ldv_undef_int(); {50883#true} is VALID [2022-02-20 22:07:25,806 INFO L290 TraceCheckUtils]: 133: Hoare triple {50883#true} havoc ~tmp~8;assume -2147483648 <= #t~nondet65 && #t~nondet65 <= 2147483647;~tmp~8 := #t~nondet65;havoc #t~nondet65;#res := ~tmp~8; {50883#true} is VALID [2022-02-20 22:07:25,806 INFO L290 TraceCheckUtils]: 134: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:25,806 INFO L284 TraceCheckUtils]: 135: Hoare quadruple {50883#true} {50884#false} #570#return; {50884#false} is VALID [2022-02-20 22:07:25,806 INFO L290 TraceCheckUtils]: 136: Hoare triple {50884#false} assume -2147483648 <= ldv_alloc_urb_#t~ret199#1 && ldv_alloc_urb_#t~ret199#1 <= 2147483647;ldv_alloc_urb_~tmp___0~7#1 := ldv_alloc_urb_#t~ret199#1;havoc ldv_alloc_urb_#t~ret199#1; {50884#false} is VALID [2022-02-20 22:07:25,807 INFO L290 TraceCheckUtils]: 137: Hoare triple {50884#false} assume 0 != ldv_alloc_urb_~tmp___0~7#1; {50884#false} is VALID [2022-02-20 22:07:25,807 INFO L290 TraceCheckUtils]: 138: Hoare triple {50884#false} assume 0 != (ldv_alloc_urb_~value~0#1.base + ldv_alloc_urb_~value~0#1.offset) % 18446744073709551616;~usb_urb~0.base, ~usb_urb~0.offset := ldv_alloc_urb_~value~0#1.base, ldv_alloc_urb_~value~0#1.offset; {50884#false} is VALID [2022-02-20 22:07:25,807 INFO L290 TraceCheckUtils]: 139: Hoare triple {50884#false} ldv_alloc_urb_#res#1.base, ldv_alloc_urb_#res#1.offset := ~usb_urb~0.base, ~usb_urb~0.offset; {50884#false} is VALID [2022-02-20 22:07:25,807 INFO L290 TraceCheckUtils]: 140: Hoare triple {50884#false} ldv_usb_alloc_urb_5_#t~ret196#1.base, ldv_usb_alloc_urb_5_#t~ret196#1.offset := ldv_alloc_urb_#res#1.base, ldv_alloc_urb_#res#1.offset;assume { :end_inline_ldv_alloc_urb } true;ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset := ldv_usb_alloc_urb_5_#t~ret196#1.base, ldv_usb_alloc_urb_5_#t~ret196#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret196#1.base, ldv_usb_alloc_urb_5_#t~ret196#1.offset;ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset := ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset; {50884#false} is VALID [2022-02-20 22:07:25,807 INFO L290 TraceCheckUtils]: 141: Hoare triple {50884#false} usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset := ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;assume { :end_inline_ldv_usb_alloc_urb_5 } true;call write~$Pointer$(usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset, usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8);havoc usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset;call usb_acecad_probe_#t~mem140#1.base, usb_acecad_probe_#t~mem140#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8); {50884#false} is VALID [2022-02-20 22:07:25,807 INFO L290 TraceCheckUtils]: 142: Hoare triple {50884#false} assume 0 == (usb_acecad_probe_#t~mem140#1.base + usb_acecad_probe_#t~mem140#1.offset) % 18446744073709551616;havoc usb_acecad_probe_#t~mem140#1.base, usb_acecad_probe_#t~mem140#1.offset;usb_acecad_probe_~err~0#1 := -12; {50884#false} is VALID [2022-02-20 22:07:25,807 INFO L290 TraceCheckUtils]: 143: Hoare triple {50884#false} call usb_acecad_probe_#t~mem172#1.base, usb_acecad_probe_#t~mem172#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem173#1 := read~int(usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset, 8); {50884#false} is VALID [2022-02-20 22:07:25,808 INFO L272 TraceCheckUtils]: 144: Hoare triple {50884#false} call usb_free_coherent(usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, 8, usb_acecad_probe_#t~mem172#1.base, usb_acecad_probe_#t~mem172#1.offset, usb_acecad_probe_#t~mem173#1); {50883#true} is VALID [2022-02-20 22:07:25,808 INFO L290 TraceCheckUtils]: 145: Hoare triple {50883#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1 := #in~arg1;~arg2.base, ~arg2.offset := #in~arg2.base, #in~arg2.offset;~arg3 := #in~arg3; {50883#true} is VALID [2022-02-20 22:07:25,808 INFO L290 TraceCheckUtils]: 146: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:25,808 INFO L284 TraceCheckUtils]: 147: Hoare quadruple {50883#true} {50884#false} #592#return; {50884#false} is VALID [2022-02-20 22:07:25,808 INFO L290 TraceCheckUtils]: 148: Hoare triple {50884#false} havoc usb_acecad_probe_#t~mem172#1.base, usb_acecad_probe_#t~mem172#1.offset;havoc usb_acecad_probe_#t~mem173#1; {50884#false} is VALID [2022-02-20 22:07:25,808 INFO L290 TraceCheckUtils]: 149: Hoare triple {50884#false} assume { :begin_inline_input_free_device } true;input_free_device_#in~arg0#1.base, input_free_device_#in~arg0#1.offset := usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset;havoc input_free_device_~arg0#1.base, input_free_device_~arg0#1.offset;input_free_device_~arg0#1.base, input_free_device_~arg0#1.offset := input_free_device_#in~arg0#1.base, input_free_device_#in~arg0#1.offset; {50884#false} is VALID [2022-02-20 22:07:25,808 INFO L290 TraceCheckUtils]: 150: Hoare triple {50884#false} assume { :end_inline_input_free_device } true; {50884#false} is VALID [2022-02-20 22:07:25,809 INFO L272 TraceCheckUtils]: 151: Hoare triple {50884#false} call kfree(usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset); {50990#(= |old(#valid)| |#valid|)} is VALID [2022-02-20 22:07:25,809 INFO L290 TraceCheckUtils]: 152: Hoare triple {50990#(= |old(#valid)| |#valid|)} ~p.base, ~p.offset := #in~p.base, #in~p.offset;call ULTIMATE.dealloc(~p.base, ~p.offset); {50883#true} is VALID [2022-02-20 22:07:25,809 INFO L290 TraceCheckUtils]: 153: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:25,809 INFO L284 TraceCheckUtils]: 154: Hoare quadruple {50883#true} {50884#false} #594#return; {50884#false} is VALID [2022-02-20 22:07:25,809 INFO L290 TraceCheckUtils]: 155: Hoare triple {50884#false} usb_acecad_probe_#res#1 := usb_acecad_probe_~err~0#1; {50884#false} is VALID [2022-02-20 22:07:25,809 INFO L290 TraceCheckUtils]: 156: Hoare triple {50884#false} main_#t~ret188#1 := usb_acecad_probe_#res#1;assume { :end_inline_usb_acecad_probe } true;assume -2147483648 <= main_#t~ret188#1 && main_#t~ret188#1 <= 2147483647;~ldv_retval_0~0 := main_#t~ret188#1;havoc main_#t~ret188#1; {50884#false} is VALID [2022-02-20 22:07:25,809 INFO L290 TraceCheckUtils]: 157: Hoare triple {50884#false} assume !(0 == ~ldv_retval_0~0); {50884#false} is VALID [2022-02-20 22:07:25,809 INFO L290 TraceCheckUtils]: 158: Hoare triple {50884#false} assume -2147483648 <= main_#t~nondet184#1 && main_#t~nondet184#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet184#1;havoc main_#t~nondet184#1;main_#t~switch185#1 := 0 == main_~tmp___0~6#1; {50884#false} is VALID [2022-02-20 22:07:25,810 INFO L290 TraceCheckUtils]: 159: Hoare triple {50884#false} assume !main_#t~switch185#1;main_#t~switch185#1 := main_#t~switch185#1 || 1 == main_~tmp___0~6#1; {50884#false} is VALID [2022-02-20 22:07:25,810 INFO L290 TraceCheckUtils]: 160: Hoare triple {50884#false} assume main_#t~switch185#1; {50884#false} is VALID [2022-02-20 22:07:25,810 INFO L290 TraceCheckUtils]: 161: Hoare triple {50884#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet189#1 && main_#t~nondet189#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet189#1;havoc main_#t~nondet189#1;main_#t~switch190#1 := 0 == main_~tmp___2~1#1; {50884#false} is VALID [2022-02-20 22:07:25,810 INFO L290 TraceCheckUtils]: 162: Hoare triple {50884#false} assume main_#t~switch190#1; {50884#false} is VALID [2022-02-20 22:07:25,810 INFO L290 TraceCheckUtils]: 163: Hoare triple {50884#false} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0;assume { :begin_inline_usb_acecad_exit } true;assume { :begin_inline_ldv_usb_deregister_11 } true;ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset := ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset;assume { :begin_inline_usb_deregister } true;usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset := ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;havoc usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset;usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset := usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset; {50884#false} is VALID [2022-02-20 22:07:25,810 INFO L290 TraceCheckUtils]: 164: Hoare triple {50884#false} assume { :end_inline_usb_deregister } true;~ldv_state_variable_1~0 := 0; {50884#false} is VALID [2022-02-20 22:07:25,810 INFO L290 TraceCheckUtils]: 165: Hoare triple {50884#false} assume { :end_inline_ldv_usb_deregister_11 } true; {50884#false} is VALID [2022-02-20 22:07:25,811 INFO L290 TraceCheckUtils]: 166: Hoare triple {50884#false} assume { :end_inline_usb_acecad_exit } true;~ldv_state_variable_0~0 := 2; {50884#false} is VALID [2022-02-20 22:07:25,811 INFO L290 TraceCheckUtils]: 167: Hoare triple {50884#false} assume { :begin_inline_ldv_check_final_state } true; {50884#false} is VALID [2022-02-20 22:07:25,811 INFO L290 TraceCheckUtils]: 168: Hoare triple {50884#false} assume 0 != (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616; {50884#false} is VALID [2022-02-20 22:07:25,811 INFO L272 TraceCheckUtils]: 169: Hoare triple {50884#false} call ldv_error(); {50884#false} is VALID [2022-02-20 22:07:25,811 INFO L290 TraceCheckUtils]: 170: Hoare triple {50884#false} assume !false; {50884#false} is VALID [2022-02-20 22:07:25,812 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 7 proven. 8 refuted. 0 times theorem prover too weak. 58 trivial. 0 not checked. [2022-02-20 22:07:25,812 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:07:25,812 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1780817414] [2022-02-20 22:07:25,812 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1780817414] provided 0 perfect and 1 imperfect interpolant sequences [2022-02-20 22:07:25,812 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [187176261] [2022-02-20 22:07:25,812 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:07:25,813 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-20 22:07:25,813 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-20 22:07:25,814 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-02-20 22:07:25,816 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-02-20 22:07:26,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:26,157 INFO L263 TraceCheckSpWp]: Trace formula consists of 1325 conjuncts, 17 conjunts are in the unsatisfiable core [2022-02-20 22:07:26,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:26,231 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-02-20 22:07:26,665 INFO L290 TraceCheckUtils]: 0: Hoare triple {50883#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(99, 2);call #Ultimate.allocInit(10, 3);call #Ultimate.allocInit(7, 4);call write~init~int(97, 4, 0, 1);call write~init~int(99, 4, 1, 1);call write~init~int(101, 4, 2, 1);call write~init~int(99, 4, 3, 1);call write~init~int(97, 4, 4, 1);call write~init~int(100, 4, 5, 1);call write~init~int(0, 4, 6, 1);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(20, 6);call #Ultimate.allocInit(57, 7);call #Ultimate.allocInit(2, 8);call write~init~int(32, 8, 0, 1);call write~init~int(0, 8, 1, 1);call #Ultimate.allocInit(8, 9);call #Ultimate.allocInit(34, 10);call #Ultimate.allocInit(32, 11);call #Ultimate.allocInit(11, 12);call #Ultimate.allocInit(48, 13);~LDV_IN_INTERRUPT~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset := 14, 0;call #Ultimate.allocInit(72, 14);call write~init~int(3, ~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 2 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(4, ~#usb_acecad_id_table~0.base, 4 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 6 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 8 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 10 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 11 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 12 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 13 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 14 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 15 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 16 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(3, ~#usb_acecad_id_table~0.base, 24 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 26 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(8, ~#usb_acecad_id_table~0.base, 28 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 30 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 32 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 34 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 35 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 36 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 37 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 38 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 39 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(1, ~#usb_acecad_id_table~0.base, 40 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(0, ~#usb_acecad_id_table~0.base, 48 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 50 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 52 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 54 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 56 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 58 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 59 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 60 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 61 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 62 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 63 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 64 + ~#usb_acecad_id_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.driver_info := 0;~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset := 15, 0;call #Ultimate.allocInit(264, 15);call write~init~$Pointer$(12, 0, ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_probe.base, #funAddr~usb_acecad_probe.offset, ~#usb_acecad_driver~0.base, 8 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_disconnect.base, #funAddr~usb_acecad_disconnect.offset, ~#usb_acecad_driver~0.base, 16 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 24 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 32 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 40 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 48 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 56 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 64 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, ~#usb_acecad_driver~0.base, 72 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 80 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 84 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 88 + ~#usb_acecad_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 92 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 100 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 108 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 116 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 124 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 132 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 136 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 144 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 152 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 160 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 168 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 176 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 184 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 192 + ~#usb_acecad_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 193 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 201 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 209 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 217 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 225 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 233 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 241 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 249 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 257 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 261 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 262 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 263 + ~#usb_acecad_driver~0.offset, 1);~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {50883#true} is VALID [2022-02-20 22:07:26,666 INFO L290 TraceCheckUtils]: 1: Hoare triple {50883#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret183#1.base, main_#t~ret183#1.offset, main_#t~nondet184#1, main_#t~switch185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~ret188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~ret191#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~17#1.base, main_~tmp~17#1.offset, main_~tmp___0~6#1, main_~tmp___1~3#1, main_~tmp___2~1#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~17#1.base, main_~tmp~17#1.offset;havoc main_~tmp___0~6#1;havoc main_~tmp___1~3#1;havoc main_~tmp___2~1#1; {50883#true} is VALID [2022-02-20 22:07:26,666 INFO L272 TraceCheckUtils]: 2: Hoare triple {50883#true} call main_#t~ret183#1.base, main_#t~ret183#1.offset := ldv_init_zalloc(24); {50883#true} is VALID [2022-02-20 22:07:26,666 INFO L290 TraceCheckUtils]: 3: Hoare triple {50883#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {50883#true} is VALID [2022-02-20 22:07:26,666 INFO L272 TraceCheckUtils]: 4: Hoare triple {50883#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {50883#true} is VALID [2022-02-20 22:07:26,666 INFO L290 TraceCheckUtils]: 5: Hoare triple {50883#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {50883#true} is VALID [2022-02-20 22:07:26,666 INFO L290 TraceCheckUtils]: 6: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:26,666 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {50883#true} {50883#true} #538#return; {50883#true} is VALID [2022-02-20 22:07:26,666 INFO L290 TraceCheckUtils]: 8: Hoare triple {50883#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {50883#true} is VALID [2022-02-20 22:07:26,666 INFO L272 TraceCheckUtils]: 9: Hoare triple {50883#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {50883#true} is VALID [2022-02-20 22:07:26,666 INFO L290 TraceCheckUtils]: 10: Hoare triple {50883#true} ~cond := #in~cond; {50883#true} is VALID [2022-02-20 22:07:26,666 INFO L290 TraceCheckUtils]: 11: Hoare triple {50883#true} assume !(0 == ~cond); {50883#true} is VALID [2022-02-20 22:07:26,666 INFO L290 TraceCheckUtils]: 12: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:26,667 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {50883#true} {50883#true} #540#return; {50883#true} is VALID [2022-02-20 22:07:26,667 INFO L290 TraceCheckUtils]: 14: Hoare triple {50883#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {50883#true} is VALID [2022-02-20 22:07:26,667 INFO L290 TraceCheckUtils]: 15: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:26,667 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {50883#true} {50883#true} #544#return; {50883#true} is VALID [2022-02-20 22:07:26,667 INFO L290 TraceCheckUtils]: 17: Hoare triple {50883#true} main_~tmp~17#1.base, main_~tmp~17#1.offset := main_#t~ret183#1.base, main_#t~ret183#1.offset;havoc main_#t~ret183#1.base, main_#t~ret183#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~17#1.base, main_~tmp~17#1.offset;assume { :begin_inline_ldv_initialize } true; {50883#true} is VALID [2022-02-20 22:07:26,667 INFO L290 TraceCheckUtils]: 18: Hoare triple {50883#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1; {50883#true} is VALID [2022-02-20 22:07:26,667 INFO L290 TraceCheckUtils]: 19: Hoare triple {50883#true} assume -2147483648 <= main_#t~nondet184#1 && main_#t~nondet184#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet184#1;havoc main_#t~nondet184#1;main_#t~switch185#1 := 0 == main_~tmp___0~6#1; {50883#true} is VALID [2022-02-20 22:07:26,667 INFO L290 TraceCheckUtils]: 20: Hoare triple {50883#true} assume !main_#t~switch185#1;main_#t~switch185#1 := main_#t~switch185#1 || 1 == main_~tmp___0~6#1; {50883#true} is VALID [2022-02-20 22:07:26,667 INFO L290 TraceCheckUtils]: 21: Hoare triple {50883#true} assume main_#t~switch185#1; {50883#true} is VALID [2022-02-20 22:07:26,667 INFO L290 TraceCheckUtils]: 22: Hoare triple {50883#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet189#1 && main_#t~nondet189#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet189#1;havoc main_#t~nondet189#1;main_#t~switch190#1 := 0 == main_~tmp___2~1#1; {50883#true} is VALID [2022-02-20 22:07:26,667 INFO L290 TraceCheckUtils]: 23: Hoare triple {50883#true} assume !main_#t~switch190#1;main_#t~switch190#1 := main_#t~switch190#1 || 1 == main_~tmp___2~1#1; {50883#true} is VALID [2022-02-20 22:07:26,667 INFO L290 TraceCheckUtils]: 24: Hoare triple {50883#true} assume main_#t~switch190#1; {50883#true} is VALID [2022-02-20 22:07:26,667 INFO L290 TraceCheckUtils]: 25: Hoare triple {50883#true} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_usb_acecad_init } true;havoc usb_acecad_init_#res#1;havoc usb_acecad_init_#t~ret180#1, usb_acecad_init_#t~nondet181#1, usb_acecad_init_~result~0#1, usb_acecad_init_~tmp~15#1;havoc usb_acecad_init_~result~0#1;havoc usb_acecad_init_~tmp~15#1;assume { :begin_inline_usb_register } true;usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc usb_register_#res#1;havoc usb_register_#t~ret31#1, usb_register_~driver#1.base, usb_register_~driver#1.offset, usb_register_~tmp~1#1;usb_register_~driver#1.base, usb_register_~driver#1.offset := usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset;havoc usb_register_~tmp~1#1;assume { :begin_inline_ldv_usb_register_driver_2 } true;ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset := usb_register_~driver#1.base, usb_register_~driver#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 4, 0;havoc ldv_usb_register_driver_2_#res#1;havoc ldv_usb_register_driver_2_#t~ret193#1, ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset, ldv_usb_register_driver_2_~ldv_func_res~0#1, ldv_usb_register_driver_2_~tmp~19#1;ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_2_~ldv_func_res~0#1;havoc ldv_usb_register_driver_2_~tmp~19#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet213#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet213#1 && usb_register_driver_#t~nondet213#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet213#1;havoc usb_register_driver_#t~nondet213#1; {50883#true} is VALID [2022-02-20 22:07:26,667 INFO L290 TraceCheckUtils]: 26: Hoare triple {50883#true} ldv_usb_register_driver_2_#t~ret193#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_2_#t~ret193#1 && ldv_usb_register_driver_2_#t~ret193#1 <= 2147483647;ldv_usb_register_driver_2_~tmp~19#1 := ldv_usb_register_driver_2_#t~ret193#1;havoc ldv_usb_register_driver_2_#t~ret193#1;ldv_usb_register_driver_2_~ldv_func_res~0#1 := ldv_usb_register_driver_2_~tmp~19#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset, ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset;havoc ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {50883#true} is VALID [2022-02-20 22:07:26,667 INFO L272 TraceCheckUtils]: 27: Hoare triple {50883#true} call ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset := ldv_init_zalloc(1248); {50883#true} is VALID [2022-02-20 22:07:26,668 INFO L290 TraceCheckUtils]: 28: Hoare triple {50883#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {50883#true} is VALID [2022-02-20 22:07:26,668 INFO L272 TraceCheckUtils]: 29: Hoare triple {50883#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {50883#true} is VALID [2022-02-20 22:07:26,668 INFO L290 TraceCheckUtils]: 30: Hoare triple {50883#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {50883#true} is VALID [2022-02-20 22:07:26,668 INFO L290 TraceCheckUtils]: 31: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:26,668 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {50883#true} {50883#true} #538#return; {50883#true} is VALID [2022-02-20 22:07:26,668 INFO L290 TraceCheckUtils]: 33: Hoare triple {50883#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {50883#true} is VALID [2022-02-20 22:07:26,668 INFO L272 TraceCheckUtils]: 34: Hoare triple {50883#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {50883#true} is VALID [2022-02-20 22:07:26,668 INFO L290 TraceCheckUtils]: 35: Hoare triple {50883#true} ~cond := #in~cond; {50883#true} is VALID [2022-02-20 22:07:26,669 INFO L290 TraceCheckUtils]: 36: Hoare triple {50883#true} assume !(0 == ~cond); {50883#true} is VALID [2022-02-20 22:07:26,669 INFO L290 TraceCheckUtils]: 37: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:26,669 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {50883#true} {50883#true} #540#return; {50883#true} is VALID [2022-02-20 22:07:26,669 INFO L290 TraceCheckUtils]: 39: Hoare triple {50883#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {50883#true} is VALID [2022-02-20 22:07:26,669 INFO L290 TraceCheckUtils]: 40: Hoare triple {50883#true} assume true; {50883#true} is VALID [2022-02-20 22:07:26,669 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {50883#true} {50883#true} #600#return; {50883#true} is VALID [2022-02-20 22:07:26,670 INFO L290 TraceCheckUtils]: 42: Hoare triple {50883#true} ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset := ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset;havoc ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {50883#true} is VALID [2022-02-20 22:07:26,670 INFO L290 TraceCheckUtils]: 43: Hoare triple {50883#true} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_2_#res#1 := ldv_usb_register_driver_2_~ldv_func_res~0#1; {50883#true} is VALID [2022-02-20 22:07:26,670 INFO L290 TraceCheckUtils]: 44: Hoare triple {50883#true} usb_register_#t~ret31#1 := ldv_usb_register_driver_2_#res#1;assume { :end_inline_ldv_usb_register_driver_2 } true;assume -2147483648 <= usb_register_#t~ret31#1 && usb_register_#t~ret31#1 <= 2147483647;usb_register_~tmp~1#1 := usb_register_#t~ret31#1;havoc usb_register_#t~ret31#1;usb_register_#res#1 := usb_register_~tmp~1#1; {50883#true} is VALID [2022-02-20 22:07:26,670 INFO L290 TraceCheckUtils]: 45: Hoare triple {50883#true} usb_acecad_init_#t~ret180#1 := usb_register_#res#1;assume { :end_inline_usb_register } true;assume -2147483648 <= usb_acecad_init_#t~ret180#1 && usb_acecad_init_#t~ret180#1 <= 2147483647;usb_acecad_init_~tmp~15#1 := usb_acecad_init_#t~ret180#1;havoc usb_acecad_init_#t~ret180#1;usb_acecad_init_~result~0#1 := usb_acecad_init_~tmp~15#1; {50883#true} is VALID [2022-02-20 22:07:26,670 INFO L290 TraceCheckUtils]: 46: Hoare triple {50883#true} assume 0 == usb_acecad_init_~result~0#1;havoc usb_acecad_init_#t~nondet181#1; {50883#true} is VALID [2022-02-20 22:07:26,670 INFO L290 TraceCheckUtils]: 47: Hoare triple {50883#true} usb_acecad_init_#res#1 := usb_acecad_init_~result~0#1; {50883#true} is VALID [2022-02-20 22:07:26,670 INFO L290 TraceCheckUtils]: 48: Hoare triple {50883#true} main_#t~ret191#1 := usb_acecad_init_#res#1;assume { :end_inline_usb_acecad_init } true;assume -2147483648 <= main_#t~ret191#1 && main_#t~ret191#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret191#1;havoc main_#t~ret191#1; {50883#true} is VALID [2022-02-20 22:07:26,671 INFO L290 TraceCheckUtils]: 49: Hoare triple {50883#true} assume 0 == ~ldv_retval_1~0;~ldv_state_variable_0~0 := 3; {50883#true} is VALID [2022-02-20 22:07:26,671 INFO L290 TraceCheckUtils]: 50: Hoare triple {50883#true} assume !(0 != ~ldv_retval_1~0); {50883#true} is VALID [2022-02-20 22:07:26,671 INFO L290 TraceCheckUtils]: 51: Hoare triple {50883#true} assume -2147483648 <= main_#t~nondet184#1 && main_#t~nondet184#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet184#1;havoc main_#t~nondet184#1;main_#t~switch185#1 := 0 == main_~tmp___0~6#1; {50883#true} is VALID [2022-02-20 22:07:26,671 INFO L290 TraceCheckUtils]: 52: Hoare triple {50883#true} assume main_#t~switch185#1; {50883#true} is VALID [2022-02-20 22:07:26,671 INFO L290 TraceCheckUtils]: 53: Hoare triple {50883#true} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= main_#t~nondet186#1 && main_#t~nondet186#1 <= 2147483647;main_~tmp___1~3#1 := main_#t~nondet186#1;havoc main_#t~nondet186#1;main_#t~switch187#1 := 0 == main_~tmp___1~3#1; {50883#true} is VALID [2022-02-20 22:07:26,671 INFO L290 TraceCheckUtils]: 54: Hoare triple {50883#true} assume main_#t~switch187#1; {50883#true} is VALID [2022-02-20 22:07:26,671 INFO L290 TraceCheckUtils]: 55: Hoare triple {50883#true} assume 1 == ~ldv_state_variable_1~0;assume { :begin_inline_usb_acecad_probe } true;usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset, usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset := ~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc usb_acecad_probe_#res#1;havoc usb_acecad_probe_#t~ret127#1.base, usb_acecad_probe_#t~ret127#1.offset, usb_acecad_probe_#t~mem128#1.base, usb_acecad_probe_#t~mem128#1.offset, usb_acecad_probe_#t~mem129#1, usb_acecad_probe_#t~mem130#1.base, usb_acecad_probe_#t~mem130#1.offset, usb_acecad_probe_#t~ret131#1, usb_acecad_probe_#t~mem132#1, usb_acecad_probe_#t~ret133#1, usb_acecad_probe_#t~ret134#1, usb_acecad_probe_#t~ret135#1.base, usb_acecad_probe_#t~ret135#1.offset, usb_acecad_probe_#t~ret136#1.base, usb_acecad_probe_#t~ret136#1.offset, usb_acecad_probe_#t~ret137#1.base, usb_acecad_probe_#t~ret137#1.offset, usb_acecad_probe_#t~mem138#1.base, usb_acecad_probe_#t~mem138#1.offset, usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset, usb_acecad_probe_#t~mem140#1.base, usb_acecad_probe_#t~mem140#1.offset, usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset, usb_acecad_probe_#t~mem142#1.base, usb_acecad_probe_#t~mem142#1.offset, usb_acecad_probe_#t~ret143#1, usb_acecad_probe_#t~mem144#1.base, usb_acecad_probe_#t~mem144#1.offset, usb_acecad_probe_#t~mem145#1.base, usb_acecad_probe_#t~mem145#1.offset, usb_acecad_probe_#t~ret146#1, usb_acecad_probe_#t~mem147#1.base, usb_acecad_probe_#t~mem147#1.offset, usb_acecad_probe_#t~ret148#1, usb_acecad_probe_#t~ret149#1, usb_acecad_probe_#t~ret150#1, usb_acecad_probe_#t~mem151#1, usb_acecad_probe_#t~switch152#1, usb_acecad_probe_#t~nondet153#1, usb_acecad_probe_#t~nondet154#1, usb_acecad_probe_#t~mem155#1, usb_acecad_probe_#t~mem156#1, usb_acecad_probe_#t~nondet157#1, usb_acecad_probe_#t~nondet158#1, usb_acecad_probe_#t~mem159#1, usb_acecad_probe_#t~mem160#1, usb_acecad_probe_#t~mem161#1.base, usb_acecad_probe_#t~mem161#1.offset, usb_acecad_probe_#t~mem162#1.base, usb_acecad_probe_#t~mem162#1.offset, usb_acecad_probe_#t~ite163#1, usb_acecad_probe_#t~mem164#1, usb_acecad_probe_#t~mem165#1.base, usb_acecad_probe_#t~mem165#1.offset, usb_acecad_probe_#t~mem166#1, usb_acecad_probe_#t~mem167#1.base, usb_acecad_probe_#t~mem167#1.offset, usb_acecad_probe_#t~mem168#1.base, usb_acecad_probe_#t~mem168#1.offset, usb_acecad_probe_#t~mem169#1, usb_acecad_probe_#t~mem170#1.base, usb_acecad_probe_#t~mem170#1.offset, usb_acecad_probe_#t~ret171#1, usb_acecad_probe_#t~mem172#1.base, usb_acecad_probe_#t~mem172#1.offset, usb_acecad_probe_#t~mem173#1, usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset, usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset, usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset, usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset, usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset, usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset, usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset, usb_acecad_probe_~pipe~0#1, usb_acecad_probe_~maxp~0#1, usb_acecad_probe_~err~0#1, usb_acecad_probe_~tmp___0~5#1, usb_acecad_probe_~tmp___1~2#1, usb_acecad_probe_~tmp___2~0#1, usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset, usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~tmp___5~0#1, usb_acecad_probe_~tmp___6~0#1;usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset := usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset;usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset := usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset;havoc usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset;havoc usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;havoc usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset;havoc usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset;havoc usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset;havoc usb_acecad_probe_~pipe~0#1;havoc usb_acecad_probe_~maxp~0#1;havoc usb_acecad_probe_~err~0#1;havoc usb_acecad_probe_~tmp___0~5#1;havoc usb_acecad_probe_~tmp___1~2#1;havoc usb_acecad_probe_~tmp___2~0#1;havoc usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;havoc usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset;havoc usb_acecad_probe_~tmp___5~0#1;havoc usb_acecad_probe_~tmp___6~0#1;assume { :begin_inline_interface_to_usbdev } true;interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset := usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset;havoc interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;havoc interface_to_usbdev_#t~ret192#1.base, interface_to_usbdev_#t~ret192#1.offset, interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset, interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset := interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset;havoc interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;assume { :begin_inline_ldv_interface_to_usbdev } true;havoc ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;havoc ldv_interface_to_usbdev_#t~ret203#1.base, ldv_interface_to_usbdev_#t~ret203#1.offset, ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset, ldv_interface_to_usbdev_~tmp~26#1.base, ldv_interface_to_usbdev_~tmp~26#1.offset;havoc ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset;havoc ldv_interface_to_usbdev_~tmp~26#1.base, ldv_interface_to_usbdev_~tmp~26#1.offset; {50883#true} is VALID [2022-02-20 22:07:26,672 INFO L272 TraceCheckUtils]: 56: Hoare triple {50883#true} call ldv_interface_to_usbdev_#t~ret203#1.base, ldv_interface_to_usbdev_#t~ret203#1.offset := ldv_malloc(1822); {50883#true} is VALID [2022-02-20 22:07:26,672 INFO L290 TraceCheckUtils]: 57: Hoare triple {50883#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {50883#true} is VALID [2022-02-20 22:07:26,675 INFO L290 TraceCheckUtils]: 58: Hoare triple {50883#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {50981#(and (= |ldv_malloc_#res.base| 0) (= |ldv_malloc_#res.offset| 0))} is VALID [2022-02-20 22:07:26,676 INFO L290 TraceCheckUtils]: 59: Hoare triple {50981#(and (= |ldv_malloc_#res.base| 0) (= |ldv_malloc_#res.offset| 0))} assume true; {50981#(and (= |ldv_malloc_#res.base| 0) (= |ldv_malloc_#res.offset| 0))} is VALID [2022-02-20 22:07:26,677 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {50981#(and (= |ldv_malloc_#res.base| 0) (= |ldv_malloc_#res.offset| 0))} {50883#true} #546#return; {50917#(and (= |ULTIMATE.start_ldv_interface_to_usbdev_#t~ret203#1.offset| 0) (= |ULTIMATE.start_ldv_interface_to_usbdev_#t~ret203#1.base| 0))} is VALID [2022-02-20 22:07:26,678 INFO L290 TraceCheckUtils]: 61: Hoare triple {50917#(and (= |ULTIMATE.start_ldv_interface_to_usbdev_#t~ret203#1.offset| 0) (= |ULTIMATE.start_ldv_interface_to_usbdev_#t~ret203#1.base| 0))} ldv_interface_to_usbdev_~tmp~26#1.base, ldv_interface_to_usbdev_~tmp~26#1.offset := ldv_interface_to_usbdev_#t~ret203#1.base, ldv_interface_to_usbdev_#t~ret203#1.offset;havoc ldv_interface_to_usbdev_#t~ret203#1.base, ldv_interface_to_usbdev_#t~ret203#1.offset;ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset := ldv_interface_to_usbdev_~tmp~26#1.base, ldv_interface_to_usbdev_~tmp~26#1.offset; {50918#(and (= |ULTIMATE.start_ldv_interface_to_usbdev_~result~1#1.offset| 0) (= |ULTIMATE.start_ldv_interface_to_usbdev_~result~1#1.base| 0))} is VALID [2022-02-20 22:07:26,678 INFO L290 TraceCheckUtils]: 62: Hoare triple {50918#(and (= |ULTIMATE.start_ldv_interface_to_usbdev_~result~1#1.offset| 0) (= |ULTIMATE.start_ldv_interface_to_usbdev_~result~1#1.base| 0))} assume !(0 == (ldv_interface_to_usbdev_~result~1#1.base + ldv_interface_to_usbdev_~result~1#1.offset) % 18446744073709551616); {50884#false} is VALID [2022-02-20 22:07:26,678 INFO L290 TraceCheckUtils]: 63: Hoare triple {50884#false} ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset := ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset; {50884#false} is VALID [2022-02-20 22:07:26,678 INFO L290 TraceCheckUtils]: 64: Hoare triple {50884#false} interface_to_usbdev_#t~ret192#1.base, interface_to_usbdev_#t~ret192#1.offset := ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;assume { :end_inline_ldv_interface_to_usbdev } true;interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset := interface_to_usbdev_#t~ret192#1.base, interface_to_usbdev_#t~ret192#1.offset;havoc interface_to_usbdev_#t~ret192#1.base, interface_to_usbdev_#t~ret192#1.offset;interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset := interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset; {50884#false} is VALID [2022-02-20 22:07:26,678 INFO L290 TraceCheckUtils]: 65: Hoare triple {50884#false} usb_acecad_probe_#t~ret127#1.base, usb_acecad_probe_#t~ret127#1.offset := interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;assume { :end_inline_interface_to_usbdev } true;usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset := usb_acecad_probe_#t~ret127#1.base, usb_acecad_probe_#t~ret127#1.offset;havoc usb_acecad_probe_#t~ret127#1.base, usb_acecad_probe_#t~ret127#1.offset;usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset := usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;call usb_acecad_probe_#t~mem128#1.base, usb_acecad_probe_#t~mem128#1.offset := read~$Pointer$(usb_acecad_probe_~intf#1.base, 8 + usb_acecad_probe_~intf#1.offset, 8);usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset := usb_acecad_probe_#t~mem128#1.base, usb_acecad_probe_#t~mem128#1.offset;havoc usb_acecad_probe_#t~mem128#1.base, usb_acecad_probe_#t~mem128#1.offset;call usb_acecad_probe_#t~mem129#1 := read~int(usb_acecad_probe_~interface~0#1.base, 4 + usb_acecad_probe_~interface~0#1.offset, 1); {50884#false} is VALID [2022-02-20 22:07:26,679 INFO L290 TraceCheckUtils]: 66: Hoare triple {50884#false} assume !(1 != usb_acecad_probe_#t~mem129#1 % 256 % 4294967296);havoc usb_acecad_probe_#t~mem129#1;call usb_acecad_probe_#t~mem130#1.base, usb_acecad_probe_#t~mem130#1.offset := read~$Pointer$(usb_acecad_probe_~interface~0#1.base, 9 + usb_acecad_probe_~interface~0#1.offset, 8);usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset := usb_acecad_probe_#t~mem130#1.base, usb_acecad_probe_#t~mem130#1.offset;havoc usb_acecad_probe_#t~mem130#1.base, usb_acecad_probe_#t~mem130#1.offset;assume { :begin_inline_usb_endpoint_is_int_in } true;usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset := usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_endpoint_is_int_in_#res#1;havoc usb_endpoint_is_int_in_#t~ret3#1, usb_endpoint_is_int_in_#t~ret4#1, usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset, usb_endpoint_is_int_in_~tmp~0#1, usb_endpoint_is_int_in_~tmp___0~0#1, usb_endpoint_is_int_in_~tmp___1~0#1;usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset := usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset;havoc usb_endpoint_is_int_in_~tmp~0#1;havoc usb_endpoint_is_int_in_~tmp___0~0#1;havoc usb_endpoint_is_int_in_~tmp___1~0#1;assume { :begin_inline_usb_endpoint_xfer_int } true;usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset := usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset;havoc usb_endpoint_xfer_int_#res#1;havoc usb_endpoint_xfer_int_#t~mem2#1, usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset;usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset := usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset;call usb_endpoint_xfer_int_#t~mem2#1 := read~int(usb_endpoint_xfer_int_~epd#1.base, 3 + usb_endpoint_xfer_int_~epd#1.offset, 1);usb_endpoint_xfer_int_#res#1 := (if 3 == (if 0 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 0 else (if 1 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 1 else ~bitwiseAnd(usb_endpoint_xfer_int_#t~mem2#1 % 256, 3))) then 1 else 0);havoc usb_endpoint_xfer_int_#t~mem2#1; {50884#false} is VALID [2022-02-20 22:07:26,679 INFO L290 TraceCheckUtils]: 67: Hoare triple {50884#false} usb_endpoint_is_int_in_#t~ret3#1 := usb_endpoint_xfer_int_#res#1;assume { :end_inline_usb_endpoint_xfer_int } true;assume -2147483648 <= usb_endpoint_is_int_in_#t~ret3#1 && usb_endpoint_is_int_in_#t~ret3#1 <= 2147483647;usb_endpoint_is_int_in_~tmp~0#1 := usb_endpoint_is_int_in_#t~ret3#1;havoc usb_endpoint_is_int_in_#t~ret3#1; {50884#false} is VALID [2022-02-20 22:07:26,679 INFO L290 TraceCheckUtils]: 68: Hoare triple {50884#false} assume 0 != usb_endpoint_is_int_in_~tmp~0#1;assume { :begin_inline_usb_endpoint_dir_in } true;usb_endpoint_dir_in_#in~epd#1.base, usb_endpoint_dir_in_#in~epd#1.offset := usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset;havoc usb_endpoint_dir_in_#res#1;havoc usb_endpoint_dir_in_#t~mem1#1, usb_endpoint_dir_in_~epd#1.base, usb_endpoint_dir_in_~epd#1.offset;usb_endpoint_dir_in_~epd#1.base, usb_endpoint_dir_in_~epd#1.offset := usb_endpoint_dir_in_#in~epd#1.base, usb_endpoint_dir_in_#in~epd#1.offset;call usb_endpoint_dir_in_#t~mem1#1 := read~int(usb_endpoint_dir_in_~epd#1.base, 2 + usb_endpoint_dir_in_~epd#1.offset, 1);usb_endpoint_dir_in_#res#1 := (if (if usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 <= 127 then usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 else usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 - 256) < 0 then 1 else 0);havoc usb_endpoint_dir_in_#t~mem1#1; {50884#false} is VALID [2022-02-20 22:07:26,679 INFO L290 TraceCheckUtils]: 69: Hoare triple {50884#false} usb_endpoint_is_int_in_#t~ret4#1 := usb_endpoint_dir_in_#res#1;assume { :end_inline_usb_endpoint_dir_in } true;assume -2147483648 <= usb_endpoint_is_int_in_#t~ret4#1 && usb_endpoint_is_int_in_#t~ret4#1 <= 2147483647;usb_endpoint_is_int_in_~tmp___0~0#1 := usb_endpoint_is_int_in_#t~ret4#1;havoc usb_endpoint_is_int_in_#t~ret4#1; {50884#false} is VALID [2022-02-20 22:07:26,679 INFO L290 TraceCheckUtils]: 70: Hoare triple {50884#false} assume 0 != usb_endpoint_is_int_in_~tmp___0~0#1;usb_endpoint_is_int_in_~tmp___1~0#1 := 1; {50884#false} is VALID [2022-02-20 22:07:26,679 INFO L290 TraceCheckUtils]: 71: Hoare triple {50884#false} usb_endpoint_is_int_in_#res#1 := usb_endpoint_is_int_in_~tmp___1~0#1; {50884#false} is VALID [2022-02-20 22:07:26,680 INFO L290 TraceCheckUtils]: 72: Hoare triple {50884#false} usb_acecad_probe_#t~ret131#1 := usb_endpoint_is_int_in_#res#1;assume { :end_inline_usb_endpoint_is_int_in } true;assume -2147483648 <= usb_acecad_probe_#t~ret131#1 && usb_acecad_probe_#t~ret131#1 <= 2147483647;usb_acecad_probe_~tmp___0~5#1 := usb_acecad_probe_#t~ret131#1;havoc usb_acecad_probe_#t~ret131#1; {50884#false} is VALID [2022-02-20 22:07:26,680 INFO L290 TraceCheckUtils]: 73: Hoare triple {50884#false} assume !(0 == usb_acecad_probe_~tmp___0~5#1);call usb_acecad_probe_#t~mem132#1 := read~int(usb_acecad_probe_~endpoint~0#1.base, 2 + usb_acecad_probe_~endpoint~0#1.offset, 1);assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_#t~mem132#1 % 256;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem42#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem42#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := (if (1 == 256 * __create_pipe_#t~mem42#1 || 0 == 256 * __create_pipe_#t~mem42#1) && 0 == 32768 * __create_pipe_~endpoint#1 then 256 * __create_pipe_#t~mem42#1 else (if 0 == 256 * __create_pipe_#t~mem42#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1) then 32768 * __create_pipe_~endpoint#1 else (if (1 == 256 * __create_pipe_#t~mem42#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1)) || ((1 == 256 * __create_pipe_#t~mem42#1 || 0 == 256 * __create_pipe_#t~mem42#1) && 1 == 32768 * __create_pipe_~endpoint#1) then 1 else ~bitwiseOr(256 * __create_pipe_#t~mem42#1, 32768 * __create_pipe_~endpoint#1))));havoc __create_pipe_#t~mem42#1; {50884#false} is VALID [2022-02-20 22:07:26,680 INFO L290 TraceCheckUtils]: 74: Hoare triple {50884#false} usb_acecad_probe_#t~ret133#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;usb_acecad_probe_~tmp___1~2#1 := usb_acecad_probe_#t~ret133#1;havoc usb_acecad_probe_#t~mem132#1;havoc usb_acecad_probe_#t~ret133#1;usb_acecad_probe_~pipe~0#1 := (if ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 else ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 - 4294967296);assume { :begin_inline_usb_maxpacket } true;usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset, usb_maxpacket_#in~pipe#1, usb_maxpacket_#in~is_out#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~pipe~0#1, (if 0 == (if 0 == usb_acecad_probe_~pipe~0#1 then 0 else (if 1 == usb_acecad_probe_~pipe~0#1 then 0 else ~bitwiseAnd(usb_acecad_probe_~pipe~0#1, 128))) then 1 else 0);havoc usb_maxpacket_#res#1;havoc usb_maxpacket_#t~ret44#1, usb_maxpacket_#t~ret45#1, usb_maxpacket_#t~mem46#1.base, usb_maxpacket_#t~mem46#1.offset, usb_maxpacket_#t~ret47#1, usb_maxpacket_#t~ret48#1, usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset, usb_maxpacket_#t~mem50#1, usb_maxpacket_#t~nondet43#1, usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset, usb_maxpacket_~pipe#1, usb_maxpacket_~is_out#1, usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset, usb_maxpacket_~epnum~0#1, usb_maxpacket_~__ret_warn_on~0#1, usb_maxpacket_~tmp~2#1, usb_maxpacket_~__ret_warn_on___0~0#1, usb_maxpacket_~tmp___0~1#1;usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset := usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset;usb_maxpacket_~pipe#1 := usb_maxpacket_#in~pipe#1;usb_maxpacket_~is_out#1 := usb_maxpacket_#in~is_out#1;havoc usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset;havoc usb_maxpacket_~epnum~0#1;havoc usb_maxpacket_~__ret_warn_on~0#1;havoc usb_maxpacket_~tmp~2#1;havoc usb_maxpacket_~__ret_warn_on___0~0#1;havoc usb_maxpacket_~tmp___0~1#1; {50884#false} is VALID [2022-02-20 22:07:26,680 INFO L290 TraceCheckUtils]: 75: Hoare triple {50884#false} assume 0 == usb_maxpacket_~pipe#1 / 32768;usb_maxpacket_~epnum~0#1 := 0; {50884#false} is VALID [2022-02-20 22:07:26,680 INFO L290 TraceCheckUtils]: 76: Hoare triple {50884#false} assume !(0 != usb_maxpacket_~is_out#1);usb_maxpacket_~__ret_warn_on___0~0#1 := (if 0 == (if 0 == usb_maxpacket_~pipe#1 then 0 else (if 1 == usb_maxpacket_~pipe#1 then 0 else ~bitwiseAnd(usb_maxpacket_~pipe#1, 128))) then 1 else 0); {50884#false} is VALID [2022-02-20 22:07:26,680 INFO L272 TraceCheckUtils]: 77: Hoare triple {50884#false} call usb_maxpacket_#t~ret47#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {50884#false} is VALID [2022-02-20 22:07:26,680 INFO L290 TraceCheckUtils]: 78: Hoare triple {50884#false} ~exp := #in~exp;~c := #in~c;#res := ~exp; {50884#false} is VALID [2022-02-20 22:07:26,681 INFO L290 TraceCheckUtils]: 79: Hoare triple {50884#false} assume true; {50884#false} is VALID [2022-02-20 22:07:26,681 INFO L284 TraceCheckUtils]: 80: Hoare quadruple {50884#false} {50884#false} #556#return; {50884#false} is VALID [2022-02-20 22:07:26,681 INFO L290 TraceCheckUtils]: 81: Hoare triple {50884#false} assume -9223372036854775808 <= usb_maxpacket_#t~ret47#1 && usb_maxpacket_#t~ret47#1 <= 9223372036854775807;usb_maxpacket_~tmp___0~1#1 := usb_maxpacket_#t~ret47#1;havoc usb_maxpacket_#t~ret47#1; {50884#false} is VALID [2022-02-20 22:07:26,681 INFO L290 TraceCheckUtils]: 82: Hoare triple {50884#false} assume !(0 != usb_maxpacket_~tmp___0~1#1); {50884#false} is VALID [2022-02-20 22:07:26,681 INFO L272 TraceCheckUtils]: 83: Hoare triple {50884#false} call usb_maxpacket_#t~ret48#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {50884#false} is VALID [2022-02-20 22:07:26,681 INFO L290 TraceCheckUtils]: 84: Hoare triple {50884#false} ~exp := #in~exp;~c := #in~c;#res := ~exp; {50884#false} is VALID [2022-02-20 22:07:26,681 INFO L290 TraceCheckUtils]: 85: Hoare triple {50884#false} assume true; {50884#false} is VALID [2022-02-20 22:07:26,682 INFO L284 TraceCheckUtils]: 86: Hoare quadruple {50884#false} {50884#false} #560#return; {50884#false} is VALID [2022-02-20 22:07:26,682 INFO L290 TraceCheckUtils]: 87: Hoare triple {50884#false} assume -9223372036854775808 <= usb_maxpacket_#t~ret48#1 && usb_maxpacket_#t~ret48#1 <= 9223372036854775807;havoc usb_maxpacket_#t~ret48#1;call usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset := read~$Pointer$(usb_maxpacket_~udev#1.base, 1186 + usb_maxpacket_~udev#1.offset + 8 * (usb_maxpacket_~epnum~0#1 % 4294967296), 8);usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset := usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset;havoc usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset; {50884#false} is VALID [2022-02-20 22:07:26,682 INFO L290 TraceCheckUtils]: 88: Hoare triple {50884#false} assume 0 == (usb_maxpacket_~ep~0#1.base + usb_maxpacket_~ep~0#1.offset) % 18446744073709551616;usb_maxpacket_#res#1 := 0; {50884#false} is VALID [2022-02-20 22:07:26,682 INFO L290 TraceCheckUtils]: 89: Hoare triple {50884#false} usb_acecad_probe_#t~ret134#1 := usb_maxpacket_#res#1;assume { :end_inline_usb_maxpacket } true;usb_acecad_probe_~tmp___2~0#1 := usb_acecad_probe_#t~ret134#1;havoc usb_acecad_probe_#t~ret134#1;usb_acecad_probe_~maxp~0#1 := usb_acecad_probe_~tmp___2~0#1 % 65536; {50884#false} is VALID [2022-02-20 22:07:26,682 INFO L272 TraceCheckUtils]: 90: Hoare triple {50884#false} call usb_acecad_probe_#t~ret135#1.base, usb_acecad_probe_#t~ret135#1.offset := kzalloc(232, 208); {50884#false} is VALID [2022-02-20 22:07:26,682 INFO L290 TraceCheckUtils]: 91: Hoare triple {50884#false} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {50884#false} is VALID [2022-02-20 22:07:26,682 INFO L272 TraceCheckUtils]: 92: Hoare triple {50884#false} call __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset := ldv_malloc(__kmalloc_~size#1); {50884#false} is VALID [2022-02-20 22:07:26,683 INFO L290 TraceCheckUtils]: 93: Hoare triple {50884#false} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {50884#false} is VALID [2022-02-20 22:07:26,683 INFO L290 TraceCheckUtils]: 94: Hoare triple {50884#false} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {50884#false} is VALID [2022-02-20 22:07:26,683 INFO L290 TraceCheckUtils]: 95: Hoare triple {50884#false} assume true; {50884#false} is VALID [2022-02-20 22:07:26,683 INFO L284 TraceCheckUtils]: 96: Hoare quadruple {50884#false} {50884#false} #530#return; {50884#false} is VALID [2022-02-20 22:07:26,683 INFO L290 TraceCheckUtils]: 97: Hoare triple {50884#false} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset; {50884#false} is VALID [2022-02-20 22:07:26,683 INFO L290 TraceCheckUtils]: 98: Hoare triple {50884#false} kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {50884#false} is VALID [2022-02-20 22:07:26,683 INFO L290 TraceCheckUtils]: 99: Hoare triple {50884#false} #t~ret55#1.base, #t~ret55#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret55#1.base, #t~ret55#1.offset;havoc #t~ret55#1.base, #t~ret55#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {50884#false} is VALID [2022-02-20 22:07:26,684 INFO L290 TraceCheckUtils]: 100: Hoare triple {50884#false} assume true; {50884#false} is VALID [2022-02-20 22:07:26,684 INFO L284 TraceCheckUtils]: 101: Hoare quadruple {50884#false} {50884#false} #562#return; {50884#false} is VALID [2022-02-20 22:07:26,684 INFO L290 TraceCheckUtils]: 102: Hoare triple {50884#false} usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset := usb_acecad_probe_#t~ret135#1.base, usb_acecad_probe_#t~ret135#1.offset;havoc usb_acecad_probe_#t~ret135#1.base, usb_acecad_probe_#t~ret135#1.offset;usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset := usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;assume { :begin_inline_input_allocate_device } true;havoc input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;havoc input_allocate_device_#t~ret67#1.base, input_allocate_device_#t~ret67#1.offset; {50884#false} is VALID [2022-02-20 22:07:26,684 INFO L272 TraceCheckUtils]: 103: Hoare triple {50884#false} call input_allocate_device_#t~ret67#1.base, input_allocate_device_#t~ret67#1.offset := kzalloc(1855, ~bitwiseOr(~bitwiseOr(16, 64), 128)); {50884#false} is VALID [2022-02-20 22:07:26,684 INFO L290 TraceCheckUtils]: 104: Hoare triple {50884#false} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {50884#false} is VALID [2022-02-20 22:07:26,684 INFO L272 TraceCheckUtils]: 105: Hoare triple {50884#false} call __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset := ldv_malloc(__kmalloc_~size#1); {50884#false} is VALID [2022-02-20 22:07:26,685 INFO L290 TraceCheckUtils]: 106: Hoare triple {50884#false} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {50884#false} is VALID [2022-02-20 22:07:26,685 INFO L290 TraceCheckUtils]: 107: Hoare triple {50884#false} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {50884#false} is VALID [2022-02-20 22:07:26,685 INFO L290 TraceCheckUtils]: 108: Hoare triple {50884#false} assume true; {50884#false} is VALID [2022-02-20 22:07:26,685 INFO L284 TraceCheckUtils]: 109: Hoare quadruple {50884#false} {50884#false} #530#return; {50884#false} is VALID [2022-02-20 22:07:26,685 INFO L290 TraceCheckUtils]: 110: Hoare triple {50884#false} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset; {50884#false} is VALID [2022-02-20 22:07:26,685 INFO L290 TraceCheckUtils]: 111: Hoare triple {50884#false} kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {50884#false} is VALID [2022-02-20 22:07:26,685 INFO L290 TraceCheckUtils]: 112: Hoare triple {50884#false} #t~ret55#1.base, #t~ret55#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret55#1.base, #t~ret55#1.offset;havoc #t~ret55#1.base, #t~ret55#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {50884#false} is VALID [2022-02-20 22:07:26,686 INFO L290 TraceCheckUtils]: 113: Hoare triple {50884#false} assume true; {50884#false} is VALID [2022-02-20 22:07:26,686 INFO L284 TraceCheckUtils]: 114: Hoare quadruple {50884#false} {50884#false} #564#return; {50884#false} is VALID [2022-02-20 22:07:26,686 INFO L290 TraceCheckUtils]: 115: Hoare triple {50884#false} input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset := input_allocate_device_#t~ret67#1.base, input_allocate_device_#t~ret67#1.offset;havoc input_allocate_device_#t~ret67#1.base, input_allocate_device_#t~ret67#1.offset; {50884#false} is VALID [2022-02-20 22:07:26,686 INFO L290 TraceCheckUtils]: 116: Hoare triple {50884#false} usb_acecad_probe_#t~ret136#1.base, usb_acecad_probe_#t~ret136#1.offset := input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;assume { :end_inline_input_allocate_device } true;usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset := usb_acecad_probe_#t~ret136#1.base, usb_acecad_probe_#t~ret136#1.offset;havoc usb_acecad_probe_#t~ret136#1.base, usb_acecad_probe_#t~ret136#1.offset; {50884#false} is VALID [2022-02-20 22:07:26,686 INFO L290 TraceCheckUtils]: 117: Hoare triple {50884#false} assume !(0 == (usb_acecad_probe_~acecad~3#1.base + usb_acecad_probe_~acecad~3#1.offset) % 18446744073709551616 || 0 == (usb_acecad_probe_~input_dev~0#1.base + usb_acecad_probe_~input_dev~0#1.offset) % 18446744073709551616);assume { :begin_inline_usb_alloc_coherent } true;usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset, usb_alloc_coherent_#in~arg1#1, usb_alloc_coherent_#in~arg2#1, usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, 8, 208, usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset;havoc usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;havoc usb_alloc_coherent_#t~ret212#1.base, usb_alloc_coherent_#t~ret212#1.offset, usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset, usb_alloc_coherent_~arg1#1, usb_alloc_coherent_~arg2#1, usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset;usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset := usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset;usb_alloc_coherent_~arg1#1 := usb_alloc_coherent_#in~arg1#1;usb_alloc_coherent_~arg2#1 := usb_alloc_coherent_#in~arg2#1;usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset := usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset; {50884#false} is VALID [2022-02-20 22:07:26,686 INFO L272 TraceCheckUtils]: 118: Hoare triple {50884#false} call usb_alloc_coherent_#t~ret212#1.base, usb_alloc_coherent_#t~ret212#1.offset := ldv_malloc(0); {50884#false} is VALID [2022-02-20 22:07:26,686 INFO L290 TraceCheckUtils]: 119: Hoare triple {50884#false} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {50884#false} is VALID [2022-02-20 22:07:26,687 INFO L290 TraceCheckUtils]: 120: Hoare triple {50884#false} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {50884#false} is VALID [2022-02-20 22:07:26,687 INFO L290 TraceCheckUtils]: 121: Hoare triple {50884#false} assume true; {50884#false} is VALID [2022-02-20 22:07:26,687 INFO L284 TraceCheckUtils]: 122: Hoare quadruple {50884#false} {50884#false} #566#return; {50884#false} is VALID [2022-02-20 22:07:26,687 INFO L290 TraceCheckUtils]: 123: Hoare triple {50884#false} usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset := usb_alloc_coherent_#t~ret212#1.base, usb_alloc_coherent_#t~ret212#1.offset;havoc usb_alloc_coherent_#t~ret212#1.base, usb_alloc_coherent_#t~ret212#1.offset; {50884#false} is VALID [2022-02-20 22:07:26,687 INFO L290 TraceCheckUtils]: 124: Hoare triple {50884#false} usb_acecad_probe_#t~ret137#1.base, usb_acecad_probe_#t~ret137#1.offset := usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;assume { :end_inline_usb_alloc_coherent } true;usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset := usb_acecad_probe_#t~ret137#1.base, usb_acecad_probe_#t~ret137#1.offset;havoc usb_acecad_probe_#t~ret137#1.base, usb_acecad_probe_#t~ret137#1.offset;call write~$Pointer$(usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem138#1.base, usb_acecad_probe_#t~mem138#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8); {50884#false} is VALID [2022-02-20 22:07:26,687 INFO L290 TraceCheckUtils]: 125: Hoare triple {50884#false} assume !(0 == (usb_acecad_probe_#t~mem138#1.base + usb_acecad_probe_#t~mem138#1.offset) % 18446744073709551616);havoc usb_acecad_probe_#t~mem138#1.base, usb_acecad_probe_#t~mem138#1.offset;assume { :begin_inline_ldv_usb_alloc_urb_5 } true;ldv_usb_alloc_urb_5_#in~iso_packets#1, ldv_usb_alloc_urb_5_#in~mem_flags#1 := 0, 208;havoc ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret196#1.base, ldv_usb_alloc_urb_5_#t~ret196#1.offset, ldv_usb_alloc_urb_5_~iso_packets#1, ldv_usb_alloc_urb_5_~mem_flags#1, ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;ldv_usb_alloc_urb_5_~iso_packets#1 := ldv_usb_alloc_urb_5_#in~iso_packets#1;ldv_usb_alloc_urb_5_~mem_flags#1 := ldv_usb_alloc_urb_5_#in~mem_flags#1;havoc ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;assume { :begin_inline_ldv_alloc_urb } true;havoc ldv_alloc_urb_#res#1.base, ldv_alloc_urb_#res#1.offset;havoc ldv_alloc_urb_#t~ret198#1.base, ldv_alloc_urb_#t~ret198#1.offset, ldv_alloc_urb_#t~ret199#1, ldv_alloc_urb_~value~0#1.base, ldv_alloc_urb_~value~0#1.offset, ldv_alloc_urb_~tmp~24#1.base, ldv_alloc_urb_~tmp~24#1.offset, ldv_alloc_urb_~tmp___0~7#1;havoc ldv_alloc_urb_~value~0#1.base, ldv_alloc_urb_~value~0#1.offset;havoc ldv_alloc_urb_~tmp~24#1.base, ldv_alloc_urb_~tmp~24#1.offset;havoc ldv_alloc_urb_~tmp___0~7#1; {50884#false} is VALID [2022-02-20 22:07:26,687 INFO L272 TraceCheckUtils]: 126: Hoare triple {50884#false} call ldv_alloc_urb_#t~ret198#1.base, ldv_alloc_urb_#t~ret198#1.offset := ldv_malloc(180); {50884#false} is VALID [2022-02-20 22:07:26,688 INFO L290 TraceCheckUtils]: 127: Hoare triple {50884#false} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {50884#false} is VALID [2022-02-20 22:07:26,688 INFO L290 TraceCheckUtils]: 128: Hoare triple {50884#false} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {50884#false} is VALID [2022-02-20 22:07:26,688 INFO L290 TraceCheckUtils]: 129: Hoare triple {50884#false} assume true; {50884#false} is VALID [2022-02-20 22:07:26,688 INFO L284 TraceCheckUtils]: 130: Hoare quadruple {50884#false} {50884#false} #568#return; {50884#false} is VALID [2022-02-20 22:07:26,688 INFO L290 TraceCheckUtils]: 131: Hoare triple {50884#false} ldv_alloc_urb_~tmp~24#1.base, ldv_alloc_urb_~tmp~24#1.offset := ldv_alloc_urb_#t~ret198#1.base, ldv_alloc_urb_#t~ret198#1.offset;havoc ldv_alloc_urb_#t~ret198#1.base, ldv_alloc_urb_#t~ret198#1.offset;ldv_alloc_urb_~value~0#1.base, ldv_alloc_urb_~value~0#1.offset := ldv_alloc_urb_~tmp~24#1.base, ldv_alloc_urb_~tmp~24#1.offset; {50884#false} is VALID [2022-02-20 22:07:26,688 INFO L272 TraceCheckUtils]: 132: Hoare triple {50884#false} call ldv_alloc_urb_#t~ret199#1 := ldv_undef_int(); {50884#false} is VALID [2022-02-20 22:07:26,689 INFO L290 TraceCheckUtils]: 133: Hoare triple {50884#false} havoc ~tmp~8;assume -2147483648 <= #t~nondet65 && #t~nondet65 <= 2147483647;~tmp~8 := #t~nondet65;havoc #t~nondet65;#res := ~tmp~8; {50884#false} is VALID [2022-02-20 22:07:26,689 INFO L290 TraceCheckUtils]: 134: Hoare triple {50884#false} assume true; {50884#false} is VALID [2022-02-20 22:07:26,689 INFO L284 TraceCheckUtils]: 135: Hoare quadruple {50884#false} {50884#false} #570#return; {50884#false} is VALID [2022-02-20 22:07:26,689 INFO L290 TraceCheckUtils]: 136: Hoare triple {50884#false} assume -2147483648 <= ldv_alloc_urb_#t~ret199#1 && ldv_alloc_urb_#t~ret199#1 <= 2147483647;ldv_alloc_urb_~tmp___0~7#1 := ldv_alloc_urb_#t~ret199#1;havoc ldv_alloc_urb_#t~ret199#1; {50884#false} is VALID [2022-02-20 22:07:26,689 INFO L290 TraceCheckUtils]: 137: Hoare triple {50884#false} assume 0 != ldv_alloc_urb_~tmp___0~7#1; {50884#false} is VALID [2022-02-20 22:07:26,689 INFO L290 TraceCheckUtils]: 138: Hoare triple {50884#false} assume 0 != (ldv_alloc_urb_~value~0#1.base + ldv_alloc_urb_~value~0#1.offset) % 18446744073709551616;~usb_urb~0.base, ~usb_urb~0.offset := ldv_alloc_urb_~value~0#1.base, ldv_alloc_urb_~value~0#1.offset; {50884#false} is VALID [2022-02-20 22:07:26,689 INFO L290 TraceCheckUtils]: 139: Hoare triple {50884#false} ldv_alloc_urb_#res#1.base, ldv_alloc_urb_#res#1.offset := ~usb_urb~0.base, ~usb_urb~0.offset; {50884#false} is VALID [2022-02-20 22:07:26,689 INFO L290 TraceCheckUtils]: 140: Hoare triple {50884#false} ldv_usb_alloc_urb_5_#t~ret196#1.base, ldv_usb_alloc_urb_5_#t~ret196#1.offset := ldv_alloc_urb_#res#1.base, ldv_alloc_urb_#res#1.offset;assume { :end_inline_ldv_alloc_urb } true;ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset := ldv_usb_alloc_urb_5_#t~ret196#1.base, ldv_usb_alloc_urb_5_#t~ret196#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret196#1.base, ldv_usb_alloc_urb_5_#t~ret196#1.offset;ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset := ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset; {50884#false} is VALID [2022-02-20 22:07:26,690 INFO L290 TraceCheckUtils]: 141: Hoare triple {50884#false} usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset := ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;assume { :end_inline_ldv_usb_alloc_urb_5 } true;call write~$Pointer$(usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset, usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8);havoc usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset;call usb_acecad_probe_#t~mem140#1.base, usb_acecad_probe_#t~mem140#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8); {50884#false} is VALID [2022-02-20 22:07:26,690 INFO L290 TraceCheckUtils]: 142: Hoare triple {50884#false} assume 0 == (usb_acecad_probe_#t~mem140#1.base + usb_acecad_probe_#t~mem140#1.offset) % 18446744073709551616;havoc usb_acecad_probe_#t~mem140#1.base, usb_acecad_probe_#t~mem140#1.offset;usb_acecad_probe_~err~0#1 := -12; {50884#false} is VALID [2022-02-20 22:07:26,690 INFO L290 TraceCheckUtils]: 143: Hoare triple {50884#false} call usb_acecad_probe_#t~mem172#1.base, usb_acecad_probe_#t~mem172#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem173#1 := read~int(usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset, 8); {50884#false} is VALID [2022-02-20 22:07:26,690 INFO L272 TraceCheckUtils]: 144: Hoare triple {50884#false} call usb_free_coherent(usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, 8, usb_acecad_probe_#t~mem172#1.base, usb_acecad_probe_#t~mem172#1.offset, usb_acecad_probe_#t~mem173#1); {50884#false} is VALID [2022-02-20 22:07:26,690 INFO L290 TraceCheckUtils]: 145: Hoare triple {50884#false} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1 := #in~arg1;~arg2.base, ~arg2.offset := #in~arg2.base, #in~arg2.offset;~arg3 := #in~arg3; {50884#false} is VALID [2022-02-20 22:07:26,690 INFO L290 TraceCheckUtils]: 146: Hoare triple {50884#false} assume true; {50884#false} is VALID [2022-02-20 22:07:26,691 INFO L284 TraceCheckUtils]: 147: Hoare quadruple {50884#false} {50884#false} #592#return; {50884#false} is VALID [2022-02-20 22:07:26,691 INFO L290 TraceCheckUtils]: 148: Hoare triple {50884#false} havoc usb_acecad_probe_#t~mem172#1.base, usb_acecad_probe_#t~mem172#1.offset;havoc usb_acecad_probe_#t~mem173#1; {50884#false} is VALID [2022-02-20 22:07:26,691 INFO L290 TraceCheckUtils]: 149: Hoare triple {50884#false} assume { :begin_inline_input_free_device } true;input_free_device_#in~arg0#1.base, input_free_device_#in~arg0#1.offset := usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset;havoc input_free_device_~arg0#1.base, input_free_device_~arg0#1.offset;input_free_device_~arg0#1.base, input_free_device_~arg0#1.offset := input_free_device_#in~arg0#1.base, input_free_device_#in~arg0#1.offset; {50884#false} is VALID [2022-02-20 22:07:26,691 INFO L290 TraceCheckUtils]: 150: Hoare triple {50884#false} assume { :end_inline_input_free_device } true; {50884#false} is VALID [2022-02-20 22:07:26,691 INFO L272 TraceCheckUtils]: 151: Hoare triple {50884#false} call kfree(usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset); {50884#false} is VALID [2022-02-20 22:07:26,691 INFO L290 TraceCheckUtils]: 152: Hoare triple {50884#false} ~p.base, ~p.offset := #in~p.base, #in~p.offset;call ULTIMATE.dealloc(~p.base, ~p.offset); {50884#false} is VALID [2022-02-20 22:07:26,691 INFO L290 TraceCheckUtils]: 153: Hoare triple {50884#false} assume true; {50884#false} is VALID [2022-02-20 22:07:26,692 INFO L284 TraceCheckUtils]: 154: Hoare quadruple {50884#false} {50884#false} #594#return; {50884#false} is VALID [2022-02-20 22:07:26,692 INFO L290 TraceCheckUtils]: 155: Hoare triple {50884#false} usb_acecad_probe_#res#1 := usb_acecad_probe_~err~0#1; {50884#false} is VALID [2022-02-20 22:07:26,692 INFO L290 TraceCheckUtils]: 156: Hoare triple {50884#false} main_#t~ret188#1 := usb_acecad_probe_#res#1;assume { :end_inline_usb_acecad_probe } true;assume -2147483648 <= main_#t~ret188#1 && main_#t~ret188#1 <= 2147483647;~ldv_retval_0~0 := main_#t~ret188#1;havoc main_#t~ret188#1; {50884#false} is VALID [2022-02-20 22:07:26,692 INFO L290 TraceCheckUtils]: 157: Hoare triple {50884#false} assume !(0 == ~ldv_retval_0~0); {50884#false} is VALID [2022-02-20 22:07:26,692 INFO L290 TraceCheckUtils]: 158: Hoare triple {50884#false} assume -2147483648 <= main_#t~nondet184#1 && main_#t~nondet184#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet184#1;havoc main_#t~nondet184#1;main_#t~switch185#1 := 0 == main_~tmp___0~6#1; {50884#false} is VALID [2022-02-20 22:07:26,692 INFO L290 TraceCheckUtils]: 159: Hoare triple {50884#false} assume !main_#t~switch185#1;main_#t~switch185#1 := main_#t~switch185#1 || 1 == main_~tmp___0~6#1; {50884#false} is VALID [2022-02-20 22:07:26,692 INFO L290 TraceCheckUtils]: 160: Hoare triple {50884#false} assume main_#t~switch185#1; {50884#false} is VALID [2022-02-20 22:07:26,693 INFO L290 TraceCheckUtils]: 161: Hoare triple {50884#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet189#1 && main_#t~nondet189#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet189#1;havoc main_#t~nondet189#1;main_#t~switch190#1 := 0 == main_~tmp___2~1#1; {50884#false} is VALID [2022-02-20 22:07:26,693 INFO L290 TraceCheckUtils]: 162: Hoare triple {50884#false} assume main_#t~switch190#1; {50884#false} is VALID [2022-02-20 22:07:26,693 INFO L290 TraceCheckUtils]: 163: Hoare triple {50884#false} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0;assume { :begin_inline_usb_acecad_exit } true;assume { :begin_inline_ldv_usb_deregister_11 } true;ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset := ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset;assume { :begin_inline_usb_deregister } true;usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset := ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;havoc usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset;usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset := usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset; {50884#false} is VALID [2022-02-20 22:07:26,693 INFO L290 TraceCheckUtils]: 164: Hoare triple {50884#false} assume { :end_inline_usb_deregister } true;~ldv_state_variable_1~0 := 0; {50884#false} is VALID [2022-02-20 22:07:26,693 INFO L290 TraceCheckUtils]: 165: Hoare triple {50884#false} assume { :end_inline_ldv_usb_deregister_11 } true; {50884#false} is VALID [2022-02-20 22:07:26,693 INFO L290 TraceCheckUtils]: 166: Hoare triple {50884#false} assume { :end_inline_usb_acecad_exit } true;~ldv_state_variable_0~0 := 2; {50884#false} is VALID [2022-02-20 22:07:26,693 INFO L290 TraceCheckUtils]: 167: Hoare triple {50884#false} assume { :begin_inline_ldv_check_final_state } true; {50884#false} is VALID [2022-02-20 22:07:26,694 INFO L290 TraceCheckUtils]: 168: Hoare triple {50884#false} assume 0 != (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616; {50884#false} is VALID [2022-02-20 22:07:26,694 INFO L272 TraceCheckUtils]: 169: Hoare triple {50884#false} call ldv_error(); {50884#false} is VALID [2022-02-20 22:07:26,694 INFO L290 TraceCheckUtils]: 170: Hoare triple {50884#false} assume !false; {50884#false} is VALID [2022-02-20 22:07:26,694 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 23 proven. 0 refuted. 0 times theorem prover too weak. 50 trivial. 0 not checked. [2022-02-20 22:07:26,694 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-02-20 22:07:26,695 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [187176261] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:07:26,695 INFO L191 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-02-20 22:07:26,695 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [9] total 9 [2022-02-20 22:07:26,695 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [514866330] [2022-02-20 22:07:26,695 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:07:26,696 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 21.6) internal successors, (108), 4 states have internal predecessors, (108), 2 states have call successors, (16), 2 states have call predecessors, (16), 3 states have return successors, (15), 3 states have call predecessors, (15), 2 states have call successors, (15) Word has length 171 [2022-02-20 22:07:26,696 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:07:26,697 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 21.6) internal successors, (108), 4 states have internal predecessors, (108), 2 states have call successors, (16), 2 states have call predecessors, (16), 3 states have return successors, (15), 3 states have call predecessors, (15), 2 states have call successors, (15) [2022-02-20 22:07:26,840 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 139 edges. 139 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:26,840 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-02-20 22:07:26,840 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:07:26,841 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-02-20 22:07:26,841 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2022-02-20 22:07:26,841 INFO L87 Difference]: Start difference. First operand 903 states and 1167 transitions. Second operand has 5 states, 5 states have (on average 21.6) internal successors, (108), 4 states have internal predecessors, (108), 2 states have call successors, (16), 2 states have call predecessors, (16), 3 states have return successors, (15), 3 states have call predecessors, (15), 2 states have call successors, (15) [2022-02-20 22:07:28,005 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:28,005 INFO L93 Difference]: Finished difference Result 1803 states and 2343 transitions. [2022-02-20 22:07:28,005 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-02-20 22:07:28,006 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 21.6) internal successors, (108), 4 states have internal predecessors, (108), 2 states have call successors, (16), 2 states have call predecessors, (16), 3 states have return successors, (15), 3 states have call predecessors, (15), 2 states have call successors, (15) Word has length 171 [2022-02-20 22:07:28,006 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 22:07:28,006 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 21.6) internal successors, (108), 4 states have internal predecessors, (108), 2 states have call successors, (16), 2 states have call predecessors, (16), 3 states have return successors, (15), 3 states have call predecessors, (15), 2 states have call successors, (15) [2022-02-20 22:07:28,009 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 559 transitions. [2022-02-20 22:07:28,009 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 21.6) internal successors, (108), 4 states have internal predecessors, (108), 2 states have call successors, (16), 2 states have call predecessors, (16), 3 states have return successors, (15), 3 states have call predecessors, (15), 2 states have call successors, (15) [2022-02-20 22:07:28,012 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 559 transitions. [2022-02-20 22:07:28,013 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 559 transitions. [2022-02-20 22:07:28,416 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 559 edges. 559 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:28,484 INFO L225 Difference]: With dead ends: 1803 [2022-02-20 22:07:28,485 INFO L226 Difference]: Without dead ends: 911 [2022-02-20 22:07:28,487 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 212 GetRequests, 205 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2022-02-20 22:07:28,488 INFO L933 BasicCegarLoop]: 278 mSDtfsCounter, 0 mSDsluCounter, 828 mSDsCounter, 0 mSdLazyCounter, 9 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1106 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 9 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-02-20 22:07:28,488 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [0 Valid, 1106 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 9 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-02-20 22:07:28,489 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 911 states. [2022-02-20 22:07:28,804 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 911 to 911. [2022-02-20 22:07:28,804 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 22:07:28,806 INFO L82 GeneralOperation]: Start isEquivalent. First operand 911 states. Second operand has 911 states, 713 states have (on average 1.2538569424964936) internal successors, (894), 725 states have internal predecessors, (894), 138 states have call successors, (138), 56 states have call predecessors, (138), 59 states have return successors, (151), 137 states have call predecessors, (151), 137 states have call successors, (151) [2022-02-20 22:07:28,807 INFO L74 IsIncluded]: Start isIncluded. First operand 911 states. Second operand has 911 states, 713 states have (on average 1.2538569424964936) internal successors, (894), 725 states have internal predecessors, (894), 138 states have call successors, (138), 56 states have call predecessors, (138), 59 states have return successors, (151), 137 states have call predecessors, (151), 137 states have call successors, (151) [2022-02-20 22:07:28,808 INFO L87 Difference]: Start difference. First operand 911 states. Second operand has 911 states, 713 states have (on average 1.2538569424964936) internal successors, (894), 725 states have internal predecessors, (894), 138 states have call successors, (138), 56 states have call predecessors, (138), 59 states have return successors, (151), 137 states have call predecessors, (151), 137 states have call successors, (151) [2022-02-20 22:07:28,871 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:28,871 INFO L93 Difference]: Finished difference Result 911 states and 1183 transitions. [2022-02-20 22:07:28,871 INFO L276 IsEmpty]: Start isEmpty. Operand 911 states and 1183 transitions. [2022-02-20 22:07:28,873 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:28,874 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:28,876 INFO L74 IsIncluded]: Start isIncluded. First operand has 911 states, 713 states have (on average 1.2538569424964936) internal successors, (894), 725 states have internal predecessors, (894), 138 states have call successors, (138), 56 states have call predecessors, (138), 59 states have return successors, (151), 137 states have call predecessors, (151), 137 states have call successors, (151) Second operand 911 states. [2022-02-20 22:07:28,877 INFO L87 Difference]: Start difference. First operand has 911 states, 713 states have (on average 1.2538569424964936) internal successors, (894), 725 states have internal predecessors, (894), 138 states have call successors, (138), 56 states have call predecessors, (138), 59 states have return successors, (151), 137 states have call predecessors, (151), 137 states have call successors, (151) Second operand 911 states. [2022-02-20 22:07:28,925 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:28,925 INFO L93 Difference]: Finished difference Result 911 states and 1183 transitions. [2022-02-20 22:07:28,926 INFO L276 IsEmpty]: Start isEmpty. Operand 911 states and 1183 transitions. [2022-02-20 22:07:28,927 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:28,928 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:28,928 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 22:07:28,928 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 22:07:28,930 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 911 states, 713 states have (on average 1.2538569424964936) internal successors, (894), 725 states have internal predecessors, (894), 138 states have call successors, (138), 56 states have call predecessors, (138), 59 states have return successors, (151), 137 states have call predecessors, (151), 137 states have call successors, (151) [2022-02-20 22:07:28,979 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 911 states to 911 states and 1183 transitions. [2022-02-20 22:07:28,980 INFO L78 Accepts]: Start accepts. Automaton has 911 states and 1183 transitions. Word has length 171 [2022-02-20 22:07:28,980 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 22:07:28,980 INFO L470 AbstractCegarLoop]: Abstraction has 911 states and 1183 transitions. [2022-02-20 22:07:28,980 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 21.6) internal successors, (108), 4 states have internal predecessors, (108), 2 states have call successors, (16), 2 states have call predecessors, (16), 3 states have return successors, (15), 3 states have call predecessors, (15), 2 states have call successors, (15) [2022-02-20 22:07:28,981 INFO L276 IsEmpty]: Start isEmpty. Operand 911 states and 1183 transitions. [2022-02-20 22:07:28,983 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 178 [2022-02-20 22:07:28,983 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:07:28,984 INFO L514 BasicCegarLoop]: trace histogram [5, 5, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:07:29,011 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2022-02-20 22:07:29,208 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable11 [2022-02-20 22:07:29,208 INFO L402 AbstractCegarLoop]: === Iteration 13 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:07:29,209 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:07:29,209 INFO L85 PathProgramCache]: Analyzing trace with hash -2083587314, now seen corresponding path program 1 times [2022-02-20 22:07:29,209 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:07:29,209 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1281325906] [2022-02-20 22:07:29,209 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:07:29,209 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:07:29,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:29,404 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 22:07:29,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:29,416 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:29,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:29,421 INFO L290 TraceCheckUtils]: 0: Hoare triple {57228#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {57133#true} is VALID [2022-02-20 22:07:29,421 INFO L290 TraceCheckUtils]: 1: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:29,421 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {57133#true} {57133#true} #538#return; {57133#true} is VALID [2022-02-20 22:07:29,421 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:29,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:29,425 INFO L290 TraceCheckUtils]: 0: Hoare triple {57133#true} ~cond := #in~cond; {57133#true} is VALID [2022-02-20 22:07:29,426 INFO L290 TraceCheckUtils]: 1: Hoare triple {57133#true} assume !(0 == ~cond); {57133#true} is VALID [2022-02-20 22:07:29,426 INFO L290 TraceCheckUtils]: 2: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:29,426 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {57133#true} {57133#true} #540#return; {57133#true} is VALID [2022-02-20 22:07:29,426 INFO L290 TraceCheckUtils]: 0: Hoare triple {57220#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {57133#true} is VALID [2022-02-20 22:07:29,427 INFO L272 TraceCheckUtils]: 1: Hoare triple {57133#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {57228#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:29,427 INFO L290 TraceCheckUtils]: 2: Hoare triple {57228#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {57133#true} is VALID [2022-02-20 22:07:29,428 INFO L290 TraceCheckUtils]: 3: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:29,428 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {57133#true} {57133#true} #538#return; {57133#true} is VALID [2022-02-20 22:07:29,428 INFO L290 TraceCheckUtils]: 5: Hoare triple {57133#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {57133#true} is VALID [2022-02-20 22:07:29,428 INFO L272 TraceCheckUtils]: 6: Hoare triple {57133#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {57133#true} is VALID [2022-02-20 22:07:29,428 INFO L290 TraceCheckUtils]: 7: Hoare triple {57133#true} ~cond := #in~cond; {57133#true} is VALID [2022-02-20 22:07:29,428 INFO L290 TraceCheckUtils]: 8: Hoare triple {57133#true} assume !(0 == ~cond); {57133#true} is VALID [2022-02-20 22:07:29,428 INFO L290 TraceCheckUtils]: 9: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:29,429 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {57133#true} {57133#true} #540#return; {57133#true} is VALID [2022-02-20 22:07:29,429 INFO L290 TraceCheckUtils]: 11: Hoare triple {57133#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {57133#true} is VALID [2022-02-20 22:07:29,429 INFO L290 TraceCheckUtils]: 12: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:29,429 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {57133#true} {57133#true} #544#return; {57133#true} is VALID [2022-02-20 22:07:29,429 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 27 [2022-02-20 22:07:29,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:29,468 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:29,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:29,472 INFO L290 TraceCheckUtils]: 0: Hoare triple {57228#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {57133#true} is VALID [2022-02-20 22:07:29,472 INFO L290 TraceCheckUtils]: 1: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:29,473 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {57133#true} {57133#true} #538#return; {57133#true} is VALID [2022-02-20 22:07:29,473 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:29,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:29,477 INFO L290 TraceCheckUtils]: 0: Hoare triple {57133#true} ~cond := #in~cond; {57133#true} is VALID [2022-02-20 22:07:29,477 INFO L290 TraceCheckUtils]: 1: Hoare triple {57133#true} assume !(0 == ~cond); {57133#true} is VALID [2022-02-20 22:07:29,477 INFO L290 TraceCheckUtils]: 2: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:29,477 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {57133#true} {57133#true} #540#return; {57133#true} is VALID [2022-02-20 22:07:29,478 INFO L290 TraceCheckUtils]: 0: Hoare triple {57220#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {57133#true} is VALID [2022-02-20 22:07:29,479 INFO L272 TraceCheckUtils]: 1: Hoare triple {57133#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {57228#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:29,479 INFO L290 TraceCheckUtils]: 2: Hoare triple {57228#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {57133#true} is VALID [2022-02-20 22:07:29,479 INFO L290 TraceCheckUtils]: 3: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:29,479 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {57133#true} {57133#true} #538#return; {57133#true} is VALID [2022-02-20 22:07:29,479 INFO L290 TraceCheckUtils]: 5: Hoare triple {57133#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {57133#true} is VALID [2022-02-20 22:07:29,479 INFO L272 TraceCheckUtils]: 6: Hoare triple {57133#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {57133#true} is VALID [2022-02-20 22:07:29,479 INFO L290 TraceCheckUtils]: 7: Hoare triple {57133#true} ~cond := #in~cond; {57133#true} is VALID [2022-02-20 22:07:29,480 INFO L290 TraceCheckUtils]: 8: Hoare triple {57133#true} assume !(0 == ~cond); {57133#true} is VALID [2022-02-20 22:07:29,480 INFO L290 TraceCheckUtils]: 9: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:29,480 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {57133#true} {57133#true} #540#return; {57133#true} is VALID [2022-02-20 22:07:29,480 INFO L290 TraceCheckUtils]: 11: Hoare triple {57133#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {57133#true} is VALID [2022-02-20 22:07:29,480 INFO L290 TraceCheckUtils]: 12: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:29,480 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {57133#true} {57133#true} #600#return; {57133#true} is VALID [2022-02-20 22:07:29,487 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 56 [2022-02-20 22:07:29,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:29,496 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 22:07:29,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:29,500 INFO L290 TraceCheckUtils]: 0: Hoare triple {57133#true} ~cond := #in~cond; {57133#true} is VALID [2022-02-20 22:07:29,500 INFO L290 TraceCheckUtils]: 1: Hoare triple {57133#true} assume !(0 == ~cond); {57133#true} is VALID [2022-02-20 22:07:29,500 INFO L290 TraceCheckUtils]: 2: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:29,501 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {57133#true} {57133#true} #542#return; {57133#true} is VALID [2022-02-20 22:07:29,501 INFO L290 TraceCheckUtils]: 0: Hoare triple {57236#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {57133#true} is VALID [2022-02-20 22:07:29,501 INFO L290 TraceCheckUtils]: 1: Hoare triple {57133#true} assume !(0 != ~tmp___0~2);call #t~malloc60.base, #t~malloc60.offset := #Ultimate.allocOnHeap(~size);~tmp~4.base, ~tmp~4.offset := #t~malloc60.base, #t~malloc60.offset;havoc #t~malloc60.base, #t~malloc60.offset;~p~0.base, ~p~0.offset := ~tmp~4.base, ~tmp~4.offset; {57133#true} is VALID [2022-02-20 22:07:29,501 INFO L272 TraceCheckUtils]: 2: Hoare triple {57133#true} call assume_abort_if_not((if 0 != (~p~0.base + ~p~0.offset) % 18446744073709551616 then 1 else 0)); {57133#true} is VALID [2022-02-20 22:07:29,501 INFO L290 TraceCheckUtils]: 3: Hoare triple {57133#true} ~cond := #in~cond; {57133#true} is VALID [2022-02-20 22:07:29,501 INFO L290 TraceCheckUtils]: 4: Hoare triple {57133#true} assume !(0 == ~cond); {57133#true} is VALID [2022-02-20 22:07:29,502 INFO L290 TraceCheckUtils]: 5: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:29,502 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {57133#true} {57133#true} #542#return; {57133#true} is VALID [2022-02-20 22:07:29,502 INFO L290 TraceCheckUtils]: 7: Hoare triple {57133#true} #res.base, #res.offset := ~p~0.base, ~p~0.offset; {57133#true} is VALID [2022-02-20 22:07:29,502 INFO L290 TraceCheckUtils]: 8: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:29,502 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {57133#true} {57133#true} #546#return; {57133#true} is VALID [2022-02-20 22:07:29,502 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 83 [2022-02-20 22:07:29,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:29,507 INFO L290 TraceCheckUtils]: 0: Hoare triple {57133#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {57133#true} is VALID [2022-02-20 22:07:29,507 INFO L290 TraceCheckUtils]: 1: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:29,507 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {57133#true} {57133#true} #556#return; {57133#true} is VALID [2022-02-20 22:07:29,507 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 89 [2022-02-20 22:07:29,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:29,513 INFO L290 TraceCheckUtils]: 0: Hoare triple {57133#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {57133#true} is VALID [2022-02-20 22:07:29,513 INFO L290 TraceCheckUtils]: 1: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:29,513 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {57133#true} {57133#true} #560#return; {57133#true} is VALID [2022-02-20 22:07:29,513 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 96 [2022-02-20 22:07:29,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:29,580 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:29,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:29,604 INFO L290 TraceCheckUtils]: 0: Hoare triple {57236#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {57133#true} is VALID [2022-02-20 22:07:29,605 INFO L290 TraceCheckUtils]: 1: Hoare triple {57133#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {57249#(and (= |ldv_malloc_#res.base| 0) (= |ldv_malloc_#res.offset| 0))} is VALID [2022-02-20 22:07:29,605 INFO L290 TraceCheckUtils]: 2: Hoare triple {57249#(and (= |ldv_malloc_#res.base| 0) (= |ldv_malloc_#res.offset| 0))} assume true; {57249#(and (= |ldv_malloc_#res.base| 0) (= |ldv_malloc_#res.offset| 0))} is VALID [2022-02-20 22:07:29,606 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {57249#(and (= |ldv_malloc_#res.base| 0) (= |ldv_malloc_#res.offset| 0))} {57133#true} #530#return; {57245#(and (= |kzalloc___kmalloc_#t~ret53#1.base| 0) (= |kzalloc___kmalloc_#t~ret53#1.offset| 0))} is VALID [2022-02-20 22:07:29,606 INFO L290 TraceCheckUtils]: 0: Hoare triple {57236#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {57133#true} is VALID [2022-02-20 22:07:29,607 INFO L272 TraceCheckUtils]: 1: Hoare triple {57133#true} call __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset := ldv_malloc(__kmalloc_~size#1); {57236#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:29,607 INFO L290 TraceCheckUtils]: 2: Hoare triple {57236#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {57133#true} is VALID [2022-02-20 22:07:29,608 INFO L290 TraceCheckUtils]: 3: Hoare triple {57133#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {57249#(and (= |ldv_malloc_#res.base| 0) (= |ldv_malloc_#res.offset| 0))} is VALID [2022-02-20 22:07:29,608 INFO L290 TraceCheckUtils]: 4: Hoare triple {57249#(and (= |ldv_malloc_#res.base| 0) (= |ldv_malloc_#res.offset| 0))} assume true; {57249#(and (= |ldv_malloc_#res.base| 0) (= |ldv_malloc_#res.offset| 0))} is VALID [2022-02-20 22:07:29,609 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {57249#(and (= |ldv_malloc_#res.base| 0) (= |ldv_malloc_#res.offset| 0))} {57133#true} #530#return; {57245#(and (= |kzalloc___kmalloc_#t~ret53#1.base| 0) (= |kzalloc___kmalloc_#t~ret53#1.offset| 0))} is VALID [2022-02-20 22:07:29,610 INFO L290 TraceCheckUtils]: 6: Hoare triple {57245#(and (= |kzalloc___kmalloc_#t~ret53#1.base| 0) (= |kzalloc___kmalloc_#t~ret53#1.offset| 0))} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset; {57246#(and (= 0 |kzalloc___kmalloc_#res#1.offset|) (= |kzalloc___kmalloc_#res#1.base| 0))} is VALID [2022-02-20 22:07:29,610 INFO L290 TraceCheckUtils]: 7: Hoare triple {57246#(and (= 0 |kzalloc___kmalloc_#res#1.offset|) (= |kzalloc___kmalloc_#res#1.base| 0))} kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {57247#(and (= |kzalloc_kmalloc_#res#1.offset| 0) (= |kzalloc_kmalloc_#res#1.base| 0))} is VALID [2022-02-20 22:07:29,611 INFO L290 TraceCheckUtils]: 8: Hoare triple {57247#(and (= |kzalloc_kmalloc_#res#1.offset| 0) (= |kzalloc_kmalloc_#res#1.base| 0))} #t~ret55#1.base, #t~ret55#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret55#1.base, #t~ret55#1.offset;havoc #t~ret55#1.base, #t~ret55#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {57248#(and (= |kzalloc_#res#1.offset| 0) (= |kzalloc_#res#1.base| 0))} is VALID [2022-02-20 22:07:29,611 INFO L290 TraceCheckUtils]: 9: Hoare triple {57248#(and (= |kzalloc_#res#1.offset| 0) (= |kzalloc_#res#1.base| 0))} assume true; {57248#(and (= |kzalloc_#res#1.offset| 0) (= |kzalloc_#res#1.base| 0))} is VALID [2022-02-20 22:07:29,612 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {57248#(and (= |kzalloc_#res#1.offset| 0) (= |kzalloc_#res#1.base| 0))} {57133#true} #562#return; {57190#(and (= |ULTIMATE.start_usb_acecad_probe_#t~ret135#1.offset| 0) (= |ULTIMATE.start_usb_acecad_probe_#t~ret135#1.base| 0))} is VALID [2022-02-20 22:07:29,612 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 109 [2022-02-20 22:07:29,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:29,627 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:29,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:29,633 INFO L290 TraceCheckUtils]: 0: Hoare triple {57236#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {57133#true} is VALID [2022-02-20 22:07:29,633 INFO L290 TraceCheckUtils]: 1: Hoare triple {57133#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {57133#true} is VALID [2022-02-20 22:07:29,633 INFO L290 TraceCheckUtils]: 2: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:29,633 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {57133#true} {57133#true} #530#return; {57133#true} is VALID [2022-02-20 22:07:29,634 INFO L290 TraceCheckUtils]: 0: Hoare triple {57236#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {57133#true} is VALID [2022-02-20 22:07:29,634 INFO L272 TraceCheckUtils]: 1: Hoare triple {57133#true} call __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset := ldv_malloc(__kmalloc_~size#1); {57236#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:29,634 INFO L290 TraceCheckUtils]: 2: Hoare triple {57236#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {57133#true} is VALID [2022-02-20 22:07:29,635 INFO L290 TraceCheckUtils]: 3: Hoare triple {57133#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {57133#true} is VALID [2022-02-20 22:07:29,635 INFO L290 TraceCheckUtils]: 4: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:29,635 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {57133#true} {57133#true} #530#return; {57133#true} is VALID [2022-02-20 22:07:29,635 INFO L290 TraceCheckUtils]: 6: Hoare triple {57133#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset; {57133#true} is VALID [2022-02-20 22:07:29,635 INFO L290 TraceCheckUtils]: 7: Hoare triple {57133#true} kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {57133#true} is VALID [2022-02-20 22:07:29,635 INFO L290 TraceCheckUtils]: 8: Hoare triple {57133#true} #t~ret55#1.base, #t~ret55#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret55#1.base, #t~ret55#1.offset;havoc #t~ret55#1.base, #t~ret55#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {57133#true} is VALID [2022-02-20 22:07:29,635 INFO L290 TraceCheckUtils]: 9: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:29,636 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {57133#true} {57191#(and (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.offset| 0) (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.base| 0))} #564#return; {57191#(and (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.offset| 0) (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.base| 0))} is VALID [2022-02-20 22:07:29,637 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 124 [2022-02-20 22:07:29,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:29,644 INFO L290 TraceCheckUtils]: 0: Hoare triple {57236#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {57133#true} is VALID [2022-02-20 22:07:29,645 INFO L290 TraceCheckUtils]: 1: Hoare triple {57133#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {57133#true} is VALID [2022-02-20 22:07:29,645 INFO L290 TraceCheckUtils]: 2: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:29,645 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {57133#true} {57134#false} #566#return; {57134#false} is VALID [2022-02-20 22:07:29,645 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 132 [2022-02-20 22:07:29,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:29,651 INFO L290 TraceCheckUtils]: 0: Hoare triple {57236#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {57133#true} is VALID [2022-02-20 22:07:29,652 INFO L290 TraceCheckUtils]: 1: Hoare triple {57133#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {57133#true} is VALID [2022-02-20 22:07:29,652 INFO L290 TraceCheckUtils]: 2: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:29,652 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {57133#true} {57134#false} #568#return; {57134#false} is VALID [2022-02-20 22:07:29,652 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 138 [2022-02-20 22:07:29,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:29,657 INFO L290 TraceCheckUtils]: 0: Hoare triple {57133#true} havoc ~tmp~8;assume -2147483648 <= #t~nondet65 && #t~nondet65 <= 2147483647;~tmp~8 := #t~nondet65;havoc #t~nondet65;#res := ~tmp~8; {57133#true} is VALID [2022-02-20 22:07:29,658 INFO L290 TraceCheckUtils]: 1: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:29,658 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {57133#true} {57134#false} #570#return; {57134#false} is VALID [2022-02-20 22:07:29,658 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 150 [2022-02-20 22:07:29,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:29,664 INFO L290 TraceCheckUtils]: 0: Hoare triple {57133#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1 := #in~arg1;~arg2.base, ~arg2.offset := #in~arg2.base, #in~arg2.offset;~arg3 := #in~arg3; {57133#true} is VALID [2022-02-20 22:07:29,664 INFO L290 TraceCheckUtils]: 1: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:29,664 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {57133#true} {57134#false} #592#return; {57134#false} is VALID [2022-02-20 22:07:29,674 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 157 [2022-02-20 22:07:29,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:29,680 INFO L290 TraceCheckUtils]: 0: Hoare triple {57254#(= |old(#valid)| |#valid|)} ~p.base, ~p.offset := #in~p.base, #in~p.offset;call ULTIMATE.dealloc(~p.base, ~p.offset); {57133#true} is VALID [2022-02-20 22:07:29,680 INFO L290 TraceCheckUtils]: 1: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:29,680 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {57133#true} {57134#false} #594#return; {57134#false} is VALID [2022-02-20 22:07:29,680 INFO L290 TraceCheckUtils]: 0: Hoare triple {57133#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(99, 2);call #Ultimate.allocInit(10, 3);call #Ultimate.allocInit(7, 4);call write~init~int(97, 4, 0, 1);call write~init~int(99, 4, 1, 1);call write~init~int(101, 4, 2, 1);call write~init~int(99, 4, 3, 1);call write~init~int(97, 4, 4, 1);call write~init~int(100, 4, 5, 1);call write~init~int(0, 4, 6, 1);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(20, 6);call #Ultimate.allocInit(57, 7);call #Ultimate.allocInit(2, 8);call write~init~int(32, 8, 0, 1);call write~init~int(0, 8, 1, 1);call #Ultimate.allocInit(8, 9);call #Ultimate.allocInit(34, 10);call #Ultimate.allocInit(32, 11);call #Ultimate.allocInit(11, 12);call #Ultimate.allocInit(48, 13);~LDV_IN_INTERRUPT~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset := 14, 0;call #Ultimate.allocInit(72, 14);call write~init~int(3, ~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 2 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(4, ~#usb_acecad_id_table~0.base, 4 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 6 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 8 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 10 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 11 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 12 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 13 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 14 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 15 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 16 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(3, ~#usb_acecad_id_table~0.base, 24 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 26 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(8, ~#usb_acecad_id_table~0.base, 28 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 30 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 32 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 34 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 35 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 36 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 37 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 38 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 39 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(1, ~#usb_acecad_id_table~0.base, 40 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(0, ~#usb_acecad_id_table~0.base, 48 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 50 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 52 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 54 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 56 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 58 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 59 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 60 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 61 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 62 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 63 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 64 + ~#usb_acecad_id_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.driver_info := 0;~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset := 15, 0;call #Ultimate.allocInit(264, 15);call write~init~$Pointer$(12, 0, ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_probe.base, #funAddr~usb_acecad_probe.offset, ~#usb_acecad_driver~0.base, 8 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_disconnect.base, #funAddr~usb_acecad_disconnect.offset, ~#usb_acecad_driver~0.base, 16 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 24 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 32 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 40 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 48 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 56 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 64 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, ~#usb_acecad_driver~0.base, 72 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 80 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 84 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 88 + ~#usb_acecad_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 92 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 100 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 108 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 116 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 124 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 132 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 136 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 144 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 152 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 160 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 168 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 176 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 184 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 192 + ~#usb_acecad_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 193 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 201 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 209 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 217 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 225 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 233 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 241 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 249 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 257 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 261 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 262 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 263 + ~#usb_acecad_driver~0.offset, 1);~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {57133#true} is VALID [2022-02-20 22:07:29,681 INFO L290 TraceCheckUtils]: 1: Hoare triple {57133#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret183#1.base, main_#t~ret183#1.offset, main_#t~nondet184#1, main_#t~switch185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~ret188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~ret191#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~17#1.base, main_~tmp~17#1.offset, main_~tmp___0~6#1, main_~tmp___1~3#1, main_~tmp___2~1#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~17#1.base, main_~tmp~17#1.offset;havoc main_~tmp___0~6#1;havoc main_~tmp___1~3#1;havoc main_~tmp___2~1#1; {57133#true} is VALID [2022-02-20 22:07:29,681 INFO L272 TraceCheckUtils]: 2: Hoare triple {57133#true} call main_#t~ret183#1.base, main_#t~ret183#1.offset := ldv_init_zalloc(24); {57220#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:29,682 INFO L290 TraceCheckUtils]: 3: Hoare triple {57220#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {57133#true} is VALID [2022-02-20 22:07:29,682 INFO L272 TraceCheckUtils]: 4: Hoare triple {57133#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {57228#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:29,683 INFO L290 TraceCheckUtils]: 5: Hoare triple {57228#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {57133#true} is VALID [2022-02-20 22:07:29,683 INFO L290 TraceCheckUtils]: 6: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:29,683 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {57133#true} {57133#true} #538#return; {57133#true} is VALID [2022-02-20 22:07:29,683 INFO L290 TraceCheckUtils]: 8: Hoare triple {57133#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {57133#true} is VALID [2022-02-20 22:07:29,683 INFO L272 TraceCheckUtils]: 9: Hoare triple {57133#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {57133#true} is VALID [2022-02-20 22:07:29,683 INFO L290 TraceCheckUtils]: 10: Hoare triple {57133#true} ~cond := #in~cond; {57133#true} is VALID [2022-02-20 22:07:29,683 INFO L290 TraceCheckUtils]: 11: Hoare triple {57133#true} assume !(0 == ~cond); {57133#true} is VALID [2022-02-20 22:07:29,684 INFO L290 TraceCheckUtils]: 12: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:29,684 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {57133#true} {57133#true} #540#return; {57133#true} is VALID [2022-02-20 22:07:29,684 INFO L290 TraceCheckUtils]: 14: Hoare triple {57133#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {57133#true} is VALID [2022-02-20 22:07:29,684 INFO L290 TraceCheckUtils]: 15: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:29,684 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {57133#true} {57133#true} #544#return; {57133#true} is VALID [2022-02-20 22:07:29,684 INFO L290 TraceCheckUtils]: 17: Hoare triple {57133#true} main_~tmp~17#1.base, main_~tmp~17#1.offset := main_#t~ret183#1.base, main_#t~ret183#1.offset;havoc main_#t~ret183#1.base, main_#t~ret183#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~17#1.base, main_~tmp~17#1.offset;assume { :begin_inline_ldv_initialize } true; {57133#true} is VALID [2022-02-20 22:07:29,684 INFO L290 TraceCheckUtils]: 18: Hoare triple {57133#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1; {57133#true} is VALID [2022-02-20 22:07:29,684 INFO L290 TraceCheckUtils]: 19: Hoare triple {57133#true} assume -2147483648 <= main_#t~nondet184#1 && main_#t~nondet184#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet184#1;havoc main_#t~nondet184#1;main_#t~switch185#1 := 0 == main_~tmp___0~6#1; {57133#true} is VALID [2022-02-20 22:07:29,685 INFO L290 TraceCheckUtils]: 20: Hoare triple {57133#true} assume !main_#t~switch185#1;main_#t~switch185#1 := main_#t~switch185#1 || 1 == main_~tmp___0~6#1; {57133#true} is VALID [2022-02-20 22:07:29,685 INFO L290 TraceCheckUtils]: 21: Hoare triple {57133#true} assume main_#t~switch185#1; {57133#true} is VALID [2022-02-20 22:07:29,685 INFO L290 TraceCheckUtils]: 22: Hoare triple {57133#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet189#1 && main_#t~nondet189#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet189#1;havoc main_#t~nondet189#1;main_#t~switch190#1 := 0 == main_~tmp___2~1#1; {57133#true} is VALID [2022-02-20 22:07:29,685 INFO L290 TraceCheckUtils]: 23: Hoare triple {57133#true} assume !main_#t~switch190#1;main_#t~switch190#1 := main_#t~switch190#1 || 1 == main_~tmp___2~1#1; {57133#true} is VALID [2022-02-20 22:07:29,685 INFO L290 TraceCheckUtils]: 24: Hoare triple {57133#true} assume main_#t~switch190#1; {57133#true} is VALID [2022-02-20 22:07:29,685 INFO L290 TraceCheckUtils]: 25: Hoare triple {57133#true} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_usb_acecad_init } true;havoc usb_acecad_init_#res#1;havoc usb_acecad_init_#t~ret180#1, usb_acecad_init_#t~nondet181#1, usb_acecad_init_~result~0#1, usb_acecad_init_~tmp~15#1;havoc usb_acecad_init_~result~0#1;havoc usb_acecad_init_~tmp~15#1;assume { :begin_inline_usb_register } true;usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc usb_register_#res#1;havoc usb_register_#t~ret31#1, usb_register_~driver#1.base, usb_register_~driver#1.offset, usb_register_~tmp~1#1;usb_register_~driver#1.base, usb_register_~driver#1.offset := usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset;havoc usb_register_~tmp~1#1;assume { :begin_inline_ldv_usb_register_driver_2 } true;ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset := usb_register_~driver#1.base, usb_register_~driver#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 4, 0;havoc ldv_usb_register_driver_2_#res#1;havoc ldv_usb_register_driver_2_#t~ret193#1, ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset, ldv_usb_register_driver_2_~ldv_func_res~0#1, ldv_usb_register_driver_2_~tmp~19#1;ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_2_~ldv_func_res~0#1;havoc ldv_usb_register_driver_2_~tmp~19#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet213#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet213#1 && usb_register_driver_#t~nondet213#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet213#1;havoc usb_register_driver_#t~nondet213#1; {57133#true} is VALID [2022-02-20 22:07:29,685 INFO L290 TraceCheckUtils]: 26: Hoare triple {57133#true} ldv_usb_register_driver_2_#t~ret193#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_2_#t~ret193#1 && ldv_usb_register_driver_2_#t~ret193#1 <= 2147483647;ldv_usb_register_driver_2_~tmp~19#1 := ldv_usb_register_driver_2_#t~ret193#1;havoc ldv_usb_register_driver_2_#t~ret193#1;ldv_usb_register_driver_2_~ldv_func_res~0#1 := ldv_usb_register_driver_2_~tmp~19#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset, ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset;havoc ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {57133#true} is VALID [2022-02-20 22:07:29,686 INFO L272 TraceCheckUtils]: 27: Hoare triple {57133#true} call ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset := ldv_init_zalloc(1248); {57220#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:29,686 INFO L290 TraceCheckUtils]: 28: Hoare triple {57220#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {57133#true} is VALID [2022-02-20 22:07:29,687 INFO L272 TraceCheckUtils]: 29: Hoare triple {57133#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {57228#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:29,688 INFO L290 TraceCheckUtils]: 30: Hoare triple {57228#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {57133#true} is VALID [2022-02-20 22:07:29,688 INFO L290 TraceCheckUtils]: 31: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:29,688 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {57133#true} {57133#true} #538#return; {57133#true} is VALID [2022-02-20 22:07:29,688 INFO L290 TraceCheckUtils]: 33: Hoare triple {57133#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {57133#true} is VALID [2022-02-20 22:07:29,688 INFO L272 TraceCheckUtils]: 34: Hoare triple {57133#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {57133#true} is VALID [2022-02-20 22:07:29,688 INFO L290 TraceCheckUtils]: 35: Hoare triple {57133#true} ~cond := #in~cond; {57133#true} is VALID [2022-02-20 22:07:29,688 INFO L290 TraceCheckUtils]: 36: Hoare triple {57133#true} assume !(0 == ~cond); {57133#true} is VALID [2022-02-20 22:07:29,688 INFO L290 TraceCheckUtils]: 37: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:29,689 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {57133#true} {57133#true} #540#return; {57133#true} is VALID [2022-02-20 22:07:29,689 INFO L290 TraceCheckUtils]: 39: Hoare triple {57133#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {57133#true} is VALID [2022-02-20 22:07:29,689 INFO L290 TraceCheckUtils]: 40: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:29,689 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {57133#true} {57133#true} #600#return; {57133#true} is VALID [2022-02-20 22:07:29,689 INFO L290 TraceCheckUtils]: 42: Hoare triple {57133#true} ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset := ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset;havoc ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {57133#true} is VALID [2022-02-20 22:07:29,689 INFO L290 TraceCheckUtils]: 43: Hoare triple {57133#true} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_2_#res#1 := ldv_usb_register_driver_2_~ldv_func_res~0#1; {57133#true} is VALID [2022-02-20 22:07:29,689 INFO L290 TraceCheckUtils]: 44: Hoare triple {57133#true} usb_register_#t~ret31#1 := ldv_usb_register_driver_2_#res#1;assume { :end_inline_ldv_usb_register_driver_2 } true;assume -2147483648 <= usb_register_#t~ret31#1 && usb_register_#t~ret31#1 <= 2147483647;usb_register_~tmp~1#1 := usb_register_#t~ret31#1;havoc usb_register_#t~ret31#1;usb_register_#res#1 := usb_register_~tmp~1#1; {57133#true} is VALID [2022-02-20 22:07:29,690 INFO L290 TraceCheckUtils]: 45: Hoare triple {57133#true} usb_acecad_init_#t~ret180#1 := usb_register_#res#1;assume { :end_inline_usb_register } true;assume -2147483648 <= usb_acecad_init_#t~ret180#1 && usb_acecad_init_#t~ret180#1 <= 2147483647;usb_acecad_init_~tmp~15#1 := usb_acecad_init_#t~ret180#1;havoc usb_acecad_init_#t~ret180#1;usb_acecad_init_~result~0#1 := usb_acecad_init_~tmp~15#1; {57133#true} is VALID [2022-02-20 22:07:29,690 INFO L290 TraceCheckUtils]: 46: Hoare triple {57133#true} assume 0 == usb_acecad_init_~result~0#1;havoc usb_acecad_init_#t~nondet181#1; {57133#true} is VALID [2022-02-20 22:07:29,690 INFO L290 TraceCheckUtils]: 47: Hoare triple {57133#true} usb_acecad_init_#res#1 := usb_acecad_init_~result~0#1; {57133#true} is VALID [2022-02-20 22:07:29,690 INFO L290 TraceCheckUtils]: 48: Hoare triple {57133#true} main_#t~ret191#1 := usb_acecad_init_#res#1;assume { :end_inline_usb_acecad_init } true;assume -2147483648 <= main_#t~ret191#1 && main_#t~ret191#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret191#1;havoc main_#t~ret191#1; {57133#true} is VALID [2022-02-20 22:07:29,690 INFO L290 TraceCheckUtils]: 49: Hoare triple {57133#true} assume 0 == ~ldv_retval_1~0;~ldv_state_variable_0~0 := 3; {57133#true} is VALID [2022-02-20 22:07:29,690 INFO L290 TraceCheckUtils]: 50: Hoare triple {57133#true} assume !(0 != ~ldv_retval_1~0); {57133#true} is VALID [2022-02-20 22:07:29,690 INFO L290 TraceCheckUtils]: 51: Hoare triple {57133#true} assume -2147483648 <= main_#t~nondet184#1 && main_#t~nondet184#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet184#1;havoc main_#t~nondet184#1;main_#t~switch185#1 := 0 == main_~tmp___0~6#1; {57133#true} is VALID [2022-02-20 22:07:29,690 INFO L290 TraceCheckUtils]: 52: Hoare triple {57133#true} assume main_#t~switch185#1; {57133#true} is VALID [2022-02-20 22:07:29,691 INFO L290 TraceCheckUtils]: 53: Hoare triple {57133#true} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= main_#t~nondet186#1 && main_#t~nondet186#1 <= 2147483647;main_~tmp___1~3#1 := main_#t~nondet186#1;havoc main_#t~nondet186#1;main_#t~switch187#1 := 0 == main_~tmp___1~3#1; {57133#true} is VALID [2022-02-20 22:07:29,691 INFO L290 TraceCheckUtils]: 54: Hoare triple {57133#true} assume main_#t~switch187#1; {57133#true} is VALID [2022-02-20 22:07:29,691 INFO L290 TraceCheckUtils]: 55: Hoare triple {57133#true} assume 1 == ~ldv_state_variable_1~0;assume { :begin_inline_usb_acecad_probe } true;usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset, usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset := ~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc usb_acecad_probe_#res#1;havoc usb_acecad_probe_#t~ret127#1.base, usb_acecad_probe_#t~ret127#1.offset, usb_acecad_probe_#t~mem128#1.base, usb_acecad_probe_#t~mem128#1.offset, usb_acecad_probe_#t~mem129#1, usb_acecad_probe_#t~mem130#1.base, usb_acecad_probe_#t~mem130#1.offset, usb_acecad_probe_#t~ret131#1, usb_acecad_probe_#t~mem132#1, usb_acecad_probe_#t~ret133#1, usb_acecad_probe_#t~ret134#1, usb_acecad_probe_#t~ret135#1.base, usb_acecad_probe_#t~ret135#1.offset, usb_acecad_probe_#t~ret136#1.base, usb_acecad_probe_#t~ret136#1.offset, usb_acecad_probe_#t~ret137#1.base, usb_acecad_probe_#t~ret137#1.offset, usb_acecad_probe_#t~mem138#1.base, usb_acecad_probe_#t~mem138#1.offset, usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset, usb_acecad_probe_#t~mem140#1.base, usb_acecad_probe_#t~mem140#1.offset, usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset, usb_acecad_probe_#t~mem142#1.base, usb_acecad_probe_#t~mem142#1.offset, usb_acecad_probe_#t~ret143#1, usb_acecad_probe_#t~mem144#1.base, usb_acecad_probe_#t~mem144#1.offset, usb_acecad_probe_#t~mem145#1.base, usb_acecad_probe_#t~mem145#1.offset, usb_acecad_probe_#t~ret146#1, usb_acecad_probe_#t~mem147#1.base, usb_acecad_probe_#t~mem147#1.offset, usb_acecad_probe_#t~ret148#1, usb_acecad_probe_#t~ret149#1, usb_acecad_probe_#t~ret150#1, usb_acecad_probe_#t~mem151#1, usb_acecad_probe_#t~switch152#1, usb_acecad_probe_#t~nondet153#1, usb_acecad_probe_#t~nondet154#1, usb_acecad_probe_#t~mem155#1, usb_acecad_probe_#t~mem156#1, usb_acecad_probe_#t~nondet157#1, usb_acecad_probe_#t~nondet158#1, usb_acecad_probe_#t~mem159#1, usb_acecad_probe_#t~mem160#1, usb_acecad_probe_#t~mem161#1.base, usb_acecad_probe_#t~mem161#1.offset, usb_acecad_probe_#t~mem162#1.base, usb_acecad_probe_#t~mem162#1.offset, usb_acecad_probe_#t~ite163#1, usb_acecad_probe_#t~mem164#1, usb_acecad_probe_#t~mem165#1.base, usb_acecad_probe_#t~mem165#1.offset, usb_acecad_probe_#t~mem166#1, usb_acecad_probe_#t~mem167#1.base, usb_acecad_probe_#t~mem167#1.offset, usb_acecad_probe_#t~mem168#1.base, usb_acecad_probe_#t~mem168#1.offset, usb_acecad_probe_#t~mem169#1, usb_acecad_probe_#t~mem170#1.base, usb_acecad_probe_#t~mem170#1.offset, usb_acecad_probe_#t~ret171#1, usb_acecad_probe_#t~mem172#1.base, usb_acecad_probe_#t~mem172#1.offset, usb_acecad_probe_#t~mem173#1, usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset, usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset, usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset, usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset, usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset, usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset, usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset, usb_acecad_probe_~pipe~0#1, usb_acecad_probe_~maxp~0#1, usb_acecad_probe_~err~0#1, usb_acecad_probe_~tmp___0~5#1, usb_acecad_probe_~tmp___1~2#1, usb_acecad_probe_~tmp___2~0#1, usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset, usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~tmp___5~0#1, usb_acecad_probe_~tmp___6~0#1;usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset := usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset;usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset := usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset;havoc usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset;havoc usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;havoc usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset;havoc usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset;havoc usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset;havoc usb_acecad_probe_~pipe~0#1;havoc usb_acecad_probe_~maxp~0#1;havoc usb_acecad_probe_~err~0#1;havoc usb_acecad_probe_~tmp___0~5#1;havoc usb_acecad_probe_~tmp___1~2#1;havoc usb_acecad_probe_~tmp___2~0#1;havoc usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;havoc usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset;havoc usb_acecad_probe_~tmp___5~0#1;havoc usb_acecad_probe_~tmp___6~0#1;assume { :begin_inline_interface_to_usbdev } true;interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset := usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset;havoc interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;havoc interface_to_usbdev_#t~ret192#1.base, interface_to_usbdev_#t~ret192#1.offset, interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset, interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset := interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset;havoc interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;assume { :begin_inline_ldv_interface_to_usbdev } true;havoc ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;havoc ldv_interface_to_usbdev_#t~ret203#1.base, ldv_interface_to_usbdev_#t~ret203#1.offset, ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset, ldv_interface_to_usbdev_~tmp~26#1.base, ldv_interface_to_usbdev_~tmp~26#1.offset;havoc ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset;havoc ldv_interface_to_usbdev_~tmp~26#1.base, ldv_interface_to_usbdev_~tmp~26#1.offset; {57133#true} is VALID [2022-02-20 22:07:29,692 INFO L272 TraceCheckUtils]: 56: Hoare triple {57133#true} call ldv_interface_to_usbdev_#t~ret203#1.base, ldv_interface_to_usbdev_#t~ret203#1.offset := ldv_malloc(1822); {57236#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:29,692 INFO L290 TraceCheckUtils]: 57: Hoare triple {57236#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {57133#true} is VALID [2022-02-20 22:07:29,692 INFO L290 TraceCheckUtils]: 58: Hoare triple {57133#true} assume !(0 != ~tmp___0~2);call #t~malloc60.base, #t~malloc60.offset := #Ultimate.allocOnHeap(~size);~tmp~4.base, ~tmp~4.offset := #t~malloc60.base, #t~malloc60.offset;havoc #t~malloc60.base, #t~malloc60.offset;~p~0.base, ~p~0.offset := ~tmp~4.base, ~tmp~4.offset; {57133#true} is VALID [2022-02-20 22:07:29,692 INFO L272 TraceCheckUtils]: 59: Hoare triple {57133#true} call assume_abort_if_not((if 0 != (~p~0.base + ~p~0.offset) % 18446744073709551616 then 1 else 0)); {57133#true} is VALID [2022-02-20 22:07:29,692 INFO L290 TraceCheckUtils]: 60: Hoare triple {57133#true} ~cond := #in~cond; {57133#true} is VALID [2022-02-20 22:07:29,693 INFO L290 TraceCheckUtils]: 61: Hoare triple {57133#true} assume !(0 == ~cond); {57133#true} is VALID [2022-02-20 22:07:29,693 INFO L290 TraceCheckUtils]: 62: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:29,693 INFO L284 TraceCheckUtils]: 63: Hoare quadruple {57133#true} {57133#true} #542#return; {57133#true} is VALID [2022-02-20 22:07:29,693 INFO L290 TraceCheckUtils]: 64: Hoare triple {57133#true} #res.base, #res.offset := ~p~0.base, ~p~0.offset; {57133#true} is VALID [2022-02-20 22:07:29,693 INFO L290 TraceCheckUtils]: 65: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:29,693 INFO L284 TraceCheckUtils]: 66: Hoare quadruple {57133#true} {57133#true} #546#return; {57133#true} is VALID [2022-02-20 22:07:29,693 INFO L290 TraceCheckUtils]: 67: Hoare triple {57133#true} ldv_interface_to_usbdev_~tmp~26#1.base, ldv_interface_to_usbdev_~tmp~26#1.offset := ldv_interface_to_usbdev_#t~ret203#1.base, ldv_interface_to_usbdev_#t~ret203#1.offset;havoc ldv_interface_to_usbdev_#t~ret203#1.base, ldv_interface_to_usbdev_#t~ret203#1.offset;ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset := ldv_interface_to_usbdev_~tmp~26#1.base, ldv_interface_to_usbdev_~tmp~26#1.offset; {57133#true} is VALID [2022-02-20 22:07:29,694 INFO L290 TraceCheckUtils]: 68: Hoare triple {57133#true} assume !(0 == (ldv_interface_to_usbdev_~result~1#1.base + ldv_interface_to_usbdev_~result~1#1.offset) % 18446744073709551616); {57133#true} is VALID [2022-02-20 22:07:29,694 INFO L290 TraceCheckUtils]: 69: Hoare triple {57133#true} ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset := ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset; {57133#true} is VALID [2022-02-20 22:07:29,694 INFO L290 TraceCheckUtils]: 70: Hoare triple {57133#true} interface_to_usbdev_#t~ret192#1.base, interface_to_usbdev_#t~ret192#1.offset := ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;assume { :end_inline_ldv_interface_to_usbdev } true;interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset := interface_to_usbdev_#t~ret192#1.base, interface_to_usbdev_#t~ret192#1.offset;havoc interface_to_usbdev_#t~ret192#1.base, interface_to_usbdev_#t~ret192#1.offset;interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset := interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset; {57133#true} is VALID [2022-02-20 22:07:29,694 INFO L290 TraceCheckUtils]: 71: Hoare triple {57133#true} usb_acecad_probe_#t~ret127#1.base, usb_acecad_probe_#t~ret127#1.offset := interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;assume { :end_inline_interface_to_usbdev } true;usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset := usb_acecad_probe_#t~ret127#1.base, usb_acecad_probe_#t~ret127#1.offset;havoc usb_acecad_probe_#t~ret127#1.base, usb_acecad_probe_#t~ret127#1.offset;usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset := usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;call usb_acecad_probe_#t~mem128#1.base, usb_acecad_probe_#t~mem128#1.offset := read~$Pointer$(usb_acecad_probe_~intf#1.base, 8 + usb_acecad_probe_~intf#1.offset, 8);usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset := usb_acecad_probe_#t~mem128#1.base, usb_acecad_probe_#t~mem128#1.offset;havoc usb_acecad_probe_#t~mem128#1.base, usb_acecad_probe_#t~mem128#1.offset;call usb_acecad_probe_#t~mem129#1 := read~int(usb_acecad_probe_~interface~0#1.base, 4 + usb_acecad_probe_~interface~0#1.offset, 1); {57133#true} is VALID [2022-02-20 22:07:29,694 INFO L290 TraceCheckUtils]: 72: Hoare triple {57133#true} assume !(1 != usb_acecad_probe_#t~mem129#1 % 256 % 4294967296);havoc usb_acecad_probe_#t~mem129#1;call usb_acecad_probe_#t~mem130#1.base, usb_acecad_probe_#t~mem130#1.offset := read~$Pointer$(usb_acecad_probe_~interface~0#1.base, 9 + usb_acecad_probe_~interface~0#1.offset, 8);usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset := usb_acecad_probe_#t~mem130#1.base, usb_acecad_probe_#t~mem130#1.offset;havoc usb_acecad_probe_#t~mem130#1.base, usb_acecad_probe_#t~mem130#1.offset;assume { :begin_inline_usb_endpoint_is_int_in } true;usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset := usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_endpoint_is_int_in_#res#1;havoc usb_endpoint_is_int_in_#t~ret3#1, usb_endpoint_is_int_in_#t~ret4#1, usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset, usb_endpoint_is_int_in_~tmp~0#1, usb_endpoint_is_int_in_~tmp___0~0#1, usb_endpoint_is_int_in_~tmp___1~0#1;usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset := usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset;havoc usb_endpoint_is_int_in_~tmp~0#1;havoc usb_endpoint_is_int_in_~tmp___0~0#1;havoc usb_endpoint_is_int_in_~tmp___1~0#1;assume { :begin_inline_usb_endpoint_xfer_int } true;usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset := usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset;havoc usb_endpoint_xfer_int_#res#1;havoc usb_endpoint_xfer_int_#t~mem2#1, usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset;usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset := usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset;call usb_endpoint_xfer_int_#t~mem2#1 := read~int(usb_endpoint_xfer_int_~epd#1.base, 3 + usb_endpoint_xfer_int_~epd#1.offset, 1);usb_endpoint_xfer_int_#res#1 := (if 3 == (if 0 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 0 else (if 1 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 1 else ~bitwiseAnd(usb_endpoint_xfer_int_#t~mem2#1 % 256, 3))) then 1 else 0);havoc usb_endpoint_xfer_int_#t~mem2#1; {57133#true} is VALID [2022-02-20 22:07:29,694 INFO L290 TraceCheckUtils]: 73: Hoare triple {57133#true} usb_endpoint_is_int_in_#t~ret3#1 := usb_endpoint_xfer_int_#res#1;assume { :end_inline_usb_endpoint_xfer_int } true;assume -2147483648 <= usb_endpoint_is_int_in_#t~ret3#1 && usb_endpoint_is_int_in_#t~ret3#1 <= 2147483647;usb_endpoint_is_int_in_~tmp~0#1 := usb_endpoint_is_int_in_#t~ret3#1;havoc usb_endpoint_is_int_in_#t~ret3#1; {57133#true} is VALID [2022-02-20 22:07:29,694 INFO L290 TraceCheckUtils]: 74: Hoare triple {57133#true} assume 0 != usb_endpoint_is_int_in_~tmp~0#1;assume { :begin_inline_usb_endpoint_dir_in } true;usb_endpoint_dir_in_#in~epd#1.base, usb_endpoint_dir_in_#in~epd#1.offset := usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset;havoc usb_endpoint_dir_in_#res#1;havoc usb_endpoint_dir_in_#t~mem1#1, usb_endpoint_dir_in_~epd#1.base, usb_endpoint_dir_in_~epd#1.offset;usb_endpoint_dir_in_~epd#1.base, usb_endpoint_dir_in_~epd#1.offset := usb_endpoint_dir_in_#in~epd#1.base, usb_endpoint_dir_in_#in~epd#1.offset;call usb_endpoint_dir_in_#t~mem1#1 := read~int(usb_endpoint_dir_in_~epd#1.base, 2 + usb_endpoint_dir_in_~epd#1.offset, 1);usb_endpoint_dir_in_#res#1 := (if (if usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 <= 127 then usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 else usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 - 256) < 0 then 1 else 0);havoc usb_endpoint_dir_in_#t~mem1#1; {57133#true} is VALID [2022-02-20 22:07:29,695 INFO L290 TraceCheckUtils]: 75: Hoare triple {57133#true} usb_endpoint_is_int_in_#t~ret4#1 := usb_endpoint_dir_in_#res#1;assume { :end_inline_usb_endpoint_dir_in } true;assume -2147483648 <= usb_endpoint_is_int_in_#t~ret4#1 && usb_endpoint_is_int_in_#t~ret4#1 <= 2147483647;usb_endpoint_is_int_in_~tmp___0~0#1 := usb_endpoint_is_int_in_#t~ret4#1;havoc usb_endpoint_is_int_in_#t~ret4#1; {57133#true} is VALID [2022-02-20 22:07:29,695 INFO L290 TraceCheckUtils]: 76: Hoare triple {57133#true} assume 0 != usb_endpoint_is_int_in_~tmp___0~0#1;usb_endpoint_is_int_in_~tmp___1~0#1 := 1; {57133#true} is VALID [2022-02-20 22:07:29,695 INFO L290 TraceCheckUtils]: 77: Hoare triple {57133#true} usb_endpoint_is_int_in_#res#1 := usb_endpoint_is_int_in_~tmp___1~0#1; {57133#true} is VALID [2022-02-20 22:07:29,695 INFO L290 TraceCheckUtils]: 78: Hoare triple {57133#true} usb_acecad_probe_#t~ret131#1 := usb_endpoint_is_int_in_#res#1;assume { :end_inline_usb_endpoint_is_int_in } true;assume -2147483648 <= usb_acecad_probe_#t~ret131#1 && usb_acecad_probe_#t~ret131#1 <= 2147483647;usb_acecad_probe_~tmp___0~5#1 := usb_acecad_probe_#t~ret131#1;havoc usb_acecad_probe_#t~ret131#1; {57133#true} is VALID [2022-02-20 22:07:29,695 INFO L290 TraceCheckUtils]: 79: Hoare triple {57133#true} assume !(0 == usb_acecad_probe_~tmp___0~5#1);call usb_acecad_probe_#t~mem132#1 := read~int(usb_acecad_probe_~endpoint~0#1.base, 2 + usb_acecad_probe_~endpoint~0#1.offset, 1);assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_#t~mem132#1 % 256;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem42#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem42#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := (if (1 == 256 * __create_pipe_#t~mem42#1 || 0 == 256 * __create_pipe_#t~mem42#1) && 0 == 32768 * __create_pipe_~endpoint#1 then 256 * __create_pipe_#t~mem42#1 else (if 0 == 256 * __create_pipe_#t~mem42#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1) then 32768 * __create_pipe_~endpoint#1 else (if (1 == 256 * __create_pipe_#t~mem42#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1)) || ((1 == 256 * __create_pipe_#t~mem42#1 || 0 == 256 * __create_pipe_#t~mem42#1) && 1 == 32768 * __create_pipe_~endpoint#1) then 1 else ~bitwiseOr(256 * __create_pipe_#t~mem42#1, 32768 * __create_pipe_~endpoint#1))));havoc __create_pipe_#t~mem42#1; {57133#true} is VALID [2022-02-20 22:07:29,695 INFO L290 TraceCheckUtils]: 80: Hoare triple {57133#true} usb_acecad_probe_#t~ret133#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;usb_acecad_probe_~tmp___1~2#1 := usb_acecad_probe_#t~ret133#1;havoc usb_acecad_probe_#t~mem132#1;havoc usb_acecad_probe_#t~ret133#1;usb_acecad_probe_~pipe~0#1 := (if ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 else ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 - 4294967296);assume { :begin_inline_usb_maxpacket } true;usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset, usb_maxpacket_#in~pipe#1, usb_maxpacket_#in~is_out#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~pipe~0#1, (if 0 == (if 0 == usb_acecad_probe_~pipe~0#1 then 0 else (if 1 == usb_acecad_probe_~pipe~0#1 then 0 else ~bitwiseAnd(usb_acecad_probe_~pipe~0#1, 128))) then 1 else 0);havoc usb_maxpacket_#res#1;havoc usb_maxpacket_#t~ret44#1, usb_maxpacket_#t~ret45#1, usb_maxpacket_#t~mem46#1.base, usb_maxpacket_#t~mem46#1.offset, usb_maxpacket_#t~ret47#1, usb_maxpacket_#t~ret48#1, usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset, usb_maxpacket_#t~mem50#1, usb_maxpacket_#t~nondet43#1, usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset, usb_maxpacket_~pipe#1, usb_maxpacket_~is_out#1, usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset, usb_maxpacket_~epnum~0#1, usb_maxpacket_~__ret_warn_on~0#1, usb_maxpacket_~tmp~2#1, usb_maxpacket_~__ret_warn_on___0~0#1, usb_maxpacket_~tmp___0~1#1;usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset := usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset;usb_maxpacket_~pipe#1 := usb_maxpacket_#in~pipe#1;usb_maxpacket_~is_out#1 := usb_maxpacket_#in~is_out#1;havoc usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset;havoc usb_maxpacket_~epnum~0#1;havoc usb_maxpacket_~__ret_warn_on~0#1;havoc usb_maxpacket_~tmp~2#1;havoc usb_maxpacket_~__ret_warn_on___0~0#1;havoc usb_maxpacket_~tmp___0~1#1; {57133#true} is VALID [2022-02-20 22:07:29,695 INFO L290 TraceCheckUtils]: 81: Hoare triple {57133#true} assume 0 == usb_maxpacket_~pipe#1 / 32768;usb_maxpacket_~epnum~0#1 := 0; {57133#true} is VALID [2022-02-20 22:07:29,696 INFO L290 TraceCheckUtils]: 82: Hoare triple {57133#true} assume !(0 != usb_maxpacket_~is_out#1);usb_maxpacket_~__ret_warn_on___0~0#1 := (if 0 == (if 0 == usb_maxpacket_~pipe#1 then 0 else (if 1 == usb_maxpacket_~pipe#1 then 0 else ~bitwiseAnd(usb_maxpacket_~pipe#1, 128))) then 1 else 0); {57133#true} is VALID [2022-02-20 22:07:29,696 INFO L272 TraceCheckUtils]: 83: Hoare triple {57133#true} call usb_maxpacket_#t~ret47#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {57133#true} is VALID [2022-02-20 22:07:29,696 INFO L290 TraceCheckUtils]: 84: Hoare triple {57133#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {57133#true} is VALID [2022-02-20 22:07:29,696 INFO L290 TraceCheckUtils]: 85: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:29,696 INFO L284 TraceCheckUtils]: 86: Hoare quadruple {57133#true} {57133#true} #556#return; {57133#true} is VALID [2022-02-20 22:07:29,696 INFO L290 TraceCheckUtils]: 87: Hoare triple {57133#true} assume -9223372036854775808 <= usb_maxpacket_#t~ret47#1 && usb_maxpacket_#t~ret47#1 <= 9223372036854775807;usb_maxpacket_~tmp___0~1#1 := usb_maxpacket_#t~ret47#1;havoc usb_maxpacket_#t~ret47#1; {57133#true} is VALID [2022-02-20 22:07:29,696 INFO L290 TraceCheckUtils]: 88: Hoare triple {57133#true} assume !(0 != usb_maxpacket_~tmp___0~1#1); {57133#true} is VALID [2022-02-20 22:07:29,696 INFO L272 TraceCheckUtils]: 89: Hoare triple {57133#true} call usb_maxpacket_#t~ret48#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {57133#true} is VALID [2022-02-20 22:07:29,697 INFO L290 TraceCheckUtils]: 90: Hoare triple {57133#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {57133#true} is VALID [2022-02-20 22:07:29,697 INFO L290 TraceCheckUtils]: 91: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:29,697 INFO L284 TraceCheckUtils]: 92: Hoare quadruple {57133#true} {57133#true} #560#return; {57133#true} is VALID [2022-02-20 22:07:29,697 INFO L290 TraceCheckUtils]: 93: Hoare triple {57133#true} assume -9223372036854775808 <= usb_maxpacket_#t~ret48#1 && usb_maxpacket_#t~ret48#1 <= 9223372036854775807;havoc usb_maxpacket_#t~ret48#1;call usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset := read~$Pointer$(usb_maxpacket_~udev#1.base, 1186 + usb_maxpacket_~udev#1.offset + 8 * (usb_maxpacket_~epnum~0#1 % 4294967296), 8);usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset := usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset;havoc usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset; {57133#true} is VALID [2022-02-20 22:07:29,697 INFO L290 TraceCheckUtils]: 94: Hoare triple {57133#true} assume 0 == (usb_maxpacket_~ep~0#1.base + usb_maxpacket_~ep~0#1.offset) % 18446744073709551616;usb_maxpacket_#res#1 := 0; {57133#true} is VALID [2022-02-20 22:07:29,697 INFO L290 TraceCheckUtils]: 95: Hoare triple {57133#true} usb_acecad_probe_#t~ret134#1 := usb_maxpacket_#res#1;assume { :end_inline_usb_maxpacket } true;usb_acecad_probe_~tmp___2~0#1 := usb_acecad_probe_#t~ret134#1;havoc usb_acecad_probe_#t~ret134#1;usb_acecad_probe_~maxp~0#1 := usb_acecad_probe_~tmp___2~0#1 % 65536; {57133#true} is VALID [2022-02-20 22:07:29,698 INFO L272 TraceCheckUtils]: 96: Hoare triple {57133#true} call usb_acecad_probe_#t~ret135#1.base, usb_acecad_probe_#t~ret135#1.offset := kzalloc(232, 208); {57236#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:29,698 INFO L290 TraceCheckUtils]: 97: Hoare triple {57236#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {57133#true} is VALID [2022-02-20 22:07:29,699 INFO L272 TraceCheckUtils]: 98: Hoare triple {57133#true} call __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset := ldv_malloc(__kmalloc_~size#1); {57236#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:29,699 INFO L290 TraceCheckUtils]: 99: Hoare triple {57236#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {57133#true} is VALID [2022-02-20 22:07:29,700 INFO L290 TraceCheckUtils]: 100: Hoare triple {57133#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {57249#(and (= |ldv_malloc_#res.base| 0) (= |ldv_malloc_#res.offset| 0))} is VALID [2022-02-20 22:07:29,700 INFO L290 TraceCheckUtils]: 101: Hoare triple {57249#(and (= |ldv_malloc_#res.base| 0) (= |ldv_malloc_#res.offset| 0))} assume true; {57249#(and (= |ldv_malloc_#res.base| 0) (= |ldv_malloc_#res.offset| 0))} is VALID [2022-02-20 22:07:29,701 INFO L284 TraceCheckUtils]: 102: Hoare quadruple {57249#(and (= |ldv_malloc_#res.base| 0) (= |ldv_malloc_#res.offset| 0))} {57133#true} #530#return; {57245#(and (= |kzalloc___kmalloc_#t~ret53#1.base| 0) (= |kzalloc___kmalloc_#t~ret53#1.offset| 0))} is VALID [2022-02-20 22:07:29,701 INFO L290 TraceCheckUtils]: 103: Hoare triple {57245#(and (= |kzalloc___kmalloc_#t~ret53#1.base| 0) (= |kzalloc___kmalloc_#t~ret53#1.offset| 0))} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset; {57246#(and (= 0 |kzalloc___kmalloc_#res#1.offset|) (= |kzalloc___kmalloc_#res#1.base| 0))} is VALID [2022-02-20 22:07:29,702 INFO L290 TraceCheckUtils]: 104: Hoare triple {57246#(and (= 0 |kzalloc___kmalloc_#res#1.offset|) (= |kzalloc___kmalloc_#res#1.base| 0))} kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {57247#(and (= |kzalloc_kmalloc_#res#1.offset| 0) (= |kzalloc_kmalloc_#res#1.base| 0))} is VALID [2022-02-20 22:07:29,702 INFO L290 TraceCheckUtils]: 105: Hoare triple {57247#(and (= |kzalloc_kmalloc_#res#1.offset| 0) (= |kzalloc_kmalloc_#res#1.base| 0))} #t~ret55#1.base, #t~ret55#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret55#1.base, #t~ret55#1.offset;havoc #t~ret55#1.base, #t~ret55#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {57248#(and (= |kzalloc_#res#1.offset| 0) (= |kzalloc_#res#1.base| 0))} is VALID [2022-02-20 22:07:29,703 INFO L290 TraceCheckUtils]: 106: Hoare triple {57248#(and (= |kzalloc_#res#1.offset| 0) (= |kzalloc_#res#1.base| 0))} assume true; {57248#(and (= |kzalloc_#res#1.offset| 0) (= |kzalloc_#res#1.base| 0))} is VALID [2022-02-20 22:07:29,703 INFO L284 TraceCheckUtils]: 107: Hoare quadruple {57248#(and (= |kzalloc_#res#1.offset| 0) (= |kzalloc_#res#1.base| 0))} {57133#true} #562#return; {57190#(and (= |ULTIMATE.start_usb_acecad_probe_#t~ret135#1.offset| 0) (= |ULTIMATE.start_usb_acecad_probe_#t~ret135#1.base| 0))} is VALID [2022-02-20 22:07:29,704 INFO L290 TraceCheckUtils]: 108: Hoare triple {57190#(and (= |ULTIMATE.start_usb_acecad_probe_#t~ret135#1.offset| 0) (= |ULTIMATE.start_usb_acecad_probe_#t~ret135#1.base| 0))} usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset := usb_acecad_probe_#t~ret135#1.base, usb_acecad_probe_#t~ret135#1.offset;havoc usb_acecad_probe_#t~ret135#1.base, usb_acecad_probe_#t~ret135#1.offset;usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset := usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;assume { :begin_inline_input_allocate_device } true;havoc input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;havoc input_allocate_device_#t~ret67#1.base, input_allocate_device_#t~ret67#1.offset; {57191#(and (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.offset| 0) (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.base| 0))} is VALID [2022-02-20 22:07:29,705 INFO L272 TraceCheckUtils]: 109: Hoare triple {57191#(and (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.offset| 0) (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.base| 0))} call input_allocate_device_#t~ret67#1.base, input_allocate_device_#t~ret67#1.offset := kzalloc(1855, ~bitwiseOr(~bitwiseOr(16, 64), 128)); {57236#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:29,705 INFO L290 TraceCheckUtils]: 110: Hoare triple {57236#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {57133#true} is VALID [2022-02-20 22:07:29,705 INFO L272 TraceCheckUtils]: 111: Hoare triple {57133#true} call __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset := ldv_malloc(__kmalloc_~size#1); {57236#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:29,706 INFO L290 TraceCheckUtils]: 112: Hoare triple {57236#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {57133#true} is VALID [2022-02-20 22:07:29,706 INFO L290 TraceCheckUtils]: 113: Hoare triple {57133#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {57133#true} is VALID [2022-02-20 22:07:29,706 INFO L290 TraceCheckUtils]: 114: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:29,706 INFO L284 TraceCheckUtils]: 115: Hoare quadruple {57133#true} {57133#true} #530#return; {57133#true} is VALID [2022-02-20 22:07:29,706 INFO L290 TraceCheckUtils]: 116: Hoare triple {57133#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset; {57133#true} is VALID [2022-02-20 22:07:29,706 INFO L290 TraceCheckUtils]: 117: Hoare triple {57133#true} kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {57133#true} is VALID [2022-02-20 22:07:29,706 INFO L290 TraceCheckUtils]: 118: Hoare triple {57133#true} #t~ret55#1.base, #t~ret55#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret55#1.base, #t~ret55#1.offset;havoc #t~ret55#1.base, #t~ret55#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {57133#true} is VALID [2022-02-20 22:07:29,707 INFO L290 TraceCheckUtils]: 119: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:29,707 INFO L284 TraceCheckUtils]: 120: Hoare quadruple {57133#true} {57191#(and (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.offset| 0) (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.base| 0))} #564#return; {57191#(and (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.offset| 0) (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.base| 0))} is VALID [2022-02-20 22:07:29,708 INFO L290 TraceCheckUtils]: 121: Hoare triple {57191#(and (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.offset| 0) (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.base| 0))} input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset := input_allocate_device_#t~ret67#1.base, input_allocate_device_#t~ret67#1.offset;havoc input_allocate_device_#t~ret67#1.base, input_allocate_device_#t~ret67#1.offset; {57191#(and (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.offset| 0) (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.base| 0))} is VALID [2022-02-20 22:07:29,708 INFO L290 TraceCheckUtils]: 122: Hoare triple {57191#(and (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.offset| 0) (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.base| 0))} usb_acecad_probe_#t~ret136#1.base, usb_acecad_probe_#t~ret136#1.offset := input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;assume { :end_inline_input_allocate_device } true;usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset := usb_acecad_probe_#t~ret136#1.base, usb_acecad_probe_#t~ret136#1.offset;havoc usb_acecad_probe_#t~ret136#1.base, usb_acecad_probe_#t~ret136#1.offset; {57191#(and (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.offset| 0) (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.base| 0))} is VALID [2022-02-20 22:07:29,709 INFO L290 TraceCheckUtils]: 123: Hoare triple {57191#(and (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.offset| 0) (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.base| 0))} assume !(0 == (usb_acecad_probe_~acecad~3#1.base + usb_acecad_probe_~acecad~3#1.offset) % 18446744073709551616 || 0 == (usb_acecad_probe_~input_dev~0#1.base + usb_acecad_probe_~input_dev~0#1.offset) % 18446744073709551616);assume { :begin_inline_usb_alloc_coherent } true;usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset, usb_alloc_coherent_#in~arg1#1, usb_alloc_coherent_#in~arg2#1, usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, 8, 208, usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset;havoc usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;havoc usb_alloc_coherent_#t~ret212#1.base, usb_alloc_coherent_#t~ret212#1.offset, usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset, usb_alloc_coherent_~arg1#1, usb_alloc_coherent_~arg2#1, usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset;usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset := usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset;usb_alloc_coherent_~arg1#1 := usb_alloc_coherent_#in~arg1#1;usb_alloc_coherent_~arg2#1 := usb_alloc_coherent_#in~arg2#1;usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset := usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset; {57134#false} is VALID [2022-02-20 22:07:29,709 INFO L272 TraceCheckUtils]: 124: Hoare triple {57134#false} call usb_alloc_coherent_#t~ret212#1.base, usb_alloc_coherent_#t~ret212#1.offset := ldv_malloc(0); {57236#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:29,709 INFO L290 TraceCheckUtils]: 125: Hoare triple {57236#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {57133#true} is VALID [2022-02-20 22:07:29,709 INFO L290 TraceCheckUtils]: 126: Hoare triple {57133#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {57133#true} is VALID [2022-02-20 22:07:29,709 INFO L290 TraceCheckUtils]: 127: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:29,710 INFO L284 TraceCheckUtils]: 128: Hoare quadruple {57133#true} {57134#false} #566#return; {57134#false} is VALID [2022-02-20 22:07:29,710 INFO L290 TraceCheckUtils]: 129: Hoare triple {57134#false} usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset := usb_alloc_coherent_#t~ret212#1.base, usb_alloc_coherent_#t~ret212#1.offset;havoc usb_alloc_coherent_#t~ret212#1.base, usb_alloc_coherent_#t~ret212#1.offset; {57134#false} is VALID [2022-02-20 22:07:29,710 INFO L290 TraceCheckUtils]: 130: Hoare triple {57134#false} usb_acecad_probe_#t~ret137#1.base, usb_acecad_probe_#t~ret137#1.offset := usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;assume { :end_inline_usb_alloc_coherent } true;usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset := usb_acecad_probe_#t~ret137#1.base, usb_acecad_probe_#t~ret137#1.offset;havoc usb_acecad_probe_#t~ret137#1.base, usb_acecad_probe_#t~ret137#1.offset;call write~$Pointer$(usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem138#1.base, usb_acecad_probe_#t~mem138#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8); {57134#false} is VALID [2022-02-20 22:07:29,710 INFO L290 TraceCheckUtils]: 131: Hoare triple {57134#false} assume !(0 == (usb_acecad_probe_#t~mem138#1.base + usb_acecad_probe_#t~mem138#1.offset) % 18446744073709551616);havoc usb_acecad_probe_#t~mem138#1.base, usb_acecad_probe_#t~mem138#1.offset;assume { :begin_inline_ldv_usb_alloc_urb_5 } true;ldv_usb_alloc_urb_5_#in~iso_packets#1, ldv_usb_alloc_urb_5_#in~mem_flags#1 := 0, 208;havoc ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret196#1.base, ldv_usb_alloc_urb_5_#t~ret196#1.offset, ldv_usb_alloc_urb_5_~iso_packets#1, ldv_usb_alloc_urb_5_~mem_flags#1, ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;ldv_usb_alloc_urb_5_~iso_packets#1 := ldv_usb_alloc_urb_5_#in~iso_packets#1;ldv_usb_alloc_urb_5_~mem_flags#1 := ldv_usb_alloc_urb_5_#in~mem_flags#1;havoc ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;assume { :begin_inline_ldv_alloc_urb } true;havoc ldv_alloc_urb_#res#1.base, ldv_alloc_urb_#res#1.offset;havoc ldv_alloc_urb_#t~ret198#1.base, ldv_alloc_urb_#t~ret198#1.offset, ldv_alloc_urb_#t~ret199#1, ldv_alloc_urb_~value~0#1.base, ldv_alloc_urb_~value~0#1.offset, ldv_alloc_urb_~tmp~24#1.base, ldv_alloc_urb_~tmp~24#1.offset, ldv_alloc_urb_~tmp___0~7#1;havoc ldv_alloc_urb_~value~0#1.base, ldv_alloc_urb_~value~0#1.offset;havoc ldv_alloc_urb_~tmp~24#1.base, ldv_alloc_urb_~tmp~24#1.offset;havoc ldv_alloc_urb_~tmp___0~7#1; {57134#false} is VALID [2022-02-20 22:07:29,710 INFO L272 TraceCheckUtils]: 132: Hoare triple {57134#false} call ldv_alloc_urb_#t~ret198#1.base, ldv_alloc_urb_#t~ret198#1.offset := ldv_malloc(180); {57236#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:29,710 INFO L290 TraceCheckUtils]: 133: Hoare triple {57236#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {57133#true} is VALID [2022-02-20 22:07:29,710 INFO L290 TraceCheckUtils]: 134: Hoare triple {57133#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {57133#true} is VALID [2022-02-20 22:07:29,711 INFO L290 TraceCheckUtils]: 135: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:29,711 INFO L284 TraceCheckUtils]: 136: Hoare quadruple {57133#true} {57134#false} #568#return; {57134#false} is VALID [2022-02-20 22:07:29,711 INFO L290 TraceCheckUtils]: 137: Hoare triple {57134#false} ldv_alloc_urb_~tmp~24#1.base, ldv_alloc_urb_~tmp~24#1.offset := ldv_alloc_urb_#t~ret198#1.base, ldv_alloc_urb_#t~ret198#1.offset;havoc ldv_alloc_urb_#t~ret198#1.base, ldv_alloc_urb_#t~ret198#1.offset;ldv_alloc_urb_~value~0#1.base, ldv_alloc_urb_~value~0#1.offset := ldv_alloc_urb_~tmp~24#1.base, ldv_alloc_urb_~tmp~24#1.offset; {57134#false} is VALID [2022-02-20 22:07:29,711 INFO L272 TraceCheckUtils]: 138: Hoare triple {57134#false} call ldv_alloc_urb_#t~ret199#1 := ldv_undef_int(); {57133#true} is VALID [2022-02-20 22:07:29,711 INFO L290 TraceCheckUtils]: 139: Hoare triple {57133#true} havoc ~tmp~8;assume -2147483648 <= #t~nondet65 && #t~nondet65 <= 2147483647;~tmp~8 := #t~nondet65;havoc #t~nondet65;#res := ~tmp~8; {57133#true} is VALID [2022-02-20 22:07:29,711 INFO L290 TraceCheckUtils]: 140: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:29,711 INFO L284 TraceCheckUtils]: 141: Hoare quadruple {57133#true} {57134#false} #570#return; {57134#false} is VALID [2022-02-20 22:07:29,711 INFO L290 TraceCheckUtils]: 142: Hoare triple {57134#false} assume -2147483648 <= ldv_alloc_urb_#t~ret199#1 && ldv_alloc_urb_#t~ret199#1 <= 2147483647;ldv_alloc_urb_~tmp___0~7#1 := ldv_alloc_urb_#t~ret199#1;havoc ldv_alloc_urb_#t~ret199#1; {57134#false} is VALID [2022-02-20 22:07:29,712 INFO L290 TraceCheckUtils]: 143: Hoare triple {57134#false} assume 0 != ldv_alloc_urb_~tmp___0~7#1; {57134#false} is VALID [2022-02-20 22:07:29,712 INFO L290 TraceCheckUtils]: 144: Hoare triple {57134#false} assume 0 != (ldv_alloc_urb_~value~0#1.base + ldv_alloc_urb_~value~0#1.offset) % 18446744073709551616;~usb_urb~0.base, ~usb_urb~0.offset := ldv_alloc_urb_~value~0#1.base, ldv_alloc_urb_~value~0#1.offset; {57134#false} is VALID [2022-02-20 22:07:29,712 INFO L290 TraceCheckUtils]: 145: Hoare triple {57134#false} ldv_alloc_urb_#res#1.base, ldv_alloc_urb_#res#1.offset := ~usb_urb~0.base, ~usb_urb~0.offset; {57134#false} is VALID [2022-02-20 22:07:29,712 INFO L290 TraceCheckUtils]: 146: Hoare triple {57134#false} ldv_usb_alloc_urb_5_#t~ret196#1.base, ldv_usb_alloc_urb_5_#t~ret196#1.offset := ldv_alloc_urb_#res#1.base, ldv_alloc_urb_#res#1.offset;assume { :end_inline_ldv_alloc_urb } true;ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset := ldv_usb_alloc_urb_5_#t~ret196#1.base, ldv_usb_alloc_urb_5_#t~ret196#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret196#1.base, ldv_usb_alloc_urb_5_#t~ret196#1.offset;ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset := ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset; {57134#false} is VALID [2022-02-20 22:07:29,712 INFO L290 TraceCheckUtils]: 147: Hoare triple {57134#false} usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset := ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;assume { :end_inline_ldv_usb_alloc_urb_5 } true;call write~$Pointer$(usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset, usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8);havoc usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset;call usb_acecad_probe_#t~mem140#1.base, usb_acecad_probe_#t~mem140#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8); {57134#false} is VALID [2022-02-20 22:07:29,712 INFO L290 TraceCheckUtils]: 148: Hoare triple {57134#false} assume 0 == (usb_acecad_probe_#t~mem140#1.base + usb_acecad_probe_#t~mem140#1.offset) % 18446744073709551616;havoc usb_acecad_probe_#t~mem140#1.base, usb_acecad_probe_#t~mem140#1.offset;usb_acecad_probe_~err~0#1 := -12; {57134#false} is VALID [2022-02-20 22:07:29,712 INFO L290 TraceCheckUtils]: 149: Hoare triple {57134#false} call usb_acecad_probe_#t~mem172#1.base, usb_acecad_probe_#t~mem172#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem173#1 := read~int(usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset, 8); {57134#false} is VALID [2022-02-20 22:07:29,713 INFO L272 TraceCheckUtils]: 150: Hoare triple {57134#false} call usb_free_coherent(usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, 8, usb_acecad_probe_#t~mem172#1.base, usb_acecad_probe_#t~mem172#1.offset, usb_acecad_probe_#t~mem173#1); {57133#true} is VALID [2022-02-20 22:07:29,713 INFO L290 TraceCheckUtils]: 151: Hoare triple {57133#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1 := #in~arg1;~arg2.base, ~arg2.offset := #in~arg2.base, #in~arg2.offset;~arg3 := #in~arg3; {57133#true} is VALID [2022-02-20 22:07:29,713 INFO L290 TraceCheckUtils]: 152: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:29,713 INFO L284 TraceCheckUtils]: 153: Hoare quadruple {57133#true} {57134#false} #592#return; {57134#false} is VALID [2022-02-20 22:07:29,713 INFO L290 TraceCheckUtils]: 154: Hoare triple {57134#false} havoc usb_acecad_probe_#t~mem172#1.base, usb_acecad_probe_#t~mem172#1.offset;havoc usb_acecad_probe_#t~mem173#1; {57134#false} is VALID [2022-02-20 22:07:29,713 INFO L290 TraceCheckUtils]: 155: Hoare triple {57134#false} assume { :begin_inline_input_free_device } true;input_free_device_#in~arg0#1.base, input_free_device_#in~arg0#1.offset := usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset;havoc input_free_device_~arg0#1.base, input_free_device_~arg0#1.offset;input_free_device_~arg0#1.base, input_free_device_~arg0#1.offset := input_free_device_#in~arg0#1.base, input_free_device_#in~arg0#1.offset; {57134#false} is VALID [2022-02-20 22:07:29,713 INFO L290 TraceCheckUtils]: 156: Hoare triple {57134#false} assume { :end_inline_input_free_device } true; {57134#false} is VALID [2022-02-20 22:07:29,713 INFO L272 TraceCheckUtils]: 157: Hoare triple {57134#false} call kfree(usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset); {57254#(= |old(#valid)| |#valid|)} is VALID [2022-02-20 22:07:29,714 INFO L290 TraceCheckUtils]: 158: Hoare triple {57254#(= |old(#valid)| |#valid|)} ~p.base, ~p.offset := #in~p.base, #in~p.offset;call ULTIMATE.dealloc(~p.base, ~p.offset); {57133#true} is VALID [2022-02-20 22:07:29,714 INFO L290 TraceCheckUtils]: 159: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:29,714 INFO L284 TraceCheckUtils]: 160: Hoare quadruple {57133#true} {57134#false} #594#return; {57134#false} is VALID [2022-02-20 22:07:29,714 INFO L290 TraceCheckUtils]: 161: Hoare triple {57134#false} usb_acecad_probe_#res#1 := usb_acecad_probe_~err~0#1; {57134#false} is VALID [2022-02-20 22:07:29,714 INFO L290 TraceCheckUtils]: 162: Hoare triple {57134#false} main_#t~ret188#1 := usb_acecad_probe_#res#1;assume { :end_inline_usb_acecad_probe } true;assume -2147483648 <= main_#t~ret188#1 && main_#t~ret188#1 <= 2147483647;~ldv_retval_0~0 := main_#t~ret188#1;havoc main_#t~ret188#1; {57134#false} is VALID [2022-02-20 22:07:29,714 INFO L290 TraceCheckUtils]: 163: Hoare triple {57134#false} assume !(0 == ~ldv_retval_0~0); {57134#false} is VALID [2022-02-20 22:07:29,714 INFO L290 TraceCheckUtils]: 164: Hoare triple {57134#false} assume -2147483648 <= main_#t~nondet184#1 && main_#t~nondet184#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet184#1;havoc main_#t~nondet184#1;main_#t~switch185#1 := 0 == main_~tmp___0~6#1; {57134#false} is VALID [2022-02-20 22:07:29,714 INFO L290 TraceCheckUtils]: 165: Hoare triple {57134#false} assume !main_#t~switch185#1;main_#t~switch185#1 := main_#t~switch185#1 || 1 == main_~tmp___0~6#1; {57134#false} is VALID [2022-02-20 22:07:29,715 INFO L290 TraceCheckUtils]: 166: Hoare triple {57134#false} assume main_#t~switch185#1; {57134#false} is VALID [2022-02-20 22:07:29,715 INFO L290 TraceCheckUtils]: 167: Hoare triple {57134#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet189#1 && main_#t~nondet189#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet189#1;havoc main_#t~nondet189#1;main_#t~switch190#1 := 0 == main_~tmp___2~1#1; {57134#false} is VALID [2022-02-20 22:07:29,715 INFO L290 TraceCheckUtils]: 168: Hoare triple {57134#false} assume main_#t~switch190#1; {57134#false} is VALID [2022-02-20 22:07:29,715 INFO L290 TraceCheckUtils]: 169: Hoare triple {57134#false} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0;assume { :begin_inline_usb_acecad_exit } true;assume { :begin_inline_ldv_usb_deregister_11 } true;ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset := ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset;assume { :begin_inline_usb_deregister } true;usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset := ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;havoc usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset;usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset := usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset; {57134#false} is VALID [2022-02-20 22:07:29,715 INFO L290 TraceCheckUtils]: 170: Hoare triple {57134#false} assume { :end_inline_usb_deregister } true;~ldv_state_variable_1~0 := 0; {57134#false} is VALID [2022-02-20 22:07:29,715 INFO L290 TraceCheckUtils]: 171: Hoare triple {57134#false} assume { :end_inline_ldv_usb_deregister_11 } true; {57134#false} is VALID [2022-02-20 22:07:29,715 INFO L290 TraceCheckUtils]: 172: Hoare triple {57134#false} assume { :end_inline_usb_acecad_exit } true;~ldv_state_variable_0~0 := 2; {57134#false} is VALID [2022-02-20 22:07:29,715 INFO L290 TraceCheckUtils]: 173: Hoare triple {57134#false} assume { :begin_inline_ldv_check_final_state } true; {57134#false} is VALID [2022-02-20 22:07:29,716 INFO L290 TraceCheckUtils]: 174: Hoare triple {57134#false} assume 0 != (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616; {57134#false} is VALID [2022-02-20 22:07:29,716 INFO L272 TraceCheckUtils]: 175: Hoare triple {57134#false} call ldv_error(); {57134#false} is VALID [2022-02-20 22:07:29,716 INFO L290 TraceCheckUtils]: 176: Hoare triple {57134#false} assume !false; {57134#false} is VALID [2022-02-20 22:07:29,716 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 9 proven. 11 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2022-02-20 22:07:29,717 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:07:29,717 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1281325906] [2022-02-20 22:07:29,717 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1281325906] provided 0 perfect and 1 imperfect interpolant sequences [2022-02-20 22:07:29,717 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [176074794] [2022-02-20 22:07:29,717 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:07:29,717 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-20 22:07:29,718 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-20 22:07:29,719 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-02-20 22:07:29,720 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-02-20 22:07:30,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:30,050 INFO L263 TraceCheckSpWp]: Trace formula consists of 1351 conjuncts, 41 conjunts are in the unsatisfiable core [2022-02-20 22:07:30,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:30,123 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-02-20 22:07:30,624 INFO L290 TraceCheckUtils]: 0: Hoare triple {57133#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(99, 2);call #Ultimate.allocInit(10, 3);call #Ultimate.allocInit(7, 4);call write~init~int(97, 4, 0, 1);call write~init~int(99, 4, 1, 1);call write~init~int(101, 4, 2, 1);call write~init~int(99, 4, 3, 1);call write~init~int(97, 4, 4, 1);call write~init~int(100, 4, 5, 1);call write~init~int(0, 4, 6, 1);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(20, 6);call #Ultimate.allocInit(57, 7);call #Ultimate.allocInit(2, 8);call write~init~int(32, 8, 0, 1);call write~init~int(0, 8, 1, 1);call #Ultimate.allocInit(8, 9);call #Ultimate.allocInit(34, 10);call #Ultimate.allocInit(32, 11);call #Ultimate.allocInit(11, 12);call #Ultimate.allocInit(48, 13);~LDV_IN_INTERRUPT~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset := 14, 0;call #Ultimate.allocInit(72, 14);call write~init~int(3, ~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 2 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(4, ~#usb_acecad_id_table~0.base, 4 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 6 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 8 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 10 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 11 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 12 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 13 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 14 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 15 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 16 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(3, ~#usb_acecad_id_table~0.base, 24 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 26 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(8, ~#usb_acecad_id_table~0.base, 28 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 30 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 32 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 34 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 35 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 36 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 37 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 38 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 39 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(1, ~#usb_acecad_id_table~0.base, 40 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(0, ~#usb_acecad_id_table~0.base, 48 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 50 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 52 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 54 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 56 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 58 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 59 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 60 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 61 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 62 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 63 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 64 + ~#usb_acecad_id_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.driver_info := 0;~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset := 15, 0;call #Ultimate.allocInit(264, 15);call write~init~$Pointer$(12, 0, ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_probe.base, #funAddr~usb_acecad_probe.offset, ~#usb_acecad_driver~0.base, 8 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_disconnect.base, #funAddr~usb_acecad_disconnect.offset, ~#usb_acecad_driver~0.base, 16 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 24 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 32 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 40 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 48 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 56 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 64 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, ~#usb_acecad_driver~0.base, 72 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 80 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 84 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 88 + ~#usb_acecad_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 92 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 100 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 108 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 116 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 124 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 132 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 136 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 144 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 152 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 160 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 168 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 176 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 184 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 192 + ~#usb_acecad_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 193 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 201 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 209 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 217 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 225 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 233 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 241 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 249 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 257 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 261 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 262 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 263 + ~#usb_acecad_driver~0.offset, 1);~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {57133#true} is VALID [2022-02-20 22:07:30,624 INFO L290 TraceCheckUtils]: 1: Hoare triple {57133#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret183#1.base, main_#t~ret183#1.offset, main_#t~nondet184#1, main_#t~switch185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~ret188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~ret191#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~17#1.base, main_~tmp~17#1.offset, main_~tmp___0~6#1, main_~tmp___1~3#1, main_~tmp___2~1#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~17#1.base, main_~tmp~17#1.offset;havoc main_~tmp___0~6#1;havoc main_~tmp___1~3#1;havoc main_~tmp___2~1#1; {57133#true} is VALID [2022-02-20 22:07:30,624 INFO L272 TraceCheckUtils]: 2: Hoare triple {57133#true} call main_#t~ret183#1.base, main_#t~ret183#1.offset := ldv_init_zalloc(24); {57133#true} is VALID [2022-02-20 22:07:30,624 INFO L290 TraceCheckUtils]: 3: Hoare triple {57133#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {57133#true} is VALID [2022-02-20 22:07:30,624 INFO L272 TraceCheckUtils]: 4: Hoare triple {57133#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {57133#true} is VALID [2022-02-20 22:07:30,624 INFO L290 TraceCheckUtils]: 5: Hoare triple {57133#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {57133#true} is VALID [2022-02-20 22:07:30,624 INFO L290 TraceCheckUtils]: 6: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:30,624 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {57133#true} {57133#true} #538#return; {57133#true} is VALID [2022-02-20 22:07:30,624 INFO L290 TraceCheckUtils]: 8: Hoare triple {57133#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {57133#true} is VALID [2022-02-20 22:07:30,624 INFO L272 TraceCheckUtils]: 9: Hoare triple {57133#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {57133#true} is VALID [2022-02-20 22:07:30,624 INFO L290 TraceCheckUtils]: 10: Hoare triple {57133#true} ~cond := #in~cond; {57133#true} is VALID [2022-02-20 22:07:30,625 INFO L290 TraceCheckUtils]: 11: Hoare triple {57133#true} assume !(0 == ~cond); {57133#true} is VALID [2022-02-20 22:07:30,625 INFO L290 TraceCheckUtils]: 12: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:30,625 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {57133#true} {57133#true} #540#return; {57133#true} is VALID [2022-02-20 22:07:30,625 INFO L290 TraceCheckUtils]: 14: Hoare triple {57133#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {57133#true} is VALID [2022-02-20 22:07:30,625 INFO L290 TraceCheckUtils]: 15: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:30,625 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {57133#true} {57133#true} #544#return; {57133#true} is VALID [2022-02-20 22:07:30,625 INFO L290 TraceCheckUtils]: 17: Hoare triple {57133#true} main_~tmp~17#1.base, main_~tmp~17#1.offset := main_#t~ret183#1.base, main_#t~ret183#1.offset;havoc main_#t~ret183#1.base, main_#t~ret183#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~17#1.base, main_~tmp~17#1.offset;assume { :begin_inline_ldv_initialize } true; {57133#true} is VALID [2022-02-20 22:07:30,625 INFO L290 TraceCheckUtils]: 18: Hoare triple {57133#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1; {57133#true} is VALID [2022-02-20 22:07:30,625 INFO L290 TraceCheckUtils]: 19: Hoare triple {57133#true} assume -2147483648 <= main_#t~nondet184#1 && main_#t~nondet184#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet184#1;havoc main_#t~nondet184#1;main_#t~switch185#1 := 0 == main_~tmp___0~6#1; {57133#true} is VALID [2022-02-20 22:07:30,625 INFO L290 TraceCheckUtils]: 20: Hoare triple {57133#true} assume !main_#t~switch185#1;main_#t~switch185#1 := main_#t~switch185#1 || 1 == main_~tmp___0~6#1; {57133#true} is VALID [2022-02-20 22:07:30,625 INFO L290 TraceCheckUtils]: 21: Hoare triple {57133#true} assume main_#t~switch185#1; {57133#true} is VALID [2022-02-20 22:07:30,625 INFO L290 TraceCheckUtils]: 22: Hoare triple {57133#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet189#1 && main_#t~nondet189#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet189#1;havoc main_#t~nondet189#1;main_#t~switch190#1 := 0 == main_~tmp___2~1#1; {57133#true} is VALID [2022-02-20 22:07:30,625 INFO L290 TraceCheckUtils]: 23: Hoare triple {57133#true} assume !main_#t~switch190#1;main_#t~switch190#1 := main_#t~switch190#1 || 1 == main_~tmp___2~1#1; {57133#true} is VALID [2022-02-20 22:07:30,625 INFO L290 TraceCheckUtils]: 24: Hoare triple {57133#true} assume main_#t~switch190#1; {57133#true} is VALID [2022-02-20 22:07:30,625 INFO L290 TraceCheckUtils]: 25: Hoare triple {57133#true} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_usb_acecad_init } true;havoc usb_acecad_init_#res#1;havoc usb_acecad_init_#t~ret180#1, usb_acecad_init_#t~nondet181#1, usb_acecad_init_~result~0#1, usb_acecad_init_~tmp~15#1;havoc usb_acecad_init_~result~0#1;havoc usb_acecad_init_~tmp~15#1;assume { :begin_inline_usb_register } true;usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc usb_register_#res#1;havoc usb_register_#t~ret31#1, usb_register_~driver#1.base, usb_register_~driver#1.offset, usb_register_~tmp~1#1;usb_register_~driver#1.base, usb_register_~driver#1.offset := usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset;havoc usb_register_~tmp~1#1;assume { :begin_inline_ldv_usb_register_driver_2 } true;ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset := usb_register_~driver#1.base, usb_register_~driver#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 4, 0;havoc ldv_usb_register_driver_2_#res#1;havoc ldv_usb_register_driver_2_#t~ret193#1, ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset, ldv_usb_register_driver_2_~ldv_func_res~0#1, ldv_usb_register_driver_2_~tmp~19#1;ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_2_~ldv_func_res~0#1;havoc ldv_usb_register_driver_2_~tmp~19#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet213#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet213#1 && usb_register_driver_#t~nondet213#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet213#1;havoc usb_register_driver_#t~nondet213#1; {57133#true} is VALID [2022-02-20 22:07:30,626 INFO L290 TraceCheckUtils]: 26: Hoare triple {57133#true} ldv_usb_register_driver_2_#t~ret193#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_2_#t~ret193#1 && ldv_usb_register_driver_2_#t~ret193#1 <= 2147483647;ldv_usb_register_driver_2_~tmp~19#1 := ldv_usb_register_driver_2_#t~ret193#1;havoc ldv_usb_register_driver_2_#t~ret193#1;ldv_usb_register_driver_2_~ldv_func_res~0#1 := ldv_usb_register_driver_2_~tmp~19#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset, ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset;havoc ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {57133#true} is VALID [2022-02-20 22:07:30,626 INFO L272 TraceCheckUtils]: 27: Hoare triple {57133#true} call ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset := ldv_init_zalloc(1248); {57133#true} is VALID [2022-02-20 22:07:30,626 INFO L290 TraceCheckUtils]: 28: Hoare triple {57133#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {57133#true} is VALID [2022-02-20 22:07:30,626 INFO L272 TraceCheckUtils]: 29: Hoare triple {57133#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {57133#true} is VALID [2022-02-20 22:07:30,626 INFO L290 TraceCheckUtils]: 30: Hoare triple {57133#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {57133#true} is VALID [2022-02-20 22:07:30,626 INFO L290 TraceCheckUtils]: 31: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:30,626 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {57133#true} {57133#true} #538#return; {57133#true} is VALID [2022-02-20 22:07:30,626 INFO L290 TraceCheckUtils]: 33: Hoare triple {57133#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {57133#true} is VALID [2022-02-20 22:07:30,626 INFO L272 TraceCheckUtils]: 34: Hoare triple {57133#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {57133#true} is VALID [2022-02-20 22:07:30,626 INFO L290 TraceCheckUtils]: 35: Hoare triple {57133#true} ~cond := #in~cond; {57133#true} is VALID [2022-02-20 22:07:30,626 INFO L290 TraceCheckUtils]: 36: Hoare triple {57133#true} assume !(0 == ~cond); {57133#true} is VALID [2022-02-20 22:07:30,626 INFO L290 TraceCheckUtils]: 37: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:30,626 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {57133#true} {57133#true} #540#return; {57133#true} is VALID [2022-02-20 22:07:30,627 INFO L290 TraceCheckUtils]: 39: Hoare triple {57133#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {57133#true} is VALID [2022-02-20 22:07:30,627 INFO L290 TraceCheckUtils]: 40: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:30,627 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {57133#true} {57133#true} #600#return; {57133#true} is VALID [2022-02-20 22:07:30,627 INFO L290 TraceCheckUtils]: 42: Hoare triple {57133#true} ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset := ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset;havoc ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {57133#true} is VALID [2022-02-20 22:07:30,627 INFO L290 TraceCheckUtils]: 43: Hoare triple {57133#true} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_2_#res#1 := ldv_usb_register_driver_2_~ldv_func_res~0#1; {57133#true} is VALID [2022-02-20 22:07:30,627 INFO L290 TraceCheckUtils]: 44: Hoare triple {57133#true} usb_register_#t~ret31#1 := ldv_usb_register_driver_2_#res#1;assume { :end_inline_ldv_usb_register_driver_2 } true;assume -2147483648 <= usb_register_#t~ret31#1 && usb_register_#t~ret31#1 <= 2147483647;usb_register_~tmp~1#1 := usb_register_#t~ret31#1;havoc usb_register_#t~ret31#1;usb_register_#res#1 := usb_register_~tmp~1#1; {57133#true} is VALID [2022-02-20 22:07:30,627 INFO L290 TraceCheckUtils]: 45: Hoare triple {57133#true} usb_acecad_init_#t~ret180#1 := usb_register_#res#1;assume { :end_inline_usb_register } true;assume -2147483648 <= usb_acecad_init_#t~ret180#1 && usb_acecad_init_#t~ret180#1 <= 2147483647;usb_acecad_init_~tmp~15#1 := usb_acecad_init_#t~ret180#1;havoc usb_acecad_init_#t~ret180#1;usb_acecad_init_~result~0#1 := usb_acecad_init_~tmp~15#1; {57133#true} is VALID [2022-02-20 22:07:30,627 INFO L290 TraceCheckUtils]: 46: Hoare triple {57133#true} assume 0 == usb_acecad_init_~result~0#1;havoc usb_acecad_init_#t~nondet181#1; {57133#true} is VALID [2022-02-20 22:07:30,627 INFO L290 TraceCheckUtils]: 47: Hoare triple {57133#true} usb_acecad_init_#res#1 := usb_acecad_init_~result~0#1; {57133#true} is VALID [2022-02-20 22:07:30,627 INFO L290 TraceCheckUtils]: 48: Hoare triple {57133#true} main_#t~ret191#1 := usb_acecad_init_#res#1;assume { :end_inline_usb_acecad_init } true;assume -2147483648 <= main_#t~ret191#1 && main_#t~ret191#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret191#1;havoc main_#t~ret191#1; {57133#true} is VALID [2022-02-20 22:07:30,631 INFO L290 TraceCheckUtils]: 49: Hoare triple {57133#true} assume 0 == ~ldv_retval_1~0;~ldv_state_variable_0~0 := 3; {57133#true} is VALID [2022-02-20 22:07:30,631 INFO L290 TraceCheckUtils]: 50: Hoare triple {57133#true} assume !(0 != ~ldv_retval_1~0); {57133#true} is VALID [2022-02-20 22:07:30,632 INFO L290 TraceCheckUtils]: 51: Hoare triple {57133#true} assume -2147483648 <= main_#t~nondet184#1 && main_#t~nondet184#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet184#1;havoc main_#t~nondet184#1;main_#t~switch185#1 := 0 == main_~tmp___0~6#1; {57133#true} is VALID [2022-02-20 22:07:30,632 INFO L290 TraceCheckUtils]: 52: Hoare triple {57133#true} assume main_#t~switch185#1; {57133#true} is VALID [2022-02-20 22:07:30,632 INFO L290 TraceCheckUtils]: 53: Hoare triple {57133#true} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= main_#t~nondet186#1 && main_#t~nondet186#1 <= 2147483647;main_~tmp___1~3#1 := main_#t~nondet186#1;havoc main_#t~nondet186#1;main_#t~switch187#1 := 0 == main_~tmp___1~3#1; {57133#true} is VALID [2022-02-20 22:07:30,632 INFO L290 TraceCheckUtils]: 54: Hoare triple {57133#true} assume main_#t~switch187#1; {57133#true} is VALID [2022-02-20 22:07:30,632 INFO L290 TraceCheckUtils]: 55: Hoare triple {57133#true} assume 1 == ~ldv_state_variable_1~0;assume { :begin_inline_usb_acecad_probe } true;usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset, usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset := ~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc usb_acecad_probe_#res#1;havoc usb_acecad_probe_#t~ret127#1.base, usb_acecad_probe_#t~ret127#1.offset, usb_acecad_probe_#t~mem128#1.base, usb_acecad_probe_#t~mem128#1.offset, usb_acecad_probe_#t~mem129#1, usb_acecad_probe_#t~mem130#1.base, usb_acecad_probe_#t~mem130#1.offset, usb_acecad_probe_#t~ret131#1, usb_acecad_probe_#t~mem132#1, usb_acecad_probe_#t~ret133#1, usb_acecad_probe_#t~ret134#1, usb_acecad_probe_#t~ret135#1.base, usb_acecad_probe_#t~ret135#1.offset, usb_acecad_probe_#t~ret136#1.base, usb_acecad_probe_#t~ret136#1.offset, usb_acecad_probe_#t~ret137#1.base, usb_acecad_probe_#t~ret137#1.offset, usb_acecad_probe_#t~mem138#1.base, usb_acecad_probe_#t~mem138#1.offset, usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset, usb_acecad_probe_#t~mem140#1.base, usb_acecad_probe_#t~mem140#1.offset, usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset, usb_acecad_probe_#t~mem142#1.base, usb_acecad_probe_#t~mem142#1.offset, usb_acecad_probe_#t~ret143#1, usb_acecad_probe_#t~mem144#1.base, usb_acecad_probe_#t~mem144#1.offset, usb_acecad_probe_#t~mem145#1.base, usb_acecad_probe_#t~mem145#1.offset, usb_acecad_probe_#t~ret146#1, usb_acecad_probe_#t~mem147#1.base, usb_acecad_probe_#t~mem147#1.offset, usb_acecad_probe_#t~ret148#1, usb_acecad_probe_#t~ret149#1, usb_acecad_probe_#t~ret150#1, usb_acecad_probe_#t~mem151#1, usb_acecad_probe_#t~switch152#1, usb_acecad_probe_#t~nondet153#1, usb_acecad_probe_#t~nondet154#1, usb_acecad_probe_#t~mem155#1, usb_acecad_probe_#t~mem156#1, usb_acecad_probe_#t~nondet157#1, usb_acecad_probe_#t~nondet158#1, usb_acecad_probe_#t~mem159#1, usb_acecad_probe_#t~mem160#1, usb_acecad_probe_#t~mem161#1.base, usb_acecad_probe_#t~mem161#1.offset, usb_acecad_probe_#t~mem162#1.base, usb_acecad_probe_#t~mem162#1.offset, usb_acecad_probe_#t~ite163#1, usb_acecad_probe_#t~mem164#1, usb_acecad_probe_#t~mem165#1.base, usb_acecad_probe_#t~mem165#1.offset, usb_acecad_probe_#t~mem166#1, usb_acecad_probe_#t~mem167#1.base, usb_acecad_probe_#t~mem167#1.offset, usb_acecad_probe_#t~mem168#1.base, usb_acecad_probe_#t~mem168#1.offset, usb_acecad_probe_#t~mem169#1, usb_acecad_probe_#t~mem170#1.base, usb_acecad_probe_#t~mem170#1.offset, usb_acecad_probe_#t~ret171#1, usb_acecad_probe_#t~mem172#1.base, usb_acecad_probe_#t~mem172#1.offset, usb_acecad_probe_#t~mem173#1, usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset, usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset, usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset, usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset, usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset, usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset, usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset, usb_acecad_probe_~pipe~0#1, usb_acecad_probe_~maxp~0#1, usb_acecad_probe_~err~0#1, usb_acecad_probe_~tmp___0~5#1, usb_acecad_probe_~tmp___1~2#1, usb_acecad_probe_~tmp___2~0#1, usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset, usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~tmp___5~0#1, usb_acecad_probe_~tmp___6~0#1;usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset := usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset;usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset := usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset;havoc usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset;havoc usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;havoc usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset;havoc usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset;havoc usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset;havoc usb_acecad_probe_~pipe~0#1;havoc usb_acecad_probe_~maxp~0#1;havoc usb_acecad_probe_~err~0#1;havoc usb_acecad_probe_~tmp___0~5#1;havoc usb_acecad_probe_~tmp___1~2#1;havoc usb_acecad_probe_~tmp___2~0#1;havoc usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;havoc usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset;havoc usb_acecad_probe_~tmp___5~0#1;havoc usb_acecad_probe_~tmp___6~0#1;assume { :begin_inline_interface_to_usbdev } true;interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset := usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset;havoc interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;havoc interface_to_usbdev_#t~ret192#1.base, interface_to_usbdev_#t~ret192#1.offset, interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset, interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset := interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset;havoc interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;assume { :begin_inline_ldv_interface_to_usbdev } true;havoc ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;havoc ldv_interface_to_usbdev_#t~ret203#1.base, ldv_interface_to_usbdev_#t~ret203#1.offset, ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset, ldv_interface_to_usbdev_~tmp~26#1.base, ldv_interface_to_usbdev_~tmp~26#1.offset;havoc ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset;havoc ldv_interface_to_usbdev_~tmp~26#1.base, ldv_interface_to_usbdev_~tmp~26#1.offset; {57133#true} is VALID [2022-02-20 22:07:30,632 INFO L272 TraceCheckUtils]: 56: Hoare triple {57133#true} call ldv_interface_to_usbdev_#t~ret203#1.base, ldv_interface_to_usbdev_#t~ret203#1.offset := ldv_malloc(1822); {57133#true} is VALID [2022-02-20 22:07:30,632 INFO L290 TraceCheckUtils]: 57: Hoare triple {57133#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {57133#true} is VALID [2022-02-20 22:07:30,633 INFO L290 TraceCheckUtils]: 58: Hoare triple {57133#true} assume !(0 != ~tmp___0~2);call #t~malloc60.base, #t~malloc60.offset := #Ultimate.allocOnHeap(~size);~tmp~4.base, ~tmp~4.offset := #t~malloc60.base, #t~malloc60.offset;havoc #t~malloc60.base, #t~malloc60.offset;~p~0.base, ~p~0.offset := ~tmp~4.base, ~tmp~4.offset; {57133#true} is VALID [2022-02-20 22:07:30,633 INFO L272 TraceCheckUtils]: 59: Hoare triple {57133#true} call assume_abort_if_not((if 0 != (~p~0.base + ~p~0.offset) % 18446744073709551616 then 1 else 0)); {57133#true} is VALID [2022-02-20 22:07:30,633 INFO L290 TraceCheckUtils]: 60: Hoare triple {57133#true} ~cond := #in~cond; {57133#true} is VALID [2022-02-20 22:07:30,633 INFO L290 TraceCheckUtils]: 61: Hoare triple {57133#true} assume !(0 == ~cond); {57133#true} is VALID [2022-02-20 22:07:30,633 INFO L290 TraceCheckUtils]: 62: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:30,633 INFO L284 TraceCheckUtils]: 63: Hoare quadruple {57133#true} {57133#true} #542#return; {57133#true} is VALID [2022-02-20 22:07:30,633 INFO L290 TraceCheckUtils]: 64: Hoare triple {57133#true} #res.base, #res.offset := ~p~0.base, ~p~0.offset; {57133#true} is VALID [2022-02-20 22:07:30,634 INFO L290 TraceCheckUtils]: 65: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:30,634 INFO L284 TraceCheckUtils]: 66: Hoare quadruple {57133#true} {57133#true} #546#return; {57133#true} is VALID [2022-02-20 22:07:30,634 INFO L290 TraceCheckUtils]: 67: Hoare triple {57133#true} ldv_interface_to_usbdev_~tmp~26#1.base, ldv_interface_to_usbdev_~tmp~26#1.offset := ldv_interface_to_usbdev_#t~ret203#1.base, ldv_interface_to_usbdev_#t~ret203#1.offset;havoc ldv_interface_to_usbdev_#t~ret203#1.base, ldv_interface_to_usbdev_#t~ret203#1.offset;ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset := ldv_interface_to_usbdev_~tmp~26#1.base, ldv_interface_to_usbdev_~tmp~26#1.offset; {57133#true} is VALID [2022-02-20 22:07:30,634 INFO L290 TraceCheckUtils]: 68: Hoare triple {57133#true} assume !(0 == (ldv_interface_to_usbdev_~result~1#1.base + ldv_interface_to_usbdev_~result~1#1.offset) % 18446744073709551616); {57133#true} is VALID [2022-02-20 22:07:30,634 INFO L290 TraceCheckUtils]: 69: Hoare triple {57133#true} ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset := ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset; {57133#true} is VALID [2022-02-20 22:07:30,634 INFO L290 TraceCheckUtils]: 70: Hoare triple {57133#true} interface_to_usbdev_#t~ret192#1.base, interface_to_usbdev_#t~ret192#1.offset := ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;assume { :end_inline_ldv_interface_to_usbdev } true;interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset := interface_to_usbdev_#t~ret192#1.base, interface_to_usbdev_#t~ret192#1.offset;havoc interface_to_usbdev_#t~ret192#1.base, interface_to_usbdev_#t~ret192#1.offset;interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset := interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset; {57133#true} is VALID [2022-02-20 22:07:30,634 INFO L290 TraceCheckUtils]: 71: Hoare triple {57133#true} usb_acecad_probe_#t~ret127#1.base, usb_acecad_probe_#t~ret127#1.offset := interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;assume { :end_inline_interface_to_usbdev } true;usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset := usb_acecad_probe_#t~ret127#1.base, usb_acecad_probe_#t~ret127#1.offset;havoc usb_acecad_probe_#t~ret127#1.base, usb_acecad_probe_#t~ret127#1.offset;usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset := usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;call usb_acecad_probe_#t~mem128#1.base, usb_acecad_probe_#t~mem128#1.offset := read~$Pointer$(usb_acecad_probe_~intf#1.base, 8 + usb_acecad_probe_~intf#1.offset, 8);usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset := usb_acecad_probe_#t~mem128#1.base, usb_acecad_probe_#t~mem128#1.offset;havoc usb_acecad_probe_#t~mem128#1.base, usb_acecad_probe_#t~mem128#1.offset;call usb_acecad_probe_#t~mem129#1 := read~int(usb_acecad_probe_~interface~0#1.base, 4 + usb_acecad_probe_~interface~0#1.offset, 1); {57133#true} is VALID [2022-02-20 22:07:30,635 INFO L290 TraceCheckUtils]: 72: Hoare triple {57133#true} assume !(1 != usb_acecad_probe_#t~mem129#1 % 256 % 4294967296);havoc usb_acecad_probe_#t~mem129#1;call usb_acecad_probe_#t~mem130#1.base, usb_acecad_probe_#t~mem130#1.offset := read~$Pointer$(usb_acecad_probe_~interface~0#1.base, 9 + usb_acecad_probe_~interface~0#1.offset, 8);usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset := usb_acecad_probe_#t~mem130#1.base, usb_acecad_probe_#t~mem130#1.offset;havoc usb_acecad_probe_#t~mem130#1.base, usb_acecad_probe_#t~mem130#1.offset;assume { :begin_inline_usb_endpoint_is_int_in } true;usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset := usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_endpoint_is_int_in_#res#1;havoc usb_endpoint_is_int_in_#t~ret3#1, usb_endpoint_is_int_in_#t~ret4#1, usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset, usb_endpoint_is_int_in_~tmp~0#1, usb_endpoint_is_int_in_~tmp___0~0#1, usb_endpoint_is_int_in_~tmp___1~0#1;usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset := usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset;havoc usb_endpoint_is_int_in_~tmp~0#1;havoc usb_endpoint_is_int_in_~tmp___0~0#1;havoc usb_endpoint_is_int_in_~tmp___1~0#1;assume { :begin_inline_usb_endpoint_xfer_int } true;usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset := usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset;havoc usb_endpoint_xfer_int_#res#1;havoc usb_endpoint_xfer_int_#t~mem2#1, usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset;usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset := usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset;call usb_endpoint_xfer_int_#t~mem2#1 := read~int(usb_endpoint_xfer_int_~epd#1.base, 3 + usb_endpoint_xfer_int_~epd#1.offset, 1);usb_endpoint_xfer_int_#res#1 := (if 3 == (if 0 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 0 else (if 1 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 1 else ~bitwiseAnd(usb_endpoint_xfer_int_#t~mem2#1 % 256, 3))) then 1 else 0);havoc usb_endpoint_xfer_int_#t~mem2#1; {57133#true} is VALID [2022-02-20 22:07:30,635 INFO L290 TraceCheckUtils]: 73: Hoare triple {57133#true} usb_endpoint_is_int_in_#t~ret3#1 := usb_endpoint_xfer_int_#res#1;assume { :end_inline_usb_endpoint_xfer_int } true;assume -2147483648 <= usb_endpoint_is_int_in_#t~ret3#1 && usb_endpoint_is_int_in_#t~ret3#1 <= 2147483647;usb_endpoint_is_int_in_~tmp~0#1 := usb_endpoint_is_int_in_#t~ret3#1;havoc usb_endpoint_is_int_in_#t~ret3#1; {57133#true} is VALID [2022-02-20 22:07:30,635 INFO L290 TraceCheckUtils]: 74: Hoare triple {57133#true} assume 0 != usb_endpoint_is_int_in_~tmp~0#1;assume { :begin_inline_usb_endpoint_dir_in } true;usb_endpoint_dir_in_#in~epd#1.base, usb_endpoint_dir_in_#in~epd#1.offset := usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset;havoc usb_endpoint_dir_in_#res#1;havoc usb_endpoint_dir_in_#t~mem1#1, usb_endpoint_dir_in_~epd#1.base, usb_endpoint_dir_in_~epd#1.offset;usb_endpoint_dir_in_~epd#1.base, usb_endpoint_dir_in_~epd#1.offset := usb_endpoint_dir_in_#in~epd#1.base, usb_endpoint_dir_in_#in~epd#1.offset;call usb_endpoint_dir_in_#t~mem1#1 := read~int(usb_endpoint_dir_in_~epd#1.base, 2 + usb_endpoint_dir_in_~epd#1.offset, 1);usb_endpoint_dir_in_#res#1 := (if (if usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 <= 127 then usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 else usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 - 256) < 0 then 1 else 0);havoc usb_endpoint_dir_in_#t~mem1#1; {57133#true} is VALID [2022-02-20 22:07:30,635 INFO L290 TraceCheckUtils]: 75: Hoare triple {57133#true} usb_endpoint_is_int_in_#t~ret4#1 := usb_endpoint_dir_in_#res#1;assume { :end_inline_usb_endpoint_dir_in } true;assume -2147483648 <= usb_endpoint_is_int_in_#t~ret4#1 && usb_endpoint_is_int_in_#t~ret4#1 <= 2147483647;usb_endpoint_is_int_in_~tmp___0~0#1 := usb_endpoint_is_int_in_#t~ret4#1;havoc usb_endpoint_is_int_in_#t~ret4#1; {57133#true} is VALID [2022-02-20 22:07:30,635 INFO L290 TraceCheckUtils]: 76: Hoare triple {57133#true} assume 0 != usb_endpoint_is_int_in_~tmp___0~0#1;usb_endpoint_is_int_in_~tmp___1~0#1 := 1; {57133#true} is VALID [2022-02-20 22:07:30,635 INFO L290 TraceCheckUtils]: 77: Hoare triple {57133#true} usb_endpoint_is_int_in_#res#1 := usb_endpoint_is_int_in_~tmp___1~0#1; {57133#true} is VALID [2022-02-20 22:07:30,636 INFO L290 TraceCheckUtils]: 78: Hoare triple {57133#true} usb_acecad_probe_#t~ret131#1 := usb_endpoint_is_int_in_#res#1;assume { :end_inline_usb_endpoint_is_int_in } true;assume -2147483648 <= usb_acecad_probe_#t~ret131#1 && usb_acecad_probe_#t~ret131#1 <= 2147483647;usb_acecad_probe_~tmp___0~5#1 := usb_acecad_probe_#t~ret131#1;havoc usb_acecad_probe_#t~ret131#1; {57133#true} is VALID [2022-02-20 22:07:30,636 INFO L290 TraceCheckUtils]: 79: Hoare triple {57133#true} assume !(0 == usb_acecad_probe_~tmp___0~5#1);call usb_acecad_probe_#t~mem132#1 := read~int(usb_acecad_probe_~endpoint~0#1.base, 2 + usb_acecad_probe_~endpoint~0#1.offset, 1);assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_#t~mem132#1 % 256;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem42#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem42#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := (if (1 == 256 * __create_pipe_#t~mem42#1 || 0 == 256 * __create_pipe_#t~mem42#1) && 0 == 32768 * __create_pipe_~endpoint#1 then 256 * __create_pipe_#t~mem42#1 else (if 0 == 256 * __create_pipe_#t~mem42#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1) then 32768 * __create_pipe_~endpoint#1 else (if (1 == 256 * __create_pipe_#t~mem42#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1)) || ((1 == 256 * __create_pipe_#t~mem42#1 || 0 == 256 * __create_pipe_#t~mem42#1) && 1 == 32768 * __create_pipe_~endpoint#1) then 1 else ~bitwiseOr(256 * __create_pipe_#t~mem42#1, 32768 * __create_pipe_~endpoint#1))));havoc __create_pipe_#t~mem42#1; {57133#true} is VALID [2022-02-20 22:07:30,636 INFO L290 TraceCheckUtils]: 80: Hoare triple {57133#true} usb_acecad_probe_#t~ret133#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;usb_acecad_probe_~tmp___1~2#1 := usb_acecad_probe_#t~ret133#1;havoc usb_acecad_probe_#t~mem132#1;havoc usb_acecad_probe_#t~ret133#1;usb_acecad_probe_~pipe~0#1 := (if ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 else ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 - 4294967296);assume { :begin_inline_usb_maxpacket } true;usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset, usb_maxpacket_#in~pipe#1, usb_maxpacket_#in~is_out#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~pipe~0#1, (if 0 == (if 0 == usb_acecad_probe_~pipe~0#1 then 0 else (if 1 == usb_acecad_probe_~pipe~0#1 then 0 else ~bitwiseAnd(usb_acecad_probe_~pipe~0#1, 128))) then 1 else 0);havoc usb_maxpacket_#res#1;havoc usb_maxpacket_#t~ret44#1, usb_maxpacket_#t~ret45#1, usb_maxpacket_#t~mem46#1.base, usb_maxpacket_#t~mem46#1.offset, usb_maxpacket_#t~ret47#1, usb_maxpacket_#t~ret48#1, usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset, usb_maxpacket_#t~mem50#1, usb_maxpacket_#t~nondet43#1, usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset, usb_maxpacket_~pipe#1, usb_maxpacket_~is_out#1, usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset, usb_maxpacket_~epnum~0#1, usb_maxpacket_~__ret_warn_on~0#1, usb_maxpacket_~tmp~2#1, usb_maxpacket_~__ret_warn_on___0~0#1, usb_maxpacket_~tmp___0~1#1;usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset := usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset;usb_maxpacket_~pipe#1 := usb_maxpacket_#in~pipe#1;usb_maxpacket_~is_out#1 := usb_maxpacket_#in~is_out#1;havoc usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset;havoc usb_maxpacket_~epnum~0#1;havoc usb_maxpacket_~__ret_warn_on~0#1;havoc usb_maxpacket_~tmp~2#1;havoc usb_maxpacket_~__ret_warn_on___0~0#1;havoc usb_maxpacket_~tmp___0~1#1; {57133#true} is VALID [2022-02-20 22:07:30,636 INFO L290 TraceCheckUtils]: 81: Hoare triple {57133#true} assume 0 == usb_maxpacket_~pipe#1 / 32768;usb_maxpacket_~epnum~0#1 := 0; {57133#true} is VALID [2022-02-20 22:07:30,636 INFO L290 TraceCheckUtils]: 82: Hoare triple {57133#true} assume !(0 != usb_maxpacket_~is_out#1);usb_maxpacket_~__ret_warn_on___0~0#1 := (if 0 == (if 0 == usb_maxpacket_~pipe#1 then 0 else (if 1 == usb_maxpacket_~pipe#1 then 0 else ~bitwiseAnd(usb_maxpacket_~pipe#1, 128))) then 1 else 0); {57133#true} is VALID [2022-02-20 22:07:30,636 INFO L272 TraceCheckUtils]: 83: Hoare triple {57133#true} call usb_maxpacket_#t~ret47#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {57133#true} is VALID [2022-02-20 22:07:30,636 INFO L290 TraceCheckUtils]: 84: Hoare triple {57133#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {57133#true} is VALID [2022-02-20 22:07:30,637 INFO L290 TraceCheckUtils]: 85: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:30,637 INFO L284 TraceCheckUtils]: 86: Hoare quadruple {57133#true} {57133#true} #556#return; {57133#true} is VALID [2022-02-20 22:07:30,637 INFO L290 TraceCheckUtils]: 87: Hoare triple {57133#true} assume -9223372036854775808 <= usb_maxpacket_#t~ret47#1 && usb_maxpacket_#t~ret47#1 <= 9223372036854775807;usb_maxpacket_~tmp___0~1#1 := usb_maxpacket_#t~ret47#1;havoc usb_maxpacket_#t~ret47#1; {57133#true} is VALID [2022-02-20 22:07:30,637 INFO L290 TraceCheckUtils]: 88: Hoare triple {57133#true} assume !(0 != usb_maxpacket_~tmp___0~1#1); {57133#true} is VALID [2022-02-20 22:07:30,637 INFO L272 TraceCheckUtils]: 89: Hoare triple {57133#true} call usb_maxpacket_#t~ret48#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {57133#true} is VALID [2022-02-20 22:07:30,637 INFO L290 TraceCheckUtils]: 90: Hoare triple {57133#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {57133#true} is VALID [2022-02-20 22:07:30,637 INFO L290 TraceCheckUtils]: 91: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:30,638 INFO L284 TraceCheckUtils]: 92: Hoare quadruple {57133#true} {57133#true} #560#return; {57133#true} is VALID [2022-02-20 22:07:30,638 INFO L290 TraceCheckUtils]: 93: Hoare triple {57133#true} assume -9223372036854775808 <= usb_maxpacket_#t~ret48#1 && usb_maxpacket_#t~ret48#1 <= 9223372036854775807;havoc usb_maxpacket_#t~ret48#1;call usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset := read~$Pointer$(usb_maxpacket_~udev#1.base, 1186 + usb_maxpacket_~udev#1.offset + 8 * (usb_maxpacket_~epnum~0#1 % 4294967296), 8);usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset := usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset;havoc usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset; {57133#true} is VALID [2022-02-20 22:07:30,638 INFO L290 TraceCheckUtils]: 94: Hoare triple {57133#true} assume 0 == (usb_maxpacket_~ep~0#1.base + usb_maxpacket_~ep~0#1.offset) % 18446744073709551616;usb_maxpacket_#res#1 := 0; {57133#true} is VALID [2022-02-20 22:07:30,638 INFO L290 TraceCheckUtils]: 95: Hoare triple {57133#true} usb_acecad_probe_#t~ret134#1 := usb_maxpacket_#res#1;assume { :end_inline_usb_maxpacket } true;usb_acecad_probe_~tmp___2~0#1 := usb_acecad_probe_#t~ret134#1;havoc usb_acecad_probe_#t~ret134#1;usb_acecad_probe_~maxp~0#1 := usb_acecad_probe_~tmp___2~0#1 % 65536; {57133#true} is VALID [2022-02-20 22:07:30,638 INFO L272 TraceCheckUtils]: 96: Hoare triple {57133#true} call usb_acecad_probe_#t~ret135#1.base, usb_acecad_probe_#t~ret135#1.offset := kzalloc(232, 208); {57133#true} is VALID [2022-02-20 22:07:30,638 INFO L290 TraceCheckUtils]: 97: Hoare triple {57133#true} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {57133#true} is VALID [2022-02-20 22:07:30,638 INFO L272 TraceCheckUtils]: 98: Hoare triple {57133#true} call __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset := ldv_malloc(__kmalloc_~size#1); {57133#true} is VALID [2022-02-20 22:07:30,639 INFO L290 TraceCheckUtils]: 99: Hoare triple {57133#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {57133#true} is VALID [2022-02-20 22:07:30,639 INFO L290 TraceCheckUtils]: 100: Hoare triple {57133#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {57249#(and (= |ldv_malloc_#res.base| 0) (= |ldv_malloc_#res.offset| 0))} is VALID [2022-02-20 22:07:30,640 INFO L290 TraceCheckUtils]: 101: Hoare triple {57249#(and (= |ldv_malloc_#res.base| 0) (= |ldv_malloc_#res.offset| 0))} assume true; {57249#(and (= |ldv_malloc_#res.base| 0) (= |ldv_malloc_#res.offset| 0))} is VALID [2022-02-20 22:07:30,641 INFO L284 TraceCheckUtils]: 102: Hoare quadruple {57249#(and (= |ldv_malloc_#res.base| 0) (= |ldv_malloc_#res.offset| 0))} {57133#true} #530#return; {57245#(and (= |kzalloc___kmalloc_#t~ret53#1.base| 0) (= |kzalloc___kmalloc_#t~ret53#1.offset| 0))} is VALID [2022-02-20 22:07:30,641 INFO L290 TraceCheckUtils]: 103: Hoare triple {57245#(and (= |kzalloc___kmalloc_#t~ret53#1.base| 0) (= |kzalloc___kmalloc_#t~ret53#1.offset| 0))} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset; {57246#(and (= 0 |kzalloc___kmalloc_#res#1.offset|) (= |kzalloc___kmalloc_#res#1.base| 0))} is VALID [2022-02-20 22:07:30,642 INFO L290 TraceCheckUtils]: 104: Hoare triple {57246#(and (= 0 |kzalloc___kmalloc_#res#1.offset|) (= |kzalloc___kmalloc_#res#1.base| 0))} kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {57247#(and (= |kzalloc_kmalloc_#res#1.offset| 0) (= |kzalloc_kmalloc_#res#1.base| 0))} is VALID [2022-02-20 22:07:30,642 INFO L290 TraceCheckUtils]: 105: Hoare triple {57247#(and (= |kzalloc_kmalloc_#res#1.offset| 0) (= |kzalloc_kmalloc_#res#1.base| 0))} #t~ret55#1.base, #t~ret55#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret55#1.base, #t~ret55#1.offset;havoc #t~ret55#1.base, #t~ret55#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {57248#(and (= |kzalloc_#res#1.offset| 0) (= |kzalloc_#res#1.base| 0))} is VALID [2022-02-20 22:07:30,642 INFO L290 TraceCheckUtils]: 106: Hoare triple {57248#(and (= |kzalloc_#res#1.offset| 0) (= |kzalloc_#res#1.base| 0))} assume true; {57248#(and (= |kzalloc_#res#1.offset| 0) (= |kzalloc_#res#1.base| 0))} is VALID [2022-02-20 22:07:30,643 INFO L284 TraceCheckUtils]: 107: Hoare quadruple {57248#(and (= |kzalloc_#res#1.offset| 0) (= |kzalloc_#res#1.base| 0))} {57133#true} #562#return; {57190#(and (= |ULTIMATE.start_usb_acecad_probe_#t~ret135#1.offset| 0) (= |ULTIMATE.start_usb_acecad_probe_#t~ret135#1.base| 0))} is VALID [2022-02-20 22:07:30,644 INFO L290 TraceCheckUtils]: 108: Hoare triple {57190#(and (= |ULTIMATE.start_usb_acecad_probe_#t~ret135#1.offset| 0) (= |ULTIMATE.start_usb_acecad_probe_#t~ret135#1.base| 0))} usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset := usb_acecad_probe_#t~ret135#1.base, usb_acecad_probe_#t~ret135#1.offset;havoc usb_acecad_probe_#t~ret135#1.base, usb_acecad_probe_#t~ret135#1.offset;usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset := usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;assume { :begin_inline_input_allocate_device } true;havoc input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;havoc input_allocate_device_#t~ret67#1.base, input_allocate_device_#t~ret67#1.offset; {57191#(and (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.offset| 0) (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.base| 0))} is VALID [2022-02-20 22:07:30,644 INFO L272 TraceCheckUtils]: 109: Hoare triple {57191#(and (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.offset| 0) (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.base| 0))} call input_allocate_device_#t~ret67#1.base, input_allocate_device_#t~ret67#1.offset := kzalloc(1855, ~bitwiseOr(~bitwiseOr(16, 64), 128)); {57133#true} is VALID [2022-02-20 22:07:30,644 INFO L290 TraceCheckUtils]: 110: Hoare triple {57133#true} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {57133#true} is VALID [2022-02-20 22:07:30,644 INFO L272 TraceCheckUtils]: 111: Hoare triple {57133#true} call __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset := ldv_malloc(__kmalloc_~size#1); {57133#true} is VALID [2022-02-20 22:07:30,644 INFO L290 TraceCheckUtils]: 112: Hoare triple {57133#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {57133#true} is VALID [2022-02-20 22:07:30,645 INFO L290 TraceCheckUtils]: 113: Hoare triple {57133#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {57133#true} is VALID [2022-02-20 22:07:30,645 INFO L290 TraceCheckUtils]: 114: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:30,645 INFO L284 TraceCheckUtils]: 115: Hoare quadruple {57133#true} {57133#true} #530#return; {57133#true} is VALID [2022-02-20 22:07:30,645 INFO L290 TraceCheckUtils]: 116: Hoare triple {57133#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset; {57133#true} is VALID [2022-02-20 22:07:30,645 INFO L290 TraceCheckUtils]: 117: Hoare triple {57133#true} kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {57133#true} is VALID [2022-02-20 22:07:30,645 INFO L290 TraceCheckUtils]: 118: Hoare triple {57133#true} #t~ret55#1.base, #t~ret55#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret55#1.base, #t~ret55#1.offset;havoc #t~ret55#1.base, #t~ret55#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {57133#true} is VALID [2022-02-20 22:07:30,645 INFO L290 TraceCheckUtils]: 119: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:30,646 INFO L284 TraceCheckUtils]: 120: Hoare quadruple {57133#true} {57191#(and (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.offset| 0) (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.base| 0))} #564#return; {57191#(and (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.offset| 0) (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.base| 0))} is VALID [2022-02-20 22:07:30,647 INFO L290 TraceCheckUtils]: 121: Hoare triple {57191#(and (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.offset| 0) (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.base| 0))} input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset := input_allocate_device_#t~ret67#1.base, input_allocate_device_#t~ret67#1.offset;havoc input_allocate_device_#t~ret67#1.base, input_allocate_device_#t~ret67#1.offset; {57191#(and (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.offset| 0) (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.base| 0))} is VALID [2022-02-20 22:07:30,647 INFO L290 TraceCheckUtils]: 122: Hoare triple {57191#(and (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.offset| 0) (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.base| 0))} usb_acecad_probe_#t~ret136#1.base, usb_acecad_probe_#t~ret136#1.offset := input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;assume { :end_inline_input_allocate_device } true;usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset := usb_acecad_probe_#t~ret136#1.base, usb_acecad_probe_#t~ret136#1.offset;havoc usb_acecad_probe_#t~ret136#1.base, usb_acecad_probe_#t~ret136#1.offset; {57191#(and (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.offset| 0) (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.base| 0))} is VALID [2022-02-20 22:07:30,648 INFO L290 TraceCheckUtils]: 123: Hoare triple {57191#(and (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.offset| 0) (= |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.base| 0))} assume !(0 == (usb_acecad_probe_~acecad~3#1.base + usb_acecad_probe_~acecad~3#1.offset) % 18446744073709551616 || 0 == (usb_acecad_probe_~input_dev~0#1.base + usb_acecad_probe_~input_dev~0#1.offset) % 18446744073709551616);assume { :begin_inline_usb_alloc_coherent } true;usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset, usb_alloc_coherent_#in~arg1#1, usb_alloc_coherent_#in~arg2#1, usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, 8, 208, usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset;havoc usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;havoc usb_alloc_coherent_#t~ret212#1.base, usb_alloc_coherent_#t~ret212#1.offset, usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset, usb_alloc_coherent_~arg1#1, usb_alloc_coherent_~arg2#1, usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset;usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset := usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset;usb_alloc_coherent_~arg1#1 := usb_alloc_coherent_#in~arg1#1;usb_alloc_coherent_~arg2#1 := usb_alloc_coherent_#in~arg2#1;usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset := usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset; {57134#false} is VALID [2022-02-20 22:07:30,648 INFO L272 TraceCheckUtils]: 124: Hoare triple {57134#false} call usb_alloc_coherent_#t~ret212#1.base, usb_alloc_coherent_#t~ret212#1.offset := ldv_malloc(0); {57134#false} is VALID [2022-02-20 22:07:30,648 INFO L290 TraceCheckUtils]: 125: Hoare triple {57134#false} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {57134#false} is VALID [2022-02-20 22:07:30,649 INFO L290 TraceCheckUtils]: 126: Hoare triple {57134#false} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {57134#false} is VALID [2022-02-20 22:07:30,649 INFO L290 TraceCheckUtils]: 127: Hoare triple {57134#false} assume true; {57134#false} is VALID [2022-02-20 22:07:30,649 INFO L284 TraceCheckUtils]: 128: Hoare quadruple {57134#false} {57134#false} #566#return; {57134#false} is VALID [2022-02-20 22:07:30,649 INFO L290 TraceCheckUtils]: 129: Hoare triple {57134#false} usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset := usb_alloc_coherent_#t~ret212#1.base, usb_alloc_coherent_#t~ret212#1.offset;havoc usb_alloc_coherent_#t~ret212#1.base, usb_alloc_coherent_#t~ret212#1.offset; {57134#false} is VALID [2022-02-20 22:07:30,649 INFO L290 TraceCheckUtils]: 130: Hoare triple {57134#false} usb_acecad_probe_#t~ret137#1.base, usb_acecad_probe_#t~ret137#1.offset := usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;assume { :end_inline_usb_alloc_coherent } true;usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset := usb_acecad_probe_#t~ret137#1.base, usb_acecad_probe_#t~ret137#1.offset;havoc usb_acecad_probe_#t~ret137#1.base, usb_acecad_probe_#t~ret137#1.offset;call write~$Pointer$(usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem138#1.base, usb_acecad_probe_#t~mem138#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8); {57134#false} is VALID [2022-02-20 22:07:30,649 INFO L290 TraceCheckUtils]: 131: Hoare triple {57134#false} assume !(0 == (usb_acecad_probe_#t~mem138#1.base + usb_acecad_probe_#t~mem138#1.offset) % 18446744073709551616);havoc usb_acecad_probe_#t~mem138#1.base, usb_acecad_probe_#t~mem138#1.offset;assume { :begin_inline_ldv_usb_alloc_urb_5 } true;ldv_usb_alloc_urb_5_#in~iso_packets#1, ldv_usb_alloc_urb_5_#in~mem_flags#1 := 0, 208;havoc ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret196#1.base, ldv_usb_alloc_urb_5_#t~ret196#1.offset, ldv_usb_alloc_urb_5_~iso_packets#1, ldv_usb_alloc_urb_5_~mem_flags#1, ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;ldv_usb_alloc_urb_5_~iso_packets#1 := ldv_usb_alloc_urb_5_#in~iso_packets#1;ldv_usb_alloc_urb_5_~mem_flags#1 := ldv_usb_alloc_urb_5_#in~mem_flags#1;havoc ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;assume { :begin_inline_ldv_alloc_urb } true;havoc ldv_alloc_urb_#res#1.base, ldv_alloc_urb_#res#1.offset;havoc ldv_alloc_urb_#t~ret198#1.base, ldv_alloc_urb_#t~ret198#1.offset, ldv_alloc_urb_#t~ret199#1, ldv_alloc_urb_~value~0#1.base, ldv_alloc_urb_~value~0#1.offset, ldv_alloc_urb_~tmp~24#1.base, ldv_alloc_urb_~tmp~24#1.offset, ldv_alloc_urb_~tmp___0~7#1;havoc ldv_alloc_urb_~value~0#1.base, ldv_alloc_urb_~value~0#1.offset;havoc ldv_alloc_urb_~tmp~24#1.base, ldv_alloc_urb_~tmp~24#1.offset;havoc ldv_alloc_urb_~tmp___0~7#1; {57134#false} is VALID [2022-02-20 22:07:30,649 INFO L272 TraceCheckUtils]: 132: Hoare triple {57134#false} call ldv_alloc_urb_#t~ret198#1.base, ldv_alloc_urb_#t~ret198#1.offset := ldv_malloc(180); {57134#false} is VALID [2022-02-20 22:07:30,650 INFO L290 TraceCheckUtils]: 133: Hoare triple {57134#false} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {57134#false} is VALID [2022-02-20 22:07:30,650 INFO L290 TraceCheckUtils]: 134: Hoare triple {57134#false} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {57134#false} is VALID [2022-02-20 22:07:30,650 INFO L290 TraceCheckUtils]: 135: Hoare triple {57134#false} assume true; {57134#false} is VALID [2022-02-20 22:07:30,650 INFO L284 TraceCheckUtils]: 136: Hoare quadruple {57134#false} {57134#false} #568#return; {57134#false} is VALID [2022-02-20 22:07:30,650 INFO L290 TraceCheckUtils]: 137: Hoare triple {57134#false} ldv_alloc_urb_~tmp~24#1.base, ldv_alloc_urb_~tmp~24#1.offset := ldv_alloc_urb_#t~ret198#1.base, ldv_alloc_urb_#t~ret198#1.offset;havoc ldv_alloc_urb_#t~ret198#1.base, ldv_alloc_urb_#t~ret198#1.offset;ldv_alloc_urb_~value~0#1.base, ldv_alloc_urb_~value~0#1.offset := ldv_alloc_urb_~tmp~24#1.base, ldv_alloc_urb_~tmp~24#1.offset; {57134#false} is VALID [2022-02-20 22:07:30,650 INFO L272 TraceCheckUtils]: 138: Hoare triple {57134#false} call ldv_alloc_urb_#t~ret199#1 := ldv_undef_int(); {57134#false} is VALID [2022-02-20 22:07:30,650 INFO L290 TraceCheckUtils]: 139: Hoare triple {57134#false} havoc ~tmp~8;assume -2147483648 <= #t~nondet65 && #t~nondet65 <= 2147483647;~tmp~8 := #t~nondet65;havoc #t~nondet65;#res := ~tmp~8; {57134#false} is VALID [2022-02-20 22:07:30,651 INFO L290 TraceCheckUtils]: 140: Hoare triple {57134#false} assume true; {57134#false} is VALID [2022-02-20 22:07:30,651 INFO L284 TraceCheckUtils]: 141: Hoare quadruple {57134#false} {57134#false} #570#return; {57134#false} is VALID [2022-02-20 22:07:30,651 INFO L290 TraceCheckUtils]: 142: Hoare triple {57134#false} assume -2147483648 <= ldv_alloc_urb_#t~ret199#1 && ldv_alloc_urb_#t~ret199#1 <= 2147483647;ldv_alloc_urb_~tmp___0~7#1 := ldv_alloc_urb_#t~ret199#1;havoc ldv_alloc_urb_#t~ret199#1; {57134#false} is VALID [2022-02-20 22:07:30,651 INFO L290 TraceCheckUtils]: 143: Hoare triple {57134#false} assume 0 != ldv_alloc_urb_~tmp___0~7#1; {57134#false} is VALID [2022-02-20 22:07:30,651 INFO L290 TraceCheckUtils]: 144: Hoare triple {57134#false} assume 0 != (ldv_alloc_urb_~value~0#1.base + ldv_alloc_urb_~value~0#1.offset) % 18446744073709551616;~usb_urb~0.base, ~usb_urb~0.offset := ldv_alloc_urb_~value~0#1.base, ldv_alloc_urb_~value~0#1.offset; {57134#false} is VALID [2022-02-20 22:07:30,651 INFO L290 TraceCheckUtils]: 145: Hoare triple {57134#false} ldv_alloc_urb_#res#1.base, ldv_alloc_urb_#res#1.offset := ~usb_urb~0.base, ~usb_urb~0.offset; {57134#false} is VALID [2022-02-20 22:07:30,651 INFO L290 TraceCheckUtils]: 146: Hoare triple {57134#false} ldv_usb_alloc_urb_5_#t~ret196#1.base, ldv_usb_alloc_urb_5_#t~ret196#1.offset := ldv_alloc_urb_#res#1.base, ldv_alloc_urb_#res#1.offset;assume { :end_inline_ldv_alloc_urb } true;ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset := ldv_usb_alloc_urb_5_#t~ret196#1.base, ldv_usb_alloc_urb_5_#t~ret196#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret196#1.base, ldv_usb_alloc_urb_5_#t~ret196#1.offset;ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset := ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset; {57134#false} is VALID [2022-02-20 22:07:30,652 INFO L290 TraceCheckUtils]: 147: Hoare triple {57134#false} usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset := ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;assume { :end_inline_ldv_usb_alloc_urb_5 } true;call write~$Pointer$(usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset, usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8);havoc usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset;call usb_acecad_probe_#t~mem140#1.base, usb_acecad_probe_#t~mem140#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8); {57134#false} is VALID [2022-02-20 22:07:30,652 INFO L290 TraceCheckUtils]: 148: Hoare triple {57134#false} assume 0 == (usb_acecad_probe_#t~mem140#1.base + usb_acecad_probe_#t~mem140#1.offset) % 18446744073709551616;havoc usb_acecad_probe_#t~mem140#1.base, usb_acecad_probe_#t~mem140#1.offset;usb_acecad_probe_~err~0#1 := -12; {57134#false} is VALID [2022-02-20 22:07:30,652 INFO L290 TraceCheckUtils]: 149: Hoare triple {57134#false} call usb_acecad_probe_#t~mem172#1.base, usb_acecad_probe_#t~mem172#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem173#1 := read~int(usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset, 8); {57134#false} is VALID [2022-02-20 22:07:30,652 INFO L272 TraceCheckUtils]: 150: Hoare triple {57134#false} call usb_free_coherent(usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, 8, usb_acecad_probe_#t~mem172#1.base, usb_acecad_probe_#t~mem172#1.offset, usb_acecad_probe_#t~mem173#1); {57134#false} is VALID [2022-02-20 22:07:30,652 INFO L290 TraceCheckUtils]: 151: Hoare triple {57134#false} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1 := #in~arg1;~arg2.base, ~arg2.offset := #in~arg2.base, #in~arg2.offset;~arg3 := #in~arg3; {57134#false} is VALID [2022-02-20 22:07:30,652 INFO L290 TraceCheckUtils]: 152: Hoare triple {57134#false} assume true; {57134#false} is VALID [2022-02-20 22:07:30,652 INFO L284 TraceCheckUtils]: 153: Hoare quadruple {57134#false} {57134#false} #592#return; {57134#false} is VALID [2022-02-20 22:07:30,653 INFO L290 TraceCheckUtils]: 154: Hoare triple {57134#false} havoc usb_acecad_probe_#t~mem172#1.base, usb_acecad_probe_#t~mem172#1.offset;havoc usb_acecad_probe_#t~mem173#1; {57134#false} is VALID [2022-02-20 22:07:30,653 INFO L290 TraceCheckUtils]: 155: Hoare triple {57134#false} assume { :begin_inline_input_free_device } true;input_free_device_#in~arg0#1.base, input_free_device_#in~arg0#1.offset := usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset;havoc input_free_device_~arg0#1.base, input_free_device_~arg0#1.offset;input_free_device_~arg0#1.base, input_free_device_~arg0#1.offset := input_free_device_#in~arg0#1.base, input_free_device_#in~arg0#1.offset; {57134#false} is VALID [2022-02-20 22:07:30,653 INFO L290 TraceCheckUtils]: 156: Hoare triple {57134#false} assume { :end_inline_input_free_device } true; {57134#false} is VALID [2022-02-20 22:07:30,653 INFO L272 TraceCheckUtils]: 157: Hoare triple {57134#false} call kfree(usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset); {57134#false} is VALID [2022-02-20 22:07:30,653 INFO L290 TraceCheckUtils]: 158: Hoare triple {57134#false} ~p.base, ~p.offset := #in~p.base, #in~p.offset;call ULTIMATE.dealloc(~p.base, ~p.offset); {57134#false} is VALID [2022-02-20 22:07:30,653 INFO L290 TraceCheckUtils]: 159: Hoare triple {57134#false} assume true; {57134#false} is VALID [2022-02-20 22:07:30,653 INFO L284 TraceCheckUtils]: 160: Hoare quadruple {57134#false} {57134#false} #594#return; {57134#false} is VALID [2022-02-20 22:07:30,654 INFO L290 TraceCheckUtils]: 161: Hoare triple {57134#false} usb_acecad_probe_#res#1 := usb_acecad_probe_~err~0#1; {57134#false} is VALID [2022-02-20 22:07:30,654 INFO L290 TraceCheckUtils]: 162: Hoare triple {57134#false} main_#t~ret188#1 := usb_acecad_probe_#res#1;assume { :end_inline_usb_acecad_probe } true;assume -2147483648 <= main_#t~ret188#1 && main_#t~ret188#1 <= 2147483647;~ldv_retval_0~0 := main_#t~ret188#1;havoc main_#t~ret188#1; {57134#false} is VALID [2022-02-20 22:07:30,654 INFO L290 TraceCheckUtils]: 163: Hoare triple {57134#false} assume !(0 == ~ldv_retval_0~0); {57134#false} is VALID [2022-02-20 22:07:30,654 INFO L290 TraceCheckUtils]: 164: Hoare triple {57134#false} assume -2147483648 <= main_#t~nondet184#1 && main_#t~nondet184#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet184#1;havoc main_#t~nondet184#1;main_#t~switch185#1 := 0 == main_~tmp___0~6#1; {57134#false} is VALID [2022-02-20 22:07:30,654 INFO L290 TraceCheckUtils]: 165: Hoare triple {57134#false} assume !main_#t~switch185#1;main_#t~switch185#1 := main_#t~switch185#1 || 1 == main_~tmp___0~6#1; {57134#false} is VALID [2022-02-20 22:07:30,654 INFO L290 TraceCheckUtils]: 166: Hoare triple {57134#false} assume main_#t~switch185#1; {57134#false} is VALID [2022-02-20 22:07:30,654 INFO L290 TraceCheckUtils]: 167: Hoare triple {57134#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet189#1 && main_#t~nondet189#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet189#1;havoc main_#t~nondet189#1;main_#t~switch190#1 := 0 == main_~tmp___2~1#1; {57134#false} is VALID [2022-02-20 22:07:30,654 INFO L290 TraceCheckUtils]: 168: Hoare triple {57134#false} assume main_#t~switch190#1; {57134#false} is VALID [2022-02-20 22:07:30,655 INFO L290 TraceCheckUtils]: 169: Hoare triple {57134#false} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0;assume { :begin_inline_usb_acecad_exit } true;assume { :begin_inline_ldv_usb_deregister_11 } true;ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset := ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset;assume { :begin_inline_usb_deregister } true;usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset := ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;havoc usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset;usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset := usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset; {57134#false} is VALID [2022-02-20 22:07:30,655 INFO L290 TraceCheckUtils]: 170: Hoare triple {57134#false} assume { :end_inline_usb_deregister } true;~ldv_state_variable_1~0 := 0; {57134#false} is VALID [2022-02-20 22:07:30,655 INFO L290 TraceCheckUtils]: 171: Hoare triple {57134#false} assume { :end_inline_ldv_usb_deregister_11 } true; {57134#false} is VALID [2022-02-20 22:07:30,655 INFO L290 TraceCheckUtils]: 172: Hoare triple {57134#false} assume { :end_inline_usb_acecad_exit } true;~ldv_state_variable_0~0 := 2; {57134#false} is VALID [2022-02-20 22:07:30,655 INFO L290 TraceCheckUtils]: 173: Hoare triple {57134#false} assume { :begin_inline_ldv_check_final_state } true; {57134#false} is VALID [2022-02-20 22:07:30,655 INFO L290 TraceCheckUtils]: 174: Hoare triple {57134#false} assume 0 != (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616; {57134#false} is VALID [2022-02-20 22:07:30,655 INFO L272 TraceCheckUtils]: 175: Hoare triple {57134#false} call ldv_error(); {57134#false} is VALID [2022-02-20 22:07:30,656 INFO L290 TraceCheckUtils]: 176: Hoare triple {57134#false} assume !false; {57134#false} is VALID [2022-02-20 22:07:30,656 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 33 proven. 7 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2022-02-20 22:07:30,656 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-02-20 22:07:31,415 INFO L290 TraceCheckUtils]: 176: Hoare triple {57134#false} assume !false; {57134#false} is VALID [2022-02-20 22:07:31,415 INFO L272 TraceCheckUtils]: 175: Hoare triple {57134#false} call ldv_error(); {57134#false} is VALID [2022-02-20 22:07:31,416 INFO L290 TraceCheckUtils]: 174: Hoare triple {57134#false} assume 0 != (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616; {57134#false} is VALID [2022-02-20 22:07:31,416 INFO L290 TraceCheckUtils]: 173: Hoare triple {57134#false} assume { :begin_inline_ldv_check_final_state } true; {57134#false} is VALID [2022-02-20 22:07:31,416 INFO L290 TraceCheckUtils]: 172: Hoare triple {57134#false} assume { :end_inline_usb_acecad_exit } true;~ldv_state_variable_0~0 := 2; {57134#false} is VALID [2022-02-20 22:07:31,416 INFO L290 TraceCheckUtils]: 171: Hoare triple {57134#false} assume { :end_inline_ldv_usb_deregister_11 } true; {57134#false} is VALID [2022-02-20 22:07:31,416 INFO L290 TraceCheckUtils]: 170: Hoare triple {57134#false} assume { :end_inline_usb_deregister } true;~ldv_state_variable_1~0 := 0; {57134#false} is VALID [2022-02-20 22:07:31,416 INFO L290 TraceCheckUtils]: 169: Hoare triple {57134#false} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0;assume { :begin_inline_usb_acecad_exit } true;assume { :begin_inline_ldv_usb_deregister_11 } true;ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset := ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset;assume { :begin_inline_usb_deregister } true;usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset := ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;havoc usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset;usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset := usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset; {57134#false} is VALID [2022-02-20 22:07:31,416 INFO L290 TraceCheckUtils]: 168: Hoare triple {57134#false} assume main_#t~switch190#1; {57134#false} is VALID [2022-02-20 22:07:31,417 INFO L290 TraceCheckUtils]: 167: Hoare triple {57134#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet189#1 && main_#t~nondet189#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet189#1;havoc main_#t~nondet189#1;main_#t~switch190#1 := 0 == main_~tmp___2~1#1; {57134#false} is VALID [2022-02-20 22:07:31,417 INFO L290 TraceCheckUtils]: 166: Hoare triple {57134#false} assume main_#t~switch185#1; {57134#false} is VALID [2022-02-20 22:07:31,417 INFO L290 TraceCheckUtils]: 165: Hoare triple {57134#false} assume !main_#t~switch185#1;main_#t~switch185#1 := main_#t~switch185#1 || 1 == main_~tmp___0~6#1; {57134#false} is VALID [2022-02-20 22:07:31,417 INFO L290 TraceCheckUtils]: 164: Hoare triple {57134#false} assume -2147483648 <= main_#t~nondet184#1 && main_#t~nondet184#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet184#1;havoc main_#t~nondet184#1;main_#t~switch185#1 := 0 == main_~tmp___0~6#1; {57134#false} is VALID [2022-02-20 22:07:31,417 INFO L290 TraceCheckUtils]: 163: Hoare triple {57134#false} assume !(0 == ~ldv_retval_0~0); {57134#false} is VALID [2022-02-20 22:07:31,417 INFO L290 TraceCheckUtils]: 162: Hoare triple {57134#false} main_#t~ret188#1 := usb_acecad_probe_#res#1;assume { :end_inline_usb_acecad_probe } true;assume -2147483648 <= main_#t~ret188#1 && main_#t~ret188#1 <= 2147483647;~ldv_retval_0~0 := main_#t~ret188#1;havoc main_#t~ret188#1; {57134#false} is VALID [2022-02-20 22:07:31,417 INFO L290 TraceCheckUtils]: 161: Hoare triple {57134#false} usb_acecad_probe_#res#1 := usb_acecad_probe_~err~0#1; {57134#false} is VALID [2022-02-20 22:07:31,418 INFO L284 TraceCheckUtils]: 160: Hoare quadruple {57133#true} {57134#false} #594#return; {57134#false} is VALID [2022-02-20 22:07:31,418 INFO L290 TraceCheckUtils]: 159: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:31,418 INFO L290 TraceCheckUtils]: 158: Hoare triple {57133#true} ~p.base, ~p.offset := #in~p.base, #in~p.offset;call ULTIMATE.dealloc(~p.base, ~p.offset); {57133#true} is VALID [2022-02-20 22:07:31,418 INFO L272 TraceCheckUtils]: 157: Hoare triple {57134#false} call kfree(usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset); {57133#true} is VALID [2022-02-20 22:07:31,418 INFO L290 TraceCheckUtils]: 156: Hoare triple {57134#false} assume { :end_inline_input_free_device } true; {57134#false} is VALID [2022-02-20 22:07:31,418 INFO L290 TraceCheckUtils]: 155: Hoare triple {57134#false} assume { :begin_inline_input_free_device } true;input_free_device_#in~arg0#1.base, input_free_device_#in~arg0#1.offset := usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset;havoc input_free_device_~arg0#1.base, input_free_device_~arg0#1.offset;input_free_device_~arg0#1.base, input_free_device_~arg0#1.offset := input_free_device_#in~arg0#1.base, input_free_device_#in~arg0#1.offset; {57134#false} is VALID [2022-02-20 22:07:31,418 INFO L290 TraceCheckUtils]: 154: Hoare triple {57134#false} havoc usb_acecad_probe_#t~mem172#1.base, usb_acecad_probe_#t~mem172#1.offset;havoc usb_acecad_probe_#t~mem173#1; {57134#false} is VALID [2022-02-20 22:07:31,419 INFO L284 TraceCheckUtils]: 153: Hoare quadruple {57133#true} {57134#false} #592#return; {57134#false} is VALID [2022-02-20 22:07:31,419 INFO L290 TraceCheckUtils]: 152: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:31,419 INFO L290 TraceCheckUtils]: 151: Hoare triple {57133#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1 := #in~arg1;~arg2.base, ~arg2.offset := #in~arg2.base, #in~arg2.offset;~arg3 := #in~arg3; {57133#true} is VALID [2022-02-20 22:07:31,419 INFO L272 TraceCheckUtils]: 150: Hoare triple {57134#false} call usb_free_coherent(usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, 8, usb_acecad_probe_#t~mem172#1.base, usb_acecad_probe_#t~mem172#1.offset, usb_acecad_probe_#t~mem173#1); {57133#true} is VALID [2022-02-20 22:07:31,419 INFO L290 TraceCheckUtils]: 149: Hoare triple {57134#false} call usb_acecad_probe_#t~mem172#1.base, usb_acecad_probe_#t~mem172#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem173#1 := read~int(usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset, 8); {57134#false} is VALID [2022-02-20 22:07:31,419 INFO L290 TraceCheckUtils]: 148: Hoare triple {57134#false} assume 0 == (usb_acecad_probe_#t~mem140#1.base + usb_acecad_probe_#t~mem140#1.offset) % 18446744073709551616;havoc usb_acecad_probe_#t~mem140#1.base, usb_acecad_probe_#t~mem140#1.offset;usb_acecad_probe_~err~0#1 := -12; {57134#false} is VALID [2022-02-20 22:07:31,419 INFO L290 TraceCheckUtils]: 147: Hoare triple {57134#false} usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset := ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;assume { :end_inline_ldv_usb_alloc_urb_5 } true;call write~$Pointer$(usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset, usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8);havoc usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset;call usb_acecad_probe_#t~mem140#1.base, usb_acecad_probe_#t~mem140#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8); {57134#false} is VALID [2022-02-20 22:07:31,419 INFO L290 TraceCheckUtils]: 146: Hoare triple {57134#false} ldv_usb_alloc_urb_5_#t~ret196#1.base, ldv_usb_alloc_urb_5_#t~ret196#1.offset := ldv_alloc_urb_#res#1.base, ldv_alloc_urb_#res#1.offset;assume { :end_inline_ldv_alloc_urb } true;ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset := ldv_usb_alloc_urb_5_#t~ret196#1.base, ldv_usb_alloc_urb_5_#t~ret196#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret196#1.base, ldv_usb_alloc_urb_5_#t~ret196#1.offset;ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset := ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset; {57134#false} is VALID [2022-02-20 22:07:31,420 INFO L290 TraceCheckUtils]: 145: Hoare triple {57134#false} ldv_alloc_urb_#res#1.base, ldv_alloc_urb_#res#1.offset := ~usb_urb~0.base, ~usb_urb~0.offset; {57134#false} is VALID [2022-02-20 22:07:31,420 INFO L290 TraceCheckUtils]: 144: Hoare triple {57134#false} assume 0 != (ldv_alloc_urb_~value~0#1.base + ldv_alloc_urb_~value~0#1.offset) % 18446744073709551616;~usb_urb~0.base, ~usb_urb~0.offset := ldv_alloc_urb_~value~0#1.base, ldv_alloc_urb_~value~0#1.offset; {57134#false} is VALID [2022-02-20 22:07:31,420 INFO L290 TraceCheckUtils]: 143: Hoare triple {57134#false} assume 0 != ldv_alloc_urb_~tmp___0~7#1; {57134#false} is VALID [2022-02-20 22:07:31,420 INFO L290 TraceCheckUtils]: 142: Hoare triple {57134#false} assume -2147483648 <= ldv_alloc_urb_#t~ret199#1 && ldv_alloc_urb_#t~ret199#1 <= 2147483647;ldv_alloc_urb_~tmp___0~7#1 := ldv_alloc_urb_#t~ret199#1;havoc ldv_alloc_urb_#t~ret199#1; {57134#false} is VALID [2022-02-20 22:07:31,420 INFO L284 TraceCheckUtils]: 141: Hoare quadruple {57133#true} {57134#false} #570#return; {57134#false} is VALID [2022-02-20 22:07:31,420 INFO L290 TraceCheckUtils]: 140: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:31,420 INFO L290 TraceCheckUtils]: 139: Hoare triple {57133#true} havoc ~tmp~8;assume -2147483648 <= #t~nondet65 && #t~nondet65 <= 2147483647;~tmp~8 := #t~nondet65;havoc #t~nondet65;#res := ~tmp~8; {57133#true} is VALID [2022-02-20 22:07:31,421 INFO L272 TraceCheckUtils]: 138: Hoare triple {57134#false} call ldv_alloc_urb_#t~ret199#1 := ldv_undef_int(); {57133#true} is VALID [2022-02-20 22:07:31,421 INFO L290 TraceCheckUtils]: 137: Hoare triple {57134#false} ldv_alloc_urb_~tmp~24#1.base, ldv_alloc_urb_~tmp~24#1.offset := ldv_alloc_urb_#t~ret198#1.base, ldv_alloc_urb_#t~ret198#1.offset;havoc ldv_alloc_urb_#t~ret198#1.base, ldv_alloc_urb_#t~ret198#1.offset;ldv_alloc_urb_~value~0#1.base, ldv_alloc_urb_~value~0#1.offset := ldv_alloc_urb_~tmp~24#1.base, ldv_alloc_urb_~tmp~24#1.offset; {57134#false} is VALID [2022-02-20 22:07:31,421 INFO L284 TraceCheckUtils]: 136: Hoare quadruple {57133#true} {57134#false} #568#return; {57134#false} is VALID [2022-02-20 22:07:31,421 INFO L290 TraceCheckUtils]: 135: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:31,421 INFO L290 TraceCheckUtils]: 134: Hoare triple {57133#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {57133#true} is VALID [2022-02-20 22:07:31,421 INFO L290 TraceCheckUtils]: 133: Hoare triple {57133#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {57133#true} is VALID [2022-02-20 22:07:31,421 INFO L272 TraceCheckUtils]: 132: Hoare triple {57134#false} call ldv_alloc_urb_#t~ret198#1.base, ldv_alloc_urb_#t~ret198#1.offset := ldv_malloc(180); {57133#true} is VALID [2022-02-20 22:07:31,421 INFO L290 TraceCheckUtils]: 131: Hoare triple {57134#false} assume !(0 == (usb_acecad_probe_#t~mem138#1.base + usb_acecad_probe_#t~mem138#1.offset) % 18446744073709551616);havoc usb_acecad_probe_#t~mem138#1.base, usb_acecad_probe_#t~mem138#1.offset;assume { :begin_inline_ldv_usb_alloc_urb_5 } true;ldv_usb_alloc_urb_5_#in~iso_packets#1, ldv_usb_alloc_urb_5_#in~mem_flags#1 := 0, 208;havoc ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret196#1.base, ldv_usb_alloc_urb_5_#t~ret196#1.offset, ldv_usb_alloc_urb_5_~iso_packets#1, ldv_usb_alloc_urb_5_~mem_flags#1, ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;ldv_usb_alloc_urb_5_~iso_packets#1 := ldv_usb_alloc_urb_5_#in~iso_packets#1;ldv_usb_alloc_urb_5_~mem_flags#1 := ldv_usb_alloc_urb_5_#in~mem_flags#1;havoc ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;assume { :begin_inline_ldv_alloc_urb } true;havoc ldv_alloc_urb_#res#1.base, ldv_alloc_urb_#res#1.offset;havoc ldv_alloc_urb_#t~ret198#1.base, ldv_alloc_urb_#t~ret198#1.offset, ldv_alloc_urb_#t~ret199#1, ldv_alloc_urb_~value~0#1.base, ldv_alloc_urb_~value~0#1.offset, ldv_alloc_urb_~tmp~24#1.base, ldv_alloc_urb_~tmp~24#1.offset, ldv_alloc_urb_~tmp___0~7#1;havoc ldv_alloc_urb_~value~0#1.base, ldv_alloc_urb_~value~0#1.offset;havoc ldv_alloc_urb_~tmp~24#1.base, ldv_alloc_urb_~tmp~24#1.offset;havoc ldv_alloc_urb_~tmp___0~7#1; {57134#false} is VALID [2022-02-20 22:07:31,422 INFO L290 TraceCheckUtils]: 130: Hoare triple {57134#false} usb_acecad_probe_#t~ret137#1.base, usb_acecad_probe_#t~ret137#1.offset := usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;assume { :end_inline_usb_alloc_coherent } true;usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset := usb_acecad_probe_#t~ret137#1.base, usb_acecad_probe_#t~ret137#1.offset;havoc usb_acecad_probe_#t~ret137#1.base, usb_acecad_probe_#t~ret137#1.offset;call write~$Pointer$(usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem138#1.base, usb_acecad_probe_#t~mem138#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8); {57134#false} is VALID [2022-02-20 22:07:31,422 INFO L290 TraceCheckUtils]: 129: Hoare triple {57134#false} usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset := usb_alloc_coherent_#t~ret212#1.base, usb_alloc_coherent_#t~ret212#1.offset;havoc usb_alloc_coherent_#t~ret212#1.base, usb_alloc_coherent_#t~ret212#1.offset; {57134#false} is VALID [2022-02-20 22:07:31,422 INFO L284 TraceCheckUtils]: 128: Hoare quadruple {57133#true} {57134#false} #566#return; {57134#false} is VALID [2022-02-20 22:07:31,422 INFO L290 TraceCheckUtils]: 127: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:31,422 INFO L290 TraceCheckUtils]: 126: Hoare triple {57133#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {57133#true} is VALID [2022-02-20 22:07:31,422 INFO L290 TraceCheckUtils]: 125: Hoare triple {57133#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {57133#true} is VALID [2022-02-20 22:07:31,422 INFO L272 TraceCheckUtils]: 124: Hoare triple {57134#false} call usb_alloc_coherent_#t~ret212#1.base, usb_alloc_coherent_#t~ret212#1.offset := ldv_malloc(0); {57133#true} is VALID [2022-02-20 22:07:31,423 INFO L290 TraceCheckUtils]: 123: Hoare triple {57945#(= (mod (+ |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.base| |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.offset|) 18446744073709551616) 0)} assume !(0 == (usb_acecad_probe_~acecad~3#1.base + usb_acecad_probe_~acecad~3#1.offset) % 18446744073709551616 || 0 == (usb_acecad_probe_~input_dev~0#1.base + usb_acecad_probe_~input_dev~0#1.offset) % 18446744073709551616);assume { :begin_inline_usb_alloc_coherent } true;usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset, usb_alloc_coherent_#in~arg1#1, usb_alloc_coherent_#in~arg2#1, usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, 8, 208, usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset;havoc usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;havoc usb_alloc_coherent_#t~ret212#1.base, usb_alloc_coherent_#t~ret212#1.offset, usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset, usb_alloc_coherent_~arg1#1, usb_alloc_coherent_~arg2#1, usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset;usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset := usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset;usb_alloc_coherent_~arg1#1 := usb_alloc_coherent_#in~arg1#1;usb_alloc_coherent_~arg2#1 := usb_alloc_coherent_#in~arg2#1;usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset := usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset; {57134#false} is VALID [2022-02-20 22:07:31,423 INFO L290 TraceCheckUtils]: 122: Hoare triple {57945#(= (mod (+ |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.base| |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.offset|) 18446744073709551616) 0)} usb_acecad_probe_#t~ret136#1.base, usb_acecad_probe_#t~ret136#1.offset := input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;assume { :end_inline_input_allocate_device } true;usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset := usb_acecad_probe_#t~ret136#1.base, usb_acecad_probe_#t~ret136#1.offset;havoc usb_acecad_probe_#t~ret136#1.base, usb_acecad_probe_#t~ret136#1.offset; {57945#(= (mod (+ |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.base| |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.offset|) 18446744073709551616) 0)} is VALID [2022-02-20 22:07:31,424 INFO L290 TraceCheckUtils]: 121: Hoare triple {57945#(= (mod (+ |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.base| |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.offset|) 18446744073709551616) 0)} input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset := input_allocate_device_#t~ret67#1.base, input_allocate_device_#t~ret67#1.offset;havoc input_allocate_device_#t~ret67#1.base, input_allocate_device_#t~ret67#1.offset; {57945#(= (mod (+ |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.base| |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.offset|) 18446744073709551616) 0)} is VALID [2022-02-20 22:07:31,425 INFO L284 TraceCheckUtils]: 120: Hoare quadruple {57133#true} {57945#(= (mod (+ |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.base| |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.offset|) 18446744073709551616) 0)} #564#return; {57945#(= (mod (+ |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.base| |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.offset|) 18446744073709551616) 0)} is VALID [2022-02-20 22:07:31,425 INFO L290 TraceCheckUtils]: 119: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:31,425 INFO L290 TraceCheckUtils]: 118: Hoare triple {57133#true} #t~ret55#1.base, #t~ret55#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret55#1.base, #t~ret55#1.offset;havoc #t~ret55#1.base, #t~ret55#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {57133#true} is VALID [2022-02-20 22:07:31,425 INFO L290 TraceCheckUtils]: 117: Hoare triple {57133#true} kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {57133#true} is VALID [2022-02-20 22:07:31,425 INFO L290 TraceCheckUtils]: 116: Hoare triple {57133#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset; {57133#true} is VALID [2022-02-20 22:07:31,425 INFO L284 TraceCheckUtils]: 115: Hoare quadruple {57133#true} {57133#true} #530#return; {57133#true} is VALID [2022-02-20 22:07:31,425 INFO L290 TraceCheckUtils]: 114: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:31,426 INFO L290 TraceCheckUtils]: 113: Hoare triple {57133#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {57133#true} is VALID [2022-02-20 22:07:31,426 INFO L290 TraceCheckUtils]: 112: Hoare triple {57133#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {57133#true} is VALID [2022-02-20 22:07:31,426 INFO L272 TraceCheckUtils]: 111: Hoare triple {57133#true} call __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset := ldv_malloc(__kmalloc_~size#1); {57133#true} is VALID [2022-02-20 22:07:31,426 INFO L290 TraceCheckUtils]: 110: Hoare triple {57133#true} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {57133#true} is VALID [2022-02-20 22:07:31,426 INFO L272 TraceCheckUtils]: 109: Hoare triple {57945#(= (mod (+ |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.base| |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.offset|) 18446744073709551616) 0)} call input_allocate_device_#t~ret67#1.base, input_allocate_device_#t~ret67#1.offset := kzalloc(1855, ~bitwiseOr(~bitwiseOr(16, 64), 128)); {57133#true} is VALID [2022-02-20 22:07:31,427 INFO L290 TraceCheckUtils]: 108: Hoare triple {57991#(= 0 (mod (+ |ULTIMATE.start_usb_acecad_probe_#t~ret135#1.base| |ULTIMATE.start_usb_acecad_probe_#t~ret135#1.offset|) 18446744073709551616))} usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset := usb_acecad_probe_#t~ret135#1.base, usb_acecad_probe_#t~ret135#1.offset;havoc usb_acecad_probe_#t~ret135#1.base, usb_acecad_probe_#t~ret135#1.offset;usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset := usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;assume { :begin_inline_input_allocate_device } true;havoc input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;havoc input_allocate_device_#t~ret67#1.base, input_allocate_device_#t~ret67#1.offset; {57945#(= (mod (+ |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.base| |ULTIMATE.start_usb_acecad_probe_~acecad~3#1.offset|) 18446744073709551616) 0)} is VALID [2022-02-20 22:07:31,428 INFO L284 TraceCheckUtils]: 107: Hoare quadruple {57998#(= (mod (+ |kzalloc_#res#1.offset| |kzalloc_#res#1.base|) 18446744073709551616) 0)} {57133#true} #562#return; {57991#(= 0 (mod (+ |ULTIMATE.start_usb_acecad_probe_#t~ret135#1.base| |ULTIMATE.start_usb_acecad_probe_#t~ret135#1.offset|) 18446744073709551616))} is VALID [2022-02-20 22:07:31,428 INFO L290 TraceCheckUtils]: 106: Hoare triple {57998#(= (mod (+ |kzalloc_#res#1.offset| |kzalloc_#res#1.base|) 18446744073709551616) 0)} assume true; {57998#(= (mod (+ |kzalloc_#res#1.offset| |kzalloc_#res#1.base|) 18446744073709551616) 0)} is VALID [2022-02-20 22:07:31,429 INFO L290 TraceCheckUtils]: 105: Hoare triple {58005#(= (mod (+ |kzalloc_kmalloc_#res#1.base| |kzalloc_kmalloc_#res#1.offset|) 18446744073709551616) 0)} #t~ret55#1.base, #t~ret55#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret55#1.base, #t~ret55#1.offset;havoc #t~ret55#1.base, #t~ret55#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {57998#(= (mod (+ |kzalloc_#res#1.offset| |kzalloc_#res#1.base|) 18446744073709551616) 0)} is VALID [2022-02-20 22:07:31,429 INFO L290 TraceCheckUtils]: 104: Hoare triple {58009#(= (mod (+ |kzalloc___kmalloc_#res#1.base| |kzalloc___kmalloc_#res#1.offset|) 18446744073709551616) 0)} kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {58005#(= (mod (+ |kzalloc_kmalloc_#res#1.base| |kzalloc_kmalloc_#res#1.offset|) 18446744073709551616) 0)} is VALID [2022-02-20 22:07:31,430 INFO L290 TraceCheckUtils]: 103: Hoare triple {58013#(= (mod (+ |kzalloc___kmalloc_#t~ret53#1.base| |kzalloc___kmalloc_#t~ret53#1.offset|) 18446744073709551616) 0)} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset; {58009#(= (mod (+ |kzalloc___kmalloc_#res#1.base| |kzalloc___kmalloc_#res#1.offset|) 18446744073709551616) 0)} is VALID [2022-02-20 22:07:31,430 INFO L284 TraceCheckUtils]: 102: Hoare quadruple {58020#(= (mod (+ |ldv_malloc_#res.offset| |ldv_malloc_#res.base|) 18446744073709551616) 0)} {57133#true} #530#return; {58013#(= (mod (+ |kzalloc___kmalloc_#t~ret53#1.base| |kzalloc___kmalloc_#t~ret53#1.offset|) 18446744073709551616) 0)} is VALID [2022-02-20 22:07:31,431 INFO L290 TraceCheckUtils]: 101: Hoare triple {58020#(= (mod (+ |ldv_malloc_#res.offset| |ldv_malloc_#res.base|) 18446744073709551616) 0)} assume true; {58020#(= (mod (+ |ldv_malloc_#res.offset| |ldv_malloc_#res.base|) 18446744073709551616) 0)} is VALID [2022-02-20 22:07:31,431 INFO L290 TraceCheckUtils]: 100: Hoare triple {57133#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {58020#(= (mod (+ |ldv_malloc_#res.offset| |ldv_malloc_#res.base|) 18446744073709551616) 0)} is VALID [2022-02-20 22:07:31,431 INFO L290 TraceCheckUtils]: 99: Hoare triple {57133#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {57133#true} is VALID [2022-02-20 22:07:31,431 INFO L272 TraceCheckUtils]: 98: Hoare triple {57133#true} call __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset := ldv_malloc(__kmalloc_~size#1); {57133#true} is VALID [2022-02-20 22:07:31,432 INFO L290 TraceCheckUtils]: 97: Hoare triple {57133#true} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {57133#true} is VALID [2022-02-20 22:07:31,432 INFO L272 TraceCheckUtils]: 96: Hoare triple {57133#true} call usb_acecad_probe_#t~ret135#1.base, usb_acecad_probe_#t~ret135#1.offset := kzalloc(232, 208); {57133#true} is VALID [2022-02-20 22:07:31,432 INFO L290 TraceCheckUtils]: 95: Hoare triple {57133#true} usb_acecad_probe_#t~ret134#1 := usb_maxpacket_#res#1;assume { :end_inline_usb_maxpacket } true;usb_acecad_probe_~tmp___2~0#1 := usb_acecad_probe_#t~ret134#1;havoc usb_acecad_probe_#t~ret134#1;usb_acecad_probe_~maxp~0#1 := usb_acecad_probe_~tmp___2~0#1 % 65536; {57133#true} is VALID [2022-02-20 22:07:31,432 INFO L290 TraceCheckUtils]: 94: Hoare triple {57133#true} assume 0 == (usb_maxpacket_~ep~0#1.base + usb_maxpacket_~ep~0#1.offset) % 18446744073709551616;usb_maxpacket_#res#1 := 0; {57133#true} is VALID [2022-02-20 22:07:31,432 INFO L290 TraceCheckUtils]: 93: Hoare triple {57133#true} assume -9223372036854775808 <= usb_maxpacket_#t~ret48#1 && usb_maxpacket_#t~ret48#1 <= 9223372036854775807;havoc usb_maxpacket_#t~ret48#1;call usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset := read~$Pointer$(usb_maxpacket_~udev#1.base, 1186 + usb_maxpacket_~udev#1.offset + 8 * (usb_maxpacket_~epnum~0#1 % 4294967296), 8);usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset := usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset;havoc usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset; {57133#true} is VALID [2022-02-20 22:07:31,432 INFO L284 TraceCheckUtils]: 92: Hoare quadruple {57133#true} {57133#true} #560#return; {57133#true} is VALID [2022-02-20 22:07:31,433 INFO L290 TraceCheckUtils]: 91: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:31,433 INFO L290 TraceCheckUtils]: 90: Hoare triple {57133#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {57133#true} is VALID [2022-02-20 22:07:31,433 INFO L272 TraceCheckUtils]: 89: Hoare triple {57133#true} call usb_maxpacket_#t~ret48#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {57133#true} is VALID [2022-02-20 22:07:31,433 INFO L290 TraceCheckUtils]: 88: Hoare triple {57133#true} assume !(0 != usb_maxpacket_~tmp___0~1#1); {57133#true} is VALID [2022-02-20 22:07:31,433 INFO L290 TraceCheckUtils]: 87: Hoare triple {57133#true} assume -9223372036854775808 <= usb_maxpacket_#t~ret47#1 && usb_maxpacket_#t~ret47#1 <= 9223372036854775807;usb_maxpacket_~tmp___0~1#1 := usb_maxpacket_#t~ret47#1;havoc usb_maxpacket_#t~ret47#1; {57133#true} is VALID [2022-02-20 22:07:31,433 INFO L284 TraceCheckUtils]: 86: Hoare quadruple {57133#true} {57133#true} #556#return; {57133#true} is VALID [2022-02-20 22:07:31,433 INFO L290 TraceCheckUtils]: 85: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:31,433 INFO L290 TraceCheckUtils]: 84: Hoare triple {57133#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {57133#true} is VALID [2022-02-20 22:07:31,434 INFO L272 TraceCheckUtils]: 83: Hoare triple {57133#true} call usb_maxpacket_#t~ret47#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {57133#true} is VALID [2022-02-20 22:07:31,434 INFO L290 TraceCheckUtils]: 82: Hoare triple {57133#true} assume !(0 != usb_maxpacket_~is_out#1);usb_maxpacket_~__ret_warn_on___0~0#1 := (if 0 == (if 0 == usb_maxpacket_~pipe#1 then 0 else (if 1 == usb_maxpacket_~pipe#1 then 0 else ~bitwiseAnd(usb_maxpacket_~pipe#1, 128))) then 1 else 0); {57133#true} is VALID [2022-02-20 22:07:31,434 INFO L290 TraceCheckUtils]: 81: Hoare triple {57133#true} assume 0 == usb_maxpacket_~pipe#1 / 32768;usb_maxpacket_~epnum~0#1 := 0; {57133#true} is VALID [2022-02-20 22:07:31,434 INFO L290 TraceCheckUtils]: 80: Hoare triple {57133#true} usb_acecad_probe_#t~ret133#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;usb_acecad_probe_~tmp___1~2#1 := usb_acecad_probe_#t~ret133#1;havoc usb_acecad_probe_#t~mem132#1;havoc usb_acecad_probe_#t~ret133#1;usb_acecad_probe_~pipe~0#1 := (if ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 else ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 - 4294967296);assume { :begin_inline_usb_maxpacket } true;usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset, usb_maxpacket_#in~pipe#1, usb_maxpacket_#in~is_out#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~pipe~0#1, (if 0 == (if 0 == usb_acecad_probe_~pipe~0#1 then 0 else (if 1 == usb_acecad_probe_~pipe~0#1 then 0 else ~bitwiseAnd(usb_acecad_probe_~pipe~0#1, 128))) then 1 else 0);havoc usb_maxpacket_#res#1;havoc usb_maxpacket_#t~ret44#1, usb_maxpacket_#t~ret45#1, usb_maxpacket_#t~mem46#1.base, usb_maxpacket_#t~mem46#1.offset, usb_maxpacket_#t~ret47#1, usb_maxpacket_#t~ret48#1, usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset, usb_maxpacket_#t~mem50#1, usb_maxpacket_#t~nondet43#1, usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset, usb_maxpacket_~pipe#1, usb_maxpacket_~is_out#1, usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset, usb_maxpacket_~epnum~0#1, usb_maxpacket_~__ret_warn_on~0#1, usb_maxpacket_~tmp~2#1, usb_maxpacket_~__ret_warn_on___0~0#1, usb_maxpacket_~tmp___0~1#1;usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset := usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset;usb_maxpacket_~pipe#1 := usb_maxpacket_#in~pipe#1;usb_maxpacket_~is_out#1 := usb_maxpacket_#in~is_out#1;havoc usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset;havoc usb_maxpacket_~epnum~0#1;havoc usb_maxpacket_~__ret_warn_on~0#1;havoc usb_maxpacket_~tmp~2#1;havoc usb_maxpacket_~__ret_warn_on___0~0#1;havoc usb_maxpacket_~tmp___0~1#1; {57133#true} is VALID [2022-02-20 22:07:31,434 INFO L290 TraceCheckUtils]: 79: Hoare triple {57133#true} assume !(0 == usb_acecad_probe_~tmp___0~5#1);call usb_acecad_probe_#t~mem132#1 := read~int(usb_acecad_probe_~endpoint~0#1.base, 2 + usb_acecad_probe_~endpoint~0#1.offset, 1);assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_#t~mem132#1 % 256;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem42#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem42#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := (if (1 == 256 * __create_pipe_#t~mem42#1 || 0 == 256 * __create_pipe_#t~mem42#1) && 0 == 32768 * __create_pipe_~endpoint#1 then 256 * __create_pipe_#t~mem42#1 else (if 0 == 256 * __create_pipe_#t~mem42#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1) then 32768 * __create_pipe_~endpoint#1 else (if (1 == 256 * __create_pipe_#t~mem42#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1)) || ((1 == 256 * __create_pipe_#t~mem42#1 || 0 == 256 * __create_pipe_#t~mem42#1) && 1 == 32768 * __create_pipe_~endpoint#1) then 1 else ~bitwiseOr(256 * __create_pipe_#t~mem42#1, 32768 * __create_pipe_~endpoint#1))));havoc __create_pipe_#t~mem42#1; {57133#true} is VALID [2022-02-20 22:07:31,434 INFO L290 TraceCheckUtils]: 78: Hoare triple {57133#true} usb_acecad_probe_#t~ret131#1 := usb_endpoint_is_int_in_#res#1;assume { :end_inline_usb_endpoint_is_int_in } true;assume -2147483648 <= usb_acecad_probe_#t~ret131#1 && usb_acecad_probe_#t~ret131#1 <= 2147483647;usb_acecad_probe_~tmp___0~5#1 := usb_acecad_probe_#t~ret131#1;havoc usb_acecad_probe_#t~ret131#1; {57133#true} is VALID [2022-02-20 22:07:31,434 INFO L290 TraceCheckUtils]: 77: Hoare triple {57133#true} usb_endpoint_is_int_in_#res#1 := usb_endpoint_is_int_in_~tmp___1~0#1; {57133#true} is VALID [2022-02-20 22:07:31,435 INFO L290 TraceCheckUtils]: 76: Hoare triple {57133#true} assume 0 != usb_endpoint_is_int_in_~tmp___0~0#1;usb_endpoint_is_int_in_~tmp___1~0#1 := 1; {57133#true} is VALID [2022-02-20 22:07:31,435 INFO L290 TraceCheckUtils]: 75: Hoare triple {57133#true} usb_endpoint_is_int_in_#t~ret4#1 := usb_endpoint_dir_in_#res#1;assume { :end_inline_usb_endpoint_dir_in } true;assume -2147483648 <= usb_endpoint_is_int_in_#t~ret4#1 && usb_endpoint_is_int_in_#t~ret4#1 <= 2147483647;usb_endpoint_is_int_in_~tmp___0~0#1 := usb_endpoint_is_int_in_#t~ret4#1;havoc usb_endpoint_is_int_in_#t~ret4#1; {57133#true} is VALID [2022-02-20 22:07:31,435 INFO L290 TraceCheckUtils]: 74: Hoare triple {57133#true} assume 0 != usb_endpoint_is_int_in_~tmp~0#1;assume { :begin_inline_usb_endpoint_dir_in } true;usb_endpoint_dir_in_#in~epd#1.base, usb_endpoint_dir_in_#in~epd#1.offset := usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset;havoc usb_endpoint_dir_in_#res#1;havoc usb_endpoint_dir_in_#t~mem1#1, usb_endpoint_dir_in_~epd#1.base, usb_endpoint_dir_in_~epd#1.offset;usb_endpoint_dir_in_~epd#1.base, usb_endpoint_dir_in_~epd#1.offset := usb_endpoint_dir_in_#in~epd#1.base, usb_endpoint_dir_in_#in~epd#1.offset;call usb_endpoint_dir_in_#t~mem1#1 := read~int(usb_endpoint_dir_in_~epd#1.base, 2 + usb_endpoint_dir_in_~epd#1.offset, 1);usb_endpoint_dir_in_#res#1 := (if (if usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 <= 127 then usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 else usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 - 256) < 0 then 1 else 0);havoc usb_endpoint_dir_in_#t~mem1#1; {57133#true} is VALID [2022-02-20 22:07:31,435 INFO L290 TraceCheckUtils]: 73: Hoare triple {57133#true} usb_endpoint_is_int_in_#t~ret3#1 := usb_endpoint_xfer_int_#res#1;assume { :end_inline_usb_endpoint_xfer_int } true;assume -2147483648 <= usb_endpoint_is_int_in_#t~ret3#1 && usb_endpoint_is_int_in_#t~ret3#1 <= 2147483647;usb_endpoint_is_int_in_~tmp~0#1 := usb_endpoint_is_int_in_#t~ret3#1;havoc usb_endpoint_is_int_in_#t~ret3#1; {57133#true} is VALID [2022-02-20 22:07:31,435 INFO L290 TraceCheckUtils]: 72: Hoare triple {57133#true} assume !(1 != usb_acecad_probe_#t~mem129#1 % 256 % 4294967296);havoc usb_acecad_probe_#t~mem129#1;call usb_acecad_probe_#t~mem130#1.base, usb_acecad_probe_#t~mem130#1.offset := read~$Pointer$(usb_acecad_probe_~interface~0#1.base, 9 + usb_acecad_probe_~interface~0#1.offset, 8);usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset := usb_acecad_probe_#t~mem130#1.base, usb_acecad_probe_#t~mem130#1.offset;havoc usb_acecad_probe_#t~mem130#1.base, usb_acecad_probe_#t~mem130#1.offset;assume { :begin_inline_usb_endpoint_is_int_in } true;usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset := usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_endpoint_is_int_in_#res#1;havoc usb_endpoint_is_int_in_#t~ret3#1, usb_endpoint_is_int_in_#t~ret4#1, usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset, usb_endpoint_is_int_in_~tmp~0#1, usb_endpoint_is_int_in_~tmp___0~0#1, usb_endpoint_is_int_in_~tmp___1~0#1;usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset := usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset;havoc usb_endpoint_is_int_in_~tmp~0#1;havoc usb_endpoint_is_int_in_~tmp___0~0#1;havoc usb_endpoint_is_int_in_~tmp___1~0#1;assume { :begin_inline_usb_endpoint_xfer_int } true;usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset := usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset;havoc usb_endpoint_xfer_int_#res#1;havoc usb_endpoint_xfer_int_#t~mem2#1, usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset;usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset := usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset;call usb_endpoint_xfer_int_#t~mem2#1 := read~int(usb_endpoint_xfer_int_~epd#1.base, 3 + usb_endpoint_xfer_int_~epd#1.offset, 1);usb_endpoint_xfer_int_#res#1 := (if 3 == (if 0 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 0 else (if 1 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 1 else ~bitwiseAnd(usb_endpoint_xfer_int_#t~mem2#1 % 256, 3))) then 1 else 0);havoc usb_endpoint_xfer_int_#t~mem2#1; {57133#true} is VALID [2022-02-20 22:07:31,435 INFO L290 TraceCheckUtils]: 71: Hoare triple {57133#true} usb_acecad_probe_#t~ret127#1.base, usb_acecad_probe_#t~ret127#1.offset := interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;assume { :end_inline_interface_to_usbdev } true;usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset := usb_acecad_probe_#t~ret127#1.base, usb_acecad_probe_#t~ret127#1.offset;havoc usb_acecad_probe_#t~ret127#1.base, usb_acecad_probe_#t~ret127#1.offset;usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset := usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;call usb_acecad_probe_#t~mem128#1.base, usb_acecad_probe_#t~mem128#1.offset := read~$Pointer$(usb_acecad_probe_~intf#1.base, 8 + usb_acecad_probe_~intf#1.offset, 8);usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset := usb_acecad_probe_#t~mem128#1.base, usb_acecad_probe_#t~mem128#1.offset;havoc usb_acecad_probe_#t~mem128#1.base, usb_acecad_probe_#t~mem128#1.offset;call usb_acecad_probe_#t~mem129#1 := read~int(usb_acecad_probe_~interface~0#1.base, 4 + usb_acecad_probe_~interface~0#1.offset, 1); {57133#true} is VALID [2022-02-20 22:07:31,435 INFO L290 TraceCheckUtils]: 70: Hoare triple {57133#true} interface_to_usbdev_#t~ret192#1.base, interface_to_usbdev_#t~ret192#1.offset := ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;assume { :end_inline_ldv_interface_to_usbdev } true;interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset := interface_to_usbdev_#t~ret192#1.base, interface_to_usbdev_#t~ret192#1.offset;havoc interface_to_usbdev_#t~ret192#1.base, interface_to_usbdev_#t~ret192#1.offset;interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset := interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset; {57133#true} is VALID [2022-02-20 22:07:31,436 INFO L290 TraceCheckUtils]: 69: Hoare triple {57133#true} ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset := ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset; {57133#true} is VALID [2022-02-20 22:07:31,436 INFO L290 TraceCheckUtils]: 68: Hoare triple {57133#true} assume !(0 == (ldv_interface_to_usbdev_~result~1#1.base + ldv_interface_to_usbdev_~result~1#1.offset) % 18446744073709551616); {57133#true} is VALID [2022-02-20 22:07:31,436 INFO L290 TraceCheckUtils]: 67: Hoare triple {57133#true} ldv_interface_to_usbdev_~tmp~26#1.base, ldv_interface_to_usbdev_~tmp~26#1.offset := ldv_interface_to_usbdev_#t~ret203#1.base, ldv_interface_to_usbdev_#t~ret203#1.offset;havoc ldv_interface_to_usbdev_#t~ret203#1.base, ldv_interface_to_usbdev_#t~ret203#1.offset;ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset := ldv_interface_to_usbdev_~tmp~26#1.base, ldv_interface_to_usbdev_~tmp~26#1.offset; {57133#true} is VALID [2022-02-20 22:07:31,436 INFO L284 TraceCheckUtils]: 66: Hoare quadruple {57133#true} {57133#true} #546#return; {57133#true} is VALID [2022-02-20 22:07:31,436 INFO L290 TraceCheckUtils]: 65: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:31,436 INFO L290 TraceCheckUtils]: 64: Hoare triple {57133#true} #res.base, #res.offset := ~p~0.base, ~p~0.offset; {57133#true} is VALID [2022-02-20 22:07:31,436 INFO L284 TraceCheckUtils]: 63: Hoare quadruple {57133#true} {57133#true} #542#return; {57133#true} is VALID [2022-02-20 22:07:31,437 INFO L290 TraceCheckUtils]: 62: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:31,437 INFO L290 TraceCheckUtils]: 61: Hoare triple {57133#true} assume !(0 == ~cond); {57133#true} is VALID [2022-02-20 22:07:31,437 INFO L290 TraceCheckUtils]: 60: Hoare triple {57133#true} ~cond := #in~cond; {57133#true} is VALID [2022-02-20 22:07:31,437 INFO L272 TraceCheckUtils]: 59: Hoare triple {57133#true} call assume_abort_if_not((if 0 != (~p~0.base + ~p~0.offset) % 18446744073709551616 then 1 else 0)); {57133#true} is VALID [2022-02-20 22:07:31,437 INFO L290 TraceCheckUtils]: 58: Hoare triple {57133#true} assume !(0 != ~tmp___0~2);call #t~malloc60.base, #t~malloc60.offset := #Ultimate.allocOnHeap(~size);~tmp~4.base, ~tmp~4.offset := #t~malloc60.base, #t~malloc60.offset;havoc #t~malloc60.base, #t~malloc60.offset;~p~0.base, ~p~0.offset := ~tmp~4.base, ~tmp~4.offset; {57133#true} is VALID [2022-02-20 22:07:31,437 INFO L290 TraceCheckUtils]: 57: Hoare triple {57133#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {57133#true} is VALID [2022-02-20 22:07:31,437 INFO L272 TraceCheckUtils]: 56: Hoare triple {57133#true} call ldv_interface_to_usbdev_#t~ret203#1.base, ldv_interface_to_usbdev_#t~ret203#1.offset := ldv_malloc(1822); {57133#true} is VALID [2022-02-20 22:07:31,438 INFO L290 TraceCheckUtils]: 55: Hoare triple {57133#true} assume 1 == ~ldv_state_variable_1~0;assume { :begin_inline_usb_acecad_probe } true;usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset, usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset := ~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc usb_acecad_probe_#res#1;havoc usb_acecad_probe_#t~ret127#1.base, usb_acecad_probe_#t~ret127#1.offset, usb_acecad_probe_#t~mem128#1.base, usb_acecad_probe_#t~mem128#1.offset, usb_acecad_probe_#t~mem129#1, usb_acecad_probe_#t~mem130#1.base, usb_acecad_probe_#t~mem130#1.offset, usb_acecad_probe_#t~ret131#1, usb_acecad_probe_#t~mem132#1, usb_acecad_probe_#t~ret133#1, usb_acecad_probe_#t~ret134#1, usb_acecad_probe_#t~ret135#1.base, usb_acecad_probe_#t~ret135#1.offset, usb_acecad_probe_#t~ret136#1.base, usb_acecad_probe_#t~ret136#1.offset, usb_acecad_probe_#t~ret137#1.base, usb_acecad_probe_#t~ret137#1.offset, usb_acecad_probe_#t~mem138#1.base, usb_acecad_probe_#t~mem138#1.offset, usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset, usb_acecad_probe_#t~mem140#1.base, usb_acecad_probe_#t~mem140#1.offset, usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset, usb_acecad_probe_#t~mem142#1.base, usb_acecad_probe_#t~mem142#1.offset, usb_acecad_probe_#t~ret143#1, usb_acecad_probe_#t~mem144#1.base, usb_acecad_probe_#t~mem144#1.offset, usb_acecad_probe_#t~mem145#1.base, usb_acecad_probe_#t~mem145#1.offset, usb_acecad_probe_#t~ret146#1, usb_acecad_probe_#t~mem147#1.base, usb_acecad_probe_#t~mem147#1.offset, usb_acecad_probe_#t~ret148#1, usb_acecad_probe_#t~ret149#1, usb_acecad_probe_#t~ret150#1, usb_acecad_probe_#t~mem151#1, usb_acecad_probe_#t~switch152#1, usb_acecad_probe_#t~nondet153#1, usb_acecad_probe_#t~nondet154#1, usb_acecad_probe_#t~mem155#1, usb_acecad_probe_#t~mem156#1, usb_acecad_probe_#t~nondet157#1, usb_acecad_probe_#t~nondet158#1, usb_acecad_probe_#t~mem159#1, usb_acecad_probe_#t~mem160#1, usb_acecad_probe_#t~mem161#1.base, usb_acecad_probe_#t~mem161#1.offset, usb_acecad_probe_#t~mem162#1.base, usb_acecad_probe_#t~mem162#1.offset, usb_acecad_probe_#t~ite163#1, usb_acecad_probe_#t~mem164#1, usb_acecad_probe_#t~mem165#1.base, usb_acecad_probe_#t~mem165#1.offset, usb_acecad_probe_#t~mem166#1, usb_acecad_probe_#t~mem167#1.base, usb_acecad_probe_#t~mem167#1.offset, usb_acecad_probe_#t~mem168#1.base, usb_acecad_probe_#t~mem168#1.offset, usb_acecad_probe_#t~mem169#1, usb_acecad_probe_#t~mem170#1.base, usb_acecad_probe_#t~mem170#1.offset, usb_acecad_probe_#t~ret171#1, usb_acecad_probe_#t~mem172#1.base, usb_acecad_probe_#t~mem172#1.offset, usb_acecad_probe_#t~mem173#1, usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset, usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset, usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset, usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset, usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset, usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset, usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset, usb_acecad_probe_~pipe~0#1, usb_acecad_probe_~maxp~0#1, usb_acecad_probe_~err~0#1, usb_acecad_probe_~tmp___0~5#1, usb_acecad_probe_~tmp___1~2#1, usb_acecad_probe_~tmp___2~0#1, usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset, usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~tmp___5~0#1, usb_acecad_probe_~tmp___6~0#1;usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset := usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset;usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset := usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset;havoc usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset;havoc usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;havoc usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset;havoc usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset;havoc usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset;havoc usb_acecad_probe_~pipe~0#1;havoc usb_acecad_probe_~maxp~0#1;havoc usb_acecad_probe_~err~0#1;havoc usb_acecad_probe_~tmp___0~5#1;havoc usb_acecad_probe_~tmp___1~2#1;havoc usb_acecad_probe_~tmp___2~0#1;havoc usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;havoc usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset;havoc usb_acecad_probe_~tmp___5~0#1;havoc usb_acecad_probe_~tmp___6~0#1;assume { :begin_inline_interface_to_usbdev } true;interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset := usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset;havoc interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;havoc interface_to_usbdev_#t~ret192#1.base, interface_to_usbdev_#t~ret192#1.offset, interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset, interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset := interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset;havoc interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;assume { :begin_inline_ldv_interface_to_usbdev } true;havoc ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;havoc ldv_interface_to_usbdev_#t~ret203#1.base, ldv_interface_to_usbdev_#t~ret203#1.offset, ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset, ldv_interface_to_usbdev_~tmp~26#1.base, ldv_interface_to_usbdev_~tmp~26#1.offset;havoc ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset;havoc ldv_interface_to_usbdev_~tmp~26#1.base, ldv_interface_to_usbdev_~tmp~26#1.offset; {57133#true} is VALID [2022-02-20 22:07:31,438 INFO L290 TraceCheckUtils]: 54: Hoare triple {57133#true} assume main_#t~switch187#1; {57133#true} is VALID [2022-02-20 22:07:31,438 INFO L290 TraceCheckUtils]: 53: Hoare triple {57133#true} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= main_#t~nondet186#1 && main_#t~nondet186#1 <= 2147483647;main_~tmp___1~3#1 := main_#t~nondet186#1;havoc main_#t~nondet186#1;main_#t~switch187#1 := 0 == main_~tmp___1~3#1; {57133#true} is VALID [2022-02-20 22:07:31,438 INFO L290 TraceCheckUtils]: 52: Hoare triple {57133#true} assume main_#t~switch185#1; {57133#true} is VALID [2022-02-20 22:07:31,438 INFO L290 TraceCheckUtils]: 51: Hoare triple {57133#true} assume -2147483648 <= main_#t~nondet184#1 && main_#t~nondet184#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet184#1;havoc main_#t~nondet184#1;main_#t~switch185#1 := 0 == main_~tmp___0~6#1; {57133#true} is VALID [2022-02-20 22:07:31,438 INFO L290 TraceCheckUtils]: 50: Hoare triple {57133#true} assume !(0 != ~ldv_retval_1~0); {57133#true} is VALID [2022-02-20 22:07:31,438 INFO L290 TraceCheckUtils]: 49: Hoare triple {57133#true} assume 0 == ~ldv_retval_1~0;~ldv_state_variable_0~0 := 3; {57133#true} is VALID [2022-02-20 22:07:31,439 INFO L290 TraceCheckUtils]: 48: Hoare triple {57133#true} main_#t~ret191#1 := usb_acecad_init_#res#1;assume { :end_inline_usb_acecad_init } true;assume -2147483648 <= main_#t~ret191#1 && main_#t~ret191#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret191#1;havoc main_#t~ret191#1; {57133#true} is VALID [2022-02-20 22:07:31,439 INFO L290 TraceCheckUtils]: 47: Hoare triple {57133#true} usb_acecad_init_#res#1 := usb_acecad_init_~result~0#1; {57133#true} is VALID [2022-02-20 22:07:31,439 INFO L290 TraceCheckUtils]: 46: Hoare triple {57133#true} assume 0 == usb_acecad_init_~result~0#1;havoc usb_acecad_init_#t~nondet181#1; {57133#true} is VALID [2022-02-20 22:07:31,439 INFO L290 TraceCheckUtils]: 45: Hoare triple {57133#true} usb_acecad_init_#t~ret180#1 := usb_register_#res#1;assume { :end_inline_usb_register } true;assume -2147483648 <= usb_acecad_init_#t~ret180#1 && usb_acecad_init_#t~ret180#1 <= 2147483647;usb_acecad_init_~tmp~15#1 := usb_acecad_init_#t~ret180#1;havoc usb_acecad_init_#t~ret180#1;usb_acecad_init_~result~0#1 := usb_acecad_init_~tmp~15#1; {57133#true} is VALID [2022-02-20 22:07:31,439 INFO L290 TraceCheckUtils]: 44: Hoare triple {57133#true} usb_register_#t~ret31#1 := ldv_usb_register_driver_2_#res#1;assume { :end_inline_ldv_usb_register_driver_2 } true;assume -2147483648 <= usb_register_#t~ret31#1 && usb_register_#t~ret31#1 <= 2147483647;usb_register_~tmp~1#1 := usb_register_#t~ret31#1;havoc usb_register_#t~ret31#1;usb_register_#res#1 := usb_register_~tmp~1#1; {57133#true} is VALID [2022-02-20 22:07:31,439 INFO L290 TraceCheckUtils]: 43: Hoare triple {57133#true} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_2_#res#1 := ldv_usb_register_driver_2_~ldv_func_res~0#1; {57133#true} is VALID [2022-02-20 22:07:31,439 INFO L290 TraceCheckUtils]: 42: Hoare triple {57133#true} ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset := ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset;havoc ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {57133#true} is VALID [2022-02-20 22:07:31,439 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {57133#true} {57133#true} #600#return; {57133#true} is VALID [2022-02-20 22:07:31,440 INFO L290 TraceCheckUtils]: 40: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:31,440 INFO L290 TraceCheckUtils]: 39: Hoare triple {57133#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {57133#true} is VALID [2022-02-20 22:07:31,440 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {57133#true} {57133#true} #540#return; {57133#true} is VALID [2022-02-20 22:07:31,440 INFO L290 TraceCheckUtils]: 37: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:31,440 INFO L290 TraceCheckUtils]: 36: Hoare triple {57133#true} assume !(0 == ~cond); {57133#true} is VALID [2022-02-20 22:07:31,440 INFO L290 TraceCheckUtils]: 35: Hoare triple {57133#true} ~cond := #in~cond; {57133#true} is VALID [2022-02-20 22:07:31,440 INFO L272 TraceCheckUtils]: 34: Hoare triple {57133#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {57133#true} is VALID [2022-02-20 22:07:31,441 INFO L290 TraceCheckUtils]: 33: Hoare triple {57133#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {57133#true} is VALID [2022-02-20 22:07:31,441 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {57133#true} {57133#true} #538#return; {57133#true} is VALID [2022-02-20 22:07:31,441 INFO L290 TraceCheckUtils]: 31: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:31,441 INFO L290 TraceCheckUtils]: 30: Hoare triple {57133#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {57133#true} is VALID [2022-02-20 22:07:31,441 INFO L272 TraceCheckUtils]: 29: Hoare triple {57133#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {57133#true} is VALID [2022-02-20 22:07:31,441 INFO L290 TraceCheckUtils]: 28: Hoare triple {57133#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {57133#true} is VALID [2022-02-20 22:07:31,441 INFO L272 TraceCheckUtils]: 27: Hoare triple {57133#true} call ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset := ldv_init_zalloc(1248); {57133#true} is VALID [2022-02-20 22:07:31,442 INFO L290 TraceCheckUtils]: 26: Hoare triple {57133#true} ldv_usb_register_driver_2_#t~ret193#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_2_#t~ret193#1 && ldv_usb_register_driver_2_#t~ret193#1 <= 2147483647;ldv_usb_register_driver_2_~tmp~19#1 := ldv_usb_register_driver_2_#t~ret193#1;havoc ldv_usb_register_driver_2_#t~ret193#1;ldv_usb_register_driver_2_~ldv_func_res~0#1 := ldv_usb_register_driver_2_~tmp~19#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset, ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset;havoc ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {57133#true} is VALID [2022-02-20 22:07:31,442 INFO L290 TraceCheckUtils]: 25: Hoare triple {57133#true} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_usb_acecad_init } true;havoc usb_acecad_init_#res#1;havoc usb_acecad_init_#t~ret180#1, usb_acecad_init_#t~nondet181#1, usb_acecad_init_~result~0#1, usb_acecad_init_~tmp~15#1;havoc usb_acecad_init_~result~0#1;havoc usb_acecad_init_~tmp~15#1;assume { :begin_inline_usb_register } true;usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc usb_register_#res#1;havoc usb_register_#t~ret31#1, usb_register_~driver#1.base, usb_register_~driver#1.offset, usb_register_~tmp~1#1;usb_register_~driver#1.base, usb_register_~driver#1.offset := usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset;havoc usb_register_~tmp~1#1;assume { :begin_inline_ldv_usb_register_driver_2 } true;ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset := usb_register_~driver#1.base, usb_register_~driver#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 4, 0;havoc ldv_usb_register_driver_2_#res#1;havoc ldv_usb_register_driver_2_#t~ret193#1, ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset, ldv_usb_register_driver_2_~ldv_func_res~0#1, ldv_usb_register_driver_2_~tmp~19#1;ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_2_~ldv_func_res~0#1;havoc ldv_usb_register_driver_2_~tmp~19#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet213#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet213#1 && usb_register_driver_#t~nondet213#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet213#1;havoc usb_register_driver_#t~nondet213#1; {57133#true} is VALID [2022-02-20 22:07:31,442 INFO L290 TraceCheckUtils]: 24: Hoare triple {57133#true} assume main_#t~switch190#1; {57133#true} is VALID [2022-02-20 22:07:31,442 INFO L290 TraceCheckUtils]: 23: Hoare triple {57133#true} assume !main_#t~switch190#1;main_#t~switch190#1 := main_#t~switch190#1 || 1 == main_~tmp___2~1#1; {57133#true} is VALID [2022-02-20 22:07:31,442 INFO L290 TraceCheckUtils]: 22: Hoare triple {57133#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet189#1 && main_#t~nondet189#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet189#1;havoc main_#t~nondet189#1;main_#t~switch190#1 := 0 == main_~tmp___2~1#1; {57133#true} is VALID [2022-02-20 22:07:31,442 INFO L290 TraceCheckUtils]: 21: Hoare triple {57133#true} assume main_#t~switch185#1; {57133#true} is VALID [2022-02-20 22:07:31,442 INFO L290 TraceCheckUtils]: 20: Hoare triple {57133#true} assume !main_#t~switch185#1;main_#t~switch185#1 := main_#t~switch185#1 || 1 == main_~tmp___0~6#1; {57133#true} is VALID [2022-02-20 22:07:31,443 INFO L290 TraceCheckUtils]: 19: Hoare triple {57133#true} assume -2147483648 <= main_#t~nondet184#1 && main_#t~nondet184#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet184#1;havoc main_#t~nondet184#1;main_#t~switch185#1 := 0 == main_~tmp___0~6#1; {57133#true} is VALID [2022-02-20 22:07:31,443 INFO L290 TraceCheckUtils]: 18: Hoare triple {57133#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1; {57133#true} is VALID [2022-02-20 22:07:31,443 INFO L290 TraceCheckUtils]: 17: Hoare triple {57133#true} main_~tmp~17#1.base, main_~tmp~17#1.offset := main_#t~ret183#1.base, main_#t~ret183#1.offset;havoc main_#t~ret183#1.base, main_#t~ret183#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~17#1.base, main_~tmp~17#1.offset;assume { :begin_inline_ldv_initialize } true; {57133#true} is VALID [2022-02-20 22:07:31,443 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {57133#true} {57133#true} #544#return; {57133#true} is VALID [2022-02-20 22:07:31,443 INFO L290 TraceCheckUtils]: 15: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:31,443 INFO L290 TraceCheckUtils]: 14: Hoare triple {57133#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {57133#true} is VALID [2022-02-20 22:07:31,443 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {57133#true} {57133#true} #540#return; {57133#true} is VALID [2022-02-20 22:07:31,444 INFO L290 TraceCheckUtils]: 12: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:31,444 INFO L290 TraceCheckUtils]: 11: Hoare triple {57133#true} assume !(0 == ~cond); {57133#true} is VALID [2022-02-20 22:07:31,444 INFO L290 TraceCheckUtils]: 10: Hoare triple {57133#true} ~cond := #in~cond; {57133#true} is VALID [2022-02-20 22:07:31,444 INFO L272 TraceCheckUtils]: 9: Hoare triple {57133#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {57133#true} is VALID [2022-02-20 22:07:31,444 INFO L290 TraceCheckUtils]: 8: Hoare triple {57133#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {57133#true} is VALID [2022-02-20 22:07:31,444 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {57133#true} {57133#true} #538#return; {57133#true} is VALID [2022-02-20 22:07:31,444 INFO L290 TraceCheckUtils]: 6: Hoare triple {57133#true} assume true; {57133#true} is VALID [2022-02-20 22:07:31,444 INFO L290 TraceCheckUtils]: 5: Hoare triple {57133#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {57133#true} is VALID [2022-02-20 22:07:31,445 INFO L272 TraceCheckUtils]: 4: Hoare triple {57133#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {57133#true} is VALID [2022-02-20 22:07:31,445 INFO L290 TraceCheckUtils]: 3: Hoare triple {57133#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {57133#true} is VALID [2022-02-20 22:07:31,445 INFO L272 TraceCheckUtils]: 2: Hoare triple {57133#true} call main_#t~ret183#1.base, main_#t~ret183#1.offset := ldv_init_zalloc(24); {57133#true} is VALID [2022-02-20 22:07:31,445 INFO L290 TraceCheckUtils]: 1: Hoare triple {57133#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret183#1.base, main_#t~ret183#1.offset, main_#t~nondet184#1, main_#t~switch185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~ret188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~ret191#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~17#1.base, main_~tmp~17#1.offset, main_~tmp___0~6#1, main_~tmp___1~3#1, main_~tmp___2~1#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~17#1.base, main_~tmp~17#1.offset;havoc main_~tmp___0~6#1;havoc main_~tmp___1~3#1;havoc main_~tmp___2~1#1; {57133#true} is VALID [2022-02-20 22:07:31,445 INFO L290 TraceCheckUtils]: 0: Hoare triple {57133#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(99, 2);call #Ultimate.allocInit(10, 3);call #Ultimate.allocInit(7, 4);call write~init~int(97, 4, 0, 1);call write~init~int(99, 4, 1, 1);call write~init~int(101, 4, 2, 1);call write~init~int(99, 4, 3, 1);call write~init~int(97, 4, 4, 1);call write~init~int(100, 4, 5, 1);call write~init~int(0, 4, 6, 1);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(20, 6);call #Ultimate.allocInit(57, 7);call #Ultimate.allocInit(2, 8);call write~init~int(32, 8, 0, 1);call write~init~int(0, 8, 1, 1);call #Ultimate.allocInit(8, 9);call #Ultimate.allocInit(34, 10);call #Ultimate.allocInit(32, 11);call #Ultimate.allocInit(11, 12);call #Ultimate.allocInit(48, 13);~LDV_IN_INTERRUPT~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset := 14, 0;call #Ultimate.allocInit(72, 14);call write~init~int(3, ~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 2 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(4, ~#usb_acecad_id_table~0.base, 4 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 6 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 8 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 10 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 11 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 12 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 13 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 14 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 15 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 16 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(3, ~#usb_acecad_id_table~0.base, 24 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 26 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(8, ~#usb_acecad_id_table~0.base, 28 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 30 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 32 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 34 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 35 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 36 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 37 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 38 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 39 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(1, ~#usb_acecad_id_table~0.base, 40 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(0, ~#usb_acecad_id_table~0.base, 48 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 50 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 52 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 54 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 56 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 58 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 59 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 60 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 61 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 62 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 63 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 64 + ~#usb_acecad_id_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.driver_info := 0;~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset := 15, 0;call #Ultimate.allocInit(264, 15);call write~init~$Pointer$(12, 0, ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_probe.base, #funAddr~usb_acecad_probe.offset, ~#usb_acecad_driver~0.base, 8 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_disconnect.base, #funAddr~usb_acecad_disconnect.offset, ~#usb_acecad_driver~0.base, 16 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 24 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 32 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 40 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 48 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 56 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 64 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, ~#usb_acecad_driver~0.base, 72 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 80 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 84 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 88 + ~#usb_acecad_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 92 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 100 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 108 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 116 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 124 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 132 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 136 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 144 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 152 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 160 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 168 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 176 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 184 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 192 + ~#usb_acecad_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 193 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 201 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 209 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 217 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 225 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 233 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 241 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 249 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 257 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 261 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 262 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 263 + ~#usb_acecad_driver~0.offset, 1);~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {57133#true} is VALID [2022-02-20 22:07:31,446 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 9 proven. 11 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2022-02-20 22:07:31,446 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [176074794] provided 0 perfect and 2 imperfect interpolant sequences [2022-02-20 22:07:31,446 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-02-20 22:07:31,446 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 9, 9] total 20 [2022-02-20 22:07:31,446 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [128445994] [2022-02-20 22:07:31,447 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-02-20 22:07:31,448 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 6.85) internal successors, (137), 12 states have internal predecessors, (137), 4 states have call successors, (33), 6 states have call predecessors, (33), 6 states have return successors, (25), 8 states have call predecessors, (25), 4 states have call successors, (25) Word has length 177 [2022-02-20 22:07:32,798 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:07:32,798 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 20 states, 20 states have (on average 6.85) internal successors, (137), 12 states have internal predecessors, (137), 4 states have call successors, (33), 6 states have call predecessors, (33), 6 states have return successors, (25), 8 states have call predecessors, (25), 4 states have call successors, (25) [2022-02-20 22:07:32,922 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 195 edges. 195 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:32,922 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2022-02-20 22:07:32,922 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:07:32,923 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2022-02-20 22:07:32,923 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=332, Unknown=0, NotChecked=0, Total=380 [2022-02-20 22:07:32,923 INFO L87 Difference]: Start difference. First operand 911 states and 1183 transitions. Second operand has 20 states, 20 states have (on average 6.85) internal successors, (137), 12 states have internal predecessors, (137), 4 states have call successors, (33), 6 states have call predecessors, (33), 6 states have return successors, (25), 8 states have call predecessors, (25), 4 states have call successors, (25) [2022-02-20 22:07:37,161 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:37,162 INFO L93 Difference]: Finished difference Result 2037 states and 2676 transitions. [2022-02-20 22:07:37,162 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-02-20 22:07:37,162 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 6.85) internal successors, (137), 12 states have internal predecessors, (137), 4 states have call successors, (33), 6 states have call predecessors, (33), 6 states have return successors, (25), 8 states have call predecessors, (25), 4 states have call successors, (25) Word has length 177 [2022-02-20 22:07:37,162 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 22:07:37,163 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 6.85) internal successors, (137), 12 states have internal predecessors, (137), 4 states have call successors, (33), 6 states have call predecessors, (33), 6 states have return successors, (25), 8 states have call predecessors, (25), 4 states have call successors, (25) [2022-02-20 22:07:37,168 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 632 transitions. [2022-02-20 22:07:37,168 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 6.85) internal successors, (137), 12 states have internal predecessors, (137), 4 states have call successors, (33), 6 states have call predecessors, (33), 6 states have return successors, (25), 8 states have call predecessors, (25), 4 states have call successors, (25) [2022-02-20 22:07:37,174 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 632 transitions. [2022-02-20 22:07:37,174 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 12 states and 632 transitions. [2022-02-20 22:07:37,620 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 632 edges. 632 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:37,692 INFO L225 Difference]: With dead ends: 2037 [2022-02-20 22:07:37,693 INFO L226 Difference]: Without dead ends: 1145 [2022-02-20 22:07:37,695 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 405 GetRequests, 382 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 59 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=97, Invalid=503, Unknown=0, NotChecked=0, Total=600 [2022-02-20 22:07:37,696 INFO L933 BasicCegarLoop]: 324 mSDtfsCounter, 163 mSDsluCounter, 2814 mSDsCounter, 0 mSdLazyCounter, 980 mSolverCounterSat, 53 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 169 SdHoareTripleChecker+Valid, 3138 SdHoareTripleChecker+Invalid, 1033 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 53 IncrementalHoareTripleChecker+Valid, 980 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2022-02-20 22:07:37,696 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [169 Valid, 3138 Invalid, 1033 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [53 Valid, 980 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2022-02-20 22:07:37,697 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1145 states. [2022-02-20 22:07:37,963 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1145 to 951. [2022-02-20 22:07:37,963 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 22:07:37,965 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1145 states. Second operand has 951 states, 745 states have (on average 1.2429530201342283) internal successors, (926), 753 states have internal predecessors, (926), 142 states have call successors, (142), 56 states have call predecessors, (142), 63 states have return successors, (167), 149 states have call predecessors, (167), 141 states have call successors, (167) [2022-02-20 22:07:37,966 INFO L74 IsIncluded]: Start isIncluded. First operand 1145 states. Second operand has 951 states, 745 states have (on average 1.2429530201342283) internal successors, (926), 753 states have internal predecessors, (926), 142 states have call successors, (142), 56 states have call predecessors, (142), 63 states have return successors, (167), 149 states have call predecessors, (167), 141 states have call successors, (167) [2022-02-20 22:07:37,968 INFO L87 Difference]: Start difference. First operand 1145 states. Second operand has 951 states, 745 states have (on average 1.2429530201342283) internal successors, (926), 753 states have internal predecessors, (926), 142 states have call successors, (142), 56 states have call predecessors, (142), 63 states have return successors, (167), 149 states have call predecessors, (167), 141 states have call successors, (167) [2022-02-20 22:07:38,026 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:38,027 INFO L93 Difference]: Finished difference Result 1145 states and 1508 transitions. [2022-02-20 22:07:38,027 INFO L276 IsEmpty]: Start isEmpty. Operand 1145 states and 1508 transitions. [2022-02-20 22:07:38,029 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:38,029 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:38,031 INFO L74 IsIncluded]: Start isIncluded. First operand has 951 states, 745 states have (on average 1.2429530201342283) internal successors, (926), 753 states have internal predecessors, (926), 142 states have call successors, (142), 56 states have call predecessors, (142), 63 states have return successors, (167), 149 states have call predecessors, (167), 141 states have call successors, (167) Second operand 1145 states. [2022-02-20 22:07:38,033 INFO L87 Difference]: Start difference. First operand has 951 states, 745 states have (on average 1.2429530201342283) internal successors, (926), 753 states have internal predecessors, (926), 142 states have call successors, (142), 56 states have call predecessors, (142), 63 states have return successors, (167), 149 states have call predecessors, (167), 141 states have call successors, (167) Second operand 1145 states. [2022-02-20 22:07:38,090 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 22:07:38,090 INFO L93 Difference]: Finished difference Result 1145 states and 1508 transitions. [2022-02-20 22:07:38,090 INFO L276 IsEmpty]: Start isEmpty. Operand 1145 states and 1508 transitions. [2022-02-20 22:07:38,093 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 22:07:38,093 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 22:07:38,093 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 22:07:38,093 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 22:07:38,095 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 951 states, 745 states have (on average 1.2429530201342283) internal successors, (926), 753 states have internal predecessors, (926), 142 states have call successors, (142), 56 states have call predecessors, (142), 63 states have return successors, (167), 149 states have call predecessors, (167), 141 states have call successors, (167) [2022-02-20 22:07:38,146 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 951 states to 951 states and 1235 transitions. [2022-02-20 22:07:38,147 INFO L78 Accepts]: Start accepts. Automaton has 951 states and 1235 transitions. Word has length 177 [2022-02-20 22:07:38,147 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 22:07:38,147 INFO L470 AbstractCegarLoop]: Abstraction has 951 states and 1235 transitions. [2022-02-20 22:07:38,148 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 20 states have (on average 6.85) internal successors, (137), 12 states have internal predecessors, (137), 4 states have call successors, (33), 6 states have call predecessors, (33), 6 states have return successors, (25), 8 states have call predecessors, (25), 4 states have call successors, (25) [2022-02-20 22:07:38,148 INFO L276 IsEmpty]: Start isEmpty. Operand 951 states and 1235 transitions. [2022-02-20 22:07:38,150 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 184 [2022-02-20 22:07:38,150 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:07:38,151 INFO L514 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:07:38,182 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-02-20 22:07:38,359 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-20 22:07:38,359 INFO L402 AbstractCegarLoop]: === Iteration 14 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:07:38,360 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:07:38,360 INFO L85 PathProgramCache]: Analyzing trace with hash 1620349506, now seen corresponding path program 2 times [2022-02-20 22:07:38,360 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:07:38,360 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1785255588] [2022-02-20 22:07:38,360 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:07:38,360 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:07:38,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:38,542 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 22:07:38,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:38,554 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:38,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:38,558 INFO L290 TraceCheckUtils]: 0: Hoare triple {64883#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {64781#true} is VALID [2022-02-20 22:07:38,558 INFO L290 TraceCheckUtils]: 1: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:38,558 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {64781#true} {64781#true} #538#return; {64781#true} is VALID [2022-02-20 22:07:38,558 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:38,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:38,561 INFO L290 TraceCheckUtils]: 0: Hoare triple {64781#true} ~cond := #in~cond; {64781#true} is VALID [2022-02-20 22:07:38,562 INFO L290 TraceCheckUtils]: 1: Hoare triple {64781#true} assume !(0 == ~cond); {64781#true} is VALID [2022-02-20 22:07:38,562 INFO L290 TraceCheckUtils]: 2: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:38,562 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {64781#true} {64781#true} #540#return; {64781#true} is VALID [2022-02-20 22:07:38,562 INFO L290 TraceCheckUtils]: 0: Hoare triple {64875#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {64781#true} is VALID [2022-02-20 22:07:38,563 INFO L272 TraceCheckUtils]: 1: Hoare triple {64781#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {64883#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:38,563 INFO L290 TraceCheckUtils]: 2: Hoare triple {64883#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {64781#true} is VALID [2022-02-20 22:07:38,563 INFO L290 TraceCheckUtils]: 3: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:38,563 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {64781#true} {64781#true} #538#return; {64781#true} is VALID [2022-02-20 22:07:38,563 INFO L290 TraceCheckUtils]: 5: Hoare triple {64781#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {64781#true} is VALID [2022-02-20 22:07:38,563 INFO L272 TraceCheckUtils]: 6: Hoare triple {64781#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {64781#true} is VALID [2022-02-20 22:07:38,563 INFO L290 TraceCheckUtils]: 7: Hoare triple {64781#true} ~cond := #in~cond; {64781#true} is VALID [2022-02-20 22:07:38,563 INFO L290 TraceCheckUtils]: 8: Hoare triple {64781#true} assume !(0 == ~cond); {64781#true} is VALID [2022-02-20 22:07:38,564 INFO L290 TraceCheckUtils]: 9: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:38,564 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {64781#true} {64781#true} #540#return; {64781#true} is VALID [2022-02-20 22:07:38,564 INFO L290 TraceCheckUtils]: 11: Hoare triple {64781#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {64781#true} is VALID [2022-02-20 22:07:38,564 INFO L290 TraceCheckUtils]: 12: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:38,564 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {64781#true} {64781#true} #544#return; {64781#true} is VALID [2022-02-20 22:07:38,564 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 27 [2022-02-20 22:07:38,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:38,570 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:38,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:38,573 INFO L290 TraceCheckUtils]: 0: Hoare triple {64883#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {64781#true} is VALID [2022-02-20 22:07:38,574 INFO L290 TraceCheckUtils]: 1: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:38,574 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {64781#true} {64781#true} #538#return; {64781#true} is VALID [2022-02-20 22:07:38,574 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2022-02-20 22:07:38,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:38,578 INFO L290 TraceCheckUtils]: 0: Hoare triple {64781#true} ~cond := #in~cond; {64781#true} is VALID [2022-02-20 22:07:38,578 INFO L290 TraceCheckUtils]: 1: Hoare triple {64781#true} assume !(0 == ~cond); {64781#true} is VALID [2022-02-20 22:07:38,578 INFO L290 TraceCheckUtils]: 2: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:38,578 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {64781#true} {64781#true} #540#return; {64781#true} is VALID [2022-02-20 22:07:38,578 INFO L290 TraceCheckUtils]: 0: Hoare triple {64875#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {64781#true} is VALID [2022-02-20 22:07:38,579 INFO L272 TraceCheckUtils]: 1: Hoare triple {64781#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {64883#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:38,580 INFO L290 TraceCheckUtils]: 2: Hoare triple {64883#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {64781#true} is VALID [2022-02-20 22:07:38,580 INFO L290 TraceCheckUtils]: 3: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:38,580 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {64781#true} {64781#true} #538#return; {64781#true} is VALID [2022-02-20 22:07:38,580 INFO L290 TraceCheckUtils]: 5: Hoare triple {64781#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {64781#true} is VALID [2022-02-20 22:07:38,580 INFO L272 TraceCheckUtils]: 6: Hoare triple {64781#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {64781#true} is VALID [2022-02-20 22:07:38,580 INFO L290 TraceCheckUtils]: 7: Hoare triple {64781#true} ~cond := #in~cond; {64781#true} is VALID [2022-02-20 22:07:38,580 INFO L290 TraceCheckUtils]: 8: Hoare triple {64781#true} assume !(0 == ~cond); {64781#true} is VALID [2022-02-20 22:07:38,580 INFO L290 TraceCheckUtils]: 9: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:38,581 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {64781#true} {64781#true} #540#return; {64781#true} is VALID [2022-02-20 22:07:38,581 INFO L290 TraceCheckUtils]: 11: Hoare triple {64781#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {64781#true} is VALID [2022-02-20 22:07:38,581 INFO L290 TraceCheckUtils]: 12: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:38,581 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {64781#true} {64781#true} #600#return; {64781#true} is VALID [2022-02-20 22:07:38,588 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 56 [2022-02-20 22:07:38,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:38,596 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 22:07:38,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:38,600 INFO L290 TraceCheckUtils]: 0: Hoare triple {64781#true} ~cond := #in~cond; {64781#true} is VALID [2022-02-20 22:07:38,601 INFO L290 TraceCheckUtils]: 1: Hoare triple {64781#true} assume !(0 == ~cond); {64781#true} is VALID [2022-02-20 22:07:38,601 INFO L290 TraceCheckUtils]: 2: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:38,601 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {64781#true} {64781#true} #542#return; {64781#true} is VALID [2022-02-20 22:07:38,601 INFO L290 TraceCheckUtils]: 0: Hoare triple {64891#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {64781#true} is VALID [2022-02-20 22:07:38,601 INFO L290 TraceCheckUtils]: 1: Hoare triple {64781#true} assume !(0 != ~tmp___0~2);call #t~malloc60.base, #t~malloc60.offset := #Ultimate.allocOnHeap(~size);~tmp~4.base, ~tmp~4.offset := #t~malloc60.base, #t~malloc60.offset;havoc #t~malloc60.base, #t~malloc60.offset;~p~0.base, ~p~0.offset := ~tmp~4.base, ~tmp~4.offset; {64781#true} is VALID [2022-02-20 22:07:38,601 INFO L272 TraceCheckUtils]: 2: Hoare triple {64781#true} call assume_abort_if_not((if 0 != (~p~0.base + ~p~0.offset) % 18446744073709551616 then 1 else 0)); {64781#true} is VALID [2022-02-20 22:07:38,602 INFO L290 TraceCheckUtils]: 3: Hoare triple {64781#true} ~cond := #in~cond; {64781#true} is VALID [2022-02-20 22:07:38,602 INFO L290 TraceCheckUtils]: 4: Hoare triple {64781#true} assume !(0 == ~cond); {64781#true} is VALID [2022-02-20 22:07:38,602 INFO L290 TraceCheckUtils]: 5: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:38,602 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {64781#true} {64781#true} #542#return; {64781#true} is VALID [2022-02-20 22:07:38,602 INFO L290 TraceCheckUtils]: 7: Hoare triple {64781#true} #res.base, #res.offset := ~p~0.base, ~p~0.offset; {64781#true} is VALID [2022-02-20 22:07:38,602 INFO L290 TraceCheckUtils]: 8: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:38,602 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {64781#true} {64781#true} #546#return; {64781#true} is VALID [2022-02-20 22:07:38,603 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 83 [2022-02-20 22:07:38,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:38,607 INFO L290 TraceCheckUtils]: 0: Hoare triple {64781#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {64781#true} is VALID [2022-02-20 22:07:38,632 INFO L290 TraceCheckUtils]: 1: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:38,632 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {64781#true} {64781#true} #556#return; {64781#true} is VALID [2022-02-20 22:07:38,632 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 89 [2022-02-20 22:07:38,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:38,638 INFO L290 TraceCheckUtils]: 0: Hoare triple {64781#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {64781#true} is VALID [2022-02-20 22:07:38,638 INFO L290 TraceCheckUtils]: 1: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:38,638 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {64781#true} {64781#true} #560#return; {64781#true} is VALID [2022-02-20 22:07:38,638 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 96 [2022-02-20 22:07:38,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:38,646 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:38,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:38,652 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 22:07:38,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:38,656 INFO L290 TraceCheckUtils]: 0: Hoare triple {64781#true} ~cond := #in~cond; {64781#true} is VALID [2022-02-20 22:07:38,656 INFO L290 TraceCheckUtils]: 1: Hoare triple {64781#true} assume !(0 == ~cond); {64781#true} is VALID [2022-02-20 22:07:38,656 INFO L290 TraceCheckUtils]: 2: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:38,656 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {64781#true} {64781#true} #542#return; {64781#true} is VALID [2022-02-20 22:07:38,657 INFO L290 TraceCheckUtils]: 0: Hoare triple {64891#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {64781#true} is VALID [2022-02-20 22:07:38,657 INFO L290 TraceCheckUtils]: 1: Hoare triple {64781#true} assume !(0 != ~tmp___0~2);call #t~malloc60.base, #t~malloc60.offset := #Ultimate.allocOnHeap(~size);~tmp~4.base, ~tmp~4.offset := #t~malloc60.base, #t~malloc60.offset;havoc #t~malloc60.base, #t~malloc60.offset;~p~0.base, ~p~0.offset := ~tmp~4.base, ~tmp~4.offset; {64781#true} is VALID [2022-02-20 22:07:38,657 INFO L272 TraceCheckUtils]: 2: Hoare triple {64781#true} call assume_abort_if_not((if 0 != (~p~0.base + ~p~0.offset) % 18446744073709551616 then 1 else 0)); {64781#true} is VALID [2022-02-20 22:07:38,657 INFO L290 TraceCheckUtils]: 3: Hoare triple {64781#true} ~cond := #in~cond; {64781#true} is VALID [2022-02-20 22:07:38,657 INFO L290 TraceCheckUtils]: 4: Hoare triple {64781#true} assume !(0 == ~cond); {64781#true} is VALID [2022-02-20 22:07:38,657 INFO L290 TraceCheckUtils]: 5: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:38,657 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {64781#true} {64781#true} #542#return; {64781#true} is VALID [2022-02-20 22:07:38,658 INFO L290 TraceCheckUtils]: 7: Hoare triple {64781#true} #res.base, #res.offset := ~p~0.base, ~p~0.offset; {64781#true} is VALID [2022-02-20 22:07:38,658 INFO L290 TraceCheckUtils]: 8: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:38,658 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {64781#true} {64781#true} #530#return; {64781#true} is VALID [2022-02-20 22:07:38,658 INFO L290 TraceCheckUtils]: 0: Hoare triple {64891#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {64781#true} is VALID [2022-02-20 22:07:38,659 INFO L272 TraceCheckUtils]: 1: Hoare triple {64781#true} call __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset := ldv_malloc(__kmalloc_~size#1); {64891#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:38,659 INFO L290 TraceCheckUtils]: 2: Hoare triple {64891#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {64781#true} is VALID [2022-02-20 22:07:38,659 INFO L290 TraceCheckUtils]: 3: Hoare triple {64781#true} assume !(0 != ~tmp___0~2);call #t~malloc60.base, #t~malloc60.offset := #Ultimate.allocOnHeap(~size);~tmp~4.base, ~tmp~4.offset := #t~malloc60.base, #t~malloc60.offset;havoc #t~malloc60.base, #t~malloc60.offset;~p~0.base, ~p~0.offset := ~tmp~4.base, ~tmp~4.offset; {64781#true} is VALID [2022-02-20 22:07:38,659 INFO L272 TraceCheckUtils]: 4: Hoare triple {64781#true} call assume_abort_if_not((if 0 != (~p~0.base + ~p~0.offset) % 18446744073709551616 then 1 else 0)); {64781#true} is VALID [2022-02-20 22:07:38,659 INFO L290 TraceCheckUtils]: 5: Hoare triple {64781#true} ~cond := #in~cond; {64781#true} is VALID [2022-02-20 22:07:38,659 INFO L290 TraceCheckUtils]: 6: Hoare triple {64781#true} assume !(0 == ~cond); {64781#true} is VALID [2022-02-20 22:07:38,659 INFO L290 TraceCheckUtils]: 7: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:38,660 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {64781#true} {64781#true} #542#return; {64781#true} is VALID [2022-02-20 22:07:38,660 INFO L290 TraceCheckUtils]: 9: Hoare triple {64781#true} #res.base, #res.offset := ~p~0.base, ~p~0.offset; {64781#true} is VALID [2022-02-20 22:07:38,660 INFO L290 TraceCheckUtils]: 10: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:38,660 INFO L284 TraceCheckUtils]: 11: Hoare quadruple {64781#true} {64781#true} #530#return; {64781#true} is VALID [2022-02-20 22:07:38,660 INFO L290 TraceCheckUtils]: 12: Hoare triple {64781#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset; {64781#true} is VALID [2022-02-20 22:07:38,660 INFO L290 TraceCheckUtils]: 13: Hoare triple {64781#true} kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {64781#true} is VALID [2022-02-20 22:07:38,660 INFO L290 TraceCheckUtils]: 14: Hoare triple {64781#true} #t~ret55#1.base, #t~ret55#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret55#1.base, #t~ret55#1.offset;havoc #t~ret55#1.base, #t~ret55#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {64781#true} is VALID [2022-02-20 22:07:38,661 INFO L290 TraceCheckUtils]: 15: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:38,661 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {64781#true} {64781#true} #562#return; {64781#true} is VALID [2022-02-20 22:07:38,661 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 115 [2022-02-20 22:07:38,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:38,726 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:07:38,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:38,749 INFO L290 TraceCheckUtils]: 0: Hoare triple {64891#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {64781#true} is VALID [2022-02-20 22:07:38,750 INFO L290 TraceCheckUtils]: 1: Hoare triple {64781#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {64918#(and (= |ldv_malloc_#res.base| 0) (= |ldv_malloc_#res.offset| 0))} is VALID [2022-02-20 22:07:38,751 INFO L290 TraceCheckUtils]: 2: Hoare triple {64918#(and (= |ldv_malloc_#res.base| 0) (= |ldv_malloc_#res.offset| 0))} assume true; {64918#(and (= |ldv_malloc_#res.base| 0) (= |ldv_malloc_#res.offset| 0))} is VALID [2022-02-20 22:07:38,752 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {64918#(and (= |ldv_malloc_#res.base| 0) (= |ldv_malloc_#res.offset| 0))} {64781#true} #530#return; {64914#(and (= |kzalloc___kmalloc_#t~ret53#1.base| 0) (= |kzalloc___kmalloc_#t~ret53#1.offset| 0))} is VALID [2022-02-20 22:07:38,752 INFO L290 TraceCheckUtils]: 0: Hoare triple {64891#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {64781#true} is VALID [2022-02-20 22:07:38,753 INFO L272 TraceCheckUtils]: 1: Hoare triple {64781#true} call __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset := ldv_malloc(__kmalloc_~size#1); {64891#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:38,753 INFO L290 TraceCheckUtils]: 2: Hoare triple {64891#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {64781#true} is VALID [2022-02-20 22:07:38,754 INFO L290 TraceCheckUtils]: 3: Hoare triple {64781#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {64918#(and (= |ldv_malloc_#res.base| 0) (= |ldv_malloc_#res.offset| 0))} is VALID [2022-02-20 22:07:38,754 INFO L290 TraceCheckUtils]: 4: Hoare triple {64918#(and (= |ldv_malloc_#res.base| 0) (= |ldv_malloc_#res.offset| 0))} assume true; {64918#(and (= |ldv_malloc_#res.base| 0) (= |ldv_malloc_#res.offset| 0))} is VALID [2022-02-20 22:07:38,755 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {64918#(and (= |ldv_malloc_#res.base| 0) (= |ldv_malloc_#res.offset| 0))} {64781#true} #530#return; {64914#(and (= |kzalloc___kmalloc_#t~ret53#1.base| 0) (= |kzalloc___kmalloc_#t~ret53#1.offset| 0))} is VALID [2022-02-20 22:07:38,756 INFO L290 TraceCheckUtils]: 6: Hoare triple {64914#(and (= |kzalloc___kmalloc_#t~ret53#1.base| 0) (= |kzalloc___kmalloc_#t~ret53#1.offset| 0))} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset; {64915#(and (= 0 |kzalloc___kmalloc_#res#1.offset|) (= |kzalloc___kmalloc_#res#1.base| 0))} is VALID [2022-02-20 22:07:38,756 INFO L290 TraceCheckUtils]: 7: Hoare triple {64915#(and (= 0 |kzalloc___kmalloc_#res#1.offset|) (= |kzalloc___kmalloc_#res#1.base| 0))} kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {64916#(and (= |kzalloc_kmalloc_#res#1.offset| 0) (= |kzalloc_kmalloc_#res#1.base| 0))} is VALID [2022-02-20 22:07:38,757 INFO L290 TraceCheckUtils]: 8: Hoare triple {64916#(and (= |kzalloc_kmalloc_#res#1.offset| 0) (= |kzalloc_kmalloc_#res#1.base| 0))} #t~ret55#1.base, #t~ret55#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret55#1.base, #t~ret55#1.offset;havoc #t~ret55#1.base, #t~ret55#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {64917#(and (= |kzalloc_#res#1.offset| 0) (= |kzalloc_#res#1.base| 0))} is VALID [2022-02-20 22:07:38,757 INFO L290 TraceCheckUtils]: 9: Hoare triple {64917#(and (= |kzalloc_#res#1.offset| 0) (= |kzalloc_#res#1.base| 0))} assume true; {64917#(and (= |kzalloc_#res#1.offset| 0) (= |kzalloc_#res#1.base| 0))} is VALID [2022-02-20 22:07:38,758 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {64917#(and (= |kzalloc_#res#1.offset| 0) (= |kzalloc_#res#1.base| 0))} {64781#true} #564#return; {64855#(and (= |ULTIMATE.start_input_allocate_device_#t~ret67#1.offset| 0) (= |ULTIMATE.start_input_allocate_device_#t~ret67#1.base| 0))} is VALID [2022-02-20 22:07:38,758 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 130 [2022-02-20 22:07:38,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:38,764 INFO L290 TraceCheckUtils]: 0: Hoare triple {64891#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {64781#true} is VALID [2022-02-20 22:07:38,764 INFO L290 TraceCheckUtils]: 1: Hoare triple {64781#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {64781#true} is VALID [2022-02-20 22:07:38,764 INFO L290 TraceCheckUtils]: 2: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:38,764 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {64781#true} {64782#false} #566#return; {64782#false} is VALID [2022-02-20 22:07:38,764 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 138 [2022-02-20 22:07:38,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:38,771 INFO L290 TraceCheckUtils]: 0: Hoare triple {64891#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {64781#true} is VALID [2022-02-20 22:07:38,771 INFO L290 TraceCheckUtils]: 1: Hoare triple {64781#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {64781#true} is VALID [2022-02-20 22:07:38,771 INFO L290 TraceCheckUtils]: 2: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:38,771 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {64781#true} {64782#false} #568#return; {64782#false} is VALID [2022-02-20 22:07:38,771 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 144 [2022-02-20 22:07:38,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:38,776 INFO L290 TraceCheckUtils]: 0: Hoare triple {64781#true} havoc ~tmp~8;assume -2147483648 <= #t~nondet65 && #t~nondet65 <= 2147483647;~tmp~8 := #t~nondet65;havoc #t~nondet65;#res := ~tmp~8; {64781#true} is VALID [2022-02-20 22:07:38,776 INFO L290 TraceCheckUtils]: 1: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:38,776 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {64781#true} {64782#false} #570#return; {64782#false} is VALID [2022-02-20 22:07:38,777 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 156 [2022-02-20 22:07:38,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:38,781 INFO L290 TraceCheckUtils]: 0: Hoare triple {64781#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1 := #in~arg1;~arg2.base, ~arg2.offset := #in~arg2.base, #in~arg2.offset;~arg3 := #in~arg3; {64781#true} is VALID [2022-02-20 22:07:38,781 INFO L290 TraceCheckUtils]: 1: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:38,781 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {64781#true} {64782#false} #592#return; {64782#false} is VALID [2022-02-20 22:07:38,791 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 163 [2022-02-20 22:07:38,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:38,796 INFO L290 TraceCheckUtils]: 0: Hoare triple {64919#(= |old(#valid)| |#valid|)} ~p.base, ~p.offset := #in~p.base, #in~p.offset;call ULTIMATE.dealloc(~p.base, ~p.offset); {64781#true} is VALID [2022-02-20 22:07:38,796 INFO L290 TraceCheckUtils]: 1: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:38,796 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {64781#true} {64782#false} #594#return; {64782#false} is VALID [2022-02-20 22:07:38,796 INFO L290 TraceCheckUtils]: 0: Hoare triple {64781#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(99, 2);call #Ultimate.allocInit(10, 3);call #Ultimate.allocInit(7, 4);call write~init~int(97, 4, 0, 1);call write~init~int(99, 4, 1, 1);call write~init~int(101, 4, 2, 1);call write~init~int(99, 4, 3, 1);call write~init~int(97, 4, 4, 1);call write~init~int(100, 4, 5, 1);call write~init~int(0, 4, 6, 1);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(20, 6);call #Ultimate.allocInit(57, 7);call #Ultimate.allocInit(2, 8);call write~init~int(32, 8, 0, 1);call write~init~int(0, 8, 1, 1);call #Ultimate.allocInit(8, 9);call #Ultimate.allocInit(34, 10);call #Ultimate.allocInit(32, 11);call #Ultimate.allocInit(11, 12);call #Ultimate.allocInit(48, 13);~LDV_IN_INTERRUPT~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset := 14, 0;call #Ultimate.allocInit(72, 14);call write~init~int(3, ~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 2 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(4, ~#usb_acecad_id_table~0.base, 4 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 6 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 8 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 10 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 11 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 12 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 13 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 14 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 15 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 16 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(3, ~#usb_acecad_id_table~0.base, 24 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 26 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(8, ~#usb_acecad_id_table~0.base, 28 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 30 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 32 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 34 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 35 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 36 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 37 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 38 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 39 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(1, ~#usb_acecad_id_table~0.base, 40 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(0, ~#usb_acecad_id_table~0.base, 48 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 50 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 52 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 54 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 56 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 58 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 59 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 60 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 61 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 62 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 63 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 64 + ~#usb_acecad_id_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.driver_info := 0;~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset := 15, 0;call #Ultimate.allocInit(264, 15);call write~init~$Pointer$(12, 0, ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_probe.base, #funAddr~usb_acecad_probe.offset, ~#usb_acecad_driver~0.base, 8 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_disconnect.base, #funAddr~usb_acecad_disconnect.offset, ~#usb_acecad_driver~0.base, 16 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 24 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 32 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 40 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 48 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 56 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 64 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, ~#usb_acecad_driver~0.base, 72 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 80 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 84 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 88 + ~#usb_acecad_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 92 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 100 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 108 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 116 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 124 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 132 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 136 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 144 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 152 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 160 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 168 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 176 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 184 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 192 + ~#usb_acecad_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 193 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 201 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 209 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 217 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 225 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 233 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 241 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 249 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 257 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 261 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 262 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 263 + ~#usb_acecad_driver~0.offset, 1);~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {64781#true} is VALID [2022-02-20 22:07:38,797 INFO L290 TraceCheckUtils]: 1: Hoare triple {64781#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret183#1.base, main_#t~ret183#1.offset, main_#t~nondet184#1, main_#t~switch185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~ret188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~ret191#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~17#1.base, main_~tmp~17#1.offset, main_~tmp___0~6#1, main_~tmp___1~3#1, main_~tmp___2~1#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~17#1.base, main_~tmp~17#1.offset;havoc main_~tmp___0~6#1;havoc main_~tmp___1~3#1;havoc main_~tmp___2~1#1; {64781#true} is VALID [2022-02-20 22:07:38,797 INFO L272 TraceCheckUtils]: 2: Hoare triple {64781#true} call main_#t~ret183#1.base, main_#t~ret183#1.offset := ldv_init_zalloc(24); {64875#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:38,798 INFO L290 TraceCheckUtils]: 3: Hoare triple {64875#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {64781#true} is VALID [2022-02-20 22:07:38,798 INFO L272 TraceCheckUtils]: 4: Hoare triple {64781#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {64883#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:38,799 INFO L290 TraceCheckUtils]: 5: Hoare triple {64883#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {64781#true} is VALID [2022-02-20 22:07:38,799 INFO L290 TraceCheckUtils]: 6: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:38,799 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {64781#true} {64781#true} #538#return; {64781#true} is VALID [2022-02-20 22:07:38,799 INFO L290 TraceCheckUtils]: 8: Hoare triple {64781#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {64781#true} is VALID [2022-02-20 22:07:38,799 INFO L272 TraceCheckUtils]: 9: Hoare triple {64781#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {64781#true} is VALID [2022-02-20 22:07:38,799 INFO L290 TraceCheckUtils]: 10: Hoare triple {64781#true} ~cond := #in~cond; {64781#true} is VALID [2022-02-20 22:07:38,799 INFO L290 TraceCheckUtils]: 11: Hoare triple {64781#true} assume !(0 == ~cond); {64781#true} is VALID [2022-02-20 22:07:38,799 INFO L290 TraceCheckUtils]: 12: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:38,800 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {64781#true} {64781#true} #540#return; {64781#true} is VALID [2022-02-20 22:07:38,800 INFO L290 TraceCheckUtils]: 14: Hoare triple {64781#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {64781#true} is VALID [2022-02-20 22:07:38,800 INFO L290 TraceCheckUtils]: 15: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:38,800 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {64781#true} {64781#true} #544#return; {64781#true} is VALID [2022-02-20 22:07:38,800 INFO L290 TraceCheckUtils]: 17: Hoare triple {64781#true} main_~tmp~17#1.base, main_~tmp~17#1.offset := main_#t~ret183#1.base, main_#t~ret183#1.offset;havoc main_#t~ret183#1.base, main_#t~ret183#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~17#1.base, main_~tmp~17#1.offset;assume { :begin_inline_ldv_initialize } true; {64781#true} is VALID [2022-02-20 22:07:38,800 INFO L290 TraceCheckUtils]: 18: Hoare triple {64781#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1; {64781#true} is VALID [2022-02-20 22:07:38,800 INFO L290 TraceCheckUtils]: 19: Hoare triple {64781#true} assume -2147483648 <= main_#t~nondet184#1 && main_#t~nondet184#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet184#1;havoc main_#t~nondet184#1;main_#t~switch185#1 := 0 == main_~tmp___0~6#1; {64781#true} is VALID [2022-02-20 22:07:38,801 INFO L290 TraceCheckUtils]: 20: Hoare triple {64781#true} assume !main_#t~switch185#1;main_#t~switch185#1 := main_#t~switch185#1 || 1 == main_~tmp___0~6#1; {64781#true} is VALID [2022-02-20 22:07:38,801 INFO L290 TraceCheckUtils]: 21: Hoare triple {64781#true} assume main_#t~switch185#1; {64781#true} is VALID [2022-02-20 22:07:38,801 INFO L290 TraceCheckUtils]: 22: Hoare triple {64781#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet189#1 && main_#t~nondet189#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet189#1;havoc main_#t~nondet189#1;main_#t~switch190#1 := 0 == main_~tmp___2~1#1; {64781#true} is VALID [2022-02-20 22:07:38,801 INFO L290 TraceCheckUtils]: 23: Hoare triple {64781#true} assume !main_#t~switch190#1;main_#t~switch190#1 := main_#t~switch190#1 || 1 == main_~tmp___2~1#1; {64781#true} is VALID [2022-02-20 22:07:38,801 INFO L290 TraceCheckUtils]: 24: Hoare triple {64781#true} assume main_#t~switch190#1; {64781#true} is VALID [2022-02-20 22:07:38,801 INFO L290 TraceCheckUtils]: 25: Hoare triple {64781#true} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_usb_acecad_init } true;havoc usb_acecad_init_#res#1;havoc usb_acecad_init_#t~ret180#1, usb_acecad_init_#t~nondet181#1, usb_acecad_init_~result~0#1, usb_acecad_init_~tmp~15#1;havoc usb_acecad_init_~result~0#1;havoc usb_acecad_init_~tmp~15#1;assume { :begin_inline_usb_register } true;usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc usb_register_#res#1;havoc usb_register_#t~ret31#1, usb_register_~driver#1.base, usb_register_~driver#1.offset, usb_register_~tmp~1#1;usb_register_~driver#1.base, usb_register_~driver#1.offset := usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset;havoc usb_register_~tmp~1#1;assume { :begin_inline_ldv_usb_register_driver_2 } true;ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset := usb_register_~driver#1.base, usb_register_~driver#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 4, 0;havoc ldv_usb_register_driver_2_#res#1;havoc ldv_usb_register_driver_2_#t~ret193#1, ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset, ldv_usb_register_driver_2_~ldv_func_res~0#1, ldv_usb_register_driver_2_~tmp~19#1;ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_2_~ldv_func_res~0#1;havoc ldv_usb_register_driver_2_~tmp~19#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet213#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet213#1 && usb_register_driver_#t~nondet213#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet213#1;havoc usb_register_driver_#t~nondet213#1; {64781#true} is VALID [2022-02-20 22:07:38,801 INFO L290 TraceCheckUtils]: 26: Hoare triple {64781#true} ldv_usb_register_driver_2_#t~ret193#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_2_#t~ret193#1 && ldv_usb_register_driver_2_#t~ret193#1 <= 2147483647;ldv_usb_register_driver_2_~tmp~19#1 := ldv_usb_register_driver_2_#t~ret193#1;havoc ldv_usb_register_driver_2_#t~ret193#1;ldv_usb_register_driver_2_~ldv_func_res~0#1 := ldv_usb_register_driver_2_~tmp~19#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset, ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset;havoc ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {64781#true} is VALID [2022-02-20 22:07:38,802 INFO L272 TraceCheckUtils]: 27: Hoare triple {64781#true} call ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset := ldv_init_zalloc(1248); {64875#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:38,802 INFO L290 TraceCheckUtils]: 28: Hoare triple {64875#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {64781#true} is VALID [2022-02-20 22:07:38,803 INFO L272 TraceCheckUtils]: 29: Hoare triple {64781#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {64883#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-02-20 22:07:38,803 INFO L290 TraceCheckUtils]: 30: Hoare triple {64883#(= |#memory_int| |old(#memory_int)|)} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {64781#true} is VALID [2022-02-20 22:07:38,803 INFO L290 TraceCheckUtils]: 31: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:38,803 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {64781#true} {64781#true} #538#return; {64781#true} is VALID [2022-02-20 22:07:38,804 INFO L290 TraceCheckUtils]: 33: Hoare triple {64781#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {64781#true} is VALID [2022-02-20 22:07:38,804 INFO L272 TraceCheckUtils]: 34: Hoare triple {64781#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {64781#true} is VALID [2022-02-20 22:07:38,804 INFO L290 TraceCheckUtils]: 35: Hoare triple {64781#true} ~cond := #in~cond; {64781#true} is VALID [2022-02-20 22:07:38,804 INFO L290 TraceCheckUtils]: 36: Hoare triple {64781#true} assume !(0 == ~cond); {64781#true} is VALID [2022-02-20 22:07:38,804 INFO L290 TraceCheckUtils]: 37: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:38,804 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {64781#true} {64781#true} #540#return; {64781#true} is VALID [2022-02-20 22:07:38,804 INFO L290 TraceCheckUtils]: 39: Hoare triple {64781#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {64781#true} is VALID [2022-02-20 22:07:38,804 INFO L290 TraceCheckUtils]: 40: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:38,805 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {64781#true} {64781#true} #600#return; {64781#true} is VALID [2022-02-20 22:07:38,805 INFO L290 TraceCheckUtils]: 42: Hoare triple {64781#true} ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset := ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset;havoc ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {64781#true} is VALID [2022-02-20 22:07:38,805 INFO L290 TraceCheckUtils]: 43: Hoare triple {64781#true} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_2_#res#1 := ldv_usb_register_driver_2_~ldv_func_res~0#1; {64781#true} is VALID [2022-02-20 22:07:38,805 INFO L290 TraceCheckUtils]: 44: Hoare triple {64781#true} usb_register_#t~ret31#1 := ldv_usb_register_driver_2_#res#1;assume { :end_inline_ldv_usb_register_driver_2 } true;assume -2147483648 <= usb_register_#t~ret31#1 && usb_register_#t~ret31#1 <= 2147483647;usb_register_~tmp~1#1 := usb_register_#t~ret31#1;havoc usb_register_#t~ret31#1;usb_register_#res#1 := usb_register_~tmp~1#1; {64781#true} is VALID [2022-02-20 22:07:38,805 INFO L290 TraceCheckUtils]: 45: Hoare triple {64781#true} usb_acecad_init_#t~ret180#1 := usb_register_#res#1;assume { :end_inline_usb_register } true;assume -2147483648 <= usb_acecad_init_#t~ret180#1 && usb_acecad_init_#t~ret180#1 <= 2147483647;usb_acecad_init_~tmp~15#1 := usb_acecad_init_#t~ret180#1;havoc usb_acecad_init_#t~ret180#1;usb_acecad_init_~result~0#1 := usb_acecad_init_~tmp~15#1; {64781#true} is VALID [2022-02-20 22:07:38,805 INFO L290 TraceCheckUtils]: 46: Hoare triple {64781#true} assume 0 == usb_acecad_init_~result~0#1;havoc usb_acecad_init_#t~nondet181#1; {64781#true} is VALID [2022-02-20 22:07:38,805 INFO L290 TraceCheckUtils]: 47: Hoare triple {64781#true} usb_acecad_init_#res#1 := usb_acecad_init_~result~0#1; {64781#true} is VALID [2022-02-20 22:07:38,805 INFO L290 TraceCheckUtils]: 48: Hoare triple {64781#true} main_#t~ret191#1 := usb_acecad_init_#res#1;assume { :end_inline_usb_acecad_init } true;assume -2147483648 <= main_#t~ret191#1 && main_#t~ret191#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret191#1;havoc main_#t~ret191#1; {64781#true} is VALID [2022-02-20 22:07:38,806 INFO L290 TraceCheckUtils]: 49: Hoare triple {64781#true} assume 0 == ~ldv_retval_1~0;~ldv_state_variable_0~0 := 3; {64781#true} is VALID [2022-02-20 22:07:38,806 INFO L290 TraceCheckUtils]: 50: Hoare triple {64781#true} assume !(0 != ~ldv_retval_1~0); {64781#true} is VALID [2022-02-20 22:07:38,806 INFO L290 TraceCheckUtils]: 51: Hoare triple {64781#true} assume -2147483648 <= main_#t~nondet184#1 && main_#t~nondet184#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet184#1;havoc main_#t~nondet184#1;main_#t~switch185#1 := 0 == main_~tmp___0~6#1; {64781#true} is VALID [2022-02-20 22:07:38,806 INFO L290 TraceCheckUtils]: 52: Hoare triple {64781#true} assume main_#t~switch185#1; {64781#true} is VALID [2022-02-20 22:07:38,806 INFO L290 TraceCheckUtils]: 53: Hoare triple {64781#true} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= main_#t~nondet186#1 && main_#t~nondet186#1 <= 2147483647;main_~tmp___1~3#1 := main_#t~nondet186#1;havoc main_#t~nondet186#1;main_#t~switch187#1 := 0 == main_~tmp___1~3#1; {64781#true} is VALID [2022-02-20 22:07:38,806 INFO L290 TraceCheckUtils]: 54: Hoare triple {64781#true} assume main_#t~switch187#1; {64781#true} is VALID [2022-02-20 22:07:38,806 INFO L290 TraceCheckUtils]: 55: Hoare triple {64781#true} assume 1 == ~ldv_state_variable_1~0;assume { :begin_inline_usb_acecad_probe } true;usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset, usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset := ~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc usb_acecad_probe_#res#1;havoc usb_acecad_probe_#t~ret127#1.base, usb_acecad_probe_#t~ret127#1.offset, usb_acecad_probe_#t~mem128#1.base, usb_acecad_probe_#t~mem128#1.offset, usb_acecad_probe_#t~mem129#1, usb_acecad_probe_#t~mem130#1.base, usb_acecad_probe_#t~mem130#1.offset, usb_acecad_probe_#t~ret131#1, usb_acecad_probe_#t~mem132#1, usb_acecad_probe_#t~ret133#1, usb_acecad_probe_#t~ret134#1, usb_acecad_probe_#t~ret135#1.base, usb_acecad_probe_#t~ret135#1.offset, usb_acecad_probe_#t~ret136#1.base, usb_acecad_probe_#t~ret136#1.offset, usb_acecad_probe_#t~ret137#1.base, usb_acecad_probe_#t~ret137#1.offset, usb_acecad_probe_#t~mem138#1.base, usb_acecad_probe_#t~mem138#1.offset, usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset, usb_acecad_probe_#t~mem140#1.base, usb_acecad_probe_#t~mem140#1.offset, usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset, usb_acecad_probe_#t~mem142#1.base, usb_acecad_probe_#t~mem142#1.offset, usb_acecad_probe_#t~ret143#1, usb_acecad_probe_#t~mem144#1.base, usb_acecad_probe_#t~mem144#1.offset, usb_acecad_probe_#t~mem145#1.base, usb_acecad_probe_#t~mem145#1.offset, usb_acecad_probe_#t~ret146#1, usb_acecad_probe_#t~mem147#1.base, usb_acecad_probe_#t~mem147#1.offset, usb_acecad_probe_#t~ret148#1, usb_acecad_probe_#t~ret149#1, usb_acecad_probe_#t~ret150#1, usb_acecad_probe_#t~mem151#1, usb_acecad_probe_#t~switch152#1, usb_acecad_probe_#t~nondet153#1, usb_acecad_probe_#t~nondet154#1, usb_acecad_probe_#t~mem155#1, usb_acecad_probe_#t~mem156#1, usb_acecad_probe_#t~nondet157#1, usb_acecad_probe_#t~nondet158#1, usb_acecad_probe_#t~mem159#1, usb_acecad_probe_#t~mem160#1, usb_acecad_probe_#t~mem161#1.base, usb_acecad_probe_#t~mem161#1.offset, usb_acecad_probe_#t~mem162#1.base, usb_acecad_probe_#t~mem162#1.offset, usb_acecad_probe_#t~ite163#1, usb_acecad_probe_#t~mem164#1, usb_acecad_probe_#t~mem165#1.base, usb_acecad_probe_#t~mem165#1.offset, usb_acecad_probe_#t~mem166#1, usb_acecad_probe_#t~mem167#1.base, usb_acecad_probe_#t~mem167#1.offset, usb_acecad_probe_#t~mem168#1.base, usb_acecad_probe_#t~mem168#1.offset, usb_acecad_probe_#t~mem169#1, usb_acecad_probe_#t~mem170#1.base, usb_acecad_probe_#t~mem170#1.offset, usb_acecad_probe_#t~ret171#1, usb_acecad_probe_#t~mem172#1.base, usb_acecad_probe_#t~mem172#1.offset, usb_acecad_probe_#t~mem173#1, usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset, usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset, usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset, usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset, usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset, usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset, usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset, usb_acecad_probe_~pipe~0#1, usb_acecad_probe_~maxp~0#1, usb_acecad_probe_~err~0#1, usb_acecad_probe_~tmp___0~5#1, usb_acecad_probe_~tmp___1~2#1, usb_acecad_probe_~tmp___2~0#1, usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset, usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~tmp___5~0#1, usb_acecad_probe_~tmp___6~0#1;usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset := usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset;usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset := usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset;havoc usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset;havoc usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;havoc usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset;havoc usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset;havoc usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset;havoc usb_acecad_probe_~pipe~0#1;havoc usb_acecad_probe_~maxp~0#1;havoc usb_acecad_probe_~err~0#1;havoc usb_acecad_probe_~tmp___0~5#1;havoc usb_acecad_probe_~tmp___1~2#1;havoc usb_acecad_probe_~tmp___2~0#1;havoc usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;havoc usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset;havoc usb_acecad_probe_~tmp___5~0#1;havoc usb_acecad_probe_~tmp___6~0#1;assume { :begin_inline_interface_to_usbdev } true;interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset := usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset;havoc interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;havoc interface_to_usbdev_#t~ret192#1.base, interface_to_usbdev_#t~ret192#1.offset, interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset, interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset := interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset;havoc interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;assume { :begin_inline_ldv_interface_to_usbdev } true;havoc ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;havoc ldv_interface_to_usbdev_#t~ret203#1.base, ldv_interface_to_usbdev_#t~ret203#1.offset, ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset, ldv_interface_to_usbdev_~tmp~26#1.base, ldv_interface_to_usbdev_~tmp~26#1.offset;havoc ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset;havoc ldv_interface_to_usbdev_~tmp~26#1.base, ldv_interface_to_usbdev_~tmp~26#1.offset; {64781#true} is VALID [2022-02-20 22:07:38,807 INFO L272 TraceCheckUtils]: 56: Hoare triple {64781#true} call ldv_interface_to_usbdev_#t~ret203#1.base, ldv_interface_to_usbdev_#t~ret203#1.offset := ldv_malloc(1822); {64891#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:38,807 INFO L290 TraceCheckUtils]: 57: Hoare triple {64891#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {64781#true} is VALID [2022-02-20 22:07:38,807 INFO L290 TraceCheckUtils]: 58: Hoare triple {64781#true} assume !(0 != ~tmp___0~2);call #t~malloc60.base, #t~malloc60.offset := #Ultimate.allocOnHeap(~size);~tmp~4.base, ~tmp~4.offset := #t~malloc60.base, #t~malloc60.offset;havoc #t~malloc60.base, #t~malloc60.offset;~p~0.base, ~p~0.offset := ~tmp~4.base, ~tmp~4.offset; {64781#true} is VALID [2022-02-20 22:07:38,807 INFO L272 TraceCheckUtils]: 59: Hoare triple {64781#true} call assume_abort_if_not((if 0 != (~p~0.base + ~p~0.offset) % 18446744073709551616 then 1 else 0)); {64781#true} is VALID [2022-02-20 22:07:38,808 INFO L290 TraceCheckUtils]: 60: Hoare triple {64781#true} ~cond := #in~cond; {64781#true} is VALID [2022-02-20 22:07:38,808 INFO L290 TraceCheckUtils]: 61: Hoare triple {64781#true} assume !(0 == ~cond); {64781#true} is VALID [2022-02-20 22:07:38,808 INFO L290 TraceCheckUtils]: 62: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:38,808 INFO L284 TraceCheckUtils]: 63: Hoare quadruple {64781#true} {64781#true} #542#return; {64781#true} is VALID [2022-02-20 22:07:38,808 INFO L290 TraceCheckUtils]: 64: Hoare triple {64781#true} #res.base, #res.offset := ~p~0.base, ~p~0.offset; {64781#true} is VALID [2022-02-20 22:07:38,808 INFO L290 TraceCheckUtils]: 65: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:38,808 INFO L284 TraceCheckUtils]: 66: Hoare quadruple {64781#true} {64781#true} #546#return; {64781#true} is VALID [2022-02-20 22:07:38,809 INFO L290 TraceCheckUtils]: 67: Hoare triple {64781#true} ldv_interface_to_usbdev_~tmp~26#1.base, ldv_interface_to_usbdev_~tmp~26#1.offset := ldv_interface_to_usbdev_#t~ret203#1.base, ldv_interface_to_usbdev_#t~ret203#1.offset;havoc ldv_interface_to_usbdev_#t~ret203#1.base, ldv_interface_to_usbdev_#t~ret203#1.offset;ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset := ldv_interface_to_usbdev_~tmp~26#1.base, ldv_interface_to_usbdev_~tmp~26#1.offset; {64781#true} is VALID [2022-02-20 22:07:38,809 INFO L290 TraceCheckUtils]: 68: Hoare triple {64781#true} assume !(0 == (ldv_interface_to_usbdev_~result~1#1.base + ldv_interface_to_usbdev_~result~1#1.offset) % 18446744073709551616); {64781#true} is VALID [2022-02-20 22:07:38,809 INFO L290 TraceCheckUtils]: 69: Hoare triple {64781#true} ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset := ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset; {64781#true} is VALID [2022-02-20 22:07:38,809 INFO L290 TraceCheckUtils]: 70: Hoare triple {64781#true} interface_to_usbdev_#t~ret192#1.base, interface_to_usbdev_#t~ret192#1.offset := ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;assume { :end_inline_ldv_interface_to_usbdev } true;interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset := interface_to_usbdev_#t~ret192#1.base, interface_to_usbdev_#t~ret192#1.offset;havoc interface_to_usbdev_#t~ret192#1.base, interface_to_usbdev_#t~ret192#1.offset;interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset := interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset; {64781#true} is VALID [2022-02-20 22:07:38,809 INFO L290 TraceCheckUtils]: 71: Hoare triple {64781#true} usb_acecad_probe_#t~ret127#1.base, usb_acecad_probe_#t~ret127#1.offset := interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;assume { :end_inline_interface_to_usbdev } true;usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset := usb_acecad_probe_#t~ret127#1.base, usb_acecad_probe_#t~ret127#1.offset;havoc usb_acecad_probe_#t~ret127#1.base, usb_acecad_probe_#t~ret127#1.offset;usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset := usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;call usb_acecad_probe_#t~mem128#1.base, usb_acecad_probe_#t~mem128#1.offset := read~$Pointer$(usb_acecad_probe_~intf#1.base, 8 + usb_acecad_probe_~intf#1.offset, 8);usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset := usb_acecad_probe_#t~mem128#1.base, usb_acecad_probe_#t~mem128#1.offset;havoc usb_acecad_probe_#t~mem128#1.base, usb_acecad_probe_#t~mem128#1.offset;call usb_acecad_probe_#t~mem129#1 := read~int(usb_acecad_probe_~interface~0#1.base, 4 + usb_acecad_probe_~interface~0#1.offset, 1); {64781#true} is VALID [2022-02-20 22:07:38,809 INFO L290 TraceCheckUtils]: 72: Hoare triple {64781#true} assume !(1 != usb_acecad_probe_#t~mem129#1 % 256 % 4294967296);havoc usb_acecad_probe_#t~mem129#1;call usb_acecad_probe_#t~mem130#1.base, usb_acecad_probe_#t~mem130#1.offset := read~$Pointer$(usb_acecad_probe_~interface~0#1.base, 9 + usb_acecad_probe_~interface~0#1.offset, 8);usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset := usb_acecad_probe_#t~mem130#1.base, usb_acecad_probe_#t~mem130#1.offset;havoc usb_acecad_probe_#t~mem130#1.base, usb_acecad_probe_#t~mem130#1.offset;assume { :begin_inline_usb_endpoint_is_int_in } true;usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset := usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_endpoint_is_int_in_#res#1;havoc usb_endpoint_is_int_in_#t~ret3#1, usb_endpoint_is_int_in_#t~ret4#1, usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset, usb_endpoint_is_int_in_~tmp~0#1, usb_endpoint_is_int_in_~tmp___0~0#1, usb_endpoint_is_int_in_~tmp___1~0#1;usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset := usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset;havoc usb_endpoint_is_int_in_~tmp~0#1;havoc usb_endpoint_is_int_in_~tmp___0~0#1;havoc usb_endpoint_is_int_in_~tmp___1~0#1;assume { :begin_inline_usb_endpoint_xfer_int } true;usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset := usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset;havoc usb_endpoint_xfer_int_#res#1;havoc usb_endpoint_xfer_int_#t~mem2#1, usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset;usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset := usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset;call usb_endpoint_xfer_int_#t~mem2#1 := read~int(usb_endpoint_xfer_int_~epd#1.base, 3 + usb_endpoint_xfer_int_~epd#1.offset, 1);usb_endpoint_xfer_int_#res#1 := (if 3 == (if 0 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 0 else (if 1 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 1 else ~bitwiseAnd(usb_endpoint_xfer_int_#t~mem2#1 % 256, 3))) then 1 else 0);havoc usb_endpoint_xfer_int_#t~mem2#1; {64781#true} is VALID [2022-02-20 22:07:38,809 INFO L290 TraceCheckUtils]: 73: Hoare triple {64781#true} usb_endpoint_is_int_in_#t~ret3#1 := usb_endpoint_xfer_int_#res#1;assume { :end_inline_usb_endpoint_xfer_int } true;assume -2147483648 <= usb_endpoint_is_int_in_#t~ret3#1 && usb_endpoint_is_int_in_#t~ret3#1 <= 2147483647;usb_endpoint_is_int_in_~tmp~0#1 := usb_endpoint_is_int_in_#t~ret3#1;havoc usb_endpoint_is_int_in_#t~ret3#1; {64781#true} is VALID [2022-02-20 22:07:38,809 INFO L290 TraceCheckUtils]: 74: Hoare triple {64781#true} assume 0 != usb_endpoint_is_int_in_~tmp~0#1;assume { :begin_inline_usb_endpoint_dir_in } true;usb_endpoint_dir_in_#in~epd#1.base, usb_endpoint_dir_in_#in~epd#1.offset := usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset;havoc usb_endpoint_dir_in_#res#1;havoc usb_endpoint_dir_in_#t~mem1#1, usb_endpoint_dir_in_~epd#1.base, usb_endpoint_dir_in_~epd#1.offset;usb_endpoint_dir_in_~epd#1.base, usb_endpoint_dir_in_~epd#1.offset := usb_endpoint_dir_in_#in~epd#1.base, usb_endpoint_dir_in_#in~epd#1.offset;call usb_endpoint_dir_in_#t~mem1#1 := read~int(usb_endpoint_dir_in_~epd#1.base, 2 + usb_endpoint_dir_in_~epd#1.offset, 1);usb_endpoint_dir_in_#res#1 := (if (if usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 <= 127 then usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 else usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 - 256) < 0 then 1 else 0);havoc usb_endpoint_dir_in_#t~mem1#1; {64781#true} is VALID [2022-02-20 22:07:38,810 INFO L290 TraceCheckUtils]: 75: Hoare triple {64781#true} usb_endpoint_is_int_in_#t~ret4#1 := usb_endpoint_dir_in_#res#1;assume { :end_inline_usb_endpoint_dir_in } true;assume -2147483648 <= usb_endpoint_is_int_in_#t~ret4#1 && usb_endpoint_is_int_in_#t~ret4#1 <= 2147483647;usb_endpoint_is_int_in_~tmp___0~0#1 := usb_endpoint_is_int_in_#t~ret4#1;havoc usb_endpoint_is_int_in_#t~ret4#1; {64781#true} is VALID [2022-02-20 22:07:38,810 INFO L290 TraceCheckUtils]: 76: Hoare triple {64781#true} assume 0 != usb_endpoint_is_int_in_~tmp___0~0#1;usb_endpoint_is_int_in_~tmp___1~0#1 := 1; {64781#true} is VALID [2022-02-20 22:07:38,810 INFO L290 TraceCheckUtils]: 77: Hoare triple {64781#true} usb_endpoint_is_int_in_#res#1 := usb_endpoint_is_int_in_~tmp___1~0#1; {64781#true} is VALID [2022-02-20 22:07:38,810 INFO L290 TraceCheckUtils]: 78: Hoare triple {64781#true} usb_acecad_probe_#t~ret131#1 := usb_endpoint_is_int_in_#res#1;assume { :end_inline_usb_endpoint_is_int_in } true;assume -2147483648 <= usb_acecad_probe_#t~ret131#1 && usb_acecad_probe_#t~ret131#1 <= 2147483647;usb_acecad_probe_~tmp___0~5#1 := usb_acecad_probe_#t~ret131#1;havoc usb_acecad_probe_#t~ret131#1; {64781#true} is VALID [2022-02-20 22:07:38,810 INFO L290 TraceCheckUtils]: 79: Hoare triple {64781#true} assume !(0 == usb_acecad_probe_~tmp___0~5#1);call usb_acecad_probe_#t~mem132#1 := read~int(usb_acecad_probe_~endpoint~0#1.base, 2 + usb_acecad_probe_~endpoint~0#1.offset, 1);assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_#t~mem132#1 % 256;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem42#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem42#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := (if (1 == 256 * __create_pipe_#t~mem42#1 || 0 == 256 * __create_pipe_#t~mem42#1) && 0 == 32768 * __create_pipe_~endpoint#1 then 256 * __create_pipe_#t~mem42#1 else (if 0 == 256 * __create_pipe_#t~mem42#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1) then 32768 * __create_pipe_~endpoint#1 else (if (1 == 256 * __create_pipe_#t~mem42#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1)) || ((1 == 256 * __create_pipe_#t~mem42#1 || 0 == 256 * __create_pipe_#t~mem42#1) && 1 == 32768 * __create_pipe_~endpoint#1) then 1 else ~bitwiseOr(256 * __create_pipe_#t~mem42#1, 32768 * __create_pipe_~endpoint#1))));havoc __create_pipe_#t~mem42#1; {64781#true} is VALID [2022-02-20 22:07:38,810 INFO L290 TraceCheckUtils]: 80: Hoare triple {64781#true} usb_acecad_probe_#t~ret133#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;usb_acecad_probe_~tmp___1~2#1 := usb_acecad_probe_#t~ret133#1;havoc usb_acecad_probe_#t~mem132#1;havoc usb_acecad_probe_#t~ret133#1;usb_acecad_probe_~pipe~0#1 := (if ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 else ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 - 4294967296);assume { :begin_inline_usb_maxpacket } true;usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset, usb_maxpacket_#in~pipe#1, usb_maxpacket_#in~is_out#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~pipe~0#1, (if 0 == (if 0 == usb_acecad_probe_~pipe~0#1 then 0 else (if 1 == usb_acecad_probe_~pipe~0#1 then 0 else ~bitwiseAnd(usb_acecad_probe_~pipe~0#1, 128))) then 1 else 0);havoc usb_maxpacket_#res#1;havoc usb_maxpacket_#t~ret44#1, usb_maxpacket_#t~ret45#1, usb_maxpacket_#t~mem46#1.base, usb_maxpacket_#t~mem46#1.offset, usb_maxpacket_#t~ret47#1, usb_maxpacket_#t~ret48#1, usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset, usb_maxpacket_#t~mem50#1, usb_maxpacket_#t~nondet43#1, usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset, usb_maxpacket_~pipe#1, usb_maxpacket_~is_out#1, usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset, usb_maxpacket_~epnum~0#1, usb_maxpacket_~__ret_warn_on~0#1, usb_maxpacket_~tmp~2#1, usb_maxpacket_~__ret_warn_on___0~0#1, usb_maxpacket_~tmp___0~1#1;usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset := usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset;usb_maxpacket_~pipe#1 := usb_maxpacket_#in~pipe#1;usb_maxpacket_~is_out#1 := usb_maxpacket_#in~is_out#1;havoc usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset;havoc usb_maxpacket_~epnum~0#1;havoc usb_maxpacket_~__ret_warn_on~0#1;havoc usb_maxpacket_~tmp~2#1;havoc usb_maxpacket_~__ret_warn_on___0~0#1;havoc usb_maxpacket_~tmp___0~1#1; {64781#true} is VALID [2022-02-20 22:07:38,810 INFO L290 TraceCheckUtils]: 81: Hoare triple {64781#true} assume 0 == usb_maxpacket_~pipe#1 / 32768;usb_maxpacket_~epnum~0#1 := 0; {64781#true} is VALID [2022-02-20 22:07:38,811 INFO L290 TraceCheckUtils]: 82: Hoare triple {64781#true} assume !(0 != usb_maxpacket_~is_out#1);usb_maxpacket_~__ret_warn_on___0~0#1 := (if 0 == (if 0 == usb_maxpacket_~pipe#1 then 0 else (if 1 == usb_maxpacket_~pipe#1 then 0 else ~bitwiseAnd(usb_maxpacket_~pipe#1, 128))) then 1 else 0); {64781#true} is VALID [2022-02-20 22:07:38,811 INFO L272 TraceCheckUtils]: 83: Hoare triple {64781#true} call usb_maxpacket_#t~ret47#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {64781#true} is VALID [2022-02-20 22:07:38,811 INFO L290 TraceCheckUtils]: 84: Hoare triple {64781#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {64781#true} is VALID [2022-02-20 22:07:38,811 INFO L290 TraceCheckUtils]: 85: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:38,811 INFO L284 TraceCheckUtils]: 86: Hoare quadruple {64781#true} {64781#true} #556#return; {64781#true} is VALID [2022-02-20 22:07:38,811 INFO L290 TraceCheckUtils]: 87: Hoare triple {64781#true} assume -9223372036854775808 <= usb_maxpacket_#t~ret47#1 && usb_maxpacket_#t~ret47#1 <= 9223372036854775807;usb_maxpacket_~tmp___0~1#1 := usb_maxpacket_#t~ret47#1;havoc usb_maxpacket_#t~ret47#1; {64781#true} is VALID [2022-02-20 22:07:38,811 INFO L290 TraceCheckUtils]: 88: Hoare triple {64781#true} assume !(0 != usb_maxpacket_~tmp___0~1#1); {64781#true} is VALID [2022-02-20 22:07:38,812 INFO L272 TraceCheckUtils]: 89: Hoare triple {64781#true} call usb_maxpacket_#t~ret48#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {64781#true} is VALID [2022-02-20 22:07:38,812 INFO L290 TraceCheckUtils]: 90: Hoare triple {64781#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {64781#true} is VALID [2022-02-20 22:07:38,812 INFO L290 TraceCheckUtils]: 91: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:38,812 INFO L284 TraceCheckUtils]: 92: Hoare quadruple {64781#true} {64781#true} #560#return; {64781#true} is VALID [2022-02-20 22:07:38,812 INFO L290 TraceCheckUtils]: 93: Hoare triple {64781#true} assume -9223372036854775808 <= usb_maxpacket_#t~ret48#1 && usb_maxpacket_#t~ret48#1 <= 9223372036854775807;havoc usb_maxpacket_#t~ret48#1;call usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset := read~$Pointer$(usb_maxpacket_~udev#1.base, 1186 + usb_maxpacket_~udev#1.offset + 8 * (usb_maxpacket_~epnum~0#1 % 4294967296), 8);usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset := usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset;havoc usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset; {64781#true} is VALID [2022-02-20 22:07:38,812 INFO L290 TraceCheckUtils]: 94: Hoare triple {64781#true} assume 0 == (usb_maxpacket_~ep~0#1.base + usb_maxpacket_~ep~0#1.offset) % 18446744073709551616;usb_maxpacket_#res#1 := 0; {64781#true} is VALID [2022-02-20 22:07:38,812 INFO L290 TraceCheckUtils]: 95: Hoare triple {64781#true} usb_acecad_probe_#t~ret134#1 := usb_maxpacket_#res#1;assume { :end_inline_usb_maxpacket } true;usb_acecad_probe_~tmp___2~0#1 := usb_acecad_probe_#t~ret134#1;havoc usb_acecad_probe_#t~ret134#1;usb_acecad_probe_~maxp~0#1 := usb_acecad_probe_~tmp___2~0#1 % 65536; {64781#true} is VALID [2022-02-20 22:07:38,813 INFO L272 TraceCheckUtils]: 96: Hoare triple {64781#true} call usb_acecad_probe_#t~ret135#1.base, usb_acecad_probe_#t~ret135#1.offset := kzalloc(232, 208); {64891#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:38,813 INFO L290 TraceCheckUtils]: 97: Hoare triple {64891#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {64781#true} is VALID [2022-02-20 22:07:38,814 INFO L272 TraceCheckUtils]: 98: Hoare triple {64781#true} call __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset := ldv_malloc(__kmalloc_~size#1); {64891#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:38,814 INFO L290 TraceCheckUtils]: 99: Hoare triple {64891#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {64781#true} is VALID [2022-02-20 22:07:38,814 INFO L290 TraceCheckUtils]: 100: Hoare triple {64781#true} assume !(0 != ~tmp___0~2);call #t~malloc60.base, #t~malloc60.offset := #Ultimate.allocOnHeap(~size);~tmp~4.base, ~tmp~4.offset := #t~malloc60.base, #t~malloc60.offset;havoc #t~malloc60.base, #t~malloc60.offset;~p~0.base, ~p~0.offset := ~tmp~4.base, ~tmp~4.offset; {64781#true} is VALID [2022-02-20 22:07:38,814 INFO L272 TraceCheckUtils]: 101: Hoare triple {64781#true} call assume_abort_if_not((if 0 != (~p~0.base + ~p~0.offset) % 18446744073709551616 then 1 else 0)); {64781#true} is VALID [2022-02-20 22:07:38,814 INFO L290 TraceCheckUtils]: 102: Hoare triple {64781#true} ~cond := #in~cond; {64781#true} is VALID [2022-02-20 22:07:38,814 INFO L290 TraceCheckUtils]: 103: Hoare triple {64781#true} assume !(0 == ~cond); {64781#true} is VALID [2022-02-20 22:07:38,814 INFO L290 TraceCheckUtils]: 104: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:38,815 INFO L284 TraceCheckUtils]: 105: Hoare quadruple {64781#true} {64781#true} #542#return; {64781#true} is VALID [2022-02-20 22:07:38,815 INFO L290 TraceCheckUtils]: 106: Hoare triple {64781#true} #res.base, #res.offset := ~p~0.base, ~p~0.offset; {64781#true} is VALID [2022-02-20 22:07:38,815 INFO L290 TraceCheckUtils]: 107: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:38,815 INFO L284 TraceCheckUtils]: 108: Hoare quadruple {64781#true} {64781#true} #530#return; {64781#true} is VALID [2022-02-20 22:07:38,815 INFO L290 TraceCheckUtils]: 109: Hoare triple {64781#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset; {64781#true} is VALID [2022-02-20 22:07:38,815 INFO L290 TraceCheckUtils]: 110: Hoare triple {64781#true} kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {64781#true} is VALID [2022-02-20 22:07:38,815 INFO L290 TraceCheckUtils]: 111: Hoare triple {64781#true} #t~ret55#1.base, #t~ret55#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret55#1.base, #t~ret55#1.offset;havoc #t~ret55#1.base, #t~ret55#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {64781#true} is VALID [2022-02-20 22:07:38,816 INFO L290 TraceCheckUtils]: 112: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:38,816 INFO L284 TraceCheckUtils]: 113: Hoare quadruple {64781#true} {64781#true} #562#return; {64781#true} is VALID [2022-02-20 22:07:38,816 INFO L290 TraceCheckUtils]: 114: Hoare triple {64781#true} usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset := usb_acecad_probe_#t~ret135#1.base, usb_acecad_probe_#t~ret135#1.offset;havoc usb_acecad_probe_#t~ret135#1.base, usb_acecad_probe_#t~ret135#1.offset;usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset := usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;assume { :begin_inline_input_allocate_device } true;havoc input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;havoc input_allocate_device_#t~ret67#1.base, input_allocate_device_#t~ret67#1.offset; {64781#true} is VALID [2022-02-20 22:07:38,816 INFO L272 TraceCheckUtils]: 115: Hoare triple {64781#true} call input_allocate_device_#t~ret67#1.base, input_allocate_device_#t~ret67#1.offset := kzalloc(1855, ~bitwiseOr(~bitwiseOr(16, 64), 128)); {64891#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:38,816 INFO L290 TraceCheckUtils]: 116: Hoare triple {64891#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {64781#true} is VALID [2022-02-20 22:07:38,817 INFO L272 TraceCheckUtils]: 117: Hoare triple {64781#true} call __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset := ldv_malloc(__kmalloc_~size#1); {64891#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:38,817 INFO L290 TraceCheckUtils]: 118: Hoare triple {64891#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {64781#true} is VALID [2022-02-20 22:07:38,818 INFO L290 TraceCheckUtils]: 119: Hoare triple {64781#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {64918#(and (= |ldv_malloc_#res.base| 0) (= |ldv_malloc_#res.offset| 0))} is VALID [2022-02-20 22:07:38,818 INFO L290 TraceCheckUtils]: 120: Hoare triple {64918#(and (= |ldv_malloc_#res.base| 0) (= |ldv_malloc_#res.offset| 0))} assume true; {64918#(and (= |ldv_malloc_#res.base| 0) (= |ldv_malloc_#res.offset| 0))} is VALID [2022-02-20 22:07:38,819 INFO L284 TraceCheckUtils]: 121: Hoare quadruple {64918#(and (= |ldv_malloc_#res.base| 0) (= |ldv_malloc_#res.offset| 0))} {64781#true} #530#return; {64914#(and (= |kzalloc___kmalloc_#t~ret53#1.base| 0) (= |kzalloc___kmalloc_#t~ret53#1.offset| 0))} is VALID [2022-02-20 22:07:38,820 INFO L290 TraceCheckUtils]: 122: Hoare triple {64914#(and (= |kzalloc___kmalloc_#t~ret53#1.base| 0) (= |kzalloc___kmalloc_#t~ret53#1.offset| 0))} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset; {64915#(and (= 0 |kzalloc___kmalloc_#res#1.offset|) (= |kzalloc___kmalloc_#res#1.base| 0))} is VALID [2022-02-20 22:07:38,820 INFO L290 TraceCheckUtils]: 123: Hoare triple {64915#(and (= 0 |kzalloc___kmalloc_#res#1.offset|) (= |kzalloc___kmalloc_#res#1.base| 0))} kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {64916#(and (= |kzalloc_kmalloc_#res#1.offset| 0) (= |kzalloc_kmalloc_#res#1.base| 0))} is VALID [2022-02-20 22:07:38,820 INFO L290 TraceCheckUtils]: 124: Hoare triple {64916#(and (= |kzalloc_kmalloc_#res#1.offset| 0) (= |kzalloc_kmalloc_#res#1.base| 0))} #t~ret55#1.base, #t~ret55#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret55#1.base, #t~ret55#1.offset;havoc #t~ret55#1.base, #t~ret55#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {64917#(and (= |kzalloc_#res#1.offset| 0) (= |kzalloc_#res#1.base| 0))} is VALID [2022-02-20 22:07:38,821 INFO L290 TraceCheckUtils]: 125: Hoare triple {64917#(and (= |kzalloc_#res#1.offset| 0) (= |kzalloc_#res#1.base| 0))} assume true; {64917#(and (= |kzalloc_#res#1.offset| 0) (= |kzalloc_#res#1.base| 0))} is VALID [2022-02-20 22:07:38,822 INFO L284 TraceCheckUtils]: 126: Hoare quadruple {64917#(and (= |kzalloc_#res#1.offset| 0) (= |kzalloc_#res#1.base| 0))} {64781#true} #564#return; {64855#(and (= |ULTIMATE.start_input_allocate_device_#t~ret67#1.offset| 0) (= |ULTIMATE.start_input_allocate_device_#t~ret67#1.base| 0))} is VALID [2022-02-20 22:07:38,822 INFO L290 TraceCheckUtils]: 127: Hoare triple {64855#(and (= |ULTIMATE.start_input_allocate_device_#t~ret67#1.offset| 0) (= |ULTIMATE.start_input_allocate_device_#t~ret67#1.base| 0))} input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset := input_allocate_device_#t~ret67#1.base, input_allocate_device_#t~ret67#1.offset;havoc input_allocate_device_#t~ret67#1.base, input_allocate_device_#t~ret67#1.offset; {64856#(and (= |ULTIMATE.start_input_allocate_device_#res#1.base| 0) (= |ULTIMATE.start_input_allocate_device_#res#1.offset| 0))} is VALID [2022-02-20 22:07:38,822 INFO L290 TraceCheckUtils]: 128: Hoare triple {64856#(and (= |ULTIMATE.start_input_allocate_device_#res#1.base| 0) (= |ULTIMATE.start_input_allocate_device_#res#1.offset| 0))} usb_acecad_probe_#t~ret136#1.base, usb_acecad_probe_#t~ret136#1.offset := input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;assume { :end_inline_input_allocate_device } true;usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset := usb_acecad_probe_#t~ret136#1.base, usb_acecad_probe_#t~ret136#1.offset;havoc usb_acecad_probe_#t~ret136#1.base, usb_acecad_probe_#t~ret136#1.offset; {64857#(and (= |ULTIMATE.start_usb_acecad_probe_~input_dev~0#1.base| 0) (= |ULTIMATE.start_usb_acecad_probe_~input_dev~0#1.offset| 0))} is VALID [2022-02-20 22:07:38,823 INFO L290 TraceCheckUtils]: 129: Hoare triple {64857#(and (= |ULTIMATE.start_usb_acecad_probe_~input_dev~0#1.base| 0) (= |ULTIMATE.start_usb_acecad_probe_~input_dev~0#1.offset| 0))} assume !(0 == (usb_acecad_probe_~acecad~3#1.base + usb_acecad_probe_~acecad~3#1.offset) % 18446744073709551616 || 0 == (usb_acecad_probe_~input_dev~0#1.base + usb_acecad_probe_~input_dev~0#1.offset) % 18446744073709551616);assume { :begin_inline_usb_alloc_coherent } true;usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset, usb_alloc_coherent_#in~arg1#1, usb_alloc_coherent_#in~arg2#1, usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, 8, 208, usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset;havoc usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;havoc usb_alloc_coherent_#t~ret212#1.base, usb_alloc_coherent_#t~ret212#1.offset, usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset, usb_alloc_coherent_~arg1#1, usb_alloc_coherent_~arg2#1, usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset;usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset := usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset;usb_alloc_coherent_~arg1#1 := usb_alloc_coherent_#in~arg1#1;usb_alloc_coherent_~arg2#1 := usb_alloc_coherent_#in~arg2#1;usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset := usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset; {64782#false} is VALID [2022-02-20 22:07:38,823 INFO L272 TraceCheckUtils]: 130: Hoare triple {64782#false} call usb_alloc_coherent_#t~ret212#1.base, usb_alloc_coherent_#t~ret212#1.offset := ldv_malloc(0); {64891#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:38,824 INFO L290 TraceCheckUtils]: 131: Hoare triple {64891#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {64781#true} is VALID [2022-02-20 22:07:38,824 INFO L290 TraceCheckUtils]: 132: Hoare triple {64781#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {64781#true} is VALID [2022-02-20 22:07:38,824 INFO L290 TraceCheckUtils]: 133: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:38,824 INFO L284 TraceCheckUtils]: 134: Hoare quadruple {64781#true} {64782#false} #566#return; {64782#false} is VALID [2022-02-20 22:07:38,824 INFO L290 TraceCheckUtils]: 135: Hoare triple {64782#false} usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset := usb_alloc_coherent_#t~ret212#1.base, usb_alloc_coherent_#t~ret212#1.offset;havoc usb_alloc_coherent_#t~ret212#1.base, usb_alloc_coherent_#t~ret212#1.offset; {64782#false} is VALID [2022-02-20 22:07:38,824 INFO L290 TraceCheckUtils]: 136: Hoare triple {64782#false} usb_acecad_probe_#t~ret137#1.base, usb_acecad_probe_#t~ret137#1.offset := usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;assume { :end_inline_usb_alloc_coherent } true;usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset := usb_acecad_probe_#t~ret137#1.base, usb_acecad_probe_#t~ret137#1.offset;havoc usb_acecad_probe_#t~ret137#1.base, usb_acecad_probe_#t~ret137#1.offset;call write~$Pointer$(usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem138#1.base, usb_acecad_probe_#t~mem138#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8); {64782#false} is VALID [2022-02-20 22:07:38,824 INFO L290 TraceCheckUtils]: 137: Hoare triple {64782#false} assume !(0 == (usb_acecad_probe_#t~mem138#1.base + usb_acecad_probe_#t~mem138#1.offset) % 18446744073709551616);havoc usb_acecad_probe_#t~mem138#1.base, usb_acecad_probe_#t~mem138#1.offset;assume { :begin_inline_ldv_usb_alloc_urb_5 } true;ldv_usb_alloc_urb_5_#in~iso_packets#1, ldv_usb_alloc_urb_5_#in~mem_flags#1 := 0, 208;havoc ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret196#1.base, ldv_usb_alloc_urb_5_#t~ret196#1.offset, ldv_usb_alloc_urb_5_~iso_packets#1, ldv_usb_alloc_urb_5_~mem_flags#1, ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;ldv_usb_alloc_urb_5_~iso_packets#1 := ldv_usb_alloc_urb_5_#in~iso_packets#1;ldv_usb_alloc_urb_5_~mem_flags#1 := ldv_usb_alloc_urb_5_#in~mem_flags#1;havoc ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;assume { :begin_inline_ldv_alloc_urb } true;havoc ldv_alloc_urb_#res#1.base, ldv_alloc_urb_#res#1.offset;havoc ldv_alloc_urb_#t~ret198#1.base, ldv_alloc_urb_#t~ret198#1.offset, ldv_alloc_urb_#t~ret199#1, ldv_alloc_urb_~value~0#1.base, ldv_alloc_urb_~value~0#1.offset, ldv_alloc_urb_~tmp~24#1.base, ldv_alloc_urb_~tmp~24#1.offset, ldv_alloc_urb_~tmp___0~7#1;havoc ldv_alloc_urb_~value~0#1.base, ldv_alloc_urb_~value~0#1.offset;havoc ldv_alloc_urb_~tmp~24#1.base, ldv_alloc_urb_~tmp~24#1.offset;havoc ldv_alloc_urb_~tmp___0~7#1; {64782#false} is VALID [2022-02-20 22:07:38,824 INFO L272 TraceCheckUtils]: 138: Hoare triple {64782#false} call ldv_alloc_urb_#t~ret198#1.base, ldv_alloc_urb_#t~ret198#1.offset := ldv_malloc(180); {64891#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:07:38,825 INFO L290 TraceCheckUtils]: 139: Hoare triple {64891#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {64781#true} is VALID [2022-02-20 22:07:38,825 INFO L290 TraceCheckUtils]: 140: Hoare triple {64781#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {64781#true} is VALID [2022-02-20 22:07:38,825 INFO L290 TraceCheckUtils]: 141: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:38,825 INFO L284 TraceCheckUtils]: 142: Hoare quadruple {64781#true} {64782#false} #568#return; {64782#false} is VALID [2022-02-20 22:07:38,825 INFO L290 TraceCheckUtils]: 143: Hoare triple {64782#false} ldv_alloc_urb_~tmp~24#1.base, ldv_alloc_urb_~tmp~24#1.offset := ldv_alloc_urb_#t~ret198#1.base, ldv_alloc_urb_#t~ret198#1.offset;havoc ldv_alloc_urb_#t~ret198#1.base, ldv_alloc_urb_#t~ret198#1.offset;ldv_alloc_urb_~value~0#1.base, ldv_alloc_urb_~value~0#1.offset := ldv_alloc_urb_~tmp~24#1.base, ldv_alloc_urb_~tmp~24#1.offset; {64782#false} is VALID [2022-02-20 22:07:38,825 INFO L272 TraceCheckUtils]: 144: Hoare triple {64782#false} call ldv_alloc_urb_#t~ret199#1 := ldv_undef_int(); {64781#true} is VALID [2022-02-20 22:07:38,825 INFO L290 TraceCheckUtils]: 145: Hoare triple {64781#true} havoc ~tmp~8;assume -2147483648 <= #t~nondet65 && #t~nondet65 <= 2147483647;~tmp~8 := #t~nondet65;havoc #t~nondet65;#res := ~tmp~8; {64781#true} is VALID [2022-02-20 22:07:38,826 INFO L290 TraceCheckUtils]: 146: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:38,826 INFO L284 TraceCheckUtils]: 147: Hoare quadruple {64781#true} {64782#false} #570#return; {64782#false} is VALID [2022-02-20 22:07:38,826 INFO L290 TraceCheckUtils]: 148: Hoare triple {64782#false} assume -2147483648 <= ldv_alloc_urb_#t~ret199#1 && ldv_alloc_urb_#t~ret199#1 <= 2147483647;ldv_alloc_urb_~tmp___0~7#1 := ldv_alloc_urb_#t~ret199#1;havoc ldv_alloc_urb_#t~ret199#1; {64782#false} is VALID [2022-02-20 22:07:38,826 INFO L290 TraceCheckUtils]: 149: Hoare triple {64782#false} assume 0 != ldv_alloc_urb_~tmp___0~7#1; {64782#false} is VALID [2022-02-20 22:07:38,826 INFO L290 TraceCheckUtils]: 150: Hoare triple {64782#false} assume 0 != (ldv_alloc_urb_~value~0#1.base + ldv_alloc_urb_~value~0#1.offset) % 18446744073709551616;~usb_urb~0.base, ~usb_urb~0.offset := ldv_alloc_urb_~value~0#1.base, ldv_alloc_urb_~value~0#1.offset; {64782#false} is VALID [2022-02-20 22:07:38,826 INFO L290 TraceCheckUtils]: 151: Hoare triple {64782#false} ldv_alloc_urb_#res#1.base, ldv_alloc_urb_#res#1.offset := ~usb_urb~0.base, ~usb_urb~0.offset; {64782#false} is VALID [2022-02-20 22:07:38,826 INFO L290 TraceCheckUtils]: 152: Hoare triple {64782#false} ldv_usb_alloc_urb_5_#t~ret196#1.base, ldv_usb_alloc_urb_5_#t~ret196#1.offset := ldv_alloc_urb_#res#1.base, ldv_alloc_urb_#res#1.offset;assume { :end_inline_ldv_alloc_urb } true;ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset := ldv_usb_alloc_urb_5_#t~ret196#1.base, ldv_usb_alloc_urb_5_#t~ret196#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret196#1.base, ldv_usb_alloc_urb_5_#t~ret196#1.offset;ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset := ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset; {64782#false} is VALID [2022-02-20 22:07:38,826 INFO L290 TraceCheckUtils]: 153: Hoare triple {64782#false} usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset := ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;assume { :end_inline_ldv_usb_alloc_urb_5 } true;call write~$Pointer$(usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset, usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8);havoc usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset;call usb_acecad_probe_#t~mem140#1.base, usb_acecad_probe_#t~mem140#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8); {64782#false} is VALID [2022-02-20 22:07:38,827 INFO L290 TraceCheckUtils]: 154: Hoare triple {64782#false} assume 0 == (usb_acecad_probe_#t~mem140#1.base + usb_acecad_probe_#t~mem140#1.offset) % 18446744073709551616;havoc usb_acecad_probe_#t~mem140#1.base, usb_acecad_probe_#t~mem140#1.offset;usb_acecad_probe_~err~0#1 := -12; {64782#false} is VALID [2022-02-20 22:07:38,827 INFO L290 TraceCheckUtils]: 155: Hoare triple {64782#false} call usb_acecad_probe_#t~mem172#1.base, usb_acecad_probe_#t~mem172#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem173#1 := read~int(usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset, 8); {64782#false} is VALID [2022-02-20 22:07:38,827 INFO L272 TraceCheckUtils]: 156: Hoare triple {64782#false} call usb_free_coherent(usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, 8, usb_acecad_probe_#t~mem172#1.base, usb_acecad_probe_#t~mem172#1.offset, usb_acecad_probe_#t~mem173#1); {64781#true} is VALID [2022-02-20 22:07:38,827 INFO L290 TraceCheckUtils]: 157: Hoare triple {64781#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1 := #in~arg1;~arg2.base, ~arg2.offset := #in~arg2.base, #in~arg2.offset;~arg3 := #in~arg3; {64781#true} is VALID [2022-02-20 22:07:38,827 INFO L290 TraceCheckUtils]: 158: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:38,827 INFO L284 TraceCheckUtils]: 159: Hoare quadruple {64781#true} {64782#false} #592#return; {64782#false} is VALID [2022-02-20 22:07:38,827 INFO L290 TraceCheckUtils]: 160: Hoare triple {64782#false} havoc usb_acecad_probe_#t~mem172#1.base, usb_acecad_probe_#t~mem172#1.offset;havoc usb_acecad_probe_#t~mem173#1; {64782#false} is VALID [2022-02-20 22:07:38,827 INFO L290 TraceCheckUtils]: 161: Hoare triple {64782#false} assume { :begin_inline_input_free_device } true;input_free_device_#in~arg0#1.base, input_free_device_#in~arg0#1.offset := usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset;havoc input_free_device_~arg0#1.base, input_free_device_~arg0#1.offset;input_free_device_~arg0#1.base, input_free_device_~arg0#1.offset := input_free_device_#in~arg0#1.base, input_free_device_#in~arg0#1.offset; {64782#false} is VALID [2022-02-20 22:07:38,828 INFO L290 TraceCheckUtils]: 162: Hoare triple {64782#false} assume { :end_inline_input_free_device } true; {64782#false} is VALID [2022-02-20 22:07:38,828 INFO L272 TraceCheckUtils]: 163: Hoare triple {64782#false} call kfree(usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset); {64919#(= |old(#valid)| |#valid|)} is VALID [2022-02-20 22:07:38,828 INFO L290 TraceCheckUtils]: 164: Hoare triple {64919#(= |old(#valid)| |#valid|)} ~p.base, ~p.offset := #in~p.base, #in~p.offset;call ULTIMATE.dealloc(~p.base, ~p.offset); {64781#true} is VALID [2022-02-20 22:07:38,828 INFO L290 TraceCheckUtils]: 165: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:38,828 INFO L284 TraceCheckUtils]: 166: Hoare quadruple {64781#true} {64782#false} #594#return; {64782#false} is VALID [2022-02-20 22:07:38,828 INFO L290 TraceCheckUtils]: 167: Hoare triple {64782#false} usb_acecad_probe_#res#1 := usb_acecad_probe_~err~0#1; {64782#false} is VALID [2022-02-20 22:07:38,828 INFO L290 TraceCheckUtils]: 168: Hoare triple {64782#false} main_#t~ret188#1 := usb_acecad_probe_#res#1;assume { :end_inline_usb_acecad_probe } true;assume -2147483648 <= main_#t~ret188#1 && main_#t~ret188#1 <= 2147483647;~ldv_retval_0~0 := main_#t~ret188#1;havoc main_#t~ret188#1; {64782#false} is VALID [2022-02-20 22:07:38,828 INFO L290 TraceCheckUtils]: 169: Hoare triple {64782#false} assume !(0 == ~ldv_retval_0~0); {64782#false} is VALID [2022-02-20 22:07:38,829 INFO L290 TraceCheckUtils]: 170: Hoare triple {64782#false} assume -2147483648 <= main_#t~nondet184#1 && main_#t~nondet184#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet184#1;havoc main_#t~nondet184#1;main_#t~switch185#1 := 0 == main_~tmp___0~6#1; {64782#false} is VALID [2022-02-20 22:07:38,829 INFO L290 TraceCheckUtils]: 171: Hoare triple {64782#false} assume !main_#t~switch185#1;main_#t~switch185#1 := main_#t~switch185#1 || 1 == main_~tmp___0~6#1; {64782#false} is VALID [2022-02-20 22:07:38,829 INFO L290 TraceCheckUtils]: 172: Hoare triple {64782#false} assume main_#t~switch185#1; {64782#false} is VALID [2022-02-20 22:07:38,829 INFO L290 TraceCheckUtils]: 173: Hoare triple {64782#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet189#1 && main_#t~nondet189#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet189#1;havoc main_#t~nondet189#1;main_#t~switch190#1 := 0 == main_~tmp___2~1#1; {64782#false} is VALID [2022-02-20 22:07:38,829 INFO L290 TraceCheckUtils]: 174: Hoare triple {64782#false} assume main_#t~switch190#1; {64782#false} is VALID [2022-02-20 22:07:38,829 INFO L290 TraceCheckUtils]: 175: Hoare triple {64782#false} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0;assume { :begin_inline_usb_acecad_exit } true;assume { :begin_inline_ldv_usb_deregister_11 } true;ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset := ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset;assume { :begin_inline_usb_deregister } true;usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset := ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;havoc usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset;usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset := usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset; {64782#false} is VALID [2022-02-20 22:07:38,829 INFO L290 TraceCheckUtils]: 176: Hoare triple {64782#false} assume { :end_inline_usb_deregister } true;~ldv_state_variable_1~0 := 0; {64782#false} is VALID [2022-02-20 22:07:38,830 INFO L290 TraceCheckUtils]: 177: Hoare triple {64782#false} assume { :end_inline_ldv_usb_deregister_11 } true; {64782#false} is VALID [2022-02-20 22:07:38,830 INFO L290 TraceCheckUtils]: 178: Hoare triple {64782#false} assume { :end_inline_usb_acecad_exit } true;~ldv_state_variable_0~0 := 2; {64782#false} is VALID [2022-02-20 22:07:38,830 INFO L290 TraceCheckUtils]: 179: Hoare triple {64782#false} assume { :begin_inline_ldv_check_final_state } true; {64782#false} is VALID [2022-02-20 22:07:38,830 INFO L290 TraceCheckUtils]: 180: Hoare triple {64782#false} assume 0 != (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616; {64782#false} is VALID [2022-02-20 22:07:38,830 INFO L272 TraceCheckUtils]: 181: Hoare triple {64782#false} call ldv_error(); {64782#false} is VALID [2022-02-20 22:07:38,830 INFO L290 TraceCheckUtils]: 182: Hoare triple {64782#false} assume !false; {64782#false} is VALID [2022-02-20 22:07:38,831 INFO L134 CoverageAnalysis]: Checked inductivity of 95 backedges. 16 proven. 4 refuted. 0 times theorem prover too weak. 75 trivial. 0 not checked. [2022-02-20 22:07:38,831 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:07:38,831 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1785255588] [2022-02-20 22:07:38,831 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1785255588] provided 0 perfect and 1 imperfect interpolant sequences [2022-02-20 22:07:38,831 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1783989237] [2022-02-20 22:07:38,831 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-02-20 22:07:38,832 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-20 22:07:38,832 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-20 22:07:38,833 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-02-20 22:07:38,835 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-02-20 22:07:39,140 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-02-20 22:07:39,140 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-02-20 22:07:39,144 INFO L263 TraceCheckSpWp]: Trace formula consists of 618 conjuncts, 30 conjunts are in the unsatisfiable core [2022-02-20 22:07:39,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:07:39,219 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-02-20 22:07:40,025 INFO L290 TraceCheckUtils]: 0: Hoare triple {64781#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(99, 2);call #Ultimate.allocInit(10, 3);call #Ultimate.allocInit(7, 4);call write~init~int(97, 4, 0, 1);call write~init~int(99, 4, 1, 1);call write~init~int(101, 4, 2, 1);call write~init~int(99, 4, 3, 1);call write~init~int(97, 4, 4, 1);call write~init~int(100, 4, 5, 1);call write~init~int(0, 4, 6, 1);call #Ultimate.allocInit(20, 5);call #Ultimate.allocInit(20, 6);call #Ultimate.allocInit(57, 7);call #Ultimate.allocInit(2, 8);call write~init~int(32, 8, 0, 1);call write~init~int(0, 8, 1, 1);call #Ultimate.allocInit(8, 9);call #Ultimate.allocInit(34, 10);call #Ultimate.allocInit(32, 11);call #Ultimate.allocInit(11, 12);call #Ultimate.allocInit(48, 13);~LDV_IN_INTERRUPT~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~usb_counter~0 := 0;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset := 14, 0;call #Ultimate.allocInit(72, 14);call write~init~int(3, ~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 2 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(4, ~#usb_acecad_id_table~0.base, 4 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 6 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 8 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 10 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 11 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 12 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 13 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 14 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 15 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 16 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(3, ~#usb_acecad_id_table~0.base, 24 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(1120, ~#usb_acecad_id_table~0.base, 26 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(8, ~#usb_acecad_id_table~0.base, 28 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 30 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 32 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 34 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 35 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 36 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 37 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 38 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 39 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(1, ~#usb_acecad_id_table~0.base, 40 + ~#usb_acecad_id_table~0.offset, 8);call write~init~int(0, ~#usb_acecad_id_table~0.base, 48 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 50 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 52 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 54 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 56 + ~#usb_acecad_id_table~0.offset, 2);call write~init~int(0, ~#usb_acecad_id_table~0.base, 58 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 59 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 60 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 61 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 62 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 63 + ~#usb_acecad_id_table~0.offset, 1);call write~init~int(0, ~#usb_acecad_id_table~0.base, 64 + ~#usb_acecad_id_table~0.offset, 8);~__mod_usb_device_table~0.match_flags := 0;~__mod_usb_device_table~0.idVendor := 0;~__mod_usb_device_table~0.idProduct := 0;~__mod_usb_device_table~0.bcdDevice_lo := 0;~__mod_usb_device_table~0.bcdDevice_hi := 0;~__mod_usb_device_table~0.bDeviceClass := 0;~__mod_usb_device_table~0.bDeviceSubClass := 0;~__mod_usb_device_table~0.bDeviceProtocol := 0;~__mod_usb_device_table~0.bInterfaceClass := 0;~__mod_usb_device_table~0.bInterfaceSubClass := 0;~__mod_usb_device_table~0.bInterfaceProtocol := 0;~__mod_usb_device_table~0.driver_info := 0;~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset := 15, 0;call #Ultimate.allocInit(264, 15);call write~init~$Pointer$(12, 0, ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_probe.base, #funAddr~usb_acecad_probe.offset, ~#usb_acecad_driver~0.base, 8 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~usb_acecad_disconnect.base, #funAddr~usb_acecad_disconnect.offset, ~#usb_acecad_driver~0.base, 16 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 24 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 32 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 40 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 48 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 56 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 64 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(~#usb_acecad_id_table~0.base, ~#usb_acecad_id_table~0.offset, ~#usb_acecad_driver~0.base, 72 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 80 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 84 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 88 + ~#usb_acecad_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 92 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 100 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 108 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 116 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 124 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 132 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 136 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 144 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 152 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 160 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 168 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 176 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 184 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 192 + ~#usb_acecad_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 193 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 201 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 209 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 217 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 225 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 233 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 241 + ~#usb_acecad_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#usb_acecad_driver~0.base, 249 + ~#usb_acecad_driver~0.offset, 8);call write~init~int(0, ~#usb_acecad_driver~0.base, 257 + ~#usb_acecad_driver~0.offset, 4);call write~init~int(0, ~#usb_acecad_driver~0.base, 261 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 262 + ~#usb_acecad_driver~0.offset, 1);call write~init~int(0, ~#usb_acecad_driver~0.base, 263 + ~#usb_acecad_driver~0.offset, 1);~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~INTERF_STATE~0 := 0;~SERIAL_STATE~0 := 0;~usb_intfdata~0.base, ~usb_intfdata~0.offset := 0, 0;~usb_urb~0.base, ~usb_urb~0.offset := 0, 0;~usb_dev~0.base, ~usb_dev~0.offset := 0, 0;~dev_counter~0 := 0;~completeFnIntCounter~0 := 0;~completeFnBulkCounter~0 := 0;~completeFnInt~0.base, ~completeFnInt~0.offset := 0, 0;~completeFnBulk~0.base, ~completeFnBulk~0.offset := 0, 0; {64781#true} is VALID [2022-02-20 22:07:40,026 INFO L290 TraceCheckUtils]: 1: Hoare triple {64781#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret183#1.base, main_#t~ret183#1.offset, main_#t~nondet184#1, main_#t~switch185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~ret188#1, main_#t~nondet189#1, main_#t~switch190#1, main_#t~ret191#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~17#1.base, main_~tmp~17#1.offset, main_~tmp___0~6#1, main_~tmp___1~3#1, main_~tmp___2~1#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~17#1.base, main_~tmp~17#1.offset;havoc main_~tmp___0~6#1;havoc main_~tmp___1~3#1;havoc main_~tmp___2~1#1; {64781#true} is VALID [2022-02-20 22:07:40,026 INFO L272 TraceCheckUtils]: 2: Hoare triple {64781#true} call main_#t~ret183#1.base, main_#t~ret183#1.offset := ldv_init_zalloc(24); {64781#true} is VALID [2022-02-20 22:07:40,026 INFO L290 TraceCheckUtils]: 3: Hoare triple {64781#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {64781#true} is VALID [2022-02-20 22:07:40,026 INFO L272 TraceCheckUtils]: 4: Hoare triple {64781#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {64781#true} is VALID [2022-02-20 22:07:40,027 INFO L290 TraceCheckUtils]: 5: Hoare triple {64781#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {64781#true} is VALID [2022-02-20 22:07:40,027 INFO L290 TraceCheckUtils]: 6: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:40,027 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {64781#true} {64781#true} #538#return; {64781#true} is VALID [2022-02-20 22:07:40,027 INFO L290 TraceCheckUtils]: 8: Hoare triple {64781#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {64781#true} is VALID [2022-02-20 22:07:40,027 INFO L272 TraceCheckUtils]: 9: Hoare triple {64781#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {64781#true} is VALID [2022-02-20 22:07:40,027 INFO L290 TraceCheckUtils]: 10: Hoare triple {64781#true} ~cond := #in~cond; {64781#true} is VALID [2022-02-20 22:07:40,027 INFO L290 TraceCheckUtils]: 11: Hoare triple {64781#true} assume !(0 == ~cond); {64781#true} is VALID [2022-02-20 22:07:40,028 INFO L290 TraceCheckUtils]: 12: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:40,028 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {64781#true} {64781#true} #540#return; {64781#true} is VALID [2022-02-20 22:07:40,028 INFO L290 TraceCheckUtils]: 14: Hoare triple {64781#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {64781#true} is VALID [2022-02-20 22:07:40,028 INFO L290 TraceCheckUtils]: 15: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:40,028 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {64781#true} {64781#true} #544#return; {64781#true} is VALID [2022-02-20 22:07:40,028 INFO L290 TraceCheckUtils]: 17: Hoare triple {64781#true} main_~tmp~17#1.base, main_~tmp~17#1.offset := main_#t~ret183#1.base, main_#t~ret183#1.offset;havoc main_#t~ret183#1.base, main_#t~ret183#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~17#1.base, main_~tmp~17#1.offset;assume { :begin_inline_ldv_initialize } true; {64781#true} is VALID [2022-02-20 22:07:40,028 INFO L290 TraceCheckUtils]: 18: Hoare triple {64781#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1; {64781#true} is VALID [2022-02-20 22:07:40,029 INFO L290 TraceCheckUtils]: 19: Hoare triple {64781#true} assume -2147483648 <= main_#t~nondet184#1 && main_#t~nondet184#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet184#1;havoc main_#t~nondet184#1;main_#t~switch185#1 := 0 == main_~tmp___0~6#1; {64781#true} is VALID [2022-02-20 22:07:40,029 INFO L290 TraceCheckUtils]: 20: Hoare triple {64781#true} assume !main_#t~switch185#1;main_#t~switch185#1 := main_#t~switch185#1 || 1 == main_~tmp___0~6#1; {64781#true} is VALID [2022-02-20 22:07:40,029 INFO L290 TraceCheckUtils]: 21: Hoare triple {64781#true} assume main_#t~switch185#1; {64781#true} is VALID [2022-02-20 22:07:40,029 INFO L290 TraceCheckUtils]: 22: Hoare triple {64781#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet189#1 && main_#t~nondet189#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet189#1;havoc main_#t~nondet189#1;main_#t~switch190#1 := 0 == main_~tmp___2~1#1; {64781#true} is VALID [2022-02-20 22:07:40,029 INFO L290 TraceCheckUtils]: 23: Hoare triple {64781#true} assume !main_#t~switch190#1;main_#t~switch190#1 := main_#t~switch190#1 || 1 == main_~tmp___2~1#1; {64781#true} is VALID [2022-02-20 22:07:40,029 INFO L290 TraceCheckUtils]: 24: Hoare triple {64781#true} assume main_#t~switch190#1; {64781#true} is VALID [2022-02-20 22:07:40,029 INFO L290 TraceCheckUtils]: 25: Hoare triple {64781#true} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_usb_acecad_init } true;havoc usb_acecad_init_#res#1;havoc usb_acecad_init_#t~ret180#1, usb_acecad_init_#t~nondet181#1, usb_acecad_init_~result~0#1, usb_acecad_init_~tmp~15#1;havoc usb_acecad_init_~result~0#1;havoc usb_acecad_init_~tmp~15#1;assume { :begin_inline_usb_register } true;usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc usb_register_#res#1;havoc usb_register_#t~ret31#1, usb_register_~driver#1.base, usb_register_~driver#1.offset, usb_register_~tmp~1#1;usb_register_~driver#1.base, usb_register_~driver#1.offset := usb_register_#in~driver#1.base, usb_register_#in~driver#1.offset;havoc usb_register_~tmp~1#1;assume { :begin_inline_ldv_usb_register_driver_2 } true;ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset := usb_register_~driver#1.base, usb_register_~driver#1.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 4, 0;havoc ldv_usb_register_driver_2_#res#1;havoc ldv_usb_register_driver_2_#t~ret193#1, ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset, ldv_usb_register_driver_2_~ldv_func_res~0#1, ldv_usb_register_driver_2_~tmp~19#1;ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg1#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg1#1.offset;ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg2#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg2#1.offset;ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset := ldv_usb_register_driver_2_#in~ldv_func_arg3#1.base, ldv_usb_register_driver_2_#in~ldv_func_arg3#1.offset;havoc ldv_usb_register_driver_2_~ldv_func_res~0#1;havoc ldv_usb_register_driver_2_~tmp~19#1;assume { :begin_inline_usb_register_driver } true;usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset, usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset, usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset := ldv_usb_register_driver_2_~ldv_func_arg1#1.base, ldv_usb_register_driver_2_~ldv_func_arg1#1.offset, ldv_usb_register_driver_2_~ldv_func_arg2#1.base, ldv_usb_register_driver_2_~ldv_func_arg2#1.offset, ldv_usb_register_driver_2_~ldv_func_arg3#1.base, ldv_usb_register_driver_2_~ldv_func_arg3#1.offset;havoc usb_register_driver_#res#1;havoc usb_register_driver_#t~nondet213#1, usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset, usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset, usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset;usb_register_driver_~arg0#1.base, usb_register_driver_~arg0#1.offset := usb_register_driver_#in~arg0#1.base, usb_register_driver_#in~arg0#1.offset;usb_register_driver_~arg1#1.base, usb_register_driver_~arg1#1.offset := usb_register_driver_#in~arg1#1.base, usb_register_driver_#in~arg1#1.offset;usb_register_driver_~arg2#1.base, usb_register_driver_~arg2#1.offset := usb_register_driver_#in~arg2#1.base, usb_register_driver_#in~arg2#1.offset;assume -2147483648 <= usb_register_driver_#t~nondet213#1 && usb_register_driver_#t~nondet213#1 <= 2147483647;usb_register_driver_#res#1 := usb_register_driver_#t~nondet213#1;havoc usb_register_driver_#t~nondet213#1; {64781#true} is VALID [2022-02-20 22:07:40,030 INFO L290 TraceCheckUtils]: 26: Hoare triple {64781#true} ldv_usb_register_driver_2_#t~ret193#1 := usb_register_driver_#res#1;assume { :end_inline_usb_register_driver } true;assume -2147483648 <= ldv_usb_register_driver_2_#t~ret193#1 && ldv_usb_register_driver_2_#t~ret193#1 <= 2147483647;ldv_usb_register_driver_2_~tmp~19#1 := ldv_usb_register_driver_2_#t~ret193#1;havoc ldv_usb_register_driver_2_#t~ret193#1;ldv_usb_register_driver_2_~ldv_func_res~0#1 := ldv_usb_register_driver_2_~tmp~19#1;~ldv_state_variable_1~0 := 1;~usb_counter~0 := 0;assume { :begin_inline_ldv_usb_driver_1 } true;havoc ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset, ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset;havoc ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {64781#true} is VALID [2022-02-20 22:07:40,030 INFO L272 TraceCheckUtils]: 27: Hoare triple {64781#true} call ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset := ldv_init_zalloc(1248); {64781#true} is VALID [2022-02-20 22:07:40,030 INFO L290 TraceCheckUtils]: 28: Hoare triple {64781#true} ~size := #in~size;havoc ~p~2.base, ~p~2.offset;havoc ~tmp~6.base, ~tmp~6.offset;call #t~malloc63.base, #t~malloc63.offset := #Ultimate.allocOnHeap(~size); {64781#true} is VALID [2022-02-20 22:07:40,030 INFO L272 TraceCheckUtils]: 29: Hoare triple {64781#true} call #Ultimate.meminit(#t~malloc63.base, #t~malloc63.offset, 1, ~size, ~size); {64781#true} is VALID [2022-02-20 22:07:40,030 INFO L290 TraceCheckUtils]: 30: Hoare triple {64781#true} #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); {64781#true} is VALID [2022-02-20 22:07:40,030 INFO L290 TraceCheckUtils]: 31: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:40,030 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {64781#true} {64781#true} #538#return; {64781#true} is VALID [2022-02-20 22:07:40,030 INFO L290 TraceCheckUtils]: 33: Hoare triple {64781#true} ~tmp~6.base, ~tmp~6.offset := #t~malloc63.base, #t~malloc63.offset;~p~2.base, ~p~2.offset := ~tmp~6.base, ~tmp~6.offset; {64781#true} is VALID [2022-02-20 22:07:40,031 INFO L272 TraceCheckUtils]: 34: Hoare triple {64781#true} call assume_abort_if_not((if 0 != (~p~2.base + ~p~2.offset) % 18446744073709551616 then 1 else 0)); {64781#true} is VALID [2022-02-20 22:07:40,031 INFO L290 TraceCheckUtils]: 35: Hoare triple {64781#true} ~cond := #in~cond; {64781#true} is VALID [2022-02-20 22:07:40,031 INFO L290 TraceCheckUtils]: 36: Hoare triple {64781#true} assume !(0 == ~cond); {64781#true} is VALID [2022-02-20 22:07:40,031 INFO L290 TraceCheckUtils]: 37: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:40,031 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {64781#true} {64781#true} #540#return; {64781#true} is VALID [2022-02-20 22:07:40,031 INFO L290 TraceCheckUtils]: 39: Hoare triple {64781#true} #res.base, #res.offset := ~p~2.base, ~p~2.offset; {64781#true} is VALID [2022-02-20 22:07:40,031 INFO L290 TraceCheckUtils]: 40: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:40,032 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {64781#true} {64781#true} #600#return; {64781#true} is VALID [2022-02-20 22:07:40,032 INFO L290 TraceCheckUtils]: 42: Hoare triple {64781#true} ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset := ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset;havoc ldv_usb_driver_1_#t~ret182#1.base, ldv_usb_driver_1_#t~ret182#1.offset;~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset := ldv_usb_driver_1_~tmp~16#1.base, ldv_usb_driver_1_~tmp~16#1.offset; {64781#true} is VALID [2022-02-20 22:07:40,032 INFO L290 TraceCheckUtils]: 43: Hoare triple {64781#true} assume { :end_inline_ldv_usb_driver_1 } true;ldv_usb_register_driver_2_#res#1 := ldv_usb_register_driver_2_~ldv_func_res~0#1; {64781#true} is VALID [2022-02-20 22:07:40,032 INFO L290 TraceCheckUtils]: 44: Hoare triple {64781#true} usb_register_#t~ret31#1 := ldv_usb_register_driver_2_#res#1;assume { :end_inline_ldv_usb_register_driver_2 } true;assume -2147483648 <= usb_register_#t~ret31#1 && usb_register_#t~ret31#1 <= 2147483647;usb_register_~tmp~1#1 := usb_register_#t~ret31#1;havoc usb_register_#t~ret31#1;usb_register_#res#1 := usb_register_~tmp~1#1; {64781#true} is VALID [2022-02-20 22:07:40,032 INFO L290 TraceCheckUtils]: 45: Hoare triple {64781#true} usb_acecad_init_#t~ret180#1 := usb_register_#res#1;assume { :end_inline_usb_register } true;assume -2147483648 <= usb_acecad_init_#t~ret180#1 && usb_acecad_init_#t~ret180#1 <= 2147483647;usb_acecad_init_~tmp~15#1 := usb_acecad_init_#t~ret180#1;havoc usb_acecad_init_#t~ret180#1;usb_acecad_init_~result~0#1 := usb_acecad_init_~tmp~15#1; {64781#true} is VALID [2022-02-20 22:07:40,032 INFO L290 TraceCheckUtils]: 46: Hoare triple {64781#true} assume 0 == usb_acecad_init_~result~0#1;havoc usb_acecad_init_#t~nondet181#1; {64781#true} is VALID [2022-02-20 22:07:40,032 INFO L290 TraceCheckUtils]: 47: Hoare triple {64781#true} usb_acecad_init_#res#1 := usb_acecad_init_~result~0#1; {64781#true} is VALID [2022-02-20 22:07:40,032 INFO L290 TraceCheckUtils]: 48: Hoare triple {64781#true} main_#t~ret191#1 := usb_acecad_init_#res#1;assume { :end_inline_usb_acecad_init } true;assume -2147483648 <= main_#t~ret191#1 && main_#t~ret191#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret191#1;havoc main_#t~ret191#1; {64781#true} is VALID [2022-02-20 22:07:40,033 INFO L290 TraceCheckUtils]: 49: Hoare triple {64781#true} assume 0 == ~ldv_retval_1~0;~ldv_state_variable_0~0 := 3; {64781#true} is VALID [2022-02-20 22:07:40,033 INFO L290 TraceCheckUtils]: 50: Hoare triple {64781#true} assume !(0 != ~ldv_retval_1~0); {64781#true} is VALID [2022-02-20 22:07:40,033 INFO L290 TraceCheckUtils]: 51: Hoare triple {64781#true} assume -2147483648 <= main_#t~nondet184#1 && main_#t~nondet184#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet184#1;havoc main_#t~nondet184#1;main_#t~switch185#1 := 0 == main_~tmp___0~6#1; {64781#true} is VALID [2022-02-20 22:07:40,033 INFO L290 TraceCheckUtils]: 52: Hoare triple {64781#true} assume main_#t~switch185#1; {64781#true} is VALID [2022-02-20 22:07:40,033 INFO L290 TraceCheckUtils]: 53: Hoare triple {64781#true} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= main_#t~nondet186#1 && main_#t~nondet186#1 <= 2147483647;main_~tmp___1~3#1 := main_#t~nondet186#1;havoc main_#t~nondet186#1;main_#t~switch187#1 := 0 == main_~tmp___1~3#1; {64781#true} is VALID [2022-02-20 22:07:40,033 INFO L290 TraceCheckUtils]: 54: Hoare triple {64781#true} assume main_#t~switch187#1; {64781#true} is VALID [2022-02-20 22:07:40,033 INFO L290 TraceCheckUtils]: 55: Hoare triple {64781#true} assume 1 == ~ldv_state_variable_1~0;assume { :begin_inline_usb_acecad_probe } true;usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset, usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset := ~usb_acecad_driver_group1~0.base, ~usb_acecad_driver_group1~0.offset, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc usb_acecad_probe_#res#1;havoc usb_acecad_probe_#t~ret127#1.base, usb_acecad_probe_#t~ret127#1.offset, usb_acecad_probe_#t~mem128#1.base, usb_acecad_probe_#t~mem128#1.offset, usb_acecad_probe_#t~mem129#1, usb_acecad_probe_#t~mem130#1.base, usb_acecad_probe_#t~mem130#1.offset, usb_acecad_probe_#t~ret131#1, usb_acecad_probe_#t~mem132#1, usb_acecad_probe_#t~ret133#1, usb_acecad_probe_#t~ret134#1, usb_acecad_probe_#t~ret135#1.base, usb_acecad_probe_#t~ret135#1.offset, usb_acecad_probe_#t~ret136#1.base, usb_acecad_probe_#t~ret136#1.offset, usb_acecad_probe_#t~ret137#1.base, usb_acecad_probe_#t~ret137#1.offset, usb_acecad_probe_#t~mem138#1.base, usb_acecad_probe_#t~mem138#1.offset, usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset, usb_acecad_probe_#t~mem140#1.base, usb_acecad_probe_#t~mem140#1.offset, usb_acecad_probe_#t~mem141#1.base, usb_acecad_probe_#t~mem141#1.offset, usb_acecad_probe_#t~mem142#1.base, usb_acecad_probe_#t~mem142#1.offset, usb_acecad_probe_#t~ret143#1, usb_acecad_probe_#t~mem144#1.base, usb_acecad_probe_#t~mem144#1.offset, usb_acecad_probe_#t~mem145#1.base, usb_acecad_probe_#t~mem145#1.offset, usb_acecad_probe_#t~ret146#1, usb_acecad_probe_#t~mem147#1.base, usb_acecad_probe_#t~mem147#1.offset, usb_acecad_probe_#t~ret148#1, usb_acecad_probe_#t~ret149#1, usb_acecad_probe_#t~ret150#1, usb_acecad_probe_#t~mem151#1, usb_acecad_probe_#t~switch152#1, usb_acecad_probe_#t~nondet153#1, usb_acecad_probe_#t~nondet154#1, usb_acecad_probe_#t~mem155#1, usb_acecad_probe_#t~mem156#1, usb_acecad_probe_#t~nondet157#1, usb_acecad_probe_#t~nondet158#1, usb_acecad_probe_#t~mem159#1, usb_acecad_probe_#t~mem160#1, usb_acecad_probe_#t~mem161#1.base, usb_acecad_probe_#t~mem161#1.offset, usb_acecad_probe_#t~mem162#1.base, usb_acecad_probe_#t~mem162#1.offset, usb_acecad_probe_#t~ite163#1, usb_acecad_probe_#t~mem164#1, usb_acecad_probe_#t~mem165#1.base, usb_acecad_probe_#t~mem165#1.offset, usb_acecad_probe_#t~mem166#1, usb_acecad_probe_#t~mem167#1.base, usb_acecad_probe_#t~mem167#1.offset, usb_acecad_probe_#t~mem168#1.base, usb_acecad_probe_#t~mem168#1.offset, usb_acecad_probe_#t~mem169#1, usb_acecad_probe_#t~mem170#1.base, usb_acecad_probe_#t~mem170#1.offset, usb_acecad_probe_#t~ret171#1, usb_acecad_probe_#t~mem172#1.base, usb_acecad_probe_#t~mem172#1.offset, usb_acecad_probe_#t~mem173#1, usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset, usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset, usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset, usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset, usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset, usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset, usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset, usb_acecad_probe_~pipe~0#1, usb_acecad_probe_~maxp~0#1, usb_acecad_probe_~err~0#1, usb_acecad_probe_~tmp___0~5#1, usb_acecad_probe_~tmp___1~2#1, usb_acecad_probe_~tmp___2~0#1, usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset, usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~tmp___5~0#1, usb_acecad_probe_~tmp___6~0#1;usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset := usb_acecad_probe_#in~intf#1.base, usb_acecad_probe_#in~intf#1.offset;usb_acecad_probe_~id#1.base, usb_acecad_probe_~id#1.offset := usb_acecad_probe_#in~id#1.base, usb_acecad_probe_#in~id#1.offset;havoc usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset;havoc usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;havoc usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset;havoc usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset;havoc usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset;havoc usb_acecad_probe_~pipe~0#1;havoc usb_acecad_probe_~maxp~0#1;havoc usb_acecad_probe_~err~0#1;havoc usb_acecad_probe_~tmp___0~5#1;havoc usb_acecad_probe_~tmp___1~2#1;havoc usb_acecad_probe_~tmp___2~0#1;havoc usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;havoc usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset;havoc usb_acecad_probe_~tmp___5~0#1;havoc usb_acecad_probe_~tmp___6~0#1;assume { :begin_inline_interface_to_usbdev } true;interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset := usb_acecad_probe_~intf#1.base, usb_acecad_probe_~intf#1.offset;havoc interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;havoc interface_to_usbdev_#t~ret192#1.base, interface_to_usbdev_#t~ret192#1.offset, interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset, interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;interface_to_usbdev_~intf#1.base, interface_to_usbdev_~intf#1.offset := interface_to_usbdev_#in~intf#1.base, interface_to_usbdev_#in~intf#1.offset;havoc interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset;assume { :begin_inline_ldv_interface_to_usbdev } true;havoc ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;havoc ldv_interface_to_usbdev_#t~ret203#1.base, ldv_interface_to_usbdev_#t~ret203#1.offset, ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset, ldv_interface_to_usbdev_~tmp~26#1.base, ldv_interface_to_usbdev_~tmp~26#1.offset;havoc ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset;havoc ldv_interface_to_usbdev_~tmp~26#1.base, ldv_interface_to_usbdev_~tmp~26#1.offset; {64781#true} is VALID [2022-02-20 22:07:40,034 INFO L272 TraceCheckUtils]: 56: Hoare triple {64781#true} call ldv_interface_to_usbdev_#t~ret203#1.base, ldv_interface_to_usbdev_#t~ret203#1.offset := ldv_malloc(1822); {64781#true} is VALID [2022-02-20 22:07:40,034 INFO L290 TraceCheckUtils]: 57: Hoare triple {64781#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {64781#true} is VALID [2022-02-20 22:07:40,034 INFO L290 TraceCheckUtils]: 58: Hoare triple {64781#true} assume !(0 != ~tmp___0~2);call #t~malloc60.base, #t~malloc60.offset := #Ultimate.allocOnHeap(~size);~tmp~4.base, ~tmp~4.offset := #t~malloc60.base, #t~malloc60.offset;havoc #t~malloc60.base, #t~malloc60.offset;~p~0.base, ~p~0.offset := ~tmp~4.base, ~tmp~4.offset; {64781#true} is VALID [2022-02-20 22:07:40,034 INFO L272 TraceCheckUtils]: 59: Hoare triple {64781#true} call assume_abort_if_not((if 0 != (~p~0.base + ~p~0.offset) % 18446744073709551616 then 1 else 0)); {64781#true} is VALID [2022-02-20 22:07:40,034 INFO L290 TraceCheckUtils]: 60: Hoare triple {64781#true} ~cond := #in~cond; {64781#true} is VALID [2022-02-20 22:07:40,034 INFO L290 TraceCheckUtils]: 61: Hoare triple {64781#true} assume !(0 == ~cond); {64781#true} is VALID [2022-02-20 22:07:40,034 INFO L290 TraceCheckUtils]: 62: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:40,035 INFO L284 TraceCheckUtils]: 63: Hoare quadruple {64781#true} {64781#true} #542#return; {64781#true} is VALID [2022-02-20 22:07:40,035 INFO L290 TraceCheckUtils]: 64: Hoare triple {64781#true} #res.base, #res.offset := ~p~0.base, ~p~0.offset; {64781#true} is VALID [2022-02-20 22:07:40,035 INFO L290 TraceCheckUtils]: 65: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:40,035 INFO L284 TraceCheckUtils]: 66: Hoare quadruple {64781#true} {64781#true} #546#return; {64781#true} is VALID [2022-02-20 22:07:40,035 INFO L290 TraceCheckUtils]: 67: Hoare triple {64781#true} ldv_interface_to_usbdev_~tmp~26#1.base, ldv_interface_to_usbdev_~tmp~26#1.offset := ldv_interface_to_usbdev_#t~ret203#1.base, ldv_interface_to_usbdev_#t~ret203#1.offset;havoc ldv_interface_to_usbdev_#t~ret203#1.base, ldv_interface_to_usbdev_#t~ret203#1.offset;ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset := ldv_interface_to_usbdev_~tmp~26#1.base, ldv_interface_to_usbdev_~tmp~26#1.offset; {64781#true} is VALID [2022-02-20 22:07:40,035 INFO L290 TraceCheckUtils]: 68: Hoare triple {64781#true} assume !(0 == (ldv_interface_to_usbdev_~result~1#1.base + ldv_interface_to_usbdev_~result~1#1.offset) % 18446744073709551616); {64781#true} is VALID [2022-02-20 22:07:40,035 INFO L290 TraceCheckUtils]: 69: Hoare triple {64781#true} ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset := ldv_interface_to_usbdev_~result~1#1.base, ldv_interface_to_usbdev_~result~1#1.offset; {64781#true} is VALID [2022-02-20 22:07:40,036 INFO L290 TraceCheckUtils]: 70: Hoare triple {64781#true} interface_to_usbdev_#t~ret192#1.base, interface_to_usbdev_#t~ret192#1.offset := ldv_interface_to_usbdev_#res#1.base, ldv_interface_to_usbdev_#res#1.offset;assume { :end_inline_ldv_interface_to_usbdev } true;interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset := interface_to_usbdev_#t~ret192#1.base, interface_to_usbdev_#t~ret192#1.offset;havoc interface_to_usbdev_#t~ret192#1.base, interface_to_usbdev_#t~ret192#1.offset;interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset := interface_to_usbdev_~tmp~18#1.base, interface_to_usbdev_~tmp~18#1.offset; {64781#true} is VALID [2022-02-20 22:07:40,036 INFO L290 TraceCheckUtils]: 71: Hoare triple {64781#true} usb_acecad_probe_#t~ret127#1.base, usb_acecad_probe_#t~ret127#1.offset := interface_to_usbdev_#res#1.base, interface_to_usbdev_#res#1.offset;assume { :end_inline_interface_to_usbdev } true;usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset := usb_acecad_probe_#t~ret127#1.base, usb_acecad_probe_#t~ret127#1.offset;havoc usb_acecad_probe_#t~ret127#1.base, usb_acecad_probe_#t~ret127#1.offset;usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset := usb_acecad_probe_~tmp~13#1.base, usb_acecad_probe_~tmp~13#1.offset;call usb_acecad_probe_#t~mem128#1.base, usb_acecad_probe_#t~mem128#1.offset := read~$Pointer$(usb_acecad_probe_~intf#1.base, 8 + usb_acecad_probe_~intf#1.offset, 8);usb_acecad_probe_~interface~0#1.base, usb_acecad_probe_~interface~0#1.offset := usb_acecad_probe_#t~mem128#1.base, usb_acecad_probe_#t~mem128#1.offset;havoc usb_acecad_probe_#t~mem128#1.base, usb_acecad_probe_#t~mem128#1.offset;call usb_acecad_probe_#t~mem129#1 := read~int(usb_acecad_probe_~interface~0#1.base, 4 + usb_acecad_probe_~interface~0#1.offset, 1); {64781#true} is VALID [2022-02-20 22:07:40,036 INFO L290 TraceCheckUtils]: 72: Hoare triple {64781#true} assume !(1 != usb_acecad_probe_#t~mem129#1 % 256 % 4294967296);havoc usb_acecad_probe_#t~mem129#1;call usb_acecad_probe_#t~mem130#1.base, usb_acecad_probe_#t~mem130#1.offset := read~$Pointer$(usb_acecad_probe_~interface~0#1.base, 9 + usb_acecad_probe_~interface~0#1.offset, 8);usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset := usb_acecad_probe_#t~mem130#1.base, usb_acecad_probe_#t~mem130#1.offset;havoc usb_acecad_probe_#t~mem130#1.base, usb_acecad_probe_#t~mem130#1.offset;assume { :begin_inline_usb_endpoint_is_int_in } true;usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset := usb_acecad_probe_~endpoint~0#1.base, usb_acecad_probe_~endpoint~0#1.offset;havoc usb_endpoint_is_int_in_#res#1;havoc usb_endpoint_is_int_in_#t~ret3#1, usb_endpoint_is_int_in_#t~ret4#1, usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset, usb_endpoint_is_int_in_~tmp~0#1, usb_endpoint_is_int_in_~tmp___0~0#1, usb_endpoint_is_int_in_~tmp___1~0#1;usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset := usb_endpoint_is_int_in_#in~epd#1.base, usb_endpoint_is_int_in_#in~epd#1.offset;havoc usb_endpoint_is_int_in_~tmp~0#1;havoc usb_endpoint_is_int_in_~tmp___0~0#1;havoc usb_endpoint_is_int_in_~tmp___1~0#1;assume { :begin_inline_usb_endpoint_xfer_int } true;usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset := usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset;havoc usb_endpoint_xfer_int_#res#1;havoc usb_endpoint_xfer_int_#t~mem2#1, usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset;usb_endpoint_xfer_int_~epd#1.base, usb_endpoint_xfer_int_~epd#1.offset := usb_endpoint_xfer_int_#in~epd#1.base, usb_endpoint_xfer_int_#in~epd#1.offset;call usb_endpoint_xfer_int_#t~mem2#1 := read~int(usb_endpoint_xfer_int_~epd#1.base, 3 + usb_endpoint_xfer_int_~epd#1.offset, 1);usb_endpoint_xfer_int_#res#1 := (if 3 == (if 0 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 0 else (if 1 == usb_endpoint_xfer_int_#t~mem2#1 % 256 then 1 else ~bitwiseAnd(usb_endpoint_xfer_int_#t~mem2#1 % 256, 3))) then 1 else 0);havoc usb_endpoint_xfer_int_#t~mem2#1; {64781#true} is VALID [2022-02-20 22:07:40,036 INFO L290 TraceCheckUtils]: 73: Hoare triple {64781#true} usb_endpoint_is_int_in_#t~ret3#1 := usb_endpoint_xfer_int_#res#1;assume { :end_inline_usb_endpoint_xfer_int } true;assume -2147483648 <= usb_endpoint_is_int_in_#t~ret3#1 && usb_endpoint_is_int_in_#t~ret3#1 <= 2147483647;usb_endpoint_is_int_in_~tmp~0#1 := usb_endpoint_is_int_in_#t~ret3#1;havoc usb_endpoint_is_int_in_#t~ret3#1; {64781#true} is VALID [2022-02-20 22:07:40,036 INFO L290 TraceCheckUtils]: 74: Hoare triple {64781#true} assume 0 != usb_endpoint_is_int_in_~tmp~0#1;assume { :begin_inline_usb_endpoint_dir_in } true;usb_endpoint_dir_in_#in~epd#1.base, usb_endpoint_dir_in_#in~epd#1.offset := usb_endpoint_is_int_in_~epd#1.base, usb_endpoint_is_int_in_~epd#1.offset;havoc usb_endpoint_dir_in_#res#1;havoc usb_endpoint_dir_in_#t~mem1#1, usb_endpoint_dir_in_~epd#1.base, usb_endpoint_dir_in_~epd#1.offset;usb_endpoint_dir_in_~epd#1.base, usb_endpoint_dir_in_~epd#1.offset := usb_endpoint_dir_in_#in~epd#1.base, usb_endpoint_dir_in_#in~epd#1.offset;call usb_endpoint_dir_in_#t~mem1#1 := read~int(usb_endpoint_dir_in_~epd#1.base, 2 + usb_endpoint_dir_in_~epd#1.offset, 1);usb_endpoint_dir_in_#res#1 := (if (if usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 <= 127 then usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 else usb_endpoint_dir_in_#t~mem1#1 % 256 % 256 - 256) < 0 then 1 else 0);havoc usb_endpoint_dir_in_#t~mem1#1; {64781#true} is VALID [2022-02-20 22:07:40,036 INFO L290 TraceCheckUtils]: 75: Hoare triple {64781#true} usb_endpoint_is_int_in_#t~ret4#1 := usb_endpoint_dir_in_#res#1;assume { :end_inline_usb_endpoint_dir_in } true;assume -2147483648 <= usb_endpoint_is_int_in_#t~ret4#1 && usb_endpoint_is_int_in_#t~ret4#1 <= 2147483647;usb_endpoint_is_int_in_~tmp___0~0#1 := usb_endpoint_is_int_in_#t~ret4#1;havoc usb_endpoint_is_int_in_#t~ret4#1; {64781#true} is VALID [2022-02-20 22:07:40,036 INFO L290 TraceCheckUtils]: 76: Hoare triple {64781#true} assume 0 != usb_endpoint_is_int_in_~tmp___0~0#1;usb_endpoint_is_int_in_~tmp___1~0#1 := 1; {64781#true} is VALID [2022-02-20 22:07:40,037 INFO L290 TraceCheckUtils]: 77: Hoare triple {64781#true} usb_endpoint_is_int_in_#res#1 := usb_endpoint_is_int_in_~tmp___1~0#1; {64781#true} is VALID [2022-02-20 22:07:40,037 INFO L290 TraceCheckUtils]: 78: Hoare triple {64781#true} usb_acecad_probe_#t~ret131#1 := usb_endpoint_is_int_in_#res#1;assume { :end_inline_usb_endpoint_is_int_in } true;assume -2147483648 <= usb_acecad_probe_#t~ret131#1 && usb_acecad_probe_#t~ret131#1 <= 2147483647;usb_acecad_probe_~tmp___0~5#1 := usb_acecad_probe_#t~ret131#1;havoc usb_acecad_probe_#t~ret131#1; {64781#true} is VALID [2022-02-20 22:07:40,037 INFO L290 TraceCheckUtils]: 79: Hoare triple {64781#true} assume !(0 == usb_acecad_probe_~tmp___0~5#1);call usb_acecad_probe_#t~mem132#1 := read~int(usb_acecad_probe_~endpoint~0#1.base, 2 + usb_acecad_probe_~endpoint~0#1.offset, 1);assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_#t~mem132#1 % 256;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem42#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem42#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := (if (1 == 256 * __create_pipe_#t~mem42#1 || 0 == 256 * __create_pipe_#t~mem42#1) && 0 == 32768 * __create_pipe_~endpoint#1 then 256 * __create_pipe_#t~mem42#1 else (if 0 == 256 * __create_pipe_#t~mem42#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1) then 32768 * __create_pipe_~endpoint#1 else (if (1 == 256 * __create_pipe_#t~mem42#1 && (1 == 32768 * __create_pipe_~endpoint#1 || 0 == 32768 * __create_pipe_~endpoint#1)) || ((1 == 256 * __create_pipe_#t~mem42#1 || 0 == 256 * __create_pipe_#t~mem42#1) && 1 == 32768 * __create_pipe_~endpoint#1) then 1 else ~bitwiseOr(256 * __create_pipe_#t~mem42#1, 32768 * __create_pipe_~endpoint#1))));havoc __create_pipe_#t~mem42#1; {64781#true} is VALID [2022-02-20 22:07:40,037 INFO L290 TraceCheckUtils]: 80: Hoare triple {64781#true} usb_acecad_probe_#t~ret133#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;usb_acecad_probe_~tmp___1~2#1 := usb_acecad_probe_#t~ret133#1;havoc usb_acecad_probe_#t~mem132#1;havoc usb_acecad_probe_#t~ret133#1;usb_acecad_probe_~pipe~0#1 := (if ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 else ~bitwiseOr(usb_acecad_probe_~tmp___1~2#1, 1073741952) % 4294967296 % 4294967296 - 4294967296);assume { :begin_inline_usb_maxpacket } true;usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset, usb_maxpacket_#in~pipe#1, usb_maxpacket_#in~is_out#1 := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, usb_acecad_probe_~pipe~0#1, (if 0 == (if 0 == usb_acecad_probe_~pipe~0#1 then 0 else (if 1 == usb_acecad_probe_~pipe~0#1 then 0 else ~bitwiseAnd(usb_acecad_probe_~pipe~0#1, 128))) then 1 else 0);havoc usb_maxpacket_#res#1;havoc usb_maxpacket_#t~ret44#1, usb_maxpacket_#t~ret45#1, usb_maxpacket_#t~mem46#1.base, usb_maxpacket_#t~mem46#1.offset, usb_maxpacket_#t~ret47#1, usb_maxpacket_#t~ret48#1, usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset, usb_maxpacket_#t~mem50#1, usb_maxpacket_#t~nondet43#1, usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset, usb_maxpacket_~pipe#1, usb_maxpacket_~is_out#1, usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset, usb_maxpacket_~epnum~0#1, usb_maxpacket_~__ret_warn_on~0#1, usb_maxpacket_~tmp~2#1, usb_maxpacket_~__ret_warn_on___0~0#1, usb_maxpacket_~tmp___0~1#1;usb_maxpacket_~udev#1.base, usb_maxpacket_~udev#1.offset := usb_maxpacket_#in~udev#1.base, usb_maxpacket_#in~udev#1.offset;usb_maxpacket_~pipe#1 := usb_maxpacket_#in~pipe#1;usb_maxpacket_~is_out#1 := usb_maxpacket_#in~is_out#1;havoc usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset;havoc usb_maxpacket_~epnum~0#1;havoc usb_maxpacket_~__ret_warn_on~0#1;havoc usb_maxpacket_~tmp~2#1;havoc usb_maxpacket_~__ret_warn_on___0~0#1;havoc usb_maxpacket_~tmp___0~1#1; {64781#true} is VALID [2022-02-20 22:07:40,037 INFO L290 TraceCheckUtils]: 81: Hoare triple {64781#true} assume 0 == usb_maxpacket_~pipe#1 / 32768;usb_maxpacket_~epnum~0#1 := 0; {64781#true} is VALID [2022-02-20 22:07:40,037 INFO L290 TraceCheckUtils]: 82: Hoare triple {64781#true} assume !(0 != usb_maxpacket_~is_out#1);usb_maxpacket_~__ret_warn_on___0~0#1 := (if 0 == (if 0 == usb_maxpacket_~pipe#1 then 0 else (if 1 == usb_maxpacket_~pipe#1 then 0 else ~bitwiseAnd(usb_maxpacket_~pipe#1, 128))) then 1 else 0); {64781#true} is VALID [2022-02-20 22:07:40,037 INFO L272 TraceCheckUtils]: 83: Hoare triple {64781#true} call usb_maxpacket_#t~ret47#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {64781#true} is VALID [2022-02-20 22:07:40,038 INFO L290 TraceCheckUtils]: 84: Hoare triple {64781#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {64781#true} is VALID [2022-02-20 22:07:40,038 INFO L290 TraceCheckUtils]: 85: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:40,038 INFO L284 TraceCheckUtils]: 86: Hoare quadruple {64781#true} {64781#true} #556#return; {64781#true} is VALID [2022-02-20 22:07:40,038 INFO L290 TraceCheckUtils]: 87: Hoare triple {64781#true} assume -9223372036854775808 <= usb_maxpacket_#t~ret47#1 && usb_maxpacket_#t~ret47#1 <= 9223372036854775807;usb_maxpacket_~tmp___0~1#1 := usb_maxpacket_#t~ret47#1;havoc usb_maxpacket_#t~ret47#1; {64781#true} is VALID [2022-02-20 22:07:40,038 INFO L290 TraceCheckUtils]: 88: Hoare triple {64781#true} assume !(0 != usb_maxpacket_~tmp___0~1#1); {64781#true} is VALID [2022-02-20 22:07:40,038 INFO L272 TraceCheckUtils]: 89: Hoare triple {64781#true} call usb_maxpacket_#t~ret48#1 := ldv__builtin_expect((if 0 != usb_maxpacket_~__ret_warn_on___0~0#1 then 1 else 0), 0); {64781#true} is VALID [2022-02-20 22:07:40,038 INFO L290 TraceCheckUtils]: 90: Hoare triple {64781#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {64781#true} is VALID [2022-02-20 22:07:40,039 INFO L290 TraceCheckUtils]: 91: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:40,039 INFO L284 TraceCheckUtils]: 92: Hoare quadruple {64781#true} {64781#true} #560#return; {64781#true} is VALID [2022-02-20 22:07:40,039 INFO L290 TraceCheckUtils]: 93: Hoare triple {64781#true} assume -9223372036854775808 <= usb_maxpacket_#t~ret48#1 && usb_maxpacket_#t~ret48#1 <= 9223372036854775807;havoc usb_maxpacket_#t~ret48#1;call usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset := read~$Pointer$(usb_maxpacket_~udev#1.base, 1186 + usb_maxpacket_~udev#1.offset + 8 * (usb_maxpacket_~epnum~0#1 % 4294967296), 8);usb_maxpacket_~ep~0#1.base, usb_maxpacket_~ep~0#1.offset := usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset;havoc usb_maxpacket_#t~mem49#1.base, usb_maxpacket_#t~mem49#1.offset; {64781#true} is VALID [2022-02-20 22:07:40,039 INFO L290 TraceCheckUtils]: 94: Hoare triple {64781#true} assume 0 == (usb_maxpacket_~ep~0#1.base + usb_maxpacket_~ep~0#1.offset) % 18446744073709551616;usb_maxpacket_#res#1 := 0; {64781#true} is VALID [2022-02-20 22:07:40,039 INFO L290 TraceCheckUtils]: 95: Hoare triple {64781#true} usb_acecad_probe_#t~ret134#1 := usb_maxpacket_#res#1;assume { :end_inline_usb_maxpacket } true;usb_acecad_probe_~tmp___2~0#1 := usb_acecad_probe_#t~ret134#1;havoc usb_acecad_probe_#t~ret134#1;usb_acecad_probe_~maxp~0#1 := usb_acecad_probe_~tmp___2~0#1 % 65536; {64781#true} is VALID [2022-02-20 22:07:40,039 INFO L272 TraceCheckUtils]: 96: Hoare triple {64781#true} call usb_acecad_probe_#t~ret135#1.base, usb_acecad_probe_#t~ret135#1.offset := kzalloc(232, 208); {64781#true} is VALID [2022-02-20 22:07:40,039 INFO L290 TraceCheckUtils]: 97: Hoare triple {64781#true} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {64781#true} is VALID [2022-02-20 22:07:40,039 INFO L272 TraceCheckUtils]: 98: Hoare triple {64781#true} call __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset := ldv_malloc(__kmalloc_~size#1); {64781#true} is VALID [2022-02-20 22:07:40,040 INFO L290 TraceCheckUtils]: 99: Hoare triple {64781#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {64781#true} is VALID [2022-02-20 22:07:40,040 INFO L290 TraceCheckUtils]: 100: Hoare triple {64781#true} assume !(0 != ~tmp___0~2);call #t~malloc60.base, #t~malloc60.offset := #Ultimate.allocOnHeap(~size);~tmp~4.base, ~tmp~4.offset := #t~malloc60.base, #t~malloc60.offset;havoc #t~malloc60.base, #t~malloc60.offset;~p~0.base, ~p~0.offset := ~tmp~4.base, ~tmp~4.offset; {64781#true} is VALID [2022-02-20 22:07:40,040 INFO L272 TraceCheckUtils]: 101: Hoare triple {64781#true} call assume_abort_if_not((if 0 != (~p~0.base + ~p~0.offset) % 18446744073709551616 then 1 else 0)); {64781#true} is VALID [2022-02-20 22:07:40,040 INFO L290 TraceCheckUtils]: 102: Hoare triple {64781#true} ~cond := #in~cond; {64781#true} is VALID [2022-02-20 22:07:40,040 INFO L290 TraceCheckUtils]: 103: Hoare triple {64781#true} assume !(0 == ~cond); {64781#true} is VALID [2022-02-20 22:07:40,040 INFO L290 TraceCheckUtils]: 104: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:40,040 INFO L284 TraceCheckUtils]: 105: Hoare quadruple {64781#true} {64781#true} #542#return; {64781#true} is VALID [2022-02-20 22:07:40,041 INFO L290 TraceCheckUtils]: 106: Hoare triple {64781#true} #res.base, #res.offset := ~p~0.base, ~p~0.offset; {64781#true} is VALID [2022-02-20 22:07:40,041 INFO L290 TraceCheckUtils]: 107: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:40,041 INFO L284 TraceCheckUtils]: 108: Hoare quadruple {64781#true} {64781#true} #530#return; {64781#true} is VALID [2022-02-20 22:07:40,041 INFO L290 TraceCheckUtils]: 109: Hoare triple {64781#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset; {64781#true} is VALID [2022-02-20 22:07:40,041 INFO L290 TraceCheckUtils]: 110: Hoare triple {64781#true} kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {64781#true} is VALID [2022-02-20 22:07:40,041 INFO L290 TraceCheckUtils]: 111: Hoare triple {64781#true} #t~ret55#1.base, #t~ret55#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret55#1.base, #t~ret55#1.offset;havoc #t~ret55#1.base, #t~ret55#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {64781#true} is VALID [2022-02-20 22:07:40,041 INFO L290 TraceCheckUtils]: 112: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:40,041 INFO L284 TraceCheckUtils]: 113: Hoare quadruple {64781#true} {64781#true} #562#return; {64781#true} is VALID [2022-02-20 22:07:40,042 INFO L290 TraceCheckUtils]: 114: Hoare triple {64781#true} usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset := usb_acecad_probe_#t~ret135#1.base, usb_acecad_probe_#t~ret135#1.offset;havoc usb_acecad_probe_#t~ret135#1.base, usb_acecad_probe_#t~ret135#1.offset;usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset := usb_acecad_probe_~tmp___3~0#1.base, usb_acecad_probe_~tmp___3~0#1.offset;assume { :begin_inline_input_allocate_device } true;havoc input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;havoc input_allocate_device_#t~ret67#1.base, input_allocate_device_#t~ret67#1.offset; {64781#true} is VALID [2022-02-20 22:07:40,042 INFO L272 TraceCheckUtils]: 115: Hoare triple {64781#true} call input_allocate_device_#t~ret67#1.base, input_allocate_device_#t~ret67#1.offset := kzalloc(1855, ~bitwiseOr(~bitwiseOr(16, 64), 128)); {64781#true} is VALID [2022-02-20 22:07:40,042 INFO L290 TraceCheckUtils]: 116: Hoare triple {64781#true} ~size#1 := #in~size#1;~flags#1 := #in~flags#1;havoc ~tmp~3#1.base, ~tmp~3#1.offset;assume { :begin_inline_kmalloc } true;kmalloc_#in~size#1, kmalloc_#in~flags#1 := ~size#1, ~bitwiseOr(~flags#1, 32768);havoc kmalloc_#res#1.base, kmalloc_#res#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset, kmalloc_~size#1, kmalloc_~flags#1, kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;kmalloc_~size#1 := kmalloc_#in~size#1;kmalloc_~flags#1 := kmalloc_#in~flags#1;havoc kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset;assume { :begin_inline___kmalloc } true;__kmalloc_#in~size#1, __kmalloc_#in~t#1 := kmalloc_~size#1, kmalloc_~flags#1;havoc __kmalloc_#res#1.base, __kmalloc_#res#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset, __kmalloc_~size#1, __kmalloc_~t#1;__kmalloc_~size#1 := __kmalloc_#in~size#1;__kmalloc_~t#1 := __kmalloc_#in~t#1; {64781#true} is VALID [2022-02-20 22:07:40,042 INFO L272 TraceCheckUtils]: 117: Hoare triple {64781#true} call __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset := ldv_malloc(__kmalloc_~size#1); {64781#true} is VALID [2022-02-20 22:07:40,042 INFO L290 TraceCheckUtils]: 118: Hoare triple {64781#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {64781#true} is VALID [2022-02-20 22:07:40,042 INFO L290 TraceCheckUtils]: 119: Hoare triple {64781#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {64781#true} is VALID [2022-02-20 22:07:40,042 INFO L290 TraceCheckUtils]: 120: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:40,043 INFO L284 TraceCheckUtils]: 121: Hoare quadruple {64781#true} {64781#true} #530#return; {64781#true} is VALID [2022-02-20 22:07:40,043 INFO L290 TraceCheckUtils]: 122: Hoare triple {64781#true} __kmalloc_#res#1.base, __kmalloc_#res#1.offset := __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset;havoc __kmalloc_#t~ret53#1.base, __kmalloc_#t~ret53#1.offset; {64781#true} is VALID [2022-02-20 22:07:40,043 INFO L290 TraceCheckUtils]: 123: Hoare triple {64781#true} kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset := __kmalloc_#res#1.base, __kmalloc_#res#1.offset;assume { :end_inline___kmalloc } true;kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset := kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;havoc kmalloc_#t~ret54#1.base, kmalloc_#t~ret54#1.offset;kmalloc_#res#1.base, kmalloc_#res#1.offset := kmalloc_~tmp___1~1#1.base, kmalloc_~tmp___1~1#1.offset; {64781#true} is VALID [2022-02-20 22:07:40,043 INFO L290 TraceCheckUtils]: 124: Hoare triple {64781#true} #t~ret55#1.base, #t~ret55#1.offset := kmalloc_#res#1.base, kmalloc_#res#1.offset;assume { :end_inline_kmalloc } true;~tmp~3#1.base, ~tmp~3#1.offset := #t~ret55#1.base, #t~ret55#1.offset;havoc #t~ret55#1.base, #t~ret55#1.offset;#res#1.base, #res#1.offset := ~tmp~3#1.base, ~tmp~3#1.offset; {64781#true} is VALID [2022-02-20 22:07:40,043 INFO L290 TraceCheckUtils]: 125: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:40,043 INFO L284 TraceCheckUtils]: 126: Hoare quadruple {64781#true} {64781#true} #564#return; {64781#true} is VALID [2022-02-20 22:07:40,043 INFO L290 TraceCheckUtils]: 127: Hoare triple {64781#true} input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset := input_allocate_device_#t~ret67#1.base, input_allocate_device_#t~ret67#1.offset;havoc input_allocate_device_#t~ret67#1.base, input_allocate_device_#t~ret67#1.offset; {64781#true} is VALID [2022-02-20 22:07:40,051 INFO L290 TraceCheckUtils]: 128: Hoare triple {64781#true} usb_acecad_probe_#t~ret136#1.base, usb_acecad_probe_#t~ret136#1.offset := input_allocate_device_#res#1.base, input_allocate_device_#res#1.offset;assume { :end_inline_input_allocate_device } true;usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset := usb_acecad_probe_#t~ret136#1.base, usb_acecad_probe_#t~ret136#1.offset;havoc usb_acecad_probe_#t~ret136#1.base, usb_acecad_probe_#t~ret136#1.offset; {64781#true} is VALID [2022-02-20 22:07:40,052 INFO L290 TraceCheckUtils]: 129: Hoare triple {64781#true} assume !(0 == (usb_acecad_probe_~acecad~3#1.base + usb_acecad_probe_~acecad~3#1.offset) % 18446744073709551616 || 0 == (usb_acecad_probe_~input_dev~0#1.base + usb_acecad_probe_~input_dev~0#1.offset) % 18446744073709551616);assume { :begin_inline_usb_alloc_coherent } true;usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset, usb_alloc_coherent_#in~arg1#1, usb_alloc_coherent_#in~arg2#1, usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset := usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, 8, 208, usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset;havoc usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;havoc usb_alloc_coherent_#t~ret212#1.base, usb_alloc_coherent_#t~ret212#1.offset, usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset, usb_alloc_coherent_~arg1#1, usb_alloc_coherent_~arg2#1, usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset;usb_alloc_coherent_~arg0#1.base, usb_alloc_coherent_~arg0#1.offset := usb_alloc_coherent_#in~arg0#1.base, usb_alloc_coherent_#in~arg0#1.offset;usb_alloc_coherent_~arg1#1 := usb_alloc_coherent_#in~arg1#1;usb_alloc_coherent_~arg2#1 := usb_alloc_coherent_#in~arg2#1;usb_alloc_coherent_~arg3#1.base, usb_alloc_coherent_~arg3#1.offset := usb_alloc_coherent_#in~arg3#1.base, usb_alloc_coherent_#in~arg3#1.offset; {64781#true} is VALID [2022-02-20 22:07:40,052 INFO L272 TraceCheckUtils]: 130: Hoare triple {64781#true} call usb_alloc_coherent_#t~ret212#1.base, usb_alloc_coherent_#t~ret212#1.offset := ldv_malloc(0); {64781#true} is VALID [2022-02-20 22:07:40,052 INFO L290 TraceCheckUtils]: 131: Hoare triple {64781#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {64781#true} is VALID [2022-02-20 22:07:40,052 INFO L290 TraceCheckUtils]: 132: Hoare triple {64781#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {64781#true} is VALID [2022-02-20 22:07:40,053 INFO L290 TraceCheckUtils]: 133: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:40,053 INFO L284 TraceCheckUtils]: 134: Hoare quadruple {64781#true} {64781#true} #566#return; {64781#true} is VALID [2022-02-20 22:07:40,053 INFO L290 TraceCheckUtils]: 135: Hoare triple {64781#true} usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset := usb_alloc_coherent_#t~ret212#1.base, usb_alloc_coherent_#t~ret212#1.offset;havoc usb_alloc_coherent_#t~ret212#1.base, usb_alloc_coherent_#t~ret212#1.offset; {64781#true} is VALID [2022-02-20 22:07:40,053 INFO L290 TraceCheckUtils]: 136: Hoare triple {64781#true} usb_acecad_probe_#t~ret137#1.base, usb_acecad_probe_#t~ret137#1.offset := usb_alloc_coherent_#res#1.base, usb_alloc_coherent_#res#1.offset;assume { :end_inline_usb_alloc_coherent } true;usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset := usb_acecad_probe_#t~ret137#1.base, usb_acecad_probe_#t~ret137#1.offset;havoc usb_acecad_probe_#t~ret137#1.base, usb_acecad_probe_#t~ret137#1.offset;call write~$Pointer$(usb_acecad_probe_~tmp___4~0#1.base, usb_acecad_probe_~tmp___4~0#1.offset, usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem138#1.base, usb_acecad_probe_#t~mem138#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8); {64781#true} is VALID [2022-02-20 22:07:40,053 INFO L290 TraceCheckUtils]: 137: Hoare triple {64781#true} assume !(0 == (usb_acecad_probe_#t~mem138#1.base + usb_acecad_probe_#t~mem138#1.offset) % 18446744073709551616);havoc usb_acecad_probe_#t~mem138#1.base, usb_acecad_probe_#t~mem138#1.offset;assume { :begin_inline_ldv_usb_alloc_urb_5 } true;ldv_usb_alloc_urb_5_#in~iso_packets#1, ldv_usb_alloc_urb_5_#in~mem_flags#1 := 0, 208;havoc ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret196#1.base, ldv_usb_alloc_urb_5_#t~ret196#1.offset, ldv_usb_alloc_urb_5_~iso_packets#1, ldv_usb_alloc_urb_5_~mem_flags#1, ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;ldv_usb_alloc_urb_5_~iso_packets#1 := ldv_usb_alloc_urb_5_#in~iso_packets#1;ldv_usb_alloc_urb_5_~mem_flags#1 := ldv_usb_alloc_urb_5_#in~mem_flags#1;havoc ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset;assume { :begin_inline_ldv_alloc_urb } true;havoc ldv_alloc_urb_#res#1.base, ldv_alloc_urb_#res#1.offset;havoc ldv_alloc_urb_#t~ret198#1.base, ldv_alloc_urb_#t~ret198#1.offset, ldv_alloc_urb_#t~ret199#1, ldv_alloc_urb_~value~0#1.base, ldv_alloc_urb_~value~0#1.offset, ldv_alloc_urb_~tmp~24#1.base, ldv_alloc_urb_~tmp~24#1.offset, ldv_alloc_urb_~tmp___0~7#1;havoc ldv_alloc_urb_~value~0#1.base, ldv_alloc_urb_~value~0#1.offset;havoc ldv_alloc_urb_~tmp~24#1.base, ldv_alloc_urb_~tmp~24#1.offset;havoc ldv_alloc_urb_~tmp___0~7#1; {64781#true} is VALID [2022-02-20 22:07:40,053 INFO L272 TraceCheckUtils]: 138: Hoare triple {64781#true} call ldv_alloc_urb_#t~ret198#1.base, ldv_alloc_urb_#t~ret198#1.offset := ldv_malloc(180); {64781#true} is VALID [2022-02-20 22:07:40,054 INFO L290 TraceCheckUtils]: 139: Hoare triple {64781#true} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~2;assume -2147483648 <= #t~nondet59 && #t~nondet59 <= 2147483647;~tmp___0~2 := #t~nondet59;havoc #t~nondet59; {64781#true} is VALID [2022-02-20 22:07:40,054 INFO L290 TraceCheckUtils]: 140: Hoare triple {64781#true} assume 0 != ~tmp___0~2;#res.base, #res.offset := 0, 0; {64781#true} is VALID [2022-02-20 22:07:40,054 INFO L290 TraceCheckUtils]: 141: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:40,054 INFO L284 TraceCheckUtils]: 142: Hoare quadruple {64781#true} {64781#true} #568#return; {64781#true} is VALID [2022-02-20 22:07:40,054 INFO L290 TraceCheckUtils]: 143: Hoare triple {64781#true} ldv_alloc_urb_~tmp~24#1.base, ldv_alloc_urb_~tmp~24#1.offset := ldv_alloc_urb_#t~ret198#1.base, ldv_alloc_urb_#t~ret198#1.offset;havoc ldv_alloc_urb_#t~ret198#1.base, ldv_alloc_urb_#t~ret198#1.offset;ldv_alloc_urb_~value~0#1.base, ldv_alloc_urb_~value~0#1.offset := ldv_alloc_urb_~tmp~24#1.base, ldv_alloc_urb_~tmp~24#1.offset; {64781#true} is VALID [2022-02-20 22:07:40,054 INFO L272 TraceCheckUtils]: 144: Hoare triple {64781#true} call ldv_alloc_urb_#t~ret199#1 := ldv_undef_int(); {64781#true} is VALID [2022-02-20 22:07:40,054 INFO L290 TraceCheckUtils]: 145: Hoare triple {64781#true} havoc ~tmp~8;assume -2147483648 <= #t~nondet65 && #t~nondet65 <= 2147483647;~tmp~8 := #t~nondet65;havoc #t~nondet65;#res := ~tmp~8; {64781#true} is VALID [2022-02-20 22:07:40,054 INFO L290 TraceCheckUtils]: 146: Hoare triple {64781#true} assume true; {64781#true} is VALID [2022-02-20 22:07:40,055 INFO L284 TraceCheckUtils]: 147: Hoare quadruple {64781#true} {64781#true} #570#return; {64781#true} is VALID [2022-02-20 22:07:40,055 INFO L290 TraceCheckUtils]: 148: Hoare triple {64781#true} assume -2147483648 <= ldv_alloc_urb_#t~ret199#1 && ldv_alloc_urb_#t~ret199#1 <= 2147483647;ldv_alloc_urb_~tmp___0~7#1 := ldv_alloc_urb_#t~ret199#1;havoc ldv_alloc_urb_#t~ret199#1; {64781#true} is VALID [2022-02-20 22:07:40,055 INFO L290 TraceCheckUtils]: 149: Hoare triple {64781#true} assume 0 != ldv_alloc_urb_~tmp___0~7#1; {64781#true} is VALID [2022-02-20 22:07:40,056 INFO L290 TraceCheckUtils]: 150: Hoare triple {64781#true} assume 0 != (ldv_alloc_urb_~value~0#1.base + ldv_alloc_urb_~value~0#1.offset) % 18446744073709551616;~usb_urb~0.base, ~usb_urb~0.offset := ldv_alloc_urb_~value~0#1.base, ldv_alloc_urb_~value~0#1.offset; {65373#(not (= (mod (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616) 0))} is VALID [2022-02-20 22:07:40,056 INFO L290 TraceCheckUtils]: 151: Hoare triple {65373#(not (= (mod (+ ~usb_urb~0.base ~usb_urb~0.offset) 18446744073709551616) 0))} ldv_alloc_urb_#res#1.base, ldv_alloc_urb_#res#1.offset := ~usb_urb~0.base, ~usb_urb~0.offset; {65377#(not (= (mod (+ |ULTIMATE.start_ldv_alloc_urb_#res#1.offset| |ULTIMATE.start_ldv_alloc_urb_#res#1.base|) 18446744073709551616) 0))} is VALID [2022-02-20 22:07:40,057 INFO L290 TraceCheckUtils]: 152: Hoare triple {65377#(not (= (mod (+ |ULTIMATE.start_ldv_alloc_urb_#res#1.offset| |ULTIMATE.start_ldv_alloc_urb_#res#1.base|) 18446744073709551616) 0))} ldv_usb_alloc_urb_5_#t~ret196#1.base, ldv_usb_alloc_urb_5_#t~ret196#1.offset := ldv_alloc_urb_#res#1.base, ldv_alloc_urb_#res#1.offset;assume { :end_inline_ldv_alloc_urb } true;ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset := ldv_usb_alloc_urb_5_#t~ret196#1.base, ldv_usb_alloc_urb_5_#t~ret196#1.offset;havoc ldv_usb_alloc_urb_5_#t~ret196#1.base, ldv_usb_alloc_urb_5_#t~ret196#1.offset;ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset := ldv_usb_alloc_urb_5_~tmp~22#1.base, ldv_usb_alloc_urb_5_~tmp~22#1.offset; {65381#(not (= (mod (+ |ULTIMATE.start_ldv_usb_alloc_urb_5_#res#1.base| |ULTIMATE.start_ldv_usb_alloc_urb_5_#res#1.offset|) 18446744073709551616) 0))} is VALID [2022-02-20 22:07:40,059 INFO L290 TraceCheckUtils]: 153: Hoare triple {65381#(not (= (mod (+ |ULTIMATE.start_ldv_usb_alloc_urb_5_#res#1.base| |ULTIMATE.start_ldv_usb_alloc_urb_5_#res#1.offset|) 18446744073709551616) 0))} usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset := ldv_usb_alloc_urb_5_#res#1.base, ldv_usb_alloc_urb_5_#res#1.offset;assume { :end_inline_ldv_usb_alloc_urb_5 } true;call write~$Pointer$(usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset, usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8);havoc usb_acecad_probe_#t~ret139#1.base, usb_acecad_probe_#t~ret139#1.offset;call usb_acecad_probe_#t~mem140#1.base, usb_acecad_probe_#t~mem140#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 208 + usb_acecad_probe_~acecad~3#1.offset, 8); {65385#(not (= (mod (+ |ULTIMATE.start_usb_acecad_probe_#t~mem140#1.base| |ULTIMATE.start_usb_acecad_probe_#t~mem140#1.offset|) 18446744073709551616) 0))} is VALID [2022-02-20 22:07:40,059 INFO L290 TraceCheckUtils]: 154: Hoare triple {65385#(not (= (mod (+ |ULTIMATE.start_usb_acecad_probe_#t~mem140#1.base| |ULTIMATE.start_usb_acecad_probe_#t~mem140#1.offset|) 18446744073709551616) 0))} assume 0 == (usb_acecad_probe_#t~mem140#1.base + usb_acecad_probe_#t~mem140#1.offset) % 18446744073709551616;havoc usb_acecad_probe_#t~mem140#1.base, usb_acecad_probe_#t~mem140#1.offset;usb_acecad_probe_~err~0#1 := -12; {64782#false} is VALID [2022-02-20 22:07:40,059 INFO L290 TraceCheckUtils]: 155: Hoare triple {64782#false} call usb_acecad_probe_#t~mem172#1.base, usb_acecad_probe_#t~mem172#1.offset := read~$Pointer$(usb_acecad_probe_~acecad~3#1.base, 216 + usb_acecad_probe_~acecad~3#1.offset, 8);call usb_acecad_probe_#t~mem173#1 := read~int(usb_acecad_probe_~acecad~3#1.base, 224 + usb_acecad_probe_~acecad~3#1.offset, 8); {64782#false} is VALID [2022-02-20 22:07:40,059 INFO L272 TraceCheckUtils]: 156: Hoare triple {64782#false} call usb_free_coherent(usb_acecad_probe_~dev~1#1.base, usb_acecad_probe_~dev~1#1.offset, 8, usb_acecad_probe_#t~mem172#1.base, usb_acecad_probe_#t~mem172#1.offset, usb_acecad_probe_#t~mem173#1); {64782#false} is VALID [2022-02-20 22:07:40,059 INFO L290 TraceCheckUtils]: 157: Hoare triple {64782#false} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;~arg1 := #in~arg1;~arg2.base, ~arg2.offset := #in~arg2.base, #in~arg2.offset;~arg3 := #in~arg3; {64782#false} is VALID [2022-02-20 22:07:40,059 INFO L290 TraceCheckUtils]: 158: Hoare triple {64782#false} assume true; {64782#false} is VALID [2022-02-20 22:07:40,060 INFO L284 TraceCheckUtils]: 159: Hoare quadruple {64782#false} {64782#false} #592#return; {64782#false} is VALID [2022-02-20 22:07:40,060 INFO L290 TraceCheckUtils]: 160: Hoare triple {64782#false} havoc usb_acecad_probe_#t~mem172#1.base, usb_acecad_probe_#t~mem172#1.offset;havoc usb_acecad_probe_#t~mem173#1; {64782#false} is VALID [2022-02-20 22:07:40,060 INFO L290 TraceCheckUtils]: 161: Hoare triple {64782#false} assume { :begin_inline_input_free_device } true;input_free_device_#in~arg0#1.base, input_free_device_#in~arg0#1.offset := usb_acecad_probe_~input_dev~0#1.base, usb_acecad_probe_~input_dev~0#1.offset;havoc input_free_device_~arg0#1.base, input_free_device_~arg0#1.offset;input_free_device_~arg0#1.base, input_free_device_~arg0#1.offset := input_free_device_#in~arg0#1.base, input_free_device_#in~arg0#1.offset; {64782#false} is VALID [2022-02-20 22:07:40,060 INFO L290 TraceCheckUtils]: 162: Hoare triple {64782#false} assume { :end_inline_input_free_device } true; {64782#false} is VALID [2022-02-20 22:07:40,060 INFO L272 TraceCheckUtils]: 163: Hoare triple {64782#false} call kfree(usb_acecad_probe_~acecad~3#1.base, usb_acecad_probe_~acecad~3#1.offset); {64782#false} is VALID [2022-02-20 22:07:40,060 INFO L290 TraceCheckUtils]: 164: Hoare triple {64782#false} ~p.base, ~p.offset := #in~p.base, #in~p.offset;call ULTIMATE.dealloc(~p.base, ~p.offset); {64782#false} is VALID [2022-02-20 22:07:40,060 INFO L290 TraceCheckUtils]: 165: Hoare triple {64782#false} assume true; {64782#false} is VALID [2022-02-20 22:07:40,061 INFO L284 TraceCheckUtils]: 166: Hoare quadruple {64782#false} {64782#false} #594#return; {64782#false} is VALID [2022-02-20 22:07:40,061 INFO L290 TraceCheckUtils]: 167: Hoare triple {64782#false} usb_acecad_probe_#res#1 := usb_acecad_probe_~err~0#1; {64782#false} is VALID [2022-02-20 22:07:40,061 INFO L290 TraceCheckUtils]: 168: Hoare triple {64782#false} main_#t~ret188#1 := usb_acecad_probe_#res#1;assume { :end_inline_usb_acecad_probe } true;assume -2147483648 <= main_#t~ret188#1 && main_#t~ret188#1 <= 2147483647;~ldv_retval_0~0 := main_#t~ret188#1;havoc main_#t~ret188#1; {64782#false} is VALID [2022-02-20 22:07:40,061 INFO L290 TraceCheckUtils]: 169: Hoare triple {64782#false} assume !(0 == ~ldv_retval_0~0); {64782#false} is VALID [2022-02-20 22:07:40,061 INFO L290 TraceCheckUtils]: 170: Hoare triple {64782#false} assume -2147483648 <= main_#t~nondet184#1 && main_#t~nondet184#1 <= 2147483647;main_~tmp___0~6#1 := main_#t~nondet184#1;havoc main_#t~nondet184#1;main_#t~switch185#1 := 0 == main_~tmp___0~6#1; {64782#false} is VALID [2022-02-20 22:07:40,061 INFO L290 TraceCheckUtils]: 171: Hoare triple {64782#false} assume !main_#t~switch185#1;main_#t~switch185#1 := main_#t~switch185#1 || 1 == main_~tmp___0~6#1; {64782#false} is VALID [2022-02-20 22:07:40,061 INFO L290 TraceCheckUtils]: 172: Hoare triple {64782#false} assume main_#t~switch185#1; {64782#false} is VALID [2022-02-20 22:07:40,062 INFO L290 TraceCheckUtils]: 173: Hoare triple {64782#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet189#1 && main_#t~nondet189#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet189#1;havoc main_#t~nondet189#1;main_#t~switch190#1 := 0 == main_~tmp___2~1#1; {64782#false} is VALID [2022-02-20 22:07:40,062 INFO L290 TraceCheckUtils]: 174: Hoare triple {64782#false} assume main_#t~switch190#1; {64782#false} is VALID [2022-02-20 22:07:40,062 INFO L290 TraceCheckUtils]: 175: Hoare triple {64782#false} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0;assume { :begin_inline_usb_acecad_exit } true;assume { :begin_inline_ldv_usb_deregister_11 } true;ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset := ~#usb_acecad_driver~0.base, ~#usb_acecad_driver~0.offset;havoc ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset := ldv_usb_deregister_11_#in~arg#1.base, ldv_usb_deregister_11_#in~arg#1.offset;assume { :begin_inline_usb_deregister } true;usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset := ldv_usb_deregister_11_~arg#1.base, ldv_usb_deregister_11_~arg#1.offset;havoc usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset;usb_deregister_~arg0#1.base, usb_deregister_~arg0#1.offset := usb_deregister_#in~arg0#1.base, usb_deregister_#in~arg0#1.offset; {64782#false} is VALID [2022-02-20 22:07:40,062 INFO L290 TraceCheckUtils]: 176: Hoare triple {64782#false} assume { :end_inline_usb_deregister } true;~ldv_state_variable_1~0 := 0; {64782#false} is VALID [2022-02-20 22:07:40,062 INFO L290 TraceCheckUtils]: 177: Hoare triple {64782#false} assume { :end_inline_ldv_usb_deregister_11 } true; {64782#false} is VALID [2022-02-20 22:07:40,062 INFO L290 TraceCheckUtils]: 178: Hoare triple {64782#false} assume { :end_inline_usb_acecad_exit } true;~ldv_state_variable_0~0 := 2; {64782#false} is VALID [2022-02-20 22:07:40,062 INFO L290 TraceCheckUtils]: 179: Hoare triple {64782#false} assume { :begin_inline_ldv_check_final_state } true; {64782#false} is VALID [2022-02-20 22:07:40,062 INFO L290 TraceCheckUtils]: 180: Hoare triple {64782#false} assume 0 != (~usb_urb~0.base + ~usb_urb~0.offset) % 18446744073709551616; {64782#false} is VALID [2022-02-20 22:07:40,063 INFO L272 TraceCheckUtils]: 181: Hoare triple {64782#false} call ldv_error(); {64782#false} is VALID [2022-02-20 22:07:40,063 INFO L290 TraceCheckUtils]: 182: Hoare triple {64782#false} assume !false; {64782#false} is VALID [2022-02-20 22:07:40,063 INFO L134 CoverageAnalysis]: Checked inductivity of 95 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 88 trivial. 0 not checked. [2022-02-20 22:07:40,063 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-02-20 22:07:40,064 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1783989237] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:07:40,064 INFO L191 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-02-20 22:07:40,064 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [14] total 18 [2022-02-20 22:07:40,064 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [531881413] [2022-02-20 22:07:40,064 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:07:40,069 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 17.833333333333332) internal successors, (107), 6 states have internal predecessors, (107), 2 states have call successors, (17), 2 states have call predecessors, (17), 2 states have return successors, (16), 2 states have call predecessors, (16), 2 states have call successors, (16) Word has length 183 [2022-02-20 22:07:40,070 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:07:40,070 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 17.833333333333332) internal successors, (107), 6 states have internal predecessors, (107), 2 states have call successors, (17), 2 states have call predecessors, (17), 2 states have return successors, (16), 2 states have call predecessors, (16), 2 states have call successors, (16) [2022-02-20 22:07:40,182 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 140 edges. 140 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:07:40,182 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-02-20 22:07:40,182 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:07:40,183 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-02-20 22:07:40,183 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=269, Unknown=0, NotChecked=0, Total=306 [2022-02-20 22:07:40,183 INFO L87 Difference]: Start difference. First operand 951 states and 1235 transitions. Second operand has 6 states, 6 states have (on average 17.833333333333332) internal successors, (107), 6 states have internal predecessors, (107), 2 states have call successors, (17), 2 states have call predecessors, (17), 2 states have return successors, (16), 2 states have call predecessors, (16), 2 states have call successors, (16)