./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/pthread-wmm/safe006_power.opt-thin000_power.opt.i --full-output -ea --architecture 32bit


--------------------------------------------------------------------------------


Checking for ERROR reachability
Using default analysis
Version 03d7b7b3
Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -ea -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/pthread-wmm/safe006_power.opt-thin000_power.opt.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) )

 --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash eec124b30114ac40ce6b503b76c1b377fc7c0cddd0ece3b04d579d49ce56e9b5
--- Real Ultimate output ---
This is Ultimate 0.2.2-dev-03d7b7b
[2022-02-20 20:28:05,836 INFO  L177        SettingsManager]: Resetting all preferences to default values...
[2022-02-20 20:28:05,837 INFO  L181        SettingsManager]: Resetting UltimateCore preferences to default values
[2022-02-20 20:28:05,858 INFO  L184        SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring...
[2022-02-20 20:28:05,858 INFO  L181        SettingsManager]: Resetting Boogie Preprocessor preferences to default values
[2022-02-20 20:28:05,861 INFO  L181        SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values
[2022-02-20 20:28:05,863 INFO  L181        SettingsManager]: Resetting Abstract Interpretation preferences to default values
[2022-02-20 20:28:05,867 INFO  L181        SettingsManager]: Resetting LassoRanker preferences to default values
[2022-02-20 20:28:05,868 INFO  L181        SettingsManager]: Resetting Reaching Definitions preferences to default values
[2022-02-20 20:28:05,871 INFO  L181        SettingsManager]: Resetting SyntaxChecker preferences to default values
[2022-02-20 20:28:05,872 INFO  L181        SettingsManager]: Resetting Sifa preferences to default values
[2022-02-20 20:28:05,872 INFO  L184        SettingsManager]: Büchi Program Product provides no preferences, ignoring...
[2022-02-20 20:28:05,873 INFO  L181        SettingsManager]: Resetting LTL2Aut preferences to default values
[2022-02-20 20:28:05,874 INFO  L181        SettingsManager]: Resetting PEA to Boogie preferences to default values
[2022-02-20 20:28:05,875 INFO  L181        SettingsManager]: Resetting BlockEncodingV2 preferences to default values
[2022-02-20 20:28:05,876 INFO  L181        SettingsManager]: Resetting ChcToBoogie preferences to default values
[2022-02-20 20:28:05,877 INFO  L181        SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values
[2022-02-20 20:28:05,877 INFO  L181        SettingsManager]: Resetting BuchiAutomizer preferences to default values
[2022-02-20 20:28:05,880 INFO  L181        SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values
[2022-02-20 20:28:05,884 INFO  L181        SettingsManager]: Resetting CodeCheck preferences to default values
[2022-02-20 20:28:05,885 INFO  L181        SettingsManager]: Resetting InvariantSynthesis preferences to default values
[2022-02-20 20:28:05,886 INFO  L181        SettingsManager]: Resetting RCFGBuilder preferences to default values
[2022-02-20 20:28:05,887 INFO  L181        SettingsManager]: Resetting Referee preferences to default values
[2022-02-20 20:28:05,887 INFO  L181        SettingsManager]: Resetting TraceAbstraction preferences to default values
[2022-02-20 20:28:05,892 INFO  L184        SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring...
[2022-02-20 20:28:05,892 INFO  L184        SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring...
[2022-02-20 20:28:05,892 INFO  L181        SettingsManager]: Resetting TreeAutomizer preferences to default values
[2022-02-20 20:28:05,893 INFO  L181        SettingsManager]: Resetting IcfgToChc preferences to default values
[2022-02-20 20:28:05,893 INFO  L181        SettingsManager]: Resetting IcfgTransformer preferences to default values
[2022-02-20 20:28:05,894 INFO  L184        SettingsManager]: ReqToTest provides no preferences, ignoring...
[2022-02-20 20:28:05,894 INFO  L181        SettingsManager]: Resetting Boogie Printer preferences to default values
[2022-02-20 20:28:05,895 INFO  L181        SettingsManager]: Resetting ChcSmtPrinter preferences to default values
[2022-02-20 20:28:05,896 INFO  L181        SettingsManager]: Resetting ReqPrinter preferences to default values
[2022-02-20 20:28:05,897 INFO  L181        SettingsManager]: Resetting Witness Printer preferences to default values
[2022-02-20 20:28:05,897 INFO  L184        SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring...
[2022-02-20 20:28:05,898 INFO  L181        SettingsManager]: Resetting CDTParser preferences to default values
[2022-02-20 20:28:05,898 INFO  L184        SettingsManager]: AutomataScriptParser provides no preferences, ignoring...
[2022-02-20 20:28:05,898 INFO  L184        SettingsManager]: ReqParser provides no preferences, ignoring...
[2022-02-20 20:28:05,898 INFO  L181        SettingsManager]: Resetting SmtParser preferences to default values
[2022-02-20 20:28:05,899 INFO  L181        SettingsManager]: Resetting Witness Parser preferences to default values
[2022-02-20 20:28:05,899 INFO  L188        SettingsManager]: Finished resetting all preferences to default values...
[2022-02-20 20:28:05,900 INFO  L101        SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf
[2022-02-20 20:28:05,927 INFO  L113        SettingsManager]: Loading preferences was successful
[2022-02-20 20:28:05,927 INFO  L115        SettingsManager]: Preferences different from defaults after loading the file:
[2022-02-20 20:28:05,928 INFO  L136        SettingsManager]: Preferences of UltimateCore differ from their defaults:
[2022-02-20 20:28:05,928 INFO  L138        SettingsManager]:  * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR;
[2022-02-20 20:28:05,929 INFO  L136        SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults:
[2022-02-20 20:28:05,929 INFO  L138        SettingsManager]:  * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS
[2022-02-20 20:28:05,929 INFO  L136        SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults:
[2022-02-20 20:28:05,929 INFO  L138        SettingsManager]:  * Create parallel compositions if possible=false
[2022-02-20 20:28:05,929 INFO  L138        SettingsManager]:  * Use SBE=true
[2022-02-20 20:28:05,930 INFO  L136        SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults:
[2022-02-20 20:28:05,930 INFO  L138        SettingsManager]:  * sizeof long=4
[2022-02-20 20:28:05,930 INFO  L138        SettingsManager]:  * Overapproximate operations on floating types=true
[2022-02-20 20:28:05,930 INFO  L138        SettingsManager]:  * sizeof POINTER=4
[2022-02-20 20:28:05,931 INFO  L138        SettingsManager]:  * Check division by zero=IGNORE
[2022-02-20 20:28:05,931 INFO  L138        SettingsManager]:  * Pointer to allocated memory at dereference=IGNORE
[2022-02-20 20:28:05,931 INFO  L138        SettingsManager]:  * If two pointers are subtracted or compared they have the same base address=IGNORE
[2022-02-20 20:28:05,931 INFO  L138        SettingsManager]:  * Check array bounds for arrays that are off heap=IGNORE
[2022-02-20 20:28:05,931 INFO  L138        SettingsManager]:  * sizeof long double=12
[2022-02-20 20:28:05,931 INFO  L138        SettingsManager]:  * Check if freed pointer was valid=false
[2022-02-20 20:28:05,931 INFO  L138        SettingsManager]:  * Use constant arrays=true
[2022-02-20 20:28:05,931 INFO  L138        SettingsManager]:  * Pointer base address is valid at dereference=IGNORE
[2022-02-20 20:28:05,932 INFO  L136        SettingsManager]: Preferences of RCFGBuilder differ from their defaults:
[2022-02-20 20:28:05,932 INFO  L138        SettingsManager]:  * Size of a code block=SequenceOfStatements
[2022-02-20 20:28:05,932 INFO  L138        SettingsManager]:  * SMT solver=External_DefaultMode
[2022-02-20 20:28:05,932 INFO  L138        SettingsManager]:  * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000
[2022-02-20 20:28:05,932 INFO  L136        SettingsManager]: Preferences of TraceAbstraction differ from their defaults:
[2022-02-20 20:28:05,932 INFO  L138        SettingsManager]:  * Compute Interpolants along a Counterexample=FPandBP
[2022-02-20 20:28:05,932 INFO  L138        SettingsManager]:  * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles
[2022-02-20 20:28:05,933 INFO  L138        SettingsManager]:  * Trace refinement strategy=CAMEL
[2022-02-20 20:28:05,933 INFO  L138        SettingsManager]:  * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in
[2022-02-20 20:28:05,933 INFO  L138        SettingsManager]:  * Large block encoding in concurrent analysis=OFF
[2022-02-20 20:28:05,933 INFO  L138        SettingsManager]:  * Automaton type used in concurrency analysis=PETRI_NET
[2022-02-20 20:28:05,933 INFO  L138        SettingsManager]:  * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true
[2022-02-20 20:28:05,933 INFO  L138        SettingsManager]:  * SMT solver=External_ModelsAndUnsatCoreMode
WARNING: An illegal reflective access operation has occurred
WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int)
WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1
WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations
WARNING: All illegal access operations will be denied in a future release
Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) )


Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> eec124b30114ac40ce6b503b76c1b377fc7c0cddd0ece3b04d579d49ce56e9b5
[2022-02-20 20:28:06,106 INFO  L75    nceAwareModelManager]: Repository-Root is: /tmp
[2022-02-20 20:28:06,126 INFO  L261   ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized
[2022-02-20 20:28:06,128 INFO  L217   ainManager$Toolchain]: [Toolchain 1]: Toolchain selected.
[2022-02-20 20:28:06,128 INFO  L271        PluginConnector]: Initializing CDTParser...
[2022-02-20 20:28:06,129 INFO  L275        PluginConnector]: CDTParser initialized
[2022-02-20 20:28:06,129 INFO  L432   ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/pthread-wmm/safe006_power.opt-thin000_power.opt.i
[2022-02-20 20:28:06,171 INFO  L220              CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f1c4c6ecc/07da69c7272341dabd1d3eb0e73ad485/FLAGc665edfb0
[2022-02-20 20:28:06,597 INFO  L306              CDTParser]: Found 1 translation units.
[2022-02-20 20:28:06,598 INFO  L160              CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/pthread-wmm/safe006_power.opt-thin000_power.opt.i
[2022-02-20 20:28:06,608 INFO  L349              CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f1c4c6ecc/07da69c7272341dabd1d3eb0e73ad485/FLAGc665edfb0
[2022-02-20 20:28:06,618 INFO  L357              CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f1c4c6ecc/07da69c7272341dabd1d3eb0e73ad485
[2022-02-20 20:28:06,620 INFO  L299   ainManager$Toolchain]: ####################### [Toolchain 1] #######################
[2022-02-20 20:28:06,620 INFO  L131        ToolchainWalker]: Walking toolchain with 6 elements.
[2022-02-20 20:28:06,623 INFO  L113        PluginConnector]: ------------------------CACSL2BoogieTranslator----------------------------
[2022-02-20 20:28:06,624 INFO  L271        PluginConnector]: Initializing CACSL2BoogieTranslator...
[2022-02-20 20:28:06,626 INFO  L275        PluginConnector]: CACSL2BoogieTranslator initialized
[2022-02-20 20:28:06,629 INFO  L185        PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.02 08:28:06" (1/1) ...
[2022-02-20 20:28:06,630 INFO  L205        PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@14d7dcdb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 08:28:06, skipping insertion in model container
[2022-02-20 20:28:06,630 INFO  L185        PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.02 08:28:06" (1/1) ...
[2022-02-20 20:28:06,635 INFO  L145         MainTranslator]: Starting translation in SV-COMP mode 
[2022-02-20 20:28:06,676 INFO  L178         MainTranslator]: Built tables and reachable declarations
[2022-02-20 20:28:06,837 WARN  L230   ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/pthread-wmm/safe006_power.opt-thin000_power.opt.i[969,982]
[2022-02-20 20:28:06,985 INFO  L210          PostProcessor]: Analyzing one entry point: main
[2022-02-20 20:28:06,991 INFO  L203         MainTranslator]: Completed pre-run
[2022-02-20 20:28:06,998 WARN  L230   ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/pthread-wmm/safe006_power.opt-thin000_power.opt.i[969,982]
[2022-02-20 20:28:07,069 INFO  L210          PostProcessor]: Analyzing one entry point: main
[2022-02-20 20:28:07,104 INFO  L208         MainTranslator]: Completed translation
[2022-02-20 20:28:07,105 INFO  L202        PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 08:28:07 WrapperNode
[2022-02-20 20:28:07,105 INFO  L132        PluginConnector]: ------------------------ END CACSL2BoogieTranslator----------------------------
[2022-02-20 20:28:07,106 INFO  L113        PluginConnector]: ------------------------Boogie Procedure Inliner----------------------------
[2022-02-20 20:28:07,108 INFO  L271        PluginConnector]: Initializing Boogie Procedure Inliner...
[2022-02-20 20:28:07,108 INFO  L275        PluginConnector]: Boogie Procedure Inliner initialized
[2022-02-20 20:28:07,112 INFO  L185        PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 08:28:07" (1/1) ...
[2022-02-20 20:28:07,137 INFO  L185        PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 08:28:07" (1/1) ...
[2022-02-20 20:28:07,166 INFO  L137                Inliner]: procedures = 175, calls = 58, calls flagged for inlining = 5, calls inlined = 5, statements flattened = 195
[2022-02-20 20:28:07,166 INFO  L132        PluginConnector]: ------------------------ END Boogie Procedure Inliner----------------------------
[2022-02-20 20:28:07,167 INFO  L113        PluginConnector]: ------------------------Boogie Preprocessor----------------------------
[2022-02-20 20:28:07,167 INFO  L271        PluginConnector]: Initializing Boogie Preprocessor...
[2022-02-20 20:28:07,167 INFO  L275        PluginConnector]: Boogie Preprocessor initialized
[2022-02-20 20:28:07,173 INFO  L185        PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 08:28:07" (1/1) ...
[2022-02-20 20:28:07,173 INFO  L185        PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 08:28:07" (1/1) ...
[2022-02-20 20:28:07,176 INFO  L185        PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 08:28:07" (1/1) ...
[2022-02-20 20:28:07,176 INFO  L185        PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 08:28:07" (1/1) ...
[2022-02-20 20:28:07,183 INFO  L185        PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 08:28:07" (1/1) ...
[2022-02-20 20:28:07,186 INFO  L185        PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 08:28:07" (1/1) ...
[2022-02-20 20:28:07,188 INFO  L185        PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 08:28:07" (1/1) ...
[2022-02-20 20:28:07,192 INFO  L132        PluginConnector]: ------------------------ END Boogie Preprocessor----------------------------
[2022-02-20 20:28:07,193 INFO  L113        PluginConnector]: ------------------------RCFGBuilder----------------------------
[2022-02-20 20:28:07,193 INFO  L271        PluginConnector]: Initializing RCFGBuilder...
[2022-02-20 20:28:07,193 INFO  L275        PluginConnector]: RCFGBuilder initialized
[2022-02-20 20:28:07,194 INFO  L185        PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 08:28:07" (1/1) ...
[2022-02-20 20:28:07,209 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000
[2022-02-20 20:28:07,219 INFO  L189       MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3
[2022-02-20 20:28:07,232 INFO  L229       MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null)
[2022-02-20 20:28:07,234 INFO  L327       MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process
[2022-02-20 20:28:07,258 INFO  L130     BoogieDeclarations]: Found specification of procedure read~int
[2022-02-20 20:28:07,258 INFO  L130     BoogieDeclarations]: Found specification of procedure write~int
[2022-02-20 20:28:07,258 INFO  L130     BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin
[2022-02-20 20:28:07,258 INFO  L130     BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit
[2022-02-20 20:28:07,259 INFO  L130     BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack
[2022-02-20 20:28:07,259 INFO  L130     BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc
[2022-02-20 20:28:07,259 INFO  L130     BoogieDeclarations]: Found specification of procedure P0
[2022-02-20 20:28:07,260 INFO  L138     BoogieDeclarations]: Found implementation of procedure P0
[2022-02-20 20:28:07,260 INFO  L130     BoogieDeclarations]: Found specification of procedure P1
[2022-02-20 20:28:07,260 INFO  L138     BoogieDeclarations]: Found implementation of procedure P1
[2022-02-20 20:28:07,261 INFO  L130     BoogieDeclarations]: Found specification of procedure write~init~int
[2022-02-20 20:28:07,261 INFO  L130     BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end
[2022-02-20 20:28:07,261 INFO  L130     BoogieDeclarations]: Found specification of procedure ULTIMATE.start
[2022-02-20 20:28:07,261 INFO  L138     BoogieDeclarations]: Found implementation of procedure ULTIMATE.start
[2022-02-20 20:28:07,262 WARN  L208             CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement
[2022-02-20 20:28:07,404 INFO  L234             CfgBuilder]: Building ICFG
[2022-02-20 20:28:07,407 INFO  L260             CfgBuilder]: Building CFG for each procedure with an implementation
[2022-02-20 20:28:07,913 INFO  L275             CfgBuilder]: Performing block encoding
[2022-02-20 20:28:08,259 INFO  L294             CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start)
[2022-02-20 20:28:08,259 INFO  L299             CfgBuilder]: Removed 0 assume(true) statements.
[2022-02-20 20:28:08,261 INFO  L202        PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 08:28:08 BoogieIcfgContainer
[2022-02-20 20:28:08,261 INFO  L132        PluginConnector]: ------------------------ END RCFGBuilder----------------------------
[2022-02-20 20:28:08,263 INFO  L113        PluginConnector]: ------------------------TraceAbstraction----------------------------
[2022-02-20 20:28:08,263 INFO  L271        PluginConnector]: Initializing TraceAbstraction...
[2022-02-20 20:28:08,265 INFO  L275        PluginConnector]: TraceAbstraction initialized
[2022-02-20 20:28:08,266 INFO  L185        PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 20.02 08:28:06" (1/3) ...
[2022-02-20 20:28:08,266 INFO  L205        PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6b0b3859 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.02 08:28:08, skipping insertion in model container
[2022-02-20 20:28:08,266 INFO  L185        PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 08:28:07" (2/3) ...
[2022-02-20 20:28:08,266 INFO  L205        PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6b0b3859 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.02 08:28:08, skipping insertion in model container
[2022-02-20 20:28:08,267 INFO  L185        PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 08:28:08" (3/3) ...
[2022-02-20 20:28:08,269 INFO  L111   eAbstractionObserver]: Analyzing ICFG safe006_power.opt-thin000_power.opt.i
[2022-02-20 20:28:08,272 WARN  L150   ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program
[2022-02-20 20:28:08,272 INFO  L205   ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION
[2022-02-20 20:28:08,272 INFO  L164   ceAbstractionStarter]: Applying trace abstraction to program that has 2 error locations.
[2022-02-20 20:28:08,272 INFO  L534   ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances.
[2022-02-20 20:28:08,339 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg#1.base| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,339 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg#1.offset| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,339 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_~arg#1.base| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,340 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_~arg#1.offset| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,340 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg#1.base| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,340 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg#1.offset| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,340 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_~arg#1.base| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,340 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_~arg#1.offset| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,341 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression#1| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,341 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_~expression#1| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,341 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression#1| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,341 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_~expression#1| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,342 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression#1| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,342 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_~expression#1| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,343 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression#1| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,343 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_~expression#1| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,343 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem3#1| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,343 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4#1| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,343 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8#1| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,343 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6#1| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,344 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4#1| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,344 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite9#1| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,344 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem3#1| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,345 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7#1| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,345 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5#1| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,346 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem3#1| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,346 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4#1| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,346 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8#1| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,346 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6#1| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,346 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4#1| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,346 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite9#1| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,347 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem3#1| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,347 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7#1| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,347 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5#1| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,348 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res#1.offset| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,348 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res#1.base| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,348 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res#1.offset| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,348 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res#1.base| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,348 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,349 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,349 WARN  L322   ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,349 WARN  L322   ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,349 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,349 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,349 WARN  L322   ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,350 WARN  L322   ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,350 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet10| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,350 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,350 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,350 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,350 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,350 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,350 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,351 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,351 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,351 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,351 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem19| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,351 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem57| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,351 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem15| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,351 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,351 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,352 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,352 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,352 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,352 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet13| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,352 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,352 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,352 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,352 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet11| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,353 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,353 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,353 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,353 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,353 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,353 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,353 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,353 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem14| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,354 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,354 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,354 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,354 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,355 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,356 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,356 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,357 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,357 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet10| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,357 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,357 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,357 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,358 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,358 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,361 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,361 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,361 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,361 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,361 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,362 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,362 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem19| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,362 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem57| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,362 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem15| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,362 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,362 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,363 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,363 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,363 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,363 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,363 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,363 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet13| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,363 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,363 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,363 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,364 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet11| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,364 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,364 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,364 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,364 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,364 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,364 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,364 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,364 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,365 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,365 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem12| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,365 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem56| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,365 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem14| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,365 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,365 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,365 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,365 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,365 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,366 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,366 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,366 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,366 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,366 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,370 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet10| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,370 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,370 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,370 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,370 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,371 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,371 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,371 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,371 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,371 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,371 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem19| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,371 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem57| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,371 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem15| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,371 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,372 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,372 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,372 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,372 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,372 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet13| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,373 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,373 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,374 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,374 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet11| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,374 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,374 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,374 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,374 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,374 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,374 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,374 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,375 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem14| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,375 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,375 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,375 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,375 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,375 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,375 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,375 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,375 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,376 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet10| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,376 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,376 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,376 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,376 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,376 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,376 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,376 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,376 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,377 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,377 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,377 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,377 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem19| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,377 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem57| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,377 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem15| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,377 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,377 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,377 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,378 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,378 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,378 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,378 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,378 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet13| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,378 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,378 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,378 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,378 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet11| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,378 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,379 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,379 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,379 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,379 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,379 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,379 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,379 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,380 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,382 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem12| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,382 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem56| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,382 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem14| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,383 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,383 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,383 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,383 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,383 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,383 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,384 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,384 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,384 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,384 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,389 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,389 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem59| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,389 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem59| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,389 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,389 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite61| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,389 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,390 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,390 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,390 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,390 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,390 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem59| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,391 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem59| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,391 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,391 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite61| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,391 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,391 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,391 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,391 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,392 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,392 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,392 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,392 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,397 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,397 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,397 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,398 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,398 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,398 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,398 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,398 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,398 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,399 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,399 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,399 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,399 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,399 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet10| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,399 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem56| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,399 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem14| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,399 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem12| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,400 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,400 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,400 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,400 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,400 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,400 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,400 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,400 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,400 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,401 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,401 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,401 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,401 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,401 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,401 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,401 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,401 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,402 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet13| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,402 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,402 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,402 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,402 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,402 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite61| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,402 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,402 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet11| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,403 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem57| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,403 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem59| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,403 WARN  L322   ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,403 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem15| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,403 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,403 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,403 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,403 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,403 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,404 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,404 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,404 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,404 WARN  L322   ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,404 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,404 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,404 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,404 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem19| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,404 WARN  L322   ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,405 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res#1.offset| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,405 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite9#1| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,406 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6#1| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,406 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem3#1| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,406 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_~arg#1.base| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,406 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4#1| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,406 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_~arg#1.offset| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,406 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8#1| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,406 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression#1| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,406 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res#1.base| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,407 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7#1| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,407 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_~expression#1| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,407 WARN  L322   ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5#1| not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-02-20 20:28:08,407 INFO  L148    ThreadInstanceAdder]: Constructed 0 joinOtherThreadTransitions.
[2022-02-20 20:28:08,440 INFO  L338      AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ========
[2022-02-20 20:28:08,445 INFO  L339      AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR
[2022-02-20 20:28:08,446 INFO  L340      AbstractCegarLoop]: Starting to check reachability of 5 error locations.
[2022-02-20 20:28:08,455 INFO  L74            FinitePrefix]: Start finitePrefix. Operand has 117 places, 112 transitions, 234 flow
[2022-02-20 20:28:08,493 INFO  L129       PetriNetUnfolder]: 2/110 cut-off events.
[2022-02-20 20:28:08,493 INFO  L130       PetriNetUnfolder]: For 0/0 co-relation queries the response was YES.
[2022-02-20 20:28:08,496 INFO  L84            FinitePrefix]: Finished finitePrefix Result has 117 conditions, 110 events. 2/110 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 3. Compared 40 event pairs, 0 based on Foata normal form. 0/106 useless extension candidates. Maximal degree in co-relation 55. Up to 2 conditions per place. 
[2022-02-20 20:28:08,496 INFO  L82        GeneralOperation]: Start removeDead. Operand has 117 places, 112 transitions, 234 flow
[2022-02-20 20:28:08,499 INFO  L88        GeneralOperation]: Finished RemoveDead, result has has 115 places, 110 transitions, 226 flow
[2022-02-20 20:28:08,513 INFO  L129       PetriNetUnfolder]: 0/61 cut-off events.
[2022-02-20 20:28:08,513 INFO  L130       PetriNetUnfolder]: For 0/0 co-relation queries the response was YES.
[2022-02-20 20:28:08,514 INFO  L246   CegarLoopForPetriNet]: Found error trace
[2022-02-20 20:28:08,514 INFO  L254   CegarLoopForPetriNet]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2022-02-20 20:28:08,515 INFO  L402      AbstractCegarLoop]: === Iteration 1 === Targeting P0Err0ASSERT_VIOLATIONERROR_FUNCTION === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATION (and 2 more)] ===
[2022-02-20 20:28:08,518 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2022-02-20 20:28:08,518 INFO  L85        PathProgramCache]: Analyzing trace with hash 642578380, now seen corresponding path program 1 times
[2022-02-20 20:28:08,528 INFO  L126   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2022-02-20 20:28:08,528 INFO  L338   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [318936935]
[2022-02-20 20:28:08,528 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2022-02-20 20:28:08,529 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2022-02-20 20:28:08,655 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2022-02-20 20:28:08,770 INFO  L290        TraceCheckUtils]: 0: Hoare triple {120#true} [1205] ULTIMATE.startENTRY-->L-1: Formula: true  InVars {}  OutVars{}  AuxVars[]  AssignedVars[] {120#true} is VALID
[2022-02-20 20:28:08,771 INFO  L290        TraceCheckUtils]: 1: Hoare triple {120#true} [1144] L-1-->L-1-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0))  InVars {}  OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|}  AuxVars[]  AssignedVars[#NULL.offset, #NULL.base] {120#true} is VALID
[2022-02-20 20:28:08,771 INFO  L290        TraceCheckUtils]: 2: Hoare triple {120#true} [1210] L-1-1-->L-1-2: Formula: (= (select |v_#valid_1| 0) 0)  InVars {#valid=|v_#valid_1|}  OutVars{#valid=|v_#valid_1|}  AuxVars[]  AssignedVars[] {120#true} is VALID
[2022-02-20 20:28:08,771 INFO  L290        TraceCheckUtils]: 3: Hoare triple {120#true} [1214] L-1-2-->L17: Formula: (< 0 |v_#StackHeapBarrier_1|)  InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|}  OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|}  AuxVars[]  AssignedVars[] {120#true} is VALID
[2022-02-20 20:28:08,771 INFO  L290        TraceCheckUtils]: 4: Hoare triple {120#true} [1212] L17-->L17-1: Formula: (and (= (select |v_#valid_2| 1) 1) (= 2 (select |v_#length_1| 1)))  InVars {#length=|v_#length_1|, #valid=|v_#valid_2|}  OutVars{#length=|v_#length_1|, #valid=|v_#valid_2|}  AuxVars[]  AssignedVars[] {120#true} is VALID
[2022-02-20 20:28:08,771 INFO  L290        TraceCheckUtils]: 5: Hoare triple {120#true} [1179] L17-1-->L17-2: Formula: (= 48 (select (select |v_#memory_int_17| 1) 0))  InVars {#memory_int=|v_#memory_int_17|}  OutVars{#memory_int=|v_#memory_int_17|}  AuxVars[]  AssignedVars[] {120#true} is VALID
[2022-02-20 20:28:08,772 INFO  L290        TraceCheckUtils]: 6: Hoare triple {120#true} [1118] L17-2-->L17-3: Formula: (= (select (select |v_#memory_int_18| 1) 1) 0)  InVars {#memory_int=|v_#memory_int_18|}  OutVars{#memory_int=|v_#memory_int_18|}  AuxVars[]  AssignedVars[] {120#true} is VALID
[2022-02-20 20:28:08,772 INFO  L290        TraceCheckUtils]: 7: Hoare triple {120#true} [1186] L17-3-->L17-4: Formula: (and (= (select |v_#valid_3| 2) 1) (= 38 (select |v_#length_2| 2)))  InVars {#length=|v_#length_2|, #valid=|v_#valid_3|}  OutVars{#length=|v_#length_2|, #valid=|v_#valid_3|}  AuxVars[]  AssignedVars[] {120#true} is VALID
[2022-02-20 20:28:08,772 INFO  L290        TraceCheckUtils]: 8: Hoare triple {120#true} [1117] L17-4-->L710: Formula: (= v_~__unbuffered_cnt~0_5 0)  InVars {}  OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_5}  AuxVars[]  AssignedVars[~__unbuffered_cnt~0] {120#true} is VALID
[2022-02-20 20:28:08,772 INFO  L290        TraceCheckUtils]: 9: Hoare triple {120#true} [1172] L710-->L712: Formula: (= v_~__unbuffered_p0_EAX~0_2 0)  InVars {}  OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_2}  AuxVars[]  AssignedVars[~__unbuffered_p0_EAX~0] {120#true} is VALID
[2022-02-20 20:28:08,772 INFO  L290        TraceCheckUtils]: 10: Hoare triple {120#true} [1167] L712-->L713: Formula: (= v_~__unbuffered_p1_EAX~0_2 0)  InVars {}  OutVars{~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_2}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX~0] {120#true} is VALID
[2022-02-20 20:28:08,773 INFO  L290        TraceCheckUtils]: 11: Hoare triple {120#true} [1192] L713-->L714: Formula: (= v_~__unbuffered_p1_EAX$flush_delayed~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$flush_delayed~0=v_~__unbuffered_p1_EAX$flush_delayed~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$flush_delayed~0] {120#true} is VALID
[2022-02-20 20:28:08,773 INFO  L290        TraceCheckUtils]: 12: Hoare triple {120#true} [1115] L714-->L715: Formula: (= v_~__unbuffered_p1_EAX$mem_tmp~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$mem_tmp~0=v_~__unbuffered_p1_EAX$mem_tmp~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$mem_tmp~0] {120#true} is VALID
[2022-02-20 20:28:08,773 INFO  L290        TraceCheckUtils]: 13: Hoare triple {120#true} [1121] L715-->L716: Formula: (= v_~__unbuffered_p1_EAX$r_buff0_thd0~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$r_buff0_thd0~0=v_~__unbuffered_p1_EAX$r_buff0_thd0~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$r_buff0_thd0~0] {120#true} is VALID
[2022-02-20 20:28:08,773 INFO  L290        TraceCheckUtils]: 14: Hoare triple {120#true} [1148] L716-->L717: Formula: (= v_~__unbuffered_p1_EAX$r_buff0_thd1~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$r_buff0_thd1~0=v_~__unbuffered_p1_EAX$r_buff0_thd1~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$r_buff0_thd1~0] {120#true} is VALID
[2022-02-20 20:28:08,774 INFO  L290        TraceCheckUtils]: 15: Hoare triple {120#true} [1128] L717-->L718: Formula: (= v_~__unbuffered_p1_EAX$r_buff0_thd2~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$r_buff0_thd2~0=v_~__unbuffered_p1_EAX$r_buff0_thd2~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$r_buff0_thd2~0] {120#true} is VALID
[2022-02-20 20:28:08,774 INFO  L290        TraceCheckUtils]: 16: Hoare triple {120#true} [1184] L718-->L719: Formula: (= v_~__unbuffered_p1_EAX$r_buff1_thd0~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$r_buff1_thd0~0=v_~__unbuffered_p1_EAX$r_buff1_thd0~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$r_buff1_thd0~0] {120#true} is VALID
[2022-02-20 20:28:08,774 INFO  L290        TraceCheckUtils]: 17: Hoare triple {120#true} [1174] L719-->L720: Formula: (= v_~__unbuffered_p1_EAX$r_buff1_thd1~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$r_buff1_thd1~0=v_~__unbuffered_p1_EAX$r_buff1_thd1~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$r_buff1_thd1~0] {120#true} is VALID
[2022-02-20 20:28:08,774 INFO  L290        TraceCheckUtils]: 18: Hoare triple {120#true} [1133] L720-->L721: Formula: (= v_~__unbuffered_p1_EAX$r_buff1_thd2~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$r_buff1_thd2~0=v_~__unbuffered_p1_EAX$r_buff1_thd2~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$r_buff1_thd2~0] {120#true} is VALID
[2022-02-20 20:28:08,774 INFO  L290        TraceCheckUtils]: 19: Hoare triple {120#true} [1180] L721-->L722: Formula: (= v_~__unbuffered_p1_EAX$read_delayed~0_2 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$read_delayed~0=v_~__unbuffered_p1_EAX$read_delayed~0_2}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$read_delayed~0] {120#true} is VALID
[2022-02-20 20:28:08,775 INFO  L290        TraceCheckUtils]: 20: Hoare triple {120#true} [1166] L722-->L723: Formula: (and (= v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_2 0) (= v_~__unbuffered_p1_EAX$read_delayed_var~0.base_2 0))  InVars {}  OutVars{~__unbuffered_p1_EAX$read_delayed_var~0.base=v_~__unbuffered_p1_EAX$read_delayed_var~0.base_2, ~__unbuffered_p1_EAX$read_delayed_var~0.offset=v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_2}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$read_delayed_var~0.base, ~__unbuffered_p1_EAX$read_delayed_var~0.offset] {120#true} is VALID
[2022-02-20 20:28:08,775 INFO  L290        TraceCheckUtils]: 21: Hoare triple {120#true} [1219] L723-->L724: Formula: (= v_~__unbuffered_p1_EAX$w_buff0~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$w_buff0~0=v_~__unbuffered_p1_EAX$w_buff0~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$w_buff0~0] {120#true} is VALID
[2022-02-20 20:28:08,775 INFO  L290        TraceCheckUtils]: 22: Hoare triple {120#true} [1129] L724-->L725: Formula: (= v_~__unbuffered_p1_EAX$w_buff0_used~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$w_buff0_used~0=v_~__unbuffered_p1_EAX$w_buff0_used~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$w_buff0_used~0] {120#true} is VALID
[2022-02-20 20:28:08,776 INFO  L290        TraceCheckUtils]: 23: Hoare triple {120#true} [1116] L725-->L726: Formula: (= v_~__unbuffered_p1_EAX$w_buff1~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$w_buff1~0=v_~__unbuffered_p1_EAX$w_buff1~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$w_buff1~0] {120#true} is VALID
[2022-02-20 20:28:08,776 INFO  L290        TraceCheckUtils]: 24: Hoare triple {120#true} [1183] L726-->L727: Formula: (= v_~__unbuffered_p1_EAX$w_buff1_used~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$w_buff1_used~0=v_~__unbuffered_p1_EAX$w_buff1_used~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$w_buff1_used~0] {120#true} is VALID
[2022-02-20 20:28:08,777 INFO  L290        TraceCheckUtils]: 25: Hoare triple {120#true} [1123] L727-->L728: Formula: (= v_~main$tmp_guard0~0_1 0)  InVars {}  OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_1}  AuxVars[]  AssignedVars[~main$tmp_guard0~0] {120#true} is VALID
[2022-02-20 20:28:08,777 INFO  L290        TraceCheckUtils]: 26: Hoare triple {120#true} [1168] L728-->L730: Formula: (= v_~main$tmp_guard1~0_1 0)  InVars {}  OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_1}  AuxVars[]  AssignedVars[~main$tmp_guard1~0] {120#true} is VALID
[2022-02-20 20:28:08,777 INFO  L290        TraceCheckUtils]: 27: Hoare triple {120#true} [1159] L730-->L730-1: Formula: (and (= 3 |v_~#x~0.base_14|) (= |v_~#x~0.offset_14| 0))  InVars {}  OutVars{~#x~0.base=|v_~#x~0.base_14|, ~#x~0.offset=|v_~#x~0.offset_14|}  AuxVars[]  AssignedVars[~#x~0.offset, ~#x~0.base] {120#true} is VALID
[2022-02-20 20:28:08,777 INFO  L290        TraceCheckUtils]: 28: Hoare triple {120#true} [1200] L730-1-->L730-2: Formula: (and (= (select |v_#valid_4| 3) 1) (= 4 (select |v_#length_3| 3)))  InVars {#length=|v_#length_3|, #valid=|v_#valid_4|}  OutVars{#length=|v_#length_3|, #valid=|v_#valid_4|}  AuxVars[]  AssignedVars[] {120#true} is VALID
[2022-02-20 20:28:08,777 INFO  L290        TraceCheckUtils]: 29: Hoare triple {120#true} [1155] L730-2-->L730-3: Formula: (= (select (select |v_#memory_int_19| |v_~#x~0.base_15|) |v_~#x~0.offset_15|) 0)  InVars {~#x~0.base=|v_~#x~0.base_15|, #memory_int=|v_#memory_int_19|, ~#x~0.offset=|v_~#x~0.offset_15|}  OutVars{~#x~0.base=|v_~#x~0.base_15|, #memory_int=|v_#memory_int_19|, ~#x~0.offset=|v_~#x~0.offset_15|}  AuxVars[]  AssignedVars[] {120#true} is VALID
[2022-02-20 20:28:08,778 INFO  L290        TraceCheckUtils]: 30: Hoare triple {120#true} [1131] L730-3-->L732: Formula: (= 0 v_~x$flush_delayed~0_5)  InVars {}  OutVars{~x$flush_delayed~0=v_~x$flush_delayed~0_5}  AuxVars[]  AssignedVars[~x$flush_delayed~0] {120#true} is VALID
[2022-02-20 20:28:08,778 INFO  L290        TraceCheckUtils]: 31: Hoare triple {120#true} [1132] L732-->L733: Formula: (= v_~x$mem_tmp~0_3 0)  InVars {}  OutVars{~x$mem_tmp~0=v_~x$mem_tmp~0_3}  AuxVars[]  AssignedVars[~x$mem_tmp~0] {120#true} is VALID
[2022-02-20 20:28:08,778 INFO  L290        TraceCheckUtils]: 32: Hoare triple {120#true} [1190] L733-->L734: Formula: (= v_~x$r_buff0_thd0~0_2 0)  InVars {}  OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_2}  AuxVars[]  AssignedVars[~x$r_buff0_thd0~0] {120#true} is VALID
[2022-02-20 20:28:08,778 INFO  L290        TraceCheckUtils]: 33: Hoare triple {120#true} [1191] L734-->L735: Formula: (= v_~x$r_buff0_thd1~0_15 0)  InVars {}  OutVars{~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_15}  AuxVars[]  AssignedVars[~x$r_buff0_thd1~0] {120#true} is VALID
[2022-02-20 20:28:08,778 INFO  L290        TraceCheckUtils]: 34: Hoare triple {120#true} [1211] L735-->L736: Formula: (= v_~x$r_buff0_thd2~0_60 0)  InVars {}  OutVars{~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_60}  AuxVars[]  AssignedVars[~x$r_buff0_thd2~0] {120#true} is VALID
[2022-02-20 20:28:08,778 INFO  L290        TraceCheckUtils]: 35: Hoare triple {120#true} [1139] L736-->L737: Formula: (= v_~x$r_buff1_thd0~0_2 0)  InVars {}  OutVars{~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_2}  AuxVars[]  AssignedVars[~x$r_buff1_thd0~0] {120#true} is VALID
[2022-02-20 20:28:08,779 INFO  L290        TraceCheckUtils]: 36: Hoare triple {120#true} [1130] L737-->L738: Formula: (= v_~x$r_buff1_thd1~0_10 0)  InVars {}  OutVars{~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_10}  AuxVars[]  AssignedVars[~x$r_buff1_thd1~0] {120#true} is VALID
[2022-02-20 20:28:08,779 INFO  L290        TraceCheckUtils]: 37: Hoare triple {120#true} [1160] L738-->L739: Formula: (= v_~x$r_buff1_thd2~0_42 0)  InVars {}  OutVars{~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_42}  AuxVars[]  AssignedVars[~x$r_buff1_thd2~0] {120#true} is VALID
[2022-02-20 20:28:08,779 INFO  L290        TraceCheckUtils]: 38: Hoare triple {120#true} [1111] L739-->L740: Formula: (= v_~x$read_delayed~0_1 0)  InVars {}  OutVars{~x$read_delayed~0=v_~x$read_delayed~0_1}  AuxVars[]  AssignedVars[~x$read_delayed~0] {120#true} is VALID
[2022-02-20 20:28:08,779 INFO  L290        TraceCheckUtils]: 39: Hoare triple {120#true} [1149] L740-->L741: Formula: (and (= v_~x$read_delayed_var~0.base_1 0) (= v_~x$read_delayed_var~0.offset_1 0))  InVars {}  OutVars{~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_1, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_1}  AuxVars[]  AssignedVars[~x$read_delayed_var~0.offset, ~x$read_delayed_var~0.base] {120#true} is VALID
[2022-02-20 20:28:08,779 INFO  L290        TraceCheckUtils]: 40: Hoare triple {120#true} [1207] L741-->L742: Formula: (= 0 v_~x$w_buff0~0_16)  InVars {}  OutVars{~x$w_buff0~0=v_~x$w_buff0~0_16}  AuxVars[]  AssignedVars[~x$w_buff0~0] {120#true} is VALID
[2022-02-20 20:28:08,780 INFO  L290        TraceCheckUtils]: 41: Hoare triple {120#true} [1140] L742-->L743: Formula: (= v_~x$w_buff0_used~0_87 0)  InVars {}  OutVars{~x$w_buff0_used~0=v_~x$w_buff0_used~0_87}  AuxVars[]  AssignedVars[~x$w_buff0_used~0] {122#(= ~x$w_buff0_used~0 0)} is VALID
[2022-02-20 20:28:08,781 INFO  L290        TraceCheckUtils]: 42: Hoare triple {122#(= ~x$w_buff0_used~0 0)} [1163] L743-->L744: Formula: (= 0 v_~x$w_buff1~0_13)  InVars {}  OutVars{~x$w_buff1~0=v_~x$w_buff1~0_13}  AuxVars[]  AssignedVars[~x$w_buff1~0] {122#(= ~x$w_buff0_used~0 0)} is VALID
[2022-02-20 20:28:08,781 INFO  L290        TraceCheckUtils]: 43: Hoare triple {122#(= ~x$w_buff0_used~0 0)} [1141] L744-->L746: Formula: (= v_~x$w_buff1_used~0_50 0)  InVars {}  OutVars{~x$w_buff1_used~0=v_~x$w_buff1_used~0_50}  AuxVars[]  AssignedVars[~x$w_buff1_used~0] {122#(= ~x$w_buff0_used~0 0)} is VALID
[2022-02-20 20:28:08,783 INFO  L290        TraceCheckUtils]: 44: Hoare triple {122#(= ~x$w_buff0_used~0 0)} [1182] L746-->L747: Formula: (= v_~y~0_3 0)  InVars {}  OutVars{~y~0=v_~y~0_3}  AuxVars[]  AssignedVars[~y~0] {122#(= ~x$w_buff0_used~0 0)} is VALID
[2022-02-20 20:28:08,783 INFO  L290        TraceCheckUtils]: 45: Hoare triple {122#(= ~x$w_buff0_used~0 0)} [1119] L747-->L748: Formula: (= v_~weak$$choice0~0_14 0)  InVars {}  OutVars{~weak$$choice0~0=v_~weak$$choice0~0_14}  AuxVars[]  AssignedVars[~weak$$choice0~0] {122#(= ~x$w_buff0_used~0 0)} is VALID
[2022-02-20 20:28:08,784 INFO  L290        TraceCheckUtils]: 46: Hoare triple {122#(= ~x$w_buff0_used~0 0)} [1142] L748-->L749: Formula: (= v_~weak$$choice1~0_5 0)  InVars {}  OutVars{~weak$$choice1~0=v_~weak$$choice1~0_5}  AuxVars[]  AssignedVars[~weak$$choice1~0] {122#(= ~x$w_buff0_used~0 0)} is VALID
[2022-02-20 20:28:08,784 INFO  L290        TraceCheckUtils]: 47: Hoare triple {122#(= ~x$w_buff0_used~0 0)} [1113] L749-->L-1-3: Formula: (= v_~weak$$choice2~0_15 0)  InVars {}  OutVars{~weak$$choice2~0=v_~weak$$choice2~0_15}  AuxVars[]  AssignedVars[~weak$$choice2~0] {122#(= ~x$w_buff0_used~0 0)} is VALID
[2022-02-20 20:28:08,784 INFO  L290        TraceCheckUtils]: 48: Hoare triple {122#(= ~x$w_buff0_used~0 0)} [1218] L-1-3-->L-1-4: Formula: true  InVars {}  OutVars{}  AuxVars[]  AssignedVars[] {122#(= ~x$w_buff0_used~0 0)} is VALID
[2022-02-20 20:28:08,785 INFO  L290        TraceCheckUtils]: 49: Hoare triple {122#(= ~x$w_buff0_used~0 0)} [1147] L-1-4-->L-1-5: Formula: true  InVars {}  OutVars{}  AuxVars[]  AssignedVars[] {122#(= ~x$w_buff0_used~0 0)} is VALID
[2022-02-20 20:28:08,787 INFO  L290        TraceCheckUtils]: 50: Hoare triple {122#(= ~x$w_buff0_used~0 0)} [1125] L-1-5-->L-1-6: Formula: true  InVars {}  OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_1|}  AuxVars[]  AssignedVars[ULTIMATE.start_main_#res#1] {122#(= ~x$w_buff0_used~0 0)} is VALID
[2022-02-20 20:28:08,788 INFO  L290        TraceCheckUtils]: 51: Hoare triple {122#(= ~x$w_buff0_used~0 0)} [1196] L-1-6-->L825: Formula: true  InVars {}  OutVars{ULTIMATE.start_main_#t~nondet77#1=|v_ULTIMATE.start_main_#t~nondet77#1_1|, ULTIMATE.start_main_#t~ite74#1=|v_ULTIMATE.start_main_#t~ite74#1_1|, ULTIMATE.start_main_#t~mem70#1=|v_ULTIMATE.start_main_#t~mem70#1_1|, ULTIMATE.start_main_#t~ite72#1=|v_ULTIMATE.start_main_#t~ite72#1_1|, ULTIMATE.start_main_~#t1923~0#1.base=|v_ULTIMATE.start_main_~#t1923~0#1.base_1|, ULTIMATE.start_main_#t~ite76#1=|v_ULTIMATE.start_main_#t~ite76#1_1|, ULTIMATE.start_main_#t~ite80#1=|v_ULTIMATE.start_main_#t~ite80#1_1|, ULTIMATE.start_main_#t~pre68#1=|v_ULTIMATE.start_main_#t~pre68#1_1|, ULTIMATE.start_main_#t~ite71#1=|v_ULTIMATE.start_main_#t~ite71#1_1|, ULTIMATE.start_main_#t~pre66#1=|v_ULTIMATE.start_main_#t~pre66#1_1|, ULTIMATE.start_main_#t~ite73#1=|v_ULTIMATE.start_main_#t~ite73#1_1|, ULTIMATE.start_main_#t~ite75#1=|v_ULTIMATE.start_main_#t~ite75#1_1|, ULTIMATE.start_main_~#t1924~0#1.offset=|v_ULTIMATE.start_main_~#t1924~0#1.offset_1|, ULTIMATE.start_main_~#t1923~0#1.offset=|v_ULTIMATE.start_main_~#t1923~0#1.offset_1|, ULTIMATE.start_main_#t~nondet69#1=|v_ULTIMATE.start_main_#t~nondet69#1_1|, ULTIMATE.start_main_#t~ite79#1=|v_ULTIMATE.start_main_#t~ite79#1_1|, ULTIMATE.start_main_~#t1924~0#1.base=|v_ULTIMATE.start_main_~#t1924~0#1.base_1|, ULTIMATE.start_main_#t~nondet67#1=|v_ULTIMATE.start_main_#t~nondet67#1_1|, ULTIMATE.start_main_#t~mem78#1=|v_ULTIMATE.start_main_#t~mem78#1_1|}  AuxVars[]  AssignedVars[ULTIMATE.start_main_#t~nondet77#1, ULTIMATE.start_main_#t~ite74#1, ULTIMATE.start_main_#t~mem70#1, ULTIMATE.start_main_#t~ite72#1, ULTIMATE.start_main_~#t1923~0#1.base, ULTIMATE.start_main_#t~ite76#1, ULTIMATE.start_main_#t~ite80#1, ULTIMATE.start_main_#t~pre68#1, ULTIMATE.start_main_#t~ite71#1, ULTIMATE.start_main_#t~pre66#1, ULTIMATE.start_main_#t~ite73#1, ULTIMATE.start_main_#t~ite75#1, ULTIMATE.start_main_~#t1924~0#1.offset, ULTIMATE.start_main_~#t1923~0#1.offset, ULTIMATE.start_main_#t~nondet69#1, ULTIMATE.start_main_#t~ite79#1, ULTIMATE.start_main_~#t1924~0#1.base, ULTIMATE.start_main_#t~nondet67#1, ULTIMATE.start_main_#t~mem78#1] {122#(= ~x$w_buff0_used~0 0)} is VALID
[2022-02-20 20:28:08,788 INFO  L290        TraceCheckUtils]: 52: Hoare triple {122#(= ~x$w_buff0_used~0 0)} [1209] L825-->L825-1: Formula: (and (= |v_ULTIMATE.start_main_~#t1923~0#1.offset_2| 0) (= (store |v_#length_5| |v_ULTIMATE.start_main_~#t1923~0#1.base_2| 4) |v_#length_4|) (not (= |v_ULTIMATE.start_main_~#t1923~0#1.base_2| 0)) (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t1923~0#1.base_2|) (= |v_#valid_5| (store |v_#valid_6| |v_ULTIMATE.start_main_~#t1923~0#1.base_2| 1)) (= (select |v_#valid_6| |v_ULTIMATE.start_main_~#t1923~0#1.base_2|) 0))  InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_5|, #valid=|v_#valid_6|}  OutVars{ULTIMATE.start_main_~#t1923~0#1.base=|v_ULTIMATE.start_main_~#t1923~0#1.base_2|, ULTIMATE.start_main_~#t1923~0#1.offset=|v_ULTIMATE.start_main_~#t1923~0#1.offset_2|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_5|}  AuxVars[]  AssignedVars[#valid, ULTIMATE.start_main_~#t1923~0#1.base, ULTIMATE.start_main_~#t1923~0#1.offset, #length] {122#(= ~x$w_buff0_used~0 0)} is VALID
[2022-02-20 20:28:08,789 INFO  L290        TraceCheckUtils]: 53: Hoare triple {122#(= ~x$w_buff0_used~0 0)} [1124] L825-1-->L826: Formula: (= |v_ULTIMATE.start_main_#t~pre66#1_2| |v_#pthreadsForks_1|)  InVars {#pthreadsForks=|v_#pthreadsForks_1|}  OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre66#1=|v_ULTIMATE.start_main_#t~pre66#1_2|}  AuxVars[]  AssignedVars[ULTIMATE.start_main_#t~pre66#1] {122#(= ~x$w_buff0_used~0 0)} is VALID
[2022-02-20 20:28:08,789 INFO  L290        TraceCheckUtils]: 54: Hoare triple {122#(= ~x$w_buff0_used~0 0)} [1152] L826-->L826-1: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|)  InVars {#pthreadsForks=|v_#pthreadsForks_3|}  OutVars{#pthreadsForks=|v_#pthreadsForks_2|}  AuxVars[]  AssignedVars[#pthreadsForks] {122#(= ~x$w_buff0_used~0 0)} is VALID
[2022-02-20 20:28:08,791 INFO  L290        TraceCheckUtils]: 55: Hoare triple {122#(= ~x$w_buff0_used~0 0)} [1153] L826-1-->L826-2: Formula: (= (store |v_#memory_int_21| |v_ULTIMATE.start_main_~#t1923~0#1.base_3| (store (select |v_#memory_int_21| |v_ULTIMATE.start_main_~#t1923~0#1.base_3|) |v_ULTIMATE.start_main_~#t1923~0#1.offset_3| |v_ULTIMATE.start_main_#t~pre66#1_3|)) |v_#memory_int_20|)  InVars {#memory_int=|v_#memory_int_21|, ULTIMATE.start_main_~#t1923~0#1.base=|v_ULTIMATE.start_main_~#t1923~0#1.base_3|, ULTIMATE.start_main_~#t1923~0#1.offset=|v_ULTIMATE.start_main_~#t1923~0#1.offset_3|, ULTIMATE.start_main_#t~pre66#1=|v_ULTIMATE.start_main_#t~pre66#1_3|}  OutVars{#memory_int=|v_#memory_int_20|, ULTIMATE.start_main_~#t1923~0#1.base=|v_ULTIMATE.start_main_~#t1923~0#1.base_3|, ULTIMATE.start_main_~#t1923~0#1.offset=|v_ULTIMATE.start_main_~#t1923~0#1.offset_3|, ULTIMATE.start_main_#t~pre66#1=|v_ULTIMATE.start_main_#t~pre66#1_3|}  AuxVars[]  AssignedVars[#memory_int] {122#(= ~x$w_buff0_used~0 0)} is VALID
[2022-02-20 20:28:08,791 INFO  L290        TraceCheckUtils]: 56: Hoare triple {122#(= ~x$w_buff0_used~0 0)} [1239] L826-2-->P0ENTRY: Formula: (and (= v_P0Thread1of1ForFork1_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre66#1_6| v_P0Thread1of1ForFork1_thidvar0_2) (= |v_P0Thread1of1ForFork1_#in~arg#1.base_4| 0) (= |v_P0Thread1of1ForFork1_#in~arg#1.offset_4| 0))  InVars {ULTIMATE.start_main_#t~pre66#1=|v_ULTIMATE.start_main_#t~pre66#1_6|}  OutVars{P0Thread1of1ForFork1_#res#1.offset=|v_P0Thread1of1ForFork1_#res#1.offset_4|, P0Thread1of1ForFork1_#t~ite9#1=|v_P0Thread1of1ForFork1_#t~ite9#1_4|, P0Thread1of1ForFork1_#in~arg#1.base=|v_P0Thread1of1ForFork1_#in~arg#1.base_4|, P0Thread1of1ForFork1_thidvar0=v_P0Thread1of1ForFork1_thidvar0_2, P0Thread1of1ForFork1_#t~ite6#1=|v_P0Thread1of1ForFork1_#t~ite6#1_4|, P0Thread1of1ForFork1_thidvar1=v_P0Thread1of1ForFork1_thidvar1_2, P0Thread1of1ForFork1_#in~arg#1.offset=|v_P0Thread1of1ForFork1_#in~arg#1.offset_4|, P0Thread1of1ForFork1_#t~mem3#1=|v_P0Thread1of1ForFork1_#t~mem3#1_6|, P0Thread1of1ForFork1_~arg#1.base=|v_P0Thread1of1ForFork1_~arg#1.base_4|, P0Thread1of1ForFork1_#t~ite4#1=|v_P0Thread1of1ForFork1_#t~ite4#1_6|, P0Thread1of1ForFork1_~arg#1.offset=|v_P0Thread1of1ForFork1_~arg#1.offset_4|, P0Thread1of1ForFork1_#t~ite8#1=|v_P0Thread1of1ForFork1_#t~ite8#1_4|, ULTIMATE.start_main_#t~pre66#1=|v_ULTIMATE.start_main_#t~pre66#1_6|, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression#1=|v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression#1_6|, P0Thread1of1ForFork1_#res#1.base=|v_P0Thread1of1ForFork1_#res#1.base_4|, P0Thread1of1ForFork1_#t~ite7#1=|v_P0Thread1of1ForFork1_#t~ite7#1_4|, P0Thread1of1ForFork1___VERIFIER_assert_~expression#1=|v_P0Thread1of1ForFork1___VERIFIER_assert_~expression#1_6|, P0Thread1of1ForFork1_#t~ite5#1=|v_P0Thread1of1ForFork1_#t~ite5#1_4|}  AuxVars[]  AssignedVars[P0Thread1of1ForFork1_#res#1.offset, P0Thread1of1ForFork1_#t~ite9#1, P0Thread1of1ForFork1_#in~arg#1.base, P0Thread1of1ForFork1_thidvar0, P0Thread1of1ForFork1_#t~ite6#1, P0Thread1of1ForFork1_thidvar1, P0Thread1of1ForFork1_#in~arg#1.offset, P0Thread1of1ForFork1_#t~mem3#1, P0Thread1of1ForFork1_~arg#1.base, P0Thread1of1ForFork1_#t~ite4#1, P0Thread1of1ForFork1_~arg#1.offset, P0Thread1of1ForFork1_#t~ite8#1, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression#1, P0Thread1of1ForFork1_#res#1.base, P0Thread1of1ForFork1_#t~ite7#1, P0Thread1of1ForFork1___VERIFIER_assert_~expression#1, P0Thread1of1ForFork1_#t~ite5#1] {122#(= ~x$w_buff0_used~0 0)} is VALID
[2022-02-20 20:28:08,792 INFO  L290        TraceCheckUtils]: 57: Hoare triple {122#(= ~x$w_buff0_used~0 0)} [1221] P0ENTRY-->L752: Formula: (and (= |v_P0Thread1of1ForFork1_~arg#1.offset_1| |v_P0Thread1of1ForFork1_#in~arg#1.offset_1|) (= |v_P0Thread1of1ForFork1_#in~arg#1.base_1| |v_P0Thread1of1ForFork1_~arg#1.base_1|))  InVars {P0Thread1of1ForFork1_#in~arg#1.base=|v_P0Thread1of1ForFork1_#in~arg#1.base_1|, P0Thread1of1ForFork1_#in~arg#1.offset=|v_P0Thread1of1ForFork1_#in~arg#1.offset_1|}  OutVars{P0Thread1of1ForFork1_#in~arg#1.offset=|v_P0Thread1of1ForFork1_#in~arg#1.offset_1|, P0Thread1of1ForFork1_#in~arg#1.base=|v_P0Thread1of1ForFork1_#in~arg#1.base_1|, P0Thread1of1ForFork1_~arg#1.base=|v_P0Thread1of1ForFork1_~arg#1.base_1|, P0Thread1of1ForFork1_~arg#1.offset=|v_P0Thread1of1ForFork1_~arg#1.offset_1|}  AuxVars[]  AssignedVars[P0Thread1of1ForFork1_~arg#1.base, P0Thread1of1ForFork1_~arg#1.offset] {122#(= ~x$w_buff0_used~0 0)} is VALID
[2022-02-20 20:28:08,792 INFO  L290        TraceCheckUtils]: 58: Hoare triple {122#(= ~x$w_buff0_used~0 0)} [1222] L752-->L754: Formula: (= v_~__unbuffered_p0_EAX~0_1 v_~y~0_1)  InVars {~y~0=v_~y~0_1}  OutVars{~y~0=v_~y~0_1, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p0_EAX~0] {122#(= ~x$w_buff0_used~0 0)} is VALID
[2022-02-20 20:28:08,793 INFO  L290        TraceCheckUtils]: 59: Hoare triple {122#(= ~x$w_buff0_used~0 0)} [1223] L754-->P0Err0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= (ite (not (and (not (= (mod v_~x$w_buff1_used~0_399 256) 0)) (not (= (mod v_~x$w_buff0_used~0_484 256) 0)))) 1 0) |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression#1_1|) (= v_~x$w_buff0_used~0_485 v_~x$w_buff1_used~0_399) (= v_~x$w_buff0_used~0_484 1) (= v_~x$w_buff0~0_144 1) (= |v_P0Thread1of1ForFork1___VERIFIER_assert_~expression#1_1| 0) (= |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression#1_1| |v_P0Thread1of1ForFork1___VERIFIER_assert_~expression#1_1|) (= v_~x$w_buff0~0_145 v_~x$w_buff1~0_135))  InVars {~x$w_buff0~0=v_~x$w_buff0~0_145, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_485}  OutVars{~x$w_buff0~0=v_~x$w_buff0~0_144, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression#1=|v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression#1_1|, ~x$w_buff1~0=v_~x$w_buff1~0_135, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_399, P0Thread1of1ForFork1___VERIFIER_assert_~expression#1=|v_P0Thread1of1ForFork1___VERIFIER_assert_~expression#1_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_484}  AuxVars[]  AssignedVars[~x$w_buff0~0, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression#1, ~x$w_buff1~0, ~x$w_buff1_used~0, P0Thread1of1ForFork1___VERIFIER_assert_~expression#1, ~x$w_buff0_used~0] {121#false} is VALID
[2022-02-20 20:28:08,794 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2022-02-20 20:28:08,794 INFO  L144   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2022-02-20 20:28:08,794 INFO  L338   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [318936935]
[2022-02-20 20:28:08,795 INFO  L165   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [318936935] provided 1 perfect and 0 imperfect interpolant sequences
[2022-02-20 20:28:08,795 INFO  L191   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2022-02-20 20:28:08,795 INFO  L204   FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2
[2022-02-20 20:28:08,796 INFO  L118   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [382573293]
[2022-02-20 20:28:08,797 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2022-02-20 20:28:08,806 INFO  L78                 Accepts]: Start accepts. Automaton has  has 3 states, 2 states have (on average 30.0) internal successors, (60), 3 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 60
[2022-02-20 20:28:08,807 INFO  L84                 Accepts]: Finished accepts. word is accepted.
[2022-02-20 20:28:08,809 INFO  L86        InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with  has 3 states, 2 states have (on average 30.0) internal successors, (60), 3 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-02-20 20:28:08,855 INFO  L122       InductivityCheck]: Floyd-Hoare automaton has 60 edges. 60 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. 
[2022-02-20 20:28:08,856 INFO  L546      AbstractCegarLoop]: INTERPOLANT automaton has 3 states
[2022-02-20 20:28:08,856 INFO  L108   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2022-02-20 20:28:08,873 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2022-02-20 20:28:08,874 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2022-02-20 20:28:08,876 INFO  L499   CegarLoopForPetriNet]: Number of universal loopers: 99 out of 112
[2022-02-20 20:28:08,881 INFO  L92    encePairwiseOnDemand]: Start differencePairwiseOnDemand. First operand has 115 places, 110 transitions, 226 flow. Second operand  has 3 states, 3 states have (on average 100.0) internal successors, (300), 3 states have internal predecessors, (300), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-02-20 20:28:08,881 INFO  L101   encePairwiseOnDemand]: Universal subtrahend loopers provided by user.
[2022-02-20 20:28:08,881 INFO  L102   encePairwiseOnDemand]: Number of universal subtrahend loopers: 99 of 112
[2022-02-20 20:28:08,882 INFO  L74            FinitePrefix]: Start finitePrefix. Operand will be constructed on-demand
[2022-02-20 20:28:09,083 INFO  L129       PetriNetUnfolder]: 30/325 cut-off events.
[2022-02-20 20:28:09,084 INFO  L130       PetriNetUnfolder]: For 4/4 co-relation queries the response was YES.
[2022-02-20 20:28:09,085 INFO  L84            FinitePrefix]: Finished finitePrefix Result has 398 conditions, 325 events. 30/325 cut-off events. For 4/4 co-relation queries the response was YES. Maximal size of possible extension queue 15. Compared 1331 event pairs, 21 based on Foata normal form. 11/315 useless extension candidates. Maximal degree in co-relation 333. Up to 47 conditions per place. 
[2022-02-20 20:28:09,088 INFO  L132   encePairwiseOnDemand]: 107/112 looper letters, 12 selfloop transitions, 2 changer transitions 0/111 dead transitions.
[2022-02-20 20:28:09,088 INFO  L138   encePairwiseOnDemand]: Finished differencePairwiseOnDemand. Result has 115 places, 111 transitions, 259 flow
[2022-02-20 20:28:09,088 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 
[2022-02-20 20:28:09,090 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 3 states.
[2022-02-20 20:28:09,111 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 316 transitions.
[2022-02-20 20:28:09,112 INFO  L544   CegarLoopForPetriNet]: DFA transition density 0.9404761904761905
[2022-02-20 20:28:09,112 INFO  L72            ComplementDD]: Start complementDD. Operand 3 states and 316 transitions.
[2022-02-20 20:28:09,112 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 3 states and 316 transitions.
[2022-02-20 20:28:09,113 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2022-02-20 20:28:09,114 INFO  L117    ReachableStatesCopy]: Start reachableStatesCopy. Operand 3 states and 316 transitions.
[2022-02-20 20:28:09,121 INFO  L343    DoubleDeckerVisitor]: Before removal of dead ends  has 4 states, 3 states have (on average 105.33333333333333) internal successors, (316), 3 states have internal predecessors, (316), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-02-20 20:28:09,123 INFO  L131    ReachableStatesCopy]: Finished reachableStatesCopy Result  has 4 states, 4 states have (on average 112.0) internal successors, (448), 4 states have internal predecessors, (448), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-02-20 20:28:09,124 INFO  L81            ComplementDD]: Finished complementDD. Result  has 4 states, 4 states have (on average 112.0) internal successors, (448), 4 states have internal predecessors, (448), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-02-20 20:28:09,125 INFO  L186             Difference]: Start difference. First operand has 115 places, 110 transitions, 226 flow. Second operand 3 states and 316 transitions.
[2022-02-20 20:28:09,126 INFO  L82        GeneralOperation]: Start removeRedundantFlow. Operand has 115 places, 111 transitions, 259 flow
[2022-02-20 20:28:09,129 INFO  L88        GeneralOperation]: Finished removeRedundantFlow, result has has 113 places, 111 transitions, 256 flow, removed 0 selfloop flow, removed 2 redundant places.
[2022-02-20 20:28:09,132 INFO  L242             Difference]: Finished difference. Result has 113 places, 106 transitions, 220 flow
[2022-02-20 20:28:09,133 INFO  L317   CegarLoopForPetriNet]: {PETRI_ALPHABET=112, PETRI_DIFFERENCE_MINUEND_FLOW=216, PETRI_DIFFERENCE_MINUEND_PLACES=111, PETRI_DIFFERENCE_MINUEND_TRANSITIONS=106, PETRI_DIFFERENCE_SUBTRAHEND_LETTERS_WITH_MORE_CHANGERS_THAN_LOOPERS=2, PETRI_DIFFERENCE_SUBTRAHEND_LOOPER_ONLY_LETTERS=104, PETRI_DIFFERENCE_SUBTRAHEND_STATES=3, PETRI_FLOW=220, PETRI_PLACES=113, PETRI_TRANSITIONS=106}
[2022-02-20 20:28:09,136 INFO  L334   CegarLoopForPetriNet]: 115 programPoint places, -2 predicate places.
[2022-02-20 20:28:09,137 INFO  L111   iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 113 places, 106 transitions, 220 flow
[2022-02-20 20:28:09,225 INFO  L133   iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result  has 1969 states, 1966 states have (on average 2.6459816887080367) internal successors, (5202), 1968 states have internal predecessors, (5202), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-02-20 20:28:09,230 INFO  L78                 Accepts]: Start accepts. Automaton has  has 1969 states, 1966 states have (on average 2.6459816887080367) internal successors, (5202), 1968 states have internal predecessors, (5202), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 60
[2022-02-20 20:28:09,231 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2022-02-20 20:28:09,231 INFO  L470      AbstractCegarLoop]: Abstraction has has 113 places, 106 transitions, 220 flow
[2022-02-20 20:28:09,233 INFO  L471      AbstractCegarLoop]: INTERPOLANT automaton has  has 3 states, 3 states have (on average 100.0) internal successors, (300), 3 states have internal predecessors, (300), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-02-20 20:28:09,233 INFO  L246   CegarLoopForPetriNet]: Found error trace
[2022-02-20 20:28:09,233 INFO  L254   CegarLoopForPetriNet]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2022-02-20 20:28:09,233 WARN  L452      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0
[2022-02-20 20:28:09,234 INFO  L402      AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATION (and 2 more)] ===
[2022-02-20 20:28:09,234 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2022-02-20 20:28:09,234 INFO  L85        PathProgramCache]: Analyzing trace with hash 2098676324, now seen corresponding path program 1 times
[2022-02-20 20:28:09,235 INFO  L126   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2022-02-20 20:28:09,235 INFO  L338   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [164800042]
[2022-02-20 20:28:09,235 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2022-02-20 20:28:09,235 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2022-02-20 20:28:09,312 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2022-02-20 20:28:09,455 INFO  L290        TraceCheckUtils]: 0: Hoare triple {2094#true} [1205] ULTIMATE.startENTRY-->L-1: Formula: true  InVars {}  OutVars{}  AuxVars[]  AssignedVars[] {2094#true} is VALID
[2022-02-20 20:28:09,455 INFO  L290        TraceCheckUtils]: 1: Hoare triple {2094#true} [1144] L-1-->L-1-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0))  InVars {}  OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|}  AuxVars[]  AssignedVars[#NULL.offset, #NULL.base] {2094#true} is VALID
[2022-02-20 20:28:09,455 INFO  L290        TraceCheckUtils]: 2: Hoare triple {2094#true} [1210] L-1-1-->L-1-2: Formula: (= (select |v_#valid_1| 0) 0)  InVars {#valid=|v_#valid_1|}  OutVars{#valid=|v_#valid_1|}  AuxVars[]  AssignedVars[] {2094#true} is VALID
[2022-02-20 20:28:09,456 INFO  L290        TraceCheckUtils]: 3: Hoare triple {2094#true} [1214] L-1-2-->L17: Formula: (< 0 |v_#StackHeapBarrier_1|)  InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|}  OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|}  AuxVars[]  AssignedVars[] {2094#true} is VALID
[2022-02-20 20:28:09,456 INFO  L290        TraceCheckUtils]: 4: Hoare triple {2094#true} [1212] L17-->L17-1: Formula: (and (= (select |v_#valid_2| 1) 1) (= 2 (select |v_#length_1| 1)))  InVars {#length=|v_#length_1|, #valid=|v_#valid_2|}  OutVars{#length=|v_#length_1|, #valid=|v_#valid_2|}  AuxVars[]  AssignedVars[] {2094#true} is VALID
[2022-02-20 20:28:09,456 INFO  L290        TraceCheckUtils]: 5: Hoare triple {2094#true} [1179] L17-1-->L17-2: Formula: (= 48 (select (select |v_#memory_int_17| 1) 0))  InVars {#memory_int=|v_#memory_int_17|}  OutVars{#memory_int=|v_#memory_int_17|}  AuxVars[]  AssignedVars[] {2094#true} is VALID
[2022-02-20 20:28:09,456 INFO  L290        TraceCheckUtils]: 6: Hoare triple {2094#true} [1118] L17-2-->L17-3: Formula: (= (select (select |v_#memory_int_18| 1) 1) 0)  InVars {#memory_int=|v_#memory_int_18|}  OutVars{#memory_int=|v_#memory_int_18|}  AuxVars[]  AssignedVars[] {2094#true} is VALID
[2022-02-20 20:28:09,456 INFO  L290        TraceCheckUtils]: 7: Hoare triple {2094#true} [1186] L17-3-->L17-4: Formula: (and (= (select |v_#valid_3| 2) 1) (= 38 (select |v_#length_2| 2)))  InVars {#length=|v_#length_2|, #valid=|v_#valid_3|}  OutVars{#length=|v_#length_2|, #valid=|v_#valid_3|}  AuxVars[]  AssignedVars[] {2094#true} is VALID
[2022-02-20 20:28:09,457 INFO  L290        TraceCheckUtils]: 8: Hoare triple {2094#true} [1117] L17-4-->L710: Formula: (= v_~__unbuffered_cnt~0_5 0)  InVars {}  OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_5}  AuxVars[]  AssignedVars[~__unbuffered_cnt~0] {2094#true} is VALID
[2022-02-20 20:28:09,457 INFO  L290        TraceCheckUtils]: 9: Hoare triple {2094#true} [1172] L710-->L712: Formula: (= v_~__unbuffered_p0_EAX~0_2 0)  InVars {}  OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_2}  AuxVars[]  AssignedVars[~__unbuffered_p0_EAX~0] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,457 INFO  L290        TraceCheckUtils]: 10: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1167] L712-->L713: Formula: (= v_~__unbuffered_p1_EAX~0_2 0)  InVars {}  OutVars{~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_2}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX~0] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,458 INFO  L290        TraceCheckUtils]: 11: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1192] L713-->L714: Formula: (= v_~__unbuffered_p1_EAX$flush_delayed~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$flush_delayed~0=v_~__unbuffered_p1_EAX$flush_delayed~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$flush_delayed~0] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,458 INFO  L290        TraceCheckUtils]: 12: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1115] L714-->L715: Formula: (= v_~__unbuffered_p1_EAX$mem_tmp~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$mem_tmp~0=v_~__unbuffered_p1_EAX$mem_tmp~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$mem_tmp~0] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,459 INFO  L290        TraceCheckUtils]: 13: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1121] L715-->L716: Formula: (= v_~__unbuffered_p1_EAX$r_buff0_thd0~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$r_buff0_thd0~0=v_~__unbuffered_p1_EAX$r_buff0_thd0~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$r_buff0_thd0~0] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,459 INFO  L290        TraceCheckUtils]: 14: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1148] L716-->L717: Formula: (= v_~__unbuffered_p1_EAX$r_buff0_thd1~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$r_buff0_thd1~0=v_~__unbuffered_p1_EAX$r_buff0_thd1~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$r_buff0_thd1~0] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,460 INFO  L290        TraceCheckUtils]: 15: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1128] L717-->L718: Formula: (= v_~__unbuffered_p1_EAX$r_buff0_thd2~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$r_buff0_thd2~0=v_~__unbuffered_p1_EAX$r_buff0_thd2~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$r_buff0_thd2~0] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,460 INFO  L290        TraceCheckUtils]: 16: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1184] L718-->L719: Formula: (= v_~__unbuffered_p1_EAX$r_buff1_thd0~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$r_buff1_thd0~0=v_~__unbuffered_p1_EAX$r_buff1_thd0~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$r_buff1_thd0~0] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,461 INFO  L290        TraceCheckUtils]: 17: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1174] L719-->L720: Formula: (= v_~__unbuffered_p1_EAX$r_buff1_thd1~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$r_buff1_thd1~0=v_~__unbuffered_p1_EAX$r_buff1_thd1~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$r_buff1_thd1~0] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,461 INFO  L290        TraceCheckUtils]: 18: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1133] L720-->L721: Formula: (= v_~__unbuffered_p1_EAX$r_buff1_thd2~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$r_buff1_thd2~0=v_~__unbuffered_p1_EAX$r_buff1_thd2~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$r_buff1_thd2~0] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,461 INFO  L290        TraceCheckUtils]: 19: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1180] L721-->L722: Formula: (= v_~__unbuffered_p1_EAX$read_delayed~0_2 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$read_delayed~0=v_~__unbuffered_p1_EAX$read_delayed~0_2}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$read_delayed~0] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,462 INFO  L290        TraceCheckUtils]: 20: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1166] L722-->L723: Formula: (and (= v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_2 0) (= v_~__unbuffered_p1_EAX$read_delayed_var~0.base_2 0))  InVars {}  OutVars{~__unbuffered_p1_EAX$read_delayed_var~0.base=v_~__unbuffered_p1_EAX$read_delayed_var~0.base_2, ~__unbuffered_p1_EAX$read_delayed_var~0.offset=v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_2}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$read_delayed_var~0.base, ~__unbuffered_p1_EAX$read_delayed_var~0.offset] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,462 INFO  L290        TraceCheckUtils]: 21: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1219] L723-->L724: Formula: (= v_~__unbuffered_p1_EAX$w_buff0~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$w_buff0~0=v_~__unbuffered_p1_EAX$w_buff0~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$w_buff0~0] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,463 INFO  L290        TraceCheckUtils]: 22: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1129] L724-->L725: Formula: (= v_~__unbuffered_p1_EAX$w_buff0_used~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$w_buff0_used~0=v_~__unbuffered_p1_EAX$w_buff0_used~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$w_buff0_used~0] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,463 INFO  L290        TraceCheckUtils]: 23: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1116] L725-->L726: Formula: (= v_~__unbuffered_p1_EAX$w_buff1~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$w_buff1~0=v_~__unbuffered_p1_EAX$w_buff1~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$w_buff1~0] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,463 INFO  L290        TraceCheckUtils]: 24: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1183] L726-->L727: Formula: (= v_~__unbuffered_p1_EAX$w_buff1_used~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$w_buff1_used~0=v_~__unbuffered_p1_EAX$w_buff1_used~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$w_buff1_used~0] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,464 INFO  L290        TraceCheckUtils]: 25: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1123] L727-->L728: Formula: (= v_~main$tmp_guard0~0_1 0)  InVars {}  OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_1}  AuxVars[]  AssignedVars[~main$tmp_guard0~0] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,465 INFO  L290        TraceCheckUtils]: 26: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1168] L728-->L730: Formula: (= v_~main$tmp_guard1~0_1 0)  InVars {}  OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_1}  AuxVars[]  AssignedVars[~main$tmp_guard1~0] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,465 INFO  L290        TraceCheckUtils]: 27: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1159] L730-->L730-1: Formula: (and (= 3 |v_~#x~0.base_14|) (= |v_~#x~0.offset_14| 0))  InVars {}  OutVars{~#x~0.base=|v_~#x~0.base_14|, ~#x~0.offset=|v_~#x~0.offset_14|}  AuxVars[]  AssignedVars[~#x~0.offset, ~#x~0.base] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,465 INFO  L290        TraceCheckUtils]: 28: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1200] L730-1-->L730-2: Formula: (and (= (select |v_#valid_4| 3) 1) (= 4 (select |v_#length_3| 3)))  InVars {#length=|v_#length_3|, #valid=|v_#valid_4|}  OutVars{#length=|v_#length_3|, #valid=|v_#valid_4|}  AuxVars[]  AssignedVars[] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,466 INFO  L290        TraceCheckUtils]: 29: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1155] L730-2-->L730-3: Formula: (= (select (select |v_#memory_int_19| |v_~#x~0.base_15|) |v_~#x~0.offset_15|) 0)  InVars {~#x~0.base=|v_~#x~0.base_15|, #memory_int=|v_#memory_int_19|, ~#x~0.offset=|v_~#x~0.offset_15|}  OutVars{~#x~0.base=|v_~#x~0.base_15|, #memory_int=|v_#memory_int_19|, ~#x~0.offset=|v_~#x~0.offset_15|}  AuxVars[]  AssignedVars[] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,466 INFO  L290        TraceCheckUtils]: 30: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1131] L730-3-->L732: Formula: (= 0 v_~x$flush_delayed~0_5)  InVars {}  OutVars{~x$flush_delayed~0=v_~x$flush_delayed~0_5}  AuxVars[]  AssignedVars[~x$flush_delayed~0] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,467 INFO  L290        TraceCheckUtils]: 31: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1132] L732-->L733: Formula: (= v_~x$mem_tmp~0_3 0)  InVars {}  OutVars{~x$mem_tmp~0=v_~x$mem_tmp~0_3}  AuxVars[]  AssignedVars[~x$mem_tmp~0] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,467 INFO  L290        TraceCheckUtils]: 32: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1190] L733-->L734: Formula: (= v_~x$r_buff0_thd0~0_2 0)  InVars {}  OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_2}  AuxVars[]  AssignedVars[~x$r_buff0_thd0~0] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,467 INFO  L290        TraceCheckUtils]: 33: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1191] L734-->L735: Formula: (= v_~x$r_buff0_thd1~0_15 0)  InVars {}  OutVars{~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_15}  AuxVars[]  AssignedVars[~x$r_buff0_thd1~0] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,468 INFO  L290        TraceCheckUtils]: 34: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1211] L735-->L736: Formula: (= v_~x$r_buff0_thd2~0_60 0)  InVars {}  OutVars{~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_60}  AuxVars[]  AssignedVars[~x$r_buff0_thd2~0] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,468 INFO  L290        TraceCheckUtils]: 35: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1139] L736-->L737: Formula: (= v_~x$r_buff1_thd0~0_2 0)  InVars {}  OutVars{~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_2}  AuxVars[]  AssignedVars[~x$r_buff1_thd0~0] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,469 INFO  L290        TraceCheckUtils]: 36: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1130] L737-->L738: Formula: (= v_~x$r_buff1_thd1~0_10 0)  InVars {}  OutVars{~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_10}  AuxVars[]  AssignedVars[~x$r_buff1_thd1~0] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,469 INFO  L290        TraceCheckUtils]: 37: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1160] L738-->L739: Formula: (= v_~x$r_buff1_thd2~0_42 0)  InVars {}  OutVars{~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_42}  AuxVars[]  AssignedVars[~x$r_buff1_thd2~0] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,469 INFO  L290        TraceCheckUtils]: 38: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1111] L739-->L740: Formula: (= v_~x$read_delayed~0_1 0)  InVars {}  OutVars{~x$read_delayed~0=v_~x$read_delayed~0_1}  AuxVars[]  AssignedVars[~x$read_delayed~0] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,470 INFO  L290        TraceCheckUtils]: 39: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1149] L740-->L741: Formula: (and (= v_~x$read_delayed_var~0.base_1 0) (= v_~x$read_delayed_var~0.offset_1 0))  InVars {}  OutVars{~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_1, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_1}  AuxVars[]  AssignedVars[~x$read_delayed_var~0.offset, ~x$read_delayed_var~0.base] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,470 INFO  L290        TraceCheckUtils]: 40: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1207] L741-->L742: Formula: (= 0 v_~x$w_buff0~0_16)  InVars {}  OutVars{~x$w_buff0~0=v_~x$w_buff0~0_16}  AuxVars[]  AssignedVars[~x$w_buff0~0] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,470 INFO  L290        TraceCheckUtils]: 41: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1140] L742-->L743: Formula: (= v_~x$w_buff0_used~0_87 0)  InVars {}  OutVars{~x$w_buff0_used~0=v_~x$w_buff0_used~0_87}  AuxVars[]  AssignedVars[~x$w_buff0_used~0] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,471 INFO  L290        TraceCheckUtils]: 42: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1163] L743-->L744: Formula: (= 0 v_~x$w_buff1~0_13)  InVars {}  OutVars{~x$w_buff1~0=v_~x$w_buff1~0_13}  AuxVars[]  AssignedVars[~x$w_buff1~0] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,471 INFO  L290        TraceCheckUtils]: 43: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1141] L744-->L746: Formula: (= v_~x$w_buff1_used~0_50 0)  InVars {}  OutVars{~x$w_buff1_used~0=v_~x$w_buff1_used~0_50}  AuxVars[]  AssignedVars[~x$w_buff1_used~0] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,472 INFO  L290        TraceCheckUtils]: 44: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1182] L746-->L747: Formula: (= v_~y~0_3 0)  InVars {}  OutVars{~y~0=v_~y~0_3}  AuxVars[]  AssignedVars[~y~0] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,472 INFO  L290        TraceCheckUtils]: 45: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1119] L747-->L748: Formula: (= v_~weak$$choice0~0_14 0)  InVars {}  OutVars{~weak$$choice0~0=v_~weak$$choice0~0_14}  AuxVars[]  AssignedVars[~weak$$choice0~0] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,474 INFO  L290        TraceCheckUtils]: 46: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1142] L748-->L749: Formula: (= v_~weak$$choice1~0_5 0)  InVars {}  OutVars{~weak$$choice1~0=v_~weak$$choice1~0_5}  AuxVars[]  AssignedVars[~weak$$choice1~0] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,474 INFO  L290        TraceCheckUtils]: 47: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1113] L749-->L-1-3: Formula: (= v_~weak$$choice2~0_15 0)  InVars {}  OutVars{~weak$$choice2~0=v_~weak$$choice2~0_15}  AuxVars[]  AssignedVars[~weak$$choice2~0] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,475 INFO  L290        TraceCheckUtils]: 48: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1218] L-1-3-->L-1-4: Formula: true  InVars {}  OutVars{}  AuxVars[]  AssignedVars[] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,475 INFO  L290        TraceCheckUtils]: 49: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1147] L-1-4-->L-1-5: Formula: true  InVars {}  OutVars{}  AuxVars[]  AssignedVars[] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,475 INFO  L290        TraceCheckUtils]: 50: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1125] L-1-5-->L-1-6: Formula: true  InVars {}  OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_1|}  AuxVars[]  AssignedVars[ULTIMATE.start_main_#res#1] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,476 INFO  L290        TraceCheckUtils]: 51: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1196] L-1-6-->L825: Formula: true  InVars {}  OutVars{ULTIMATE.start_main_#t~nondet77#1=|v_ULTIMATE.start_main_#t~nondet77#1_1|, ULTIMATE.start_main_#t~ite74#1=|v_ULTIMATE.start_main_#t~ite74#1_1|, ULTIMATE.start_main_#t~mem70#1=|v_ULTIMATE.start_main_#t~mem70#1_1|, ULTIMATE.start_main_#t~ite72#1=|v_ULTIMATE.start_main_#t~ite72#1_1|, ULTIMATE.start_main_~#t1923~0#1.base=|v_ULTIMATE.start_main_~#t1923~0#1.base_1|, ULTIMATE.start_main_#t~ite76#1=|v_ULTIMATE.start_main_#t~ite76#1_1|, ULTIMATE.start_main_#t~ite80#1=|v_ULTIMATE.start_main_#t~ite80#1_1|, ULTIMATE.start_main_#t~pre68#1=|v_ULTIMATE.start_main_#t~pre68#1_1|, ULTIMATE.start_main_#t~ite71#1=|v_ULTIMATE.start_main_#t~ite71#1_1|, ULTIMATE.start_main_#t~pre66#1=|v_ULTIMATE.start_main_#t~pre66#1_1|, ULTIMATE.start_main_#t~ite73#1=|v_ULTIMATE.start_main_#t~ite73#1_1|, ULTIMATE.start_main_#t~ite75#1=|v_ULTIMATE.start_main_#t~ite75#1_1|, ULTIMATE.start_main_~#t1924~0#1.offset=|v_ULTIMATE.start_main_~#t1924~0#1.offset_1|, ULTIMATE.start_main_~#t1923~0#1.offset=|v_ULTIMATE.start_main_~#t1923~0#1.offset_1|, ULTIMATE.start_main_#t~nondet69#1=|v_ULTIMATE.start_main_#t~nondet69#1_1|, ULTIMATE.start_main_#t~ite79#1=|v_ULTIMATE.start_main_#t~ite79#1_1|, ULTIMATE.start_main_~#t1924~0#1.base=|v_ULTIMATE.start_main_~#t1924~0#1.base_1|, ULTIMATE.start_main_#t~nondet67#1=|v_ULTIMATE.start_main_#t~nondet67#1_1|, ULTIMATE.start_main_#t~mem78#1=|v_ULTIMATE.start_main_#t~mem78#1_1|}  AuxVars[]  AssignedVars[ULTIMATE.start_main_#t~nondet77#1, ULTIMATE.start_main_#t~ite74#1, ULTIMATE.start_main_#t~mem70#1, ULTIMATE.start_main_#t~ite72#1, ULTIMATE.start_main_~#t1923~0#1.base, ULTIMATE.start_main_#t~ite76#1, ULTIMATE.start_main_#t~ite80#1, ULTIMATE.start_main_#t~pre68#1, ULTIMATE.start_main_#t~ite71#1, ULTIMATE.start_main_#t~pre66#1, ULTIMATE.start_main_#t~ite73#1, ULTIMATE.start_main_#t~ite75#1, ULTIMATE.start_main_~#t1924~0#1.offset, ULTIMATE.start_main_~#t1923~0#1.offset, ULTIMATE.start_main_#t~nondet69#1, ULTIMATE.start_main_#t~ite79#1, ULTIMATE.start_main_~#t1924~0#1.base, ULTIMATE.start_main_#t~nondet67#1, ULTIMATE.start_main_#t~mem78#1] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,476 INFO  L290        TraceCheckUtils]: 52: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1209] L825-->L825-1: Formula: (and (= |v_ULTIMATE.start_main_~#t1923~0#1.offset_2| 0) (= (store |v_#length_5| |v_ULTIMATE.start_main_~#t1923~0#1.base_2| 4) |v_#length_4|) (not (= |v_ULTIMATE.start_main_~#t1923~0#1.base_2| 0)) (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t1923~0#1.base_2|) (= |v_#valid_5| (store |v_#valid_6| |v_ULTIMATE.start_main_~#t1923~0#1.base_2| 1)) (= (select |v_#valid_6| |v_ULTIMATE.start_main_~#t1923~0#1.base_2|) 0))  InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_5|, #valid=|v_#valid_6|}  OutVars{ULTIMATE.start_main_~#t1923~0#1.base=|v_ULTIMATE.start_main_~#t1923~0#1.base_2|, ULTIMATE.start_main_~#t1923~0#1.offset=|v_ULTIMATE.start_main_~#t1923~0#1.offset_2|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_5|}  AuxVars[]  AssignedVars[#valid, ULTIMATE.start_main_~#t1923~0#1.base, ULTIMATE.start_main_~#t1923~0#1.offset, #length] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,477 INFO  L290        TraceCheckUtils]: 53: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1124] L825-1-->L826: Formula: (= |v_ULTIMATE.start_main_#t~pre66#1_2| |v_#pthreadsForks_1|)  InVars {#pthreadsForks=|v_#pthreadsForks_1|}  OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre66#1=|v_ULTIMATE.start_main_#t~pre66#1_2|}  AuxVars[]  AssignedVars[ULTIMATE.start_main_#t~pre66#1] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,478 INFO  L290        TraceCheckUtils]: 54: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1152] L826-->L826-1: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|)  InVars {#pthreadsForks=|v_#pthreadsForks_3|}  OutVars{#pthreadsForks=|v_#pthreadsForks_2|}  AuxVars[]  AssignedVars[#pthreadsForks] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,478 INFO  L290        TraceCheckUtils]: 55: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1153] L826-1-->L826-2: Formula: (= (store |v_#memory_int_21| |v_ULTIMATE.start_main_~#t1923~0#1.base_3| (store (select |v_#memory_int_21| |v_ULTIMATE.start_main_~#t1923~0#1.base_3|) |v_ULTIMATE.start_main_~#t1923~0#1.offset_3| |v_ULTIMATE.start_main_#t~pre66#1_3|)) |v_#memory_int_20|)  InVars {#memory_int=|v_#memory_int_21|, ULTIMATE.start_main_~#t1923~0#1.base=|v_ULTIMATE.start_main_~#t1923~0#1.base_3|, ULTIMATE.start_main_~#t1923~0#1.offset=|v_ULTIMATE.start_main_~#t1923~0#1.offset_3|, ULTIMATE.start_main_#t~pre66#1=|v_ULTIMATE.start_main_#t~pre66#1_3|}  OutVars{#memory_int=|v_#memory_int_20|, ULTIMATE.start_main_~#t1923~0#1.base=|v_ULTIMATE.start_main_~#t1923~0#1.base_3|, ULTIMATE.start_main_~#t1923~0#1.offset=|v_ULTIMATE.start_main_~#t1923~0#1.offset_3|, ULTIMATE.start_main_#t~pre66#1=|v_ULTIMATE.start_main_#t~pre66#1_3|}  AuxVars[]  AssignedVars[#memory_int] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,479 INFO  L290        TraceCheckUtils]: 56: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1239] L826-2-->P0ENTRY: Formula: (and (= v_P0Thread1of1ForFork1_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre66#1_6| v_P0Thread1of1ForFork1_thidvar0_2) (= |v_P0Thread1of1ForFork1_#in~arg#1.base_4| 0) (= |v_P0Thread1of1ForFork1_#in~arg#1.offset_4| 0))  InVars {ULTIMATE.start_main_#t~pre66#1=|v_ULTIMATE.start_main_#t~pre66#1_6|}  OutVars{P0Thread1of1ForFork1_#res#1.offset=|v_P0Thread1of1ForFork1_#res#1.offset_4|, P0Thread1of1ForFork1_#t~ite9#1=|v_P0Thread1of1ForFork1_#t~ite9#1_4|, P0Thread1of1ForFork1_#in~arg#1.base=|v_P0Thread1of1ForFork1_#in~arg#1.base_4|, P0Thread1of1ForFork1_thidvar0=v_P0Thread1of1ForFork1_thidvar0_2, P0Thread1of1ForFork1_#t~ite6#1=|v_P0Thread1of1ForFork1_#t~ite6#1_4|, P0Thread1of1ForFork1_thidvar1=v_P0Thread1of1ForFork1_thidvar1_2, P0Thread1of1ForFork1_#in~arg#1.offset=|v_P0Thread1of1ForFork1_#in~arg#1.offset_4|, P0Thread1of1ForFork1_#t~mem3#1=|v_P0Thread1of1ForFork1_#t~mem3#1_6|, P0Thread1of1ForFork1_~arg#1.base=|v_P0Thread1of1ForFork1_~arg#1.base_4|, P0Thread1of1ForFork1_#t~ite4#1=|v_P0Thread1of1ForFork1_#t~ite4#1_6|, P0Thread1of1ForFork1_~arg#1.offset=|v_P0Thread1of1ForFork1_~arg#1.offset_4|, P0Thread1of1ForFork1_#t~ite8#1=|v_P0Thread1of1ForFork1_#t~ite8#1_4|, ULTIMATE.start_main_#t~pre66#1=|v_ULTIMATE.start_main_#t~pre66#1_6|, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression#1=|v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression#1_6|, P0Thread1of1ForFork1_#res#1.base=|v_P0Thread1of1ForFork1_#res#1.base_4|, P0Thread1of1ForFork1_#t~ite7#1=|v_P0Thread1of1ForFork1_#t~ite7#1_4|, P0Thread1of1ForFork1___VERIFIER_assert_~expression#1=|v_P0Thread1of1ForFork1___VERIFIER_assert_~expression#1_6|, P0Thread1of1ForFork1_#t~ite5#1=|v_P0Thread1of1ForFork1_#t~ite5#1_4|}  AuxVars[]  AssignedVars[P0Thread1of1ForFork1_#res#1.offset, P0Thread1of1ForFork1_#t~ite9#1, P0Thread1of1ForFork1_#in~arg#1.base, P0Thread1of1ForFork1_thidvar0, P0Thread1of1ForFork1_#t~ite6#1, P0Thread1of1ForFork1_thidvar1, P0Thread1of1ForFork1_#in~arg#1.offset, P0Thread1of1ForFork1_#t~mem3#1, P0Thread1of1ForFork1_~arg#1.base, P0Thread1of1ForFork1_#t~ite4#1, P0Thread1of1ForFork1_~arg#1.offset, P0Thread1of1ForFork1_#t~ite8#1, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression#1, P0Thread1of1ForFork1_#res#1.base, P0Thread1of1ForFork1_#t~ite7#1, P0Thread1of1ForFork1___VERIFIER_assert_~expression#1, P0Thread1of1ForFork1_#t~ite5#1] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,480 INFO  L290        TraceCheckUtils]: 57: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1138] L826-3-->L826-4: Formula: true  InVars {}  OutVars{ULTIMATE.start_main_#t~pre66#1=|v_ULTIMATE.start_main_#t~pre66#1_4|}  AuxVars[]  AssignedVars[ULTIMATE.start_main_#t~pre66#1] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,481 INFO  L290        TraceCheckUtils]: 58: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1158] L826-4-->L827: Formula: true  InVars {}  OutVars{ULTIMATE.start_main_#t~nondet67#1=|v_ULTIMATE.start_main_#t~nondet67#1_2|}  AuxVars[]  AssignedVars[ULTIMATE.start_main_#t~nondet67#1] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,491 INFO  L290        TraceCheckUtils]: 59: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1220] L827-->L827-1: Formula: (and (= |v_#length_6| (store |v_#length_7| |v_ULTIMATE.start_main_~#t1924~0#1.base_2| 4)) (= |v_ULTIMATE.start_main_~#t1924~0#1.offset_2| 0) (= |v_#valid_7| (store |v_#valid_8| |v_ULTIMATE.start_main_~#t1924~0#1.base_2| 1)) (< |v_#StackHeapBarrier_3| |v_ULTIMATE.start_main_~#t1924~0#1.base_2|) (not (= |v_ULTIMATE.start_main_~#t1924~0#1.base_2| 0)) (= (select |v_#valid_8| |v_ULTIMATE.start_main_~#t1924~0#1.base_2|) 0))  InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_7|, #valid=|v_#valid_8|}  OutVars{ULTIMATE.start_main_~#t1924~0#1.offset=|v_ULTIMATE.start_main_~#t1924~0#1.offset_2|, #StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_6|, ULTIMATE.start_main_~#t1924~0#1.base=|v_ULTIMATE.start_main_~#t1924~0#1.base_2|, #valid=|v_#valid_7|}  AuxVars[]  AssignedVars[#valid, ULTIMATE.start_main_~#t1924~0#1.offset, #length, ULTIMATE.start_main_~#t1924~0#1.base] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,494 INFO  L290        TraceCheckUtils]: 60: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1206] L827-1-->L828: Formula: (= |v_ULTIMATE.start_main_#t~pre68#1_2| |v_#pthreadsForks_4|)  InVars {#pthreadsForks=|v_#pthreadsForks_4|}  OutVars{#pthreadsForks=|v_#pthreadsForks_4|, ULTIMATE.start_main_#t~pre68#1=|v_ULTIMATE.start_main_#t~pre68#1_2|}  AuxVars[]  AssignedVars[ULTIMATE.start_main_#t~pre68#1] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,495 INFO  L290        TraceCheckUtils]: 61: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1208] L828-->L828-1: Formula: (= (+ 1 |v_#pthreadsForks_6|) |v_#pthreadsForks_5|)  InVars {#pthreadsForks=|v_#pthreadsForks_6|}  OutVars{#pthreadsForks=|v_#pthreadsForks_5|}  AuxVars[]  AssignedVars[#pthreadsForks] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,495 INFO  L290        TraceCheckUtils]: 62: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1143] L828-1-->L828-2: Formula: (= (store |v_#memory_int_23| |v_ULTIMATE.start_main_~#t1924~0#1.base_3| (store (select |v_#memory_int_23| |v_ULTIMATE.start_main_~#t1924~0#1.base_3|) |v_ULTIMATE.start_main_~#t1924~0#1.offset_3| |v_ULTIMATE.start_main_#t~pre68#1_3|)) |v_#memory_int_22|)  InVars {#memory_int=|v_#memory_int_23|, ULTIMATE.start_main_~#t1924~0#1.offset=|v_ULTIMATE.start_main_~#t1924~0#1.offset_3|, ULTIMATE.start_main_#t~pre68#1=|v_ULTIMATE.start_main_#t~pre68#1_3|, ULTIMATE.start_main_~#t1924~0#1.base=|v_ULTIMATE.start_main_~#t1924~0#1.base_3|}  OutVars{#memory_int=|v_#memory_int_22|, ULTIMATE.start_main_~#t1924~0#1.offset=|v_ULTIMATE.start_main_~#t1924~0#1.offset_3|, ULTIMATE.start_main_#t~pre68#1=|v_ULTIMATE.start_main_#t~pre68#1_3|, ULTIMATE.start_main_~#t1924~0#1.base=|v_ULTIMATE.start_main_~#t1924~0#1.base_3|}  AuxVars[]  AssignedVars[#memory_int] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,496 INFO  L290        TraceCheckUtils]: 63: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1237] L828-2-->P1ENTRY: Formula: (and (= v_P1Thread1of1ForFork0_thidvar2_2 0) (= |v_ULTIMATE.start_main_#t~pre68#1_6| v_P1Thread1of1ForFork0_thidvar0_2) (= |v_P1Thread1of1ForFork0_#in~arg.offset_4| 0) (= |v_P1Thread1of1ForFork0_#in~arg.base_4| 0) (= v_P1Thread1of1ForFork0_thidvar1_2 0))  InVars {ULTIMATE.start_main_#t~pre68#1=|v_ULTIMATE.start_main_#t~pre68#1_6|}  OutVars{P1Thread1of1ForFork0_#t~ite47=|v_P1Thread1of1ForFork0_#t~ite47_6|, P1Thread1of1ForFork0_#t~ite24=|v_P1Thread1of1ForFork0_#t~ite24_4|, P1Thread1of1ForFork0_#t~ite22=|v_P1Thread1of1ForFork0_#t~ite22_6|, P1Thread1of1ForFork0_#t~ite45=|v_P1Thread1of1ForFork0_#t~ite45_6|, P1Thread1of1ForFork0_#t~ite28=|v_P1Thread1of1ForFork0_#t~ite28_6|, P1Thread1of1ForFork0_#t~ite26=|v_P1Thread1of1ForFork0_#t~ite26_6|, P1Thread1of1ForFork0_#t~ite49=|v_P1Thread1of1ForFork0_#t~ite49_4|, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_4|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_4|, P1Thread1of1ForFork0_#t~ite43=|v_P1Thread1of1ForFork0_#t~ite43_6|, P1Thread1of1ForFork0_#t~ite20=|v_P1Thread1of1ForFork0_#t~ite20_6|, P1Thread1of1ForFork0_#t~ite60=|v_P1Thread1of1ForFork0_#t~ite60_6|, P1Thread1of1ForFork0_#t~ite41=|v_P1Thread1of1ForFork0_#t~ite41_6|, P1Thread1of1ForFork0_#t~nondet10=|v_P1Thread1of1ForFork0_#t~nondet10_6|, P1Thread1of1ForFork0_#t~mem56=|v_P1Thread1of1ForFork0_#t~mem56_4|, P1Thread1of1ForFork0_#t~mem14=|v_P1Thread1of1ForFork0_#t~mem14_6|, P1Thread1of1ForFork0_#t~mem12=|v_P1Thread1of1ForFork0_#t~mem12_4|, P1Thread1of1ForFork0_#t~ite36=|v_P1Thread1of1ForFork0_#t~ite36_6|, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_4|, P1Thread1of1ForFork0_#t~ite34=|v_P1Thread1of1ForFork0_#t~ite34_4|, P1Thread1of1ForFork0_#t~ite55=|v_P1Thread1of1ForFork0_#t~ite55_4|, P1Thread1of1ForFork0_#t~ite38=|v_P1Thread1of1ForFork0_#t~ite38_6|, P1Thread1of1ForFork0_#t~ite17=|v_P1Thread1of1ForFork0_#t~ite17_6|, P1Thread1of1ForFork0_#t~ite53=|v_P1Thread1of1ForFork0_#t~ite53_6|, P1Thread1of1ForFork0_#t~ite32=|v_P1Thread1of1ForFork0_#t~ite32_6|, P1Thread1of1ForFork0_#t~ite30=|v_P1Thread1of1ForFork0_#t~ite30_6|, P1Thread1of1ForFork0_#t~ite51=|v_P1Thread1of1ForFork0_#t~ite51_6|, P1Thread1of1ForFork0_thidvar2=v_P1Thread1of1ForFork0_thidvar2_2, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_4|, P1Thread1of1ForFork0_#t~ite46=|v_P1Thread1of1ForFork0_#t~ite46_6|, P1Thread1of1ForFork0_#t~ite25=|v_P1Thread1of1ForFork0_#t~ite25_6|, P1Thread1of1ForFork0_#t~ite23=|v_P1Thread1of1ForFork0_#t~ite23_6|, P1Thread1of1ForFork0_#t~ite44=|v_P1Thread1of1ForFork0_#t~ite44_4|, P1Thread1of1ForFork0_#t~ite29=|v_P1Thread1of1ForFork0_#t~ite29_4|, P1Thread1of1ForFork0_#t~ite27=|v_P1Thread1of1ForFork0_#t~ite27_6|, P1Thread1of1ForFork0_#t~ite48=|v_P1Thread1of1ForFork0_#t~ite48_6|, P1Thread1of1ForFork0_#t~nondet13=|v_P1Thread1of1ForFork0_#t~nondet13_6|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_4|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_4|, ULTIMATE.start_main_#t~pre68#1=|v_ULTIMATE.start_main_#t~pre68#1_6|, P1Thread1of1ForFork0_thidvar1=v_P1Thread1of1ForFork0_thidvar1_2, P1Thread1of1ForFork0_#t~ite42=|v_P1Thread1of1ForFork0_#t~ite42_6|, P1Thread1of1ForFork0_#t~ite21=|v_P1Thread1of1ForFork0_#t~ite21_6|, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_4|, P1Thread1of1ForFork0_#t~ite61=|v_P1Thread1of1ForFork0_#t~ite61_4|, P1Thread1of1ForFork0_#t~ite40=|v_P1Thread1of1ForFork0_#t~ite40_6|, P1Thread1of1ForFork0_#t~nondet11=|v_P1Thread1of1ForFork0_#t~nondet11_6|, P1Thread1of1ForFork0_#t~mem57=|v_P1Thread1of1ForFork0_#t~mem57_6|, P1Thread1of1ForFork0_#t~mem59=|v_P1Thread1of1ForFork0_#t~mem59_6|, P1Thread1of1ForFork0_~arg.base=v_P1Thread1of1ForFork0_~arg.base_4, P1Thread1of1ForFork0_#t~mem15=|v_P1Thread1of1ForFork0_#t~mem15_6|, P1Thread1of1ForFork0_#t~ite58=|v_P1Thread1of1ForFork0_#t~ite58_4|, P1Thread1of1ForFork0_#t~ite35=|v_P1Thread1of1ForFork0_#t~ite35_6|, P1Thread1of1ForFork0_#t~ite33=|v_P1Thread1of1ForFork0_#t~ite33_6|, P1Thread1of1ForFork0_#t~ite16=|v_P1Thread1of1ForFork0_#t~ite16_6|, P1Thread1of1ForFork0_#t~ite39=|v_P1Thread1of1ForFork0_#t~ite39_4|, P1Thread1of1ForFork0_#t~ite37=|v_P1Thread1of1ForFork0_#t~ite37_6|, P1Thread1of1ForFork0_#t~ite18=|v_P1Thread1of1ForFork0_#t~ite18_6|, P1Thread1of1ForFork0_#t~ite50=|v_P1Thread1of1ForFork0_#t~ite50_6|, P1Thread1of1ForFork0_~arg.offset=v_P1Thread1of1ForFork0_~arg.offset_4, P1Thread1of1ForFork0_#t~ite54=|v_P1Thread1of1ForFork0_#t~ite54_6|, P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_6|, P1Thread1of1ForFork0_thidvar0=v_P1Thread1of1ForFork0_thidvar0_2, P1Thread1of1ForFork0_#t~ite52=|v_P1Thread1of1ForFork0_#t~ite52_6|, P1Thread1of1ForFork0_#t~mem19=|v_P1Thread1of1ForFork0_#t~mem19_6|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_4|}  AuxVars[]  AssignedVars[P1Thread1of1ForFork0_#t~ite47, P1Thread1of1ForFork0_#t~ite24, P1Thread1of1ForFork0_#t~ite22, P1Thread1of1ForFork0_#t~ite45, P1Thread1of1ForFork0_#t~ite28, P1Thread1of1ForFork0_#t~ite26, P1Thread1of1ForFork0_#t~ite49, P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite43, P1Thread1of1ForFork0_#t~ite20, P1Thread1of1ForFork0_#t~ite60, P1Thread1of1ForFork0_#t~ite41, P1Thread1of1ForFork0_#t~nondet10, P1Thread1of1ForFork0_#t~mem56, P1Thread1of1ForFork0_#t~mem14, P1Thread1of1ForFork0_#t~mem12, P1Thread1of1ForFork0_#t~ite36, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#t~ite34, P1Thread1of1ForFork0_#t~ite55, P1Thread1of1ForFork0_#t~ite38, P1Thread1of1ForFork0_#t~ite17, P1Thread1of1ForFork0_#t~ite53, P1Thread1of1ForFork0_#t~ite32, P1Thread1of1ForFork0_#t~ite30, P1Thread1of1ForFork0_#t~ite51, P1Thread1of1ForFork0_thidvar2, P1Thread1of1ForFork0_#in~arg.offset, P1Thread1of1ForFork0_#t~ite46, P1Thread1of1ForFork0_#t~ite25, P1Thread1of1ForFork0_#t~ite23, P1Thread1of1ForFork0_#t~ite44, P1Thread1of1ForFork0_#t~ite29, P1Thread1of1ForFork0_#t~ite27, P1Thread1of1ForFork0_#t~ite48, P1Thread1of1ForFork0_#t~nondet13, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite65, P1Thread1of1ForFork0_thidvar1, P1Thread1of1ForFork0_#t~ite42, P1Thread1of1ForFork0_#t~ite21, P1Thread1of1ForFork0_#in~arg.base, P1Thread1of1ForFork0_#t~ite61, P1Thread1of1ForFork0_#t~ite40, P1Thread1of1ForFork0_#t~nondet11, P1Thread1of1ForFork0_#t~mem57, P1Thread1of1ForFork0_#t~mem59, P1Thread1of1ForFork0_~arg.base, P1Thread1of1ForFork0_#t~mem15, P1Thread1of1ForFork0_#t~ite58, P1Thread1of1ForFork0_#t~ite35, P1Thread1of1ForFork0_#t~ite33, P1Thread1of1ForFork0_#t~ite16, P1Thread1of1ForFork0_#t~ite39, P1Thread1of1ForFork0_#t~ite37, P1Thread1of1ForFork0_#t~ite18, P1Thread1of1ForFork0_#t~ite50, P1Thread1of1ForFork0_~arg.offset, P1Thread1of1ForFork0_#t~ite54, P1Thread1of1ForFork0_#t~ite31, P1Thread1of1ForFork0_thidvar0, P1Thread1of1ForFork0_#t~ite52, P1Thread1of1ForFork0_#t~mem19, P1Thread1of1ForFork0_#res.base] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,496 INFO  L290        TraceCheckUtils]: 64: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1188] L828-3-->L828-4: Formula: true  InVars {}  OutVars{ULTIMATE.start_main_#t~pre68#1=|v_ULTIMATE.start_main_#t~pre68#1_4|}  AuxVars[]  AssignedVars[ULTIMATE.start_main_#t~pre68#1] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,497 INFO  L290        TraceCheckUtils]: 65: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1178] L828-4-->L829: Formula: true  InVars {}  OutVars{ULTIMATE.start_main_#t~nondet69#1=|v_ULTIMATE.start_main_#t~nondet69#1_2|}  AuxVars[]  AssignedVars[ULTIMATE.start_main_#t~nondet69#1] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,497 INFO  L290        TraceCheckUtils]: 66: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1120] L829-->L831: Formula: (= v_~main$tmp_guard0~0_2 (ite (= (ite (= v_~__unbuffered_cnt~0_6 2) 1 0) 0) 0 1))  InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_6}  OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_6, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_2}  AuxVars[]  AssignedVars[~main$tmp_guard0~0] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,498 INFO  L290        TraceCheckUtils]: 67: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1185] L831-->L832: Formula: true  InVars {}  OutVars{}  AuxVars[]  AssignedVars[] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,498 INFO  L290        TraceCheckUtils]: 68: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1112] L832-->L832-1: Formula: (= |v_ULTIMATE.start_assume_abort_if_not_#in~cond#1_1| (mod v_~main$tmp_guard0~0_3 256))  InVars {~main$tmp_guard0~0=v_~main$tmp_guard0~0_3}  OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_3, ULTIMATE.start_assume_abort_if_not_#in~cond#1=|v_ULTIMATE.start_assume_abort_if_not_#in~cond#1_1|}  AuxVars[]  AssignedVars[ULTIMATE.start_assume_abort_if_not_#in~cond#1] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,499 INFO  L290        TraceCheckUtils]: 69: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1215] L832-1-->L2: Formula: true  InVars {}  OutVars{ULTIMATE.start_assume_abort_if_not_~cond#1=|v_ULTIMATE.start_assume_abort_if_not_~cond#1_1|}  AuxVars[]  AssignedVars[ULTIMATE.start_assume_abort_if_not_~cond#1] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,499 INFO  L290        TraceCheckUtils]: 70: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1173] L2-->L3: Formula: (= |v_ULTIMATE.start_assume_abort_if_not_#in~cond#1_2| |v_ULTIMATE.start_assume_abort_if_not_~cond#1_2|)  InVars {ULTIMATE.start_assume_abort_if_not_#in~cond#1=|v_ULTIMATE.start_assume_abort_if_not_#in~cond#1_2|}  OutVars{ULTIMATE.start_assume_abort_if_not_~cond#1=|v_ULTIMATE.start_assume_abort_if_not_~cond#1_2|, ULTIMATE.start_assume_abort_if_not_#in~cond#1=|v_ULTIMATE.start_assume_abort_if_not_#in~cond#1_2|}  AuxVars[]  AssignedVars[ULTIMATE.start_assume_abort_if_not_~cond#1] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,499 INFO  L290        TraceCheckUtils]: 71: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1162] L3-->L2-1: Formula: (not (= |v_ULTIMATE.start_assume_abort_if_not_~cond#1_4| 0))  InVars {ULTIMATE.start_assume_abort_if_not_~cond#1=|v_ULTIMATE.start_assume_abort_if_not_~cond#1_4|}  OutVars{ULTIMATE.start_assume_abort_if_not_~cond#1=|v_ULTIMATE.start_assume_abort_if_not_~cond#1_4|}  AuxVars[]  AssignedVars[] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,500 INFO  L290        TraceCheckUtils]: 72: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1134] L2-1-->L833: Formula: true  InVars {}  OutVars{}  AuxVars[]  AssignedVars[] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,501 INFO  L290        TraceCheckUtils]: 73: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1150] L833-->L839: Formula: (let ((.cse15 (= (mod v_~x$w_buff0_used~0_455 256) 0)) (.cse14 (= (mod v_~x$r_buff0_thd0~0_70 256) 0)) (.cse11 (= (mod v_~x$w_buff0_used~0_454 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd0~0_48 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_374 256) 0))) (let ((.cse4 (not .cse16)) (.cse5 (not .cse12)) (.cse6 (or .cse12 .cse16)) (.cse13 (or .cse14 .cse11)) (.cse9 (not .cse11)) (.cse0 (not .cse15)) (.cse1 (not .cse14)) (.cse3 (or .cse14 .cse15)) (.cse7 (select |v_#memory_int_251| |v_~#x~0.base_168|))) (and (let ((.cse2 (= |v_ULTIMATE.start_main_#t~mem70#1_41| |v_ULTIMATE.start_main_#t~mem70#1_36|))) (or (and (= |v_ULTIMATE.start_main_#t~ite71#1_42| |v_ULTIMATE.start_main_#t~ite71#1_37|) .cse0 (= v_~x$w_buff0~0_126 |v_ULTIMATE.start_main_#t~ite72#1_36|) .cse1 .cse2) (and .cse3 (= |v_ULTIMATE.start_main_#t~ite71#1_42| |v_ULTIMATE.start_main_#t~ite72#1_36|) (or (and .cse4 (= v_~x$w_buff1~0_111 |v_ULTIMATE.start_main_#t~ite71#1_42|) .cse2 .cse5) (and .cse6 (= |v_ULTIMATE.start_main_#t~mem70#1_41| |v_ULTIMATE.start_main_#t~ite71#1_42|) (= |v_ULTIMATE.start_main_#t~mem70#1_41| (select .cse7 |v_~#x~0.offset_168|))))))) (let ((.cse10 (= (mod v_~x$r_buff0_thd0~0_69 256) 0)) (.cse8 (= (mod v_~x$w_buff1_used~0_373 256) 0))) (or (and (or (and (not .cse8) .cse5) (and .cse9 (not .cse10))) (= v_~x$r_buff1_thd0~0_47 0)) (and (or .cse10 .cse11) (or .cse8 .cse12) (= v_~x$r_buff1_thd0~0_48 v_~x$r_buff1_thd0~0_47)))) (or (and (or (and .cse9 .cse1) (and .cse4 .cse5)) (= v_~x$w_buff1_used~0_373 0)) (and .cse6 (= v_~x$w_buff1_used~0_374 v_~x$w_buff1_used~0_373) .cse13)) (or (and .cse13 (= v_~x$r_buff0_thd0~0_69 v_~x$r_buff0_thd0~0_70)) (and (= v_~x$r_buff0_thd0~0_69 0) .cse9 .cse1)) (or (and .cse0 (= v_~x$w_buff0_used~0_454 0) .cse1) (and (= v_~x$w_buff0_used~0_455 v_~x$w_buff0_used~0_454) .cse3)) (= (store |v_#memory_int_251| |v_~#x~0.base_168| (store .cse7 |v_~#x~0.offset_168| |v_ULTIMATE.start_main_#t~ite72#1_36|)) |v_#memory_int_250|))))  InVars {~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_70, ULTIMATE.start_main_#t~ite71#1=|v_ULTIMATE.start_main_#t~ite71#1_37|, ~#x~0.offset=|v_~#x~0.offset_168|, ULTIMATE.start_main_#t~mem70#1=|v_ULTIMATE.start_main_#t~mem70#1_36|, ~x$w_buff1~0=v_~x$w_buff1~0_111, #memory_int=|v_#memory_int_251|, ~#x~0.base=|v_~#x~0.base_168|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_374, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_48, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_455}  OutVars{~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_69, ULTIMATE.start_main_#t~ite74#1=|v_ULTIMATE.start_main_#t~ite74#1_30|, ~#x~0.offset=|v_~#x~0.offset_168|, ULTIMATE.start_main_#t~mem70#1=|v_ULTIMATE.start_main_#t~mem70#1_35|, ULTIMATE.start_main_#t~ite72#1=|v_ULTIMATE.start_main_#t~ite72#1_32|, ~x$w_buff1~0=v_~x$w_buff1~0_111, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_373, ULTIMATE.start_main_#t~ite76#1=|v_ULTIMATE.start_main_#t~ite76#1_16|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_47, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_454, ULTIMATE.start_main_#t~ite71#1=|v_ULTIMATE.start_main_#t~ite71#1_36|, ULTIMATE.start_main_#t~ite73#1=|v_ULTIMATE.start_main_#t~ite73#1_32|, ULTIMATE.start_main_#t~ite75#1=|v_ULTIMATE.start_main_#t~ite75#1_28|, #memory_int=|v_#memory_int_250|, ~#x~0.base=|v_~#x~0.base_168|}  AuxVars[|v_ULTIMATE.start_main_#t~ite71#1_42|, |v_ULTIMATE.start_main_#t~mem70#1_41|, |v_ULTIMATE.start_main_#t~ite72#1_36|]  AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite71#1, ULTIMATE.start_main_#t~ite74#1, ULTIMATE.start_main_#t~mem70#1, ULTIMATE.start_main_#t~ite73#1, ULTIMATE.start_main_#t~ite72#1, ULTIMATE.start_main_#t~ite75#1, #memory_int, ~x$w_buff1_used~0, ULTIMATE.start_main_#t~ite76#1, ~x$r_buff1_thd0~0, ~x$w_buff0_used~0] {2096#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:09,502 INFO  L290        TraceCheckUtils]: 74: Hoare triple {2096#(= ~__unbuffered_p0_EAX~0 0)} [1135] L839-->L844: Formula: (and (= (ite (= (ite (not (and (= v_~__unbuffered_p0_EAX~0_10 1) (= v_~__unbuffered_p1_EAX~0_45 1))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_10) (= v_~weak$$choice1~0_71 |v_ULTIMATE.start_main_#t~nondet77#1_9|) (let ((.cse0 (= (mod v_~__unbuffered_p1_EAX$read_delayed~0_39 256) 0)) (.cse1 (= |v_ULTIMATE.start_main_#t~mem78#1_28| |v_ULTIMATE.start_main_#t~mem78#1_33|))) (or (and (= |v_ULTIMATE.start_main_#t~ite79#1_25| |v_ULTIMATE.start_main_#t~ite79#1_30|) .cse0 .cse1 (= v_~__unbuffered_p1_EAX~0_46 v_~__unbuffered_p1_EAX~0_45)) (and (not .cse0) (let ((.cse2 (= (mod v_~weak$$choice1~0_71 256) 0))) (or (and (= |v_ULTIMATE.start_main_#t~mem78#1_33| |v_ULTIMATE.start_main_#t~ite79#1_30|) (= (select (select |v_#memory_int_220| v_~__unbuffered_p1_EAX$read_delayed_var~0.base_40) v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_40) |v_ULTIMATE.start_main_#t~mem78#1_33|) (not .cse2)) (and .cse1 (= v_~__unbuffered_p1_EAX~0_46 |v_ULTIMATE.start_main_#t~ite79#1_30|) .cse2))) (= v_~__unbuffered_p1_EAX~0_45 |v_ULTIMATE.start_main_#t~ite79#1_30|)))))  InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_10, ULTIMATE.start_main_#t~nondet77#1=|v_ULTIMATE.start_main_#t~nondet77#1_9|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_46, ~__unbuffered_p1_EAX$read_delayed~0=v_~__unbuffered_p1_EAX$read_delayed~0_39, ~__unbuffered_p1_EAX$read_delayed_var~0.base=v_~__unbuffered_p1_EAX$read_delayed_var~0.base_40, #memory_int=|v_#memory_int_220|, ~__unbuffered_p1_EAX$read_delayed_var~0.offset=v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_40, ULTIMATE.start_main_#t~ite79#1=|v_ULTIMATE.start_main_#t~ite79#1_25|, ULTIMATE.start_main_#t~mem78#1=|v_ULTIMATE.start_main_#t~mem78#1_28|}  OutVars{ULTIMATE.start_main_#t~nondet77#1=|v_ULTIMATE.start_main_#t~nondet77#1_8|, ~__unbuffered_p1_EAX$read_delayed~0=v_~__unbuffered_p1_EAX$read_delayed~0_39, ~__unbuffered_p1_EAX$read_delayed_var~0.offset=v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_40, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_10, ULTIMATE.start_main_#t~ite80#1=|v_ULTIMATE.start_main_#t~ite80#1_26|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_10, ~weak$$choice1~0=v_~weak$$choice1~0_71, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_45, ~__unbuffered_p1_EAX$read_delayed_var~0.base=v_~__unbuffered_p1_EAX$read_delayed_var~0.base_40, #memory_int=|v_#memory_int_220|, ULTIMATE.start_main_#t~ite79#1=|v_ULTIMATE.start_main_#t~ite79#1_24|, ULTIMATE.start_main_#t~mem78#1=|v_ULTIMATE.start_main_#t~mem78#1_27|}  AuxVars[|v_ULTIMATE.start_main_#t~ite79#1_30|, |v_ULTIMATE.start_main_#t~mem78#1_33|]  AssignedVars[~weak$$choice1~0, ULTIMATE.start_main_#t~nondet77#1, ~__unbuffered_p1_EAX~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite80#1, ULTIMATE.start_main_#t~ite79#1, ULTIMATE.start_main_#t~mem78#1] {2097#(and (<= 1 ~main$tmp_guard1~0) (<= (div ~main$tmp_guard1~0 256) 0))} is VALID
[2022-02-20 20:28:09,502 INFO  L290        TraceCheckUtils]: 75: Hoare triple {2097#(and (<= 1 ~main$tmp_guard1~0) (<= (div ~main$tmp_guard1~0 256) 0))} [1177] L844-->L845: Formula: true  InVars {}  OutVars{}  AuxVars[]  AssignedVars[] {2097#(and (<= 1 ~main$tmp_guard1~0) (<= (div ~main$tmp_guard1~0 256) 0))} is VALID
[2022-02-20 20:28:09,503 INFO  L290        TraceCheckUtils]: 76: Hoare triple {2097#(and (<= 1 ~main$tmp_guard1~0) (<= (div ~main$tmp_guard1~0 256) 0))} [1204] L845-->L845-1: Formula: (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression#1_1| (mod v_~main$tmp_guard1~0_3 256))  InVars {~main$tmp_guard1~0=v_~main$tmp_guard1~0_3}  OutVars{ULTIMATE.start___VERIFIER_assert_#in~expression#1=|v_ULTIMATE.start___VERIFIER_assert_#in~expression#1_1|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_3}  AuxVars[]  AssignedVars[ULTIMATE.start___VERIFIER_assert_#in~expression#1] {2098#(or (<= (+ |ULTIMATE.start___VERIFIER_assert_#in~expression#1| 255) 0) (<= 1 |ULTIMATE.start___VERIFIER_assert_#in~expression#1|))} is VALID
[2022-02-20 20:28:09,504 INFO  L290        TraceCheckUtils]: 77: Hoare triple {2098#(or (<= (+ |ULTIMATE.start___VERIFIER_assert_#in~expression#1| 255) 0) (<= 1 |ULTIMATE.start___VERIFIER_assert_#in~expression#1|))} [1127] L845-1-->L18: Formula: true  InVars {}  OutVars{ULTIMATE.start___VERIFIER_assert_~expression#1=|v_ULTIMATE.start___VERIFIER_assert_~expression#1_1|}  AuxVars[]  AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression#1] {2098#(or (<= (+ |ULTIMATE.start___VERIFIER_assert_#in~expression#1| 255) 0) (<= 1 |ULTIMATE.start___VERIFIER_assert_#in~expression#1|))} is VALID
[2022-02-20 20:28:09,505 INFO  L290        TraceCheckUtils]: 78: Hoare triple {2098#(or (<= (+ |ULTIMATE.start___VERIFIER_assert_#in~expression#1| 255) 0) (<= 1 |ULTIMATE.start___VERIFIER_assert_#in~expression#1|))} [1189] L18-->L18-1: Formula: (= |v_ULTIMATE.start___VERIFIER_assert_~expression#1_2| |v_ULTIMATE.start___VERIFIER_assert_#in~expression#1_2|)  InVars {ULTIMATE.start___VERIFIER_assert_#in~expression#1=|v_ULTIMATE.start___VERIFIER_assert_#in~expression#1_2|}  OutVars{ULTIMATE.start___VERIFIER_assert_#in~expression#1=|v_ULTIMATE.start___VERIFIER_assert_#in~expression#1_2|, ULTIMATE.start___VERIFIER_assert_~expression#1=|v_ULTIMATE.start___VERIFIER_assert_~expression#1_2|}  AuxVars[]  AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression#1] {2099#(or (<= 1 |ULTIMATE.start___VERIFIER_assert_~expression#1|) (<= (+ |ULTIMATE.start___VERIFIER_assert_~expression#1| 255) 0))} is VALID
[2022-02-20 20:28:09,505 INFO  L290        TraceCheckUtils]: 79: Hoare triple {2099#(or (<= 1 |ULTIMATE.start___VERIFIER_assert_~expression#1|) (<= (+ |ULTIMATE.start___VERIFIER_assert_~expression#1| 255) 0))} [1156] L18-1-->L18-2: Formula: (= |v_ULTIMATE.start___VERIFIER_assert_~expression#1_3| 0)  InVars {ULTIMATE.start___VERIFIER_assert_~expression#1=|v_ULTIMATE.start___VERIFIER_assert_~expression#1_3|}  OutVars{ULTIMATE.start___VERIFIER_assert_~expression#1=|v_ULTIMATE.start___VERIFIER_assert_~expression#1_3|}  AuxVars[]  AssignedVars[] {2095#false} is VALID
[2022-02-20 20:28:09,506 INFO  L290        TraceCheckUtils]: 80: Hoare triple {2095#false} [1145] L18-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true  InVars {}  OutVars{}  AuxVars[]  AssignedVars[] {2095#false} is VALID
[2022-02-20 20:28:09,507 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2022-02-20 20:28:09,507 INFO  L144   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2022-02-20 20:28:09,508 INFO  L338   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [164800042]
[2022-02-20 20:28:09,508 INFO  L165   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [164800042] provided 1 perfect and 0 imperfect interpolant sequences
[2022-02-20 20:28:09,508 INFO  L191   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2022-02-20 20:28:09,508 INFO  L204   FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6
[2022-02-20 20:28:09,508 INFO  L118   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1963109599]
[2022-02-20 20:28:09,508 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2022-02-20 20:28:09,510 INFO  L78                 Accepts]: Start accepts. Automaton has  has 6 states, 6 states have (on average 13.5) internal successors, (81), 6 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 81
[2022-02-20 20:28:09,510 INFO  L84                 Accepts]: Finished accepts. word is accepted.
[2022-02-20 20:28:09,510 INFO  L86        InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with  has 6 states, 6 states have (on average 13.5) internal successors, (81), 6 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-02-20 20:28:09,571 INFO  L122       InductivityCheck]: Floyd-Hoare automaton has 81 edges. 81 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. 
[2022-02-20 20:28:09,572 INFO  L546      AbstractCegarLoop]: INTERPOLANT automaton has 6 states
[2022-02-20 20:28:09,572 INFO  L108   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2022-02-20 20:28:09,572 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2022-02-20 20:28:09,573 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30
[2022-02-20 20:28:09,573 INFO  L499   CegarLoopForPetriNet]: Number of universal loopers: 92 out of 112
[2022-02-20 20:28:09,574 INFO  L92    encePairwiseOnDemand]: Start differencePairwiseOnDemand. First operand has 113 places, 106 transitions, 220 flow. Second operand  has 6 states, 6 states have (on average 93.66666666666667) internal successors, (562), 6 states have internal predecessors, (562), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-02-20 20:28:09,574 INFO  L101   encePairwiseOnDemand]: Universal subtrahend loopers provided by user.
[2022-02-20 20:28:09,574 INFO  L102   encePairwiseOnDemand]: Number of universal subtrahend loopers: 92 of 112
[2022-02-20 20:28:09,574 INFO  L74            FinitePrefix]: Start finitePrefix. Operand will be constructed on-demand
[2022-02-20 20:28:10,138 INFO  L129       PetriNetUnfolder]: 174/638 cut-off events.
[2022-02-20 20:28:10,139 INFO  L130       PetriNetUnfolder]: For 33/33 co-relation queries the response was YES.
[2022-02-20 20:28:10,140 INFO  L84            FinitePrefix]: Finished finitePrefix Result has 1010 conditions, 638 events. 174/638 cut-off events. For 33/33 co-relation queries the response was YES. Maximal size of possible extension queue 39. Compared 3529 event pairs, 44 based on Foata normal form. 0/616 useless extension candidates. Maximal degree in co-relation 944. Up to 172 conditions per place. 
[2022-02-20 20:28:10,141 INFO  L132   encePairwiseOnDemand]: 106/112 looper letters, 17 selfloop transitions, 2 changer transitions 40/140 dead transitions.
[2022-02-20 20:28:10,141 INFO  L138   encePairwiseOnDemand]: Finished differencePairwiseOnDemand. Result has 121 places, 140 transitions, 396 flow
[2022-02-20 20:28:10,142 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. 
[2022-02-20 20:28:10,142 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 9 states.
[2022-02-20 20:28:10,149 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 880 transitions.
[2022-02-20 20:28:10,149 INFO  L544   CegarLoopForPetriNet]: DFA transition density 0.873015873015873
[2022-02-20 20:28:10,149 INFO  L72            ComplementDD]: Start complementDD. Operand 9 states and 880 transitions.
[2022-02-20 20:28:10,149 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 9 states and 880 transitions.
[2022-02-20 20:28:10,150 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2022-02-20 20:28:10,150 INFO  L117    ReachableStatesCopy]: Start reachableStatesCopy. Operand 9 states and 880 transitions.
[2022-02-20 20:28:10,151 INFO  L343    DoubleDeckerVisitor]: Before removal of dead ends  has 10 states, 9 states have (on average 97.77777777777777) internal successors, (880), 9 states have internal predecessors, (880), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-02-20 20:28:10,153 INFO  L131    ReachableStatesCopy]: Finished reachableStatesCopy Result  has 10 states, 10 states have (on average 112.0) internal successors, (1120), 10 states have internal predecessors, (1120), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-02-20 20:28:10,154 INFO  L81            ComplementDD]: Finished complementDD. Result  has 10 states, 10 states have (on average 112.0) internal successors, (1120), 10 states have internal predecessors, (1120), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-02-20 20:28:10,154 INFO  L186             Difference]: Start difference. First operand has 113 places, 106 transitions, 220 flow. Second operand 9 states and 880 transitions.
[2022-02-20 20:28:10,154 INFO  L82        GeneralOperation]: Start removeRedundantFlow. Operand has 121 places, 140 transitions, 396 flow
[2022-02-20 20:28:10,164 INFO  L88        GeneralOperation]: Finished removeRedundantFlow, result has has 119 places, 140 transitions, 386 flow, removed 0 selfloop flow, removed 2 redundant places.
[2022-02-20 20:28:10,165 INFO  L242             Difference]: Finished difference. Result has 126 places, 96 transitions, 216 flow
[2022-02-20 20:28:10,166 INFO  L317   CegarLoopForPetriNet]: {PETRI_ALPHABET=112, PETRI_DIFFERENCE_MINUEND_FLOW=216, PETRI_DIFFERENCE_MINUEND_PLACES=111, PETRI_DIFFERENCE_MINUEND_TRANSITIONS=106, PETRI_DIFFERENCE_SUBTRAHEND_LETTERS_WITH_MORE_CHANGERS_THAN_LOOPERS=2, PETRI_DIFFERENCE_SUBTRAHEND_LOOPER_ONLY_LETTERS=104, PETRI_DIFFERENCE_SUBTRAHEND_STATES=9, PETRI_FLOW=216, PETRI_PLACES=126, PETRI_TRANSITIONS=96}
[2022-02-20 20:28:10,166 INFO  L334   CegarLoopForPetriNet]: 115 programPoint places, 11 predicate places.
[2022-02-20 20:28:10,166 INFO  L111   iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 126 places, 96 transitions, 216 flow
[2022-02-20 20:28:10,194 INFO  L133   iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result  has 1217 states, 1215 states have (on average 2.567901234567901) internal successors, (3120), 1216 states have internal predecessors, (3120), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-02-20 20:28:10,197 INFO  L78                 Accepts]: Start accepts. Automaton has  has 1217 states, 1215 states have (on average 2.567901234567901) internal successors, (3120), 1216 states have internal predecessors, (3120), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 81
[2022-02-20 20:28:10,197 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2022-02-20 20:28:10,197 INFO  L470      AbstractCegarLoop]: Abstraction has has 126 places, 96 transitions, 216 flow
[2022-02-20 20:28:10,197 INFO  L471      AbstractCegarLoop]: INTERPOLANT automaton has  has 6 states, 6 states have (on average 93.66666666666667) internal successors, (562), 6 states have internal predecessors, (562), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-02-20 20:28:10,198 INFO  L246   CegarLoopForPetriNet]: Found error trace
[2022-02-20 20:28:10,198 INFO  L254   CegarLoopForPetriNet]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2022-02-20 20:28:10,198 WARN  L452      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1
[2022-02-20 20:28:10,198 INFO  L402      AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATION (and 2 more)] ===
[2022-02-20 20:28:10,199 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2022-02-20 20:28:10,199 INFO  L85        PathProgramCache]: Analyzing trace with hash 675418521, now seen corresponding path program 1 times
[2022-02-20 20:28:10,199 INFO  L126   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2022-02-20 20:28:10,199 INFO  L338   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [926390649]
[2022-02-20 20:28:10,199 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2022-02-20 20:28:10,199 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2022-02-20 20:28:10,233 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2022-02-20 20:28:10,333 INFO  L290        TraceCheckUtils]: 0: Hoare triple {3336#true} [1205] ULTIMATE.startENTRY-->L-1: Formula: true  InVars {}  OutVars{}  AuxVars[]  AssignedVars[] {3336#true} is VALID
[2022-02-20 20:28:10,333 INFO  L290        TraceCheckUtils]: 1: Hoare triple {3336#true} [1144] L-1-->L-1-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0))  InVars {}  OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|}  AuxVars[]  AssignedVars[#NULL.offset, #NULL.base] {3336#true} is VALID
[2022-02-20 20:28:10,333 INFO  L290        TraceCheckUtils]: 2: Hoare triple {3336#true} [1210] L-1-1-->L-1-2: Formula: (= (select |v_#valid_1| 0) 0)  InVars {#valid=|v_#valid_1|}  OutVars{#valid=|v_#valid_1|}  AuxVars[]  AssignedVars[] {3336#true} is VALID
[2022-02-20 20:28:10,334 INFO  L290        TraceCheckUtils]: 3: Hoare triple {3336#true} [1214] L-1-2-->L17: Formula: (< 0 |v_#StackHeapBarrier_1|)  InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|}  OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|}  AuxVars[]  AssignedVars[] {3336#true} is VALID
[2022-02-20 20:28:10,334 INFO  L290        TraceCheckUtils]: 4: Hoare triple {3336#true} [1212] L17-->L17-1: Formula: (and (= (select |v_#valid_2| 1) 1) (= 2 (select |v_#length_1| 1)))  InVars {#length=|v_#length_1|, #valid=|v_#valid_2|}  OutVars{#length=|v_#length_1|, #valid=|v_#valid_2|}  AuxVars[]  AssignedVars[] {3336#true} is VALID
[2022-02-20 20:28:10,334 INFO  L290        TraceCheckUtils]: 5: Hoare triple {3336#true} [1179] L17-1-->L17-2: Formula: (= 48 (select (select |v_#memory_int_17| 1) 0))  InVars {#memory_int=|v_#memory_int_17|}  OutVars{#memory_int=|v_#memory_int_17|}  AuxVars[]  AssignedVars[] {3336#true} is VALID
[2022-02-20 20:28:10,334 INFO  L290        TraceCheckUtils]: 6: Hoare triple {3336#true} [1118] L17-2-->L17-3: Formula: (= (select (select |v_#memory_int_18| 1) 1) 0)  InVars {#memory_int=|v_#memory_int_18|}  OutVars{#memory_int=|v_#memory_int_18|}  AuxVars[]  AssignedVars[] {3336#true} is VALID
[2022-02-20 20:28:10,334 INFO  L290        TraceCheckUtils]: 7: Hoare triple {3336#true} [1186] L17-3-->L17-4: Formula: (and (= (select |v_#valid_3| 2) 1) (= 38 (select |v_#length_2| 2)))  InVars {#length=|v_#length_2|, #valid=|v_#valid_3|}  OutVars{#length=|v_#length_2|, #valid=|v_#valid_3|}  AuxVars[]  AssignedVars[] {3336#true} is VALID
[2022-02-20 20:28:10,334 INFO  L290        TraceCheckUtils]: 8: Hoare triple {3336#true} [1117] L17-4-->L710: Formula: (= v_~__unbuffered_cnt~0_5 0)  InVars {}  OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_5}  AuxVars[]  AssignedVars[~__unbuffered_cnt~0] {3336#true} is VALID
[2022-02-20 20:28:10,334 INFO  L290        TraceCheckUtils]: 9: Hoare triple {3336#true} [1172] L710-->L712: Formula: (= v_~__unbuffered_p0_EAX~0_2 0)  InVars {}  OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_2}  AuxVars[]  AssignedVars[~__unbuffered_p0_EAX~0] {3336#true} is VALID
[2022-02-20 20:28:10,334 INFO  L290        TraceCheckUtils]: 10: Hoare triple {3336#true} [1167] L712-->L713: Formula: (= v_~__unbuffered_p1_EAX~0_2 0)  InVars {}  OutVars{~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_2}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX~0] {3336#true} is VALID
[2022-02-20 20:28:10,334 INFO  L290        TraceCheckUtils]: 11: Hoare triple {3336#true} [1192] L713-->L714: Formula: (= v_~__unbuffered_p1_EAX$flush_delayed~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$flush_delayed~0=v_~__unbuffered_p1_EAX$flush_delayed~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$flush_delayed~0] {3336#true} is VALID
[2022-02-20 20:28:10,334 INFO  L290        TraceCheckUtils]: 12: Hoare triple {3336#true} [1115] L714-->L715: Formula: (= v_~__unbuffered_p1_EAX$mem_tmp~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$mem_tmp~0=v_~__unbuffered_p1_EAX$mem_tmp~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$mem_tmp~0] {3336#true} is VALID
[2022-02-20 20:28:10,335 INFO  L290        TraceCheckUtils]: 13: Hoare triple {3336#true} [1121] L715-->L716: Formula: (= v_~__unbuffered_p1_EAX$r_buff0_thd0~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$r_buff0_thd0~0=v_~__unbuffered_p1_EAX$r_buff0_thd0~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$r_buff0_thd0~0] {3336#true} is VALID
[2022-02-20 20:28:10,335 INFO  L290        TraceCheckUtils]: 14: Hoare triple {3336#true} [1148] L716-->L717: Formula: (= v_~__unbuffered_p1_EAX$r_buff0_thd1~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$r_buff0_thd1~0=v_~__unbuffered_p1_EAX$r_buff0_thd1~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$r_buff0_thd1~0] {3336#true} is VALID
[2022-02-20 20:28:10,335 INFO  L290        TraceCheckUtils]: 15: Hoare triple {3336#true} [1128] L717-->L718: Formula: (= v_~__unbuffered_p1_EAX$r_buff0_thd2~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$r_buff0_thd2~0=v_~__unbuffered_p1_EAX$r_buff0_thd2~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$r_buff0_thd2~0] {3336#true} is VALID
[2022-02-20 20:28:10,335 INFO  L290        TraceCheckUtils]: 16: Hoare triple {3336#true} [1184] L718-->L719: Formula: (= v_~__unbuffered_p1_EAX$r_buff1_thd0~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$r_buff1_thd0~0=v_~__unbuffered_p1_EAX$r_buff1_thd0~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$r_buff1_thd0~0] {3336#true} is VALID
[2022-02-20 20:28:10,336 INFO  L290        TraceCheckUtils]: 17: Hoare triple {3336#true} [1174] L719-->L720: Formula: (= v_~__unbuffered_p1_EAX$r_buff1_thd1~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$r_buff1_thd1~0=v_~__unbuffered_p1_EAX$r_buff1_thd1~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$r_buff1_thd1~0] {3336#true} is VALID
[2022-02-20 20:28:10,336 INFO  L290        TraceCheckUtils]: 18: Hoare triple {3336#true} [1133] L720-->L721: Formula: (= v_~__unbuffered_p1_EAX$r_buff1_thd2~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$r_buff1_thd2~0=v_~__unbuffered_p1_EAX$r_buff1_thd2~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$r_buff1_thd2~0] {3336#true} is VALID
[2022-02-20 20:28:10,336 INFO  L290        TraceCheckUtils]: 19: Hoare triple {3336#true} [1180] L721-->L722: Formula: (= v_~__unbuffered_p1_EAX$read_delayed~0_2 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$read_delayed~0=v_~__unbuffered_p1_EAX$read_delayed~0_2}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$read_delayed~0] {3336#true} is VALID
[2022-02-20 20:28:10,336 INFO  L290        TraceCheckUtils]: 20: Hoare triple {3336#true} [1166] L722-->L723: Formula: (and (= v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_2 0) (= v_~__unbuffered_p1_EAX$read_delayed_var~0.base_2 0))  InVars {}  OutVars{~__unbuffered_p1_EAX$read_delayed_var~0.base=v_~__unbuffered_p1_EAX$read_delayed_var~0.base_2, ~__unbuffered_p1_EAX$read_delayed_var~0.offset=v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_2}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$read_delayed_var~0.base, ~__unbuffered_p1_EAX$read_delayed_var~0.offset] {3336#true} is VALID
[2022-02-20 20:28:10,337 INFO  L290        TraceCheckUtils]: 21: Hoare triple {3336#true} [1219] L723-->L724: Formula: (= v_~__unbuffered_p1_EAX$w_buff0~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$w_buff0~0=v_~__unbuffered_p1_EAX$w_buff0~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$w_buff0~0] {3336#true} is VALID
[2022-02-20 20:28:10,337 INFO  L290        TraceCheckUtils]: 22: Hoare triple {3336#true} [1129] L724-->L725: Formula: (= v_~__unbuffered_p1_EAX$w_buff0_used~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$w_buff0_used~0=v_~__unbuffered_p1_EAX$w_buff0_used~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$w_buff0_used~0] {3336#true} is VALID
[2022-02-20 20:28:10,337 INFO  L290        TraceCheckUtils]: 23: Hoare triple {3336#true} [1116] L725-->L726: Formula: (= v_~__unbuffered_p1_EAX$w_buff1~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$w_buff1~0=v_~__unbuffered_p1_EAX$w_buff1~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$w_buff1~0] {3336#true} is VALID
[2022-02-20 20:28:10,337 INFO  L290        TraceCheckUtils]: 24: Hoare triple {3336#true} [1183] L726-->L727: Formula: (= v_~__unbuffered_p1_EAX$w_buff1_used~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$w_buff1_used~0=v_~__unbuffered_p1_EAX$w_buff1_used~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$w_buff1_used~0] {3336#true} is VALID
[2022-02-20 20:28:10,337 INFO  L290        TraceCheckUtils]: 25: Hoare triple {3336#true} [1123] L727-->L728: Formula: (= v_~main$tmp_guard0~0_1 0)  InVars {}  OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_1}  AuxVars[]  AssignedVars[~main$tmp_guard0~0] {3336#true} is VALID
[2022-02-20 20:28:10,337 INFO  L290        TraceCheckUtils]: 26: Hoare triple {3336#true} [1168] L728-->L730: Formula: (= v_~main$tmp_guard1~0_1 0)  InVars {}  OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_1}  AuxVars[]  AssignedVars[~main$tmp_guard1~0] {3336#true} is VALID
[2022-02-20 20:28:10,337 INFO  L290        TraceCheckUtils]: 27: Hoare triple {3336#true} [1159] L730-->L730-1: Formula: (and (= 3 |v_~#x~0.base_14|) (= |v_~#x~0.offset_14| 0))  InVars {}  OutVars{~#x~0.base=|v_~#x~0.base_14|, ~#x~0.offset=|v_~#x~0.offset_14|}  AuxVars[]  AssignedVars[~#x~0.offset, ~#x~0.base] {3336#true} is VALID
[2022-02-20 20:28:10,337 INFO  L290        TraceCheckUtils]: 28: Hoare triple {3336#true} [1200] L730-1-->L730-2: Formula: (and (= (select |v_#valid_4| 3) 1) (= 4 (select |v_#length_3| 3)))  InVars {#length=|v_#length_3|, #valid=|v_#valid_4|}  OutVars{#length=|v_#length_3|, #valid=|v_#valid_4|}  AuxVars[]  AssignedVars[] {3336#true} is VALID
[2022-02-20 20:28:10,337 INFO  L290        TraceCheckUtils]: 29: Hoare triple {3336#true} [1155] L730-2-->L730-3: Formula: (= (select (select |v_#memory_int_19| |v_~#x~0.base_15|) |v_~#x~0.offset_15|) 0)  InVars {~#x~0.base=|v_~#x~0.base_15|, #memory_int=|v_#memory_int_19|, ~#x~0.offset=|v_~#x~0.offset_15|}  OutVars{~#x~0.base=|v_~#x~0.base_15|, #memory_int=|v_#memory_int_19|, ~#x~0.offset=|v_~#x~0.offset_15|}  AuxVars[]  AssignedVars[] {3336#true} is VALID
[2022-02-20 20:28:10,337 INFO  L290        TraceCheckUtils]: 30: Hoare triple {3336#true} [1131] L730-3-->L732: Formula: (= 0 v_~x$flush_delayed~0_5)  InVars {}  OutVars{~x$flush_delayed~0=v_~x$flush_delayed~0_5}  AuxVars[]  AssignedVars[~x$flush_delayed~0] {3336#true} is VALID
[2022-02-20 20:28:10,338 INFO  L290        TraceCheckUtils]: 31: Hoare triple {3336#true} [1132] L732-->L733: Formula: (= v_~x$mem_tmp~0_3 0)  InVars {}  OutVars{~x$mem_tmp~0=v_~x$mem_tmp~0_3}  AuxVars[]  AssignedVars[~x$mem_tmp~0] {3336#true} is VALID
[2022-02-20 20:28:10,338 INFO  L290        TraceCheckUtils]: 32: Hoare triple {3336#true} [1190] L733-->L734: Formula: (= v_~x$r_buff0_thd0~0_2 0)  InVars {}  OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_2}  AuxVars[]  AssignedVars[~x$r_buff0_thd0~0] {3336#true} is VALID
[2022-02-20 20:28:10,338 INFO  L290        TraceCheckUtils]: 33: Hoare triple {3336#true} [1191] L734-->L735: Formula: (= v_~x$r_buff0_thd1~0_15 0)  InVars {}  OutVars{~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_15}  AuxVars[]  AssignedVars[~x$r_buff0_thd1~0] {3336#true} is VALID
[2022-02-20 20:28:10,338 INFO  L290        TraceCheckUtils]: 34: Hoare triple {3336#true} [1211] L735-->L736: Formula: (= v_~x$r_buff0_thd2~0_60 0)  InVars {}  OutVars{~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_60}  AuxVars[]  AssignedVars[~x$r_buff0_thd2~0] {3336#true} is VALID
[2022-02-20 20:28:10,338 INFO  L290        TraceCheckUtils]: 35: Hoare triple {3336#true} [1139] L736-->L737: Formula: (= v_~x$r_buff1_thd0~0_2 0)  InVars {}  OutVars{~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_2}  AuxVars[]  AssignedVars[~x$r_buff1_thd0~0] {3336#true} is VALID
[2022-02-20 20:28:10,338 INFO  L290        TraceCheckUtils]: 36: Hoare triple {3336#true} [1130] L737-->L738: Formula: (= v_~x$r_buff1_thd1~0_10 0)  InVars {}  OutVars{~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_10}  AuxVars[]  AssignedVars[~x$r_buff1_thd1~0] {3336#true} is VALID
[2022-02-20 20:28:10,338 INFO  L290        TraceCheckUtils]: 37: Hoare triple {3336#true} [1160] L738-->L739: Formula: (= v_~x$r_buff1_thd2~0_42 0)  InVars {}  OutVars{~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_42}  AuxVars[]  AssignedVars[~x$r_buff1_thd2~0] {3336#true} is VALID
[2022-02-20 20:28:10,338 INFO  L290        TraceCheckUtils]: 38: Hoare triple {3336#true} [1111] L739-->L740: Formula: (= v_~x$read_delayed~0_1 0)  InVars {}  OutVars{~x$read_delayed~0=v_~x$read_delayed~0_1}  AuxVars[]  AssignedVars[~x$read_delayed~0] {3336#true} is VALID
[2022-02-20 20:28:10,338 INFO  L290        TraceCheckUtils]: 39: Hoare triple {3336#true} [1149] L740-->L741: Formula: (and (= v_~x$read_delayed_var~0.base_1 0) (= v_~x$read_delayed_var~0.offset_1 0))  InVars {}  OutVars{~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_1, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_1}  AuxVars[]  AssignedVars[~x$read_delayed_var~0.offset, ~x$read_delayed_var~0.base] {3336#true} is VALID
[2022-02-20 20:28:10,338 INFO  L290        TraceCheckUtils]: 40: Hoare triple {3336#true} [1207] L741-->L742: Formula: (= 0 v_~x$w_buff0~0_16)  InVars {}  OutVars{~x$w_buff0~0=v_~x$w_buff0~0_16}  AuxVars[]  AssignedVars[~x$w_buff0~0] {3336#true} is VALID
[2022-02-20 20:28:10,338 INFO  L290        TraceCheckUtils]: 41: Hoare triple {3336#true} [1140] L742-->L743: Formula: (= v_~x$w_buff0_used~0_87 0)  InVars {}  OutVars{~x$w_buff0_used~0=v_~x$w_buff0_used~0_87}  AuxVars[]  AssignedVars[~x$w_buff0_used~0] {3336#true} is VALID
[2022-02-20 20:28:10,339 INFO  L290        TraceCheckUtils]: 42: Hoare triple {3336#true} [1163] L743-->L744: Formula: (= 0 v_~x$w_buff1~0_13)  InVars {}  OutVars{~x$w_buff1~0=v_~x$w_buff1~0_13}  AuxVars[]  AssignedVars[~x$w_buff1~0] {3336#true} is VALID
[2022-02-20 20:28:10,339 INFO  L290        TraceCheckUtils]: 43: Hoare triple {3336#true} [1141] L744-->L746: Formula: (= v_~x$w_buff1_used~0_50 0)  InVars {}  OutVars{~x$w_buff1_used~0=v_~x$w_buff1_used~0_50}  AuxVars[]  AssignedVars[~x$w_buff1_used~0] {3336#true} is VALID
[2022-02-20 20:28:10,339 INFO  L290        TraceCheckUtils]: 44: Hoare triple {3336#true} [1182] L746-->L747: Formula: (= v_~y~0_3 0)  InVars {}  OutVars{~y~0=v_~y~0_3}  AuxVars[]  AssignedVars[~y~0] {3338#(= ~y~0 0)} is VALID
[2022-02-20 20:28:10,339 INFO  L290        TraceCheckUtils]: 45: Hoare triple {3338#(= ~y~0 0)} [1119] L747-->L748: Formula: (= v_~weak$$choice0~0_14 0)  InVars {}  OutVars{~weak$$choice0~0=v_~weak$$choice0~0_14}  AuxVars[]  AssignedVars[~weak$$choice0~0] {3338#(= ~y~0 0)} is VALID
[2022-02-20 20:28:10,340 INFO  L290        TraceCheckUtils]: 46: Hoare triple {3338#(= ~y~0 0)} [1142] L748-->L749: Formula: (= v_~weak$$choice1~0_5 0)  InVars {}  OutVars{~weak$$choice1~0=v_~weak$$choice1~0_5}  AuxVars[]  AssignedVars[~weak$$choice1~0] {3338#(= ~y~0 0)} is VALID
[2022-02-20 20:28:10,340 INFO  L290        TraceCheckUtils]: 47: Hoare triple {3338#(= ~y~0 0)} [1113] L749-->L-1-3: Formula: (= v_~weak$$choice2~0_15 0)  InVars {}  OutVars{~weak$$choice2~0=v_~weak$$choice2~0_15}  AuxVars[]  AssignedVars[~weak$$choice2~0] {3338#(= ~y~0 0)} is VALID
[2022-02-20 20:28:10,340 INFO  L290        TraceCheckUtils]: 48: Hoare triple {3338#(= ~y~0 0)} [1218] L-1-3-->L-1-4: Formula: true  InVars {}  OutVars{}  AuxVars[]  AssignedVars[] {3338#(= ~y~0 0)} is VALID
[2022-02-20 20:28:10,342 INFO  L290        TraceCheckUtils]: 49: Hoare triple {3338#(= ~y~0 0)} [1147] L-1-4-->L-1-5: Formula: true  InVars {}  OutVars{}  AuxVars[]  AssignedVars[] {3338#(= ~y~0 0)} is VALID
[2022-02-20 20:28:10,342 INFO  L290        TraceCheckUtils]: 50: Hoare triple {3338#(= ~y~0 0)} [1125] L-1-5-->L-1-6: Formula: true  InVars {}  OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_1|}  AuxVars[]  AssignedVars[ULTIMATE.start_main_#res#1] {3338#(= ~y~0 0)} is VALID
[2022-02-20 20:28:10,343 INFO  L290        TraceCheckUtils]: 51: Hoare triple {3338#(= ~y~0 0)} [1196] L-1-6-->L825: Formula: true  InVars {}  OutVars{ULTIMATE.start_main_#t~nondet77#1=|v_ULTIMATE.start_main_#t~nondet77#1_1|, ULTIMATE.start_main_#t~ite74#1=|v_ULTIMATE.start_main_#t~ite74#1_1|, ULTIMATE.start_main_#t~mem70#1=|v_ULTIMATE.start_main_#t~mem70#1_1|, ULTIMATE.start_main_#t~ite72#1=|v_ULTIMATE.start_main_#t~ite72#1_1|, ULTIMATE.start_main_~#t1923~0#1.base=|v_ULTIMATE.start_main_~#t1923~0#1.base_1|, ULTIMATE.start_main_#t~ite76#1=|v_ULTIMATE.start_main_#t~ite76#1_1|, ULTIMATE.start_main_#t~ite80#1=|v_ULTIMATE.start_main_#t~ite80#1_1|, ULTIMATE.start_main_#t~pre68#1=|v_ULTIMATE.start_main_#t~pre68#1_1|, ULTIMATE.start_main_#t~ite71#1=|v_ULTIMATE.start_main_#t~ite71#1_1|, ULTIMATE.start_main_#t~pre66#1=|v_ULTIMATE.start_main_#t~pre66#1_1|, ULTIMATE.start_main_#t~ite73#1=|v_ULTIMATE.start_main_#t~ite73#1_1|, ULTIMATE.start_main_#t~ite75#1=|v_ULTIMATE.start_main_#t~ite75#1_1|, ULTIMATE.start_main_~#t1924~0#1.offset=|v_ULTIMATE.start_main_~#t1924~0#1.offset_1|, ULTIMATE.start_main_~#t1923~0#1.offset=|v_ULTIMATE.start_main_~#t1923~0#1.offset_1|, ULTIMATE.start_main_#t~nondet69#1=|v_ULTIMATE.start_main_#t~nondet69#1_1|, ULTIMATE.start_main_#t~ite79#1=|v_ULTIMATE.start_main_#t~ite79#1_1|, ULTIMATE.start_main_~#t1924~0#1.base=|v_ULTIMATE.start_main_~#t1924~0#1.base_1|, ULTIMATE.start_main_#t~nondet67#1=|v_ULTIMATE.start_main_#t~nondet67#1_1|, ULTIMATE.start_main_#t~mem78#1=|v_ULTIMATE.start_main_#t~mem78#1_1|}  AuxVars[]  AssignedVars[ULTIMATE.start_main_#t~nondet77#1, ULTIMATE.start_main_#t~ite74#1, ULTIMATE.start_main_#t~mem70#1, ULTIMATE.start_main_#t~ite72#1, ULTIMATE.start_main_~#t1923~0#1.base, ULTIMATE.start_main_#t~ite76#1, ULTIMATE.start_main_#t~ite80#1, ULTIMATE.start_main_#t~pre68#1, ULTIMATE.start_main_#t~ite71#1, ULTIMATE.start_main_#t~pre66#1, ULTIMATE.start_main_#t~ite73#1, ULTIMATE.start_main_#t~ite75#1, ULTIMATE.start_main_~#t1924~0#1.offset, ULTIMATE.start_main_~#t1923~0#1.offset, ULTIMATE.start_main_#t~nondet69#1, ULTIMATE.start_main_#t~ite79#1, ULTIMATE.start_main_~#t1924~0#1.base, ULTIMATE.start_main_#t~nondet67#1, ULTIMATE.start_main_#t~mem78#1] {3338#(= ~y~0 0)} is VALID
[2022-02-20 20:28:10,343 INFO  L290        TraceCheckUtils]: 52: Hoare triple {3338#(= ~y~0 0)} [1209] L825-->L825-1: Formula: (and (= |v_ULTIMATE.start_main_~#t1923~0#1.offset_2| 0) (= (store |v_#length_5| |v_ULTIMATE.start_main_~#t1923~0#1.base_2| 4) |v_#length_4|) (not (= |v_ULTIMATE.start_main_~#t1923~0#1.base_2| 0)) (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t1923~0#1.base_2|) (= |v_#valid_5| (store |v_#valid_6| |v_ULTIMATE.start_main_~#t1923~0#1.base_2| 1)) (= (select |v_#valid_6| |v_ULTIMATE.start_main_~#t1923~0#1.base_2|) 0))  InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_5|, #valid=|v_#valid_6|}  OutVars{ULTIMATE.start_main_~#t1923~0#1.base=|v_ULTIMATE.start_main_~#t1923~0#1.base_2|, ULTIMATE.start_main_~#t1923~0#1.offset=|v_ULTIMATE.start_main_~#t1923~0#1.offset_2|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_5|}  AuxVars[]  AssignedVars[#valid, ULTIMATE.start_main_~#t1923~0#1.base, ULTIMATE.start_main_~#t1923~0#1.offset, #length] {3338#(= ~y~0 0)} is VALID
[2022-02-20 20:28:10,343 INFO  L290        TraceCheckUtils]: 53: Hoare triple {3338#(= ~y~0 0)} [1124] L825-1-->L826: Formula: (= |v_ULTIMATE.start_main_#t~pre66#1_2| |v_#pthreadsForks_1|)  InVars {#pthreadsForks=|v_#pthreadsForks_1|}  OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre66#1=|v_ULTIMATE.start_main_#t~pre66#1_2|}  AuxVars[]  AssignedVars[ULTIMATE.start_main_#t~pre66#1] {3338#(= ~y~0 0)} is VALID
[2022-02-20 20:28:10,343 INFO  L290        TraceCheckUtils]: 54: Hoare triple {3338#(= ~y~0 0)} [1152] L826-->L826-1: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|)  InVars {#pthreadsForks=|v_#pthreadsForks_3|}  OutVars{#pthreadsForks=|v_#pthreadsForks_2|}  AuxVars[]  AssignedVars[#pthreadsForks] {3338#(= ~y~0 0)} is VALID
[2022-02-20 20:28:10,344 INFO  L290        TraceCheckUtils]: 55: Hoare triple {3338#(= ~y~0 0)} [1153] L826-1-->L826-2: Formula: (= (store |v_#memory_int_21| |v_ULTIMATE.start_main_~#t1923~0#1.base_3| (store (select |v_#memory_int_21| |v_ULTIMATE.start_main_~#t1923~0#1.base_3|) |v_ULTIMATE.start_main_~#t1923~0#1.offset_3| |v_ULTIMATE.start_main_#t~pre66#1_3|)) |v_#memory_int_20|)  InVars {#memory_int=|v_#memory_int_21|, ULTIMATE.start_main_~#t1923~0#1.base=|v_ULTIMATE.start_main_~#t1923~0#1.base_3|, ULTIMATE.start_main_~#t1923~0#1.offset=|v_ULTIMATE.start_main_~#t1923~0#1.offset_3|, ULTIMATE.start_main_#t~pre66#1=|v_ULTIMATE.start_main_#t~pre66#1_3|}  OutVars{#memory_int=|v_#memory_int_20|, ULTIMATE.start_main_~#t1923~0#1.base=|v_ULTIMATE.start_main_~#t1923~0#1.base_3|, ULTIMATE.start_main_~#t1923~0#1.offset=|v_ULTIMATE.start_main_~#t1923~0#1.offset_3|, ULTIMATE.start_main_#t~pre66#1=|v_ULTIMATE.start_main_#t~pre66#1_3|}  AuxVars[]  AssignedVars[#memory_int] {3338#(= ~y~0 0)} is VALID
[2022-02-20 20:28:10,344 INFO  L290        TraceCheckUtils]: 56: Hoare triple {3338#(= ~y~0 0)} [1239] L826-2-->P0ENTRY: Formula: (and (= v_P0Thread1of1ForFork1_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre66#1_6| v_P0Thread1of1ForFork1_thidvar0_2) (= |v_P0Thread1of1ForFork1_#in~arg#1.base_4| 0) (= |v_P0Thread1of1ForFork1_#in~arg#1.offset_4| 0))  InVars {ULTIMATE.start_main_#t~pre66#1=|v_ULTIMATE.start_main_#t~pre66#1_6|}  OutVars{P0Thread1of1ForFork1_#res#1.offset=|v_P0Thread1of1ForFork1_#res#1.offset_4|, P0Thread1of1ForFork1_#t~ite9#1=|v_P0Thread1of1ForFork1_#t~ite9#1_4|, P0Thread1of1ForFork1_#in~arg#1.base=|v_P0Thread1of1ForFork1_#in~arg#1.base_4|, P0Thread1of1ForFork1_thidvar0=v_P0Thread1of1ForFork1_thidvar0_2, P0Thread1of1ForFork1_#t~ite6#1=|v_P0Thread1of1ForFork1_#t~ite6#1_4|, P0Thread1of1ForFork1_thidvar1=v_P0Thread1of1ForFork1_thidvar1_2, P0Thread1of1ForFork1_#in~arg#1.offset=|v_P0Thread1of1ForFork1_#in~arg#1.offset_4|, P0Thread1of1ForFork1_#t~mem3#1=|v_P0Thread1of1ForFork1_#t~mem3#1_6|, P0Thread1of1ForFork1_~arg#1.base=|v_P0Thread1of1ForFork1_~arg#1.base_4|, P0Thread1of1ForFork1_#t~ite4#1=|v_P0Thread1of1ForFork1_#t~ite4#1_6|, P0Thread1of1ForFork1_~arg#1.offset=|v_P0Thread1of1ForFork1_~arg#1.offset_4|, P0Thread1of1ForFork1_#t~ite8#1=|v_P0Thread1of1ForFork1_#t~ite8#1_4|, ULTIMATE.start_main_#t~pre66#1=|v_ULTIMATE.start_main_#t~pre66#1_6|, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression#1=|v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression#1_6|, P0Thread1of1ForFork1_#res#1.base=|v_P0Thread1of1ForFork1_#res#1.base_4|, P0Thread1of1ForFork1_#t~ite7#1=|v_P0Thread1of1ForFork1_#t~ite7#1_4|, P0Thread1of1ForFork1___VERIFIER_assert_~expression#1=|v_P0Thread1of1ForFork1___VERIFIER_assert_~expression#1_6|, P0Thread1of1ForFork1_#t~ite5#1=|v_P0Thread1of1ForFork1_#t~ite5#1_4|}  AuxVars[]  AssignedVars[P0Thread1of1ForFork1_#res#1.offset, P0Thread1of1ForFork1_#t~ite9#1, P0Thread1of1ForFork1_#in~arg#1.base, P0Thread1of1ForFork1_thidvar0, P0Thread1of1ForFork1_#t~ite6#1, P0Thread1of1ForFork1_thidvar1, P0Thread1of1ForFork1_#in~arg#1.offset, P0Thread1of1ForFork1_#t~mem3#1, P0Thread1of1ForFork1_~arg#1.base, P0Thread1of1ForFork1_#t~ite4#1, P0Thread1of1ForFork1_~arg#1.offset, P0Thread1of1ForFork1_#t~ite8#1, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression#1, P0Thread1of1ForFork1_#res#1.base, P0Thread1of1ForFork1_#t~ite7#1, P0Thread1of1ForFork1___VERIFIER_assert_~expression#1, P0Thread1of1ForFork1_#t~ite5#1] {3338#(= ~y~0 0)} is VALID
[2022-02-20 20:28:10,344 INFO  L290        TraceCheckUtils]: 57: Hoare triple {3338#(= ~y~0 0)} [1221] P0ENTRY-->L752: Formula: (and (= |v_P0Thread1of1ForFork1_~arg#1.offset_1| |v_P0Thread1of1ForFork1_#in~arg#1.offset_1|) (= |v_P0Thread1of1ForFork1_#in~arg#1.base_1| |v_P0Thread1of1ForFork1_~arg#1.base_1|))  InVars {P0Thread1of1ForFork1_#in~arg#1.base=|v_P0Thread1of1ForFork1_#in~arg#1.base_1|, P0Thread1of1ForFork1_#in~arg#1.offset=|v_P0Thread1of1ForFork1_#in~arg#1.offset_1|}  OutVars{P0Thread1of1ForFork1_#in~arg#1.offset=|v_P0Thread1of1ForFork1_#in~arg#1.offset_1|, P0Thread1of1ForFork1_#in~arg#1.base=|v_P0Thread1of1ForFork1_#in~arg#1.base_1|, P0Thread1of1ForFork1_~arg#1.base=|v_P0Thread1of1ForFork1_~arg#1.base_1|, P0Thread1of1ForFork1_~arg#1.offset=|v_P0Thread1of1ForFork1_~arg#1.offset_1|}  AuxVars[]  AssignedVars[P0Thread1of1ForFork1_~arg#1.base, P0Thread1of1ForFork1_~arg#1.offset] {3338#(= ~y~0 0)} is VALID
[2022-02-20 20:28:10,345 INFO  L290        TraceCheckUtils]: 58: Hoare triple {3338#(= ~y~0 0)} [1138] L826-3-->L826-4: Formula: true  InVars {}  OutVars{ULTIMATE.start_main_#t~pre66#1=|v_ULTIMATE.start_main_#t~pre66#1_4|}  AuxVars[]  AssignedVars[ULTIMATE.start_main_#t~pre66#1] {3338#(= ~y~0 0)} is VALID
[2022-02-20 20:28:10,345 INFO  L290        TraceCheckUtils]: 59: Hoare triple {3338#(= ~y~0 0)} [1158] L826-4-->L827: Formula: true  InVars {}  OutVars{ULTIMATE.start_main_#t~nondet67#1=|v_ULTIMATE.start_main_#t~nondet67#1_2|}  AuxVars[]  AssignedVars[ULTIMATE.start_main_#t~nondet67#1] {3338#(= ~y~0 0)} is VALID
[2022-02-20 20:28:10,345 INFO  L290        TraceCheckUtils]: 60: Hoare triple {3338#(= ~y~0 0)} [1220] L827-->L827-1: Formula: (and (= |v_#length_6| (store |v_#length_7| |v_ULTIMATE.start_main_~#t1924~0#1.base_2| 4)) (= |v_ULTIMATE.start_main_~#t1924~0#1.offset_2| 0) (= |v_#valid_7| (store |v_#valid_8| |v_ULTIMATE.start_main_~#t1924~0#1.base_2| 1)) (< |v_#StackHeapBarrier_3| |v_ULTIMATE.start_main_~#t1924~0#1.base_2|) (not (= |v_ULTIMATE.start_main_~#t1924~0#1.base_2| 0)) (= (select |v_#valid_8| |v_ULTIMATE.start_main_~#t1924~0#1.base_2|) 0))  InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_7|, #valid=|v_#valid_8|}  OutVars{ULTIMATE.start_main_~#t1924~0#1.offset=|v_ULTIMATE.start_main_~#t1924~0#1.offset_2|, #StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_6|, ULTIMATE.start_main_~#t1924~0#1.base=|v_ULTIMATE.start_main_~#t1924~0#1.base_2|, #valid=|v_#valid_7|}  AuxVars[]  AssignedVars[#valid, ULTIMATE.start_main_~#t1924~0#1.offset, #length, ULTIMATE.start_main_~#t1924~0#1.base] {3338#(= ~y~0 0)} is VALID
[2022-02-20 20:28:10,346 INFO  L290        TraceCheckUtils]: 61: Hoare triple {3338#(= ~y~0 0)} [1206] L827-1-->L828: Formula: (= |v_ULTIMATE.start_main_#t~pre68#1_2| |v_#pthreadsForks_4|)  InVars {#pthreadsForks=|v_#pthreadsForks_4|}  OutVars{#pthreadsForks=|v_#pthreadsForks_4|, ULTIMATE.start_main_#t~pre68#1=|v_ULTIMATE.start_main_#t~pre68#1_2|}  AuxVars[]  AssignedVars[ULTIMATE.start_main_#t~pre68#1] {3338#(= ~y~0 0)} is VALID
[2022-02-20 20:28:10,346 INFO  L290        TraceCheckUtils]: 62: Hoare triple {3338#(= ~y~0 0)} [1208] L828-->L828-1: Formula: (= (+ 1 |v_#pthreadsForks_6|) |v_#pthreadsForks_5|)  InVars {#pthreadsForks=|v_#pthreadsForks_6|}  OutVars{#pthreadsForks=|v_#pthreadsForks_5|}  AuxVars[]  AssignedVars[#pthreadsForks] {3338#(= ~y~0 0)} is VALID
[2022-02-20 20:28:10,346 INFO  L290        TraceCheckUtils]: 63: Hoare triple {3338#(= ~y~0 0)} [1143] L828-1-->L828-2: Formula: (= (store |v_#memory_int_23| |v_ULTIMATE.start_main_~#t1924~0#1.base_3| (store (select |v_#memory_int_23| |v_ULTIMATE.start_main_~#t1924~0#1.base_3|) |v_ULTIMATE.start_main_~#t1924~0#1.offset_3| |v_ULTIMATE.start_main_#t~pre68#1_3|)) |v_#memory_int_22|)  InVars {#memory_int=|v_#memory_int_23|, ULTIMATE.start_main_~#t1924~0#1.offset=|v_ULTIMATE.start_main_~#t1924~0#1.offset_3|, ULTIMATE.start_main_#t~pre68#1=|v_ULTIMATE.start_main_#t~pre68#1_3|, ULTIMATE.start_main_~#t1924~0#1.base=|v_ULTIMATE.start_main_~#t1924~0#1.base_3|}  OutVars{#memory_int=|v_#memory_int_22|, ULTIMATE.start_main_~#t1924~0#1.offset=|v_ULTIMATE.start_main_~#t1924~0#1.offset_3|, ULTIMATE.start_main_#t~pre68#1=|v_ULTIMATE.start_main_#t~pre68#1_3|, ULTIMATE.start_main_~#t1924~0#1.base=|v_ULTIMATE.start_main_~#t1924~0#1.base_3|}  AuxVars[]  AssignedVars[#memory_int] {3338#(= ~y~0 0)} is VALID
[2022-02-20 20:28:10,351 INFO  L290        TraceCheckUtils]: 64: Hoare triple {3338#(= ~y~0 0)} [1237] L828-2-->P1ENTRY: Formula: (and (= v_P1Thread1of1ForFork0_thidvar2_2 0) (= |v_ULTIMATE.start_main_#t~pre68#1_6| v_P1Thread1of1ForFork0_thidvar0_2) (= |v_P1Thread1of1ForFork0_#in~arg.offset_4| 0) (= |v_P1Thread1of1ForFork0_#in~arg.base_4| 0) (= v_P1Thread1of1ForFork0_thidvar1_2 0))  InVars {ULTIMATE.start_main_#t~pre68#1=|v_ULTIMATE.start_main_#t~pre68#1_6|}  OutVars{P1Thread1of1ForFork0_#t~ite47=|v_P1Thread1of1ForFork0_#t~ite47_6|, P1Thread1of1ForFork0_#t~ite24=|v_P1Thread1of1ForFork0_#t~ite24_4|, P1Thread1of1ForFork0_#t~ite22=|v_P1Thread1of1ForFork0_#t~ite22_6|, P1Thread1of1ForFork0_#t~ite45=|v_P1Thread1of1ForFork0_#t~ite45_6|, P1Thread1of1ForFork0_#t~ite28=|v_P1Thread1of1ForFork0_#t~ite28_6|, P1Thread1of1ForFork0_#t~ite26=|v_P1Thread1of1ForFork0_#t~ite26_6|, P1Thread1of1ForFork0_#t~ite49=|v_P1Thread1of1ForFork0_#t~ite49_4|, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_4|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_4|, P1Thread1of1ForFork0_#t~ite43=|v_P1Thread1of1ForFork0_#t~ite43_6|, P1Thread1of1ForFork0_#t~ite20=|v_P1Thread1of1ForFork0_#t~ite20_6|, P1Thread1of1ForFork0_#t~ite60=|v_P1Thread1of1ForFork0_#t~ite60_6|, P1Thread1of1ForFork0_#t~ite41=|v_P1Thread1of1ForFork0_#t~ite41_6|, P1Thread1of1ForFork0_#t~nondet10=|v_P1Thread1of1ForFork0_#t~nondet10_6|, P1Thread1of1ForFork0_#t~mem56=|v_P1Thread1of1ForFork0_#t~mem56_4|, P1Thread1of1ForFork0_#t~mem14=|v_P1Thread1of1ForFork0_#t~mem14_6|, P1Thread1of1ForFork0_#t~mem12=|v_P1Thread1of1ForFork0_#t~mem12_4|, P1Thread1of1ForFork0_#t~ite36=|v_P1Thread1of1ForFork0_#t~ite36_6|, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_4|, P1Thread1of1ForFork0_#t~ite34=|v_P1Thread1of1ForFork0_#t~ite34_4|, P1Thread1of1ForFork0_#t~ite55=|v_P1Thread1of1ForFork0_#t~ite55_4|, P1Thread1of1ForFork0_#t~ite38=|v_P1Thread1of1ForFork0_#t~ite38_6|, P1Thread1of1ForFork0_#t~ite17=|v_P1Thread1of1ForFork0_#t~ite17_6|, P1Thread1of1ForFork0_#t~ite53=|v_P1Thread1of1ForFork0_#t~ite53_6|, P1Thread1of1ForFork0_#t~ite32=|v_P1Thread1of1ForFork0_#t~ite32_6|, P1Thread1of1ForFork0_#t~ite30=|v_P1Thread1of1ForFork0_#t~ite30_6|, P1Thread1of1ForFork0_#t~ite51=|v_P1Thread1of1ForFork0_#t~ite51_6|, P1Thread1of1ForFork0_thidvar2=v_P1Thread1of1ForFork0_thidvar2_2, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_4|, P1Thread1of1ForFork0_#t~ite46=|v_P1Thread1of1ForFork0_#t~ite46_6|, P1Thread1of1ForFork0_#t~ite25=|v_P1Thread1of1ForFork0_#t~ite25_6|, P1Thread1of1ForFork0_#t~ite23=|v_P1Thread1of1ForFork0_#t~ite23_6|, P1Thread1of1ForFork0_#t~ite44=|v_P1Thread1of1ForFork0_#t~ite44_4|, P1Thread1of1ForFork0_#t~ite29=|v_P1Thread1of1ForFork0_#t~ite29_4|, P1Thread1of1ForFork0_#t~ite27=|v_P1Thread1of1ForFork0_#t~ite27_6|, P1Thread1of1ForFork0_#t~ite48=|v_P1Thread1of1ForFork0_#t~ite48_6|, P1Thread1of1ForFork0_#t~nondet13=|v_P1Thread1of1ForFork0_#t~nondet13_6|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_4|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_4|, ULTIMATE.start_main_#t~pre68#1=|v_ULTIMATE.start_main_#t~pre68#1_6|, P1Thread1of1ForFork0_thidvar1=v_P1Thread1of1ForFork0_thidvar1_2, P1Thread1of1ForFork0_#t~ite42=|v_P1Thread1of1ForFork0_#t~ite42_6|, P1Thread1of1ForFork0_#t~ite21=|v_P1Thread1of1ForFork0_#t~ite21_6|, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_4|, P1Thread1of1ForFork0_#t~ite61=|v_P1Thread1of1ForFork0_#t~ite61_4|, P1Thread1of1ForFork0_#t~ite40=|v_P1Thread1of1ForFork0_#t~ite40_6|, P1Thread1of1ForFork0_#t~nondet11=|v_P1Thread1of1ForFork0_#t~nondet11_6|, P1Thread1of1ForFork0_#t~mem57=|v_P1Thread1of1ForFork0_#t~mem57_6|, P1Thread1of1ForFork0_#t~mem59=|v_P1Thread1of1ForFork0_#t~mem59_6|, P1Thread1of1ForFork0_~arg.base=v_P1Thread1of1ForFork0_~arg.base_4, P1Thread1of1ForFork0_#t~mem15=|v_P1Thread1of1ForFork0_#t~mem15_6|, P1Thread1of1ForFork0_#t~ite58=|v_P1Thread1of1ForFork0_#t~ite58_4|, P1Thread1of1ForFork0_#t~ite35=|v_P1Thread1of1ForFork0_#t~ite35_6|, P1Thread1of1ForFork0_#t~ite33=|v_P1Thread1of1ForFork0_#t~ite33_6|, P1Thread1of1ForFork0_#t~ite16=|v_P1Thread1of1ForFork0_#t~ite16_6|, P1Thread1of1ForFork0_#t~ite39=|v_P1Thread1of1ForFork0_#t~ite39_4|, P1Thread1of1ForFork0_#t~ite37=|v_P1Thread1of1ForFork0_#t~ite37_6|, P1Thread1of1ForFork0_#t~ite18=|v_P1Thread1of1ForFork0_#t~ite18_6|, P1Thread1of1ForFork0_#t~ite50=|v_P1Thread1of1ForFork0_#t~ite50_6|, P1Thread1of1ForFork0_~arg.offset=v_P1Thread1of1ForFork0_~arg.offset_4, P1Thread1of1ForFork0_#t~ite54=|v_P1Thread1of1ForFork0_#t~ite54_6|, P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_6|, P1Thread1of1ForFork0_thidvar0=v_P1Thread1of1ForFork0_thidvar0_2, P1Thread1of1ForFork0_#t~ite52=|v_P1Thread1of1ForFork0_#t~ite52_6|, P1Thread1of1ForFork0_#t~mem19=|v_P1Thread1of1ForFork0_#t~mem19_6|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_4|}  AuxVars[]  AssignedVars[P1Thread1of1ForFork0_#t~ite47, P1Thread1of1ForFork0_#t~ite24, P1Thread1of1ForFork0_#t~ite22, P1Thread1of1ForFork0_#t~ite45, P1Thread1of1ForFork0_#t~ite28, P1Thread1of1ForFork0_#t~ite26, P1Thread1of1ForFork0_#t~ite49, P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite43, P1Thread1of1ForFork0_#t~ite20, P1Thread1of1ForFork0_#t~ite60, P1Thread1of1ForFork0_#t~ite41, P1Thread1of1ForFork0_#t~nondet10, P1Thread1of1ForFork0_#t~mem56, P1Thread1of1ForFork0_#t~mem14, P1Thread1of1ForFork0_#t~mem12, P1Thread1of1ForFork0_#t~ite36, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#t~ite34, P1Thread1of1ForFork0_#t~ite55, P1Thread1of1ForFork0_#t~ite38, P1Thread1of1ForFork0_#t~ite17, P1Thread1of1ForFork0_#t~ite53, P1Thread1of1ForFork0_#t~ite32, P1Thread1of1ForFork0_#t~ite30, P1Thread1of1ForFork0_#t~ite51, P1Thread1of1ForFork0_thidvar2, P1Thread1of1ForFork0_#in~arg.offset, P1Thread1of1ForFork0_#t~ite46, P1Thread1of1ForFork0_#t~ite25, P1Thread1of1ForFork0_#t~ite23, P1Thread1of1ForFork0_#t~ite44, P1Thread1of1ForFork0_#t~ite29, P1Thread1of1ForFork0_#t~ite27, P1Thread1of1ForFork0_#t~ite48, P1Thread1of1ForFork0_#t~nondet13, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite65, P1Thread1of1ForFork0_thidvar1, P1Thread1of1ForFork0_#t~ite42, P1Thread1of1ForFork0_#t~ite21, P1Thread1of1ForFork0_#in~arg.base, P1Thread1of1ForFork0_#t~ite61, P1Thread1of1ForFork0_#t~ite40, P1Thread1of1ForFork0_#t~nondet11, P1Thread1of1ForFork0_#t~mem57, P1Thread1of1ForFork0_#t~mem59, P1Thread1of1ForFork0_~arg.base, P1Thread1of1ForFork0_#t~mem15, P1Thread1of1ForFork0_#t~ite58, P1Thread1of1ForFork0_#t~ite35, P1Thread1of1ForFork0_#t~ite33, P1Thread1of1ForFork0_#t~ite16, P1Thread1of1ForFork0_#t~ite39, P1Thread1of1ForFork0_#t~ite37, P1Thread1of1ForFork0_#t~ite18, P1Thread1of1ForFork0_#t~ite50, P1Thread1of1ForFork0_~arg.offset, P1Thread1of1ForFork0_#t~ite54, P1Thread1of1ForFork0_#t~ite31, P1Thread1of1ForFork0_thidvar0, P1Thread1of1ForFork0_#t~ite52, P1Thread1of1ForFork0_#t~mem19, P1Thread1of1ForFork0_#res.base] {3338#(= ~y~0 0)} is VALID
[2022-02-20 20:28:10,352 INFO  L290        TraceCheckUtils]: 65: Hoare triple {3338#(= ~y~0 0)} [1222] L752-->L754: Formula: (= v_~__unbuffered_p0_EAX~0_1 v_~y~0_1)  InVars {~y~0=v_~y~0_1}  OutVars{~y~0=v_~y~0_1, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p0_EAX~0] {3339#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:10,352 INFO  L290        TraceCheckUtils]: 66: Hoare triple {3339#(= ~__unbuffered_p0_EAX~0 0)} [1188] L828-3-->L828-4: Formula: true  InVars {}  OutVars{ULTIMATE.start_main_#t~pre68#1=|v_ULTIMATE.start_main_#t~pre68#1_4|}  AuxVars[]  AssignedVars[ULTIMATE.start_main_#t~pre68#1] {3339#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:10,352 INFO  L290        TraceCheckUtils]: 67: Hoare triple {3339#(= ~__unbuffered_p0_EAX~0 0)} [1178] L828-4-->L829: Formula: true  InVars {}  OutVars{ULTIMATE.start_main_#t~nondet69#1=|v_ULTIMATE.start_main_#t~nondet69#1_2|}  AuxVars[]  AssignedVars[ULTIMATE.start_main_#t~nondet69#1] {3339#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:10,353 INFO  L290        TraceCheckUtils]: 68: Hoare triple {3339#(= ~__unbuffered_p0_EAX~0 0)} [1120] L829-->L831: Formula: (= v_~main$tmp_guard0~0_2 (ite (= (ite (= v_~__unbuffered_cnt~0_6 2) 1 0) 0) 0 1))  InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_6}  OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_6, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_2}  AuxVars[]  AssignedVars[~main$tmp_guard0~0] {3339#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:10,353 INFO  L290        TraceCheckUtils]: 69: Hoare triple {3339#(= ~__unbuffered_p0_EAX~0 0)} [1185] L831-->L832: Formula: true  InVars {}  OutVars{}  AuxVars[]  AssignedVars[] {3339#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:10,353 INFO  L290        TraceCheckUtils]: 70: Hoare triple {3339#(= ~__unbuffered_p0_EAX~0 0)} [1112] L832-->L832-1: Formula: (= |v_ULTIMATE.start_assume_abort_if_not_#in~cond#1_1| (mod v_~main$tmp_guard0~0_3 256))  InVars {~main$tmp_guard0~0=v_~main$tmp_guard0~0_3}  OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_3, ULTIMATE.start_assume_abort_if_not_#in~cond#1=|v_ULTIMATE.start_assume_abort_if_not_#in~cond#1_1|}  AuxVars[]  AssignedVars[ULTIMATE.start_assume_abort_if_not_#in~cond#1] {3339#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:10,354 INFO  L290        TraceCheckUtils]: 71: Hoare triple {3339#(= ~__unbuffered_p0_EAX~0 0)} [1215] L832-1-->L2: Formula: true  InVars {}  OutVars{ULTIMATE.start_assume_abort_if_not_~cond#1=|v_ULTIMATE.start_assume_abort_if_not_~cond#1_1|}  AuxVars[]  AssignedVars[ULTIMATE.start_assume_abort_if_not_~cond#1] {3339#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:10,354 INFO  L290        TraceCheckUtils]: 72: Hoare triple {3339#(= ~__unbuffered_p0_EAX~0 0)} [1173] L2-->L3: Formula: (= |v_ULTIMATE.start_assume_abort_if_not_#in~cond#1_2| |v_ULTIMATE.start_assume_abort_if_not_~cond#1_2|)  InVars {ULTIMATE.start_assume_abort_if_not_#in~cond#1=|v_ULTIMATE.start_assume_abort_if_not_#in~cond#1_2|}  OutVars{ULTIMATE.start_assume_abort_if_not_~cond#1=|v_ULTIMATE.start_assume_abort_if_not_~cond#1_2|, ULTIMATE.start_assume_abort_if_not_#in~cond#1=|v_ULTIMATE.start_assume_abort_if_not_#in~cond#1_2|}  AuxVars[]  AssignedVars[ULTIMATE.start_assume_abort_if_not_~cond#1] {3339#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:10,354 INFO  L290        TraceCheckUtils]: 73: Hoare triple {3339#(= ~__unbuffered_p0_EAX~0 0)} [1162] L3-->L2-1: Formula: (not (= |v_ULTIMATE.start_assume_abort_if_not_~cond#1_4| 0))  InVars {ULTIMATE.start_assume_abort_if_not_~cond#1=|v_ULTIMATE.start_assume_abort_if_not_~cond#1_4|}  OutVars{ULTIMATE.start_assume_abort_if_not_~cond#1=|v_ULTIMATE.start_assume_abort_if_not_~cond#1_4|}  AuxVars[]  AssignedVars[] {3339#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:10,355 INFO  L290        TraceCheckUtils]: 74: Hoare triple {3339#(= ~__unbuffered_p0_EAX~0 0)} [1134] L2-1-->L833: Formula: true  InVars {}  OutVars{}  AuxVars[]  AssignedVars[] {3339#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:10,355 INFO  L290        TraceCheckUtils]: 75: Hoare triple {3339#(= ~__unbuffered_p0_EAX~0 0)} [1150] L833-->L839: Formula: (let ((.cse15 (= (mod v_~x$w_buff0_used~0_455 256) 0)) (.cse14 (= (mod v_~x$r_buff0_thd0~0_70 256) 0)) (.cse11 (= (mod v_~x$w_buff0_used~0_454 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd0~0_48 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_374 256) 0))) (let ((.cse4 (not .cse16)) (.cse5 (not .cse12)) (.cse6 (or .cse12 .cse16)) (.cse13 (or .cse14 .cse11)) (.cse9 (not .cse11)) (.cse0 (not .cse15)) (.cse1 (not .cse14)) (.cse3 (or .cse14 .cse15)) (.cse7 (select |v_#memory_int_251| |v_~#x~0.base_168|))) (and (let ((.cse2 (= |v_ULTIMATE.start_main_#t~mem70#1_41| |v_ULTIMATE.start_main_#t~mem70#1_36|))) (or (and (= |v_ULTIMATE.start_main_#t~ite71#1_42| |v_ULTIMATE.start_main_#t~ite71#1_37|) .cse0 (= v_~x$w_buff0~0_126 |v_ULTIMATE.start_main_#t~ite72#1_36|) .cse1 .cse2) (and .cse3 (= |v_ULTIMATE.start_main_#t~ite71#1_42| |v_ULTIMATE.start_main_#t~ite72#1_36|) (or (and .cse4 (= v_~x$w_buff1~0_111 |v_ULTIMATE.start_main_#t~ite71#1_42|) .cse2 .cse5) (and .cse6 (= |v_ULTIMATE.start_main_#t~mem70#1_41| |v_ULTIMATE.start_main_#t~ite71#1_42|) (= |v_ULTIMATE.start_main_#t~mem70#1_41| (select .cse7 |v_~#x~0.offset_168|))))))) (let ((.cse10 (= (mod v_~x$r_buff0_thd0~0_69 256) 0)) (.cse8 (= (mod v_~x$w_buff1_used~0_373 256) 0))) (or (and (or (and (not .cse8) .cse5) (and .cse9 (not .cse10))) (= v_~x$r_buff1_thd0~0_47 0)) (and (or .cse10 .cse11) (or .cse8 .cse12) (= v_~x$r_buff1_thd0~0_48 v_~x$r_buff1_thd0~0_47)))) (or (and (or (and .cse9 .cse1) (and .cse4 .cse5)) (= v_~x$w_buff1_used~0_373 0)) (and .cse6 (= v_~x$w_buff1_used~0_374 v_~x$w_buff1_used~0_373) .cse13)) (or (and .cse13 (= v_~x$r_buff0_thd0~0_69 v_~x$r_buff0_thd0~0_70)) (and (= v_~x$r_buff0_thd0~0_69 0) .cse9 .cse1)) (or (and .cse0 (= v_~x$w_buff0_used~0_454 0) .cse1) (and (= v_~x$w_buff0_used~0_455 v_~x$w_buff0_used~0_454) .cse3)) (= (store |v_#memory_int_251| |v_~#x~0.base_168| (store .cse7 |v_~#x~0.offset_168| |v_ULTIMATE.start_main_#t~ite72#1_36|)) |v_#memory_int_250|))))  InVars {~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_70, ULTIMATE.start_main_#t~ite71#1=|v_ULTIMATE.start_main_#t~ite71#1_37|, ~#x~0.offset=|v_~#x~0.offset_168|, ULTIMATE.start_main_#t~mem70#1=|v_ULTIMATE.start_main_#t~mem70#1_36|, ~x$w_buff1~0=v_~x$w_buff1~0_111, #memory_int=|v_#memory_int_251|, ~#x~0.base=|v_~#x~0.base_168|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_374, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_48, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_455}  OutVars{~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_69, ULTIMATE.start_main_#t~ite74#1=|v_ULTIMATE.start_main_#t~ite74#1_30|, ~#x~0.offset=|v_~#x~0.offset_168|, ULTIMATE.start_main_#t~mem70#1=|v_ULTIMATE.start_main_#t~mem70#1_35|, ULTIMATE.start_main_#t~ite72#1=|v_ULTIMATE.start_main_#t~ite72#1_32|, ~x$w_buff1~0=v_~x$w_buff1~0_111, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_373, ULTIMATE.start_main_#t~ite76#1=|v_ULTIMATE.start_main_#t~ite76#1_16|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_47, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_454, ULTIMATE.start_main_#t~ite71#1=|v_ULTIMATE.start_main_#t~ite71#1_36|, ULTIMATE.start_main_#t~ite73#1=|v_ULTIMATE.start_main_#t~ite73#1_32|, ULTIMATE.start_main_#t~ite75#1=|v_ULTIMATE.start_main_#t~ite75#1_28|, #memory_int=|v_#memory_int_250|, ~#x~0.base=|v_~#x~0.base_168|}  AuxVars[|v_ULTIMATE.start_main_#t~ite71#1_42|, |v_ULTIMATE.start_main_#t~mem70#1_41|, |v_ULTIMATE.start_main_#t~ite72#1_36|]  AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite71#1, ULTIMATE.start_main_#t~ite74#1, ULTIMATE.start_main_#t~mem70#1, ULTIMATE.start_main_#t~ite73#1, ULTIMATE.start_main_#t~ite72#1, ULTIMATE.start_main_#t~ite75#1, #memory_int, ~x$w_buff1_used~0, ULTIMATE.start_main_#t~ite76#1, ~x$r_buff1_thd0~0, ~x$w_buff0_used~0] {3339#(= ~__unbuffered_p0_EAX~0 0)} is VALID
[2022-02-20 20:28:10,356 INFO  L290        TraceCheckUtils]: 76: Hoare triple {3339#(= ~__unbuffered_p0_EAX~0 0)} [1135] L839-->L844: Formula: (and (= (ite (= (ite (not (and (= v_~__unbuffered_p0_EAX~0_10 1) (= v_~__unbuffered_p1_EAX~0_45 1))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_10) (= v_~weak$$choice1~0_71 |v_ULTIMATE.start_main_#t~nondet77#1_9|) (let ((.cse0 (= (mod v_~__unbuffered_p1_EAX$read_delayed~0_39 256) 0)) (.cse1 (= |v_ULTIMATE.start_main_#t~mem78#1_28| |v_ULTIMATE.start_main_#t~mem78#1_33|))) (or (and (= |v_ULTIMATE.start_main_#t~ite79#1_25| |v_ULTIMATE.start_main_#t~ite79#1_30|) .cse0 .cse1 (= v_~__unbuffered_p1_EAX~0_46 v_~__unbuffered_p1_EAX~0_45)) (and (not .cse0) (let ((.cse2 (= (mod v_~weak$$choice1~0_71 256) 0))) (or (and (= |v_ULTIMATE.start_main_#t~mem78#1_33| |v_ULTIMATE.start_main_#t~ite79#1_30|) (= (select (select |v_#memory_int_220| v_~__unbuffered_p1_EAX$read_delayed_var~0.base_40) v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_40) |v_ULTIMATE.start_main_#t~mem78#1_33|) (not .cse2)) (and .cse1 (= v_~__unbuffered_p1_EAX~0_46 |v_ULTIMATE.start_main_#t~ite79#1_30|) .cse2))) (= v_~__unbuffered_p1_EAX~0_45 |v_ULTIMATE.start_main_#t~ite79#1_30|)))))  InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_10, ULTIMATE.start_main_#t~nondet77#1=|v_ULTIMATE.start_main_#t~nondet77#1_9|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_46, ~__unbuffered_p1_EAX$read_delayed~0=v_~__unbuffered_p1_EAX$read_delayed~0_39, ~__unbuffered_p1_EAX$read_delayed_var~0.base=v_~__unbuffered_p1_EAX$read_delayed_var~0.base_40, #memory_int=|v_#memory_int_220|, ~__unbuffered_p1_EAX$read_delayed_var~0.offset=v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_40, ULTIMATE.start_main_#t~ite79#1=|v_ULTIMATE.start_main_#t~ite79#1_25|, ULTIMATE.start_main_#t~mem78#1=|v_ULTIMATE.start_main_#t~mem78#1_28|}  OutVars{ULTIMATE.start_main_#t~nondet77#1=|v_ULTIMATE.start_main_#t~nondet77#1_8|, ~__unbuffered_p1_EAX$read_delayed~0=v_~__unbuffered_p1_EAX$read_delayed~0_39, ~__unbuffered_p1_EAX$read_delayed_var~0.offset=v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_40, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_10, ULTIMATE.start_main_#t~ite80#1=|v_ULTIMATE.start_main_#t~ite80#1_26|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_10, ~weak$$choice1~0=v_~weak$$choice1~0_71, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_45, ~__unbuffered_p1_EAX$read_delayed_var~0.base=v_~__unbuffered_p1_EAX$read_delayed_var~0.base_40, #memory_int=|v_#memory_int_220|, ULTIMATE.start_main_#t~ite79#1=|v_ULTIMATE.start_main_#t~ite79#1_24|, ULTIMATE.start_main_#t~mem78#1=|v_ULTIMATE.start_main_#t~mem78#1_27|}  AuxVars[|v_ULTIMATE.start_main_#t~ite79#1_30|, |v_ULTIMATE.start_main_#t~mem78#1_33|]  AssignedVars[~weak$$choice1~0, ULTIMATE.start_main_#t~nondet77#1, ~__unbuffered_p1_EAX~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite80#1, ULTIMATE.start_main_#t~ite79#1, ULTIMATE.start_main_#t~mem78#1] {3340#(and (<= 1 ~main$tmp_guard1~0) (<= (div ~main$tmp_guard1~0 256) 0))} is VALID
[2022-02-20 20:28:10,356 INFO  L290        TraceCheckUtils]: 77: Hoare triple {3340#(and (<= 1 ~main$tmp_guard1~0) (<= (div ~main$tmp_guard1~0 256) 0))} [1177] L844-->L845: Formula: true  InVars {}  OutVars{}  AuxVars[]  AssignedVars[] {3340#(and (<= 1 ~main$tmp_guard1~0) (<= (div ~main$tmp_guard1~0 256) 0))} is VALID
[2022-02-20 20:28:10,357 INFO  L290        TraceCheckUtils]: 78: Hoare triple {3340#(and (<= 1 ~main$tmp_guard1~0) (<= (div ~main$tmp_guard1~0 256) 0))} [1204] L845-->L845-1: Formula: (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression#1_1| (mod v_~main$tmp_guard1~0_3 256))  InVars {~main$tmp_guard1~0=v_~main$tmp_guard1~0_3}  OutVars{ULTIMATE.start___VERIFIER_assert_#in~expression#1=|v_ULTIMATE.start___VERIFIER_assert_#in~expression#1_1|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_3}  AuxVars[]  AssignedVars[ULTIMATE.start___VERIFIER_assert_#in~expression#1] {3341#(or (<= (+ |ULTIMATE.start___VERIFIER_assert_#in~expression#1| 255) 0) (<= 1 |ULTIMATE.start___VERIFIER_assert_#in~expression#1|))} is VALID
[2022-02-20 20:28:10,357 INFO  L290        TraceCheckUtils]: 79: Hoare triple {3341#(or (<= (+ |ULTIMATE.start___VERIFIER_assert_#in~expression#1| 255) 0) (<= 1 |ULTIMATE.start___VERIFIER_assert_#in~expression#1|))} [1127] L845-1-->L18: Formula: true  InVars {}  OutVars{ULTIMATE.start___VERIFIER_assert_~expression#1=|v_ULTIMATE.start___VERIFIER_assert_~expression#1_1|}  AuxVars[]  AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression#1] {3341#(or (<= (+ |ULTIMATE.start___VERIFIER_assert_#in~expression#1| 255) 0) (<= 1 |ULTIMATE.start___VERIFIER_assert_#in~expression#1|))} is VALID
[2022-02-20 20:28:10,358 INFO  L290        TraceCheckUtils]: 80: Hoare triple {3341#(or (<= (+ |ULTIMATE.start___VERIFIER_assert_#in~expression#1| 255) 0) (<= 1 |ULTIMATE.start___VERIFIER_assert_#in~expression#1|))} [1189] L18-->L18-1: Formula: (= |v_ULTIMATE.start___VERIFIER_assert_~expression#1_2| |v_ULTIMATE.start___VERIFIER_assert_#in~expression#1_2|)  InVars {ULTIMATE.start___VERIFIER_assert_#in~expression#1=|v_ULTIMATE.start___VERIFIER_assert_#in~expression#1_2|}  OutVars{ULTIMATE.start___VERIFIER_assert_#in~expression#1=|v_ULTIMATE.start___VERIFIER_assert_#in~expression#1_2|, ULTIMATE.start___VERIFIER_assert_~expression#1=|v_ULTIMATE.start___VERIFIER_assert_~expression#1_2|}  AuxVars[]  AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression#1] {3342#(or (<= 1 |ULTIMATE.start___VERIFIER_assert_~expression#1|) (<= (+ |ULTIMATE.start___VERIFIER_assert_~expression#1| 255) 0))} is VALID
[2022-02-20 20:28:10,358 INFO  L290        TraceCheckUtils]: 81: Hoare triple {3342#(or (<= 1 |ULTIMATE.start___VERIFIER_assert_~expression#1|) (<= (+ |ULTIMATE.start___VERIFIER_assert_~expression#1| 255) 0))} [1156] L18-1-->L18-2: Formula: (= |v_ULTIMATE.start___VERIFIER_assert_~expression#1_3| 0)  InVars {ULTIMATE.start___VERIFIER_assert_~expression#1=|v_ULTIMATE.start___VERIFIER_assert_~expression#1_3|}  OutVars{ULTIMATE.start___VERIFIER_assert_~expression#1=|v_ULTIMATE.start___VERIFIER_assert_~expression#1_3|}  AuxVars[]  AssignedVars[] {3337#false} is VALID
[2022-02-20 20:28:10,358 INFO  L290        TraceCheckUtils]: 82: Hoare triple {3337#false} [1145] L18-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true  InVars {}  OutVars{}  AuxVars[]  AssignedVars[] {3337#false} is VALID
[2022-02-20 20:28:10,359 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2022-02-20 20:28:10,360 INFO  L144   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2022-02-20 20:28:10,360 INFO  L338   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [926390649]
[2022-02-20 20:28:10,360 INFO  L165   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [926390649] provided 1 perfect and 0 imperfect interpolant sequences
[2022-02-20 20:28:10,360 INFO  L191   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2022-02-20 20:28:10,360 INFO  L204   FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7
[2022-02-20 20:28:10,360 INFO  L118   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2107627548]
[2022-02-20 20:28:10,360 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2022-02-20 20:28:10,361 INFO  L78                 Accepts]: Start accepts. Automaton has  has 7 states, 7 states have (on average 11.857142857142858) internal successors, (83), 7 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 83
[2022-02-20 20:28:10,361 INFO  L84                 Accepts]: Finished accepts. word is accepted.
[2022-02-20 20:28:10,361 INFO  L86        InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with  has 7 states, 7 states have (on average 11.857142857142858) internal successors, (83), 7 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-02-20 20:28:10,411 INFO  L122       InductivityCheck]: Floyd-Hoare automaton has 83 edges. 83 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. 
[2022-02-20 20:28:10,412 INFO  L546      AbstractCegarLoop]: INTERPOLANT automaton has 7 states
[2022-02-20 20:28:10,412 INFO  L108   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2022-02-20 20:28:10,413 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants.
[2022-02-20 20:28:10,413 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42
[2022-02-20 20:28:10,414 INFO  L499   CegarLoopForPetriNet]: Number of universal loopers: 90 out of 112
[2022-02-20 20:28:10,415 INFO  L92    encePairwiseOnDemand]: Start differencePairwiseOnDemand. First operand has 126 places, 96 transitions, 216 flow. Second operand  has 7 states, 7 states have (on average 91.71428571428571) internal successors, (642), 7 states have internal predecessors, (642), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-02-20 20:28:10,415 INFO  L101   encePairwiseOnDemand]: Universal subtrahend loopers provided by user.
[2022-02-20 20:28:10,415 INFO  L102   encePairwiseOnDemand]: Number of universal subtrahend loopers: 90 of 112
[2022-02-20 20:28:10,415 INFO  L74            FinitePrefix]: Start finitePrefix. Operand will be constructed on-demand
[2022-02-20 20:28:10,962 INFO  L129       PetriNetUnfolder]: 147/419 cut-off events.
[2022-02-20 20:28:10,962 INFO  L130       PetriNetUnfolder]: For 114/114 co-relation queries the response was YES.
[2022-02-20 20:28:10,964 INFO  L84            FinitePrefix]: Finished finitePrefix Result has 836 conditions, 419 events. 147/419 cut-off events. For 114/114 co-relation queries the response was YES. Maximal size of possible extension queue 26. Compared 1620 event pairs, 44 based on Foata normal form. 12/408 useless extension candidates. Maximal degree in co-relation 782. Up to 90 conditions per place. 
[2022-02-20 20:28:10,965 INFO  L132   encePairwiseOnDemand]: 104/112 looper letters, 16 selfloop transitions, 4 changer transitions 34/133 dead transitions.
[2022-02-20 20:28:10,965 INFO  L138   encePairwiseOnDemand]: Finished differencePairwiseOnDemand. Result has 119 places, 133 transitions, 421 flow
[2022-02-20 20:28:10,965 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. 
[2022-02-20 20:28:10,965 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 10 states.
[2022-02-20 20:28:10,972 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 956 transitions.
[2022-02-20 20:28:10,973 INFO  L544   CegarLoopForPetriNet]: DFA transition density 0.8535714285714285
[2022-02-20 20:28:10,973 INFO  L72            ComplementDD]: Start complementDD. Operand 10 states and 956 transitions.
[2022-02-20 20:28:10,974 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 10 states and 956 transitions.
[2022-02-20 20:28:10,974 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2022-02-20 20:28:10,974 INFO  L117    ReachableStatesCopy]: Start reachableStatesCopy. Operand 10 states and 956 transitions.
[2022-02-20 20:28:10,976 INFO  L343    DoubleDeckerVisitor]: Before removal of dead ends  has 11 states, 10 states have (on average 95.6) internal successors, (956), 10 states have internal predecessors, (956), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-02-20 20:28:10,977 INFO  L131    ReachableStatesCopy]: Finished reachableStatesCopy Result  has 11 states, 11 states have (on average 112.0) internal successors, (1232), 11 states have internal predecessors, (1232), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-02-20 20:28:10,978 INFO  L81            ComplementDD]: Finished complementDD. Result  has 11 states, 11 states have (on average 112.0) internal successors, (1232), 11 states have internal predecessors, (1232), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-02-20 20:28:10,978 INFO  L186             Difference]: Start difference. First operand has 126 places, 96 transitions, 216 flow. Second operand 10 states and 956 transitions.
[2022-02-20 20:28:10,978 INFO  L82        GeneralOperation]: Start removeRedundantFlow. Operand has 119 places, 133 transitions, 421 flow
[2022-02-20 20:28:12,780 INFO  L88        GeneralOperation]: Finished removeRedundantFlow, result has has 111 places, 133 transitions, 387 flow, removed 14 selfloop flow, removed 8 redundant places.
[2022-02-20 20:28:12,782 INFO  L242             Difference]: Finished difference. Result has 119 places, 96 transitions, 230 flow
[2022-02-20 20:28:12,782 INFO  L317   CegarLoopForPetriNet]: {PETRI_ALPHABET=112, PETRI_DIFFERENCE_MINUEND_FLOW=200, PETRI_DIFFERENCE_MINUEND_PLACES=102, PETRI_DIFFERENCE_MINUEND_TRANSITIONS=96, PETRI_DIFFERENCE_SUBTRAHEND_LETTERS_WITH_MORE_CHANGERS_THAN_LOOPERS=4, PETRI_DIFFERENCE_SUBTRAHEND_LOOPER_ONLY_LETTERS=92, PETRI_DIFFERENCE_SUBTRAHEND_STATES=10, PETRI_FLOW=230, PETRI_PLACES=119, PETRI_TRANSITIONS=96}
[2022-02-20 20:28:12,783 INFO  L334   CegarLoopForPetriNet]: 115 programPoint places, 4 predicate places.
[2022-02-20 20:28:12,783 INFO  L111   iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 119 places, 96 transitions, 230 flow
[2022-02-20 20:28:12,797 INFO  L133   iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result  has 833 states, 831 states have (on average 2.4657039711191335) internal successors, (2049), 832 states have internal predecessors, (2049), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-02-20 20:28:12,798 INFO  L78                 Accepts]: Start accepts. Automaton has  has 833 states, 831 states have (on average 2.4657039711191335) internal successors, (2049), 832 states have internal predecessors, (2049), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 83
[2022-02-20 20:28:12,798 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2022-02-20 20:28:12,799 INFO  L470      AbstractCegarLoop]: Abstraction has has 119 places, 96 transitions, 230 flow
[2022-02-20 20:28:12,799 INFO  L471      AbstractCegarLoop]: INTERPOLANT automaton has  has 7 states, 7 states have (on average 91.71428571428571) internal successors, (642), 7 states have internal predecessors, (642), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-02-20 20:28:12,799 INFO  L246   CegarLoopForPetriNet]: Found error trace
[2022-02-20 20:28:12,799 INFO  L254   CegarLoopForPetriNet]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2022-02-20 20:28:12,800 WARN  L452      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2
[2022-02-20 20:28:12,800 INFO  L402      AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATION (and 2 more)] ===
[2022-02-20 20:28:12,800 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2022-02-20 20:28:12,800 INFO  L85        PathProgramCache]: Analyzing trace with hash 964870461, now seen corresponding path program 1 times
[2022-02-20 20:28:12,800 INFO  L126   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2022-02-20 20:28:12,801 INFO  L338   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1582655859]
[2022-02-20 20:28:12,801 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2022-02-20 20:28:12,801 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2022-02-20 20:28:12,916 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2022-02-20 20:28:13,003 INFO  L290        TraceCheckUtils]: 0: Hoare triple {4200#true} [1205] ULTIMATE.startENTRY-->L-1: Formula: true  InVars {}  OutVars{}  AuxVars[]  AssignedVars[] {4200#true} is VALID
[2022-02-20 20:28:13,003 INFO  L290        TraceCheckUtils]: 1: Hoare triple {4200#true} [1144] L-1-->L-1-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0))  InVars {}  OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|}  AuxVars[]  AssignedVars[#NULL.offset, #NULL.base] {4200#true} is VALID
[2022-02-20 20:28:13,003 INFO  L290        TraceCheckUtils]: 2: Hoare triple {4200#true} [1210] L-1-1-->L-1-2: Formula: (= (select |v_#valid_1| 0) 0)  InVars {#valid=|v_#valid_1|}  OutVars{#valid=|v_#valid_1|}  AuxVars[]  AssignedVars[] {4200#true} is VALID
[2022-02-20 20:28:13,004 INFO  L290        TraceCheckUtils]: 3: Hoare triple {4200#true} [1214] L-1-2-->L17: Formula: (< 0 |v_#StackHeapBarrier_1|)  InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|}  OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|}  AuxVars[]  AssignedVars[] {4200#true} is VALID
[2022-02-20 20:28:13,004 INFO  L290        TraceCheckUtils]: 4: Hoare triple {4200#true} [1212] L17-->L17-1: Formula: (and (= (select |v_#valid_2| 1) 1) (= 2 (select |v_#length_1| 1)))  InVars {#length=|v_#length_1|, #valid=|v_#valid_2|}  OutVars{#length=|v_#length_1|, #valid=|v_#valid_2|}  AuxVars[]  AssignedVars[] {4200#true} is VALID
[2022-02-20 20:28:13,004 INFO  L290        TraceCheckUtils]: 5: Hoare triple {4200#true} [1179] L17-1-->L17-2: Formula: (= 48 (select (select |v_#memory_int_17| 1) 0))  InVars {#memory_int=|v_#memory_int_17|}  OutVars{#memory_int=|v_#memory_int_17|}  AuxVars[]  AssignedVars[] {4200#true} is VALID
[2022-02-20 20:28:13,004 INFO  L290        TraceCheckUtils]: 6: Hoare triple {4200#true} [1118] L17-2-->L17-3: Formula: (= (select (select |v_#memory_int_18| 1) 1) 0)  InVars {#memory_int=|v_#memory_int_18|}  OutVars{#memory_int=|v_#memory_int_18|}  AuxVars[]  AssignedVars[] {4200#true} is VALID
[2022-02-20 20:28:13,004 INFO  L290        TraceCheckUtils]: 7: Hoare triple {4200#true} [1186] L17-3-->L17-4: Formula: (and (= (select |v_#valid_3| 2) 1) (= 38 (select |v_#length_2| 2)))  InVars {#length=|v_#length_2|, #valid=|v_#valid_3|}  OutVars{#length=|v_#length_2|, #valid=|v_#valid_3|}  AuxVars[]  AssignedVars[] {4200#true} is VALID
[2022-02-20 20:28:13,005 INFO  L290        TraceCheckUtils]: 8: Hoare triple {4200#true} [1117] L17-4-->L710: Formula: (= v_~__unbuffered_cnt~0_5 0)  InVars {}  OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_5}  AuxVars[]  AssignedVars[~__unbuffered_cnt~0] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,005 INFO  L290        TraceCheckUtils]: 9: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1172] L710-->L712: Formula: (= v_~__unbuffered_p0_EAX~0_2 0)  InVars {}  OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_2}  AuxVars[]  AssignedVars[~__unbuffered_p0_EAX~0] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,005 INFO  L290        TraceCheckUtils]: 10: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1167] L712-->L713: Formula: (= v_~__unbuffered_p1_EAX~0_2 0)  InVars {}  OutVars{~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_2}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX~0] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,006 INFO  L290        TraceCheckUtils]: 11: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1192] L713-->L714: Formula: (= v_~__unbuffered_p1_EAX$flush_delayed~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$flush_delayed~0=v_~__unbuffered_p1_EAX$flush_delayed~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$flush_delayed~0] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,006 INFO  L290        TraceCheckUtils]: 12: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1115] L714-->L715: Formula: (= v_~__unbuffered_p1_EAX$mem_tmp~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$mem_tmp~0=v_~__unbuffered_p1_EAX$mem_tmp~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$mem_tmp~0] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,006 INFO  L290        TraceCheckUtils]: 13: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1121] L715-->L716: Formula: (= v_~__unbuffered_p1_EAX$r_buff0_thd0~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$r_buff0_thd0~0=v_~__unbuffered_p1_EAX$r_buff0_thd0~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$r_buff0_thd0~0] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,006 INFO  L290        TraceCheckUtils]: 14: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1148] L716-->L717: Formula: (= v_~__unbuffered_p1_EAX$r_buff0_thd1~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$r_buff0_thd1~0=v_~__unbuffered_p1_EAX$r_buff0_thd1~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$r_buff0_thd1~0] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,007 INFO  L290        TraceCheckUtils]: 15: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1128] L717-->L718: Formula: (= v_~__unbuffered_p1_EAX$r_buff0_thd2~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$r_buff0_thd2~0=v_~__unbuffered_p1_EAX$r_buff0_thd2~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$r_buff0_thd2~0] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,007 INFO  L290        TraceCheckUtils]: 16: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1184] L718-->L719: Formula: (= v_~__unbuffered_p1_EAX$r_buff1_thd0~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$r_buff1_thd0~0=v_~__unbuffered_p1_EAX$r_buff1_thd0~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$r_buff1_thd0~0] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,007 INFO  L290        TraceCheckUtils]: 17: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1174] L719-->L720: Formula: (= v_~__unbuffered_p1_EAX$r_buff1_thd1~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$r_buff1_thd1~0=v_~__unbuffered_p1_EAX$r_buff1_thd1~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$r_buff1_thd1~0] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,011 INFO  L290        TraceCheckUtils]: 18: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1133] L720-->L721: Formula: (= v_~__unbuffered_p1_EAX$r_buff1_thd2~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$r_buff1_thd2~0=v_~__unbuffered_p1_EAX$r_buff1_thd2~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$r_buff1_thd2~0] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,012 INFO  L290        TraceCheckUtils]: 19: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1180] L721-->L722: Formula: (= v_~__unbuffered_p1_EAX$read_delayed~0_2 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$read_delayed~0=v_~__unbuffered_p1_EAX$read_delayed~0_2}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$read_delayed~0] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,012 INFO  L290        TraceCheckUtils]: 20: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1166] L722-->L723: Formula: (and (= v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_2 0) (= v_~__unbuffered_p1_EAX$read_delayed_var~0.base_2 0))  InVars {}  OutVars{~__unbuffered_p1_EAX$read_delayed_var~0.base=v_~__unbuffered_p1_EAX$read_delayed_var~0.base_2, ~__unbuffered_p1_EAX$read_delayed_var~0.offset=v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_2}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$read_delayed_var~0.base, ~__unbuffered_p1_EAX$read_delayed_var~0.offset] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,013 INFO  L290        TraceCheckUtils]: 21: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1219] L723-->L724: Formula: (= v_~__unbuffered_p1_EAX$w_buff0~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$w_buff0~0=v_~__unbuffered_p1_EAX$w_buff0~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$w_buff0~0] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,020 INFO  L290        TraceCheckUtils]: 22: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1129] L724-->L725: Formula: (= v_~__unbuffered_p1_EAX$w_buff0_used~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$w_buff0_used~0=v_~__unbuffered_p1_EAX$w_buff0_used~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$w_buff0_used~0] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,021 INFO  L290        TraceCheckUtils]: 23: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1116] L725-->L726: Formula: (= v_~__unbuffered_p1_EAX$w_buff1~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$w_buff1~0=v_~__unbuffered_p1_EAX$w_buff1~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$w_buff1~0] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,022 INFO  L290        TraceCheckUtils]: 24: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1183] L726-->L727: Formula: (= v_~__unbuffered_p1_EAX$w_buff1_used~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$w_buff1_used~0=v_~__unbuffered_p1_EAX$w_buff1_used~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$w_buff1_used~0] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,022 INFO  L290        TraceCheckUtils]: 25: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1123] L727-->L728: Formula: (= v_~main$tmp_guard0~0_1 0)  InVars {}  OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_1}  AuxVars[]  AssignedVars[~main$tmp_guard0~0] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,022 INFO  L290        TraceCheckUtils]: 26: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1168] L728-->L730: Formula: (= v_~main$tmp_guard1~0_1 0)  InVars {}  OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_1}  AuxVars[]  AssignedVars[~main$tmp_guard1~0] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,023 INFO  L290        TraceCheckUtils]: 27: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1159] L730-->L730-1: Formula: (and (= 3 |v_~#x~0.base_14|) (= |v_~#x~0.offset_14| 0))  InVars {}  OutVars{~#x~0.base=|v_~#x~0.base_14|, ~#x~0.offset=|v_~#x~0.offset_14|}  AuxVars[]  AssignedVars[~#x~0.offset, ~#x~0.base] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,024 INFO  L290        TraceCheckUtils]: 28: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1200] L730-1-->L730-2: Formula: (and (= (select |v_#valid_4| 3) 1) (= 4 (select |v_#length_3| 3)))  InVars {#length=|v_#length_3|, #valid=|v_#valid_4|}  OutVars{#length=|v_#length_3|, #valid=|v_#valid_4|}  AuxVars[]  AssignedVars[] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,024 INFO  L290        TraceCheckUtils]: 29: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1155] L730-2-->L730-3: Formula: (= (select (select |v_#memory_int_19| |v_~#x~0.base_15|) |v_~#x~0.offset_15|) 0)  InVars {~#x~0.base=|v_~#x~0.base_15|, #memory_int=|v_#memory_int_19|, ~#x~0.offset=|v_~#x~0.offset_15|}  OutVars{~#x~0.base=|v_~#x~0.base_15|, #memory_int=|v_#memory_int_19|, ~#x~0.offset=|v_~#x~0.offset_15|}  AuxVars[]  AssignedVars[] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,024 INFO  L290        TraceCheckUtils]: 30: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1131] L730-3-->L732: Formula: (= 0 v_~x$flush_delayed~0_5)  InVars {}  OutVars{~x$flush_delayed~0=v_~x$flush_delayed~0_5}  AuxVars[]  AssignedVars[~x$flush_delayed~0] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,027 INFO  L290        TraceCheckUtils]: 31: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1132] L732-->L733: Formula: (= v_~x$mem_tmp~0_3 0)  InVars {}  OutVars{~x$mem_tmp~0=v_~x$mem_tmp~0_3}  AuxVars[]  AssignedVars[~x$mem_tmp~0] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,027 INFO  L290        TraceCheckUtils]: 32: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1190] L733-->L734: Formula: (= v_~x$r_buff0_thd0~0_2 0)  InVars {}  OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_2}  AuxVars[]  AssignedVars[~x$r_buff0_thd0~0] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,027 INFO  L290        TraceCheckUtils]: 33: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1191] L734-->L735: Formula: (= v_~x$r_buff0_thd1~0_15 0)  InVars {}  OutVars{~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_15}  AuxVars[]  AssignedVars[~x$r_buff0_thd1~0] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,028 INFO  L290        TraceCheckUtils]: 34: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1211] L735-->L736: Formula: (= v_~x$r_buff0_thd2~0_60 0)  InVars {}  OutVars{~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_60}  AuxVars[]  AssignedVars[~x$r_buff0_thd2~0] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,028 INFO  L290        TraceCheckUtils]: 35: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1139] L736-->L737: Formula: (= v_~x$r_buff1_thd0~0_2 0)  InVars {}  OutVars{~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_2}  AuxVars[]  AssignedVars[~x$r_buff1_thd0~0] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,028 INFO  L290        TraceCheckUtils]: 36: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1130] L737-->L738: Formula: (= v_~x$r_buff1_thd1~0_10 0)  InVars {}  OutVars{~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_10}  AuxVars[]  AssignedVars[~x$r_buff1_thd1~0] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,028 INFO  L290        TraceCheckUtils]: 37: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1160] L738-->L739: Formula: (= v_~x$r_buff1_thd2~0_42 0)  InVars {}  OutVars{~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_42}  AuxVars[]  AssignedVars[~x$r_buff1_thd2~0] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,029 INFO  L290        TraceCheckUtils]: 38: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1111] L739-->L740: Formula: (= v_~x$read_delayed~0_1 0)  InVars {}  OutVars{~x$read_delayed~0=v_~x$read_delayed~0_1}  AuxVars[]  AssignedVars[~x$read_delayed~0] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,029 INFO  L290        TraceCheckUtils]: 39: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1149] L740-->L741: Formula: (and (= v_~x$read_delayed_var~0.base_1 0) (= v_~x$read_delayed_var~0.offset_1 0))  InVars {}  OutVars{~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_1, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_1}  AuxVars[]  AssignedVars[~x$read_delayed_var~0.offset, ~x$read_delayed_var~0.base] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,029 INFO  L290        TraceCheckUtils]: 40: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1207] L741-->L742: Formula: (= 0 v_~x$w_buff0~0_16)  InVars {}  OutVars{~x$w_buff0~0=v_~x$w_buff0~0_16}  AuxVars[]  AssignedVars[~x$w_buff0~0] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,030 INFO  L290        TraceCheckUtils]: 41: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1140] L742-->L743: Formula: (= v_~x$w_buff0_used~0_87 0)  InVars {}  OutVars{~x$w_buff0_used~0=v_~x$w_buff0_used~0_87}  AuxVars[]  AssignedVars[~x$w_buff0_used~0] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,030 INFO  L290        TraceCheckUtils]: 42: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1163] L743-->L744: Formula: (= 0 v_~x$w_buff1~0_13)  InVars {}  OutVars{~x$w_buff1~0=v_~x$w_buff1~0_13}  AuxVars[]  AssignedVars[~x$w_buff1~0] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,030 INFO  L290        TraceCheckUtils]: 43: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1141] L744-->L746: Formula: (= v_~x$w_buff1_used~0_50 0)  InVars {}  OutVars{~x$w_buff1_used~0=v_~x$w_buff1_used~0_50}  AuxVars[]  AssignedVars[~x$w_buff1_used~0] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,030 INFO  L290        TraceCheckUtils]: 44: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1182] L746-->L747: Formula: (= v_~y~0_3 0)  InVars {}  OutVars{~y~0=v_~y~0_3}  AuxVars[]  AssignedVars[~y~0] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,031 INFO  L290        TraceCheckUtils]: 45: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1119] L747-->L748: Formula: (= v_~weak$$choice0~0_14 0)  InVars {}  OutVars{~weak$$choice0~0=v_~weak$$choice0~0_14}  AuxVars[]  AssignedVars[~weak$$choice0~0] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,031 INFO  L290        TraceCheckUtils]: 46: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1142] L748-->L749: Formula: (= v_~weak$$choice1~0_5 0)  InVars {}  OutVars{~weak$$choice1~0=v_~weak$$choice1~0_5}  AuxVars[]  AssignedVars[~weak$$choice1~0] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,031 INFO  L290        TraceCheckUtils]: 47: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1113] L749-->L-1-3: Formula: (= v_~weak$$choice2~0_15 0)  InVars {}  OutVars{~weak$$choice2~0=v_~weak$$choice2~0_15}  AuxVars[]  AssignedVars[~weak$$choice2~0] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,032 INFO  L290        TraceCheckUtils]: 48: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1218] L-1-3-->L-1-4: Formula: true  InVars {}  OutVars{}  AuxVars[]  AssignedVars[] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,032 INFO  L290        TraceCheckUtils]: 49: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1147] L-1-4-->L-1-5: Formula: true  InVars {}  OutVars{}  AuxVars[]  AssignedVars[] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,032 INFO  L290        TraceCheckUtils]: 50: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1125] L-1-5-->L-1-6: Formula: true  InVars {}  OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_1|}  AuxVars[]  AssignedVars[ULTIMATE.start_main_#res#1] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,033 INFO  L290        TraceCheckUtils]: 51: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1196] L-1-6-->L825: Formula: true  InVars {}  OutVars{ULTIMATE.start_main_#t~nondet77#1=|v_ULTIMATE.start_main_#t~nondet77#1_1|, ULTIMATE.start_main_#t~ite74#1=|v_ULTIMATE.start_main_#t~ite74#1_1|, ULTIMATE.start_main_#t~mem70#1=|v_ULTIMATE.start_main_#t~mem70#1_1|, ULTIMATE.start_main_#t~ite72#1=|v_ULTIMATE.start_main_#t~ite72#1_1|, ULTIMATE.start_main_~#t1923~0#1.base=|v_ULTIMATE.start_main_~#t1923~0#1.base_1|, ULTIMATE.start_main_#t~ite76#1=|v_ULTIMATE.start_main_#t~ite76#1_1|, ULTIMATE.start_main_#t~ite80#1=|v_ULTIMATE.start_main_#t~ite80#1_1|, ULTIMATE.start_main_#t~pre68#1=|v_ULTIMATE.start_main_#t~pre68#1_1|, ULTIMATE.start_main_#t~ite71#1=|v_ULTIMATE.start_main_#t~ite71#1_1|, ULTIMATE.start_main_#t~pre66#1=|v_ULTIMATE.start_main_#t~pre66#1_1|, ULTIMATE.start_main_#t~ite73#1=|v_ULTIMATE.start_main_#t~ite73#1_1|, ULTIMATE.start_main_#t~ite75#1=|v_ULTIMATE.start_main_#t~ite75#1_1|, ULTIMATE.start_main_~#t1924~0#1.offset=|v_ULTIMATE.start_main_~#t1924~0#1.offset_1|, ULTIMATE.start_main_~#t1923~0#1.offset=|v_ULTIMATE.start_main_~#t1923~0#1.offset_1|, ULTIMATE.start_main_#t~nondet69#1=|v_ULTIMATE.start_main_#t~nondet69#1_1|, ULTIMATE.start_main_#t~ite79#1=|v_ULTIMATE.start_main_#t~ite79#1_1|, ULTIMATE.start_main_~#t1924~0#1.base=|v_ULTIMATE.start_main_~#t1924~0#1.base_1|, ULTIMATE.start_main_#t~nondet67#1=|v_ULTIMATE.start_main_#t~nondet67#1_1|, ULTIMATE.start_main_#t~mem78#1=|v_ULTIMATE.start_main_#t~mem78#1_1|}  AuxVars[]  AssignedVars[ULTIMATE.start_main_#t~nondet77#1, ULTIMATE.start_main_#t~ite74#1, ULTIMATE.start_main_#t~mem70#1, ULTIMATE.start_main_#t~ite72#1, ULTIMATE.start_main_~#t1923~0#1.base, ULTIMATE.start_main_#t~ite76#1, ULTIMATE.start_main_#t~ite80#1, ULTIMATE.start_main_#t~pre68#1, ULTIMATE.start_main_#t~ite71#1, ULTIMATE.start_main_#t~pre66#1, ULTIMATE.start_main_#t~ite73#1, ULTIMATE.start_main_#t~ite75#1, ULTIMATE.start_main_~#t1924~0#1.offset, ULTIMATE.start_main_~#t1923~0#1.offset, ULTIMATE.start_main_#t~nondet69#1, ULTIMATE.start_main_#t~ite79#1, ULTIMATE.start_main_~#t1924~0#1.base, ULTIMATE.start_main_#t~nondet67#1, ULTIMATE.start_main_#t~mem78#1] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,033 INFO  L290        TraceCheckUtils]: 52: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1209] L825-->L825-1: Formula: (and (= |v_ULTIMATE.start_main_~#t1923~0#1.offset_2| 0) (= (store |v_#length_5| |v_ULTIMATE.start_main_~#t1923~0#1.base_2| 4) |v_#length_4|) (not (= |v_ULTIMATE.start_main_~#t1923~0#1.base_2| 0)) (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t1923~0#1.base_2|) (= |v_#valid_5| (store |v_#valid_6| |v_ULTIMATE.start_main_~#t1923~0#1.base_2| 1)) (= (select |v_#valid_6| |v_ULTIMATE.start_main_~#t1923~0#1.base_2|) 0))  InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_5|, #valid=|v_#valid_6|}  OutVars{ULTIMATE.start_main_~#t1923~0#1.base=|v_ULTIMATE.start_main_~#t1923~0#1.base_2|, ULTIMATE.start_main_~#t1923~0#1.offset=|v_ULTIMATE.start_main_~#t1923~0#1.offset_2|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_5|}  AuxVars[]  AssignedVars[#valid, ULTIMATE.start_main_~#t1923~0#1.base, ULTIMATE.start_main_~#t1923~0#1.offset, #length] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,033 INFO  L290        TraceCheckUtils]: 53: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1124] L825-1-->L826: Formula: (= |v_ULTIMATE.start_main_#t~pre66#1_2| |v_#pthreadsForks_1|)  InVars {#pthreadsForks=|v_#pthreadsForks_1|}  OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre66#1=|v_ULTIMATE.start_main_#t~pre66#1_2|}  AuxVars[]  AssignedVars[ULTIMATE.start_main_#t~pre66#1] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,033 INFO  L290        TraceCheckUtils]: 54: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1152] L826-->L826-1: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|)  InVars {#pthreadsForks=|v_#pthreadsForks_3|}  OutVars{#pthreadsForks=|v_#pthreadsForks_2|}  AuxVars[]  AssignedVars[#pthreadsForks] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,034 INFO  L290        TraceCheckUtils]: 55: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1153] L826-1-->L826-2: Formula: (= (store |v_#memory_int_21| |v_ULTIMATE.start_main_~#t1923~0#1.base_3| (store (select |v_#memory_int_21| |v_ULTIMATE.start_main_~#t1923~0#1.base_3|) |v_ULTIMATE.start_main_~#t1923~0#1.offset_3| |v_ULTIMATE.start_main_#t~pre66#1_3|)) |v_#memory_int_20|)  InVars {#memory_int=|v_#memory_int_21|, ULTIMATE.start_main_~#t1923~0#1.base=|v_ULTIMATE.start_main_~#t1923~0#1.base_3|, ULTIMATE.start_main_~#t1923~0#1.offset=|v_ULTIMATE.start_main_~#t1923~0#1.offset_3|, ULTIMATE.start_main_#t~pre66#1=|v_ULTIMATE.start_main_#t~pre66#1_3|}  OutVars{#memory_int=|v_#memory_int_20|, ULTIMATE.start_main_~#t1923~0#1.base=|v_ULTIMATE.start_main_~#t1923~0#1.base_3|, ULTIMATE.start_main_~#t1923~0#1.offset=|v_ULTIMATE.start_main_~#t1923~0#1.offset_3|, ULTIMATE.start_main_#t~pre66#1=|v_ULTIMATE.start_main_#t~pre66#1_3|}  AuxVars[]  AssignedVars[#memory_int] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,035 INFO  L290        TraceCheckUtils]: 56: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1239] L826-2-->P0ENTRY: Formula: (and (= v_P0Thread1of1ForFork1_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre66#1_6| v_P0Thread1of1ForFork1_thidvar0_2) (= |v_P0Thread1of1ForFork1_#in~arg#1.base_4| 0) (= |v_P0Thread1of1ForFork1_#in~arg#1.offset_4| 0))  InVars {ULTIMATE.start_main_#t~pre66#1=|v_ULTIMATE.start_main_#t~pre66#1_6|}  OutVars{P0Thread1of1ForFork1_#res#1.offset=|v_P0Thread1of1ForFork1_#res#1.offset_4|, P0Thread1of1ForFork1_#t~ite9#1=|v_P0Thread1of1ForFork1_#t~ite9#1_4|, P0Thread1of1ForFork1_#in~arg#1.base=|v_P0Thread1of1ForFork1_#in~arg#1.base_4|, P0Thread1of1ForFork1_thidvar0=v_P0Thread1of1ForFork1_thidvar0_2, P0Thread1of1ForFork1_#t~ite6#1=|v_P0Thread1of1ForFork1_#t~ite6#1_4|, P0Thread1of1ForFork1_thidvar1=v_P0Thread1of1ForFork1_thidvar1_2, P0Thread1of1ForFork1_#in~arg#1.offset=|v_P0Thread1of1ForFork1_#in~arg#1.offset_4|, P0Thread1of1ForFork1_#t~mem3#1=|v_P0Thread1of1ForFork1_#t~mem3#1_6|, P0Thread1of1ForFork1_~arg#1.base=|v_P0Thread1of1ForFork1_~arg#1.base_4|, P0Thread1of1ForFork1_#t~ite4#1=|v_P0Thread1of1ForFork1_#t~ite4#1_6|, P0Thread1of1ForFork1_~arg#1.offset=|v_P0Thread1of1ForFork1_~arg#1.offset_4|, P0Thread1of1ForFork1_#t~ite8#1=|v_P0Thread1of1ForFork1_#t~ite8#1_4|, ULTIMATE.start_main_#t~pre66#1=|v_ULTIMATE.start_main_#t~pre66#1_6|, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression#1=|v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression#1_6|, P0Thread1of1ForFork1_#res#1.base=|v_P0Thread1of1ForFork1_#res#1.base_4|, P0Thread1of1ForFork1_#t~ite7#1=|v_P0Thread1of1ForFork1_#t~ite7#1_4|, P0Thread1of1ForFork1___VERIFIER_assert_~expression#1=|v_P0Thread1of1ForFork1___VERIFIER_assert_~expression#1_6|, P0Thread1of1ForFork1_#t~ite5#1=|v_P0Thread1of1ForFork1_#t~ite5#1_4|}  AuxVars[]  AssignedVars[P0Thread1of1ForFork1_#res#1.offset, P0Thread1of1ForFork1_#t~ite9#1, P0Thread1of1ForFork1_#in~arg#1.base, P0Thread1of1ForFork1_thidvar0, P0Thread1of1ForFork1_#t~ite6#1, P0Thread1of1ForFork1_thidvar1, P0Thread1of1ForFork1_#in~arg#1.offset, P0Thread1of1ForFork1_#t~mem3#1, P0Thread1of1ForFork1_~arg#1.base, P0Thread1of1ForFork1_#t~ite4#1, P0Thread1of1ForFork1_~arg#1.offset, P0Thread1of1ForFork1_#t~ite8#1, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression#1, P0Thread1of1ForFork1_#res#1.base, P0Thread1of1ForFork1_#t~ite7#1, P0Thread1of1ForFork1___VERIFIER_assert_~expression#1, P0Thread1of1ForFork1_#t~ite5#1] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,035 INFO  L290        TraceCheckUtils]: 57: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1221] P0ENTRY-->L752: Formula: (and (= |v_P0Thread1of1ForFork1_~arg#1.offset_1| |v_P0Thread1of1ForFork1_#in~arg#1.offset_1|) (= |v_P0Thread1of1ForFork1_#in~arg#1.base_1| |v_P0Thread1of1ForFork1_~arg#1.base_1|))  InVars {P0Thread1of1ForFork1_#in~arg#1.base=|v_P0Thread1of1ForFork1_#in~arg#1.base_1|, P0Thread1of1ForFork1_#in~arg#1.offset=|v_P0Thread1of1ForFork1_#in~arg#1.offset_1|}  OutVars{P0Thread1of1ForFork1_#in~arg#1.offset=|v_P0Thread1of1ForFork1_#in~arg#1.offset_1|, P0Thread1of1ForFork1_#in~arg#1.base=|v_P0Thread1of1ForFork1_#in~arg#1.base_1|, P0Thread1of1ForFork1_~arg#1.base=|v_P0Thread1of1ForFork1_~arg#1.base_1|, P0Thread1of1ForFork1_~arg#1.offset=|v_P0Thread1of1ForFork1_~arg#1.offset_1|}  AuxVars[]  AssignedVars[P0Thread1of1ForFork1_~arg#1.base, P0Thread1of1ForFork1_~arg#1.offset] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,035 INFO  L290        TraceCheckUtils]: 58: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1138] L826-3-->L826-4: Formula: true  InVars {}  OutVars{ULTIMATE.start_main_#t~pre66#1=|v_ULTIMATE.start_main_#t~pre66#1_4|}  AuxVars[]  AssignedVars[ULTIMATE.start_main_#t~pre66#1] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,036 INFO  L290        TraceCheckUtils]: 59: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1158] L826-4-->L827: Formula: true  InVars {}  OutVars{ULTIMATE.start_main_#t~nondet67#1=|v_ULTIMATE.start_main_#t~nondet67#1_2|}  AuxVars[]  AssignedVars[ULTIMATE.start_main_#t~nondet67#1] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,036 INFO  L290        TraceCheckUtils]: 60: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1220] L827-->L827-1: Formula: (and (= |v_#length_6| (store |v_#length_7| |v_ULTIMATE.start_main_~#t1924~0#1.base_2| 4)) (= |v_ULTIMATE.start_main_~#t1924~0#1.offset_2| 0) (= |v_#valid_7| (store |v_#valid_8| |v_ULTIMATE.start_main_~#t1924~0#1.base_2| 1)) (< |v_#StackHeapBarrier_3| |v_ULTIMATE.start_main_~#t1924~0#1.base_2|) (not (= |v_ULTIMATE.start_main_~#t1924~0#1.base_2| 0)) (= (select |v_#valid_8| |v_ULTIMATE.start_main_~#t1924~0#1.base_2|) 0))  InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_7|, #valid=|v_#valid_8|}  OutVars{ULTIMATE.start_main_~#t1924~0#1.offset=|v_ULTIMATE.start_main_~#t1924~0#1.offset_2|, #StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_6|, ULTIMATE.start_main_~#t1924~0#1.base=|v_ULTIMATE.start_main_~#t1924~0#1.base_2|, #valid=|v_#valid_7|}  AuxVars[]  AssignedVars[#valid, ULTIMATE.start_main_~#t1924~0#1.offset, #length, ULTIMATE.start_main_~#t1924~0#1.base] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,036 INFO  L290        TraceCheckUtils]: 61: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1206] L827-1-->L828: Formula: (= |v_ULTIMATE.start_main_#t~pre68#1_2| |v_#pthreadsForks_4|)  InVars {#pthreadsForks=|v_#pthreadsForks_4|}  OutVars{#pthreadsForks=|v_#pthreadsForks_4|, ULTIMATE.start_main_#t~pre68#1=|v_ULTIMATE.start_main_#t~pre68#1_2|}  AuxVars[]  AssignedVars[ULTIMATE.start_main_#t~pre68#1] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,037 INFO  L290        TraceCheckUtils]: 62: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1208] L828-->L828-1: Formula: (= (+ 1 |v_#pthreadsForks_6|) |v_#pthreadsForks_5|)  InVars {#pthreadsForks=|v_#pthreadsForks_6|}  OutVars{#pthreadsForks=|v_#pthreadsForks_5|}  AuxVars[]  AssignedVars[#pthreadsForks] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,037 INFO  L290        TraceCheckUtils]: 63: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1143] L828-1-->L828-2: Formula: (= (store |v_#memory_int_23| |v_ULTIMATE.start_main_~#t1924~0#1.base_3| (store (select |v_#memory_int_23| |v_ULTIMATE.start_main_~#t1924~0#1.base_3|) |v_ULTIMATE.start_main_~#t1924~0#1.offset_3| |v_ULTIMATE.start_main_#t~pre68#1_3|)) |v_#memory_int_22|)  InVars {#memory_int=|v_#memory_int_23|, ULTIMATE.start_main_~#t1924~0#1.offset=|v_ULTIMATE.start_main_~#t1924~0#1.offset_3|, ULTIMATE.start_main_#t~pre68#1=|v_ULTIMATE.start_main_#t~pre68#1_3|, ULTIMATE.start_main_~#t1924~0#1.base=|v_ULTIMATE.start_main_~#t1924~0#1.base_3|}  OutVars{#memory_int=|v_#memory_int_22|, ULTIMATE.start_main_~#t1924~0#1.offset=|v_ULTIMATE.start_main_~#t1924~0#1.offset_3|, ULTIMATE.start_main_#t~pre68#1=|v_ULTIMATE.start_main_#t~pre68#1_3|, ULTIMATE.start_main_~#t1924~0#1.base=|v_ULTIMATE.start_main_~#t1924~0#1.base_3|}  AuxVars[]  AssignedVars[#memory_int] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,037 INFO  L290        TraceCheckUtils]: 64: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1237] L828-2-->P1ENTRY: Formula: (and (= v_P1Thread1of1ForFork0_thidvar2_2 0) (= |v_ULTIMATE.start_main_#t~pre68#1_6| v_P1Thread1of1ForFork0_thidvar0_2) (= |v_P1Thread1of1ForFork0_#in~arg.offset_4| 0) (= |v_P1Thread1of1ForFork0_#in~arg.base_4| 0) (= v_P1Thread1of1ForFork0_thidvar1_2 0))  InVars {ULTIMATE.start_main_#t~pre68#1=|v_ULTIMATE.start_main_#t~pre68#1_6|}  OutVars{P1Thread1of1ForFork0_#t~ite47=|v_P1Thread1of1ForFork0_#t~ite47_6|, P1Thread1of1ForFork0_#t~ite24=|v_P1Thread1of1ForFork0_#t~ite24_4|, P1Thread1of1ForFork0_#t~ite22=|v_P1Thread1of1ForFork0_#t~ite22_6|, P1Thread1of1ForFork0_#t~ite45=|v_P1Thread1of1ForFork0_#t~ite45_6|, P1Thread1of1ForFork0_#t~ite28=|v_P1Thread1of1ForFork0_#t~ite28_6|, P1Thread1of1ForFork0_#t~ite26=|v_P1Thread1of1ForFork0_#t~ite26_6|, P1Thread1of1ForFork0_#t~ite49=|v_P1Thread1of1ForFork0_#t~ite49_4|, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_4|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_4|, P1Thread1of1ForFork0_#t~ite43=|v_P1Thread1of1ForFork0_#t~ite43_6|, P1Thread1of1ForFork0_#t~ite20=|v_P1Thread1of1ForFork0_#t~ite20_6|, P1Thread1of1ForFork0_#t~ite60=|v_P1Thread1of1ForFork0_#t~ite60_6|, P1Thread1of1ForFork0_#t~ite41=|v_P1Thread1of1ForFork0_#t~ite41_6|, P1Thread1of1ForFork0_#t~nondet10=|v_P1Thread1of1ForFork0_#t~nondet10_6|, P1Thread1of1ForFork0_#t~mem56=|v_P1Thread1of1ForFork0_#t~mem56_4|, P1Thread1of1ForFork0_#t~mem14=|v_P1Thread1of1ForFork0_#t~mem14_6|, P1Thread1of1ForFork0_#t~mem12=|v_P1Thread1of1ForFork0_#t~mem12_4|, P1Thread1of1ForFork0_#t~ite36=|v_P1Thread1of1ForFork0_#t~ite36_6|, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_4|, P1Thread1of1ForFork0_#t~ite34=|v_P1Thread1of1ForFork0_#t~ite34_4|, P1Thread1of1ForFork0_#t~ite55=|v_P1Thread1of1ForFork0_#t~ite55_4|, P1Thread1of1ForFork0_#t~ite38=|v_P1Thread1of1ForFork0_#t~ite38_6|, P1Thread1of1ForFork0_#t~ite17=|v_P1Thread1of1ForFork0_#t~ite17_6|, P1Thread1of1ForFork0_#t~ite53=|v_P1Thread1of1ForFork0_#t~ite53_6|, P1Thread1of1ForFork0_#t~ite32=|v_P1Thread1of1ForFork0_#t~ite32_6|, P1Thread1of1ForFork0_#t~ite30=|v_P1Thread1of1ForFork0_#t~ite30_6|, P1Thread1of1ForFork0_#t~ite51=|v_P1Thread1of1ForFork0_#t~ite51_6|, P1Thread1of1ForFork0_thidvar2=v_P1Thread1of1ForFork0_thidvar2_2, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_4|, P1Thread1of1ForFork0_#t~ite46=|v_P1Thread1of1ForFork0_#t~ite46_6|, P1Thread1of1ForFork0_#t~ite25=|v_P1Thread1of1ForFork0_#t~ite25_6|, P1Thread1of1ForFork0_#t~ite23=|v_P1Thread1of1ForFork0_#t~ite23_6|, P1Thread1of1ForFork0_#t~ite44=|v_P1Thread1of1ForFork0_#t~ite44_4|, P1Thread1of1ForFork0_#t~ite29=|v_P1Thread1of1ForFork0_#t~ite29_4|, P1Thread1of1ForFork0_#t~ite27=|v_P1Thread1of1ForFork0_#t~ite27_6|, P1Thread1of1ForFork0_#t~ite48=|v_P1Thread1of1ForFork0_#t~ite48_6|, P1Thread1of1ForFork0_#t~nondet13=|v_P1Thread1of1ForFork0_#t~nondet13_6|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_4|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_4|, ULTIMATE.start_main_#t~pre68#1=|v_ULTIMATE.start_main_#t~pre68#1_6|, P1Thread1of1ForFork0_thidvar1=v_P1Thread1of1ForFork0_thidvar1_2, P1Thread1of1ForFork0_#t~ite42=|v_P1Thread1of1ForFork0_#t~ite42_6|, P1Thread1of1ForFork0_#t~ite21=|v_P1Thread1of1ForFork0_#t~ite21_6|, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_4|, P1Thread1of1ForFork0_#t~ite61=|v_P1Thread1of1ForFork0_#t~ite61_4|, P1Thread1of1ForFork0_#t~ite40=|v_P1Thread1of1ForFork0_#t~ite40_6|, P1Thread1of1ForFork0_#t~nondet11=|v_P1Thread1of1ForFork0_#t~nondet11_6|, P1Thread1of1ForFork0_#t~mem57=|v_P1Thread1of1ForFork0_#t~mem57_6|, P1Thread1of1ForFork0_#t~mem59=|v_P1Thread1of1ForFork0_#t~mem59_6|, P1Thread1of1ForFork0_~arg.base=v_P1Thread1of1ForFork0_~arg.base_4, P1Thread1of1ForFork0_#t~mem15=|v_P1Thread1of1ForFork0_#t~mem15_6|, P1Thread1of1ForFork0_#t~ite58=|v_P1Thread1of1ForFork0_#t~ite58_4|, P1Thread1of1ForFork0_#t~ite35=|v_P1Thread1of1ForFork0_#t~ite35_6|, P1Thread1of1ForFork0_#t~ite33=|v_P1Thread1of1ForFork0_#t~ite33_6|, P1Thread1of1ForFork0_#t~ite16=|v_P1Thread1of1ForFork0_#t~ite16_6|, P1Thread1of1ForFork0_#t~ite39=|v_P1Thread1of1ForFork0_#t~ite39_4|, P1Thread1of1ForFork0_#t~ite37=|v_P1Thread1of1ForFork0_#t~ite37_6|, P1Thread1of1ForFork0_#t~ite18=|v_P1Thread1of1ForFork0_#t~ite18_6|, P1Thread1of1ForFork0_#t~ite50=|v_P1Thread1of1ForFork0_#t~ite50_6|, P1Thread1of1ForFork0_~arg.offset=v_P1Thread1of1ForFork0_~arg.offset_4, P1Thread1of1ForFork0_#t~ite54=|v_P1Thread1of1ForFork0_#t~ite54_6|, P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_6|, P1Thread1of1ForFork0_thidvar0=v_P1Thread1of1ForFork0_thidvar0_2, P1Thread1of1ForFork0_#t~ite52=|v_P1Thread1of1ForFork0_#t~ite52_6|, P1Thread1of1ForFork0_#t~mem19=|v_P1Thread1of1ForFork0_#t~mem19_6|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_4|}  AuxVars[]  AssignedVars[P1Thread1of1ForFork0_#t~ite47, P1Thread1of1ForFork0_#t~ite24, P1Thread1of1ForFork0_#t~ite22, P1Thread1of1ForFork0_#t~ite45, P1Thread1of1ForFork0_#t~ite28, P1Thread1of1ForFork0_#t~ite26, P1Thread1of1ForFork0_#t~ite49, P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite43, P1Thread1of1ForFork0_#t~ite20, P1Thread1of1ForFork0_#t~ite60, P1Thread1of1ForFork0_#t~ite41, P1Thread1of1ForFork0_#t~nondet10, P1Thread1of1ForFork0_#t~mem56, P1Thread1of1ForFork0_#t~mem14, P1Thread1of1ForFork0_#t~mem12, P1Thread1of1ForFork0_#t~ite36, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#t~ite34, P1Thread1of1ForFork0_#t~ite55, P1Thread1of1ForFork0_#t~ite38, P1Thread1of1ForFork0_#t~ite17, P1Thread1of1ForFork0_#t~ite53, P1Thread1of1ForFork0_#t~ite32, P1Thread1of1ForFork0_#t~ite30, P1Thread1of1ForFork0_#t~ite51, P1Thread1of1ForFork0_thidvar2, P1Thread1of1ForFork0_#in~arg.offset, P1Thread1of1ForFork0_#t~ite46, P1Thread1of1ForFork0_#t~ite25, P1Thread1of1ForFork0_#t~ite23, P1Thread1of1ForFork0_#t~ite44, P1Thread1of1ForFork0_#t~ite29, P1Thread1of1ForFork0_#t~ite27, P1Thread1of1ForFork0_#t~ite48, P1Thread1of1ForFork0_#t~nondet13, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite65, P1Thread1of1ForFork0_thidvar1, P1Thread1of1ForFork0_#t~ite42, P1Thread1of1ForFork0_#t~ite21, P1Thread1of1ForFork0_#in~arg.base, P1Thread1of1ForFork0_#t~ite61, P1Thread1of1ForFork0_#t~ite40, P1Thread1of1ForFork0_#t~nondet11, P1Thread1of1ForFork0_#t~mem57, P1Thread1of1ForFork0_#t~mem59, P1Thread1of1ForFork0_~arg.base, P1Thread1of1ForFork0_#t~mem15, P1Thread1of1ForFork0_#t~ite58, P1Thread1of1ForFork0_#t~ite35, P1Thread1of1ForFork0_#t~ite33, P1Thread1of1ForFork0_#t~ite16, P1Thread1of1ForFork0_#t~ite39, P1Thread1of1ForFork0_#t~ite37, P1Thread1of1ForFork0_#t~ite18, P1Thread1of1ForFork0_#t~ite50, P1Thread1of1ForFork0_~arg.offset, P1Thread1of1ForFork0_#t~ite54, P1Thread1of1ForFork0_#t~ite31, P1Thread1of1ForFork0_thidvar0, P1Thread1of1ForFork0_#t~ite52, P1Thread1of1ForFork0_#t~mem19, P1Thread1of1ForFork0_#res.base] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,038 INFO  L290        TraceCheckUtils]: 65: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1229] P1ENTRY-->L780: Formula: (and (= v_P1Thread1of1ForFork0_~arg.offset_1 |v_P1Thread1of1ForFork0_#in~arg.offset_1|) (= v_P1Thread1of1ForFork0_~arg.base_1 |v_P1Thread1of1ForFork0_#in~arg.base_1|))  InVars {P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_1|, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_1|}  OutVars{P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_1|, P1Thread1of1ForFork0_~arg.offset=v_P1Thread1of1ForFork0_~arg.offset_1, P1Thread1of1ForFork0_~arg.base=v_P1Thread1of1ForFork0_~arg.base_1, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_1|}  AuxVars[]  AssignedVars[P1Thread1of1ForFork0_~arg.offset, P1Thread1of1ForFork0_~arg.base] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,039 INFO  L290        TraceCheckUtils]: 66: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1230] L780-->L798: Formula: (let ((.cse17 (mod v_~x$w_buff0_used~0_473 256)) (.cse9 (= (mod v_~x$r_buff0_thd2~0_330 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd2~0_294 256) 0))) (let ((.cse0 (= (mod v_~weak$$choice2~0_90 256) 0)) (.cse6 (not .cse12)) (.cse31 (= (mod v_~x$w_buff1_used~0_392 256) 0)) (.cse7 (not .cse9)) (.cse16 (= .cse17 0)) (.cse8 (= (mod v_~x$w_buff1_used~0_391 256) 0)) (.cse46 (= (mod v_~weak$$choice0~0_141 256) 0)) (.cse58 (select |v_#memory_int_260| |v_~#x~0.base_172|)) (.cse3 (= (mod v_~x$w_buff0_used~0_472 256) 0))) (let ((.cse13 (or .cse9 .cse3)) (.cse27 (= 0 (mod v_~weak$$choice1~0_79 256))) (.cse40 (select .cse58 |v_~#x~0.offset_172|)) (.cse26 (not .cse46)) (.cse10 (not .cse8)) (.cse5 (not .cse3)) (.cse20 (or .cse9 .cse16)) (.cse24 (or .cse12 .cse31 .cse16 .cse7)) (.cse25 (or .cse31 .cse6 .cse16 .cse7)) (.cse23 (not .cse31)) (.cse22 (not .cse16)) (.cse14 (not .cse0))) (and (= v_~x$flush_delayed~0_66 0) (= v_~__unbuffered_p1_EAX$read_delayed~0_41 1) (let ((.cse1 (= |v_P1_#t~ite45_87| |v_P1Thread1of1ForFork0_#t~ite45_1|)) (.cse2 (= |v_P1_#t~ite47_71| |v_P1Thread1of1ForFork0_#t~ite47_1|)) (.cse4 (= |v_P1_#t~ite46_81| |v_P1Thread1of1ForFork0_#t~ite46_1|))) (or (and .cse0 (= |v_P1_#t~ite48_63| v_~x$r_buff0_thd2~0_329) (or (and .cse1 .cse2 .cse3 .cse4 (= |v_P1_#t~ite48_63| v_~x$r_buff0_thd2~0_330)) (and .cse5 (or (and (or (and (= |v_P1_#t~ite46_81| |v_P1_#t~ite45_87|) (or .cse6 .cse3 .cse7 .cse8) (let ((.cse11 (= |v_P1_#t~ite45_87| 0))) (or (and .cse5 .cse6 .cse9 .cse10 .cse11) (and (or .cse12 .cse3 .cse7 .cse8) .cse11)))) (and .cse12 .cse5 .cse1 .cse9 (= |v_P1_#t~ite46_81| v_~x$r_buff0_thd2~0_330) .cse10)) (= |v_P1_#t~ite46_81| |v_P1_#t~ite47_71|) .cse13) (and .cse5 (= |v_P1_#t~ite47_71| 0) .cse1 .cse4 .cse7)) (= |v_P1_#t~ite47_71| |v_P1_#t~ite48_63|)))) (and .cse1 (= v_~x$r_buff0_thd2~0_330 v_~x$r_buff0_thd2~0_329) .cse14 .cse2 (= |v_P1_#t~ite48_63| |v_P1Thread1of1ForFork0_#t~ite48_1|) .cse4))) (let ((.cse15 (= |v_P1_#t~ite35_65| |v_P1Thread1of1ForFork0_#t~ite35_1|)) (.cse18 (= |v_P1_#t~ite36_59| |v_P1Thread1of1ForFork0_#t~ite36_1|)) (.cse19 (= |v_P1_#t~ite37_51| |v_P1Thread1of1ForFork0_#t~ite37_1|))) (or (and .cse0 (= |v_P1_#t~ite38_43| |v_P1_#t~ite39_41|) (or (and .cse15 .cse16 (= |v_P1_#t~ite38_43| .cse17) .cse18 .cse19) (and (= |v_P1_#t~ite37_51| |v_P1_#t~ite38_43|) (or (and (= |v_P1_#t~ite36_59| |v_P1_#t~ite37_51|) .cse20 (or (and (let ((.cse21 (= |v_P1_#t~ite35_65| v_~weak$$choice0~0_141))) (or (and .cse21 .cse6 .cse9 .cse22 .cse23) (and .cse21 .cse24))) (= |v_P1_#t~ite36_59| (mod |v_P1_#t~ite35_65| 256)) .cse25) (and (= |v_P1_#t~ite36_59| (ite (or .cse26 .cse27) 1 0)) .cse12 .cse15 .cse9 .cse22 .cse23))) (and .cse15 .cse22 (= |v_P1_#t~ite37_51| 0) .cse18 .cse7)) .cse22))) (and (= |v_P1_#t~ite39_41| .cse17) .cse15 .cse14 (= |v_P1_#t~ite38_43| |v_P1Thread1of1ForFork0_#t~ite38_1|) .cse18 .cse19))) (= v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_42 |v_~#x~0.offset_172|) (let ((.cse30 (= |v_P1_#t~ite42_61| |v_P1Thread1of1ForFork0_#t~ite42_1|)) (.cse28 (= |v_P1_#t~ite41_69| |v_P1Thread1of1ForFork0_#t~ite41_1|)) (.cse29 (= |v_P1_#t~ite40_75| |v_P1Thread1of1ForFork0_#t~ite40_1|))) (or (and .cse28 .cse29 .cse14 (= |v_P1_#t~ite43_53| |v_P1Thread1of1ForFork0_#t~ite43_1|) (= v_~x$w_buff1_used~0_392 v_~x$w_buff1_used~0_391) .cse30) (and .cse0 (= |v_P1_#t~ite43_53| v_~x$w_buff1_used~0_391) (or (and .cse28 .cse29 .cse3 .cse30 (= |v_P1_#t~ite43_53| v_~x$w_buff1_used~0_392)) (and .cse5 (or (and .cse5 (= |v_P1_#t~ite42_61| 0) .cse28 .cse29 .cse7) (and (= |v_P1_#t~ite42_61| |v_P1_#t~ite41_69|) (or (and .cse12 .cse5 .cse9 .cse29 (= |v_P1_#t~ite41_69| v_~weak$$choice0~0_141) .cse23) (and (or .cse31 .cse6 .cse3 .cse7) (= |v_P1_#t~ite40_75| |v_P1_#t~ite41_69|) (let ((.cse32 (= |v_P1_#t~ite40_75| 0))) (or (and .cse32 .cse5 .cse6 .cse9 .cse23) (and .cse32 (or .cse12 .cse31 .cse3 .cse7)))))) .cse13)) (= |v_P1_#t~ite42_61| |v_P1_#t~ite43_53|)))))) (let ((.cse33 (= |v_P1_#t~ite32_41| |v_P1Thread1of1ForFork0_#t~ite32_1|)) (.cse34 (= |v_P1_#t~ite31_49| |v_P1Thread1of1ForFork0_#t~ite31_1|)) (.cse35 (= |v_P1_#t~ite30_55| |v_P1Thread1of1ForFork0_#t~ite30_1|))) (or (and (= |v_P1_#t~ite33_35| |v_P1Thread1of1ForFork0_#t~ite33_1|) .cse33 .cse14 .cse34 .cse35 (= v_~x$w_buff1~0_128 v_~x$w_buff1~0_127)) (and .cse0 (or (and .cse33 .cse16 (= |v_P1_#t~ite33_35| v_~x$w_buff1~0_128) .cse34 .cse35) (and (or (and (= |v_P1_#t~ite32_41| v_~x$w_buff1~0_128) .cse22 .cse34 .cse35 .cse7) (and (= |v_P1_#t~ite32_41| |v_P1_#t~ite31_49|) .cse20 (or (and (= |v_P1_#t~ite30_55| |v_P1_#t~ite31_49|) (let ((.cse36 (= |v_P1_#t~ite30_55| v_~x$w_buff1~0_128))) (or (and .cse6 .cse9 .cse22 .cse23 .cse36) (and .cse24 .cse36))) .cse25) (and .cse12 .cse9 (= |v_P1_#t~ite31_49| v_~x$w_buff1~0_128) .cse22 .cse23 .cse35)))) (= |v_P1_#t~ite32_41| |v_P1_#t~ite33_35|) .cse22)) (= |v_P1_#t~ite33_35| v_~x$w_buff1~0_127)))) (= |v_P1Thread1of1ForFork0_#t~nondet11_1| v_~weak$$choice2~0_90) (= |v_P1Thread1of1ForFork0_#t~nondet13_1| v_~weak$$choice1~0_79) (let ((.cse37 (= |v_P1_#t~ite20_81| |v_P1Thread1of1ForFork0_#t~ite20_1|)) (.cse38 (= |v_P1_#t~ite22_71| |v_P1Thread1of1ForFork0_#t~ite22_1|)) (.cse39 (= |v_P1_#t~ite21_79| |v_P1Thread1of1ForFork0_#t~ite21_1|)) (.cse41 (= |v_P1_#t~ite18_83| |v_P1Thread1of1ForFork0_#t~ite18_1|)) (.cse42 (= |v_P1_#t~ite16_79| |v_P1Thread1of1ForFork0_#t~ite16_1|)) (.cse43 (= |v_P1Thread1of1ForFork0_#t~mem19_1| |v_P1_#t~mem19_82|)) (.cse44 (= |v_P1Thread1of1ForFork0_#t~mem15_1| |v_P1_#t~mem15_76|)) (.cse45 (= |v_P1_#t~ite17_79| |v_P1Thread1of1ForFork0_#t~ite17_1|))) (or (and .cse37 .cse38 .cse39 .cse16 (= |v_P1_#t~mem14_60| v_~__unbuffered_p1_EAX~0_49) (= .cse40 |v_P1_#t~mem14_60|) .cse41 .cse42 .cse43 (= |v_P1_#t~ite23_65| |v_P1Thread1of1ForFork0_#t~ite23_1|) .cse44 .cse45) (and (= |v_P1Thread1of1ForFork0_#t~mem14_1| |v_P1_#t~mem14_60|) (or (and (= |v_P1_#t~ite22_71| |v_P1_#t~ite23_65|) .cse20 (or (and (= |v_P1_#t~ite22_71| |v_P1_#t~ite21_79|) .cse42 (or (and (or (and .cse46 (= |v_P1_#t~ite20_81| |v_P1_#t~mem19_82|) (= .cse40 |v_P1_#t~mem19_82|)) (and .cse26 .cse43 (= |v_P1_#t~ite20_81| v_~x$w_buff0~0_133))) .cse24 .cse41 (= |v_P1_#t~ite20_81| |v_P1_#t~ite21_79|)) (and .cse37 (= |v_P1_#t~ite18_83| |v_P1_#t~ite21_79|) .cse6 .cse9 .cse22 .cse23 .cse43 (or (and .cse26 (= |v_P1_#t~ite18_83| v_~x$w_buff1~0_128)) (and .cse46 (= |v_P1_#t~ite18_83| v_~x$w_buff0~0_133))))) .cse25 .cse44 .cse45) (and .cse37 .cse39 (= |v_P1_#t~ite17_79| |v_P1_#t~ite22_71|) (or (and .cse46 (= |v_P1_#t~ite17_79| |v_P1_#t~ite16_79|) (or (and .cse27 (= |v_P1_#t~ite16_79| v_~x$w_buff1~0_128)) (and (= |v_P1_#t~ite16_79| v_~x$w_buff0~0_133) (not .cse27))) .cse44) (and (= .cse40 |v_P1_#t~mem15_76|) .cse26 (= |v_P1_#t~ite17_79| |v_P1_#t~mem15_76|) .cse42)) .cse12 .cse9 .cse22 .cse23 .cse41 .cse43))) (and .cse37 .cse38 .cse39 (= |v_P1_#t~ite23_65| v_~x$w_buff0~0_133) .cse22 .cse41 .cse42 .cse43 .cse7 .cse44 .cse45)) .cse22 (= |v_P1_#t~ite23_65| v_~__unbuffered_p1_EAX~0_49)))) (or (and (= |v_P1_#t~ite58_49| |v_P1_#t~mem57_64|) .cse0 (= |v_P1_#t~mem57_64| v_~__unbuffered_p1_EAX~0_49)) (and .cse14 (= |v_P1_#t~ite58_49| v_~x$mem_tmp~0_38) (= |v_P1Thread1of1ForFork0_#t~mem57_1| |v_P1_#t~mem57_64|))) (= .cse40 v_~x$mem_tmp~0_38) (= v_~x$w_buff0_used~0_472 (ite (= |v_P1_#t~ite39_41| 0) 0 1)) (let ((.cse47 (= |v_P1_#t~ite50_99| |v_P1Thread1of1ForFork0_#t~ite50_1|)) (.cse48 (= |v_P1_#t~ite53_87| |v_P1Thread1of1ForFork0_#t~ite53_1|)) (.cse49 (= |v_P1_#t~ite52_97| |v_P1Thread1of1ForFork0_#t~ite52_1|)) (.cse50 (= |v_P1_#t~ite51_101| |v_P1Thread1of1ForFork0_#t~ite51_1|))) (or (and (= v_~x$r_buff1_thd2~0_294 v_~x$r_buff1_thd2~0_293) .cse14 (= |v_P1_#t~ite54_73| |v_P1Thread1of1ForFork0_#t~ite54_1|) .cse47 .cse48 .cse49 .cse50) (and (= |v_P1_#t~ite54_73| v_~x$r_buff1_thd2~0_293) .cse0 (or (and (= |v_P1_#t~ite53_87| |v_P1_#t~ite54_73|) (let ((.cse52 (= (mod v_~x$r_buff0_thd2~0_329 256) 0))) (let ((.cse51 (not .cse52))) (or (and .cse5 (= |v_P1_#t~ite53_87| 0) .cse47 .cse49 .cse50 .cse51) (and (= |v_P1_#t~ite52_97| |v_P1_#t~ite53_87|) (or .cse52 .cse3) (or (and (or .cse6 .cse3 .cse8 .cse51) (let ((.cse53 (= |v_P1_#t~ite51_101| 0))) (or (and .cse52 .cse5 .cse6 .cse10 .cse53) (and (or .cse12 .cse3 .cse8 .cse51) .cse53))) .cse47 (= |v_P1_#t~ite51_101| |v_P1_#t~ite52_97|)) (and (or (and (= |v_P1_#t~ite50_99| 0) .cse46) (and .cse26 (= |v_P1_#t~ite50_99| v_~x$r_buff1_thd2~0_294))) .cse52 .cse12 .cse5 (= |v_P1_#t~ite52_97| |v_P1_#t~ite50_99|) .cse10 .cse50)))))) .cse5) (and (= |v_P1_#t~ite54_73| v_~x$r_buff1_thd2~0_294) .cse47 .cse48 .cse49 .cse3 .cse50))))) (= |v_P1Thread1of1ForFork0_#t~nondet10_1| v_~weak$$choice0~0_141) (let ((.cse56 (= |v_P1_#t~ite26_63| |v_P1Thread1of1ForFork0_#t~ite26_1|)) (.cse57 (= |v_P1_#t~ite27_51| |v_P1Thread1of1ForFork0_#t~ite27_1|)) (.cse55 (= |v_P1_#t~ite25_69| |v_P1Thread1of1ForFork0_#t~ite25_1|))) (or (and .cse0 (= |v_P1_#t~ite28_43| v_~x$w_buff0~0_132) (or (and (= |v_P1_#t~ite27_51| |v_P1_#t~ite28_43|) .cse22 (or (and .cse20 (or (and (let ((.cse54 (= |v_P1_#t~ite25_69| v_~x$w_buff0~0_133))) (or (and .cse24 .cse54) (and .cse6 .cse9 .cse22 .cse23 .cse54))) (= |v_P1_#t~ite25_69| |v_P1_#t~ite26_63|) .cse25) (and .cse12 .cse9 .cse22 .cse55 (= |v_P1_#t~ite26_63| v_~x$w_buff0~0_133) .cse23)) (= |v_P1_#t~ite27_51| |v_P1_#t~ite26_63|)) (and .cse56 .cse22 (= |v_P1_#t~ite27_51| v_~x$w_buff0~0_133) .cse55 .cse7))) (and .cse56 .cse57 (= |v_P1_#t~ite28_43| v_~x$w_buff0~0_133) .cse55 .cse16))) (and (= |v_P1_#t~ite28_43| |v_P1Thread1of1ForFork0_#t~ite28_1|) .cse56 .cse57 .cse14 .cse55 (= v_~x$w_buff0~0_133 v_~x$w_buff0~0_132)))) (= v_~__unbuffered_p1_EAX$read_delayed_var~0.base_42 |v_~#x~0.base_172|) (= (store |v_#memory_int_260| |v_~#x~0.base_172| (store .cse58 |v_~#x~0.offset_172| |v_P1_#t~ite58_49|)) |v_#memory_int_258|)))))  InVars {~x$w_buff0~0=v_~x$w_buff0~0_133, P1Thread1of1ForFork0_#t~ite47=|v_P1Thread1of1ForFork0_#t~ite47_1|, P1Thread1of1ForFork0_#t~ite22=|v_P1Thread1of1ForFork0_#t~ite22_1|, P1Thread1of1ForFork0_#t~ite45=|v_P1Thread1of1ForFork0_#t~ite45_1|, P1Thread1of1ForFork0_#t~ite28=|v_P1Thread1of1ForFork0_#t~ite28_1|, P1Thread1of1ForFork0_#t~ite26=|v_P1Thread1of1ForFork0_#t~ite26_1|, P1Thread1of1ForFork0_#t~ite43=|v_P1Thread1of1ForFork0_#t~ite43_1|, P1Thread1of1ForFork0_#t~ite20=|v_P1Thread1of1ForFork0_#t~ite20_1|, P1Thread1of1ForFork0_#t~ite41=|v_P1Thread1of1ForFork0_#t~ite41_1|, P1Thread1of1ForFork0_#t~nondet10=|v_P1Thread1of1ForFork0_#t~nondet10_1|, P1Thread1of1ForFork0_#t~mem14=|v_P1Thread1of1ForFork0_#t~mem14_1|, ~#x~0.offset=|v_~#x~0.offset_172|, ~x$w_buff1~0=v_~x$w_buff1~0_128, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_294, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_392, P1Thread1of1ForFork0_#t~ite36=|v_P1Thread1of1ForFork0_#t~ite36_1|, P1Thread1of1ForFork0_#t~ite38=|v_P1Thread1of1ForFork0_#t~ite38_1|, P1Thread1of1ForFork0_#t~ite17=|v_P1Thread1of1ForFork0_#t~ite17_1|, P1Thread1of1ForFork0_#t~ite53=|v_P1Thread1of1ForFork0_#t~ite53_1|, P1Thread1of1ForFork0_#t~ite32=|v_P1Thread1of1ForFork0_#t~ite32_1|, P1Thread1of1ForFork0_#t~ite30=|v_P1Thread1of1ForFork0_#t~ite30_1|, P1Thread1of1ForFork0_#t~ite51=|v_P1Thread1of1ForFork0_#t~ite51_1|, P1Thread1of1ForFork0_#t~ite46=|v_P1Thread1of1ForFork0_#t~ite46_1|, P1Thread1of1ForFork0_#t~ite25=|v_P1Thread1of1ForFork0_#t~ite25_1|, P1Thread1of1ForFork0_#t~ite23=|v_P1Thread1of1ForFork0_#t~ite23_1|, P1Thread1of1ForFork0_#t~ite27=|v_P1Thread1of1ForFork0_#t~ite27_1|, P1Thread1of1ForFork0_#t~ite48=|v_P1Thread1of1ForFork0_#t~ite48_1|, P1Thread1of1ForFork0_#t~nondet13=|v_P1Thread1of1ForFork0_#t~nondet13_1|, P1Thread1of1ForFork0_#t~ite42=|v_P1Thread1of1ForFork0_#t~ite42_1|, P1Thread1of1ForFork0_#t~ite21=|v_P1Thread1of1ForFork0_#t~ite21_1|, P1Thread1of1ForFork0_#t~ite40=|v_P1Thread1of1ForFork0_#t~ite40_1|, P1Thread1of1ForFork0_#t~nondet11=|v_P1Thread1of1ForFork0_#t~nondet11_1|, P1Thread1of1ForFork0_#t~mem57=|v_P1Thread1of1ForFork0_#t~mem57_1|, P1Thread1of1ForFork0_#t~mem15=|v_P1Thread1of1ForFork0_#t~mem15_1|, P1Thread1of1ForFork0_#t~ite35=|v_P1Thread1of1ForFork0_#t~ite35_1|, P1Thread1of1ForFork0_#t~ite33=|v_P1Thread1of1ForFork0_#t~ite33_1|, P1Thread1of1ForFork0_#t~ite16=|v_P1Thread1of1ForFork0_#t~ite16_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_330, P1Thread1of1ForFork0_#t~ite37=|v_P1Thread1of1ForFork0_#t~ite37_1|, P1Thread1of1ForFork0_#t~ite18=|v_P1Thread1of1ForFork0_#t~ite18_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_473, P1Thread1of1ForFork0_#t~ite50=|v_P1Thread1of1ForFork0_#t~ite50_1|, P1Thread1of1ForFork0_#t~ite54=|v_P1Thread1of1ForFork0_#t~ite54_1|, P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_1|, P1Thread1of1ForFork0_#t~ite52=|v_P1Thread1of1ForFork0_#t~ite52_1|, #memory_int=|v_#memory_int_260|, ~#x~0.base=|v_~#x~0.base_172|, P1Thread1of1ForFork0_#t~mem19=|v_P1Thread1of1ForFork0_#t~mem19_1|}  OutVars{~x$w_buff0~0=v_~x$w_buff0~0_132, ~x$flush_delayed~0=v_~x$flush_delayed~0_66, P1Thread1of1ForFork0_#t~ite47=|v_P1Thread1of1ForFork0_#t~ite47_2|, P1Thread1of1ForFork0_#t~ite24=|v_P1Thread1of1ForFork0_#t~ite24_1|, P1Thread1of1ForFork0_#t~ite22=|v_P1Thread1of1ForFork0_#t~ite22_2|, P1Thread1of1ForFork0_#t~ite45=|v_P1Thread1of1ForFork0_#t~ite45_2|, P1Thread1of1ForFork0_#t~ite28=|v_P1Thread1of1ForFork0_#t~ite28_2|, P1Thread1of1ForFork0_#t~ite26=|v_P1Thread1of1ForFork0_#t~ite26_2|, P1Thread1of1ForFork0_#t~ite49=|v_P1Thread1of1ForFork0_#t~ite49_1|, ~weak$$choice1~0=v_~weak$$choice1~0_79, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_49, P1Thread1of1ForFork0_#t~ite43=|v_P1Thread1of1ForFork0_#t~ite43_2|, P1Thread1of1ForFork0_#t~ite20=|v_P1Thread1of1ForFork0_#t~ite20_2|, P1Thread1of1ForFork0_#t~ite41=|v_P1Thread1of1ForFork0_#t~ite41_2|, ~__unbuffered_p1_EAX$read_delayed_var~0.base=v_~__unbuffered_p1_EAX$read_delayed_var~0.base_42, P1Thread1of1ForFork0_#t~nondet10=|v_P1Thread1of1ForFork0_#t~nondet10_2|, P1Thread1of1ForFork0_#t~mem56=|v_P1Thread1of1ForFork0_#t~mem56_1|, P1Thread1of1ForFork0_#t~mem14=|v_P1Thread1of1ForFork0_#t~mem14_2|, ~#x~0.offset=|v_~#x~0.offset_172|, P1Thread1of1ForFork0_#t~mem12=|v_P1Thread1of1ForFork0_#t~mem12_1|, ~x$w_buff1~0=v_~x$w_buff1~0_127, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_293, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_391, P1Thread1of1ForFork0_#t~ite36=|v_P1Thread1of1ForFork0_#t~ite36_2|, P1Thread1of1ForFork0_#t~ite34=|v_P1Thread1of1ForFork0_#t~ite34_1|, P1Thread1of1ForFork0_#t~ite55=|v_P1Thread1of1ForFork0_#t~ite55_1|, P1Thread1of1ForFork0_#t~ite38=|v_P1Thread1of1ForFork0_#t~ite38_2|, P1Thread1of1ForFork0_#t~ite17=|v_P1Thread1of1ForFork0_#t~ite17_2|, ~weak$$choice0~0=v_~weak$$choice0~0_141, P1Thread1of1ForFork0_#t~ite53=|v_P1Thread1of1ForFork0_#t~ite53_2|, P1Thread1of1ForFork0_#t~ite32=|v_P1Thread1of1ForFork0_#t~ite32_2|, P1Thread1of1ForFork0_#t~ite30=|v_P1Thread1of1ForFork0_#t~ite30_2|, P1Thread1of1ForFork0_#t~ite51=|v_P1Thread1of1ForFork0_#t~ite51_2|, ~__unbuffered_p1_EAX$read_delayed~0=v_~__unbuffered_p1_EAX$read_delayed~0_41, P1Thread1of1ForFork0_#t~ite46=|v_P1Thread1of1ForFork0_#t~ite46_2|, P1Thread1of1ForFork0_#t~ite25=|v_P1Thread1of1ForFork0_#t~ite25_2|, ~x$mem_tmp~0=v_~x$mem_tmp~0_38, P1Thread1of1ForFork0_#t~ite23=|v_P1Thread1of1ForFork0_#t~ite23_2|, P1Thread1of1ForFork0_#t~ite44=|v_P1Thread1of1ForFork0_#t~ite44_1|, P1Thread1of1ForFork0_#t~ite29=|v_P1Thread1of1ForFork0_#t~ite29_1|, P1Thread1of1ForFork0_#t~ite27=|v_P1Thread1of1ForFork0_#t~ite27_2|, P1Thread1of1ForFork0_#t~ite48=|v_P1Thread1of1ForFork0_#t~ite48_2|, P1Thread1of1ForFork0_#t~nondet13=|v_P1Thread1of1ForFork0_#t~nondet13_2|, P1Thread1of1ForFork0_#t~ite42=|v_P1Thread1of1ForFork0_#t~ite42_2|, P1Thread1of1ForFork0_#t~ite21=|v_P1Thread1of1ForFork0_#t~ite21_2|, P1Thread1of1ForFork0_#t~ite40=|v_P1Thread1of1ForFork0_#t~ite40_2|, P1Thread1of1ForFork0_#t~nondet11=|v_P1Thread1of1ForFork0_#t~nondet11_2|, P1Thread1of1ForFork0_#t~mem57=|v_P1Thread1of1ForFork0_#t~mem57_2|, P1Thread1of1ForFork0_#t~mem15=|v_P1Thread1of1ForFork0_#t~mem15_2|, P1Thread1of1ForFork0_#t~ite58=|v_P1Thread1of1ForFork0_#t~ite58_1|, P1Thread1of1ForFork0_#t~ite35=|v_P1Thread1of1ForFork0_#t~ite35_2|, ~__unbuffered_p1_EAX$read_delayed_var~0.offset=v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_42, P1Thread1of1ForFork0_#t~ite33=|v_P1Thread1of1ForFork0_#t~ite33_2|, P1Thread1of1ForFork0_#t~ite16=|v_P1Thread1of1ForFork0_#t~ite16_2|, P1Thread1of1ForFork0_#t~ite39=|v_P1Thread1of1ForFork0_#t~ite39_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_329, P1Thread1of1ForFork0_#t~ite37=|v_P1Thread1of1ForFork0_#t~ite37_2|, P1Thread1of1ForFork0_#t~ite18=|v_P1Thread1of1ForFork0_#t~ite18_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_472, P1Thread1of1ForFork0_#t~ite50=|v_P1Thread1of1ForFork0_#t~ite50_2|, P1Thread1of1ForFork0_#t~ite54=|v_P1Thread1of1ForFork0_#t~ite54_2|, P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_2|, P1Thread1of1ForFork0_#t~ite52=|v_P1Thread1of1ForFork0_#t~ite52_2|, #memory_int=|v_#memory_int_258|, ~#x~0.base=|v_~#x~0.base_172|, P1Thread1of1ForFork0_#t~mem19=|v_P1Thread1of1ForFork0_#t~mem19_2|, ~weak$$choice2~0=v_~weak$$choice2~0_90}  AuxVars[|v_P1_#t~ite41_69|, |v_P1_#t~ite23_65|, |v_P1_#t~ite25_69|, |v_P1_#t~ite48_63|, |v_P1_#t~ite31_49|, |v_P1_#t~ite22_71|, |v_P1_#t~ite46_81|, |v_P1_#t~ite47_71|, |v_P1_#t~mem19_82|, |v_P1_#t~ite30_55|, |v_P1_#t~ite33_35|, |v_P1_#t~ite50_99|, |v_P1_#t~ite16_79|, |v_P1_#t~ite32_41|, |v_P1_#t~ite37_51|, |v_P1_#t~ite38_43|, |v_P1_#t~ite42_61|, |v_P1_#t~ite21_79|, |v_P1_#t~ite43_53|, |v_P1_#t~mem57_64|, |v_P1_#t~ite51_101|, |v_P1_#t~ite20_81|, |v_P1_#t~mem14_60|, |v_P1_#t~ite45_87|, |v_P1_#t~mem15_76|, |v_P1_#t~ite54_73|, |v_P1_#t~ite26_63|, |v_P1_#t~ite28_43|, |v_P1_#t~ite53_87|, |v_P1_#t~ite52_97|, |v_P1_#t~ite27_51|, |v_P1_#t~ite17_79|, |v_P1_#t~ite58_49|, |v_P1_#t~ite36_59|, |v_P1_#t~ite35_65|, |v_P1_#t~ite18_83|, |v_P1_#t~ite39_41|, |v_P1_#t~ite40_75|]  AssignedVars[~x$w_buff0~0, ~x$flush_delayed~0, P1Thread1of1ForFork0_#t~ite47, P1Thread1of1ForFork0_#t~ite24, P1Thread1of1ForFork0_#t~ite22, P1Thread1of1ForFork0_#t~ite45, P1Thread1of1ForFork0_#t~ite28, P1Thread1of1ForFork0_#t~ite26, P1Thread1of1ForFork0_#t~ite49, ~weak$$choice1~0, ~__unbuffered_p1_EAX~0, P1Thread1of1ForFork0_#t~ite43, P1Thread1of1ForFork0_#t~ite20, P1Thread1of1ForFork0_#t~ite41, ~__unbuffered_p1_EAX$read_delayed_var~0.base, P1Thread1of1ForFork0_#t~nondet10, P1Thread1of1ForFork0_#t~mem56, P1Thread1of1ForFork0_#t~mem14, P1Thread1of1ForFork0_#t~mem12, ~x$w_buff1~0, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~ite36, P1Thread1of1ForFork0_#t~ite34, P1Thread1of1ForFork0_#t~ite55, P1Thread1of1ForFork0_#t~ite38, P1Thread1of1ForFork0_#t~ite17, ~weak$$choice0~0, P1Thread1of1ForFork0_#t~ite53, P1Thread1of1ForFork0_#t~ite32, P1Thread1of1ForFork0_#t~ite30, P1Thread1of1ForFork0_#t~ite51, ~__unbuffered_p1_EAX$read_delayed~0, P1Thread1of1ForFork0_#t~ite46, P1Thread1of1ForFork0_#t~ite25, ~x$mem_tmp~0, P1Thread1of1ForFork0_#t~ite23, P1Thread1of1ForFork0_#t~ite44, P1Thread1of1ForFork0_#t~ite29, P1Thread1of1ForFork0_#t~ite27, P1Thread1of1ForFork0_#t~ite48, P1Thread1of1ForFork0_#t~nondet13, P1Thread1of1ForFork0_#t~ite42, P1Thread1of1ForFork0_#t~ite21, P1Thread1of1ForFork0_#t~ite40, P1Thread1of1ForFork0_#t~nondet11, P1Thread1of1ForFork0_#t~mem57, P1Thread1of1ForFork0_#t~mem15, P1Thread1of1ForFork0_#t~ite58, P1Thread1of1ForFork0_#t~ite35, ~__unbuffered_p1_EAX$read_delayed_var~0.offset, P1Thread1of1ForFork0_#t~ite33, P1Thread1of1ForFork0_#t~ite16, P1Thread1of1ForFork0_#t~ite39, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite37, P1Thread1of1ForFork0_#t~ite18, ~x$w_buff0_used~0, P1Thread1of1ForFork0_#t~ite50, P1Thread1of1ForFork0_#t~ite54, P1Thread1of1ForFork0_#t~ite31, P1Thread1of1ForFork0_#t~ite52, #memory_int, P1Thread1of1ForFork0_#t~mem19, ~weak$$choice2~0] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,039 INFO  L290        TraceCheckUtils]: 67: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1231] L798-->L801: Formula: (= v_~y~0_2 1)  InVars {}  OutVars{~y~0=v_~y~0_2}  AuxVars[]  AssignedVars[~y~0] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,039 INFO  L290        TraceCheckUtils]: 68: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1222] L752-->L754: Formula: (= v_~__unbuffered_p0_EAX~0_1 v_~y~0_1)  InVars {~y~0=v_~y~0_1}  OutVars{~y~0=v_~y~0_1, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p0_EAX~0] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,040 INFO  L290        TraceCheckUtils]: 69: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1188] L828-3-->L828-4: Formula: true  InVars {}  OutVars{ULTIMATE.start_main_#t~pre68#1=|v_ULTIMATE.start_main_#t~pre68#1_4|}  AuxVars[]  AssignedVars[ULTIMATE.start_main_#t~pre68#1] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,040 INFO  L290        TraceCheckUtils]: 70: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1178] L828-4-->L829: Formula: true  InVars {}  OutVars{ULTIMATE.start_main_#t~nondet69#1=|v_ULTIMATE.start_main_#t~nondet69#1_2|}  AuxVars[]  AssignedVars[ULTIMATE.start_main_#t~nondet69#1] {4202#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:13,041 INFO  L290        TraceCheckUtils]: 71: Hoare triple {4202#(= ~__unbuffered_cnt~0 0)} [1120] L829-->L831: Formula: (= v_~main$tmp_guard0~0_2 (ite (= (ite (= v_~__unbuffered_cnt~0_6 2) 1 0) 0) 0 1))  InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_6}  OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_6, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_2}  AuxVars[]  AssignedVars[~main$tmp_guard0~0] {4203#(and (<= ~main$tmp_guard0~0 0) (<= 0 ~main$tmp_guard0~0))} is VALID
[2022-02-20 20:28:13,041 INFO  L290        TraceCheckUtils]: 72: Hoare triple {4203#(and (<= ~main$tmp_guard0~0 0) (<= 0 ~main$tmp_guard0~0))} [1185] L831-->L832: Formula: true  InVars {}  OutVars{}  AuxVars[]  AssignedVars[] {4203#(and (<= ~main$tmp_guard0~0 0) (<= 0 ~main$tmp_guard0~0))} is VALID
[2022-02-20 20:28:13,042 INFO  L290        TraceCheckUtils]: 73: Hoare triple {4203#(and (<= ~main$tmp_guard0~0 0) (<= 0 ~main$tmp_guard0~0))} [1112] L832-->L832-1: Formula: (= |v_ULTIMATE.start_assume_abort_if_not_#in~cond#1_1| (mod v_~main$tmp_guard0~0_3 256))  InVars {~main$tmp_guard0~0=v_~main$tmp_guard0~0_3}  OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_3, ULTIMATE.start_assume_abort_if_not_#in~cond#1=|v_ULTIMATE.start_assume_abort_if_not_#in~cond#1_1|}  AuxVars[]  AssignedVars[ULTIMATE.start_assume_abort_if_not_#in~cond#1] {4204#(and (<= |ULTIMATE.start_assume_abort_if_not_#in~cond#1| 0) (<= 0 |ULTIMATE.start_assume_abort_if_not_#in~cond#1|))} is VALID
[2022-02-20 20:28:13,042 INFO  L290        TraceCheckUtils]: 74: Hoare triple {4204#(and (<= |ULTIMATE.start_assume_abort_if_not_#in~cond#1| 0) (<= 0 |ULTIMATE.start_assume_abort_if_not_#in~cond#1|))} [1215] L832-1-->L2: Formula: true  InVars {}  OutVars{ULTIMATE.start_assume_abort_if_not_~cond#1=|v_ULTIMATE.start_assume_abort_if_not_~cond#1_1|}  AuxVars[]  AssignedVars[ULTIMATE.start_assume_abort_if_not_~cond#1] {4204#(and (<= |ULTIMATE.start_assume_abort_if_not_#in~cond#1| 0) (<= 0 |ULTIMATE.start_assume_abort_if_not_#in~cond#1|))} is VALID
[2022-02-20 20:28:13,042 INFO  L290        TraceCheckUtils]: 75: Hoare triple {4204#(and (<= |ULTIMATE.start_assume_abort_if_not_#in~cond#1| 0) (<= 0 |ULTIMATE.start_assume_abort_if_not_#in~cond#1|))} [1173] L2-->L3: Formula: (= |v_ULTIMATE.start_assume_abort_if_not_#in~cond#1_2| |v_ULTIMATE.start_assume_abort_if_not_~cond#1_2|)  InVars {ULTIMATE.start_assume_abort_if_not_#in~cond#1=|v_ULTIMATE.start_assume_abort_if_not_#in~cond#1_2|}  OutVars{ULTIMATE.start_assume_abort_if_not_~cond#1=|v_ULTIMATE.start_assume_abort_if_not_~cond#1_2|, ULTIMATE.start_assume_abort_if_not_#in~cond#1=|v_ULTIMATE.start_assume_abort_if_not_#in~cond#1_2|}  AuxVars[]  AssignedVars[ULTIMATE.start_assume_abort_if_not_~cond#1] {4205#(and (<= |ULTIMATE.start_assume_abort_if_not_~cond#1| 0) (< 0 (+ |ULTIMATE.start_assume_abort_if_not_~cond#1| 1)))} is VALID
[2022-02-20 20:28:13,043 INFO  L290        TraceCheckUtils]: 76: Hoare triple {4205#(and (<= |ULTIMATE.start_assume_abort_if_not_~cond#1| 0) (< 0 (+ |ULTIMATE.start_assume_abort_if_not_~cond#1| 1)))} [1162] L3-->L2-1: Formula: (not (= |v_ULTIMATE.start_assume_abort_if_not_~cond#1_4| 0))  InVars {ULTIMATE.start_assume_abort_if_not_~cond#1=|v_ULTIMATE.start_assume_abort_if_not_~cond#1_4|}  OutVars{ULTIMATE.start_assume_abort_if_not_~cond#1=|v_ULTIMATE.start_assume_abort_if_not_~cond#1_4|}  AuxVars[]  AssignedVars[] {4201#false} is VALID
[2022-02-20 20:28:13,043 INFO  L290        TraceCheckUtils]: 77: Hoare triple {4201#false} [1134] L2-1-->L833: Formula: true  InVars {}  OutVars{}  AuxVars[]  AssignedVars[] {4201#false} is VALID
[2022-02-20 20:28:13,043 INFO  L290        TraceCheckUtils]: 78: Hoare triple {4201#false} [1150] L833-->L839: Formula: (let ((.cse15 (= (mod v_~x$w_buff0_used~0_455 256) 0)) (.cse14 (= (mod v_~x$r_buff0_thd0~0_70 256) 0)) (.cse11 (= (mod v_~x$w_buff0_used~0_454 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd0~0_48 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_374 256) 0))) (let ((.cse4 (not .cse16)) (.cse5 (not .cse12)) (.cse6 (or .cse12 .cse16)) (.cse13 (or .cse14 .cse11)) (.cse9 (not .cse11)) (.cse0 (not .cse15)) (.cse1 (not .cse14)) (.cse3 (or .cse14 .cse15)) (.cse7 (select |v_#memory_int_251| |v_~#x~0.base_168|))) (and (let ((.cse2 (= |v_ULTIMATE.start_main_#t~mem70#1_41| |v_ULTIMATE.start_main_#t~mem70#1_36|))) (or (and (= |v_ULTIMATE.start_main_#t~ite71#1_42| |v_ULTIMATE.start_main_#t~ite71#1_37|) .cse0 (= v_~x$w_buff0~0_126 |v_ULTIMATE.start_main_#t~ite72#1_36|) .cse1 .cse2) (and .cse3 (= |v_ULTIMATE.start_main_#t~ite71#1_42| |v_ULTIMATE.start_main_#t~ite72#1_36|) (or (and .cse4 (= v_~x$w_buff1~0_111 |v_ULTIMATE.start_main_#t~ite71#1_42|) .cse2 .cse5) (and .cse6 (= |v_ULTIMATE.start_main_#t~mem70#1_41| |v_ULTIMATE.start_main_#t~ite71#1_42|) (= |v_ULTIMATE.start_main_#t~mem70#1_41| (select .cse7 |v_~#x~0.offset_168|))))))) (let ((.cse10 (= (mod v_~x$r_buff0_thd0~0_69 256) 0)) (.cse8 (= (mod v_~x$w_buff1_used~0_373 256) 0))) (or (and (or (and (not .cse8) .cse5) (and .cse9 (not .cse10))) (= v_~x$r_buff1_thd0~0_47 0)) (and (or .cse10 .cse11) (or .cse8 .cse12) (= v_~x$r_buff1_thd0~0_48 v_~x$r_buff1_thd0~0_47)))) (or (and (or (and .cse9 .cse1) (and .cse4 .cse5)) (= v_~x$w_buff1_used~0_373 0)) (and .cse6 (= v_~x$w_buff1_used~0_374 v_~x$w_buff1_used~0_373) .cse13)) (or (and .cse13 (= v_~x$r_buff0_thd0~0_69 v_~x$r_buff0_thd0~0_70)) (and (= v_~x$r_buff0_thd0~0_69 0) .cse9 .cse1)) (or (and .cse0 (= v_~x$w_buff0_used~0_454 0) .cse1) (and (= v_~x$w_buff0_used~0_455 v_~x$w_buff0_used~0_454) .cse3)) (= (store |v_#memory_int_251| |v_~#x~0.base_168| (store .cse7 |v_~#x~0.offset_168| |v_ULTIMATE.start_main_#t~ite72#1_36|)) |v_#memory_int_250|))))  InVars {~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_70, ULTIMATE.start_main_#t~ite71#1=|v_ULTIMATE.start_main_#t~ite71#1_37|, ~#x~0.offset=|v_~#x~0.offset_168|, ULTIMATE.start_main_#t~mem70#1=|v_ULTIMATE.start_main_#t~mem70#1_36|, ~x$w_buff1~0=v_~x$w_buff1~0_111, #memory_int=|v_#memory_int_251|, ~#x~0.base=|v_~#x~0.base_168|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_374, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_48, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_455}  OutVars{~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_69, ULTIMATE.start_main_#t~ite74#1=|v_ULTIMATE.start_main_#t~ite74#1_30|, ~#x~0.offset=|v_~#x~0.offset_168|, ULTIMATE.start_main_#t~mem70#1=|v_ULTIMATE.start_main_#t~mem70#1_35|, ULTIMATE.start_main_#t~ite72#1=|v_ULTIMATE.start_main_#t~ite72#1_32|, ~x$w_buff1~0=v_~x$w_buff1~0_111, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_373, ULTIMATE.start_main_#t~ite76#1=|v_ULTIMATE.start_main_#t~ite76#1_16|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_47, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_454, ULTIMATE.start_main_#t~ite71#1=|v_ULTIMATE.start_main_#t~ite71#1_36|, ULTIMATE.start_main_#t~ite73#1=|v_ULTIMATE.start_main_#t~ite73#1_32|, ULTIMATE.start_main_#t~ite75#1=|v_ULTIMATE.start_main_#t~ite75#1_28|, #memory_int=|v_#memory_int_250|, ~#x~0.base=|v_~#x~0.base_168|}  AuxVars[|v_ULTIMATE.start_main_#t~ite71#1_42|, |v_ULTIMATE.start_main_#t~mem70#1_41|, |v_ULTIMATE.start_main_#t~ite72#1_36|]  AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite71#1, ULTIMATE.start_main_#t~ite74#1, ULTIMATE.start_main_#t~mem70#1, ULTIMATE.start_main_#t~ite73#1, ULTIMATE.start_main_#t~ite72#1, ULTIMATE.start_main_#t~ite75#1, #memory_int, ~x$w_buff1_used~0, ULTIMATE.start_main_#t~ite76#1, ~x$r_buff1_thd0~0, ~x$w_buff0_used~0] {4201#false} is VALID
[2022-02-20 20:28:13,043 INFO  L290        TraceCheckUtils]: 79: Hoare triple {4201#false} [1135] L839-->L844: Formula: (and (= (ite (= (ite (not (and (= v_~__unbuffered_p0_EAX~0_10 1) (= v_~__unbuffered_p1_EAX~0_45 1))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_10) (= v_~weak$$choice1~0_71 |v_ULTIMATE.start_main_#t~nondet77#1_9|) (let ((.cse0 (= (mod v_~__unbuffered_p1_EAX$read_delayed~0_39 256) 0)) (.cse1 (= |v_ULTIMATE.start_main_#t~mem78#1_28| |v_ULTIMATE.start_main_#t~mem78#1_33|))) (or (and (= |v_ULTIMATE.start_main_#t~ite79#1_25| |v_ULTIMATE.start_main_#t~ite79#1_30|) .cse0 .cse1 (= v_~__unbuffered_p1_EAX~0_46 v_~__unbuffered_p1_EAX~0_45)) (and (not .cse0) (let ((.cse2 (= (mod v_~weak$$choice1~0_71 256) 0))) (or (and (= |v_ULTIMATE.start_main_#t~mem78#1_33| |v_ULTIMATE.start_main_#t~ite79#1_30|) (= (select (select |v_#memory_int_220| v_~__unbuffered_p1_EAX$read_delayed_var~0.base_40) v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_40) |v_ULTIMATE.start_main_#t~mem78#1_33|) (not .cse2)) (and .cse1 (= v_~__unbuffered_p1_EAX~0_46 |v_ULTIMATE.start_main_#t~ite79#1_30|) .cse2))) (= v_~__unbuffered_p1_EAX~0_45 |v_ULTIMATE.start_main_#t~ite79#1_30|)))))  InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_10, ULTIMATE.start_main_#t~nondet77#1=|v_ULTIMATE.start_main_#t~nondet77#1_9|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_46, ~__unbuffered_p1_EAX$read_delayed~0=v_~__unbuffered_p1_EAX$read_delayed~0_39, ~__unbuffered_p1_EAX$read_delayed_var~0.base=v_~__unbuffered_p1_EAX$read_delayed_var~0.base_40, #memory_int=|v_#memory_int_220|, ~__unbuffered_p1_EAX$read_delayed_var~0.offset=v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_40, ULTIMATE.start_main_#t~ite79#1=|v_ULTIMATE.start_main_#t~ite79#1_25|, ULTIMATE.start_main_#t~mem78#1=|v_ULTIMATE.start_main_#t~mem78#1_28|}  OutVars{ULTIMATE.start_main_#t~nondet77#1=|v_ULTIMATE.start_main_#t~nondet77#1_8|, ~__unbuffered_p1_EAX$read_delayed~0=v_~__unbuffered_p1_EAX$read_delayed~0_39, ~__unbuffered_p1_EAX$read_delayed_var~0.offset=v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_40, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_10, ULTIMATE.start_main_#t~ite80#1=|v_ULTIMATE.start_main_#t~ite80#1_26|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_10, ~weak$$choice1~0=v_~weak$$choice1~0_71, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_45, ~__unbuffered_p1_EAX$read_delayed_var~0.base=v_~__unbuffered_p1_EAX$read_delayed_var~0.base_40, #memory_int=|v_#memory_int_220|, ULTIMATE.start_main_#t~ite79#1=|v_ULTIMATE.start_main_#t~ite79#1_24|, ULTIMATE.start_main_#t~mem78#1=|v_ULTIMATE.start_main_#t~mem78#1_27|}  AuxVars[|v_ULTIMATE.start_main_#t~ite79#1_30|, |v_ULTIMATE.start_main_#t~mem78#1_33|]  AssignedVars[~weak$$choice1~0, ULTIMATE.start_main_#t~nondet77#1, ~__unbuffered_p1_EAX~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite80#1, ULTIMATE.start_main_#t~ite79#1, ULTIMATE.start_main_#t~mem78#1] {4201#false} is VALID
[2022-02-20 20:28:13,044 INFO  L290        TraceCheckUtils]: 80: Hoare triple {4201#false} [1177] L844-->L845: Formula: true  InVars {}  OutVars{}  AuxVars[]  AssignedVars[] {4201#false} is VALID
[2022-02-20 20:28:13,044 INFO  L290        TraceCheckUtils]: 81: Hoare triple {4201#false} [1204] L845-->L845-1: Formula: (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression#1_1| (mod v_~main$tmp_guard1~0_3 256))  InVars {~main$tmp_guard1~0=v_~main$tmp_guard1~0_3}  OutVars{ULTIMATE.start___VERIFIER_assert_#in~expression#1=|v_ULTIMATE.start___VERIFIER_assert_#in~expression#1_1|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_3}  AuxVars[]  AssignedVars[ULTIMATE.start___VERIFIER_assert_#in~expression#1] {4201#false} is VALID
[2022-02-20 20:28:13,044 INFO  L290        TraceCheckUtils]: 82: Hoare triple {4201#false} [1127] L845-1-->L18: Formula: true  InVars {}  OutVars{ULTIMATE.start___VERIFIER_assert_~expression#1=|v_ULTIMATE.start___VERIFIER_assert_~expression#1_1|}  AuxVars[]  AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression#1] {4201#false} is VALID
[2022-02-20 20:28:13,044 INFO  L290        TraceCheckUtils]: 83: Hoare triple {4201#false} [1189] L18-->L18-1: Formula: (= |v_ULTIMATE.start___VERIFIER_assert_~expression#1_2| |v_ULTIMATE.start___VERIFIER_assert_#in~expression#1_2|)  InVars {ULTIMATE.start___VERIFIER_assert_#in~expression#1=|v_ULTIMATE.start___VERIFIER_assert_#in~expression#1_2|}  OutVars{ULTIMATE.start___VERIFIER_assert_#in~expression#1=|v_ULTIMATE.start___VERIFIER_assert_#in~expression#1_2|, ULTIMATE.start___VERIFIER_assert_~expression#1=|v_ULTIMATE.start___VERIFIER_assert_~expression#1_2|}  AuxVars[]  AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression#1] {4201#false} is VALID
[2022-02-20 20:28:13,044 INFO  L290        TraceCheckUtils]: 84: Hoare triple {4201#false} [1156] L18-1-->L18-2: Formula: (= |v_ULTIMATE.start___VERIFIER_assert_~expression#1_3| 0)  InVars {ULTIMATE.start___VERIFIER_assert_~expression#1=|v_ULTIMATE.start___VERIFIER_assert_~expression#1_3|}  OutVars{ULTIMATE.start___VERIFIER_assert_~expression#1=|v_ULTIMATE.start___VERIFIER_assert_~expression#1_3|}  AuxVars[]  AssignedVars[] {4201#false} is VALID
[2022-02-20 20:28:13,044 INFO  L290        TraceCheckUtils]: 85: Hoare triple {4201#false} [1145] L18-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true  InVars {}  OutVars{}  AuxVars[]  AssignedVars[] {4201#false} is VALID
[2022-02-20 20:28:13,045 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2022-02-20 20:28:13,045 INFO  L144   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2022-02-20 20:28:13,045 INFO  L338   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1582655859]
[2022-02-20 20:28:13,045 INFO  L165   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1582655859] provided 1 perfect and 0 imperfect interpolant sequences
[2022-02-20 20:28:13,045 INFO  L191   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2022-02-20 20:28:13,046 INFO  L204   FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6
[2022-02-20 20:28:13,046 INFO  L118   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [9337799]
[2022-02-20 20:28:13,046 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2022-02-20 20:28:13,046 INFO  L78                 Accepts]: Start accepts. Automaton has  has 6 states, 6 states have (on average 14.333333333333334) internal successors, (86), 6 states have internal predecessors, (86), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 86
[2022-02-20 20:28:13,047 INFO  L84                 Accepts]: Finished accepts. word is accepted.
[2022-02-20 20:28:13,047 INFO  L86        InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with  has 6 states, 6 states have (on average 14.333333333333334) internal successors, (86), 6 states have internal predecessors, (86), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-02-20 20:28:13,099 INFO  L122       InductivityCheck]: Floyd-Hoare automaton has 86 edges. 86 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. 
[2022-02-20 20:28:13,099 INFO  L546      AbstractCegarLoop]: INTERPOLANT automaton has 6 states
[2022-02-20 20:28:13,100 INFO  L108   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2022-02-20 20:28:13,100 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2022-02-20 20:28:13,103 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30
[2022-02-20 20:28:13,103 INFO  L499   CegarLoopForPetriNet]: Number of universal loopers: 90 out of 112
[2022-02-20 20:28:13,104 INFO  L92    encePairwiseOnDemand]: Start differencePairwiseOnDemand. First operand has 119 places, 96 transitions, 230 flow. Second operand  has 6 states, 6 states have (on average 92.0) internal successors, (552), 6 states have internal predecessors, (552), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-02-20 20:28:13,104 INFO  L101   encePairwiseOnDemand]: Universal subtrahend loopers provided by user.
[2022-02-20 20:28:13,104 INFO  L102   encePairwiseOnDemand]: Number of universal subtrahend loopers: 90 of 112
[2022-02-20 20:28:13,104 INFO  L74            FinitePrefix]: Start finitePrefix. Operand will be constructed on-demand
[2022-02-20 20:28:13,485 INFO  L129       PetriNetUnfolder]: 130/416 cut-off events.
[2022-02-20 20:28:13,485 INFO  L130       PetriNetUnfolder]: For 42/42 co-relation queries the response was YES.
[2022-02-20 20:28:13,486 INFO  L84            FinitePrefix]: Finished finitePrefix Result has 758 conditions, 416 events. 130/416 cut-off events. For 42/42 co-relation queries the response was YES. Maximal size of possible extension queue 28. Compared 1699 event pairs, 10 based on Foata normal form. 0/407 useless extension candidates. Maximal degree in co-relation 722. Up to 78 conditions per place. 
[2022-02-20 20:28:13,487 INFO  L132   encePairwiseOnDemand]: 103/112 looper letters, 22 selfloop transitions, 5 changer transitions 37/142 dead transitions.
[2022-02-20 20:28:13,487 INFO  L138   encePairwiseOnDemand]: Finished differencePairwiseOnDemand. Result has 122 places, 142 transitions, 450 flow
[2022-02-20 20:28:13,487 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. 
[2022-02-20 20:28:13,488 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 10 states.
[2022-02-20 20:28:13,496 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 966 transitions.
[2022-02-20 20:28:13,496 INFO  L544   CegarLoopForPetriNet]: DFA transition density 0.8625
[2022-02-20 20:28:13,496 INFO  L72            ComplementDD]: Start complementDD. Operand 10 states and 966 transitions.
[2022-02-20 20:28:13,496 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 10 states and 966 transitions.
[2022-02-20 20:28:13,497 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2022-02-20 20:28:13,497 INFO  L117    ReachableStatesCopy]: Start reachableStatesCopy. Operand 10 states and 966 transitions.
[2022-02-20 20:28:13,499 INFO  L343    DoubleDeckerVisitor]: Before removal of dead ends  has 11 states, 10 states have (on average 96.6) internal successors, (966), 10 states have internal predecessors, (966), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-02-20 20:28:13,501 INFO  L131    ReachableStatesCopy]: Finished reachableStatesCopy Result  has 11 states, 11 states have (on average 112.0) internal successors, (1232), 11 states have internal predecessors, (1232), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-02-20 20:28:13,502 INFO  L81            ComplementDD]: Finished complementDD. Result  has 11 states, 11 states have (on average 112.0) internal successors, (1232), 11 states have internal predecessors, (1232), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-02-20 20:28:13,502 INFO  L186             Difference]: Start difference. First operand has 119 places, 96 transitions, 230 flow. Second operand 10 states and 966 transitions.
[2022-02-20 20:28:13,502 INFO  L82        GeneralOperation]: Start removeRedundantFlow. Operand has 122 places, 142 transitions, 450 flow
[2022-02-20 20:28:15,831 INFO  L88        GeneralOperation]: Finished removeRedundantFlow, result has has 112 places, 142 transitions, 424 flow, removed 8 selfloop flow, removed 10 redundant places.
[2022-02-20 20:28:15,836 INFO  L242             Difference]: Finished difference. Result has 118 places, 97 transitions, 246 flow
[2022-02-20 20:28:15,837 INFO  L317   CegarLoopForPetriNet]: {PETRI_ALPHABET=112, PETRI_DIFFERENCE_MINUEND_FLOW=204, PETRI_DIFFERENCE_MINUEND_PLACES=103, PETRI_DIFFERENCE_MINUEND_TRANSITIONS=96, PETRI_DIFFERENCE_SUBTRAHEND_LETTERS_WITH_MORE_CHANGERS_THAN_LOOPERS=3, PETRI_DIFFERENCE_SUBTRAHEND_LOOPER_ONLY_LETTERS=91, PETRI_DIFFERENCE_SUBTRAHEND_STATES=10, PETRI_FLOW=246, PETRI_PLACES=118, PETRI_TRANSITIONS=97}
[2022-02-20 20:28:15,837 INFO  L334   CegarLoopForPetriNet]: 115 programPoint places, 3 predicate places.
[2022-02-20 20:28:15,837 INFO  L111   iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 118 places, 97 transitions, 246 flow
[2022-02-20 20:28:15,851 INFO  L133   iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result  has 617 states, 616 states have (on average 2.3392857142857144) internal successors, (1441), 616 states have internal predecessors, (1441), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-02-20 20:28:15,852 INFO  L78                 Accepts]: Start accepts. Automaton has  has 617 states, 616 states have (on average 2.3392857142857144) internal successors, (1441), 616 states have internal predecessors, (1441), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 86
[2022-02-20 20:28:15,853 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2022-02-20 20:28:15,853 INFO  L470      AbstractCegarLoop]: Abstraction has has 118 places, 97 transitions, 246 flow
[2022-02-20 20:28:15,853 INFO  L471      AbstractCegarLoop]: INTERPOLANT automaton has  has 6 states, 6 states have (on average 92.0) internal successors, (552), 6 states have internal predecessors, (552), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-02-20 20:28:15,853 INFO  L246   CegarLoopForPetriNet]: Found error trace
[2022-02-20 20:28:15,853 INFO  L254   CegarLoopForPetriNet]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2022-02-20 20:28:15,854 WARN  L452      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3
[2022-02-20 20:28:15,854 INFO  L402      AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATION (and 2 more)] ===
[2022-02-20 20:28:15,854 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2022-02-20 20:28:15,854 INFO  L85        PathProgramCache]: Analyzing trace with hash 1393531936, now seen corresponding path program 1 times
[2022-02-20 20:28:15,854 INFO  L126   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2022-02-20 20:28:15,855 INFO  L338   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1167238474]
[2022-02-20 20:28:15,855 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2022-02-20 20:28:15,855 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2022-02-20 20:28:15,944 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2022-02-20 20:28:16,065 INFO  L290        TraceCheckUtils]: 0: Hoare triple {4841#true} [1205] ULTIMATE.startENTRY-->L-1: Formula: true  InVars {}  OutVars{}  AuxVars[]  AssignedVars[] {4841#true} is VALID
[2022-02-20 20:28:16,065 INFO  L290        TraceCheckUtils]: 1: Hoare triple {4841#true} [1144] L-1-->L-1-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0))  InVars {}  OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|}  AuxVars[]  AssignedVars[#NULL.offset, #NULL.base] {4841#true} is VALID
[2022-02-20 20:28:16,066 INFO  L290        TraceCheckUtils]: 2: Hoare triple {4841#true} [1210] L-1-1-->L-1-2: Formula: (= (select |v_#valid_1| 0) 0)  InVars {#valid=|v_#valid_1|}  OutVars{#valid=|v_#valid_1|}  AuxVars[]  AssignedVars[] {4841#true} is VALID
[2022-02-20 20:28:16,066 INFO  L290        TraceCheckUtils]: 3: Hoare triple {4841#true} [1214] L-1-2-->L17: Formula: (< 0 |v_#StackHeapBarrier_1|)  InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|}  OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|}  AuxVars[]  AssignedVars[] {4841#true} is VALID
[2022-02-20 20:28:16,066 INFO  L290        TraceCheckUtils]: 4: Hoare triple {4841#true} [1212] L17-->L17-1: Formula: (and (= (select |v_#valid_2| 1) 1) (= 2 (select |v_#length_1| 1)))  InVars {#length=|v_#length_1|, #valid=|v_#valid_2|}  OutVars{#length=|v_#length_1|, #valid=|v_#valid_2|}  AuxVars[]  AssignedVars[] {4841#true} is VALID
[2022-02-20 20:28:16,066 INFO  L290        TraceCheckUtils]: 5: Hoare triple {4841#true} [1179] L17-1-->L17-2: Formula: (= 48 (select (select |v_#memory_int_17| 1) 0))  InVars {#memory_int=|v_#memory_int_17|}  OutVars{#memory_int=|v_#memory_int_17|}  AuxVars[]  AssignedVars[] {4841#true} is VALID
[2022-02-20 20:28:16,066 INFO  L290        TraceCheckUtils]: 6: Hoare triple {4841#true} [1118] L17-2-->L17-3: Formula: (= (select (select |v_#memory_int_18| 1) 1) 0)  InVars {#memory_int=|v_#memory_int_18|}  OutVars{#memory_int=|v_#memory_int_18|}  AuxVars[]  AssignedVars[] {4841#true} is VALID
[2022-02-20 20:28:16,066 INFO  L290        TraceCheckUtils]: 7: Hoare triple {4841#true} [1186] L17-3-->L17-4: Formula: (and (= (select |v_#valid_3| 2) 1) (= 38 (select |v_#length_2| 2)))  InVars {#length=|v_#length_2|, #valid=|v_#valid_3|}  OutVars{#length=|v_#length_2|, #valid=|v_#valid_3|}  AuxVars[]  AssignedVars[] {4841#true} is VALID
[2022-02-20 20:28:16,067 INFO  L290        TraceCheckUtils]: 8: Hoare triple {4841#true} [1117] L17-4-->L710: Formula: (= v_~__unbuffered_cnt~0_5 0)  InVars {}  OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_5}  AuxVars[]  AssignedVars[~__unbuffered_cnt~0] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,067 INFO  L290        TraceCheckUtils]: 9: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1172] L710-->L712: Formula: (= v_~__unbuffered_p0_EAX~0_2 0)  InVars {}  OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_2}  AuxVars[]  AssignedVars[~__unbuffered_p0_EAX~0] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,068 INFO  L290        TraceCheckUtils]: 10: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1167] L712-->L713: Formula: (= v_~__unbuffered_p1_EAX~0_2 0)  InVars {}  OutVars{~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_2}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX~0] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,068 INFO  L290        TraceCheckUtils]: 11: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1192] L713-->L714: Formula: (= v_~__unbuffered_p1_EAX$flush_delayed~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$flush_delayed~0=v_~__unbuffered_p1_EAX$flush_delayed~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$flush_delayed~0] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,068 INFO  L290        TraceCheckUtils]: 12: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1115] L714-->L715: Formula: (= v_~__unbuffered_p1_EAX$mem_tmp~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$mem_tmp~0=v_~__unbuffered_p1_EAX$mem_tmp~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$mem_tmp~0] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,069 INFO  L290        TraceCheckUtils]: 13: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1121] L715-->L716: Formula: (= v_~__unbuffered_p1_EAX$r_buff0_thd0~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$r_buff0_thd0~0=v_~__unbuffered_p1_EAX$r_buff0_thd0~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$r_buff0_thd0~0] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,069 INFO  L290        TraceCheckUtils]: 14: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1148] L716-->L717: Formula: (= v_~__unbuffered_p1_EAX$r_buff0_thd1~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$r_buff0_thd1~0=v_~__unbuffered_p1_EAX$r_buff0_thd1~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$r_buff0_thd1~0] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,070 INFO  L290        TraceCheckUtils]: 15: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1128] L717-->L718: Formula: (= v_~__unbuffered_p1_EAX$r_buff0_thd2~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$r_buff0_thd2~0=v_~__unbuffered_p1_EAX$r_buff0_thd2~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$r_buff0_thd2~0] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,070 INFO  L290        TraceCheckUtils]: 16: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1184] L718-->L719: Formula: (= v_~__unbuffered_p1_EAX$r_buff1_thd0~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$r_buff1_thd0~0=v_~__unbuffered_p1_EAX$r_buff1_thd0~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$r_buff1_thd0~0] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,070 INFO  L290        TraceCheckUtils]: 17: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1174] L719-->L720: Formula: (= v_~__unbuffered_p1_EAX$r_buff1_thd1~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$r_buff1_thd1~0=v_~__unbuffered_p1_EAX$r_buff1_thd1~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$r_buff1_thd1~0] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,071 INFO  L290        TraceCheckUtils]: 18: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1133] L720-->L721: Formula: (= v_~__unbuffered_p1_EAX$r_buff1_thd2~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$r_buff1_thd2~0=v_~__unbuffered_p1_EAX$r_buff1_thd2~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$r_buff1_thd2~0] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,071 INFO  L290        TraceCheckUtils]: 19: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1180] L721-->L722: Formula: (= v_~__unbuffered_p1_EAX$read_delayed~0_2 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$read_delayed~0=v_~__unbuffered_p1_EAX$read_delayed~0_2}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$read_delayed~0] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,072 INFO  L290        TraceCheckUtils]: 20: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1166] L722-->L723: Formula: (and (= v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_2 0) (= v_~__unbuffered_p1_EAX$read_delayed_var~0.base_2 0))  InVars {}  OutVars{~__unbuffered_p1_EAX$read_delayed_var~0.base=v_~__unbuffered_p1_EAX$read_delayed_var~0.base_2, ~__unbuffered_p1_EAX$read_delayed_var~0.offset=v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_2}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$read_delayed_var~0.base, ~__unbuffered_p1_EAX$read_delayed_var~0.offset] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,072 INFO  L290        TraceCheckUtils]: 21: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1219] L723-->L724: Formula: (= v_~__unbuffered_p1_EAX$w_buff0~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$w_buff0~0=v_~__unbuffered_p1_EAX$w_buff0~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$w_buff0~0] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,072 INFO  L290        TraceCheckUtils]: 22: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1129] L724-->L725: Formula: (= v_~__unbuffered_p1_EAX$w_buff0_used~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$w_buff0_used~0=v_~__unbuffered_p1_EAX$w_buff0_used~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$w_buff0_used~0] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,073 INFO  L290        TraceCheckUtils]: 23: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1116] L725-->L726: Formula: (= v_~__unbuffered_p1_EAX$w_buff1~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$w_buff1~0=v_~__unbuffered_p1_EAX$w_buff1~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$w_buff1~0] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,073 INFO  L290        TraceCheckUtils]: 24: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1183] L726-->L727: Formula: (= v_~__unbuffered_p1_EAX$w_buff1_used~0_1 0)  InVars {}  OutVars{~__unbuffered_p1_EAX$w_buff1_used~0=v_~__unbuffered_p1_EAX$w_buff1_used~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p1_EAX$w_buff1_used~0] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,073 INFO  L290        TraceCheckUtils]: 25: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1123] L727-->L728: Formula: (= v_~main$tmp_guard0~0_1 0)  InVars {}  OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_1}  AuxVars[]  AssignedVars[~main$tmp_guard0~0] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,074 INFO  L290        TraceCheckUtils]: 26: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1168] L728-->L730: Formula: (= v_~main$tmp_guard1~0_1 0)  InVars {}  OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_1}  AuxVars[]  AssignedVars[~main$tmp_guard1~0] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,074 INFO  L290        TraceCheckUtils]: 27: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1159] L730-->L730-1: Formula: (and (= 3 |v_~#x~0.base_14|) (= |v_~#x~0.offset_14| 0))  InVars {}  OutVars{~#x~0.base=|v_~#x~0.base_14|, ~#x~0.offset=|v_~#x~0.offset_14|}  AuxVars[]  AssignedVars[~#x~0.offset, ~#x~0.base] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,075 INFO  L290        TraceCheckUtils]: 28: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1200] L730-1-->L730-2: Formula: (and (= (select |v_#valid_4| 3) 1) (= 4 (select |v_#length_3| 3)))  InVars {#length=|v_#length_3|, #valid=|v_#valid_4|}  OutVars{#length=|v_#length_3|, #valid=|v_#valid_4|}  AuxVars[]  AssignedVars[] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,075 INFO  L290        TraceCheckUtils]: 29: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1155] L730-2-->L730-3: Formula: (= (select (select |v_#memory_int_19| |v_~#x~0.base_15|) |v_~#x~0.offset_15|) 0)  InVars {~#x~0.base=|v_~#x~0.base_15|, #memory_int=|v_#memory_int_19|, ~#x~0.offset=|v_~#x~0.offset_15|}  OutVars{~#x~0.base=|v_~#x~0.base_15|, #memory_int=|v_#memory_int_19|, ~#x~0.offset=|v_~#x~0.offset_15|}  AuxVars[]  AssignedVars[] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,075 INFO  L290        TraceCheckUtils]: 30: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1131] L730-3-->L732: Formula: (= 0 v_~x$flush_delayed~0_5)  InVars {}  OutVars{~x$flush_delayed~0=v_~x$flush_delayed~0_5}  AuxVars[]  AssignedVars[~x$flush_delayed~0] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,081 INFO  L290        TraceCheckUtils]: 31: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1132] L732-->L733: Formula: (= v_~x$mem_tmp~0_3 0)  InVars {}  OutVars{~x$mem_tmp~0=v_~x$mem_tmp~0_3}  AuxVars[]  AssignedVars[~x$mem_tmp~0] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,081 INFO  L290        TraceCheckUtils]: 32: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1190] L733-->L734: Formula: (= v_~x$r_buff0_thd0~0_2 0)  InVars {}  OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_2}  AuxVars[]  AssignedVars[~x$r_buff0_thd0~0] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,081 INFO  L290        TraceCheckUtils]: 33: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1191] L734-->L735: Formula: (= v_~x$r_buff0_thd1~0_15 0)  InVars {}  OutVars{~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_15}  AuxVars[]  AssignedVars[~x$r_buff0_thd1~0] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,082 INFO  L290        TraceCheckUtils]: 34: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1211] L735-->L736: Formula: (= v_~x$r_buff0_thd2~0_60 0)  InVars {}  OutVars{~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_60}  AuxVars[]  AssignedVars[~x$r_buff0_thd2~0] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,082 INFO  L290        TraceCheckUtils]: 35: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1139] L736-->L737: Formula: (= v_~x$r_buff1_thd0~0_2 0)  InVars {}  OutVars{~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_2}  AuxVars[]  AssignedVars[~x$r_buff1_thd0~0] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,083 INFO  L290        TraceCheckUtils]: 36: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1130] L737-->L738: Formula: (= v_~x$r_buff1_thd1~0_10 0)  InVars {}  OutVars{~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_10}  AuxVars[]  AssignedVars[~x$r_buff1_thd1~0] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,083 INFO  L290        TraceCheckUtils]: 37: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1160] L738-->L739: Formula: (= v_~x$r_buff1_thd2~0_42 0)  InVars {}  OutVars{~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_42}  AuxVars[]  AssignedVars[~x$r_buff1_thd2~0] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,083 INFO  L290        TraceCheckUtils]: 38: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1111] L739-->L740: Formula: (= v_~x$read_delayed~0_1 0)  InVars {}  OutVars{~x$read_delayed~0=v_~x$read_delayed~0_1}  AuxVars[]  AssignedVars[~x$read_delayed~0] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,084 INFO  L290        TraceCheckUtils]: 39: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1149] L740-->L741: Formula: (and (= v_~x$read_delayed_var~0.base_1 0) (= v_~x$read_delayed_var~0.offset_1 0))  InVars {}  OutVars{~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_1, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_1}  AuxVars[]  AssignedVars[~x$read_delayed_var~0.offset, ~x$read_delayed_var~0.base] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,084 INFO  L290        TraceCheckUtils]: 40: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1207] L741-->L742: Formula: (= 0 v_~x$w_buff0~0_16)  InVars {}  OutVars{~x$w_buff0~0=v_~x$w_buff0~0_16}  AuxVars[]  AssignedVars[~x$w_buff0~0] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,084 INFO  L290        TraceCheckUtils]: 41: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1140] L742-->L743: Formula: (= v_~x$w_buff0_used~0_87 0)  InVars {}  OutVars{~x$w_buff0_used~0=v_~x$w_buff0_used~0_87}  AuxVars[]  AssignedVars[~x$w_buff0_used~0] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,085 INFO  L290        TraceCheckUtils]: 42: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1163] L743-->L744: Formula: (= 0 v_~x$w_buff1~0_13)  InVars {}  OutVars{~x$w_buff1~0=v_~x$w_buff1~0_13}  AuxVars[]  AssignedVars[~x$w_buff1~0] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,085 INFO  L290        TraceCheckUtils]: 43: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1141] L744-->L746: Formula: (= v_~x$w_buff1_used~0_50 0)  InVars {}  OutVars{~x$w_buff1_used~0=v_~x$w_buff1_used~0_50}  AuxVars[]  AssignedVars[~x$w_buff1_used~0] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,086 INFO  L290        TraceCheckUtils]: 44: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1182] L746-->L747: Formula: (= v_~y~0_3 0)  InVars {}  OutVars{~y~0=v_~y~0_3}  AuxVars[]  AssignedVars[~y~0] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,086 INFO  L290        TraceCheckUtils]: 45: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1119] L747-->L748: Formula: (= v_~weak$$choice0~0_14 0)  InVars {}  OutVars{~weak$$choice0~0=v_~weak$$choice0~0_14}  AuxVars[]  AssignedVars[~weak$$choice0~0] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,086 INFO  L290        TraceCheckUtils]: 46: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1142] L748-->L749: Formula: (= v_~weak$$choice1~0_5 0)  InVars {}  OutVars{~weak$$choice1~0=v_~weak$$choice1~0_5}  AuxVars[]  AssignedVars[~weak$$choice1~0] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,087 INFO  L290        TraceCheckUtils]: 47: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1113] L749-->L-1-3: Formula: (= v_~weak$$choice2~0_15 0)  InVars {}  OutVars{~weak$$choice2~0=v_~weak$$choice2~0_15}  AuxVars[]  AssignedVars[~weak$$choice2~0] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,087 INFO  L290        TraceCheckUtils]: 48: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1218] L-1-3-->L-1-4: Formula: true  InVars {}  OutVars{}  AuxVars[]  AssignedVars[] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,087 INFO  L290        TraceCheckUtils]: 49: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1147] L-1-4-->L-1-5: Formula: true  InVars {}  OutVars{}  AuxVars[]  AssignedVars[] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,088 INFO  L290        TraceCheckUtils]: 50: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1125] L-1-5-->L-1-6: Formula: true  InVars {}  OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_1|}  AuxVars[]  AssignedVars[ULTIMATE.start_main_#res#1] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,088 INFO  L290        TraceCheckUtils]: 51: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1196] L-1-6-->L825: Formula: true  InVars {}  OutVars{ULTIMATE.start_main_#t~nondet77#1=|v_ULTIMATE.start_main_#t~nondet77#1_1|, ULTIMATE.start_main_#t~ite74#1=|v_ULTIMATE.start_main_#t~ite74#1_1|, ULTIMATE.start_main_#t~mem70#1=|v_ULTIMATE.start_main_#t~mem70#1_1|, ULTIMATE.start_main_#t~ite72#1=|v_ULTIMATE.start_main_#t~ite72#1_1|, ULTIMATE.start_main_~#t1923~0#1.base=|v_ULTIMATE.start_main_~#t1923~0#1.base_1|, ULTIMATE.start_main_#t~ite76#1=|v_ULTIMATE.start_main_#t~ite76#1_1|, ULTIMATE.start_main_#t~ite80#1=|v_ULTIMATE.start_main_#t~ite80#1_1|, ULTIMATE.start_main_#t~pre68#1=|v_ULTIMATE.start_main_#t~pre68#1_1|, ULTIMATE.start_main_#t~ite71#1=|v_ULTIMATE.start_main_#t~ite71#1_1|, ULTIMATE.start_main_#t~pre66#1=|v_ULTIMATE.start_main_#t~pre66#1_1|, ULTIMATE.start_main_#t~ite73#1=|v_ULTIMATE.start_main_#t~ite73#1_1|, ULTIMATE.start_main_#t~ite75#1=|v_ULTIMATE.start_main_#t~ite75#1_1|, ULTIMATE.start_main_~#t1924~0#1.offset=|v_ULTIMATE.start_main_~#t1924~0#1.offset_1|, ULTIMATE.start_main_~#t1923~0#1.offset=|v_ULTIMATE.start_main_~#t1923~0#1.offset_1|, ULTIMATE.start_main_#t~nondet69#1=|v_ULTIMATE.start_main_#t~nondet69#1_1|, ULTIMATE.start_main_#t~ite79#1=|v_ULTIMATE.start_main_#t~ite79#1_1|, ULTIMATE.start_main_~#t1924~0#1.base=|v_ULTIMATE.start_main_~#t1924~0#1.base_1|, ULTIMATE.start_main_#t~nondet67#1=|v_ULTIMATE.start_main_#t~nondet67#1_1|, ULTIMATE.start_main_#t~mem78#1=|v_ULTIMATE.start_main_#t~mem78#1_1|}  AuxVars[]  AssignedVars[ULTIMATE.start_main_#t~nondet77#1, ULTIMATE.start_main_#t~ite74#1, ULTIMATE.start_main_#t~mem70#1, ULTIMATE.start_main_#t~ite72#1, ULTIMATE.start_main_~#t1923~0#1.base, ULTIMATE.start_main_#t~ite76#1, ULTIMATE.start_main_#t~ite80#1, ULTIMATE.start_main_#t~pre68#1, ULTIMATE.start_main_#t~ite71#1, ULTIMATE.start_main_#t~pre66#1, ULTIMATE.start_main_#t~ite73#1, ULTIMATE.start_main_#t~ite75#1, ULTIMATE.start_main_~#t1924~0#1.offset, ULTIMATE.start_main_~#t1923~0#1.offset, ULTIMATE.start_main_#t~nondet69#1, ULTIMATE.start_main_#t~ite79#1, ULTIMATE.start_main_~#t1924~0#1.base, ULTIMATE.start_main_#t~nondet67#1, ULTIMATE.start_main_#t~mem78#1] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,089 INFO  L290        TraceCheckUtils]: 52: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1209] L825-->L825-1: Formula: (and (= |v_ULTIMATE.start_main_~#t1923~0#1.offset_2| 0) (= (store |v_#length_5| |v_ULTIMATE.start_main_~#t1923~0#1.base_2| 4) |v_#length_4|) (not (= |v_ULTIMATE.start_main_~#t1923~0#1.base_2| 0)) (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t1923~0#1.base_2|) (= |v_#valid_5| (store |v_#valid_6| |v_ULTIMATE.start_main_~#t1923~0#1.base_2| 1)) (= (select |v_#valid_6| |v_ULTIMATE.start_main_~#t1923~0#1.base_2|) 0))  InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_5|, #valid=|v_#valid_6|}  OutVars{ULTIMATE.start_main_~#t1923~0#1.base=|v_ULTIMATE.start_main_~#t1923~0#1.base_2|, ULTIMATE.start_main_~#t1923~0#1.offset=|v_ULTIMATE.start_main_~#t1923~0#1.offset_2|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_5|}  AuxVars[]  AssignedVars[#valid, ULTIMATE.start_main_~#t1923~0#1.base, ULTIMATE.start_main_~#t1923~0#1.offset, #length] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,089 INFO  L290        TraceCheckUtils]: 53: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1124] L825-1-->L826: Formula: (= |v_ULTIMATE.start_main_#t~pre66#1_2| |v_#pthreadsForks_1|)  InVars {#pthreadsForks=|v_#pthreadsForks_1|}  OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre66#1=|v_ULTIMATE.start_main_#t~pre66#1_2|}  AuxVars[]  AssignedVars[ULTIMATE.start_main_#t~pre66#1] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,089 INFO  L290        TraceCheckUtils]: 54: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1152] L826-->L826-1: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|)  InVars {#pthreadsForks=|v_#pthreadsForks_3|}  OutVars{#pthreadsForks=|v_#pthreadsForks_2|}  AuxVars[]  AssignedVars[#pthreadsForks] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,090 INFO  L290        TraceCheckUtils]: 55: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1153] L826-1-->L826-2: Formula: (= (store |v_#memory_int_21| |v_ULTIMATE.start_main_~#t1923~0#1.base_3| (store (select |v_#memory_int_21| |v_ULTIMATE.start_main_~#t1923~0#1.base_3|) |v_ULTIMATE.start_main_~#t1923~0#1.offset_3| |v_ULTIMATE.start_main_#t~pre66#1_3|)) |v_#memory_int_20|)  InVars {#memory_int=|v_#memory_int_21|, ULTIMATE.start_main_~#t1923~0#1.base=|v_ULTIMATE.start_main_~#t1923~0#1.base_3|, ULTIMATE.start_main_~#t1923~0#1.offset=|v_ULTIMATE.start_main_~#t1923~0#1.offset_3|, ULTIMATE.start_main_#t~pre66#1=|v_ULTIMATE.start_main_#t~pre66#1_3|}  OutVars{#memory_int=|v_#memory_int_20|, ULTIMATE.start_main_~#t1923~0#1.base=|v_ULTIMATE.start_main_~#t1923~0#1.base_3|, ULTIMATE.start_main_~#t1923~0#1.offset=|v_ULTIMATE.start_main_~#t1923~0#1.offset_3|, ULTIMATE.start_main_#t~pre66#1=|v_ULTIMATE.start_main_#t~pre66#1_3|}  AuxVars[]  AssignedVars[#memory_int] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,091 INFO  L290        TraceCheckUtils]: 56: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1239] L826-2-->P0ENTRY: Formula: (and (= v_P0Thread1of1ForFork1_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre66#1_6| v_P0Thread1of1ForFork1_thidvar0_2) (= |v_P0Thread1of1ForFork1_#in~arg#1.base_4| 0) (= |v_P0Thread1of1ForFork1_#in~arg#1.offset_4| 0))  InVars {ULTIMATE.start_main_#t~pre66#1=|v_ULTIMATE.start_main_#t~pre66#1_6|}  OutVars{P0Thread1of1ForFork1_#res#1.offset=|v_P0Thread1of1ForFork1_#res#1.offset_4|, P0Thread1of1ForFork1_#t~ite9#1=|v_P0Thread1of1ForFork1_#t~ite9#1_4|, P0Thread1of1ForFork1_#in~arg#1.base=|v_P0Thread1of1ForFork1_#in~arg#1.base_4|, P0Thread1of1ForFork1_thidvar0=v_P0Thread1of1ForFork1_thidvar0_2, P0Thread1of1ForFork1_#t~ite6#1=|v_P0Thread1of1ForFork1_#t~ite6#1_4|, P0Thread1of1ForFork1_thidvar1=v_P0Thread1of1ForFork1_thidvar1_2, P0Thread1of1ForFork1_#in~arg#1.offset=|v_P0Thread1of1ForFork1_#in~arg#1.offset_4|, P0Thread1of1ForFork1_#t~mem3#1=|v_P0Thread1of1ForFork1_#t~mem3#1_6|, P0Thread1of1ForFork1_~arg#1.base=|v_P0Thread1of1ForFork1_~arg#1.base_4|, P0Thread1of1ForFork1_#t~ite4#1=|v_P0Thread1of1ForFork1_#t~ite4#1_6|, P0Thread1of1ForFork1_~arg#1.offset=|v_P0Thread1of1ForFork1_~arg#1.offset_4|, P0Thread1of1ForFork1_#t~ite8#1=|v_P0Thread1of1ForFork1_#t~ite8#1_4|, ULTIMATE.start_main_#t~pre66#1=|v_ULTIMATE.start_main_#t~pre66#1_6|, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression#1=|v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression#1_6|, P0Thread1of1ForFork1_#res#1.base=|v_P0Thread1of1ForFork1_#res#1.base_4|, P0Thread1of1ForFork1_#t~ite7#1=|v_P0Thread1of1ForFork1_#t~ite7#1_4|, P0Thread1of1ForFork1___VERIFIER_assert_~expression#1=|v_P0Thread1of1ForFork1___VERIFIER_assert_~expression#1_6|, P0Thread1of1ForFork1_#t~ite5#1=|v_P0Thread1of1ForFork1_#t~ite5#1_4|}  AuxVars[]  AssignedVars[P0Thread1of1ForFork1_#res#1.offset, P0Thread1of1ForFork1_#t~ite9#1, P0Thread1of1ForFork1_#in~arg#1.base, P0Thread1of1ForFork1_thidvar0, P0Thread1of1ForFork1_#t~ite6#1, P0Thread1of1ForFork1_thidvar1, P0Thread1of1ForFork1_#in~arg#1.offset, P0Thread1of1ForFork1_#t~mem3#1, P0Thread1of1ForFork1_~arg#1.base, P0Thread1of1ForFork1_#t~ite4#1, P0Thread1of1ForFork1_~arg#1.offset, P0Thread1of1ForFork1_#t~ite8#1, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression#1, P0Thread1of1ForFork1_#res#1.base, P0Thread1of1ForFork1_#t~ite7#1, P0Thread1of1ForFork1___VERIFIER_assert_~expression#1, P0Thread1of1ForFork1_#t~ite5#1] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,092 INFO  L290        TraceCheckUtils]: 57: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1138] L826-3-->L826-4: Formula: true  InVars {}  OutVars{ULTIMATE.start_main_#t~pre66#1=|v_ULTIMATE.start_main_#t~pre66#1_4|}  AuxVars[]  AssignedVars[ULTIMATE.start_main_#t~pre66#1] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,092 INFO  L290        TraceCheckUtils]: 58: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1158] L826-4-->L827: Formula: true  InVars {}  OutVars{ULTIMATE.start_main_#t~nondet67#1=|v_ULTIMATE.start_main_#t~nondet67#1_2|}  AuxVars[]  AssignedVars[ULTIMATE.start_main_#t~nondet67#1] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,093 INFO  L290        TraceCheckUtils]: 59: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1220] L827-->L827-1: Formula: (and (= |v_#length_6| (store |v_#length_7| |v_ULTIMATE.start_main_~#t1924~0#1.base_2| 4)) (= |v_ULTIMATE.start_main_~#t1924~0#1.offset_2| 0) (= |v_#valid_7| (store |v_#valid_8| |v_ULTIMATE.start_main_~#t1924~0#1.base_2| 1)) (< |v_#StackHeapBarrier_3| |v_ULTIMATE.start_main_~#t1924~0#1.base_2|) (not (= |v_ULTIMATE.start_main_~#t1924~0#1.base_2| 0)) (= (select |v_#valid_8| |v_ULTIMATE.start_main_~#t1924~0#1.base_2|) 0))  InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_7|, #valid=|v_#valid_8|}  OutVars{ULTIMATE.start_main_~#t1924~0#1.offset=|v_ULTIMATE.start_main_~#t1924~0#1.offset_2|, #StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_6|, ULTIMATE.start_main_~#t1924~0#1.base=|v_ULTIMATE.start_main_~#t1924~0#1.base_2|, #valid=|v_#valid_7|}  AuxVars[]  AssignedVars[#valid, ULTIMATE.start_main_~#t1924~0#1.offset, #length, ULTIMATE.start_main_~#t1924~0#1.base] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,094 INFO  L290        TraceCheckUtils]: 60: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1206] L827-1-->L828: Formula: (= |v_ULTIMATE.start_main_#t~pre68#1_2| |v_#pthreadsForks_4|)  InVars {#pthreadsForks=|v_#pthreadsForks_4|}  OutVars{#pthreadsForks=|v_#pthreadsForks_4|, ULTIMATE.start_main_#t~pre68#1=|v_ULTIMATE.start_main_#t~pre68#1_2|}  AuxVars[]  AssignedVars[ULTIMATE.start_main_#t~pre68#1] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,095 INFO  L290        TraceCheckUtils]: 61: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1208] L828-->L828-1: Formula: (= (+ 1 |v_#pthreadsForks_6|) |v_#pthreadsForks_5|)  InVars {#pthreadsForks=|v_#pthreadsForks_6|}  OutVars{#pthreadsForks=|v_#pthreadsForks_5|}  AuxVars[]  AssignedVars[#pthreadsForks] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,095 INFO  L290        TraceCheckUtils]: 62: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1143] L828-1-->L828-2: Formula: (= (store |v_#memory_int_23| |v_ULTIMATE.start_main_~#t1924~0#1.base_3| (store (select |v_#memory_int_23| |v_ULTIMATE.start_main_~#t1924~0#1.base_3|) |v_ULTIMATE.start_main_~#t1924~0#1.offset_3| |v_ULTIMATE.start_main_#t~pre68#1_3|)) |v_#memory_int_22|)  InVars {#memory_int=|v_#memory_int_23|, ULTIMATE.start_main_~#t1924~0#1.offset=|v_ULTIMATE.start_main_~#t1924~0#1.offset_3|, ULTIMATE.start_main_#t~pre68#1=|v_ULTIMATE.start_main_#t~pre68#1_3|, ULTIMATE.start_main_~#t1924~0#1.base=|v_ULTIMATE.start_main_~#t1924~0#1.base_3|}  OutVars{#memory_int=|v_#memory_int_22|, ULTIMATE.start_main_~#t1924~0#1.offset=|v_ULTIMATE.start_main_~#t1924~0#1.offset_3|, ULTIMATE.start_main_#t~pre68#1=|v_ULTIMATE.start_main_#t~pre68#1_3|, ULTIMATE.start_main_~#t1924~0#1.base=|v_ULTIMATE.start_main_~#t1924~0#1.base_3|}  AuxVars[]  AssignedVars[#memory_int] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,097 INFO  L290        TraceCheckUtils]: 63: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1237] L828-2-->P1ENTRY: Formula: (and (= v_P1Thread1of1ForFork0_thidvar2_2 0) (= |v_ULTIMATE.start_main_#t~pre68#1_6| v_P1Thread1of1ForFork0_thidvar0_2) (= |v_P1Thread1of1ForFork0_#in~arg.offset_4| 0) (= |v_P1Thread1of1ForFork0_#in~arg.base_4| 0) (= v_P1Thread1of1ForFork0_thidvar1_2 0))  InVars {ULTIMATE.start_main_#t~pre68#1=|v_ULTIMATE.start_main_#t~pre68#1_6|}  OutVars{P1Thread1of1ForFork0_#t~ite47=|v_P1Thread1of1ForFork0_#t~ite47_6|, P1Thread1of1ForFork0_#t~ite24=|v_P1Thread1of1ForFork0_#t~ite24_4|, P1Thread1of1ForFork0_#t~ite22=|v_P1Thread1of1ForFork0_#t~ite22_6|, P1Thread1of1ForFork0_#t~ite45=|v_P1Thread1of1ForFork0_#t~ite45_6|, P1Thread1of1ForFork0_#t~ite28=|v_P1Thread1of1ForFork0_#t~ite28_6|, P1Thread1of1ForFork0_#t~ite26=|v_P1Thread1of1ForFork0_#t~ite26_6|, P1Thread1of1ForFork0_#t~ite49=|v_P1Thread1of1ForFork0_#t~ite49_4|, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_4|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_4|, P1Thread1of1ForFork0_#t~ite43=|v_P1Thread1of1ForFork0_#t~ite43_6|, P1Thread1of1ForFork0_#t~ite20=|v_P1Thread1of1ForFork0_#t~ite20_6|, P1Thread1of1ForFork0_#t~ite60=|v_P1Thread1of1ForFork0_#t~ite60_6|, P1Thread1of1ForFork0_#t~ite41=|v_P1Thread1of1ForFork0_#t~ite41_6|, P1Thread1of1ForFork0_#t~nondet10=|v_P1Thread1of1ForFork0_#t~nondet10_6|, P1Thread1of1ForFork0_#t~mem56=|v_P1Thread1of1ForFork0_#t~mem56_4|, P1Thread1of1ForFork0_#t~mem14=|v_P1Thread1of1ForFork0_#t~mem14_6|, P1Thread1of1ForFork0_#t~mem12=|v_P1Thread1of1ForFork0_#t~mem12_4|, P1Thread1of1ForFork0_#t~ite36=|v_P1Thread1of1ForFork0_#t~ite36_6|, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_4|, P1Thread1of1ForFork0_#t~ite34=|v_P1Thread1of1ForFork0_#t~ite34_4|, P1Thread1of1ForFork0_#t~ite55=|v_P1Thread1of1ForFork0_#t~ite55_4|, P1Thread1of1ForFork0_#t~ite38=|v_P1Thread1of1ForFork0_#t~ite38_6|, P1Thread1of1ForFork0_#t~ite17=|v_P1Thread1of1ForFork0_#t~ite17_6|, P1Thread1of1ForFork0_#t~ite53=|v_P1Thread1of1ForFork0_#t~ite53_6|, P1Thread1of1ForFork0_#t~ite32=|v_P1Thread1of1ForFork0_#t~ite32_6|, P1Thread1of1ForFork0_#t~ite30=|v_P1Thread1of1ForFork0_#t~ite30_6|, P1Thread1of1ForFork0_#t~ite51=|v_P1Thread1of1ForFork0_#t~ite51_6|, P1Thread1of1ForFork0_thidvar2=v_P1Thread1of1ForFork0_thidvar2_2, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_4|, P1Thread1of1ForFork0_#t~ite46=|v_P1Thread1of1ForFork0_#t~ite46_6|, P1Thread1of1ForFork0_#t~ite25=|v_P1Thread1of1ForFork0_#t~ite25_6|, P1Thread1of1ForFork0_#t~ite23=|v_P1Thread1of1ForFork0_#t~ite23_6|, P1Thread1of1ForFork0_#t~ite44=|v_P1Thread1of1ForFork0_#t~ite44_4|, P1Thread1of1ForFork0_#t~ite29=|v_P1Thread1of1ForFork0_#t~ite29_4|, P1Thread1of1ForFork0_#t~ite27=|v_P1Thread1of1ForFork0_#t~ite27_6|, P1Thread1of1ForFork0_#t~ite48=|v_P1Thread1of1ForFork0_#t~ite48_6|, P1Thread1of1ForFork0_#t~nondet13=|v_P1Thread1of1ForFork0_#t~nondet13_6|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_4|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_4|, ULTIMATE.start_main_#t~pre68#1=|v_ULTIMATE.start_main_#t~pre68#1_6|, P1Thread1of1ForFork0_thidvar1=v_P1Thread1of1ForFork0_thidvar1_2, P1Thread1of1ForFork0_#t~ite42=|v_P1Thread1of1ForFork0_#t~ite42_6|, P1Thread1of1ForFork0_#t~ite21=|v_P1Thread1of1ForFork0_#t~ite21_6|, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_4|, P1Thread1of1ForFork0_#t~ite61=|v_P1Thread1of1ForFork0_#t~ite61_4|, P1Thread1of1ForFork0_#t~ite40=|v_P1Thread1of1ForFork0_#t~ite40_6|, P1Thread1of1ForFork0_#t~nondet11=|v_P1Thread1of1ForFork0_#t~nondet11_6|, P1Thread1of1ForFork0_#t~mem57=|v_P1Thread1of1ForFork0_#t~mem57_6|, P1Thread1of1ForFork0_#t~mem59=|v_P1Thread1of1ForFork0_#t~mem59_6|, P1Thread1of1ForFork0_~arg.base=v_P1Thread1of1ForFork0_~arg.base_4, P1Thread1of1ForFork0_#t~mem15=|v_P1Thread1of1ForFork0_#t~mem15_6|, P1Thread1of1ForFork0_#t~ite58=|v_P1Thread1of1ForFork0_#t~ite58_4|, P1Thread1of1ForFork0_#t~ite35=|v_P1Thread1of1ForFork0_#t~ite35_6|, P1Thread1of1ForFork0_#t~ite33=|v_P1Thread1of1ForFork0_#t~ite33_6|, P1Thread1of1ForFork0_#t~ite16=|v_P1Thread1of1ForFork0_#t~ite16_6|, P1Thread1of1ForFork0_#t~ite39=|v_P1Thread1of1ForFork0_#t~ite39_4|, P1Thread1of1ForFork0_#t~ite37=|v_P1Thread1of1ForFork0_#t~ite37_6|, P1Thread1of1ForFork0_#t~ite18=|v_P1Thread1of1ForFork0_#t~ite18_6|, P1Thread1of1ForFork0_#t~ite50=|v_P1Thread1of1ForFork0_#t~ite50_6|, P1Thread1of1ForFork0_~arg.offset=v_P1Thread1of1ForFork0_~arg.offset_4, P1Thread1of1ForFork0_#t~ite54=|v_P1Thread1of1ForFork0_#t~ite54_6|, P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_6|, P1Thread1of1ForFork0_thidvar0=v_P1Thread1of1ForFork0_thidvar0_2, P1Thread1of1ForFork0_#t~ite52=|v_P1Thread1of1ForFork0_#t~ite52_6|, P1Thread1of1ForFork0_#t~mem19=|v_P1Thread1of1ForFork0_#t~mem19_6|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_4|}  AuxVars[]  AssignedVars[P1Thread1of1ForFork0_#t~ite47, P1Thread1of1ForFork0_#t~ite24, P1Thread1of1ForFork0_#t~ite22, P1Thread1of1ForFork0_#t~ite45, P1Thread1of1ForFork0_#t~ite28, P1Thread1of1ForFork0_#t~ite26, P1Thread1of1ForFork0_#t~ite49, P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite43, P1Thread1of1ForFork0_#t~ite20, P1Thread1of1ForFork0_#t~ite60, P1Thread1of1ForFork0_#t~ite41, P1Thread1of1ForFork0_#t~nondet10, P1Thread1of1ForFork0_#t~mem56, P1Thread1of1ForFork0_#t~mem14, P1Thread1of1ForFork0_#t~mem12, P1Thread1of1ForFork0_#t~ite36, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#t~ite34, P1Thread1of1ForFork0_#t~ite55, P1Thread1of1ForFork0_#t~ite38, P1Thread1of1ForFork0_#t~ite17, P1Thread1of1ForFork0_#t~ite53, P1Thread1of1ForFork0_#t~ite32, P1Thread1of1ForFork0_#t~ite30, P1Thread1of1ForFork0_#t~ite51, P1Thread1of1ForFork0_thidvar2, P1Thread1of1ForFork0_#in~arg.offset, P1Thread1of1ForFork0_#t~ite46, P1Thread1of1ForFork0_#t~ite25, P1Thread1of1ForFork0_#t~ite23, P1Thread1of1ForFork0_#t~ite44, P1Thread1of1ForFork0_#t~ite29, P1Thread1of1ForFork0_#t~ite27, P1Thread1of1ForFork0_#t~ite48, P1Thread1of1ForFork0_#t~nondet13, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite65, P1Thread1of1ForFork0_thidvar1, P1Thread1of1ForFork0_#t~ite42, P1Thread1of1ForFork0_#t~ite21, P1Thread1of1ForFork0_#in~arg.base, P1Thread1of1ForFork0_#t~ite61, P1Thread1of1ForFork0_#t~ite40, P1Thread1of1ForFork0_#t~nondet11, P1Thread1of1ForFork0_#t~mem57, P1Thread1of1ForFork0_#t~mem59, P1Thread1of1ForFork0_~arg.base, P1Thread1of1ForFork0_#t~mem15, P1Thread1of1ForFork0_#t~ite58, P1Thread1of1ForFork0_#t~ite35, P1Thread1of1ForFork0_#t~ite33, P1Thread1of1ForFork0_#t~ite16, P1Thread1of1ForFork0_#t~ite39, P1Thread1of1ForFork0_#t~ite37, P1Thread1of1ForFork0_#t~ite18, P1Thread1of1ForFork0_#t~ite50, P1Thread1of1ForFork0_~arg.offset, P1Thread1of1ForFork0_#t~ite54, P1Thread1of1ForFork0_#t~ite31, P1Thread1of1ForFork0_thidvar0, P1Thread1of1ForFork0_#t~ite52, P1Thread1of1ForFork0_#t~mem19, P1Thread1of1ForFork0_#res.base] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,099 INFO  L290        TraceCheckUtils]: 64: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1229] P1ENTRY-->L780: Formula: (and (= v_P1Thread1of1ForFork0_~arg.offset_1 |v_P1Thread1of1ForFork0_#in~arg.offset_1|) (= v_P1Thread1of1ForFork0_~arg.base_1 |v_P1Thread1of1ForFork0_#in~arg.base_1|))  InVars {P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_1|, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_1|}  OutVars{P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_1|, P1Thread1of1ForFork0_~arg.offset=v_P1Thread1of1ForFork0_~arg.offset_1, P1Thread1of1ForFork0_~arg.base=v_P1Thread1of1ForFork0_~arg.base_1, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_1|}  AuxVars[]  AssignedVars[P1Thread1of1ForFork0_~arg.offset, P1Thread1of1ForFork0_~arg.base] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,100 INFO  L290        TraceCheckUtils]: 65: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1230] L780-->L798: Formula: (let ((.cse17 (mod v_~x$w_buff0_used~0_473 256)) (.cse9 (= (mod v_~x$r_buff0_thd2~0_330 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd2~0_294 256) 0))) (let ((.cse0 (= (mod v_~weak$$choice2~0_90 256) 0)) (.cse6 (not .cse12)) (.cse31 (= (mod v_~x$w_buff1_used~0_392 256) 0)) (.cse7 (not .cse9)) (.cse16 (= .cse17 0)) (.cse8 (= (mod v_~x$w_buff1_used~0_391 256) 0)) (.cse46 (= (mod v_~weak$$choice0~0_141 256) 0)) (.cse58 (select |v_#memory_int_260| |v_~#x~0.base_172|)) (.cse3 (= (mod v_~x$w_buff0_used~0_472 256) 0))) (let ((.cse13 (or .cse9 .cse3)) (.cse27 (= 0 (mod v_~weak$$choice1~0_79 256))) (.cse40 (select .cse58 |v_~#x~0.offset_172|)) (.cse26 (not .cse46)) (.cse10 (not .cse8)) (.cse5 (not .cse3)) (.cse20 (or .cse9 .cse16)) (.cse24 (or .cse12 .cse31 .cse16 .cse7)) (.cse25 (or .cse31 .cse6 .cse16 .cse7)) (.cse23 (not .cse31)) (.cse22 (not .cse16)) (.cse14 (not .cse0))) (and (= v_~x$flush_delayed~0_66 0) (= v_~__unbuffered_p1_EAX$read_delayed~0_41 1) (let ((.cse1 (= |v_P1_#t~ite45_87| |v_P1Thread1of1ForFork0_#t~ite45_1|)) (.cse2 (= |v_P1_#t~ite47_71| |v_P1Thread1of1ForFork0_#t~ite47_1|)) (.cse4 (= |v_P1_#t~ite46_81| |v_P1Thread1of1ForFork0_#t~ite46_1|))) (or (and .cse0 (= |v_P1_#t~ite48_63| v_~x$r_buff0_thd2~0_329) (or (and .cse1 .cse2 .cse3 .cse4 (= |v_P1_#t~ite48_63| v_~x$r_buff0_thd2~0_330)) (and .cse5 (or (and (or (and (= |v_P1_#t~ite46_81| |v_P1_#t~ite45_87|) (or .cse6 .cse3 .cse7 .cse8) (let ((.cse11 (= |v_P1_#t~ite45_87| 0))) (or (and .cse5 .cse6 .cse9 .cse10 .cse11) (and (or .cse12 .cse3 .cse7 .cse8) .cse11)))) (and .cse12 .cse5 .cse1 .cse9 (= |v_P1_#t~ite46_81| v_~x$r_buff0_thd2~0_330) .cse10)) (= |v_P1_#t~ite46_81| |v_P1_#t~ite47_71|) .cse13) (and .cse5 (= |v_P1_#t~ite47_71| 0) .cse1 .cse4 .cse7)) (= |v_P1_#t~ite47_71| |v_P1_#t~ite48_63|)))) (and .cse1 (= v_~x$r_buff0_thd2~0_330 v_~x$r_buff0_thd2~0_329) .cse14 .cse2 (= |v_P1_#t~ite48_63| |v_P1Thread1of1ForFork0_#t~ite48_1|) .cse4))) (let ((.cse15 (= |v_P1_#t~ite35_65| |v_P1Thread1of1ForFork0_#t~ite35_1|)) (.cse18 (= |v_P1_#t~ite36_59| |v_P1Thread1of1ForFork0_#t~ite36_1|)) (.cse19 (= |v_P1_#t~ite37_51| |v_P1Thread1of1ForFork0_#t~ite37_1|))) (or (and .cse0 (= |v_P1_#t~ite38_43| |v_P1_#t~ite39_41|) (or (and .cse15 .cse16 (= |v_P1_#t~ite38_43| .cse17) .cse18 .cse19) (and (= |v_P1_#t~ite37_51| |v_P1_#t~ite38_43|) (or (and (= |v_P1_#t~ite36_59| |v_P1_#t~ite37_51|) .cse20 (or (and (let ((.cse21 (= |v_P1_#t~ite35_65| v_~weak$$choice0~0_141))) (or (and .cse21 .cse6 .cse9 .cse22 .cse23) (and .cse21 .cse24))) (= |v_P1_#t~ite36_59| (mod |v_P1_#t~ite35_65| 256)) .cse25) (and (= |v_P1_#t~ite36_59| (ite (or .cse26 .cse27) 1 0)) .cse12 .cse15 .cse9 .cse22 .cse23))) (and .cse15 .cse22 (= |v_P1_#t~ite37_51| 0) .cse18 .cse7)) .cse22))) (and (= |v_P1_#t~ite39_41| .cse17) .cse15 .cse14 (= |v_P1_#t~ite38_43| |v_P1Thread1of1ForFork0_#t~ite38_1|) .cse18 .cse19))) (= v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_42 |v_~#x~0.offset_172|) (let ((.cse30 (= |v_P1_#t~ite42_61| |v_P1Thread1of1ForFork0_#t~ite42_1|)) (.cse28 (= |v_P1_#t~ite41_69| |v_P1Thread1of1ForFork0_#t~ite41_1|)) (.cse29 (= |v_P1_#t~ite40_75| |v_P1Thread1of1ForFork0_#t~ite40_1|))) (or (and .cse28 .cse29 .cse14 (= |v_P1_#t~ite43_53| |v_P1Thread1of1ForFork0_#t~ite43_1|) (= v_~x$w_buff1_used~0_392 v_~x$w_buff1_used~0_391) .cse30) (and .cse0 (= |v_P1_#t~ite43_53| v_~x$w_buff1_used~0_391) (or (and .cse28 .cse29 .cse3 .cse30 (= |v_P1_#t~ite43_53| v_~x$w_buff1_used~0_392)) (and .cse5 (or (and .cse5 (= |v_P1_#t~ite42_61| 0) .cse28 .cse29 .cse7) (and (= |v_P1_#t~ite42_61| |v_P1_#t~ite41_69|) (or (and .cse12 .cse5 .cse9 .cse29 (= |v_P1_#t~ite41_69| v_~weak$$choice0~0_141) .cse23) (and (or .cse31 .cse6 .cse3 .cse7) (= |v_P1_#t~ite40_75| |v_P1_#t~ite41_69|) (let ((.cse32 (= |v_P1_#t~ite40_75| 0))) (or (and .cse32 .cse5 .cse6 .cse9 .cse23) (and .cse32 (or .cse12 .cse31 .cse3 .cse7)))))) .cse13)) (= |v_P1_#t~ite42_61| |v_P1_#t~ite43_53|)))))) (let ((.cse33 (= |v_P1_#t~ite32_41| |v_P1Thread1of1ForFork0_#t~ite32_1|)) (.cse34 (= |v_P1_#t~ite31_49| |v_P1Thread1of1ForFork0_#t~ite31_1|)) (.cse35 (= |v_P1_#t~ite30_55| |v_P1Thread1of1ForFork0_#t~ite30_1|))) (or (and (= |v_P1_#t~ite33_35| |v_P1Thread1of1ForFork0_#t~ite33_1|) .cse33 .cse14 .cse34 .cse35 (= v_~x$w_buff1~0_128 v_~x$w_buff1~0_127)) (and .cse0 (or (and .cse33 .cse16 (= |v_P1_#t~ite33_35| v_~x$w_buff1~0_128) .cse34 .cse35) (and (or (and (= |v_P1_#t~ite32_41| v_~x$w_buff1~0_128) .cse22 .cse34 .cse35 .cse7) (and (= |v_P1_#t~ite32_41| |v_P1_#t~ite31_49|) .cse20 (or (and (= |v_P1_#t~ite30_55| |v_P1_#t~ite31_49|) (let ((.cse36 (= |v_P1_#t~ite30_55| v_~x$w_buff1~0_128))) (or (and .cse6 .cse9 .cse22 .cse23 .cse36) (and .cse24 .cse36))) .cse25) (and .cse12 .cse9 (= |v_P1_#t~ite31_49| v_~x$w_buff1~0_128) .cse22 .cse23 .cse35)))) (= |v_P1_#t~ite32_41| |v_P1_#t~ite33_35|) .cse22)) (= |v_P1_#t~ite33_35| v_~x$w_buff1~0_127)))) (= |v_P1Thread1of1ForFork0_#t~nondet11_1| v_~weak$$choice2~0_90) (= |v_P1Thread1of1ForFork0_#t~nondet13_1| v_~weak$$choice1~0_79) (let ((.cse37 (= |v_P1_#t~ite20_81| |v_P1Thread1of1ForFork0_#t~ite20_1|)) (.cse38 (= |v_P1_#t~ite22_71| |v_P1Thread1of1ForFork0_#t~ite22_1|)) (.cse39 (= |v_P1_#t~ite21_79| |v_P1Thread1of1ForFork0_#t~ite21_1|)) (.cse41 (= |v_P1_#t~ite18_83| |v_P1Thread1of1ForFork0_#t~ite18_1|)) (.cse42 (= |v_P1_#t~ite16_79| |v_P1Thread1of1ForFork0_#t~ite16_1|)) (.cse43 (= |v_P1Thread1of1ForFork0_#t~mem19_1| |v_P1_#t~mem19_82|)) (.cse44 (= |v_P1Thread1of1ForFork0_#t~mem15_1| |v_P1_#t~mem15_76|)) (.cse45 (= |v_P1_#t~ite17_79| |v_P1Thread1of1ForFork0_#t~ite17_1|))) (or (and .cse37 .cse38 .cse39 .cse16 (= |v_P1_#t~mem14_60| v_~__unbuffered_p1_EAX~0_49) (= .cse40 |v_P1_#t~mem14_60|) .cse41 .cse42 .cse43 (= |v_P1_#t~ite23_65| |v_P1Thread1of1ForFork0_#t~ite23_1|) .cse44 .cse45) (and (= |v_P1Thread1of1ForFork0_#t~mem14_1| |v_P1_#t~mem14_60|) (or (and (= |v_P1_#t~ite22_71| |v_P1_#t~ite23_65|) .cse20 (or (and (= |v_P1_#t~ite22_71| |v_P1_#t~ite21_79|) .cse42 (or (and (or (and .cse46 (= |v_P1_#t~ite20_81| |v_P1_#t~mem19_82|) (= .cse40 |v_P1_#t~mem19_82|)) (and .cse26 .cse43 (= |v_P1_#t~ite20_81| v_~x$w_buff0~0_133))) .cse24 .cse41 (= |v_P1_#t~ite20_81| |v_P1_#t~ite21_79|)) (and .cse37 (= |v_P1_#t~ite18_83| |v_P1_#t~ite21_79|) .cse6 .cse9 .cse22 .cse23 .cse43 (or (and .cse26 (= |v_P1_#t~ite18_83| v_~x$w_buff1~0_128)) (and .cse46 (= |v_P1_#t~ite18_83| v_~x$w_buff0~0_133))))) .cse25 .cse44 .cse45) (and .cse37 .cse39 (= |v_P1_#t~ite17_79| |v_P1_#t~ite22_71|) (or (and .cse46 (= |v_P1_#t~ite17_79| |v_P1_#t~ite16_79|) (or (and .cse27 (= |v_P1_#t~ite16_79| v_~x$w_buff1~0_128)) (and (= |v_P1_#t~ite16_79| v_~x$w_buff0~0_133) (not .cse27))) .cse44) (and (= .cse40 |v_P1_#t~mem15_76|) .cse26 (= |v_P1_#t~ite17_79| |v_P1_#t~mem15_76|) .cse42)) .cse12 .cse9 .cse22 .cse23 .cse41 .cse43))) (and .cse37 .cse38 .cse39 (= |v_P1_#t~ite23_65| v_~x$w_buff0~0_133) .cse22 .cse41 .cse42 .cse43 .cse7 .cse44 .cse45)) .cse22 (= |v_P1_#t~ite23_65| v_~__unbuffered_p1_EAX~0_49)))) (or (and (= |v_P1_#t~ite58_49| |v_P1_#t~mem57_64|) .cse0 (= |v_P1_#t~mem57_64| v_~__unbuffered_p1_EAX~0_49)) (and .cse14 (= |v_P1_#t~ite58_49| v_~x$mem_tmp~0_38) (= |v_P1Thread1of1ForFork0_#t~mem57_1| |v_P1_#t~mem57_64|))) (= .cse40 v_~x$mem_tmp~0_38) (= v_~x$w_buff0_used~0_472 (ite (= |v_P1_#t~ite39_41| 0) 0 1)) (let ((.cse47 (= |v_P1_#t~ite50_99| |v_P1Thread1of1ForFork0_#t~ite50_1|)) (.cse48 (= |v_P1_#t~ite53_87| |v_P1Thread1of1ForFork0_#t~ite53_1|)) (.cse49 (= |v_P1_#t~ite52_97| |v_P1Thread1of1ForFork0_#t~ite52_1|)) (.cse50 (= |v_P1_#t~ite51_101| |v_P1Thread1of1ForFork0_#t~ite51_1|))) (or (and (= v_~x$r_buff1_thd2~0_294 v_~x$r_buff1_thd2~0_293) .cse14 (= |v_P1_#t~ite54_73| |v_P1Thread1of1ForFork0_#t~ite54_1|) .cse47 .cse48 .cse49 .cse50) (and (= |v_P1_#t~ite54_73| v_~x$r_buff1_thd2~0_293) .cse0 (or (and (= |v_P1_#t~ite53_87| |v_P1_#t~ite54_73|) (let ((.cse52 (= (mod v_~x$r_buff0_thd2~0_329 256) 0))) (let ((.cse51 (not .cse52))) (or (and .cse5 (= |v_P1_#t~ite53_87| 0) .cse47 .cse49 .cse50 .cse51) (and (= |v_P1_#t~ite52_97| |v_P1_#t~ite53_87|) (or .cse52 .cse3) (or (and (or .cse6 .cse3 .cse8 .cse51) (let ((.cse53 (= |v_P1_#t~ite51_101| 0))) (or (and .cse52 .cse5 .cse6 .cse10 .cse53) (and (or .cse12 .cse3 .cse8 .cse51) .cse53))) .cse47 (= |v_P1_#t~ite51_101| |v_P1_#t~ite52_97|)) (and (or (and (= |v_P1_#t~ite50_99| 0) .cse46) (and .cse26 (= |v_P1_#t~ite50_99| v_~x$r_buff1_thd2~0_294))) .cse52 .cse12 .cse5 (= |v_P1_#t~ite52_97| |v_P1_#t~ite50_99|) .cse10 .cse50)))))) .cse5) (and (= |v_P1_#t~ite54_73| v_~x$r_buff1_thd2~0_294) .cse47 .cse48 .cse49 .cse3 .cse50))))) (= |v_P1Thread1of1ForFork0_#t~nondet10_1| v_~weak$$choice0~0_141) (let ((.cse56 (= |v_P1_#t~ite26_63| |v_P1Thread1of1ForFork0_#t~ite26_1|)) (.cse57 (= |v_P1_#t~ite27_51| |v_P1Thread1of1ForFork0_#t~ite27_1|)) (.cse55 (= |v_P1_#t~ite25_69| |v_P1Thread1of1ForFork0_#t~ite25_1|))) (or (and .cse0 (= |v_P1_#t~ite28_43| v_~x$w_buff0~0_132) (or (and (= |v_P1_#t~ite27_51| |v_P1_#t~ite28_43|) .cse22 (or (and .cse20 (or (and (let ((.cse54 (= |v_P1_#t~ite25_69| v_~x$w_buff0~0_133))) (or (and .cse24 .cse54) (and .cse6 .cse9 .cse22 .cse23 .cse54))) (= |v_P1_#t~ite25_69| |v_P1_#t~ite26_63|) .cse25) (and .cse12 .cse9 .cse22 .cse55 (= |v_P1_#t~ite26_63| v_~x$w_buff0~0_133) .cse23)) (= |v_P1_#t~ite27_51| |v_P1_#t~ite26_63|)) (and .cse56 .cse22 (= |v_P1_#t~ite27_51| v_~x$w_buff0~0_133) .cse55 .cse7))) (and .cse56 .cse57 (= |v_P1_#t~ite28_43| v_~x$w_buff0~0_133) .cse55 .cse16))) (and (= |v_P1_#t~ite28_43| |v_P1Thread1of1ForFork0_#t~ite28_1|) .cse56 .cse57 .cse14 .cse55 (= v_~x$w_buff0~0_133 v_~x$w_buff0~0_132)))) (= v_~__unbuffered_p1_EAX$read_delayed_var~0.base_42 |v_~#x~0.base_172|) (= (store |v_#memory_int_260| |v_~#x~0.base_172| (store .cse58 |v_~#x~0.offset_172| |v_P1_#t~ite58_49|)) |v_#memory_int_258|)))))  InVars {~x$w_buff0~0=v_~x$w_buff0~0_133, P1Thread1of1ForFork0_#t~ite47=|v_P1Thread1of1ForFork0_#t~ite47_1|, P1Thread1of1ForFork0_#t~ite22=|v_P1Thread1of1ForFork0_#t~ite22_1|, P1Thread1of1ForFork0_#t~ite45=|v_P1Thread1of1ForFork0_#t~ite45_1|, P1Thread1of1ForFork0_#t~ite28=|v_P1Thread1of1ForFork0_#t~ite28_1|, P1Thread1of1ForFork0_#t~ite26=|v_P1Thread1of1ForFork0_#t~ite26_1|, P1Thread1of1ForFork0_#t~ite43=|v_P1Thread1of1ForFork0_#t~ite43_1|, P1Thread1of1ForFork0_#t~ite20=|v_P1Thread1of1ForFork0_#t~ite20_1|, P1Thread1of1ForFork0_#t~ite41=|v_P1Thread1of1ForFork0_#t~ite41_1|, P1Thread1of1ForFork0_#t~nondet10=|v_P1Thread1of1ForFork0_#t~nondet10_1|, P1Thread1of1ForFork0_#t~mem14=|v_P1Thread1of1ForFork0_#t~mem14_1|, ~#x~0.offset=|v_~#x~0.offset_172|, ~x$w_buff1~0=v_~x$w_buff1~0_128, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_294, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_392, P1Thread1of1ForFork0_#t~ite36=|v_P1Thread1of1ForFork0_#t~ite36_1|, P1Thread1of1ForFork0_#t~ite38=|v_P1Thread1of1ForFork0_#t~ite38_1|, P1Thread1of1ForFork0_#t~ite17=|v_P1Thread1of1ForFork0_#t~ite17_1|, P1Thread1of1ForFork0_#t~ite53=|v_P1Thread1of1ForFork0_#t~ite53_1|, P1Thread1of1ForFork0_#t~ite32=|v_P1Thread1of1ForFork0_#t~ite32_1|, P1Thread1of1ForFork0_#t~ite30=|v_P1Thread1of1ForFork0_#t~ite30_1|, P1Thread1of1ForFork0_#t~ite51=|v_P1Thread1of1ForFork0_#t~ite51_1|, P1Thread1of1ForFork0_#t~ite46=|v_P1Thread1of1ForFork0_#t~ite46_1|, P1Thread1of1ForFork0_#t~ite25=|v_P1Thread1of1ForFork0_#t~ite25_1|, P1Thread1of1ForFork0_#t~ite23=|v_P1Thread1of1ForFork0_#t~ite23_1|, P1Thread1of1ForFork0_#t~ite27=|v_P1Thread1of1ForFork0_#t~ite27_1|, P1Thread1of1ForFork0_#t~ite48=|v_P1Thread1of1ForFork0_#t~ite48_1|, P1Thread1of1ForFork0_#t~nondet13=|v_P1Thread1of1ForFork0_#t~nondet13_1|, P1Thread1of1ForFork0_#t~ite42=|v_P1Thread1of1ForFork0_#t~ite42_1|, P1Thread1of1ForFork0_#t~ite21=|v_P1Thread1of1ForFork0_#t~ite21_1|, P1Thread1of1ForFork0_#t~ite40=|v_P1Thread1of1ForFork0_#t~ite40_1|, P1Thread1of1ForFork0_#t~nondet11=|v_P1Thread1of1ForFork0_#t~nondet11_1|, P1Thread1of1ForFork0_#t~mem57=|v_P1Thread1of1ForFork0_#t~mem57_1|, P1Thread1of1ForFork0_#t~mem15=|v_P1Thread1of1ForFork0_#t~mem15_1|, P1Thread1of1ForFork0_#t~ite35=|v_P1Thread1of1ForFork0_#t~ite35_1|, P1Thread1of1ForFork0_#t~ite33=|v_P1Thread1of1ForFork0_#t~ite33_1|, P1Thread1of1ForFork0_#t~ite16=|v_P1Thread1of1ForFork0_#t~ite16_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_330, P1Thread1of1ForFork0_#t~ite37=|v_P1Thread1of1ForFork0_#t~ite37_1|, P1Thread1of1ForFork0_#t~ite18=|v_P1Thread1of1ForFork0_#t~ite18_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_473, P1Thread1of1ForFork0_#t~ite50=|v_P1Thread1of1ForFork0_#t~ite50_1|, P1Thread1of1ForFork0_#t~ite54=|v_P1Thread1of1ForFork0_#t~ite54_1|, P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_1|, P1Thread1of1ForFork0_#t~ite52=|v_P1Thread1of1ForFork0_#t~ite52_1|, #memory_int=|v_#memory_int_260|, ~#x~0.base=|v_~#x~0.base_172|, P1Thread1of1ForFork0_#t~mem19=|v_P1Thread1of1ForFork0_#t~mem19_1|}  OutVars{~x$w_buff0~0=v_~x$w_buff0~0_132, ~x$flush_delayed~0=v_~x$flush_delayed~0_66, P1Thread1of1ForFork0_#t~ite47=|v_P1Thread1of1ForFork0_#t~ite47_2|, P1Thread1of1ForFork0_#t~ite24=|v_P1Thread1of1ForFork0_#t~ite24_1|, P1Thread1of1ForFork0_#t~ite22=|v_P1Thread1of1ForFork0_#t~ite22_2|, P1Thread1of1ForFork0_#t~ite45=|v_P1Thread1of1ForFork0_#t~ite45_2|, P1Thread1of1ForFork0_#t~ite28=|v_P1Thread1of1ForFork0_#t~ite28_2|, P1Thread1of1ForFork0_#t~ite26=|v_P1Thread1of1ForFork0_#t~ite26_2|, P1Thread1of1ForFork0_#t~ite49=|v_P1Thread1of1ForFork0_#t~ite49_1|, ~weak$$choice1~0=v_~weak$$choice1~0_79, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_49, P1Thread1of1ForFork0_#t~ite43=|v_P1Thread1of1ForFork0_#t~ite43_2|, P1Thread1of1ForFork0_#t~ite20=|v_P1Thread1of1ForFork0_#t~ite20_2|, P1Thread1of1ForFork0_#t~ite41=|v_P1Thread1of1ForFork0_#t~ite41_2|, ~__unbuffered_p1_EAX$read_delayed_var~0.base=v_~__unbuffered_p1_EAX$read_delayed_var~0.base_42, P1Thread1of1ForFork0_#t~nondet10=|v_P1Thread1of1ForFork0_#t~nondet10_2|, P1Thread1of1ForFork0_#t~mem56=|v_P1Thread1of1ForFork0_#t~mem56_1|, P1Thread1of1ForFork0_#t~mem14=|v_P1Thread1of1ForFork0_#t~mem14_2|, ~#x~0.offset=|v_~#x~0.offset_172|, P1Thread1of1ForFork0_#t~mem12=|v_P1Thread1of1ForFork0_#t~mem12_1|, ~x$w_buff1~0=v_~x$w_buff1~0_127, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_293, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_391, P1Thread1of1ForFork0_#t~ite36=|v_P1Thread1of1ForFork0_#t~ite36_2|, P1Thread1of1ForFork0_#t~ite34=|v_P1Thread1of1ForFork0_#t~ite34_1|, P1Thread1of1ForFork0_#t~ite55=|v_P1Thread1of1ForFork0_#t~ite55_1|, P1Thread1of1ForFork0_#t~ite38=|v_P1Thread1of1ForFork0_#t~ite38_2|, P1Thread1of1ForFork0_#t~ite17=|v_P1Thread1of1ForFork0_#t~ite17_2|, ~weak$$choice0~0=v_~weak$$choice0~0_141, P1Thread1of1ForFork0_#t~ite53=|v_P1Thread1of1ForFork0_#t~ite53_2|, P1Thread1of1ForFork0_#t~ite32=|v_P1Thread1of1ForFork0_#t~ite32_2|, P1Thread1of1ForFork0_#t~ite30=|v_P1Thread1of1ForFork0_#t~ite30_2|, P1Thread1of1ForFork0_#t~ite51=|v_P1Thread1of1ForFork0_#t~ite51_2|, ~__unbuffered_p1_EAX$read_delayed~0=v_~__unbuffered_p1_EAX$read_delayed~0_41, P1Thread1of1ForFork0_#t~ite46=|v_P1Thread1of1ForFork0_#t~ite46_2|, P1Thread1of1ForFork0_#t~ite25=|v_P1Thread1of1ForFork0_#t~ite25_2|, ~x$mem_tmp~0=v_~x$mem_tmp~0_38, P1Thread1of1ForFork0_#t~ite23=|v_P1Thread1of1ForFork0_#t~ite23_2|, P1Thread1of1ForFork0_#t~ite44=|v_P1Thread1of1ForFork0_#t~ite44_1|, P1Thread1of1ForFork0_#t~ite29=|v_P1Thread1of1ForFork0_#t~ite29_1|, P1Thread1of1ForFork0_#t~ite27=|v_P1Thread1of1ForFork0_#t~ite27_2|, P1Thread1of1ForFork0_#t~ite48=|v_P1Thread1of1ForFork0_#t~ite48_2|, P1Thread1of1ForFork0_#t~nondet13=|v_P1Thread1of1ForFork0_#t~nondet13_2|, P1Thread1of1ForFork0_#t~ite42=|v_P1Thread1of1ForFork0_#t~ite42_2|, P1Thread1of1ForFork0_#t~ite21=|v_P1Thread1of1ForFork0_#t~ite21_2|, P1Thread1of1ForFork0_#t~ite40=|v_P1Thread1of1ForFork0_#t~ite40_2|, P1Thread1of1ForFork0_#t~nondet11=|v_P1Thread1of1ForFork0_#t~nondet11_2|, P1Thread1of1ForFork0_#t~mem57=|v_P1Thread1of1ForFork0_#t~mem57_2|, P1Thread1of1ForFork0_#t~mem15=|v_P1Thread1of1ForFork0_#t~mem15_2|, P1Thread1of1ForFork0_#t~ite58=|v_P1Thread1of1ForFork0_#t~ite58_1|, P1Thread1of1ForFork0_#t~ite35=|v_P1Thread1of1ForFork0_#t~ite35_2|, ~__unbuffered_p1_EAX$read_delayed_var~0.offset=v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_42, P1Thread1of1ForFork0_#t~ite33=|v_P1Thread1of1ForFork0_#t~ite33_2|, P1Thread1of1ForFork0_#t~ite16=|v_P1Thread1of1ForFork0_#t~ite16_2|, P1Thread1of1ForFork0_#t~ite39=|v_P1Thread1of1ForFork0_#t~ite39_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_329, P1Thread1of1ForFork0_#t~ite37=|v_P1Thread1of1ForFork0_#t~ite37_2|, P1Thread1of1ForFork0_#t~ite18=|v_P1Thread1of1ForFork0_#t~ite18_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_472, P1Thread1of1ForFork0_#t~ite50=|v_P1Thread1of1ForFork0_#t~ite50_2|, P1Thread1of1ForFork0_#t~ite54=|v_P1Thread1of1ForFork0_#t~ite54_2|, P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_2|, P1Thread1of1ForFork0_#t~ite52=|v_P1Thread1of1ForFork0_#t~ite52_2|, #memory_int=|v_#memory_int_258|, ~#x~0.base=|v_~#x~0.base_172|, P1Thread1of1ForFork0_#t~mem19=|v_P1Thread1of1ForFork0_#t~mem19_2|, ~weak$$choice2~0=v_~weak$$choice2~0_90}  AuxVars[|v_P1_#t~ite41_69|, |v_P1_#t~ite23_65|, |v_P1_#t~ite25_69|, |v_P1_#t~ite48_63|, |v_P1_#t~ite31_49|, |v_P1_#t~ite22_71|, |v_P1_#t~ite46_81|, |v_P1_#t~ite47_71|, |v_P1_#t~mem19_82|, |v_P1_#t~ite30_55|, |v_P1_#t~ite33_35|, |v_P1_#t~ite50_99|, |v_P1_#t~ite16_79|, |v_P1_#t~ite32_41|, |v_P1_#t~ite37_51|, |v_P1_#t~ite38_43|, |v_P1_#t~ite42_61|, |v_P1_#t~ite21_79|, |v_P1_#t~ite43_53|, |v_P1_#t~mem57_64|, |v_P1_#t~ite51_101|, |v_P1_#t~ite20_81|, |v_P1_#t~mem14_60|, |v_P1_#t~ite45_87|, |v_P1_#t~mem15_76|, |v_P1_#t~ite54_73|, |v_P1_#t~ite26_63|, |v_P1_#t~ite28_43|, |v_P1_#t~ite53_87|, |v_P1_#t~ite52_97|, |v_P1_#t~ite27_51|, |v_P1_#t~ite17_79|, |v_P1_#t~ite58_49|, |v_P1_#t~ite36_59|, |v_P1_#t~ite35_65|, |v_P1_#t~ite18_83|, |v_P1_#t~ite39_41|, |v_P1_#t~ite40_75|]  AssignedVars[~x$w_buff0~0, ~x$flush_delayed~0, P1Thread1of1ForFork0_#t~ite47, P1Thread1of1ForFork0_#t~ite24, P1Thread1of1ForFork0_#t~ite22, P1Thread1of1ForFork0_#t~ite45, P1Thread1of1ForFork0_#t~ite28, P1Thread1of1ForFork0_#t~ite26, P1Thread1of1ForFork0_#t~ite49, ~weak$$choice1~0, ~__unbuffered_p1_EAX~0, P1Thread1of1ForFork0_#t~ite43, P1Thread1of1ForFork0_#t~ite20, P1Thread1of1ForFork0_#t~ite41, ~__unbuffered_p1_EAX$read_delayed_var~0.base, P1Thread1of1ForFork0_#t~nondet10, P1Thread1of1ForFork0_#t~mem56, P1Thread1of1ForFork0_#t~mem14, P1Thread1of1ForFork0_#t~mem12, ~x$w_buff1~0, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~ite36, P1Thread1of1ForFork0_#t~ite34, P1Thread1of1ForFork0_#t~ite55, P1Thread1of1ForFork0_#t~ite38, P1Thread1of1ForFork0_#t~ite17, ~weak$$choice0~0, P1Thread1of1ForFork0_#t~ite53, P1Thread1of1ForFork0_#t~ite32, P1Thread1of1ForFork0_#t~ite30, P1Thread1of1ForFork0_#t~ite51, ~__unbuffered_p1_EAX$read_delayed~0, P1Thread1of1ForFork0_#t~ite46, P1Thread1of1ForFork0_#t~ite25, ~x$mem_tmp~0, P1Thread1of1ForFork0_#t~ite23, P1Thread1of1ForFork0_#t~ite44, P1Thread1of1ForFork0_#t~ite29, P1Thread1of1ForFork0_#t~ite27, P1Thread1of1ForFork0_#t~ite48, P1Thread1of1ForFork0_#t~nondet13, P1Thread1of1ForFork0_#t~ite42, P1Thread1of1ForFork0_#t~ite21, P1Thread1of1ForFork0_#t~ite40, P1Thread1of1ForFork0_#t~nondet11, P1Thread1of1ForFork0_#t~mem57, P1Thread1of1ForFork0_#t~mem15, P1Thread1of1ForFork0_#t~ite58, P1Thread1of1ForFork0_#t~ite35, ~__unbuffered_p1_EAX$read_delayed_var~0.offset, P1Thread1of1ForFork0_#t~ite33, P1Thread1of1ForFork0_#t~ite16, P1Thread1of1ForFork0_#t~ite39, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite37, P1Thread1of1ForFork0_#t~ite18, ~x$w_buff0_used~0, P1Thread1of1ForFork0_#t~ite50, P1Thread1of1ForFork0_#t~ite54, P1Thread1of1ForFork0_#t~ite31, P1Thread1of1ForFork0_#t~ite52, #memory_int, P1Thread1of1ForFork0_#t~mem19, ~weak$$choice2~0] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,100 INFO  L290        TraceCheckUtils]: 66: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1231] L798-->L801: Formula: (= v_~y~0_2 1)  InVars {}  OutVars{~y~0=v_~y~0_2}  AuxVars[]  AssignedVars[~y~0] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,101 INFO  L290        TraceCheckUtils]: 67: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1221] P0ENTRY-->L752: Formula: (and (= |v_P0Thread1of1ForFork1_~arg#1.offset_1| |v_P0Thread1of1ForFork1_#in~arg#1.offset_1|) (= |v_P0Thread1of1ForFork1_#in~arg#1.base_1| |v_P0Thread1of1ForFork1_~arg#1.base_1|))  InVars {P0Thread1of1ForFork1_#in~arg#1.base=|v_P0Thread1of1ForFork1_#in~arg#1.base_1|, P0Thread1of1ForFork1_#in~arg#1.offset=|v_P0Thread1of1ForFork1_#in~arg#1.offset_1|}  OutVars{P0Thread1of1ForFork1_#in~arg#1.offset=|v_P0Thread1of1ForFork1_#in~arg#1.offset_1|, P0Thread1of1ForFork1_#in~arg#1.base=|v_P0Thread1of1ForFork1_#in~arg#1.base_1|, P0Thread1of1ForFork1_~arg#1.base=|v_P0Thread1of1ForFork1_~arg#1.base_1|, P0Thread1of1ForFork1_~arg#1.offset=|v_P0Thread1of1ForFork1_~arg#1.offset_1|}  AuxVars[]  AssignedVars[P0Thread1of1ForFork1_~arg#1.base, P0Thread1of1ForFork1_~arg#1.offset] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,101 INFO  L290        TraceCheckUtils]: 68: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1222] L752-->L754: Formula: (= v_~__unbuffered_p0_EAX~0_1 v_~y~0_1)  InVars {~y~0=v_~y~0_1}  OutVars{~y~0=v_~y~0_1, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_1}  AuxVars[]  AssignedVars[~__unbuffered_p0_EAX~0] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,102 INFO  L290        TraceCheckUtils]: 69: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1188] L828-3-->L828-4: Formula: true  InVars {}  OutVars{ULTIMATE.start_main_#t~pre68#1=|v_ULTIMATE.start_main_#t~pre68#1_4|}  AuxVars[]  AssignedVars[ULTIMATE.start_main_#t~pre68#1] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,102 INFO  L290        TraceCheckUtils]: 70: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1178] L828-4-->L829: Formula: true  InVars {}  OutVars{ULTIMATE.start_main_#t~nondet69#1=|v_ULTIMATE.start_main_#t~nondet69#1_2|}  AuxVars[]  AssignedVars[ULTIMATE.start_main_#t~nondet69#1] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,102 INFO  L290        TraceCheckUtils]: 71: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1232] L801-->L808: Formula: (let ((.cse16 (= (mod v_~x$w_buff1_used~0_338 256) 0)) (.cse5 (= (mod v_~x$r_buff1_thd2~0_256 256) 0)) (.cse15 (= (mod v_~x$w_buff0_used~0_421 256) 0)) (.cse14 (= (mod v_~x$r_buff0_thd2~0_292 256) 0)) (.cse4 (= (mod v_~x$w_buff0_used~0_420 256) 0))) (let ((.cse3 (not .cse4)) (.cse6 (or .cse4 .cse14)) (.cse10 (or .cse15 .cse14)) (.cse1 (not .cse5)) (.cse8 (not .cse16)) (.cse9 (or .cse16 .cse5)) (.cse11 (not .cse15)) (.cse7 (not .cse14)) (.cse13 (select |v_#memory_int_227| |v_~#x~0.base_154|))) (and (let ((.cse2 (= (mod v_~x$r_buff0_thd2~0_291 256) 0)) (.cse0 (= (mod v_~x$w_buff1_used~0_337 256) 0))) (or (and (or (and (not .cse0) .cse1) (and (not .cse2) .cse3)) (= v_~x$r_buff1_thd2~0_255 0)) (and (= v_~x$r_buff1_thd2~0_256 v_~x$r_buff1_thd2~0_255) (or .cse2 .cse4) (or .cse0 .cse5)))) (or (and (= v_~x$r_buff0_thd2~0_291 v_~x$r_buff0_thd2~0_292) .cse6) (and .cse7 (= v_~x$r_buff0_thd2~0_291 0) .cse3)) (or (and (= v_~x$w_buff1_used~0_337 0) (or (and .cse7 .cse3) (and .cse1 .cse8))) (and .cse9 .cse6 (= v_~x$w_buff1_used~0_338 v_~x$w_buff1_used~0_337))) (or (and (= v_~x$w_buff0_used~0_421 v_~x$w_buff0_used~0_420) .cse10) (and .cse11 .cse7 (= v_~x$w_buff0_used~0_420 0))) (let ((.cse12 (= |v_P1Thread1of1ForFork0_#t~mem59_1| |v_P1_#t~mem59_48|))) (or (and (= |v_P1_#t~ite61_35| |v_P1_#t~ite60_47|) .cse10 (or (and .cse1 .cse8 .cse12 (= |v_P1_#t~ite60_47| v_~x$w_buff1~0_97)) (and .cse9 (= (select .cse13 |v_~#x~0.offset_154|) |v_P1_#t~mem59_48|) (= |v_P1_#t~ite60_47| |v_P1_#t~mem59_48|)))) (and .cse11 .cse7 (= |v_P1_#t~ite61_35| v_~x$w_buff0~0_98) (= |v_P1_#t~ite60_47| |v_P1Thread1of1ForFork0_#t~ite60_1|) .cse12))) (= (store |v_#memory_int_227| |v_~#x~0.base_154| (store .cse13 |v_~#x~0.offset_154| |v_P1_#t~ite61_35|)) |v_#memory_int_226|))))  InVars {~x$w_buff0~0=v_~x$w_buff0~0_98, P1Thread1of1ForFork0_#t~mem59=|v_P1Thread1of1ForFork0_#t~mem59_1|, ~#x~0.offset=|v_~#x~0.offset_154|, P1Thread1of1ForFork0_#t~ite60=|v_P1Thread1of1ForFork0_#t~ite60_1|, ~x$w_buff1~0=v_~x$w_buff1~0_97, #memory_int=|v_#memory_int_227|, ~#x~0.base=|v_~#x~0.base_154|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_256, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_338, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_292, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_421}  OutVars{~x$w_buff0~0=v_~x$w_buff0~0_98, P1Thread1of1ForFork0_#t~mem59=|v_P1Thread1of1ForFork0_#t~mem59_2|, ~#x~0.offset=|v_~#x~0.offset_154|, ~x$w_buff1~0=v_~x$w_buff1~0_97, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_255, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_337, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_291, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_420, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_1|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_1|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_1|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_1|, P1Thread1of1ForFork0_#t~ite60=|v_P1Thread1of1ForFork0_#t~ite60_2|, P1Thread1of1ForFork0_#t~ite61=|v_P1Thread1of1ForFork0_#t~ite61_1|, #memory_int=|v_#memory_int_226|, ~#x~0.base=|v_~#x~0.base_154|}  AuxVars[|v_P1_#t~ite61_35|, |v_P1_#t~ite60_47|, |v_P1_#t~mem59_48|]  AssignedVars[P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~mem59, P1Thread1of1ForFork0_#t~ite65, P1Thread1of1ForFork0_#t~ite60, P1Thread1of1ForFork0_#t~ite61, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, ~x$r_buff0_thd2~0, ~x$w_buff0_used~0] {4843#(= ~__unbuffered_cnt~0 0)} is VALID
[2022-02-20 20:28:16,103 INFO  L290        TraceCheckUtils]: 72: Hoare triple {4843#(= ~__unbuffered_cnt~0 0)} [1233] L808-->L811: Formula: (= v_~__unbuffered_cnt~0_3 (+ v_~__unbuffered_cnt~0_4 1))  InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_4}  OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_3}  AuxVars[]  AssignedVars[~__unbuffered_cnt~0] {4844#(<= ~__unbuffered_cnt~0 1)} is VALID
[2022-02-20 20:28:16,103 INFO  L290        TraceCheckUtils]: 73: Hoare triple {4844#(<= ~__unbuffered_cnt~0 1)} [1120] L829-->L831: Formula: (= v_~main$tmp_guard0~0_2 (ite (= (ite (= v_~__unbuffered_cnt~0_6 2) 1 0) 0) 0 1))  InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_6}  OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_6, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_2}  AuxVars[]  AssignedVars[~main$tmp_guard0~0] {4845#(and (<= ~main$tmp_guard0~0 0) (<= 0 ~main$tmp_guard0~0))} is VALID
[2022-02-20 20:28:16,104 INFO  L290        TraceCheckUtils]: 74: Hoare triple {4845#(and (<= ~main$tmp_guard0~0 0) (<= 0 ~main$tmp_guard0~0))} [1185] L831-->L832: Formula: true  InVars {}  OutVars{}  AuxVars[]  AssignedVars[] {4845#(and (<= ~main$tmp_guard0~0 0) (<= 0 ~main$tmp_guard0~0))} is VALID
[2022-02-20 20:28:16,105 INFO  L290        TraceCheckUtils]: 75: Hoare triple {4845#(and (<= ~main$tmp_guard0~0 0) (<= 0 ~main$tmp_guard0~0))} [1112] L832-->L832-1: Formula: (= |v_ULTIMATE.start_assume_abort_if_not_#in~cond#1_1| (mod v_~main$tmp_guard0~0_3 256))  InVars {~main$tmp_guard0~0=v_~main$tmp_guard0~0_3}  OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_3, ULTIMATE.start_assume_abort_if_not_#in~cond#1=|v_ULTIMATE.start_assume_abort_if_not_#in~cond#1_1|}  AuxVars[]  AssignedVars[ULTIMATE.start_assume_abort_if_not_#in~cond#1] {4846#(and (<= |ULTIMATE.start_assume_abort_if_not_#in~cond#1| 0) (<= 0 |ULTIMATE.start_assume_abort_if_not_#in~cond#1|))} is VALID
[2022-02-20 20:28:16,105 INFO  L290        TraceCheckUtils]: 76: Hoare triple {4846#(and (<= |ULTIMATE.start_assume_abort_if_not_#in~cond#1| 0) (<= 0 |ULTIMATE.start_assume_abort_if_not_#in~cond#1|))} [1215] L832-1-->L2: Formula: true  InVars {}  OutVars{ULTIMATE.start_assume_abort_if_not_~cond#1=|v_ULTIMATE.start_assume_abort_if_not_~cond#1_1|}  AuxVars[]  AssignedVars[ULTIMATE.start_assume_abort_if_not_~cond#1] {4846#(and (<= |ULTIMATE.start_assume_abort_if_not_#in~cond#1| 0) (<= 0 |ULTIMATE.start_assume_abort_if_not_#in~cond#1|))} is VALID
[2022-02-20 20:28:16,106 INFO  L290        TraceCheckUtils]: 77: Hoare triple {4846#(and (<= |ULTIMATE.start_assume_abort_if_not_#in~cond#1| 0) (<= 0 |ULTIMATE.start_assume_abort_if_not_#in~cond#1|))} [1173] L2-->L3: Formula: (= |v_ULTIMATE.start_assume_abort_if_not_#in~cond#1_2| |v_ULTIMATE.start_assume_abort_if_not_~cond#1_2|)  InVars {ULTIMATE.start_assume_abort_if_not_#in~cond#1=|v_ULTIMATE.start_assume_abort_if_not_#in~cond#1_2|}  OutVars{ULTIMATE.start_assume_abort_if_not_~cond#1=|v_ULTIMATE.start_assume_abort_if_not_~cond#1_2|, ULTIMATE.start_assume_abort_if_not_#in~cond#1=|v_ULTIMATE.start_assume_abort_if_not_#in~cond#1_2|}  AuxVars[]  AssignedVars[ULTIMATE.start_assume_abort_if_not_~cond#1] {4847#(and (<= |ULTIMATE.start_assume_abort_if_not_~cond#1| 0) (< 0 (+ |ULTIMATE.start_assume_abort_if_not_~cond#1| 1)))} is VALID
[2022-02-20 20:28:16,106 INFO  L290        TraceCheckUtils]: 78: Hoare triple {4847#(and (<= |ULTIMATE.start_assume_abort_if_not_~cond#1| 0) (< 0 (+ |ULTIMATE.start_assume_abort_if_not_~cond#1| 1)))} [1162] L3-->L2-1: Formula: (not (= |v_ULTIMATE.start_assume_abort_if_not_~cond#1_4| 0))  InVars {ULTIMATE.start_assume_abort_if_not_~cond#1=|v_ULTIMATE.start_assume_abort_if_not_~cond#1_4|}  OutVars{ULTIMATE.start_assume_abort_if_not_~cond#1=|v_ULTIMATE.start_assume_abort_if_not_~cond#1_4|}  AuxVars[]  AssignedVars[] {4842#false} is VALID
[2022-02-20 20:28:16,106 INFO  L290        TraceCheckUtils]: 79: Hoare triple {4842#false} [1134] L2-1-->L833: Formula: true  InVars {}  OutVars{}  AuxVars[]  AssignedVars[] {4842#false} is VALID
[2022-02-20 20:28:16,106 INFO  L290        TraceCheckUtils]: 80: Hoare triple {4842#false} [1150] L833-->L839: Formula: (let ((.cse15 (= (mod v_~x$w_buff0_used~0_455 256) 0)) (.cse14 (= (mod v_~x$r_buff0_thd0~0_70 256) 0)) (.cse11 (= (mod v_~x$w_buff0_used~0_454 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd0~0_48 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_374 256) 0))) (let ((.cse4 (not .cse16)) (.cse5 (not .cse12)) (.cse6 (or .cse12 .cse16)) (.cse13 (or .cse14 .cse11)) (.cse9 (not .cse11)) (.cse0 (not .cse15)) (.cse1 (not .cse14)) (.cse3 (or .cse14 .cse15)) (.cse7 (select |v_#memory_int_251| |v_~#x~0.base_168|))) (and (let ((.cse2 (= |v_ULTIMATE.start_main_#t~mem70#1_41| |v_ULTIMATE.start_main_#t~mem70#1_36|))) (or (and (= |v_ULTIMATE.start_main_#t~ite71#1_42| |v_ULTIMATE.start_main_#t~ite71#1_37|) .cse0 (= v_~x$w_buff0~0_126 |v_ULTIMATE.start_main_#t~ite72#1_36|) .cse1 .cse2) (and .cse3 (= |v_ULTIMATE.start_main_#t~ite71#1_42| |v_ULTIMATE.start_main_#t~ite72#1_36|) (or (and .cse4 (= v_~x$w_buff1~0_111 |v_ULTIMATE.start_main_#t~ite71#1_42|) .cse2 .cse5) (and .cse6 (= |v_ULTIMATE.start_main_#t~mem70#1_41| |v_ULTIMATE.start_main_#t~ite71#1_42|) (= |v_ULTIMATE.start_main_#t~mem70#1_41| (select .cse7 |v_~#x~0.offset_168|))))))) (let ((.cse10 (= (mod v_~x$r_buff0_thd0~0_69 256) 0)) (.cse8 (= (mod v_~x$w_buff1_used~0_373 256) 0))) (or (and (or (and (not .cse8) .cse5) (and .cse9 (not .cse10))) (= v_~x$r_buff1_thd0~0_47 0)) (and (or .cse10 .cse11) (or .cse8 .cse12) (= v_~x$r_buff1_thd0~0_48 v_~x$r_buff1_thd0~0_47)))) (or (and (or (and .cse9 .cse1) (and .cse4 .cse5)) (= v_~x$w_buff1_used~0_373 0)) (and .cse6 (= v_~x$w_buff1_used~0_374 v_~x$w_buff1_used~0_373) .cse13)) (or (and .cse13 (= v_~x$r_buff0_thd0~0_69 v_~x$r_buff0_thd0~0_70)) (and (= v_~x$r_buff0_thd0~0_69 0) .cse9 .cse1)) (or (and .cse0 (= v_~x$w_buff0_used~0_454 0) .cse1) (and (= v_~x$w_buff0_used~0_455 v_~x$w_buff0_used~0_454) .cse3)) (= (store |v_#memory_int_251| |v_~#x~0.base_168| (store .cse7 |v_~#x~0.offset_168| |v_ULTIMATE.start_main_#t~ite72#1_36|)) |v_#memory_int_250|))))  InVars {~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_70, ULTIMATE.start_main_#t~ite71#1=|v_ULTIMATE.start_main_#t~ite71#1_37|, ~#x~0.offset=|v_~#x~0.offset_168|, ULTIMATE.start_main_#t~mem70#1=|v_ULTIMATE.start_main_#t~mem70#1_36|, ~x$w_buff1~0=v_~x$w_buff1~0_111, #memory_int=|v_#memory_int_251|, ~#x~0.base=|v_~#x~0.base_168|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_374, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_48, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_455}  OutVars{~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_69, ULTIMATE.start_main_#t~ite74#1=|v_ULTIMATE.start_main_#t~ite74#1_30|, ~#x~0.offset=|v_~#x~0.offset_168|, ULTIMATE.start_main_#t~mem70#1=|v_ULTIMATE.start_main_#t~mem70#1_35|, ULTIMATE.start_main_#t~ite72#1=|v_ULTIMATE.start_main_#t~ite72#1_32|, ~x$w_buff1~0=v_~x$w_buff1~0_111, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_373, ULTIMATE.start_main_#t~ite76#1=|v_ULTIMATE.start_main_#t~ite76#1_16|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_47, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_454, ULTIMATE.start_main_#t~ite71#1=|v_ULTIMATE.start_main_#t~ite71#1_36|, ULTIMATE.start_main_#t~ite73#1=|v_ULTIMATE.start_main_#t~ite73#1_32|, ULTIMATE.start_main_#t~ite75#1=|v_ULTIMATE.start_main_#t~ite75#1_28|, #memory_int=|v_#memory_int_250|, ~#x~0.base=|v_~#x~0.base_168|}  AuxVars[|v_ULTIMATE.start_main_#t~ite71#1_42|, |v_ULTIMATE.start_main_#t~mem70#1_41|, |v_ULTIMATE.start_main_#t~ite72#1_36|]  AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite71#1, ULTIMATE.start_main_#t~ite74#1, ULTIMATE.start_main_#t~mem70#1, ULTIMATE.start_main_#t~ite73#1, ULTIMATE.start_main_#t~ite72#1, ULTIMATE.start_main_#t~ite75#1, #memory_int, ~x$w_buff1_used~0, ULTIMATE.start_main_#t~ite76#1, ~x$r_buff1_thd0~0, ~x$w_buff0_used~0] {4842#false} is VALID
[2022-02-20 20:28:16,107 INFO  L290        TraceCheckUtils]: 81: Hoare triple {4842#false} [1135] L839-->L844: Formula: (and (= (ite (= (ite (not (and (= v_~__unbuffered_p0_EAX~0_10 1) (= v_~__unbuffered_p1_EAX~0_45 1))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_10) (= v_~weak$$choice1~0_71 |v_ULTIMATE.start_main_#t~nondet77#1_9|) (let ((.cse0 (= (mod v_~__unbuffered_p1_EAX$read_delayed~0_39 256) 0)) (.cse1 (= |v_ULTIMATE.start_main_#t~mem78#1_28| |v_ULTIMATE.start_main_#t~mem78#1_33|))) (or (and (= |v_ULTIMATE.start_main_#t~ite79#1_25| |v_ULTIMATE.start_main_#t~ite79#1_30|) .cse0 .cse1 (= v_~__unbuffered_p1_EAX~0_46 v_~__unbuffered_p1_EAX~0_45)) (and (not .cse0) (let ((.cse2 (= (mod v_~weak$$choice1~0_71 256) 0))) (or (and (= |v_ULTIMATE.start_main_#t~mem78#1_33| |v_ULTIMATE.start_main_#t~ite79#1_30|) (= (select (select |v_#memory_int_220| v_~__unbuffered_p1_EAX$read_delayed_var~0.base_40) v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_40) |v_ULTIMATE.start_main_#t~mem78#1_33|) (not .cse2)) (and .cse1 (= v_~__unbuffered_p1_EAX~0_46 |v_ULTIMATE.start_main_#t~ite79#1_30|) .cse2))) (= v_~__unbuffered_p1_EAX~0_45 |v_ULTIMATE.start_main_#t~ite79#1_30|)))))  InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_10, ULTIMATE.start_main_#t~nondet77#1=|v_ULTIMATE.start_main_#t~nondet77#1_9|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_46, ~__unbuffered_p1_EAX$read_delayed~0=v_~__unbuffered_p1_EAX$read_delayed~0_39, ~__unbuffered_p1_EAX$read_delayed_var~0.base=v_~__unbuffered_p1_EAX$read_delayed_var~0.base_40, #memory_int=|v_#memory_int_220|, ~__unbuffered_p1_EAX$read_delayed_var~0.offset=v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_40, ULTIMATE.start_main_#t~ite79#1=|v_ULTIMATE.start_main_#t~ite79#1_25|, ULTIMATE.start_main_#t~mem78#1=|v_ULTIMATE.start_main_#t~mem78#1_28|}  OutVars{ULTIMATE.start_main_#t~nondet77#1=|v_ULTIMATE.start_main_#t~nondet77#1_8|, ~__unbuffered_p1_EAX$read_delayed~0=v_~__unbuffered_p1_EAX$read_delayed~0_39, ~__unbuffered_p1_EAX$read_delayed_var~0.offset=v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_40, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_10, ULTIMATE.start_main_#t~ite80#1=|v_ULTIMATE.start_main_#t~ite80#1_26|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_10, ~weak$$choice1~0=v_~weak$$choice1~0_71, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_45, ~__unbuffered_p1_EAX$read_delayed_var~0.base=v_~__unbuffered_p1_EAX$read_delayed_var~0.base_40, #memory_int=|v_#memory_int_220|, ULTIMATE.start_main_#t~ite79#1=|v_ULTIMATE.start_main_#t~ite79#1_24|, ULTIMATE.start_main_#t~mem78#1=|v_ULTIMATE.start_main_#t~mem78#1_27|}  AuxVars[|v_ULTIMATE.start_main_#t~ite79#1_30|, |v_ULTIMATE.start_main_#t~mem78#1_33|]  AssignedVars[~weak$$choice1~0, ULTIMATE.start_main_#t~nondet77#1, ~__unbuffered_p1_EAX~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite80#1, ULTIMATE.start_main_#t~ite79#1, ULTIMATE.start_main_#t~mem78#1] {4842#false} is VALID
[2022-02-20 20:28:16,107 INFO  L290        TraceCheckUtils]: 82: Hoare triple {4842#false} [1177] L844-->L845: Formula: true  InVars {}  OutVars{}  AuxVars[]  AssignedVars[] {4842#false} is VALID
[2022-02-20 20:28:16,107 INFO  L290        TraceCheckUtils]: 83: Hoare triple {4842#false} [1204] L845-->L845-1: Formula: (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression#1_1| (mod v_~main$tmp_guard1~0_3 256))  InVars {~main$tmp_guard1~0=v_~main$tmp_guard1~0_3}  OutVars{ULTIMATE.start___VERIFIER_assert_#in~expression#1=|v_ULTIMATE.start___VERIFIER_assert_#in~expression#1_1|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_3}  AuxVars[]  AssignedVars[ULTIMATE.start___VERIFIER_assert_#in~expression#1] {4842#false} is VALID
[2022-02-20 20:28:16,107 INFO  L290        TraceCheckUtils]: 84: Hoare triple {4842#false} [1127] L845-1-->L18: Formula: true  InVars {}  OutVars{ULTIMATE.start___VERIFIER_assert_~expression#1=|v_ULTIMATE.start___VERIFIER_assert_~expression#1_1|}  AuxVars[]  AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression#1] {4842#false} is VALID
[2022-02-20 20:28:16,108 INFO  L290        TraceCheckUtils]: 85: Hoare triple {4842#false} [1189] L18-->L18-1: Formula: (= |v_ULTIMATE.start___VERIFIER_assert_~expression#1_2| |v_ULTIMATE.start___VERIFIER_assert_#in~expression#1_2|)  InVars {ULTIMATE.start___VERIFIER_assert_#in~expression#1=|v_ULTIMATE.start___VERIFIER_assert_#in~expression#1_2|}  OutVars{ULTIMATE.start___VERIFIER_assert_#in~expression#1=|v_ULTIMATE.start___VERIFIER_assert_#in~expression#1_2|, ULTIMATE.start___VERIFIER_assert_~expression#1=|v_ULTIMATE.start___VERIFIER_assert_~expression#1_2|}  AuxVars[]  AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression#1] {4842#false} is VALID
[2022-02-20 20:28:16,108 INFO  L290        TraceCheckUtils]: 86: Hoare triple {4842#false} [1156] L18-1-->L18-2: Formula: (= |v_ULTIMATE.start___VERIFIER_assert_~expression#1_3| 0)  InVars {ULTIMATE.start___VERIFIER_assert_~expression#1=|v_ULTIMATE.start___VERIFIER_assert_~expression#1_3|}  OutVars{ULTIMATE.start___VERIFIER_assert_~expression#1=|v_ULTIMATE.start___VERIFIER_assert_~expression#1_3|}  AuxVars[]  AssignedVars[] {4842#false} is VALID
[2022-02-20 20:28:16,108 INFO  L290        TraceCheckUtils]: 87: Hoare triple {4842#false} [1145] L18-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true  InVars {}  OutVars{}  AuxVars[]  AssignedVars[] {4842#false} is VALID
[2022-02-20 20:28:16,110 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2022-02-20 20:28:16,110 INFO  L144   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2022-02-20 20:28:16,110 INFO  L338   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1167238474]
[2022-02-20 20:28:16,110 INFO  L165   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1167238474] provided 1 perfect and 0 imperfect interpolant sequences
[2022-02-20 20:28:16,110 INFO  L191   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2022-02-20 20:28:16,110 INFO  L204   FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7
[2022-02-20 20:28:16,111 INFO  L118   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1438394452]
[2022-02-20 20:28:16,111 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2022-02-20 20:28:16,111 INFO  L78                 Accepts]: Start accepts. Automaton has  has 7 states, 7 states have (on average 12.571428571428571) internal successors, (88), 7 states have internal predecessors, (88), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 88
[2022-02-20 20:28:16,112 INFO  L84                 Accepts]: Finished accepts. word is accepted.
[2022-02-20 20:28:16,112 INFO  L86        InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with  has 7 states, 7 states have (on average 12.571428571428571) internal successors, (88), 7 states have internal predecessors, (88), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-02-20 20:28:16,175 INFO  L122       InductivityCheck]: Floyd-Hoare automaton has 88 edges. 88 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. 
[2022-02-20 20:28:16,176 INFO  L546      AbstractCegarLoop]: INTERPOLANT automaton has 7 states
[2022-02-20 20:28:16,176 INFO  L108   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2022-02-20 20:28:16,179 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants.
[2022-02-20 20:28:16,179 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42
[2022-02-20 20:28:16,179 INFO  L499   CegarLoopForPetriNet]: Number of universal loopers: 90 out of 112
[2022-02-20 20:28:16,180 INFO  L92    encePairwiseOnDemand]: Start differencePairwiseOnDemand. First operand has 118 places, 97 transitions, 246 flow. Second operand  has 7 states, 7 states have (on average 92.0) internal successors, (644), 7 states have internal predecessors, (644), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-02-20 20:28:16,181 INFO  L101   encePairwiseOnDemand]: Universal subtrahend loopers provided by user.
[2022-02-20 20:28:16,181 INFO  L102   encePairwiseOnDemand]: Number of universal subtrahend loopers: 90 of 112
[2022-02-20 20:28:16,181 INFO  L74            FinitePrefix]: Start finitePrefix. Operand will be constructed on-demand
[2022-02-20 20:28:16,560 INFO  L129       PetriNetUnfolder]: 25/165 cut-off events.
[2022-02-20 20:28:16,561 INFO  L130       PetriNetUnfolder]: For 87/87 co-relation queries the response was YES.
[2022-02-20 20:28:16,561 INFO  L84            FinitePrefix]: Finished finitePrefix Result has 339 conditions, 165 events. 25/165 cut-off events. For 87/87 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 314 event pairs, 2 based on Foata normal form. 6/170 useless extension candidates. Maximal degree in co-relation 313. Up to 23 conditions per place. 
[2022-02-20 20:28:16,561 INFO  L132   encePairwiseOnDemand]: 104/112 looper letters, 15 selfloop transitions, 7 changer transitions 17/117 dead transitions.
[2022-02-20 20:28:16,562 INFO  L138   encePairwiseOnDemand]: Finished differencePairwiseOnDemand. Result has 121 places, 117 transitions, 407 flow
[2022-02-20 20:28:16,562 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. 
[2022-02-20 20:28:16,562 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 10 states.
[2022-02-20 20:28:16,568 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 941 transitions.
[2022-02-20 20:28:16,569 INFO  L544   CegarLoopForPetriNet]: DFA transition density 0.8401785714285714
[2022-02-20 20:28:16,569 INFO  L72            ComplementDD]: Start complementDD. Operand 10 states and 941 transitions.
[2022-02-20 20:28:16,569 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 10 states and 941 transitions.
[2022-02-20 20:28:16,569 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2022-02-20 20:28:16,569 INFO  L117    ReachableStatesCopy]: Start reachableStatesCopy. Operand 10 states and 941 transitions.
[2022-02-20 20:28:16,571 INFO  L343    DoubleDeckerVisitor]: Before removal of dead ends  has 11 states, 10 states have (on average 94.1) internal successors, (941), 10 states have internal predecessors, (941), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-02-20 20:28:16,572 INFO  L131    ReachableStatesCopy]: Finished reachableStatesCopy Result  has 11 states, 11 states have (on average 112.0) internal successors, (1232), 11 states have internal predecessors, (1232), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-02-20 20:28:16,573 INFO  L81            ComplementDD]: Finished complementDD. Result  has 11 states, 11 states have (on average 112.0) internal successors, (1232), 11 states have internal predecessors, (1232), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-02-20 20:28:16,573 INFO  L186             Difference]: Start difference. First operand has 118 places, 97 transitions, 246 flow. Second operand 10 states and 941 transitions.
[2022-02-20 20:28:16,573 INFO  L82        GeneralOperation]: Start removeRedundantFlow. Operand has 121 places, 117 transitions, 407 flow
[2022-02-20 20:28:17,117 INFO  L88        GeneralOperation]: Finished removeRedundantFlow, result has has 115 places, 117 transitions, 368 flow, removed 14 selfloop flow, removed 6 redundant places.
[2022-02-20 20:28:17,119 INFO  L242             Difference]: Finished difference. Result has 121 places, 97 transitions, 258 flow
[2022-02-20 20:28:17,119 INFO  L317   CegarLoopForPetriNet]: {PETRI_ALPHABET=112, PETRI_DIFFERENCE_MINUEND_FLOW=225, PETRI_DIFFERENCE_MINUEND_PLACES=106, PETRI_DIFFERENCE_MINUEND_TRANSITIONS=97, PETRI_DIFFERENCE_SUBTRAHEND_LETTERS_WITH_MORE_CHANGERS_THAN_LOOPERS=7, PETRI_DIFFERENCE_SUBTRAHEND_LOOPER_ONLY_LETTERS=90, PETRI_DIFFERENCE_SUBTRAHEND_STATES=10, PETRI_FLOW=258, PETRI_PLACES=121, PETRI_TRANSITIONS=97}
[2022-02-20 20:28:17,120 INFO  L334   CegarLoopForPetriNet]: 115 programPoint places, 6 predicate places.
[2022-02-20 20:28:17,120 INFO  L111   iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 121 places, 97 transitions, 258 flow
[2022-02-20 20:28:17,125 INFO  L133   iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result  has 344 states, 343 states have (on average 2.0787172011661808) internal successors, (713), 343 states have internal predecessors, (713), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-02-20 20:28:17,126 INFO  L78                 Accepts]: Start accepts. Automaton has  has 344 states, 343 states have (on average 2.0787172011661808) internal successors, (713), 343 states have internal predecessors, (713), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 88
[2022-02-20 20:28:17,126 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2022-02-20 20:28:17,126 INFO  L470      AbstractCegarLoop]: Abstraction has has 121 places, 97 transitions, 258 flow
[2022-02-20 20:28:17,126 INFO  L471      AbstractCegarLoop]: INTERPOLANT automaton has  has 7 states, 7 states have (on average 92.0) internal successors, (644), 7 states have internal predecessors, (644), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-02-20 20:28:17,127 INFO  L246   CegarLoopForPetriNet]: Found error trace
[2022-02-20 20:28:17,127 INFO  L254   CegarLoopForPetriNet]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2022-02-20 20:28:17,127 WARN  L452      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4
[2022-02-20 20:28:17,127 INFO  L402      AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATION (and 2 more)] ===
[2022-02-20 20:28:17,127 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2022-02-20 20:28:17,128 INFO  L85        PathProgramCache]: Analyzing trace with hash 1888544377, now seen corresponding path program 1 times
[2022-02-20 20:28:17,128 INFO  L126   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2022-02-20 20:28:17,128 INFO  L338   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [566416689]
[2022-02-20 20:28:17,128 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2022-02-20 20:28:17,128 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2022-02-20 20:28:17,243 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2022-02-20 20:28:17,243 INFO  L352             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2022-02-20 20:28:17,342 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2022-02-20 20:28:17,381 INFO  L138   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2022-02-20 20:28:17,381 INFO  L628         BasicCegarLoop]: Counterexample is feasible
[2022-02-20 20:28:17,382 INFO  L764   garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (4 of 5 remaining)
[2022-02-20 20:28:17,383 INFO  L764   garLoopResultBuilder]: Registering result UNKNOWN for location P0Err0ASSERT_VIOLATIONERROR_FUNCTION (3 of 5 remaining)
[2022-02-20 20:28:17,383 INFO  L764   garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr0INUSE_VIOLATION (2 of 5 remaining)
[2022-02-20 20:28:17,385 INFO  L764   garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr1INUSE_VIOLATION (1 of 5 remaining)
[2022-02-20 20:28:17,385 INFO  L764   garLoopResultBuilder]: Registering result UNKNOWN for location P0Err0ASSERT_VIOLATIONERROR_FUNCTION (0 of 5 remaining)
[2022-02-20 20:28:17,385 WARN  L452      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5
[2022-02-20 20:28:17,388 INFO  L732         BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1]
[2022-02-20 20:28:17,392 INFO  L230   ceAbstractionStarter]: Analysis of concurrent program completed with 1 thread instances
[2022-02-20 20:28:17,392 INFO  L180   ceAbstractionStarter]: Computing trace abstraction results
[2022-02-20 20:28:17,553 INFO  L202        PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 20.02 08:28:17 BasicIcfg
[2022-02-20 20:28:17,553 INFO  L132        PluginConnector]: ------------------------ END TraceAbstraction----------------------------
[2022-02-20 20:28:17,554 INFO  L113        PluginConnector]: ------------------------Witness Printer----------------------------
[2022-02-20 20:28:17,554 INFO  L271        PluginConnector]: Initializing Witness Printer...
[2022-02-20 20:28:17,554 INFO  L275        PluginConnector]: Witness Printer initialized
[2022-02-20 20:28:17,555 INFO  L185        PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 08:28:08" (3/4) ...
[2022-02-20 20:28:17,556 INFO  L131         WitnessPrinter]: Generating witness for reachability counterexample
[2022-02-20 20:28:17,667 INFO  L141         WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml
[2022-02-20 20:28:17,668 INFO  L132        PluginConnector]: ------------------------ END Witness Printer----------------------------
[2022-02-20 20:28:17,669 INFO  L158              Benchmark]: Toolchain (without parser) took 11048.03ms. Allocated memory was 111.1MB in the beginning and 570.4MB in the end (delta: 459.3MB). Free memory was 71.0MB in the beginning and 469.2MB in the end (delta: -398.2MB). Peak memory consumption was 59.4MB. Max. memory is 16.1GB.
[2022-02-20 20:28:17,669 INFO  L158              Benchmark]: CDTParser took 0.17ms. Allocated memory is still 111.1MB. Free memory was 88.8MB in the beginning and 88.8MB in the end (delta: 49.1kB). There was no memory consumed. Max. memory is 16.1GB.
[2022-02-20 20:28:17,669 INFO  L158              Benchmark]: CACSL2BoogieTranslator took 481.90ms. Allocated memory is still 111.1MB. Free memory was 70.8MB in the beginning and 68.5MB in the end (delta: 2.3MB). Peak memory consumption was 8.7MB. Max. memory is 16.1GB.
[2022-02-20 20:28:17,670 INFO  L158              Benchmark]: Boogie Procedure Inliner took 60.70ms. Allocated memory is still 111.1MB. Free memory was 68.5MB in the beginning and 65.6MB in the end (delta: 3.0MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB.
[2022-02-20 20:28:17,670 INFO  L158              Benchmark]: Boogie Preprocessor took 25.69ms. Allocated memory is still 111.1MB. Free memory was 65.6MB in the beginning and 62.7MB in the end (delta: 2.8MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB.
[2022-02-20 20:28:17,670 INFO  L158              Benchmark]: RCFGBuilder took 1068.26ms. Allocated memory was 111.1MB in the beginning and 146.8MB in the end (delta: 35.7MB). Free memory was 62.5MB in the beginning and 48.3MB in the end (delta: 14.2MB). Peak memory consumption was 55.1MB. Max. memory is 16.1GB.
[2022-02-20 20:28:17,670 INFO  L158              Benchmark]: TraceAbstraction took 9290.97ms. Allocated memory was 146.8MB in the beginning and 570.4MB in the end (delta: 423.6MB). Free memory was 48.3MB in the beginning and 524.7MB in the end (delta: -476.4MB). Peak memory consumption was 282.1MB. Max. memory is 16.1GB.
[2022-02-20 20:28:17,671 INFO  L158              Benchmark]: Witness Printer took 113.81ms. Allocated memory is still 570.4MB. Free memory was 524.7MB in the beginning and 469.2MB in the end (delta: 55.6MB). Peak memory consumption was 54.5MB. Max. memory is 16.1GB.
[2022-02-20 20:28:17,672 INFO  L339   ainManager$Toolchain]: #######################  End [Toolchain 1] #######################
 --- Results ---
 * Results from de.uni_freiburg.informatik.ultimate.core:
  - AssertionsEnabledResult: Assertions are enabled
    Assertions are enabled
  - StatisticsResult: Toolchain Benchmarks
    Benchmark results are:
 * CDTParser took 0.17ms. Allocated memory is still 111.1MB. Free memory was 88.8MB in the beginning and 88.8MB in the end (delta: 49.1kB). There was no memory consumed. Max. memory is 16.1GB.
 * CACSL2BoogieTranslator took 481.90ms. Allocated memory is still 111.1MB. Free memory was 70.8MB in the beginning and 68.5MB in the end (delta: 2.3MB). Peak memory consumption was 8.7MB. Max. memory is 16.1GB.
 * Boogie Procedure Inliner took 60.70ms. Allocated memory is still 111.1MB. Free memory was 68.5MB in the beginning and 65.6MB in the end (delta: 3.0MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB.
 * Boogie Preprocessor took 25.69ms. Allocated memory is still 111.1MB. Free memory was 65.6MB in the beginning and 62.7MB in the end (delta: 2.8MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB.
 * RCFGBuilder took 1068.26ms. Allocated memory was 111.1MB in the beginning and 146.8MB in the end (delta: 35.7MB). Free memory was 62.5MB in the beginning and 48.3MB in the end (delta: 14.2MB). Peak memory consumption was 55.1MB. Max. memory is 16.1GB.
 * TraceAbstraction took 9290.97ms. Allocated memory was 146.8MB in the beginning and 570.4MB in the end (delta: 423.6MB). Free memory was 48.3MB in the beginning and 524.7MB in the end (delta: -476.4MB). Peak memory consumption was 282.1MB. Max. memory is 16.1GB.
 * Witness Printer took 113.81ms. Allocated memory is still 570.4MB. Free memory was 524.7MB in the beginning and 469.2MB in the end (delta: 55.6MB). Peak memory consumption was 54.5MB. Max. memory is 16.1GB.
 * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction:
  - StatisticsResult: ErrorAutomatonStatistics
    NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0
  - CounterExampleResult [Line: 18]: a call to reach_error is reachable
    a call to reach_error is reachable
We found a FailurePath: 
[L708]               0  int __unbuffered_cnt = 0;
        VAL             [__unbuffered_cnt=0]
[L710]               0  int __unbuffered_p0_EAX = 0;
        VAL             [__unbuffered_cnt=0, __unbuffered_p0_EAX=0]
[L712]               0  int __unbuffered_p1_EAX = 0;
        VAL             [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0]
[L713]               0  _Bool __unbuffered_p1_EAX$flush_delayed;
        VAL             [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0]
[L714]               0  int __unbuffered_p1_EAX$mem_tmp;
        VAL             [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0]
[L715]               0  _Bool __unbuffered_p1_EAX$r_buff0_thd0;
        VAL             [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0]
[L716]               0  _Bool __unbuffered_p1_EAX$r_buff0_thd1;
        VAL             [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0]
[L717]               0  _Bool __unbuffered_p1_EAX$r_buff0_thd2;
        VAL             [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0]
[L718]               0  _Bool __unbuffered_p1_EAX$r_buff1_thd0;
        VAL             [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0]
[L719]               0  _Bool __unbuffered_p1_EAX$r_buff1_thd1;
        VAL             [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0]
[L720]               0  _Bool __unbuffered_p1_EAX$r_buff1_thd2;
        VAL             [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0]
[L721]               0  _Bool __unbuffered_p1_EAX$read_delayed;
        VAL             [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0]
[L722]               0  int *__unbuffered_p1_EAX$read_delayed_var;
        VAL             [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}]
[L723]               0  int __unbuffered_p1_EAX$w_buff0;
        VAL             [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0]
[L724]               0  _Bool __unbuffered_p1_EAX$w_buff0_used;
        VAL             [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0]
[L725]               0  int __unbuffered_p1_EAX$w_buff1;
        VAL             [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0]
[L726]               0  _Bool __unbuffered_p1_EAX$w_buff1_used;
        VAL             [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0]
[L727]               0  _Bool main$tmp_guard0;
        VAL             [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0]
[L728]               0  _Bool main$tmp_guard1;
        VAL             [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0]
[L730]               0  int x = 0;
        VAL             [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={3:0}]
[L731]               0  _Bool x$flush_delayed;
        VAL             [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={3:0}, x$flush_delayed=0]
[L732]               0  int x$mem_tmp;
        VAL             [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={3:0}, x$flush_delayed=0, x$mem_tmp=0]
[L733]               0  _Bool x$r_buff0_thd0;
        VAL             [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0]
[L734]               0  _Bool x$r_buff0_thd1;
        VAL             [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0]
[L735]               0  _Bool x$r_buff0_thd2;
        VAL             [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0]
[L736]               0  _Bool x$r_buff1_thd0;
        VAL             [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0]
[L737]               0  _Bool x$r_buff1_thd1;
        VAL             [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0]
[L738]               0  _Bool x$r_buff1_thd2;
        VAL             [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0]
[L739]               0  _Bool x$read_delayed;
        VAL             [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0]
[L740]               0  int *x$read_delayed_var;
        VAL             [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}]
[L741]               0  int x$w_buff0;
        VAL             [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0]
[L742]               0  _Bool x$w_buff0_used;
        VAL             [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0]
[L743]               0  int x$w_buff1;
        VAL             [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0]
[L744]               0  _Bool x$w_buff1_used;
        VAL             [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0]
[L746]               0  int y = 0;
        VAL             [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0]
[L747]               0  _Bool weak$$choice0;
        VAL             [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0]
[L748]               0  _Bool weak$$choice1;
        VAL             [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0]
[L749]               0  _Bool weak$$choice2;
        VAL             [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0]
[L825]               0  pthread_t t1923;
        VAL             [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, t1923={7:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0]
[L826]  FCALL, FORK  0  pthread_create(&t1923, ((void *)0), P0, ((void *)0))
        VAL             [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, pthread_create(&t1923, ((void *)0), P0, ((void *)0))=0, t1923={7:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0]
[L827]               0  pthread_t t1924;
        VAL             [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, t1923={7:0}, t1924={5:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0]
[L828]  FCALL, FORK  0  pthread_create(&t1924, ((void *)0), P1, ((void *)0))
        VAL             [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, pthread_create(&t1924, ((void *)0), P1, ((void *)0))=1, t1923={7:0}, t1924={5:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0]
[L781]               2  weak$$choice0 = __VERIFIER_nondet_bool()
[L782]               2  weak$$choice2 = __VERIFIER_nondet_bool()
[L783]               2  x$flush_delayed = weak$$choice2
[L784]  EXPR         2  \read(x)
[L784]               2  x$mem_tmp = x
[L785]               2  weak$$choice1 = __VERIFIER_nondet_bool()
[L786]  EXPR         2  !x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x))))
[L786]  EXPR         2  \read(x)
[L786]  EXPR         2  !x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x))))
[L786]               2  x = !x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x))))
[L787]  EXPR         2  weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : x$w_buff0))))
[L787]               2  x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : x$w_buff0))))
[L788]  EXPR         2  weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : x$w_buff1))))
[L788]               2  x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : x$w_buff1))))
[L789]  EXPR         2  weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 || !weak$$choice1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : weak$$choice0))))
[L789]               2  x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 || !weak$$choice1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : weak$$choice0))))
[L790]  EXPR         2  weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))))
[L790]               2  x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))))
[L791]  EXPR         2  weak$$choice2 ? x$r_buff0_thd2 : (!x$w_buff0_used ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))))
[L791]               2  x$r_buff0_thd2 = weak$$choice2 ? x$r_buff0_thd2 : (!x$w_buff0_used ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))))
[L792]  EXPR         2  weak$$choice2 ? x$r_buff1_thd2 : (!x$w_buff0_used ? x$r_buff1_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$r_buff1_thd2 : (_Bool)0) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))))
[L792]               2  x$r_buff1_thd2 = weak$$choice2 ? x$r_buff1_thd2 : (!x$w_buff0_used ? x$r_buff1_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$r_buff1_thd2 : (_Bool)0) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))))
[L793]               2  __unbuffered_p1_EAX$read_delayed = (_Bool)1
[L794]               2  __unbuffered_p1_EAX$read_delayed_var = &x
[L795]  EXPR         2  \read(x)
[L795]               2  __unbuffered_p1_EAX = x
[L796]  EXPR         2  x$flush_delayed ? x$mem_tmp : x
[L796]               2  x = x$flush_delayed ? x$mem_tmp : x
[L797]               2  x$flush_delayed = (_Bool)0
        VAL             [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={3:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=255, weak$$choice2=255, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0]
[L800]               2  y = 1
        VAL             [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={3:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=255, weak$$choice2=255, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1]
[L753]               1  __unbuffered_p0_EAX = y
        VAL             [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={3:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=255, weak$$choice2=255, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1]
[L756]               1  x$w_buff1 = x$w_buff0
[L757]               1  x$w_buff0 = 1
[L758]               1  x$w_buff1_used = x$w_buff0_used
[L759]               1  x$w_buff0_used = (_Bool)1
[L760]  CALL         1  __VERIFIER_assert(!(x$w_buff1_used && x$w_buff0_used))
[L18]   COND FALSE   1  !(!expression)
[L760]  RET          1  __VERIFIER_assert(!(x$w_buff1_used && x$w_buff0_used))
[L761]               1  x$r_buff1_thd0 = x$r_buff0_thd0
[L762]               1  x$r_buff1_thd1 = x$r_buff0_thd1
[L763]               1  x$r_buff1_thd2 = x$r_buff0_thd2
[L764]               1  x$r_buff0_thd1 = (_Bool)1
        VAL             [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={3:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=255, weak$$choice2=255, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1]
[L803]  EXPR         2  x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x)
[L803]  EXPR         2  x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x
[L803]  EXPR         2  \read(x)
[L803]  EXPR         2  x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x
[L803]  EXPR         2  x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x)
[L803]               2  x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x)
[L804]  EXPR         2  x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used
[L804]               2  x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used
[L805]  EXPR         2  x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used
[L805]               2  x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used
[L806]  EXPR         2  x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2
[L806]               2  x$r_buff0_thd2 = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2
[L807]  EXPR         2  x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2
[L807]               2  x$r_buff1_thd2 = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2
[L767]  EXPR         1  x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x)
[L767]               1  x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x)
[L768]  EXPR         1  x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used
[L768]               1  x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used
[L769]  EXPR         1  x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used
[L769]               1  x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used
[L770]  EXPR         1  x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1
[L770]               1  x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1
[L771]  EXPR         1  x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1
[L771]               1  x$r_buff1_thd1 = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1
[L810]               2  __unbuffered_cnt = __unbuffered_cnt + 1
        VAL             [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={3:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=255, weak$$choice2=255, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1]
[L774]               1  __unbuffered_cnt = __unbuffered_cnt + 1
        VAL             [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={3:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=255, weak$$choice2=255, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1]
[L830]               0  main$tmp_guard0 = __unbuffered_cnt == 2
        VAL             [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={3:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, t1923={7:0}, t1924={5:0}, weak$$choice0=0, weak$$choice1=255, weak$$choice2=255, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1]
[L832]  CALL         0  assume_abort_if_not(main$tmp_guard0)
[L3]    COND FALSE   0  !(!cond)
        VAL             [\old(cond)=1, __unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={3:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, cond=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=255, weak$$choice2=255, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1]
[L832]  RET          0  assume_abort_if_not(main$tmp_guard0)
[L834]  EXPR         0  x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x)
[L834]  EXPR         0  x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x
[L834]  EXPR         0  \read(x)
[L834]  EXPR         0  x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x
[L834]  EXPR         0  x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x)
[L834]               0  x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x)
[L835]  EXPR         0  x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used
[L835]               0  x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used
[L836]  EXPR         0  x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used
[L836]               0  x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used
[L837]  EXPR         0  x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0
[L837]               0  x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0
[L838]  EXPR         0  x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0
[L838]               0  x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0
[L841]               0  weak$$choice1 = __VERIFIER_nondet_bool()
[L842]  EXPR         0  __unbuffered_p1_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX) : __unbuffered_p1_EAX
[L842]  EXPR         0  weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX
[L842]  EXPR         0  \read(*__unbuffered_p1_EAX$read_delayed_var)
[L842]  EXPR         0  weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX
[L842]  EXPR         0  __unbuffered_p1_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX) : __unbuffered_p1_EAX
[L842]               0  __unbuffered_p1_EAX = __unbuffered_p1_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX) : __unbuffered_p1_EAX
[L843]               0  main$tmp_guard1 = !(__unbuffered_p0_EAX == 1 && __unbuffered_p1_EAX == 1)
        VAL             [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={3:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, t1923={7:0}, t1924={5:0}, weak$$choice0=0, weak$$choice1=1, weak$$choice2=255, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1]
[L845]  CALL         0  __VERIFIER_assert(main$tmp_guard1)
[L18]   COND TRUE    0  !expression
        VAL             [\old(expression)=1, \old(expression)=0, __unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={3:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, expression=1, expression=0, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=255, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1]
[L18]                0  reach_error()
        VAL             [\old(expression)=1, \old(expression)=0, __unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={3:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, expression=1, expression=0, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=255, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1]

  - UnprovableResult [Line: 18]: Unable to prove that call to reach_error is unreachable
    Unable to prove that call to reach_error is unreachable
 Reason: Not analyzed. 
  - UnprovableResult [Line: 826]: Unable to prove that petrification did provide enough thread instances (tool internal message, not intended for end users)
    Unable to prove that petrification did provide enough thread instances (tool internal message, not intended for end users)
 Reason: Not analyzed. 
  - UnprovableResult [Line: 828]: Unable to prove that petrification did provide enough thread instances (tool internal message, not intended for end users)
    Unable to prove that petrification did provide enough thread instances (tool internal message, not intended for end users)
 Reason: Not analyzed. 
  - StatisticsResult: Ultimate Automizer benchmark data with 1 thread instances
    CFG has 5 procedures, 130 locations, 5 error locations. Started 1 CEGAR loops. EmptinessCheckTime: 0.0s, RemoveRedundantFlowTime: 0.0s, RemoveRedundantFlowUnfoldingTime: 0.0s, BackfoldingTime: 0.0s, BackfoldingUnfoldingTime: 0.0s, FlowIncreaseByBackfolding: 0, BasicCegarLoop: OverallTime: 9.0s, OverallIterations: 6, TraceHistogramMax: 1, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.0s, AutomataDifference: 6.9s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.1s, PartialOrderReductionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 191 SdHoareTripleChecker+Valid, 0.6s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 191 mSDsluCounter, 110 SdHoareTripleChecker+Invalid, 0.6s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 349 mSDsCounter, 26 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 405 IncrementalHoareTripleChecker+Invalid, 431 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 26 mSolverCounterUnsat, 26 mSDtfsCounter, 405 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 51 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=258occurred in iteration=5, InterpolantAutomatonStates: 42, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 0.7s InterpolantComputationTime, 489 NumberOfCodeBlocks, 489 NumberOfCodeBlocksAsserted, 6 NumberOfCheckSat, 393 ConstructedInterpolants, 0 QuantifiedInterpolants, 1023 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 5 InterpolantComputations, 5 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available
RESULT: Ultimate proved your program to be incorrect!
[2022-02-20 20:28:17,711 INFO  L540       MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0
Received shutdown request...
--- End real Ultimate output ---

Execution finished normally
Writing output log to file Ultimate.log
Writing human readable error path to file UltimateCounterExample.errorpath
Result:
FALSE