./Ultimate.py --spec ../../sv-benchmarks/c/Systems_DeviceDriversLinux64_ReachSafety.prp --file ../../sv-benchmarks/c/ldv-validator-v0.6/linux-stable-9ec4f65-1-110_1a-drivers--rtc--rtc-tegra.ko-entry_point_false-unreach-call.cil.out.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 1dbac8bc Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_c7d63139-fda8-41e1-9b7d-e39bfe832df2/bin-2019/ukojak/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_c7d63139-fda8-41e1-9b7d-e39bfe832df2/bin-2019/ukojak/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_c7d63139-fda8-41e1-9b7d-e39bfe832df2/bin-2019/ukojak/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_c7d63139-fda8-41e1-9b7d-e39bfe832df2/bin-2019/ukojak/config/KojakReach.xml -i ../../sv-benchmarks/c/ldv-validator-v0.6/linux-stable-9ec4f65-1-110_1a-drivers--rtc--rtc-tegra.ko-entry_point_false-unreach-call.cil.out.c -s /tmp/vcloud-vcloud-master/worker/working_dir_c7d63139-fda8-41e1-9b7d-e39bfe832df2/bin-2019/ukojak/config/svcomp-Reach-64bit-Kojak_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_c7d63139-fda8-41e1-9b7d-e39bfe832df2/bin-2019/ukojak --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Kojak --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 62bcb163bcd8d8adcc467bfe735fb02012bcbb37 ...................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_c7d63139-fda8-41e1-9b7d-e39bfe832df2/bin-2019/ukojak/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_c7d63139-fda8-41e1-9b7d-e39bfe832df2/bin-2019/ukojak/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_c7d63139-fda8-41e1-9b7d-e39bfe832df2/bin-2019/ukojak/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_c7d63139-fda8-41e1-9b7d-e39bfe832df2/bin-2019/ukojak/config/KojakReach.xml -i ../../sv-benchmarks/c/ldv-validator-v0.6/linux-stable-9ec4f65-1-110_1a-drivers--rtc--rtc-tegra.ko-entry_point_false-unreach-call.cil.out.c -s /tmp/vcloud-vcloud-master/worker/working_dir_c7d63139-fda8-41e1-9b7d-e39bfe832df2/bin-2019/ukojak/config/svcomp-Reach-64bit-Kojak_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_c7d63139-fda8-41e1-9b7d-e39bfe832df2/bin-2019/ukojak --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Kojak --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 62bcb163bcd8d8adcc467bfe735fb02012bcbb37 ......................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Result: ERROR: ExceptionOrErrorResult: IllegalArgumentException: Indexed Sort BitVec undefined --- Real Ultimate output --- This is Ultimate 0.1.23-1dbac8b [2018-11-10 07:19:09,781 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-10 07:19:09,782 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-10 07:19:09,790 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-10 07:19:09,790 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-10 07:19:09,791 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-10 07:19:09,792 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-10 07:19:09,793 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-10 07:19:09,794 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-10 07:19:09,795 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-10 07:19:09,795 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-10 07:19:09,796 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-10 07:19:09,796 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-10 07:19:09,797 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-10 07:19:09,798 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-10 07:19:09,798 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-10 07:19:09,799 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-10 07:19:09,800 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-10 07:19:09,801 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-10 07:19:09,802 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-10 07:19:09,803 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-10 07:19:09,804 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-10 07:19:09,805 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-10 07:19:09,806 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-10 07:19:09,806 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-10 07:19:09,808 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-10 07:19:09,809 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-10 07:19:09,809 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-10 07:19:09,810 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-10 07:19:09,811 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-10 07:19:09,811 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-10 07:19:09,811 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-10 07:19:09,811 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-10 07:19:09,812 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-10 07:19:09,812 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-10 07:19:09,813 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-10 07:19:09,813 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_c7d63139-fda8-41e1-9b7d-e39bfe832df2/bin-2019/ukojak/config/svcomp-Reach-64bit-Kojak_Default.epf [2018-11-10 07:19:09,823 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-10 07:19:09,823 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-10 07:19:09,824 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-10 07:19:09,824 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-11-10 07:19:09,824 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-10 07:19:09,825 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-10 07:19:09,825 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-10 07:19:09,825 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-10 07:19:09,825 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-10 07:19:09,825 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-10 07:19:09,825 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-10 07:19:09,825 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-10 07:19:09,826 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-10 07:19:09,826 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-10 07:19:09,826 INFO L131 SettingsManager]: Preferences of CodeCheck differ from their defaults: [2018-11-10 07:19:09,826 INFO L133 SettingsManager]: * Timeout in seconds=1000000 [2018-11-10 07:19:09,826 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-10 07:19:09,826 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-10 07:19:09,827 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 [2018-11-10 07:19:09,827 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-10 07:19:09,827 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-10 07:19:09,827 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-10 07:19:09,827 INFO L133 SettingsManager]: * Trace refinement strategy=PENGUIN [2018-11-10 07:19:09,827 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-10 07:19:09,827 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-10 07:19:09,827 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-10 07:19:09,828 INFO L133 SettingsManager]: * To the following directory=dump/ Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_c7d63139-fda8-41e1-9b7d-e39bfe832df2/bin-2019/ukojak Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Kojak Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 62bcb163bcd8d8adcc467bfe735fb02012bcbb37 [2018-11-10 07:19:09,850 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-10 07:19:09,858 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-10 07:19:09,860 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-10 07:19:09,861 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-10 07:19:09,861 INFO L276 PluginConnector]: CDTParser initialized [2018-11-10 07:19:09,862 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_c7d63139-fda8-41e1-9b7d-e39bfe832df2/bin-2019/ukojak/../../sv-benchmarks/c/ldv-validator-v0.6/linux-stable-9ec4f65-1-110_1a-drivers--rtc--rtc-tegra.ko-entry_point_false-unreach-call.cil.out.c [2018-11-10 07:19:09,898 INFO L218 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_c7d63139-fda8-41e1-9b7d-e39bfe832df2/bin-2019/ukojak/data/d7a0c5aca/7b2128e06ac34806b710ab623ddd7485/FLAGd4024ac31 [2018-11-10 07:19:10,389 INFO L298 CDTParser]: Found 1 translation units. [2018-11-10 07:19:10,389 INFO L158 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_c7d63139-fda8-41e1-9b7d-e39bfe832df2/sv-benchmarks/c/ldv-validator-v0.6/linux-stable-9ec4f65-1-110_1a-drivers--rtc--rtc-tegra.ko-entry_point_false-unreach-call.cil.out.c [2018-11-10 07:19:10,404 INFO L346 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_c7d63139-fda8-41e1-9b7d-e39bfe832df2/bin-2019/ukojak/data/d7a0c5aca/7b2128e06ac34806b710ab623ddd7485/FLAGd4024ac31 [2018-11-10 07:19:10,413 INFO L354 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_c7d63139-fda8-41e1-9b7d-e39bfe832df2/bin-2019/ukojak/data/d7a0c5aca/7b2128e06ac34806b710ab623ddd7485 [2018-11-10 07:19:10,415 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-10 07:19:10,415 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-10 07:19:10,416 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-10 07:19:10,416 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-10 07:19:10,418 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-10 07:19:10,419 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.11 07:19:10" (1/1) ... [2018-11-10 07:19:10,420 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@25f5db9c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:19:10, skipping insertion in model container [2018-11-10 07:19:10,420 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.11 07:19:10" (1/1) ... [2018-11-10 07:19:10,426 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-10 07:19:10,468 INFO L174 MainTranslator]: Built tables and reachable declarations [2018-11-10 07:19:11,039 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-11-10 07:19:11,120 INFO L189 MainTranslator]: Completed pre-run [2018-11-10 07:19:11,286 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-11-10 07:19:11,334 INFO L193 MainTranslator]: Completed translation [2018-11-10 07:19:11,335 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:19:11 WrapperNode [2018-11-10 07:19:11,335 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-10 07:19:11,335 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-10 07:19:11,335 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-10 07:19:11,335 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-10 07:19:11,342 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:19:11" (1/1) ... [2018-11-10 07:19:11,363 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:19:11" (1/1) ... [2018-11-10 07:19:11,393 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-10 07:19:11,394 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-10 07:19:11,394 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-10 07:19:11,394 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-10 07:19:11,402 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:19:11" (1/1) ... [2018-11-10 07:19:11,402 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:19:11" (1/1) ... [2018-11-10 07:19:11,408 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:19:11" (1/1) ... [2018-11-10 07:19:11,408 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:19:11" (1/1) ... [2018-11-10 07:19:11,424 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:19:11" (1/1) ... [2018-11-10 07:19:11,431 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:19:11" (1/1) ... [2018-11-10 07:19:11,435 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:19:11" (1/1) ... [2018-11-10 07:19:11,442 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-10 07:19:11,442 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-10 07:19:11,442 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-10 07:19:11,442 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-10 07:19:11,443 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:19:11" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c7d63139-fda8-41e1-9b7d-e39bfe832df2/bin-2019/ukojak/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 [2018-11-10 07:19:11,492 INFO L130 BoogieDeclarations]: Found specification of procedure dev_get_drvdata [2018-11-10 07:19:11,492 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-10 07:19:11,492 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_stop [2018-11-10 07:19:11,492 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_stop [2018-11-10 07:19:11,492 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-11-10 07:19:11,493 INFO L130 BoogieDeclarations]: Found specification of procedure rtc_time_to_tm [2018-11-10 07:19:11,493 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_proc [2018-11-10 07:19:11,493 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_proc [2018-11-10 07:19:11,493 INFO L130 BoogieDeclarations]: Found specification of procedure irq_set_irq_wake [2018-11-10 07:19:11,493 INFO L130 BoogieDeclarations]: Found specification of procedure outer_sync [2018-11-10 07:19:11,493 INFO L138 BoogieDeclarations]: Found implementation of procedure outer_sync [2018-11-10 07:19:11,493 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_remove [2018-11-10 07:19:11,494 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_remove [2018-11-10 07:19:11,494 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_shutdown [2018-11-10 07:19:11,494 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_shutdown [2018-11-10 07:19:11,494 INFO L130 BoogieDeclarations]: Found specification of procedure rtc_tm_to_time [2018-11-10 07:19:11,494 INFO L130 BoogieDeclarations]: Found specification of procedure __release_region [2018-11-10 07:19:11,495 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2018-11-10 07:19:11,495 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_set_alarm [2018-11-10 07:19:11,495 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_set_alarm [2018-11-10 07:19:11,495 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-11-10 07:19:11,495 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_error [2018-11-10 07:19:11,495 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_error [2018-11-10 07:19:11,495 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_spin_lock_check [2018-11-10 07:19:11,495 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_spin_lock_check [2018-11-10 07:19:11,495 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_alarm_irq_enable [2018-11-10 07:19:11,495 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_alarm_irq_enable [2018-11-10 07:19:11,496 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_iounmap [2018-11-10 07:19:11,496 INFO L130 BoogieDeclarations]: Found specification of procedure rtc_device_unregister [2018-11-10 07:19:11,496 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-11-10 07:19:11,496 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_irq_1 [2018-11-10 07:19:11,496 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_irq_1 [2018-11-10 07:19:11,496 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-11-10 07:19:11,496 INFO L130 BoogieDeclarations]: Found specification of procedure device_may_wakeup [2018-11-10 07:19:11,496 INFO L138 BoogieDeclarations]: Found implementation of procedure device_may_wakeup [2018-11-10 07:19:11,496 INFO L130 BoogieDeclarations]: Found specification of procedure spin_unlock_irqrestore [2018-11-10 07:19:11,496 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_unlock_irqrestore [2018-11-10 07:19:11,496 INFO L130 BoogieDeclarations]: Found specification of procedure platform_get_resource [2018-11-10 07:19:11,496 INFO L130 BoogieDeclarations]: Found specification of procedure platform_set_drvdata [2018-11-10 07:19:11,497 INFO L138 BoogieDeclarations]: Found implementation of procedure platform_set_drvdata [2018-11-10 07:19:11,497 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-10 07:19:11,497 INFO L130 BoogieDeclarations]: Found specification of procedure platform_get_drvdata [2018-11-10 07:19:11,497 INFO L138 BoogieDeclarations]: Found implementation of procedure platform_get_drvdata [2018-11-10 07:19:11,497 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_read_time [2018-11-10 07:19:11,497 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_read_time [2018-11-10 07:19:11,497 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_wait_while_busy [2018-11-10 07:19:11,497 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_wait_while_busy [2018-11-10 07:19:11,497 INFO L130 BoogieDeclarations]: Found specification of procedure resource_size [2018-11-10 07:19:11,497 INFO L138 BoogieDeclarations]: Found implementation of procedure resource_size [2018-11-10 07:19:11,498 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2018-11-10 07:19:11,498 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2018-11-10 07:19:11,498 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_set_time [2018-11-10 07:19:11,498 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_set_time [2018-11-10 07:19:11,498 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-10 07:19:11,498 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-10 07:19:14,844 INFO L341 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-10 07:19:14,845 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.11 07:19:14 BoogieIcfgContainer [2018-11-10 07:19:14,845 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-10 07:19:14,845 INFO L113 PluginConnector]: ------------------------CodeCheck---------------------------- [2018-11-10 07:19:14,845 INFO L271 PluginConnector]: Initializing CodeCheck... [2018-11-10 07:19:14,853 INFO L276 PluginConnector]: CodeCheck initialized [2018-11-10 07:19:14,854 INFO L185 PluginConnector]: Executing the observer CodeCheckObserver from plugin CodeCheck for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.11 07:19:14" (1/1) ... [2018-11-10 07:19:14,863 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:19:14,886 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:14,895 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 316 states to 222 states and 316 transitions. [2018-11-10 07:19:14,895 INFO L276 IsEmpty]: Start isEmpty. Operand 222 states and 316 transitions. [2018-11-10 07:19:14,901 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-11-10 07:19:14,901 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:15,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:15,101 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:19:15,223 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:15,226 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 349 states to 226 states and 349 transitions. [2018-11-10 07:19:15,226 INFO L276 IsEmpty]: Start isEmpty. Operand 226 states and 349 transitions. [2018-11-10 07:19:15,228 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-11-10 07:19:15,228 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:15,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:15,307 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:19:15,384 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:15,386 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 382 states to 229 states and 382 transitions. [2018-11-10 07:19:15,386 INFO L276 IsEmpty]: Start isEmpty. Operand 229 states and 382 transitions. [2018-11-10 07:19:15,389 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-11-10 07:19:15,390 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:15,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:15,440 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:19:15,614 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:15,616 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 416 states to 233 states and 416 transitions. [2018-11-10 07:19:15,616 INFO L276 IsEmpty]: Start isEmpty. Operand 233 states and 416 transitions. [2018-11-10 07:19:15,620 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-11-10 07:19:15,621 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:15,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:15,720 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:19:16,130 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:16,131 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 461 states to 240 states and 457 transitions. [2018-11-10 07:19:16,131 INFO L276 IsEmpty]: Start isEmpty. Operand 240 states and 457 transitions. [2018-11-10 07:19:16,133 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-11-10 07:19:16,133 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:16,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:16,205 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:19:16,487 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:16,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 495 states to 246 states and 491 transitions. [2018-11-10 07:19:16,489 INFO L276 IsEmpty]: Start isEmpty. Operand 246 states and 491 transitions. [2018-11-10 07:19:16,490 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-10 07:19:16,490 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:16,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:16,549 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:19:16,869 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:16,871 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 539 states to 254 states and 531 transitions. [2018-11-10 07:19:16,871 INFO L276 IsEmpty]: Start isEmpty. Operand 254 states and 531 transitions. [2018-11-10 07:19:16,872 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-11-10 07:19:16,872 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:16,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:16,948 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:19:17,547 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:17,549 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 582 states to 261 states and 570 transitions. [2018-11-10 07:19:17,549 INFO L276 IsEmpty]: Start isEmpty. Operand 261 states and 570 transitions. [2018-11-10 07:19:17,550 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-11-10 07:19:17,550 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:17,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:17,598 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 07:19:17,976 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:17,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 620 states to 266 states and 608 transitions. [2018-11-10 07:19:17,977 INFO L276 IsEmpty]: Start isEmpty. Operand 266 states and 608 transitions. [2018-11-10 07:19:17,978 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-11-10 07:19:17,978 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:17,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:18,010 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 07:19:18,226 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:18,227 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 654 states to 269 states and 642 transitions. [2018-11-10 07:19:18,227 INFO L276 IsEmpty]: Start isEmpty. Operand 269 states and 642 transitions. [2018-11-10 07:19:18,228 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-11-10 07:19:18,229 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:18,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:18,260 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 07:19:18,486 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:18,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 695 states to 274 states and 683 transitions. [2018-11-10 07:19:18,488 INFO L276 IsEmpty]: Start isEmpty. Operand 274 states and 683 transitions. [2018-11-10 07:19:18,489 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-11-10 07:19:18,489 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:18,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:18,561 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:19:19,232 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:19,233 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 737 states to 280 states and 721 transitions. [2018-11-10 07:19:19,233 INFO L276 IsEmpty]: Start isEmpty. Operand 280 states and 721 transitions. [2018-11-10 07:19:19,234 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-11-10 07:19:19,234 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:19,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:19,252 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-11-10 07:19:19,381 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:19,382 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 742 states to 283 states and 726 transitions. [2018-11-10 07:19:19,382 INFO L276 IsEmpty]: Start isEmpty. Operand 283 states and 726 transitions. [2018-11-10 07:19:19,383 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-11-10 07:19:19,383 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:19,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:19,404 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-10 07:19:19,475 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:19,476 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 744 states to 285 states and 728 transitions. [2018-11-10 07:19:19,476 INFO L276 IsEmpty]: Start isEmpty. Operand 285 states and 728 transitions. [2018-11-10 07:19:19,477 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-11-10 07:19:19,477 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:19,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:19,516 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:19:19,615 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:19,616 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 750 states to 288 states and 734 transitions. [2018-11-10 07:19:19,616 INFO L276 IsEmpty]: Start isEmpty. Operand 288 states and 734 transitions. [2018-11-10 07:19:19,617 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-11-10 07:19:19,617 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:19,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:19,729 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:19:19,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:19,822 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 737 states to 287 states and 721 transitions. [2018-11-10 07:19:19,822 INFO L276 IsEmpty]: Start isEmpty. Operand 287 states and 721 transitions. [2018-11-10 07:19:19,823 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-10 07:19:19,823 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:19,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:19,919 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:19:19,991 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:19,993 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 724 states to 286 states and 708 transitions. [2018-11-10 07:19:19,993 INFO L276 IsEmpty]: Start isEmpty. Operand 286 states and 708 transitions. [2018-11-10 07:19:19,994 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-10 07:19:19,994 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:20,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:20,015 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 07:19:20,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:20,284 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 730 states to 289 states and 714 transitions. [2018-11-10 07:19:20,284 INFO L276 IsEmpty]: Start isEmpty. Operand 289 states and 714 transitions. [2018-11-10 07:19:20,286 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-11-10 07:19:20,286 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:20,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:20,365 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:19:20,432 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:20,433 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 731 states to 290 states and 715 transitions. [2018-11-10 07:19:20,433 INFO L276 IsEmpty]: Start isEmpty. Operand 290 states and 715 transitions. [2018-11-10 07:19:20,435 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-11-10 07:19:20,435 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:20,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:20,563 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:19:21,140 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:21,141 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 770 states to 296 states and 754 transitions. [2018-11-10 07:19:21,141 INFO L276 IsEmpty]: Start isEmpty. Operand 296 states and 754 transitions. [2018-11-10 07:19:21,142 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-11-10 07:19:21,142 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:21,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:21,163 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 07:19:21,371 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:21,372 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 773 states to 298 states and 757 transitions. [2018-11-10 07:19:21,372 INFO L276 IsEmpty]: Start isEmpty. Operand 298 states and 757 transitions. [2018-11-10 07:19:21,373 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-11-10 07:19:21,373 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:21,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:21,389 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-11-10 07:19:21,477 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:21,478 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 776 states to 300 states and 760 transitions. [2018-11-10 07:19:21,478 INFO L276 IsEmpty]: Start isEmpty. Operand 300 states and 760 transitions. [2018-11-10 07:19:21,479 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-11-10 07:19:21,479 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:21,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:21,536 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:19:22,074 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:22,075 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 819 states to 305 states and 803 transitions. [2018-11-10 07:19:22,075 INFO L276 IsEmpty]: Start isEmpty. Operand 305 states and 803 transitions. [2018-11-10 07:19:22,076 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-11-10 07:19:22,076 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:22,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:22,089 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:19:22,276 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:22,276 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 845 states to 307 states and 829 transitions. [2018-11-10 07:19:22,276 INFO L276 IsEmpty]: Start isEmpty. Operand 307 states and 829 transitions. [2018-11-10 07:19:22,277 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-11-10 07:19:22,277 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:22,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:22,300 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 07:19:23,106 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:23,107 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 887 states to 315 states and 870 transitions. [2018-11-10 07:19:23,107 INFO L276 IsEmpty]: Start isEmpty. Operand 315 states and 870 transitions. [2018-11-10 07:19:23,108 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-11-10 07:19:23,108 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:23,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:23,130 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 07:19:24,187 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:24,188 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 935 states to 324 states and 918 transitions. [2018-11-10 07:19:24,188 INFO L276 IsEmpty]: Start isEmpty. Operand 324 states and 918 transitions. [2018-11-10 07:19:24,189 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-11-10 07:19:24,189 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:24,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:24,210 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 07:19:24,435 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:24,436 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 956 states to 326 states and 938 transitions. [2018-11-10 07:19:24,436 INFO L276 IsEmpty]: Start isEmpty. Operand 326 states and 938 transitions. [2018-11-10 07:19:24,437 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-11-10 07:19:24,437 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:24,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:24,459 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 07:19:24,939 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:24,940 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 966 states to 329 states and 948 transitions. [2018-11-10 07:19:24,940 INFO L276 IsEmpty]: Start isEmpty. Operand 329 states and 948 transitions. [2018-11-10 07:19:24,940 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-11-10 07:19:24,940 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:24,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:24,958 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 07:19:25,756 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:25,757 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1008 states to 335 states and 990 transitions. [2018-11-10 07:19:25,757 INFO L276 IsEmpty]: Start isEmpty. Operand 335 states and 990 transitions. [2018-11-10 07:19:25,758 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-11-10 07:19:25,758 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:25,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:25,778 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 07:19:26,040 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:26,041 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1034 states to 337 states and 1016 transitions. [2018-11-10 07:19:26,041 INFO L276 IsEmpty]: Start isEmpty. Operand 337 states and 1016 transitions. [2018-11-10 07:19:26,042 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-11-10 07:19:26,042 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:26,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:26,062 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 07:19:26,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:26,355 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1056 states to 339 states and 1037 transitions. [2018-11-10 07:19:26,355 INFO L276 IsEmpty]: Start isEmpty. Operand 339 states and 1037 transitions. [2018-11-10 07:19:26,356 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-11-10 07:19:26,356 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:26,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:26,371 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 07:19:26,564 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:26,565 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1064 states to 341 states and 1045 transitions. [2018-11-10 07:19:26,565 INFO L276 IsEmpty]: Start isEmpty. Operand 341 states and 1045 transitions. [2018-11-10 07:19:26,566 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-11-10 07:19:26,566 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:26,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:26,583 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 07:19:27,055 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:27,056 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1097 states to 345 states and 1077 transitions. [2018-11-10 07:19:27,057 INFO L276 IsEmpty]: Start isEmpty. Operand 345 states and 1077 transitions. [2018-11-10 07:19:27,057 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-11-10 07:19:27,057 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:27,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:27,080 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 07:19:27,310 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:27,311 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1125 states to 347 states and 1105 transitions. [2018-11-10 07:19:27,311 INFO L276 IsEmpty]: Start isEmpty. Operand 347 states and 1105 transitions. [2018-11-10 07:19:27,311 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-11-10 07:19:27,311 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:27,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:27,325 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 07:19:27,492 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:27,493 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1131 states to 350 states and 1111 transitions. [2018-11-10 07:19:27,493 INFO L276 IsEmpty]: Start isEmpty. Operand 350 states and 1111 transitions. [2018-11-10 07:19:27,493 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-11-10 07:19:27,494 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:27,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:27,510 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 07:19:27,684 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:27,685 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1156 states to 352 states and 1136 transitions. [2018-11-10 07:19:27,685 INFO L276 IsEmpty]: Start isEmpty. Operand 352 states and 1136 transitions. [2018-11-10 07:19:27,685 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-11-10 07:19:27,685 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:27,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:27,699 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 07:19:28,191 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:28,192 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1166 states to 355 states and 1146 transitions. [2018-11-10 07:19:28,192 INFO L276 IsEmpty]: Start isEmpty. Operand 355 states and 1146 transitions. [2018-11-10 07:19:28,193 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-11-10 07:19:28,193 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:28,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:28,215 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 07:19:28,414 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:28,415 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1192 states to 357 states and 1172 transitions. [2018-11-10 07:19:28,415 INFO L276 IsEmpty]: Start isEmpty. Operand 357 states and 1172 transitions. [2018-11-10 07:19:28,416 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-11-10 07:19:28,416 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:28,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:28,433 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 07:19:28,805 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:28,806 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1223 states to 360 states and 1203 transitions. [2018-11-10 07:19:28,806 INFO L276 IsEmpty]: Start isEmpty. Operand 360 states and 1203 transitions. [2018-11-10 07:19:28,806 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-11-10 07:19:28,806 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:28,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:28,818 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 07:19:29,438 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:29,439 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1264 states to 366 states and 1243 transitions. [2018-11-10 07:19:29,439 INFO L276 IsEmpty]: Start isEmpty. Operand 366 states and 1243 transitions. [2018-11-10 07:19:29,440 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-11-10 07:19:29,440 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:29,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:29,453 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 07:19:29,675 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:29,676 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1292 states to 368 states and 1271 transitions. [2018-11-10 07:19:29,676 INFO L276 IsEmpty]: Start isEmpty. Operand 368 states and 1271 transitions. [2018-11-10 07:19:29,676 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-11-10 07:19:29,676 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:29,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:29,688 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 07:19:29,852 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:29,853 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1294 states to 370 states and 1273 transitions. [2018-11-10 07:19:29,853 INFO L276 IsEmpty]: Start isEmpty. Operand 370 states and 1273 transitions. [2018-11-10 07:19:29,853 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-11-10 07:19:29,853 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:29,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:29,864 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-11-10 07:19:29,971 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:29,973 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1296 states to 372 states and 1275 transitions. [2018-11-10 07:19:29,973 INFO L276 IsEmpty]: Start isEmpty. Operand 372 states and 1275 transitions. [2018-11-10 07:19:29,974 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-11-10 07:19:29,974 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:29,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:29,991 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-10 07:19:30,106 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:30,106 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1296 states to 373 states and 1275 transitions. [2018-11-10 07:19:30,107 INFO L276 IsEmpty]: Start isEmpty. Operand 373 states and 1275 transitions. [2018-11-10 07:19:30,107 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-11-10 07:19:30,107 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:30,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:30,195 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:19:30,263 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:30,264 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1294 states to 372 states and 1273 transitions. [2018-11-10 07:19:30,264 INFO L276 IsEmpty]: Start isEmpty. Operand 372 states and 1273 transitions. [2018-11-10 07:19:30,264 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-11-10 07:19:30,264 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:30,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:30,276 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-11-10 07:19:31,091 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:31,092 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1336 states to 378 states and 1315 transitions. [2018-11-10 07:19:31,092 INFO L276 IsEmpty]: Start isEmpty. Operand 378 states and 1315 transitions. [2018-11-10 07:19:31,092 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-11-10 07:19:31,092 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:31,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:31,105 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:19:31,307 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:31,308 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1337 states to 379 states and 1316 transitions. [2018-11-10 07:19:31,308 INFO L276 IsEmpty]: Start isEmpty. Operand 379 states and 1316 transitions. [2018-11-10 07:19:31,308 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-11-10 07:19:31,309 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:31,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:31,320 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-11-10 07:19:31,567 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:31,568 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1358 states to 381 states and 1337 transitions. [2018-11-10 07:19:31,568 INFO L276 IsEmpty]: Start isEmpty. Operand 381 states and 1337 transitions. [2018-11-10 07:19:31,569 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-11-10 07:19:31,569 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:31,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:31,816 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-10 07:19:32,284 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:32,285 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1376 states to 386 states and 1351 transitions. [2018-11-10 07:19:32,285 INFO L276 IsEmpty]: Start isEmpty. Operand 386 states and 1351 transitions. [2018-11-10 07:19:32,286 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-11-10 07:19:32,286 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:32,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:32,303 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-10 07:19:32,526 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:32,527 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1378 states to 387 states and 1353 transitions. [2018-11-10 07:19:32,527 INFO L276 IsEmpty]: Start isEmpty. Operand 387 states and 1353 transitions. [2018-11-10 07:19:32,528 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-11-10 07:19:32,528 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:32,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:32,569 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:19:32,690 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:32,691 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1380 states to 389 states and 1355 transitions. [2018-11-10 07:19:32,691 INFO L276 IsEmpty]: Start isEmpty. Operand 389 states and 1355 transitions. [2018-11-10 07:19:32,692 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-11-10 07:19:32,692 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:32,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:32,709 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:19:32,940 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:32,941 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1382 states to 391 states and 1357 transitions. [2018-11-10 07:19:32,941 INFO L276 IsEmpty]: Start isEmpty. Operand 391 states and 1357 transitions. [2018-11-10 07:19:32,941 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-11-10 07:19:32,942 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:32,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:32,957 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:19:33,181 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:33,182 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1384 states to 393 states and 1359 transitions. [2018-11-10 07:19:33,182 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 1359 transitions. [2018-11-10 07:19:33,183 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-11-10 07:19:33,183 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:33,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:33,195 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 07:19:33,628 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:33,628 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1392 states to 396 states and 1367 transitions. [2018-11-10 07:19:33,629 INFO L276 IsEmpty]: Start isEmpty. Operand 396 states and 1367 transitions. [2018-11-10 07:19:33,629 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-11-10 07:19:33,629 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:33,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:33,643 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 07:19:34,189 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:34,190 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1419 states to 399 states and 1394 transitions. [2018-11-10 07:19:34,190 INFO L276 IsEmpty]: Start isEmpty. Operand 399 states and 1394 transitions. [2018-11-10 07:19:34,190 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-11-10 07:19:34,191 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:34,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:34,204 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 07:19:34,487 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:34,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1441 states to 401 states and 1416 transitions. [2018-11-10 07:19:34,488 INFO L276 IsEmpty]: Start isEmpty. Operand 401 states and 1416 transitions. [2018-11-10 07:19:34,488 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-11-10 07:19:34,488 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:34,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:34,506 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 07:19:34,528 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:34,529 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1443 states to 403 states and 1418 transitions. [2018-11-10 07:19:34,529 INFO L276 IsEmpty]: Start isEmpty. Operand 403 states and 1418 transitions. [2018-11-10 07:19:34,530 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-11-10 07:19:34,530 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:34,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:34,548 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 07:19:35,218 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:35,218 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1461 states to 408 states and 1435 transitions. [2018-11-10 07:19:35,219 INFO L276 IsEmpty]: Start isEmpty. Operand 408 states and 1435 transitions. [2018-11-10 07:19:35,219 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-11-10 07:19:35,219 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:35,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:35,231 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-10 07:19:35,500 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:35,500 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1461 states to 409 states and 1435 transitions. [2018-11-10 07:19:35,501 INFO L276 IsEmpty]: Start isEmpty. Operand 409 states and 1435 transitions. [2018-11-10 07:19:35,501 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-11-10 07:19:35,501 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:35,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:35,512 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 07:19:35,944 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:35,945 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1476 states to 413 states and 1449 transitions. [2018-11-10 07:19:35,945 INFO L276 IsEmpty]: Start isEmpty. Operand 413 states and 1449 transitions. [2018-11-10 07:19:35,945 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-11-10 07:19:35,945 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:35,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:35,961 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-10 07:19:36,387 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:36,387 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1498 states to 416 states and 1471 transitions. [2018-11-10 07:19:36,388 INFO L276 IsEmpty]: Start isEmpty. Operand 416 states and 1471 transitions. [2018-11-10 07:19:36,388 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-11-10 07:19:36,388 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:36,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:36,401 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 07:19:36,859 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:36,860 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1507 states to 419 states and 1479 transitions. [2018-11-10 07:19:36,860 INFO L276 IsEmpty]: Start isEmpty. Operand 419 states and 1479 transitions. [2018-11-10 07:19:36,861 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-11-10 07:19:36,861 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:36,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:36,874 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:19:37,248 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:37,248 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1517 states to 425 states and 1489 transitions. [2018-11-10 07:19:37,248 INFO L276 IsEmpty]: Start isEmpty. Operand 425 states and 1489 transitions. [2018-11-10 07:19:37,249 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-11-10 07:19:37,249 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:37,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:37,260 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 07:19:37,710 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:37,710 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1524 states to 428 states and 1496 transitions. [2018-11-10 07:19:37,710 INFO L276 IsEmpty]: Start isEmpty. Operand 428 states and 1496 transitions. [2018-11-10 07:19:37,711 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-11-10 07:19:37,711 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:37,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:37,721 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:19:38,190 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:38,191 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1538 states to 431 states and 1509 transitions. [2018-11-10 07:19:38,191 INFO L276 IsEmpty]: Start isEmpty. Operand 431 states and 1509 transitions. [2018-11-10 07:19:38,191 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-11-10 07:19:38,191 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:38,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:38,202 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 07:19:38,434 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:38,434 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1546 states to 434 states and 1516 transitions. [2018-11-10 07:19:38,435 INFO L276 IsEmpty]: Start isEmpty. Operand 434 states and 1516 transitions. [2018-11-10 07:19:38,435 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-11-10 07:19:38,435 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:38,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:38,453 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 8 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-10 07:19:38,632 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:38,633 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1547 states to 435 states and 1517 transitions. [2018-11-10 07:19:38,633 INFO L276 IsEmpty]: Start isEmpty. Operand 435 states and 1517 transitions. [2018-11-10 07:19:38,634 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-11-10 07:19:38,634 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:38,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:38,655 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 07:19:38,706 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:38,708 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1549 states to 437 states and 1519 transitions. [2018-11-10 07:19:38,708 INFO L276 IsEmpty]: Start isEmpty. Operand 437 states and 1519 transitions. [2018-11-10 07:19:38,709 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-11-10 07:19:38,709 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:38,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:38,724 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-11-10 07:19:38,973 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:38,974 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1552 states to 439 states and 1522 transitions. [2018-11-10 07:19:38,974 INFO L276 IsEmpty]: Start isEmpty. Operand 439 states and 1522 transitions. [2018-11-10 07:19:38,975 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-11-10 07:19:38,975 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:38,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:39,026 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:19:39,773 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:39,774 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1571 states to 444 states and 1540 transitions. [2018-11-10 07:19:39,774 INFO L276 IsEmpty]: Start isEmpty. Operand 444 states and 1540 transitions. [2018-11-10 07:19:39,775 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-11-10 07:19:39,775 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:39,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:39,785 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:19:41,094 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:41,096 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1620 states to 451 states and 1588 transitions. [2018-11-10 07:19:41,096 INFO L276 IsEmpty]: Start isEmpty. Operand 451 states and 1588 transitions. [2018-11-10 07:19:41,097 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-11-10 07:19:41,097 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:41,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:41,109 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 17 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-11-10 07:19:41,125 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:41,126 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1622 states to 453 states and 1590 transitions. [2018-11-10 07:19:41,126 INFO L276 IsEmpty]: Start isEmpty. Operand 453 states and 1590 transitions. [2018-11-10 07:19:41,127 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-10 07:19:41,127 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:41,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:41,138 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-10 07:19:41,603 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:41,604 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1645 states to 456 states and 1613 transitions. [2018-11-10 07:19:41,604 INFO L276 IsEmpty]: Start isEmpty. Operand 456 states and 1613 transitions. [2018-11-10 07:19:41,605 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-10 07:19:41,605 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:41,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:41,711 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:19:42,129 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:42,130 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1646 states to 457 states and 1614 transitions. [2018-11-10 07:19:42,130 INFO L276 IsEmpty]: Start isEmpty. Operand 457 states and 1614 transitions. [2018-11-10 07:19:42,131 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-11-10 07:19:42,131 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:42,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:42,143 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:19:42,655 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:42,656 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1655 states to 460 states and 1623 transitions. [2018-11-10 07:19:42,656 INFO L276 IsEmpty]: Start isEmpty. Operand 460 states and 1623 transitions. [2018-11-10 07:19:42,657 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-10 07:19:42,657 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:42,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:42,783 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:19:43,189 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:43,189 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1656 states to 461 states and 1624 transitions. [2018-11-10 07:19:43,189 INFO L276 IsEmpty]: Start isEmpty. Operand 461 states and 1624 transitions. [2018-11-10 07:19:43,190 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-10 07:19:43,190 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:43,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:43,209 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-10 07:19:43,615 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:43,615 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1665 states to 467 states and 1633 transitions. [2018-11-10 07:19:43,615 INFO L276 IsEmpty]: Start isEmpty. Operand 467 states and 1633 transitions. [2018-11-10 07:19:43,616 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-10 07:19:43,616 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:43,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:43,734 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:19:44,146 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:44,147 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1666 states to 468 states and 1634 transitions. [2018-11-10 07:19:44,147 INFO L276 IsEmpty]: Start isEmpty. Operand 468 states and 1634 transitions. [2018-11-10 07:19:44,148 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-11-10 07:19:44,148 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:44,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:44,161 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2018-11-10 07:19:44,720 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:44,721 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1670 states to 470 states and 1638 transitions. [2018-11-10 07:19:44,721 INFO L276 IsEmpty]: Start isEmpty. Operand 470 states and 1638 transitions. [2018-11-10 07:19:44,721 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-11-10 07:19:44,721 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:44,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:44,736 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2018-11-10 07:19:44,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:44,996 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1670 states to 471 states and 1638 transitions. [2018-11-10 07:19:44,996 INFO L276 IsEmpty]: Start isEmpty. Operand 471 states and 1638 transitions. [2018-11-10 07:19:44,996 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-11-10 07:19:44,996 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:45,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:45,055 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 8 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:19:45,960 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:45,961 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1680 states to 474 states and 1647 transitions. [2018-11-10 07:19:45,961 INFO L276 IsEmpty]: Start isEmpty. Operand 474 states and 1647 transitions. [2018-11-10 07:19:45,962 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-11-10 07:19:45,962 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:45,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:45,975 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:19:47,143 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:47,143 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1715 states to 479 states and 1682 transitions. [2018-11-10 07:19:47,143 INFO L276 IsEmpty]: Start isEmpty. Operand 479 states and 1682 transitions. [2018-11-10 07:19:47,144 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-10 07:19:47,144 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:47,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:47,157 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-10 07:19:47,523 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:47,523 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1736 states to 481 states and 1703 transitions. [2018-11-10 07:19:47,524 INFO L276 IsEmpty]: Start isEmpty. Operand 481 states and 1703 transitions. [2018-11-10 07:19:47,524 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-11-10 07:19:47,524 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:47,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:47,537 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:19:48,164 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:48,165 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1762 states to 484 states and 1729 transitions. [2018-11-10 07:19:48,165 INFO L276 IsEmpty]: Start isEmpty. Operand 484 states and 1729 transitions. [2018-11-10 07:19:48,165 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-10 07:19:48,165 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:48,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:48,178 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-10 07:19:48,841 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:48,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1780 states to 487 states and 1746 transitions. [2018-11-10 07:19:48,842 INFO L276 IsEmpty]: Start isEmpty. Operand 487 states and 1746 transitions. [2018-11-10 07:19:48,843 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-10 07:19:48,843 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:48,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:48,857 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 07:19:49,671 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:49,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1798 states to 492 states and 1763 transitions. [2018-11-10 07:19:49,672 INFO L276 IsEmpty]: Start isEmpty. Operand 492 states and 1763 transitions. [2018-11-10 07:19:49,672 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-10 07:19:49,673 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:49,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:49,683 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 07:19:50,008 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:50,009 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1822 states to 494 states and 1787 transitions. [2018-11-10 07:19:50,009 INFO L276 IsEmpty]: Start isEmpty. Operand 494 states and 1787 transitions. [2018-11-10 07:19:50,010 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-10 07:19:50,010 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:50,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:50,020 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 07:19:50,380 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:50,380 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1845 states to 496 states and 1810 transitions. [2018-11-10 07:19:50,381 INFO L276 IsEmpty]: Start isEmpty. Operand 496 states and 1810 transitions. [2018-11-10 07:19:50,381 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-10 07:19:50,381 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:50,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:50,394 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-10 07:19:50,729 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:50,729 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1867 states to 498 states and 1832 transitions. [2018-11-10 07:19:50,730 INFO L276 IsEmpty]: Start isEmpty. Operand 498 states and 1832 transitions. [2018-11-10 07:19:50,730 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-10 07:19:50,730 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:50,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:50,744 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-10 07:19:51,312 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:51,313 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1893 states to 501 states and 1857 transitions. [2018-11-10 07:19:51,313 INFO L276 IsEmpty]: Start isEmpty. Operand 501 states and 1857 transitions. [2018-11-10 07:19:51,314 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-10 07:19:51,314 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:51,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:51,327 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-10 07:19:51,660 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:51,661 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1915 states to 503 states and 1879 transitions. [2018-11-10 07:19:51,661 INFO L276 IsEmpty]: Start isEmpty. Operand 503 states and 1879 transitions. [2018-11-10 07:19:51,662 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-11-10 07:19:51,662 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:51,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:51,672 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:19:52,585 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:52,586 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1923 states to 506 states and 1886 transitions. [2018-11-10 07:19:52,586 INFO L276 IsEmpty]: Start isEmpty. Operand 506 states and 1886 transitions. [2018-11-10 07:19:52,586 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-10 07:19:52,586 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:52,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:52,603 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-10 07:19:52,935 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:52,936 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1932 states to 512 states and 1895 transitions. [2018-11-10 07:19:52,936 INFO L276 IsEmpty]: Start isEmpty. Operand 512 states and 1895 transitions. [2018-11-10 07:19:52,936 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-10 07:19:52,936 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:52,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:52,950 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-10 07:19:53,909 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:53,910 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1944 states to 515 states and 1907 transitions. [2018-11-10 07:19:53,910 INFO L276 IsEmpty]: Start isEmpty. Operand 515 states and 1907 transitions. [2018-11-10 07:19:53,910 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-10 07:19:53,910 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:53,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:53,922 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-10 07:19:54,118 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:54,119 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1946 states to 516 states and 1909 transitions. [2018-11-10 07:19:54,119 INFO L276 IsEmpty]: Start isEmpty. Operand 516 states and 1909 transitions. [2018-11-10 07:19:54,120 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-10 07:19:54,120 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:54,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:54,132 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-10 07:19:54,760 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:54,760 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1952 states to 518 states and 1915 transitions. [2018-11-10 07:19:54,761 INFO L276 IsEmpty]: Start isEmpty. Operand 518 states and 1915 transitions. [2018-11-10 07:19:54,761 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-10 07:19:54,761 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:54,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:54,772 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-10 07:19:55,385 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:55,386 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1957 states to 520 states and 1920 transitions. [2018-11-10 07:19:55,386 INFO L276 IsEmpty]: Start isEmpty. Operand 520 states and 1920 transitions. [2018-11-10 07:19:55,387 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-10 07:19:55,387 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:55,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:55,400 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-10 07:19:56,070 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:56,070 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1962 states to 522 states and 1925 transitions. [2018-11-10 07:19:56,071 INFO L276 IsEmpty]: Start isEmpty. Operand 522 states and 1925 transitions. [2018-11-10 07:19:56,071 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-10 07:19:56,071 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:56,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:56,087 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:19:56,100 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:56,101 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1964 states to 524 states and 1927 transitions. [2018-11-10 07:19:56,101 INFO L276 IsEmpty]: Start isEmpty. Operand 524 states and 1927 transitions. [2018-11-10 07:19:56,101 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-10 07:19:56,101 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:56,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:56,151 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-10 07:19:56,528 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:56,529 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1964 states to 525 states and 1927 transitions. [2018-11-10 07:19:56,529 INFO L276 IsEmpty]: Start isEmpty. Operand 525 states and 1927 transitions. [2018-11-10 07:19:56,530 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-10 07:19:56,530 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:56,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:56,545 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-10 07:19:56,716 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:56,717 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1987 states to 527 states and 1950 transitions. [2018-11-10 07:19:56,717 INFO L276 IsEmpty]: Start isEmpty. Operand 527 states and 1950 transitions. [2018-11-10 07:19:56,717 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-10 07:19:56,718 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:56,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:56,731 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-10 07:19:57,044 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:57,045 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2010 states to 529 states and 1973 transitions. [2018-11-10 07:19:57,045 INFO L276 IsEmpty]: Start isEmpty. Operand 529 states and 1973 transitions. [2018-11-10 07:19:57,046 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-10 07:19:57,046 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:57,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:57,058 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-10 07:19:57,466 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:57,467 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2035 states to 531 states and 1998 transitions. [2018-11-10 07:19:57,467 INFO L276 IsEmpty]: Start isEmpty. Operand 531 states and 1998 transitions. [2018-11-10 07:19:57,468 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-10 07:19:57,468 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:57,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:57,517 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 8 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:19:58,568 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:58,569 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2043 states to 534 states and 2005 transitions. [2018-11-10 07:19:58,569 INFO L276 IsEmpty]: Start isEmpty. Operand 534 states and 2005 transitions. [2018-11-10 07:19:58,570 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-10 07:19:58,570 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:58,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:58,716 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-10 07:19:59,730 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:19:59,730 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2065 states to 534 states and 1989 transitions. [2018-11-10 07:19:59,731 INFO L276 IsEmpty]: Start isEmpty. Operand 534 states and 1989 transitions. [2018-11-10 07:19:59,731 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-10 07:19:59,731 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:19:59,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:19:59,755 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:20:00,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:00,394 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2090 states to 538 states and 2013 transitions. [2018-11-10 07:20:00,395 INFO L276 IsEmpty]: Start isEmpty. Operand 538 states and 2013 transitions. [2018-11-10 07:20:00,395 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-10 07:20:00,395 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:00,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:00,419 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:20:00,801 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:00,802 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2111 states to 540 states and 2033 transitions. [2018-11-10 07:20:00,802 INFO L276 IsEmpty]: Start isEmpty. Operand 540 states and 2033 transitions. [2018-11-10 07:20:00,803 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-10 07:20:00,803 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:00,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:00,816 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-10 07:20:01,266 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:01,267 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2138 states to 542 states and 2059 transitions. [2018-11-10 07:20:01,267 INFO L276 IsEmpty]: Start isEmpty. Operand 542 states and 2059 transitions. [2018-11-10 07:20:01,267 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-10 07:20:01,267 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:01,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:01,286 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-10 07:20:01,617 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:01,618 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2160 states to 544 states and 2080 transitions. [2018-11-10 07:20:01,618 INFO L276 IsEmpty]: Start isEmpty. Operand 544 states and 2080 transitions. [2018-11-10 07:20:01,618 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-10 07:20:01,618 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:01,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:01,631 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-10 07:20:02,009 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:02,009 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2186 states to 546 states and 2105 transitions. [2018-11-10 07:20:02,010 INFO L276 IsEmpty]: Start isEmpty. Operand 546 states and 2105 transitions. [2018-11-10 07:20:02,010 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-10 07:20:02,010 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:02,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:02,023 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-10 07:20:02,404 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:02,404 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2212 states to 548 states and 2130 transitions. [2018-11-10 07:20:02,404 INFO L276 IsEmpty]: Start isEmpty. Operand 548 states and 2130 transitions. [2018-11-10 07:20:02,405 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-10 07:20:02,405 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:02,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:02,419 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-10 07:20:02,848 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:02,849 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2237 states to 550 states and 2154 transitions. [2018-11-10 07:20:02,849 INFO L276 IsEmpty]: Start isEmpty. Operand 550 states and 2154 transitions. [2018-11-10 07:20:02,849 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-10 07:20:02,849 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:02,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:02,862 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-10 07:20:03,268 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:03,268 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2264 states to 552 states and 2180 transitions. [2018-11-10 07:20:03,268 INFO L276 IsEmpty]: Start isEmpty. Operand 552 states and 2180 transitions. [2018-11-10 07:20:03,269 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-10 07:20:03,269 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:03,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:03,281 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-10 07:20:04,296 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:04,297 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2271 states to 555 states and 2186 transitions. [2018-11-10 07:20:04,297 INFO L276 IsEmpty]: Start isEmpty. Operand 555 states and 2186 transitions. [2018-11-10 07:20:04,298 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-10 07:20:04,298 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:04,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:04,311 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:20:04,491 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:04,492 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2275 states to 558 states and 2190 transitions. [2018-11-10 07:20:04,492 INFO L276 IsEmpty]: Start isEmpty. Operand 558 states and 2190 transitions. [2018-11-10 07:20:04,493 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-10 07:20:04,493 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:04,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:04,504 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:20:04,836 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:04,837 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2275 states to 559 states and 2190 transitions. [2018-11-10 07:20:04,837 INFO L276 IsEmpty]: Start isEmpty. Operand 559 states and 2190 transitions. [2018-11-10 07:20:04,837 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-10 07:20:04,837 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:04,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:04,854 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 07:20:05,677 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:05,678 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2289 states to 563 states and 2203 transitions. [2018-11-10 07:20:05,678 INFO L276 IsEmpty]: Start isEmpty. Operand 563 states and 2203 transitions. [2018-11-10 07:20:05,678 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-10 07:20:05,678 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:05,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:05,690 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-10 07:20:06,276 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:06,277 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2297 states to 566 states and 2210 transitions. [2018-11-10 07:20:06,277 INFO L276 IsEmpty]: Start isEmpty. Operand 566 states and 2210 transitions. [2018-11-10 07:20:06,278 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-10 07:20:06,278 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:06,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:06,288 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:20:07,038 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:07,039 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2304 states to 569 states and 2216 transitions. [2018-11-10 07:20:07,039 INFO L276 IsEmpty]: Start isEmpty. Operand 569 states and 2216 transitions. [2018-11-10 07:20:07,040 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-10 07:20:07,040 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:07,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:07,052 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 07:20:08,263 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:08,264 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2313 states to 572 states and 2224 transitions. [2018-11-10 07:20:08,264 INFO L276 IsEmpty]: Start isEmpty. Operand 572 states and 2224 transitions. [2018-11-10 07:20:08,265 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-10 07:20:08,265 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:08,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:08,282 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-10 07:20:08,294 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:08,294 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2313 states to 573 states and 2224 transitions. [2018-11-10 07:20:08,295 INFO L276 IsEmpty]: Start isEmpty. Operand 573 states and 2224 transitions. [2018-11-10 07:20:08,295 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-10 07:20:08,295 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:08,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:08,345 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 8 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:20:09,183 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:09,184 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2320 states to 576 states and 2230 transitions. [2018-11-10 07:20:09,184 INFO L276 IsEmpty]: Start isEmpty. Operand 576 states and 2230 transitions. [2018-11-10 07:20:09,184 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-10 07:20:09,184 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:09,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:09,201 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-10 07:20:09,448 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:09,449 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2320 states to 577 states and 2230 transitions. [2018-11-10 07:20:09,449 INFO L276 IsEmpty]: Start isEmpty. Operand 577 states and 2230 transitions. [2018-11-10 07:20:09,449 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-10 07:20:09,449 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:09,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:09,466 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:20:09,537 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:09,537 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2322 states to 579 states and 2232 transitions. [2018-11-10 07:20:09,537 INFO L276 IsEmpty]: Start isEmpty. Operand 579 states and 2232 transitions. [2018-11-10 07:20:09,538 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-10 07:20:09,538 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:09,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:09,551 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:20:09,562 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:09,562 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2324 states to 581 states and 2234 transitions. [2018-11-10 07:20:09,563 INFO L276 IsEmpty]: Start isEmpty. Operand 581 states and 2234 transitions. [2018-11-10 07:20:09,563 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-10 07:20:09,563 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:09,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:09,576 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-10 07:20:10,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:10,821 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2331 states to 584 states and 2240 transitions. [2018-11-10 07:20:10,821 INFO L276 IsEmpty]: Start isEmpty. Operand 584 states and 2240 transitions. [2018-11-10 07:20:10,821 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-11-10 07:20:10,821 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:10,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:10,834 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:20:11,262 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:11,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2332 states to 585 states and 2241 transitions. [2018-11-10 07:20:11,263 INFO L276 IsEmpty]: Start isEmpty. Operand 585 states and 2241 transitions. [2018-11-10 07:20:11,264 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-11-10 07:20:11,264 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:11,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:11,277 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:20:11,480 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:11,481 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2335 states to 586 states and 2244 transitions. [2018-11-10 07:20:11,482 INFO L276 IsEmpty]: Start isEmpty. Operand 586 states and 2244 transitions. [2018-11-10 07:20:11,482 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-11-10 07:20:11,482 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:11,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:11,496 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-10 07:20:12,760 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:12,761 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2344 states to 592 states and 2253 transitions. [2018-11-10 07:20:12,761 INFO L276 IsEmpty]: Start isEmpty. Operand 592 states and 2253 transitions. [2018-11-10 07:20:12,761 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-11-10 07:20:12,761 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:12,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:12,774 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-10 07:20:13,692 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:13,693 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2354 states to 596 states and 2262 transitions. [2018-11-10 07:20:13,693 INFO L276 IsEmpty]: Start isEmpty. Operand 596 states and 2262 transitions. [2018-11-10 07:20:13,694 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-10 07:20:13,694 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:13,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:13,709 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:20:13,720 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:13,721 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2358 states to 599 states and 2266 transitions. [2018-11-10 07:20:13,721 INFO L276 IsEmpty]: Start isEmpty. Operand 599 states and 2266 transitions. [2018-11-10 07:20:13,722 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-10 07:20:13,722 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:13,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:13,741 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-10 07:20:14,137 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:14,138 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2366 states to 602 states and 2273 transitions. [2018-11-10 07:20:14,138 INFO L276 IsEmpty]: Start isEmpty. Operand 602 states and 2273 transitions. [2018-11-10 07:20:14,139 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-11-10 07:20:14,139 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:14,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:14,150 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 07:20:14,794 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:14,795 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2372 states to 605 states and 2278 transitions. [2018-11-10 07:20:14,795 INFO L276 IsEmpty]: Start isEmpty. Operand 605 states and 2278 transitions. [2018-11-10 07:20:14,796 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-11-10 07:20:14,796 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:14,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:14,957 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-10 07:20:17,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:17,679 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2438 states to 613 states and 2324 transitions. [2018-11-10 07:20:17,679 INFO L276 IsEmpty]: Start isEmpty. Operand 613 states and 2324 transitions. [2018-11-10 07:20:17,680 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-11-10 07:20:17,680 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:17,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:17,692 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-10 07:20:18,620 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:18,621 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2478 states to 616 states and 2363 transitions. [2018-11-10 07:20:18,621 INFO L276 IsEmpty]: Start isEmpty. Operand 616 states and 2363 transitions. [2018-11-10 07:20:18,622 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-11-10 07:20:18,622 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:18,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:18,634 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-10 07:20:19,082 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:19,083 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2499 states to 618 states and 2383 transitions. [2018-11-10 07:20:19,083 INFO L276 IsEmpty]: Start isEmpty. Operand 618 states and 2383 transitions. [2018-11-10 07:20:19,083 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-11-10 07:20:19,083 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:19,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:19,102 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 07:20:20,406 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:20,407 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2506 states to 621 states and 2389 transitions. [2018-11-10 07:20:20,407 INFO L276 IsEmpty]: Start isEmpty. Operand 621 states and 2389 transitions. [2018-11-10 07:20:20,408 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-10 07:20:20,408 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:20,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:20,425 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-10 07:20:20,436 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:20,437 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2506 states to 622 states and 2389 transitions. [2018-11-10 07:20:20,437 INFO L276 IsEmpty]: Start isEmpty. Operand 622 states and 2389 transitions. [2018-11-10 07:20:20,438 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-10 07:20:20,438 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:20,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:20,452 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:20:20,462 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:20,463 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2508 states to 624 states and 2391 transitions. [2018-11-10 07:20:20,463 INFO L276 IsEmpty]: Start isEmpty. Operand 624 states and 2391 transitions. [2018-11-10 07:20:20,464 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-11-10 07:20:20,464 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:20,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:20,476 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-10 07:20:21,079 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:21,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2511 states to 626 states and 2393 transitions. [2018-11-10 07:20:21,080 INFO L276 IsEmpty]: Start isEmpty. Operand 626 states and 2393 transitions. [2018-11-10 07:20:21,081 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-11-10 07:20:21,081 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:21,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:21,094 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-10 07:20:21,831 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:21,832 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2518 states to 629 states and 2399 transitions. [2018-11-10 07:20:21,832 INFO L276 IsEmpty]: Start isEmpty. Operand 629 states and 2399 transitions. [2018-11-10 07:20:21,833 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-10 07:20:21,833 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:21,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:21,847 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-10 07:20:23,172 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:23,173 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2527 states to 635 states and 2408 transitions. [2018-11-10 07:20:23,173 INFO L276 IsEmpty]: Start isEmpty. Operand 635 states and 2408 transitions. [2018-11-10 07:20:23,174 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-11-10 07:20:23,174 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:23,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:23,186 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-10 07:20:23,653 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:23,653 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2548 states to 637 states and 2428 transitions. [2018-11-10 07:20:23,653 INFO L276 IsEmpty]: Start isEmpty. Operand 637 states and 2428 transitions. [2018-11-10 07:20:23,654 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-11-10 07:20:23,654 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:23,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:23,666 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-10 07:20:24,146 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:24,147 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2569 states to 639 states and 2448 transitions. [2018-11-10 07:20:24,147 INFO L276 IsEmpty]: Start isEmpty. Operand 639 states and 2448 transitions. [2018-11-10 07:20:24,148 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-10 07:20:24,148 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:24,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:24,162 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-10 07:20:24,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:24,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2571 states to 640 states and 2450 transitions. [2018-11-10 07:20:24,673 INFO L276 IsEmpty]: Start isEmpty. Operand 640 states and 2450 transitions. [2018-11-10 07:20:24,674 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-10 07:20:24,674 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:24,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:24,686 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-10 07:20:25,132 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:25,133 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2574 states to 641 states and 2453 transitions. [2018-11-10 07:20:25,133 INFO L276 IsEmpty]: Start isEmpty. Operand 641 states and 2453 transitions. [2018-11-10 07:20:25,134 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-10 07:20:25,134 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:25,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:25,146 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-10 07:20:25,392 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:25,392 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2577 states to 642 states and 2456 transitions. [2018-11-10 07:20:25,393 INFO L276 IsEmpty]: Start isEmpty. Operand 642 states and 2456 transitions. [2018-11-10 07:20:25,393 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-11-10 07:20:25,393 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:25,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:25,408 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-10 07:20:25,973 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:25,973 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2581 states to 644 states and 2459 transitions. [2018-11-10 07:20:25,974 INFO L276 IsEmpty]: Start isEmpty. Operand 644 states and 2459 transitions. [2018-11-10 07:20:25,974 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-11-10 07:20:25,974 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:25,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:25,988 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-10 07:20:26,493 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:26,494 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2585 states to 646 states and 2462 transitions. [2018-11-10 07:20:26,494 INFO L276 IsEmpty]: Start isEmpty. Operand 646 states and 2462 transitions. [2018-11-10 07:20:26,494 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-11-10 07:20:26,494 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:26,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:26,507 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-10 07:20:27,702 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:27,702 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2621 states to 651 states and 2496 transitions. [2018-11-10 07:20:27,703 INFO L276 IsEmpty]: Start isEmpty. Operand 651 states and 2496 transitions. [2018-11-10 07:20:27,703 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-11-10 07:20:27,703 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:27,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:27,721 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-10 07:20:29,314 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:29,315 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2631 states to 657 states and 2506 transitions. [2018-11-10 07:20:29,315 INFO L276 IsEmpty]: Start isEmpty. Operand 657 states and 2506 transitions. [2018-11-10 07:20:29,316 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-11-10 07:20:29,316 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:29,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:29,328 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-10 07:20:29,933 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:29,934 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2652 states to 659 states and 2526 transitions. [2018-11-10 07:20:29,934 INFO L276 IsEmpty]: Start isEmpty. Operand 659 states and 2526 transitions. [2018-11-10 07:20:29,935 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-11-10 07:20:29,935 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:29,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:29,953 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 07:20:30,432 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:30,433 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2657 states to 662 states and 2530 transitions. [2018-11-10 07:20:30,433 INFO L276 IsEmpty]: Start isEmpty. Operand 662 states and 2530 transitions. [2018-11-10 07:20:30,434 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-11-10 07:20:30,434 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:30,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:30,451 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-10 07:20:30,981 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:30,982 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2661 states to 664 states and 2533 transitions. [2018-11-10 07:20:30,982 INFO L276 IsEmpty]: Start isEmpty. Operand 664 states and 2533 transitions. [2018-11-10 07:20:30,983 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-11-10 07:20:30,983 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:30,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:31,001 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-10 07:20:32,706 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:32,707 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2704 states to 670 states and 2574 transitions. [2018-11-10 07:20:32,707 INFO L276 IsEmpty]: Start isEmpty. Operand 670 states and 2574 transitions. [2018-11-10 07:20:32,708 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-11-10 07:20:32,708 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:32,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:32,721 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-10 07:20:33,233 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:33,234 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2709 states to 673 states and 2578 transitions. [2018-11-10 07:20:33,234 INFO L276 IsEmpty]: Start isEmpty. Operand 673 states and 2578 transitions. [2018-11-10 07:20:33,234 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-11-10 07:20:33,235 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:33,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:33,252 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 07:20:33,758 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:33,759 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2714 states to 676 states and 2582 transitions. [2018-11-10 07:20:33,759 INFO L276 IsEmpty]: Start isEmpty. Operand 676 states and 2582 transitions. [2018-11-10 07:20:33,760 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-10 07:20:33,760 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:33,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:33,772 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-10 07:20:33,824 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:33,825 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2741 states to 677 states and 2609 transitions. [2018-11-10 07:20:33,825 INFO L276 IsEmpty]: Start isEmpty. Operand 677 states and 2609 transitions. [2018-11-10 07:20:33,826 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-11-10 07:20:33,826 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:33,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:33,840 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2018-11-10 07:20:34,049 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:34,050 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2744 states to 679 states and 2612 transitions. [2018-11-10 07:20:34,051 INFO L276 IsEmpty]: Start isEmpty. Operand 679 states and 2612 transitions. [2018-11-10 07:20:34,051 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-11-10 07:20:34,052 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:34,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:34,065 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 14 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 07:20:34,597 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:34,598 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2744 states to 680 states and 2612 transitions. [2018-11-10 07:20:34,598 INFO L276 IsEmpty]: Start isEmpty. Operand 680 states and 2612 transitions. [2018-11-10 07:20:34,598 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-10 07:20:34,599 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:34,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:34,611 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-10 07:20:35,536 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:35,537 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2749 states to 682 states and 2617 transitions. [2018-11-10 07:20:35,537 INFO L276 IsEmpty]: Start isEmpty. Operand 682 states and 2617 transitions. [2018-11-10 07:20:35,538 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-10 07:20:35,538 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:35,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:35,551 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-10 07:20:36,035 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:36,036 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2749 states to 683 states and 2617 transitions. [2018-11-10 07:20:36,036 INFO L276 IsEmpty]: Start isEmpty. Operand 683 states and 2617 transitions. [2018-11-10 07:20:36,037 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-11-10 07:20:36,037 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:36,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:36,055 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:20:36,066 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:36,067 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2749 states to 684 states and 2617 transitions. [2018-11-10 07:20:36,067 INFO L276 IsEmpty]: Start isEmpty. Operand 684 states and 2617 transitions. [2018-11-10 07:20:36,068 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-10 07:20:36,068 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:36,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:36,079 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 14 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 07:20:36,542 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:36,543 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2750 states to 685 states and 2618 transitions. [2018-11-10 07:20:36,543 INFO L276 IsEmpty]: Start isEmpty. Operand 685 states and 2618 transitions. [2018-11-10 07:20:36,544 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-10 07:20:36,544 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:36,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:36,556 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 8 proven. 6 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:20:37,523 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:37,524 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2753 states to 687 states and 2621 transitions. [2018-11-10 07:20:37,524 INFO L276 IsEmpty]: Start isEmpty. Operand 687 states and 2621 transitions. [2018-11-10 07:20:37,525 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-10 07:20:37,525 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:37,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:37,537 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-11-10 07:20:38,023 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:38,023 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2762 states to 692 states and 2630 transitions. [2018-11-10 07:20:38,024 INFO L276 IsEmpty]: Start isEmpty. Operand 692 states and 2630 transitions. [2018-11-10 07:20:38,024 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-10 07:20:38,024 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:38,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:38,037 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-11-10 07:20:38,061 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:38,062 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2763 states to 694 states and 2631 transitions. [2018-11-10 07:20:38,062 INFO L276 IsEmpty]: Start isEmpty. Operand 694 states and 2631 transitions. [2018-11-10 07:20:38,063 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-10 07:20:38,063 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:38,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:38,076 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:20:39,288 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:39,289 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2789 states to 697 states and 2657 transitions. [2018-11-10 07:20:39,289 INFO L276 IsEmpty]: Start isEmpty. Operand 697 states and 2657 transitions. [2018-11-10 07:20:39,290 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-10 07:20:39,290 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:39,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:39,302 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:20:40,752 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:40,753 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2838 states to 701 states and 2706 transitions. [2018-11-10 07:20:40,753 INFO L276 IsEmpty]: Start isEmpty. Operand 701 states and 2706 transitions. [2018-11-10 07:20:40,754 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-10 07:20:40,754 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:40,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:40,801 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 10 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-11-10 07:20:41,574 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:41,575 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2844 states to 703 states and 2712 transitions. [2018-11-10 07:20:41,575 INFO L276 IsEmpty]: Start isEmpty. Operand 703 states and 2712 transitions. [2018-11-10 07:20:41,576 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-11-10 07:20:41,576 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:41,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:41,589 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 8 proven. 6 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-10 07:20:42,106 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:42,107 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2847 states to 705 states and 2715 transitions. [2018-11-10 07:20:42,107 INFO L276 IsEmpty]: Start isEmpty. Operand 705 states and 2715 transitions. [2018-11-10 07:20:42,108 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-11-10 07:20:42,108 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:42,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:42,163 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-10 07:20:42,189 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:42,190 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2842 states to 704 states and 2710 transitions. [2018-11-10 07:20:42,190 INFO L276 IsEmpty]: Start isEmpty. Operand 704 states and 2710 transitions. [2018-11-10 07:20:42,191 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-10 07:20:42,191 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:42,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:42,204 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-10 07:20:43,302 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:43,303 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2865 states to 707 states and 2732 transitions. [2018-11-10 07:20:43,303 INFO L276 IsEmpty]: Start isEmpty. Operand 707 states and 2732 transitions. [2018-11-10 07:20:43,304 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-10 07:20:43,304 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:43,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:43,316 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-10 07:20:43,859 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:43,860 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2868 states to 708 states and 2735 transitions. [2018-11-10 07:20:43,860 INFO L276 IsEmpty]: Start isEmpty. Operand 708 states and 2735 transitions. [2018-11-10 07:20:43,861 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-11-10 07:20:43,861 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:43,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:43,944 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:20:44,983 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:44,983 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2874 states to 711 states and 2741 transitions. [2018-11-10 07:20:44,984 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 2741 transitions. [2018-11-10 07:20:44,984 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-10 07:20:44,984 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:44,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:44,997 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-10 07:20:45,528 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:45,529 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2896 states to 713 states and 2762 transitions. [2018-11-10 07:20:45,529 INFO L276 IsEmpty]: Start isEmpty. Operand 713 states and 2762 transitions. [2018-11-10 07:20:45,530 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-10 07:20:45,530 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:45,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:45,544 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-10 07:20:46,085 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:46,086 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2916 states to 715 states and 2781 transitions. [2018-11-10 07:20:46,086 INFO L276 IsEmpty]: Start isEmpty. Operand 715 states and 2781 transitions. [2018-11-10 07:20:46,086 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-11-10 07:20:46,086 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:46,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:46,100 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:20:46,590 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:46,591 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2916 states to 716 states and 2781 transitions. [2018-11-10 07:20:46,591 INFO L276 IsEmpty]: Start isEmpty. Operand 716 states and 2781 transitions. [2018-11-10 07:20:46,592 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-11-10 07:20:46,592 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:46,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:46,606 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-10 07:20:46,875 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:46,876 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2918 states to 717 states and 2783 transitions. [2018-11-10 07:20:46,876 INFO L276 IsEmpty]: Start isEmpty. Operand 717 states and 2783 transitions. [2018-11-10 07:20:46,877 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-11-10 07:20:46,877 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:46,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:46,890 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-10 07:20:47,935 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:47,936 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2925 states to 719 states and 2790 transitions. [2018-11-10 07:20:47,936 INFO L276 IsEmpty]: Start isEmpty. Operand 719 states and 2790 transitions. [2018-11-10 07:20:47,937 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-11-10 07:20:47,937 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:47,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:47,951 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-10 07:20:48,484 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:48,485 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2926 states to 720 states and 2791 transitions. [2018-11-10 07:20:48,485 INFO L276 IsEmpty]: Start isEmpty. Operand 720 states and 2791 transitions. [2018-11-10 07:20:48,486 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-10 07:20:48,486 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:48,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:48,500 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-11-10 07:20:48,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:48,868 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2928 states to 722 states and 2793 transitions. [2018-11-10 07:20:48,868 INFO L276 IsEmpty]: Start isEmpty. Operand 722 states and 2793 transitions. [2018-11-10 07:20:48,869 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-11-10 07:20:48,869 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:48,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:48,881 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-10 07:20:49,439 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:49,440 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2932 states to 724 states and 2796 transitions. [2018-11-10 07:20:49,440 INFO L276 IsEmpty]: Start isEmpty. Operand 724 states and 2796 transitions. [2018-11-10 07:20:49,441 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-11-10 07:20:49,441 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:49,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:49,492 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 9 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-11-10 07:20:49,948 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:49,949 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2934 states to 726 states and 2798 transitions. [2018-11-10 07:20:49,949 INFO L276 IsEmpty]: Start isEmpty. Operand 726 states and 2798 transitions. [2018-11-10 07:20:49,949 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-11-10 07:20:49,949 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:49,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:49,997 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 9 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-11-10 07:20:50,463 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:50,464 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2936 states to 728 states and 2800 transitions. [2018-11-10 07:20:50,464 INFO L276 IsEmpty]: Start isEmpty. Operand 728 states and 2800 transitions. [2018-11-10 07:20:50,464 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-11-10 07:20:50,465 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:50,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:50,512 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 9 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-11-10 07:20:50,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:50,743 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2938 states to 730 states and 2802 transitions. [2018-11-10 07:20:50,743 INFO L276 IsEmpty]: Start isEmpty. Operand 730 states and 2802 transitions. [2018-11-10 07:20:50,744 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-10 07:20:50,744 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:50,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:50,756 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-10 07:20:51,286 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:51,287 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2938 states to 731 states and 2802 transitions. [2018-11-10 07:20:51,287 INFO L276 IsEmpty]: Start isEmpty. Operand 731 states and 2802 transitions. [2018-11-10 07:20:51,288 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-10 07:20:51,288 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:51,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:51,301 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-10 07:20:51,855 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:51,856 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2938 states to 732 states and 2802 transitions. [2018-11-10 07:20:51,856 INFO L276 IsEmpty]: Start isEmpty. Operand 732 states and 2802 transitions. [2018-11-10 07:20:51,857 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-11-10 07:20:51,857 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:51,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:51,905 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 20 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-10 07:20:51,968 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:51,969 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2934 states to 732 states and 2798 transitions. [2018-11-10 07:20:51,969 INFO L276 IsEmpty]: Start isEmpty. Operand 732 states and 2798 transitions. [2018-11-10 07:20:51,970 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-10 07:20:51,970 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:51,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:51,982 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:20:53,332 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:53,333 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2963 states to 737 states and 2826 transitions. [2018-11-10 07:20:53,334 INFO L276 IsEmpty]: Start isEmpty. Operand 737 states and 2826 transitions. [2018-11-10 07:20:53,334 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-10 07:20:53,334 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:53,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:53,347 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:20:54,395 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:54,396 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2987 states to 740 states and 2849 transitions. [2018-11-10 07:20:54,397 INFO L276 IsEmpty]: Start isEmpty. Operand 740 states and 2849 transitions. [2018-11-10 07:20:54,397 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-10 07:20:54,397 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:54,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:54,417 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:20:54,979 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:54,979 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3007 states to 742 states and 2868 transitions. [2018-11-10 07:20:54,980 INFO L276 IsEmpty]: Start isEmpty. Operand 742 states and 2868 transitions. [2018-11-10 07:20:54,980 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-10 07:20:54,980 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:54,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:54,995 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-10 07:20:55,838 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:55,839 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3010 states to 744 states and 2870 transitions. [2018-11-10 07:20:55,839 INFO L276 IsEmpty]: Start isEmpty. Operand 744 states and 2870 transitions. [2018-11-10 07:20:55,840 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-10 07:20:55,840 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:55,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:55,854 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:20:56,978 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:56,979 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3019 states to 747 states and 2879 transitions. [2018-11-10 07:20:56,980 INFO L276 IsEmpty]: Start isEmpty. Operand 747 states and 2879 transitions. [2018-11-10 07:20:56,980 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-10 07:20:56,981 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:56,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:56,995 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:20:58,062 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:58,063 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3043 states to 750 states and 2902 transitions. [2018-11-10 07:20:58,063 INFO L276 IsEmpty]: Start isEmpty. Operand 750 states and 2902 transitions. [2018-11-10 07:20:58,064 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-10 07:20:58,064 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:58,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:58,078 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:20:59,207 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:59,208 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3071 states to 753 states and 2929 transitions. [2018-11-10 07:20:59,208 INFO L276 IsEmpty]: Start isEmpty. Operand 753 states and 2929 transitions. [2018-11-10 07:20:59,209 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-10 07:20:59,209 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:59,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:59,310 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-11-10 07:20:59,948 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:20:59,949 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3076 states to 755 states and 2934 transitions. [2018-11-10 07:20:59,949 INFO L276 IsEmpty]: Start isEmpty. Operand 755 states and 2934 transitions. [2018-11-10 07:20:59,950 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-10 07:20:59,950 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:20:59,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:20:59,963 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:21:00,476 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:00,477 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3094 states to 757 states and 2951 transitions. [2018-11-10 07:21:00,477 INFO L276 IsEmpty]: Start isEmpty. Operand 757 states and 2951 transitions. [2018-11-10 07:21:00,478 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-10 07:21:00,478 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:00,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:00,491 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:21:01,642 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:01,643 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3116 states to 760 states and 2972 transitions. [2018-11-10 07:21:01,643 INFO L276 IsEmpty]: Start isEmpty. Operand 760 states and 2972 transitions. [2018-11-10 07:21:01,644 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-10 07:21:01,644 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:01,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:01,656 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:21:02,752 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:02,753 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3138 states to 763 states and 2993 transitions. [2018-11-10 07:21:02,753 INFO L276 IsEmpty]: Start isEmpty. Operand 763 states and 2993 transitions. [2018-11-10 07:21:02,754 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-10 07:21:02,754 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:02,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:02,767 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-11-10 07:21:03,327 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:03,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3140 states to 764 states and 2995 transitions. [2018-11-10 07:21:03,328 INFO L276 IsEmpty]: Start isEmpty. Operand 764 states and 2995 transitions. [2018-11-10 07:21:03,329 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-10 07:21:03,329 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:03,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:03,342 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:21:03,860 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:03,861 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3158 states to 766 states and 3012 transitions. [2018-11-10 07:21:03,862 INFO L276 IsEmpty]: Start isEmpty. Operand 766 states and 3012 transitions. [2018-11-10 07:21:03,862 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-10 07:21:03,862 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:03,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:03,878 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-11-10 07:21:04,441 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:04,442 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3160 states to 767 states and 3014 transitions. [2018-11-10 07:21:04,442 INFO L276 IsEmpty]: Start isEmpty. Operand 767 states and 3014 transitions. [2018-11-10 07:21:04,443 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-11-10 07:21:04,444 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:04,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:04,460 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-11-10 07:21:04,525 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:04,526 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3165 states to 770 states and 3019 transitions. [2018-11-10 07:21:04,526 INFO L276 IsEmpty]: Start isEmpty. Operand 770 states and 3019 transitions. [2018-11-10 07:21:04,527 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-11-10 07:21:04,527 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:04,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:04,543 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-11-10 07:21:04,573 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:04,574 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3166 states to 771 states and 3020 transitions. [2018-11-10 07:21:04,574 INFO L276 IsEmpty]: Start isEmpty. Operand 771 states and 3020 transitions. [2018-11-10 07:21:04,575 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-10 07:21:04,575 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:04,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:04,589 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-10 07:21:05,887 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:05,888 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3173 states to 774 states and 3027 transitions. [2018-11-10 07:21:05,888 INFO L276 IsEmpty]: Start isEmpty. Operand 774 states and 3027 transitions. [2018-11-10 07:21:05,888 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-10 07:21:05,888 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:05,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:05,901 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-10 07:21:06,458 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:06,459 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3175 states to 775 states and 3029 transitions. [2018-11-10 07:21:06,459 INFO L276 IsEmpty]: Start isEmpty. Operand 775 states and 3029 transitions. [2018-11-10 07:21:06,460 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-10 07:21:06,460 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:06,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:06,474 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-10 07:21:06,975 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:06,975 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3177 states to 777 states and 3031 transitions. [2018-11-10 07:21:06,976 INFO L276 IsEmpty]: Start isEmpty. Operand 777 states and 3031 transitions. [2018-11-10 07:21:06,976 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-10 07:21:06,976 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:06,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:06,991 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-10 07:21:07,492 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:07,493 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3179 states to 779 states and 3033 transitions. [2018-11-10 07:21:07,493 INFO L276 IsEmpty]: Start isEmpty. Operand 779 states and 3033 transitions. [2018-11-10 07:21:07,494 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-10 07:21:07,494 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:07,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:07,508 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-10 07:21:07,522 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:07,523 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3181 states to 781 states and 3035 transitions. [2018-11-10 07:21:07,523 INFO L276 IsEmpty]: Start isEmpty. Operand 781 states and 3035 transitions. [2018-11-10 07:21:07,523 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-10 07:21:07,523 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:07,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:07,538 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-11-10 07:21:08,225 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:08,226 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3183 states to 783 states and 3037 transitions. [2018-11-10 07:21:08,226 INFO L276 IsEmpty]: Start isEmpty. Operand 783 states and 3037 transitions. [2018-11-10 07:21:08,227 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-11-10 07:21:08,227 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:08,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:08,242 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:21:09,191 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:09,192 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3208 states to 788 states and 3062 transitions. [2018-11-10 07:21:09,193 INFO L276 IsEmpty]: Start isEmpty. Operand 788 states and 3062 transitions. [2018-11-10 07:21:09,194 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-11-10 07:21:09,194 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:09,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:09,210 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:21:10,799 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:10,800 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3242 states to 792 states and 3095 transitions. [2018-11-10 07:21:10,800 INFO L276 IsEmpty]: Start isEmpty. Operand 792 states and 3095 transitions. [2018-11-10 07:21:10,800 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-11-10 07:21:10,800 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:10,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:10,823 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:21:12,019 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:12,020 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3278 states to 795 states and 3131 transitions. [2018-11-10 07:21:12,020 INFO L276 IsEmpty]: Start isEmpty. Operand 795 states and 3131 transitions. [2018-11-10 07:21:12,021 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-11-10 07:21:12,021 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:12,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:12,035 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:21:12,574 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:12,575 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3305 states to 797 states and 3157 transitions. [2018-11-10 07:21:12,575 INFO L276 IsEmpty]: Start isEmpty. Operand 797 states and 3157 transitions. [2018-11-10 07:21:12,576 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-11-10 07:21:12,576 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:12,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:12,590 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:21:13,140 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:13,141 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3332 states to 799 states and 3183 transitions. [2018-11-10 07:21:13,141 INFO L276 IsEmpty]: Start isEmpty. Operand 799 states and 3183 transitions. [2018-11-10 07:21:13,142 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-11-10 07:21:13,142 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:13,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:13,158 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:21:13,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:13,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3358 states to 801 states and 3208 transitions. [2018-11-10 07:21:13,673 INFO L276 IsEmpty]: Start isEmpty. Operand 801 states and 3208 transitions. [2018-11-10 07:21:13,674 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-11-10 07:21:13,674 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:13,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:13,688 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:21:14,211 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:14,212 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3386 states to 803 states and 3235 transitions. [2018-11-10 07:21:14,212 INFO L276 IsEmpty]: Start isEmpty. Operand 803 states and 3235 transitions. [2018-11-10 07:21:14,213 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-11-10 07:21:14,213 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:14,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:14,228 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:21:15,771 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:15,772 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3421 states to 807 states and 3270 transitions. [2018-11-10 07:21:15,773 INFO L276 IsEmpty]: Start isEmpty. Operand 807 states and 3270 transitions. [2018-11-10 07:21:15,773 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-11-10 07:21:15,773 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:15,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:15,788 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:21:16,269 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:16,270 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3423 states to 808 states and 3272 transitions. [2018-11-10 07:21:16,270 INFO L276 IsEmpty]: Start isEmpty. Operand 808 states and 3272 transitions. [2018-11-10 07:21:16,271 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-11-10 07:21:16,271 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:16,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:16,286 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:21:16,794 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:16,795 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3451 states to 810 states and 3299 transitions. [2018-11-10 07:21:16,795 INFO L276 IsEmpty]: Start isEmpty. Operand 810 states and 3299 transitions. [2018-11-10 07:21:16,796 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-11-10 07:21:16,796 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:16,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:16,812 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:21:17,892 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:17,893 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3484 states to 813 states and 3332 transitions. [2018-11-10 07:21:17,893 INFO L276 IsEmpty]: Start isEmpty. Operand 813 states and 3332 transitions. [2018-11-10 07:21:17,894 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-11-10 07:21:17,894 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:17,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:17,908 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:21:18,467 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:18,468 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3514 states to 815 states and 3362 transitions. [2018-11-10 07:21:18,468 INFO L276 IsEmpty]: Start isEmpty. Operand 815 states and 3362 transitions. [2018-11-10 07:21:18,469 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-11-10 07:21:18,469 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:18,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:18,484 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:21:18,977 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:18,979 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3542 states to 817 states and 3389 transitions. [2018-11-10 07:21:18,979 INFO L276 IsEmpty]: Start isEmpty. Operand 817 states and 3389 transitions. [2018-11-10 07:21:18,980 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-11-10 07:21:18,980 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:18,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:19,002 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:21:19,041 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:19,043 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3545 states to 819 states and 3392 transitions. [2018-11-10 07:21:19,043 INFO L276 IsEmpty]: Start isEmpty. Operand 819 states and 3392 transitions. [2018-11-10 07:21:19,043 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-11-10 07:21:19,043 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:19,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:19,059 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-11-10 07:21:20,356 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:20,357 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3550 states to 821 states and 3397 transitions. [2018-11-10 07:21:20,357 INFO L276 IsEmpty]: Start isEmpty. Operand 821 states and 3397 transitions. [2018-11-10 07:21:20,358 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-11-10 07:21:20,358 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:20,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:20,373 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-11-10 07:21:20,932 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:20,933 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3553 states to 822 states and 3400 transitions. [2018-11-10 07:21:20,933 INFO L276 IsEmpty]: Start isEmpty. Operand 822 states and 3400 transitions. [2018-11-10 07:21:20,934 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-11-10 07:21:20,934 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:20,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:20,948 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-11-10 07:21:21,472 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:21,474 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3555 states to 823 states and 3402 transitions. [2018-11-10 07:21:21,474 INFO L276 IsEmpty]: Start isEmpty. Operand 823 states and 3402 transitions. [2018-11-10 07:21:21,475 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-11-10 07:21:21,475 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:21,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:21,490 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-11-10 07:21:21,997 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:21,998 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3557 states to 824 states and 3404 transitions. [2018-11-10 07:21:21,998 INFO L276 IsEmpty]: Start isEmpty. Operand 824 states and 3404 transitions. [2018-11-10 07:21:21,999 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-11-10 07:21:21,999 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:22,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:22,017 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:21:22,057 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:22,058 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3564 states to 827 states and 3411 transitions. [2018-11-10 07:21:22,058 INFO L276 IsEmpty]: Start isEmpty. Operand 827 states and 3411 transitions. [2018-11-10 07:21:22,059 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-10 07:21:22,059 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:22,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:22,073 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:21:22,653 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:22,654 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3569 states to 830 states and 3416 transitions. [2018-11-10 07:21:22,654 INFO L276 IsEmpty]: Start isEmpty. Operand 830 states and 3416 transitions. [2018-11-10 07:21:22,655 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-10 07:21:22,655 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:22,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:22,669 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:21:22,680 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:22,681 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3570 states to 831 states and 3417 transitions. [2018-11-10 07:21:22,682 INFO L276 IsEmpty]: Start isEmpty. Operand 831 states and 3417 transitions. [2018-11-10 07:21:22,682 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-10 07:21:22,682 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:22,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:22,695 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:21:23,142 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:23,143 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3572 states to 833 states and 3419 transitions. [2018-11-10 07:21:23,143 INFO L276 IsEmpty]: Start isEmpty. Operand 833 states and 3419 transitions. [2018-11-10 07:21:23,144 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-10 07:21:23,144 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:23,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:23,157 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-10 07:21:23,573 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:23,574 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3577 states to 836 states and 3424 transitions. [2018-11-10 07:21:23,574 INFO L276 IsEmpty]: Start isEmpty. Operand 836 states and 3424 transitions. [2018-11-10 07:21:23,575 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-10 07:21:23,575 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:23,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:23,589 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-10 07:21:24,461 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:24,462 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3579 states to 838 states and 3426 transitions. [2018-11-10 07:21:24,462 INFO L276 IsEmpty]: Start isEmpty. Operand 838 states and 3426 transitions. [2018-11-10 07:21:24,463 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-10 07:21:24,463 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:24,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:24,477 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-10 07:21:25,035 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:25,036 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3579 states to 839 states and 3426 transitions. [2018-11-10 07:21:25,036 INFO L276 IsEmpty]: Start isEmpty. Operand 839 states and 3426 transitions. [2018-11-10 07:21:25,038 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-10 07:21:25,038 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:25,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:25,057 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:21:25,080 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:25,081 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3581 states to 841 states and 3428 transitions. [2018-11-10 07:21:25,081 INFO L276 IsEmpty]: Start isEmpty. Operand 841 states and 3428 transitions. [2018-11-10 07:21:25,082 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-10 07:21:25,082 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:25,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:25,097 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-11-10 07:21:25,708 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:25,709 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3585 states to 843 states and 3432 transitions. [2018-11-10 07:21:25,709 INFO L276 IsEmpty]: Start isEmpty. Operand 843 states and 3432 transitions. [2018-11-10 07:21:25,710 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-10 07:21:25,710 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:25,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:25,725 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-10 07:21:26,316 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:26,317 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3595 states to 848 states and 3442 transitions. [2018-11-10 07:21:26,317 INFO L276 IsEmpty]: Start isEmpty. Operand 848 states and 3442 transitions. [2018-11-10 07:21:26,318 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-10 07:21:26,318 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:26,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:26,331 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-11-10 07:21:26,369 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:26,370 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3602 states to 851 states and 3449 transitions. [2018-11-10 07:21:26,370 INFO L276 IsEmpty]: Start isEmpty. Operand 851 states and 3449 transitions. [2018-11-10 07:21:26,371 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-10 07:21:26,371 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:26,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:26,385 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-10 07:21:26,412 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:26,413 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3603 states to 853 states and 3450 transitions. [2018-11-10 07:21:26,413 INFO L276 IsEmpty]: Start isEmpty. Operand 853 states and 3450 transitions. [2018-11-10 07:21:26,414 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-10 07:21:26,414 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:26,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:26,431 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 07:21:27,033 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:27,034 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3608 states to 856 states and 3454 transitions. [2018-11-10 07:21:27,034 INFO L276 IsEmpty]: Start isEmpty. Operand 856 states and 3454 transitions. [2018-11-10 07:21:27,035 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-10 07:21:27,035 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:27,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:27,049 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-11-10 07:21:27,066 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:27,067 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3610 states to 858 states and 3456 transitions. [2018-11-10 07:21:27,067 INFO L276 IsEmpty]: Start isEmpty. Operand 858 states and 3456 transitions. [2018-11-10 07:21:27,068 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-11-10 07:21:27,068 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:27,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:27,082 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:21:28,379 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:28,380 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3625 states to 863 states and 3471 transitions. [2018-11-10 07:21:28,380 INFO L276 IsEmpty]: Start isEmpty. Operand 863 states and 3471 transitions. [2018-11-10 07:21:28,381 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-11-10 07:21:28,381 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:28,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:28,395 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:21:28,962 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:28,963 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3650 states to 865 states and 3495 transitions. [2018-11-10 07:21:28,963 INFO L276 IsEmpty]: Start isEmpty. Operand 865 states and 3495 transitions. [2018-11-10 07:21:28,964 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-11-10 07:21:28,964 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:28,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:28,978 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:21:29,281 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:29,283 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3675 states to 867 states and 3519 transitions. [2018-11-10 07:21:29,283 INFO L276 IsEmpty]: Start isEmpty. Operand 867 states and 3519 transitions. [2018-11-10 07:21:29,284 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-11-10 07:21:29,284 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:29,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:29,299 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:21:30,540 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:30,541 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3709 states to 870 states and 3553 transitions. [2018-11-10 07:21:30,541 INFO L276 IsEmpty]: Start isEmpty. Operand 870 states and 3553 transitions. [2018-11-10 07:21:30,542 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-11-10 07:21:30,542 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:30,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:30,556 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:21:30,583 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:30,584 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3710 states to 872 states and 3554 transitions. [2018-11-10 07:21:30,584 INFO L276 IsEmpty]: Start isEmpty. Operand 872 states and 3554 transitions. [2018-11-10 07:21:30,585 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-11-10 07:21:30,585 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:30,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:30,599 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-10 07:21:30,614 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:30,615 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3712 states to 874 states and 3556 transitions. [2018-11-10 07:21:30,615 INFO L276 IsEmpty]: Start isEmpty. Operand 874 states and 3556 transitions. [2018-11-10 07:21:30,616 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-11-10 07:21:30,616 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:30,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:30,630 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-11-10 07:21:30,646 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:30,647 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3714 states to 876 states and 3558 transitions. [2018-11-10 07:21:30,647 INFO L276 IsEmpty]: Start isEmpty. Operand 876 states and 3558 transitions. [2018-11-10 07:21:30,648 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-10 07:21:30,648 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:30,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:30,664 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-11-10 07:21:31,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:31,273 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3717 states to 878 states and 3561 transitions. [2018-11-10 07:21:31,273 INFO L276 IsEmpty]: Start isEmpty. Operand 878 states and 3561 transitions. [2018-11-10 07:21:31,274 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-11-10 07:21:31,274 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:31,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:31,289 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-11-10 07:21:31,305 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:31,306 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3719 states to 880 states and 3563 transitions. [2018-11-10 07:21:31,306 INFO L276 IsEmpty]: Start isEmpty. Operand 880 states and 3563 transitions. [2018-11-10 07:21:31,307 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-11-10 07:21:31,307 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:31,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:31,320 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-11-10 07:21:31,923 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:31,924 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3724 states to 883 states and 3568 transitions. [2018-11-10 07:21:31,924 INFO L276 IsEmpty]: Start isEmpty. Operand 883 states and 3568 transitions. [2018-11-10 07:21:31,925 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-11-10 07:21:31,925 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:31,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:31,939 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-11-10 07:21:31,953 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:31,954 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3726 states to 885 states and 3570 transitions. [2018-11-10 07:21:31,954 INFO L276 IsEmpty]: Start isEmpty. Operand 885 states and 3570 transitions. [2018-11-10 07:21:31,955 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-11-10 07:21:31,955 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:31,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:31,968 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-11-10 07:21:32,545 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:32,546 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3726 states to 886 states and 3570 transitions. [2018-11-10 07:21:32,546 INFO L276 IsEmpty]: Start isEmpty. Operand 886 states and 3570 transitions. [2018-11-10 07:21:32,547 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-11-10 07:21:32,547 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:32,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:32,561 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:21:33,506 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:33,507 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3739 states to 891 states and 3583 transitions. [2018-11-10 07:21:33,507 INFO L276 IsEmpty]: Start isEmpty. Operand 891 states and 3583 transitions. [2018-11-10 07:21:33,508 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-10 07:21:33,508 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:33,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:33,521 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 17 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:21:34,770 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:34,771 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3755 states to 896 states and 3599 transitions. [2018-11-10 07:21:34,771 INFO L276 IsEmpty]: Start isEmpty. Operand 896 states and 3599 transitions. [2018-11-10 07:21:34,772 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-10 07:21:34,772 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:34,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:34,784 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 17 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:21:35,415 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:35,416 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3785 states to 898 states and 3629 transitions. [2018-11-10 07:21:35,417 INFO L276 IsEmpty]: Start isEmpty. Operand 898 states and 3629 transitions. [2018-11-10 07:21:35,418 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-11-10 07:21:35,418 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:35,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:35,433 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:21:36,805 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:36,806 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3816 states to 901 states and 3660 transitions. [2018-11-10 07:21:36,806 INFO L276 IsEmpty]: Start isEmpty. Operand 901 states and 3660 transitions. [2018-11-10 07:21:36,808 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-11-10 07:21:36,808 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:36,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:36,823 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:21:36,848 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:36,849 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3819 states to 903 states and 3663 transitions. [2018-11-10 07:21:36,849 INFO L276 IsEmpty]: Start isEmpty. Operand 903 states and 3663 transitions. [2018-11-10 07:21:36,850 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-11-10 07:21:36,850 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:36,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:36,866 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:21:37,560 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:37,561 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3850 states to 905 states and 3694 transitions. [2018-11-10 07:21:37,561 INFO L276 IsEmpty]: Start isEmpty. Operand 905 states and 3694 transitions. [2018-11-10 07:21:37,562 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-11-10 07:21:37,562 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:37,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:37,577 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:21:38,146 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:38,147 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3873 states to 907 states and 3716 transitions. [2018-11-10 07:21:38,147 INFO L276 IsEmpty]: Start isEmpty. Operand 907 states and 3716 transitions. [2018-11-10 07:21:38,149 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-11-10 07:21:38,149 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:38,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:38,171 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-10 07:21:38,190 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:38,191 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3875 states to 909 states and 3718 transitions. [2018-11-10 07:21:38,192 INFO L276 IsEmpty]: Start isEmpty. Operand 909 states and 3718 transitions. [2018-11-10 07:21:38,193 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-11-10 07:21:38,193 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:38,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:38,207 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-11-10 07:21:38,224 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:38,225 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3877 states to 911 states and 3720 transitions. [2018-11-10 07:21:38,225 INFO L276 IsEmpty]: Start isEmpty. Operand 911 states and 3720 transitions. [2018-11-10 07:21:38,226 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-11-10 07:21:38,226 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:38,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:38,241 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-11-10 07:21:40,808 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:40,809 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3913 states to 916 states and 3755 transitions. [2018-11-10 07:21:40,809 INFO L276 IsEmpty]: Start isEmpty. Operand 916 states and 3755 transitions. [2018-11-10 07:21:40,810 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-11-10 07:21:40,810 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:40,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:40,825 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-11-10 07:21:41,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:41,997 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3935 states to 919 states and 3776 transitions. [2018-11-10 07:21:41,997 INFO L276 IsEmpty]: Start isEmpty. Operand 919 states and 3776 transitions. [2018-11-10 07:21:41,998 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-11-10 07:21:41,998 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:42,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:42,013 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-11-10 07:21:42,027 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:42,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3937 states to 920 states and 3778 transitions. [2018-11-10 07:21:42,028 INFO L276 IsEmpty]: Start isEmpty. Operand 920 states and 3778 transitions. [2018-11-10 07:21:42,029 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-11-10 07:21:42,029 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:42,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:42,044 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-11-10 07:21:43,523 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:43,524 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3965 states to 923 states and 3805 transitions. [2018-11-10 07:21:43,524 INFO L276 IsEmpty]: Start isEmpty. Operand 923 states and 3805 transitions. [2018-11-10 07:21:43,525 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-11-10 07:21:43,525 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:43,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:43,540 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-11-10 07:21:44,669 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:44,670 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3994 states to 926 states and 3833 transitions. [2018-11-10 07:21:44,670 INFO L276 IsEmpty]: Start isEmpty. Operand 926 states and 3833 transitions. [2018-11-10 07:21:44,671 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-11-10 07:21:44,671 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:44,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:44,690 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-10 07:21:44,704 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:44,705 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3994 states to 927 states and 3833 transitions. [2018-11-10 07:21:44,705 INFO L276 IsEmpty]: Start isEmpty. Operand 927 states and 3833 transitions. [2018-11-10 07:21:44,706 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-10 07:21:44,706 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:44,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:44,720 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:21:45,679 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:45,680 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4003 states to 932 states and 3842 transitions. [2018-11-10 07:21:45,680 INFO L276 IsEmpty]: Start isEmpty. Operand 932 states and 3842 transitions. [2018-11-10 07:21:45,681 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-10 07:21:45,681 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:45,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:46,000 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:21:46,319 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:46,320 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3904 states to 931 states and 3743 transitions. [2018-11-10 07:21:46,320 INFO L276 IsEmpty]: Start isEmpty. Operand 931 states and 3743 transitions. [2018-11-10 07:21:46,321 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-10 07:21:46,321 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:46,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:46,334 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 17 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:21:46,359 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:46,360 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3906 states to 933 states and 3745 transitions. [2018-11-10 07:21:46,360 INFO L276 IsEmpty]: Start isEmpty. Operand 933 states and 3745 transitions. [2018-11-10 07:21:46,361 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-10 07:21:46,361 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:46,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:46,374 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 17 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:21:47,041 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:47,042 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3933 states to 935 states and 3772 transitions. [2018-11-10 07:21:47,042 INFO L276 IsEmpty]: Start isEmpty. Operand 935 states and 3772 transitions. [2018-11-10 07:21:47,043 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-11-10 07:21:47,043 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:47,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:47,058 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:21:47,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:47,868 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3949 states to 938 states and 3788 transitions. [2018-11-10 07:21:47,868 INFO L276 IsEmpty]: Start isEmpty. Operand 938 states and 3788 transitions. [2018-11-10 07:21:47,869 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-10 07:21:47,869 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:47,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:47,884 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:21:47,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:47,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3950 states to 940 states and 3789 transitions. [2018-11-10 07:21:47,902 INFO L276 IsEmpty]: Start isEmpty. Operand 940 states and 3789 transitions. [2018-11-10 07:21:47,903 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-11-10 07:21:47,903 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:47,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:47,917 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:21:48,259 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:48,261 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3952 states to 942 states and 3791 transitions. [2018-11-10 07:21:48,261 INFO L276 IsEmpty]: Start isEmpty. Operand 942 states and 3791 transitions. [2018-11-10 07:21:48,262 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-10 07:21:48,262 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:48,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:48,276 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-10 07:21:48,948 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:48,950 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3957 states to 945 states and 3796 transitions. [2018-11-10 07:21:48,950 INFO L276 IsEmpty]: Start isEmpty. Operand 945 states and 3796 transitions. [2018-11-10 07:21:48,951 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-10 07:21:48,951 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:48,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:48,965 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-10 07:21:49,006 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:49,007 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3960 states to 946 states and 3799 transitions. [2018-11-10 07:21:49,007 INFO L276 IsEmpty]: Start isEmpty. Operand 946 states and 3799 transitions. [2018-11-10 07:21:49,008 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-10 07:21:49,008 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:49,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:49,020 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-11-10 07:21:49,039 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:49,040 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3960 states to 947 states and 3799 transitions. [2018-11-10 07:21:49,040 INFO L276 IsEmpty]: Start isEmpty. Operand 947 states and 3799 transitions. [2018-11-10 07:21:49,041 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-11-10 07:21:49,041 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:49,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:49,099 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 29 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:21:49,777 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:49,778 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3962 states to 948 states and 3801 transitions. [2018-11-10 07:21:49,778 INFO L276 IsEmpty]: Start isEmpty. Operand 948 states and 3801 transitions. [2018-11-10 07:21:49,779 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-11-10 07:21:49,779 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:49,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:49,792 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 17 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:21:50,770 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:50,771 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3980 states to 951 states and 3819 transitions. [2018-11-10 07:21:50,771 INFO L276 IsEmpty]: Start isEmpty. Operand 951 states and 3819 transitions. [2018-11-10 07:21:50,772 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-11-10 07:21:50,772 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:50,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:50,787 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:21:51,496 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:51,497 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4005 states to 953 states and 3843 transitions. [2018-11-10 07:21:51,497 INFO L276 IsEmpty]: Start isEmpty. Operand 953 states and 3843 transitions. [2018-11-10 07:21:51,498 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-11-10 07:21:51,498 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:51,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:51,514 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:21:52,185 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:52,186 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4028 states to 955 states and 3865 transitions. [2018-11-10 07:21:52,186 INFO L276 IsEmpty]: Start isEmpty. Operand 955 states and 3865 transitions. [2018-11-10 07:21:52,187 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-11-10 07:21:52,187 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:52,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:52,202 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:21:52,866 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:52,867 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4050 states to 957 states and 3886 transitions. [2018-11-10 07:21:52,867 INFO L276 IsEmpty]: Start isEmpty. Operand 957 states and 3886 transitions. [2018-11-10 07:21:52,868 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-11-10 07:21:52,869 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:52,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:52,884 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:21:54,669 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:54,670 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4086 states to 961 states and 3922 transitions. [2018-11-10 07:21:54,670 INFO L276 IsEmpty]: Start isEmpty. Operand 961 states and 3922 transitions. [2018-11-10 07:21:54,671 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-11-10 07:21:54,671 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:54,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:54,686 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:21:55,862 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:55,863 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4118 states to 964 states and 3954 transitions. [2018-11-10 07:21:55,863 INFO L276 IsEmpty]: Start isEmpty. Operand 964 states and 3954 transitions. [2018-11-10 07:21:55,864 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-11-10 07:21:55,864 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:55,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:55,878 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:21:56,581 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:56,582 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4124 states to 967 states and 3960 transitions. [2018-11-10 07:21:56,582 INFO L276 IsEmpty]: Start isEmpty. Operand 967 states and 3960 transitions. [2018-11-10 07:21:56,583 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-11-10 07:21:56,583 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:56,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:56,596 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 17 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:21:58,259 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:58,260 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4192 states to 970 states and 4028 transitions. [2018-11-10 07:21:58,260 INFO L276 IsEmpty]: Start isEmpty. Operand 970 states and 4028 transitions. [2018-11-10 07:21:58,261 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-11-10 07:21:58,261 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:58,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:58,274 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 17 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:21:58,874 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:58,875 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4220 states to 972 states and 4056 transitions. [2018-11-10 07:21:58,875 INFO L276 IsEmpty]: Start isEmpty. Operand 972 states and 4056 transitions. [2018-11-10 07:21:58,876 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-11-10 07:21:58,876 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:58,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:58,889 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 17 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:21:59,535 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:21:59,537 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4247 states to 974 states and 4083 transitions. [2018-11-10 07:21:59,537 INFO L276 IsEmpty]: Start isEmpty. Operand 974 states and 4083 transitions. [2018-11-10 07:21:59,538 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-11-10 07:21:59,538 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:21:59,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:21:59,551 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 17 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:22:00,218 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:00,219 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4275 states to 976 states and 4111 transitions. [2018-11-10 07:22:00,219 INFO L276 IsEmpty]: Start isEmpty. Operand 976 states and 4111 transitions. [2018-11-10 07:22:00,220 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-11-10 07:22:00,220 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:00,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:00,235 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:22:00,603 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:00,605 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4278 states to 977 states and 4114 transitions. [2018-11-10 07:22:00,605 INFO L276 IsEmpty]: Start isEmpty. Operand 977 states and 4114 transitions. [2018-11-10 07:22:00,606 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-11-10 07:22:00,606 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:00,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:00,620 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-10 07:22:00,674 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:00,676 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4287 states to 980 states and 4123 transitions. [2018-11-10 07:22:00,676 INFO L276 IsEmpty]: Start isEmpty. Operand 980 states and 4123 transitions. [2018-11-10 07:22:00,677 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-11-10 07:22:00,677 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:00,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:00,689 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 14 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-10 07:22:01,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:01,396 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4291 states to 981 states and 4127 transitions. [2018-11-10 07:22:01,396 INFO L276 IsEmpty]: Start isEmpty. Operand 981 states and 4127 transitions. [2018-11-10 07:22:01,397 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-11-10 07:22:01,397 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:01,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:01,410 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-11-10 07:22:01,421 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:01,423 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4291 states to 982 states and 4127 transitions. [2018-11-10 07:22:01,423 INFO L276 IsEmpty]: Start isEmpty. Operand 982 states and 4127 transitions. [2018-11-10 07:22:01,424 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-11-10 07:22:01,424 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:01,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:01,438 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-11-10 07:22:01,737 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:01,738 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4291 states to 983 states and 4127 transitions. [2018-11-10 07:22:01,738 INFO L276 IsEmpty]: Start isEmpty. Operand 983 states and 4127 transitions. [2018-11-10 07:22:01,739 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-11-10 07:22:01,739 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:01,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:01,753 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-11-10 07:22:02,435 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:02,436 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4291 states to 984 states and 4127 transitions. [2018-11-10 07:22:02,437 INFO L276 IsEmpty]: Start isEmpty. Operand 984 states and 4127 transitions. [2018-11-10 07:22:02,438 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-11-10 07:22:02,438 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:02,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:02,731 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:22:06,248 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:06,249 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4371 states to 992 states and 4206 transitions. [2018-11-10 07:22:06,249 INFO L276 IsEmpty]: Start isEmpty. Operand 992 states and 4206 transitions. [2018-11-10 07:22:06,250 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-11-10 07:22:06,250 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:06,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:06,263 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:22:07,045 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:07,046 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4388 states to 993 states and 4223 transitions. [2018-11-10 07:22:07,046 INFO L276 IsEmpty]: Start isEmpty. Operand 993 states and 4223 transitions. [2018-11-10 07:22:07,047 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-11-10 07:22:07,048 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:07,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:07,061 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:22:07,775 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:07,776 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4411 states to 995 states and 4245 transitions. [2018-11-10 07:22:07,776 INFO L276 IsEmpty]: Start isEmpty. Operand 995 states and 4245 transitions. [2018-11-10 07:22:07,777 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-11-10 07:22:07,777 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:07,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:07,790 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:22:08,503 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:08,505 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4436 states to 997 states and 4268 transitions. [2018-11-10 07:22:08,505 INFO L276 IsEmpty]: Start isEmpty. Operand 997 states and 4268 transitions. [2018-11-10 07:22:08,506 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-11-10 07:22:08,506 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:08,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:08,519 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:22:09,253 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:09,255 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4459 states to 999 states and 4289 transitions. [2018-11-10 07:22:09,255 INFO L276 IsEmpty]: Start isEmpty. Operand 999 states and 4289 transitions. [2018-11-10 07:22:09,256 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-11-10 07:22:09,256 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:09,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:09,270 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:22:09,317 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:09,318 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4469 states to 1002 states and 4299 transitions. [2018-11-10 07:22:09,318 INFO L276 IsEmpty]: Start isEmpty. Operand 1002 states and 4299 transitions. [2018-11-10 07:22:09,319 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-11-10 07:22:09,319 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:09,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:09,334 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-11-10 07:22:10,706 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:10,707 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4479 states to 1007 states and 4309 transitions. [2018-11-10 07:22:10,707 INFO L276 IsEmpty]: Start isEmpty. Operand 1007 states and 4309 transitions. [2018-11-10 07:22:10,708 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-11-10 07:22:10,708 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:10,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:10,723 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:22:11,566 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:11,567 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4485 states to 1008 states and 4315 transitions. [2018-11-10 07:22:11,568 INFO L276 IsEmpty]: Start isEmpty. Operand 1008 states and 4315 transitions. [2018-11-10 07:22:11,568 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-11-10 07:22:11,569 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:11,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:12,030 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 6 proven. 7 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-10 07:22:14,319 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:14,320 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4522 states to 1013 states and 4350 transitions. [2018-11-10 07:22:14,320 INFO L276 IsEmpty]: Start isEmpty. Operand 1013 states and 4350 transitions. [2018-11-10 07:22:14,321 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-11-10 07:22:14,321 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:14,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:14,336 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:22:15,051 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:15,053 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4550 states to 1015 states and 4377 transitions. [2018-11-10 07:22:15,053 INFO L276 IsEmpty]: Start isEmpty. Operand 1015 states and 4377 transitions. [2018-11-10 07:22:15,054 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-11-10 07:22:15,054 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:15,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:15,069 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:22:15,772 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:15,774 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4583 states to 1017 states and 4409 transitions. [2018-11-10 07:22:15,774 INFO L276 IsEmpty]: Start isEmpty. Operand 1017 states and 4409 transitions. [2018-11-10 07:22:15,775 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-11-10 07:22:15,775 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:15,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:15,796 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-11-10 07:22:17,185 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:17,186 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4588 states to 1020 states and 4414 transitions. [2018-11-10 07:22:17,187 INFO L276 IsEmpty]: Start isEmpty. Operand 1020 states and 4414 transitions. [2018-11-10 07:22:17,188 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-11-10 07:22:17,188 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:17,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:17,203 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-11-10 07:22:17,879 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:17,880 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4591 states to 1021 states and 4417 transitions. [2018-11-10 07:22:17,880 INFO L276 IsEmpty]: Start isEmpty. Operand 1021 states and 4417 transitions. [2018-11-10 07:22:17,881 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-11-10 07:22:17,881 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:17,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:17,896 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-11-10 07:22:18,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:18,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4594 states to 1022 states and 4420 transitions. [2018-11-10 07:22:18,555 INFO L276 IsEmpty]: Start isEmpty. Operand 1022 states and 4420 transitions. [2018-11-10 07:22:18,556 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-11-10 07:22:18,556 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:18,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:18,572 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-11-10 07:22:19,288 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:19,289 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4596 states to 1023 states and 4422 transitions. [2018-11-10 07:22:19,289 INFO L276 IsEmpty]: Start isEmpty. Operand 1023 states and 4422 transitions. [2018-11-10 07:22:19,290 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-11-10 07:22:19,290 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:19,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:19,306 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-11-10 07:22:21,163 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:21,164 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4609 states to 1026 states and 4435 transitions. [2018-11-10 07:22:21,164 INFO L276 IsEmpty]: Start isEmpty. Operand 1026 states and 4435 transitions. [2018-11-10 07:22:21,165 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-11-10 07:22:21,166 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:21,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:21,180 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-11-10 07:22:23,269 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:23,271 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4641 states to 1030 states and 4466 transitions. [2018-11-10 07:22:23,271 INFO L276 IsEmpty]: Start isEmpty. Operand 1030 states and 4466 transitions. [2018-11-10 07:22:23,272 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-11-10 07:22:23,272 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:23,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:23,288 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-11-10 07:22:23,942 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:23,943 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4660 states to 1032 states and 4484 transitions. [2018-11-10 07:22:23,943 INFO L276 IsEmpty]: Start isEmpty. Operand 1032 states and 4484 transitions. [2018-11-10 07:22:23,944 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-11-10 07:22:23,945 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:23,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:23,959 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-11-10 07:22:25,333 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:25,335 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4687 states to 1035 states and 4510 transitions. [2018-11-10 07:22:25,335 INFO L276 IsEmpty]: Start isEmpty. Operand 1035 states and 4510 transitions. [2018-11-10 07:22:25,336 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-11-10 07:22:25,336 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:25,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:25,351 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-11-10 07:22:26,024 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:26,025 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4710 states to 1037 states and 4532 transitions. [2018-11-10 07:22:26,025 INFO L276 IsEmpty]: Start isEmpty. Operand 1037 states and 4532 transitions. [2018-11-10 07:22:26,026 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-11-10 07:22:26,026 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:26,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:26,041 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-11-10 07:22:26,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:26,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4729 states to 1039 states and 4550 transitions. [2018-11-10 07:22:26,673 INFO L276 IsEmpty]: Start isEmpty. Operand 1039 states and 4550 transitions. [2018-11-10 07:22:26,674 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-11-10 07:22:26,674 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:26,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:26,689 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-11-10 07:22:27,382 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:27,384 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4752 states to 1041 states and 4572 transitions. [2018-11-10 07:22:27,384 INFO L276 IsEmpty]: Start isEmpty. Operand 1041 states and 4572 transitions. [2018-11-10 07:22:27,385 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-11-10 07:22:27,385 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:27,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:27,400 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:22:27,762 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:27,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4753 states to 1042 states and 4573 transitions. [2018-11-10 07:22:27,764 INFO L276 IsEmpty]: Start isEmpty. Operand 1042 states and 4573 transitions. [2018-11-10 07:22:27,765 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-11-10 07:22:27,765 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:27,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:27,778 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 17 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:22:27,871 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:27,872 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4809 states to 1045 states and 4629 transitions. [2018-11-10 07:22:27,873 INFO L276 IsEmpty]: Start isEmpty. Operand 1045 states and 4629 transitions. [2018-11-10 07:22:27,874 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-11-10 07:22:27,874 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:27,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:27,887 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-10 07:22:29,189 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:29,191 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4823 states to 1050 states and 4642 transitions. [2018-11-10 07:22:29,191 INFO L276 IsEmpty]: Start isEmpty. Operand 1050 states and 4642 transitions. [2018-11-10 07:22:29,192 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-11-10 07:22:29,192 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:29,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:29,205 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-10 07:22:29,220 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:29,221 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4823 states to 1051 states and 4642 transitions. [2018-11-10 07:22:29,222 INFO L276 IsEmpty]: Start isEmpty. Operand 1051 states and 4642 transitions. [2018-11-10 07:22:29,223 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-11-10 07:22:29,223 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:29,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:29,238 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-11-10 07:22:29,566 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:29,568 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4825 states to 1052 states and 4644 transitions. [2018-11-10 07:22:29,568 INFO L276 IsEmpty]: Start isEmpty. Operand 1052 states and 4644 transitions. [2018-11-10 07:22:29,569 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-11-10 07:22:29,569 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:29,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:29,583 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-11-10 07:22:30,245 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:30,246 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4828 states to 1054 states and 4647 transitions. [2018-11-10 07:22:30,246 INFO L276 IsEmpty]: Start isEmpty. Operand 1054 states and 4647 transitions. [2018-11-10 07:22:30,247 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-11-10 07:22:30,247 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:30,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:30,408 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:22:31,239 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:31,240 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4835 states to 1057 states and 4654 transitions. [2018-11-10 07:22:31,240 INFO L276 IsEmpty]: Start isEmpty. Operand 1057 states and 4654 transitions. [2018-11-10 07:22:31,241 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2018-11-10 07:22:31,241 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:31,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:31,257 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-11-10 07:22:32,819 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:32,820 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4845 states to 1059 states and 4664 transitions. [2018-11-10 07:22:32,820 INFO L276 IsEmpty]: Start isEmpty. Operand 1059 states and 4664 transitions. [2018-11-10 07:22:32,822 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2018-11-10 07:22:32,822 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:32,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:32,837 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-11-10 07:22:34,376 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:34,377 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4848 states to 1061 states and 4667 transitions. [2018-11-10 07:22:34,377 INFO L276 IsEmpty]: Start isEmpty. Operand 1061 states and 4667 transitions. [2018-11-10 07:22:34,378 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-11-10 07:22:34,379 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:34,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:34,394 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-11-10 07:22:35,321 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:35,322 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4849 states to 1062 states and 4668 transitions. [2018-11-10 07:22:35,322 INFO L276 IsEmpty]: Start isEmpty. Operand 1062 states and 4668 transitions. [2018-11-10 07:22:35,324 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-11-10 07:22:35,324 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:35,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:35,340 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-11-10 07:22:36,023 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:36,024 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4850 states to 1063 states and 4669 transitions. [2018-11-10 07:22:36,024 INFO L276 IsEmpty]: Start isEmpty. Operand 1063 states and 4669 transitions. [2018-11-10 07:22:36,025 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-11-10 07:22:36,025 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:36,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:36,040 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-11-10 07:22:37,481 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:37,483 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4853 states to 1065 states and 4672 transitions. [2018-11-10 07:22:37,483 INFO L276 IsEmpty]: Start isEmpty. Operand 1065 states and 4672 transitions. [2018-11-10 07:22:37,484 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-11-10 07:22:37,484 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:37,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:37,502 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-11-10 07:22:37,876 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:37,878 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4853 states to 1066 states and 4672 transitions. [2018-11-10 07:22:37,878 INFO L276 IsEmpty]: Start isEmpty. Operand 1066 states and 4672 transitions. [2018-11-10 07:22:37,879 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-11-10 07:22:37,879 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:37,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:37,893 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-10 07:22:38,577 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:38,579 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4856 states to 1068 states and 4675 transitions. [2018-11-10 07:22:38,579 INFO L276 IsEmpty]: Start isEmpty. Operand 1068 states and 4675 transitions. [2018-11-10 07:22:38,580 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-11-10 07:22:38,580 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:38,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:38,594 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-10 07:22:39,450 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:39,451 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4859 states to 1070 states and 4678 transitions. [2018-11-10 07:22:39,451 INFO L276 IsEmpty]: Start isEmpty. Operand 1070 states and 4678 transitions. [2018-11-10 07:22:39,452 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-11-10 07:22:39,452 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:39,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:39,466 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-10 07:22:40,203 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:40,204 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4859 states to 1071 states and 4678 transitions. [2018-11-10 07:22:40,204 INFO L276 IsEmpty]: Start isEmpty. Operand 1071 states and 4678 transitions. [2018-11-10 07:22:40,206 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-11-10 07:22:40,206 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:40,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:40,221 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-11-10 07:22:40,234 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:40,236 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4860 states to 1072 states and 4679 transitions. [2018-11-10 07:22:40,236 INFO L276 IsEmpty]: Start isEmpty. Operand 1072 states and 4679 transitions. [2018-11-10 07:22:40,237 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-11-10 07:22:40,237 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:40,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:40,252 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:22:40,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:40,641 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4866 states to 1075 states and 4685 transitions. [2018-11-10 07:22:40,641 INFO L276 IsEmpty]: Start isEmpty. Operand 1075 states and 4685 transitions. [2018-11-10 07:22:40,643 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-11-10 07:22:40,643 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:40,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:40,657 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:22:40,677 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:40,678 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4866 states to 1076 states and 4685 transitions. [2018-11-10 07:22:40,678 INFO L276 IsEmpty]: Start isEmpty. Operand 1076 states and 4685 transitions. [2018-11-10 07:22:40,679 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-11-10 07:22:40,679 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:40,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:41,137 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2018-11-10 07:22:42,381 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:42,383 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4868 states to 1077 states and 4687 transitions. [2018-11-10 07:22:42,383 INFO L276 IsEmpty]: Start isEmpty. Operand 1077 states and 4687 transitions. [2018-11-10 07:22:42,384 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-11-10 07:22:42,384 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:42,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:42,811 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2018-11-10 07:22:44,091 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:44,093 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4870 states to 1078 states and 4689 transitions. [2018-11-10 07:22:44,093 INFO L276 IsEmpty]: Start isEmpty. Operand 1078 states and 4689 transitions. [2018-11-10 07:22:44,094 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-11-10 07:22:44,094 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:44,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:44,573 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2018-11-10 07:22:45,889 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:45,891 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4871 states to 1079 states and 4690 transitions. [2018-11-10 07:22:45,891 INFO L276 IsEmpty]: Start isEmpty. Operand 1079 states and 4690 transitions. [2018-11-10 07:22:45,892 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2018-11-10 07:22:45,892 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:45,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:22:46,303 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2018-11-10 07:22:47,586 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:22:47,588 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4872 states to 1080 states and 4691 transitions. [2018-11-10 07:22:47,588 INFO L276 IsEmpty]: Start isEmpty. Operand 1080 states and 4691 transitions. [2018-11-10 07:22:47,589 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-11-10 07:22:47,589 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:22:47,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 07:22:47,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 07:22:48,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 07:22:49,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 07:22:49,163 WARN L496 CodeCheckObserver]: This program is UNSAFE, Check terminated with 343 iterations. [2018-11-10 07:22:49,189 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,190 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,190 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,191 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,191 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,191 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,192 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,192 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,192 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,193 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,193 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,193 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,194 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,194 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,194 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,195 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,195 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,195 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,196 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,196 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,196 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,196 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,196 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,197 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,197 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,197 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,197 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,198 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,198 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,198 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,198 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,198 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,199 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,199 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,199 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,199 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,200 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,200 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,200 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,200 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,201 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,201 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,201 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,202 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,202 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,202 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,204 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,204 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,205 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,205 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,205 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,206 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,206 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,206 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,207 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,207 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,208 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,208 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,208 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,209 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,209 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,209 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,209 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,210 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,210 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,210 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,210 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,211 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,211 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,211 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,211 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,212 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,212 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,212 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,212 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,213 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,213 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,213 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,213 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,214 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,214 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,214 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,214 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,214 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,215 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,215 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,215 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,215 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,215 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,216 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,216 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,216 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,216 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,216 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,217 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,217 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,217 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,217 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,217 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,218 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,218 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,218 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,218 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,218 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,218 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,218 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,219 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,219 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,219 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,219 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,219 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,219 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,220 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,220 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,220 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,220 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,221 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,221 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,221 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,221 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,221 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,222 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,222 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,222 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,222 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,222 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,223 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,223 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,223 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,223 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,224 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,224 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,224 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,224 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,225 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,225 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,225 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-10 07:22:49,225 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-10 07:22:49,267 WARN L1239 BoogieBacktranslator]: unknown boogie variable platform_driver_probe_#in~82 [2018-11-10 07:22:49,271 WARN L1239 BoogieBacktranslator]: unknown boogie variable platform_driver_probe_#in~82 [2018-11-10 07:22:49,272 WARN L1239 BoogieBacktranslator]: unknown boogie variable platform_driver_probe_#in~82 [2018-11-10 07:22:49,275 WARN L1239 BoogieBacktranslator]: unknown boogie variable platform_driver_probe_#in~82 [2018-11-10 07:22:49,276 WARN L1239 BoogieBacktranslator]: unknown boogie variable platform_driver_probe_#in~82 [2018-11-10 07:22:49,277 WARN L1239 BoogieBacktranslator]: unknown boogie variable platform_driver_probe_#in~82 [2018-11-10 07:22:49,278 WARN L1239 BoogieBacktranslator]: unknown boogie variable platform_driver_probe_#in~82 [2018-11-10 07:22:49,280 WARN L1239 BoogieBacktranslator]: unknown boogie variable platform_driver_probe_#in~82 [2018-11-10 07:22:49,281 WARN L1239 BoogieBacktranslator]: unknown boogie variable platform_driver_probe_#in~82 [2018-11-10 07:22:49,305 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.codecheck CFG 10.11 07:22:49 ImpRootNode [2018-11-10 07:22:49,305 INFO L132 PluginConnector]: ------------------------ END CodeCheck---------------------------- [2018-11-10 07:22:49,307 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-10 07:22:49,307 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-10 07:22:49,307 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-10 07:22:49,309 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.11 07:19:14" (3/4) ... [2018-11-10 07:22:49,314 INFO L147 WitnessPrinter]: No result that supports witness generation found [2018-11-10 07:22:49,314 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-10 07:22:49,314 INFO L168 Benchmark]: Toolchain (without parser) took 218899.48 ms. Allocated memory was 1.0 GB in the beginning and 3.9 GB in the end (delta: 2.9 GB). Free memory was 954.9 MB in the beginning and 1.0 GB in the end (delta: -60.0 MB). Peak memory consumption was 2.8 GB. Max. memory is 11.5 GB. [2018-11-10 07:22:49,316 INFO L168 Benchmark]: CDTParser took 0.11 ms. Allocated memory is still 1.0 GB. Free memory is still 985.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-10 07:22:49,316 INFO L168 Benchmark]: CACSL2BoogieTranslator took 919.10 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 165.7 MB). Free memory was 954.9 MB in the beginning and 1.1 GB in the end (delta: -134.2 MB). Peak memory consumption was 110.5 MB. Max. memory is 11.5 GB. [2018-11-10 07:22:49,316 INFO L168 Benchmark]: Boogie Procedure Inliner took 58.27 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.0 MB). Peak memory consumption was 6.0 MB. Max. memory is 11.5 GB. [2018-11-10 07:22:49,316 INFO L168 Benchmark]: Boogie Preprocessor took 48.11 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.0 MB). Peak memory consumption was 3.0 MB. Max. memory is 11.5 GB. [2018-11-10 07:22:49,317 INFO L168 Benchmark]: RCFGBuilder took 3402.72 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 992.9 MB in the end (delta: 87.1 MB). Peak memory consumption was 194.8 MB. Max. memory is 11.5 GB. [2018-11-10 07:22:49,317 INFO L168 Benchmark]: CodeCheck took 214460.02 ms. Allocated memory was 1.2 GB in the beginning and 3.9 GB in the end (delta: 2.7 GB). Free memory was 992.9 MB in the beginning and 1.0 GB in the end (delta: -21.9 MB). Peak memory consumption was 2.7 GB. Max. memory is 11.5 GB. [2018-11-10 07:22:49,317 INFO L168 Benchmark]: Witness Printer took 7.05 ms. Allocated memory is still 3.9 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-10 07:22:49,318 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.codecheck: - StatisticsResult: Ultimate CodeCheck benchmark data CFG has 20 procedures, 450 locations, 1 error locations. UNSAFE Result, 214.2s OverallTime, 343 OverallIterations, 0 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 25952384 SDtfs, -1867604352 SDslu, 1118316608 SDs, 0 SdLazy, -1289306504 SolverSat, 159383688 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1103.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 237273 GetRequests, 234981 SyntacticMatches, 422 SemanticMatches, 1870 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1913269 ImplicationChecksByTransitivity, 196.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=-1occurred in iteration=-1, traceCheckStatistics: 0.5s SsaConstructionTime, 2.0s SatisfiabilityAnalysisTime, 8.0s InterpolantComputationTime, 16436 NumberOfCodeBlocks, 16436 NumberOfCodeBlocksAsserted, 343 NumberOfCheckSat, 16032 ConstructedInterpolants, 0 QuantifiedInterpolants, 1517659 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 342 InterpolantComputations, 312 PerfectInterpolantSequences, 4037/4161 InterpolantCoveringCapability, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: No data available, ReuseStatistics: No data available - UnprovableResult [Line: 1684]: Unable to prove that call of __VERIFIER_error() unreachable Unable to prove that call of __VERIFIER_error() unreachable Reason: overapproximation of large string literal at line 2323, overapproximation of bitwiseAnd at line 1870. Possible FailurePath: [L1905] FCALL "write failed:retry count exceeded.\n" [L2072] FCALL "name\t\t: %s\n" [L2150] FCALL "Unable to allocate resources for device.\n" [L2159] FCALL "Unable to request mem region for device.\n" [L2175] FCALL "Unable to grab IOs for device.\n" [L2189] FCALL "info->tegra_rtc_lock" [L2211] FCALL "Unable to register device (err=%d).\n" [L2218] FCALL "rtc alarm" [L2220] FCALL "Unable to request interrupt for device (err=%d).\n" [L2226] FCALL "Tegra internal Real Time Clock\n" [L2323] EXPR, FCALL "tegra_rtc" [L1713] int ldv_irq_1_2 = 0; [L1714] int LDV_IN_INTERRUPT = 1; [L1715] int ldv_irq_1_3 = 0; [L1717] void *ldv_irq_data_1_1 ; [L1718] int ldv_irq_1_1 = 0; [L1719] int ldv_irq_1_0 = 0; [L1720] int ldv_irq_line_1_3 ; [L1721] void *ldv_irq_data_1_0 ; [L1722] int ldv_state_variable_0 ; [L1724] int ldv_state_variable_3 ; [L1725] int ldv_irq_line_1_0 ; [L1726] int ldv_state_variable_2 ; [L1727] void *ldv_irq_data_1_3 ; [L1728] int ref_cnt ; [L1729] int ldv_irq_line_1_1 ; [L1731] void *ldv_irq_data_1_2 ; [L1732] int ldv_state_variable_1 ; [L1733] int ldv_irq_line_1_2 ; [L2342] int ldv_retval_2 ; [L2343] int ldv_retval_0 ; [L2345] int ldv_retval_1 ; [L2943] int ldv_init = 0; [L1716] struct platform_device *tegra_rtc_driver_group0 ; [L1723] struct device *tegra_rtc_ops_group1 ; [L1730] struct rtc_time *tegra_rtc_ops_group0 ; [L1734] struct rtc_wkalrm *tegra_rtc_ops_group2 ; [L2123-L2125] FCALL static struct rtc_class_ops tegra_rtc_ops = {0, 0, 0, & tegra_rtc_read_time, & tegra_rtc_set_time, & tegra_rtc_read_alarm, & tegra_rtc_set_alarm, & tegra_rtc_proc, 0, 0, & tegra_rtc_alarm_irq_enable}; [L2322-L2323] FCALL static struct platform_driver tegra_rtc_driver = {0, & tegra_rtc_remove, & tegra_rtc_shutdown, & tegra_rtc_suspend, & tegra_rtc_resume, {"tegra_rtc", 0, & __this_module, 0, (_Bool)0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, 0}; [L2322-L2323] RET static struct platform_driver tegra_rtc_driver = {0, & tegra_rtc_remove, & tegra_rtc_shutdown, & tegra_rtc_suspend, & tegra_rtc_resume, {"tegra_rtc", 0, & __this_module, 0, (_Bool)0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, 0}; [L2518] struct seq_file *ldvarg1 ; [L2519] void *tmp ; [L2520] unsigned int ldvarg0 ; [L2521] unsigned int tmp___0 ; [L2522] FCALL pm_message_t ldvarg2 ; [L2523] int tmp___1 ; [L2524] int tmp___2 ; [L2525] int tmp___3 ; [L2526] int tmp___4 ; VAL ["info->tegra_rtc_lock"={34:0}, "name\t\t: %s\n"={20:0}, "rtc alarm"={38:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={144:0}, "Unable to allocate resources for device.\n"={26:0}, "Unable to grab IOs for device.\n"={28:0}, "Unable to register device (err=%d).\n"={35:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={27:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={156:149}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={51:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={44:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2529] CALL, EXPR ldv_zalloc(136U) VAL ["info->tegra_rtc_lock"={34:0}, "name\t\t: %s\n"={20:0}, "rtc alarm"={38:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={144:0}, "Unable to allocate resources for device.\n"={26:0}, "Unable to grab IOs for device.\n"={28:0}, "Unable to register device (err=%d).\n"={35:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={27:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={156:149}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={51:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={44:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1635] void *p ; [L1636] void *tmp ; [L1637] int tmp___0 ; [L1640] tmp___0 = __VERIFIER_nondet_int() [L1641] COND TRUE tmp___0 != 0 [L1642] RET return (0); VAL ["info->tegra_rtc_lock"={34:0}, "name\t\t: %s\n"={20:0}, "rtc alarm"={38:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={144:0}, "Unable to allocate resources for device.\n"={26:0}, "Unable to grab IOs for device.\n"={28:0}, "Unable to register device (err=%d).\n"={35:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={27:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={156:149}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={51:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={44:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2529] EXPR ldv_zalloc(136U) VAL ["info->tegra_rtc_lock"={34:0}, "name\t\t: %s\n"={20:0}, "rtc alarm"={38:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={144:0}, "Unable to allocate resources for device.\n"={26:0}, "Unable to grab IOs for device.\n"={28:0}, "Unable to register device (err=%d).\n"={35:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={27:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={156:149}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={51:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={44:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2529] tmp = ldv_zalloc(136U) [L2530] ldvarg1 = (struct seq_file *)tmp [L2531] tmp___0 = __VERIFIER_nondet_uint() [L2532] ldvarg0 = tmp___0 [L2533] FCALL ldv_initialize() [L2534] FCALL memset((void *)(& ldvarg2), 0, 4U) [L2535] ldv_state_variable_1 = 1 [L2536] ref_cnt = 0 [L2537] ldv_state_variable_0 = 1 [L2538] ldv_state_variable_3 = 0 [L2539] ldv_state_variable_2 = 0 VAL ["info->tegra_rtc_lock"={34:0}, "name\t\t: %s\n"={20:0}, "rtc alarm"={38:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={144:0}, "Unable to allocate resources for device.\n"={26:0}, "Unable to grab IOs for device.\n"={28:0}, "Unable to register device (err=%d).\n"={35:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={27:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={156:149}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={51:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={44:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2541] tmp___1 = __VERIFIER_nondet_int() [L2543] case 0: [L2550] case 1: VAL ["info->tegra_rtc_lock"={34:0}, "name\t\t: %s\n"={20:0}, "rtc alarm"={38:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={144:0}, "Unable to allocate resources for device.\n"={26:0}, "Unable to grab IOs for device.\n"={28:0}, "Unable to register device (err=%d).\n"={35:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={27:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={156:149}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={51:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={44:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2551] COND TRUE ldv_state_variable_0 != 0 [L2552] tmp___2 = __VERIFIER_nondet_int() [L2554] case 0: [L2563] case 1: VAL ["info->tegra_rtc_lock"={34:0}, "name\t\t: %s\n"={20:0}, "rtc alarm"={38:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={144:0}, "Unable to allocate resources for device.\n"={26:0}, "Unable to grab IOs for device.\n"={28:0}, "Unable to register device (err=%d).\n"={35:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={27:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={156:149}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={51:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={44:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2564] COND TRUE ldv_state_variable_0 == 1 [L2565] CALL, EXPR tegra_rtc_init() [L2326] int tmp ; [L2329] EXPR, FCALL platform_driver_probe(& tegra_rtc_driver, & tegra_rtc_probe) [L2329] tmp = platform_driver_probe(& tegra_rtc_driver, & tegra_rtc_probe) [L2330] RET return (tmp); [L2565] EXPR tegra_rtc_init() [L2565] ldv_retval_0 = tegra_rtc_init() [L2566] COND TRUE ldv_retval_0 == 0 [L2567] ldv_state_variable_0 = 3 [L2568] ldv_state_variable_2 = 1 [L2569] CALL ldv_initialize_platform_driver_2() [L2476] void *tmp ; VAL ["info->tegra_rtc_lock"={34:0}, "name\t\t: %s\n"={20:0}, "rtc alarm"={38:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={144:0}, "Unable to allocate resources for device.\n"={26:0}, "Unable to grab IOs for device.\n"={28:0}, "Unable to register device (err=%d).\n"={35:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={27:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={156:149}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, platform_driver_probe_#in~82={-1:11}, ref_cnt=0, tegra_rtc_driver={51:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={44:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2479] CALL, EXPR ldv_zalloc(624U) VAL ["info->tegra_rtc_lock"={34:0}, "name\t\t: %s\n"={20:0}, "rtc alarm"={38:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={144:0}, "Unable to allocate resources for device.\n"={26:0}, "Unable to grab IOs for device.\n"={28:0}, "Unable to register device (err=%d).\n"={35:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={27:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={156:149}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={51:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={44:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1635] void *p ; [L1636] void *tmp ; [L1637] int tmp___0 ; [L1640] tmp___0 = __VERIFIER_nondet_int() [L1641] COND TRUE tmp___0 != 0 [L1642] RET return (0); VAL ["info->tegra_rtc_lock"={34:0}, "name\t\t: %s\n"={20:0}, "rtc alarm"={38:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={144:0}, "Unable to allocate resources for device.\n"={26:0}, "Unable to grab IOs for device.\n"={28:0}, "Unable to register device (err=%d).\n"={35:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={27:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={156:149}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={51:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={44:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2479] EXPR ldv_zalloc(624U) VAL ["info->tegra_rtc_lock"={34:0}, "name\t\t: %s\n"={20:0}, "rtc alarm"={38:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={144:0}, "Unable to allocate resources for device.\n"={26:0}, "Unable to grab IOs for device.\n"={28:0}, "Unable to register device (err=%d).\n"={35:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={27:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={156:149}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, platform_driver_probe_#in~82={-1:11}, ref_cnt=0, tegra_rtc_driver={51:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={44:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2479] tmp = ldv_zalloc(624U) [L2480] RET tegra_rtc_driver_group0 = (struct platform_device *)tmp [L2569] ldv_initialize_platform_driver_2() [L2573] COND FALSE !(ldv_retval_0 != 0) VAL ["info->tegra_rtc_lock"={34:0}, "name\t\t: %s\n"={20:0}, "rtc alarm"={38:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={144:0}, "Unable to allocate resources for device.\n"={26:0}, "Unable to grab IOs for device.\n"={28:0}, "Unable to register device (err=%d).\n"={35:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={27:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={156:149}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, platform_driver_probe_#in~82={-1:11}, ref_cnt=0, tegra_rtc_driver={51:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={44:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2541] tmp___1 = __VERIFIER_nondet_int() [L2543] case 0: [L2550] case 1: [L2591] case 2: [L2699] case 3: VAL ["info->tegra_rtc_lock"={34:0}, "name\t\t: %s\n"={20:0}, "rtc alarm"={38:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={144:0}, "Unable to allocate resources for device.\n"={26:0}, "Unable to grab IOs for device.\n"={28:0}, "Unable to register device (err=%d).\n"={35:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={27:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={156:149}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, platform_driver_probe_#in~82={-1:11}, ref_cnt=0, tegra_rtc_driver={51:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={44:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2700] COND TRUE ldv_state_variable_2 != 0 [L2701] tmp___4 = __VERIFIER_nondet_int() [L2703] case 0: [L2717] case 1: [L2729] case 2: [L2752] case 3: [L2764] case 4: [L2765] COND TRUE ldv_state_variable_2 == 1 [L2766] FCALL ldv_probe_2() [L2767] ldv_state_variable_2 = 2 [L2768] ref_cnt = ref_cnt + 1 VAL ["info->tegra_rtc_lock"={34:0}, "name\t\t: %s\n"={20:0}, "rtc alarm"={38:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={144:0}, "Unable to allocate resources for device.\n"={26:0}, "Unable to grab IOs for device.\n"={28:0}, "Unable to register device (err=%d).\n"={35:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={27:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={156:149}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, platform_driver_probe_#in~82={-1:11}, ref_cnt=1, tegra_rtc_driver={51:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={44:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2541] tmp___1 = __VERIFIER_nondet_int() [L2543] case 0: [L2550] case 1: [L2591] case 2: [L2699] case 3: VAL ["info->tegra_rtc_lock"={34:0}, "name\t\t: %s\n"={20:0}, "rtc alarm"={38:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={144:0}, "Unable to allocate resources for device.\n"={26:0}, "Unable to grab IOs for device.\n"={28:0}, "Unable to register device (err=%d).\n"={35:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={27:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={156:149}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, platform_driver_probe_#in~82={-1:11}, ref_cnt=1, tegra_rtc_driver={51:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={44:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2700] COND TRUE ldv_state_variable_2 != 0 [L2701] tmp___4 = __VERIFIER_nondet_int() [L2703] case 0: VAL ["info->tegra_rtc_lock"={34:0}, "name\t\t: %s\n"={20:0}, "rtc alarm"={38:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={144:0}, "Unable to allocate resources for device.\n"={26:0}, "Unable to grab IOs for device.\n"={28:0}, "Unable to register device (err=%d).\n"={35:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={27:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={156:149}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, platform_driver_probe_#in~82={-1:11}, ref_cnt=1, tegra_rtc_driver={51:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={44:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2704] COND FALSE !(ldv_state_variable_2 == 4) VAL ["info->tegra_rtc_lock"={34:0}, "name\t\t: %s\n"={20:0}, "rtc alarm"={38:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={144:0}, "Unable to allocate resources for device.\n"={26:0}, "Unable to grab IOs for device.\n"={28:0}, "Unable to register device (err=%d).\n"={35:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={27:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={156:149}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, platform_driver_probe_#in~82={-1:11}, ref_cnt=1, tegra_rtc_driver={51:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={44:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2710] COND TRUE ldv_state_variable_2 == 2 VAL ["info->tegra_rtc_lock"={34:0}, "name\t\t: %s\n"={20:0}, "rtc alarm"={38:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={144:0}, "Unable to allocate resources for device.\n"={26:0}, "Unable to grab IOs for device.\n"={28:0}, "Unable to register device (err=%d).\n"={35:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={27:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={156:149}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, platform_driver_probe_#in~82={-1:11}, ref_cnt=1, tegra_rtc_driver={51:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={44:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2711] CALL tegra_rtc_shutdown(tegra_rtc_driver_group0) VAL ["info->tegra_rtc_lock"={34:0}, "name\t\t: %s\n"={20:0}, "rtc alarm"={38:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={144:0}, "Unable to allocate resources for device.\n"={26:0}, "Unable to grab IOs for device.\n"={28:0}, "Unable to register device (err=%d).\n"={35:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={27:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={156:149}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, pdev={0:0}, ref_cnt=1, tegra_rtc_driver={51:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={44:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2318] CALL tegra_rtc_alarm_irq_enable(& pdev->dev, 0U) VAL ["info->tegra_rtc_lock"={34:0}, "name\t\t: %s\n"={20:0}, "rtc alarm"={38:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={144:0}, "Unable to allocate resources for device.\n"={26:0}, "Unable to grab IOs for device.\n"={28:0}, "Unable to register device (err=%d).\n"={35:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={27:0}, "write failed:retry count exceeded.\n"={18:0}, \old(enabled)=0, __this_module={156:149}, dev={0:12}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={51:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={44:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2006] struct tegra_rtc_info *info ; [L2007] void *tmp ; [L2008] unsigned int status ; [L2009] unsigned long sl_irq_flags ; [L2010] u32 __v ; [L2011] u32 __v___0 ; [L2014] EXPR, FCALL dev_get_drvdata((struct device const *)dev) [L2014] tmp = dev_get_drvdata((struct device const *)dev) [L2015] info = (struct tegra_rtc_info *)tmp VAL ["info->tegra_rtc_lock"={34:0}, "name\t\t: %s\n"={20:0}, "rtc alarm"={38:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={144:0}, "Unable to allocate resources for device.\n"={26:0}, "Unable to grab IOs for device.\n"={28:0}, "Unable to register device (err=%d).\n"={35:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={27:0}, "write failed:retry count exceeded.\n"={18:0}, \old(enabled)=0, __this_module={156:149}, dev={0:12}, dev={0:12}, enabled=0, info={178:179}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={51:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={44:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={178:179}] [L2016] CALL tegra_rtc_wait_while_busy(dev) VAL ["info->tegra_rtc_lock"={34:0}, "name\t\t: %s\n"={20:0}, "rtc alarm"={38:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={144:0}, "Unable to allocate resources for device.\n"={26:0}, "Unable to grab IOs for device.\n"={28:0}, "Unable to register device (err=%d).\n"={35:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={27:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={156:149}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={51:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={44:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1875] struct tegra_rtc_info *info ; [L1876] void *tmp ; [L1877] int retries ; [L1878] int tmp___0 ; [L1879] u32 tmp___1 ; [L1882] EXPR, FCALL dev_get_drvdata((struct device const *)dev) [L1882] tmp = dev_get_drvdata((struct device const *)dev) [L1883] info = (struct tegra_rtc_info *)tmp [L1884] retries = 500 VAL ["info->tegra_rtc_lock"={34:0}, "name\t\t: %s\n"={20:0}, "rtc alarm"={38:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={144:0}, "Unable to allocate resources for device.\n"={26:0}, "Unable to grab IOs for device.\n"={28:0}, "Unable to register device (err=%d).\n"={35:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={27:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={156:149}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={51:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={44:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1896] CALL, EXPR tegra_rtc_check_busy(info) [L1863] u32 __v ; [L1864] u32 __v___0 ; [L1867] EXPR, FCALL info->rtc_base [L1867] EXPR, FCALL (unsigned int volatile *)info->rtc_base + 4U [L1867] __v___0 = *((unsigned int volatile *)info->rtc_base + 4U) [L1868] __v = __v___0 [L1870] RET return (__v & 1U); [L1896] EXPR tegra_rtc_check_busy(info) [L1896] tmp___1 = tegra_rtc_check_busy(info) [L1897] COND FALSE !(tmp___1 != 0U) [L1903] RET return (0); VAL ["info->tegra_rtc_lock"={34:0}, "name\t\t: %s\n"={20:0}, "rtc alarm"={38:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={144:0}, "Unable to allocate resources for device.\n"={26:0}, "Unable to grab IOs for device.\n"={28:0}, "Unable to register device (err=%d).\n"={35:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={27:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={156:149}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={51:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={44:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2016] tegra_rtc_wait_while_busy(dev) VAL ["info->tegra_rtc_lock"={34:0}, "name\t\t: %s\n"={20:0}, "rtc alarm"={38:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={144:0}, "Unable to allocate resources for device.\n"={26:0}, "Unable to grab IOs for device.\n"={28:0}, "Unable to register device (err=%d).\n"={35:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={27:0}, "write failed:retry count exceeded.\n"={18:0}, \old(enabled)=0, __this_module={156:149}, dev={0:12}, dev={0:12}, enabled=0, info={178:179}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={51:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={44:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tegra_rtc_wait_while_busy(dev)=0, tmp={178:179}] [L2017] CALL ldv_spin_lock_check() VAL ["info->tegra_rtc_lock"={34:0}, "name\t\t: %s\n"={20:0}, "rtc alarm"={38:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={144:0}, "Unable to allocate resources for device.\n"={26:0}, "Unable to grab IOs for device.\n"={28:0}, "Unable to register device (err=%d).\n"={35:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={27:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={156:149}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={51:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={44:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2962] COND FALSE !(ldv_init == 1) VAL ["info->tegra_rtc_lock"={34:0}, "name\t\t: %s\n"={20:0}, "rtc alarm"={38:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={144:0}, "Unable to allocate resources for device.\n"={26:0}, "Unable to grab IOs for device.\n"={28:0}, "Unable to register device (err=%d).\n"={35:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={27:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={156:149}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={51:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={44:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2965] CALL ldv_error() VAL ["info->tegra_rtc_lock"={34:0}, "name\t\t: %s\n"={20:0}, "rtc alarm"={38:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={144:0}, "Unable to allocate resources for device.\n"={26:0}, "Unable to grab IOs for device.\n"={28:0}, "Unable to register device (err=%d).\n"={35:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={27:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={156:149}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={51:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={44:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1684] __VERIFIER_error() VAL ["info->tegra_rtc_lock"={34:0}, "name\t\t: %s\n"={20:0}, "rtc alarm"={38:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={144:0}, "Unable to allocate resources for device.\n"={26:0}, "Unable to grab IOs for device.\n"={28:0}, "Unable to register device (err=%d).\n"={35:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={27:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={156:149}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={51:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={44:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.11 ms. Allocated memory is still 1.0 GB. Free memory is still 985.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 919.10 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 165.7 MB). Free memory was 954.9 MB in the beginning and 1.1 GB in the end (delta: -134.2 MB). Peak memory consumption was 110.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 58.27 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.0 MB). Peak memory consumption was 6.0 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 48.11 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.0 MB). Peak memory consumption was 3.0 MB. Max. memory is 11.5 GB. * RCFGBuilder took 3402.72 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 992.9 MB in the end (delta: 87.1 MB). Peak memory consumption was 194.8 MB. Max. memory is 11.5 GB. * CodeCheck took 214460.02 ms. Allocated memory was 1.2 GB in the beginning and 3.9 GB in the end (delta: 2.7 GB). Free memory was 992.9 MB in the beginning and 1.0 GB in the end (delta: -21.9 MB). Peak memory consumption was 2.7 GB. Max. memory is 11.5 GB. * Witness Printer took 7.05 ms. Allocated memory is still 3.9 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation unknown boogie variable platform_driver_probe_#in~82 - GenericResult: Unfinished Backtranslation unknown boogie variable platform_driver_probe_#in~82 - GenericResult: Unfinished Backtranslation unknown boogie variable platform_driver_probe_#in~82 - GenericResult: Unfinished Backtranslation unknown boogie variable platform_driver_probe_#in~82 - GenericResult: Unfinished Backtranslation unknown boogie variable platform_driver_probe_#in~82 - GenericResult: Unfinished Backtranslation unknown boogie variable platform_driver_probe_#in~82 - GenericResult: Unfinished Backtranslation unknown boogie variable platform_driver_probe_#in~82 - GenericResult: Unfinished Backtranslation unknown boogie variable platform_driver_probe_#in~82 - GenericResult: Unfinished Backtranslation unknown boogie variable platform_driver_probe_#in~82 RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Received shutdown request... ### Bit-precise run ### This is Ultimate 0.1.23-1dbac8b [2018-11-10 07:22:50,948 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-10 07:22:50,949 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-10 07:22:50,958 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-10 07:22:50,958 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-10 07:22:50,959 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-10 07:22:50,960 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-10 07:22:50,961 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-10 07:22:50,962 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-10 07:22:50,963 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-10 07:22:50,963 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-10 07:22:50,964 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-10 07:22:50,964 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-10 07:22:50,965 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-10 07:22:50,965 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-10 07:22:50,966 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-10 07:22:50,967 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-10 07:22:50,968 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-10 07:22:50,969 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-10 07:22:50,970 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-10 07:22:50,971 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-10 07:22:50,972 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-10 07:22:50,973 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-10 07:22:50,973 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-10 07:22:50,973 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-10 07:22:50,974 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-10 07:22:50,975 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-10 07:22:50,975 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-10 07:22:50,976 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-10 07:22:50,977 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-10 07:22:50,977 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-10 07:22:50,977 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-10 07:22:50,977 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-10 07:22:50,978 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-10 07:22:50,978 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-10 07:22:50,979 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-10 07:22:50,979 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_c7d63139-fda8-41e1-9b7d-e39bfe832df2/bin-2019/ukojak/config/svcomp-Reach-64bit-Kojak_Bitvector.epf [2018-11-10 07:22:50,989 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-10 07:22:50,989 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-10 07:22:50,990 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-10 07:22:50,990 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-11-10 07:22:50,990 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-10 07:22:50,990 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-10 07:22:50,990 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-10 07:22:50,991 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-10 07:22:50,991 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-10 07:22:50,991 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-10 07:22:50,991 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-10 07:22:50,991 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-11-10 07:22:50,991 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-11-10 07:22:50,991 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-10 07:22:50,992 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-10 07:22:50,992 INFO L131 SettingsManager]: Preferences of CodeCheck differ from their defaults: [2018-11-10 07:22:50,992 INFO L133 SettingsManager]: * Timeout in seconds=1000000 [2018-11-10 07:22:50,992 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-10 07:22:50,992 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-10 07:22:50,992 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 [2018-11-10 07:22:50,992 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-10 07:22:50,993 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-10 07:22:50,993 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-10 07:22:50,993 INFO L133 SettingsManager]: * Use separate solver for trace checks=false [2018-11-10 07:22:50,993 INFO L133 SettingsManager]: * Trace refinement strategy=WALRUS [2018-11-10 07:22:50,993 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-10 07:22:50,993 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-11-10 07:22:50,993 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-11-10 07:22:50,993 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-10 07:22:50,994 INFO L133 SettingsManager]: * To the following directory=dump/ Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_c7d63139-fda8-41e1-9b7d-e39bfe832df2/bin-2019/ukojak Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Kojak Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 62bcb163bcd8d8adcc467bfe735fb02012bcbb37 [2018-11-10 07:22:51,025 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-10 07:22:51,033 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-10 07:22:51,036 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-10 07:22:51,037 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-10 07:22:51,037 INFO L276 PluginConnector]: CDTParser initialized [2018-11-10 07:22:51,038 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_c7d63139-fda8-41e1-9b7d-e39bfe832df2/bin-2019/ukojak/../../sv-benchmarks/c/ldv-validator-v0.6/linux-stable-9ec4f65-1-110_1a-drivers--rtc--rtc-tegra.ko-entry_point_false-unreach-call.cil.out.c [2018-11-10 07:22:51,080 INFO L218 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_c7d63139-fda8-41e1-9b7d-e39bfe832df2/bin-2019/ukojak/data/312c65872/cac9c128d9e74a91a61c35764268e224/FLAG8c1c3dfb6 [2018-11-10 07:22:51,584 INFO L298 CDTParser]: Found 1 translation units. [2018-11-10 07:22:51,585 INFO L158 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_c7d63139-fda8-41e1-9b7d-e39bfe832df2/sv-benchmarks/c/ldv-validator-v0.6/linux-stable-9ec4f65-1-110_1a-drivers--rtc--rtc-tegra.ko-entry_point_false-unreach-call.cil.out.c [2018-11-10 07:22:51,600 INFO L346 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_c7d63139-fda8-41e1-9b7d-e39bfe832df2/bin-2019/ukojak/data/312c65872/cac9c128d9e74a91a61c35764268e224/FLAG8c1c3dfb6 [2018-11-10 07:22:51,612 INFO L354 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_c7d63139-fda8-41e1-9b7d-e39bfe832df2/bin-2019/ukojak/data/312c65872/cac9c128d9e74a91a61c35764268e224 [2018-11-10 07:22:51,614 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-10 07:22:51,615 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-10 07:22:51,616 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-10 07:22:51,616 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-10 07:22:51,619 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-10 07:22:51,620 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.11 07:22:51" (1/1) ... [2018-11-10 07:22:51,622 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5650364c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:22:51, skipping insertion in model container [2018-11-10 07:22:51,622 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.11 07:22:51" (1/1) ... [2018-11-10 07:22:51,631 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-10 07:22:51,681 INFO L174 MainTranslator]: Built tables and reachable declarations [2018-11-10 07:22:52,816 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-11-10 07:22:52,840 INFO L189 MainTranslator]: Completed pre-run [2018-11-10 07:22:53,615 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-11-10 07:22:53,653 INFO L193 MainTranslator]: Completed translation [2018-11-10 07:22:53,653 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:22:53 WrapperNode [2018-11-10 07:22:53,653 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-10 07:22:53,654 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-10 07:22:53,654 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-10 07:22:53,654 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-10 07:22:53,659 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:22:53" (1/1) ... [2018-11-10 07:22:53,684 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:22:53" (1/1) ... [2018-11-10 07:22:53,717 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-10 07:22:53,718 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-10 07:22:53,718 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-10 07:22:53,718 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-10 07:22:53,726 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:22:53" (1/1) ... [2018-11-10 07:22:53,726 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:22:53" (1/1) ... [2018-11-10 07:22:53,733 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:22:53" (1/1) ... [2018-11-10 07:22:53,733 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:22:53" (1/1) ... [2018-11-10 07:22:53,752 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:22:53" (1/1) ... [2018-11-10 07:22:53,759 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:22:53" (1/1) ... [2018-11-10 07:22:53,764 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:22:53" (1/1) ... [2018-11-10 07:22:53,771 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-10 07:22:53,771 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-10 07:22:53,772 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-10 07:22:53,772 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-10 07:22:53,772 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:22:53" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c7d63139-fda8-41e1-9b7d-e39bfe832df2/bin-2019/ukojak/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 [2018-11-10 07:22:53,815 INFO L130 BoogieDeclarations]: Found specification of procedure dev_get_drvdata [2018-11-10 07:22:53,815 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE1 [2018-11-10 07:22:53,815 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE8 [2018-11-10 07:22:53,815 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-10 07:22:53,815 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2018-11-10 07:22:53,815 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_stop [2018-11-10 07:22:53,815 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_stop [2018-11-10 07:22:53,816 INFO L130 BoogieDeclarations]: Found specification of procedure rtc_time_to_tm [2018-11-10 07:22:53,816 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_proc [2018-11-10 07:22:53,816 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_proc [2018-11-10 07:22:53,816 INFO L130 BoogieDeclarations]: Found specification of procedure irq_set_irq_wake [2018-11-10 07:22:53,816 INFO L130 BoogieDeclarations]: Found specification of procedure outer_sync [2018-11-10 07:22:53,816 INFO L138 BoogieDeclarations]: Found implementation of procedure outer_sync [2018-11-10 07:22:53,816 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_remove [2018-11-10 07:22:53,816 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_remove [2018-11-10 07:22:53,816 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_shutdown [2018-11-10 07:22:53,816 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_shutdown [2018-11-10 07:22:53,817 INFO L130 BoogieDeclarations]: Found specification of procedure rtc_tm_to_time [2018-11-10 07:22:53,817 INFO L130 BoogieDeclarations]: Found specification of procedure __release_region [2018-11-10 07:22:53,817 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2018-11-10 07:22:53,817 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_set_alarm [2018-11-10 07:22:53,817 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_set_alarm [2018-11-10 07:22:53,817 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_error [2018-11-10 07:22:53,817 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_error [2018-11-10 07:22:53,817 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_spin_lock_check [2018-11-10 07:22:53,817 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_spin_lock_check [2018-11-10 07:22:53,817 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_alarm_irq_enable [2018-11-10 07:22:53,818 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_alarm_irq_enable [2018-11-10 07:22:53,818 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_iounmap [2018-11-10 07:22:53,818 INFO L130 BoogieDeclarations]: Found specification of procedure rtc_device_unregister [2018-11-10 07:22:53,818 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-11-10 07:22:53,818 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_irq_1 [2018-11-10 07:22:53,818 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_irq_1 [2018-11-10 07:22:53,818 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-11-10 07:22:53,818 INFO L130 BoogieDeclarations]: Found specification of procedure device_may_wakeup [2018-11-10 07:22:53,818 INFO L138 BoogieDeclarations]: Found implementation of procedure device_may_wakeup [2018-11-10 07:22:53,818 INFO L130 BoogieDeclarations]: Found specification of procedure spin_unlock_irqrestore [2018-11-10 07:22:53,819 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_unlock_irqrestore [2018-11-10 07:22:53,819 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE8 [2018-11-10 07:22:53,819 INFO L130 BoogieDeclarations]: Found specification of procedure platform_get_resource [2018-11-10 07:22:53,819 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE1 [2018-11-10 07:22:53,819 INFO L130 BoogieDeclarations]: Found specification of procedure platform_set_drvdata [2018-11-10 07:22:53,819 INFO L138 BoogieDeclarations]: Found implementation of procedure platform_set_drvdata [2018-11-10 07:22:53,819 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-10 07:22:53,819 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2018-11-10 07:22:53,819 INFO L130 BoogieDeclarations]: Found specification of procedure platform_get_drvdata [2018-11-10 07:22:53,819 INFO L138 BoogieDeclarations]: Found implementation of procedure platform_get_drvdata [2018-11-10 07:22:53,819 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_read_time [2018-11-10 07:22:53,820 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_read_time [2018-11-10 07:22:53,820 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_wait_while_busy [2018-11-10 07:22:53,820 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_wait_while_busy [2018-11-10 07:22:53,820 INFO L130 BoogieDeclarations]: Found specification of procedure resource_size [2018-11-10 07:22:53,820 INFO L138 BoogieDeclarations]: Found implementation of procedure resource_size [2018-11-10 07:22:53,820 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2018-11-10 07:22:53,820 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2018-11-10 07:22:53,820 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_set_time [2018-11-10 07:22:53,820 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_set_time [2018-11-10 07:22:53,820 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-10 07:22:53,821 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-10 07:24:32,803 INFO L341 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-10 07:24:32,804 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.11 07:24:32 BoogieIcfgContainer [2018-11-10 07:24:32,804 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-10 07:24:32,804 INFO L113 PluginConnector]: ------------------------CodeCheck---------------------------- [2018-11-10 07:24:32,804 INFO L271 PluginConnector]: Initializing CodeCheck... [2018-11-10 07:24:32,811 INFO L276 PluginConnector]: CodeCheck initialized [2018-11-10 07:24:32,811 INFO L185 PluginConnector]: Executing the observer CodeCheckObserver from plugin CodeCheck for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.11 07:24:32" (1/1) ... [2018-11-10 07:24:32,817 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:24:32,836 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-10 07:24:32,843 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 316 states to 222 states and 316 transitions. [2018-11-10 07:24:32,844 INFO L276 IsEmpty]: Start isEmpty. Operand 222 states and 316 transitions. [2018-11-10 07:24:32,849 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-11-10 07:24:32,849 INFO L428 CodeCheckObserver]: Error Path is FOUND. [2018-11-10 07:24:32,884 FATAL L292 ToolchainWalker]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.codecheck has thrown an exception: java.lang.IllegalArgumentException: Indexed Sort BitVec undefined at de.uni_freiburg.informatik.ultimate.logic.SortSymbol.checkArity(SortSymbol.java:153) at de.uni_freiburg.informatik.ultimate.logic.SortSymbol.getSort(SortSymbol.java:177) at de.uni_freiburg.informatik.ultimate.logic.Theory.getSort(Theory.java:1243) at de.uni_freiburg.informatik.ultimate.logic.NoopScript.sort(NoopScript.java:287) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.TermTransferrer.transferSort(TermTransferrer.java:147) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.TermTransferrer.convertApplicationTerm(TermTransferrer.java:177) at de.uni_freiburg.informatik.ultimate.logic.TermTransformer$BuildApplicationTerm.walk(TermTransformer.java:320) at de.uni_freiburg.informatik.ultimate.logic.NonRecursive.run(NonRecursive.java:122) at de.uni_freiburg.informatik.ultimate.logic.NonRecursive.run(NonRecursive.java:113) at de.uni_freiburg.informatik.ultimate.logic.TermTransformer.transform(TermTransformer.java:253) at de.uni_freiburg.informatik.ultimate.plugins.generator.codecheck.CodeCheckObserver.process(CodeCheckObserver.java:452) at de.uni_freiburg.informatik.ultimate.core.coreplugin.modelwalker.CFGWalker.runObserver(CFGWalker.java:57) at de.uni_freiburg.informatik.ultimate.core.coreplugin.modelwalker.BaseWalker.runObserver(BaseWalker.java:93) at de.uni_freiburg.informatik.ultimate.core.coreplugin.modelwalker.BaseWalker.run(BaseWalker.java:86) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:167) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:316) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55) [2018-11-10 07:24:32,886 INFO L168 Benchmark]: Toolchain (without parser) took 101271.49 ms. Allocated memory was 1.0 GB in the beginning and 1.4 GB in the end (delta: 385.4 MB). Free memory was 944.4 MB in the beginning and 1.1 GB in the end (delta: -176.2 MB). Peak memory consumption was 209.1 MB. Max. memory is 11.5 GB. [2018-11-10 07:24:32,888 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-10 07:24:32,888 INFO L168 Benchmark]: CACSL2BoogieTranslator took 2037.12 ms. Allocated memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: 224.4 MB). Free memory was 944.4 MB in the beginning and 854.8 MB in the end (delta: 89.6 MB). Peak memory consumption was 442.5 MB. Max. memory is 11.5 GB. [2018-11-10 07:24:32,889 INFO L168 Benchmark]: Boogie Procedure Inliner took 63.82 ms. Allocated memory is still 1.3 GB. Free memory is still 854.8 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-10 07:24:32,889 INFO L168 Benchmark]: Boogie Preprocessor took 53.52 ms. Allocated memory is still 1.3 GB. Free memory was 854.8 MB in the beginning and 845.4 MB in the end (delta: 9.3 MB). Peak memory consumption was 9.3 MB. Max. memory is 11.5 GB. [2018-11-10 07:24:32,890 INFO L168 Benchmark]: RCFGBuilder took 99032.57 ms. Allocated memory was 1.3 GB in the beginning and 1.4 GB in the end (delta: 161.0 MB). Free memory was 845.4 MB in the beginning and 1.1 GB in the end (delta: -275.2 MB). Peak memory consumption was 116.3 MB. Max. memory is 11.5 GB. [2018-11-10 07:24:32,890 INFO L168 Benchmark]: CodeCheck took 81.53 ms. Allocated memory is still 1.4 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 24 B). Peak memory consumption was 24 B. Max. memory is 11.5 GB. [2018-11-10 07:24:32,893 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.codecheck: - ExceptionOrErrorResult: IllegalArgumentException: Indexed Sort BitVec undefined de.uni_freiburg.informatik.ultimate.plugins.generator.codecheck: IllegalArgumentException: Indexed Sort BitVec undefined: de.uni_freiburg.informatik.ultimate.logic.SortSymbol.checkArity(SortSymbol.java:153) * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 2037.12 ms. Allocated memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: 224.4 MB). Free memory was 944.4 MB in the beginning and 854.8 MB in the end (delta: 89.6 MB). Peak memory consumption was 442.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 63.82 ms. Allocated memory is still 1.3 GB. Free memory is still 854.8 MB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 53.52 ms. Allocated memory is still 1.3 GB. Free memory was 854.8 MB in the beginning and 845.4 MB in the end (delta: 9.3 MB). Peak memory consumption was 9.3 MB. Max. memory is 11.5 GB. * RCFGBuilder took 99032.57 ms. Allocated memory was 1.3 GB in the beginning and 1.4 GB in the end (delta: 161.0 MB). Free memory was 845.4 MB in the beginning and 1.1 GB in the end (delta: -275.2 MB). Peak memory consumption was 116.3 MB. Max. memory is 11.5 GB. * CodeCheck took 81.53 ms. Allocated memory is still 1.4 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 24 B). Peak memory consumption was 24 B. Max. memory is 11.5 GB. RESULT: Ultimate could not prove your program: Toolchain returned no result. Received shutdown request...