./Ultimate.py --spec ../../sv-benchmarks/c/Systems_DeviceDriversLinux64_ReachSafety.prp --file ../../sv-benchmarks/c/ldv-validator-v0.6/linux-stable-9ec4f65-1-110_1a-drivers--rtc--rtc-tegra.ko-entry_point_false-unreach-call.cil.out.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 5842f4b8 Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_2534fb7c-43e1-4b6c-8b15-e5b65f920b17/bin-2019/ukojak/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_2534fb7c-43e1-4b6c-8b15-e5b65f920b17/bin-2019/ukojak/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_2534fb7c-43e1-4b6c-8b15-e5b65f920b17/bin-2019/ukojak/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_2534fb7c-43e1-4b6c-8b15-e5b65f920b17/bin-2019/ukojak/config/KojakReach.xml -i ../../sv-benchmarks/c/ldv-validator-v0.6/linux-stable-9ec4f65-1-110_1a-drivers--rtc--rtc-tegra.ko-entry_point_false-unreach-call.cil.out.c -s /tmp/vcloud-vcloud-master/worker/working_dir_2534fb7c-43e1-4b6c-8b15-e5b65f920b17/bin-2019/ukojak/config/svcomp-Reach-64bit-Kojak_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_2534fb7c-43e1-4b6c-8b15-e5b65f920b17/bin-2019/ukojak --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Kojak --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 62bcb163bcd8d8adcc467bfe735fb02012bcbb37 ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_2534fb7c-43e1-4b6c-8b15-e5b65f920b17/bin-2019/ukojak/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_2534fb7c-43e1-4b6c-8b15-e5b65f920b17/bin-2019/ukojak/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_2534fb7c-43e1-4b6c-8b15-e5b65f920b17/bin-2019/ukojak/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_2534fb7c-43e1-4b6c-8b15-e5b65f920b17/bin-2019/ukojak/config/KojakReach.xml -i ../../sv-benchmarks/c/ldv-validator-v0.6/linux-stable-9ec4f65-1-110_1a-drivers--rtc--rtc-tegra.ko-entry_point_false-unreach-call.cil.out.c -s /tmp/vcloud-vcloud-master/worker/working_dir_2534fb7c-43e1-4b6c-8b15-e5b65f920b17/bin-2019/ukojak/config/svcomp-Reach-64bit-Kojak_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_2534fb7c-43e1-4b6c-8b15-e5b65f920b17/bin-2019/ukojak --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Kojak --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 62bcb163bcd8d8adcc467bfe735fb02012bcbb37 ......................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Result: ERROR: ExceptionOrErrorResult: IllegalArgumentException: Indexed Sort BitVec undefined --- Real Ultimate output --- This is Ultimate 0.1.23-5842f4b [2018-11-18 16:23:29,612 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-18 16:23:29,613 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-18 16:23:29,621 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-18 16:23:29,621 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-18 16:23:29,621 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-18 16:23:29,622 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-18 16:23:29,623 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-18 16:23:29,624 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-18 16:23:29,625 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-18 16:23:29,626 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-18 16:23:29,626 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-18 16:23:29,626 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-18 16:23:29,627 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-18 16:23:29,628 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-18 16:23:29,628 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-18 16:23:29,629 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-18 16:23:29,630 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-18 16:23:29,631 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-18 16:23:29,632 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-18 16:23:29,633 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-18 16:23:29,634 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-18 16:23:29,635 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-18 16:23:29,636 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-18 16:23:29,636 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-18 16:23:29,637 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-18 16:23:29,637 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-18 16:23:29,638 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-18 16:23:29,638 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-18 16:23:29,639 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-18 16:23:29,639 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-18 16:23:29,640 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-18 16:23:29,640 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-18 16:23:29,640 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-18 16:23:29,641 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-18 16:23:29,641 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-18 16:23:29,641 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_2534fb7c-43e1-4b6c-8b15-e5b65f920b17/bin-2019/ukojak/config/svcomp-Reach-64bit-Kojak_Default.epf [2018-11-18 16:23:29,651 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-18 16:23:29,652 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-18 16:23:29,652 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-18 16:23:29,652 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-11-18 16:23:29,653 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-18 16:23:29,653 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-18 16:23:29,653 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-18 16:23:29,653 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-18 16:23:29,653 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-18 16:23:29,653 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-18 16:23:29,653 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-18 16:23:29,654 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-18 16:23:29,654 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-18 16:23:29,654 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-18 16:23:29,654 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-18 16:23:29,654 INFO L131 SettingsManager]: Preferences of CodeCheck differ from their defaults: [2018-11-18 16:23:29,654 INFO L133 SettingsManager]: * Timeout in seconds=1000000 [2018-11-18 16:23:29,654 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-18 16:23:29,654 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-18 16:23:29,654 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 [2018-11-18 16:23:29,654 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-18 16:23:29,654 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-18 16:23:29,655 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-18 16:23:29,655 INFO L133 SettingsManager]: * Trace refinement strategy=PENGUIN [2018-11-18 16:23:29,655 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-18 16:23:29,655 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-18 16:23:29,655 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-18 16:23:29,655 INFO L133 SettingsManager]: * To the following directory=dump/ Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_2534fb7c-43e1-4b6c-8b15-e5b65f920b17/bin-2019/ukojak Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Kojak Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 62bcb163bcd8d8adcc467bfe735fb02012bcbb37 [2018-11-18 16:23:29,681 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-18 16:23:29,690 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-18 16:23:29,693 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-18 16:23:29,694 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-18 16:23:29,694 INFO L276 PluginConnector]: CDTParser initialized [2018-11-18 16:23:29,695 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_2534fb7c-43e1-4b6c-8b15-e5b65f920b17/bin-2019/ukojak/../../sv-benchmarks/c/ldv-validator-v0.6/linux-stable-9ec4f65-1-110_1a-drivers--rtc--rtc-tegra.ko-entry_point_false-unreach-call.cil.out.c [2018-11-18 16:23:29,739 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_2534fb7c-43e1-4b6c-8b15-e5b65f920b17/bin-2019/ukojak/data/6188bbf0c/2573e31257ea4c0785016c163c876959/FLAG5015a8b4b [2018-11-18 16:23:30,254 INFO L307 CDTParser]: Found 1 translation units. [2018-11-18 16:23:30,255 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_2534fb7c-43e1-4b6c-8b15-e5b65f920b17/sv-benchmarks/c/ldv-validator-v0.6/linux-stable-9ec4f65-1-110_1a-drivers--rtc--rtc-tegra.ko-entry_point_false-unreach-call.cil.out.c [2018-11-18 16:23:30,269 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_2534fb7c-43e1-4b6c-8b15-e5b65f920b17/bin-2019/ukojak/data/6188bbf0c/2573e31257ea4c0785016c163c876959/FLAG5015a8b4b [2018-11-18 16:23:30,719 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_2534fb7c-43e1-4b6c-8b15-e5b65f920b17/bin-2019/ukojak/data/6188bbf0c/2573e31257ea4c0785016c163c876959 [2018-11-18 16:23:30,722 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-18 16:23:30,722 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-18 16:23:30,723 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-18 16:23:30,723 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-18 16:23:30,725 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-18 16:23:30,726 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 04:23:30" (1/1) ... [2018-11-18 16:23:30,727 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3467704d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:23:30, skipping insertion in model container [2018-11-18 16:23:30,728 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 04:23:30" (1/1) ... [2018-11-18 16:23:30,734 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-18 16:23:30,781 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-18 16:23:31,427 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-18 16:23:31,443 INFO L191 MainTranslator]: Completed pre-run [2018-11-18 16:23:31,592 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-18 16:23:31,638 INFO L195 MainTranslator]: Completed translation [2018-11-18 16:23:31,639 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:23:31 WrapperNode [2018-11-18 16:23:31,639 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-18 16:23:31,639 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-18 16:23:31,639 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-18 16:23:31,640 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-18 16:23:31,645 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:23:31" (1/1) ... [2018-11-18 16:23:31,665 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:23:31" (1/1) ... [2018-11-18 16:23:31,699 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-18 16:23:31,699 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-18 16:23:31,699 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-18 16:23:31,699 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-18 16:23:31,707 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:23:31" (1/1) ... [2018-11-18 16:23:31,707 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:23:31" (1/1) ... [2018-11-18 16:23:31,713 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:23:31" (1/1) ... [2018-11-18 16:23:31,713 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:23:31" (1/1) ... [2018-11-18 16:23:31,733 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:23:31" (1/1) ... [2018-11-18 16:23:31,740 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:23:31" (1/1) ... [2018-11-18 16:23:31,745 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:23:31" (1/1) ... [2018-11-18 16:23:31,751 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-18 16:23:31,752 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-18 16:23:31,752 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-18 16:23:31,752 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-18 16:23:31,753 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:23:31" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_2534fb7c-43e1-4b6c-8b15-e5b65f920b17/bin-2019/ukojak/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 [2018-11-18 16:23:31,801 INFO L130 BoogieDeclarations]: Found specification of procedure dev_get_drvdata [2018-11-18 16:23:31,802 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-11-18 16:23:31,802 INFO L130 BoogieDeclarations]: Found specification of procedure platform_driver_unregister [2018-11-18 16:23:31,802 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-18 16:23:31,802 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_stop [2018-11-18 16:23:31,802 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_stop [2018-11-18 16:23:31,802 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_initialize [2018-11-18 16:23:31,803 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-11-18 16:23:31,803 INFO L130 BoogieDeclarations]: Found specification of procedure rtc_time_to_tm [2018-11-18 16:23:31,803 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_proc [2018-11-18 16:23:31,803 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_proc [2018-11-18 16:23:31,803 INFO L130 BoogieDeclarations]: Found specification of procedure irq_set_irq_wake [2018-11-18 16:23:31,803 INFO L130 BoogieDeclarations]: Found specification of procedure outer_sync [2018-11-18 16:23:31,803 INFO L138 BoogieDeclarations]: Found implementation of procedure outer_sync [2018-11-18 16:23:31,804 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_remove [2018-11-18 16:23:31,804 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_remove [2018-11-18 16:23:31,804 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_shutdown [2018-11-18 16:23:31,804 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_shutdown [2018-11-18 16:23:31,804 INFO L130 BoogieDeclarations]: Found specification of procedure rtc_tm_to_time [2018-11-18 16:23:31,804 INFO L130 BoogieDeclarations]: Found specification of procedure __release_region [2018-11-18 16:23:31,804 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2018-11-18 16:23:31,804 INFO L130 BoogieDeclarations]: Found specification of procedure free_irq [2018-11-18 16:23:31,804 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_set_alarm [2018-11-18 16:23:31,804 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_set_alarm [2018-11-18 16:23:31,805 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-11-18 16:23:31,805 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_error [2018-11-18 16:23:31,805 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_error [2018-11-18 16:23:31,805 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_release_3 [2018-11-18 16:23:31,805 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_spin_lock_check [2018-11-18 16:23:31,805 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_spin_lock_check [2018-11-18 16:23:31,807 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_alarm_irq_enable [2018-11-18 16:23:31,807 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_alarm_irq_enable [2018-11-18 16:23:31,807 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_iounmap [2018-11-18 16:23:31,808 INFO L130 BoogieDeclarations]: Found specification of procedure platform_driver_probe [2018-11-18 16:23:31,808 INFO L130 BoogieDeclarations]: Found specification of procedure rtc_valid_tm [2018-11-18 16:23:31,808 INFO L130 BoogieDeclarations]: Found specification of procedure rtc_update_irq [2018-11-18 16:23:31,808 INFO L130 BoogieDeclarations]: Found specification of procedure rtc_device_unregister [2018-11-18 16:23:31,808 INFO L130 BoogieDeclarations]: Found specification of procedure __const_udelay [2018-11-18 16:23:31,808 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-11-18 16:23:31,808 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_irq_1 [2018-11-18 16:23:31,808 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_irq_1 [2018-11-18 16:23:31,809 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_unlock_irqrestore [2018-11-18 16:23:31,809 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-11-18 16:23:31,809 INFO L130 BoogieDeclarations]: Found specification of procedure device_may_wakeup [2018-11-18 16:23:31,809 INFO L138 BoogieDeclarations]: Found implementation of procedure device_may_wakeup [2018-11-18 16:23:31,809 INFO L130 BoogieDeclarations]: Found specification of procedure spin_unlock_irqrestore [2018-11-18 16:23:31,809 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_unlock_irqrestore [2018-11-18 16:23:31,809 INFO L130 BoogieDeclarations]: Found specification of procedure platform_get_resource [2018-11-18 16:23:31,809 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-18 16:23:31,810 INFO L130 BoogieDeclarations]: Found specification of procedure dev_set_drvdata [2018-11-18 16:23:31,810 INFO L130 BoogieDeclarations]: Found specification of procedure platform_set_drvdata [2018-11-18 16:23:31,810 INFO L138 BoogieDeclarations]: Found implementation of procedure platform_set_drvdata [2018-11-18 16:23:31,810 INFO L130 BoogieDeclarations]: Found specification of procedure platform_get_drvdata [2018-11-18 16:23:31,810 INFO L138 BoogieDeclarations]: Found implementation of procedure platform_get_drvdata [2018-11-18 16:23:31,810 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_read_time [2018-11-18 16:23:31,810 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_read_time [2018-11-18 16:23:31,810 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_wait_while_busy [2018-11-18 16:23:31,811 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_wait_while_busy [2018-11-18 16:23:31,811 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_probe_3 [2018-11-18 16:23:31,811 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_probe_2 [2018-11-18 16:23:31,811 INFO L130 BoogieDeclarations]: Found specification of procedure resource_size [2018-11-18 16:23:31,811 INFO L138 BoogieDeclarations]: Found implementation of procedure resource_size [2018-11-18 16:23:31,811 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_final_state [2018-11-18 16:23:31,811 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2018-11-18 16:23:31,811 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2018-11-18 16:23:31,811 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_set_time [2018-11-18 16:23:31,812 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_set_time [2018-11-18 16:23:31,812 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-18 16:23:31,812 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-18 16:23:34,490 INFO L278 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-18 16:23:34,491 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 04:23:34 BoogieIcfgContainer [2018-11-18 16:23:34,491 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-18 16:23:34,491 INFO L113 PluginConnector]: ------------------------CodeCheck---------------------------- [2018-11-18 16:23:34,491 INFO L271 PluginConnector]: Initializing CodeCheck... [2018-11-18 16:23:34,498 INFO L276 PluginConnector]: CodeCheck initialized [2018-11-18 16:23:34,498 INFO L185 PluginConnector]: Executing the observer CodeCheckObserver from plugin CodeCheck for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 04:23:34" (1/1) ... [2018-11-18 16:23:34,506 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:23:34,528 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:34,538 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 311 states to 219 states and 311 transitions. [2018-11-18 16:23:34,539 INFO L276 IsEmpty]: Start isEmpty. Operand 219 states and 311 transitions. [2018-11-18 16:23:34,546 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-11-18 16:23:34,546 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:34,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:34,761 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:23:34,841 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:34,844 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 344 states to 223 states and 344 transitions. [2018-11-18 16:23:34,844 INFO L276 IsEmpty]: Start isEmpty. Operand 223 states and 344 transitions. [2018-11-18 16:23:34,847 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-11-18 16:23:34,847 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:34,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:34,911 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:23:34,999 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:35,002 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 377 states to 226 states and 377 transitions. [2018-11-18 16:23:35,002 INFO L276 IsEmpty]: Start isEmpty. Operand 226 states and 377 transitions. [2018-11-18 16:23:35,007 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-11-18 16:23:35,007 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:35,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:35,067 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:23:35,188 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:35,189 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 411 states to 230 states and 411 transitions. [2018-11-18 16:23:35,190 INFO L276 IsEmpty]: Start isEmpty. Operand 230 states and 411 transitions. [2018-11-18 16:23:35,191 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-11-18 16:23:35,192 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:35,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:35,270 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:23:35,668 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:35,670 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 456 states to 237 states and 452 transitions. [2018-11-18 16:23:35,670 INFO L276 IsEmpty]: Start isEmpty. Operand 237 states and 452 transitions. [2018-11-18 16:23:35,672 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-11-18 16:23:35,673 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:35,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:35,736 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:23:35,999 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:36,001 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 490 states to 243 states and 486 transitions. [2018-11-18 16:23:36,001 INFO L276 IsEmpty]: Start isEmpty. Operand 243 states and 486 transitions. [2018-11-18 16:23:36,002 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-11-18 16:23:36,002 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:36,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:36,073 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:23:36,779 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:36,781 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 532 states to 250 states and 524 transitions. [2018-11-18 16:23:36,781 INFO L276 IsEmpty]: Start isEmpty. Operand 250 states and 524 transitions. [2018-11-18 16:23:36,782 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-18 16:23:36,782 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:36,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:36,842 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:23:37,222 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:37,223 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 575 states to 256 states and 567 transitions. [2018-11-18 16:23:37,223 INFO L276 IsEmpty]: Start isEmpty. Operand 256 states and 567 transitions. [2018-11-18 16:23:37,224 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-18 16:23:37,224 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:37,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:37,254 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:23:37,413 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:37,414 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 604 states to 258 states and 596 transitions. [2018-11-18 16:23:37,414 INFO L276 IsEmpty]: Start isEmpty. Operand 258 states and 596 transitions. [2018-11-18 16:23:37,415 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-11-18 16:23:37,415 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:37,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:37,445 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:23:37,535 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:37,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 608 states to 260 states and 600 transitions. [2018-11-18 16:23:37,536 INFO L276 IsEmpty]: Start isEmpty. Operand 260 states and 600 transitions. [2018-11-18 16:23:37,537 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-11-18 16:23:37,537 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:37,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:37,567 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:23:37,693 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:37,693 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 641 states to 262 states and 633 transitions. [2018-11-18 16:23:37,694 INFO L276 IsEmpty]: Start isEmpty. Operand 262 states and 633 transitions. [2018-11-18 16:23:37,694 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-11-18 16:23:37,694 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:37,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:37,745 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:23:38,517 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:38,518 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 682 states to 268 states and 670 transitions. [2018-11-18 16:23:38,518 INFO L276 IsEmpty]: Start isEmpty. Operand 268 states and 670 transitions. [2018-11-18 16:23:38,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-11-18 16:23:38,519 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:38,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:38,549 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 16:23:38,629 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:38,630 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 684 states to 270 states and 672 transitions. [2018-11-18 16:23:38,630 INFO L276 IsEmpty]: Start isEmpty. Operand 270 states and 672 transitions. [2018-11-18 16:23:38,631 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-11-18 16:23:38,631 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:38,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:38,654 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-11-18 16:23:38,716 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:38,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 689 states to 273 states and 677 transitions. [2018-11-18 16:23:38,718 INFO L276 IsEmpty]: Start isEmpty. Operand 273 states and 677 transitions. [2018-11-18 16:23:38,719 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-11-18 16:23:38,719 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:38,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:38,773 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:23:38,824 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:38,825 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 677 states to 272 states and 665 transitions. [2018-11-18 16:23:38,825 INFO L276 IsEmpty]: Start isEmpty. Operand 272 states and 665 transitions. [2018-11-18 16:23:38,826 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-11-18 16:23:38,826 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:38,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:38,862 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:23:38,887 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:38,888 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 682 states to 275 states and 670 transitions. [2018-11-18 16:23:38,888 INFO L276 IsEmpty]: Start isEmpty. Operand 275 states and 670 transitions. [2018-11-18 16:23:38,889 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-11-18 16:23:38,889 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:38,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:38,923 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:23:39,514 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:39,515 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 725 states to 281 states and 713 transitions. [2018-11-18 16:23:39,516 INFO L276 IsEmpty]: Start isEmpty. Operand 281 states and 713 transitions. [2018-11-18 16:23:39,517 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-11-18 16:23:39,517 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:39,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:39,547 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:23:39,976 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:39,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 735 states to 284 states and 723 transitions. [2018-11-18 16:23:39,977 INFO L276 IsEmpty]: Start isEmpty. Operand 284 states and 723 transitions. [2018-11-18 16:23:39,978 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-11-18 16:23:39,978 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:39,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:40,006 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:23:40,169 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:40,170 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 765 states to 286 states and 753 transitions. [2018-11-18 16:23:40,170 INFO L276 IsEmpty]: Start isEmpty. Operand 286 states and 753 transitions. [2018-11-18 16:23:40,171 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-11-18 16:23:40,171 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:40,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:40,228 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:23:41,090 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:41,091 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 810 states to 294 states and 794 transitions. [2018-11-18 16:23:41,092 INFO L276 IsEmpty]: Start isEmpty. Operand 294 states and 794 transitions. [2018-11-18 16:23:41,093 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-11-18 16:23:41,093 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:41,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:41,117 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:23:41,430 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:41,431 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 816 states to 297 states and 800 transitions. [2018-11-18 16:23:41,431 INFO L276 IsEmpty]: Start isEmpty. Operand 297 states and 800 transitions. [2018-11-18 16:23:41,432 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-11-18 16:23:41,432 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:41,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:41,510 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:23:41,584 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:41,585 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 801 states to 296 states and 785 transitions. [2018-11-18 16:23:41,586 INFO L276 IsEmpty]: Start isEmpty. Operand 296 states and 785 transitions. [2018-11-18 16:23:41,587 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-11-18 16:23:41,587 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:41,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:41,611 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-11-18 16:23:41,892 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:41,893 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 804 states to 298 states and 788 transitions. [2018-11-18 16:23:41,893 INFO L276 IsEmpty]: Start isEmpty. Operand 298 states and 788 transitions. [2018-11-18 16:23:41,894 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-11-18 16:23:41,894 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:41,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:41,912 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:23:42,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:42,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 808 states to 300 states and 792 transitions. [2018-11-18 16:23:42,061 INFO L276 IsEmpty]: Start isEmpty. Operand 300 states and 792 transitions. [2018-11-18 16:23:42,061 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-11-18 16:23:42,062 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:42,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:42,143 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:23:42,202 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:42,203 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 809 states to 301 states and 793 transitions. [2018-11-18 16:23:42,203 INFO L276 IsEmpty]: Start isEmpty. Operand 301 states and 793 transitions. [2018-11-18 16:23:42,203 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-11-18 16:23:42,204 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:42,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:42,329 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:23:43,028 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:43,029 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 853 states to 307 states and 837 transitions. [2018-11-18 16:23:43,029 INFO L276 IsEmpty]: Start isEmpty. Operand 307 states and 837 transitions. [2018-11-18 16:23:43,030 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-11-18 16:23:43,030 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:43,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:43,051 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:23:43,444 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:43,445 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 886 states to 310 states and 870 transitions. [2018-11-18 16:23:43,445 INFO L276 IsEmpty]: Start isEmpty. Operand 310 states and 870 transitions. [2018-11-18 16:23:43,446 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-11-18 16:23:43,446 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:43,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:43,468 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:23:43,784 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:43,784 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 917 states to 313 states and 901 transitions. [2018-11-18 16:23:43,785 INFO L276 IsEmpty]: Start isEmpty. Operand 313 states and 901 transitions. [2018-11-18 16:23:43,785 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-11-18 16:23:43,785 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:43,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:43,804 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 16:23:43,913 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:43,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 917 states to 314 states and 901 transitions. [2018-11-18 16:23:43,914 INFO L276 IsEmpty]: Start isEmpty. Operand 314 states and 901 transitions. [2018-11-18 16:23:43,915 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-18 16:23:43,915 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:43,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:43,937 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-11-18 16:23:44,052 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:44,052 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 921 states to 316 states and 905 transitions. [2018-11-18 16:23:44,052 INFO L276 IsEmpty]: Start isEmpty. Operand 316 states and 905 transitions. [2018-11-18 16:23:44,053 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-18 16:23:44,053 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:44,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:44,149 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:23:44,905 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:44,905 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 971 states to 321 states and 955 transitions. [2018-11-18 16:23:44,905 INFO L276 IsEmpty]: Start isEmpty. Operand 321 states and 955 transitions. [2018-11-18 16:23:44,906 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-11-18 16:23:44,906 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:44,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:44,929 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:23:45,240 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:45,240 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 978 states to 324 states and 962 transitions. [2018-11-18 16:23:45,240 INFO L276 IsEmpty]: Start isEmpty. Operand 324 states and 962 transitions. [2018-11-18 16:23:45,241 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-18 16:23:45,241 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:45,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:45,258 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:23:45,447 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:45,448 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1006 states to 326 states and 990 transitions. [2018-11-18 16:23:45,448 INFO L276 IsEmpty]: Start isEmpty. Operand 326 states and 990 transitions. [2018-11-18 16:23:45,449 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-18 16:23:45,449 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:45,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:45,463 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:23:45,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:45,679 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1033 states to 328 states and 1017 transitions. [2018-11-18 16:23:45,679 INFO L276 IsEmpty]: Start isEmpty. Operand 328 states and 1017 transitions. [2018-11-18 16:23:45,679 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-18 16:23:45,679 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:45,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:45,693 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:23:45,878 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:45,878 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1062 states to 330 states and 1046 transitions. [2018-11-18 16:23:45,878 INFO L276 IsEmpty]: Start isEmpty. Operand 330 states and 1046 transitions. [2018-11-18 16:23:45,879 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-18 16:23:45,879 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:45,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:45,893 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:23:46,089 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:46,090 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1088 states to 332 states and 1072 transitions. [2018-11-18 16:23:46,090 INFO L276 IsEmpty]: Start isEmpty. Operand 332 states and 1072 transitions. [2018-11-18 16:23:46,091 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-18 16:23:46,091 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:46,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:46,162 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:23:46,227 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:46,228 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1086 states to 331 states and 1070 transitions. [2018-11-18 16:23:46,228 INFO L276 IsEmpty]: Start isEmpty. Operand 331 states and 1070 transitions. [2018-11-18 16:23:46,229 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-11-18 16:23:46,229 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:46,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:46,247 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-18 16:23:46,570 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:46,571 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1091 states to 333 states and 1075 transitions. [2018-11-18 16:23:46,571 INFO L276 IsEmpty]: Start isEmpty. Operand 333 states and 1075 transitions. [2018-11-18 16:23:46,572 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-11-18 16:23:46,572 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:46,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:46,594 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-18 16:23:46,795 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:46,795 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1092 states to 334 states and 1076 transitions. [2018-11-18 16:23:46,796 INFO L276 IsEmpty]: Start isEmpty. Operand 334 states and 1076 transitions. [2018-11-18 16:23:46,796 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-11-18 16:23:46,796 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:46,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:47,025 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-18 16:23:47,430 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:47,431 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1110 states to 339 states and 1090 transitions. [2018-11-18 16:23:47,431 INFO L276 IsEmpty]: Start isEmpty. Operand 339 states and 1090 transitions. [2018-11-18 16:23:47,431 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-11-18 16:23:47,432 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:47,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:47,454 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-18 16:23:47,641 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:47,642 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1111 states to 340 states and 1091 transitions. [2018-11-18 16:23:47,642 INFO L276 IsEmpty]: Start isEmpty. Operand 340 states and 1091 transitions. [2018-11-18 16:23:47,643 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-11-18 16:23:47,643 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:47,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:47,663 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:23:47,673 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:47,674 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1113 states to 342 states and 1093 transitions. [2018-11-18 16:23:47,674 INFO L276 IsEmpty]: Start isEmpty. Operand 342 states and 1093 transitions. [2018-11-18 16:23:47,674 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-11-18 16:23:47,674 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:47,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:47,693 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:23:48,246 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:48,247 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1123 states to 345 states and 1103 transitions. [2018-11-18 16:23:48,247 INFO L276 IsEmpty]: Start isEmpty. Operand 345 states and 1103 transitions. [2018-11-18 16:23:48,248 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-11-18 16:23:48,248 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:48,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:48,266 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:23:48,474 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:48,475 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1148 states to 347 states and 1128 transitions. [2018-11-18 16:23:48,476 INFO L276 IsEmpty]: Start isEmpty. Operand 347 states and 1128 transitions. [2018-11-18 16:23:48,476 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-11-18 16:23:48,476 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:48,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:48,498 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:23:48,708 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:48,709 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1171 states to 349 states and 1151 transitions. [2018-11-18 16:23:48,709 INFO L276 IsEmpty]: Start isEmpty. Operand 349 states and 1151 transitions. [2018-11-18 16:23:48,709 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-11-18 16:23:48,710 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:48,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:48,727 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:23:48,943 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:48,944 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1196 states to 351 states and 1176 transitions. [2018-11-18 16:23:48,944 INFO L276 IsEmpty]: Start isEmpty. Operand 351 states and 1176 transitions. [2018-11-18 16:23:48,944 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-11-18 16:23:48,944 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:48,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:48,963 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:23:48,981 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:48,982 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1198 states to 353 states and 1178 transitions. [2018-11-18 16:23:48,982 INFO L276 IsEmpty]: Start isEmpty. Operand 353 states and 1178 transitions. [2018-11-18 16:23:48,983 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-11-18 16:23:48,983 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:48,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:49,011 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 16:23:49,392 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:49,392 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1209 states to 359 states and 1189 transitions. [2018-11-18 16:23:49,392 INFO L276 IsEmpty]: Start isEmpty. Operand 359 states and 1189 transitions. [2018-11-18 16:23:49,393 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-11-18 16:23:49,393 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:49,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:49,408 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:23:49,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:49,907 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1218 states to 362 states and 1198 transitions. [2018-11-18 16:23:49,907 INFO L276 IsEmpty]: Start isEmpty. Operand 362 states and 1198 transitions. [2018-11-18 16:23:49,907 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-11-18 16:23:49,907 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:49,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:49,920 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-11-18 16:23:50,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:50,347 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1226 states to 365 states and 1206 transitions. [2018-11-18 16:23:50,347 INFO L276 IsEmpty]: Start isEmpty. Operand 365 states and 1206 transitions. [2018-11-18 16:23:50,347 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-11-18 16:23:50,347 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:50,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:50,362 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-11-18 16:23:50,844 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:50,845 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1258 states to 368 states and 1238 transitions. [2018-11-18 16:23:50,845 INFO L276 IsEmpty]: Start isEmpty. Operand 368 states and 1238 transitions. [2018-11-18 16:23:50,846 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-11-18 16:23:50,846 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:50,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:50,861 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:23:51,358 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:51,359 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1283 states to 371 states and 1263 transitions. [2018-11-18 16:23:51,359 INFO L276 IsEmpty]: Start isEmpty. Operand 371 states and 1263 transitions. [2018-11-18 16:23:51,360 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-11-18 16:23:51,360 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:51,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:51,374 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-11-18 16:23:51,632 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:51,633 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1305 states to 373 states and 1285 transitions. [2018-11-18 16:23:51,633 INFO L276 IsEmpty]: Start isEmpty. Operand 373 states and 1285 transitions. [2018-11-18 16:23:51,633 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-11-18 16:23:51,633 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:51,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:51,646 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:23:52,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:52,284 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1320 states to 378 states and 1299 transitions. [2018-11-18 16:23:52,284 INFO L276 IsEmpty]: Start isEmpty. Operand 378 states and 1299 transitions. [2018-11-18 16:23:52,284 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-11-18 16:23:52,284 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:52,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:52,299 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-18 16:23:52,555 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:52,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1347 states to 380 states and 1326 transitions. [2018-11-18 16:23:52,556 INFO L276 IsEmpty]: Start isEmpty. Operand 380 states and 1326 transitions. [2018-11-18 16:23:52,556 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-11-18 16:23:52,556 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:52,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:52,572 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-18 16:23:54,077 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:54,077 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1401 states to 388 states and 1380 transitions. [2018-11-18 16:23:54,077 INFO L276 IsEmpty]: Start isEmpty. Operand 388 states and 1380 transitions. [2018-11-18 16:23:54,078 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-11-18 16:23:54,078 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:54,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:54,098 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-18 16:23:54,376 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:54,377 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1426 states to 390 states and 1405 transitions. [2018-11-18 16:23:54,377 INFO L276 IsEmpty]: Start isEmpty. Operand 390 states and 1405 transitions. [2018-11-18 16:23:54,378 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-11-18 16:23:54,378 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:54,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:54,392 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-18 16:23:54,588 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:54,588 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1429 states to 391 states and 1408 transitions. [2018-11-18 16:23:54,589 INFO L276 IsEmpty]: Start isEmpty. Operand 391 states and 1408 transitions. [2018-11-18 16:23:54,589 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-11-18 16:23:54,589 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:54,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:54,605 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-18 16:23:54,872 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:54,873 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1451 states to 393 states and 1429 transitions. [2018-11-18 16:23:54,874 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 1429 transitions. [2018-11-18 16:23:54,874 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-11-18 16:23:54,874 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:54,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:54,895 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-18 16:23:55,114 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:55,115 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1475 states to 395 states and 1453 transitions. [2018-11-18 16:23:55,115 INFO L276 IsEmpty]: Start isEmpty. Operand 395 states and 1453 transitions. [2018-11-18 16:23:55,116 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-11-18 16:23:55,116 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:55,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:55,130 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-18 16:23:55,380 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:55,381 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1503 states to 397 states and 1481 transitions. [2018-11-18 16:23:55,381 INFO L276 IsEmpty]: Start isEmpty. Operand 397 states and 1481 transitions. [2018-11-18 16:23:55,382 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-11-18 16:23:55,382 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:55,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:55,400 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 16:23:55,896 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:55,897 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1514 states to 400 states and 1491 transitions. [2018-11-18 16:23:55,897 INFO L276 IsEmpty]: Start isEmpty. Operand 400 states and 1491 transitions. [2018-11-18 16:23:55,897 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-11-18 16:23:55,897 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:55,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:55,913 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 16:23:56,055 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:56,055 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1536 states to 402 states and 1513 transitions. [2018-11-18 16:23:56,055 INFO L276 IsEmpty]: Start isEmpty. Operand 402 states and 1513 transitions. [2018-11-18 16:23:56,056 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-11-18 16:23:56,056 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:56,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:56,070 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:23:56,076 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:56,077 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1540 states to 405 states and 1517 transitions. [2018-11-18 16:23:56,077 INFO L276 IsEmpty]: Start isEmpty. Operand 405 states and 1517 transitions. [2018-11-18 16:23:56,078 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-11-18 16:23:56,078 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:56,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:56,093 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-18 16:23:56,557 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:56,558 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1549 states to 411 states and 1526 transitions. [2018-11-18 16:23:56,558 INFO L276 IsEmpty]: Start isEmpty. Operand 411 states and 1526 transitions. [2018-11-18 16:23:56,559 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-11-18 16:23:56,559 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:56,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:56,576 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-18 16:23:56,688 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:56,689 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1549 states to 412 states and 1526 transitions. [2018-11-18 16:23:56,689 INFO L276 IsEmpty]: Start isEmpty. Operand 412 states and 1526 transitions. [2018-11-18 16:23:56,689 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-11-18 16:23:56,690 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:56,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:56,702 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:23:57,177 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:57,177 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1563 states to 416 states and 1539 transitions. [2018-11-18 16:23:57,177 INFO L276 IsEmpty]: Start isEmpty. Operand 416 states and 1539 transitions. [2018-11-18 16:23:57,178 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-11-18 16:23:57,178 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:57,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:57,195 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 16:23:57,718 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:57,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1576 states to 422 states and 1552 transitions. [2018-11-18 16:23:57,719 INFO L276 IsEmpty]: Start isEmpty. Operand 422 states and 1552 transitions. [2018-11-18 16:23:57,719 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-11-18 16:23:57,719 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:57,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:57,733 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-18 16:23:57,992 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:57,992 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1580 states to 424 states and 1556 transitions. [2018-11-18 16:23:57,993 INFO L276 IsEmpty]: Start isEmpty. Operand 424 states and 1556 transitions. [2018-11-18 16:23:57,993 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-11-18 16:23:57,993 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:57,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:58,006 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:23:58,014 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:58,015 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1582 states to 426 states and 1558 transitions. [2018-11-18 16:23:58,015 INFO L276 IsEmpty]: Start isEmpty. Operand 426 states and 1558 transitions. [2018-11-18 16:23:58,015 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-11-18 16:23:58,015 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:58,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:58,034 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-18 16:23:58,610 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:58,611 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1604 states to 429 states and 1580 transitions. [2018-11-18 16:23:58,611 INFO L276 IsEmpty]: Start isEmpty. Operand 429 states and 1580 transitions. [2018-11-18 16:23:58,612 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-11-18 16:23:58,612 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:58,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:58,625 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:23:58,862 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:58,862 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1609 states to 432 states and 1585 transitions. [2018-11-18 16:23:58,862 INFO L276 IsEmpty]: Start isEmpty. Operand 432 states and 1585 transitions. [2018-11-18 16:23:58,863 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-11-18 16:23:58,863 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:58,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:58,876 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:23:59,413 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:59,415 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1635 states to 435 states and 1611 transitions. [2018-11-18 16:23:59,415 INFO L276 IsEmpty]: Start isEmpty. Operand 435 states and 1611 transitions. [2018-11-18 16:23:59,416 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-11-18 16:23:59,416 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:59,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:59,435 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:23:59,968 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:23:59,969 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1644 states to 438 states and 1619 transitions. [2018-11-18 16:23:59,969 INFO L276 IsEmpty]: Start isEmpty. Operand 438 states and 1619 transitions. [2018-11-18 16:23:59,970 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-11-18 16:23:59,970 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:23:59,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:59,982 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:24:00,591 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:00,592 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1651 states to 441 states and 1626 transitions. [2018-11-18 16:24:00,592 INFO L276 IsEmpty]: Start isEmpty. Operand 441 states and 1626 transitions. [2018-11-18 16:24:00,592 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-11-18 16:24:00,592 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:00,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:00,605 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:24:00,872 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:00,872 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1659 states to 444 states and 1633 transitions. [2018-11-18 16:24:00,873 INFO L276 IsEmpty]: Start isEmpty. Operand 444 states and 1633 transitions. [2018-11-18 16:24:00,873 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-11-18 16:24:00,873 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:00,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:00,884 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:24:01,670 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:01,671 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1669 states to 447 states and 1642 transitions. [2018-11-18 16:24:01,671 INFO L276 IsEmpty]: Start isEmpty. Operand 447 states and 1642 transitions. [2018-11-18 16:24:01,672 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-11-18 16:24:01,672 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:01,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:01,690 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:24:02,217 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:02,218 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1678 states to 453 states and 1651 transitions. [2018-11-18 16:24:02,218 INFO L276 IsEmpty]: Start isEmpty. Operand 453 states and 1651 transitions. [2018-11-18 16:24:02,219 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-11-18 16:24:02,219 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:02,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:02,232 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-11-18 16:24:02,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:02,508 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1681 states to 455 states and 1654 transitions. [2018-11-18 16:24:02,508 INFO L276 IsEmpty]: Start isEmpty. Operand 455 states and 1654 transitions. [2018-11-18 16:24:02,509 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-11-18 16:24:02,509 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:02,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:02,521 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:24:02,790 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:02,791 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1684 states to 457 states and 1657 transitions. [2018-11-18 16:24:02,791 INFO L276 IsEmpty]: Start isEmpty. Operand 457 states and 1657 transitions. [2018-11-18 16:24:02,791 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-11-18 16:24:02,791 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:02,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:02,806 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 8 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 16:24:03,071 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:03,072 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1687 states to 458 states and 1660 transitions. [2018-11-18 16:24:03,072 INFO L276 IsEmpty]: Start isEmpty. Operand 458 states and 1660 transitions. [2018-11-18 16:24:03,073 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-11-18 16:24:03,073 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:03,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:03,085 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:24:03,713 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:03,714 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1702 states to 462 states and 1674 transitions. [2018-11-18 16:24:03,714 INFO L276 IsEmpty]: Start isEmpty. Operand 462 states and 1674 transitions. [2018-11-18 16:24:03,715 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-11-18 16:24:03,715 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:03,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:03,728 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:24:03,981 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:03,981 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1705 states to 463 states and 1677 transitions. [2018-11-18 16:24:03,981 INFO L276 IsEmpty]: Start isEmpty. Operand 463 states and 1677 transitions. [2018-11-18 16:24:03,982 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-11-18 16:24:03,982 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:03,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:04,034 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:24:05,145 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:05,145 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1720 states to 468 states and 1691 transitions. [2018-11-18 16:24:05,146 INFO L276 IsEmpty]: Start isEmpty. Operand 468 states and 1691 transitions. [2018-11-18 16:24:05,146 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-11-18 16:24:05,146 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:05,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:05,264 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:24:05,999 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:05,999 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1729 states to 468 states and 1681 transitions. [2018-11-18 16:24:05,999 INFO L276 IsEmpty]: Start isEmpty. Operand 468 states and 1681 transitions. [2018-11-18 16:24:06,000 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-11-18 16:24:06,000 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:06,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:06,014 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-18 16:24:06,022 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:06,023 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1729 states to 469 states and 1681 transitions. [2018-11-18 16:24:06,023 INFO L276 IsEmpty]: Start isEmpty. Operand 469 states and 1681 transitions. [2018-11-18 16:24:06,024 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-11-18 16:24:06,024 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:06,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:06,037 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 17 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-11-18 16:24:06,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:06,335 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1732 states to 471 states and 1684 transitions. [2018-11-18 16:24:06,336 INFO L276 IsEmpty]: Start isEmpty. Operand 471 states and 1684 transitions. [2018-11-18 16:24:06,336 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-11-18 16:24:06,336 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:06,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:06,356 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-18 16:24:06,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:06,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1735 states to 472 states and 1687 transitions. [2018-11-18 16:24:06,672 INFO L276 IsEmpty]: Start isEmpty. Operand 472 states and 1687 transitions. [2018-11-18 16:24:06,673 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-11-18 16:24:06,673 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:06,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:06,689 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-18 16:24:07,214 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:07,215 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1739 states to 474 states and 1691 transitions. [2018-11-18 16:24:07,215 INFO L276 IsEmpty]: Start isEmpty. Operand 474 states and 1691 transitions. [2018-11-18 16:24:07,216 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-11-18 16:24:07,216 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:07,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:07,234 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-18 16:24:08,367 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:08,368 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1781 states to 480 states and 1733 transitions. [2018-11-18 16:24:08,368 INFO L276 IsEmpty]: Start isEmpty. Operand 480 states and 1733 transitions. [2018-11-18 16:24:08,368 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-11-18 16:24:08,368 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:08,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:08,424 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:24:09,015 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:09,016 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1790 states to 483 states and 1741 transitions. [2018-11-18 16:24:09,016 INFO L276 IsEmpty]: Start isEmpty. Operand 483 states and 1741 transitions. [2018-11-18 16:24:09,016 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-11-18 16:24:09,016 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:09,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:09,030 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-18 16:24:09,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:09,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1820 states to 486 states and 1770 transitions. [2018-11-18 16:24:09,489 INFO L276 IsEmpty]: Start isEmpty. Operand 486 states and 1770 transitions. [2018-11-18 16:24:09,489 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-11-18 16:24:09,490 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:09,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:09,504 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-18 16:24:09,764 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:09,765 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1849 states to 488 states and 1799 transitions. [2018-11-18 16:24:09,765 INFO L276 IsEmpty]: Start isEmpty. Operand 488 states and 1799 transitions. [2018-11-18 16:24:09,766 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-11-18 16:24:09,766 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:09,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:09,786 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-18 16:24:10,069 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:10,069 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1876 states to 490 states and 1826 transitions. [2018-11-18 16:24:10,070 INFO L276 IsEmpty]: Start isEmpty. Operand 490 states and 1826 transitions. [2018-11-18 16:24:10,070 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-18 16:24:10,070 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:10,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:10,084 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-18 16:24:10,674 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:10,674 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1885 states to 493 states and 1834 transitions. [2018-11-18 16:24:10,674 INFO L276 IsEmpty]: Start isEmpty. Operand 493 states and 1834 transitions. [2018-11-18 16:24:10,675 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-18 16:24:10,675 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:10,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:10,690 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-18 16:24:11,045 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:11,046 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1894 states to 496 states and 1842 transitions. [2018-11-18 16:24:11,046 INFO L276 IsEmpty]: Start isEmpty. Operand 496 states and 1842 transitions. [2018-11-18 16:24:11,047 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-11-18 16:24:11,047 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:11,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:11,063 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 16:24:11,397 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:11,398 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1902 states to 499 states and 1849 transitions. [2018-11-18 16:24:11,398 INFO L276 IsEmpty]: Start isEmpty. Operand 499 states and 1849 transitions. [2018-11-18 16:24:11,399 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-18 16:24:11,399 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:11,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:11,419 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 16:24:12,369 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:12,369 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1911 states to 505 states and 1858 transitions. [2018-11-18 16:24:12,369 INFO L276 IsEmpty]: Start isEmpty. Operand 505 states and 1858 transitions. [2018-11-18 16:24:12,370 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-11-18 16:24:12,371 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:12,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:12,394 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-18 16:24:12,571 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:12,572 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1913 states to 507 states and 1860 transitions. [2018-11-18 16:24:12,572 INFO L276 IsEmpty]: Start isEmpty. Operand 507 states and 1860 transitions. [2018-11-18 16:24:12,573 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-11-18 16:24:12,573 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:12,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:12,588 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-18 16:24:12,967 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:12,968 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1914 states to 508 states and 1861 transitions. [2018-11-18 16:24:12,968 INFO L276 IsEmpty]: Start isEmpty. Operand 508 states and 1861 transitions. [2018-11-18 16:24:12,969 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-18 16:24:12,969 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:12,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:12,990 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-18 16:24:14,361 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:14,362 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1959 states to 515 states and 1904 transitions. [2018-11-18 16:24:14,362 INFO L276 IsEmpty]: Start isEmpty. Operand 515 states and 1904 transitions. [2018-11-18 16:24:14,363 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-11-18 16:24:14,363 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:14,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:14,423 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:24:14,702 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:14,702 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1963 states to 516 states and 1908 transitions. [2018-11-18 16:24:14,703 INFO L276 IsEmpty]: Start isEmpty. Operand 516 states and 1908 transitions. [2018-11-18 16:24:14,703 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-18 16:24:14,703 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:14,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:14,718 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-18 16:24:15,296 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:15,297 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1994 states to 519 states and 1939 transitions. [2018-11-18 16:24:15,298 INFO L276 IsEmpty]: Start isEmpty. Operand 519 states and 1939 transitions. [2018-11-18 16:24:15,299 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-11-18 16:24:15,299 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:15,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:15,394 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:24:15,692 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:15,693 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2021 states to 521 states and 1966 transitions. [2018-11-18 16:24:15,693 INFO L276 IsEmpty]: Start isEmpty. Operand 521 states and 1966 transitions. [2018-11-18 16:24:15,694 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-18 16:24:15,694 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:15,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:15,708 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-18 16:24:16,022 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:16,023 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2047 states to 523 states and 1992 transitions. [2018-11-18 16:24:16,023 INFO L276 IsEmpty]: Start isEmpty. Operand 523 states and 1992 transitions. [2018-11-18 16:24:16,024 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-18 16:24:16,024 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:16,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:16,039 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-18 16:24:16,213 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:16,213 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2050 states to 524 states and 1995 transitions. [2018-11-18 16:24:16,213 INFO L276 IsEmpty]: Start isEmpty. Operand 524 states and 1995 transitions. [2018-11-18 16:24:16,214 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-18 16:24:16,214 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:16,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:16,229 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-18 16:24:16,826 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:16,826 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2080 states to 527 states and 2024 transitions. [2018-11-18 16:24:16,827 INFO L276 IsEmpty]: Start isEmpty. Operand 527 states and 2024 transitions. [2018-11-18 16:24:16,827 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-18 16:24:16,827 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:16,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:16,843 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-18 16:24:17,145 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:17,146 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2107 states to 529 states and 2051 transitions. [2018-11-18 16:24:17,146 INFO L276 IsEmpty]: Start isEmpty. Operand 529 states and 2051 transitions. [2018-11-18 16:24:17,146 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-18 16:24:17,146 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:17,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:17,160 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-18 16:24:17,450 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:17,451 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2134 states to 531 states and 2078 transitions. [2018-11-18 16:24:17,451 INFO L276 IsEmpty]: Start isEmpty. Operand 531 states and 2078 transitions. [2018-11-18 16:24:17,451 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-18 16:24:17,451 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:17,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:17,467 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-18 16:24:17,661 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:17,662 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2143 states to 534 states and 2086 transitions. [2018-11-18 16:24:17,662 INFO L276 IsEmpty]: Start isEmpty. Operand 534 states and 2086 transitions. [2018-11-18 16:24:17,663 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-11-18 16:24:17,663 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:17,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:17,679 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-18 16:24:18,434 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:18,435 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2172 states to 539 states and 2114 transitions. [2018-11-18 16:24:18,435 INFO L276 IsEmpty]: Start isEmpty. Operand 539 states and 2114 transitions. [2018-11-18 16:24:18,436 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-18 16:24:18,436 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:18,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:18,450 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 16:24:18,975 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:18,975 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2184 states to 542 states and 2125 transitions. [2018-11-18 16:24:18,975 INFO L276 IsEmpty]: Start isEmpty. Operand 542 states and 2125 transitions. [2018-11-18 16:24:18,976 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-18 16:24:18,976 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:18,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:18,991 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 16:24:19,372 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:19,373 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2208 states to 544 states and 2148 transitions. [2018-11-18 16:24:19,373 INFO L276 IsEmpty]: Start isEmpty. Operand 544 states and 2148 transitions. [2018-11-18 16:24:19,374 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-18 16:24:19,374 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:19,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:19,391 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 16:24:19,777 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:19,778 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2235 states to 546 states and 2174 transitions. [2018-11-18 16:24:19,778 INFO L276 IsEmpty]: Start isEmpty. Operand 546 states and 2174 transitions. [2018-11-18 16:24:19,779 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-18 16:24:19,779 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:19,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:19,794 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 16:24:20,168 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:20,169 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2258 states to 548 states and 2196 transitions. [2018-11-18 16:24:20,169 INFO L276 IsEmpty]: Start isEmpty. Operand 548 states and 2196 transitions. [2018-11-18 16:24:20,170 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-18 16:24:20,170 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:20,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:20,189 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 16:24:20,573 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:20,573 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2284 states to 550 states and 2221 transitions. [2018-11-18 16:24:20,574 INFO L276 IsEmpty]: Start isEmpty. Operand 550 states and 2221 transitions. [2018-11-18 16:24:20,574 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-18 16:24:20,574 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:20,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:20,596 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 16:24:21,788 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:21,789 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2294 states to 556 states and 2231 transitions. [2018-11-18 16:24:21,789 INFO L276 IsEmpty]: Start isEmpty. Operand 556 states and 2231 transitions. [2018-11-18 16:24:21,790 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-18 16:24:21,790 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:21,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:21,805 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-18 16:24:21,816 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:21,817 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2296 states to 558 states and 2233 transitions. [2018-11-18 16:24:21,817 INFO L276 IsEmpty]: Start isEmpty. Operand 558 states and 2233 transitions. [2018-11-18 16:24:21,818 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-18 16:24:21,818 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:21,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:21,832 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-18 16:24:22,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:22,867 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2302 states to 561 states and 2239 transitions. [2018-11-18 16:24:22,867 INFO L276 IsEmpty]: Start isEmpty. Operand 561 states and 2239 transitions. [2018-11-18 16:24:22,868 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-18 16:24:22,868 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:22,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:22,883 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-18 16:24:24,326 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:24,327 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2346 states to 568 states and 2281 transitions. [2018-11-18 16:24:24,327 INFO L276 IsEmpty]: Start isEmpty. Operand 568 states and 2281 transitions. [2018-11-18 16:24:24,328 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-18 16:24:24,328 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:24,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:24,342 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-18 16:24:25,018 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:25,019 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2377 states to 571 states and 2312 transitions. [2018-11-18 16:24:25,019 INFO L276 IsEmpty]: Start isEmpty. Operand 571 states and 2312 transitions. [2018-11-18 16:24:25,020 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-18 16:24:25,020 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:25,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:25,038 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-18 16:24:25,401 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:25,401 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2403 states to 573 states and 2338 transitions. [2018-11-18 16:24:25,402 INFO L276 IsEmpty]: Start isEmpty. Operand 573 states and 2338 transitions. [2018-11-18 16:24:25,402 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-18 16:24:25,402 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:25,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:25,418 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-18 16:24:25,666 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:25,666 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2410 states to 575 states and 2344 transitions. [2018-11-18 16:24:25,667 INFO L276 IsEmpty]: Start isEmpty. Operand 575 states and 2344 transitions. [2018-11-18 16:24:25,667 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-18 16:24:25,667 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:25,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:25,682 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-18 16:24:26,240 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:26,241 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2442 states to 578 states and 2375 transitions. [2018-11-18 16:24:26,241 INFO L276 IsEmpty]: Start isEmpty. Operand 578 states and 2375 transitions. [2018-11-18 16:24:26,242 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-18 16:24:26,242 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:26,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:26,256 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-18 16:24:26,921 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:26,922 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2474 states to 581 states and 2407 transitions. [2018-11-18 16:24:26,922 INFO L276 IsEmpty]: Start isEmpty. Operand 581 states and 2407 transitions. [2018-11-18 16:24:26,923 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-18 16:24:26,923 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:26,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:26,936 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-18 16:24:27,264 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:27,265 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2501 states to 583 states and 2434 transitions. [2018-11-18 16:24:27,265 INFO L276 IsEmpty]: Start isEmpty. Operand 583 states and 2434 transitions. [2018-11-18 16:24:27,266 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-18 16:24:27,266 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:27,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:27,282 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-18 16:24:27,664 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:27,665 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2528 states to 585 states and 2460 transitions. [2018-11-18 16:24:27,665 INFO L276 IsEmpty]: Start isEmpty. Operand 585 states and 2460 transitions. [2018-11-18 16:24:27,665 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-11-18 16:24:27,665 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:27,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:27,841 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:24:28,414 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:28,415 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2528 states to 585 states and 2459 transitions. [2018-11-18 16:24:28,415 INFO L276 IsEmpty]: Start isEmpty. Operand 585 states and 2459 transitions. [2018-11-18 16:24:28,416 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-11-18 16:24:28,416 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:28,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:28,428 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:24:28,447 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:28,448 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2533 states to 588 states and 2463 transitions. [2018-11-18 16:24:28,448 INFO L276 IsEmpty]: Start isEmpty. Operand 588 states and 2463 transitions. [2018-11-18 16:24:28,449 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-11-18 16:24:28,449 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:28,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:28,463 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:24:29,164 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:29,165 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2546 states to 593 states and 2475 transitions. [2018-11-18 16:24:29,165 INFO L276 IsEmpty]: Start isEmpty. Operand 593 states and 2475 transitions. [2018-11-18 16:24:29,166 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-18 16:24:29,166 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:29,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:29,342 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:24:31,983 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:31,984 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2613 states to 601 states and 2534 transitions. [2018-11-18 16:24:31,984 INFO L276 IsEmpty]: Start isEmpty. Operand 601 states and 2534 transitions. [2018-11-18 16:24:31,985 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-18 16:24:31,985 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:31,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:32,001 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:24:32,909 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:32,910 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2646 states to 604 states and 2566 transitions. [2018-11-18 16:24:32,910 INFO L276 IsEmpty]: Start isEmpty. Operand 604 states and 2566 transitions. [2018-11-18 16:24:32,910 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-11-18 16:24:32,911 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:32,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:32,923 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-18 16:24:33,156 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:33,157 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2646 states to 605 states and 2566 transitions. [2018-11-18 16:24:33,157 INFO L276 IsEmpty]: Start isEmpty. Operand 605 states and 2566 transitions. [2018-11-18 16:24:33,158 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-11-18 16:24:33,158 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:33,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:33,171 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-18 16:24:33,544 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:33,545 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2646 states to 606 states and 2566 transitions. [2018-11-18 16:24:33,545 INFO L276 IsEmpty]: Start isEmpty. Operand 606 states and 2566 transitions. [2018-11-18 16:24:33,546 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-18 16:24:33,546 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:33,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:33,558 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:24:34,432 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:34,433 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2652 states to 609 states and 2571 transitions. [2018-11-18 16:24:34,433 INFO L276 IsEmpty]: Start isEmpty. Operand 609 states and 2571 transitions. [2018-11-18 16:24:34,434 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-11-18 16:24:34,434 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:34,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:34,484 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:24:34,506 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:34,506 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2657 states to 612 states and 2575 transitions. [2018-11-18 16:24:34,507 INFO L276 IsEmpty]: Start isEmpty. Operand 612 states and 2575 transitions. [2018-11-18 16:24:34,507 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-11-18 16:24:34,507 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:34,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:34,525 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:24:35,294 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:35,294 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2665 states to 614 states and 2583 transitions. [2018-11-18 16:24:35,295 INFO L276 IsEmpty]: Start isEmpty. Operand 614 states and 2583 transitions. [2018-11-18 16:24:35,295 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-11-18 16:24:35,295 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:35,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:35,310 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2018-11-18 16:24:35,711 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:35,712 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2666 states to 615 states and 2584 transitions. [2018-11-18 16:24:35,712 INFO L276 IsEmpty]: Start isEmpty. Operand 615 states and 2584 transitions. [2018-11-18 16:24:35,712 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-11-18 16:24:35,712 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:35,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:35,902 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:24:36,592 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:36,593 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2666 states to 615 states and 2583 transitions. [2018-11-18 16:24:36,593 INFO L276 IsEmpty]: Start isEmpty. Operand 615 states and 2583 transitions. [2018-11-18 16:24:36,594 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-11-18 16:24:36,594 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:36,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:36,607 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:24:37,023 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:37,024 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2673 states to 618 states and 2589 transitions. [2018-11-18 16:24:37,024 INFO L276 IsEmpty]: Start isEmpty. Operand 618 states and 2589 transitions. [2018-11-18 16:24:37,025 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-18 16:24:37,025 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:37,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:37,039 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:24:37,098 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:37,098 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2719 states to 619 states and 2635 transitions. [2018-11-18 16:24:37,098 INFO L276 IsEmpty]: Start isEmpty. Operand 619 states and 2635 transitions. [2018-11-18 16:24:37,099 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-11-18 16:24:37,099 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:37,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:37,123 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-18 16:24:37,188 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:37,188 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2721 states to 621 states and 2637 transitions. [2018-11-18 16:24:37,189 INFO L276 IsEmpty]: Start isEmpty. Operand 621 states and 2637 transitions. [2018-11-18 16:24:37,189 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-18 16:24:37,189 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:37,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:37,201 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:24:37,674 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:37,675 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2726 states to 624 states and 2641 transitions. [2018-11-18 16:24:37,675 INFO L276 IsEmpty]: Start isEmpty. Operand 624 states and 2641 transitions. [2018-11-18 16:24:37,676 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-11-18 16:24:37,676 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:37,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:37,728 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:24:37,965 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:37,966 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2733 states to 627 states and 2647 transitions. [2018-11-18 16:24:37,966 INFO L276 IsEmpty]: Start isEmpty. Operand 627 states and 2647 transitions. [2018-11-18 16:24:37,967 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-18 16:24:37,967 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:37,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:38,176 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:24:38,851 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:38,851 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2734 states to 628 states and 2648 transitions. [2018-11-18 16:24:38,851 INFO L276 IsEmpty]: Start isEmpty. Operand 628 states and 2648 transitions. [2018-11-18 16:24:38,852 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-11-18 16:24:38,852 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:38,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:38,875 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:24:39,651 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:39,652 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2745 states to 632 states and 2658 transitions. [2018-11-18 16:24:39,652 INFO L276 IsEmpty]: Start isEmpty. Operand 632 states and 2658 transitions. [2018-11-18 16:24:39,652 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-18 16:24:39,652 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:39,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:39,667 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-11-18 16:24:39,868 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:39,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2747 states to 634 states and 2660 transitions. [2018-11-18 16:24:39,869 INFO L276 IsEmpty]: Start isEmpty. Operand 634 states and 2660 transitions. [2018-11-18 16:24:39,870 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-18 16:24:39,870 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:39,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:39,883 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:24:40,387 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:40,388 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2754 states to 637 states and 2666 transitions. [2018-11-18 16:24:40,388 INFO L276 IsEmpty]: Start isEmpty. Operand 637 states and 2666 transitions. [2018-11-18 16:24:40,389 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-18 16:24:40,389 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:40,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:40,404 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:24:40,620 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:40,621 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2757 states to 638 states and 2669 transitions. [2018-11-18 16:24:40,621 INFO L276 IsEmpty]: Start isEmpty. Operand 638 states and 2669 transitions. [2018-11-18 16:24:40,622 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-18 16:24:40,622 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:40,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:40,640 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 16:24:41,859 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:41,860 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2767 states to 641 states and 2679 transitions. [2018-11-18 16:24:41,860 INFO L276 IsEmpty]: Start isEmpty. Operand 641 states and 2679 transitions. [2018-11-18 16:24:41,861 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-18 16:24:41,861 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:41,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:41,876 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 16:24:42,687 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:42,688 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2771 states to 643 states and 2683 transitions. [2018-11-18 16:24:42,688 INFO L276 IsEmpty]: Start isEmpty. Operand 643 states and 2683 transitions. [2018-11-18 16:24:42,689 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-18 16:24:42,689 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:42,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:42,704 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 16:24:43,089 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:43,090 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2773 states to 644 states and 2685 transitions. [2018-11-18 16:24:43,090 INFO L276 IsEmpty]: Start isEmpty. Operand 644 states and 2685 transitions. [2018-11-18 16:24:43,091 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-18 16:24:43,091 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:43,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:43,105 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 16:24:43,301 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:43,302 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2775 states to 645 states and 2687 transitions. [2018-11-18 16:24:43,302 INFO L276 IsEmpty]: Start isEmpty. Operand 645 states and 2687 transitions. [2018-11-18 16:24:43,302 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-18 16:24:43,303 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:43,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:43,316 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 14 proven. 8 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-18 16:24:43,518 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:43,519 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2776 states to 646 states and 2688 transitions. [2018-11-18 16:24:43,519 INFO L276 IsEmpty]: Start isEmpty. Operand 646 states and 2688 transitions. [2018-11-18 16:24:43,520 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-18 16:24:43,520 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:43,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:43,544 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-18 16:24:45,358 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:45,359 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2817 states to 651 states and 2729 transitions. [2018-11-18 16:24:45,359 INFO L276 IsEmpty]: Start isEmpty. Operand 651 states and 2729 transitions. [2018-11-18 16:24:45,359 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-18 16:24:45,359 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:45,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:45,375 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-18 16:24:46,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:46,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2848 states to 655 states and 2760 transitions. [2018-11-18 16:24:46,902 INFO L276 IsEmpty]: Start isEmpty. Operand 655 states and 2760 transitions. [2018-11-18 16:24:46,903 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-18 16:24:46,903 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:46,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:46,919 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-18 16:24:47,342 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:47,343 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2853 states to 656 states and 2765 transitions. [2018-11-18 16:24:47,343 INFO L276 IsEmpty]: Start isEmpty. Operand 656 states and 2765 transitions. [2018-11-18 16:24:47,343 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-18 16:24:47,343 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:47,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:47,357 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-18 16:24:47,624 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:47,625 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2857 states to 657 states and 2769 transitions. [2018-11-18 16:24:47,625 INFO L276 IsEmpty]: Start isEmpty. Operand 657 states and 2769 transitions. [2018-11-18 16:24:47,626 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-18 16:24:47,626 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:47,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:47,646 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-18 16:24:48,149 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:48,150 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2863 states to 662 states and 2775 transitions. [2018-11-18 16:24:48,150 INFO L276 IsEmpty]: Start isEmpty. Operand 662 states and 2775 transitions. [2018-11-18 16:24:48,151 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-18 16:24:48,151 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:48,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:48,166 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-18 16:24:48,188 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:48,188 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2867 states to 664 states and 2779 transitions. [2018-11-18 16:24:48,189 INFO L276 IsEmpty]: Start isEmpty. Operand 664 states and 2779 transitions. [2018-11-18 16:24:48,189 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-18 16:24:48,189 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:48,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:48,585 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 15 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 16:24:54,289 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:54,290 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2958 states to 681 states and 2869 transitions. [2018-11-18 16:24:54,290 INFO L276 IsEmpty]: Start isEmpty. Operand 681 states and 2869 transitions. [2018-11-18 16:24:54,291 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-18 16:24:54,291 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:54,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:54,305 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 15 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 16:24:54,870 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:54,871 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2978 states to 683 states and 2889 transitions. [2018-11-18 16:24:54,871 INFO L276 IsEmpty]: Start isEmpty. Operand 683 states and 2889 transitions. [2018-11-18 16:24:54,872 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-18 16:24:54,872 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:54,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:54,884 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 25 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-18 16:24:55,364 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:55,364 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2982 states to 685 states and 2893 transitions. [2018-11-18 16:24:55,365 INFO L276 IsEmpty]: Start isEmpty. Operand 685 states and 2893 transitions. [2018-11-18 16:24:55,365 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-18 16:24:55,365 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:55,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:55,379 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 12 proven. 9 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:24:56,494 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:56,495 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2988 states to 687 states and 2899 transitions. [2018-11-18 16:24:56,495 INFO L276 IsEmpty]: Start isEmpty. Operand 687 states and 2899 transitions. [2018-11-18 16:24:56,495 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-18 16:24:56,495 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:56,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:56,512 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 14 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:24:56,780 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:56,781 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2988 states to 688 states and 2899 transitions. [2018-11-18 16:24:56,781 INFO L276 IsEmpty]: Start isEmpty. Operand 688 states and 2899 transitions. [2018-11-18 16:24:56,782 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-11-18 16:24:56,782 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:56,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:56,797 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:24:57,358 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:57,359 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2988 states to 689 states and 2899 transitions. [2018-11-18 16:24:57,359 INFO L276 IsEmpty]: Start isEmpty. Operand 689 states and 2899 transitions. [2018-11-18 16:24:57,360 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-11-18 16:24:57,360 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:57,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:57,374 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-18 16:24:58,498 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:58,499 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2991 states to 691 states and 2902 transitions. [2018-11-18 16:24:58,499 INFO L276 IsEmpty]: Start isEmpty. Operand 691 states and 2902 transitions. [2018-11-18 16:24:58,500 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-11-18 16:24:58,500 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:58,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:58,517 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-18 16:24:58,950 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:58,951 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2991 states to 692 states and 2902 transitions. [2018-11-18 16:24:58,951 INFO L276 IsEmpty]: Start isEmpty. Operand 692 states and 2902 transitions. [2018-11-18 16:24:58,952 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-11-18 16:24:58,952 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:58,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:58,968 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:24:59,454 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:59,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2992 states to 693 states and 2903 transitions. [2018-11-18 16:24:59,455 INFO L276 IsEmpty]: Start isEmpty. Operand 693 states and 2903 transitions. [2018-11-18 16:24:59,456 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-18 16:24:59,456 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:59,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:59,471 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:24:59,929 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:24:59,930 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2992 states to 694 states and 2903 transitions. [2018-11-18 16:24:59,930 INFO L276 IsEmpty]: Start isEmpty. Operand 694 states and 2903 transitions. [2018-11-18 16:24:59,931 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-18 16:24:59,931 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:24:59,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:59,946 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:25:00,423 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:00,424 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2992 states to 695 states and 2903 transitions. [2018-11-18 16:25:00,424 INFO L276 IsEmpty]: Start isEmpty. Operand 695 states and 2903 transitions. [2018-11-18 16:25:00,425 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-18 16:25:00,425 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:00,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:00,441 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-11-18 16:25:01,482 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:01,483 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2998 states to 699 states and 2909 transitions. [2018-11-18 16:25:01,483 INFO L276 IsEmpty]: Start isEmpty. Operand 699 states and 2909 transitions. [2018-11-18 16:25:01,484 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-11-18 16:25:01,484 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:01,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:01,503 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:25:01,770 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:01,770 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3004 states to 704 states and 2915 transitions. [2018-11-18 16:25:01,771 INFO L276 IsEmpty]: Start isEmpty. Operand 704 states and 2915 transitions. [2018-11-18 16:25:01,771 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-11-18 16:25:01,771 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:01,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:01,787 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:25:01,811 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:01,812 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3008 states to 706 states and 2919 transitions. [2018-11-18 16:25:01,812 INFO L276 IsEmpty]: Start isEmpty. Operand 706 states and 2919 transitions. [2018-11-18 16:25:01,813 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-11-18 16:25:01,813 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:01,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:01,827 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-18 16:25:02,357 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:02,358 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3008 states to 707 states and 2919 transitions. [2018-11-18 16:25:02,358 INFO L276 IsEmpty]: Start isEmpty. Operand 707 states and 2919 transitions. [2018-11-18 16:25:02,359 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-18 16:25:02,359 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:02,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:02,451 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-18 16:25:03,400 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:03,401 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3031 states to 710 states and 2941 transitions. [2018-11-18 16:25:03,401 INFO L276 IsEmpty]: Start isEmpty. Operand 710 states and 2941 transitions. [2018-11-18 16:25:03,402 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-18 16:25:03,402 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:03,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:03,420 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-18 16:25:03,934 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:03,935 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3052 states to 712 states and 2961 transitions. [2018-11-18 16:25:03,935 INFO L276 IsEmpty]: Start isEmpty. Operand 712 states and 2961 transitions. [2018-11-18 16:25:03,936 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-18 16:25:03,936 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:03,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:03,953 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-18 16:25:04,999 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:05,001 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3074 states to 715 states and 2982 transitions. [2018-11-18 16:25:05,001 INFO L276 IsEmpty]: Start isEmpty. Operand 715 states and 2982 transitions. [2018-11-18 16:25:05,001 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-18 16:25:05,001 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:05,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:05,016 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-18 16:25:05,574 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:05,575 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3075 states to 716 states and 2983 transitions. [2018-11-18 16:25:05,575 INFO L276 IsEmpty]: Start isEmpty. Operand 716 states and 2983 transitions. [2018-11-18 16:25:05,576 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-18 16:25:05,576 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:05,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:05,590 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-18 16:25:06,151 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:06,152 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3095 states to 718 states and 3002 transitions. [2018-11-18 16:25:06,152 INFO L276 IsEmpty]: Start isEmpty. Operand 718 states and 3002 transitions. [2018-11-18 16:25:06,153 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-11-18 16:25:06,153 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:06,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:06,167 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 8 proven. 6 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-18 16:25:07,210 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:07,211 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3102 states to 722 states and 3009 transitions. [2018-11-18 16:25:07,211 INFO L276 IsEmpty]: Start isEmpty. Operand 722 states and 3009 transitions. [2018-11-18 16:25:07,212 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-11-18 16:25:07,212 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:07,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:07,226 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2018-11-18 16:25:07,752 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:07,753 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3102 states to 723 states and 3009 transitions. [2018-11-18 16:25:07,753 INFO L276 IsEmpty]: Start isEmpty. Operand 723 states and 3009 transitions. [2018-11-18 16:25:07,753 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-11-18 16:25:07,753 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:07,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:07,767 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2018-11-18 16:25:08,368 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:08,369 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3102 states to 724 states and 3009 transitions. [2018-11-18 16:25:08,369 INFO L276 IsEmpty]: Start isEmpty. Operand 724 states and 3009 transitions. [2018-11-18 16:25:08,370 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-18 16:25:08,370 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:08,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:08,384 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 24 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-18 16:25:08,879 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:08,880 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3107 states to 726 states and 3014 transitions. [2018-11-18 16:25:08,880 INFO L276 IsEmpty]: Start isEmpty. Operand 726 states and 3014 transitions. [2018-11-18 16:25:08,880 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-18 16:25:08,880 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:08,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:08,893 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 24 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-18 16:25:08,959 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:08,960 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3097 states to 725 states and 3004 transitions. [2018-11-18 16:25:08,960 INFO L276 IsEmpty]: Start isEmpty. Operand 725 states and 3004 transitions. [2018-11-18 16:25:08,961 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-18 16:25:08,961 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:08,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:08,974 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-18 16:25:08,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:08,986 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3097 states to 726 states and 3004 transitions. [2018-11-18 16:25:08,986 INFO L276 IsEmpty]: Start isEmpty. Operand 726 states and 3004 transitions. [2018-11-18 16:25:08,987 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-18 16:25:08,987 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:08,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:09,003 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:25:10,050 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:10,051 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3107 states to 729 states and 3014 transitions. [2018-11-18 16:25:10,051 INFO L276 IsEmpty]: Start isEmpty. Operand 729 states and 3014 transitions. [2018-11-18 16:25:10,052 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-18 16:25:10,052 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:10,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:10,070 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:25:10,323 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:10,324 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3107 states to 730 states and 3014 transitions. [2018-11-18 16:25:10,324 INFO L276 IsEmpty]: Start isEmpty. Operand 730 states and 3014 transitions. [2018-11-18 16:25:10,325 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-18 16:25:10,325 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:10,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:10,341 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:25:13,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:13,347 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3154 states to 737 states and 3060 transitions. [2018-11-18 16:25:13,347 INFO L276 IsEmpty]: Start isEmpty. Operand 737 states and 3060 transitions. [2018-11-18 16:25:13,348 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-18 16:25:13,348 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:13,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:13,364 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:25:14,469 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:14,470 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3183 states to 740 states and 3088 transitions. [2018-11-18 16:25:14,470 INFO L276 IsEmpty]: Start isEmpty. Operand 740 states and 3088 transitions. [2018-11-18 16:25:14,471 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-18 16:25:14,471 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:14,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:14,486 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-18 16:25:15,248 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:15,249 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3189 states to 743 states and 3094 transitions. [2018-11-18 16:25:15,249 INFO L276 IsEmpty]: Start isEmpty. Operand 743 states and 3094 transitions. [2018-11-18 16:25:15,250 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-18 16:25:15,250 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:15,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:15,264 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-18 16:25:15,762 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:15,763 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3189 states to 744 states and 3094 transitions. [2018-11-18 16:25:15,763 INFO L276 IsEmpty]: Start isEmpty. Operand 744 states and 3094 transitions. [2018-11-18 16:25:15,764 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-11-18 16:25:15,764 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:15,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:15,780 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:25:16,355 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:16,356 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3189 states to 745 states and 3094 transitions. [2018-11-18 16:25:16,357 INFO L276 IsEmpty]: Start isEmpty. Operand 745 states and 3094 transitions. [2018-11-18 16:25:16,357 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-18 16:25:16,357 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:16,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:16,376 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:25:16,399 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:16,400 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3195 states to 748 states and 3100 transitions. [2018-11-18 16:25:16,400 INFO L276 IsEmpty]: Start isEmpty. Operand 748 states and 3100 transitions. [2018-11-18 16:25:16,401 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-18 16:25:16,401 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:16,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:16,418 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:25:16,447 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:16,448 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3196 states to 749 states and 3101 transitions. [2018-11-18 16:25:16,448 INFO L276 IsEmpty]: Start isEmpty. Operand 749 states and 3101 transitions. [2018-11-18 16:25:16,449 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-18 16:25:16,449 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:16,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:16,517 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 17 proven. 4 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:25:16,956 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:16,957 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3187 states to 749 states and 3092 transitions. [2018-11-18 16:25:16,957 INFO L276 IsEmpty]: Start isEmpty. Operand 749 states and 3092 transitions. [2018-11-18 16:25:16,958 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-18 16:25:16,958 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:16,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:16,974 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:25:17,230 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:17,231 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3191 states to 751 states and 3096 transitions. [2018-11-18 16:25:17,231 INFO L276 IsEmpty]: Start isEmpty. Operand 751 states and 3096 transitions. [2018-11-18 16:25:17,232 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-11-18 16:25:17,232 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:17,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:17,248 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-18 16:25:17,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:17,273 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3196 states to 754 states and 3101 transitions. [2018-11-18 16:25:17,273 INFO L276 IsEmpty]: Start isEmpty. Operand 754 states and 3101 transitions. [2018-11-18 16:25:17,274 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-11-18 16:25:17,274 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:17,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:17,289 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-18 16:25:17,319 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:17,320 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3197 states to 755 states and 3102 transitions. [2018-11-18 16:25:17,320 INFO L276 IsEmpty]: Start isEmpty. Operand 755 states and 3102 transitions. [2018-11-18 16:25:17,321 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-18 16:25:17,321 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:17,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:17,335 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:25:17,941 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:17,942 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3197 states to 756 states and 3102 transitions. [2018-11-18 16:25:17,942 INFO L276 IsEmpty]: Start isEmpty. Operand 756 states and 3102 transitions. [2018-11-18 16:25:17,943 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-18 16:25:17,943 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:17,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:17,957 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:25:18,510 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:18,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3197 states to 757 states and 3102 transitions. [2018-11-18 16:25:18,511 INFO L276 IsEmpty]: Start isEmpty. Operand 757 states and 3102 transitions. [2018-11-18 16:25:18,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-18 16:25:18,512 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:18,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:18,527 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-11-18 16:25:19,056 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:19,057 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3222 states to 759 states and 3126 transitions. [2018-11-18 16:25:19,057 INFO L276 IsEmpty]: Start isEmpty. Operand 759 states and 3126 transitions. [2018-11-18 16:25:19,058 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-18 16:25:19,058 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:19,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:19,072 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-11-18 16:25:19,576 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:19,577 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3245 states to 761 states and 3149 transitions. [2018-11-18 16:25:19,577 INFO L276 IsEmpty]: Start isEmpty. Operand 761 states and 3149 transitions. [2018-11-18 16:25:19,578 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-18 16:25:19,578 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:19,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:19,596 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:25:19,623 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:19,624 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3252 states to 764 states and 3156 transitions. [2018-11-18 16:25:19,624 INFO L276 IsEmpty]: Start isEmpty. Operand 764 states and 3156 transitions. [2018-11-18 16:25:19,625 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-18 16:25:19,625 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:19,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:19,642 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 7 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 16:25:20,263 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:20,264 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3252 states to 764 states and 3153 transitions. [2018-11-18 16:25:20,264 INFO L276 IsEmpty]: Start isEmpty. Operand 764 states and 3153 transitions. [2018-11-18 16:25:20,265 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-18 16:25:20,265 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:20,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:20,280 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-18 16:25:20,798 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:20,799 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3254 states to 766 states and 3155 transitions. [2018-11-18 16:25:20,799 INFO L276 IsEmpty]: Start isEmpty. Operand 766 states and 3155 transitions. [2018-11-18 16:25:20,799 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-18 16:25:20,800 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:20,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:20,813 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-11-18 16:25:21,326 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:21,327 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3277 states to 768 states and 3178 transitions. [2018-11-18 16:25:21,327 INFO L276 IsEmpty]: Start isEmpty. Operand 768 states and 3178 transitions. [2018-11-18 16:25:21,328 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-18 16:25:21,328 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:21,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:21,342 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-18 16:25:21,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:21,996 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3283 states to 770 states and 3184 transitions. [2018-11-18 16:25:21,996 INFO L276 IsEmpty]: Start isEmpty. Operand 770 states and 3184 transitions. [2018-11-18 16:25:21,997 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-11-18 16:25:21,997 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:22,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:22,014 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-11-18 16:25:23,192 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:23,193 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3291 states to 774 states and 3192 transitions. [2018-11-18 16:25:23,193 INFO L276 IsEmpty]: Start isEmpty. Operand 774 states and 3192 transitions. [2018-11-18 16:25:23,194 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-18 16:25:23,194 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:23,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:23,212 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:25:23,813 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:23,814 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3304 states to 779 states and 3205 transitions. [2018-11-18 16:25:23,814 INFO L276 IsEmpty]: Start isEmpty. Operand 779 states and 3205 transitions. [2018-11-18 16:25:23,815 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-18 16:25:23,815 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:23,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:23,832 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:25:24,298 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:24,299 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3329 states to 781 states and 3230 transitions. [2018-11-18 16:25:24,299 INFO L276 IsEmpty]: Start isEmpty. Operand 781 states and 3230 transitions. [2018-11-18 16:25:24,299 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-18 16:25:24,300 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:24,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:24,316 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:25:24,356 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:24,358 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3333 states to 783 states and 3234 transitions. [2018-11-18 16:25:24,358 INFO L276 IsEmpty]: Start isEmpty. Operand 783 states and 3234 transitions. [2018-11-18 16:25:24,359 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-18 16:25:24,360 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:24,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:24,386 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-11-18 16:25:25,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:25,273 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3336 states to 785 states and 3237 transitions. [2018-11-18 16:25:25,273 INFO L276 IsEmpty]: Start isEmpty. Operand 785 states and 3237 transitions. [2018-11-18 16:25:25,274 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-18 16:25:25,274 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:25,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:25,291 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-11-18 16:25:25,782 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:25,783 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3337 states to 786 states and 3238 transitions. [2018-11-18 16:25:25,783 INFO L276 IsEmpty]: Start isEmpty. Operand 786 states and 3238 transitions. [2018-11-18 16:25:25,784 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-18 16:25:25,784 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:25,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:25,802 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-11-18 16:25:26,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:26,907 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3340 states to 788 states and 3241 transitions. [2018-11-18 16:25:26,907 INFO L276 IsEmpty]: Start isEmpty. Operand 788 states and 3241 transitions. [2018-11-18 16:25:26,908 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-18 16:25:26,908 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:26,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:26,930 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-11-18 16:25:27,551 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:27,552 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3341 states to 789 states and 3242 transitions. [2018-11-18 16:25:27,552 INFO L276 IsEmpty]: Start isEmpty. Operand 789 states and 3242 transitions. [2018-11-18 16:25:27,553 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-18 16:25:27,553 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:27,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:27,570 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-11-18 16:25:28,066 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:28,067 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3343 states to 790 states and 3244 transitions. [2018-11-18 16:25:28,067 INFO L276 IsEmpty]: Start isEmpty. Operand 790 states and 3244 transitions. [2018-11-18 16:25:28,068 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-11-18 16:25:28,068 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:28,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:28,082 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-18 16:25:28,096 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:28,097 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3345 states to 792 states and 3246 transitions. [2018-11-18 16:25:28,097 INFO L276 IsEmpty]: Start isEmpty. Operand 792 states and 3246 transitions. [2018-11-18 16:25:28,098 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-18 16:25:28,098 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:28,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:28,112 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-11-18 16:25:28,796 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:28,797 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3348 states to 794 states and 3249 transitions. [2018-11-18 16:25:28,797 INFO L276 IsEmpty]: Start isEmpty. Operand 794 states and 3249 transitions. [2018-11-18 16:25:28,798 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-18 16:25:28,798 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:28,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:28,811 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-11-18 16:25:29,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:29,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3349 states to 795 states and 3250 transitions. [2018-11-18 16:25:29,338 INFO L276 IsEmpty]: Start isEmpty. Operand 795 states and 3250 transitions. [2018-11-18 16:25:29,339 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-11-18 16:25:29,339 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:29,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:29,353 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-18 16:25:29,934 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:29,935 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3351 states to 797 states and 3252 transitions. [2018-11-18 16:25:29,935 INFO L276 IsEmpty]: Start isEmpty. Operand 797 states and 3252 transitions. [2018-11-18 16:25:29,935 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-18 16:25:29,935 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:29,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:29,951 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 16:25:30,526 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:30,528 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3357 states to 802 states and 3258 transitions. [2018-11-18 16:25:30,528 INFO L276 IsEmpty]: Start isEmpty. Operand 802 states and 3258 transitions. [2018-11-18 16:25:30,529 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-18 16:25:30,529 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:30,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:30,553 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-18 16:25:30,582 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:30,584 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3364 states to 805 states and 3265 transitions. [2018-11-18 16:25:30,584 INFO L276 IsEmpty]: Start isEmpty. Operand 805 states and 3265 transitions. [2018-11-18 16:25:30,585 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-18 16:25:30,585 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:30,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:30,600 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 16:25:30,920 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:30,921 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3368 states to 807 states and 3269 transitions. [2018-11-18 16:25:30,921 INFO L276 IsEmpty]: Start isEmpty. Operand 807 states and 3269 transitions. [2018-11-18 16:25:30,922 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-11-18 16:25:30,922 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:30,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:30,937 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-18 16:25:32,194 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:32,195 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3378 states to 811 states and 3279 transitions. [2018-11-18 16:25:32,195 INFO L276 IsEmpty]: Start isEmpty. Operand 811 states and 3279 transitions. [2018-11-18 16:25:32,196 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-11-18 16:25:32,196 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:32,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:32,216 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-18 16:25:32,785 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:32,786 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3398 states to 813 states and 3299 transitions. [2018-11-18 16:25:32,786 INFO L276 IsEmpty]: Start isEmpty. Operand 813 states and 3299 transitions. [2018-11-18 16:25:32,786 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-18 16:25:32,787 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:32,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:32,804 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-18 16:25:33,534 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:33,535 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3408 states to 818 states and 3309 transitions. [2018-11-18 16:25:33,535 INFO L276 IsEmpty]: Start isEmpty. Operand 818 states and 3309 transitions. [2018-11-18 16:25:33,536 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-18 16:25:33,536 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:33,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:33,552 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-11-18 16:25:34,675 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:34,676 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3413 states to 822 states and 3314 transitions. [2018-11-18 16:25:34,676 INFO L276 IsEmpty]: Start isEmpty. Operand 822 states and 3314 transitions. [2018-11-18 16:25:34,677 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-18 16:25:34,677 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:34,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:34,694 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-18 16:25:34,760 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:34,761 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3415 states to 824 states and 3316 transitions. [2018-11-18 16:25:34,761 INFO L276 IsEmpty]: Start isEmpty. Operand 824 states and 3316 transitions. [2018-11-18 16:25:34,762 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-11-18 16:25:34,762 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:34,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:34,780 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:25:35,897 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:35,898 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3421 states to 827 states and 3321 transitions. [2018-11-18 16:25:35,898 INFO L276 IsEmpty]: Start isEmpty. Operand 827 states and 3321 transitions. [2018-11-18 16:25:35,899 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-18 16:25:35,899 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:35,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:36,164 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-18 16:25:36,432 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:36,433 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3342 states to 826 states and 3242 transitions. [2018-11-18 16:25:36,433 INFO L276 IsEmpty]: Start isEmpty. Operand 826 states and 3242 transitions. [2018-11-18 16:25:36,434 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-18 16:25:36,434 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:36,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:36,451 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 17 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-18 16:25:37,134 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:37,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3361 states to 828 states and 3261 transitions. [2018-11-18 16:25:37,135 INFO L276 IsEmpty]: Start isEmpty. Operand 828 states and 3261 transitions. [2018-11-18 16:25:37,136 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-11-18 16:25:37,136 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:37,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:37,154 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:25:37,751 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:37,752 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3366 states to 831 states and 3265 transitions. [2018-11-18 16:25:37,752 INFO L276 IsEmpty]: Start isEmpty. Operand 831 states and 3265 transitions. [2018-11-18 16:25:37,753 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-11-18 16:25:37,753 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:37,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:37,768 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-11-18 16:25:37,789 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:37,790 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3366 states to 832 states and 3265 transitions. [2018-11-18 16:25:37,790 INFO L276 IsEmpty]: Start isEmpty. Operand 832 states and 3265 transitions. [2018-11-18 16:25:37,791 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-18 16:25:37,791 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:37,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:37,808 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:25:37,838 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:37,839 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3371 states to 835 states and 3270 transitions. [2018-11-18 16:25:37,839 INFO L276 IsEmpty]: Start isEmpty. Operand 835 states and 3270 transitions. [2018-11-18 16:25:37,840 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-18 16:25:37,840 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:37,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:37,857 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:25:37,892 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:37,893 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3372 states to 836 states and 3271 transitions. [2018-11-18 16:25:37,893 INFO L276 IsEmpty]: Start isEmpty. Operand 836 states and 3271 transitions. [2018-11-18 16:25:37,894 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-11-18 16:25:37,894 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:37,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:37,911 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-18 16:25:38,472 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:38,473 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3376 states to 838 states and 3274 transitions. [2018-11-18 16:25:38,474 INFO L276 IsEmpty]: Start isEmpty. Operand 838 states and 3274 transitions. [2018-11-18 16:25:38,474 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-11-18 16:25:38,474 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:38,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:38,494 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:25:38,530 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:38,531 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3383 states to 841 states and 3281 transitions. [2018-11-18 16:25:38,531 INFO L276 IsEmpty]: Start isEmpty. Operand 841 states and 3281 transitions. [2018-11-18 16:25:38,532 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-11-18 16:25:38,532 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:38,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:38,551 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:25:38,883 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:38,885 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3389 states to 846 states and 3287 transitions. [2018-11-18 16:25:38,885 INFO L276 IsEmpty]: Start isEmpty. Operand 846 states and 3287 transitions. [2018-11-18 16:25:38,885 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-11-18 16:25:38,886 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:38,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:38,910 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 16:25:38,938 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:38,939 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3394 states to 849 states and 3292 transitions. [2018-11-18 16:25:38,939 INFO L276 IsEmpty]: Start isEmpty. Operand 849 states and 3292 transitions. [2018-11-18 16:25:38,940 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-11-18 16:25:38,940 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:38,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:38,957 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 16:25:38,988 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:38,989 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3395 states to 850 states and 3293 transitions. [2018-11-18 16:25:38,989 INFO L276 IsEmpty]: Start isEmpty. Operand 850 states and 3293 transitions. [2018-11-18 16:25:38,990 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-18 16:25:38,990 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:38,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:39,005 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:25:39,361 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:39,362 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3398 states to 852 states and 3296 transitions. [2018-11-18 16:25:39,362 INFO L276 IsEmpty]: Start isEmpty. Operand 852 states and 3296 transitions. [2018-11-18 16:25:39,363 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-11-18 16:25:39,363 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:39,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:39,380 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:25:39,395 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:39,396 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3400 states to 854 states and 3298 transitions. [2018-11-18 16:25:39,396 INFO L276 IsEmpty]: Start isEmpty. Operand 854 states and 3298 transitions. [2018-11-18 16:25:39,397 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-11-18 16:25:39,397 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:39,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:39,522 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:25:40,139 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:40,141 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3405 states to 857 states and 3302 transitions. [2018-11-18 16:25:40,141 INFO L276 IsEmpty]: Start isEmpty. Operand 857 states and 3302 transitions. [2018-11-18 16:25:40,141 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-18 16:25:40,142 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:40,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:40,161 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-11-18 16:25:40,777 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:40,778 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3406 states to 858 states and 3303 transitions. [2018-11-18 16:25:40,778 INFO L276 IsEmpty]: Start isEmpty. Operand 858 states and 3303 transitions. [2018-11-18 16:25:40,779 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-11-18 16:25:40,779 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:40,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:40,796 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 7 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 16:25:41,352 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:41,353 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3406 states to 858 states and 3302 transitions. [2018-11-18 16:25:41,353 INFO L276 IsEmpty]: Start isEmpty. Operand 858 states and 3302 transitions. [2018-11-18 16:25:41,354 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-11-18 16:25:41,354 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:41,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:41,371 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 7 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 16:25:41,949 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:41,950 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3407 states to 859 states and 3303 transitions. [2018-11-18 16:25:41,950 INFO L276 IsEmpty]: Start isEmpty. Operand 859 states and 3303 transitions. [2018-11-18 16:25:41,951 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-11-18 16:25:41,951 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:41,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:41,968 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-18 16:25:42,024 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:42,026 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3424 states to 862 states and 3320 transitions. [2018-11-18 16:25:42,026 INFO L276 IsEmpty]: Start isEmpty. Operand 862 states and 3320 transitions. [2018-11-18 16:25:42,027 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-11-18 16:25:42,027 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:42,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:42,052 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-18 16:25:42,099 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:42,100 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3440 states to 863 states and 3336 transitions. [2018-11-18 16:25:42,100 INFO L276 IsEmpty]: Start isEmpty. Operand 863 states and 3336 transitions. [2018-11-18 16:25:42,102 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-18 16:25:42,102 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:42,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:42,122 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-11-18 16:25:42,766 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:42,767 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3444 states to 865 states and 3340 transitions. [2018-11-18 16:25:42,768 INFO L276 IsEmpty]: Start isEmpty. Operand 865 states and 3340 transitions. [2018-11-18 16:25:42,769 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-18 16:25:42,769 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:42,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:42,786 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:25:42,809 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:42,810 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3450 states to 868 states and 3346 transitions. [2018-11-18 16:25:42,810 INFO L276 IsEmpty]: Start isEmpty. Operand 868 states and 3346 transitions. [2018-11-18 16:25:42,811 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-18 16:25:42,811 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:42,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:42,829 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:25:42,850 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:42,851 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3451 states to 869 states and 3347 transitions. [2018-11-18 16:25:42,852 INFO L276 IsEmpty]: Start isEmpty. Operand 869 states and 3347 transitions. [2018-11-18 16:25:42,853 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-18 16:25:42,853 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:42,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:42,871 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-11-18 16:25:43,483 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:43,484 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3454 states to 871 states and 3350 transitions. [2018-11-18 16:25:43,484 INFO L276 IsEmpty]: Start isEmpty. Operand 871 states and 3350 transitions. [2018-11-18 16:25:43,485 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-18 16:25:43,485 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:43,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:43,502 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:25:43,529 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:43,530 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3464 states to 874 states and 3360 transitions. [2018-11-18 16:25:43,531 INFO L276 IsEmpty]: Start isEmpty. Operand 874 states and 3360 transitions. [2018-11-18 16:25:43,532 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-18 16:25:43,532 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:43,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:43,549 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-11-18 16:25:44,145 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:44,146 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3464 states to 875 states and 3360 transitions. [2018-11-18 16:25:44,146 INFO L276 IsEmpty]: Start isEmpty. Operand 875 states and 3360 transitions. [2018-11-18 16:25:44,147 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-18 16:25:44,147 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:44,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:44,167 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:25:44,209 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:44,210 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3464 states to 876 states and 3360 transitions. [2018-11-18 16:25:44,210 INFO L276 IsEmpty]: Start isEmpty. Operand 876 states and 3360 transitions. [2018-11-18 16:25:44,211 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-11-18 16:25:44,211 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:44,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:44,229 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2018-11-18 16:25:44,798 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:44,799 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3470 states to 880 states and 3366 transitions. [2018-11-18 16:25:44,799 INFO L276 IsEmpty]: Start isEmpty. Operand 880 states and 3366 transitions. [2018-11-18 16:25:44,800 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-11-18 16:25:44,800 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:44,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:44,818 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-11-18 16:25:45,398 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:45,399 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3470 states to 881 states and 3366 transitions. [2018-11-18 16:25:45,399 INFO L276 IsEmpty]: Start isEmpty. Operand 881 states and 3366 transitions. [2018-11-18 16:25:45,400 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-11-18 16:25:45,400 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:45,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:45,416 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-11-18 16:25:46,045 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:46,046 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3475 states to 885 states and 3371 transitions. [2018-11-18 16:25:46,046 INFO L276 IsEmpty]: Start isEmpty. Operand 885 states and 3371 transitions. [2018-11-18 16:25:46,047 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-11-18 16:25:46,047 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:46,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:46,063 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 16:25:46,089 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:46,090 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3482 states to 888 states and 3378 transitions. [2018-11-18 16:25:46,091 INFO L276 IsEmpty]: Start isEmpty. Operand 888 states and 3378 transitions. [2018-11-18 16:25:46,091 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-18 16:25:46,092 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:46,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:46,106 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 14 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 16:25:46,288 WARN L180 SmtUtils]: Spent 110.00 ms on a formula simplification. DAG size of input: 20 DAG size of output: 18 [2018-11-18 16:25:46,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:46,821 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3486 states to 889 states and 3382 transitions. [2018-11-18 16:25:46,821 INFO L276 IsEmpty]: Start isEmpty. Operand 889 states and 3382 transitions. [2018-11-18 16:25:46,822 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-18 16:25:46,822 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:46,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:46,838 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 15 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-18 16:25:48,152 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:48,153 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3491 states to 892 states and 3387 transitions. [2018-11-18 16:25:48,153 INFO L276 IsEmpty]: Start isEmpty. Operand 892 states and 3387 transitions. [2018-11-18 16:25:48,154 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-18 16:25:48,154 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:48,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:48,171 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 15 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-18 16:25:48,722 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:48,723 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3508 states to 894 states and 3403 transitions. [2018-11-18 16:25:48,723 INFO L276 IsEmpty]: Start isEmpty. Operand 894 states and 3403 transitions. [2018-11-18 16:25:48,724 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-18 16:25:48,724 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:48,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:48,739 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 15 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-18 16:25:49,397 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:49,398 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3510 states to 895 states and 3405 transitions. [2018-11-18 16:25:49,398 INFO L276 IsEmpty]: Start isEmpty. Operand 895 states and 3405 transitions. [2018-11-18 16:25:49,399 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-18 16:25:49,399 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:49,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:49,414 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 15 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-18 16:25:49,957 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:49,958 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3527 states to 897 states and 3421 transitions. [2018-11-18 16:25:49,958 INFO L276 IsEmpty]: Start isEmpty. Operand 897 states and 3421 transitions. [2018-11-18 16:25:49,959 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-11-18 16:25:49,959 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:49,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:49,977 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-18 16:25:50,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:50,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3544 states to 900 states and 3438 transitions. [2018-11-18 16:25:50,338 INFO L276 IsEmpty]: Start isEmpty. Operand 900 states and 3438 transitions. [2018-11-18 16:25:50,339 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-11-18 16:25:50,339 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:50,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:50,407 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 22 proven. 7 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-18 16:25:50,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:50,996 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3545 states to 901 states and 3439 transitions. [2018-11-18 16:25:50,996 INFO L276 IsEmpty]: Start isEmpty. Operand 901 states and 3439 transitions. [2018-11-18 16:25:50,997 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-18 16:25:50,997 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:51,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:51,014 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:25:51,034 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:51,035 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3551 states to 906 states and 3445 transitions. [2018-11-18 16:25:51,035 INFO L276 IsEmpty]: Start isEmpty. Operand 906 states and 3445 transitions. [2018-11-18 16:25:51,036 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-18 16:25:51,036 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:51,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:51,471 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:25:55,098 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:55,100 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3635 states to 917 states and 3527 transitions. [2018-11-18 16:25:55,100 INFO L276 IsEmpty]: Start isEmpty. Operand 917 states and 3527 transitions. [2018-11-18 16:25:55,101 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-18 16:25:55,101 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:55,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:55,282 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:25:55,968 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:55,969 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3657 states to 919 states and 3548 transitions. [2018-11-18 16:25:55,970 INFO L276 IsEmpty]: Start isEmpty. Operand 919 states and 3548 transitions. [2018-11-18 16:25:55,970 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-18 16:25:55,970 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:55,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:56,186 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:25:56,800 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:56,801 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3675 states to 920 states and 3566 transitions. [2018-11-18 16:25:56,801 INFO L276 IsEmpty]: Start isEmpty. Operand 920 states and 3566 transitions. [2018-11-18 16:25:56,802 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-18 16:25:56,802 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:56,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:56,979 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:25:57,630 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:57,631 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3697 states to 922 states and 3587 transitions. [2018-11-18 16:25:57,631 INFO L276 IsEmpty]: Start isEmpty. Operand 922 states and 3587 transitions. [2018-11-18 16:25:57,633 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-18 16:25:57,633 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:57,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:57,811 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:25:58,489 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:25:58,490 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3720 states to 924 states and 3608 transitions. [2018-11-18 16:25:58,491 INFO L276 IsEmpty]: Start isEmpty. Operand 924 states and 3608 transitions. [2018-11-18 16:25:58,491 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-18 16:25:58,491 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:25:58,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:58,769 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-18 16:26:02,222 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:26:02,223 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3797 states to 932 states and 3684 transitions. [2018-11-18 16:26:02,223 INFO L276 IsEmpty]: Start isEmpty. Operand 932 states and 3684 transitions. [2018-11-18 16:26:02,224 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-18 16:26:02,224 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:26:02,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:26:02,241 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-18 16:26:03,609 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:26:03,610 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3841 states to 935 states and 3726 transitions. [2018-11-18 16:26:03,610 INFO L276 IsEmpty]: Start isEmpty. Operand 935 states and 3726 transitions. [2018-11-18 16:26:03,611 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-18 16:26:03,611 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:26:03,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:26:03,626 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-18 16:26:04,332 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:26:04,333 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3867 states to 937 states and 3750 transitions. [2018-11-18 16:26:04,334 INFO L276 IsEmpty]: Start isEmpty. Operand 937 states and 3750 transitions. [2018-11-18 16:26:04,335 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-18 16:26:04,335 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:26:04,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:26:04,359 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-18 16:26:05,069 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:26:05,071 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3891 states to 939 states and 3773 transitions. [2018-11-18 16:26:05,071 INFO L276 IsEmpty]: Start isEmpty. Operand 939 states and 3773 transitions. [2018-11-18 16:26:05,072 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-11-18 16:26:05,072 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:26:05,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:26:05,096 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:26:05,135 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:26:05,136 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3891 states to 940 states and 3773 transitions. [2018-11-18 16:26:05,137 INFO L276 IsEmpty]: Start isEmpty. Operand 940 states and 3773 transitions. [2018-11-18 16:26:05,138 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-11-18 16:26:05,138 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:26:05,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:26:05,163 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-18 16:26:06,455 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:26:06,456 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3901 states to 942 states and 3783 transitions. [2018-11-18 16:26:06,456 INFO L276 IsEmpty]: Start isEmpty. Operand 942 states and 3783 transitions. [2018-11-18 16:26:06,457 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-11-18 16:26:06,457 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:26:06,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:26:06,481 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-18 16:26:07,059 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:26:07,061 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3905 states to 943 states and 3787 transitions. [2018-11-18 16:26:07,061 INFO L276 IsEmpty]: Start isEmpty. Operand 943 states and 3787 transitions. [2018-11-18 16:26:07,062 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-18 16:26:07,062 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:26:07,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:26:07,080 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:26:07,095 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:26:07,096 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3907 states to 945 states and 3789 transitions. [2018-11-18 16:26:07,096 INFO L276 IsEmpty]: Start isEmpty. Operand 945 states and 3789 transitions. [2018-11-18 16:26:07,097 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-11-18 16:26:07,097 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:26:07,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:26:07,113 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 16:26:08,520 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:26:08,521 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3921 states to 950 states and 3802 transitions. [2018-11-18 16:26:08,521 INFO L276 IsEmpty]: Start isEmpty. Operand 950 states and 3802 transitions. [2018-11-18 16:26:08,522 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-11-18 16:26:08,522 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:26:08,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:26:08,538 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 16:26:08,897 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:26:08,898 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3921 states to 951 states and 3802 transitions. [2018-11-18 16:26:08,898 INFO L276 IsEmpty]: Start isEmpty. Operand 951 states and 3802 transitions. [2018-11-18 16:26:08,899 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-11-18 16:26:08,899 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:26:08,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:26:08,916 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-11-18 16:26:08,943 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:26:08,944 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3927 states to 956 states and 3808 transitions. [2018-11-18 16:26:08,944 INFO L276 IsEmpty]: Start isEmpty. Operand 956 states and 3808 transitions. [2018-11-18 16:26:08,945 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-11-18 16:26:08,945 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:26:08,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:26:08,971 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-11-18 16:26:09,013 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:26:09,015 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3933 states to 958 states and 3814 transitions. [2018-11-18 16:26:09,015 INFO L276 IsEmpty]: Start isEmpty. Operand 958 states and 3814 transitions. [2018-11-18 16:26:09,016 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-18 16:26:09,016 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:26:09,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:26:09,033 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-11-18 16:26:09,382 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:26:09,383 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3934 states to 959 states and 3815 transitions. [2018-11-18 16:26:09,383 INFO L276 IsEmpty]: Start isEmpty. Operand 959 states and 3815 transitions. [2018-11-18 16:26:09,384 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-11-18 16:26:09,384 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:26:09,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:26:09,991 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-11-18 16:26:11,052 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:26:11,054 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3936 states to 960 states and 3817 transitions. [2018-11-18 16:26:11,054 INFO L276 IsEmpty]: Start isEmpty. Operand 960 states and 3817 transitions. [2018-11-18 16:26:11,054 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-11-18 16:26:11,054 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:26:11,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:26:11,476 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-11-18 16:26:12,628 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:26:12,629 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3938 states to 961 states and 3819 transitions. [2018-11-18 16:26:12,630 INFO L276 IsEmpty]: Start isEmpty. Operand 961 states and 3819 transitions. [2018-11-18 16:26:12,631 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-11-18 16:26:12,631 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:26:12,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:26:13,051 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-11-18 16:26:14,191 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:26:14,192 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3939 states to 962 states and 3820 transitions. [2018-11-18 16:26:14,192 INFO L276 IsEmpty]: Start isEmpty. Operand 962 states and 3820 transitions. [2018-11-18 16:26:14,193 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-11-18 16:26:14,193 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:26:14,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:26:14,684 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-11-18 16:26:15,817 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:26:15,818 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3940 states to 963 states and 3821 transitions. [2018-11-18 16:26:15,819 INFO L276 IsEmpty]: Start isEmpty. Operand 963 states and 3821 transitions. [2018-11-18 16:26:15,819 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-11-18 16:26:15,819 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:26:15,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 16:26:15,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 16:26:21,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 16:26:25,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 16:26:25,540 WARN L493 CodeCheckObserver]: This program is UNSAFE, Check terminated with 290 iterations. [2018-11-18 16:26:25,572 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.meminit_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,573 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.meminit_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,576 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,576 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,577 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,580 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,581 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,581 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,582 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,583 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,583 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,584 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,585 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,585 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,593 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,594 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,594 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,595 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,595 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,595 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,596 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,596 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,597 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,597 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,603 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,604 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,604 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,604 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,604 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,604 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,605 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,605 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,605 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,605 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,605 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,606 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,606 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,609 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,610 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,610 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,610 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,611 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,611 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,611 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,612 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,612 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,612 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,612 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,614 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.meminit_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,614 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.meminit_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,614 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,615 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,615 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,615 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,615 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,616 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,616 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,616 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,618 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,619 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,619 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,619 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,619 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,620 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,620 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,620 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,621 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,621 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,621 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,622 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,622 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,622 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,622 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,623 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,623 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,623 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,623 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,624 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,624 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,624 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,624 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,625 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,625 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,625 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,625 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,626 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,626 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,626 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,626 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,627 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,627 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,627 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,628 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,628 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,628 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,628 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,629 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,629 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,629 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,629 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,630 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,630 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,630 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,630 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,631 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,631 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,631 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,631 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,632 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,632 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,632 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,632 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,632 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,633 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,633 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,633 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,633 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,634 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,634 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,634 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,634 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,635 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,635 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,635 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,635 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,636 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,636 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,636 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,636 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,636 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,637 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,637 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,637 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,637 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,638 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,638 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,638 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,638 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,638 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,639 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,639 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled [2018-11-18 16:26:25,639 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled [2018-11-18 16:26:25,708 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.codecheck CFG 18.11 04:26:25 ImpRootNode [2018-11-18 16:26:25,708 INFO L132 PluginConnector]: ------------------------ END CodeCheck---------------------------- [2018-11-18 16:26:25,708 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-18 16:26:25,708 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-18 16:26:25,709 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-18 16:26:25,709 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 04:23:34" (3/4) ... [2018-11-18 16:26:25,715 INFO L147 WitnessPrinter]: No result that supports witness generation found [2018-11-18 16:26:25,716 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-18 16:26:25,716 INFO L168 Benchmark]: Toolchain (without parser) took 174994.30 ms. Allocated memory was 1.0 GB in the beginning and 3.7 GB in the end (delta: 2.6 GB). Free memory was 956.9 MB in the beginning and 1.5 GB in the end (delta: -525.7 MB). Peak memory consumption was 2.1 GB. Max. memory is 11.5 GB. [2018-11-18 16:26:25,717 INFO L168 Benchmark]: CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 982.8 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-18 16:26:25,717 INFO L168 Benchmark]: CACSL2BoogieTranslator took 916.28 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 167.8 MB). Free memory was 956.9 MB in the beginning and 987.5 MB in the end (delta: -30.6 MB). Peak memory consumption was 152.8 MB. Max. memory is 11.5 GB. [2018-11-18 16:26:25,717 INFO L168 Benchmark]: Boogie Procedure Inliner took 59.47 ms. Allocated memory is still 1.2 GB. Free memory was 987.5 MB in the beginning and 980.8 MB in the end (delta: 6.7 MB). Peak memory consumption was 6.7 MB. Max. memory is 11.5 GB. [2018-11-18 16:26:25,717 INFO L168 Benchmark]: Boogie Preprocessor took 52.43 ms. Allocated memory is still 1.2 GB. Free memory was 980.8 MB in the beginning and 974.1 MB in the end (delta: 6.7 MB). Peak memory consumption was 6.7 MB. Max. memory is 11.5 GB. [2018-11-18 16:26:25,718 INFO L168 Benchmark]: RCFGBuilder took 2739.38 ms. Allocated memory was 1.2 GB in the beginning and 1.3 GB in the end (delta: 70.8 MB). Free memory was 974.1 MB in the beginning and 1.1 GB in the end (delta: -161.4 MB). Peak memory consumption was 152.9 MB. Max. memory is 11.5 GB. [2018-11-18 16:26:25,718 INFO L168 Benchmark]: CodeCheck took 171216.62 ms. Allocated memory was 1.3 GB in the beginning and 3.7 GB in the end (delta: 2.4 GB). Free memory was 1.1 GB in the beginning and 1.5 GB in the end (delta: -347.2 MB). Peak memory consumption was 2.1 GB. Max. memory is 11.5 GB. [2018-11-18 16:26:25,718 INFO L168 Benchmark]: Witness Printer took 7.28 ms. Allocated memory is still 3.7 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-18 16:26:25,720 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.codecheck: - StatisticsResult: Ultimate CodeCheck benchmark data CFG has 20 procedures, 285 locations, 1 error locations. UNSAFE Result, 171.0s OverallTime, 290 OverallIterations, 0 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 201433216 SDtfs, -650311360 SDslu, -1479689600 SDs, 0 SdLazy, -1833382888 SolverSat, 1763649640 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 946.5s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 189154 GetRequests, 187166 SyntacticMatches, 416 SemanticMatches, 1572 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1362370 ImplicationChecksByTransitivity, 146.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=-1occurred in iteration=-1, traceCheckStatistics: 0.4s SsaConstructionTime, 6.5s SatisfiabilityAnalysisTime, 8.7s InterpolantComputationTime, 12604 NumberOfCodeBlocks, 12604 NumberOfCodeBlocksAsserted, 290 NumberOfCheckSat, 12257 ConstructedInterpolants, 0 QuantifiedInterpolants, 1073440 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 289 InterpolantComputations, 247 PerfectInterpolantSequences, 3057/3254 InterpolantCoveringCapability, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: No data available, ReuseStatistics: No data available - UnprovableResult [Line: 1684]: Unable to prove that call of __VERIFIER_error() unreachable Unable to prove that call of __VERIFIER_error() unreachable Reason: overapproximation of large string literal at line 2323, overapproximation of bitwiseAnd at line 1870. Possible FailurePath: [L1905] FCALL "write failed:retry count exceeded.\n" [L2072] FCALL "name\t\t: %s\n" [L2150] FCALL "Unable to allocate resources for device.\n" [L2159] FCALL "Unable to request mem region for device.\n" [L2175] FCALL "Unable to grab IOs for device.\n" [L2189] FCALL "info->tegra_rtc_lock" [L2211] FCALL "Unable to register device (err=%d).\n" [L2218] FCALL "rtc alarm" [L2220] FCALL "Unable to request interrupt for device (err=%d).\n" [L2226] FCALL "Tegra internal Real Time Clock\n" [L2323] EXPR, FCALL "tegra_rtc" [L1713] int ldv_irq_1_2 = 0; [L1714] int LDV_IN_INTERRUPT = 1; [L1715] int ldv_irq_1_3 = 0; [L1717] void *ldv_irq_data_1_1 ; [L1718] int ldv_irq_1_1 = 0; [L1719] int ldv_irq_1_0 = 0; [L1720] int ldv_irq_line_1_3 ; [L1721] void *ldv_irq_data_1_0 ; [L1722] int ldv_state_variable_0 ; [L1724] int ldv_state_variable_3 ; [L1725] int ldv_irq_line_1_0 ; [L1726] int ldv_state_variable_2 ; [L1727] void *ldv_irq_data_1_3 ; [L1728] int ref_cnt ; [L1729] int ldv_irq_line_1_1 ; [L1731] void *ldv_irq_data_1_2 ; [L1732] int ldv_state_variable_1 ; [L1733] int ldv_irq_line_1_2 ; [L2342] int ldv_retval_2 ; [L2343] int ldv_retval_0 ; [L2345] int ldv_retval_1 ; [L2943] int ldv_init = 0; [L1716] struct platform_device *tegra_rtc_driver_group0 ; [L1723] struct device *tegra_rtc_ops_group1 ; [L1730] struct rtc_time *tegra_rtc_ops_group0 ; [L1734] struct rtc_wkalrm *tegra_rtc_ops_group2 ; [L2123-L2125] FCALL static struct rtc_class_ops tegra_rtc_ops = {0, 0, 0, & tegra_rtc_read_time, & tegra_rtc_set_time, & tegra_rtc_read_alarm, & tegra_rtc_set_alarm, & tegra_rtc_proc, 0, 0, & tegra_rtc_alarm_irq_enable}; [L2322-L2323] FCALL static struct platform_driver tegra_rtc_driver = {0, & tegra_rtc_remove, & tegra_rtc_shutdown, & tegra_rtc_suspend, & tegra_rtc_resume, {"tegra_rtc", 0, & __this_module, 0, (_Bool)0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, 0}; [L2518] struct seq_file *ldvarg1 ; [L2519] void *tmp ; [L2520] unsigned int ldvarg0 ; [L2521] unsigned int tmp___0 ; [L2522] FCALL pm_message_t ldvarg2 ; [L2523] int tmp___1 ; [L2524] int tmp___2 ; [L2525] int tmp___3 ; [L2526] int tmp___4 ; VAL ["info->tegra_rtc_lock"={20:0}, "name\t\t: %s\n"={28:0}, "rtc alarm"={34:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={224:0}, "Unable to allocate resources for device.\n"={27:0}, "Unable to grab IOs for device.\n"={19:0}, "Unable to register device (err=%d).\n"={38:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={26:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={217:218}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={44:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={35:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2529] CALL, EXPR ldv_zalloc(136U) VAL ["info->tegra_rtc_lock"={20:0}, "name\t\t: %s\n"={28:0}, "rtc alarm"={34:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={224:0}, "Unable to allocate resources for device.\n"={27:0}, "Unable to grab IOs for device.\n"={19:0}, "Unable to register device (err=%d).\n"={38:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={26:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={217:218}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={44:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={35:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1635] void *p ; [L1636] void *tmp ; [L1637] int tmp___0 ; [L1640] tmp___0 = __VERIFIER_nondet_int() [L1641] COND TRUE tmp___0 != 0 [L1642] RET return (0); [L2529] EXPR ldv_zalloc(136U) VAL ["info->tegra_rtc_lock"={20:0}, "name\t\t: %s\n"={28:0}, "rtc alarm"={34:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={224:0}, "Unable to allocate resources for device.\n"={27:0}, "Unable to grab IOs for device.\n"={19:0}, "Unable to register device (err=%d).\n"={38:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={26:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={217:218}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={44:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={35:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2529] tmp = ldv_zalloc(136U) [L2530] ldvarg1 = (struct seq_file *)tmp [L2531] tmp___0 = __VERIFIER_nondet_uint() [L2532] ldvarg0 = tmp___0 [L2533] FCALL ldv_initialize() [L2534] FCALL memset((void *)(& ldvarg2), 0, 4U) [L2535] ldv_state_variable_1 = 1 [L2536] ref_cnt = 0 [L2537] ldv_state_variable_0 = 1 [L2538] ldv_state_variable_3 = 0 [L2539] ldv_state_variable_2 = 0 VAL ["info->tegra_rtc_lock"={20:0}, "name\t\t: %s\n"={28:0}, "rtc alarm"={34:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={224:0}, "Unable to allocate resources for device.\n"={27:0}, "Unable to grab IOs for device.\n"={19:0}, "Unable to register device (err=%d).\n"={38:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={26:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={217:218}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={44:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={35:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2541] tmp___1 = __VERIFIER_nondet_int() [L2543] case 0: [L2550] case 1: VAL ["info->tegra_rtc_lock"={20:0}, "name\t\t: %s\n"={28:0}, "rtc alarm"={34:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={224:0}, "Unable to allocate resources for device.\n"={27:0}, "Unable to grab IOs for device.\n"={19:0}, "Unable to register device (err=%d).\n"={38:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={26:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={217:218}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={44:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={35:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2551] COND TRUE ldv_state_variable_0 != 0 [L2552] tmp___2 = __VERIFIER_nondet_int() [L2554] case 0: [L2563] case 1: VAL ["info->tegra_rtc_lock"={20:0}, "name\t\t: %s\n"={28:0}, "rtc alarm"={34:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={224:0}, "Unable to allocate resources for device.\n"={27:0}, "Unable to grab IOs for device.\n"={19:0}, "Unable to register device (err=%d).\n"={38:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={26:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={217:218}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={44:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={35:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2564] COND TRUE ldv_state_variable_0 == 1 [L2565] CALL, EXPR tegra_rtc_init() [L2326] int tmp ; [L2329] EXPR, FCALL platform_driver_probe(& tegra_rtc_driver, & tegra_rtc_probe) [L2329] tmp = platform_driver_probe(& tegra_rtc_driver, & tegra_rtc_probe) [L2330] RET return (tmp); [L2565] EXPR tegra_rtc_init() [L2565] ldv_retval_0 = tegra_rtc_init() [L2566] COND TRUE ldv_retval_0 == 0 [L2567] ldv_state_variable_0 = 3 [L2568] ldv_state_variable_2 = 1 [L2569] CALL ldv_initialize_platform_driver_2() [L2476] void *tmp ; VAL ["info->tegra_rtc_lock"={20:0}, "name\t\t: %s\n"={28:0}, "rtc alarm"={34:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={224:0}, "Unable to allocate resources for device.\n"={27:0}, "Unable to grab IOs for device.\n"={19:0}, "Unable to register device (err=%d).\n"={38:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={26:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={217:218}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={44:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={35:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2479] CALL, EXPR ldv_zalloc(624U) VAL ["info->tegra_rtc_lock"={20:0}, "name\t\t: %s\n"={28:0}, "rtc alarm"={34:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={224:0}, "Unable to allocate resources for device.\n"={27:0}, "Unable to grab IOs for device.\n"={19:0}, "Unable to register device (err=%d).\n"={38:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={26:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={217:218}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={44:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={35:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1635] void *p ; [L1636] void *tmp ; [L1637] int tmp___0 ; [L1640] tmp___0 = __VERIFIER_nondet_int() [L1641] COND TRUE tmp___0 != 0 [L1642] RET return (0); [L2479] EXPR ldv_zalloc(624U) VAL ["info->tegra_rtc_lock"={20:0}, "name\t\t: %s\n"={28:0}, "rtc alarm"={34:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={224:0}, "Unable to allocate resources for device.\n"={27:0}, "Unable to grab IOs for device.\n"={19:0}, "Unable to register device (err=%d).\n"={38:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={26:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={217:218}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={44:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={35:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2479] tmp = ldv_zalloc(624U) [L2480] RET tegra_rtc_driver_group0 = (struct platform_device *)tmp [L2569] ldv_initialize_platform_driver_2() [L2573] COND FALSE !(ldv_retval_0 != 0) VAL ["info->tegra_rtc_lock"={20:0}, "name\t\t: %s\n"={28:0}, "rtc alarm"={34:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={224:0}, "Unable to allocate resources for device.\n"={27:0}, "Unable to grab IOs for device.\n"={19:0}, "Unable to register device (err=%d).\n"={38:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={26:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={217:218}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={44:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={35:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2541] tmp___1 = __VERIFIER_nondet_int() [L2543] case 0: [L2550] case 1: [L2591] case 2: [L2699] case 3: VAL ["info->tegra_rtc_lock"={20:0}, "name\t\t: %s\n"={28:0}, "rtc alarm"={34:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={224:0}, "Unable to allocate resources for device.\n"={27:0}, "Unable to grab IOs for device.\n"={19:0}, "Unable to register device (err=%d).\n"={38:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={26:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={217:218}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={44:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={35:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2700] COND TRUE ldv_state_variable_2 != 0 [L2701] tmp___4 = __VERIFIER_nondet_int() [L2703] case 0: [L2717] case 1: [L2729] case 2: [L2752] case 3: [L2764] case 4: [L2765] COND TRUE ldv_state_variable_2 == 1 [L2766] FCALL ldv_probe_2() [L2767] ldv_state_variable_2 = 2 [L2768] ref_cnt = ref_cnt + 1 VAL ["info->tegra_rtc_lock"={20:0}, "name\t\t: %s\n"={28:0}, "rtc alarm"={34:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={224:0}, "Unable to allocate resources for device.\n"={27:0}, "Unable to grab IOs for device.\n"={19:0}, "Unable to register device (err=%d).\n"={38:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={26:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={217:218}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={44:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={35:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2541] tmp___1 = __VERIFIER_nondet_int() [L2543] case 0: [L2550] case 1: [L2591] case 2: [L2699] case 3: VAL ["info->tegra_rtc_lock"={20:0}, "name\t\t: %s\n"={28:0}, "rtc alarm"={34:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={224:0}, "Unable to allocate resources for device.\n"={27:0}, "Unable to grab IOs for device.\n"={19:0}, "Unable to register device (err=%d).\n"={38:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={26:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={217:218}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={44:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={35:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2700] COND TRUE ldv_state_variable_2 != 0 [L2701] tmp___4 = __VERIFIER_nondet_int() [L2703] case 0: VAL ["info->tegra_rtc_lock"={20:0}, "name\t\t: %s\n"={28:0}, "rtc alarm"={34:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={224:0}, "Unable to allocate resources for device.\n"={27:0}, "Unable to grab IOs for device.\n"={19:0}, "Unable to register device (err=%d).\n"={38:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={26:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={217:218}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={44:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={35:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2704] COND FALSE !(ldv_state_variable_2 == 4) VAL ["info->tegra_rtc_lock"={20:0}, "name\t\t: %s\n"={28:0}, "rtc alarm"={34:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={224:0}, "Unable to allocate resources for device.\n"={27:0}, "Unable to grab IOs for device.\n"={19:0}, "Unable to register device (err=%d).\n"={38:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={26:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={217:218}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={44:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={35:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2710] COND TRUE ldv_state_variable_2 == 2 VAL ["info->tegra_rtc_lock"={20:0}, "name\t\t: %s\n"={28:0}, "rtc alarm"={34:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={224:0}, "Unable to allocate resources for device.\n"={27:0}, "Unable to grab IOs for device.\n"={19:0}, "Unable to register device (err=%d).\n"={38:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={26:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={217:218}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={44:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={35:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2711] CALL tegra_rtc_shutdown(tegra_rtc_driver_group0) VAL ["info->tegra_rtc_lock"={20:0}, "name\t\t: %s\n"={28:0}, "rtc alarm"={34:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={224:0}, "Unable to allocate resources for device.\n"={27:0}, "Unable to grab IOs for device.\n"={19:0}, "Unable to register device (err=%d).\n"={38:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={26:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={217:218}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, pdev={0:0}, ref_cnt=1, tegra_rtc_driver={44:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={35:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2318] CALL tegra_rtc_alarm_irq_enable(& pdev->dev, 0U) VAL ["info->tegra_rtc_lock"={20:0}, "name\t\t: %s\n"={28:0}, "rtc alarm"={34:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={224:0}, "Unable to allocate resources for device.\n"={27:0}, "Unable to grab IOs for device.\n"={19:0}, "Unable to register device (err=%d).\n"={38:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={26:0}, "write failed:retry count exceeded.\n"={18:0}, \old(enabled)=0, __this_module={217:218}, dev={0:12}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={44:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={35:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2006] struct tegra_rtc_info *info ; [L2007] void *tmp ; [L2008] unsigned int status ; [L2009] unsigned long sl_irq_flags ; [L2010] u32 __v ; [L2011] u32 __v___0 ; [L2014] EXPR, FCALL dev_get_drvdata((struct device const *)dev) [L2014] tmp = dev_get_drvdata((struct device const *)dev) [L2015] info = (struct tegra_rtc_info *)tmp VAL ["info->tegra_rtc_lock"={20:0}, "name\t\t: %s\n"={28:0}, "rtc alarm"={34:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={224:0}, "Unable to allocate resources for device.\n"={27:0}, "Unable to grab IOs for device.\n"={19:0}, "Unable to register device (err=%d).\n"={38:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={26:0}, "write failed:retry count exceeded.\n"={18:0}, \old(enabled)=0, __this_module={217:218}, dev={0:12}, dev={0:12}, enabled=0, info={94:93}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={44:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={35:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={94:93}] [L2016] CALL tegra_rtc_wait_while_busy(dev) VAL ["info->tegra_rtc_lock"={20:0}, "name\t\t: %s\n"={28:0}, "rtc alarm"={34:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={224:0}, "Unable to allocate resources for device.\n"={27:0}, "Unable to grab IOs for device.\n"={19:0}, "Unable to register device (err=%d).\n"={38:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={26:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={217:218}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={44:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={35:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1875] struct tegra_rtc_info *info ; [L1876] void *tmp ; [L1877] int retries ; [L1878] int tmp___0 ; [L1879] u32 tmp___1 ; [L1882] EXPR, FCALL dev_get_drvdata((struct device const *)dev) [L1882] tmp = dev_get_drvdata((struct device const *)dev) [L1883] info = (struct tegra_rtc_info *)tmp [L1884] retries = 500 VAL ["info->tegra_rtc_lock"={20:0}, "name\t\t: %s\n"={28:0}, "rtc alarm"={34:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={224:0}, "Unable to allocate resources for device.\n"={27:0}, "Unable to grab IOs for device.\n"={19:0}, "Unable to register device (err=%d).\n"={38:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={26:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={217:218}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={44:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={35:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1896] CALL, EXPR tegra_rtc_check_busy(info) [L1863] u32 __v ; [L1864] u32 __v___0 ; [L1867] EXPR, FCALL info->rtc_base [L1867] EXPR, FCALL (unsigned int volatile *)info->rtc_base + 4U [L1867] __v___0 = *((unsigned int volatile *)info->rtc_base + 4U) [L1868] __v = __v___0 [L1870] RET return (__v & 1U); [L1896] EXPR tegra_rtc_check_busy(info) [L1896] tmp___1 = tegra_rtc_check_busy(info) [L1897] COND FALSE !(tmp___1 != 0U) [L1903] RET return (0); VAL ["info->tegra_rtc_lock"={20:0}, "name\t\t: %s\n"={28:0}, "rtc alarm"={34:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={224:0}, "Unable to allocate resources for device.\n"={27:0}, "Unable to grab IOs for device.\n"={19:0}, "Unable to register device (err=%d).\n"={38:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={26:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={217:218}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={44:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={35:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2016] tegra_rtc_wait_while_busy(dev) VAL ["info->tegra_rtc_lock"={20:0}, "name\t\t: %s\n"={28:0}, "rtc alarm"={34:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={224:0}, "Unable to allocate resources for device.\n"={27:0}, "Unable to grab IOs for device.\n"={19:0}, "Unable to register device (err=%d).\n"={38:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={26:0}, "write failed:retry count exceeded.\n"={18:0}, \old(enabled)=0, __this_module={217:218}, dev={0:12}, dev={0:12}, enabled=0, info={94:93}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={44:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={35:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tegra_rtc_wait_while_busy(dev)=0, tmp={94:93}] [L2017] CALL ldv_spin_lock_check() VAL ["info->tegra_rtc_lock"={20:0}, "name\t\t: %s\n"={28:0}, "rtc alarm"={34:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={224:0}, "Unable to allocate resources for device.\n"={27:0}, "Unable to grab IOs for device.\n"={19:0}, "Unable to register device (err=%d).\n"={38:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={26:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={217:218}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={44:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={35:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2962] COND FALSE !(ldv_init == 1) VAL ["info->tegra_rtc_lock"={20:0}, "name\t\t: %s\n"={28:0}, "rtc alarm"={34:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={224:0}, "Unable to allocate resources for device.\n"={27:0}, "Unable to grab IOs for device.\n"={19:0}, "Unable to register device (err=%d).\n"={38:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={26:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={217:218}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={44:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={35:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2965] CALL ldv_error() VAL ["info->tegra_rtc_lock"={20:0}, "name\t\t: %s\n"={28:0}, "rtc alarm"={34:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={224:0}, "Unable to allocate resources for device.\n"={27:0}, "Unable to grab IOs for device.\n"={19:0}, "Unable to register device (err=%d).\n"={38:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={26:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={217:218}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={44:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={35:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1684] __VERIFIER_error() VAL ["info->tegra_rtc_lock"={20:0}, "name\t\t: %s\n"={28:0}, "rtc alarm"={34:0}, "Tegra internal Real Time Clock\n"={43:0}, "tegra_rtc"={224:0}, "Unable to allocate resources for device.\n"={27:0}, "Unable to grab IOs for device.\n"={19:0}, "Unable to register device (err=%d).\n"={38:0}, "Unable to request interrupt for device (err=%d).\n"={39:0}, "Unable to request mem region for device.\n"={26:0}, "write failed:retry count exceeded.\n"={18:0}, __this_module={217:218}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={44:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={35:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 982.8 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 916.28 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 167.8 MB). Free memory was 956.9 MB in the beginning and 987.5 MB in the end (delta: -30.6 MB). Peak memory consumption was 152.8 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 59.47 ms. Allocated memory is still 1.2 GB. Free memory was 987.5 MB in the beginning and 980.8 MB in the end (delta: 6.7 MB). Peak memory consumption was 6.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 52.43 ms. Allocated memory is still 1.2 GB. Free memory was 980.8 MB in the beginning and 974.1 MB in the end (delta: 6.7 MB). Peak memory consumption was 6.7 MB. Max. memory is 11.5 GB. * RCFGBuilder took 2739.38 ms. Allocated memory was 1.2 GB in the beginning and 1.3 GB in the end (delta: 70.8 MB). Free memory was 974.1 MB in the beginning and 1.1 GB in the end (delta: -161.4 MB). Peak memory consumption was 152.9 MB. Max. memory is 11.5 GB. * CodeCheck took 171216.62 ms. Allocated memory was 1.3 GB in the beginning and 3.7 GB in the end (delta: 2.4 GB). Free memory was 1.1 GB in the beginning and 1.5 GB in the end (delta: -347.2 MB). Peak memory consumption was 2.1 GB. Max. memory is 11.5 GB. * Witness Printer took 7.28 ms. Allocated memory is still 3.7 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.meminit_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.meminit_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.meminit_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.meminit_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.C_memset_#ptr : $Pointer$ not handled RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Received shutdown request... ### Bit-precise run ### This is Ultimate 0.1.23-5842f4b [2018-11-18 16:26:27,282 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-18 16:26:27,283 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-18 16:26:27,292 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-18 16:26:27,292 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-18 16:26:27,293 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-18 16:26:27,294 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-18 16:26:27,295 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-18 16:26:27,296 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-18 16:26:27,297 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-18 16:26:27,298 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-18 16:26:27,298 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-18 16:26:27,299 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-18 16:26:27,300 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-18 16:26:27,300 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-18 16:26:27,301 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-18 16:26:27,302 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-18 16:26:27,303 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-18 16:26:27,304 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-18 16:26:27,305 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-18 16:26:27,306 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-18 16:26:27,307 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-18 16:26:27,309 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-18 16:26:27,309 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-18 16:26:27,309 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-18 16:26:27,310 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-18 16:26:27,311 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-18 16:26:27,311 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-18 16:26:27,312 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-18 16:26:27,313 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-18 16:26:27,313 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-18 16:26:27,314 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-18 16:26:27,314 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-18 16:26:27,314 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-18 16:26:27,315 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-18 16:26:27,316 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-18 16:26:27,316 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_2534fb7c-43e1-4b6c-8b15-e5b65f920b17/bin-2019/ukojak/config/svcomp-Reach-64bit-Kojak_Bitvector.epf [2018-11-18 16:26:27,327 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-18 16:26:27,327 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-18 16:26:27,328 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-18 16:26:27,328 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-11-18 16:26:27,329 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-18 16:26:27,329 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-18 16:26:27,329 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-18 16:26:27,329 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-18 16:26:27,330 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-18 16:26:27,330 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-18 16:26:27,330 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-18 16:26:27,330 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-11-18 16:26:27,331 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-11-18 16:26:27,331 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-18 16:26:27,331 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-18 16:26:27,331 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-18 16:26:27,331 INFO L131 SettingsManager]: Preferences of CodeCheck differ from their defaults: [2018-11-18 16:26:27,331 INFO L133 SettingsManager]: * Timeout in seconds=1000000 [2018-11-18 16:26:27,331 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-18 16:26:27,331 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-18 16:26:27,332 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 [2018-11-18 16:26:27,332 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-18 16:26:27,332 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-18 16:26:27,332 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-18 16:26:27,332 INFO L133 SettingsManager]: * Use separate solver for trace checks=false [2018-11-18 16:26:27,332 INFO L133 SettingsManager]: * Trace refinement strategy=WALRUS [2018-11-18 16:26:27,332 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-18 16:26:27,333 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-11-18 16:26:27,333 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-11-18 16:26:27,333 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-18 16:26:27,333 INFO L133 SettingsManager]: * To the following directory=dump/ Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_2534fb7c-43e1-4b6c-8b15-e5b65f920b17/bin-2019/ukojak Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Kojak Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 62bcb163bcd8d8adcc467bfe735fb02012bcbb37 [2018-11-18 16:26:27,365 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-18 16:26:27,375 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-18 16:26:27,378 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-18 16:26:27,379 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-18 16:26:27,379 INFO L276 PluginConnector]: CDTParser initialized [2018-11-18 16:26:27,380 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_2534fb7c-43e1-4b6c-8b15-e5b65f920b17/bin-2019/ukojak/../../sv-benchmarks/c/ldv-validator-v0.6/linux-stable-9ec4f65-1-110_1a-drivers--rtc--rtc-tegra.ko-entry_point_false-unreach-call.cil.out.c [2018-11-18 16:26:27,424 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_2534fb7c-43e1-4b6c-8b15-e5b65f920b17/bin-2019/ukojak/data/033598b65/e1c3fb29574f4bb88e73fc949938f3b0/FLAGaa5737865 [2018-11-18 16:26:27,862 INFO L307 CDTParser]: Found 1 translation units. [2018-11-18 16:26:27,862 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_2534fb7c-43e1-4b6c-8b15-e5b65f920b17/sv-benchmarks/c/ldv-validator-v0.6/linux-stable-9ec4f65-1-110_1a-drivers--rtc--rtc-tegra.ko-entry_point_false-unreach-call.cil.out.c [2018-11-18 16:26:27,877 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_2534fb7c-43e1-4b6c-8b15-e5b65f920b17/bin-2019/ukojak/data/033598b65/e1c3fb29574f4bb88e73fc949938f3b0/FLAGaa5737865 [2018-11-18 16:26:27,887 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_2534fb7c-43e1-4b6c-8b15-e5b65f920b17/bin-2019/ukojak/data/033598b65/e1c3fb29574f4bb88e73fc949938f3b0 [2018-11-18 16:26:27,889 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-18 16:26:27,890 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-18 16:26:27,891 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-18 16:26:27,891 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-18 16:26:27,893 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-18 16:26:27,894 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 04:26:27" (1/1) ... [2018-11-18 16:26:27,895 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@675d5c7d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:26:27, skipping insertion in model container [2018-11-18 16:26:27,895 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 04:26:27" (1/1) ... [2018-11-18 16:26:27,901 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-18 16:26:27,946 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-18 16:26:28,532 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-18 16:26:28,639 INFO L191 MainTranslator]: Completed pre-run [2018-11-18 16:26:28,830 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-18 16:26:28,890 INFO L195 MainTranslator]: Completed translation [2018-11-18 16:26:28,891 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:26:28 WrapperNode [2018-11-18 16:26:28,891 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-18 16:26:28,891 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-18 16:26:28,891 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-18 16:26:28,892 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-18 16:26:28,898 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:26:28" (1/1) ... [2018-11-18 16:26:28,921 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:26:28" (1/1) ... [2018-11-18 16:26:28,951 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-18 16:26:28,952 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-18 16:26:28,952 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-18 16:26:28,952 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-18 16:26:28,960 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:26:28" (1/1) ... [2018-11-18 16:26:28,960 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:26:28" (1/1) ... [2018-11-18 16:26:28,966 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:26:28" (1/1) ... [2018-11-18 16:26:28,966 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:26:28" (1/1) ... [2018-11-18 16:26:28,986 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:26:28" (1/1) ... [2018-11-18 16:26:28,992 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:26:28" (1/1) ... [2018-11-18 16:26:28,997 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:26:28" (1/1) ... [2018-11-18 16:26:29,004 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-18 16:26:29,004 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-18 16:26:29,005 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-18 16:26:29,005 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-18 16:26:29,006 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:26:28" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_2534fb7c-43e1-4b6c-8b15-e5b65f920b17/bin-2019/ukojak/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 [2018-11-18 16:26:29,055 INFO L130 BoogieDeclarations]: Found specification of procedure dev_get_drvdata [2018-11-18 16:26:29,055 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE1 [2018-11-18 16:26:29,055 INFO L130 BoogieDeclarations]: Found specification of procedure platform_driver_unregister [2018-11-18 16:26:29,055 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE8 [2018-11-18 16:26:29,055 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-18 16:26:29,056 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2018-11-18 16:26:29,056 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_stop [2018-11-18 16:26:29,056 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_stop [2018-11-18 16:26:29,056 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_initialize [2018-11-18 16:26:29,056 INFO L130 BoogieDeclarations]: Found specification of procedure rtc_time_to_tm [2018-11-18 16:26:29,057 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_proc [2018-11-18 16:26:29,057 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_proc [2018-11-18 16:26:29,057 INFO L130 BoogieDeclarations]: Found specification of procedure irq_set_irq_wake [2018-11-18 16:26:29,057 INFO L130 BoogieDeclarations]: Found specification of procedure outer_sync [2018-11-18 16:26:29,057 INFO L138 BoogieDeclarations]: Found implementation of procedure outer_sync [2018-11-18 16:26:29,057 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_remove [2018-11-18 16:26:29,057 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_remove [2018-11-18 16:26:29,057 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_shutdown [2018-11-18 16:26:29,057 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_shutdown [2018-11-18 16:26:29,058 INFO L130 BoogieDeclarations]: Found specification of procedure rtc_tm_to_time [2018-11-18 16:26:29,058 INFO L130 BoogieDeclarations]: Found specification of procedure __release_region [2018-11-18 16:26:29,058 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2018-11-18 16:26:29,058 INFO L130 BoogieDeclarations]: Found specification of procedure free_irq [2018-11-18 16:26:29,058 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_set_alarm [2018-11-18 16:26:29,058 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_set_alarm [2018-11-18 16:26:29,058 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_error [2018-11-18 16:26:29,058 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_error [2018-11-18 16:26:29,058 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_release_3 [2018-11-18 16:26:29,058 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~intINTTYPE1 [2018-11-18 16:26:29,058 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_spin_lock_check [2018-11-18 16:26:29,058 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_spin_lock_check [2018-11-18 16:26:29,059 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_alarm_irq_enable [2018-11-18 16:26:29,059 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_alarm_irq_enable [2018-11-18 16:26:29,059 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_iounmap [2018-11-18 16:26:29,059 INFO L130 BoogieDeclarations]: Found specification of procedure platform_driver_probe [2018-11-18 16:26:29,059 INFO L130 BoogieDeclarations]: Found specification of procedure rtc_valid_tm [2018-11-18 16:26:29,059 INFO L130 BoogieDeclarations]: Found specification of procedure rtc_update_irq [2018-11-18 16:26:29,059 INFO L130 BoogieDeclarations]: Found specification of procedure rtc_device_unregister [2018-11-18 16:26:29,059 INFO L130 BoogieDeclarations]: Found specification of procedure __const_udelay [2018-11-18 16:26:29,059 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-11-18 16:26:29,059 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_irq_1 [2018-11-18 16:26:29,059 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_irq_1 [2018-11-18 16:26:29,059 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_unlock_irqrestore [2018-11-18 16:26:29,059 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-11-18 16:26:29,059 INFO L130 BoogieDeclarations]: Found specification of procedure device_may_wakeup [2018-11-18 16:26:29,059 INFO L138 BoogieDeclarations]: Found implementation of procedure device_may_wakeup [2018-11-18 16:26:29,059 INFO L130 BoogieDeclarations]: Found specification of procedure spin_unlock_irqrestore [2018-11-18 16:26:29,059 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_unlock_irqrestore [2018-11-18 16:26:29,060 INFO L130 BoogieDeclarations]: Found specification of procedure platform_get_resource [2018-11-18 16:26:29,060 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE8 [2018-11-18 16:26:29,060 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE1 [2018-11-18 16:26:29,060 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2018-11-18 16:26:29,060 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-18 16:26:29,060 INFO L130 BoogieDeclarations]: Found specification of procedure dev_set_drvdata [2018-11-18 16:26:29,060 INFO L130 BoogieDeclarations]: Found specification of procedure platform_set_drvdata [2018-11-18 16:26:29,060 INFO L138 BoogieDeclarations]: Found implementation of procedure platform_set_drvdata [2018-11-18 16:26:29,060 INFO L130 BoogieDeclarations]: Found specification of procedure platform_get_drvdata [2018-11-18 16:26:29,060 INFO L138 BoogieDeclarations]: Found implementation of procedure platform_get_drvdata [2018-11-18 16:26:29,060 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_read_time [2018-11-18 16:26:29,060 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_read_time [2018-11-18 16:26:29,060 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_wait_while_busy [2018-11-18 16:26:29,060 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_wait_while_busy [2018-11-18 16:26:29,061 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_probe_3 [2018-11-18 16:26:29,061 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_probe_2 [2018-11-18 16:26:29,061 INFO L130 BoogieDeclarations]: Found specification of procedure resource_size [2018-11-18 16:26:29,061 INFO L138 BoogieDeclarations]: Found implementation of procedure resource_size [2018-11-18 16:26:29,061 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_final_state [2018-11-18 16:26:29,061 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2018-11-18 16:26:29,061 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2018-11-18 16:26:29,061 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_set_time [2018-11-18 16:26:29,061 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_set_time [2018-11-18 16:26:29,061 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-18 16:26:29,065 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-18 16:27:04,587 INFO L278 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-18 16:27:04,587 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 04:27:04 BoogieIcfgContainer [2018-11-18 16:27:04,587 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-18 16:27:04,588 INFO L113 PluginConnector]: ------------------------CodeCheck---------------------------- [2018-11-18 16:27:04,588 INFO L271 PluginConnector]: Initializing CodeCheck... [2018-11-18 16:27:04,595 INFO L276 PluginConnector]: CodeCheck initialized [2018-11-18 16:27:04,595 INFO L185 PluginConnector]: Executing the observer CodeCheckObserver from plugin CodeCheck for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 04:27:04" (1/1) ... [2018-11-18 16:27:04,602 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:27:04,621 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-18 16:27:04,629 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 311 states to 219 states and 311 transitions. [2018-11-18 16:27:04,630 INFO L276 IsEmpty]: Start isEmpty. Operand 219 states and 311 transitions. [2018-11-18 16:27:04,635 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-11-18 16:27:04,636 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-18 16:27:04,663 FATAL L292 ToolchainWalker]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.codecheck has thrown an exception: java.lang.IllegalArgumentException: Indexed Sort BitVec undefined at de.uni_freiburg.informatik.ultimate.logic.SortSymbol.checkArity(SortSymbol.java:153) at de.uni_freiburg.informatik.ultimate.logic.SortSymbol.getSort(SortSymbol.java:177) at de.uni_freiburg.informatik.ultimate.logic.Theory.getSort(Theory.java:1243) at de.uni_freiburg.informatik.ultimate.logic.NoopScript.sort(NoopScript.java:287) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.TermTransferrer.transferSort(TermTransferrer.java:128) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.TermTransferrer.convertApplicationTerm(TermTransferrer.java:162) at de.uni_freiburg.informatik.ultimate.logic.TermTransformer$BuildApplicationTerm.walk(TermTransformer.java:320) at de.uni_freiburg.informatik.ultimate.logic.NonRecursive.run(NonRecursive.java:122) at de.uni_freiburg.informatik.ultimate.logic.NonRecursive.run(NonRecursive.java:113) at de.uni_freiburg.informatik.ultimate.logic.TermTransformer.transform(TermTransformer.java:253) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.cfg.SmtSymbols.transferSymbols(SmtSymbols.java:129) at de.uni_freiburg.informatik.ultimate.plugins.generator.codecheck.CodeCheckObserver.process(CodeCheckObserver.java:449) at de.uni_freiburg.informatik.ultimate.core.coreplugin.modelwalker.CFGWalker.runObserver(CFGWalker.java:57) at de.uni_freiburg.informatik.ultimate.core.coreplugin.modelwalker.BaseWalker.runObserver(BaseWalker.java:93) at de.uni_freiburg.informatik.ultimate.core.coreplugin.modelwalker.BaseWalker.run(BaseWalker.java:86) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:167) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:316) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55) [2018-11-18 16:27:04,665 INFO L168 Benchmark]: Toolchain (without parser) took 36775.65 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 219.7 MB). Free memory was 945.4 MB in the beginning and 1.2 GB in the end (delta: -216.6 MB). Peak memory consumption was 3.0 MB. Max. memory is 11.5 GB. [2018-11-18 16:27:04,666 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-18 16:27:04,666 INFO L168 Benchmark]: CACSL2BoogieTranslator took 1000.30 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 160.4 MB). Free memory was 945.4 MB in the beginning and 1.0 GB in the end (delta: -93.9 MB). Peak memory consumption was 128.2 MB. Max. memory is 11.5 GB. [2018-11-18 16:27:04,667 INFO L168 Benchmark]: Boogie Procedure Inliner took 60.24 ms. Allocated memory is still 1.2 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 5.7 MB). Peak memory consumption was 5.7 MB. Max. memory is 11.5 GB. [2018-11-18 16:27:04,667 INFO L168 Benchmark]: Boogie Preprocessor took 52.36 ms. Allocated memory is still 1.2 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 5.7 MB). Peak memory consumption was 5.7 MB. Max. memory is 11.5 GB. [2018-11-18 16:27:04,668 INFO L168 Benchmark]: RCFGBuilder took 35582.98 ms. Allocated memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 59.2 MB). Free memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: -141.1 MB). Peak memory consumption was 220.9 MB. Max. memory is 11.5 GB. [2018-11-18 16:27:04,669 INFO L168 Benchmark]: CodeCheck took 76.94 ms. Allocated memory is still 1.2 GB. Free memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 7.0 MB). Peak memory consumption was 7.0 MB. Max. memory is 11.5 GB. [2018-11-18 16:27:04,672 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.codecheck: - ExceptionOrErrorResult: IllegalArgumentException: Indexed Sort BitVec undefined de.uni_freiburg.informatik.ultimate.plugins.generator.codecheck: IllegalArgumentException: Indexed Sort BitVec undefined: de.uni_freiburg.informatik.ultimate.logic.SortSymbol.checkArity(SortSymbol.java:153) * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 1000.30 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 160.4 MB). Free memory was 945.4 MB in the beginning and 1.0 GB in the end (delta: -93.9 MB). Peak memory consumption was 128.2 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 60.24 ms. Allocated memory is still 1.2 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 5.7 MB). Peak memory consumption was 5.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 52.36 ms. Allocated memory is still 1.2 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 5.7 MB). Peak memory consumption was 5.7 MB. Max. memory is 11.5 GB. * RCFGBuilder took 35582.98 ms. Allocated memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 59.2 MB). Free memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: -141.1 MB). Peak memory consumption was 220.9 MB. Max. memory is 11.5 GB. * CodeCheck took 76.94 ms. Allocated memory is still 1.2 GB. Free memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 7.0 MB). Peak memory consumption was 7.0 MB. Max. memory is 11.5 GB. RESULT: Ultimate could not prove your program: Toolchain returned no result. Received shutdown request...